From d732dab9b048a1c0bc9a8f8ab5c8c6bcddd1cc48 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 23 Aug 2026 15:15:48 +0200 Subject: [PATCH] llvm: add updated issue links for targets with @prefetch crashes Also lift the restriction for ARM which seems to work now. * https://github.com/llvm/llvm-project/issues/218236 * https://github.com/llvm/llvm-project/issues/218239 --- src/codegen/llvm/FuncGen.zig | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/src/codegen/llvm/FuncGen.zig b/src/codegen/llvm/FuncGen.zig index 6ddb1d7f73aa18c1792c08c4aad3e227176ff774..6e80a6a0017e61c25af84cd6581186fe9add95d8 100644 --- a/src/codegen/llvm/FuncGen.zig +++ b/src/codegen/llvm/FuncGen.zig @@ -6542,28 +6542,19 @@ fn airPrefetch(self: *FuncGen, inst: Air.Inst.Index) Allocator.Error!Builder.Val comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.instruction) == 0); comptime assert(@backingInt(std.lang.PrefetchOptions.Cache.data) == 1); - // LLVM fails during codegen of instruction cache prefetchs for these architectures. - // This is an LLVM bug as the prefetch intrinsic should be a noop if not supported - // by the target. - // To work around this, don't emit llvm.prefetch in this case. - // See https://bugs.llvm.org/show_bug.cgi?id=21037 const zcu = self.object.zcu; const target = zcu.getTarget(); switch (prefetch.cache) { .instruction => switch (target.cpu.arch) { + // https://github.com/llvm/llvm-project/issues/218236 .x86_64, .x86, + // https://github.com/llvm/llvm-project/issues/218239 .powerpc, .powerpcle, .powerpc64, .powerpc64le, => return .none, - .arm, .armeb, .thumb, .thumbeb => { - switch (prefetch.rw) { - .write => return .none, - else => {}, - } - }, else => {}, }, .data => {}, -- 2.54.0