| ... | @@ -22,6 +22,7 @@ instructions: std.ArrayListUnmanaged(codegen.aarch64.encoding.Instruction), | ... | @@ -22,6 +22,7 @@ instructions: std.ArrayListUnmanaged(codegen.aarch64.encoding.Instruction), |
| 22 | literals: std.ArrayListUnmanaged(u32), | 22 | literals: std.ArrayListUnmanaged(u32), |
| 23 | nav_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Nav), | 23 | nav_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Nav), |
| 24 | uav_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Uav), | 24 | uav_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Uav), |
| | 25 | lazy_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Lazy), |
| 25 | global_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Global), | 26 | global_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Global), |
| 26 | literal_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Literal), | 27 | literal_relocs: std.ArrayListUnmanaged(codegen.aarch64.Mir.Reloc.Literal), |
| 27 | | 28 | |
| ... | @@ -50,11 +51,11 @@ pub const Block = struct { | ... | @@ -50,11 +51,11 @@ pub const Block = struct { |
| 50 | std.math.maxInt(@typeInfo(Air.Inst.Index).@"enum".tag_type), | 51 | std.math.maxInt(@typeInfo(Air.Inst.Index).@"enum".tag_type), |
| 51 | ); | 52 | ); |
| 52 | | 53 | |
| 53 | fn branch(block: *const Block, isel: *Select) !void { | 54 | fn branch(target_block: *const Block, isel: *Select) !void { |
| 54 | if (isel.instructions.items.len > block.target_label) { | 55 | if (isel.instructions.items.len > target_block.target_label) { |
| 55 | try isel.emit(.b(@intCast((isel.instructions.items.len + 1 - block.target_label) << 2))); | 56 | try isel.emit(.b(@intCast((isel.instructions.items.len + 1 - target_block.target_label) << 2))); |
| 56 | } | 57 | } |
| 57 | try isel.merge(&block.live_registers, .{}); | 58 | try isel.merge(&target_block.live_registers, .{}); |
| 58 | } | 59 | } |
| 59 | }; | 60 | }; |
| 60 | | 61 | |
| ... | @@ -84,12 +85,12 @@ pub const Loop = struct { | ... | @@ -84,12 +85,12 @@ pub const Loop = struct { |
| 84 | | 85 | |
| 85 | pub const empty_list: u32 = std.math.maxInt(u32); | 86 | pub const empty_list: u32 = std.math.maxInt(u32); |
| 86 | | 87 | |
| 87 | fn branch(loop: *Loop, isel: *Select) !void { | 88 | fn branch(target_loop: *Loop, isel: *Select) !void { |
| 88 | try isel.instructions.ensureUnusedCapacity(isel.pt.zcu.gpa, 1); | 89 | try isel.instructions.ensureUnusedCapacity(isel.pt.zcu.gpa, 1); |
| 89 | const repeat_list_tail = loop.repeat_list; | 90 | const repeat_list_tail = target_loop.repeat_list; |
| 90 | loop.repeat_list = @intCast(isel.instructions.items.len); | 91 | target_loop.repeat_list = @intCast(isel.instructions.items.len); |
| 91 | isel.instructions.appendAssumeCapacity(@bitCast(repeat_list_tail)); | 92 | isel.instructions.appendAssumeCapacity(@bitCast(repeat_list_tail)); |
| 92 | try isel.merge(&loop.live_registers, .{}); | 93 | try isel.merge(&target_loop.live_registers, .{}); |
| 93 | } | 94 | } |
| 94 | }; | 95 | }; |
| 95 | | 96 | |
| ... | @@ -108,6 +109,7 @@ pub fn deinit(isel: *Select) void { | ... | @@ -108,6 +109,7 @@ pub fn deinit(isel: *Select) void { |
| 108 | isel.literals.deinit(gpa); | 109 | isel.literals.deinit(gpa); |
| 109 | isel.nav_relocs.deinit(gpa); | 110 | isel.nav_relocs.deinit(gpa); |
| 110 | isel.uav_relocs.deinit(gpa); | 111 | isel.uav_relocs.deinit(gpa); |
| | 112 | isel.lazy_relocs.deinit(gpa); |
| 111 | isel.global_relocs.deinit(gpa); | 113 | isel.global_relocs.deinit(gpa); |
| 112 | isel.literal_relocs.deinit(gpa); | 114 | isel.literal_relocs.deinit(gpa); |
| 113 | | 115 | |
| ... | @@ -582,7 +584,7 @@ pub fn analyze(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -582,7 +584,7 @@ pub fn analyze(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 582 | | 584 | |
| 583 | air_body_index += 1; | 585 | air_body_index += 1; |
| 584 | }, | 586 | }, |
| 585 | .@"try", .try_cold, .try_ptr, .try_ptr_cold => { | 587 | .@"try", .try_cold => { |
| 586 | const pl_op = air_data[@intFromEnum(air_inst_index)].pl_op; | 588 | const pl_op = air_data[@intFromEnum(air_inst_index)].pl_op; |
| 587 | const extra = isel.air.extraData(Air.Try, pl_op.payload); | 589 | const extra = isel.air.extraData(Air.Try, pl_op.payload); |
| 588 | | 590 | |
| ... | @@ -594,6 +596,18 @@ pub fn analyze(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -594,6 +596,18 @@ pub fn analyze(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 594 | air_inst_index = air_body[air_body_index]; | 596 | air_inst_index = air_body[air_body_index]; |
| 595 | continue :air_tag air_tags[@intFromEnum(air_inst_index)]; | 597 | continue :air_tag air_tags[@intFromEnum(air_inst_index)]; |
| 596 | }, | 598 | }, |
| | 599 | .try_ptr, .try_ptr_cold => { |
| | 600 | const ty_pl = air_data[@intFromEnum(air_inst_index)].ty_pl; |
| | 601 | const extra = isel.air.extraData(Air.TryPtr, ty_pl.payload); |
| | 602 | |
| | 603 | try isel.analyzeUse(extra.data.ptr); |
| | 604 | try isel.analyze(@ptrCast(isel.air.extra.items[extra.end..][0..extra.data.body_len])); |
| | 605 | try isel.def_order.putNoClobber(gpa, air_inst_index, {}); |
| | 606 | |
| | 607 | air_body_index += 1; |
| | 608 | air_inst_index = air_body[air_body_index]; |
| | 609 | continue :air_tag air_tags[@intFromEnum(air_inst_index)]; |
| | 610 | }, |
| 597 | .ret, .ret_safe, .ret_load => { | 611 | .ret, .ret_safe, .ret_load => { |
| 598 | const un_op = air_data[@intFromEnum(air_inst_index)].un_op; | 612 | const un_op = air_data[@intFromEnum(air_inst_index)].un_op; |
| 599 | isel.returns = true; | 613 | isel.returns = true; |
| ... | @@ -864,7 +878,7 @@ pub fn finishAnalysis(isel: *Select) !void { | ... | @@ -864,7 +878,7 @@ pub fn finishAnalysis(isel: *Select) !void { |
| 864 | } | 878 | } |
| 865 | } | 879 | } |
| 866 | | 880 | |
| 867 | pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | 881 | pub fn body(isel: *Select, air_body: []const Air.Inst.Index) error{ OutOfMemory, CodegenFail }!void { |
| 868 | const zcu = isel.pt.zcu; | 882 | const zcu = isel.pt.zcu; |
| 869 | const ip = &zcu.intern_pool; | 883 | const ip = &zcu.intern_pool; |
| 870 | const gpa = zcu.gpa; | 884 | const gpa = zcu.gpa; |
| ... | @@ -946,7 +960,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -946,7 +960,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 946 | } | 960 | } |
| 947 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 961 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 948 | }, | 962 | }, |
| 949 | .add, .add_optimized, .add_wrap, .sub, .sub_optimized, .sub_wrap => |air_tag| { | 963 | .add, .add_safe, .add_optimized, .add_wrap, .sub, .sub_safe, .sub_optimized, .sub_wrap => |air_tag| { |
| 950 | if (isel.live_values.fetchRemove(air.inst_index)) |res_vi| unused: { | 964 | if (isel.live_values.fetchRemove(air.inst_index)) |res_vi| unused: { |
| 951 | defer res_vi.value.deref(isel); | 965 | defer res_vi.value.deref(isel); |
| 952 | | 966 | |
| ... | @@ -954,13 +968,16 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -954,13 +968,16 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 954 | const ty = isel.air.typeOf(bin_op.lhs, ip); | 968 | const ty = isel.air.typeOf(bin_op.lhs, ip); |
| 955 | if (!ty.isRuntimeFloat()) try res_vi.value.addOrSubtract(isel, ty, try isel.use(bin_op.lhs), switch (air_tag) { | 969 | if (!ty.isRuntimeFloat()) try res_vi.value.addOrSubtract(isel, ty, try isel.use(bin_op.lhs), switch (air_tag) { |
| 956 | else => unreachable, | 970 | else => unreachable, |
| 957 | .add, .add_wrap => .add, | 971 | .add, .add_safe, .add_wrap => .add, |
| 958 | .sub, .sub_wrap => .sub, | 972 | .sub, .sub_safe, .sub_wrap => .sub, |
| 959 | }, try isel.use(bin_op.rhs), .{ .wrap = switch (air_tag) { | 973 | }, try isel.use(bin_op.rhs), .{ |
| 960 | else => unreachable, | 974 | .overflow = switch (air_tag) { |
| 961 | .add, .sub => false, | 975 | else => unreachable, |
| 962 | .add_wrap, .sub_wrap => true, | 976 | .add, .sub => .@"unreachable", |
| 963 | } }) else switch (ty.floatBits(isel.target)) { | 977 | .add_safe, .sub_safe => .{ .panic = .integer_overflow }, |
| | 978 | .add_wrap, .sub_wrap => .wrap, |
| | 979 | }, |
| | 980 | }) else switch (ty.floatBits(isel.target)) { |
| 964 | else => unreachable, | 981 | else => unreachable, |
| 965 | 16, 32, 64 => |bits| { | 982 | 16, 32, 64 => |bits| { |
| 966 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; | 983 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| ... | @@ -1021,7 +1038,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1021,7 +1038,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1021 | | 1038 | |
| 1022 | try call.prepareCallee(isel); | 1039 | try call.prepareCallee(isel); |
| 1023 | try isel.global_relocs.append(gpa, .{ | 1040 | try isel.global_relocs.append(gpa, .{ |
| 1024 | .global = switch (air_tag) { | 1041 | .name = switch (air_tag) { |
| 1025 | else => unreachable, | 1042 | else => unreachable, |
| 1026 | .add, .add_optimized => switch (bits) { | 1043 | .add, .add_optimized => switch (bits) { |
| 1027 | else => unreachable, | 1044 | else => unreachable, |
| ... | @@ -1336,7 +1353,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1336,7 +1353,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1336 | | 1353 | |
| 1337 | try call.prepareCallee(isel); | 1354 | try call.prepareCallee(isel); |
| 1338 | try isel.global_relocs.append(gpa, .{ | 1355 | try isel.global_relocs.append(gpa, .{ |
| 1339 | .global = switch (bits) { | 1356 | .name = switch (bits) { |
| 1340 | else => unreachable, | 1357 | else => unreachable, |
| 1341 | 16 => "__mulhf3", | 1358 | 16 => "__mulhf3", |
| 1342 | 32 => "__mulsf3", | 1359 | 32 => "__mulsf3", |
| ... | @@ -1379,6 +1396,143 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1379,6 +1396,143 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1379 | } | 1396 | } |
| 1380 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 1397 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 1381 | }, | 1398 | }, |
| | 1399 | .mul_safe => |air_tag| { |
| | 1400 | if (isel.live_values.fetchRemove(air.inst_index)) |res_vi| unused: { |
| | 1401 | defer res_vi.value.deref(isel); |
| | 1402 | |
| | 1403 | const bin_op = air.data(air.inst_index).bin_op; |
| | 1404 | const ty = isel.air.typeOf(bin_op.lhs, ip); |
| | 1405 | if (!ty.isAbiInt(zcu)) return isel.fail("bad {s} {f}", .{ @tagName(air_tag), isel.fmtType(ty) }); |
| | 1406 | const int_info = ty.intInfo(zcu); |
| | 1407 | switch (int_info.signedness) { |
| | 1408 | .signed => switch (int_info.bits) { |
| | 1409 | 0 => unreachable, |
| | 1410 | 1 => { |
| | 1411 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1412 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1413 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1414 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1415 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1416 | try isel.emit(.orr(res_ra.w(), lhs_mat.ra.w(), .{ .register = rhs_mat.ra.w() })); |
| | 1417 | const skip_label = isel.instructions.items.len; |
| | 1418 | try isel.emitPanic(.integer_overflow); |
| | 1419 | try isel.emit(.@"b."( |
| | 1420 | .invert(.ne), |
| | 1421 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 1422 | )); |
| | 1423 | try isel.emit(.ands(.wzr, lhs_mat.ra.w(), .{ .register = rhs_mat.ra.w() })); |
| | 1424 | try rhs_mat.finish(isel); |
| | 1425 | try lhs_mat.finish(isel); |
| | 1426 | }, |
| | 1427 | else => return isel.fail("too big {s} {f}", .{ @tagName(air_tag), isel.fmtType(ty) }), |
| | 1428 | }, |
| | 1429 | .unsigned => switch (int_info.bits) { |
| | 1430 | 0 => unreachable, |
| | 1431 | 1 => { |
| | 1432 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1433 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1434 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1435 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1436 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1437 | try isel.emit(.@"and"(res_ra.w(), lhs_mat.ra.w(), .{ .register = rhs_mat.ra.w() })); |
| | 1438 | try rhs_mat.finish(isel); |
| | 1439 | try lhs_mat.finish(isel); |
| | 1440 | }, |
| | 1441 | 2...16 => |bits| { |
| | 1442 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1443 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1444 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1445 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1446 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1447 | const skip_label = isel.instructions.items.len; |
| | 1448 | try isel.emitPanic(.integer_overflow); |
| | 1449 | try isel.emit(.@"b."( |
| | 1450 | .eq, |
| | 1451 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 1452 | )); |
| | 1453 | try isel.emit(.ands(.wzr, res_ra.w(), .{ .immediate = .{ |
| | 1454 | .N = .word, |
| | 1455 | .immr = @intCast(32 - bits), |
| | 1456 | .imms = @intCast(32 - bits - 1), |
| | 1457 | } })); |
| | 1458 | try isel.emit(.madd(res_ra.w(), lhs_mat.ra.w(), rhs_mat.ra.w(), .wzr)); |
| | 1459 | try rhs_mat.finish(isel); |
| | 1460 | try lhs_mat.finish(isel); |
| | 1461 | }, |
| | 1462 | 17...32 => |bits| { |
| | 1463 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1464 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1465 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1466 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1467 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1468 | const skip_label = isel.instructions.items.len; |
| | 1469 | try isel.emitPanic(.integer_overflow); |
| | 1470 | try isel.emit(.@"b."( |
| | 1471 | .eq, |
| | 1472 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 1473 | )); |
| | 1474 | try isel.emit(.ands(.xzr, res_ra.x(), .{ .immediate = .{ |
| | 1475 | .N = .doubleword, |
| | 1476 | .immr = @intCast(64 - bits), |
| | 1477 | .imms = @intCast(64 - bits - 1), |
| | 1478 | } })); |
| | 1479 | try isel.emit(.umaddl(res_ra.x(), lhs_mat.ra.w(), rhs_mat.ra.w(), .xzr)); |
| | 1480 | try rhs_mat.finish(isel); |
| | 1481 | try lhs_mat.finish(isel); |
| | 1482 | }, |
| | 1483 | 33...63 => |bits| { |
| | 1484 | const lo64_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1485 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1486 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1487 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1488 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1489 | const hi64_ra = hi64_ra: { |
| | 1490 | const lo64_lock = isel.tryLockReg(lo64_ra); |
| | 1491 | defer lo64_lock.unlock(isel); |
| | 1492 | break :hi64_ra try isel.allocIntReg(); |
| | 1493 | }; |
| | 1494 | defer isel.freeReg(hi64_ra); |
| | 1495 | const skip_label = isel.instructions.items.len; |
| | 1496 | try isel.emitPanic(.integer_overflow); |
| | 1497 | try isel.emit(.cbz( |
| | 1498 | hi64_ra.x(), |
| | 1499 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 1500 | )); |
| | 1501 | try isel.emit(.orr(hi64_ra.x(), hi64_ra.x(), .{ .shifted_register = .{ |
| | 1502 | .register = lo64_ra.x(), |
| | 1503 | .shift = .{ .lsr = @intCast(bits) }, |
| | 1504 | } })); |
| | 1505 | try isel.emit(.madd(lo64_ra.x(), lhs_mat.ra.x(), rhs_mat.ra.x(), .xzr)); |
| | 1506 | try isel.emit(.umulh(hi64_ra.x(), lhs_mat.ra.x(), rhs_mat.ra.x())); |
| | 1507 | try rhs_mat.finish(isel); |
| | 1508 | try lhs_mat.finish(isel); |
| | 1509 | }, |
| | 1510 | 64 => { |
| | 1511 | const res_ra = try res_vi.value.defReg(isel) orelse break :unused; |
| | 1512 | const lhs_vi = try isel.use(bin_op.lhs); |
| | 1513 | const rhs_vi = try isel.use(bin_op.rhs); |
| | 1514 | const lhs_mat = try lhs_vi.matReg(isel); |
| | 1515 | const rhs_mat = try rhs_vi.matReg(isel); |
| | 1516 | try isel.emit(.madd(res_ra.x(), lhs_mat.ra.x(), rhs_mat.ra.x(), .xzr)); |
| | 1517 | const hi64_ra = try isel.allocIntReg(); |
| | 1518 | defer isel.freeReg(hi64_ra); |
| | 1519 | const skip_label = isel.instructions.items.len; |
| | 1520 | try isel.emitPanic(.integer_overflow); |
| | 1521 | try isel.emit(.cbz( |
| | 1522 | hi64_ra.x(), |
| | 1523 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 1524 | )); |
| | 1525 | try isel.emit(.umulh(hi64_ra.x(), lhs_mat.ra.x(), rhs_mat.ra.x())); |
| | 1526 | try rhs_mat.finish(isel); |
| | 1527 | try lhs_mat.finish(isel); |
| | 1528 | }, |
| | 1529 | 65...128 => return isel.fail("bad {s} {f}", .{ @tagName(air_tag), isel.fmtType(ty) }), |
| | 1530 | else => return isel.fail("too big {s} {f}", .{ @tagName(air_tag), isel.fmtType(ty) }), |
| | 1531 | }, |
| | 1532 | } |
| | 1533 | } |
| | 1534 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 1535 | }, |
| 1382 | .mul_sat => |air_tag| { | 1536 | .mul_sat => |air_tag| { |
| 1383 | if (isel.live_values.fetchRemove(air.inst_index)) |res_vi| unused: { | 1537 | if (isel.live_values.fetchRemove(air.inst_index)) |res_vi| unused: { |
| 1384 | defer res_vi.value.deref(isel); | 1538 | defer res_vi.value.deref(isel); |
| ... | @@ -1674,7 +1828,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1674,7 +1828,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1674 | | 1828 | |
| 1675 | try call.prepareCallee(isel); | 1829 | try call.prepareCallee(isel); |
| 1676 | try isel.global_relocs.append(gpa, .{ | 1830 | try isel.global_relocs.append(gpa, .{ |
| 1677 | .global = switch (bits) { | 1831 | .name = switch (bits) { |
| 1678 | else => unreachable, | 1832 | else => unreachable, |
| 1679 | 16 => "__divhf3", | 1833 | 16 => "__divhf3", |
| 1680 | 32 => "__divsf3", | 1834 | 32 => "__divsf3", |
| ... | @@ -1813,7 +1967,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1813,7 +1967,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1813 | | 1967 | |
| 1814 | try call.prepareCallee(isel); | 1968 | try call.prepareCallee(isel); |
| 1815 | try isel.global_relocs.append(gpa, .{ | 1969 | try isel.global_relocs.append(gpa, .{ |
| 1816 | .global = switch (int_info.signedness) { | 1970 | .name = switch (int_info.signedness) { |
| 1817 | .signed => "__divti3", | 1971 | .signed => "__divti3", |
| 1818 | .unsigned => "__udivti3", | 1972 | .unsigned => "__udivti3", |
| 1819 | }, | 1973 | }, |
| ... | @@ -1917,7 +2071,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1917,7 +2071,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1917 | else => unreachable, | 2071 | else => unreachable, |
| 1918 | .div_trunc, .div_trunc_optimized => { | 2072 | .div_trunc, .div_trunc_optimized => { |
| 1919 | try isel.global_relocs.append(gpa, .{ | 2073 | try isel.global_relocs.append(gpa, .{ |
| 1920 | .global = switch (bits) { | 2074 | .name = switch (bits) { |
| 1921 | else => unreachable, | 2075 | else => unreachable, |
| 1922 | 16 => "__trunch", | 2076 | 16 => "__trunch", |
| 1923 | 32 => "truncf", | 2077 | 32 => "truncf", |
| ... | @@ -1931,7 +2085,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1931,7 +2085,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1931 | }, | 2085 | }, |
| 1932 | .div_floor, .div_floor_optimized => { | 2086 | .div_floor, .div_floor_optimized => { |
| 1933 | try isel.global_relocs.append(gpa, .{ | 2087 | try isel.global_relocs.append(gpa, .{ |
| 1934 | .global = switch (bits) { | 2088 | .name = switch (bits) { |
| 1935 | else => unreachable, | 2089 | else => unreachable, |
| 1936 | 16 => "__floorh", | 2090 | 16 => "__floorh", |
| 1937 | 32 => "floorf", | 2091 | 32 => "floorf", |
| ... | @@ -1946,7 +2100,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -1946,7 +2100,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 1946 | .div_exact, .div_exact_optimized => {}, | 2100 | .div_exact, .div_exact_optimized => {}, |
| 1947 | } | 2101 | } |
| 1948 | try isel.global_relocs.append(gpa, .{ | 2102 | try isel.global_relocs.append(gpa, .{ |
| 1949 | .global = switch (bits) { | 2103 | .name = switch (bits) { |
| 1950 | else => unreachable, | 2104 | else => unreachable, |
| 1951 | 16 => "__divhf3", | 2105 | 16 => "__divhf3", |
| 1952 | 32 => "__divsf3", | 2106 | 32 => "__divsf3", |
| ... | @@ -2046,7 +2200,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -2046,7 +2200,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 2046 | | 2200 | |
| 2047 | try call.prepareCallee(isel); | 2201 | try call.prepareCallee(isel); |
| 2048 | try isel.global_relocs.append(gpa, .{ | 2202 | try isel.global_relocs.append(gpa, .{ |
| 2049 | .global = switch (bits) { | 2203 | .name = switch (bits) { |
| 2050 | else => unreachable, | 2204 | else => unreachable, |
| 2051 | 16 => "__fmodh", | 2205 | 16 => "__fmodh", |
| 2052 | 32 => "fmodf", | 2206 | 32 => "fmodf", |
| ... | @@ -2212,7 +2366,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -2212,7 +2366,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 2212 | | 2366 | |
| 2213 | try call.prepareCallee(isel); | 2367 | try call.prepareCallee(isel); |
| 2214 | try isel.global_relocs.append(gpa, .{ | 2368 | try isel.global_relocs.append(gpa, .{ |
| 2215 | .global = switch (air_tag) { | 2369 | .name = switch (air_tag) { |
| 2216 | else => unreachable, | 2370 | else => unreachable, |
| 2217 | .max => switch (bits) { | 2371 | .max => switch (bits) { |
| 2218 | else => unreachable, | 2372 | else => unreachable, |
| ... | @@ -2284,7 +2438,9 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -2284,7 +2438,9 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 2284 | else => unreachable, | 2438 | else => unreachable, |
| 2285 | .add_with_overflow => .add, | 2439 | .add_with_overflow => .add, |
| 2286 | .sub_with_overflow => .sub, | 2440 | .sub_with_overflow => .sub, |
| 2287 | }, rhs_vi, .{ .wrap = true, .overflow_ra = try overflow_vi.?.defReg(isel) orelse .zr }); | 2441 | }, rhs_vi, .{ |
| | 2442 | .overflow = if (try overflow_vi.?.defReg(isel)) |overflow_ra| .{ .ra = overflow_ra } else .wrap, |
| | 2443 | }); |
| 2288 | } | 2444 | } |
| 2289 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 2445 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 2290 | }, | 2446 | }, |
| ... | @@ -3092,7 +3248,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3092,7 +3248,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3092 | | 3248 | |
| 3093 | try call.prepareCallee(isel); | 3249 | try call.prepareCallee(isel); |
| 3094 | try isel.global_relocs.append(gpa, .{ | 3250 | try isel.global_relocs.append(gpa, .{ |
| 3095 | .global = "memcpy", | 3251 | .name = "memcpy", |
| 3096 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 3252 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 3097 | }); | 3253 | }); |
| 3098 | try isel.emit(.bl(0)); | 3254 | try isel.emit(.bl(0)); |
| ... | @@ -3119,7 +3275,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3119,7 +3275,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3119 | | 3275 | |
| 3120 | try call.prepareCallee(isel); | 3276 | try call.prepareCallee(isel); |
| 3121 | try isel.global_relocs.append(gpa, .{ | 3277 | try isel.global_relocs.append(gpa, .{ |
| 3122 | .global = "memcpy", | 3278 | .name = "memcpy", |
| 3123 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 3279 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 3124 | }); | 3280 | }); |
| 3125 | try isel.emit(.bl(0)); | 3281 | try isel.emit(.bl(0)); |
| ... | @@ -3139,19 +3295,9 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3139,19 +3295,9 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3139 | .block => { | 3295 | .block => { |
| 3140 | const ty_pl = air.data(air.inst_index).ty_pl; | 3296 | const ty_pl = air.data(air.inst_index).ty_pl; |
| 3141 | const extra = isel.air.extraData(Air.Block, ty_pl.payload); | 3297 | const extra = isel.air.extraData(Air.Block, ty_pl.payload); |
| 3142 | | 3298 | try isel.block(air.inst_index, ty_pl.ty.toType(), @ptrCast( |
| 3143 | if (ty_pl.ty != .noreturn_type) { | 3299 | isel.air.extra.items[extra.end..][0..extra.data.body_len], |
| 3144 | isel.blocks.putAssumeCapacityNoClobber(air.inst_index, .{ | 3300 | )); |
| 3145 | .live_registers = isel.live_registers, | | |
| 3146 | .target_label = @intCast(isel.instructions.items.len), | | |
| 3147 | }); | | |
| 3148 | } | | |
| 3149 | try isel.body(@ptrCast(isel.air.extra.items[extra.end..][0..extra.data.body_len])); | | |
| 3150 | if (ty_pl.ty != .noreturn_type) { | | |
| 3151 | const block_entry = isel.blocks.pop().?; | | |
| 3152 | assert(block_entry.key == air.inst_index); | | |
| 3153 | if (isel.live_values.fetchRemove(air.inst_index)) |result_vi| result_vi.value.deref(isel); | | |
| 3154 | } | | |
| 3155 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 3301 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 3156 | }, | 3302 | }, |
| 3157 | .loop => { | 3303 | .loop => { |
| ... | @@ -3175,11 +3321,11 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3175,11 +3321,11 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3175 | } | 3321 | } |
| 3176 | | 3322 | |
| 3177 | // IT'S DOM TIME!!! | 3323 | // IT'S DOM TIME!!! |
| 3178 | for (isel.blocks.values(), 0..) |*block, dom_index| { | 3324 | for (isel.blocks.values(), 0..) |*dom_block, dom_index| { |
| 3179 | if (@as(u1, @truncate(isel.dom.items[ | 3325 | if (@as(u1, @truncate(isel.dom.items[ |
| 3180 | loop.dom + dom_index / @bitSizeOf(DomInt) | 3326 | loop.dom + dom_index / @bitSizeOf(DomInt) |
| 3181 | ] >> @truncate(dom_index))) == 0) continue; | 3327 | ] >> @truncate(dom_index))) == 0) continue; |
| 3182 | var live_reg_it = block.live_registers.iterator(); | 3328 | var live_reg_it = dom_block.live_registers.iterator(); |
| 3183 | while (live_reg_it.next()) |live_reg_entry| switch (live_reg_entry.value.*) { | 3329 | while (live_reg_it.next()) |live_reg_entry| switch (live_reg_entry.value.*) { |
| 3184 | _ => |live_vi| try live_vi.mat(isel), | 3330 | _ => |live_vi| try live_vi.mat(isel), |
| 3185 | .allocating => unreachable, | 3331 | .allocating => unreachable, |
| ... | @@ -3211,8 +3357,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3211,8 +3357,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3211 | }, | 3357 | }, |
| 3212 | .br => { | 3358 | .br => { |
| 3213 | const br = air.data(air.inst_index).br; | 3359 | const br = air.data(air.inst_index).br; |
| 3214 | const block = isel.blocks.getPtr(br.block_inst).?; | 3360 | try isel.blocks.getPtr(br.block_inst).?.branch(isel); |
| 3215 | try block.branch(isel); | | |
| 3216 | if (isel.live_values.get(br.block_inst)) |dst_vi| try dst_vi.move(isel, br.operand); | 3361 | if (isel.live_values.get(br.block_inst)) |dst_vi| try dst_vi.move(isel, br.operand); |
| 3217 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 3362 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 3218 | }, | 3363 | }, |
| ... | @@ -3224,6 +3369,22 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3224,6 +3369,22 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3224 | try isel.emit(.brk(0xf000)); | 3369 | try isel.emit(.brk(0xf000)); |
| 3225 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 3370 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 3226 | }, | 3371 | }, |
| | 3372 | .ret_addr => { |
| | 3373 | if (isel.live_values.fetchRemove(air.inst_index)) |addr_vi| unused: { |
| | 3374 | defer addr_vi.value.deref(isel); |
| | 3375 | const addr_ra = try addr_vi.value.defReg(isel) orelse break :unused; |
| | 3376 | try isel.emit(.ldr(addr_ra.x(), .{ .unsigned_offset = .{ .base = .fp, .offset = 8 } })); |
| | 3377 | } |
| | 3378 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 3379 | }, |
| | 3380 | .frame_addr => { |
| | 3381 | if (isel.live_values.fetchRemove(air.inst_index)) |addr_vi| unused: { |
| | 3382 | defer addr_vi.value.deref(isel); |
| | 3383 | const addr_ra = try addr_vi.value.defReg(isel) orelse break :unused; |
| | 3384 | try isel.emit(.orr(addr_ra.x(), .xzr, .{ .register = .fp })); |
| | 3385 | } |
| | 3386 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 3387 | }, |
| 3227 | .call => { | 3388 | .call => { |
| 3228 | const pl_op = air.data(air.inst_index).pl_op; | 3389 | const pl_op = air.data(air.inst_index).pl_op; |
| 3229 | const extra = isel.air.extraData(Air.Call, pl_op.payload); | 3390 | const extra = isel.air.extraData(Air.Call, pl_op.payload); |
| ... | @@ -3312,7 +3473,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3312,7 +3473,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3312 | var param_part_it = passed_vi.parts(isel); | 3473 | var param_part_it = passed_vi.parts(isel); |
| 3313 | var arg_part_it = arg_vi.parts(isel); | 3474 | var arg_part_it = arg_vi.parts(isel); |
| 3314 | if (arg_part_it.only()) |_| { | 3475 | if (arg_part_it.only()) |_| { |
| 3315 | try isel.values.ensureUnusedCapacity(isel.pt.zcu.gpa, param_part_it.remaining); | 3476 | try isel.values.ensureUnusedCapacity(gpa, param_part_it.remaining); |
| 3316 | arg_vi.setParts(isel, param_part_it.remaining); | 3477 | arg_vi.setParts(isel, param_part_it.remaining); |
| 3317 | while (param_part_it.next()) |param_part_vi| _ = arg_vi.addPart( | 3478 | while (param_part_it.next()) |param_part_vi| _ = arg_vi.addPart( |
| 3318 | isel, | 3479 | isel, |
| ... | @@ -3659,7 +3820,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3659,7 +3820,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3659 | | 3820 | |
| 3660 | try call.prepareCallee(isel); | 3821 | try call.prepareCallee(isel); |
| 3661 | try isel.global_relocs.append(gpa, .{ | 3822 | try isel.global_relocs.append(gpa, .{ |
| 3662 | .global = switch (air_tag) { | 3823 | .name = switch (air_tag) { |
| 3663 | else => unreachable, | 3824 | else => unreachable, |
| 3664 | .sqrt => switch (bits) { | 3825 | .sqrt => switch (bits) { |
| 3665 | else => unreachable, | 3826 | else => unreachable, |
| ... | @@ -3751,7 +3912,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -3751,7 +3912,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 3751 | | 3912 | |
| 3752 | try call.prepareCallee(isel); | 3913 | try call.prepareCallee(isel); |
| 3753 | try isel.global_relocs.append(gpa, .{ | 3914 | try isel.global_relocs.append(gpa, .{ |
| 3754 | .global = switch (air_tag) { | 3915 | .name = switch (air_tag) { |
| 3755 | else => unreachable, | 3916 | else => unreachable, |
| 3756 | .sin => switch (bits) { | 3917 | .sin => switch (bits) { |
| 3757 | else => unreachable, | 3918 | else => unreachable, |
| ... | @@ -4239,7 +4400,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4239,7 +4400,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4239 | | 4400 | |
| 4240 | try call.prepareCallee(isel); | 4401 | try call.prepareCallee(isel); |
| 4241 | try isel.global_relocs.append(gpa, .{ | 4402 | try isel.global_relocs.append(gpa, .{ |
| 4242 | .global = switch (bits) { | 4403 | .name = switch (bits) { |
| 4243 | else => unreachable, | 4404 | else => unreachable, |
| 4244 | 16 => "__cmphf2", | 4405 | 16 => "__cmphf2", |
| 4245 | 32 => "__cmpsf2", | 4406 | 32 => "__cmpsf2", |
| ... | @@ -4328,7 +4489,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4328,7 +4489,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4328 | }; | 4489 | }; |
| 4329 | var cond_mat: ?Value.Materialize = null; | 4490 | var cond_mat: ?Value.Materialize = null; |
| 4330 | var cond_reg: Register = undefined; | 4491 | var cond_reg: Register = undefined; |
| 4331 | var temp_reg: Register = undefined; | | |
| 4332 | var cases_it = switch_br.iterateCases(); | 4492 | var cases_it = switch_br.iterateCases(); |
| 4333 | while (cases_it.next()) |case| { | 4493 | while (cases_it.next()) |case| { |
| 4334 | const next_label = isel.instructions.items.len; | 4494 | const next_label = isel.instructions.items.len; |
| ... | @@ -4342,11 +4502,10 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4342,11 +4502,10 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4342 | if (cond_mat == null) { | 4502 | if (cond_mat == null) { |
| 4343 | var cond_vi = try isel.use(switch_br.operand); | 4503 | var cond_vi = try isel.use(switch_br.operand); |
| 4344 | cond_mat = try cond_vi.matReg(isel); | 4504 | cond_mat = try cond_vi.matReg(isel); |
| 4345 | const temp_ra = try isel.allocIntReg(); | 4505 | cond_reg = switch (cond_int_info.bits) { |
| 4346 | cond_reg, temp_reg = switch (cond_int_info.bits) { | | |
| 4347 | else => unreachable, | 4506 | else => unreachable, |
| 4348 | 1...32 => .{ cond_mat.?.ra.w(), temp_ra.w() }, | 4507 | 1...32 => cond_mat.?.ra.w(), |
| 4349 | 33...64 => .{ cond_mat.?.ra.x(), temp_ra.x() }, | 4508 | 33...64 => cond_mat.?.ra.x(), |
| 4350 | }; | 4509 | }; |
| 4351 | } | 4510 | } |
| 4352 | if (case.ranges.len == 0 and case.items.len == 1 and Constant.fromInterned( | 4511 | if (case.ranges.len == 0 and case.items.len == 1 and Constant.fromInterned( |
| ... | @@ -4387,17 +4546,45 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4387,17 +4546,45 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4387 | ) else high_bigint.toInt(i64) catch | 4546 | ) else high_bigint.toInt(i64) catch |
| 4388 | return isel.fail("too big case range end: {f}", .{isel.fmtConstant(high_val)}); | 4547 | return isel.fail("too big case range end: {f}", .{isel.fmtConstant(high_val)}); |
| 4389 | | 4548 | |
| | 4549 | const adjusted_ra = switch (low_int) { |
| | 4550 | 0 => cond_mat.?.ra, |
| | 4551 | else => try isel.allocIntReg(), |
| | 4552 | }; |
| | 4553 | defer if (adjusted_ra != cond_mat.?.ra) isel.freeReg(adjusted_ra); |
| | 4554 | const adjusted_reg = switch (cond_int_info.bits) { |
| | 4555 | else => unreachable, |
| | 4556 | 1...32 => adjusted_ra.w(), |
| | 4557 | 33...64 => adjusted_ra.x(), |
| | 4558 | }; |
| 4390 | const delta_int = high_int -% low_int; | 4559 | const delta_int = high_int -% low_int; |
| 4391 | if (case_range_index > 0) { | 4560 | if (case_range_index | case.items.len > 0) { |
| 4392 | return isel.fail("case range", .{}); | 4561 | if (std.math.cast(u5, delta_int)) |pos_imm| try isel.emit(.ccmp( |
| 4393 | } else if (case.items.len > 0) { | 4562 | adjusted_reg, |
| 4394 | return isel.fail("case range", .{}); | 4563 | .{ .immediate = pos_imm }, |
| | 4564 | .{ .n = false, .z = true, .c = false, .v = false }, |
| | 4565 | if (case_range_index > 0) .hi else .ne, |
| | 4566 | )) else if (std.math.cast(u5, -delta_int)) |neg_imm| try isel.emit(.ccmn( |
| | 4567 | adjusted_reg, |
| | 4568 | .{ .immediate = neg_imm }, |
| | 4569 | .{ .n = false, .z = true, .c = false, .v = false }, |
| | 4570 | if (case_range_index > 0) .hi else .ne, |
| | 4571 | )) else { |
| | 4572 | const imm_ra = try isel.allocIntReg(); |
| | 4573 | defer isel.freeReg(imm_ra); |
| | 4574 | const imm_reg = switch (cond_int_info.bits) { |
| | 4575 | else => unreachable, |
| | 4576 | 1...32 => imm_ra.w(), |
| | 4577 | 33...64 => imm_ra.x(), |
| | 4578 | }; |
| | 4579 | try isel.emit(.ccmp( |
| | 4580 | cond_reg, |
| | 4581 | .{ .register = imm_reg }, |
| | 4582 | .{ .n = false, .z = true, .c = false, .v = false }, |
| | 4583 | if (case_range_index > 0) .hi else .ne, |
| | 4584 | )); |
| | 4585 | try isel.movImmediate(imm_reg, @bitCast(delta_int)); |
| | 4586 | } |
| 4395 | } else { | 4587 | } else { |
| 4396 | const adjusted_reg = switch (low_int) { | | |
| 4397 | 0 => cond_reg, | | |
| 4398 | else => temp_reg, | | |
| 4399 | }; | | |
| 4400 | | | |
| 4401 | if (std.math.cast(u12, delta_int)) |pos_imm| try isel.emit(.subs( | 4588 | if (std.math.cast(u12, delta_int)) |pos_imm| try isel.emit(.subs( |
| 4402 | zero_reg, | 4589 | zero_reg, |
| 4403 | adjusted_reg, | 4590 | adjusted_reg, |
| ... | @@ -4421,41 +4608,55 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4421,41 +4608,55 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4421 | adjusted_reg, | 4608 | adjusted_reg, |
| 4422 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, | 4609 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, |
| 4423 | )) else { | 4610 | )) else { |
| 4424 | try isel.movImmediate(temp_reg, @bitCast(delta_int)); | 4611 | const imm_ra = try isel.allocIntReg(); |
| 4425 | try isel.emit(.subs(zero_reg, adjusted_reg, .{ .register = temp_reg })); | 4612 | defer isel.freeReg(imm_ra); |
| | 4613 | const imm_reg = switch (cond_int_info.bits) { |
| | 4614 | else => unreachable, |
| | 4615 | 1...32 => imm_ra.w(), |
| | 4616 | 33...64 => imm_ra.x(), |
| | 4617 | }; |
| | 4618 | try isel.emit(.subs(zero_reg, adjusted_reg, .{ .register = imm_reg })); |
| | 4619 | try isel.movImmediate(imm_reg, @bitCast(delta_int)); |
| 4426 | } | 4620 | } |
| | 4621 | } |
| 4427 | | 4622 | |
| 4428 | switch (low_int) { | 4623 | switch (low_int) { |
| 4429 | 0 => {}, | 4624 | 0 => {}, |
| 4430 | else => { | 4625 | else => { |
| 4431 | if (std.math.cast(u12, low_int)) |pos_imm| try isel.emit(.sub( | 4626 | if (std.math.cast(u12, low_int)) |pos_imm| try isel.emit(.sub( |
| 4432 | adjusted_reg, | 4627 | adjusted_reg, |
| 4433 | cond_reg, | 4628 | cond_reg, |
| 4434 | .{ .immediate = pos_imm }, | 4629 | .{ .immediate = pos_imm }, |
| 4435 | )) else if (std.math.cast(u12, -low_int)) |neg_imm| try isel.emit(.add( | 4630 | )) else if (std.math.cast(u12, -low_int)) |neg_imm| try isel.emit(.add( |
| 4436 | adjusted_reg, | 4631 | adjusted_reg, |
| 4437 | cond_reg, | 4632 | cond_reg, |
| 4438 | .{ .immediate = neg_imm }, | 4633 | .{ .immediate = neg_imm }, |
| 4439 | )) else if (if (@as(i12, @truncate(low_int)) == 0) | 4634 | )) else if (if (@as(i12, @truncate(low_int)) == 0) |
| 4440 | std.math.cast(u12, low_int >> 12) | 4635 | std.math.cast(u12, low_int >> 12) |
| 4441 | else | 4636 | else |
| 4442 | null) |pos_imm_lsr_12| try isel.emit(.sub( | 4637 | null) |pos_imm_lsr_12| try isel.emit(.sub( |
| 4443 | adjusted_reg, | 4638 | adjusted_reg, |
| 4444 | cond_reg, | 4639 | cond_reg, |
| 4445 | .{ .shifted_immediate = .{ .immediate = pos_imm_lsr_12, .lsl = .@"12" } }, | 4640 | .{ .shifted_immediate = .{ .immediate = pos_imm_lsr_12, .lsl = .@"12" } }, |
| 4446 | )) else if (if (@as(i12, @truncate(-low_int)) == 0) | 4641 | )) else if (if (@as(i12, @truncate(-low_int)) == 0) |
| 4447 | std.math.cast(u12, -low_int >> 12) | 4642 | std.math.cast(u12, -low_int >> 12) |
| 4448 | else | 4643 | else |
| 4449 | null) |neg_imm_lsr_12| try isel.emit(.add( | 4644 | null) |neg_imm_lsr_12| try isel.emit(.add( |
| 4450 | adjusted_reg, | 4645 | adjusted_reg, |
| 4451 | cond_reg, | 4646 | cond_reg, |
| 4452 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, | 4647 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, |
| 4453 | )) else { | 4648 | )) else { |
| 4454 | try isel.movImmediate(temp_reg, @bitCast(low_int)); | 4649 | const imm_ra = try isel.allocIntReg(); |
| 4455 | try isel.emit(.subs(adjusted_reg, cond_reg, .{ .register = temp_reg })); | 4650 | defer isel.freeReg(imm_ra); |
| 4456 | } | 4651 | const imm_reg = switch (cond_int_info.bits) { |
| 4457 | }, | 4652 | else => unreachable, |
| 4458 | } | 4653 | 1...32 => imm_ra.w(), |
| | 4654 | 33...64 => imm_ra.x(), |
| | 4655 | }; |
| | 4656 | try isel.emit(.sub(adjusted_reg, cond_reg, .{ .register = imm_reg })); |
| | 4657 | try isel.movImmediate(imm_reg, @bitCast(low_int)); |
| | 4658 | } |
| | 4659 | }, |
| 4459 | } | 4660 | } |
| 4460 | } | 4661 | } |
| 4461 | var case_item_index = case.items.len; | 4662 | var case_item_index = case.items.len; |
| ... | @@ -4483,13 +4684,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4483,13 +4684,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4483 | .{ .n = false, .z = true, .c = false, .v = false }, | 4684 | .{ .n = false, .z = true, .c = false, .v = false }, |
| 4484 | .ne, | 4685 | .ne, |
| 4485 | )) else { | 4686 | )) else { |
| 4486 | try isel.movImmediate(temp_reg, @bitCast(item_int)); | 4687 | const imm_ra = try isel.allocIntReg(); |
| | 4688 | defer isel.freeReg(imm_ra); |
| | 4689 | const imm_reg = switch (cond_int_info.bits) { |
| | 4690 | else => unreachable, |
| | 4691 | 1...32 => imm_ra.w(), |
| | 4692 | 33...64 => imm_ra.x(), |
| | 4693 | }; |
| 4487 | try isel.emit(.ccmp( | 4694 | try isel.emit(.ccmp( |
| 4488 | cond_reg, | 4695 | cond_reg, |
| 4489 | .{ .register = temp_reg }, | 4696 | .{ .register = imm_reg }, |
| 4490 | .{ .n = false, .z = true, .c = false, .v = false }, | 4697 | .{ .n = false, .z = true, .c = false, .v = false }, |
| 4491 | .ne, | 4698 | .ne, |
| 4492 | )); | 4699 | )); |
| | 4700 | try isel.movImmediate(imm_reg, @bitCast(item_int)); |
| 4493 | } | 4701 | } |
| 4494 | } else { | 4702 | } else { |
| 4495 | if (std.math.cast(u12, item_int)) |pos_imm| try isel.emit(.subs( | 4703 | if (std.math.cast(u12, item_int)) |pos_imm| try isel.emit(.subs( |
| ... | @@ -4515,16 +4723,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4515,16 +4723,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4515 | cond_reg, | 4723 | cond_reg, |
| 4516 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, | 4724 | .{ .shifted_immediate = .{ .immediate = neg_imm_lsr_12, .lsl = .@"12" } }, |
| 4517 | )) else { | 4725 | )) else { |
| 4518 | try isel.movImmediate(temp_reg, @bitCast(item_int)); | 4726 | const imm_ra = try isel.allocIntReg(); |
| 4519 | try isel.emit(.subs(zero_reg, cond_reg, .{ .register = temp_reg })); | 4727 | defer isel.freeReg(imm_ra); |
| | 4728 | const imm_reg = switch (cond_int_info.bits) { |
| | 4729 | else => unreachable, |
| | 4730 | 1...32 => imm_ra.w(), |
| | 4731 | 33...64 => imm_ra.x(), |
| | 4732 | }; |
| | 4733 | try isel.emit(.subs(zero_reg, cond_reg, .{ .register = imm_reg })); |
| | 4734 | try isel.movImmediate(imm_reg, @bitCast(item_int)); |
| 4520 | } | 4735 | } |
| 4521 | } | 4736 | } |
| 4522 | } | 4737 | } |
| 4523 | } | 4738 | } |
| 4524 | if (cond_mat) |mat| { | 4739 | if (cond_mat) |mat| try mat.finish(isel); |
| 4525 | try mat.finish(isel); | | |
| 4526 | isel.freeReg(temp_reg.alias); | | |
| 4527 | } | | |
| 4528 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 4740 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4529 | }, | 4741 | }, |
| 4530 | .@"try", .try_cold => { | 4742 | .@"try", .try_cold => { |
| ... | @@ -4560,17 +4772,62 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4560,17 +4772,62 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4560 | const error_set_part_vi = try error_set_part_it.only(isel); | 4772 | const error_set_part_vi = try error_set_part_it.only(isel); |
| 4561 | const error_set_part_mat = try error_set_part_vi.?.matReg(isel); | 4773 | const error_set_part_mat = try error_set_part_vi.?.matReg(isel); |
| 4562 | try isel.emit(.cbz( | 4774 | try isel.emit(.cbz( |
| 4563 | switch (error_set_part_vi.?.size(isel)) { | 4775 | error_set_part_mat.ra.w(), |
| 4564 | else => unreachable, | | |
| 4565 | 1...4 => error_set_part_mat.ra.w(), | | |
| 4566 | 5...8 => error_set_part_mat.ra.x(), | | |
| 4567 | }, | | |
| 4568 | @intCast((isel.instructions.items.len + 1 - cont_label) << 2), | 4776 | @intCast((isel.instructions.items.len + 1 - cont_label) << 2), |
| 4569 | )); | 4777 | )); |
| 4570 | try error_set_part_mat.finish(isel); | 4778 | try error_set_part_mat.finish(isel); |
| 4571 | | 4779 | |
| 4572 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 4780 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4573 | }, | 4781 | }, |
| | 4782 | .try_ptr, .try_ptr_cold => { |
| | 4783 | const ty_pl = air.data(air.inst_index).ty_pl; |
| | 4784 | const extra = isel.air.extraData(Air.TryPtr, ty_pl.payload); |
| | 4785 | const error_union_ty = isel.air.typeOf(extra.data.ptr, ip).childType(zcu); |
| | 4786 | const error_union_info = ip.indexToKey(error_union_ty.toIntern()).error_union_type; |
| | 4787 | const payload_ty: ZigType = .fromInterned(error_union_info.payload_type); |
| | 4788 | |
| | 4789 | const error_union_ptr_vi = try isel.use(extra.data.ptr); |
| | 4790 | const error_union_ptr_mat = try error_union_ptr_vi.matReg(isel); |
| | 4791 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_ptr_vi| unused: { |
| | 4792 | defer payload_ptr_vi.value.deref(isel); |
| | 4793 | switch (codegen.errUnionPayloadOffset(ty_pl.ty.toType().childType(zcu), zcu)) { |
| | 4794 | 0 => try payload_ptr_vi.value.move(isel, extra.data.ptr), |
| | 4795 | else => |payload_offset| { |
| | 4796 | const payload_ptr_ra = try payload_ptr_vi.value.defReg(isel) orelse break :unused; |
| | 4797 | const lo12: u12 = @truncate(payload_offset >> 0); |
| | 4798 | const hi12: u12 = @intCast(payload_offset >> 12); |
| | 4799 | if (hi12 > 0) try isel.emit(.add( |
| | 4800 | payload_ptr_ra.x(), |
| | 4801 | if (lo12 > 0) payload_ptr_ra.x() else error_union_ptr_mat.ra.x(), |
| | 4802 | .{ .shifted_immediate = .{ .immediate = hi12, .lsl = .@"12" } }, |
| | 4803 | )); |
| | 4804 | if (lo12 > 0) try isel.emit(.add(payload_ptr_ra.x(), error_union_ptr_mat.ra.x(), .{ .immediate = lo12 })); |
| | 4805 | }, |
| | 4806 | } |
| | 4807 | } |
| | 4808 | |
| | 4809 | const cont_label = isel.instructions.items.len; |
| | 4810 | const cont_live_registers = isel.live_registers; |
| | 4811 | try isel.body(@ptrCast(isel.air.extra.items[extra.end..][0..extra.data.body_len])); |
| | 4812 | try isel.merge(&cont_live_registers, .{}); |
| | 4813 | |
| | 4814 | const error_set_ra = try isel.allocIntReg(); |
| | 4815 | defer isel.freeReg(error_set_ra); |
| | 4816 | try isel.loadReg( |
| | 4817 | error_set_ra, |
| | 4818 | ZigType.fromInterned(error_union_info.error_set_type).abiSize(zcu), |
| | 4819 | .unsigned, |
| | 4820 | error_union_ptr_mat.ra, |
| | 4821 | codegen.errUnionErrorOffset(payload_ty, zcu), |
| | 4822 | ); |
| | 4823 | try error_union_ptr_mat.finish(isel); |
| | 4824 | try isel.emit(.cbz( |
| | 4825 | error_set_ra.w(), |
| | 4826 | @intCast((isel.instructions.items.len + 1 - cont_label) << 2), |
| | 4827 | )); |
| | 4828 | |
| | 4829 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 4830 | }, |
| 4574 | .dbg_stmt => { | 4831 | .dbg_stmt => { |
| 4575 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 4832 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4576 | }, | 4833 | }, |
| ... | @@ -4578,6 +4835,14 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4578,6 +4835,14 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4578 | try isel.emit(.nop()); | 4835 | try isel.emit(.nop()); |
| 4579 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 4836 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4580 | }, | 4837 | }, |
| | 4838 | .dbg_inline_block => { |
| | 4839 | const ty_pl = air.data(air.inst_index).ty_pl; |
| | 4840 | const extra = isel.air.extraData(Air.DbgInlineBlock, ty_pl.payload); |
| | 4841 | try isel.block(air.inst_index, ty_pl.ty.toType(), @ptrCast( |
| | 4842 | isel.air.extra.items[extra.end..][0..extra.data.body_len], |
| | 4843 | )); |
| | 4844 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 4845 | }, |
| 4581 | .dbg_var_ptr, .dbg_var_val, .dbg_arg_inline => { | 4846 | .dbg_var_ptr, .dbg_var_val, .dbg_arg_inline => { |
| 4582 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 4847 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4583 | }, | 4848 | }, |
| ... | @@ -4673,7 +4938,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4673,7 +4938,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4673 | | 4938 | |
| 4674 | try call.prepareCallee(isel); | 4939 | try call.prepareCallee(isel); |
| 4675 | try isel.global_relocs.append(gpa, .{ | 4940 | try isel.global_relocs.append(gpa, .{ |
| 4676 | .global = "memcpy", | 4941 | .name = "memcpy", |
| 4677 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 4942 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 4678 | }); | 4943 | }); |
| 4679 | try isel.emit(.bl(0)); | 4944 | try isel.emit(.bl(0)); |
| ... | @@ -4765,10 +5030,8 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4765,10 +5030,8 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4765 | const ptr_ty = isel.air.typeOf(bin_op.lhs, ip); | 5030 | const ptr_ty = isel.air.typeOf(bin_op.lhs, ip); |
| 4766 | const ptr_info = ptr_ty.ptrInfo(zcu); | 5031 | const ptr_info = ptr_ty.ptrInfo(zcu); |
| 4767 | if (ptr_info.packed_offset.host_size > 0) return isel.fail("packed store", .{}); | 5032 | if (ptr_info.packed_offset.host_size > 0) return isel.fail("packed store", .{}); |
| 4768 | if (bin_op.rhs.toInterned()) |rhs_val| if (ip.isUndef(rhs_val)) { | 5033 | if (bin_op.rhs.toInterned()) |rhs_val| if (ip.isUndef(rhs_val)) |
| 4769 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5034 | break :air_tag if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4770 | break :air_tag; | | |
| 4771 | }; | | |
| 4772 | | 5035 | |
| 4773 | const src_vi = try isel.use(bin_op.rhs); | 5036 | const src_vi = try isel.use(bin_op.rhs); |
| 4774 | const size = src_vi.size(isel); | 5037 | const size = src_vi.size(isel); |
| ... | @@ -4782,8 +5045,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4782,8 +5045,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4782 | }); | 5045 | }); |
| 4783 | try ptr_mat.finish(isel); | 5046 | try ptr_mat.finish(isel); |
| 4784 | | 5047 | |
| 4785 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5048 | break :air_tag if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 4786 | break :air_tag; | | |
| 4787 | }, | 5049 | }, |
| 4788 | else => {}, | 5050 | else => {}, |
| 4789 | }; | 5051 | }; |
| ... | @@ -4792,7 +5054,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4792,7 +5054,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4792 | | 5054 | |
| 4793 | try call.prepareCallee(isel); | 5055 | try call.prepareCallee(isel); |
| 4794 | try isel.global_relocs.append(gpa, .{ | 5056 | try isel.global_relocs.append(gpa, .{ |
| 4795 | .global = "memcpy", | 5057 | .name = "memcpy", |
| 4796 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 5058 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 4797 | }); | 5059 | }); |
| 4798 | try isel.emit(.bl(0)); | 5060 | try isel.emit(.bl(0)); |
| ... | @@ -4855,7 +5117,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -4855,7 +5117,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 4855 | | 5117 | |
| 4856 | try call.prepareCallee(isel); | 5118 | try call.prepareCallee(isel); |
| 4857 | try isel.global_relocs.append(gpa, .{ | 5119 | try isel.global_relocs.append(gpa, .{ |
| 4858 | .global = switch (dst_bits) { | 5120 | .name = switch (dst_bits) { |
| 4859 | else => unreachable, | 5121 | else => unreachable, |
| 4860 | 16 => switch (src_bits) { | 5122 | 16 => switch (src_bits) { |
| 4861 | else => unreachable, | 5123 | else => unreachable, |
| ... | @@ -5009,6 +5271,108 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5009,6 +5271,108 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5009 | } | 5271 | } |
| 5010 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5272 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5011 | }, | 5273 | }, |
| | 5274 | .intcast_safe => |air_tag| { |
| | 5275 | if (isel.live_values.fetchRemove(air.inst_index)) |dst_vi| unused: { |
| | 5276 | defer dst_vi.value.deref(isel); |
| | 5277 | |
| | 5278 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5279 | const dst_ty = ty_op.ty.toType(); |
| | 5280 | const dst_int_info = dst_ty.intInfo(zcu); |
| | 5281 | const src_ty = isel.air.typeOf(ty_op.operand, ip); |
| | 5282 | const src_int_info = src_ty.intInfo(zcu); |
| | 5283 | const can_be_negative = dst_int_info.signedness == .signed and |
| | 5284 | src_int_info.signedness == .signed; |
| | 5285 | const panic_id: Zcu.SimplePanicId = panic_id: switch (dst_ty.zigTypeTag(zcu)) { |
| | 5286 | else => unreachable, |
| | 5287 | .int => .integer_out_of_bounds, |
| | 5288 | .@"enum" => { |
| | 5289 | if (!dst_ty.isNonexhaustiveEnum(zcu)) { |
| | 5290 | return isel.fail("bad {s} {f} {f}", .{ @tagName(air_tag), isel.fmtType(dst_ty), isel.fmtType(src_ty) }); |
| | 5291 | } |
| | 5292 | break :panic_id .invalid_enum_value; |
| | 5293 | }, |
| | 5294 | }; |
| | 5295 | if (dst_ty.toIntern() == src_ty.toIntern()) { |
| | 5296 | try dst_vi.value.move(isel, ty_op.operand); |
| | 5297 | } else if (dst_int_info.bits <= 64 and src_int_info.bits <= 64) { |
| | 5298 | const dst_ra = try dst_vi.value.defReg(isel) orelse break :unused; |
| | 5299 | const src_vi = try isel.use(ty_op.operand); |
| | 5300 | const dst_active_bits = dst_int_info.bits - @intFromBool(dst_int_info.signedness == .signed); |
| | 5301 | const src_active_bits = src_int_info.bits - @intFromBool(src_int_info.signedness == .signed); |
| | 5302 | if ((dst_int_info.signedness != .unsigned or src_int_info.signedness != .signed) and dst_active_bits >= src_active_bits) { |
| | 5303 | const src_mat = try src_vi.matReg(isel); |
| | 5304 | try isel.emit(if (can_be_negative and dst_active_bits > 32 and src_active_bits <= 32) |
| | 5305 | .sbfm(dst_ra.x(), src_mat.ra.x(), .{ |
| | 5306 | .N = .doubleword, |
| | 5307 | .immr = 0, |
| | 5308 | .imms = @intCast(src_int_info.bits - 1), |
| | 5309 | }) |
| | 5310 | else switch (src_int_info.bits) { |
| | 5311 | else => unreachable, |
| | 5312 | 1...32 => .orr(dst_ra.w(), .wzr, .{ .register = src_mat.ra.w() }), |
| | 5313 | 33...64 => .orr(dst_ra.x(), .xzr, .{ .register = src_mat.ra.x() }), |
| | 5314 | }); |
| | 5315 | try src_mat.finish(isel); |
| | 5316 | } else { |
| | 5317 | const skip_label = isel.instructions.items.len; |
| | 5318 | try isel.emitPanic(panic_id); |
| | 5319 | try isel.emit(.@"b."( |
| | 5320 | .eq, |
| | 5321 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 5322 | )); |
| | 5323 | if (can_be_negative) { |
| | 5324 | const src_mat = src_mat: { |
| | 5325 | const dst_lock = isel.lockReg(dst_ra); |
| | 5326 | defer dst_lock.unlock(isel); |
| | 5327 | break :src_mat try src_vi.matReg(isel); |
| | 5328 | }; |
| | 5329 | try isel.emit(switch (src_int_info.bits) { |
| | 5330 | else => unreachable, |
| | 5331 | 1...32 => .subs(.wzr, dst_ra.w(), .{ .register = src_mat.ra.w() }), |
| | 5332 | 33...64 => .subs(.xzr, dst_ra.x(), .{ .register = src_mat.ra.x() }), |
| | 5333 | }); |
| | 5334 | try isel.emit(switch (@max(dst_int_info.bits, src_int_info.bits)) { |
| | 5335 | else => unreachable, |
| | 5336 | 1...32 => .sbfm(dst_ra.w(), src_mat.ra.w(), .{ |
| | 5337 | .N = .word, |
| | 5338 | .immr = 0, |
| | 5339 | .imms = @intCast(dst_int_info.bits - 1), |
| | 5340 | }), |
| | 5341 | 33...64 => .sbfm(dst_ra.x(), src_mat.ra.x(), .{ |
| | 5342 | .N = .doubleword, |
| | 5343 | .immr = 0, |
| | 5344 | .imms = @intCast(dst_int_info.bits - 1), |
| | 5345 | }), |
| | 5346 | }); |
| | 5347 | try src_mat.finish(isel); |
| | 5348 | } else { |
| | 5349 | const src_mat = try src_vi.matReg(isel); |
| | 5350 | try isel.emit(switch (@min(dst_int_info.bits, src_int_info.bits)) { |
| | 5351 | else => unreachable, |
| | 5352 | 1...32 => .orr(dst_ra.w(), .wzr, .{ .register = src_mat.ra.w() }), |
| | 5353 | 33...64 => .orr(dst_ra.x(), .xzr, .{ .register = src_mat.ra.x() }), |
| | 5354 | }); |
| | 5355 | const active_bits = @min(dst_active_bits, src_active_bits); |
| | 5356 | try isel.emit(switch (src_int_info.bits) { |
| | 5357 | else => unreachable, |
| | 5358 | 1...32 => .ands(.wzr, src_mat.ra.w(), .{ .immediate = .{ |
| | 5359 | .N = .word, |
| | 5360 | .immr = @intCast(32 - active_bits), |
| | 5361 | .imms = @intCast(32 - active_bits - 1), |
| | 5362 | } }), |
| | 5363 | 33...64 => .ands(.xzr, src_mat.ra.x(), .{ .immediate = .{ |
| | 5364 | .N = .doubleword, |
| | 5365 | .immr = @intCast(64 - active_bits), |
| | 5366 | .imms = @intCast(64 - active_bits - 1), |
| | 5367 | } }), |
| | 5368 | }); |
| | 5369 | try src_mat.finish(isel); |
| | 5370 | } |
| | 5371 | } |
| | 5372 | } else return isel.fail("too big {s} {f} {f}", .{ @tagName(air_tag), isel.fmtType(dst_ty), isel.fmtType(src_ty) }); |
| | 5373 | } |
| | 5374 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5375 | }, |
| 5012 | .trunc => |air_tag| { | 5376 | .trunc => |air_tag| { |
| 5013 | if (isel.live_values.fetchRemove(air.inst_index)) |dst_vi| unused: { | 5377 | if (isel.live_values.fetchRemove(air.inst_index)) |dst_vi| unused: { |
| 5014 | defer dst_vi.value.deref(isel); | 5378 | defer dst_vi.value.deref(isel); |
| ... | @@ -5096,14 +5460,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5096,14 +5460,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5096 | } | 5460 | } |
| 5097 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5461 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5098 | }, | 5462 | }, |
| 5099 | .optional_payload_ptr => { | | |
| 5100 | if (isel.live_values.fetchRemove(air.inst_index)) |dst_vi| { | | |
| 5101 | defer dst_vi.value.deref(isel); | | |
| 5102 | const ty_op = air.data(air.inst_index).ty_op; | | |
| 5103 | try dst_vi.value.move(isel, ty_op.operand); | | |
| 5104 | } | | |
| 5105 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | | |
| 5106 | }, | | |
| 5107 | .optional_payload => { | 5463 | .optional_payload => { |
| 5108 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_vi| unused: { | 5464 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_vi| unused: { |
| 5109 | defer payload_vi.value.deref(isel); | 5465 | defer payload_vi.value.deref(isel); |
| ... | @@ -5122,6 +5478,37 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5122,6 +5478,37 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5122 | } | 5478 | } |
| 5123 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5479 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5124 | }, | 5480 | }, |
| | 5481 | .optional_payload_ptr => { |
| | 5482 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_ptr_vi| { |
| | 5483 | defer payload_ptr_vi.value.deref(isel); |
| | 5484 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5485 | try payload_ptr_vi.value.move(isel, ty_op.operand); |
| | 5486 | } |
| | 5487 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5488 | }, |
| | 5489 | .optional_payload_ptr_set => { |
| | 5490 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_ptr_vi| { |
| | 5491 | defer payload_ptr_vi.value.deref(isel); |
| | 5492 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5493 | const opt_ty = isel.air.typeOf(ty_op.operand, ip).childType(zcu); |
| | 5494 | if (!opt_ty.optionalReprIsPayload(zcu)) { |
| | 5495 | const opt_ptr_vi = try isel.use(ty_op.operand); |
| | 5496 | const opt_ptr_mat = try opt_ptr_vi.matReg(isel); |
| | 5497 | const has_value_ra = try isel.allocIntReg(); |
| | 5498 | defer isel.freeReg(has_value_ra); |
| | 5499 | try isel.storeReg( |
| | 5500 | has_value_ra, |
| | 5501 | 1, |
| | 5502 | opt_ptr_mat.ra, |
| | 5503 | opt_ty.optionalChild(zcu).abiSize(zcu), |
| | 5504 | ); |
| | 5505 | try opt_ptr_mat.finish(isel); |
| | 5506 | try isel.emit(.movz(has_value_ra.w(), 1, .{ .lsl = .@"0" })); |
| | 5507 | } |
| | 5508 | try payload_ptr_vi.value.move(isel, ty_op.operand); |
| | 5509 | } |
| | 5510 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5511 | }, |
| 5125 | .wrap_optional => { | 5512 | .wrap_optional => { |
| 5126 | if (isel.live_values.fetchRemove(air.inst_index)) |opt_vi| unused: { | 5513 | if (isel.live_values.fetchRemove(air.inst_index)) |opt_vi| unused: { |
| 5127 | defer opt_vi.value.deref(isel); | 5514 | defer opt_vi.value.deref(isel); |
| ... | @@ -5161,21 +5548,108 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5161,21 +5548,108 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5161 | } | 5548 | } |
| 5162 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5549 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5163 | }, | 5550 | }, |
| 5164 | .unwrap_errunion_err => { | 5551 | .unwrap_errunion_err => { |
| 5165 | if (isel.live_values.fetchRemove(air.inst_index)) |error_set_vi| { | 5552 | if (isel.live_values.fetchRemove(air.inst_index)) |error_set_vi| { |
| 5166 | defer error_set_vi.value.deref(isel); | 5553 | defer error_set_vi.value.deref(isel); |
| 5167 | | 5554 | |
| | 5555 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5556 | const error_union_ty = isel.air.typeOf(ty_op.operand, ip); |
| | 5557 | |
| | 5558 | const error_union_vi = try isel.use(ty_op.operand); |
| | 5559 | var error_set_part_it = error_union_vi.field( |
| | 5560 | error_union_ty, |
| | 5561 | codegen.errUnionErrorOffset(error_union_ty.errorUnionPayload(zcu), zcu), |
| | 5562 | error_set_vi.value.size(isel), |
| | 5563 | ); |
| | 5564 | const error_set_part_vi = try error_set_part_it.only(isel); |
| | 5565 | try error_set_vi.value.copy(isel, ty_op.ty.toType(), error_set_part_vi.?); |
| | 5566 | } |
| | 5567 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5568 | }, |
| | 5569 | .unwrap_errunion_payload_ptr => { |
| | 5570 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_ptr_vi| unused: { |
| | 5571 | defer payload_ptr_vi.value.deref(isel); |
| | 5572 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5573 | switch (codegen.errUnionPayloadOffset(ty_op.ty.toType().childType(zcu), zcu)) { |
| | 5574 | 0 => try payload_ptr_vi.value.move(isel, ty_op.operand), |
| | 5575 | else => |payload_offset| { |
| | 5576 | const payload_ptr_ra = try payload_ptr_vi.value.defReg(isel) orelse break :unused; |
| | 5577 | const error_union_ptr_vi = try isel.use(ty_op.operand); |
| | 5578 | const error_union_ptr_mat = try error_union_ptr_vi.matReg(isel); |
| | 5579 | const lo12: u12 = @truncate(payload_offset >> 0); |
| | 5580 | const hi12: u12 = @intCast(payload_offset >> 12); |
| | 5581 | if (hi12 > 0) try isel.emit(.add( |
| | 5582 | payload_ptr_ra.x(), |
| | 5583 | if (lo12 > 0) payload_ptr_ra.x() else error_union_ptr_mat.ra.x(), |
| | 5584 | .{ .shifted_immediate = .{ .immediate = hi12, .lsl = .@"12" } }, |
| | 5585 | )); |
| | 5586 | if (lo12 > 0) try isel.emit(.add(payload_ptr_ra.x(), error_union_ptr_mat.ra.x(), .{ .immediate = lo12 })); |
| | 5587 | try error_union_ptr_mat.finish(isel); |
| | 5588 | }, |
| | 5589 | } |
| | 5590 | } |
| | 5591 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5592 | }, |
| | 5593 | .unwrap_errunion_err_ptr => { |
| | 5594 | if (isel.live_values.fetchRemove(air.inst_index)) |error_ptr_vi| unused: { |
| | 5595 | defer error_ptr_vi.value.deref(isel); |
| | 5596 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5597 | switch (codegen.errUnionErrorOffset( |
| | 5598 | isel.air.typeOf(ty_op.operand, ip).childType(zcu).errorUnionPayload(zcu), |
| | 5599 | zcu, |
| | 5600 | )) { |
| | 5601 | 0 => try error_ptr_vi.value.move(isel, ty_op.operand), |
| | 5602 | else => |error_offset| { |
| | 5603 | const error_ptr_ra = try error_ptr_vi.value.defReg(isel) orelse break :unused; |
| | 5604 | const error_union_ptr_vi = try isel.use(ty_op.operand); |
| | 5605 | const error_union_ptr_mat = try error_union_ptr_vi.matReg(isel); |
| | 5606 | const lo12: u12 = @truncate(error_offset >> 0); |
| | 5607 | const hi12: u12 = @intCast(error_offset >> 12); |
| | 5608 | if (hi12 > 0) try isel.emit(.add( |
| | 5609 | error_ptr_ra.x(), |
| | 5610 | if (lo12 > 0) error_ptr_ra.x() else error_union_ptr_mat.ra.x(), |
| | 5611 | .{ .shifted_immediate = .{ .immediate = hi12, .lsl = .@"12" } }, |
| | 5612 | )); |
| | 5613 | if (lo12 > 0) try isel.emit(.add(error_ptr_ra.x(), error_union_ptr_mat.ra.x(), .{ .immediate = lo12 })); |
| | 5614 | try error_union_ptr_mat.finish(isel); |
| | 5615 | }, |
| | 5616 | } |
| | 5617 | } |
| | 5618 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5619 | }, |
| | 5620 | .errunion_payload_ptr_set => { |
| | 5621 | if (isel.live_values.fetchRemove(air.inst_index)) |payload_ptr_vi| unused: { |
| | 5622 | defer payload_ptr_vi.value.deref(isel); |
| 5168 | const ty_op = air.data(air.inst_index).ty_op; | 5623 | const ty_op = air.data(air.inst_index).ty_op; |
| 5169 | const error_union_ty = isel.air.typeOf(ty_op.operand, ip); | 5624 | const payload_ty = ty_op.ty.toType().childType(zcu); |
| 5170 | | 5625 | const error_union_ty = isel.air.typeOf(ty_op.operand, ip).childType(zcu); |
| 5171 | const error_union_vi = try isel.use(ty_op.operand); | 5626 | const error_set_size = error_union_ty.errorUnionSet(zcu).abiSize(zcu); |
| 5172 | var error_set_part_it = error_union_vi.field( | 5627 | const error_union_ptr_vi = try isel.use(ty_op.operand); |
| 5173 | error_union_ty, | 5628 | const error_union_ptr_mat = try error_union_ptr_vi.matReg(isel); |
| 5174 | codegen.errUnionErrorOffset(error_union_ty.errorUnionPayload(zcu), zcu), | 5629 | if (error_set_size > 0) try isel.storeReg( |
| 5175 | error_set_vi.value.size(isel), | 5630 | .zr, |
| | 5631 | error_set_size, |
| | 5632 | error_union_ptr_mat.ra, |
| | 5633 | codegen.errUnionErrorOffset(payload_ty, zcu), |
| 5176 | ); | 5634 | ); |
| 5177 | const error_set_part_vi = try error_set_part_it.only(isel); | 5635 | switch (codegen.errUnionPayloadOffset(payload_ty, zcu)) { |
| 5178 | try error_set_vi.value.copy(isel, ty_op.ty.toType(), error_set_part_vi.?); | 5636 | 0 => { |
| | 5637 | try error_union_ptr_mat.finish(isel); |
| | 5638 | try payload_ptr_vi.value.move(isel, ty_op.operand); |
| | 5639 | }, |
| | 5640 | else => |payload_offset| { |
| | 5641 | const payload_ptr_ra = try payload_ptr_vi.value.defReg(isel) orelse break :unused; |
| | 5642 | const lo12: u12 = @truncate(payload_offset >> 0); |
| | 5643 | const hi12: u12 = @intCast(payload_offset >> 12); |
| | 5644 | if (hi12 > 0) try isel.emit(.add( |
| | 5645 | payload_ptr_ra.x(), |
| | 5646 | if (lo12 > 0) payload_ptr_ra.x() else error_union_ptr_mat.ra.x(), |
| | 5647 | .{ .shifted_immediate = .{ .immediate = hi12, .lsl = .@"12" } }, |
| | 5648 | )); |
| | 5649 | if (lo12 > 0) try isel.emit(.add(payload_ptr_ra.x(), error_union_ptr_mat.ra.x(), .{ .immediate = lo12 })); |
| | 5650 | try error_union_ptr_mat.finish(isel); |
| | 5651 | }, |
| | 5652 | } |
| 5179 | } | 5653 | } |
| 5180 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5654 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5181 | }, | 5655 | }, |
| ... | @@ -5365,6 +5839,32 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5365,6 +5839,32 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5365 | } | 5839 | } |
| 5366 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 5840 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 5367 | }, | 5841 | }, |
| | 5842 | .set_union_tag => { |
| | 5843 | const bin_op = air.data(air.inst_index).bin_op; |
| | 5844 | const union_ty = isel.air.typeOf(bin_op.lhs, ip).childType(zcu); |
| | 5845 | const union_layout = union_ty.unionGetLayout(zcu); |
| | 5846 | const tag_vi = try isel.use(bin_op.rhs); |
| | 5847 | const union_ptr_vi = try isel.use(bin_op.lhs); |
| | 5848 | const union_ptr_mat = try union_ptr_vi.matReg(isel); |
| | 5849 | try tag_vi.store(isel, isel.air.typeOf(bin_op.rhs, ip), union_ptr_mat.ra, .{ |
| | 5850 | .offset = union_layout.tagOffset(), |
| | 5851 | }); |
| | 5852 | try union_ptr_mat.finish(isel); |
| | 5853 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5854 | }, |
| | 5855 | .get_union_tag => { |
| | 5856 | if (isel.live_values.fetchRemove(air.inst_index)) |tag_vi| { |
| | 5857 | defer tag_vi.value.deref(isel); |
| | 5858 | const ty_op = air.data(air.inst_index).ty_op; |
| | 5859 | const union_ty = isel.air.typeOf(ty_op.operand, ip); |
| | 5860 | const union_layout = union_ty.unionGetLayout(zcu); |
| | 5861 | const union_vi = try isel.use(ty_op.operand); |
| | 5862 | var tag_part_it = union_vi.field(union_ty, union_layout.tagOffset(), union_layout.tag_size); |
| | 5863 | const tag_part_vi = try tag_part_it.only(isel); |
| | 5864 | try tag_vi.value.copy(isel, ty_op.ty.toType(), tag_part_vi.?); |
| | 5865 | } |
| | 5866 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 5867 | }, |
| 5368 | .slice => { | 5868 | .slice => { |
| 5369 | if (isel.live_values.fetchRemove(air.inst_index)) |slice_vi| { | 5869 | if (isel.live_values.fetchRemove(air.inst_index)) |slice_vi| { |
| 5370 | defer slice_vi.value.deref(isel); | 5870 | defer slice_vi.value.deref(isel); |
| ... | @@ -5781,7 +6281,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5781,7 +6281,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5781 | | 6281 | |
| 5782 | try call.prepareCallee(isel); | 6282 | try call.prepareCallee(isel); |
| 5783 | try isel.global_relocs.append(gpa, .{ | 6283 | try isel.global_relocs.append(gpa, .{ |
| 5784 | .global = switch (dst_int_info.bits) { | 6284 | .name = switch (dst_int_info.bits) { |
| 5785 | else => unreachable, | 6285 | else => unreachable, |
| 5786 | 1...32 => switch (dst_int_info.signedness) { | 6286 | 1...32 => switch (dst_int_info.signedness) { |
| 5787 | .signed => switch (src_bits) { | 6287 | .signed => switch (src_bits) { |
| ... | @@ -5921,7 +6421,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -5921,7 +6421,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 5921 | | 6421 | |
| 5922 | try call.prepareCallee(isel); | 6422 | try call.prepareCallee(isel); |
| 5923 | try isel.global_relocs.append(gpa, .{ | 6423 | try isel.global_relocs.append(gpa, .{ |
| 5924 | .global = switch (src_int_info.bits) { | 6424 | .name = switch (src_int_info.bits) { |
| 5925 | else => unreachable, | 6425 | else => unreachable, |
| 5926 | 1...32 => switch (src_int_info.signedness) { | 6426 | 1...32 => switch (src_int_info.signedness) { |
| 5927 | .signed => switch (dst_bits) { | 6427 | .signed => switch (dst_bits) { |
| ... | @@ -6004,14 +6504,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6004,14 +6504,20 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6004 | } | 6504 | } |
| 6005 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 6505 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 6006 | }, | 6506 | }, |
| 6007 | .memset => |air_tag| { | 6507 | .memset, .memset_safe => |air_tag| { |
| 6008 | const bin_op = air.data(air.inst_index).bin_op; | 6508 | const bin_op = air.data(air.inst_index).bin_op; |
| 6009 | const dst_ty = isel.air.typeOf(bin_op.lhs, ip); | 6509 | const dst_ty = isel.air.typeOf(bin_op.lhs, ip); |
| 6010 | const dst_info = dst_ty.ptrInfo(zcu); | 6510 | const dst_info = dst_ty.ptrInfo(zcu); |
| 6011 | const fill_byte: union(enum) { constant: u8, value: Air.Inst.Ref } = fill_byte: { | 6511 | const fill_byte: union(enum) { constant: u8, value: Air.Inst.Ref } = fill_byte: { |
| 6012 | if (bin_op.rhs.toInterned()) |fill_val| | 6512 | if (bin_op.rhs.toInterned()) |fill_val| { |
| | 6513 | if (ip.isUndef(fill_val)) switch (air_tag) { |
| | 6514 | else => unreachable, |
| | 6515 | .memset => break :air_tag if (air.next()) |next_air_tag| continue :air_tag next_air_tag, |
| | 6516 | .memset_safe => break :fill_byte .{ .constant = 0xaa }, |
| | 6517 | }; |
| 6013 | if (try isel.hasRepeatedByteRepr(.fromInterned(fill_val))) |fill_byte| | 6518 | if (try isel.hasRepeatedByteRepr(.fromInterned(fill_val))) |fill_byte| |
| 6014 | break :fill_byte .{ .constant = fill_byte }; | 6519 | break :fill_byte .{ .constant = fill_byte }; |
| | 6520 | } |
| 6015 | switch (dst_ty.elemType2(zcu).abiSize(zcu)) { | 6521 | switch (dst_ty.elemType2(zcu).abiSize(zcu)) { |
| 6016 | 0 => unreachable, | 6522 | 0 => unreachable, |
| 6017 | 1 => break :fill_byte .{ .value = bin_op.rhs }, | 6523 | 1 => break :fill_byte .{ .value = bin_op.rhs }, |
| ... | @@ -6070,8 +6576,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6070,8 +6576,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6070 | .c => unreachable, | 6576 | .c => unreachable, |
| 6071 | } | 6577 | } |
| 6072 | | 6578 | |
| 6073 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 6579 | break :air_tag if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 6074 | break :air_tag; | | |
| 6075 | }, | 6580 | }, |
| 6076 | else => return isel.fail("too big {s} {f}", .{ @tagName(air_tag), isel.fmtType(dst_ty) }), | 6581 | else => return isel.fail("too big {s} {f}", .{ @tagName(air_tag), isel.fmtType(dst_ty) }), |
| 6077 | } | 6582 | } |
| ... | @@ -6082,7 +6587,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6082,7 +6587,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6082 | | 6587 | |
| 6083 | try call.prepareCallee(isel); | 6588 | try call.prepareCallee(isel); |
| 6084 | try isel.global_relocs.append(gpa, .{ | 6589 | try isel.global_relocs.append(gpa, .{ |
| 6085 | .global = "memset", | 6590 | .name = "memset", |
| 6086 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 6591 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6087 | }); | 6592 | }); |
| 6088 | try isel.emit(.bl(0)); | 6593 | try isel.emit(.bl(0)); |
| ... | @@ -6128,7 +6633,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6128,7 +6633,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6128 | | 6633 | |
| 6129 | try call.prepareCallee(isel); | 6634 | try call.prepareCallee(isel); |
| 6130 | try isel.global_relocs.append(gpa, .{ | 6635 | try isel.global_relocs.append(gpa, .{ |
| 6131 | .global = @tagName(air_tag), | 6636 | .name = @tagName(air_tag), |
| 6132 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 6637 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6133 | }); | 6638 | }); |
| 6134 | try isel.emit(.bl(0)); | 6639 | try isel.emit(.bl(0)); |
| ... | @@ -6217,6 +6722,72 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6217,6 +6722,72 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6217 | | 6722 | |
| 6218 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 6723 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 6219 | }, | 6724 | }, |
| | 6725 | .error_name => { |
| | 6726 | if (isel.live_values.fetchRemove(air.inst_index)) |name_vi| unused: { |
| | 6727 | defer name_vi.value.deref(isel); |
| | 6728 | var ptr_part_it = name_vi.value.field(.slice_const_u8_sentinel_0, 0, 8); |
| | 6729 | const ptr_part_vi = try ptr_part_it.only(isel); |
| | 6730 | const ptr_part_ra = try ptr_part_vi.?.defReg(isel); |
| | 6731 | var len_part_it = name_vi.value.field(.slice_const_u8_sentinel_0, 8, 8); |
| | 6732 | const len_part_vi = try len_part_it.only(isel); |
| | 6733 | const len_part_ra = try len_part_vi.?.defReg(isel); |
| | 6734 | if (ptr_part_ra == null and len_part_ra == null) break :unused; |
| | 6735 | |
| | 6736 | const un_op = air.data(air.inst_index).un_op; |
| | 6737 | const error_vi = try isel.use(un_op); |
| | 6738 | const error_mat = try error_vi.matReg(isel); |
| | 6739 | const ptr_ra = try isel.allocIntReg(); |
| | 6740 | defer isel.freeReg(ptr_ra); |
| | 6741 | const start_ra, const end_ra = range_ras: { |
| | 6742 | const name_lock: RegLock = if (len_part_ra != null) if (ptr_part_ra) |name_ptr_ra| |
| | 6743 | isel.tryLockReg(name_ptr_ra) |
| | 6744 | else |
| | 6745 | .empty else .empty; |
| | 6746 | defer name_lock.unlock(isel); |
| | 6747 | break :range_ras .{ try isel.allocIntReg(), try isel.allocIntReg() }; |
| | 6748 | }; |
| | 6749 | defer { |
| | 6750 | isel.freeReg(start_ra); |
| | 6751 | isel.freeReg(end_ra); |
| | 6752 | } |
| | 6753 | if (len_part_ra) |name_len_ra| try isel.emit(.sub( |
| | 6754 | name_len_ra.w(), |
| | 6755 | end_ra.w(), |
| | 6756 | .{ .register = start_ra.w() }, |
| | 6757 | )); |
| | 6758 | if (ptr_part_ra) |name_ptr_ra| try isel.emit(.add( |
| | 6759 | name_ptr_ra.x(), |
| | 6760 | ptr_ra.x(), |
| | 6761 | .{ .extended_register = .{ |
| | 6762 | .register = start_ra.w(), |
| | 6763 | .extend = .{ .uxtw = 0 }, |
| | 6764 | } }, |
| | 6765 | )); |
| | 6766 | if (len_part_ra) |_| try isel.emit(.sub(end_ra.w(), end_ra.w(), .{ .immediate = 1 })); |
| | 6767 | try isel.emit(.ldp(start_ra.w(), end_ra.w(), .{ .base = start_ra.x() })); |
| | 6768 | try isel.emit(.add(start_ra.x(), ptr_ra.x(), .{ .extended_register = .{ |
| | 6769 | .register = error_mat.ra.w(), |
| | 6770 | .extend = switch (zcu.errorSetBits()) { |
| | 6771 | else => unreachable, |
| | 6772 | 1...8 => .{ .uxtb = 2 }, |
| | 6773 | 9...16 => .{ .uxth = 2 }, |
| | 6774 | 17...32 => .{ .uxtw = 2 }, |
| | 6775 | }, |
| | 6776 | } })); |
| | 6777 | try isel.lazy_relocs.append(gpa, .{ |
| | 6778 | .symbol = .{ .kind = .const_data, .ty = .anyerror_type }, |
| | 6779 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| | 6780 | }); |
| | 6781 | try isel.emit(.add(ptr_ra.x(), ptr_ra.x(), .{ .immediate = 0 })); |
| | 6782 | try isel.lazy_relocs.append(gpa, .{ |
| | 6783 | .symbol = .{ .kind = .const_data, .ty = .anyerror_type }, |
| | 6784 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| | 6785 | }); |
| | 6786 | try isel.emit(.adrp(ptr_ra.x(), 0)); |
| | 6787 | try error_mat.finish(isel); |
| | 6788 | } |
| | 6789 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 6790 | }, |
| 6220 | .aggregate_init => { | 6791 | .aggregate_init => { |
| 6221 | if (isel.live_values.fetchRemove(air.inst_index)) |agg_vi| { | 6792 | if (isel.live_values.fetchRemove(air.inst_index)) |agg_vi| { |
| 6222 | defer agg_vi.value.deref(isel); | 6793 | defer agg_vi.value.deref(isel); |
| ... | @@ -6311,7 +6882,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6311,7 +6882,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6311 | | 6882 | |
| 6312 | try call.prepareCallee(isel); | 6883 | try call.prepareCallee(isel); |
| 6313 | try isel.global_relocs.append(gpa, .{ | 6884 | try isel.global_relocs.append(gpa, .{ |
| 6314 | .global = "memcpy", | 6885 | .name = "memcpy", |
| 6315 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 6886 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6316 | }); | 6887 | }); |
| 6317 | try isel.emit(.bl(0)); | 6888 | try isel.emit(.bl(0)); |
| ... | @@ -6427,7 +6998,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6427,7 +6998,7 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6427 | | 6998 | |
| 6428 | try call.prepareCallee(isel); | 6999 | try call.prepareCallee(isel); |
| 6429 | try isel.global_relocs.append(gpa, .{ | 7000 | try isel.global_relocs.append(gpa, .{ |
| 6430 | .global = switch (bits) { | 7001 | .name = switch (bits) { |
| 6431 | else => unreachable, | 7002 | else => unreachable, |
| 6432 | 16 => "__fmah", | 7003 | 16 => "__fmah", |
| 6433 | 32 => "fmaf", | 7004 | 32 => "fmaf", |
| ... | @@ -6508,6 +7079,32 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6508,6 +7079,32 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6508 | } | 7079 | } |
| 6509 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 7080 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 6510 | }, | 7081 | }, |
| | 7082 | .cmp_lt_errors_len => { |
| | 7083 | if (isel.live_values.fetchRemove(air.inst_index)) |is_vi| unused: { |
| | 7084 | defer is_vi.value.deref(isel); |
| | 7085 | const is_ra = try is_vi.value.defReg(isel) orelse break :unused; |
| | 7086 | try isel.emit(.csinc(is_ra.w(), .wzr, .wzr, .invert(.ls))); |
| | 7087 | |
| | 7088 | const un_op = air.data(air.inst_index).un_op; |
| | 7089 | const error_vi = try isel.use(un_op); |
| | 7090 | const error_mat = try error_vi.matReg(isel); |
| | 7091 | const ptr_ra = try isel.allocIntReg(); |
| | 7092 | defer isel.freeReg(ptr_ra); |
| | 7093 | try isel.emit(.subs(.wzr, error_mat.ra.w(), .{ .register = ptr_ra.w() })); |
| | 7094 | try isel.lazy_relocs.append(gpa, .{ |
| | 7095 | .symbol = .{ .kind = .const_data, .ty = .anyerror_type }, |
| | 7096 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| | 7097 | }); |
| | 7098 | try isel.emit(.ldr(ptr_ra.w(), .{ .base = ptr_ra.x() })); |
| | 7099 | try isel.lazy_relocs.append(gpa, .{ |
| | 7100 | .symbol = .{ .kind = .const_data, .ty = .anyerror_type }, |
| | 7101 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| | 7102 | }); |
| | 7103 | try isel.emit(.adrp(ptr_ra.x(), 0)); |
| | 7104 | try error_mat.finish(isel); |
| | 7105 | } |
| | 7106 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| | 7107 | }, |
| 6511 | .runtime_nav_ptr => { | 7108 | .runtime_nav_ptr => { |
| 6512 | if (isel.live_values.fetchRemove(air.inst_index)) |ptr_vi| unused: { | 7109 | if (isel.live_values.fetchRemove(air.inst_index)) |ptr_vi| unused: { |
| 6513 | defer ptr_vi.value.deref(isel); | 7110 | defer ptr_vi.value.deref(isel); |
| ... | @@ -6516,19 +7113,19 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6516,19 +7113,19 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6516 | const ty_nav = air.data(air.inst_index).ty_nav; | 7113 | const ty_nav = air.data(air.inst_index).ty_nav; |
| 6517 | if (ZigType.fromInterned(ip.getNav(ty_nav.nav).typeOf(ip)).isFnOrHasRuntimeBits(zcu)) switch (true) { | 7114 | if (ZigType.fromInterned(ip.getNav(ty_nav.nav).typeOf(ip)).isFnOrHasRuntimeBits(zcu)) switch (true) { |
| 6518 | false => { | 7115 | false => { |
| 6519 | try isel.nav_relocs.append(zcu.gpa, .{ | 7116 | try isel.nav_relocs.append(gpa, .{ |
| 6520 | .nav = ty_nav.nav, | 7117 | .nav = ty_nav.nav, |
| 6521 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 7118 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6522 | }); | 7119 | }); |
| 6523 | try isel.emit(.adr(ptr_ra.x(), 0)); | 7120 | try isel.emit(.adr(ptr_ra.x(), 0)); |
| 6524 | }, | 7121 | }, |
| 6525 | true => { | 7122 | true => { |
| 6526 | try isel.nav_relocs.append(zcu.gpa, .{ | 7123 | try isel.nav_relocs.append(gpa, .{ |
| 6527 | .nav = ty_nav.nav, | 7124 | .nav = ty_nav.nav, |
| 6528 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 7125 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6529 | }); | 7126 | }); |
| 6530 | try isel.emit(.add(ptr_ra.x(), ptr_ra.x(), .{ .immediate = 0 })); | 7127 | try isel.emit(.add(ptr_ra.x(), ptr_ra.x(), .{ .immediate = 0 })); |
| 6531 | try isel.nav_relocs.append(zcu.gpa, .{ | 7128 | try isel.nav_relocs.append(gpa, .{ |
| 6532 | .nav = ty_nav.nav, | 7129 | .nav = ty_nav.nav, |
| 6533 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, | 7130 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| 6534 | }); | 7131 | }); |
| ... | @@ -6538,9 +7135,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { | ... | @@ -6538,9 +7135,6 @@ pub fn body(isel: *Select, air_body: []const Air.Inst.Index) !void { |
| 6538 | } | 7135 | } |
| 6539 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; | 7136 | if (air.next()) |next_air_tag| continue :air_tag next_air_tag; |
| 6540 | }, | 7137 | }, |
| 6541 | .add_safe, | | |
| 6542 | .sub_safe, | | |
| 6543 | .mul_safe, | | |
| 6544 | .inferred_alloc, | 7138 | .inferred_alloc, |
| 6545 | .inferred_alloc_comptime, | 7139 | .inferred_alloc_comptime, |
| 6546 | .int_from_float_safe, | 7140 | .int_from_float_safe, |
| ... | @@ -6642,8 +7236,8 @@ pub fn layout( | ... | @@ -6642,8 +7236,8 @@ pub fn layout( |
| 6642 | wip_mir_log.debug("{f}<body>:\n", .{nav.fqn.fmt(ip)}); | 7236 | wip_mir_log.debug("{f}<body>:\n", .{nav.fqn.fmt(ip)}); |
| 6643 | | 7237 | |
| 6644 | const stack_size: u24 = @intCast(InternPool.Alignment.@"16".forward(isel.stack_size)); | 7238 | const stack_size: u24 = @intCast(InternPool.Alignment.@"16".forward(isel.stack_size)); |
| 6645 | const stack_size_low: u12 = @truncate(stack_size >> 0); | 7239 | const stack_size_lo: u12 = @truncate(stack_size >> 0); |
| 6646 | const stack_size_high: u12 = @truncate(stack_size >> 12); | 7240 | const stack_size_hi: u12 = @truncate(stack_size >> 12); |
| 6647 | | 7241 | |
| 6648 | var saves_buf: [10 + 8 + 8 + 2 + 8]struct { | 7242 | var saves_buf: [10 + 8 + 8 + 2 + 8]struct { |
| 6649 | class: enum { integer, vector }, | 7243 | class: enum { integer, vector }, |
| ... | @@ -6771,6 +7365,9 @@ pub fn layout( | ... | @@ -6771,6 +7365,9 @@ pub fn layout( |
| 6771 | saves_len += 1; | 7365 | saves_len += 1; |
| 6772 | saves_size += 8; | 7366 | saves_size += 8; |
| 6773 | deferred_gr = null; | 7367 | deferred_gr = null; |
| | 7368 | } else switch (@as(u1, @truncate(saved_gra_len))) { |
| | 7369 | 0 => {}, |
| | 7370 | 1 => saves_size += 8, |
| 6774 | } | 7371 | } |
| 6775 | save_ra = if (mod.strip) incoming.ngrn else CallAbiIterator.ngrn_start; | 7372 | save_ra = if (mod.strip) incoming.ngrn else CallAbiIterator.ngrn_start; |
| 6776 | while (save_ra != if (have_va) CallAbiIterator.ngrn_end else incoming.ngrn) : (save_ra = @enumFromInt(@intFromEnum(save_ra) + 1)) { | 7373 | while (save_ra != if (have_va) CallAbiIterator.ngrn_end else incoming.ngrn) : (save_ra = @enumFromInt(@intFromEnum(save_ra) + 1)) { |
| ... | @@ -6793,65 +7390,90 @@ pub fn layout( | ... | @@ -6793,65 +7390,90 @@ pub fn layout( |
| 6793 | { | 7390 | { |
| 6794 | wip_mir_log.debug("{f}<prologue>:", .{nav.fqn.fmt(ip)}); | 7391 | wip_mir_log.debug("{f}<prologue>:", .{nav.fqn.fmt(ip)}); |
| 6795 | var save_index: usize = 0; | 7392 | var save_index: usize = 0; |
| 6796 | while (save_index < saves.len) { | 7393 | while (save_index < saves.len) if (save_index + 2 <= saves.len and |
| 6797 | if (save_index + 2 <= saves.len and saves[save_index + 0].class == saves[save_index + 1].class and | 7394 | saves[save_index + 0].class == saves[save_index + 1].class and |
| 6798 | saves[save_index + 0].offset + saves[save_index + 0].size == saves[save_index + 1].offset) | 7395 | saves[save_index + 0].size == saves[save_index + 1].size and |
| 6799 | { | 7396 | saves[save_index + 0].offset + saves[save_index + 0].size == saves[save_index + 1].offset) |
| 6800 | try isel.emit(.stp( | 7397 | { |
| 6801 | saves[save_index + 0].register, | 7398 | try isel.emit(.stp( |
| 6802 | saves[save_index + 1].register, | 7399 | saves[save_index + 0].register, |
| 6803 | switch (saves[save_index + 0].offset) { | 7400 | saves[save_index + 1].register, |
| 6804 | 0 => .{ .pre_index = .{ | 7401 | switch (saves[save_index + 0].offset) { |
| 6805 | .base = .sp, | 7402 | 0 => .{ .pre_index = .{ |
| 6806 | .index = @intCast(-@as(i11, saves_size)), | 7403 | .base = .sp, |
| 6807 | } }, | 7404 | .index = @intCast(-@as(i11, saves_size)), |
| 6808 | else => |offset| .{ .signed_offset = .{ | 7405 | } }, |
| 6809 | .base = .sp, | 7406 | else => |offset| .{ .signed_offset = .{ |
| 6810 | .offset = @intCast(offset), | 7407 | .base = .sp, |
| 6811 | } }, | 7408 | .offset = @intCast(offset), |
| 6812 | }, | 7409 | } }, |
| 6813 | )); | 7410 | }, |
| 6814 | save_index += 2; | 7411 | )); |
| 6815 | } else { | 7412 | save_index += 2; |
| 6816 | try isel.emit(.str( | 7413 | } else { |
| 6817 | saves[save_index].register, | 7414 | try isel.emit(.str( |
| 6818 | switch (saves[save_index].offset) { | 7415 | saves[save_index].register, |
| 6819 | 0 => .{ .pre_index = .{ | 7416 | switch (saves[save_index].offset) { |
| 6820 | .base = .sp, | 7417 | 0 => .{ .pre_index = .{ |
| 6821 | .index = @intCast(-@as(i11, saves_size)), | 7418 | .base = .sp, |
| 6822 | } }, | 7419 | .index = @intCast(-@as(i11, saves_size)), |
| 6823 | else => |offset| .{ .unsigned_offset = .{ | 7420 | } }, |
| 6824 | .base = .sp, | 7421 | else => |offset| .{ .unsigned_offset = .{ |
| 6825 | .offset = @intCast(offset), | 7422 | .base = .sp, |
| 6826 | } }, | 7423 | .offset = @intCast(offset), |
| 6827 | }, | 7424 | } }, |
| 6828 | )); | 7425 | }, |
| 6829 | save_index += 1; | 7426 | )); |
| 6830 | } | 7427 | save_index += 1; |
| 6831 | } | 7428 | }; |
| 6832 | | 7429 | |
| | 7430 | try isel.emit(.add(.fp, .sp, .{ .immediate = frame_record_offset })); |
| 6833 | const scratch_reg: Register = if (isel.stack_align == .@"16") | 7431 | const scratch_reg: Register = if (isel.stack_align == .@"16") |
| 6834 | .sp | 7432 | .sp |
| 6835 | else if (stack_size == 0) | 7433 | else if (stack_size == 0 and frame_record_offset == 0) |
| 6836 | .fp | 7434 | .fp |
| 6837 | else | 7435 | else |
| 6838 | .x9; | 7436 | .ip0; |
| 6839 | try isel.emit(.add(.fp, .sp, .{ .immediate = frame_record_offset })); | 7437 | if (mod.stack_check) { |
| 6840 | if (stack_size_high > 0) try isel.emit(.sub(scratch_reg, .sp, .{ | 7438 | if (stack_size_hi > 2) { |
| 6841 | .shifted_immediate = .{ .immediate = stack_size_high, .lsl = .@"12" }, | 7439 | try isel.movImmediate(.ip1, stack_size_hi); |
| 6842 | })); | 7440 | const loop_label = isel.instructions.items.len; |
| 6843 | if (stack_size_low > 0) try isel.emit(.sub( | 7441 | try isel.emit(.sub(.sp, .sp, .{ |
| 6844 | scratch_reg, | 7442 | .shifted_immediate = .{ .immediate = 1, .lsl = .@"12" }, |
| 6845 | if (stack_size_high > 0) scratch_reg else .sp, | 7443 | })); |
| 6846 | .{ .immediate = stack_size_low }, | 7444 | try isel.emit(.sub(.ip1, .ip1, .{ .immediate = 1 })); |
| 6847 | )); | 7445 | try isel.emit(.ldr(.xzr, .{ .base = .sp })); |
| 6848 | if (isel.stack_align != .@"16") { | 7446 | try isel.emit(.cbnz(.ip1, -@as(i21, @intCast( |
| 6849 | try isel.emit(.@"and"(.sp, scratch_reg, .{ .immediate = .{ | 7447 | (isel.instructions.items.len - loop_label) << 2, |
| 6850 | .N = .doubleword, | 7448 | )))); |
| 6851 | .immr = -%isel.stack_align.toLog2Units(), | 7449 | } else for (0..stack_size_hi) |_| { |
| 6852 | .imms = ~isel.stack_align.toLog2Units(), | 7450 | try isel.emit(.sub(.sp, .sp, .{ |
| 6853 | } })); | 7451 | .shifted_immediate = .{ .immediate = 1, .lsl = .@"12" }, |
| | 7452 | })); |
| | 7453 | try isel.emit(.ldr(.xzr, .{ .base = .sp })); |
| | 7454 | } |
| | 7455 | if (stack_size_lo > 0) try isel.emit(.sub( |
| | 7456 | scratch_reg, |
| | 7457 | .sp, |
| | 7458 | .{ .immediate = stack_size_lo }, |
| | 7459 | )) else if (scratch_reg.alias == Register.Alias.ip0) |
| | 7460 | try isel.emit(.add(scratch_reg, .sp, .{ .immediate = 0 })); |
| | 7461 | } else { |
| | 7462 | if (stack_size_hi > 0) try isel.emit(.sub(scratch_reg, .sp, .{ |
| | 7463 | .shifted_immediate = .{ .immediate = stack_size_hi, .lsl = .@"12" }, |
| | 7464 | })); |
| | 7465 | if (stack_size_lo > 0) try isel.emit(.sub( |
| | 7466 | scratch_reg, |
| | 7467 | if (stack_size_hi > 0) scratch_reg else .sp, |
| | 7468 | .{ .immediate = stack_size_lo }, |
| | 7469 | )) else if (scratch_reg.alias == Register.Alias.ip0 and stack_size_hi == 0) |
| | 7470 | try isel.emit(.add(scratch_reg, .sp, .{ .immediate = 0 })); |
| 6854 | } | 7471 | } |
| | 7472 | if (isel.stack_align != .@"16") try isel.emit(.@"and"(.sp, scratch_reg, .{ .immediate = .{ |
| | 7473 | .N = .doubleword, |
| | 7474 | .immr = -%isel.stack_align.toLog2Units(), |
| | 7475 | .imms = ~isel.stack_align.toLog2Units(), |
| | 7476 | } })); |
| 6855 | wip_mir_log.debug("", .{}); | 7477 | wip_mir_log.debug("", .{}); |
| 6856 | } | 7478 | } |
| 6857 | | 7479 | |
| ... | @@ -6896,17 +7518,17 @@ pub fn layout( | ... | @@ -6896,17 +7518,17 @@ pub fn layout( |
| 6896 | save_index += 1; | 7518 | save_index += 1; |
| 6897 | } else save_index += 1; | 7519 | } else save_index += 1; |
| 6898 | } | 7520 | } |
| 6899 | if (isel.stack_align != .@"16" or (stack_size_low > 0 and stack_size_high > 0)) { | 7521 | if (isel.stack_align != .@"16" or (stack_size_lo > 0 and stack_size_hi > 0)) { |
| 6900 | try isel.emit(switch (frame_record_offset) { | 7522 | try isel.emit(switch (frame_record_offset) { |
| 6901 | 0 => .add(.sp, .fp, .{ .immediate = 0 }), | 7523 | 0 => .add(.sp, .fp, .{ .immediate = 0 }), |
| 6902 | else => |offset| .sub(.sp, .fp, .{ .immediate = offset }), | 7524 | else => |offset| .sub(.sp, .fp, .{ .immediate = offset }), |
| 6903 | }); | 7525 | }); |
| 6904 | } else { | 7526 | } else { |
| 6905 | if (stack_size_high > 0) try isel.emit(.add(.sp, .sp, .{ | 7527 | if (stack_size_hi > 0) try isel.emit(.add(.sp, .sp, .{ |
| 6906 | .shifted_immediate = .{ .immediate = stack_size_high, .lsl = .@"12" }, | 7528 | .shifted_immediate = .{ .immediate = stack_size_hi, .lsl = .@"12" }, |
| 6907 | })); | 7529 | })); |
| 6908 | if (stack_size_low > 0) try isel.emit(.add(.sp, .sp, .{ | 7530 | if (stack_size_lo > 0) try isel.emit(.add(.sp, .sp, .{ |
| 6909 | .immediate = stack_size_low, | 7531 | .immediate = stack_size_lo, |
| 6910 | })); | 7532 | })); |
| 6911 | } | 7533 | } |
| 6912 | wip_mir_log.debug("{f}<epilogue>:\n", .{nav.fqn.fmt(ip)}); | 7534 | wip_mir_log.debug("{f}<epilogue>:\n", .{nav.fqn.fmt(ip)}); |
| ... | @@ -6977,11 +7599,43 @@ fn fmtConstant(isel: *Select, constant: Constant) @typeInfo(@TypeOf(Constant.fmt | ... | @@ -6977,11 +7599,43 @@ fn fmtConstant(isel: *Select, constant: Constant) @typeInfo(@TypeOf(Constant.fmt |
| 6977 | return constant.fmtValue(isel.pt); | 7599 | return constant.fmtValue(isel.pt); |
| 6978 | } | 7600 | } |
| 6979 | | 7601 | |
| | 7602 | fn block( |
| | 7603 | isel: *Select, |
| | 7604 | air_inst_index: Air.Inst.Index, |
| | 7605 | res_ty: ZigType, |
| | 7606 | air_body: []const Air.Inst.Index, |
| | 7607 | ) !void { |
| | 7608 | if (res_ty.toIntern() != .noreturn_type) { |
| | 7609 | isel.blocks.putAssumeCapacityNoClobber(air_inst_index, .{ |
| | 7610 | .live_registers = isel.live_registers, |
| | 7611 | .target_label = @intCast(isel.instructions.items.len), |
| | 7612 | }); |
| | 7613 | } |
| | 7614 | try isel.body(air_body); |
| | 7615 | if (res_ty.toIntern() != .noreturn_type) { |
| | 7616 | const block_entry = isel.blocks.pop().?; |
| | 7617 | assert(block_entry.key == air_inst_index); |
| | 7618 | if (isel.live_values.fetchRemove(air_inst_index)) |result_vi| result_vi.value.deref(isel); |
| | 7619 | } |
| | 7620 | } |
| | 7621 | |
| 6980 | fn emit(isel: *Select, instruction: codegen.aarch64.encoding.Instruction) !void { | 7622 | fn emit(isel: *Select, instruction: codegen.aarch64.encoding.Instruction) !void { |
| 6981 | wip_mir_log.debug(" | {f}", .{instruction}); | 7623 | wip_mir_log.debug(" | {f}", .{instruction}); |
| 6982 | try isel.instructions.append(isel.pt.zcu.gpa, instruction); | 7624 | try isel.instructions.append(isel.pt.zcu.gpa, instruction); |
| 6983 | } | 7625 | } |
| 6984 | | 7626 | |
| | 7627 | fn emitPanic(isel: *Select, panic_id: Zcu.SimplePanicId) !void { |
| | 7628 | const zcu = isel.pt.zcu; |
| | 7629 | try isel.nav_relocs.append(zcu.gpa, .{ |
| | 7630 | .nav = switch (zcu.intern_pool.indexToKey(zcu.builtin_decl_values.get(panic_id.toBuiltin()))) { |
| | 7631 | else => unreachable, |
| | 7632 | inline .@"extern", .func => |func| func.owner_nav, |
| | 7633 | }, |
| | 7634 | .reloc = .{ .label = @intCast(isel.instructions.items.len) }, |
| | 7635 | }); |
| | 7636 | try isel.emit(.bl(0)); |
| | 7637 | } |
| | 7638 | |
| 6985 | fn emitLiteral(isel: *Select, bytes: []const u8) !void { | 7639 | fn emitLiteral(isel: *Select, bytes: []const u8) !void { |
| 6986 | const words: []align(1) const u32 = @ptrCast(bytes); | 7640 | const words: []align(1) const u32 = @ptrCast(bytes); |
| 6987 | const literals = try isel.literals.addManyAsSlice(isel.pt.zcu.gpa, words.len); | 7641 | const literals = try isel.literals.addManyAsSlice(isel.pt.zcu.gpa, words.len); |
| ... | @@ -8028,6 +8682,32 @@ pub const Value = struct { | ... | @@ -8028,6 +8682,32 @@ pub const Value = struct { |
| 8028 | } | 8682 | } |
| 8029 | } | 8683 | } |
| 8030 | | 8684 | |
| | 8685 | const AddOrSubtractOptions = struct { |
| | 8686 | overflow: Overflow, |
| | 8687 | |
| | 8688 | const Overflow = union(enum) { |
| | 8689 | @"unreachable", |
| | 8690 | panic: Zcu.SimplePanicId, |
| | 8691 | wrap, |
| | 8692 | ra: Register.Alias, |
| | 8693 | |
| | 8694 | fn defCond(overflow: Overflow, isel: *Select, cond: codegen.aarch64.encoding.ConditionCode) !void { |
| | 8695 | switch (overflow) { |
| | 8696 | .@"unreachable" => unreachable, |
| | 8697 | .panic => |panic_id| { |
| | 8698 | const skip_label = isel.instructions.items.len; |
| | 8699 | try isel.emitPanic(panic_id); |
| | 8700 | try isel.emit(.@"b."( |
| | 8701 | cond.invert(), |
| | 8702 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 8703 | )); |
| | 8704 | }, |
| | 8705 | .wrap => {}, |
| | 8706 | .ra => |overflow_ra| try isel.emit(.csinc(overflow_ra.w(), .wzr, .wzr, cond.invert())), |
| | 8707 | } |
| | 8708 | } |
| | 8709 | }; |
| | 8710 | }; |
| 8031 | fn addOrSubtract( | 8711 | fn addOrSubtract( |
| 8032 | res_vi: Value.Index, | 8712 | res_vi: Value.Index, |
| 8033 | isel: *Select, | 8713 | isel: *Select, |
| ... | @@ -8035,19 +8715,21 @@ pub const Value = struct { | ... | @@ -8035,19 +8715,21 @@ pub const Value = struct { |
| 8035 | lhs_vi: Value.Index, | 8715 | lhs_vi: Value.Index, |
| 8036 | op: codegen.aarch64.encoding.Instruction.AddSubtractOp, | 8716 | op: codegen.aarch64.encoding.Instruction.AddSubtractOp, |
| 8037 | rhs_vi: Value.Index, | 8717 | rhs_vi: Value.Index, |
| 8038 | opts: struct { | 8718 | opts: AddOrSubtractOptions, |
| 8039 | wrap: bool, | | |
| 8040 | overflow_ra: Register.Alias = .zr, | | |
| 8041 | }, | | |
| 8042 | ) !void { | 8719 | ) !void { |
| 8043 | assert(opts.wrap or opts.overflow_ra == .zr); | | |
| 8044 | const zcu = isel.pt.zcu; | 8720 | const zcu = isel.pt.zcu; |
| 8045 | if (!ty.isAbiInt(zcu)) return isel.fail("bad {s} {f}", .{ @tagName(op), isel.fmtType(ty) }); | 8721 | if (!ty.isAbiInt(zcu)) return isel.fail("bad {s} {f}", .{ @tagName(op), isel.fmtType(ty) }); |
| 8046 | const int_info = ty.intInfo(zcu); | 8722 | const int_info = ty.intInfo(zcu); |
| 8047 | if (int_info.bits > 128) return isel.fail("too big {s} {f}", .{ @tagName(op), isel.fmtType(ty) }); | 8723 | if (int_info.bits > 128) return isel.fail("too big {s} {f}", .{ @tagName(op), isel.fmtType(ty) }); |
| 8048 | var part_offset = res_vi.size(isel); | 8724 | var part_offset = res_vi.size(isel); |
| 8049 | var need_wrap = opts.wrap; | 8725 | var need_wrap = switch (opts.overflow) { |
| 8050 | var need_carry = opts.overflow_ra != .zr; | 8726 | .@"unreachable" => false, |
| | 8727 | .panic, .wrap, .ra => true, |
| | 8728 | }; |
| | 8729 | var need_carry = switch (opts.overflow) { |
| | 8730 | .@"unreachable", .wrap => false, |
| | 8731 | .panic, .ra => true, |
| | 8732 | }; |
| 8051 | while (part_offset > 0) : (need_wrap = false) { | 8733 | while (part_offset > 0) : (need_wrap = false) { |
| 8052 | const part_size = @min(part_offset, 8); | 8734 | const part_size = @min(part_offset, 8); |
| 8053 | part_offset -= part_size; | 8735 | part_offset -= part_size; |
| ... | @@ -8057,48 +8739,87 @@ pub const Value = struct { | ... | @@ -8057,48 +8739,87 @@ pub const Value = struct { |
| 8057 | const unwrapped_res_part_ra = unwrapped_res_part_ra: { | 8739 | const unwrapped_res_part_ra = unwrapped_res_part_ra: { |
| 8058 | if (!need_wrap) break :unwrapped_res_part_ra wrapped_res_part_ra; | 8740 | if (!need_wrap) break :unwrapped_res_part_ra wrapped_res_part_ra; |
| 8059 | if (int_info.bits % 32 == 0) { | 8741 | if (int_info.bits % 32 == 0) { |
| 8060 | if (opts.overflow_ra != .zr) try isel.emit(.csinc(opts.overflow_ra.w(), .wzr, .wzr, .invert(switch (int_info.signedness) { | 8742 | try opts.overflow.defCond(isel, switch (int_info.signedness) { |
| 8061 | .signed => .vs, | 8743 | .signed => .vs, |
| 8062 | .unsigned => switch (op) { | 8744 | .unsigned => switch (op) { |
| 8063 | .add => .cs, | 8745 | .add => .cs, |
| 8064 | .sub => .cc, | 8746 | .sub => .cc, |
| 8065 | }, | 8747 | }, |
| 8066 | }))); | 8748 | }); |
| 8067 | break :unwrapped_res_part_ra wrapped_res_part_ra; | 8749 | break :unwrapped_res_part_ra wrapped_res_part_ra; |
| 8068 | } | 8750 | } |
| 8069 | const wrapped_part_ra, const unwrapped_part_ra = if (opts.overflow_ra != .zr) part_ra: { | 8751 | need_carry = false; |
| 8070 | switch (op) { | 8752 | const wrapped_part_ra, const unwrapped_part_ra = part_ra: switch (opts.overflow) { |
| 8071 | .add => {}, | 8753 | .@"unreachable" => unreachable, |
| 8072 | .sub => switch (int_info.signedness) { | 8754 | .panic, .ra => switch (int_info.signedness) { |
| 8073 | .signed => {}, | 8755 | .signed => { |
| 8074 | .unsigned => { | 8756 | try opts.overflow.defCond(isel, .ne); |
| 8075 | try isel.emit(.csinc(opts.overflow_ra.w(), .wzr, .wzr, .invert(.cc))); | 8757 | const wrapped_part_ra = switch (wrapped_res_part_ra) { |
| 8076 | break :part_ra .{ wrapped_res_part_ra, wrapped_res_part_ra }; | 8758 | else => |res_part_ra| res_part_ra, |
| 8077 | }, | 8759 | .zr => try isel.allocIntReg(), |
| | 8760 | }; |
| | 8761 | errdefer if (wrapped_part_ra != wrapped_res_part_ra) isel.freeReg(wrapped_part_ra); |
| | 8762 | const unwrapped_part_ra = unwrapped_part_ra: { |
| | 8763 | const wrapped_res_part_lock: RegLock = switch (wrapped_res_part_ra) { |
| | 8764 | else => |res_part_ra| isel.lockReg(res_part_ra), |
| | 8765 | .zr => .empty, |
| | 8766 | }; |
| | 8767 | defer wrapped_res_part_lock.unlock(isel); |
| | 8768 | break :unwrapped_part_ra try isel.allocIntReg(); |
| | 8769 | }; |
| | 8770 | errdefer isel.freeReg(unwrapped_part_ra); |
| | 8771 | switch (part_size) { |
| | 8772 | else => unreachable, |
| | 8773 | 1...4 => try isel.emit(.subs(.wzr, wrapped_part_ra.w(), .{ .register = unwrapped_part_ra.w() })), |
| | 8774 | 5...8 => try isel.emit(.subs(.xzr, wrapped_part_ra.x(), .{ .register = unwrapped_part_ra.x() })), |
| | 8775 | } |
| | 8776 | break :part_ra .{ wrapped_part_ra, unwrapped_part_ra }; |
| 8078 | }, | 8777 | }, |
| 8079 | } | 8778 | .unsigned => { |
| 8080 | try isel.emit(.csinc(opts.overflow_ra.w(), .wzr, .wzr, .invert(.ne))); | 8779 | const unwrapped_part_ra = unwrapped_part_ra: { |
| 8081 | const wrapped_part_ra = switch (wrapped_res_part_ra) { | 8780 | const wrapped_res_part_lock: RegLock = switch (wrapped_res_part_ra) { |
| 8082 | else => |res_part_ra| res_part_ra, | 8781 | else => |res_part_ra| isel.lockReg(res_part_ra), |
| 8083 | .zr => try isel.allocIntReg(), | 8782 | .zr => .empty, |
| 8084 | }; | 8783 | }; |
| 8085 | errdefer if (wrapped_part_ra != wrapped_res_part_ra) isel.freeReg(wrapped_part_ra); | 8784 | defer wrapped_res_part_lock.unlock(isel); |
| 8086 | const unwrapped_part_ra = unwrapped_part_ra: { | 8785 | break :unwrapped_part_ra try isel.allocIntReg(); |
| 8087 | const wrapped_res_part_lock: RegLock = switch (wrapped_res_part_ra) { | 8786 | }; |
| 8088 | else => |res_part_ra| isel.lockReg(res_part_ra), | 8787 | errdefer isel.freeReg(unwrapped_part_ra); |
| 8089 | .zr => .empty, | 8788 | const bit: u6 = @truncate(int_info.bits); |
| 8090 | }; | 8789 | switch (opts.overflow) { |
| 8091 | defer wrapped_res_part_lock.unlock(isel); | 8790 | .@"unreachable", .wrap => unreachable, |
| 8092 | break :unwrapped_part_ra try isel.allocIntReg(); | 8791 | .panic => |panic_id| { |
| 8093 | }; | 8792 | const skip_label = isel.instructions.items.len; |
| 8094 | errdefer isel.freeReg(unwrapped_part_ra); | 8793 | try isel.emitPanic(panic_id); |
| 8095 | switch (part_size) { | 8794 | try isel.emit(.tbz( |
| 8096 | else => unreachable, | 8795 | switch (bit) { |
| 8097 | 1...4 => try isel.emit(.subs(.wzr, wrapped_part_ra.w(), .{ .register = unwrapped_part_ra.w() })), | 8796 | 0, 32 => unreachable, |
| 8098 | 5...8 => try isel.emit(.subs(.xzr, wrapped_part_ra.x(), .{ .register = unwrapped_part_ra.x() })), | 8797 | 1...31 => unwrapped_part_ra.w(), |
| 8099 | } | 8798 | 33...63 => unwrapped_part_ra.x(), |
| 8100 | break :part_ra .{ wrapped_part_ra, unwrapped_part_ra }; | 8799 | }, |
| 8101 | } else .{ wrapped_res_part_ra, wrapped_res_part_ra }; | 8800 | bit, |
| | 8801 | @intCast((isel.instructions.items.len + 1 - skip_label) << 2), |
| | 8802 | )); |
| | 8803 | }, |
| | 8804 | .ra => |overflow_ra| try isel.emit(switch (bit) { |
| | 8805 | 0, 32 => unreachable, |
| | 8806 | 1...31 => .ubfm(overflow_ra.w(), unwrapped_part_ra.w(), .{ |
| | 8807 | .N = .word, |
| | 8808 | .immr = bit, |
| | 8809 | .imms = bit, |
| | 8810 | }), |
| | 8811 | 33...63 => .ubfm(overflow_ra.x(), unwrapped_part_ra.x(), .{ |
| | 8812 | .N = .doubleword, |
| | 8813 | .immr = bit, |
| | 8814 | .imms = bit, |
| | 8815 | }), |
| | 8816 | }), |
| | 8817 | } |
| | 8818 | break :part_ra .{ wrapped_res_part_ra, unwrapped_part_ra }; |
| | 8819 | }, |
| | 8820 | }, |
| | 8821 | .wrap => .{ wrapped_res_part_ra, wrapped_res_part_ra }, |
| | 8822 | }; |
| 8102 | defer if (wrapped_part_ra != wrapped_res_part_ra) isel.freeReg(wrapped_part_ra); | 8823 | defer if (wrapped_part_ra != wrapped_res_part_ra) isel.freeReg(wrapped_part_ra); |
| 8103 | errdefer if (unwrapped_part_ra != wrapped_res_part_ra) isel.freeReg(unwrapped_part_ra); | 8824 | errdefer if (unwrapped_part_ra != wrapped_res_part_ra) isel.freeReg(unwrapped_part_ra); |
| 8104 | if (wrapped_part_ra != .zr) try isel.emit(switch (part_size) { | 8825 | if (wrapped_part_ra != .zr) try isel.emit(switch (part_size) { |
| ... | @@ -8574,41 +9295,15 @@ pub const Value = struct { | ... | @@ -8574,41 +9295,15 @@ pub const Value = struct { |
| 8574 | expected_live_registers: *const LiveRegisters, | 9295 | expected_live_registers: *const LiveRegisters, |
| 8575 | ) !void { | 9296 | ) !void { |
| 8576 | try vi.liveIn(isel, src_ra, expected_live_registers); | 9297 | try vi.liveIn(isel, src_ra, expected_live_registers); |
| 8577 | const offset_from_parent: i65, const parent_vi = vi.valueParent(isel); | 9298 | const offset_from_parent, const parent_vi = vi.valueParent(isel); |
| 8578 | switch (parent_vi.parent(isel)) { | 9299 | switch (parent_vi.parent(isel)) { |
| 8579 | .unallocated => {}, | 9300 | .unallocated => {}, |
| 8580 | .stack_slot => |stack_slot| { | 9301 | .stack_slot => |stack_slot| if (stack_slot.base != Register.Alias.fp) try isel.storeReg( |
| 8581 | const offset = stack_slot.offset + offset_from_parent; | 9302 | src_ra, |
| 8582 | try isel.emit(switch (vi.size(isel)) { | 9303 | vi.size(isel), |
| 8583 | else => unreachable, | 9304 | stack_slot.base, |
| 8584 | 1 => if (src_ra.isVector()) .str(src_ra.b(), .{ .unsigned_offset = .{ | 9305 | @as(i65, stack_slot.offset) + offset_from_parent, |
| 8585 | .base = stack_slot.base.x(), | 9306 | ), |
| 8586 | .offset = @intCast(offset), | | |
| 8587 | } }) else .strb(src_ra.w(), .{ .unsigned_offset = .{ | | |
| 8588 | .base = stack_slot.base.x(), | | |
| 8589 | .offset = @intCast(offset), | | |
| 8590 | } }), | | |
| 8591 | 2 => if (src_ra.isVector()) .str(src_ra.h(), .{ .unsigned_offset = .{ | | |
| 8592 | .base = stack_slot.base.x(), | | |
| 8593 | .offset = @intCast(offset), | | |
| 8594 | } }) else .strh(src_ra.w(), .{ .unsigned_offset = .{ | | |
| 8595 | .base = stack_slot.base.x(), | | |
| 8596 | .offset = @intCast(offset), | | |
| 8597 | } }), | | |
| 8598 | 4 => .str(if (src_ra.isVector()) src_ra.s() else src_ra.w(), .{ .unsigned_offset = .{ | | |
| 8599 | .base = stack_slot.base.x(), | | |
| 8600 | .offset = @intCast(offset), | | |
| 8601 | } }), | | |
| 8602 | 8 => .str(if (src_ra.isVector()) src_ra.d() else src_ra.x(), .{ .unsigned_offset = .{ | | |
| 8603 | .base = stack_slot.base.x(), | | |
| 8604 | .offset = @intCast(offset), | | |
| 8605 | } }), | | |
| 8606 | 16 => .str(src_ra.q(), .{ .unsigned_offset = .{ | | |
| 8607 | .base = stack_slot.base.x(), | | |
| 8608 | .offset = @intCast(offset), | | |
| 8609 | } }), | | |
| 8610 | }); | | |
| 8611 | }, | | |
| 8612 | else => unreachable, | 9307 | else => unreachable, |
| 8613 | } | 9308 | } |
| 8614 | try vi.spillReg(isel, src_ra, 0, expected_live_registers); | 9309 | try vi.spillReg(isel, src_ra, 0, expected_live_registers); |
| ... | @@ -9027,8 +9722,14 @@ pub const Value = struct { | ... | @@ -9027,8 +9722,14 @@ pub const Value = struct { |
| 9027 | } }, | 9722 | } }, |
| 9028 | }, | 9723 | }, |
| 9029 | .struct_type => { | 9724 | .struct_type => { |
| 9030 | const min_part_log2_stride: u5 = if (size > 16) 4 else if (size > 8) 3 else 0; | | |
| 9031 | const loaded_struct = ip.loadStructType(ty.toIntern()); | 9725 | const loaded_struct = ip.loadStructType(ty.toIntern()); |
| | 9726 | switch (loaded_struct.layout) { |
| | 9727 | .auto, .@"extern" => {}, |
| | 9728 | .@"packed" => continue :type_key .{ |
| | 9729 | .int_type = ip.indexToKey(loaded_struct.backingIntTypeUnordered(ip)).int_type, |
| | 9730 | }, |
| | 9731 | } |
| | 9732 | const min_part_log2_stride: u5 = if (size > 16) 4 else if (size > 8) 3 else 0; |
| 9032 | if (loaded_struct.field_types.len > Value.max_parts and | 9733 | if (loaded_struct.field_types.len > Value.max_parts and |
| 9033 | (std.math.divCeil(u64, size, @as(u64, 1) << min_part_log2_stride) catch unreachable) > Value.max_parts) | 9734 | (std.math.divCeil(u64, size, @as(u64, 1) << min_part_log2_stride) catch unreachable) > Value.max_parts) |
| 9034 | return isel.fail("Value.FieldPartIterator.next({f})", .{isel.fmtType(ty)}); | 9735 | return isel.fail("Value.FieldPartIterator.next({f})", .{isel.fmtType(ty)}); |
| ... | @@ -9136,6 +9837,77 @@ pub const Value = struct { | ... | @@ -9136,6 +9837,77 @@ pub const Value = struct { |
| 9136 | if (part.is_vector) subpart_vi.setIsVector(isel); | 9837 | if (part.is_vector) subpart_vi.setIsVector(isel); |
| 9137 | } | 9838 | } |
| 9138 | }, | 9839 | }, |
| | 9840 | .union_type => { |
| | 9841 | const loaded_union = ip.loadUnionType(ty.toIntern()); |
| | 9842 | switch (loaded_union.flagsUnordered(ip).layout) { |
| | 9843 | .auto, .@"extern" => {}, |
| | 9844 | .@"packed" => continue :type_key .{ .int_type = .{ |
| | 9845 | .signedness = .unsigned, |
| | 9846 | .bits = @intCast(ty.bitSize(zcu)), |
| | 9847 | } }, |
| | 9848 | } |
| | 9849 | const min_part_log2_stride: u5 = if (size > 16) 4 else if (size > 8) 3 else 0; |
| | 9850 | if ((std.math.divCeil(u64, size, @as(u64, 1) << min_part_log2_stride) catch unreachable) > Value.max_parts) |
| | 9851 | return isel.fail("Value.FieldPartIterator.next({f})", .{isel.fmtType(ty)}); |
| | 9852 | const union_layout = ZigType.getUnionLayout(loaded_union, zcu); |
| | 9853 | const alignment = vi.alignment(isel); |
| | 9854 | const tag_offset = union_layout.tagOffset(); |
| | 9855 | const payload_offset = union_layout.payloadOffset(); |
| | 9856 | const Part = struct { offset: u64, size: u64, signedness: ?std.builtin.Signedness }; |
| | 9857 | var parts: [2]Part = undefined; |
| | 9858 | var parts_len: Value.PartsLen = 0; |
| | 9859 | var field_end: u64 = 0; |
| | 9860 | for (0..2) |field_index| { |
| | 9861 | const field: enum { tag, payload } = switch (field_index) { |
| | 9862 | 0 => if (tag_offset < payload_offset) .tag else .payload, |
| | 9863 | 1 => if (tag_offset < payload_offset) .payload else .tag, |
| | 9864 | else => unreachable, |
| | 9865 | }; |
| | 9866 | const field_size, const field_begin = switch (field) { |
| | 9867 | .tag => .{ union_layout.tag_size, tag_offset }, |
| | 9868 | .payload => .{ union_layout.payload_size, payload_offset }, |
| | 9869 | }; |
| | 9870 | if (field_begin >= offset + size) break; |
| | 9871 | if (field_size == 0) continue; |
| | 9872 | field_end = field_begin + field_size; |
| | 9873 | if (field_end <= offset) continue; |
| | 9874 | const field_signedness = field_signedness: switch (field) { |
| | 9875 | .tag => { |
| | 9876 | if (offset >= field_begin and offset + size <= field_begin + field_size) { |
| | 9877 | ty = .fromInterned(loaded_union.enum_tag_ty); |
| | 9878 | ty_size = field_size; |
| | 9879 | offset -= field_begin; |
| | 9880 | continue :type_key ip.indexToKey(loaded_union.enum_tag_ty); |
| | 9881 | } |
| | 9882 | break :field_signedness ip.indexToKey(loaded_union.loadTagType(ip).tag_ty).int_type.signedness; |
| | 9883 | }, |
| | 9884 | .payload => null, |
| | 9885 | }; |
| | 9886 | if (parts_len > 0) combine: { |
| | 9887 | const prev_part = &parts[parts_len - 1]; |
| | 9888 | const combined_size = field_end - prev_part.offset; |
| | 9889 | if (combined_size > @as(u64, 1) << @min( |
| | 9890 | min_part_log2_stride, |
| | 9891 | alignment.toLog2Units(), |
| | 9892 | @ctz(prev_part.offset), |
| | 9893 | )) break :combine; |
| | 9894 | prev_part.size = combined_size; |
| | 9895 | prev_part.signedness = null; |
| | 9896 | continue; |
| | 9897 | } |
| | 9898 | parts[parts_len] = .{ |
| | 9899 | .offset = field_begin, |
| | 9900 | .size = field_size, |
| | 9901 | .signedness = field_signedness, |
| | 9902 | }; |
| | 9903 | parts_len += 1; |
| | 9904 | } |
| | 9905 | vi.setParts(isel, parts_len); |
| | 9906 | for (parts[0..parts_len]) |part| { |
| | 9907 | const subpart_vi = vi.addPart(isel, part.offset - offset, part.size); |
| | 9908 | if (part.signedness) |signedness| subpart_vi.setSignedness(isel, signedness); |
| | 9909 | } |
| | 9910 | }, |
| 9139 | .opaque_type, .func_type => continue :type_key .{ .simple_type = .anyopaque }, | 9911 | .opaque_type, .func_type => continue :type_key .{ .simple_type = .anyopaque }, |
| 9140 | .enum_type => continue :type_key ip.indexToKey(ip.loadEnumType(ty.toIntern()).tag_ty), | 9912 | .enum_type => continue :type_key ip.indexToKey(ip.loadEnumType(ty.toIntern()).tag_ty), |
| 9141 | .error_set_type, | 9913 | .error_set_type, |
| ... | @@ -9555,21 +10327,29 @@ pub const Value = struct { | ... | @@ -9555,21 +10327,29 @@ pub const Value = struct { |
| 9555 | var base_ptr = ip.indexToKey(base).ptr; | 10327 | var base_ptr = ip.indexToKey(base).ptr; |
| 9556 | const eu_ty = ip.indexToKey(base_ptr.ty).ptr_type.child; | 10328 | const eu_ty = ip.indexToKey(base_ptr.ty).ptr_type.child; |
| 9557 | const payload_ty = ip.indexToKey(eu_ty).error_union_type.payload_type; | 10329 | const payload_ty = ip.indexToKey(eu_ty).error_union_type.payload_type; |
| 9558 | base_ptr.byte_offset += codegen.errUnionPayloadOffset(.fromInterned(payload_ty), zcu); | 10330 | base_ptr.byte_offset += codegen.errUnionPayloadOffset(.fromInterned(payload_ty), zcu) + ptr.byte_offset; |
| | 10331 | continue :constant_key .{ .ptr = base_ptr }; |
| | 10332 | }, |
| | 10333 | .opt_payload => |base| { |
| | 10334 | var base_ptr = ip.indexToKey(base).ptr; |
| | 10335 | base_ptr.byte_offset += ptr.byte_offset; |
| 9559 | continue :constant_key .{ .ptr = base_ptr }; | 10336 | continue :constant_key .{ .ptr = base_ptr }; |
| 9560 | }, | 10337 | }, |
| 9561 | .opt_payload => |base| continue :constant_key .{ .ptr = ip.indexToKey(base).ptr }, | | |
| 9562 | .field => |field| { | 10338 | .field => |field| { |
| 9563 | var base_ptr = ip.indexToKey(field.base).ptr; | 10339 | var base_ptr = ip.indexToKey(field.base).ptr; |
| 9564 | const agg_ty: ZigType = .fromInterned(ip.indexToKey(base_ptr.ty).ptr_type.child); | 10340 | const agg_ty: ZigType = .fromInterned(ip.indexToKey(base_ptr.ty).ptr_type.child); |
| 9565 | base_ptr.byte_offset += agg_ty.structFieldOffset(@intCast(field.index), zcu); | 10341 | base_ptr.byte_offset += agg_ty.structFieldOffset(@intCast(field.index), zcu) + ptr.byte_offset; |
| 9566 | continue :constant_key .{ .ptr = base_ptr }; | 10342 | continue :constant_key .{ .ptr = base_ptr }; |
| 9567 | }, | 10343 | }, |
| 9568 | .comptime_alloc, .comptime_field, .arr_elem => unreachable, | 10344 | .comptime_alloc, .comptime_field, .arr_elem => unreachable, |
| 9569 | }; | 10345 | }; |
| 9570 | }, | 10346 | }, |
| 9571 | .slice => |slice| switch (offset) { | 10347 | .slice => |slice| switch (offset) { |
| 9572 | 0 => continue :constant_key .{ .ptr = ip.indexToKey(slice.ptr).ptr }, | 10348 | 0 => continue :constant_key switch (ip.indexToKey(slice.ptr)) { |
| | 10349 | else => unreachable, |
| | 10350 | .undef => |undef| .{ .undef = undef }, |
| | 10351 | .ptr => |ptr| .{ .ptr = ptr }, |
| | 10352 | }, |
| 9573 | else => { | 10353 | else => { |
| 9574 | assert(offset == @divExact(isel.target.ptrBitWidth(), 8)); | 10354 | assert(offset == @divExact(isel.target.ptrBitWidth(), 8)); |
| 9575 | offset = 0; | 10355 | offset = 0; |
| ... | @@ -10622,16 +11402,14 @@ pub const CallAbiIterator = struct { | ... | @@ -10622,16 +11402,14 @@ pub const CallAbiIterator = struct { |
| 10622 | { | 11402 | { |
| 10623 | const error_set_ty: ZigType = .fromInterned(error_union_type.error_set_type); | 11403 | const error_set_ty: ZigType = .fromInterned(error_union_type.error_set_type); |
| 10624 | const offset = codegen.errUnionErrorOffset(payload_ty, zcu); | 11404 | const offset = codegen.errUnionErrorOffset(payload_ty, zcu); |
| 10625 | const size = error_set_ty.abiSize(zcu); | 11405 | const end = offset % 8 + error_set_ty.abiSize(zcu); |
| 10626 | const end = offset % 8 + size; | | |
| 10627 | const part_index: usize = @intCast(offset / 8); | 11406 | const part_index: usize = @intCast(offset / 8); |
| 10628 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); | 11407 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); |
| 10629 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); | 11408 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); |
| 10630 | } | 11409 | } |
| 10631 | { | 11410 | { |
| 10632 | const offset = codegen.errUnionPayloadOffset(payload_ty, zcu); | 11411 | const offset = codegen.errUnionPayloadOffset(payload_ty, zcu); |
| 10633 | const size = payload_ty.abiSize(zcu); | 11412 | const end = offset % 8 + payload_ty.abiSize(zcu); |
| 10634 | const end = offset % 8 + size; | | |
| 10635 | const part_index: usize = @intCast(offset / 8); | 11413 | const part_index: usize = @intCast(offset / 8); |
| 10636 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); | 11414 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); |
| 10637 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); | 11415 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); |
| ... | @@ -10675,8 +11453,14 @@ pub const CallAbiIterator = struct { | ... | @@ -10675,8 +11453,14 @@ pub const CallAbiIterator = struct { |
| 10675 | => unreachable, | 11453 | => unreachable, |
| 10676 | }, | 11454 | }, |
| 10677 | .struct_type => { | 11455 | .struct_type => { |
| 10678 | const size = wip_vi.size(isel); | | |
| 10679 | const loaded_struct = ip.loadStructType(ty.toIntern()); | 11456 | const loaded_struct = ip.loadStructType(ty.toIntern()); |
| | 11457 | switch (loaded_struct.layout) { |
| | 11458 | .auto, .@"extern" => {}, |
| | 11459 | .@"packed" => continue :type_key .{ |
| | 11460 | .int_type = ip.indexToKey(loaded_struct.backingIntTypeUnordered(ip)).int_type, |
| | 11461 | }, |
| | 11462 | } |
| | 11463 | const size = wip_vi.size(isel); |
| 10680 | if (size <= 16 * 4) homogeneous_aggregate: { | 11464 | if (size <= 16 * 4) homogeneous_aggregate: { |
| 10681 | const fdt = homogeneousStructBaseType(zcu, &loaded_struct) orelse break :homogeneous_aggregate; | 11465 | const fdt = homogeneousStructBaseType(zcu, &loaded_struct) orelse break :homogeneous_aggregate; |
| 10682 | const parts_len = @shrExact(size, fdt.log2Size()); | 11466 | const parts_len = @shrExact(size, fdt.log2Size()); |
| ... | @@ -10761,6 +11545,40 @@ pub const CallAbiIterator = struct { | ... | @@ -10761,6 +11545,40 @@ pub const CallAbiIterator = struct { |
| 10761 | else => it.indirect(isel, wip_vi), | 11545 | else => it.indirect(isel, wip_vi), |
| 10762 | } | 11546 | } |
| 10763 | }, | 11547 | }, |
| | 11548 | .union_type => { |
| | 11549 | const loaded_union = ip.loadUnionType(ty.toIntern()); |
| | 11550 | switch (loaded_union.flagsUnordered(ip).layout) { |
| | 11551 | .auto, .@"extern" => {}, |
| | 11552 | .@"packed" => continue :type_key .{ .int_type = .{ |
| | 11553 | .signedness = .unsigned, |
| | 11554 | .bits = @intCast(ty.bitSize(zcu)), |
| | 11555 | } }, |
| | 11556 | } |
| | 11557 | switch (wip_vi.size(isel)) { |
| | 11558 | 0 => unreachable, |
| | 11559 | 1...8 => it.integer(isel, wip_vi), |
| | 11560 | 9...16 => { |
| | 11561 | const union_layout = ZigType.getUnionLayout(loaded_union, zcu); |
| | 11562 | var sizes: [2]u64 = @splat(0); |
| | 11563 | { |
| | 11564 | const offset = union_layout.tagOffset(); |
| | 11565 | const end = offset % 8 + union_layout.tag_size; |
| | 11566 | const part_index: usize = @intCast(offset / 8); |
| | 11567 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); |
| | 11568 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); |
| | 11569 | } |
| | 11570 | { |
| | 11571 | const offset = union_layout.payloadOffset(); |
| | 11572 | const end = offset % 8 + union_layout.payload_size; |
| | 11573 | const part_index: usize = @intCast(offset / 8); |
| | 11574 | sizes[part_index] = @max(sizes[part_index], @min(end, 8)); |
| | 11575 | if (end > 8) sizes[part_index + 1] = @max(sizes[part_index + 1], end - 8); |
| | 11576 | } |
| | 11577 | it.integers(isel, wip_vi, sizes); |
| | 11578 | }, |
| | 11579 | else => it.indirect(isel, wip_vi), |
| | 11580 | } |
| | 11581 | }, |
| 10764 | .opaque_type, .func_type => continue :type_key .{ .simple_type = .anyopaque }, | 11582 | .opaque_type, .func_type => continue :type_key .{ .simple_type = .anyopaque }, |
| 10765 | .enum_type => continue :type_key ip.indexToKey(ip.loadEnumType(ty.toIntern()).tag_ty), | 11583 | .enum_type => continue :type_key ip.indexToKey(ip.loadEnumType(ty.toIntern()).tag_ty), |
| 10766 | .error_set_type, | 11584 | .error_set_type, |