authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2021-04-12 17:58:44+02:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2021-04-13 10:56:03+02:00
logdb30033de209fb2132145ffc7aac7d4c79d6bbb9
tree42ce681f461ce112b0b565ff0ac5b4507c5d2431
parent1119970d22f67112159682ab103c767088cbf4b8

zld: rebase to new naming conv for aarch64

1 files changed, 27 insertions(+), 27 deletions(-)

src/link/MachO/reloc/aarch64.zig+27-27
......@@ -24,7 +24,7 @@ pub const Branch = struct {
2424 log.debug(" | displacement 0x{x}", .{displacement});
2525
2626 var inst = branch.inst;
27 inst.UnconditionalBranchImmediate.imm26 = @truncate(u26, @bitCast(u28, displacement) >> 2);
27 inst.unconditional_branch_immediate.imm26 = @truncate(u26, @bitCast(u28, displacement) >> 2);
2828 mem.writeIntLittle(u32, branch.base.code[0..4], inst.toU32());
2929 }
3030};
......@@ -47,8 +47,8 @@ pub const Page = struct {
4747 log.debug(" | moving by {} pages", .{pages});
4848
4949 var inst = page.inst;
50 inst.PCRelativeAddress.immhi = @truncate(u19, pages >> 2);
51 inst.PCRelativeAddress.immlo = @truncate(u2, pages);
50 inst.pc_relative_address.immhi = @truncate(u19, pages >> 2);
51 inst.pc_relative_address.immlo = @truncate(u2, pages);
5252
5353 mem.writeIntLittle(u32, page.base.code[0..4], inst.toU32());
5454 }
......@@ -76,22 +76,22 @@ pub const PageOff = struct {
7676
7777 var inst = page_off.inst;
7878 if (page_off.op_kind == .arithmetic) {
79 inst.AddSubtractImmediate.imm12 = narrowed;
79 inst.add_subtract_immediate.imm12 = narrowed;
8080 } else {
8181 const offset: u12 = blk: {
82 if (inst.LoadStoreRegister.size == 0) {
83 if (inst.LoadStoreRegister.v == 1) {
82 if (inst.load_store_register.size == 0) {
83 if (inst.load_store_register.v == 1) {
8484 // 128-bit SIMD is scaled by 16.
8585 break :blk try math.divExact(u12, narrowed, 16);
8686 }
8787 // Otherwise, 8-bit SIMD or ldrb.
8888 break :blk narrowed;
8989 } else {
90 const denom: u4 = try math.powi(u4, 2, inst.LoadStoreRegister.size);
90 const denom: u4 = try math.powi(u4, 2, inst.load_store_register.size);
9191 break :blk try math.divExact(u12, narrowed, denom);
9292 }
9393 };
94 inst.LoadStoreRegister.offset = offset;
94 inst.load_store_register.offset = offset;
9595 }
9696
9797 mem.writeIntLittle(u32, page_off.base.code[0..4], inst.toU32());
......@@ -113,8 +113,8 @@ pub const GotPage = struct {
113113 log.debug(" | moving by {} pages", .{pages});
114114
115115 var inst = page.inst;
116 inst.PCRelativeAddress.immhi = @truncate(u19, pages >> 2);
117 inst.PCRelativeAddress.immlo = @truncate(u2, pages);
116 inst.pc_relative_address.immhi = @truncate(u19, pages >> 2);
117 inst.pc_relative_address.immlo = @truncate(u2, pages);
118118
119119 mem.writeIntLittle(u32, page.base.code[0..4], inst.toU32());
120120 }
......@@ -134,7 +134,7 @@ pub const GotPageOff = struct {
134134
135135 var inst = page_off.inst;
136136 const offset = try math.divExact(u12, narrowed, 8);
137 inst.LoadStoreRegister.offset = offset;
137 inst.load_store_register.offset = offset;
138138
139139 mem.writeIntLittle(u32, page_off.base.code[0..4], inst.toU32());
140140 }
......@@ -155,8 +155,8 @@ pub const TlvpPage = struct {
155155 log.debug(" | moving by {} pages", .{pages});
156156
157157 var inst = page.inst;
158 inst.PCRelativeAddress.immhi = @truncate(u19, pages >> 2);
159 inst.PCRelativeAddress.immlo = @truncate(u2, pages);
158 inst.pc_relative_address.immhi = @truncate(u19, pages >> 2);
159 inst.pc_relative_address.immlo = @truncate(u2, pages);
160160
161161 mem.writeIntLittle(u32, page.base.code[0..4], inst.toU32());
162162 }
......@@ -177,7 +177,7 @@ pub const TlvpPageOff = struct {
177177 log.debug(" | narrowed address within the page 0x{x}", .{narrowed});
178178
179179 var inst = page_off.inst;
180 inst.AddSubtractImmediate.imm12 = narrowed;
180 inst.add_subtract_immediate.imm12 = narrowed;
181181
182182 mem.writeIntLittle(u32, page_off.base.code[0..4], inst.toU32());
183183 }
......@@ -260,10 +260,10 @@ pub const Parser = struct {
260260
261261 const offset = @intCast(u32, rel.r_address);
262262 const inst = parser.code[offset..][0..4];
263 const parsed_inst = aarch64.Instruction{ .UnconditionalBranchImmediate = mem.bytesToValue(
263 const parsed_inst = aarch64.Instruction{ .unconditional_branch_immediate = mem.bytesToValue(
264264 meta.TagPayload(
265265 aarch64.Instruction,
266 aarch64.Instruction.UnconditionalBranchImmediate,
266 aarch64.Instruction.unconditional_branch_immediate,
267267 ),
268268 inst,
269269 ) };
......@@ -296,9 +296,9 @@ pub const Parser = struct {
296296
297297 const offset = @intCast(u32, rel.r_address);
298298 const inst = parser.code[offset..][0..4];
299 const parsed_inst = aarch64.Instruction{ .PCRelativeAddress = mem.bytesToValue(meta.TagPayload(
299 const parsed_inst = aarch64.Instruction{ .pc_relative_address = mem.bytesToValue(meta.TagPayload(
300300 aarch64.Instruction,
301 aarch64.Instruction.PCRelativeAddress,
301 aarch64.Instruction.pc_relative_address,
302302 ), inst) };
303303
304304 const ptr: *Relocation = ptr: {
......@@ -387,15 +387,15 @@ pub const Parser = struct {
387387 var parsed_inst: aarch64.Instruction = undefined;
388388 if (isArithmeticOp(inst)) {
389389 op_kind = .arithmetic;
390 parsed_inst = .{ .AddSubtractImmediate = mem.bytesToValue(meta.TagPayload(
390 parsed_inst = .{ .add_subtract_immediate = mem.bytesToValue(meta.TagPayload(
391391 aarch64.Instruction,
392 aarch64.Instruction.AddSubtractImmediate,
392 aarch64.Instruction.add_subtract_immediate,
393393 ), inst) };
394394 } else {
395395 op_kind = .load_store;
396 parsed_inst = .{ .LoadStoreRegister = mem.bytesToValue(meta.TagPayload(
396 parsed_inst = .{ .load_store_register = mem.bytesToValue(meta.TagPayload(
397397 aarch64.Instruction,
398 aarch64.Instruction.LoadStoreRegister,
398 aarch64.Instruction.load_store_register,
399399 ), inst) };
400400 }
401401 const target = Relocation.Target.from_reloc(rel);
......@@ -431,7 +431,7 @@ pub const Parser = struct {
431431
432432 const parsed_inst = mem.bytesToValue(meta.TagPayload(
433433 aarch64.Instruction,
434 aarch64.Instruction.LoadStoreRegister,
434 aarch64.Instruction.load_store_register,
435435 ), inst);
436436 assert(parsed_inst.size == 3);
437437
......@@ -448,7 +448,7 @@ pub const Parser = struct {
448448 .target = target,
449449 },
450450 .inst = .{
451 .LoadStoreRegister = parsed_inst,
451 .load_store_register = parsed_inst,
452452 },
453453 };
454454
......@@ -474,7 +474,7 @@ pub const Parser = struct {
474474 if (isArithmeticOp(inst)) {
475475 const parsed_inst = mem.bytesAsValue(meta.TagPayload(
476476 aarch64.Instruction,
477 aarch64.Instruction.AddSubtractImmediate,
477 aarch64.Instruction.add_subtract_immediate,
478478 ), inst);
479479 break :parsed .{
480480 .rd = parsed_inst.rd,
......@@ -484,7 +484,7 @@ pub const Parser = struct {
484484 } else {
485485 const parsed_inst = mem.bytesAsValue(meta.TagPayload(
486486 aarch64.Instruction,
487 aarch64.Instruction.LoadStoreRegister,
487 aarch64.Instruction.load_store_register,
488488 ), inst);
489489 break :parsed .{
490490 .rd = parsed_inst.rt,
......@@ -507,7 +507,7 @@ pub const Parser = struct {
507507 .target = target,
508508 },
509509 .inst = .{
510 .AddSubtractImmediate = .{
510 .add_subtract_immediate = .{
511511 .rd = parsed.rd,
512512 .rn = parsed.rn,
513513 .imm12 = 0, // This will be filled when target addresses are known.