From 6fd0dddf186f6435f422f2992f44ec9a35e09f20 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 20:23:49 +0200
Subject: [PATCH 001/116] implement non-exhaustive enums

---
 src/all_types.hpp |   2 +
 src/analyze.cpp   |  18 +++++++-
 src/codegen.cpp   |   2 +-
 src/ir.cpp        | 110 ++++++++++++++++++++++++++++++++--------------
 4 files changed, 97 insertions(+), 35 deletions(-)

diff --git a/src/all_types.hpp b/src/all_types.hpp
index 0fed73f7b24706f3137d673bd2b5cf3c6d5e505f..89af4082d8d84e72ad865bd9dcb0482fd9874abe 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -1383,6 +1383,7 @@ struct ZigTypeEnum {
     ContainerLayout layout;
     ResolveStatus resolve_status;
 
+    bool non_exhaustive;
     bool resolve_loop_flag;
 };
 
@@ -3665,6 +3666,7 @@ struct IrInstructionCheckSwitchProngs {
     IrInstructionCheckSwitchProngsRange *ranges;
     size_t range_count;
     bool have_else_prong;
+    bool have_underscore_prong;
 };
 
 struct IrInstructionCheckStatementIsVoid {
diff --git a/src/analyze.cpp b/src/analyze.cpp
index b7838003c816fdb5ccc8435364df433eb024ee09..a62e0414e0da425da3d175130fc61aac843028f4 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2572,6 +2572,7 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
     enum_type->data.enumeration.src_field_count = field_count;
     enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
     enum_type->data.enumeration.fields_by_name.init(field_count);
+    enum_type->data.enumeration.non_exhaustive = false;
 
     Scope *scope = &enum_type->data.enumeration.decls_scope->base;
 
@@ -2648,6 +2649,21 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
                     buf_sprintf("consider 'union(enum)' here"));
         }
 
+        AstNode *tag_value = field_node->data.struct_field.value;
+
+        if (buf_eql_str(type_enum_field->name, "_")) {
+            if (field_i != field_count - 1) {
+                add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
+                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+            }
+            if (tag_value != nullptr) {
+                add_node_error(g, field_node, buf_sprintf("value assigned to '_' field of non-exhaustive enum"));
+                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+            }
+            enum_type->data.enumeration.non_exhaustive = true;
+            continue;
+        }
+
         auto field_entry = enum_type->data.enumeration.fields_by_name.put_unique(type_enum_field->name, type_enum_field);
         if (field_entry != nullptr) {
             ErrorMsg *msg = add_node_error(g, field_node,
@@ -2657,8 +2673,6 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
             continue;
         }
 
-        AstNode *tag_value = field_node->data.struct_field.value;
-
         if (tag_value != nullptr) {
             // A user-specified value is available
             ZigValue *result = analyze_const_value(g, scope, tag_value, tag_int_type,
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 9bab5fd878d52aee0b38de28ae01018860c6626d..0dc820be51eb53a1653efb1c27598911aaa537d2 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -3356,7 +3356,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
     LLVMValueRef tag_int_value = gen_widen_or_shorten(g, ir_want_runtime_safety(g, &instruction->base),
             instruction->target->value->type, tag_int_type, target_val);
 
-    if (ir_want_runtime_safety(g, &instruction->base) && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {
+    if (ir_want_runtime_safety(g, &instruction->base) && !wanted_type->data.enumeration.non_exhaustive) {
         LLVMBasicBlockRef bad_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadValue");
         LLVMBasicBlockRef ok_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "OkValue");
         size_t field_count = wanted_type->data.enumeration.src_field_count;
diff --git a/src/ir.cpp b/src/ir.cpp
index d871aa27a08f09e45e93feb30f24c5eb8390e7f8..6876214510a8d7875bdef981bc287f8ebcfc3371 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -3451,7 +3451,7 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode
 
 static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope, AstNode *source_node,
         IrInstruction *target_value, IrInstructionCheckSwitchProngsRange *ranges, size_t range_count,
-        bool have_else_prong)
+        bool have_else_prong, bool have_underscore_prong)
 {
     IrInstructionCheckSwitchProngs *instruction = ir_build_instruction<IrInstructionCheckSwitchProngs>(
             irb, scope, source_node);
@@ -3459,6 +3459,7 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,
     instruction->ranges = ranges;
     instruction->range_count = range_count;
     instruction->have_else_prong = have_else_prong;
+    instruction->have_underscore_prong = have_underscore_prong;
 
     ir_ref_instruction(target_value, irb->current_basic_block);
     for (size_t i = 0; i < range_count; i += 1) {
@@ -8090,34 +8091,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
     Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
     Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
     AstNode *else_prong = nullptr;
+    AstNode *underscore_prong = nullptr;
     for (size_t prong_i = 0; prong_i < prong_count; prong_i += 1) {
         AstNode *prong_node = node->data.switch_expr.prongs.at(prong_i);
         size_t prong_item_count = prong_node->data.switch_prong.items.length;
-        if (prong_item_count == 0) {
-            ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
-            if (else_prong) {
-                ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
-                        buf_sprintf("multiple else prongs in switch expression"));
-                add_error_note(irb->codegen, msg, else_prong,
-                        buf_sprintf("previous else prong is here"));
-                return irb->codegen->invalid_instruction;
-            }
-            else_prong = prong_node;
-
-            IrBasicBlock *prev_block = irb->current_basic_block;
-            if (peer_parent->peers.length > 0) {
-                peer_parent->peers.last()->next_bb = else_block;
-            }
-            peer_parent->peers.append(this_peer_result_loc);
-            ir_set_cursor_at_end_and_append_block(irb, else_block);
-            if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
-                is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
-                &switch_else_var, LValNone, &this_peer_result_loc->base))
-            {
-                return irb->codegen->invalid_instruction;
-            }
-            ir_set_cursor_at_end(irb, prev_block);
-        } else if (prong_node->data.switch_prong.any_items_are_range) {
+        if (prong_node->data.switch_prong.any_items_are_range) {
             ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
             IrInstruction *ok_bit = nullptr;
@@ -8195,6 +8173,59 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
             }
 
             ir_set_cursor_at_end_and_append_block(irb, range_block_no);
+        } else {
+            if (prong_item_count == 0) {
+                if (else_prong) {
+                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
+                            buf_sprintf("multiple else prongs in switch expression"));
+                    add_error_note(irb->codegen, msg, else_prong,
+                            buf_sprintf("previous else prong is here"));
+                    return irb->codegen->invalid_instruction;
+                }
+                else_prong = prong_node;
+                if (underscore_prong) {
+                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
+                            buf_sprintf("else and '_' prong in switch expression"));
+                    add_error_note(irb->codegen, msg, underscore_prong,
+                            buf_sprintf("'_' prong is here"));
+                    return irb->codegen->invalid_instruction;
+                }
+            } else if (prong_item_count == 1 && 
+                    prong_node->data.switch_prong.items.at(0)->type == NodeTypeSymbol &&
+                    buf_eql_str(prong_node->data.switch_prong.items.at(0)->data.symbol_expr.symbol, "_")) {
+                if (underscore_prong) {
+                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
+                            buf_sprintf("multiple '_' prongs in switch expression"));
+                    add_error_note(irb->codegen, msg, underscore_prong,
+                            buf_sprintf("previous '_' prong is here"));
+                    return irb->codegen->invalid_instruction;
+                }
+                underscore_prong = prong_node;
+                if (else_prong) {
+                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
+                            buf_sprintf("else and '_' prong in switch expression"));
+                    add_error_note(irb->codegen, msg, else_prong,
+                            buf_sprintf("else prong is here"));
+                    return irb->codegen->invalid_instruction;
+                }
+            } else {
+                continue;
+            }
+            ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
+
+            IrBasicBlock *prev_block = irb->current_basic_block;
+            if (peer_parent->peers.length > 0) {
+                peer_parent->peers.last()->next_bb = else_block;
+            }
+            peer_parent->peers.append(this_peer_result_loc);
+            ir_set_cursor_at_end_and_append_block(irb, else_block);
+            if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
+                is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
+                &switch_else_var, LValNone, &this_peer_result_loc->base))
+            {
+                return irb->codegen->invalid_instruction;
+            }
+            ir_set_cursor_at_end(irb, prev_block);
         }
     }
 
@@ -8206,6 +8237,8 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
             continue;
         if (prong_node->data.switch_prong.any_items_are_range)
             continue;
+        if (underscore_prong == prong_node)
+            continue;
 
         ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
@@ -8249,7 +8282,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
     }
 
     IrInstruction *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
-            check_ranges.items, check_ranges.length, else_prong != nullptr);
+            check_ranges.items, check_ranges.length, else_prong != nullptr, underscore_prong != nullptr);
 
     IrInstruction *br_instruction;
     if (cases.length == 0) {
@@ -8269,7 +8302,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
         peer_parent->peers.at(i)->base.source_instruction = peer_parent->base.source_instruction;
     }
 
-    if (!else_prong) {
+    if (!else_prong && !underscore_prong) {
         if (peer_parent->peers.length != 0) {
             peer_parent->peers.last()->next_bb = else_block;
         }
@@ -12790,7 +12823,7 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
             return ira->codegen->invalid_instruction;
 
         TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);
-        if (field == nullptr && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {
+        if (field == nullptr && !wanted_type->data.enumeration.non_exhaustive) {
             Buf *val_buf = buf_alloc();
             bigint_append_buf(val_buf, &val->data.x_bigint, 10);
             ErrorMsg *msg = ir_add_error(ira, source_instr,
@@ -26433,10 +26466,23 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
                 bigint_incr(&field_index);
             }
         }
-        if (!instruction->have_else_prong) {
-            if (switch_type->data.enumeration.layout == ContainerLayoutExtern) {
+        if (switch_type->data.enumeration.non_exhaustive && instruction->have_underscore_prong) {
+            for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
+                TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
+                if (buf_eql_str(enum_field->name, "_"))
+                    continue;
+
+                auto entry = field_prev_uses.maybe_get(enum_field->value);
+                if (!entry) {
+                    ir_add_error(ira, &instruction->base,
+                        buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
+                            buf_ptr(enum_field->name)));
+                }
+            }
+        } else if (!instruction->have_else_prong) {
+            if (switch_type->data.enumeration.non_exhaustive) {
                 ir_add_error(ira, &instruction->base,
-                    buf_sprintf("switch on an extern enum must have an else prong"));
+                    buf_sprintf("switch on non-exhaustive enum must include `else` or `_` prong"));
             }
             for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
                 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
-- 
2.54.0


From b971c7d0ff1c0ef86ac8d6816eb5e115f0d648fa Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 20:40:56 +0200
Subject: [PATCH 002/116] update tests and translate-c

---
 src-self-hosted/translate_c.zig | 27 +++++++++++-----------
 test/compile_errors.zig         | 41 ++++++++++++++++++---------------
 test/stage1/behavior/cast.zig   |  1 -
 test/stage1/behavior/enum.zig   | 40 +++++++++++++++++++++++++-------
 test/translate_c.zig            | 11 +++++++++
 5 files changed, 78 insertions(+), 42 deletions(-)

diff --git a/src-self-hosted/translate_c.zig b/src-self-hosted/translate_c.zig
index a876b20b68ed92577fc4e78c36c38c622a067af8..ad58b6a916280cffd338ef380a5ef74872955203 100644
--- a/src-self-hosted/translate_c.zig
+++ b/src-self-hosted/translate_c.zig
@@ -440,7 +440,6 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
             .PrivateExtern => return failDecl(c, fn_decl_loc, fn_name, "unsupported storage class: private extern", .{}),
             .Auto => unreachable, // Not legal on functions
             .Register => unreachable, // Not legal on functions
-            else => unreachable,
         },
     };
 
@@ -953,6 +952,19 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
             tld_node.semicolon_token = try appendToken(c, .Semicolon, ";");
             try addTopLevelDecl(c, field_name, &tld_node.base);
         }
+        // make non exhaustive
+        const field_node = try c.a().create(ast.Node.ContainerField);
+        field_node.* = .{
+            .doc_comments = null,
+            .comptime_token = null,
+            .name_token = try appendIdentifier(c, "_"),
+            .type_expr = null,
+            .value_expr = null,
+            .align_expr = null,
+        };
+
+        try container_node.fields_and_decls.push(&field_node.base);
+        _ = try appendToken(c, .Comma, ",");
         container_node.rbrace_token = try appendToken(c, .RBrace, "}");
 
         break :blk &container_node.base;
@@ -1231,18 +1243,6 @@ fn transBinaryOperator(
             op_id = .BitOr;
             op_token = try appendToken(rp.c, .Pipe, "|");
         },
-        .Assign,
-        .MulAssign,
-        .DivAssign,
-        .RemAssign,
-        .AddAssign,
-        .SubAssign,
-        .ShlAssign,
-        .ShrAssign,
-        .AndAssign,
-        .XorAssign,
-        .OrAssign,
-        => unreachable,
         else => unreachable,
     }
 
@@ -1678,7 +1678,6 @@ fn transStringLiteral(
             "TODO: support string literal kind {}",
             .{kind},
         ),
-        else => unreachable,
     }
 }
 
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index 3ce5bd88019c13b1ebd5018bf7d2e5c3205b620b..e7ef53452a6303bd1d7bf83813295e399ab423d2 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -2,6 +2,28 @@ const tests = @import("tests.zig");
 const builtin = @import("builtin");
 
 pub fn addCases(cases: *tests.CompileErrorContext) void {
+    cases.addTest("non-exhaustive enums",
+        \\const E = enum {
+        \\    a,
+        \\    b,
+        \\    _,
+        \\};
+        \\pub export fn entry() void {
+        \\    var e: E = .b;
+        \\    switch (e) { // error: switch not handling the tag `b`
+        \\        .a => {},
+        \\        _ => {},
+        \\    }
+        \\    switch (e) { // error: switch on non-exhaustive enum must include `else` or `_` prong
+        \\        .a => {},
+        \\        .b => {},
+        \\    }
+        \\}
+    , &[_][]const u8{
+        "tmp.zig:8:5: error: enumeration value 'E.b' not handled in switch",
+        "tmp.zig:12:5: error: switch on non-exhaustive enum must include `else` or `_` prong",
+    });
+
     cases.addTest("@export with empty name string",
         \\pub export fn entry() void { }
         \\comptime {
@@ -139,25 +161,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         "tmp.zig:2:13: error: pointer type '[*]align(4) u8' requires aligned address",
     });
 
-    cases.add("switch on extern enum missing else prong",
-        \\const i = extern enum {
-        \\    n = 0,
-        \\    o = 2,
-        \\    p = 4,
-        \\    q = 4,
-        \\};
-        \\pub fn main() void {
-        \\    var x = @intToEnum(i, 52);
-        \\    switch (x) {
-        \\        .n,
-        \\        .o,
-        \\        .p => unreachable,
-        \\    }
-        \\}
-    , &[_][]const u8{
-        "tmp.zig:9:5: error: switch on an extern enum must have an else prong",
-    });
-
     cases.add("invalid float literal",
         \\const std = @import("std");
         \\
diff --git a/test/stage1/behavior/cast.zig b/test/stage1/behavior/cast.zig
index ae2530af6104e083f6a014a0d89a29e937e93f17..fe55b445a88c42527356db6dcb90fa9a4eac5ea2 100644
--- a/test/stage1/behavior/cast.zig
+++ b/test/stage1/behavior/cast.zig
@@ -618,7 +618,6 @@ test "peer resolution of string literals" {
                 .b => "two",
                 .c => "three",
                 .d => "four",
-                else => unreachable,
             };
             expect(mem.eql(u8, cmd, "two"));
         }
diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index d5bb2ddbb2ef057664349af48683fa986e15b3c2..c888722f27df9cf10fed6f6c56e6872f7a277b5e 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -11,17 +11,41 @@ test "extern enum" {
         };
         fn doTheTest(y: c_int) void {
             var x = i.o;
-            expect(@enumToInt(x) == 2);
-            x = @intToEnum(i, 12);
-            expect(@enumToInt(x) == 12);
-            x = @intToEnum(i, y);
-            expect(@enumToInt(x) == 52);
             switch (x) {
-                .n,
-                .o,
-                .p => unreachable,
+                .n, .p => unreachable,
+                .o => {},
+            }
+        }
+    };
+    S.doTheTest(52);
+    comptime S.doTheTest(52);
+}
+
+test "non-exhaustive enum" {
+    const S = struct {
+        const E = enum(u8) {
+            a,
+            b,
+            _,
+        };
+        fn doTheTest(y: u8) void {
+            var e: E = .b;
+            switch (e) {
+                .a => {},
+                .b => {},
+                _ => {},
+            }
+
+            switch (e) {
+                .a => {},
+                .b => {},
                 else => {},
             }
+            expect(@enumToInt(e) == 1);
+            e = @intToEnum(E, 12);
+            expect(@enumToInt(e) == 12);
+            e = @intToEnum(E, y);
+            expect(@enumToInt(e) == 52);
         }
     };
     S.doTheTest(52);
diff --git a/test/translate_c.zig b/test/translate_c.zig
index 16caa6e323464685dfd648a4a24ce79ecf84cd48..13779cb2fa0540c95f39536f265c49795425b71f 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -629,6 +629,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
             \\    VAL21 = 6917529027641081853,
             \\    VAL22 = 0,
             \\    VAL23 = -1,
+            \\    _,
             \\};
         });
     }
@@ -990,6 +991,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const FOO = @enumToInt(enum_enum_ty.FOO);
         \\pub const enum_enum_ty = extern enum {
         \\    FOO,
+        \\    _,
         \\};
         \\pub extern var my_enum: enum_enum_ty;
     });
@@ -1106,6 +1108,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    a,
         \\    b,
         \\    c,
+        \\    _,
         \\};
         \\pub const d = enum_unnamed_1;
         \\pub const e = @enumToInt(enum_unnamed_2.e);
@@ -1115,6 +1118,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    e = 0,
         \\    f = 4,
         \\    g = 5,
+        \\    _,
         \\};
         \\pub export var h: enum_unnamed_2 = @intToEnum(enum_unnamed_2, e);
         \\pub const i = @enumToInt(enum_unnamed_3.i);
@@ -1124,6 +1128,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    i,
         \\    j,
         \\    k,
+        \\    _,
         \\};
         \\pub const struct_Baz = extern struct {
         \\    l: enum_unnamed_3,
@@ -1136,6 +1141,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    n,
         \\    o,
         \\    p,
+        \\    _,
         \\};
     ,
         \\pub const Baz = struct_Baz;
@@ -1566,6 +1572,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\const enum_unnamed_1 = extern enum {
         \\    One,
         \\    Two,
+        \\    _,
         \\};
     });
 
@@ -1669,6 +1676,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    A,
         \\    B,
         \\    C,
+        \\    _,
         \\};
         \\pub const SomeTypedef = c_int;
         \\pub export fn and_or_non_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void) c_int {
@@ -1713,6 +1721,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const enum_Bar = extern enum {
         \\    A,
         \\    B,
+        \\    _,
         \\};
         \\pub extern fn func(a: [*c]struct_Foo, b: [*c][*c]enum_Bar) void;
     ,
@@ -1977,6 +1986,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    A,
         \\    B,
         \\    C,
+        \\    _,
         \\};
         \\pub export fn if_none_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void, arg_d: enum_SomeEnum) c_int {
         \\    var a = arg_a;
@@ -2418,6 +2428,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    A = 2,
         \\    B = 5,
         \\    @"1" = 6,
+        \\    _,
         \\};
     ,
         \\pub const Foo = enum_Foo;
-- 
2.54.0


From f3d174aa616401117927988dfc499a1762db01a3 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 21:38:11 +0200
Subject: [PATCH 003/116] require size for non-exhaustive enums

---
 src-self-hosted/translate_c.zig | 63 ++++++++++++++-------------------
 src/analyze.cpp                 |  8 +++++
 test/compile_errors.zig         | 25 ++++++++++++-
 test/translate_c.zig            | 20 +++++------
 4 files changed, 68 insertions(+), 48 deletions(-)

diff --git a/src-self-hosted/translate_c.zig b/src-self-hosted/translate_c.zig
index ad58b6a916280cffd338ef380a5ef74872955203..c726bf8cbf3b9a8f7f3ce204e9fe545d1d733272 100644
--- a/src-self-hosted/translate_c.zig
+++ b/src-self-hosted/translate_c.zig
@@ -289,8 +289,7 @@ pub fn translate(
     tree.errors = ast.Tree.ErrorList.init(arena);
 
     tree.root_node = try arena.create(ast.Node.Root);
-    tree.root_node.* = ast.Node.Root{
-        .base = ast.Node{ .id = ast.Node.Id.Root },
+    tree.root_node.* = .{
         .decls = ast.Node.Root.DeclList.init(arena),
         // initialized with the eof token at the end
         .eof_token = undefined,
@@ -876,25 +875,20 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
         // types, while that's not ISO-C compliant many compilers allow this and
         // default to the usual integer type used for all the enums.
 
-        // TODO only emit this tag type if the enum tag type is not the default.
-        // I don't know what the default is, need to figure out how clang is deciding.
-        // it appears to at least be different across gcc/msvc
-        if (int_type.ptr != null and
-            !isCBuiltinType(int_type, .UInt) and
-            !isCBuiltinType(int_type, .Int))
-        {
-            _ = try appendToken(c, .LParen, "(");
-            container_node.init_arg_expr = .{
-                .Type = transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
+        _ = try appendToken(c, .LParen, "(");
+        container_node.init_arg_expr = .{
+            .Type = if (int_type.ptr != null)
+                transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
                     error.UnsupportedType => {
                         try failDecl(c, enum_loc, name, "unable to translate enum tag type", .{});
                         return null;
                     },
                     else => |e| return e,
-                },
-            };
-            _ = try appendToken(c, .RParen, ")");
-        }
+                }
+            else
+                try transCreateNodeIdentifier(c, "c_int"),
+        };
+        _ = try appendToken(c, .RParen, ")");
 
         container_node.lbrace_token = try appendToken(c, .LBrace, "{");
 
@@ -2198,6 +2192,19 @@ fn transDoWhileLoop(
         .id = .Loop,
     };
 
+    // if (!cond) break;
+    const if_node = try transCreateNodeIf(rp.c);
+    var cond_scope = Scope{
+        .parent = scope,
+        .id = .Condition,
+    };
+    const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
+    prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
+    _ = try appendToken(rp.c, .RParen, ")");
+    if_node.condition = &prefix_op.base;
+    if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
+    _ = try appendToken(rp.c, .Semicolon, ";");
+
     const body_node = if (ZigClangStmt_getStmtClass(ZigClangDoStmt_getBody(stmt)) == .CompoundStmtClass) blk: {
         // there's already a block in C, so we'll append our condition to it.
         // c: do {
@@ -2209,10 +2216,7 @@ fn transDoWhileLoop(
         // zig:   b;
         // zig:   if (!cond) break;
         // zig: }
-        const body = (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;
-        // if this is used as an expression in Zig it needs to be immediately followed by a semicolon
-        _ = try appendToken(rp.c, .Semicolon, ";");
-        break :blk body;
+        break :blk (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;
     } else blk: {
         // the C statement is without a block, so we need to create a block to contain it.
         // c: do
@@ -2228,19 +2232,6 @@ fn transDoWhileLoop(
         break :blk block;
     };
 
-    // if (!cond) break;
-    const if_node = try transCreateNodeIf(rp.c);
-    var cond_scope = Scope{
-        .parent = scope,
-        .id = .Condition,
-    };
-    const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
-    prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
-    _ = try appendToken(rp.c, .RParen, ")");
-    if_node.condition = &prefix_op.base;
-    if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
-    _ = try appendToken(rp.c, .Semicolon, ";");
-
     try body_node.statements.push(&if_node.base);
     if (new)
         body_node.rbrace = try appendToken(rp.c, .RBrace, "}");
@@ -4775,8 +4766,7 @@ fn appendIdentifier(c: *Context, name: []const u8) !ast.TokenIndex {
 fn transCreateNodeIdentifier(c: *Context, name: []const u8) !*ast.Node {
     const token_index = try appendIdentifier(c, name);
     const identifier = try c.a().create(ast.Node.Identifier);
-    identifier.* = ast.Node.Identifier{
-        .base = ast.Node{ .id = ast.Node.Id.Identifier },
+    identifier.* = .{
         .token = token_index,
     };
     return &identifier.base;
@@ -4915,8 +4905,7 @@ fn transMacroFnDefine(c: *Context, it: *ctok.TokenList.Iterator, name: []const u
 
         const token_index = try appendToken(c, .Keyword_var, "var");
         const identifier = try c.a().create(ast.Node.Identifier);
-        identifier.* = ast.Node.Identifier{
-            .base = ast.Node{ .id = ast.Node.Id.Identifier },
+        identifier.* = .{
             .token = token_index,
         };
 
diff --git a/src/analyze.cpp b/src/analyze.cpp
index a62e0414e0da425da3d175130fc61aac843028f4..0b2b6ddeaa403b4b46622d38ed0af007a9705a3d 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2652,6 +2652,14 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
         AstNode *tag_value = field_node->data.struct_field.value;
 
         if (buf_eql_str(type_enum_field->name, "_")) {
+            if (decl_node->data.container_decl.init_arg_expr == nullptr) {
+                add_node_error(g, field_node, buf_sprintf("non-exhaustive enum must specify size"));
+                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+            }
+            if (log2_u64(field_count - 1) == enum_type->size_in_bits) {
+                add_node_error(g, field_node, buf_sprintf("non-exhaustive enum specifies every value"));
+                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+            }
             if (field_i != field_count - 1) {
                 add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
                 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index e7ef53452a6303bd1d7bf83813295e399ab423d2..9a76319af50f1d7c676031c7a82e9ec596fc4378 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -3,7 +3,30 @@ const builtin = @import("builtin");
 
 pub fn addCases(cases: *tests.CompileErrorContext) void {
     cases.addTest("non-exhaustive enums",
-        \\const E = enum {
+        \\const A = enum {
+        \\    a,
+        \\    b,
+        \\    _ = 1,
+        \\};
+        \\const B = enum(u1) {
+        \\    a,
+        \\    b,
+        \\    _,
+        \\    c,
+        \\};
+        \\pub export fn entry() void {
+        \\    _ = A;
+        \\    _ = B;
+        \\}
+    , &[_][]const u8{
+        "tmp.zig:4:5: error: non-exhaustive enum must specify size",
+        "error: value assigned to '_' field of non-exhaustive enum",
+        "error: non-exhaustive enum specifies every value",
+        "error: '_' field of non-exhaustive enum must be last",
+    });
+
+    cases.addTest("switching with non-exhaustive enums",
+        \\const E = enum(u8) {
         \\    a,
         \\    b,
         \\    _,
diff --git a/test/translate_c.zig b/test/translate_c.zig
index 13779cb2fa0540c95f39536f265c49795425b71f..adee4c9a4d92a2334180d6f831810d71f41ed9d6 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -989,7 +989,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\enum enum_ty { FOO };
     , &[_][]const u8{
         \\pub const FOO = @enumToInt(enum_enum_ty.FOO);
-        \\pub const enum_enum_ty = extern enum {
+        \\pub const enum_enum_ty = extern enum(c_int) {
         \\    FOO,
         \\    _,
         \\};
@@ -1104,7 +1104,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const a = @enumToInt(enum_unnamed_1.a);
         \\pub const b = @enumToInt(enum_unnamed_1.b);
         \\pub const c = @enumToInt(enum_unnamed_1.c);
-        \\const enum_unnamed_1 = extern enum {
+        \\const enum_unnamed_1 = extern enum(c_uint) {
         \\    a,
         \\    b,
         \\    c,
@@ -1114,7 +1114,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const e = @enumToInt(enum_unnamed_2.e);
         \\pub const f = @enumToInt(enum_unnamed_2.f);
         \\pub const g = @enumToInt(enum_unnamed_2.g);
-        \\const enum_unnamed_2 = extern enum {
+        \\const enum_unnamed_2 = extern enum(c_uint) {
         \\    e = 0,
         \\    f = 4,
         \\    g = 5,
@@ -1124,7 +1124,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const i = @enumToInt(enum_unnamed_3.i);
         \\pub const j = @enumToInt(enum_unnamed_3.j);
         \\pub const k = @enumToInt(enum_unnamed_3.k);
-        \\const enum_unnamed_3 = extern enum {
+        \\const enum_unnamed_3 = extern enum(c_uint) {
         \\    i,
         \\    j,
         \\    k,
@@ -1137,7 +1137,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const n = @enumToInt(enum_i.n);
         \\pub const o = @enumToInt(enum_i.o);
         \\pub const p = @enumToInt(enum_i.p);
-        \\pub const enum_i = extern enum {
+        \\pub const enum_i = extern enum(c_uint) {
         \\    n,
         \\    o,
         \\    p,
@@ -1569,7 +1569,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
     , &[_][]const u8{
         \\pub const One = @enumToInt(enum_unnamed_1.One);
         \\pub const Two = @enumToInt(enum_unnamed_1.Two);
-        \\const enum_unnamed_1 = extern enum {
+        \\const enum_unnamed_1 = extern enum(c_uint) {
         \\    One,
         \\    Two,
         \\    _,
@@ -1672,7 +1672,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    return ((((((((((e + f) + g) + h) + i) + j) + k) + l) + m) + o) + p);
         \\}
     , &[_][]const u8{
-        \\pub const enum_Foo = extern enum {
+        \\pub const enum_Foo = extern enum(c_uint) {
         \\    A,
         \\    B,
         \\    C,
@@ -1718,7 +1718,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    y: c_int,
         \\};
     ,
-        \\pub const enum_Bar = extern enum {
+        \\pub const enum_Bar = extern enum(c_uint) {
         \\    A,
         \\    B,
         \\    _,
@@ -1982,7 +1982,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    return 4;
         \\}
     , &[_][]const u8{
-        \\pub const enum_SomeEnum = extern enum {
+        \\pub const enum_SomeEnum = extern enum(c_uint) {
         \\    A,
         \\    B,
         \\    C,
@@ -2424,7 +2424,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const FooA = @enumToInt(enum_Foo.A);
         \\pub const FooB = @enumToInt(enum_Foo.B);
         \\pub const Foo1 = @enumToInt(enum_Foo.@"1");
-        \\pub const enum_Foo = extern enum {
+        \\pub const enum_Foo = extern enum(c_uint) {
         \\    A = 2,
         \\    B = 5,
         \\    @"1" = 6,
-- 
2.54.0


From c57784aa15b50a9f38482154170924babab19c03 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 21:50:12 +0200
Subject: [PATCH 004/116] add is_exhaustive field to typeinfo

---
 lib/std/builtin.zig           | 1 +
 src/ir.cpp                    | 7 ++++++-
 test/stage1/behavior/enum.zig | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index dbd19fbadf2a17f4b285a52fa83c50dd3702421c..4b80b381007ef5fdb9748ed9c27dfbb25bb0bcb0 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -253,6 +253,7 @@ pub const TypeInfo = union(enum) {
         tag_type: type,
         fields: []EnumField,
         decls: []Declaration,
+        is_exhaustive: bool,
     };
 
     /// This data structure is used by the Zig language code generation and
diff --git a/src/ir.cpp b/src/ir.cpp
index 6876214510a8d7875bdef981bc287f8ebcfc3371..08f80e064758ad4e7dcfec3ffaf6f5e8f7b3d24f 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -23107,7 +23107,7 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
                 result->special = ConstValSpecialStatic;
                 result->type = ir_type_info_get_type(ira, "Enum", nullptr);
 
-                ZigValue **fields = alloc_const_vals_ptrs(4);
+                ZigValue **fields = alloc_const_vals_ptrs(5);
                 result->data.x_struct.fields = fields;
 
                 // layout: ContainerLayout
@@ -23153,6 +23153,11 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
                 {
                     return err;
                 }
+                // is_exhaustive: bool
+                ensure_field_index(result->type, "is_exhaustive", 4);
+                fields[4]->special = ConstValSpecialStatic;
+                fields[4]->type = ira->codegen->builtin_types.entry_bool;
+                fields[4]->data.x_bool = !type_entry->data.enumeration.non_exhaustive;
 
                 break;
             }
diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index c888722f27df9cf10fed6f6c56e6872f7a277b5e..82e57a3a38951fd48f46defb9f367f3a72a5e027 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -46,6 +46,7 @@ test "non-exhaustive enum" {
             expect(@enumToInt(e) == 12);
             e = @intToEnum(E, y);
             expect(@enumToInt(e) == 52);
+            expect(@typeInfo(E).Enum.is_exhaustive == false);
         }
     };
     S.doTheTest(52);
-- 
2.54.0


From 5c2238fc4ad1d10f0620c931d369005b53742eb7 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 22:09:19 +0200
Subject: [PATCH 005/116] small fixes

* error for '_' prong on exhaustive enum
* todo panic for `@tagName`  on non-exhaustive enum
* don't require '_' field on tagged unions
---
 src/analyze.cpp | 2 +-
 src/codegen.cpp | 2 ++
 src/ir.cpp      | 8 +++++++-
 3 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/analyze.cpp b/src/analyze.cpp
index 0b2b6ddeaa403b4b46622d38ed0af007a9705a3d..7669e0890b72effe5605ed5a64db25b203907449 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -3293,7 +3293,7 @@ static Error resolve_union_zero_bits(CodeGen *g, ZigType *union_type) {
     } else if (enum_type_node != nullptr) {
         for (uint32_t i = 0; i < tag_type->data.enumeration.src_field_count; i += 1) {
             TypeEnumField *enum_field = &tag_type->data.enumeration.fields[i];
-            if (!covered_enum_fields[i]) {
+            if (!covered_enum_fields[i] && !buf_eql_str(enum_field->name, "_")) {
                 AstNode *enum_decl_node = tag_type->data.enumeration.decl_node;
                 AstNode *field_node = enum_decl_node->data.container_decl.fields.at(i);
                 ErrorMsg *msg = add_node_error(g, decl_node,
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 0dc820be51eb53a1653efb1c27598911aaa537d2..42fd188824274b7379c8f14de206fbb15481d05b 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -5065,6 +5065,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
 {
     ZigType *enum_type = instruction->target->value->type;
     assert(enum_type->id == ZigTypeIdEnum);
+    if (enum_type->data.enumeration.non_exhaustive)
+        zig_panic("TODO @tagName on non-exhaustive enum");
 
     LLVMValueRef enum_name_function = get_enum_tag_name_function(g, enum_type);
 
diff --git a/src/ir.cpp b/src/ir.cpp
index 08f80e064758ad4e7dcfec3ffaf6f5e8f7b3d24f..7aa3243c343b301e8161696259b356766975f3fa 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -22357,6 +22357,8 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
     if (instr_is_comptime(target)) {
         if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
             return ira->codegen->invalid_instruction;
+        if (target->value->type->data.enumeration.non_exhaustive)
+            zig_panic("TODO @tagName on non-exhaustive enum");
         TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
         ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
         IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
@@ -26471,7 +26473,11 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
                 bigint_incr(&field_index);
             }
         }
-        if (switch_type->data.enumeration.non_exhaustive && instruction->have_underscore_prong) {
+        if (instruction->have_underscore_prong) {
+            if (!switch_type->data.enumeration.non_exhaustive){
+                ir_add_error(ira, &instruction->base,
+                    buf_sprintf("switch on non-exhaustive enum has `_` prong"));
+            }
             for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
                 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
                 if (buf_eql_str(enum_field->name, "_"))
-- 
2.54.0


From 02e5cb1cd4203219ae753e94c7e14cd18a918b49 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Wed, 15 Jan 2020 23:05:52 +0200
Subject: [PATCH 006/116] add non-exhaustive enum to langref

---
 doc/langref.html.in     | 44 +++++++++++++++++++++++++++++++++++++++++
 test/compile_errors.zig |  3 +--
 2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/doc/langref.html.in b/doc/langref.html.in
index 442e4ac52b52f8e6088ae3d40c64f697baa05d4e..dbe98ce70884d888c5a9498b38ceba4eac7d3e65 100644
--- a/doc/langref.html.in
+++ b/doc/langref.html.in
@@ -2893,6 +2893,50 @@ test "switch using enum literals" {
 }
       {#code_end#}
       {#header_close#}
+
+      {#header_open|Non-exhaustive enum#}
+      <p>
+      A Non-exhaustive enum can be created by adding a trailing '_' field.
+      It  must specify a tag type and cannot consume every enumeration value.
+      </p>
+      <p>
+      {#link|@intToEnum#} on a non-exhaustive enum cannot fail.
+      </p>
+      <p>
+      A switch on a non-exhaustive enum can include a '_' prong with the following properties:
+      <ul>
+        <li>makes it a compile error if all the known tag names are not handled by the switch</li>
+        <li>allows omitting {#syntax#}else{#endsyntax#}</li>
+      </ul>
+      </p>
+      {#code_begin|test#}
+const std = @import("std");
+const assert = std.debug.assert;
+
+const Number = enum(u8) {
+    One,
+    Two,
+    Three,
+    _,
+};
+
+test "switch on non-exhaustive enum" {
+    const number = Number.One;
+    const result = switch (number) {
+        .One => true,
+        .Two,
+        .Three => false,
+        _ => false,
+    };
+    assert(result);
+    const is_one = switch (number) {
+        .One => true,
+        else => false,
+    };
+    assert(is_one);
+}
+      {#code_end#}
+      {#header_close#}
       {#header_close#}
 
       {#header_open|union#}
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index 9a76319af50f1d7c676031c7a82e9ec596fc4378..702cc7652491342b511169d6554789ed71d26049 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -10,9 +10,8 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         \\};
         \\const B = enum(u1) {
         \\    a,
-        \\    b,
         \\    _,
-        \\    c,
+        \\    b,
         \\};
         \\pub export fn entry() void {
         \\    _ = A;
-- 
2.54.0


From d84569895c80136d9b081a319301a737f342d251 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Thu, 16 Jan 2020 09:04:11 +0200
Subject: [PATCH 007/116] turn panics into compile errors, require at least 1
 field in non-exhaustive enum

---
 doc/langref.html.in |  7 ++-----
 src/analyze.cpp     |  3 ++-
 src/codegen.cpp     |  7 +++++--
 src/ir.cpp          | 32 ++++++++++++++++----------------
 4 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/doc/langref.html.in b/doc/langref.html.in
index dbe98ce70884d888c5a9498b38ceba4eac7d3e65..cac01c5686a5f2cd1471dd7b73fb30a12e2f5148 100644
--- a/doc/langref.html.in
+++ b/doc/langref.html.in
@@ -2903,11 +2903,8 @@ test "switch using enum literals" {
       {#link|@intToEnum#} on a non-exhaustive enum cannot fail.
       </p>
       <p>
-      A switch on a non-exhaustive enum can include a '_' prong with the following properties:
-      <ul>
-        <li>makes it a compile error if all the known tag names are not handled by the switch</li>
-        <li>allows omitting {#syntax#}else{#endsyntax#}</li>
-      </ul>
+      A switch on a non-exhaustive enum can include a '_' prong as an alternative to an {#syntax#}else{#endsyntax#} prong
+      with the difference being that it makes it a compile error if all the known tag names are not handled by the switch.
       </p>
       {#code_begin|test#}
 const std = @import("std");
diff --git a/src/analyze.cpp b/src/analyze.cpp
index 7669e0890b72effe5605ed5a64db25b203907449..a9aaf74a85113eaf5799d7a22bd694b5273a84be 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2560,7 +2560,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
 
     assert(!enum_type->data.enumeration.fields);
     uint32_t field_count = (uint32_t)decl_node->data.container_decl.fields.length;
-    if (field_count == 0) {
+    if (field_count == 0 || (field_count == 1 &&
+        buf_eql_str(decl_node->data.container_decl.fields.at(0)->data.struct_field.name, "_"))) {
         add_node_error(g, decl_node, buf_sprintf("enums must have 1 or more fields"));
 
         enum_type->data.enumeration.src_field_count = field_count;
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 42fd188824274b7379c8f14de206fbb15481d05b..030e892d4530af74c74b51da2f57f44f06494247 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -5065,8 +5065,11 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
 {
     ZigType *enum_type = instruction->target->value->type;
     assert(enum_type->id == ZigTypeIdEnum);
-    if (enum_type->data.enumeration.non_exhaustive)
-        zig_panic("TODO @tagName on non-exhaustive enum");
+    if (enum_type->data.enumeration.non_exhaustive) {
+        add_node_error(g, instruction->base.source_node,
+            buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
+        codegen_report_errors_and_exit(g);
+    }
 
     LLVMValueRef enum_name_function = get_enum_tag_name_function(g, enum_type);
 
diff --git a/src/ir.cpp b/src/ir.cpp
index 7aa3243c343b301e8161696259b356766975f3fa..43ca01113bdde0f1cfdb83a57120d411236a9694 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -8183,13 +8183,6 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                     return irb->codegen->invalid_instruction;
                 }
                 else_prong = prong_node;
-                if (underscore_prong) {
-                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
-                            buf_sprintf("else and '_' prong in switch expression"));
-                    add_error_note(irb->codegen, msg, underscore_prong,
-                            buf_sprintf("'_' prong is here"));
-                    return irb->codegen->invalid_instruction;
-                }
             } else if (prong_item_count == 1 && 
                     prong_node->data.switch_prong.items.at(0)->type == NodeTypeSymbol &&
                     buf_eql_str(prong_node->data.switch_prong.items.at(0)->data.symbol_expr.symbol, "_")) {
@@ -8201,15 +8194,19 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                     return irb->codegen->invalid_instruction;
                 }
                 underscore_prong = prong_node;
-                if (else_prong) {
-                    ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
-                            buf_sprintf("else and '_' prong in switch expression"));
+            } else {
+                continue;
+            }
+           if (underscore_prong && else_prong) {
+                ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
+                        buf_sprintf("else and '_' prong in switch expression"));
+                if (underscore_prong == prong_node)
                     add_error_note(irb->codegen, msg, else_prong,
                             buf_sprintf("else prong is here"));
-                    return irb->codegen->invalid_instruction;
-                }
-            } else {
-                continue;
+                else
+                    add_error_note(irb->codegen, msg, underscore_prong,
+                            buf_sprintf("'_' prong is here"));
+                return irb->codegen->invalid_instruction;
             }
             ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
@@ -22357,8 +22354,11 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
     if (instr_is_comptime(target)) {
         if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
             return ira->codegen->invalid_instruction;
-        if (target->value->type->data.enumeration.non_exhaustive)
-            zig_panic("TODO @tagName on non-exhaustive enum");
+        if (target->value->type->data.enumeration.non_exhaustive) {
+            add_node_error(ira->codegen, instruction->base.source_node,
+                buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
+            return ira->codegen->invalid_instruction;
+        }
         TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
         ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
         IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
-- 
2.54.0


From cb257b4e11768ccce93d7cf11c416fa8e745f206 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Thu, 16 Jan 2020 09:23:26 +0200
Subject: [PATCH 008/116] allow non-exhaustive enums with no fields

---
 src/analyze.cpp | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/analyze.cpp b/src/analyze.cpp
index a9aaf74a85113eaf5799d7a22bd694b5273a84be..18dc7e032c37e334906c7967d14df356808b1ca7 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2560,8 +2560,7 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
 
     assert(!enum_type->data.enumeration.fields);
     uint32_t field_count = (uint32_t)decl_node->data.container_decl.fields.length;
-    if (field_count == 0 || (field_count == 1 &&
-        buf_eql_str(decl_node->data.container_decl.fields.at(0)->data.struct_field.name, "_"))) {
+    if (field_count == 0) {
         add_node_error(g, decl_node, buf_sprintf("enums must have 1 or more fields"));
 
         enum_type->data.enumeration.src_field_count = field_count;
@@ -2657,7 +2656,7 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
                 add_node_error(g, field_node, buf_sprintf("non-exhaustive enum must specify size"));
                 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
             }
-            if (log2_u64(field_count - 1) == enum_type->size_in_bits) {
+            if (field_count > 1 && log2_u64(field_count - 1) == enum_type->size_in_bits) {
                 add_node_error(g, field_node, buf_sprintf("non-exhaustive enum specifies every value"));
                 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
             }
-- 
2.54.0


From 6450736c5f9039565802e1f898a8fd402ba12c63 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Thu, 16 Jan 2020 12:50:44 +0200
Subject: [PATCH 009/116] translate-c default enum tag type to c_int

---
 src-self-hosted/translate_c.zig |  5 ++++-
 test/translate_c.zig            | 18 +++++++++---------
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/src-self-hosted/translate_c.zig b/src-self-hosted/translate_c.zig
index c726bf8cbf3b9a8f7f3ce204e9fe545d1d733272..2d5774f4523e7dc7e164fb0e0ebb043d86183999 100644
--- a/src-self-hosted/translate_c.zig
+++ b/src-self-hosted/translate_c.zig
@@ -875,9 +875,12 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
         // types, while that's not ISO-C compliant many compilers allow this and
         // default to the usual integer type used for all the enums.
 
+        // default to c_int since msvc and gcc default to different types
         _ = try appendToken(c, .LParen, "(");
         container_node.init_arg_expr = .{
-            .Type = if (int_type.ptr != null)
+            .Type = if (int_type.ptr != null and
+                !isCBuiltinType(int_type, .UInt) and
+                !isCBuiltinType(int_type, .Int))
                 transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
                     error.UnsupportedType => {
                         try failDecl(c, enum_loc, name, "unable to translate enum tag type", .{});
diff --git a/test/translate_c.zig b/test/translate_c.zig
index adee4c9a4d92a2334180d6f831810d71f41ed9d6..df33d9b145f14fb9baab40bea31bbf70d51708de 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -1104,7 +1104,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const a = @enumToInt(enum_unnamed_1.a);
         \\pub const b = @enumToInt(enum_unnamed_1.b);
         \\pub const c = @enumToInt(enum_unnamed_1.c);
-        \\const enum_unnamed_1 = extern enum(c_uint) {
+        \\const enum_unnamed_1 = extern enum(c_int) {
         \\    a,
         \\    b,
         \\    c,
@@ -1114,7 +1114,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const e = @enumToInt(enum_unnamed_2.e);
         \\pub const f = @enumToInt(enum_unnamed_2.f);
         \\pub const g = @enumToInt(enum_unnamed_2.g);
-        \\const enum_unnamed_2 = extern enum(c_uint) {
+        \\const enum_unnamed_2 = extern enum(c_int) {
         \\    e = 0,
         \\    f = 4,
         \\    g = 5,
@@ -1124,7 +1124,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const i = @enumToInt(enum_unnamed_3.i);
         \\pub const j = @enumToInt(enum_unnamed_3.j);
         \\pub const k = @enumToInt(enum_unnamed_3.k);
-        \\const enum_unnamed_3 = extern enum(c_uint) {
+        \\const enum_unnamed_3 = extern enum(c_int) {
         \\    i,
         \\    j,
         \\    k,
@@ -1137,7 +1137,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const n = @enumToInt(enum_i.n);
         \\pub const o = @enumToInt(enum_i.o);
         \\pub const p = @enumToInt(enum_i.p);
-        \\pub const enum_i = extern enum(c_uint) {
+        \\pub const enum_i = extern enum(c_int) {
         \\    n,
         \\    o,
         \\    p,
@@ -1569,7 +1569,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
     , &[_][]const u8{
         \\pub const One = @enumToInt(enum_unnamed_1.One);
         \\pub const Two = @enumToInt(enum_unnamed_1.Two);
-        \\const enum_unnamed_1 = extern enum(c_uint) {
+        \\const enum_unnamed_1 = extern enum(c_int) {
         \\    One,
         \\    Two,
         \\    _,
@@ -1672,7 +1672,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    return ((((((((((e + f) + g) + h) + i) + j) + k) + l) + m) + o) + p);
         \\}
     , &[_][]const u8{
-        \\pub const enum_Foo = extern enum(c_uint) {
+        \\pub const enum_Foo = extern enum(c_int) {
         \\    A,
         \\    B,
         \\    C,
@@ -1718,7 +1718,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    y: c_int,
         \\};
     ,
-        \\pub const enum_Bar = extern enum(c_uint) {
+        \\pub const enum_Bar = extern enum(c_int) {
         \\    A,
         \\    B,
         \\    _,
@@ -1982,7 +1982,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    return 4;
         \\}
     , &[_][]const u8{
-        \\pub const enum_SomeEnum = extern enum(c_uint) {
+        \\pub const enum_SomeEnum = extern enum(c_int) {
         \\    A,
         \\    B,
         \\    C,
@@ -2424,7 +2424,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\pub const FooA = @enumToInt(enum_Foo.A);
         \\pub const FooB = @enumToInt(enum_Foo.B);
         \\pub const Foo1 = @enumToInt(enum_Foo.@"1");
-        \\pub const enum_Foo = extern enum(c_uint) {
+        \\pub const enum_Foo = extern enum(c_int) {
         \\    A = 2,
         \\    B = 5,
         \\    @"1" = 6,
-- 
2.54.0


From 6c8f01dcde03380806338758d489c3f2a78e5b5b Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Thu, 16 Jan 2020 22:48:01 +0200
Subject: [PATCH 010/116] correct field count

---
 src/analyze.cpp               | 60 ++++++++++++++++++-----------------
 test/compile_errors.zig       |  6 ++++
 test/stage1/behavior/enum.zig |  1 +
 3 files changed, 38 insertions(+), 29 deletions(-)

diff --git a/src/analyze.cpp b/src/analyze.cpp
index 18dc7e032c37e334906c7967d14df356808b1ca7..e064677a09c5743a43ee827e7bbabc03779df88e 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2569,16 +2569,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
         return ErrorSemanticAnalyzeFail;
     }
 
-    enum_type->data.enumeration.src_field_count = field_count;
-    enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
-    enum_type->data.enumeration.fields_by_name.init(field_count);
-    enum_type->data.enumeration.non_exhaustive = false;
-
     Scope *scope = &enum_type->data.enumeration.decls_scope->base;
 
-    HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
-    occupied_tag_values.init(field_count);
-
     ZigType *tag_int_type;
     if (enum_type->data.enumeration.layout == ContainerLayoutExtern) {
         tag_int_type = get_c_int_type(g, CIntTypeInt);
@@ -2620,6 +2612,7 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
         }
     }
 
+    enum_type->data.enumeration.non_exhaustive = false;
     enum_type->data.enumeration.tag_int_type = tag_int_type;
     enum_type->size_in_bits = tag_int_type->size_in_bits;
     enum_type->abi_size = tag_int_type->abi_size;
@@ -2628,6 +2621,31 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
     BigInt bi_one;
     bigint_init_unsigned(&bi_one, 1);
 
+    AstNode *last_field_node = decl_node->data.container_decl.fields.at(field_count - 1);
+    if (buf_eql_str(last_field_node->data.struct_field.name, "_")) {
+        field_count -= 1;
+        if (field_count > 1 && log2_u64(field_count) == enum_type->size_in_bits) {
+            add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum specifies every value"));
+            enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+        }
+        if (decl_node->data.container_decl.init_arg_expr == nullptr) {
+            add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum must specify size"));
+            enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+        }
+        if (last_field_node->data.struct_field.value != nullptr) {
+            add_node_error(g, last_field_node, buf_sprintf("value assigned to '_' field of non-exhaustive enum"));
+            enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
+        }
+        enum_type->data.enumeration.non_exhaustive = true;
+    }
+
+    enum_type->data.enumeration.src_field_count = field_count;
+    enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
+    enum_type->data.enumeration.fields_by_name.init(field_count);
+
+    HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
+    occupied_tag_values.init(field_count);
+
     TypeEnumField *last_enum_field = nullptr;
 
     for (uint32_t field_i = 0; field_i < field_count; field_i += 1) {
@@ -2649,27 +2667,9 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
                     buf_sprintf("consider 'union(enum)' here"));
         }
 
-        AstNode *tag_value = field_node->data.struct_field.value;
-
         if (buf_eql_str(type_enum_field->name, "_")) {
-            if (decl_node->data.container_decl.init_arg_expr == nullptr) {
-                add_node_error(g, field_node, buf_sprintf("non-exhaustive enum must specify size"));
-                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
-            }
-            if (field_count > 1 && log2_u64(field_count - 1) == enum_type->size_in_bits) {
-                add_node_error(g, field_node, buf_sprintf("non-exhaustive enum specifies every value"));
-                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
-            }
-            if (field_i != field_count - 1) {
-                add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
-                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
-            }
-            if (tag_value != nullptr) {
-                add_node_error(g, field_node, buf_sprintf("value assigned to '_' field of non-exhaustive enum"));
-                enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
-            }
-            enum_type->data.enumeration.non_exhaustive = true;
-            continue;
+            add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
+            enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
         }
 
         auto field_entry = enum_type->data.enumeration.fields_by_name.put_unique(type_enum_field->name, type_enum_field);
@@ -2681,6 +2681,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
             continue;
         }
 
+        AstNode *tag_value = field_node->data.struct_field.value;
+
         if (tag_value != nullptr) {
             // A user-specified value is available
             ZigValue *result = analyze_const_value(g, scope, tag_value, tag_int_type,
@@ -3293,7 +3295,7 @@ static Error resolve_union_zero_bits(CodeGen *g, ZigType *union_type) {
     } else if (enum_type_node != nullptr) {
         for (uint32_t i = 0; i < tag_type->data.enumeration.src_field_count; i += 1) {
             TypeEnumField *enum_field = &tag_type->data.enumeration.fields[i];
-            if (!covered_enum_fields[i] && !buf_eql_str(enum_field->name, "_")) {
+            if (!covered_enum_fields[i]) {
                 AstNode *enum_decl_node = tag_type->data.enumeration.decl_node;
                 AstNode *field_node = enum_decl_node->data.container_decl.fields.at(i);
                 ErrorMsg *msg = add_node_error(g, decl_node,
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index 702cc7652491342b511169d6554789ed71d26049..be2a40d74dc55ea5c1a9222eff8e34814ec335d6 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -13,9 +13,15 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         \\    _,
         \\    b,
         \\};
+        \\const C = enum(u1) {
+        \\    a,
+        \\    b,
+        \\    _,
+        \\};
         \\pub export fn entry() void {
         \\    _ = A;
         \\    _ = B;
+        \\    _ = C;
         \\}
     , &[_][]const u8{
         "tmp.zig:4:5: error: non-exhaustive enum must specify size",
diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index 82e57a3a38951fd48f46defb9f367f3a72a5e027..62b7d51c2647595fd53d1a9041dcd71f150d0913 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -41,6 +41,7 @@ test "non-exhaustive enum" {
                 .b => {},
                 else => {},
             }
+            expect(@typeInfo(E).Enum.fields.len == 2);
             expect(@enumToInt(e) == 1);
             e = @intToEnum(E, 12);
             expect(@enumToInt(e) == 12);
-- 
2.54.0


From 97cca1376aa5d5ed6ae699cc67b3c5e4b97f11bf Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Fri, 17 Jan 2020 00:35:34 -0500
Subject: [PATCH 011/116] cmake: fix install lib path message

---
 CMakeLists.txt | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 47a0cdf57827da3b8f0a5be3082c6e8f9e03af9c..bebd59c1e0d3075ec1f1844b0bd9708745e0aea4 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -609,12 +609,12 @@ else()
 endif()
 
 set(BUILD_LIBUSERLAND_COMMAND zig0 build
-        --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
-        "-Doutput-dir=${CMAKE_BINARY_DIR}"
-        "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
-        "-Dlib-files-only"
-        --prefix "${CMAKE_INSTALL_PREFIX}"
-        libuserland
+    --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
+    "-Doutput-dir=${CMAKE_BINARY_DIR}"
+    "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
+    "-Dlib-files-only"
+    --prefix "${CMAKE_INSTALL_PREFIX}"
+    libuserland
 )
 
 # When using Visual Studio build system generator we default to libuserland install.
@@ -647,6 +647,6 @@ add_dependencies(zig zig_build_libuserland)
 
 install(TARGETS zig DESTINATION bin)
 
-# CODE has no effect with Visual Studio build system generator
-install(CODE "message(\"-- Installing: /opt/zig/lib\")")
+# CODE has no effect with Visual Studio build system generator.
+install(CODE "message(\"-- Installing: ${CMAKE_INSTALL_PREFIX}/lib\")")
 install(CODE "execute_process(COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)")
-- 
2.54.0


From af9eb7ac13b522c1880357ae7349a0b984b83ab4 Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Fri, 17 Jan 2020 00:19:59 -0500
Subject: [PATCH 012/116] doc: update contributing

---
 CONTRIBUTING.md | 33 +++++++++++++++++++--------------
 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index a5aeeb9e21aba8f978351152e6333ec21c665219..62b8083222eb781c8a5579d39d292bae581201ff 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -51,23 +51,28 @@ knowledge of Zig internals.**
 
 ### Editing Source Code
 
-First, build the Stage 1 compiler as described in [the Building section](#building).
+First, build the Stage 1 compiler as described in [Building from Source](README.md#Building-from-Source).
 
-One modification you may want to make is adding `-DZIG_SKIP_INSTALL_LIB_FILES=ON`
-to the cmake line. If you use the build directory as a working directory to run
-tests with, zig will find the lib files in the source directory, and they will not
-be "installed" every time you run `make`. This will allow you to make modifications
-directly to the standard library, for example, and have them effective immediately.
-Note that if you already ran `make` or `make install` with the default cmake
-settings, there will already be a `lib/` directory in your build directory. When
-executed from the build directory, zig will find this instead of the source lib/
-directory. Remove the unwanted directory so that the desired one can be found.
+Zig locates lib files relative to executable path by searching up the
+filesystem tree for a sub-path of `lib/zig/std/std.zig` or `lib/std/std.zig`.
+Typically the former is an install and the latter a git working tree which
+contains the build directory.
+
+During development it is not necessary to perform installs when modifying
+stage1 or userland sources and in fact it is faster and simpler to run,
+test and debug from a git working tree.
+
+- `make` is typically sufficient to build zig during development iterations.
+- `make install` performs a build __and__ install.
+- `msbuild -p:Configuration=Release INSTALL.vcxproj` on Windows performs a
+build and install. To avoid install, pass cmake option `-DZIG_SKIP_INSTALL_LIB_FILES=ON`.
 
 To test changes, do the following from the build directory:
 
-1. Run `make install` (on POSIX) or
+1. Run `make` (on POSIX) or
    `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).
-2. `bin/zig build test` (on POSIX) or `bin\zig.exe build test` (on Windows).
+2. `$BUILD_DIR/zig build test` (on POSIX) or
+   `$BUILD_DIR/Release\zig.exe build test` (on Windows).
 
 That runs the whole test suite, which does a lot of extra testing that you
 likely won't always need, and can take upwards of 1 hour. This is what the
@@ -85,8 +90,8 @@ Another example is choosing a different set of things to test. For example,
 not the other ones. Combining this suggestion with the previous one, you could
 do this:
 
-`bin/zig build test-std -Dskip-release` (on POSIX) or
-`bin\zig.exe build test-std -Dskip-release` (on Windows).
+`$BUILD_DIR/bin/zig build test-std -Dskip-release` (on POSIX) or
+`$BUILD_DIR/Release\zig.exe build test-std -Dskip-release` (on Windows).
 
 This will run only the standard library tests, in debug mode only, for all
 targets (it will cross-compile the tests for non-native targets but not run
-- 
2.54.0


From 39f92a9ee4ea109628e1f7d5a65bb53575e53194 Mon Sep 17 00:00:00 2001
From: Vexu <git@vexu.eu>
Date: Fri, 17 Jan 2020 09:50:20 +0200
Subject: [PATCH 013/116] improve behavior test

---
 test/stage1/behavior/enum.zig | 33 ++++++++++++++++++++++-----------
 1 file changed, 22 insertions(+), 11 deletions(-)

diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index 62b7d51c2647595fd53d1a9041dcd71f150d0913..83ad76b72cd059a44429ae65e8bc06f1ce1dd9dc 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -30,19 +30,30 @@ test "non-exhaustive enum" {
         };
         fn doTheTest(y: u8) void {
             var e: E = .b;
-            switch (e) {
-                .a => {},
-                .b => {},
-                _ => {},
-            }
+            expect(switch (e) {
+                .a => false,
+                .b => true,
+                _ => false,
+            });
+            e = @intToEnum(E, 12);
+            expect(switch (e) {
+                .a => false,
+                .b => false,
+                _ => true,
+            });
+
+            expect(switch (e) {
+                .a => false,
+                .b => false,
+                else => true,
+            });
+            e = .b;
+            expect(switch (e) {
+                .a => false,
+                else => true,
+            });
 
-            switch (e) {
-                .a => {},
-                .b => {},
-                else => {},
-            }
             expect(@typeInfo(E).Enum.fields.len == 2);
-            expect(@enumToInt(e) == 1);
             e = @intToEnum(E, 12);
             expect(@enumToInt(e) == 12);
             e = @intToEnum(E, y);
-- 
2.54.0


From d53e8a5751c3d3a65db775598cc1db88c4d92ba9 Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Fri, 17 Jan 2020 13:02:44 -0500
Subject: [PATCH 014/116] Revert "cmake: support `make` and `make install`"

This reverts commit cd062b08d01cf2c92b05ef3e96b2ff3715f29fd5.
---
 CMakeLists.txt  | 35 ++++++++++++-----------------------
 CONTRIBUTING.md | 33 ++++++++++++++-------------------
 2 files changed, 26 insertions(+), 42 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index bebd59c1e0d3075ec1f1844b0bd9708745e0aea4..64aa7d1bd406e47e0fbb40303880905e30391b02 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -45,6 +45,7 @@ message("Configuring zig version ${ZIG_VERSION}")
 
 set(ZIG_STATIC off CACHE BOOL "Attempt to build a static zig executable (not compatible with glibc)")
 set(ZIG_STATIC_LLVM off CACHE BOOL "Prefer linking against static LLVM libraries")
+set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
 set(ZIG_ENABLE_MEM_PROFILE off CACHE BOOL "Activate memory usage instrumentation")
 
 if(ZIG_STATIC)
@@ -607,26 +608,19 @@ if("${CMAKE_BUILD_TYPE}" STREQUAL "Debug")
 else()
     set(LIBUSERLAND_RELEASE_MODE "true")
 endif()
-
-set(BUILD_LIBUSERLAND_COMMAND zig0 build
-    --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
-    "-Doutput-dir=${CMAKE_BINARY_DIR}"
-    "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
-    "-Dlib-files-only"
-    --prefix "${CMAKE_INSTALL_PREFIX}"
-    libuserland
-)
-
-# When using Visual Studio build system generator we default to libuserland install.
-if(MSVC)
-    set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
-    if(NOT ZIG_SKIP_INSTALL_LIB_FILES)
-        set(BUILD_LIBUSERLAND_COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)
-    endif()
+if(ZIG_SKIP_INSTALL_LIB_FILES)
+    set(ZIG_BUILD_INSTALL_STEP "")
+else()
+    set(ZIG_BUILD_INSTALL_STEP "install")
 endif()
-
 add_custom_target(zig_build_libuserland ALL
-    COMMAND ${BUILD_LIBUSERLAND_COMMAND}
+    COMMAND zig0 build
+        --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
+        libuserland ${ZIG_BUILD_INSTALL_STEP}
+        "-Doutput-dir=${CMAKE_BINARY_DIR}"
+        "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
+        "-Dlib-files-only"
+        --prefix "${CMAKE_INSTALL_PREFIX}"
     DEPENDS zig0
     BYPRODUCTS "${LIBUSERLAND}"
     WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
@@ -644,9 +638,4 @@ elseif(MINGW)
   target_link_libraries(zig ntdll)
 endif()
 add_dependencies(zig zig_build_libuserland)
-
 install(TARGETS zig DESTINATION bin)
-
-# CODE has no effect with Visual Studio build system generator.
-install(CODE "message(\"-- Installing: ${CMAKE_INSTALL_PREFIX}/lib\")")
-install(CODE "execute_process(COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)")
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 62b8083222eb781c8a5579d39d292bae581201ff..a5aeeb9e21aba8f978351152e6333ec21c665219 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -51,28 +51,23 @@ knowledge of Zig internals.**
 
 ### Editing Source Code
 
-First, build the Stage 1 compiler as described in [Building from Source](README.md#Building-from-Source).
+First, build the Stage 1 compiler as described in [the Building section](#building).
 
-Zig locates lib files relative to executable path by searching up the
-filesystem tree for a sub-path of `lib/zig/std/std.zig` or `lib/std/std.zig`.
-Typically the former is an install and the latter a git working tree which
-contains the build directory.
-
-During development it is not necessary to perform installs when modifying
-stage1 or userland sources and in fact it is faster and simpler to run,
-test and debug from a git working tree.
-
-- `make` is typically sufficient to build zig during development iterations.
-- `make install` performs a build __and__ install.
-- `msbuild -p:Configuration=Release INSTALL.vcxproj` on Windows performs a
-build and install. To avoid install, pass cmake option `-DZIG_SKIP_INSTALL_LIB_FILES=ON`.
+One modification you may want to make is adding `-DZIG_SKIP_INSTALL_LIB_FILES=ON`
+to the cmake line. If you use the build directory as a working directory to run
+tests with, zig will find the lib files in the source directory, and they will not
+be "installed" every time you run `make`. This will allow you to make modifications
+directly to the standard library, for example, and have them effective immediately.
+Note that if you already ran `make` or `make install` with the default cmake
+settings, there will already be a `lib/` directory in your build directory. When
+executed from the build directory, zig will find this instead of the source lib/
+directory. Remove the unwanted directory so that the desired one can be found.
 
 To test changes, do the following from the build directory:
 
-1. Run `make` (on POSIX) or
+1. Run `make install` (on POSIX) or
    `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).
-2. `$BUILD_DIR/zig build test` (on POSIX) or
-   `$BUILD_DIR/Release\zig.exe build test` (on Windows).
+2. `bin/zig build test` (on POSIX) or `bin\zig.exe build test` (on Windows).
 
 That runs the whole test suite, which does a lot of extra testing that you
 likely won't always need, and can take upwards of 1 hour. This is what the
@@ -90,8 +85,8 @@ Another example is choosing a different set of things to test. For example,
 not the other ones. Combining this suggestion with the previous one, you could
 do this:
 
-`$BUILD_DIR/bin/zig build test-std -Dskip-release` (on POSIX) or
-`$BUILD_DIR/Release\zig.exe build test-std -Dskip-release` (on Windows).
+`bin/zig build test-std -Dskip-release` (on POSIX) or
+`bin\zig.exe build test-std -Dskip-release` (on Windows).
 
 This will run only the standard library tests, in debug mode only, for all
 targets (it will cross-compile the tests for non-native targets but not run
-- 
2.54.0


From d9be6e5dc693fcbcb5f4c343a3d2b0b9fc786e25 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C3=ABl=20Larouche?= <michael.larouche@gmail.com>
Date: Sat, 11 Jan 2020 17:10:00 -0500
Subject: [PATCH 015/116] Port clzsi2 from compiler_rt, required for using
 std.fmt.format on some ARM architecture.

---
 lib/std/special/compiler_rt.zig             |   6 +-
 lib/std/special/compiler_rt/clzsi2.zig      | 118 ++++++++
 lib/std/special/compiler_rt/clzsi2_test.zig | 292 ++++++++++++++++++++
 3 files changed, 415 insertions(+), 1 deletion(-)
 create mode 100644 lib/std/special/compiler_rt/clzsi2.zig
 create mode 100644 lib/std/special/compiler_rt/clzsi2_test.zig

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index cf255804aa6a5083524338b63856d1584205ce0c..9b225dbad6b992f405d8da468b2de27f326dd007 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -146,6 +146,8 @@ comptime {
     @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });
     @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });
 
+    @export(@import("compiler_rt/clzsi2.zig").__clzsi2, .{ .name = "__clzsi2", .linkage = linkage });
+
     if (is_arm_arch and !is_arm_64 and !is_test) {
         @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });
         @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });
@@ -177,7 +179,9 @@ comptime {
         @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });
         @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });
 
-        @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
+        if (builtin.os == .linux) {
+            @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
+        }
 
         @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });
         @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });
diff --git a/lib/std/special/compiler_rt/clzsi2.zig b/lib/std/special/compiler_rt/clzsi2.zig
new file mode 100644
index 0000000000000000000000000000000000000000..0cbfdb8db19fdd5f155975ed31365750f1cc2d8d
--- /dev/null
+++ b/lib/std/special/compiler_rt/clzsi2.zig
@@ -0,0 +1,118 @@
+// Ported from:
+//
+// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/clzsi2.c
+// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/arm/clzsi2.S
+const builtin = @import("builtin");
+
+// Precondition: a != 0
+fn __clzsi2_generic(a: i32) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+
+    var x = @bitCast(u32, a);
+    var n: i32 = 32;
+
+    // Count first bit set using binary search, from Hacker's Delight
+    var y: u32 = 0;
+    inline for ([_]i32{ 16, 8, 4, 2, 1 }) |shift| {
+        y = x >> shift;
+        if (y != 0) {
+            n = n - shift;
+            x = y;
+        }
+    }
+
+    return n - @bitCast(i32, x);
+}
+
+fn __clzsi2_arm_clz(a: i32) callconv(.Naked) noreturn {
+    asm volatile (
+        \\ clz r0,r0
+        \\ bx lr
+    );
+    unreachable;
+}
+
+fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
+    asm volatile (
+        \\ // Assumption: n != 0
+        \\ // r0: n
+        \\ // r1: count of leading zeros in n + 1
+        \\ // r2: scratch register for shifted r0
+        \\ mov r1, #1
+        \\
+        \\ // Basic block:
+        \\ // if ((r0 >> SHIFT) == 0)
+        \\ //   r1 += SHIFT;
+        \\ // else
+        \\ //   r0 >>= SHIFT;
+        \\ // for descending powers of two as SHIFT.
+        \\ lsrs r2, r0, #16
+        \\ movne r0, r2
+        \\ addeq r1, #16
+        \\
+        \\ lsrs r2, r0, #8
+        \\ movne r0, r2
+        \\ addeq r1, #8
+        \\
+        \\ lsrs r2, r0, #4
+        \\ movne r0, r2
+        \\ addeq r1, #4
+        \\
+        \\ lsrs r2, r0, #2
+        \\ movne r0, r2
+        \\ addeq r1, #2
+        \\
+        \\ // The basic block invariants at this point are (r0 >> 2) == 0 and
+        \\ // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
+        \\ //
+        \\ // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)f
+        \\ // ---+----------------+----------------+------------+--------------
+        \\ // 1  | 1              | 0              | 0          | 1
+        \\ // 2  | 0              | 1              | -1         | 0
+        \\ // 3  | 0              | 1              | -1         | 0
+        \\ //
+        \\ // The r1's initial value of 1 compensates for the 1 here.
+        \\ sub r0, r1, r0, lsr #1
+        \\ bx lr
+    );
+    unreachable;
+}
+
+const can_use_arm_clz = switch (builtin.arch) {
+    .arm, .armeb => |sub_arch| switch (sub_arch) {
+        .v4t => false,
+        .v6m => false,
+        else => true,
+    },
+    .thumb, .thumbeb => |sub_arch| switch (sub_arch) {
+        .v6,
+        .v6k,
+        .v5,
+        .v5te,
+        .v4t,
+        => false,
+        else => true,
+    },
+    else => false,
+};
+
+const is_arm32_no_thumb = switch (builtin.arch) {
+    builtin.Arch.arm,
+    builtin.Arch.armeb,
+    => true,
+    else => false,
+};
+
+pub const __clzsi2 = blk: {
+    if (comptime can_use_arm_clz) {
+        break :blk __clzsi2_arm_clz;
+    } else if (comptime is_arm32_no_thumb) {
+        break :blk __clzsi2_arm32;
+    } else {
+        break :blk __clzsi2_generic;
+    }
+};
+
+test "test clzsi2" {
+    _ = @import("clzsi2_test.zig");
+}
diff --git a/lib/std/special/compiler_rt/clzsi2_test.zig b/lib/std/special/compiler_rt/clzsi2_test.zig
new file mode 100644
index 0000000000000000000000000000000000000000..ff944558460c5f5f90ed052fa3779733b4fb87d1
--- /dev/null
+++ b/lib/std/special/compiler_rt/clzsi2_test.zig
@@ -0,0 +1,292 @@
+const clzsi2 = @import("clzsi2.zig");
+const testing = @import("std").testing;
+
+fn test__clzsi2(a: u32, expected: i32) void {
+    var nakedClzsi2 = clzsi2.__clzsi2;
+    var actualClzsi2 = @ptrCast(fn (a: i32) callconv(.C) i32, nakedClzsi2);
+    var x = @intCast(i32, a);
+    var result = actualClzsi2(x);
+    testing.expectEqual(expected, result);
+}
+
+test "clzsi2" {
+    test__clzsi2(0x00800000, 8);
+    test__clzsi2(0x01000000, 7);
+    test__clzsi2(0x02000000, 6);
+    test__clzsi2(0x03000000, 6);
+    test__clzsi2(0x04000000, 5);
+    test__clzsi2(0x05000000, 5);
+    test__clzsi2(0x06000000, 5);
+    test__clzsi2(0x07000000, 5);
+    test__clzsi2(0x08000000, 4);
+    test__clzsi2(0x09000000, 4);
+    test__clzsi2(0x0A000000, 4);
+    test__clzsi2(0x0B000000, 4);
+    test__clzsi2(0x0C000000, 4);
+    test__clzsi2(0x0D000000, 4);
+    test__clzsi2(0x0E000000, 4);
+    test__clzsi2(0x0F000000, 4);
+    test__clzsi2(0x10000000, 3);
+    test__clzsi2(0x11000000, 3);
+    test__clzsi2(0x12000000, 3);
+    test__clzsi2(0x13000000, 3);
+    test__clzsi2(0x14000000, 3);
+    test__clzsi2(0x15000000, 3);
+    test__clzsi2(0x16000000, 3);
+    test__clzsi2(0x17000000, 3);
+    test__clzsi2(0x18000000, 3);
+    test__clzsi2(0x19000000, 3);
+    test__clzsi2(0x1A000000, 3);
+    test__clzsi2(0x1B000000, 3);
+    test__clzsi2(0x1C000000, 3);
+    test__clzsi2(0x1D000000, 3);
+    test__clzsi2(0x1E000000, 3);
+    test__clzsi2(0x1F000000, 3);
+    test__clzsi2(0x20000000, 2);
+    test__clzsi2(0x21000000, 2);
+    test__clzsi2(0x22000000, 2);
+    test__clzsi2(0x23000000, 2);
+    test__clzsi2(0x24000000, 2);
+    test__clzsi2(0x25000000, 2);
+    test__clzsi2(0x26000000, 2);
+    test__clzsi2(0x27000000, 2);
+    test__clzsi2(0x28000000, 2);
+    test__clzsi2(0x29000000, 2);
+    test__clzsi2(0x2A000000, 2);
+    test__clzsi2(0x2B000000, 2);
+    test__clzsi2(0x2C000000, 2);
+    test__clzsi2(0x2D000000, 2);
+    test__clzsi2(0x2E000000, 2);
+    test__clzsi2(0x2F000000, 2);
+    test__clzsi2(0x30000000, 2);
+    test__clzsi2(0x31000000, 2);
+    test__clzsi2(0x32000000, 2);
+    test__clzsi2(0x33000000, 2);
+    test__clzsi2(0x34000000, 2);
+    test__clzsi2(0x35000000, 2);
+    test__clzsi2(0x36000000, 2);
+    test__clzsi2(0x37000000, 2);
+    test__clzsi2(0x38000000, 2);
+    test__clzsi2(0x39000000, 2);
+    test__clzsi2(0x3A000000, 2);
+    test__clzsi2(0x3B000000, 2);
+    test__clzsi2(0x3C000000, 2);
+    test__clzsi2(0x3D000000, 2);
+    test__clzsi2(0x3E000000, 2);
+    test__clzsi2(0x3F000000, 2);
+    test__clzsi2(0x40000000, 1);
+    test__clzsi2(0x41000000, 1);
+    test__clzsi2(0x42000000, 1);
+    test__clzsi2(0x43000000, 1);
+    test__clzsi2(0x44000000, 1);
+    test__clzsi2(0x45000000, 1);
+    test__clzsi2(0x46000000, 1);
+    test__clzsi2(0x47000000, 1);
+    test__clzsi2(0x48000000, 1);
+    test__clzsi2(0x49000000, 1);
+    test__clzsi2(0x4A000000, 1);
+    test__clzsi2(0x4B000000, 1);
+    test__clzsi2(0x4C000000, 1);
+    test__clzsi2(0x4D000000, 1);
+    test__clzsi2(0x4E000000, 1);
+    test__clzsi2(0x4F000000, 1);
+    test__clzsi2(0x50000000, 1);
+    test__clzsi2(0x51000000, 1);
+    test__clzsi2(0x52000000, 1);
+    test__clzsi2(0x53000000, 1);
+    test__clzsi2(0x54000000, 1);
+    test__clzsi2(0x55000000, 1);
+    test__clzsi2(0x56000000, 1);
+    test__clzsi2(0x57000000, 1);
+    test__clzsi2(0x58000000, 1);
+    test__clzsi2(0x59000000, 1);
+    test__clzsi2(0x5A000000, 1);
+    test__clzsi2(0x5B000000, 1);
+    test__clzsi2(0x5C000000, 1);
+    test__clzsi2(0x5D000000, 1);
+    test__clzsi2(0x5E000000, 1);
+    test__clzsi2(0x5F000000, 1);
+    test__clzsi2(0x60000000, 1);
+    test__clzsi2(0x61000000, 1);
+    test__clzsi2(0x62000000, 1);
+    test__clzsi2(0x63000000, 1);
+    test__clzsi2(0x64000000, 1);
+    test__clzsi2(0x65000000, 1);
+    test__clzsi2(0x66000000, 1);
+    test__clzsi2(0x67000000, 1);
+    test__clzsi2(0x68000000, 1);
+    test__clzsi2(0x69000000, 1);
+    test__clzsi2(0x6A000000, 1);
+    test__clzsi2(0x6B000000, 1);
+    test__clzsi2(0x6C000000, 1);
+    test__clzsi2(0x6D000000, 1);
+    test__clzsi2(0x6E000000, 1);
+    test__clzsi2(0x6F000000, 1);
+    test__clzsi2(0x70000000, 1);
+    test__clzsi2(0x71000000, 1);
+    test__clzsi2(0x72000000, 1);
+    test__clzsi2(0x73000000, 1);
+    test__clzsi2(0x74000000, 1);
+    test__clzsi2(0x75000000, 1);
+    test__clzsi2(0x76000000, 1);
+    test__clzsi2(0x77000000, 1);
+    test__clzsi2(0x78000000, 1);
+    test__clzsi2(0x79000000, 1);
+    test__clzsi2(0x7A000000, 1);
+    test__clzsi2(0x7B000000, 1);
+    test__clzsi2(0x7C000000, 1);
+    test__clzsi2(0x7D000000, 1);
+    test__clzsi2(0x7E000000, 1);
+    test__clzsi2(0x7F000000, 1);
+    test__clzsi2(0x80000000, 0);
+    test__clzsi2(0x81000000, 0);
+    test__clzsi2(0x82000000, 0);
+    test__clzsi2(0x83000000, 0);
+    test__clzsi2(0x84000000, 0);
+    test__clzsi2(0x85000000, 0);
+    test__clzsi2(0x86000000, 0);
+    test__clzsi2(0x87000000, 0);
+    test__clzsi2(0x88000000, 0);
+    test__clzsi2(0x89000000, 0);
+    test__clzsi2(0x8A000000, 0);
+    test__clzsi2(0x8B000000, 0);
+    test__clzsi2(0x8C000000, 0);
+    test__clzsi2(0x8D000000, 0);
+    test__clzsi2(0x8E000000, 0);
+    test__clzsi2(0x8F000000, 0);
+    test__clzsi2(0x90000000, 0);
+    test__clzsi2(0x91000000, 0);
+    test__clzsi2(0x92000000, 0);
+    test__clzsi2(0x93000000, 0);
+    test__clzsi2(0x94000000, 0);
+    test__clzsi2(0x95000000, 0);
+    test__clzsi2(0x96000000, 0);
+    test__clzsi2(0x97000000, 0);
+    test__clzsi2(0x98000000, 0);
+    test__clzsi2(0x99000000, 0);
+    test__clzsi2(0x9A000000, 0);
+    test__clzsi2(0x9B000000, 0);
+    test__clzsi2(0x9C000000, 0);
+    test__clzsi2(0x9D000000, 0);
+    test__clzsi2(0x9E000000, 0);
+    test__clzsi2(0x9F000000, 0);
+    test__clzsi2(0xA0000000, 0);
+    test__clzsi2(0xA1000000, 0);
+    test__clzsi2(0xA2000000, 0);
+    test__clzsi2(0xA3000000, 0);
+    test__clzsi2(0xA4000000, 0);
+    test__clzsi2(0xA5000000, 0);
+    test__clzsi2(0xA6000000, 0);
+    test__clzsi2(0xA7000000, 0);
+    test__clzsi2(0xA8000000, 0);
+    test__clzsi2(0xA9000000, 0);
+    test__clzsi2(0xAA000000, 0);
+    test__clzsi2(0xAB000000, 0);
+    test__clzsi2(0xAC000000, 0);
+    test__clzsi2(0xAD000000, 0);
+    test__clzsi2(0xAE000000, 0);
+    test__clzsi2(0xAF000000, 0);
+    test__clzsi2(0xB0000000, 0);
+    test__clzsi2(0xB1000000, 0);
+    test__clzsi2(0xB2000000, 0);
+    test__clzsi2(0xB3000000, 0);
+    test__clzsi2(0xB4000000, 0);
+    test__clzsi2(0xB5000000, 0);
+    test__clzsi2(0xB6000000, 0);
+    test__clzsi2(0xB7000000, 0);
+    test__clzsi2(0xB8000000, 0);
+    test__clzsi2(0xB9000000, 0);
+    test__clzsi2(0xBA000000, 0);
+    test__clzsi2(0xBB000000, 0);
+    test__clzsi2(0xBC000000, 0);
+    test__clzsi2(0xBD000000, 0);
+    test__clzsi2(0xBE000000, 0);
+    test__clzsi2(0xBF000000, 0);
+    test__clzsi2(0xC0000000, 0);
+    test__clzsi2(0xC1000000, 0);
+    test__clzsi2(0xC2000000, 0);
+    test__clzsi2(0xC3000000, 0);
+    test__clzsi2(0xC4000000, 0);
+    test__clzsi2(0xC5000000, 0);
+    test__clzsi2(0xC6000000, 0);
+    test__clzsi2(0xC7000000, 0);
+    test__clzsi2(0xC8000000, 0);
+    test__clzsi2(0xC9000000, 0);
+    test__clzsi2(0xCA000000, 0);
+    test__clzsi2(0xCB000000, 0);
+    test__clzsi2(0xCC000000, 0);
+    test__clzsi2(0xCD000000, 0);
+    test__clzsi2(0xCE000000, 0);
+    test__clzsi2(0xCF000000, 0);
+    test__clzsi2(0xD0000000, 0);
+    test__clzsi2(0xD1000000, 0);
+    test__clzsi2(0xD2000000, 0);
+    test__clzsi2(0xD3000000, 0);
+    test__clzsi2(0xD4000000, 0);
+    test__clzsi2(0xD5000000, 0);
+    test__clzsi2(0xD6000000, 0);
+    test__clzsi2(0xD7000000, 0);
+    test__clzsi2(0xD8000000, 0);
+    test__clzsi2(0xD9000000, 0);
+    test__clzsi2(0xDA000000, 0);
+    test__clzsi2(0xDB000000, 0);
+    test__clzsi2(0xDC000000, 0);
+    test__clzsi2(0xDD000000, 0);
+    test__clzsi2(0xDE000000, 0);
+    test__clzsi2(0xDF000000, 0);
+    test__clzsi2(0xE0000000, 0);
+    test__clzsi2(0xE1000000, 0);
+    test__clzsi2(0xE2000000, 0);
+    test__clzsi2(0xE3000000, 0);
+    test__clzsi2(0xE4000000, 0);
+    test__clzsi2(0xE5000000, 0);
+    test__clzsi2(0xE6000000, 0);
+    test__clzsi2(0xE7000000, 0);
+    test__clzsi2(0xE8000000, 0);
+    test__clzsi2(0xE9000000, 0);
+    test__clzsi2(0xEA000000, 0);
+    test__clzsi2(0xEB000000, 0);
+    test__clzsi2(0xEC000000, 0);
+    test__clzsi2(0xED000000, 0);
+    test__clzsi2(0xEE000000, 0);
+    test__clzsi2(0xEF000000, 0);
+    test__clzsi2(0xF0000000, 0);
+    test__clzsi2(0xF1000000, 0);
+    test__clzsi2(0xF2000000, 0);
+    test__clzsi2(0xF3000000, 0);
+    test__clzsi2(0xF4000000, 0);
+    test__clzsi2(0xF5000000, 0);
+    test__clzsi2(0xF6000000, 0);
+    test__clzsi2(0xF7000000, 0);
+    test__clzsi2(0xF8000000, 0);
+    test__clzsi2(0xF9000000, 0);
+    test__clzsi2(0xFA000000, 0);
+    test__clzsi2(0xFB000000, 0);
+    test__clzsi2(0xFC000000, 0);
+    test__clzsi2(0xFD000000, 0);
+    test__clzsi2(0xFE000000, 0);
+    test__clzsi2(0xFF000000, 0);
+    test__clzsi2(0x00000001, 31);
+    test__clzsi2(0x00000002, 30);
+    test__clzsi2(0x00000004, 29);
+    test__clzsi2(0x00000008, 28);
+    test__clzsi2(0x00000010, 27);
+    test__clzsi2(0x00000020, 26);
+    test__clzsi2(0x00000040, 25);
+    test__clzsi2(0x00000080, 24);
+    test__clzsi2(0x00000100, 23);
+    test__clzsi2(0x00000200, 22);
+    test__clzsi2(0x00000400, 21);
+    test__clzsi2(0x00000800, 20);
+    test__clzsi2(0x00001000, 19);
+    test__clzsi2(0x00002000, 18);
+    test__clzsi2(0x00004000, 17);
+    test__clzsi2(0x00008000, 16);
+    test__clzsi2(0x00010000, 15);
+    test__clzsi2(0x00020000, 14);
+    test__clzsi2(0x00040000, 13);
+    test__clzsi2(0x00080000, 12);
+    test__clzsi2(0x00100000, 11);
+    test__clzsi2(0x00200000, 10);
+    test__clzsi2(0x00400000, 9);
+}
-- 
2.54.0


From b9f4ac86efc8bd1e53c75d204aa6f08c2df58be3 Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Fri, 17 Jan 2020 19:39:43 -0500
Subject: [PATCH 016/116] cmake: support `make` and `make install`

(2nd attempt to get this right)
---
 CMakeLists.txt      | 41 +++++++++++++++++++++++++++++------------
 CONTRIBUTING.md     | 33 +++++++++++++++++++--------------
 cmake/install.cmake | 37 +++++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+), 26 deletions(-)
 create mode 100644 cmake/install.cmake

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 64aa7d1bd406e47e0fbb40303880905e30391b02..269541202874725477ffe7a632e0bf4c395399c8 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -45,7 +45,6 @@ message("Configuring zig version ${ZIG_VERSION}")
 
 set(ZIG_STATIC off CACHE BOOL "Attempt to build a static zig executable (not compatible with glibc)")
 set(ZIG_STATIC_LLVM off CACHE BOOL "Prefer linking against static LLVM libraries")
-set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
 set(ZIG_ENABLE_MEM_PROFILE off CACHE BOOL "Activate memory usage instrumentation")
 
 if(ZIG_STATIC)
@@ -608,19 +607,26 @@ if("${CMAKE_BUILD_TYPE}" STREQUAL "Debug")
 else()
     set(LIBUSERLAND_RELEASE_MODE "true")
 endif()
-if(ZIG_SKIP_INSTALL_LIB_FILES)
-    set(ZIG_BUILD_INSTALL_STEP "")
-else()
-    set(ZIG_BUILD_INSTALL_STEP "install")
+
+set(BUILD_LIBUSERLAND_ARGS "build"
+    --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
+    "-Doutput-dir=${CMAKE_BINARY_DIR}"
+    "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
+    "-Dlib-files-only"
+    --prefix "${CMAKE_INSTALL_PREFIX}"
+    libuserland
+)
+
+# When using Visual Studio build system generator we default to libuserland install.
+if(MSVC)
+    set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
+    if(NOT ZIG_SKIP_INSTALL_LIB_FILES)
+        set(BUILD_LIBUSERLAND_ARGS ${BUILD_LIBUSERLAND_ARGS} install)
+    endif()
 endif()
+
 add_custom_target(zig_build_libuserland ALL
-    COMMAND zig0 build
-        --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
-        libuserland ${ZIG_BUILD_INSTALL_STEP}
-        "-Doutput-dir=${CMAKE_BINARY_DIR}"
-        "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
-        "-Dlib-files-only"
-        --prefix "${CMAKE_INSTALL_PREFIX}"
+    COMMAND zig0 ${BUILD_LIBUSERLAND_ARGS}
     DEPENDS zig0
     BYPRODUCTS "${LIBUSERLAND}"
     WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
@@ -638,4 +644,15 @@ elseif(MINGW)
   target_link_libraries(zig ntdll)
 endif()
 add_dependencies(zig zig_build_libuserland)
+
 install(TARGETS zig DESTINATION bin)
+
+# CODE has no effect with Visual Studio build system generator.
+if(NOT MSVC)
+    get_target_property(zig0_BINARY_DIR zig0 BINARY_DIR)
+    install(CODE "set(zig0_EXE \"${zig0_BINARY_DIR}/zig0\")")
+    install(CODE "set(INSTALL_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\" install)")
+    install(CODE "set(BUILD_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\")")
+    install(CODE "set(CMAKE_SOURCE_DIR \"${CMAKE_SOURCE_DIR}\")")
+    install(SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/cmake/install.cmake)
+endif()
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index a5aeeb9e21aba8f978351152e6333ec21c665219..62b8083222eb781c8a5579d39d292bae581201ff 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -51,23 +51,28 @@ knowledge of Zig internals.**
 
 ### Editing Source Code
 
-First, build the Stage 1 compiler as described in [the Building section](#building).
+First, build the Stage 1 compiler as described in [Building from Source](README.md#Building-from-Source).
 
-One modification you may want to make is adding `-DZIG_SKIP_INSTALL_LIB_FILES=ON`
-to the cmake line. If you use the build directory as a working directory to run
-tests with, zig will find the lib files in the source directory, and they will not
-be "installed" every time you run `make`. This will allow you to make modifications
-directly to the standard library, for example, and have them effective immediately.
-Note that if you already ran `make` or `make install` with the default cmake
-settings, there will already be a `lib/` directory in your build directory. When
-executed from the build directory, zig will find this instead of the source lib/
-directory. Remove the unwanted directory so that the desired one can be found.
+Zig locates lib files relative to executable path by searching up the
+filesystem tree for a sub-path of `lib/zig/std/std.zig` or `lib/std/std.zig`.
+Typically the former is an install and the latter a git working tree which
+contains the build directory.
+
+During development it is not necessary to perform installs when modifying
+stage1 or userland sources and in fact it is faster and simpler to run,
+test and debug from a git working tree.
+
+- `make` is typically sufficient to build zig during development iterations.
+- `make install` performs a build __and__ install.
+- `msbuild -p:Configuration=Release INSTALL.vcxproj` on Windows performs a
+build and install. To avoid install, pass cmake option `-DZIG_SKIP_INSTALL_LIB_FILES=ON`.
 
 To test changes, do the following from the build directory:
 
-1. Run `make install` (on POSIX) or
+1. Run `make` (on POSIX) or
    `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).
-2. `bin/zig build test` (on POSIX) or `bin\zig.exe build test` (on Windows).
+2. `$BUILD_DIR/zig build test` (on POSIX) or
+   `$BUILD_DIR/Release\zig.exe build test` (on Windows).
 
 That runs the whole test suite, which does a lot of extra testing that you
 likely won't always need, and can take upwards of 1 hour. This is what the
@@ -85,8 +90,8 @@ Another example is choosing a different set of things to test. For example,
 not the other ones. Combining this suggestion with the previous one, you could
 do this:
 
-`bin/zig build test-std -Dskip-release` (on POSIX) or
-`bin\zig.exe build test-std -Dskip-release` (on Windows).
+`$BUILD_DIR/bin/zig build test-std -Dskip-release` (on POSIX) or
+`$BUILD_DIR/Release\zig.exe build test-std -Dskip-release` (on Windows).
 
 This will run only the standard library tests, in debug mode only, for all
 targets (it will cross-compile the tests for non-native targets but not run
diff --git a/cmake/install.cmake b/cmake/install.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..415a088d6a21474f0105bf5d84af1385cfd93a86
--- /dev/null
+++ b/cmake/install.cmake
@@ -0,0 +1,37 @@
+message("-- Installing: ${CMAKE_INSTALL_PREFIX}/lib")
+
+if(NOT EXISTS ${zig0_EXE})
+    message("::")
+    message(":: ERROR: Executable not found")
+    message(":: (execute_process)")
+    message("::")
+    message(":: executable: ${zig0_EXE}")
+    message("::")
+    message(FATAL_ERROR)
+endif()
+
+execute_process(COMMAND ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS}
+    WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
+    RESULT_VARIABLE _result
+)
+if(_result)
+    message("::")
+    message(":: ERROR: ${_result}")
+    message(":: (execute_process)")
+
+    string(REPLACE ";" " " s_INSTALL_LIBUSERLAND_ARGS "${INSTALL_LIBUSERLAND_ARGS}")
+    message("::")
+    message(":: argv: ${zig0_EXE} ${s_INSTALL_LIBUSERLAND_ARGS} install")
+
+    set(_args ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS})
+    list(LENGTH _args _len)
+    math(EXPR _len "${_len} - 1")
+    message("::")
+    foreach(_i RANGE 0 ${_len})
+        list(GET _args ${_i} _arg)
+        message(":: argv[${_i}]: ${_arg}")
+    endforeach()
+
+    message("::")
+    message(FATAL_ERROR)
+endif()
-- 
2.54.0


From 5f2bac010df0a2cf1e36622d6742baf13f4ffe75 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 09:55:18 +0100
Subject: [PATCH 017/116] Allow @tagName on enum literals

Closes #4214
---
 src/ir.cpp                    | 12 ++++++++++--
 test/stage1/behavior/enum.zig |  5 +++++
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/ir.cpp b/src/ir.cpp
index 88b4c1a832196f38baaf55aab2e481613eb007c5..7f6a1963c56c90f0c4510aef54f5c6251a32bba1 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -21389,9 +21389,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
     if (type_is_invalid(value->value->type))
         return ira->codegen->invalid_instruction;
 
-    if (value->value->type->id == ZigTypeIdEnum) {
+    if (value->value->type->id == ZigTypeIdEnum ||
+        value->value->type->id == ZigTypeIdEnumLiteral)
         return value;
-    }
 
     if (value->value->type->id != ZigTypeIdUnion) {
         ir_add_error(ira, value,
@@ -22352,6 +22352,14 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
     if (type_is_invalid(target->value->type))
         return ira->codegen->invalid_instruction;
 
+    if (target->value->type->id == ZigTypeIdEnumLiteral) {
+        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        Buf *field_name = target->value->data.x_enum_literal;
+        ZigValue *array_val = create_const_str_lit(ira->codegen, field_name)->data.x_ptr.data.ref.pointee;
+        init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field_name), true);
+        return result;
+    }
+
     assert(target->value->type->id == ZigTypeIdEnum);
 
     if (instr_is_comptime(target)) {
diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index 83ad76b72cd059a44429ae65e8bc06f1ce1dd9dc..5532a3ddf5e5e151ad2f5aa986eb43d1862a4ce1 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -1094,3 +1094,8 @@ test "enum with one member default to u0 tag type" {
     };
     comptime expect(@TagType(E0) == u0);
 }
+
+test "tagName on enum literals" {
+    expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
+    comptime expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
+}
-- 
2.54.0


From c53d94e5127a8dcfefd906c5be0e6b81eaf3d22c Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 15:13:21 +0100
Subject: [PATCH 018/116] Prevent crash with empty non-exhaustive enum

---
 src/analyze.cpp               |  2 +-
 src/ir.cpp                    |  2 +-
 test/stage1/behavior/enum.zig | 20 ++++++++++++++++++++
 3 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/analyze.cpp b/src/analyze.cpp
index e064677a09c5743a43ee827e7bbabc03779df88e..0bbec66a9b214a9e79bdda4c43572235582c4571 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -8312,7 +8312,7 @@ static void resolve_llvm_types_enum(CodeGen *g, ZigType *enum_type, ResolveStatu
 
     uint32_t field_count = enum_type->data.enumeration.src_field_count;
 
-    assert(enum_type->data.enumeration.fields);
+    assert(field_count == 0 || enum_type->data.enumeration.fields != nullptr);
     ZigLLVMDIEnumerator **di_enumerators = allocate<ZigLLVMDIEnumerator*>(field_count);
 
     for (uint32_t i = 0; i < field_count; i += 1) {
diff --git a/src/ir.cpp b/src/ir.cpp
index 88b4c1a832196f38baaf55aab2e481613eb007c5..ae02ac9cae949e7e3254ca1acf79b2d81b23c92c 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -21631,7 +21631,7 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
         case ZigTypeIdEnum: {
             if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))
                 return ira->codegen->invalid_instruction;
-            if (target_type->data.enumeration.src_field_count < 2) {
+            if (target_type->data.enumeration.src_field_count == 1) {
                 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];
                 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
                 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
diff --git a/test/stage1/behavior/enum.zig b/test/stage1/behavior/enum.zig
index 83ad76b72cd059a44429ae65e8bc06f1ce1dd9dc..a478729003a75cf97d989b902f3c204543ad61e4 100644
--- a/test/stage1/behavior/enum.zig
+++ b/test/stage1/behavior/enum.zig
@@ -65,6 +65,26 @@ test "non-exhaustive enum" {
     comptime S.doTheTest(52);
 }
 
+test "empty non-exhaustive enum" {
+    const S = struct {
+        const E = enum(u8) {
+            _,
+        };
+        fn doTheTest(y: u8) void {
+            var e = @intToEnum(E, y);
+            expect(switch (e) {
+                _ => true,
+            });
+            expect(@enumToInt(e) == y);
+
+            expect(@typeInfo(E).Enum.fields.len == 0);
+            expect(@typeInfo(E).Enum.is_exhaustive == false);
+        }
+    };
+    S.doTheTest(42);
+    comptime S.doTheTest(42);
+}
+
 test "enum type" {
     const foo1 = Foo{ .One = 13 };
     const foo2 = Foo{
-- 
2.54.0


From f456b88baecc0a841520035973e6887eb2573319 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 19:24:04 +0100
Subject: [PATCH 019/116] Get rid of some dead logic

---
 src/ir.cpp | 25 +++++++------------------
 1 file changed, 7 insertions(+), 18 deletions(-)

diff --git a/src/ir.cpp b/src/ir.cpp
index 7f6a1963c56c90f0c4510aef54f5c6251a32bba1..42a504327990ece243ab43105fc656af4af14d16 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -6030,8 +6030,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
                 if (arg0_value == irb->codegen->invalid_instruction)
                     return arg0_value;
 
-                IrInstruction *actual_tag = ir_build_union_tag(irb, scope, node, arg0_value);
-                IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, actual_tag);
+                IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);
             }
         case BuiltinFnIdTagType:
@@ -21389,10 +21388,6 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
     if (type_is_invalid(value->value->type))
         return ira->codegen->invalid_instruction;
 
-    if (value->value->type->id == ZigTypeIdEnum ||
-        value->value->type->id == ZigTypeIdEnumLiteral)
-        return value;
-
     if (value->value->type->id != ZigTypeIdUnion) {
         ir_add_error(ira, value,
             buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));
@@ -21460,12 +21455,6 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
             if (type_is_invalid(case_value->value->type))
                 return ir_unreach_error(ira);
 
-            if (case_value->value->type->id == ZigTypeIdEnum) {
-                case_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, case_value);
-                if (type_is_invalid(case_value->value->type))
-                    return ir_unreach_error(ira);
-            }
-
             IrInstruction *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
             if (type_is_invalid(casted_case_value->value->type))
                 return ir_unreach_error(ira);
@@ -21510,12 +21499,6 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
         if (type_is_invalid(new_value->value->type))
             continue;
 
-        if (new_value->value->type->id == ZigTypeIdEnum) {
-            new_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, new_value);
-            if (type_is_invalid(new_value->value->type))
-                continue;
-        }
-
         IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
         if (type_is_invalid(casted_new_value->value->type))
             continue;
@@ -22360,6 +22343,12 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
         return result;
     }
 
+    if (target->value->type->id == ZigTypeIdUnion) {
+        target = ir_analyze_union_tag(ira, &instruction->base, target);
+        if (type_is_invalid(target->value->type))
+            return ira->codegen->invalid_instruction;
+    }
+
     assert(target->value->type->id == ZigTypeIdEnum);
 
     if (instr_is_comptime(target)) {
-- 
2.54.0


From b0f753e21d6fcaafd0b35dc02fdfe23b14e310d6 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 19:58:05 +0100
Subject: [PATCH 020/116] Fix edge case in tagName handling of unions

Closes #4226
---
 src/ir.cpp                     | 9 +++++++++
 test/stage1/behavior/union.zig | 9 +++++++++
 2 files changed, 18 insertions(+)

diff --git a/src/ir.cpp b/src/ir.cpp
index ae02ac9cae949e7e3254ca1acf79b2d81b23c92c..ff4b552a9bbdb245ea4f1fab205fb0647d1321cb 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -22354,6 +22354,15 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
 
     assert(target->value->type->id == ZigTypeIdEnum);
 
+    if (target->value->type->data.enumeration.src_field_count == 1 &&
+        !target->value->type->data.enumeration.non_exhaustive) {
+        TypeEnumField *only_field = &target->value->type->data.enumeration.fields[0];
+        ZigValue *array_val = create_const_str_lit(ira->codegen, only_field->name)->data.x_ptr.data.ref.pointee;
+        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(only_field->name), true);
+        return result;
+    }
+
     if (instr_is_comptime(target)) {
         if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
             return ira->codegen->invalid_instruction;
diff --git a/test/stage1/behavior/union.zig b/test/stage1/behavior/union.zig
index a24bee03e67c1387ae68be1643698d4e3839544b..4625b7573a8659a96a02da74b49f9af52a0a4f10 100644
--- a/test/stage1/behavior/union.zig
+++ b/test/stage1/behavior/union.zig
@@ -629,3 +629,12 @@ test "union initializer generates padding only if needed" {
     var v = U{ .A = 532 };
     expect(v.A == 532);
 }
+
+test "runtime tag name with single field" {
+    const U = union(enum) {
+        A: i32,
+    };
+
+    var v = U{ .A = 42 };
+    expect(std.mem.eql(u8, @tagName(v), "A"));
+}
-- 
2.54.0


From 9e6e1e58bb163868db51832e54c323a9ab893329 Mon Sep 17 00:00:00 2001
From: daurnimator <quae@daurnimator.com>
Date: Sat, 18 Jan 2020 11:58:29 +1000
Subject: [PATCH 021/116] std: use non-exhaustive enums from crc module

Un-reverts PR #3118
---
 lib/std/hash/benchmark.zig |  4 ++--
 lib/std/hash/crc.zig       | 27 ++++++++++++++-------------
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/lib/std/hash/benchmark.zig b/lib/std/hash/benchmark.zig
index ce9ed75b5847f6efa20e05281a7e88434d3e950f..c792013e061abf8b5a6dbcb35649967f8df44259 100644
--- a/lib/std/hash/benchmark.zig
+++ b/lib/std/hash/benchmark.zig
@@ -47,11 +47,11 @@ const hashes = [_]Hash{
         .name = "adler32",
     },
     Hash{
-        .ty = hash.crc.Crc32WithPoly(hash.crc.Polynomial.IEEE),
+        .ty = hash.crc.Crc32WithPoly(.IEEE),
         .name = "crc32-slicing-by-8",
     },
     Hash{
-        .ty = hash.crc.Crc32SmallWithPoly(hash.crc.Polynomial.IEEE),
+        .ty = hash.crc.Crc32SmallWithPoly(.IEEE),
         .name = "crc32-half-byte-lookup",
     },
     Hash{
diff --git a/lib/std/hash/crc.zig b/lib/std/hash/crc.zig
index 6176ded81dc0a9bf889acf5e2ed146226ba1f08f..506d8c8aed13f4b273d7a18bcd44486d9cf1a179 100644
--- a/lib/std/hash/crc.zig
+++ b/lib/std/hash/crc.zig
@@ -9,17 +9,18 @@ const std = @import("../std.zig");
 const debug = std.debug;
 const testing = std.testing;
 
-pub const Polynomial = struct {
-    pub const IEEE = 0xedb88320;
-    pub const Castagnoli = 0x82f63b78;
-    pub const Koopman = 0xeb31d82e;
+pub const Polynomial = enum(u32) {
+    IEEE = 0xedb88320,
+    Castagnoli = 0x82f63b78,
+    Koopman = 0xeb31d82e,
+    _,
 };
 
 // IEEE is by far the most common CRC and so is aliased by default.
-pub const Crc32 = Crc32WithPoly(Polynomial.IEEE);
+pub const Crc32 = Crc32WithPoly(.IEEE);
 
 // slicing-by-8 crc32 implementation.
-pub fn Crc32WithPoly(comptime poly: u32) type {
+pub fn Crc32WithPoly(comptime poly: Polynomial) type {
     return struct {
         const Self = @This();
         const lookup_tables = comptime block: {
@@ -31,7 +32,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
                 var j: usize = 0;
                 while (j < 8) : (j += 1) {
                     if (crc & 1 == 1) {
-                        crc = (crc >> 1) ^ poly;
+                        crc = (crc >> 1) ^ @enumToInt(poly);
                     } else {
                         crc = (crc >> 1);
                     }
@@ -100,7 +101,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
 }
 
 test "crc32 ieee" {
-    const Crc32Ieee = Crc32WithPoly(Polynomial.IEEE);
+    const Crc32Ieee = Crc32WithPoly(.IEEE);
 
     testing.expect(Crc32Ieee.hash("") == 0x00000000);
     testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
@@ -108,7 +109,7 @@ test "crc32 ieee" {
 }
 
 test "crc32 castagnoli" {
-    const Crc32Castagnoli = Crc32WithPoly(Polynomial.Castagnoli);
+    const Crc32Castagnoli = Crc32WithPoly(.Castagnoli);
 
     testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
     testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
@@ -116,7 +117,7 @@ test "crc32 castagnoli" {
 }
 
 // half-byte lookup table implementation.
-pub fn Crc32SmallWithPoly(comptime poly: u32) type {
+pub fn Crc32SmallWithPoly(comptime poly: Polynomial) type {
     return struct {
         const Self = @This();
         const lookup_table = comptime block: {
@@ -127,7 +128,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
                 var j: usize = 0;
                 while (j < 8) : (j += 1) {
                     if (crc & 1 == 1) {
-                        crc = (crc >> 1) ^ poly;
+                        crc = (crc >> 1) ^ @enumToInt(poly);
                     } else {
                         crc = (crc >> 1);
                     }
@@ -164,7 +165,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
 }
 
 test "small crc32 ieee" {
-    const Crc32Ieee = Crc32SmallWithPoly(Polynomial.IEEE);
+    const Crc32Ieee = Crc32SmallWithPoly(.IEEE);
 
     testing.expect(Crc32Ieee.hash("") == 0x00000000);
     testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
@@ -172,7 +173,7 @@ test "small crc32 ieee" {
 }
 
 test "small crc32 castagnoli" {
-    const Crc32Castagnoli = Crc32SmallWithPoly(Polynomial.Castagnoli);
+    const Crc32Castagnoli = Crc32SmallWithPoly(.Castagnoli);
 
     testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
     testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
-- 
2.54.0


From 72ec4456779839d3df4b41055fbaf47a57b69ac8 Mon Sep 17 00:00:00 2001
From: daurnimator <quae@daurnimator.com>
Date: Sat, 18 Jan 2020 12:12:18 +1000
Subject: [PATCH 022/116] std: turn EAI_ constants into a non-exhaustive enum

---
 lib/std/c.zig         |  6 ++---
 lib/std/c/darwin.zig  | 61 +++++++++++++++++++++++--------------------
 lib/std/c/freebsd.zig | 60 ++++++++++++++++++++++--------------------
 lib/std/c/linux.zig   | 40 +++++++++++++++-------------
 lib/std/net.zig       | 24 ++++++++---------
 5 files changed, 102 insertions(+), 89 deletions(-)

diff --git a/lib/std/c.zig b/lib/std/c.zig
index 45d0b4db03920b75ea7449a7f49ea9331f4ea763..c912c7241812b636a7ca688f26bb280cd3c7d201 100644
--- a/lib/std/c.zig
+++ b/lib/std/c.zig
@@ -185,7 +185,7 @@ pub extern "c" fn getaddrinfo(
     noalias service: [*:0]const u8,
     noalias hints: *const addrinfo,
     noalias res: **addrinfo,
-) c_int;
+) EAI;
 
 pub extern "c" fn freeaddrinfo(res: *addrinfo) void;
 
@@ -197,9 +197,9 @@ pub extern "c" fn getnameinfo(
     noalias serv: [*]u8,
     servlen: socklen_t,
     flags: u32,
-) c_int;
+) EAI;
 
-pub extern "c" fn gai_strerror(errcode: c_int) [*:0]const u8;
+pub extern "c" fn gai_strerror(errcode: EAI) [*:0]const u8;
 
 pub extern "c" fn poll(fds: [*]pollfd, nfds: nfds_t, timeout: c_int) c_int;
 
diff --git a/lib/std/c/darwin.zig b/lib/std/c/darwin.zig
index bcb5a38ba3dca55c4e03edc3705d50effae7f268..bc58b1fba181143a0c538063b1cf6512673bc8fe 100644
--- a/lib/std/c/darwin.zig
+++ b/lib/std/c/darwin.zig
@@ -70,47 +70,52 @@ pub const AI_NUMERICHOST = 0x00000004;
 /// prevent service name resolution
 pub const AI_NUMERICSERV = 0x00001000;
 
-///  address family for hostname not supported
-pub const EAI_ADDRFAMILY = 1;
+pub const EAI = extern enum(c_int) {
+    /// address family for hostname not supported
+    ADDRFAMILY = 1,
 
-/// temporary failure in name resolution
-pub const EAI_AGAIN = 2;
+    /// temporary failure in name resolution
+    AGAIN = 2,
 
-/// invalid value for ai_flags
-pub const EAI_BADFLAGS = 3;
+    /// invalid value for ai_flags
+    BADFLAGS = 3,
 
-/// non-recoverable failure in name resolution
-pub const EAI_FAIL = 4;
+    /// non-recoverable failure in name resolution
+    FAIL = 4,
 
-/// ai_family not supported
-pub const EAI_FAMILY = 5;
+    /// ai_family not supported
+    FAMILY = 5,
 
-/// memory allocation failure
-pub const EAI_MEMORY = 6;
+    /// memory allocation failure
+    MEMORY = 6,
 
-/// no address associated with hostname
-pub const EAI_NODATA = 7;
+    /// no address associated with hostname
+    NODATA = 7,
 
-/// hostname nor servname provided, or not known
-pub const EAI_NONAME = 8;
+    /// hostname nor servname provided, or not known
+    NONAME = 8,
 
-/// servname not supported for ai_socktype
-pub const EAI_SERVICE = 9;
+    /// servname not supported for ai_socktype
+    SERVICE = 9,
 
-/// ai_socktype not supported
-pub const EAI_SOCKTYPE = 10;
+    /// ai_socktype not supported
+    SOCKTYPE = 10,
 
-/// system error returned in errno
-pub const EAI_SYSTEM = 11;
+    /// system error returned in errno
+    SYSTEM = 11,
 
-/// invalid value for hints
-pub const EAI_BADHINTS = 12;
+    /// invalid value for hints
+    BADHINTS = 12,
 
-/// resolved protocol is unknown
-pub const EAI_PROTOCOL = 13;
+    /// resolved protocol is unknown
+    PROTOCOL = 13,
+
+    /// argument buffer overflow
+    OVERFLOW = 14,
+
+    _,
+};
 
-/// argument buffer overflow
-pub const EAI_OVERFLOW = 14;
 pub const EAI_MAX = 15;
 
 pub const pthread_mutex_t = extern struct {
diff --git a/lib/std/c/freebsd.zig b/lib/std/c/freebsd.zig
index 95e27a7d92045b88d67d15f05804dbca2592b050..4c6614c978b3eff9008b287d53f9f8bd71962803 100644
--- a/lib/std/c/freebsd.zig
+++ b/lib/std/c/freebsd.zig
@@ -23,47 +23,51 @@ pub const pthread_attr_t = extern struct {
     __align: c_long,
 };
 
-/// address family for hostname not supported
-pub const EAI_ADDRFAMILY = 1;
+pub const EAI = extern enum(c_int) {
+    /// address family for hostname not supported
+    ADDRFAMILY = 1,
 
-/// name could not be resolved at this time
-pub const EAI_AGAIN = 2;
+    /// name could not be resolved at this time
+    AGAIN = 2,
 
-/// flags parameter had an invalid value
-pub const EAI_BADFLAGS = 3;
+    /// flags parameter had an invalid value
+    BADFLAGS = 3,
 
-/// non-recoverable failure in name resolution
-pub const EAI_FAIL = 4;
+    /// non-recoverable failure in name resolution
+    FAIL = 4,
 
-/// address family not recognized
-pub const EAI_FAMILY = 5;
+    /// address family not recognized
+    FAMILY = 5,
 
-/// memory allocation failure
-pub const EAI_MEMORY = 6;
+    /// memory allocation failure
+    MEMORY = 6,
 
-/// no address associated with hostname
-pub const EAI_NODATA = 7;
+    /// no address associated with hostname
+    NODATA = 7,
 
-/// name does not resolve
-pub const EAI_NONAME = 8;
+    /// name does not resolve
+    NONAME = 8,
 
-/// service not recognized for socket type
-pub const EAI_SERVICE = 9;
+    /// service not recognized for socket type
+    SERVICE = 9,
 
-/// intended socket type was not recognized
-pub const EAI_SOCKTYPE = 10;
+    /// intended socket type was not recognized
+    SOCKTYPE = 10,
 
-/// system error returned in errno
-pub const EAI_SYSTEM = 11;
+    /// system error returned in errno
+    SYSTEM = 11,
 
-/// invalid value for hints
-pub const EAI_BADHINTS = 12;
+    /// invalid value for hints
+    BADHINTS = 12,
 
-/// resolved protocol is unknown
-pub const EAI_PROTOCOL = 13;
+    /// resolved protocol is unknown
+    PROTOCOL = 13,
 
-/// argument buffer overflow
-pub const EAI_OVERFLOW = 14;
+    /// argument buffer overflow
+    OVERFLOW = 14,
+
+    _,
+};
 
 pub const EAI_MAX = 15;
 
diff --git a/lib/std/c/linux.zig b/lib/std/c/linux.zig
index 99694740972d78756f9c92f088a7a05a78f78f17..0f7abaaaa00c8d3104b5dd859d3987952ba2544f 100644
--- a/lib/std/c/linux.zig
+++ b/lib/std/c/linux.zig
@@ -32,25 +32,29 @@ pub const NI_NAMEREQD = 0x08;
 pub const NI_DGRAM = 0x10;
 pub const NI_NUMERICSCOPE = 0x100;
 
-pub const EAI_BADFLAGS = -1;
-pub const EAI_NONAME = -2;
-pub const EAI_AGAIN = -3;
-pub const EAI_FAIL = -4;
-pub const EAI_FAMILY = -6;
-pub const EAI_SOCKTYPE = -7;
-pub const EAI_SERVICE = -8;
-pub const EAI_MEMORY = -10;
-pub const EAI_SYSTEM = -11;
-pub const EAI_OVERFLOW = -12;
+pub const EAI = extern enum(c_int) {
+    BADFLAGS = -1,
+    NONAME = -2,
+    AGAIN = -3,
+    FAIL = -4,
+    FAMILY = -6,
+    SOCKTYPE = -7,
+    SERVICE = -8,
+    MEMORY = -10,
+    SYSTEM = -11,
+    OVERFLOW = -12,
 
-pub const EAI_NODATA = -5;
-pub const EAI_ADDRFAMILY = -9;
-pub const EAI_INPROGRESS = -100;
-pub const EAI_CANCELED = -101;
-pub const EAI_NOTCANCELED = -102;
-pub const EAI_ALLDONE = -103;
-pub const EAI_INTR = -104;
-pub const EAI_IDN_ENCODE = -105;
+    NODATA = -5,
+    ADDRFAMILY = -9,
+    INPROGRESS = -100,
+    CANCELED = -101,
+    NOTCANCELED = -102,
+    ALLDONE = -103,
+    INTR = -104,
+    IDN_ENCODE = -105,
+
+    _,
+};
 
 pub extern "c" fn getrandom(buf_ptr: [*]u8, buf_len: usize, flags: c_uint) isize;
 pub extern "c" fn sched_getaffinity(pid: c_int, size: usize, set: *cpu_set_t) c_int;
diff --git a/lib/std/net.zig b/lib/std/net.zig
index 47ce95c99f298e092b5ee975ae1c086ff9f48780..c113462855791f7bee34e484307f80954e9ca1a7 100644
--- a/lib/std/net.zig
+++ b/lib/std/net.zig
@@ -452,18 +452,18 @@ pub fn getAddressList(allocator: *mem.Allocator, name: []const u8, port: u16) !*
         };
         var res: *os.addrinfo = undefined;
         switch (os.system.getaddrinfo(name_c.ptr, @ptrCast([*:0]const u8, port_c.ptr), &hints, &res)) {
-            0 => {},
-            c.EAI_ADDRFAMILY => return error.HostLacksNetworkAddresses,
-            c.EAI_AGAIN => return error.TemporaryNameServerFailure,
-            c.EAI_BADFLAGS => unreachable, // Invalid hints
-            c.EAI_FAIL => return error.NameServerFailure,
-            c.EAI_FAMILY => return error.AddressFamilyNotSupported,
-            c.EAI_MEMORY => return error.OutOfMemory,
-            c.EAI_NODATA => return error.HostLacksNetworkAddresses,
-            c.EAI_NONAME => return error.UnknownHostName,
-            c.EAI_SERVICE => return error.ServiceUnavailable,
-            c.EAI_SOCKTYPE => unreachable, // Invalid socket type requested in hints
-            c.EAI_SYSTEM => switch (os.errno(-1)) {
+            @intToEnum(os.system.EAI, 0) => {},
+            .ADDRFAMILY => return error.HostLacksNetworkAddresses,
+            .AGAIN => return error.TemporaryNameServerFailure,
+            .BADFLAGS => unreachable, // Invalid hints
+            .FAIL => return error.NameServerFailure,
+            .FAMILY => return error.AddressFamilyNotSupported,
+            .MEMORY => return error.OutOfMemory,
+            .NODATA => return error.HostLacksNetworkAddresses,
+            .NONAME => return error.UnknownHostName,
+            .SERVICE => return error.ServiceUnavailable,
+            .SOCKTYPE => unreachable, // Invalid socket type requested in hints
+            .SYSTEM => switch (os.errno(-1)) {
                 else => |e| return os.unexpectedErrno(e),
             },
             else => unreachable,
-- 
2.54.0


From 405b8e9eeefda07b16044690471cfd57fc654c75 Mon Sep 17 00:00:00 2001
From: Sebastian <Sebastianhopkins@live.com>
Date: Sat, 18 Jan 2020 22:15:42 +0000
Subject: [PATCH 023/116] fixed typo - "path" lead to undeclared identifier

---
 lib/std/dynamic_library.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/std/dynamic_library.zig b/lib/std/dynamic_library.zig
index db912ec92296b11ab8e50aba034f261d7c9dfc28..ef64870b8d5e56a61f4ea8a77721cb42f2d7ba4e 100644
--- a/lib/std/dynamic_library.zig
+++ b/lib/std/dynamic_library.zig
@@ -277,7 +277,7 @@ pub const WindowsDynLib = struct {
     }
 
     pub fn openC(path_c: [*:0]const u8) !WindowsDynLib {
-        const path_w = try windows.cStrToPrefixedFileW(path);
+        const path_w = try windows.cStrToPrefixedFileW(path_c);
         return openW(&path_w);
     }
 
-- 
2.54.0


From fa52c9e36efde38f6d1c6e280636ba7f6cb6f83a Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 18:11:20 +0100
Subject: [PATCH 024/116] Small cleanups

---
 lib/std/os/bits/linux.zig              |  2 +-
 lib/std/special/compiler_rt/clzsi2.zig | 70 +++++++++++++-------------
 lib/std/start.zig                      | 13 +----
 lib/std/target.zig                     | 38 ++++++++++++++
 4 files changed, 75 insertions(+), 48 deletions(-)

diff --git a/lib/std/os/bits/linux.zig b/lib/std/os/bits/linux.zig
index 51ea49005e20d858d5ee16fb5de19898687c6f97..f4024e1f1d314be7aeef63c6fdbca4a2a022a431 100644
--- a/lib/std/os/bits/linux.zig
+++ b/lib/std/os/bits/linux.zig
@@ -18,7 +18,7 @@ pub usingnamespace switch (builtin.arch) {
     else => struct {},
 };
 
-const is_mips = builtin.arch == .mipsel;
+const is_mips = builtin.arch.isMIPS();
 
 pub const pid_t = i32;
 pub const fd_t = i32;
diff --git a/lib/std/special/compiler_rt/clzsi2.zig b/lib/std/special/compiler_rt/clzsi2.zig
index 0cbfdb8db19fdd5f155975ed31365750f1cc2d8d..6a69ae75f177b776acd387448659442ce0ec8420 100644
--- a/lib/std/special/compiler_rt/clzsi2.zig
+++ b/lib/std/special/compiler_rt/clzsi2.zig
@@ -1,10 +1,5 @@
-// Ported from:
-//
-// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/clzsi2.c
-// https://github.com/llvm-mirror/compiler-rt/blob/f0745e8476f069296a7c71accedd061dce4cdf79/lib/builtins/arm/clzsi2.S
 const builtin = @import("builtin");
 
-// Precondition: a != 0
 fn __clzsi2_generic(a: i32) callconv(.C) i32 {
     @setRuntimeSafety(builtin.is_test);
 
@@ -24,15 +19,42 @@ fn __clzsi2_generic(a: i32) callconv(.C) i32 {
     return n - @bitCast(i32, x);
 }
 
-fn __clzsi2_arm_clz(a: i32) callconv(.Naked) noreturn {
+fn __clzsi2_thumb1() callconv(.Naked) void {
+    @setRuntimeSafety(builtin.is_test);
+
+    // Similar to the generic version with the last two rounds replaced by a LUT
     asm volatile (
-        \\ clz r0,r0
+        \\ movs r1, #32
+        \\ lsrs r2, r0, #16
+        \\ beq 1f
+        \\ subs r1, #16
+        \\ movs r0, r2
+        \\ 1:
+        \\ lsrs r2, r0, #8
+        \\ beq 1f
+        \\ subs r1, #8
+        \\ movs r0, r2
+        \\ 1:
+        \\ lsrs r2, r0, #4
+        \\ beq 1f
+        \\ subs r1, #4
+        \\ movs r0, r2
+        \\ 1:
+        \\ ldr r3, =LUT
+        \\ ldrb r0, [r3, r0]
+        \\ subs r0, r1, r0
         \\ bx lr
+        \\ .p2align 2
+        \\ LUT:
+        \\ .byte 4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0
     );
+
     unreachable;
 }
 
-fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
+fn __clzsi2_arm32() callconv(.Naked) void {
+    @setRuntimeSafety(builtin.is_test);
+
     asm volatile (
         \\ // Assumption: n != 0
         \\ // r0: n
@@ -75,39 +97,15 @@ fn __clzsi2_arm32(a: i32) callconv(.Naked) noreturn {
         \\ sub r0, r1, r0, lsr #1
         \\ bx lr
     );
+
     unreachable;
 }
 
-const can_use_arm_clz = switch (builtin.arch) {
-    .arm, .armeb => |sub_arch| switch (sub_arch) {
-        .v4t => false,
-        .v6m => false,
-        else => true,
-    },
-    .thumb, .thumbeb => |sub_arch| switch (sub_arch) {
-        .v6,
-        .v6k,
-        .v5,
-        .v5te,
-        .v4t,
-        => false,
-        else => true,
-    },
-    else => false,
-};
-
-const is_arm32_no_thumb = switch (builtin.arch) {
-    builtin.Arch.arm,
-    builtin.Arch.armeb,
-    => true,
-    else => false,
-};
-
 pub const __clzsi2 = blk: {
-    if (comptime can_use_arm_clz) {
-        break :blk __clzsi2_arm_clz;
-    } else if (comptime is_arm32_no_thumb) {
+    if (builtin.arch.isARM()) {
         break :blk __clzsi2_arm32;
+    } else if (builtin.arch.isThumb()) {
+        break :blk __clzsi2_thumb1;
     } else {
         break :blk __clzsi2_generic;
     }
diff --git a/lib/std/start.zig b/lib/std/start.zig
index c3844e4d1eae744ffa25178697e2d43586d9127e..bf6f61f25f89a0e24e249858656ae543ac22365c 100644
--- a/lib/std/start.zig
+++ b/lib/std/start.zig
@@ -8,16 +8,7 @@ const uefi = std.os.uefi;
 
 var starting_stack_ptr: [*]usize = undefined;
 
-const is_wasm = switch (builtin.arch) {
-    .wasm32, .wasm64 => true,
-    else => false,
-};
-
-const is_mips = switch (builtin.arch) {
-    .mips, .mipsel, .mips64, .mips64el => true,
-    else => false,
-};
-const start_sym_name = if (is_mips) "__start" else "_start";
+const start_sym_name = if (builtin.arch.isMIPS()) "__start" else "_start";
 
 comptime {
     if (builtin.output_mode == .Lib and builtin.link_mode == .Dynamic) {
@@ -35,7 +26,7 @@ comptime {
             }
         } else if (builtin.os == .uefi) {
             if (!@hasDecl(root, "EfiMain")) @export(EfiMain, .{ .name = "EfiMain" });
-        } else if (is_wasm and builtin.os == .freestanding) {
+        } else if (builtin.arch.isWasm() and builtin.os == .freestanding) {
             if (!@hasDecl(root, start_sym_name)) @export(wasm_freestanding_start, .{ .name = start_sym_name });
         } else if (builtin.os != .other and builtin.os != .freestanding) {
             if (!@hasDecl(root, start_sym_name)) @export(_start, .{ .name = start_sym_name });
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 22fea691c4b50e8cfacb2da47e1517a828c9573e..d62786ff7f3474dde175019b9c662c1cee5c0211 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -125,6 +125,16 @@ pub const Target = union(enum) {
             v5,
             v5te,
             v4t,
+
+            pub fn version(version: Arm32) comptime_int {
+                return switch (version) {
+                    .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
+                    .v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
+                    .v6, .v6m, .v6k, .v6t2 => 6,
+                    .v5, .v5te => 5,
+                    .v4t => 4,
+                };
+            }
         };
         pub const Arm64 = enum {
             v8_5a,
@@ -146,6 +156,34 @@ pub const Target = union(enum) {
             r6,
         };
 
+        pub fn isARM(arch: Arch) bool {
+            return switch (arch) {
+                .arm, .armeb => true,
+                else => false,
+            };
+        }
+
+        pub fn isThumb(arch: Arch) bool {
+            return switch (arch) {
+                .thumb, .thumbeb => true,
+                else => false,
+            };
+        }
+
+        pub fn isWasm(arch: Arch) bool {
+            return switch (arch) {
+                .wasm32, .wasm64 => true,
+                else => false,
+            };
+        }
+
+        pub fn isMIPS(arch: Arch) bool {
+            return switch (arch) {
+                .mips, .mipsel, .mips64, .mips64el => true,
+                else => false,
+            };
+        }
+
         pub fn toElfMachine(arch: Arch) std.elf.EM {
             return switch (arch) {
                 .avr => ._AVR,
-- 
2.54.0


From 7d94e712f125e10f234338e800953aa4837206ef Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 23:05:17 +0100
Subject: [PATCH 025/116] Remove useless wrappers around f32/f64 aeabi builtins

---
 .../special/compiler_rt/arm/aeabi_dcmp.zig    | 87 +++----------------
 .../special/compiler_rt/arm/aeabi_fcmp.zig    | 87 +++----------------
 2 files changed, 22 insertions(+), 152 deletions(-)

diff --git a/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig b/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
index a8ed182901573641d73c87c83478c7d7e934411b..47e7fac81ab8eaa42f8a0bb24bdb35a331b3111d 100644
--- a/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
+++ b/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
@@ -2,94 +2,29 @@
 //
 // https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
 
-const ConditionalOperator = enum {
-    Eq,
-    Lt,
-    Le,
-    Ge,
-    Gt,
-};
+const comparedf2 = @import("../comparedf2.zig");
 
-pub fn __aeabi_dcmpeq() callconv(.Naked) noreturn {
+pub fn __aeabi_dcmpeq(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Eq});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__eqdf2, .{ a, b }) == 0);
 }
 
-pub fn __aeabi_dcmplt() callconv(.Naked) noreturn {
+pub fn __aeabi_dcmplt(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Lt});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__ltdf2, .{ a, b }) < 0);
 }
 
-pub fn __aeabi_dcmple() callconv(.Naked) noreturn {
+pub fn __aeabi_dcmple(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Le});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__ledf2, .{ a, b }) <= 0);
 }
 
-pub fn __aeabi_dcmpge() callconv(.Naked) noreturn {
+pub fn __aeabi_dcmpge(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Ge});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__gedf2, .{ a, b }) >= 0);
 }
 
-pub fn __aeabi_dcmpgt() callconv(.Naked) noreturn {
+pub fn __aeabi_dcmpgt(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Gt});
-    unreachable;
-}
-
-fn aeabi_dcmp(comptime cond: ConditionalOperator) void {
-    @setRuntimeSafety(false);
-    asm volatile (
-        \\ push      { r4, lr }
-    );
-
-    switch (cond) {
-        .Eq => asm volatile (
-            \\ bl        __eqdf2
-            \\ cmp       r0, #0
-            \\ beq 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Lt => asm volatile (
-            \\ bl        __ltdf2
-            \\ cmp       r0, #0
-            \\ blt 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Le => asm volatile (
-            \\ bl        __ledf2
-            \\ cmp       r0, #0
-            \\ ble 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Ge => asm volatile (
-            \\ bl        __ltdf2
-            \\ cmp       r0, #0
-            \\ bge 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Gt => asm volatile (
-            \\ bl        __gtdf2
-            \\ cmp       r0, #0
-            \\ bgt 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-    }
-    asm volatile (
-        \\ movs      r0, #1
-        \\ pop       { r4, pc }
-    );
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__gtdf2, .{ a, b }) > 0);
 }
diff --git a/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig b/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig
index 0b4c0f0d41e904fd29efe9cc0af05294f1cdcc56..c53643b3689b9b33aa4560d661988c5e80065d93 100644
--- a/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig
+++ b/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig
@@ -2,94 +2,29 @@
 //
 // https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_fcmp.S
 
-const ConditionalOperator = enum {
-    Eq,
-    Lt,
-    Le,
-    Ge,
-    Gt,
-};
+const comparesf2 = @import("../comparesf2.zig");
 
-pub fn __aeabi_fcmpeq() callconv(.Naked) noreturn {
+pub fn __aeabi_fcmpeq(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Eq});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__eqsf2, .{ a, b }) == 0);
 }
 
-pub fn __aeabi_fcmplt() callconv(.Naked) noreturn {
+pub fn __aeabi_fcmplt(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Lt});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__ltsf2, .{ a, b }) < 0);
 }
 
-pub fn __aeabi_fcmple() callconv(.Naked) noreturn {
+pub fn __aeabi_fcmple(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Le});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__lesf2, .{ a, b }) <= 0);
 }
 
-pub fn __aeabi_fcmpge() callconv(.Naked) noreturn {
+pub fn __aeabi_fcmpge(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Ge});
-    unreachable;
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__gesf2, .{ a, b }) >= 0);
 }
 
-pub fn __aeabi_fcmpgt() callconv(.Naked) noreturn {
+pub fn __aeabi_fcmpgt(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
-    @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Gt});
-    unreachable;
-}
-
-fn aeabi_fcmp(comptime cond: ConditionalOperator) void {
-    @setRuntimeSafety(false);
-    asm volatile (
-        \\ push      { r4, lr }
-    );
-
-    switch (cond) {
-        .Eq => asm volatile (
-            \\ bl        __eqsf2
-            \\ cmp       r0, #0
-            \\ beq 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Lt => asm volatile (
-            \\ bl        __ltsf2
-            \\ cmp       r0, #0
-            \\ blt 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Le => asm volatile (
-            \\ bl        __lesf2
-            \\ cmp       r0, #0
-            \\ ble 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Ge => asm volatile (
-            \\ bl        __ltsf2
-            \\ cmp       r0, #0
-            \\ bge 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-        .Gt => asm volatile (
-            \\ bl        __gtsf2
-            \\ cmp       r0, #0
-            \\ bgt 1f
-            \\ movs      r0, #0
-            \\ pop       { r4, pc }
-            \\ 1:
-        ),
-    }
-    asm volatile (
-        \\ movs      r0, #1
-        \\ pop       { r4, pc }
-    );
+    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__gtsf2, .{ a, b }) > 0);
 }
-- 
2.54.0


From 6b056d1fb93bba68c03bda5039994d4df338ef13 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 23:37:13 +0100
Subject: [PATCH 026/116] Nuke some repeated code

---
 lib/std/special/compiler_rt.zig            |  52 +++---
 lib/std/special/compiler_rt/compareXf2.zig | 201 +++++++++++++++++++++
 lib/std/special/compiler_rt/comparedf2.zig | 127 -------------
 lib/std/special/compiler_rt/comparesf2.zig | 127 -------------
 lib/std/special/compiler_rt/comparetf2.zig |  99 ----------
 5 files changed, 227 insertions(+), 379 deletions(-)
 create mode 100644 lib/std/special/compiler_rt/compareXf2.zig
 delete mode 100644 lib/std/special/compiler_rt/comparedf2.zig
 delete mode 100644 lib/std/special/compiler_rt/comparesf2.zig
 delete mode 100644 lib/std/special/compiler_rt/comparetf2.zig

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index 9b225dbad6b992f405d8da468b2de27f326dd007..920707d1c467ae01c79bf0be8e1bdbdfaf0296e2 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -16,42 +16,42 @@ comptime {
         else => {},
     }
 
-    @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });
 
-    @export(@import("compiler_rt/comparesf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparedf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });
 
     if (!is_test) {
-        @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });
 
-        @export(@import("compiler_rt/comparesf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });
 
-        @export(@import("compiler_rt/comparesf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });
 
-        @export(@import("compiler_rt/comparesf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });
 
-        @export(@import("compiler_rt/comparesf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });
-        @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });
 
         @export(@import("compiler_rt/extendXfYf2.zig").__extendhfsf2, .{ .name = "__gnu_h2f_ieee", .linkage = linkage });
         @export(@import("compiler_rt/truncXfYf2.zig").__truncsfhf2, .{ .name = "__gnu_f2h_ieee", .linkage = linkage });
     }
 
-    @export(@import("compiler_rt/comparesf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparedf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });
-    @export(@import("compiler_rt/comparetf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });
+    @export(@import("compiler_rt/compareXf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });
 
     @export(@import("compiler_rt/addXf3.zig").__addsf3, .{ .name = "__addsf3", .linkage = linkage });
     @export(@import("compiler_rt/addXf3.zig").__adddf3, .{ .name = "__adddf3", .linkage = linkage });
@@ -231,14 +231,14 @@ comptime {
         @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
-        @export(@import("compiler_rt/comparesf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
 
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
-        @export(@import("compiler_rt/comparedf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
     }
     if (builtin.os == .windows) {
         // Default stack-probe functions emitted by LLVM
diff --git a/lib/std/special/compiler_rt/compareXf2.zig b/lib/std/special/compiler_rt/compareXf2.zig
new file mode 100644
index 0000000000000000000000000000000000000000..3253abe87198e8cb6662b493face3b327cbd6d4d
--- /dev/null
+++ b/lib/std/special/compiler_rt/compareXf2.zig
@@ -0,0 +1,201 @@
+// Ported from:
+//
+// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
+
+const std = @import("std");
+const builtin = @import("builtin");
+
+const LE = extern enum(i32) {
+    Less = -1,
+    Equal = 0,
+    Greater = 1,
+    Unordered = 1,
+};
+
+const GE = extern enum(i32) {
+    Less = -1,
+    Equal = 0,
+    Greater = 1,
+    Unordered = -1,
+};
+
+pub fn cmp(comptime T: type, comptime RT: type, a: T, b: T) RT {
+    @setRuntimeSafety(builtin.is_test);
+
+    const srep_t = @IntType(true, T.bit_count);
+    const rep_t = @IntType(false, T.bit_count);
+
+    const significandBits = std.math.floatMantissaBits(T);
+    const exponentBits = std.math.floatExponentBits(T);
+    const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
+    const absMask = signBit - 1;
+    const infRep = @bitCast(rep_t, std.math.inf(T));
+
+    const aInt = @bitCast(srep_t, a);
+    const bInt = @bitCast(srep_t, b);
+    const aAbs = @bitCast(rep_t, aInt) & absMask;
+    const bAbs = @bitCast(rep_t, bInt) & absMask;
+
+    // If either a or b is NaN, they are unordered.
+    if (aAbs > infRep or bAbs > infRep) return .Unordered;
+
+    // If a and b are both zeros, they are equal.
+    if ((aAbs | bAbs) == 0) return .Equal;
+
+    // If at least one of a and b is positive, we get the same result comparing
+    // a and b as signed integers as we would with a fp_ting-point compare.
+    if ((aInt & bInt) >= 0) {
+        if (aInt < bInt) {
+            return .Less;
+        } else if (aInt == bInt) {
+            return .Equal;
+        } else return .Greater;
+    }
+
+    // Otherwise, both are negative, so we need to flip the sense of the
+    // comparison to get the correct result.  (This assumes a twos- or ones-
+    // complement integer representation; if integers are represented in a
+    // sign-magnitude representation, then this flip is incorrect).
+    else {
+        if (aInt > bInt) {
+            return .Less;
+        } else if (aInt == bInt) {
+            return .Equal;
+        } else return .Greater;
+    }
+}
+
+pub fn unordcmp(comptime T: type, a: T, b: T) i32 {
+    @setRuntimeSafety(builtin.is_test);
+
+    const rep_t = @IntType(false, T.bit_count);
+
+    const significandBits = std.math.floatMantissaBits(T);
+    const exponentBits = std.math.floatExponentBits(T);
+    const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
+    const absMask = signBit - 1;
+    const infRep = @bitCast(rep_t, std.math.inf(T));
+
+    const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
+    const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
+
+    return @boolToInt(aAbs > infRep or bAbs > infRep);
+}
+
+// Comparison between f32
+
+pub fn __lesf2(a: f32, b: f32) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, LE, a, b }));
+}
+
+pub fn __gesf2(a: f32, b: f32) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, GE, a, b }));
+}
+
+pub fn __eqsf2(a: f32, b: f32) callconv(.C) i32 {
+    return __lesf2(a, b);
+}
+
+pub fn __ltsf2(a: f32, b: f32) callconv(.C) i32 {
+    return __lesf2(a, b);
+}
+
+pub fn __nesf2(a: f32, b: f32) callconv(.C) i32 {
+    return __lesf2(a, b);
+}
+
+pub fn __gtsf2(a: f32, b: f32) callconv(.C) i32 {
+    return __gesf2(a, b);
+}
+
+// Comparison between f64
+
+pub fn __ledf2(a: f64, b: f64) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, LE, a, b }));
+}
+
+pub fn __gedf2(a: f64, b: f64) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, GE, a, b }));
+}
+
+pub fn __eqdf2(a: f64, b: f64) callconv(.C) i32 {
+    return __ledf2(a, b);
+}
+
+pub fn __ltdf2(a: f64, b: f64) callconv(.C) i32 {
+    return __ledf2(a, b);
+}
+
+pub fn __nedf2(a: f64, b: f64) callconv(.C) i32 {
+    return __ledf2(a, b);
+}
+
+pub fn __gtdf2(a: f64, b: f64) callconv(.C) i32 {
+    return __gedf2(a, b);
+}
+
+// Comparison between f128
+
+pub fn __letf2(a: f128, b: f128) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, LE, a, b }));
+}
+
+pub fn __getf2(a: f128, b: f128) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, GE, a, b }));
+}
+
+pub fn __eqtf2(a: f128, b: f128) callconv(.C) i32 {
+    return __letf2(a, b);
+}
+
+pub fn __lttf2(a: f128, b: f128) callconv(.C) i32 {
+    return __letf2(a, b);
+}
+
+pub fn __netf2(a: f128, b: f128) callconv(.C) i32 {
+    return __letf2(a, b);
+}
+
+pub fn __gttf2(a: f128, b: f128) callconv(.C) i32 {
+    return __getf2(a, b);
+}
+
+// Unordered comparison between f32/f64/f128
+
+pub fn __unordsf2(a: f32, b: f32) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @call(.{ .modifier = .always_inline }, unordcmp, .{ f32, a, b });
+}
+
+pub fn __unorddf2(a: f64, b: f64) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @call(.{ .modifier = .always_inline }, unordcmp, .{ f64, a, b });
+}
+
+pub fn __unordtf2(a: f128, b: f128) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+    return @call(.{ .modifier = .always_inline }, unordcmp, .{ f128, a, b });
+}
+
+pub fn __aeabi_fcmpun(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
+}
+
+pub fn __aeabi_dcmpun(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
+}
+
+test "comparesf2" {
+    _ = @import("comparesf2_test.zig");
+}
+test "comparedf2" {
+    _ = @import("comparedf2_test.zig");
+}
diff --git a/lib/std/special/compiler_rt/comparedf2.zig b/lib/std/special/compiler_rt/comparedf2.zig
deleted file mode 100644
index 98cca106f7d23880b204d2ff775115a4459fc33c..0000000000000000000000000000000000000000
--- a/lib/std/special/compiler_rt/comparedf2.zig
+++ /dev/null
@@ -1,127 +0,0 @@
-// Ported from:
-//
-// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparedf2.c
-
-const std = @import("std");
-const builtin = @import("builtin");
-const is_test = builtin.is_test;
-
-const fp_t = f64;
-const rep_t = u64;
-const srep_t = i64;
-
-const typeWidth = rep_t.bit_count;
-const significandBits = std.math.floatMantissaBits(fp_t);
-const exponentBits = std.math.floatExponentBits(fp_t);
-const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
-const absMask = signBit - 1;
-const implicitBit = @as(rep_t, 1) << significandBits;
-const significandMask = implicitBit - 1;
-const exponentMask = absMask ^ significandMask;
-const infRep = @bitCast(rep_t, std.math.inf(fp_t));
-
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const LE_LESS = @as(c_int, -1);
-const LE_EQUAL = @as(c_int, 0);
-const LE_GREATER = @as(c_int, 1);
-const LE_UNORDERED = @as(c_int, 1);
-
-pub fn __ledf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aInt: srep_t = @bitCast(srep_t, a);
-    const bInt: srep_t = @bitCast(srep_t, b);
-    const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
-
-    // If either a or b is NaN, they are unordered.
-    if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
-
-    // If a and b are both zeros, they are equal.
-    if ((aAbs | bAbs) == 0) return LE_EQUAL;
-
-    // If at least one of a and b is positive, we get the same result comparing
-    // a and b as signed integers as we would with a fp_ting-point compare.
-    if ((aInt & bInt) >= 0) {
-        if (aInt < bInt) {
-            return LE_LESS;
-        } else if (aInt == bInt) {
-            return LE_EQUAL;
-        } else return LE_GREATER;
-    }
-
-    // Otherwise, both are negative, so we need to flip the sense of the
-    // comparison to get the correct result.  (This assumes a twos- or ones-
-    // complement integer representation; if integers are represented in a
-    // sign-magnitude representation, then this flip is incorrect).
-    else {
-        if (aInt > bInt) {
-            return LE_LESS;
-        } else if (aInt == bInt) {
-            return LE_EQUAL;
-        } else return LE_GREATER;
-    }
-}
-
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const GE_LESS = @as(c_int, -1);
-const GE_EQUAL = @as(c_int, 0);
-const GE_GREATER = @as(c_int, 1);
-const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
-
-pub fn __gedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aInt: srep_t = @bitCast(srep_t, a);
-    const bInt: srep_t = @bitCast(srep_t, b);
-    const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
-
-    if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
-    if ((aAbs | bAbs) == 0) return GE_EQUAL;
-    if ((aInt & bInt) >= 0) {
-        if (aInt < bInt) {
-            return GE_LESS;
-        } else if (aInt == bInt) {
-            return GE_EQUAL;
-        } else return GE_GREATER;
-    } else {
-        if (aInt > bInt) {
-            return GE_LESS;
-        } else if (aInt == bInt) {
-            return GE_EQUAL;
-        } else return GE_GREATER;
-    }
-}
-
-pub fn __unorddf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
-    return @boolToInt(aAbs > infRep or bAbs > infRep);
-}
-
-pub fn __eqdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __ledf2(a, b);
-}
-
-pub fn __ltdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __ledf2(a, b);
-}
-
-pub fn __nedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __ledf2(a, b);
-}
-
-pub fn __gtdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __gedf2(a, b);
-}
-
-pub fn __aeabi_dcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
-    @setRuntimeSafety(false);
-    return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
-}
-
-test "import comparedf2" {
-    _ = @import("comparedf2_test.zig");
-}
diff --git a/lib/std/special/compiler_rt/comparesf2.zig b/lib/std/special/compiler_rt/comparesf2.zig
deleted file mode 100644
index bd881af2a1ea2ea05c211020ca5f9c3da93ccafb..0000000000000000000000000000000000000000
--- a/lib/std/special/compiler_rt/comparesf2.zig
+++ /dev/null
@@ -1,127 +0,0 @@
-// Ported from:
-//
-// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
-
-const std = @import("std");
-const builtin = @import("builtin");
-const is_test = builtin.is_test;
-
-const fp_t = f32;
-const rep_t = u32;
-const srep_t = i32;
-
-const typeWidth = rep_t.bit_count;
-const significandBits = std.math.floatMantissaBits(fp_t);
-const exponentBits = std.math.floatExponentBits(fp_t);
-const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
-const absMask = signBit - 1;
-const implicitBit = @as(rep_t, 1) << significandBits;
-const significandMask = implicitBit - 1;
-const exponentMask = absMask ^ significandMask;
-const infRep = @bitCast(rep_t, std.math.inf(fp_t));
-
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const LE_LESS = @as(c_int, -1);
-const LE_EQUAL = @as(c_int, 0);
-const LE_GREATER = @as(c_int, 1);
-const LE_UNORDERED = @as(c_int, 1);
-
-pub fn __lesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aInt: srep_t = @bitCast(srep_t, a);
-    const bInt: srep_t = @bitCast(srep_t, b);
-    const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
-
-    // If either a or b is NaN, they are unordered.
-    if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
-
-    // If a and b are both zeros, they are equal.
-    if ((aAbs | bAbs) == 0) return LE_EQUAL;
-
-    // If at least one of a and b is positive, we get the same result comparing
-    // a and b as signed integers as we would with a fp_ting-point compare.
-    if ((aInt & bInt) >= 0) {
-        if (aInt < bInt) {
-            return LE_LESS;
-        } else if (aInt == bInt) {
-            return LE_EQUAL;
-        } else return LE_GREATER;
-    }
-
-    // Otherwise, both are negative, so we need to flip the sense of the
-    // comparison to get the correct result.  (This assumes a twos- or ones-
-    // complement integer representation; if integers are represented in a
-    // sign-magnitude representation, then this flip is incorrect).
-    else {
-        if (aInt > bInt) {
-            return LE_LESS;
-        } else if (aInt == bInt) {
-            return LE_EQUAL;
-        } else return LE_GREATER;
-    }
-}
-
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const GE_LESS = @as(c_int, -1);
-const GE_EQUAL = @as(c_int, 0);
-const GE_GREATER = @as(c_int, 1);
-const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
-
-pub fn __gesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aInt: srep_t = @bitCast(srep_t, a);
-    const bInt: srep_t = @bitCast(srep_t, b);
-    const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
-
-    if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
-    if ((aAbs | bAbs) == 0) return GE_EQUAL;
-    if ((aInt & bInt) >= 0) {
-        if (aInt < bInt) {
-            return GE_LESS;
-        } else if (aInt == bInt) {
-            return GE_EQUAL;
-        } else return GE_GREATER;
-    } else {
-        if (aInt > bInt) {
-            return GE_LESS;
-        } else if (aInt == bInt) {
-            return GE_EQUAL;
-        } else return GE_GREATER;
-    }
-}
-
-pub fn __unordsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-    const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
-    const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
-    return @boolToInt(aAbs > infRep or bAbs > infRep);
-}
-
-pub fn __eqsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __lesf2(a, b);
-}
-
-pub fn __ltsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __lesf2(a, b);
-}
-
-pub fn __nesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __lesf2(a, b);
-}
-
-pub fn __gtsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
-    return __gesf2(a, b);
-}
-
-pub fn __aeabi_fcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
-    @setRuntimeSafety(false);
-    return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
-}
-
-test "import comparesf2" {
-    _ = @import("comparesf2_test.zig");
-}
diff --git a/lib/std/special/compiler_rt/comparetf2.zig b/lib/std/special/compiler_rt/comparetf2.zig
deleted file mode 100644
index f2969f2112a4adf20de7692272dab81c4e3b7fee..0000000000000000000000000000000000000000
--- a/lib/std/special/compiler_rt/comparetf2.zig
+++ /dev/null
@@ -1,99 +0,0 @@
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const LE_LESS = @as(c_int, -1);
-const LE_EQUAL = @as(c_int, 0);
-const LE_GREATER = @as(c_int, 1);
-const LE_UNORDERED = @as(c_int, 1);
-
-const rep_t = u128;
-const srep_t = i128;
-
-const typeWidth = rep_t.bit_count;
-const significandBits = 112;
-const exponentBits = (typeWidth - significandBits - 1);
-const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
-const absMask = signBit - 1;
-const implicitBit = @as(rep_t, 1) << significandBits;
-const significandMask = implicitBit - 1;
-const exponentMask = absMask ^ significandMask;
-const infRep = exponentMask;
-
-const builtin = @import("builtin");
-const is_test = builtin.is_test;
-
-pub fn __letf2(a: f128, b: f128) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-
-    const aInt = @bitCast(rep_t, a);
-    const bInt = @bitCast(rep_t, b);
-
-    const aAbs: rep_t = aInt & absMask;
-    const bAbs: rep_t = bInt & absMask;
-
-    // If either a or b is NaN, they are unordered.
-    if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
-
-    // If a and b are both zeros, they are equal.
-    if ((aAbs | bAbs) == 0) return LE_EQUAL;
-
-    // If at least one of a and b is positive, we get the same result comparing
-    // a and b as signed integers as we would with a floating-point compare.
-    return if ((aInt & bInt) >= 0)
-        if (aInt < bInt)
-            LE_LESS
-        else if (aInt == bInt)
-            LE_EQUAL
-        else
-            LE_GREATER
-    else
-    // Otherwise, both are negative, so we need to flip the sense of the
-    // comparison to get the correct result.  (This assumes a twos- or ones-
-    // complement integer representation; if integers are represented in a
-    // sign-magnitude representation, then this flip is incorrect).
-    if (aInt > bInt)
-        LE_LESS
-    else if (aInt == bInt)
-        LE_EQUAL
-    else
-        LE_GREATER;
-}
-
-// TODO https://github.com/ziglang/zig/issues/641
-// and then make the return types of some of these functions the enum instead of c_int
-const GE_LESS = @as(c_int, -1);
-const GE_EQUAL = @as(c_int, 0);
-const GE_GREATER = @as(c_int, 1);
-const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
-
-pub fn __getf2(a: f128, b: f128) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-
-    const aInt = @bitCast(srep_t, a);
-    const bInt = @bitCast(srep_t, b);
-    const aAbs = @bitCast(rep_t, aInt) & absMask;
-    const bAbs = @bitCast(rep_t, bInt) & absMask;
-
-    if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
-    if ((aAbs | bAbs) == 0) return GE_EQUAL;
-    return if ((aInt & bInt) >= 0)
-        if (aInt < bInt)
-            GE_LESS
-        else if (aInt == bInt)
-            GE_EQUAL
-        else
-            GE_GREATER
-    else if (aInt > bInt)
-        GE_LESS
-    else if (aInt == bInt)
-        GE_EQUAL
-    else
-        GE_GREATER;
-}
-
-pub fn __unordtf2(a: f128, b: f128) callconv(.C) c_int {
-    @setRuntimeSafety(is_test);
-
-    const aAbs = @bitCast(rep_t, a) & absMask;
-    const bAbs = @bitCast(rep_t, b) & absMask;
-    return @boolToInt(aAbs > infRep or bAbs > infRep);
-}
-- 
2.54.0


From ae31da9334851dfca226ece1a66457d8df3e4abe Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 23:40:58 +0100
Subject: [PATCH 027/116] Minor cleanup

---
 lib/std/special/compiler_rt.zig | 22 +---------------------
 1 file changed, 1 insertion(+), 21 deletions(-)

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index 920707d1c467ae01c79bf0be8e1bdbdfaf0296e2..213348f0d06b7b20432848356fc295e886f7bd21 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -148,7 +148,7 @@ comptime {
 
     @export(@import("compiler_rt/clzsi2.zig").__clzsi2, .{ .name = "__clzsi2", .linkage = linkage });
 
-    if (is_arm_arch and !is_arm_64 and !is_test) {
+    if (builtin.arch.isARM() and !is_test) {
         @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });
         @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });
         @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = linkage });
@@ -324,23 +324,3 @@ extern var __stack_chk_guard: usize = blk: {
     buf[@sizeOf(usize) - 2] = '\n';
     break :blk @bitCast(usize, buf);
 };
-
-const is_arm_64 = switch (builtin.arch) {
-    builtin.Arch.aarch64,
-    builtin.Arch.aarch64_be,
-    => true,
-    else => false,
-};
-
-const is_arm_arch = switch (builtin.arch) {
-    builtin.Arch.arm,
-    builtin.Arch.armeb,
-    builtin.Arch.aarch64,
-    builtin.Arch.aarch64_be,
-    builtin.Arch.thumb,
-    builtin.Arch.thumbeb,
-    => true,
-    else => false,
-};
-
-const is_arm_32 = is_arm_arch and !is_arm_64;
-- 
2.54.0


From 3247fd7862bc5277a2c931f56b41f4f7c085611c Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 18 Jan 2020 23:50:00 +0100
Subject: [PATCH 028/116] Export MSVC builtins inconditionally

---
 lib/std/special/compiler_rt.zig | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index 213348f0d06b7b20432848356fc295e886f7bd21..0867629091938f3f34d24133537c22c4626fcb93 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -240,6 +240,15 @@ comptime {
         @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
         @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
     }
+
+    if (builtin.arch == .i386 and builtin.abi == .msvc) {
+        // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
+        @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
+        @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
+        @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
+        @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
+    }
+
     if (builtin.os == .windows) {
         // Default stack-probe functions emitted by LLVM
         if (is_mingw) {
@@ -258,13 +267,6 @@ comptime {
 
         switch (builtin.arch) {
             .i386 => {
-                // Don't let LLVM apply the stdcall name mangling on those MSVC
-                // builtin functions
-                @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
-                @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
-                @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
-                @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
-
                 @export(@import("compiler_rt/divti3.zig").__divti3, .{ .name = "__divti3", .linkage = linkage });
                 @export(@import("compiler_rt/modti3.zig").__modti3, .{ .name = "__modti3", .linkage = linkage });
                 @export(@import("compiler_rt/multi3.zig").__multi3, .{ .name = "__multi3", .linkage = linkage });
@@ -299,16 +301,12 @@ comptime {
     @export(@import("compiler_rt/mulodi4.zig").__mulodi4, .{ .name = "__mulodi4", .linkage = linkage });
 }
 
-const std = @import("std");
-const assert = std.debug.assert;
-const testing = std.testing;
-
 // Avoid dragging in the runtime safety mechanisms into this .o file,
 // unless we're trying to test this file.
 pub fn panic(msg: []const u8, error_return_trace: ?*builtin.StackTrace) noreturn {
     @setCold(true);
     if (is_test) {
-        std.debug.panic("{}", .{msg});
+        @import("std").debug.panic("{}", .{msg});
     } else {
         unreachable;
     }
-- 
2.54.0


From 5fbc1c28121c1030de5ba8ca106a3dd8516cfd87 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sun, 19 Jan 2020 00:10:42 +0100
Subject: [PATCH 029/116] Nuke some more code

---
 lib/std/special/compiler_rt.zig               | 20 +++----
 .../special/compiler_rt/arm/aeabi_dcmp.zig    | 30 -----------
 .../special/compiler_rt/arm/aeabi_fcmp.zig    | 30 -----------
 lib/std/special/compiler_rt/compareXf2.zig    | 52 +++++++++++++++++++
 4 files changed, 62 insertions(+), 70 deletions(-)
 delete mode 100644 lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
 delete mode 100644 lib/std/special/compiler_rt/arm/aeabi_fcmp.zig

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index 0867629091938f3f34d24133537c22c4626fcb93..90dbf0cdf4f502a54e13e8b99b101cbc396d76d0 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -226,18 +226,18 @@ comptime {
         @export(@import("compiler_rt/divsf3.zig").__aeabi_fdiv, .{ .name = "__aeabi_fdiv", .linkage = linkage });
         @export(@import("compiler_rt/divdf3.zig").__aeabi_ddiv, .{ .name = "__aeabi_ddiv", .linkage = linkage });
 
-        @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
         @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
 
-        @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
-        @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
+        @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
         @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
     }
 
diff --git a/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig b/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
deleted file mode 100644
index 47e7fac81ab8eaa42f8a0bb24bdb35a331b3111d..0000000000000000000000000000000000000000
--- a/lib/std/special/compiler_rt/arm/aeabi_dcmp.zig
+++ /dev/null
@@ -1,30 +0,0 @@
-// Ported from:
-//
-// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
-
-const comparedf2 = @import("../comparedf2.zig");
-
-pub fn __aeabi_dcmpeq(a: f64, b: f64) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__eqdf2, .{ a, b }) == 0);
-}
-
-pub fn __aeabi_dcmplt(a: f64, b: f64) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__ltdf2, .{ a, b }) < 0);
-}
-
-pub fn __aeabi_dcmple(a: f64, b: f64) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__ledf2, .{ a, b }) <= 0);
-}
-
-pub fn __aeabi_dcmpge(a: f64, b: f64) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__gedf2, .{ a, b }) >= 0);
-}
-
-pub fn __aeabi_dcmpgt(a: f64, b: f64) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparedf2.__gtdf2, .{ a, b }) > 0);
-}
diff --git a/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig b/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig
deleted file mode 100644
index c53643b3689b9b33aa4560d661988c5e80065d93..0000000000000000000000000000000000000000
--- a/lib/std/special/compiler_rt/arm/aeabi_fcmp.zig
+++ /dev/null
@@ -1,30 +0,0 @@
-// Ported from:
-//
-// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_fcmp.S
-
-const comparesf2 = @import("../comparesf2.zig");
-
-pub fn __aeabi_fcmpeq(a: f32, b: f32) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__eqsf2, .{ a, b }) == 0);
-}
-
-pub fn __aeabi_fcmplt(a: f32, b: f32) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__ltsf2, .{ a, b }) < 0);
-}
-
-pub fn __aeabi_fcmple(a: f32, b: f32) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__lesf2, .{ a, b }) <= 0);
-}
-
-pub fn __aeabi_fcmpge(a: f32, b: f32) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__gesf2, .{ a, b }) >= 0);
-}
-
-pub fn __aeabi_fcmpgt(a: f32, b: f32) callconv(.AAPCS) i32 {
-    @setRuntimeSafety(false);
-    return @boolToInt(@call(.{ .modifier = .always_inline }, comparesf2.__gtsf2, .{ a, b }) > 0);
-}
diff --git a/lib/std/special/compiler_rt/compareXf2.zig b/lib/std/special/compiler_rt/compareXf2.zig
index 3253abe87198e8cb6662b493face3b327cbd6d4d..15e49e3cc123b9e53aa9ebe9a8e52b7688f60b7b 100644
--- a/lib/std/special/compiler_rt/compareXf2.zig
+++ b/lib/std/special/compiler_rt/compareXf2.zig
@@ -183,11 +183,63 @@ pub fn __unordtf2(a: f128, b: f128) callconv(.C) i32 {
     return @call(.{ .modifier = .always_inline }, unordcmp, .{ f128, a, b });
 }
 
+// ARM EABI intrinsics
+
+pub fn __aeabi_fcmpeq(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __eqsf2, .{ a, b }) == 0);
+}
+
+pub fn __aeabi_fcmplt(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __ltsf2, .{ a, b }) < 0);
+}
+
+pub fn __aeabi_fcmple(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __lesf2, .{ a, b }) <= 0);
+}
+
+pub fn __aeabi_fcmpge(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __gesf2, .{ a, b }) >= 0);
+}
+
+pub fn __aeabi_fcmpgt(a: f32, b: f32) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __gtsf2, .{ a, b }) > 0);
+}
+
 pub fn __aeabi_fcmpun(a: f32, b: f32) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
     return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
 }
 
+pub fn __aeabi_dcmpeq(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __eqdf2, .{ a, b }) == 0);
+}
+
+pub fn __aeabi_dcmplt(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __ltdf2, .{ a, b }) < 0);
+}
+
+pub fn __aeabi_dcmple(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __ledf2, .{ a, b }) <= 0);
+}
+
+pub fn __aeabi_dcmpge(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __gedf2, .{ a, b }) >= 0);
+}
+
+pub fn __aeabi_dcmpgt(a: f64, b: f64) callconv(.AAPCS) i32 {
+    @setRuntimeSafety(false);
+    return @boolToInt(@call(.{ .modifier = .always_inline }, __gtdf2, .{ a, b }) > 0);
+}
+
 pub fn __aeabi_dcmpun(a: f64, b: f64) callconv(.AAPCS) i32 {
     @setRuntimeSafety(false);
     return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
-- 
2.54.0


From 861724bcf045327204a32b0e97517c0004122434 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sun, 19 Jan 2020 09:31:45 +0100
Subject: [PATCH 030/116] Fix some tests broken by the renamed files

---
 lib/std/special/compiler_rt/comparedf2_test.zig | 2 +-
 lib/std/special/compiler_rt/comparesf2_test.zig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/std/special/compiler_rt/comparedf2_test.zig b/lib/std/special/compiler_rt/comparedf2_test.zig
index b0e5757ec04c2db524045ed93036e4ef415dad47..16a2a258ce15eb249b7b7e5452f046e18a71a79f 100644
--- a/lib/std/special/compiler_rt/comparedf2_test.zig
+++ b/lib/std/special/compiler_rt/comparedf2_test.zig
@@ -6,7 +6,7 @@ const std = @import("std");
 const builtin = @import("builtin");
 const is_test = builtin.is_test;
 
-const comparedf2 = @import("comparedf2.zig");
+const comparedf2 = @import("compareXf2.zig");
 
 const TestVector = struct {
     a: f64,
diff --git a/lib/std/special/compiler_rt/comparesf2_test.zig b/lib/std/special/compiler_rt/comparesf2_test.zig
index d736988bfb80853d0f35cac6d5233f44e8188662..e3966c021b9c794fef6586c08b8c4bea6215426b 100644
--- a/lib/std/special/compiler_rt/comparesf2_test.zig
+++ b/lib/std/special/compiler_rt/comparesf2_test.zig
@@ -6,7 +6,7 @@ const std = @import("std");
 const builtin = @import("builtin");
 const is_test = builtin.is_test;
 
-const comparesf2 = @import("comparesf2.zig");
+const comparesf2 = @import("compareXf2.zig");
 
 const TestVector = struct {
     a: f32,
-- 
2.54.0


From 7a1cde7206263c8bb3265c225ed4213d1b7bdb58 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sun, 19 Jan 2020 10:06:48 +0100
Subject: [PATCH 031/116] Fix wrong error code being returned in enum analisys

Fixes the assertion failure seen in #4233
---
 src/analyze.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/analyze.cpp b/src/analyze.cpp
index 0bbec66a9b214a9e79bdda4c43572235582c4571..638b0b03b0420d36afb6211121b68a089296fec9 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -2605,7 +2605,7 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
                                     buf_ptr(&wanted_tag_int_type->name)));
                     add_error_note(g, msg, decl_node->data.container_decl.init_arg_expr,
                         buf_sprintf("any integral type of size 8, 16, 32, 64 or 128 bit is valid"));
-                    return ErrorNone;
+                    return ErrorSemanticAnalyzeFail;
                 }
             }
             tag_int_type = wanted_tag_int_type;
-- 
2.54.0


From 0f46c12f789d10915e04c8aec26f0330536539c7 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Mon, 16 Dec 2019 16:13:03 -0500
Subject: [PATCH 032/116] Create initial target details infrastructure

---
 lib/std/std.zig                               |    1 +
 lib/std/target.zig                            |    3 +
 lib/std/target/cpu.zig                        |   65 +
 lib/std/target/cpu/AArch64Cpu.zig             |  480 ++
 lib/std/target/cpu/AmdGpuCpu.zig              | 1060 +++++
 lib/std/target/cpu/ArmCpu.zig                 | 1230 ++++++
 lib/std/target/cpu/AvrCpu.zig                 | 3863 +++++++++++++++++
 lib/std/target/cpu/BpfCpu.zig                 |   29 +
 lib/std/target/cpu/HexagonCpu.zig             |  103 +
 lib/std/target/cpu/MipsCpu.zig                |  190 +
 lib/std/target/cpu/Msp430Cpu.zig              |   24 +
 lib/std/target/cpu/NvptxCpu.zig               |   85 +
 lib/std/target/cpu/PowerPcCpu.zig             |  451 ++
 lib/std/target/cpu/RiscVCpu.zig               |   23 +
 lib/std/target/cpu/SparcCpu.zig               |  216 +
 lib/std/target/cpu/SystemZCpu.zig             |  279 ++
 lib/std/target/cpu/WebAssemblyCpu.zig         |   28 +
 lib/std/target/cpu/X86Cpu.zig                 | 1864 ++++++++
 lib/std/target/cpu/empty.zig                  |    6 +
 lib/std/target/feature.zig                    |   76 +
 lib/std/target/feature/AArch64Feature.zig     |  750 ++++
 lib/std/target/feature/AmdGpuFeature.zig      |  343 ++
 lib/std/target/feature/ArmFeature.zig         |  818 ++++
 lib/std/target/feature/AvrFeature.zig         |  230 +
 lib/std/target/feature/BpfFeature.zig         |   17 +
 lib/std/target/feature/HexagonFeature.zig     |   76 +
 lib/std/target/feature/MipsFeature.zig        |  238 +
 lib/std/target/feature/Msp430Feature.zig      |   19 +
 lib/std/target/feature/NvptxFeature.zig       |   61 +
 lib/std/target/feature/PowerPcFeature.zig     |  163 +
 lib/std/target/feature/RiscVFeature.zig       |   31 +
 lib/std/target/feature/SparcFeature.zig       |   49 +
 lib/std/target/feature/SystemZFeature.zig     |   81 +
 lib/std/target/feature/WebAssemblyFeature.zig |   33 +
 lib/std/target/feature/X86Feature.zig         |  342 ++
 lib/std/target/feature/empty.zig              |    5 +
 36 files changed, 13332 insertions(+)
 create mode 100644 lib/std/target/cpu.zig
 create mode 100644 lib/std/target/cpu/AArch64Cpu.zig
 create mode 100644 lib/std/target/cpu/AmdGpuCpu.zig
 create mode 100644 lib/std/target/cpu/ArmCpu.zig
 create mode 100644 lib/std/target/cpu/AvrCpu.zig
 create mode 100644 lib/std/target/cpu/BpfCpu.zig
 create mode 100644 lib/std/target/cpu/HexagonCpu.zig
 create mode 100644 lib/std/target/cpu/MipsCpu.zig
 create mode 100644 lib/std/target/cpu/Msp430Cpu.zig
 create mode 100644 lib/std/target/cpu/NvptxCpu.zig
 create mode 100644 lib/std/target/cpu/PowerPcCpu.zig
 create mode 100644 lib/std/target/cpu/RiscVCpu.zig
 create mode 100644 lib/std/target/cpu/SparcCpu.zig
 create mode 100644 lib/std/target/cpu/SystemZCpu.zig
 create mode 100644 lib/std/target/cpu/WebAssemblyCpu.zig
 create mode 100644 lib/std/target/cpu/X86Cpu.zig
 create mode 100644 lib/std/target/cpu/empty.zig
 create mode 100644 lib/std/target/feature.zig
 create mode 100644 lib/std/target/feature/AArch64Feature.zig
 create mode 100644 lib/std/target/feature/AmdGpuFeature.zig
 create mode 100644 lib/std/target/feature/ArmFeature.zig
 create mode 100644 lib/std/target/feature/AvrFeature.zig
 create mode 100644 lib/std/target/feature/BpfFeature.zig
 create mode 100644 lib/std/target/feature/HexagonFeature.zig
 create mode 100644 lib/std/target/feature/MipsFeature.zig
 create mode 100644 lib/std/target/feature/Msp430Feature.zig
 create mode 100644 lib/std/target/feature/NvptxFeature.zig
 create mode 100644 lib/std/target/feature/PowerPcFeature.zig
 create mode 100644 lib/std/target/feature/RiscVFeature.zig
 create mode 100644 lib/std/target/feature/SparcFeature.zig
 create mode 100644 lib/std/target/feature/SystemZFeature.zig
 create mode 100644 lib/std/target/feature/WebAssemblyFeature.zig
 create mode 100644 lib/std/target/feature/X86Feature.zig
 create mode 100644 lib/std/target/feature/empty.zig

diff --git a/lib/std/std.zig b/lib/std/std.zig
index dd4d968efbc9fa8fa81ffaf07245dc77d56a2896..f268bfe848e6fcc4c943ddb6601b4e8aca5de8cc 100644
--- a/lib/std/std.zig
+++ b/lib/std/std.zig
@@ -60,6 +60,7 @@ pub const rand = @import("rand.zig");
 pub const rb = @import("rb.zig");
 pub const sort = @import("sort.zig");
 pub const ascii = @import("ascii.zig");
+pub const target = @import("target.zig");
 pub const testing = @import("testing.zig");
 pub const time = @import("time.zig");
 pub const unicode = @import("unicode.zig");
diff --git a/lib/std/target.zig b/lib/std/target.zig
index d62786ff7f3474dde175019b9c662c1cee5c0211..029bf0148947c4b175a5f2edb81a082c13870d00 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -2,6 +2,9 @@ const std = @import("std.zig");
 const mem = std.mem;
 const builtin = std.builtin;
 
+pub const feature = @import("target/feature.zig");
+pub const cpu = @import("target/cpu.zig");
+
 /// TODO Nearly all the functions in this namespace would be
 /// better off if https://github.com/ziglang/zig/issues/425
 /// was solved.
diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..02e707078a608724e6e8814664134ec300775fca
--- /dev/null
+++ b/lib/std/target/cpu.zig
@@ -0,0 +1,65 @@
+const std = @import("std");
+
+const feature = @import("feature.zig");
+const Arch = @import("arch.zig").Arch;
+
+pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu;
+pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu;
+pub const ArmCpu = @import("cpu/ArmCpu.zig").ArmCpu;
+pub const AvrCpu = @import("cpu/AvrCpu.zig").AvrCpu;
+pub const BpfCpu = @import("cpu/BpfCpu.zig").BpfCpu;
+pub const HexagonCpu = @import("cpu/HexagonCpu.zig").HexagonCpu;
+pub const MipsCpu = @import("cpu/MipsCpu.zig").MipsCpu;
+pub const Msp430Cpu = @import("cpu/Msp430Cpu.zig").Msp430Cpu;
+pub const NvptxCpu = @import("cpu/NvptxCpu.zig").NvptxCpu;
+pub const PowerPcCpu = @import("cpu/PowerPcCpu.zig").PowerPcCpu;
+pub const RiscVCpu = @import("cpu/RiscVCpu.zig").RiscVCpu;
+pub const SparcCpu = @import("cpu/SparcCpu.zig").SparcCpu;
+pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu;
+pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu;
+pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu;
+
+const EmptyCpu = @import("feature/empty.zig").EmptyCpu;
+
+pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => ArmCpu,
+        .aarch64, .aarch64_be, .aarch64_32 => AArch64Cpu,
+        .avr => AvrCpu,
+        .bpfel, .bpfeb => BpfCpu,
+        .hexagon => HexagonCpu,
+        .mips, .mipsel, .mips64, .mips64el => MipsCpu,
+        .msp430 => Msp430Cpu,
+        .powerpc, .powerpc64, .powerpc64le => PowerPcCpu,
+        .amdgcn => AmdGpuCpu,
+        .riscv32, .riscv64 => RiscVCpu,
+        .sparc, .sparcv9, .sparcel => SparcCpu,
+        .s390x => SystemZCpu,
+        .i386, .x86_64 => X86Cpu,
+        .nvptx, .nvptx64 => NvptxCpu,
+        .wasm32, .wasm64 => WebAssemblyCpu,
+
+        else => EmptyCpu,
+    };
+}
+
+pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type {
+    return CpuInfo(feature.ArchFeature(arch));
+}
+
+pub fn CpuInfo(comptime FeatureType: type) type {
+    return struct {
+        name: []const u8,
+
+        features: []const FeatureType,
+
+        const Self = @This();
+
+        fn create(name: []const u8, features: []const FeatureType) Self {
+            return Self {
+                .name = name,
+                .features = features,
+            };
+        }
+    };
+}
diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..d6c86aba0a3941a3b70aeaf7c709f6b9648b2fd3
--- /dev/null
+++ b/lib/std/target/cpu/AArch64Cpu.zig
@@ -0,0 +1,480 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const AArch64Cpu = enum {
+    AppleLatest,
+    CortexA35,
+    CortexA53,
+    CortexA55,
+    CortexA57,
+    CortexA65,
+    CortexA65ae,
+    CortexA72,
+    CortexA73,
+    CortexA75,
+    CortexA76,
+    CortexA76ae,
+    Cyclone,
+    ExynosM1,
+    ExynosM2,
+    ExynosM3,
+    ExynosM4,
+    ExynosM5,
+    Falkor,
+    Generic,
+    Kryo,
+    NeoverseE1,
+    NeoverseN1,
+    Saphira,
+    Thunderx,
+    Thunderx2t99,
+    Thunderxt81,
+    Thunderxt83,
+    Thunderxt88,
+    Tsv110,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.AArch64Feature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType {
+            .ZczFp,
+            .ArithCbzFusion,
+            .FuseAes,
+            .AlternateSextloadCvtF32Pattern,
+            .ZczFpWorkaround,
+            .FpArmv8,
+            .Perfmon,
+            .DisableLatencySchedHeuristic,
+            .Zcm,
+            .ZczGp,
+            .ArithBccFusion,
+            .FuseCryptoEor,
+            .Cyclone,
+        },
+        CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .A35,
+        },
+        CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+            .UseAa,
+            .FuseAes,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .BalanceFpOps,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .A53,
+        },
+        CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A55,
+        },
+        CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
+            .FuseLiterals,
+            .FuseAes,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .BalanceFpOps,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+            .A57,
+        },
+        CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A65,
+        },
+        CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A65,
+        },
+        CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+            .Perfmon,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+            .A72,
+        },
+        CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+            .Perfmon,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+            .A73,
+        },
+        CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A75,
+        },
+        CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A76,
+        },
+        CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .A76,
+        },
+        CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
+            .ZczFp,
+            .ArithCbzFusion,
+            .FuseAes,
+            .AlternateSextloadCvtF32Pattern,
+            .ZczFpWorkaround,
+            .FpArmv8,
+            .Perfmon,
+            .DisableLatencySchedHeuristic,
+            .Zcm,
+            .ZczGp,
+            .ArithBccFusion,
+            .FuseCryptoEor,
+            .Cyclone,
+        },
+        CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+            .ZczFp,
+            .FuseAes,
+            .SlowPaired128,
+            .Force32bitJumpTables,
+            .UseReciprocalSquareRoot,
+            .FpArmv8,
+            .Perfmon,
+            .SlowMisaligned128store,
+            .Crc,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Exynosm1,
+        },
+        CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+            .ZczFp,
+            .FuseAes,
+            .SlowPaired128,
+            .Force32bitJumpTables,
+            .FpArmv8,
+            .Perfmon,
+            .SlowMisaligned128store,
+            .Crc,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Exynosm2,
+        },
+        CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+            .ZczFp,
+            .FuseLiterals,
+            .FuseAes,
+            .Force32bitJumpTables,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .LslFast,
+            .FuseAddress,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+            .FuseCsel,
+            .Exynosm3,
+        },
+        CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+            .ZczFp,
+            .Lse,
+            .FuseArithLogic,
+            .Lor,
+            .UsePostraScheduler,
+            .Uaops,
+            .CustomCheapAsMove,
+            .ArithBccFusion,
+            .Ccpp,
+            .Perfmon,
+            .Pan,
+            .Rdm,
+            .FuseLiterals,
+            .Force32bitJumpTables,
+            .LslFast,
+            .FuseAddress,
+            .ZczGp,
+            .Ras,
+            .FuseCsel,
+            .ArithCbzFusion,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+            .Dotprod,
+            .Vh,
+            .Exynosm4,
+        },
+        CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+            .ZczFp,
+            .Lse,
+            .FuseArithLogic,
+            .Lor,
+            .UsePostraScheduler,
+            .Uaops,
+            .CustomCheapAsMove,
+            .ArithBccFusion,
+            .Ccpp,
+            .Perfmon,
+            .Pan,
+            .Rdm,
+            .FuseLiterals,
+            .Force32bitJumpTables,
+            .LslFast,
+            .FuseAddress,
+            .ZczGp,
+            .Ras,
+            .FuseCsel,
+            .ArithCbzFusion,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+            .Dotprod,
+            .Vh,
+            .Exynosm4,
+        },
+        CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType {
+            .ZczFp,
+            .Rdm,
+            .SlowStrqroStore,
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .LslFast,
+            .UsePostraScheduler,
+            .ZczGp,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+            .Falkor,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+            .Trbe,
+            .Ete,
+            .FpArmv8,
+            .FuseAes,
+            .Neon,
+            .Perfmon,
+            .UsePostraScheduler,
+        },
+        CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
+            .ZczFp,
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .LslFast,
+            .UsePostraScheduler,
+            .ZczGp,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+            .Kryo,
+        },
+        CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .Neoversee1,
+        },
+        CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
+            .Rcpc,
+            .Spe,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+            .Neoversen1,
+        },
+        CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType {
+            .ZczFp,
+            .Nv,
+            .Am,
+            .Lse,
+            .Sel2,
+            .Lor,
+            .Tracev84,
+            .Uaops,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Ccpp,
+            .Perfmon,
+            .TlbRmi,
+            .PredictableSelectExpensive,
+            .Fmi,
+            .Rcpc,
+            .Pan,
+            .Rdm,
+            .LslFast,
+            .Pa,
+            .ZczGp,
+            .Dit,
+            .Ras,
+            .Spe,
+            .Mpam,
+            .FpArmv8,
+            .Ccidx,
+            .Dotprod,
+            .Crc,
+            .Vh,
+            .Saphira,
+        },
+        CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+            .Thunderx,
+        },
+        CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
+            .Pan,
+            .Rdm,
+            .Vh,
+            .AggressiveFma,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Lor,
+            .UsePostraScheduler,
+            .ArithBccFusion,
+            .PredictableSelectExpensive,
+            .Thunderx2t99,
+        },
+        CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+            .Thunderxt81,
+        },
+        CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+            .Thunderxt83,
+        },
+        CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+            .Thunderxt88,
+        },
+        CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType {
+            .Uaops,
+            .Spe,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Vh,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Ras,
+            .Tsv110,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..f035e0e368670903adef2ec9aa073e35df7f3a6b
--- /dev/null
+++ b/lib/std/target/cpu/AmdGpuCpu.zig
@@ -0,0 +1,1060 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const AmdGpuCpu = enum {
+    Bonaire,
+    Carrizo,
+    Fiji,
+    Generic,
+    GenericHsa,
+    Gfx1010,
+    Gfx1011,
+    Gfx1012,
+    Gfx600,
+    Gfx601,
+    Gfx700,
+    Gfx701,
+    Gfx702,
+    Gfx703,
+    Gfx704,
+    Gfx801,
+    Gfx802,
+    Gfx803,
+    Gfx810,
+    Gfx900,
+    Gfx902,
+    Gfx904,
+    Gfx906,
+    Gfx908,
+    Gfx909,
+    Hainan,
+    Hawaii,
+    Iceland,
+    Kabini,
+    Kaveri,
+    Mullins,
+    Oland,
+    Pitcairn,
+    Polaris10,
+    Polaris11,
+    Stoney,
+    Tahiti,
+    Tonga,
+    Verde,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.AmdGpuFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType {
+            .CodeObjectV3,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+            .Xnack,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+            .Wavefrontsize64,
+        },
+        CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
+            .FlatAddressSpace,
+            .Wavefrontsize64,
+        },
+        CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType {
+            .CodeObjectV3,
+            .DlInsts,
+            .NoXnackSupport,
+            .FlatSegmentOffsetBug,
+            .Gfx9Insts,
+            .NoSdstCmpx,
+            .Fp64,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .Dpp,
+            .RegisterBanking,
+            .Gfx10Insts,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .FmaMixInsts,
+            .PkFmacF16Inst,
+            .Vop3Literal,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .Movrel,
+            .Dpp8,
+            .ApertureRegs,
+            .NoDataDepHazard,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Vscnt,
+            .Gfx10,
+            .InstFwdPrefetchBug,
+            .Ldsbankcount32,
+            .LdsBranchVmemWarHazard,
+            .LdsMisalignedBug,
+            .NsaEncoding,
+            .NsaToVmemBug,
+            .Offset3fBug,
+            .SmemToVectorWriteHazard,
+            .ScalarAtomics,
+            .ScalarFlatScratchInsts,
+            .ScalarStores,
+            .VmemToScalarWriteHazard,
+            .VcmpxExecWarHazard,
+            .VcmpxPermlaneHazard,
+            .Wavefrontsize32,
+        },
+        CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType {
+            .CodeObjectV3,
+            .DlInsts,
+            .NoXnackSupport,
+            .Dot1Insts,
+            .Dot2Insts,
+            .Dot5Insts,
+            .Dot6Insts,
+            .FlatSegmentOffsetBug,
+            .Gfx9Insts,
+            .NoSdstCmpx,
+            .Fp64,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .Dpp,
+            .RegisterBanking,
+            .Gfx10Insts,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .FmaMixInsts,
+            .PkFmacF16Inst,
+            .Vop3Literal,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .Movrel,
+            .Dpp8,
+            .ApertureRegs,
+            .NoDataDepHazard,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Vscnt,
+            .Gfx10,
+            .InstFwdPrefetchBug,
+            .Ldsbankcount32,
+            .LdsBranchVmemWarHazard,
+            .NsaEncoding,
+            .NsaToVmemBug,
+            .Offset3fBug,
+            .SmemToVectorWriteHazard,
+            .ScalarAtomics,
+            .ScalarFlatScratchInsts,
+            .ScalarStores,
+            .VmemToScalarWriteHazard,
+            .VcmpxExecWarHazard,
+            .VcmpxPermlaneHazard,
+            .Wavefrontsize32,
+        },
+        CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType {
+            .CodeObjectV3,
+            .DlInsts,
+            .NoXnackSupport,
+            .Dot1Insts,
+            .Dot2Insts,
+            .Dot5Insts,
+            .Dot6Insts,
+            .FlatSegmentOffsetBug,
+            .Gfx9Insts,
+            .NoSdstCmpx,
+            .Fp64,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .Dpp,
+            .RegisterBanking,
+            .Gfx10Insts,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .FmaMixInsts,
+            .PkFmacF16Inst,
+            .Vop3Literal,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .Movrel,
+            .Dpp8,
+            .ApertureRegs,
+            .NoDataDepHazard,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Vscnt,
+            .Gfx10,
+            .InstFwdPrefetchBug,
+            .Ldsbankcount32,
+            .LdsBranchVmemWarHazard,
+            .LdsMisalignedBug,
+            .NsaEncoding,
+            .NsaToVmemBug,
+            .Offset3fBug,
+            .SmemToVectorWriteHazard,
+            .ScalarAtomics,
+            .ScalarFlatScratchInsts,
+            .ScalarStores,
+            .VmemToScalarWriteHazard,
+            .VcmpxExecWarHazard,
+            .VcmpxPermlaneHazard,
+            .Wavefrontsize32,
+        },
+        CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+        },
+        CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .FastFmaf,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType {
+            .CodeObjectV3,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+            .Xnack,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .SgprInitBug,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType {
+            .CodeObjectV3,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+            .Xnack,
+        },
+        CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoSramEccSupport,
+            .NoXnackSupport,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+            .MadMixInsts,
+        },
+        CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoSramEccSupport,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+            .MadMixInsts,
+            .Xnack,
+        },
+        CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoSramEccSupport,
+            .NoXnackSupport,
+            .FmaMixInsts,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+        },
+        CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType {
+            .CodeObjectV3,
+            .DlInsts,
+            .NoXnackSupport,
+            .Dot1Insts,
+            .Dot2Insts,
+            .FmaMixInsts,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType {
+            .AtomicFaddInsts,
+            .CodeObjectV3,
+            .DlInsts,
+            .Dot1Insts,
+            .Dot2Insts,
+            .Dot3Insts,
+            .Dot4Insts,
+            .Dot5Insts,
+            .Dot6Insts,
+            .FmaMixInsts,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+            .MaiInsts,
+            .MfmaInlineLiteralBug,
+            .PkFmacF16Inst,
+            .SramEcc,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType {
+            .CodeObjectV3,
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Gfx9,
+            .Ldsbankcount32,
+            .MadMixInsts,
+            .Xnack,
+        },
+        CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+        },
+        CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .SgprInitBug,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+            .SeaIslands,
+        },
+        CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+        },
+        CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+        },
+        CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType {
+            .CodeObjectV3,
+            .Ldsbankcount16,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+            .Xnack,
+        },
+        CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .FastFmaf,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+            .HalfRate64Ops,
+        },
+        CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .SgprInitBug,
+            .UnpackedD16Vmem,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+            .VolcanicIslands,
+        },
+        CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType {
+            .CodeObjectV3,
+            .NoXnackSupport,
+            .Ldsbankcount32,
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize32768,
+            .SouthernIslands,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..5e60628d48177d300248ecdc3b2172763e6ac907
--- /dev/null
+++ b/lib/std/target/cpu/ArmCpu.zig
@@ -0,0 +1,1230 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const ArmCpu = enum {
+    Arm1020e,
+    Arm1020t,
+    Arm1022e,
+    Arm10e,
+    Arm10tdmi,
+    Arm1136jS,
+    Arm1136jfS,
+    Arm1156t2S,
+    Arm1156t2fS,
+    Arm1176jS,
+    Arm1176jzS,
+    Arm1176jzfS,
+    Arm710t,
+    Arm720t,
+    Arm7tdmi,
+    Arm7tdmiS,
+    Arm8,
+    Arm810,
+    Arm9,
+    Arm920,
+    Arm920t,
+    Arm922t,
+    Arm926ejS,
+    Arm940t,
+    Arm946eS,
+    Arm966eS,
+    Arm968eS,
+    Arm9e,
+    Arm9tdmi,
+    CortexA12,
+    CortexA15,
+    CortexA17,
+    CortexA32,
+    CortexA35,
+    CortexA5,
+    CortexA53,
+    CortexA55,
+    CortexA57,
+    CortexA7,
+    CortexA72,
+    CortexA73,
+    CortexA75,
+    CortexA76,
+    CortexA76ae,
+    CortexA8,
+    CortexA9,
+    CortexM0,
+    CortexM0plus,
+    CortexM1,
+    CortexM23,
+    CortexM3,
+    CortexM33,
+    CortexM35p,
+    CortexM4,
+    CortexM7,
+    CortexR4,
+    CortexR4f,
+    CortexR5,
+    CortexR52,
+    CortexR7,
+    CortexR8,
+    Cyclone,
+    Ep9312,
+    ExynosM1,
+    ExynosM2,
+    ExynosM3,
+    ExynosM4,
+    ExynosM5,
+    Generic,
+    Iwmmxt,
+    Krait,
+    Kryo,
+    Mpcore,
+    Mpcorenovfp,
+    NeoverseN1,
+    Sc000,
+    Sc300,
+    Strongarm,
+    Strongarm110,
+    Strongarm1100,
+    Strongarm1110,
+    Swift,
+    Xscale,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.ArmFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType {
+            .V4t,
+            .Armv5t,
+        },
+        CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
+            .V4t,
+            .Armv5t,
+        },
+        CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
+            .V4t,
+            .Dsp,
+            .Armv6,
+        },
+        CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
+            .V4t,
+            .Dsp,
+            .Armv6,
+            .Slowfpvmlx,
+            .Fpregs,
+            .Vfp2,
+        },
+        CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
+            .Thumb2,
+            .V4t,
+            .Dsp,
+            .Armv6t2,
+        },
+        CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
+            .Thumb2,
+            .V4t,
+            .Dsp,
+            .Armv6t2,
+            .Slowfpvmlx,
+            .Fpregs,
+            .Vfp2,
+        },
+        CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
+            .V4t,
+            .Trustzone,
+            .Armv6kz,
+        },
+        CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
+            .V4t,
+            .Trustzone,
+            .Armv6kz,
+        },
+        CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
+            .V4t,
+            .Trustzone,
+            .Armv6kz,
+            .Slowfpvmlx,
+            .Fpregs,
+            .Vfp2,
+        },
+        CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidPartialCpsr,
+            .RetAddrStack,
+            .Mp,
+            .Trustzone,
+            .Fp16,
+            .Vfp4,
+            .VmlxForwarding,
+            .HwdivArm,
+            .Hwdiv,
+            .Virtualization,
+            .A12,
+        },
+        CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidPartialCpsr,
+            .VldnAlign,
+            .DontWidenVmovs,
+            .RetAddrStack,
+            .Mp,
+            .MuxedUnits,
+            .SplatVfpNeon,
+            .Trustzone,
+            .Fp16,
+            .Vfp4,
+            .HwdivArm,
+            .Hwdiv,
+            .Virtualization,
+            .A15,
+        },
+        CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidPartialCpsr,
+            .RetAddrStack,
+            .Mp,
+            .Trustzone,
+            .Fp16,
+            .Vfp4,
+            .VmlxForwarding,
+            .HwdivArm,
+            .Hwdiv,
+            .Virtualization,
+            .A17,
+        },
+        CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+        },
+        CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+            .A35,
+        },
+        CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .Mp,
+            .SlowFpBrcc,
+            .Trustzone,
+            .Fp16,
+            .Vfp4,
+            .VmlxForwarding,
+            .A5,
+        },
+        CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+            .Fpao,
+            .A53,
+        },
+        CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Dotprod,
+            .A55,
+        },
+        CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .AvoidPartialCpsr,
+            .CheapPredicableCpsr,
+            .Crypto,
+            .Fpao,
+            .A57,
+        },
+        CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .VmlxHazards,
+            .Mp,
+            .SlowFpBrcc,
+            .Trustzone,
+            .Fp16,
+            .Vfp4,
+            .VmlxForwarding,
+            .HwdivArm,
+            .Hwdiv,
+            .Virtualization,
+            .A7,
+        },
+        CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+            .A72,
+        },
+        CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+            .A73,
+        },
+        CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Dotprod,
+            .A75,
+        },
+        CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Crypto,
+            .Dotprod,
+            .Fullfp16,
+            .A76,
+        },
+        CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Crypto,
+            .Dotprod,
+            .Fullfp16,
+            .A76,
+        },
+        CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .VmlxHazards,
+            .NonpipelinedVfp,
+            .SlowFpBrcc,
+            .Trustzone,
+            .VmlxForwarding,
+            .A8,
+        },
+        CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidPartialCpsr,
+            .VldnAlign,
+            .ExpandFpMlx,
+            .Fp16,
+            .RetAddrStack,
+            .VmlxHazards,
+            .Mp,
+            .MuxedUnits,
+            .NeonFpmovs,
+            .PreferVmovsr,
+            .Trustzone,
+            .VmlxForwarding,
+            .A9,
+        },
+        CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+            .Armv6M,
+        },
+        CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+            .Armv6M,
+        },
+        CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+            .Armv6M,
+        },
+        CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .AcquireRelease,
+            .Armv8Mbase,
+            .NoMovt,
+        },
+        CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .Armv7M,
+            .NoBranchPredictor,
+            .LoopAlign,
+            .UseAa,
+            .UseMisched,
+            .M3,
+        },
+        CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .AcquireRelease,
+            .Armv8Mmain,
+            .Dsp,
+            .Fp16,
+            .Fpregs,
+            .FpArmv8d16sp,
+            .NoBranchPredictor,
+            .Slowfpvmlx,
+            .LoopAlign,
+            .UseAa,
+            .UseMisched,
+        },
+        CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .AcquireRelease,
+            .Armv8Mmain,
+            .Dsp,
+            .Fp16,
+            .Fpregs,
+            .FpArmv8d16sp,
+            .NoBranchPredictor,
+            .Slowfpvmlx,
+            .LoopAlign,
+            .UseAa,
+            .UseMisched,
+        },
+        CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .Armv7eM,
+            .NoBranchPredictor,
+            .Slowfpvmlx,
+            .LoopAlign,
+            .UseAa,
+            .UseMisched,
+            .Fp16,
+            .Fpregs,
+            .Vfp4d16sp,
+        },
+        CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .Armv7eM,
+            .Fp16,
+            .Fpregs,
+            .FpArmv8d16,
+        },
+        CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Armv7R,
+            .AvoidPartialCpsr,
+            .RetAddrStack,
+            .R4,
+        },
+        CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Armv7R,
+            .AvoidPartialCpsr,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .Fpregs,
+            .Vfp3d16,
+            .R4,
+        },
+        CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Armv7R,
+            .AvoidPartialCpsr,
+            .HwdivArm,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .Fpregs,
+            .Vfp3d16,
+            .R5,
+        },
+        CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dfb,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .AcquireRelease,
+            .Armv8R,
+            .Fpao,
+            .UseAa,
+            .UseMisched,
+            .R52,
+        },
+        CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Armv7R,
+            .AvoidPartialCpsr,
+            .Fp16,
+            .HwdivArm,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .Mp,
+            .SlowFpBrcc,
+            .Fpregs,
+            .Vfp3d16,
+            .R7,
+        },
+        CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Armv7R,
+            .AvoidPartialCpsr,
+            .Fp16,
+            .HwdivArm,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .Mp,
+            .SlowFpBrcc,
+            .Fpregs,
+            .Vfp3d16,
+        },
+        CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .AvoidMovsShop,
+            .AvoidPartialCpsr,
+            .Crypto,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .Neonfp,
+            .DisablePostraScheduler,
+            .UseMisched,
+            .Vfp4,
+            .Zcz,
+            .Swift,
+        },
+        CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType {
+            .V4t,
+            .Armv4t,
+        },
+        CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .ExpandFpMlx,
+            .RetAddrStack,
+            .UseAa,
+            .Exynos,
+        },
+        CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .ExpandFpMlx,
+            .RetAddrStack,
+            .UseAa,
+            .Exynos,
+        },
+        CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .ExpandFpMlx,
+            .RetAddrStack,
+            .UseAa,
+            .Exynos,
+        },
+        CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Dotprod,
+            .Fullfp16,
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .ExpandFpMlx,
+            .RetAddrStack,
+            .UseAa,
+            .Exynos,
+        },
+        CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Dotprod,
+            .Fullfp16,
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .ExpandFpMlx,
+            .RetAddrStack,
+            .UseAa,
+            .Exynos,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+        CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidPartialCpsr,
+            .VldnAlign,
+            .Fp16,
+            .HwdivArm,
+            .Hwdiv,
+            .RetAddrStack,
+            .MuxedUnits,
+            .Vfp4,
+            .VmlxForwarding,
+            .Krait,
+        },
+        CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv8A,
+            .Crypto,
+            .Kryo,
+        },
+        CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType {
+            .V4t,
+            .Armv6k,
+            .Slowfpvmlx,
+            .Fpregs,
+            .Vfp2,
+        },
+        CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
+            .V4t,
+            .Armv6k,
+        },
+        CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+            .Armv82A,
+            .Crypto,
+            .Dotprod,
+        },
+        CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+            .Armv6M,
+        },
+        CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .Armv7M,
+            .NoBranchPredictor,
+            .UseAa,
+            .UseMisched,
+            .M3,
+        },
+        CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
+            .Armv4,
+        },
+        CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+            .Armv7A,
+            .AvoidMovsShop,
+            .AvoidPartialCpsr,
+            .HwdivArm,
+            .Hwdiv,
+            .RetAddrStack,
+            .Slowfpvmlx,
+            .VmlxHazards,
+            .Mp,
+            .Neonfp,
+            .DisablePostraScheduler,
+            .PreferIshst,
+            .ProfUnpr,
+            .SlowLoadDSubreg,
+            .SlowOddReg,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .UseMisched,
+            .WideStrideVfp,
+            .Fp16,
+            .Vfp4,
+            .Swift,
+        },
+        CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType {
+            .V4t,
+            .Armv5te,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..529152899b222a49092aa6e5bb8188808fe518c5
--- /dev/null
+++ b/lib/std/target/cpu/AvrCpu.zig
@@ -0,0 +1,3863 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const AvrCpu = enum {
+    At43usb320,
+    At43usb355,
+    At76c711,
+    At86rf401,
+    At90c8534,
+    At90can128,
+    At90can32,
+    At90can64,
+    At90pwm1,
+    At90pwm161,
+    At90pwm2,
+    At90pwm216,
+    At90pwm2b,
+    At90pwm3,
+    At90pwm316,
+    At90pwm3b,
+    At90pwm81,
+    At90s1200,
+    At90s2313,
+    At90s2323,
+    At90s2333,
+    At90s2343,
+    At90s4414,
+    At90s4433,
+    At90s4434,
+    At90s8515,
+    At90s8535,
+    At90scr100,
+    At90usb1286,
+    At90usb1287,
+    At90usb162,
+    At90usb646,
+    At90usb647,
+    At90usb82,
+    At94k,
+    Ata5272,
+    Ata5505,
+    Ata5790,
+    Ata5795,
+    Ata6285,
+    Ata6286,
+    Ata6289,
+    Atmega103,
+    Atmega128,
+    Atmega1280,
+    Atmega1281,
+    Atmega1284,
+    Atmega1284p,
+    Atmega1284rfr2,
+    Atmega128a,
+    Atmega128rfa1,
+    Atmega128rfr2,
+    Atmega16,
+    Atmega161,
+    Atmega162,
+    Atmega163,
+    Atmega164a,
+    Atmega164p,
+    Atmega164pa,
+    Atmega165,
+    Atmega165a,
+    Atmega165p,
+    Atmega165pa,
+    Atmega168,
+    Atmega168a,
+    Atmega168p,
+    Atmega168pa,
+    Atmega169,
+    Atmega169a,
+    Atmega169p,
+    Atmega169pa,
+    Atmega16a,
+    Atmega16hva,
+    Atmega16hva2,
+    Atmega16hvb,
+    Atmega16hvbrevb,
+    Atmega16m1,
+    Atmega16u2,
+    Atmega16u4,
+    Atmega2560,
+    Atmega2561,
+    Atmega2564rfr2,
+    Atmega256rfr2,
+    Atmega32,
+    Atmega323,
+    Atmega324a,
+    Atmega324p,
+    Atmega324pa,
+    Atmega325,
+    Atmega3250,
+    Atmega3250a,
+    Atmega3250p,
+    Atmega3250pa,
+    Atmega325a,
+    Atmega325p,
+    Atmega325pa,
+    Atmega328,
+    Atmega328p,
+    Atmega329,
+    Atmega3290,
+    Atmega3290a,
+    Atmega3290p,
+    Atmega3290pa,
+    Atmega329a,
+    Atmega329p,
+    Atmega329pa,
+    Atmega32a,
+    Atmega32c1,
+    Atmega32hvb,
+    Atmega32hvbrevb,
+    Atmega32m1,
+    Atmega32u2,
+    Atmega32u4,
+    Atmega32u6,
+    Atmega406,
+    Atmega48,
+    Atmega48a,
+    Atmega48p,
+    Atmega48pa,
+    Atmega64,
+    Atmega640,
+    Atmega644,
+    Atmega644a,
+    Atmega644p,
+    Atmega644pa,
+    Atmega644rfr2,
+    Atmega645,
+    Atmega6450,
+    Atmega6450a,
+    Atmega6450p,
+    Atmega645a,
+    Atmega645p,
+    Atmega649,
+    Atmega6490,
+    Atmega6490a,
+    Atmega6490p,
+    Atmega649a,
+    Atmega649p,
+    Atmega64a,
+    Atmega64c1,
+    Atmega64hve,
+    Atmega64m1,
+    Atmega64rfr2,
+    Atmega8,
+    Atmega8515,
+    Atmega8535,
+    Atmega88,
+    Atmega88a,
+    Atmega88p,
+    Atmega88pa,
+    Atmega8a,
+    Atmega8hva,
+    Atmega8u2,
+    Attiny10,
+    Attiny102,
+    Attiny104,
+    Attiny11,
+    Attiny12,
+    Attiny13,
+    Attiny13a,
+    Attiny15,
+    Attiny1634,
+    Attiny167,
+    Attiny20,
+    Attiny22,
+    Attiny2313,
+    Attiny2313a,
+    Attiny24,
+    Attiny24a,
+    Attiny25,
+    Attiny26,
+    Attiny261,
+    Attiny261a,
+    Attiny28,
+    Attiny4,
+    Attiny40,
+    Attiny4313,
+    Attiny43u,
+    Attiny44,
+    Attiny44a,
+    Attiny45,
+    Attiny461,
+    Attiny461a,
+    Attiny48,
+    Attiny5,
+    Attiny828,
+    Attiny84,
+    Attiny84a,
+    Attiny85,
+    Attiny861,
+    Attiny861a,
+    Attiny87,
+    Attiny88,
+    Attiny9,
+    Atxmega128a1,
+    Atxmega128a1u,
+    Atxmega128a3,
+    Atxmega128a3u,
+    Atxmega128a4u,
+    Atxmega128b1,
+    Atxmega128b3,
+    Atxmega128c3,
+    Atxmega128d3,
+    Atxmega128d4,
+    Atxmega16a4,
+    Atxmega16a4u,
+    Atxmega16c4,
+    Atxmega16d4,
+    Atxmega16e5,
+    Atxmega192a3,
+    Atxmega192a3u,
+    Atxmega192c3,
+    Atxmega192d3,
+    Atxmega256a3,
+    Atxmega256a3b,
+    Atxmega256a3bu,
+    Atxmega256a3u,
+    Atxmega256c3,
+    Atxmega256d3,
+    Atxmega32a4,
+    Atxmega32a4u,
+    Atxmega32c4,
+    Atxmega32d4,
+    Atxmega32e5,
+    Atxmega32x1,
+    Atxmega384c3,
+    Atxmega384d3,
+    Atxmega64a1,
+    Atxmega64a1u,
+    Atxmega64a3,
+    Atxmega64a3u,
+    Atxmega64a4u,
+    Atxmega64b1,
+    Atxmega64b3,
+    Atxmega64c3,
+    Atxmega64d3,
+    Atxmega64d4,
+    Atxmega8e5,
+    Avr1,
+    Avr2,
+    Avr25,
+    Avr3,
+    Avr31,
+    Avr35,
+    Avr4,
+    Avr5,
+    Avr51,
+    Avr6,
+    Avrtiny,
+    Avrxmega1,
+    Avrxmega2,
+    Avrxmega3,
+    Avrxmega4,
+    Avrxmega5,
+    Avrxmega6,
+    Avrxmega7,
+    M3000,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.AvrFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Elpm,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr31,
+        },
+        CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+        },
+        CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+        },
+        CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+            .Lpmx,
+            .Movw,
+        },
+        CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType {
+            .Avr0,
+        },
+        CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+            .Lpmx,
+            .Movw,
+            .Mul,
+        },
+        CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Elpm,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr31,
+        },
+        CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+            .Lpmx,
+            .Movw,
+            .Mul,
+            .Spm,
+        },
+        CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+            .Lpmx,
+            .Movw,
+            .Mul,
+            .Spm,
+        },
+        CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr6,
+        },
+        CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr6,
+        },
+        CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr6,
+        },
+        CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr6,
+        },
+        CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+            .Lpmx,
+            .Movw,
+            .Mul,
+            .Spm,
+        },
+        CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+            .Lpmx,
+            .Movw,
+            .Mul,
+            .Spm,
+        },
+        CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType {
+            .Lpm,
+            .Avr0,
+            .Avr1,
+        },
+        CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType {
+            .Lpm,
+            .Avr0,
+            .Avr1,
+        },
+        CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType {
+            .Lpm,
+            .Avr0,
+            .Avr1,
+        },
+        CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+            .Lpmx,
+        },
+        CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType {
+            .Lpm,
+            .Avr0,
+            .Avr1,
+        },
+        CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmegau,
+        },
+        CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType {
+            .Lpm,
+            .Avr0,
+            .Avr1,
+        },
+        CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr2,
+        },
+        CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr25,
+        },
+        CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr3,
+        },
+        CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType {
+            .Ijmpcall,
+            .Sram,
+            .Elpm,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr31,
+        },
+        CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr35,
+        },
+        CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+            .Avr4,
+        },
+        CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+        CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr51,
+        },
+        CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr6,
+        },
+        CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+            .Avrtiny,
+        },
+        CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+            .Xmega,
+        },
+        CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Avr5,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..f53b00a915e3fcdb0359c1f80dca812399396eeb
--- /dev/null
+++ b/lib/std/target/cpu/BpfCpu.zig
@@ -0,0 +1,29 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const BpfCpu = enum {
+    Generic,
+    Probe,
+    V1,
+    V2,
+    V3,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.BpfFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType {
+        },
+    };
+};
diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..fc0449cb3b27468bea4d7a797988980cd9dc3ab5
--- /dev/null
+++ b/lib/std/target/cpu/HexagonCpu.zig
@@ -0,0 +1,103 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const HexagonCpu = enum {
+    Generic,
+    Hexagonv5,
+    Hexagonv55,
+    Hexagonv60,
+    Hexagonv62,
+    Hexagonv65,
+    Hexagonv66,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.HexagonFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+            .V5,
+            .V55,
+            .V60,
+            .Duplex,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
+            .V5,
+            .Duplex,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
+            .V5,
+            .V55,
+            .Duplex,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
+            .V5,
+            .V55,
+            .V60,
+            .Duplex,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
+            .V5,
+            .V55,
+            .V60,
+            .V62,
+            .Duplex,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
+            .V5,
+            .V55,
+            .V60,
+            .V62,
+            .V65,
+            .Duplex,
+            .Mem_noshuf,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+        CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
+            .V5,
+            .V55,
+            .V60,
+            .V62,
+            .V65,
+            .V66,
+            .Duplex,
+            .Mem_noshuf,
+            .Memops,
+            .Packets,
+            .Nvj,
+            .Nvs,
+            .SmallData,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..fc1653d64785c60718b421f53ec867d14c0386c5
--- /dev/null
+++ b/lib/std/target/cpu/MipsCpu.zig
@@ -0,0 +1,190 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const MipsCpu = enum {
+    Mips1,
+    Mips2,
+    Mips3,
+    Mips32,
+    Mips32r2,
+    Mips32r3,
+    Mips32r5,
+    Mips32r6,
+    Mips4,
+    Mips5,
+    Mips64,
+    Mips64r2,
+    Mips64r3,
+    Mips64r5,
+    Mips64r6,
+    Octeon,
+    P5600,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.MipsFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType {
+            .Mips1,
+        },
+        CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType {
+            .Mips1,
+            .Mips2,
+        },
+        CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips3_32r2,
+            .Mips1,
+            .Gp64,
+            .Mips3,
+        },
+        CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType {
+            .Mips3_32,
+            .Mips4_32,
+            .Mips1,
+            .Mips32,
+        },
+        CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+            .Mips32r2,
+        },
+        CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+            .Mips32r3,
+        },
+        CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+            .Mips32r5,
+        },
+        CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Abs2008,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Nan2008,
+            .Mips5_32r2,
+            .Mips32r6,
+        },
+        CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips4,
+        },
+        CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips5,
+        },
+        CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips64,
+        },
+        CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips64r2,
+        },
+        CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips64r3,
+        },
+        CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips64r5,
+        },
+        CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Abs2008,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Nan2008,
+            .Gp64,
+            .Mips5_32r2,
+            .Mips64r6,
+        },
+        CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+            .Cnmips,
+            .Mips64r2,
+        },
+        CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+            .P5600,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..e501c71063dc35f839f42eba4afeeac38efab36c
--- /dev/null
+++ b/lib/std/target/cpu/Msp430Cpu.zig
@@ -0,0 +1,24 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const Msp430Cpu = enum {
+    Generic,
+    Msp430,
+    Msp430x,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.Msp430Feature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType {
+            .Ext,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..5519bc35cb24f8aafbe2352073d0b9b57f052f6f
--- /dev/null
+++ b/lib/std/target/cpu/NvptxCpu.zig
@@ -0,0 +1,85 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const NvptxCpu = enum {
+    Sm_20,
+    Sm_21,
+    Sm_30,
+    Sm_32,
+    Sm_35,
+    Sm_37,
+    Sm_50,
+    Sm_52,
+    Sm_53,
+    Sm_60,
+    Sm_61,
+    Sm_62,
+    Sm_70,
+    Sm_72,
+    Sm_75,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.NvptxFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType {
+            .Sm_20,
+        },
+        CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType {
+            .Sm_21,
+        },
+        CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType {
+            .Sm_30,
+        },
+        CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType {
+            .Ptx40,
+            .Sm_32,
+        },
+        CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType {
+            .Sm_35,
+        },
+        CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType {
+            .Ptx41,
+            .Sm_37,
+        },
+        CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType {
+            .Ptx40,
+            .Sm_50,
+        },
+        CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType {
+            .Ptx41,
+            .Sm_52,
+        },
+        CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType {
+            .Ptx42,
+            .Sm_53,
+        },
+        CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType {
+            .Ptx50,
+            .Sm_60,
+        },
+        CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType {
+            .Ptx50,
+            .Sm_61,
+        },
+        CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType {
+            .Ptx50,
+            .Sm_62,
+        },
+        CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType {
+            .Ptx60,
+            .Sm_70,
+        },
+        CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType {
+            .Ptx61,
+            .Sm_72,
+        },
+        CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType {
+            .Ptx63,
+            .Sm_75,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..8b6deb3222db7df33f9ade0e54bf0ae640010910
--- /dev/null
+++ b/lib/std/target/cpu/PowerPcCpu.zig
@@ -0,0 +1,451 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const PowerPcCpu = enum {
+    440,
+    450,
+    601,
+    602,
+    603,
+    E603,
+    Ev603,
+    604,
+    E604,
+    620,
+    7400,
+    7450,
+    750,
+    970,
+    A2,
+    A2q,
+    E500,
+    E500mc,
+    E5500,
+    G3,
+    G4,
+    G4+,
+    G5,
+    Generic,
+    Ppc,
+    Ppc32,
+    Ppc64,
+    Ppc64le,
+    Pwr3,
+    Pwr4,
+    Pwr5,
+    Pwr5x,
+    Pwr6,
+    Pwr6x,
+    Pwr7,
+    Pwr8,
+    Pwr9,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.PowerPcFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.440, "440", &[_]FeatureType {
+            .Icbt,
+            .Booke,
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+            .Isel,
+            .Msync,
+        },
+        CpuInfo(@This()).create(.450, "450", &[_]FeatureType {
+            .Icbt,
+            .Booke,
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+            .Isel,
+            .Msync,
+        },
+        CpuInfo(@This()).create(.601, "601", &[_]FeatureType {
+            .HardFloat,
+            .Fpu,
+        },
+        CpuInfo(@This()).create(.602, "602", &[_]FeatureType {
+            .HardFloat,
+            .Fpu,
+        },
+        CpuInfo(@This()).create(.603, "603", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.604, "604", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.620, "620", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType {
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType {
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.750, "750", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.970, "970", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType {
+            .Bit64,
+            .Icbt,
+            .Booke,
+            .Cmpb,
+            .HardFloat,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Recipprec,
+            .Stfiwx,
+            .SlowPopcntd,
+        },
+        CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType {
+            .Bit64,
+            .Icbt,
+            .Booke,
+            .Cmpb,
+            .HardFloat,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Qpx,
+            .Recipprec,
+            .Stfiwx,
+            .SlowPopcntd,
+        },
+        CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType {
+            .Icbt,
+            .Booke,
+            .Isel,
+        },
+        CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType {
+            .Icbt,
+            .Booke,
+            .Isel,
+            .HardFloat,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType {
+            .Bit64,
+            .Icbt,
+            .Booke,
+            .Isel,
+            .Mfocrf,
+            .HardFloat,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType {
+            .HardFloat,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType {
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType {
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+        },
+        CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+            .HardFloat,
+        },
+        CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType {
+            .HardFloat,
+        },
+        CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType {
+            .HardFloat,
+        },
+        CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Bpermd,
+            .Cmpb,
+            .DirectMove,
+            .Extdiv,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Htm,
+            .Icbt,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Power8Altivec,
+            .Crypto,
+            .Power8Vector,
+            .Popcntd,
+            .PartwordAtomics,
+            .Recipprec,
+            .Stfiwx,
+            .TwoConstNr,
+            .Vsx,
+        },
+        CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fres,
+            .Frsqrte,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Mfocrf,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Cmpb,
+            .Fcpsgn,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Lfiwax,
+            .Mfocrf,
+            .Recipprec,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Cmpb,
+            .Fcpsgn,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Lfiwax,
+            .Mfocrf,
+            .Recipprec,
+            .Stfiwx,
+        },
+        CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Bpermd,
+            .Cmpb,
+            .Extdiv,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Popcntd,
+            .Recipprec,
+            .Stfiwx,
+            .TwoConstNr,
+            .Vsx,
+        },
+        CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Bpermd,
+            .Cmpb,
+            .DirectMove,
+            .Extdiv,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Htm,
+            .Icbt,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Power8Altivec,
+            .Crypto,
+            .Power8Vector,
+            .Popcntd,
+            .PartwordAtomics,
+            .Recipprec,
+            .Stfiwx,
+            .TwoConstNr,
+            .Vsx,
+        },
+        CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType {
+            .Bit64,
+            .HardFloat,
+            .Altivec,
+            .Bpermd,
+            .Cmpb,
+            .DirectMove,
+            .Extdiv,
+            .Fcpsgn,
+            .Fpcvt,
+            .Fprnd,
+            .Fre,
+            .Fres,
+            .Frsqrte,
+            .Frsqrtes,
+            .Fsqrt,
+            .Htm,
+            .Icbt,
+            .IsaV30Instructions,
+            .Isel,
+            .Ldbrx,
+            .Lfiwax,
+            .Mfocrf,
+            .Power8Altivec,
+            .Crypto,
+            .Power8Vector,
+            .Power9Altivec,
+            .Power9Vector,
+            .Popcntd,
+            .PpcPostraSched,
+            .PpcPreraSched,
+            .PartwordAtomics,
+            .Recipprec,
+            .Stfiwx,
+            .TwoConstNr,
+            .Vsx,
+            .VectorsUseTwoUnits,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..d5ba5144686670a4fed1802286350486490c0d40
--- /dev/null
+++ b/lib/std/target/cpu/RiscVCpu.zig
@@ -0,0 +1,23 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const RiscVCpu = enum {
+    GenericRv32,
+    GenericRv64,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.RiscVFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
+            .RvcHints,
+        },
+        CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
+            .Bit64,
+            .RvcHints,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..e1887ad7c57fe5605dbcac981c9fb39c7aa483a0
--- /dev/null
+++ b/lib/std/target/cpu/SparcCpu.zig
@@ -0,0 +1,216 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const SparcCpu = enum {
+    At697e,
+    At697f,
+    F934,
+    Generic,
+    Gr712rc,
+    Gr740,
+    Hypersparc,
+    Leon2,
+    Leon3,
+    Leon4,
+    Ma2080,
+    Ma2085,
+    Ma2100,
+    Ma2150,
+    Ma2155,
+    Ma2450,
+    Ma2455,
+    Ma2480,
+    Ma2485,
+    Ma2x5x,
+    Ma2x8x,
+    Myriad2,
+    Myriad21,
+    Myriad22,
+    Myriad23,
+    Niagara,
+    Niagara2,
+    Niagara3,
+    Niagara4,
+    Sparclet,
+    Sparclite,
+    Sparclite86x,
+    Supersparc,
+    Tsc701,
+    Ultrasparc,
+    Ultrasparc3,
+    Ut699,
+    V7,
+    V8,
+    V9,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.SparcFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType {
+            .Leon,
+            .Insertnopload,
+        },
+        CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType {
+            .Leon,
+            .Insertnopload,
+        },
+        CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType {
+            .Leon,
+            .Leonpwrpsr,
+            .Hasleoncasa,
+            .Leoncyclecounter,
+            .Hasumacsmac,
+        },
+        CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType {
+            .Leon,
+        },
+        CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType {
+            .Leon,
+            .Hasumacsmac,
+        },
+        CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+            .Hasumacsmac,
+        },
+        CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType {
+            .Leon,
+            .Hasleoncasa,
+        },
+        CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+            .Vis2,
+        },
+        CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+            .Vis2,
+            .Popc,
+        },
+        CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+            .Vis2,
+            .Popc,
+        },
+        CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+            .Vis2,
+            .Vis3,
+            .Popc,
+        },
+        CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+        },
+        CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
+            .DeprecatedV8,
+            .V9,
+            .Vis,
+            .Vis2,
+        },
+        CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType {
+            .Leon,
+            .NoFmuls,
+            .NoFsmuld,
+            .Fixallfdivsqrt,
+            .Insertnopload,
+        },
+        CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType {
+            .NoFsmuld,
+            .SoftMulDiv,
+        },
+        CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType {
+            .V9,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..ec5efcc1aed4a9c042a2119fc25544bb807e8e49
--- /dev/null
+++ b/lib/std/target/cpu/SystemZCpu.zig
@@ -0,0 +1,279 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const SystemZCpu = enum {
+    Arch10,
+    Arch11,
+    Arch12,
+    Arch13,
+    Arch8,
+    Arch9,
+    Generic,
+    Z10,
+    Z13,
+    Z14,
+    Z15,
+    Z196,
+    ZEC12,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.SystemZFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType {
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadStoreOnCond,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MiscellaneousExtensions,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+        },
+        CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MiscellaneousExtensions,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+        },
+        CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .GuardedStorage,
+            .HighWord,
+            .InsertReferenceBitsMultiple,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MessageSecurityAssistExtension7,
+            .MessageSecurityAssistExtension8,
+            .MiscellaneousExtensions,
+            .MiscellaneousExtensions2,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+            .VectorEnhancements1,
+            .VectorPackedDecimal,
+        },
+        CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DeflateConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .EnhancedSort,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .GuardedStorage,
+            .HighWord,
+            .InsertReferenceBitsMultiple,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MessageSecurityAssistExtension7,
+            .MessageSecurityAssistExtension8,
+            .MessageSecurityAssistExtension9,
+            .MiscellaneousExtensions,
+            .MiscellaneousExtensions2,
+            .MiscellaneousExtensions3,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+            .VectorEnhancements1,
+            .VectorEnhancements2,
+            .VectorPackedDecimal,
+            .VectorPackedDecimalEnhancement,
+        },
+        CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType {
+            .DistinctOps,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadStoreOnCond,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .PopulationCount,
+            .ResetReferenceBitsMultiple,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MiscellaneousExtensions,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+        },
+        CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .GuardedStorage,
+            .HighWord,
+            .InsertReferenceBitsMultiple,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MessageSecurityAssistExtension7,
+            .MessageSecurityAssistExtension8,
+            .MiscellaneousExtensions,
+            .MiscellaneousExtensions2,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+            .VectorEnhancements1,
+            .VectorPackedDecimal,
+        },
+        CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType {
+            .DfpPackedConversion,
+            .DfpZonedConversion,
+            .DeflateConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .EnhancedSort,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .GuardedStorage,
+            .HighWord,
+            .InsertReferenceBitsMultiple,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadAndZeroRightmostByte,
+            .LoadStoreOnCond,
+            .LoadStoreOnCond2,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MessageSecurityAssistExtension5,
+            .MessageSecurityAssistExtension7,
+            .MessageSecurityAssistExtension8,
+            .MessageSecurityAssistExtension9,
+            .MiscellaneousExtensions,
+            .MiscellaneousExtensions2,
+            .MiscellaneousExtensions3,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+            .Vector,
+            .VectorEnhancements1,
+            .VectorEnhancements2,
+            .VectorPackedDecimal,
+            .VectorPackedDecimalEnhancement,
+        },
+        CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType {
+            .DistinctOps,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadStoreOnCond,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .PopulationCount,
+            .ResetReferenceBitsMultiple,
+        },
+        CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType {
+            .DfpZonedConversion,
+            .DistinctOps,
+            .EnhancedDat2,
+            .ExecutionHint,
+            .FpExtension,
+            .FastSerialization,
+            .HighWord,
+            .InterlockedAccess1,
+            .LoadAndTrap,
+            .LoadStoreOnCond,
+            .MessageSecurityAssistExtension3,
+            .MessageSecurityAssistExtension4,
+            .MiscellaneousExtensions,
+            .PopulationCount,
+            .ProcessorAssist,
+            .ResetReferenceBitsMultiple,
+            .TransactionalExecution,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..b68b859c13a7f0b4482b3a7bcdc58d442514ce73
--- /dev/null
+++ b/lib/std/target/cpu/WebAssemblyCpu.zig
@@ -0,0 +1,28 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const WebAssemblyCpu = enum {
+    BleedingEdge,
+    Generic,
+    Mvp,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.WebAssemblyFeature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
+            .Atomics,
+            .MutableGlobals,
+            .NontrappingFptoint,
+            .Simd128,
+            .SignExt,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType {
+        },
+    };
+};
diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..dba81c654da297232465b0de0871aeefba31285c
--- /dev/null
+++ b/lib/std/target/cpu/X86Cpu.zig
@@ -0,0 +1,1864 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const X86Cpu = enum {
+    Amdfam10,
+    Athlon,
+    Athlon4,
+    AthlonFx,
+    AthlonMp,
+    AthlonTbird,
+    AthlonXp,
+    Athlon64,
+    Athlon64Sse3,
+    Atom,
+    Barcelona,
+    Bdver1,
+    Bdver2,
+    Bdver3,
+    Bdver4,
+    Bonnell,
+    Broadwell,
+    Btver1,
+    Btver2,
+    C3,
+    C32,
+    Cannonlake,
+    Cascadelake,
+    Cooperlake,
+    CoreAvxI,
+    CoreAvx2,
+    Core2,
+    Corei7,
+    Corei7Avx,
+    Generic,
+    Geode,
+    Goldmont,
+    GoldmontPlus,
+    Haswell,
+    I386,
+    I486,
+    I586,
+    I686,
+    IcelakeClient,
+    IcelakeServer,
+    Ivybridge,
+    K6,
+    K62,
+    K63,
+    K8,
+    K8Sse3,
+    Knl,
+    Knm,
+    Lakemont,
+    Nehalem,
+    Nocona,
+    Opteron,
+    OpteronSse3,
+    Penryn,
+    Pentium,
+    PentiumM,
+    PentiumMmx,
+    Pentium2,
+    Pentium3,
+    Pentium3m,
+    Pentium4,
+    Pentium4m,
+    Pentiumpro,
+    Prescott,
+    Sandybridge,
+    Silvermont,
+    Skx,
+    Skylake,
+    SkylakeAvx512,
+    Slm,
+    Tigerlake,
+    Tremont,
+    Westmere,
+    WinchipC6,
+    Winchip2,
+    X8664,
+    Yonah,
+    Znver1,
+    Znver2,
+
+    pub fn getInfo(self: @This()) CpuInfo {
+        return cpu_infos[@enumToInt(self)];
+    }
+
+    pub const FeatureType = feature.X86Feature;
+
+    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
+        CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Nopl,
+            .Popcnt,
+            .Sse,
+            .Sse4a,
+            .SlowShld,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cmov,
+            .Cx8,
+            .Nopl,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Nopl,
+            .Sse,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Nopl,
+            .Sse,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cmov,
+            .Cx8,
+            .Nopl,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Nopl,
+            .Sse,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .LeaSp,
+            .LeaUsesAg,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .PadShortFunctions,
+            .Sse,
+            .Ssse3,
+            .IdivlToDivb,
+            .IdivqToDivl,
+            .SlowTwoMemOps,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Nopl,
+            .Popcnt,
+            .Sse,
+            .Sse4a,
+            .SlowShld,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Branchfusion,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Fast11bytenop,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lwp,
+            .Lzcnt,
+            .Mmx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .SlowShld,
+            .X87,
+            .Xop,
+            .Xsave,
+        },
+        CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Bmi,
+            .Branchfusion,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fma,
+            .Fxsr,
+            .Fast11bytenop,
+            .FastBextr,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lwp,
+            .Lzcnt,
+            .Mmx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .SlowShld,
+            .Tbm,
+            .X87,
+            .Xop,
+            .Xsave,
+        },
+        CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Bmi,
+            .Branchfusion,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .Fast11bytenop,
+            .FastBextr,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lwp,
+            .Lzcnt,
+            .Mmx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .SlowShld,
+            .Tbm,
+            .X87,
+            .Xop,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Branchfusion,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .Fast11bytenop,
+            .FastBextr,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lwp,
+            .Lzcnt,
+            .Mmx,
+            .Mwaitx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .SlowShld,
+            .Tbm,
+            .X87,
+            .Xop,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .LeaSp,
+            .LeaUsesAg,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .PadShortFunctions,
+            .Sse,
+            .Ssse3,
+            .IdivlToDivb,
+            .IdivqToDivl,
+            .SlowTwoMemOps,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Avx,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .FalseDepsLzcntTzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Fast15bytenop,
+            .FastScalarShiftMasks,
+            .FastVectorShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Nopl,
+            .Popcnt,
+            .Prfchw,
+            .Sse,
+            .Sse4a,
+            .Ssse3,
+            .SlowShld,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Bmi,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fxsr,
+            .Fast15bytenop,
+            .FastBextr,
+            .FastHops,
+            .FastLzcnt,
+            .FastPartialYmmOrZmmWrite,
+            .FastScalarShiftMasks,
+            .FastVectorShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .Sse4a,
+            .Ssse3,
+            .SlowShld,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType {
+            .Mmx,
+            .Dnow3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Sse,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Avx512ifma,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Avx512vbmi,
+            .Avx512vl,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdrnd,
+            .Rdseed,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Avx512vl,
+            .Avx512vnni,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Avx512bf16,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdrnd,
+            .Rdseed,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Avx512vl,
+            .Avx512vnni,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Rdrnd,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowUnalignedMem32,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .FalseDepsLzcntTzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Rdrnd,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Sse,
+            .Ssse3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Popcnt,
+            .Sse,
+            .Sse42,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowUnalignedMem32,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Clflushopt,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fsgsbase,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Sha,
+            .Sse42,
+            .Ssse3,
+            .SlowIncdec,
+            .SlowLea,
+            .SlowTwoMemOps,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Clflushopt,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fsgsbase,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .Ptwrite,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Sse42,
+            .Ssse3,
+            .SlowIncdec,
+            .SlowLea,
+            .SlowTwoMemOps,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .FalseDepsLzcntTzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Rdrnd,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType {
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType {
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType {
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Avx512bitalg,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .Gfni,
+            .FastGather,
+            .Avx512ifma,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Vaes,
+            .Avx512vbmi,
+            .Avx512vbmi2,
+            .Avx512vl,
+            .Avx512vnni,
+            .Vpclmulqdq,
+            .Avx512vpopcntdq,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Avx512bitalg,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .Gfni,
+            .FastGather,
+            .Avx512ifma,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pconfig,
+            .Pku,
+            .Popcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Vaes,
+            .Avx512vbmi,
+            .Avx512vbmi2,
+            .Avx512vl,
+            .Avx512vnni,
+            .Vpclmulqdq,
+            .Avx512vpopcntdq,
+            .Wbnoinvd,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Rdrnd,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowUnalignedMem32,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType {
+            .Cx8,
+            .Mmx,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType {
+            .Mmx,
+            .Dnow3,
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType {
+            .Mmx,
+            .Dnow3,
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512cd,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512er,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastPartialYmmOrZmmWrite,
+            .FastGather,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Pclmul,
+            .Avx512pf,
+            .Popcnt,
+            .Prefetchwt1,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowIncdec,
+            .SlowPmaddwd,
+            .SlowTwoMemOps,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512cd,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512er,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastPartialYmmOrZmmWrite,
+            .FastGather,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Pclmul,
+            .Avx512pf,
+            .Popcnt,
+            .Prefetchwt1,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowIncdec,
+            .SlowPmaddwd,
+            .SlowTwoMemOps,
+            .Avx512vpopcntdq,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType {
+        },
+        CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Popcnt,
+            .Sse,
+            .Sse42,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
+            .Mmx,
+            .Dnowa3,
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastScalarShiftMasks,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowShld,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Sse,
+            .Sse41,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType {
+            .Cx8,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
+            .Cx8,
+            .Mmx,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Nopl,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Avx,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .SlowUnalignedMem32,
+            .X87,
+            .Xsave,
+            .Xsaveopt,
+        },
+        CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Sse,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Sse42,
+            .Ssse3,
+            .IdivqToDivl,
+            .SlowIncdec,
+            .SlowLea,
+            .SlowPmulld,
+            .SlowTwoMemOps,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdrnd,
+            .Rdseed,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Avx512vl,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Clflushopt,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .FastGather,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdrnd,
+            .Rdseed,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Avx512vl,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Movbe,
+            .Nopl,
+            .Sse,
+            .Pclmul,
+            .Popcnt,
+            .FalseDepsPopcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Sse42,
+            .Ssse3,
+            .IdivqToDivl,
+            .SlowIncdec,
+            .SlowLea,
+            .SlowPmulld,
+            .SlowTwoMemOps,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx,
+            .Avx2,
+            .Avx512f,
+            .Avx512bitalg,
+            .Bmi,
+            .Bmi2,
+            .Avx512bw,
+            .Avx512cd,
+            .Clflushopt,
+            .Clwb,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Avx512dq,
+            .Ermsb,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .FastShldRotate,
+            .FastScalarFsqrt,
+            .FastVariableShuffle,
+            .FastVectorFsqrt,
+            .Gfni,
+            .FastGather,
+            .Avx512ifma,
+            .Invpcid,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Movdir64b,
+            .Movdiri,
+            .Macrofusion,
+            .MergeToThreewayBranch,
+            .Nopl,
+            .Pclmul,
+            .Pku,
+            .Popcnt,
+            .Prfchw,
+            .Prefer256Bit,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Shstk,
+            .Sse42,
+            .Slow3opsLea,
+            .IdivqToDivl,
+            .Vaes,
+            .Avx512vbmi,
+            .Avx512vbmi2,
+            .Avx512vl,
+            .Avx512vnni,
+            .Avx512vp2intersect,
+            .Vpclmulqdq,
+            .Avx512vpopcntdq,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType {
+            .Bit64,
+            .Sse,
+            .Aes,
+            .Cldemote,
+            .Clflushopt,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fsgsbase,
+            .Fxsr,
+            .Gfni,
+            .Sahf,
+            .Mmx,
+            .Movbe,
+            .Movdir64b,
+            .Movdiri,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .Ptwrite,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sgx,
+            .Sha,
+            .Sse42,
+            .Ssse3,
+            .SlowIncdec,
+            .SlowLea,
+            .SlowTwoMemOps,
+            .Waitpkg,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .Fxsr,
+            .Sahf,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Sse,
+            .Pclmul,
+            .Popcnt,
+            .Sse42,
+            .X87,
+        },
+        CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
+            .Mmx,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType {
+            .Mmx,
+            .Dnow3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType {
+            .Bit64,
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Macrofusion,
+            .Nopl,
+            .Sse,
+            .Sse2,
+            .Slow3opsLea,
+            .SlowIncdec,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType {
+            .Cmov,
+            .Cx8,
+            .Fxsr,
+            .Mmx,
+            .Nopl,
+            .Sse,
+            .Sse3,
+            .SlowUnalignedMem16,
+            .X87,
+        },
+        CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Branchfusion,
+            .Clflushopt,
+            .Clzero,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .Fast15bytenop,
+            .FastBextr,
+            .FastLzcnt,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Mwaitx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .Rdrnd,
+            .Rdseed,
+            .Sha,
+            .Sse4a,
+            .SlowShld,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+        CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType {
+            .Bit64,
+            .Adx,
+            .Sse,
+            .Aes,
+            .Avx2,
+            .Bmi,
+            .Bmi2,
+            .Branchfusion,
+            .Clflushopt,
+            .Clwb,
+            .Clzero,
+            .Cmov,
+            .Cx8,
+            .Cx16,
+            .F16c,
+            .Fma,
+            .Fsgsbase,
+            .Fxsr,
+            .Fast15bytenop,
+            .FastBextr,
+            .FastLzcnt,
+            .FastScalarShiftMasks,
+            .Sahf,
+            .Lzcnt,
+            .Mmx,
+            .Movbe,
+            .Mwaitx,
+            .Nopl,
+            .Pclmul,
+            .Popcnt,
+            .Prfchw,
+            .Rdpid,
+            .Rdrnd,
+            .Rdseed,
+            .Sha,
+            .Sse4a,
+            .SlowShld,
+            .Wbnoinvd,
+            .X87,
+            .Xsave,
+            .Xsavec,
+            .Xsaveopt,
+            .Xsaves,
+        },
+    };
+};
diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig
new file mode 100644
index 0000000000000000000000000000000000000000..79e1826ddc8975f7cf34b56e03601505939199d2
--- /dev/null
+++ b/lib/std/target/cpu/empty.zig
@@ -0,0 +1,6 @@
+const feature = @import("std").target.feature;
+const CpuInfo = @import("std").target.cpu.CpuInfo;
+
+pub const EmptyCpu = enum {
+    pub const cpu_infos = [0]CpuInfo(@This()) {};
+};
diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..31dce695a5ef430a4c3b1538ab3fa58b92bb2847
--- /dev/null
+++ b/lib/std/target/feature.zig
@@ -0,0 +1,76 @@
+const builtin = @import("builtin");
+const std = @import("std");
+const Arch = std.Target.Arch;
+
+pub const AArch64Feature = @import("feature/AArch64Feature.zig").AArch64Feature;
+pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature;
+pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature;
+pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature;
+pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature;
+pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature;
+pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature;
+pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature;
+pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature;
+pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature;
+pub const RiscVFeature = @import("feature/RiscVFeature.zig").RiscVFeature;
+pub const SparcFeature = @import("feature/SparcFeature.zig").SparcFeature;
+pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature;
+pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature;
+pub const X86Feature = @import("feature/X86Feature.zig").X86Feature;
+
+const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
+
+pub fn ArchFeature(comptime arch: @TagType(Arch)) type {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => ArmFeature,
+        .aarch64, .aarch64_be, .aarch64_32 => AArch64Feature,
+        .avr => AvrFeature,
+        .bpfel, .bpfeb => BpfFeature,
+        .hexagon => HexagonFeature,
+        .mips, .mipsel, .mips64, .mips64el => MipsFeature,
+        .msp430 => Msp430Feature,
+        .powerpc, .powerpc64, .powerpc64le => PowerPcFeature,
+        .amdgcn => AmdGpuFeature,
+        .riscv32, .riscv64 => RiscVFeature,
+        .sparc, .sparcv9, .sparcel => SparcFeature,
+        .s390x => SystemZFeature,
+        .i386, .x86_64 => X86Feature,
+        .nvptx, .nvptx64 => NvptxFeature,
+        .wasm32, .wasm64 => WebAssemblyFeature,
+
+        else => EmptyFeature,
+    };
+}
+
+pub fn ArchFeatureInfo(comptime arch: @TagType(Arch)) type {
+    return FeatureInfo(ArchFeature(arch));
+}
+
+pub fn FeatureInfo(comptime EnumType: type) type {
+    return struct {
+        value: EnumType,
+        name: []const u8,
+
+        dependencies: []const EnumType,
+
+        const Self = @This();
+
+        fn create(value: EnumType, name: []const u8) Self {
+            return Self {
+                .value = value,
+                .name = name,
+
+                .dependencies = &[_]EnumType{},
+            };
+        }
+
+        fn createWithDeps(value: EnumType, name: []const u8, dependencies: []const EnumType) Self {
+            return Self {
+                .value = value,
+                .name = name,
+
+                .dependencies = dependencies,
+            };
+        }
+    };
+}
diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..849c028169709b92a91c8101faf4481786da574d
--- /dev/null
+++ b/lib/std/target/feature/AArch64Feature.zig
@@ -0,0 +1,750 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const AArch64Feature = enum {
+    Aes,
+    Am,
+    AggressiveFma,
+    Altnzcv,
+    AlternateSextloadCvtF32Pattern,
+    ArithBccFusion,
+    ArithCbzFusion,
+    BalanceFpOps,
+    Bti,
+    Ccidx,
+    Ccpp,
+    Crc,
+    Ccdp,
+    CallSavedX8,
+    CallSavedX9,
+    CallSavedX10,
+    CallSavedX11,
+    CallSavedX12,
+    CallSavedX13,
+    CallSavedX14,
+    CallSavedX15,
+    CallSavedX18,
+    Complxnum,
+    Crypto,
+    CustomCheapAsMove,
+    Dit,
+    DisableLatencySchedHeuristic,
+    Dotprod,
+    Ete,
+    ExynosCheapAsMove,
+    Fmi,
+    Fp16fml,
+    FpArmv8,
+    Fptoint,
+    Force32bitJumpTables,
+    Fullfp16,
+    FuseAes,
+    FuseAddress,
+    FuseArithLogic,
+    FuseCsel,
+    FuseCryptoEor,
+    FuseLiterals,
+    Jsconv,
+    Lor,
+    Lse,
+    LslFast,
+    Mpam,
+    Mte,
+    Neon,
+    Nv,
+    NoNegImmediates,
+    Pa,
+    Pan,
+    PanRwv,
+    Perfmon,
+    UsePostraScheduler,
+    Predres,
+    PredictableSelectExpensive,
+    Uaops,
+    Ras,
+    Rasv8_4,
+    Rcpc,
+    RcpcImmo,
+    Rdm,
+    Rand,
+    ReserveX1,
+    ReserveX2,
+    ReserveX3,
+    ReserveX4,
+    ReserveX5,
+    ReserveX6,
+    ReserveX7,
+    ReserveX9,
+    ReserveX10,
+    ReserveX11,
+    ReserveX12,
+    ReserveX13,
+    ReserveX14,
+    ReserveX15,
+    ReserveX18,
+    ReserveX20,
+    ReserveX21,
+    ReserveX22,
+    ReserveX23,
+    ReserveX24,
+    ReserveX25,
+    ReserveX26,
+    ReserveX27,
+    ReserveX28,
+    Sb,
+    Sel2,
+    Sha2,
+    Sha3,
+    Sm4,
+    Spe,
+    Ssbs,
+    Sve,
+    Sve2,
+    Sve2Aes,
+    Sve2Bitperm,
+    Sve2Sha3,
+    Sve2Sm4,
+    SlowMisaligned128store,
+    SlowPaired128,
+    SlowStrqroStore,
+    Specrestrict,
+    StrictAlign,
+    TlbRmi,
+    Tme,
+    Tracev84,
+    Trbe,
+    TaggedGlobals,
+    UseAa,
+    TpidrEl1,
+    TpidrEl2,
+    TpidrEl3,
+    UseReciprocalSquareRoot,
+    Vh,
+    Zcm,
+    Zcz,
+    ZczFp,
+    ZczFpWorkaround,
+    ZczGp,
+    V81a,
+    V82a,
+    V83a,
+    V84a,
+    V85a,
+    A35,
+    A53,
+    A55,
+    A57,
+    A65,
+    A72,
+    A73,
+    A75,
+    A76,
+    Cyclone,
+    Exynosm1,
+    Exynosm2,
+    Exynosm3,
+    Exynosm4,
+    Falkor,
+    Kryo,
+    Neoversee1,
+    Neoversen1,
+    Saphira,
+    Tsv110,
+    Thunderx,
+    Thunderx2t99,
+    Thunderxt81,
+    Thunderxt83,
+    Thunderxt88,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.Am, "am", "Enable v8.4-A Activity Monitors extension", "am"),
+        FeatureInfo(@This()).create(.AggressiveFma, "aggressive-fma", "Enable Aggressive FMA for floating-point.", "aggressive-fma"),
+        FeatureInfo(@This()).create(.Altnzcv, "altnzcv", "Enable alternative NZCV format for floating point comparisons", "altnzcv"),
+        FeatureInfo(@This()).create(.AlternateSextloadCvtF32Pattern, "alternate-sextload-cvt-f32-pattern", "Use alternative pattern for sextload convert to f32", "alternate-sextload-cvt-f32-pattern"),
+        FeatureInfo(@This()).create(.ArithBccFusion, "arith-bcc-fusion", "CPU fuses arithmetic+bcc operations", "arith-bcc-fusion"),
+        FeatureInfo(@This()).create(.ArithCbzFusion, "arith-cbz-fusion", "CPU fuses arithmetic + cbz/cbnz operations", "arith-cbz-fusion"),
+        FeatureInfo(@This()).create(.BalanceFpOps, "balance-fp-ops", "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", "balance-fp-ops"),
+        FeatureInfo(@This()).create(.Bti, "bti", "Enable Branch Target Identification", "bti"),
+        FeatureInfo(@This()).create(.Ccidx, "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", "ccidx"),
+        FeatureInfo(@This()).create(.Ccpp, "ccpp", "Enable v8.2 data Cache Clean to Point of Persistence", "ccpp"),
+        FeatureInfo(@This()).create(.Crc, "crc", "Enable ARMv8 CRC-32 checksum instructions", "crc"),
+        FeatureInfo(@This()).create(.Ccdp, "ccdp", "Enable v8.5 Cache Clean to Point of Deep Persistence", "ccdp"),
+        FeatureInfo(@This()).create(.CallSavedX8, "call-saved-x8", "Make X8 callee saved.", "call-saved-x8"),
+        FeatureInfo(@This()).create(.CallSavedX9, "call-saved-x9", "Make X9 callee saved.", "call-saved-x9"),
+        FeatureInfo(@This()).create(.CallSavedX10, "call-saved-x10", "Make X10 callee saved.", "call-saved-x10"),
+        FeatureInfo(@This()).create(.CallSavedX11, "call-saved-x11", "Make X11 callee saved.", "call-saved-x11"),
+        FeatureInfo(@This()).create(.CallSavedX12, "call-saved-x12", "Make X12 callee saved.", "call-saved-x12"),
+        FeatureInfo(@This()).create(.CallSavedX13, "call-saved-x13", "Make X13 callee saved.", "call-saved-x13"),
+        FeatureInfo(@This()).create(.CallSavedX14, "call-saved-x14", "Make X14 callee saved.", "call-saved-x14"),
+        FeatureInfo(@This()).create(.CallSavedX15, "call-saved-x15", "Make X15 callee saved.", "call-saved-x15"),
+        FeatureInfo(@This()).create(.CallSavedX18, "call-saved-x18", "Make X18 callee saved.", "call-saved-x18"),
+        FeatureInfo(@This()).createWithSubfeatures(.Complxnum, "complxnum", "Enable v8.3-A Floating-point complex number support", "complxnum", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable cryptographic instructions", "crypto", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.CustomCheapAsMove, "custom-cheap-as-move", "Use custom handling of cheap instructions", "custom-cheap-as-move"),
+        FeatureInfo(@This()).create(.Dit, "dit", "Enable v8.4-A Data Independent Timing instructions", "dit"),
+        FeatureInfo(@This()).create(.DisableLatencySchedHeuristic, "disable-latency-sched-heuristic", "Disable latency scheduling heuristic", "disable-latency-sched-heuristic"),
+        FeatureInfo(@This()).create(.Dotprod, "dotprod", "Enable dot product support", "dotprod"),
+        FeatureInfo(@This()).createWithSubfeatures(.Ete, "ete", "Enable Embedded Trace Extension", "ete", &[_]@This() {
+            .Trbe,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.ExynosCheapAsMove, "exynos-cheap-as-move", "Use Exynos specific handling of cheap instructions", "exynos-cheap-as-move", &[_]@This() {
+            .CustomCheapAsMove,
+        }),
+        FeatureInfo(@This()).create(.Fmi, "fmi", "Enable v8.4-A Flag Manipulation Instructions", "fmi"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable FP16 FML instructions", "fp16fml", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8"),
+        FeatureInfo(@This()).create(.Fptoint, "fptoint", "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", "fptoint"),
+        FeatureInfo(@This()).create(.Force32bitJumpTables, "force-32bit-jump-tables", "Force jump table entries to be 32-bits wide except at MinSize", "force-32bit-jump-tables"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Full FP16", "fullfp16", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
+        FeatureInfo(@This()).create(.FuseAddress, "fuse-address", "CPU fuses address generation and memory operations", "fuse-address"),
+        FeatureInfo(@This()).create(.FuseArithLogic, "fuse-arith-logic", "CPU fuses arithmetic and logic operations", "fuse-arith-logic"),
+        FeatureInfo(@This()).create(.FuseCsel, "fuse-csel", "CPU fuses conditional select operations", "fuse-csel"),
+        FeatureInfo(@This()).create(.FuseCryptoEor, "fuse-crypto-eor", "CPU fuses AES/PMULL and EOR operations", "fuse-crypto-eor"),
+        FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
+        FeatureInfo(@This()).createWithSubfeatures(.Jsconv, "jsconv", "Enable v8.3-A JavaScript FP conversion enchancement", "jsconv", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.Lor, "lor", "Enables ARM v8.1 Limited Ordering Regions extension", "lor"),
+        FeatureInfo(@This()).create(.Lse, "lse", "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", "lse"),
+        FeatureInfo(@This()).create(.LslFast, "lsl-fast", "CPU has a fastpath logical shift of up to 3 places", "lsl-fast"),
+        FeatureInfo(@This()).create(.Mpam, "mpam", "Enable v8.4-A Memory system Partitioning and Monitoring extension", "mpam"),
+        FeatureInfo(@This()).create(.Mte, "mte", "Enable Memory Tagging Extension", "mte"),
+        FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable Advanced SIMD instructions", "neon", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.Nv, "nv", "Enable v8.4-A Nested Virtualization Enchancement", "nv"),
+        FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
+        FeatureInfo(@This()).create(.Pa, "pa", "Enable v8.3-A Pointer Authentication enchancement", "pa"),
+        FeatureInfo(@This()).create(.Pan, "pan", "Enables ARM v8.1 Privileged Access-Never extension", "pan"),
+        FeatureInfo(@This()).createWithSubfeatures(.PanRwv, "pan-rwv", "Enable v8.2 PAN s1e1R and s1e1W Variants", "pan-rwv", &[_]@This() {
+            .Pan,
+        }),
+        FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", "perfmon"),
+        FeatureInfo(@This()).create(.UsePostraScheduler, "use-postra-scheduler", "Schedule again after register allocation", "use-postra-scheduler"),
+        FeatureInfo(@This()).create(.Predres, "predres", "Enable v8.5a execution and data prediction invalidation instructions", "predres"),
+        FeatureInfo(@This()).create(.PredictableSelectExpensive, "predictable-select-expensive", "Prefer likely predicted branches over selects", "predictable-select-expensive"),
+        FeatureInfo(@This()).create(.Uaops, "uaops", "Enable v8.2 UAO PState", "uaops"),
+        FeatureInfo(@This()).create(.Ras, "ras", "Enable ARMv8 Reliability, Availability and Serviceability Extensions", "ras"),
+        FeatureInfo(@This()).createWithSubfeatures(.Rasv8_4, "rasv8_4", "Enable v8.4-A Reliability, Availability and Serviceability extension", "rasv8_4", &[_]@This() {
+            .Ras,
+        }),
+        FeatureInfo(@This()).create(.Rcpc, "rcpc", "Enable support for RCPC extension", "rcpc"),
+        FeatureInfo(@This()).createWithSubfeatures(.RcpcImmo, "rcpc-immo", "Enable v8.4-A RCPC instructions with Immediate Offsets", "rcpc-immo", &[_]@This() {
+            .Rcpc,
+        }),
+        FeatureInfo(@This()).create(.Rdm, "rdm", "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", "rdm"),
+        FeatureInfo(@This()).create(.Rand, "rand", "Enable Random Number generation instructions", "rand"),
+        FeatureInfo(@This()).create(.ReserveX1, "reserve-x1", "Reserve X1, making it unavailable as a GPR", "reserve-x1"),
+        FeatureInfo(@This()).create(.ReserveX2, "reserve-x2", "Reserve X2, making it unavailable as a GPR", "reserve-x2"),
+        FeatureInfo(@This()).create(.ReserveX3, "reserve-x3", "Reserve X3, making it unavailable as a GPR", "reserve-x3"),
+        FeatureInfo(@This()).create(.ReserveX4, "reserve-x4", "Reserve X4, making it unavailable as a GPR", "reserve-x4"),
+        FeatureInfo(@This()).create(.ReserveX5, "reserve-x5", "Reserve X5, making it unavailable as a GPR", "reserve-x5"),
+        FeatureInfo(@This()).create(.ReserveX6, "reserve-x6", "Reserve X6, making it unavailable as a GPR", "reserve-x6"),
+        FeatureInfo(@This()).create(.ReserveX7, "reserve-x7", "Reserve X7, making it unavailable as a GPR", "reserve-x7"),
+        FeatureInfo(@This()).create(.ReserveX9, "reserve-x9", "Reserve X9, making it unavailable as a GPR", "reserve-x9"),
+        FeatureInfo(@This()).create(.ReserveX10, "reserve-x10", "Reserve X10, making it unavailable as a GPR", "reserve-x10"),
+        FeatureInfo(@This()).create(.ReserveX11, "reserve-x11", "Reserve X11, making it unavailable as a GPR", "reserve-x11"),
+        FeatureInfo(@This()).create(.ReserveX12, "reserve-x12", "Reserve X12, making it unavailable as a GPR", "reserve-x12"),
+        FeatureInfo(@This()).create(.ReserveX13, "reserve-x13", "Reserve X13, making it unavailable as a GPR", "reserve-x13"),
+        FeatureInfo(@This()).create(.ReserveX14, "reserve-x14", "Reserve X14, making it unavailable as a GPR", "reserve-x14"),
+        FeatureInfo(@This()).create(.ReserveX15, "reserve-x15", "Reserve X15, making it unavailable as a GPR", "reserve-x15"),
+        FeatureInfo(@This()).create(.ReserveX18, "reserve-x18", "Reserve X18, making it unavailable as a GPR", "reserve-x18"),
+        FeatureInfo(@This()).create(.ReserveX20, "reserve-x20", "Reserve X20, making it unavailable as a GPR", "reserve-x20"),
+        FeatureInfo(@This()).create(.ReserveX21, "reserve-x21", "Reserve X21, making it unavailable as a GPR", "reserve-x21"),
+        FeatureInfo(@This()).create(.ReserveX22, "reserve-x22", "Reserve X22, making it unavailable as a GPR", "reserve-x22"),
+        FeatureInfo(@This()).create(.ReserveX23, "reserve-x23", "Reserve X23, making it unavailable as a GPR", "reserve-x23"),
+        FeatureInfo(@This()).create(.ReserveX24, "reserve-x24", "Reserve X24, making it unavailable as a GPR", "reserve-x24"),
+        FeatureInfo(@This()).create(.ReserveX25, "reserve-x25", "Reserve X25, making it unavailable as a GPR", "reserve-x25"),
+        FeatureInfo(@This()).create(.ReserveX26, "reserve-x26", "Reserve X26, making it unavailable as a GPR", "reserve-x26"),
+        FeatureInfo(@This()).create(.ReserveX27, "reserve-x27", "Reserve X27, making it unavailable as a GPR", "reserve-x27"),
+        FeatureInfo(@This()).create(.ReserveX28, "reserve-x28", "Reserve X28, making it unavailable as a GPR", "reserve-x28"),
+        FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5 Speculation Barrier", "sb"),
+        FeatureInfo(@This()).create(.Sel2, "sel2", "Enable v8.4-A Secure Exception Level 2 extension", "sel2"),
+        FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sha3, "sha3", "Enable SHA512 and SHA3 support", "sha3", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sm4, "sm4", "Enable SM3 and SM4 support", "sm4", &[_]@This() {
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.Spe, "spe", "Enable Statistical Profiling extension", "spe"),
+        FeatureInfo(@This()).create(.Ssbs, "ssbs", "Enable Speculative Store Bypass Safe bit", "ssbs"),
+        FeatureInfo(@This()).create(.Sve, "sve", "Enable Scalable Vector Extension (SVE) instructions", "sve"),
+        FeatureInfo(@This()).createWithSubfeatures(.Sve2, "sve2", "Enable Scalable Vector Extension 2 (SVE2) instructions", "sve2", &[_]@This() {
+            .Sve,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() {
+            .Sve,
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() {
+            .Sve,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() {
+            .Sve,
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() {
+            .Sve,
+            .FpArmv8,
+        }),
+        FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"),
+        FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"),
+        FeatureInfo(@This()).create(.SlowStrqroStore, "slow-strqro-store", "STR of Q register with register offset is slow", "slow-strqro-store"),
+        FeatureInfo(@This()).create(.Specrestrict, "specrestrict", "Enable architectural speculation restriction", "specrestrict"),
+        FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
+        FeatureInfo(@This()).create(.TlbRmi, "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", "tlb-rmi"),
+        FeatureInfo(@This()).create(.Tme, "tme", "Enable Transactional Memory Extension", "tme"),
+        FeatureInfo(@This()).create(.Tracev84, "tracev8.4", "Enable v8.4-A Trace extension", "tracev8.4"),
+        FeatureInfo(@This()).create(.Trbe, "trbe", "Enable Trace Buffer Extension", "trbe"),
+        FeatureInfo(@This()).create(.TaggedGlobals, "tagged-globals", "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", "tagged-globals"),
+        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
+        FeatureInfo(@This()).create(.TpidrEl1, "tpidr-el1", "Permit use of TPIDR_EL1 for the TLS base", "tpidr-el1"),
+        FeatureInfo(@This()).create(.TpidrEl2, "tpidr-el2", "Permit use of TPIDR_EL2 for the TLS base", "tpidr-el2"),
+        FeatureInfo(@This()).create(.TpidrEl3, "tpidr-el3", "Permit use of TPIDR_EL3 for the TLS base", "tpidr-el3"),
+        FeatureInfo(@This()).create(.UseReciprocalSquareRoot, "use-reciprocal-square-root", "Use the reciprocal square root approximation", "use-reciprocal-square-root"),
+        FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"),
+        FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"),
+        FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() {
+            .ZczFp,
+            .ZczGp,
+        }),
+        FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"),
+        FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"),
+        FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"),
+        FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
+            .Pan,
+            .Rdm,
+            .Lse,
+            .Crc,
+            .Lor,
+            .Vh,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .Lse,
+            .Crc,
+            .Lor,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Ccidx,
+            .Crc,
+            .Lor,
+            .Pa,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
+            .Nv,
+            .Am,
+            .Lse,
+            .Sel2,
+            .Lor,
+            .Tracev84,
+            .Uaops,
+            .Ccpp,
+            .TlbRmi,
+            .Fmi,
+            .Rcpc,
+            .Pan,
+            .Rdm,
+            .Pa,
+            .Dit,
+            .Ras,
+            .Mpam,
+            .FpArmv8,
+            .Ccidx,
+            .Dotprod,
+            .Crc,
+            .Vh,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
+            .Nv,
+            .Am,
+            .Lse,
+            .Fptoint,
+            .Sel2,
+            .Lor,
+            .Tracev84,
+            .Uaops,
+            .Sb,
+            .Ccpp,
+            .Specrestrict,
+            .Bti,
+            .Ccdp,
+            .TlbRmi,
+            .Fmi,
+            .Rcpc,
+            .Pan,
+            .Rdm,
+            .Pa,
+            .Ssbs,
+            .Dit,
+            .Ras,
+            .Mpam,
+            .Altnzcv,
+            .FpArmv8,
+            .Ccidx,
+            .Dotprod,
+            .Crc,
+            .Predres,
+            .Vh,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() {
+            .UseAa,
+            .FuseAes,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .BalanceFpOps,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() {
+            .FuseLiterals,
+            .FuseAes,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .BalanceFpOps,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() {
+            .Perfmon,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() {
+            .Perfmon,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() {
+            .ZczFp,
+            .ArithCbzFusion,
+            .FuseAes,
+            .AlternateSextloadCvtF32Pattern,
+            .ZczFpWorkaround,
+            .FpArmv8,
+            .Perfmon,
+            .DisableLatencySchedHeuristic,
+            .Zcm,
+            .ZczGp,
+            .ArithBccFusion,
+            .FuseCryptoEor,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() {
+            .ZczFp,
+            .FuseAes,
+            .SlowPaired128,
+            .Force32bitJumpTables,
+            .UseReciprocalSquareRoot,
+            .FpArmv8,
+            .Perfmon,
+            .SlowMisaligned128store,
+            .Crc,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() {
+            .ZczFp,
+            .FuseAes,
+            .SlowPaired128,
+            .Force32bitJumpTables,
+            .FpArmv8,
+            .Perfmon,
+            .SlowMisaligned128store,
+            .Crc,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() {
+            .ZczFp,
+            .FuseLiterals,
+            .FuseAes,
+            .Force32bitJumpTables,
+            .FpArmv8,
+            .Perfmon,
+            .Crc,
+            .LslFast,
+            .FuseAddress,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+            .FuseCsel,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() {
+            .ZczFp,
+            .Lse,
+            .FuseArithLogic,
+            .Lor,
+            .UsePostraScheduler,
+            .Uaops,
+            .CustomCheapAsMove,
+            .ArithBccFusion,
+            .Ccpp,
+            .Perfmon,
+            .Pan,
+            .Rdm,
+            .FuseLiterals,
+            .Force32bitJumpTables,
+            .LslFast,
+            .FuseAddress,
+            .ZczGp,
+            .Ras,
+            .FuseCsel,
+            .ArithCbzFusion,
+            .FuseAes,
+            .FpArmv8,
+            .Crc,
+            .Dotprod,
+            .Vh,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() {
+            .ZczFp,
+            .Rdm,
+            .SlowStrqroStore,
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .LslFast,
+            .UsePostraScheduler,
+            .ZczGp,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() {
+            .ZczFp,
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .LslFast,
+            .UsePostraScheduler,
+            .ZczGp,
+            .CustomCheapAsMove,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() {
+            .Rcpc,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
+            .Rcpc,
+            .Spe,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .Ssbs,
+            .Uaops,
+            .Vh,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() {
+            .ZczFp,
+            .Nv,
+            .Am,
+            .Lse,
+            .Sel2,
+            .Lor,
+            .Tracev84,
+            .Uaops,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Ccpp,
+            .Perfmon,
+            .TlbRmi,
+            .PredictableSelectExpensive,
+            .Fmi,
+            .Rcpc,
+            .Pan,
+            .Rdm,
+            .LslFast,
+            .Pa,
+            .ZczGp,
+            .Dit,
+            .Ras,
+            .Spe,
+            .Mpam,
+            .FpArmv8,
+            .Ccidx,
+            .Dotprod,
+            .Crc,
+            .Vh,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() {
+            .Uaops,
+            .Spe,
+            .Ccpp,
+            .Pan,
+            .Rdm,
+            .FuseAes,
+            .Vh,
+            .Perfmon,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Dotprod,
+            .Lor,
+            .UsePostraScheduler,
+            .CustomCheapAsMove,
+            .Ras,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() {
+            .Pan,
+            .Rdm,
+            .Vh,
+            .AggressiveFma,
+            .FpArmv8,
+            .Lse,
+            .Crc,
+            .Lor,
+            .UsePostraScheduler,
+            .ArithBccFusion,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() {
+            .Perfmon,
+            .FpArmv8,
+            .Crc,
+            .UsePostraScheduler,
+            .PredictableSelectExpensive,
+        }),
+    };
+};
diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..e8688a7492e0ba799cc5fc989a6137ee4cb77e4d
--- /dev/null
+++ b/lib/std/target/feature/AmdGpuFeature.zig
@@ -0,0 +1,343 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const AmdGpuFeature = enum {
+    BitInsts16,
+    AddNoCarryInsts,
+    ApertureRegs,
+    AtomicFaddInsts,
+    AutoWaitcntBeforeBarrier,
+    CiInsts,
+    CodeObjectV3,
+    Cumode,
+    DlInsts,
+    Dpp,
+    Dpp8,
+    NoSramEccSupport,
+    NoXnackSupport,
+    Dot1Insts,
+    Dot2Insts,
+    Dot3Insts,
+    Dot4Insts,
+    Dot5Insts,
+    Dot6Insts,
+    DumpCode,
+    Dumpcode,
+    EnableDs128,
+    LoadStoreOpt,
+    EnablePrtStrictNull,
+    SiScheduler,
+    UnsafeDsOffsetFolding,
+    Fmaf,
+    Fp16Denormals,
+    Fp32Denormals,
+    Fp64,
+    Fp64Denormals,
+    Fp64Fp16Denormals,
+    FpExceptions,
+    FastFmaf,
+    FlatAddressSpace,
+    FlatForGlobal,
+    FlatGlobalInsts,
+    FlatInstOffsets,
+    FlatScratchInsts,
+    FlatSegmentOffsetBug,
+    FmaMixInsts,
+    Gcn3Encoding,
+    Gfx7Gfx8Gfx9Insts,
+    Gfx8Insts,
+    Gfx9,
+    Gfx9Insts,
+    Gfx10,
+    Gfx10Insts,
+    InstFwdPrefetchBug,
+    IntClampInsts,
+    Inv2piInlineImm,
+    Ldsbankcount16,
+    Ldsbankcount32,
+    LdsBranchVmemWarHazard,
+    LdsMisalignedBug,
+    Localmemorysize0,
+    Localmemorysize32768,
+    Localmemorysize65536,
+    MaiInsts,
+    MfmaInlineLiteralBug,
+    MimgR128,
+    MadMixInsts,
+    MaxPrivateElementSize4,
+    MaxPrivateElementSize8,
+    MaxPrivateElementSize16,
+    Movrel,
+    NsaEncoding,
+    NsaToVmemBug,
+    NoDataDepHazard,
+    NoSdstCmpx,
+    Offset3fBug,
+    PkFmacF16Inst,
+    PromoteAlloca,
+    R128A16,
+    RegisterBanking,
+    Sdwa,
+    SdwaMav,
+    SdwaOmod,
+    SdwaOutModsVopc,
+    SdwaScalar,
+    SdwaSdst,
+    SgprInitBug,
+    SmemToVectorWriteHazard,
+    SMemrealtime,
+    SramEcc,
+    ScalarAtomics,
+    ScalarFlatScratchInsts,
+    ScalarStores,
+    SeaIslands,
+    SouthernIslands,
+    TrapHandler,
+    TrigReducedRange,
+    UnalignedBufferAccess,
+    UnalignedScratchAccess,
+    UnpackedD16Vmem,
+    VgprIndexMode,
+    VmemToScalarWriteHazard,
+    Vop3Literal,
+    Vop3p,
+    VcmpxExecWarHazard,
+    VcmpxPermlaneHazard,
+    VolcanicIslands,
+    Vscnt,
+    Wavefrontsize16,
+    Wavefrontsize32,
+    Wavefrontsize64,
+    Xnack,
+    HalfRate64Ops,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.BitInsts16, "16-bit-insts", "Has i16/f16 instructions", "16-bit-insts"),
+        FeatureInfo(@This()).create(.AddNoCarryInsts, "add-no-carry-insts", "Have VALU add/sub instructions without carry out", "add-no-carry-insts"),
+        FeatureInfo(@This()).create(.ApertureRegs, "aperture-regs", "Has Memory Aperture Base and Size Registers", "aperture-regs"),
+        FeatureInfo(@This()).create(.AtomicFaddInsts, "atomic-fadd-insts", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", "atomic-fadd-insts"),
+        FeatureInfo(@This()).create(.AutoWaitcntBeforeBarrier, "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", "auto-waitcnt-before-barrier"),
+        FeatureInfo(@This()).create(.CiInsts, "ci-insts", "Additional instructions for CI+", "ci-insts"),
+        FeatureInfo(@This()).create(.CodeObjectV3, "code-object-v3", "Generate code object version 3", "code-object-v3"),
+        FeatureInfo(@This()).create(.Cumode, "cumode", "Enable CU wavefront execution mode", "cumode"),
+        FeatureInfo(@This()).create(.DlInsts, "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", "dl-insts"),
+        FeatureInfo(@This()).create(.Dpp, "dpp", "Support DPP (Data Parallel Primitives) extension", "dpp"),
+        FeatureInfo(@This()).create(.Dpp8, "dpp8", "Support DPP8 (Data Parallel Primitives) extension", "dpp8"),
+        FeatureInfo(@This()).create(.NoSramEccSupport, "no-sram-ecc-support", "Hardware does not support SRAM ECC", "no-sram-ecc-support"),
+        FeatureInfo(@This()).create(.NoXnackSupport, "no-xnack-support", "Hardware does not support XNACK", "no-xnack-support"),
+        FeatureInfo(@This()).create(.Dot1Insts, "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", "dot1-insts"),
+        FeatureInfo(@This()).create(.Dot2Insts, "dot2-insts", "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", "dot2-insts"),
+        FeatureInfo(@This()).create(.Dot3Insts, "dot3-insts", "Has v_dot8c_i32_i4 instruction", "dot3-insts"),
+        FeatureInfo(@This()).create(.Dot4Insts, "dot4-insts", "Has v_dot2c_i32_i16 instruction", "dot4-insts"),
+        FeatureInfo(@This()).create(.Dot5Insts, "dot5-insts", "Has v_dot2c_f32_f16 instruction", "dot5-insts"),
+        FeatureInfo(@This()).create(.Dot6Insts, "dot6-insts", "Has v_dot4c_i32_i8 instruction", "dot6-insts"),
+        FeatureInfo(@This()).create(.DumpCode, "DumpCode", "Dump MachineInstrs in the CodeEmitter", "DumpCode"),
+        FeatureInfo(@This()).create(.Dumpcode, "dumpcode", "Dump MachineInstrs in the CodeEmitter", "dumpcode"),
+        FeatureInfo(@This()).create(.EnableDs128, "enable-ds128", "Use ds_{read|write}_b128", "enable-ds128"),
+        FeatureInfo(@This()).create(.LoadStoreOpt, "load-store-opt", "Enable SI load/store optimizer pass", "load-store-opt"),
+        FeatureInfo(@This()).create(.EnablePrtStrictNull, "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", "enable-prt-strict-null"),
+        FeatureInfo(@This()).create(.SiScheduler, "si-scheduler", "Enable SI Machine Scheduler", "si-scheduler"),
+        FeatureInfo(@This()).create(.UnsafeDsOffsetFolding, "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", "unsafe-ds-offset-folding"),
+        FeatureInfo(@This()).create(.Fmaf, "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", "fmaf"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp16Denormals, "fp16-denormals", "Enable half precision denormal handling", "fp16-denormals", &[_]@This() {
+            .Fp64,
+        }),
+        FeatureInfo(@This()).create(.Fp32Denormals, "fp32-denormals", "Enable single precision denormal handling", "fp32-denormals"),
+        FeatureInfo(@This()).create(.Fp64, "fp64", "Enable double precision operations", "fp64"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp64Denormals, "fp64-denormals", "Enable double and half precision denormal handling", "fp64-denormals", &[_]@This() {
+            .Fp64,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp64Fp16Denormals, "fp64-fp16-denormals", "Enable double and half precision denormal handling", "fp64-fp16-denormals", &[_]@This() {
+            .Fp64,
+        }),
+        FeatureInfo(@This()).create(.FpExceptions, "fp-exceptions", "Enable floating point exceptions", "fp-exceptions"),
+        FeatureInfo(@This()).create(.FastFmaf, "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", "fast-fmaf"),
+        FeatureInfo(@This()).create(.FlatAddressSpace, "flat-address-space", "Support flat address space", "flat-address-space"),
+        FeatureInfo(@This()).create(.FlatForGlobal, "flat-for-global", "Force to generate flat instruction for global", "flat-for-global"),
+        FeatureInfo(@This()).create(.FlatGlobalInsts, "flat-global-insts", "Have global_* flat memory instructions", "flat-global-insts"),
+        FeatureInfo(@This()).create(.FlatInstOffsets, "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", "flat-inst-offsets"),
+        FeatureInfo(@This()).create(.FlatScratchInsts, "flat-scratch-insts", "Have scratch_* flat memory instructions", "flat-scratch-insts"),
+        FeatureInfo(@This()).create(.FlatSegmentOffsetBug, "flat-segment-offset-bug", "GFX10 bug, inst_offset ignored in flat segment", "flat-segment-offset-bug"),
+        FeatureInfo(@This()).create(.FmaMixInsts, "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", "fma-mix-insts"),
+        FeatureInfo(@This()).create(.Gcn3Encoding, "gcn3-encoding", "Encoding format for VI", "gcn3-encoding"),
+        FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"),
+        FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"),
+        FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() {
+            .Gfx9Insts,
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .VgprIndexMode,
+            .Dpp,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .ScalarAtomics,
+            .FlatAddressSpace,
+            .ScalarFlatScratchInsts,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .R128A16,
+            .IntClampInsts,
+            .ScalarStores,
+            .ApertureRegs,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+        }),
+        FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
+        FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
+            .Gfx9Insts,
+            .NoSdstCmpx,
+            .Fp64,
+            .FastFmaf,
+            .Sdwa,
+            .SdwaScalar,
+            .Dpp,
+            .RegisterBanking,
+            .Gfx10Insts,
+            .AddNoCarryInsts,
+            .SdwaOmod,
+            .SdwaSdst,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .FmaMixInsts,
+            .PkFmacF16Inst,
+            .Vop3Literal,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .Movrel,
+            .Dpp8,
+            .ApertureRegs,
+            .NoDataDepHazard,
+            .CiInsts,
+            .FlatGlobalInsts,
+            .BitInsts16,
+            .FlatScratchInsts,
+            .SMemrealtime,
+            .Vop3p,
+            .FlatInstOffsets,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .Vscnt,
+        }),
+        FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"),
+        FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"),
+        FeatureInfo(@This()).create(.IntClampInsts, "int-clamp-insts", "Support clamp for integer destination", "int-clamp-insts"),
+        FeatureInfo(@This()).create(.Inv2piInlineImm, "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", "inv-2pi-inline-imm"),
+        FeatureInfo(@This()).create(.Ldsbankcount16, "ldsbankcount16", "The number of LDS banks per compute unit.", "ldsbankcount16"),
+        FeatureInfo(@This()).create(.Ldsbankcount32, "ldsbankcount32", "The number of LDS banks per compute unit.", "ldsbankcount32"),
+        FeatureInfo(@This()).create(.LdsBranchVmemWarHazard, "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", "lds-branch-vmem-war-hazard"),
+        FeatureInfo(@This()).create(.LdsMisalignedBug, "lds-misaligned-bug", "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", "lds-misaligned-bug"),
+        FeatureInfo(@This()).create(.Localmemorysize0, "localmemorysize0", "The size of local memory in bytes", "localmemorysize0"),
+        FeatureInfo(@This()).create(.Localmemorysize32768, "localmemorysize32768", "The size of local memory in bytes", "localmemorysize32768"),
+        FeatureInfo(@This()).create(.Localmemorysize65536, "localmemorysize65536", "The size of local memory in bytes", "localmemorysize65536"),
+        FeatureInfo(@This()).create(.MaiInsts, "mai-insts", "Has mAI instructions", "mai-insts"),
+        FeatureInfo(@This()).create(.MfmaInlineLiteralBug, "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", "mfma-inline-literal-bug"),
+        FeatureInfo(@This()).create(.MimgR128, "mimg-r128", "Support 128-bit texture resources", "mimg-r128"),
+        FeatureInfo(@This()).create(.MadMixInsts, "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", "mad-mix-insts"),
+        FeatureInfo(@This()).create(.MaxPrivateElementSize4, "max-private-element-size-4", "Maximum private access size may be 4", "max-private-element-size-4"),
+        FeatureInfo(@This()).create(.MaxPrivateElementSize8, "max-private-element-size-8", "Maximum private access size may be 8", "max-private-element-size-8"),
+        FeatureInfo(@This()).create(.MaxPrivateElementSize16, "max-private-element-size-16", "Maximum private access size may be 16", "max-private-element-size-16"),
+        FeatureInfo(@This()).create(.Movrel, "movrel", "Has v_movrel*_b32 instructions", "movrel"),
+        FeatureInfo(@This()).create(.NsaEncoding, "nsa-encoding", "Support NSA encoding for image instructions", "nsa-encoding"),
+        FeatureInfo(@This()).create(.NsaToVmemBug, "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", "nsa-to-vmem-bug"),
+        FeatureInfo(@This()).create(.NoDataDepHazard, "no-data-dep-hazard", "Does not need SW waitstates", "no-data-dep-hazard"),
+        FeatureInfo(@This()).create(.NoSdstCmpx, "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", "no-sdst-cmpx"),
+        FeatureInfo(@This()).create(.Offset3fBug, "offset-3f-bug", "Branch offset of 3f hardware bug", "offset-3f-bug"),
+        FeatureInfo(@This()).create(.PkFmacF16Inst, "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", "pk-fmac-f16-inst"),
+        FeatureInfo(@This()).create(.PromoteAlloca, "promote-alloca", "Enable promote alloca pass", "promote-alloca"),
+        FeatureInfo(@This()).create(.R128A16, "r128-a16", "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", "r128-a16"),
+        FeatureInfo(@This()).create(.RegisterBanking, "register-banking", "Has register banking", "register-banking"),
+        FeatureInfo(@This()).create(.Sdwa, "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", "sdwa"),
+        FeatureInfo(@This()).create(.SdwaMav, "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", "sdwa-mav"),
+        FeatureInfo(@This()).create(.SdwaOmod, "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", "sdwa-omod"),
+        FeatureInfo(@This()).create(.SdwaOutModsVopc, "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-out-mods-vopc"),
+        FeatureInfo(@This()).create(.SdwaScalar, "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", "sdwa-scalar"),
+        FeatureInfo(@This()).create(.SdwaSdst, "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-sdst"),
+        FeatureInfo(@This()).create(.SgprInitBug, "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", "sgpr-init-bug"),
+        FeatureInfo(@This()).create(.SmemToVectorWriteHazard, "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", "smem-to-vector-write-hazard"),
+        FeatureInfo(@This()).create(.SMemrealtime, "s-memrealtime", "Has s_memrealtime instruction", "s-memrealtime"),
+        FeatureInfo(@This()).create(.SramEcc, "sram-ecc", "Enable SRAM ECC", "sram-ecc"),
+        FeatureInfo(@This()).create(.ScalarAtomics, "scalar-atomics", "Has atomic scalar memory instructions", "scalar-atomics"),
+        FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"),
+        FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"),
+        FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() {
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .CiInsts,
+            .FlatAddressSpace,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Localmemorysize65536,
+            .Gfx7Gfx8Gfx9Insts,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() {
+            .Wavefrontsize64,
+            .MimgR128,
+            .Fp64,
+            .NoXnackSupport,
+            .TrigReducedRange,
+            .NoSramEccSupport,
+            .Movrel,
+            .Ldsbankcount32,
+            .Localmemorysize32768,
+        }),
+        FeatureInfo(@This()).create(.TrapHandler, "trap-handler", "Trap handler support", "trap-handler"),
+        FeatureInfo(@This()).create(.TrigReducedRange, "trig-reduced-range", "Requires use of fract on arguments to trig instructions", "trig-reduced-range"),
+        FeatureInfo(@This()).create(.UnalignedBufferAccess, "unaligned-buffer-access", "Support unaligned global loads and stores", "unaligned-buffer-access"),
+        FeatureInfo(@This()).create(.UnalignedScratchAccess, "unaligned-scratch-access", "Support unaligned scratch loads and stores", "unaligned-scratch-access"),
+        FeatureInfo(@This()).create(.UnpackedD16Vmem, "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", "unpacked-d16-vmem"),
+        FeatureInfo(@This()).create(.VgprIndexMode, "vgpr-index-mode", "Has VGPR mode register indexing", "vgpr-index-mode"),
+        FeatureInfo(@This()).create(.VmemToScalarWriteHazard, "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", "vmem-to-scalar-write-hazard"),
+        FeatureInfo(@This()).create(.Vop3Literal, "vop3-literal", "Can use one literal in VOP3", "vop3-literal"),
+        FeatureInfo(@This()).create(.Vop3p, "vop3p", "Has VOP3P packed instructions", "vop3p"),
+        FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"),
+        FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"),
+        FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() {
+            .Wavefrontsize64,
+            .Fp64,
+            .Gcn3Encoding,
+            .TrigReducedRange,
+            .Sdwa,
+            .VgprIndexMode,
+            .Dpp,
+            .FlatAddressSpace,
+            .Gfx8Insts,
+            .Gfx7Gfx8Gfx9Insts,
+            .MimgR128,
+            .NoSramEccSupport,
+            .IntClampInsts,
+            .ScalarStores,
+            .Movrel,
+            .SdwaMav,
+            .CiInsts,
+            .BitInsts16,
+            .SMemrealtime,
+            .Inv2piInlineImm,
+            .Localmemorysize65536,
+            .SdwaOutModsVopc,
+        }),
+        FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"),
+        FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"),
+        FeatureInfo(@This()).create(.Wavefrontsize32, "wavefrontsize32", "The number of threads per wavefront", "wavefrontsize32"),
+        FeatureInfo(@This()).create(.Wavefrontsize64, "wavefrontsize64", "The number of threads per wavefront", "wavefrontsize64"),
+        FeatureInfo(@This()).create(.Xnack, "xnack", "Enable XNACK support", "xnack"),
+        FeatureInfo(@This()).create(.HalfRate64Ops, "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", "half-rate-64-ops"),
+    };
+};
diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..842becda2c6f5d36368d96bdf70d150c786cc877
--- /dev/null
+++ b/lib/std/target/feature/ArmFeature.zig
@@ -0,0 +1,818 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const ArmFeature = enum {
+    Armv2,
+    Armv2a,
+    Armv3,
+    Armv3m,
+    Armv4,
+    Armv4t,
+    Armv5t,
+    Armv5te,
+    Armv5tej,
+    Armv6,
+    Armv6j,
+    Armv6k,
+    Armv6kz,
+    Armv6M,
+    Armv6sM,
+    Armv6t2,
+    Armv7A,
+    Armv7eM,
+    Armv7k,
+    Armv7M,
+    Armv7R,
+    Armv7s,
+    Armv7ve,
+    Armv8A,
+    Armv8Mbase,
+    Armv8Mmain,
+    Armv8R,
+    Armv81A,
+    Armv81Mmain,
+    Armv82A,
+    Armv83A,
+    Armv84A,
+    Armv85A,
+    Msecext8,
+    Aclass,
+    Aes,
+    AcquireRelease,
+    AvoidMovsShop,
+    AvoidPartialCpsr,
+    Crc,
+    CheapPredicableCpsr,
+    VldnAlign,
+    Crypto,
+    D32,
+    Db,
+    Dfb,
+    Dsp,
+    DontWidenVmovs,
+    Dotprod,
+    ExecuteOnly,
+    ExpandFpMlx,
+    Fp16,
+    Fp16fml,
+    Fp64,
+    Fpao,
+    FpArmv8,
+    FpArmv8d16,
+    FpArmv8d16sp,
+    FpArmv8sp,
+    Fpregs,
+    Fpregs16,
+    Fpregs64,
+    Fullfp16,
+    FuseAes,
+    FuseLiterals,
+    HwdivArm,
+    Hwdiv,
+    NoBranchPredictor,
+    RetAddrStack,
+    Slowfpvmlx,
+    VmlxHazards,
+    Lob,
+    LongCalls,
+    Mclass,
+    Mp,
+    Mve1beat,
+    Mve2beat,
+    Mve4beat,
+    MuxedUnits,
+    Neon,
+    Neonfp,
+    NeonFpmovs,
+    NaclTrap,
+    Noarm,
+    NoMovt,
+    NoNegImmediates,
+    DisablePostraScheduler,
+    NonpipelinedVfp,
+    Perfmon,
+    Bit32,
+    PreferIshst,
+    LoopAlign,
+    PreferVmovsr,
+    ProfUnpr,
+    Ras,
+    Rclass,
+    ReadTpHard,
+    ReserveR9,
+    Sb,
+    Sha2,
+    SlowFpBrcc,
+    SlowLoadDSubreg,
+    SlowOddReg,
+    SlowVdup32,
+    SlowVgetlni32,
+    SplatVfpNeon,
+    StrictAlign,
+    Thumb2,
+    Trustzone,
+    UseAa,
+    UseMisched,
+    WideStrideVfp,
+    V7clrex,
+    Vfp2,
+    Vfp2sp,
+    Vfp3,
+    Vfp3d16,
+    Vfp3d16sp,
+    Vfp3sp,
+    Vfp4,
+    Vfp4d16,
+    Vfp4d16sp,
+    Vfp4sp,
+    VmlxForwarding,
+    Virtualization,
+    Zcz,
+    Mvefp,
+    Mve,
+    V4t,
+    V5te,
+    V5t,
+    V6k,
+    V6m,
+    V6,
+    V6t2,
+    V7,
+    V8m,
+    V8mmain,
+    V8,
+    V81mmain,
+    V81a,
+    V82a,
+    V83a,
+    V84a,
+    V85a,
+    Iwmmxt,
+    Iwmmxt2,
+    SoftFloat,
+    ThumbMode,
+    A5,
+    A7,
+    A8,
+    A9,
+    A12,
+    A15,
+    A17,
+    A32,
+    A35,
+    A53,
+    A55,
+    A57,
+    A72,
+    A73,
+    A75,
+    A76,
+    Exynos,
+    Krait,
+    Kryo,
+    M3,
+    R4,
+    R5,
+    R7,
+    R52,
+    Swift,
+    Xscale,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"),
+        FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"),
+        FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"),
+        FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"),
+        FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() {
+            .V4t,
+            .Dsp,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() {
+            .V4t,
+            .Dsp,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() {
+            .V4t,
+            .Trustzone,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .V4t,
+            .Noarm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() {
+            .Thumb2,
+            .V4t,
+            .Dsp,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Aclass,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() {
+            .Mclass,
+            .StrictAlign,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dfb,
+            .Dsp,
+            .Rclass,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() {
+            .Thumb2,
+            .Mclass,
+            .Perfmon,
+            .ThumbMode,
+            .Db,
+            .Msecext8,
+            .Ras,
+            .V7clrex,
+            .V4t,
+            .Hwdiv,
+            .Noarm,
+            .Lob,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() {
+            .Thumb2,
+            .Mp,
+            .Perfmon,
+            .Sb,
+            .Db,
+            .Crc,
+            .Fp16,
+            .Ras,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .Hwdiv,
+            .HwdivArm,
+            .Aclass,
+            .Trustzone,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"),
+        FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"),
+        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex  etc) instructions", "acquire-release"),
+        FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"),
+        FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"),
+        FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"),
+        FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"),
+        FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"),
+        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"),
+        FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"),
+        FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"),
+        FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"),
+        FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"),
+        FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"),
+        FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"),
+        FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"),
+        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
+        FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
+        FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"),
+        FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"),
+        FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"),
+        FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"),
+        FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"),
+        FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"),
+        FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"),
+        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"),
+        FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"),
+        FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"),
+        FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"),
+        FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"),
+        FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"),
+        FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"),
+        FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"),
+        FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"),
+        FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"),
+        FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"),
+        FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"),
+        FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
+        FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"),
+        FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"),
+        FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"),
+        FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"),
+        FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"),
+        FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"),
+        FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"),
+        FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"),
+        FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"),
+        FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"),
+        FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"),
+        FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"),
+        FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"),
+        FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"),
+        FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"),
+        FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"),
+        FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"),
+        FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"),
+        FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() {
+            .DontWidenVmovs,
+        }),
+        FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
+        FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"),
+        FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"),
+        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
+        FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"),
+        FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"),
+        FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() {
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() {
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() {
+            .Fp16,
+            .Fpregs,
+            .D32,
+        }),
+        FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"),
+        FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() {
+            .HwdivArm,
+            .Hwdiv,
+        }),
+        FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"),
+        FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Fp16,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Dsp,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+        }),
+        FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"),
+        FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() {
+            .Thumb2,
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() {
+            .V7clrex,
+            .V4t,
+            .Perfmon,
+            .Thumb2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() {
+            .V7clrex,
+            .V4t,
+            .Perfmon,
+            .Thumb2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .V7clrex,
+            .V4t,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() {
+            .V7clrex,
+            .V4t,
+            .Perfmon,
+            .Thumb2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .V7clrex,
+            .V4t,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .V7clrex,
+            .V4t,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .V7clrex,
+            .V4t,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
+            .Thumb2,
+            .Perfmon,
+            .Sb,
+            .V7clrex,
+            .V4t,
+            .Fpregs,
+            .D32,
+            .AcquireRelease,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() {
+            .V4t,
+        }),
+        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"),
+        FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"),
+        FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"),
+        FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"),
+        FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"),
+        FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"),
+        FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"),
+        FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"),
+        FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"),
+        FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"),
+        FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"),
+        FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"),
+        FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"),
+        FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"),
+        FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"),
+        FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"),
+        FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"),
+        FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"),
+        FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() {
+            .Zcz,
+            .SlowVdup32,
+            .SlowVgetlni32,
+            .DontWidenVmovs,
+            .Crc,
+            .FuseAes,
+            .WideStrideVfp,
+            .ProfUnpr,
+            .Slowfpvmlx,
+            .SlowFpBrcc,
+            .FuseLiterals,
+            .Fpregs,
+            .D32,
+            .ExpandFpMlx,
+            .Hwdiv,
+            .HwdivArm,
+            .RetAddrStack,
+            .UseAa,
+        }),
+        FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"),
+        FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"),
+        FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"),
+        FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"),
+        FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"),
+        FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"),
+        FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"),
+        FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"),
+        FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() {
+            .V4t,
+        }),
+    };
+};
diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..6efacedbc2a95a31580cf045c96cee7736087735
--- /dev/null
+++ b/lib/std/target/feature/AvrFeature.zig
@@ -0,0 +1,230 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const AvrFeature = enum {
+    Avr0,
+    Avr1,
+    Avr2,
+    Avr3,
+    Avr4,
+    Avr5,
+    Avr6,
+    Avr25,
+    Avr31,
+    Avr35,
+    Avr51,
+    Avrtiny,
+    Xmega,
+    Xmegau,
+    Addsubiw,
+    Break,
+    Des,
+    Eijmpcall,
+    Elpm,
+    Elpmx,
+    Ijmpcall,
+    Jmpcall,
+    Lpm,
+    Lpmx,
+    Movw,
+    Mul,
+    Rmw,
+    Spm,
+    Spmx,
+    Sram,
+    Special,
+    Smallstack,
+    Tinyencoding,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() {
+            .Lpm,
+            .Avr0,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() {
+            .Ijmpcall,
+            .Sram,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() {
+            .Ijmpcall,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() {
+            .Ijmpcall,
+            .Sram,
+            .Elpm,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() {
+            .Ijmpcall,
+            .Movw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() {
+            .Break,
+            .Tinyencoding,
+            .Avr0,
+            .Sram,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Spm,
+            .Elpm,
+            .Lpmx,
+            .Spmx,
+            .Avr0,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+        }),
+        FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"),
+        FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"),
+        FeatureInfo(@This()).create(.Des, "des", "The device supports the `DES k` encryption instruction", "des"),
+        FeatureInfo(@This()).create(.Eijmpcall, "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", "eijmpcall"),
+        FeatureInfo(@This()).create(.Elpm, "elpm", "The device supports the ELPM instruction", "elpm"),
+        FeatureInfo(@This()).create(.Elpmx, "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", "elpmx"),
+        FeatureInfo(@This()).create(.Ijmpcall, "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", "ijmpcall"),
+        FeatureInfo(@This()).create(.Jmpcall, "jmpcall", "The device supports the `JMP` and `CALL` instructions", "jmpcall"),
+        FeatureInfo(@This()).create(.Lpm, "lpm", "The device supports the `LPM` instruction", "lpm"),
+        FeatureInfo(@This()).create(.Lpmx, "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", "lpmx"),
+        FeatureInfo(@This()).create(.Movw, "movw", "The device supports the 16-bit MOVW instruction", "movw"),
+        FeatureInfo(@This()).create(.Mul, "mul", "The device supports the multiplication instructions", "mul"),
+        FeatureInfo(@This()).create(.Rmw, "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", "rmw"),
+        FeatureInfo(@This()).create(.Spm, "spm", "The device supports the `SPM` instruction", "spm"),
+        FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"),
+        FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"),
+        FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() {
+            .Ijmpcall,
+            .Elpmx,
+            .Movw,
+            .Eijmpcall,
+            .Mul,
+            .Rmw,
+            .Sram,
+            .Break,
+            .Elpm,
+            .Spm,
+            .Lpmx,
+            .Spmx,
+            .Jmpcall,
+            .Addsubiw,
+            .Lpm,
+            .Des,
+        }),
+        FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"),
+        FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"),
+    };
+};
diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..028974ec2b61662f822154c3a9290d7286355043
--- /dev/null
+++ b/lib/std/target/feature/BpfFeature.zig
@@ -0,0 +1,17 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const BpfFeature = enum {
+    Alu32,
+    Dummy,
+    Dwarfris,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Alu32, "alu32", "Enable ALU32 instructions", "alu32"),
+        FeatureInfo(@This()).create(.Dummy, "dummy", "unused feature", "dummy"),
+        FeatureInfo(@This()).create(.Dwarfris, "dwarfris", "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", "dwarfris"),
+    };
+};
diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..560f282334b675734bb778f11f56d36f57ecf342
--- /dev/null
+++ b/lib/std/target/feature/HexagonFeature.zig
@@ -0,0 +1,76 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const HexagonFeature = enum {
+    V5,
+    V55,
+    V60,
+    V62,
+    V65,
+    V66,
+    Hvx,
+    HvxLength64b,
+    HvxLength128b,
+    Hvxv60,
+    Hvxv62,
+    Hvxv65,
+    Hvxv66,
+    Zreg,
+    Duplex,
+    LongCalls,
+    Mem_noshuf,
+    Memops,
+    Nvj,
+    Nvs,
+    NoreturnStackElim,
+    Packets,
+    ReservedR19,
+    SmallData,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.V5, "v5", "Enable Hexagon V5 architecture", "v5"),
+        FeatureInfo(@This()).create(.V55, "v55", "Enable Hexagon V55 architecture", "v55"),
+        FeatureInfo(@This()).create(.V60, "v60", "Enable Hexagon V60 architecture", "v60"),
+        FeatureInfo(@This()).create(.V62, "v62", "Enable Hexagon V62 architecture", "v62"),
+        FeatureInfo(@This()).create(.V65, "v65", "Enable Hexagon V65 architecture", "v65"),
+        FeatureInfo(@This()).create(.V66, "v66", "Enable Hexagon V66 architecture", "v66"),
+        FeatureInfo(@This()).create(.Hvx, "hvx", "Hexagon HVX instructions", "hvx"),
+        FeatureInfo(@This()).createWithSubfeatures(.HvxLength64b, "hvx-length64b", "Hexagon HVX 64B instructions", "hvx-length64b", &[_]@This() {
+            .Hvx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.HvxLength128b, "hvx-length128b", "Hexagon HVX 128B instructions", "hvx-length128b", &[_]@This() {
+            .Hvx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Hvxv60, "hvxv60", "Hexagon HVX instructions", "hvxv60", &[_]@This() {
+            .Hvx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Hvxv62, "hvxv62", "Hexagon HVX instructions", "hvxv62", &[_]@This() {
+            .Hvx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Hvxv65, "hvxv65", "Hexagon HVX instructions", "hvxv65", &[_]@This() {
+            .Hvx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Hvxv66, "hvxv66", "Hexagon HVX instructions", "hvxv66", &[_]@This() {
+            .Hvx,
+            .Zreg,
+        }),
+        FeatureInfo(@This()).create(.Zreg, "zreg", "Hexagon ZReg extension instructions", "zreg"),
+        FeatureInfo(@This()).create(.Duplex, "duplex", "Enable generation of duplex instruction", "duplex"),
+        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Use constant-extended calls", "long-calls"),
+        FeatureInfo(@This()).create(.Mem_noshuf, "mem_noshuf", "Supports mem_noshuf feature", "mem_noshuf"),
+        FeatureInfo(@This()).create(.Memops, "memops", "Use memop instructions", "memops"),
+        FeatureInfo(@This()).createWithSubfeatures(.Nvj, "nvj", "Support for new-value jumps", "nvj", &[_]@This() {
+            .Packets,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Nvs, "nvs", "Support for new-value stores", "nvs", &[_]@This() {
+            .Packets,
+        }),
+        FeatureInfo(@This()).create(.NoreturnStackElim, "noreturn-stack-elim", "Eliminate stack allocation in a noreturn function when possible", "noreturn-stack-elim"),
+        FeatureInfo(@This()).create(.Packets, "packets", "Support for instruction packets", "packets"),
+        FeatureInfo(@This()).create(.ReservedR19, "reserved-r19", "Reserve register R19", "reserved-r19"),
+        FeatureInfo(@This()).create(.SmallData, "small-data", "Allow GP-relative addressing of global variables", "small-data"),
+    };
+};
diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..16c7339f77a4eda1409b86b695096143677c61b0
--- /dev/null
+++ b/lib/std/target/feature/MipsFeature.zig
@@ -0,0 +1,238 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const MipsFeature = enum {
+    Abs2008,
+    Crc,
+    Cnmips,
+    Dsp,
+    Dspr2,
+    Dspr3,
+    Eva,
+    Fp64,
+    Fpxx,
+    Ginv,
+    Gp64,
+    LongCalls,
+    Msa,
+    Mt,
+    Nomadd4,
+    Micromips,
+    Mips1,
+    Mips2,
+    Mips3,
+    Mips3_32,
+    Mips3_32r2,
+    Mips4,
+    Mips4_32,
+    Mips4_32r2,
+    Mips5,
+    Mips5_32r2,
+    Mips16,
+    Mips32,
+    Mips32r2,
+    Mips32r3,
+    Mips32r5,
+    Mips32r6,
+    Mips64,
+    Mips64r2,
+    Mips64r3,
+    Mips64r5,
+    Mips64r6,
+    Nan2008,
+    Noabicalls,
+    Nooddspreg,
+    Ptr64,
+    SingleFloat,
+    SoftFloat,
+    Sym32,
+    UseIndirectJumpHazard,
+    UseTccInDiv,
+    Vfpu,
+    Virt,
+    Xgot,
+    P5600,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
+        FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
+        FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
+        FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
+            .Dsp,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() {
+            .Dsp,
+        }),
+        FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"),
+        FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"),
+        FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"),
+        FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"),
+        FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"),
+        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"),
+        FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"),
+        FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"),
+        FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"),
+        FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"),
+        FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() {
+            .Mips1,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips3_32r2,
+            .Mips1,
+            .Gp64,
+        }),
+        FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
+        FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+        }),
+        FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
+        FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
+        FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
+            .Mips3_32,
+            .Mips4_32,
+            .Mips1,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Abs2008,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Nan2008,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
+            .Mips3_32,
+            .Fp64,
+            .Mips4_32r2,
+            .Abs2008,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Nan2008,
+            .Gp64,
+            .Mips5_32r2,
+        }),
+        FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
+        FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
+        FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"),
+        FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"),
+        FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"),
+        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"),
+        FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"),
+        FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"),
+        FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"),
+        FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"),
+        FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
+        FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
+        FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
+            .Mips3_32,
+            .Mips4_32r2,
+            .Mips3_32r2,
+            .Mips1,
+            .Mips4_32,
+            .Mips5_32r2,
+        }),
+    };
+};
diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..47c7b71fcae07cf942dfd49e70a87f9c2ab19811
--- /dev/null
+++ b/lib/std/target/feature/Msp430Feature.zig
@@ -0,0 +1,19 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const Msp430Feature = enum {
+    Hwmult16,
+    Hwmult32,
+    Hwmultf5,
+    Ext,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Hwmult16, "hwmult16", "Enable 16-bit hardware multiplier", "hwmult16"),
+        FeatureInfo(@This()).create(.Hwmult32, "hwmult32", "Enable 32-bit hardware multiplier", "hwmult32"),
+        FeatureInfo(@This()).create(.Hwmultf5, "hwmultf5", "Enable F5 series hardware multiplier", "hwmultf5"),
+        FeatureInfo(@This()).create(.Ext, "ext", "Enable MSP430-X extensions", "ext"),
+    };
+};
diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..04250a3e26720008a47877d32344172450bd08fd
--- /dev/null
+++ b/lib/std/target/feature/NvptxFeature.zig
@@ -0,0 +1,61 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const NvptxFeature = enum {
+    Ptx32,
+    Ptx40,
+    Ptx41,
+    Ptx42,
+    Ptx43,
+    Ptx50,
+    Ptx60,
+    Ptx61,
+    Ptx63,
+    Ptx64,
+    Sm_20,
+    Sm_21,
+    Sm_30,
+    Sm_32,
+    Sm_35,
+    Sm_37,
+    Sm_50,
+    Sm_52,
+    Sm_53,
+    Sm_60,
+    Sm_61,
+    Sm_62,
+    Sm_70,
+    Sm_72,
+    Sm_75,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Ptx32, "ptx32", "Use PTX version 3.2", "ptx32"),
+        FeatureInfo(@This()).create(.Ptx40, "ptx40", "Use PTX version 4.0", "ptx40"),
+        FeatureInfo(@This()).create(.Ptx41, "ptx41", "Use PTX version 4.1", "ptx41"),
+        FeatureInfo(@This()).create(.Ptx42, "ptx42", "Use PTX version 4.2", "ptx42"),
+        FeatureInfo(@This()).create(.Ptx43, "ptx43", "Use PTX version 4.3", "ptx43"),
+        FeatureInfo(@This()).create(.Ptx50, "ptx50", "Use PTX version 5.0", "ptx50"),
+        FeatureInfo(@This()).create(.Ptx60, "ptx60", "Use PTX version 6.0", "ptx60"),
+        FeatureInfo(@This()).create(.Ptx61, "ptx61", "Use PTX version 6.1", "ptx61"),
+        FeatureInfo(@This()).create(.Ptx63, "ptx63", "Use PTX version 6.3", "ptx63"),
+        FeatureInfo(@This()).create(.Ptx64, "ptx64", "Use PTX version 6.4", "ptx64"),
+        FeatureInfo(@This()).create(.Sm_20, "sm_20", "Target SM 2.0", "sm_20"),
+        FeatureInfo(@This()).create(.Sm_21, "sm_21", "Target SM 2.1", "sm_21"),
+        FeatureInfo(@This()).create(.Sm_30, "sm_30", "Target SM 3.0", "sm_30"),
+        FeatureInfo(@This()).create(.Sm_32, "sm_32", "Target SM 3.2", "sm_32"),
+        FeatureInfo(@This()).create(.Sm_35, "sm_35", "Target SM 3.5", "sm_35"),
+        FeatureInfo(@This()).create(.Sm_37, "sm_37", "Target SM 3.7", "sm_37"),
+        FeatureInfo(@This()).create(.Sm_50, "sm_50", "Target SM 5.0", "sm_50"),
+        FeatureInfo(@This()).create(.Sm_52, "sm_52", "Target SM 5.2", "sm_52"),
+        FeatureInfo(@This()).create(.Sm_53, "sm_53", "Target SM 5.3", "sm_53"),
+        FeatureInfo(@This()).create(.Sm_60, "sm_60", "Target SM 6.0", "sm_60"),
+        FeatureInfo(@This()).create(.Sm_61, "sm_61", "Target SM 6.1", "sm_61"),
+        FeatureInfo(@This()).create(.Sm_62, "sm_62", "Target SM 6.2", "sm_62"),
+        FeatureInfo(@This()).create(.Sm_70, "sm_70", "Target SM 7.0", "sm_70"),
+        FeatureInfo(@This()).create(.Sm_72, "sm_72", "Target SM 7.2", "sm_72"),
+        FeatureInfo(@This()).create(.Sm_75, "sm_75", "Target SM 7.5", "sm_75"),
+    };
+};
diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..9fe67055dd1b43b63daf7b2de3b2a68896e7c5e8
--- /dev/null
+++ b/lib/std/target/feature/PowerPcFeature.zig
@@ -0,0 +1,163 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const PowerPcFeature = enum {
+    Bit64,
+    Bitregs64,
+    Altivec,
+    Bpermd,
+    Booke,
+    Cmpb,
+    Crbits,
+    DirectMove,
+    E500,
+    Extdiv,
+    Fcpsgn,
+    Fpcvt,
+    Fprnd,
+    Fpu,
+    Fre,
+    Fres,
+    Frsqrte,
+    Frsqrtes,
+    Fsqrt,
+    Float128,
+    Htm,
+    HardFloat,
+    Icbt,
+    IsaV30Instructions,
+    Isel,
+    InvariantFunctionDescriptors,
+    Ldbrx,
+    Lfiwax,
+    Longcall,
+    Mfocrf,
+    Msync,
+    Power8Altivec,
+    Crypto,
+    Power8Vector,
+    Power9Altivec,
+    Power9Vector,
+    Popcntd,
+    Ppc4xx,
+    Ppc6xx,
+    PpcPostraSched,
+    PpcPreraSched,
+    PartwordAtomics,
+    Qpx,
+    Recipprec,
+    Spe,
+    Stfiwx,
+    SecurePlt,
+    SlowPopcntd,
+    TwoConstNr,
+    Vsx,
+    VectorsUseTwoUnits,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Bit64, "64bit", "Enable 64-bit instructions", "64bit"),
+        FeatureInfo(@This()).create(.Bitregs64, "64bitregs", "Enable 64-bit registers usage for ppc32 [beta]", "64bitregs"),
+        FeatureInfo(@This()).createWithSubfeatures(.Altivec, "altivec", "Enable Altivec instructions", "altivec", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.Bpermd, "bpermd", "Enable the bpermd instruction", "bpermd"),
+        FeatureInfo(@This()).createWithSubfeatures(.Booke, "booke", "Enable Book E instructions", "booke", &[_]@This() {
+            .Icbt,
+        }),
+        FeatureInfo(@This()).create(.Cmpb, "cmpb", "Enable the cmpb instruction", "cmpb"),
+        FeatureInfo(@This()).create(.Crbits, "crbits", "Use condition-register bits individually", "crbits"),
+        FeatureInfo(@This()).createWithSubfeatures(.DirectMove, "direct-move", "Enable Power8 direct move instructions", "direct-move", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.E500, "e500", "Enable E500/E500mc instructions", "e500"),
+        FeatureInfo(@This()).create(.Extdiv, "extdiv", "Enable extended divide instructions", "extdiv"),
+        FeatureInfo(@This()).createWithSubfeatures(.Fcpsgn, "fcpsgn", "Enable the fcpsgn instruction", "fcpsgn", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fpcvt, "fpcvt", "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", "fpcvt", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fprnd, "fprnd", "Enable the fri[mnpz] instructions", "fprnd", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fpu, "fpu", "Enable classic FPU instructions", "fpu", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fre, "fre", "Enable the fre instruction", "fre", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fres, "fres", "Enable the fres instruction", "fres", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Frsqrte, "frsqrte", "Enable the frsqrte instruction", "frsqrte", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Frsqrtes, "frsqrtes", "Enable the frsqrtes instruction", "frsqrtes", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fsqrt, "fsqrt", "Enable the fsqrt instruction", "fsqrt", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Float128, "float128", "Enable the __float128 data type for IEEE-754R Binary128.", "float128", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.Htm, "htm", "Enable Hardware Transactional Memory instructions", "htm"),
+        FeatureInfo(@This()).create(.HardFloat, "hard-float", "Enable floating-point instructions", "hard-float"),
+        FeatureInfo(@This()).create(.Icbt, "icbt", "Enable icbt instruction", "icbt"),
+        FeatureInfo(@This()).create(.IsaV30Instructions, "isa-v30-instructions", "Enable instructions added in ISA 3.0.", "isa-v30-instructions"),
+        FeatureInfo(@This()).create(.Isel, "isel", "Enable the isel instruction", "isel"),
+        FeatureInfo(@This()).create(.InvariantFunctionDescriptors, "invariant-function-descriptors", "Assume function descriptors are invariant", "invariant-function-descriptors"),
+        FeatureInfo(@This()).create(.Ldbrx, "ldbrx", "Enable the ldbrx instruction", "ldbrx"),
+        FeatureInfo(@This()).createWithSubfeatures(.Lfiwax, "lfiwax", "Enable the lfiwax instruction", "lfiwax", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.Longcall, "longcall", "Always use indirect calls", "longcall"),
+        FeatureInfo(@This()).create(.Mfocrf, "mfocrf", "Enable the MFOCRF instruction", "mfocrf"),
+        FeatureInfo(@This()).createWithSubfeatures(.Msync, "msync", "Has only the msync instruction instead of sync", "msync", &[_]@This() {
+            .Icbt,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Power8Altivec, "power8-altivec", "Enable POWER8 Altivec instructions", "power8-altivec", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable POWER8 Crypto instructions", "crypto", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Power8Vector, "power8-vector", "Enable POWER8 vector instructions", "power8-vector", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Power9Altivec, "power9-altivec", "Enable POWER9 Altivec instructions", "power9-altivec", &[_]@This() {
+            .IsaV30Instructions,
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Power9Vector, "power9-vector", "Enable POWER9 vector instructions", "power9-vector", &[_]@This() {
+            .IsaV30Instructions,
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.Popcntd, "popcntd", "Enable the popcnt[dw] instructions", "popcntd"),
+        FeatureInfo(@This()).create(.Ppc4xx, "ppc4xx", "Enable PPC 4xx instructions", "ppc4xx"),
+        FeatureInfo(@This()).create(.Ppc6xx, "ppc6xx", "Enable PPC 6xx instructions", "ppc6xx"),
+        FeatureInfo(@This()).create(.PpcPostraSched, "ppc-postra-sched", "Use PowerPC post-RA scheduling strategy", "ppc-postra-sched"),
+        FeatureInfo(@This()).create(.PpcPreraSched, "ppc-prera-sched", "Use PowerPC pre-RA scheduling strategy", "ppc-prera-sched"),
+        FeatureInfo(@This()).create(.PartwordAtomics, "partword-atomics", "Enable l[bh]arx and st[bh]cx.", "partword-atomics"),
+        FeatureInfo(@This()).createWithSubfeatures(.Qpx, "qpx", "Enable QPX instructions", "qpx", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.Recipprec, "recipprec", "Assume higher precision reciprocal estimates", "recipprec"),
+        FeatureInfo(@This()).createWithSubfeatures(.Spe, "spe", "Enable SPE instructions", "spe", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Stfiwx, "stfiwx", "Enable the stfiwx instruction", "stfiwx", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.SecurePlt, "secure-plt", "Enable secure plt mode", "secure-plt"),
+        FeatureInfo(@This()).create(.SlowPopcntd, "slow-popcntd", "Has slow popcnt[dw] instructions", "slow-popcntd"),
+        FeatureInfo(@This()).create(.TwoConstNr, "two-const-nr", "Requires two constant Newton-Raphson computation", "two-const-nr"),
+        FeatureInfo(@This()).createWithSubfeatures(.Vsx, "vsx", "Enable VSX instructions", "vsx", &[_]@This() {
+            .HardFloat,
+        }),
+        FeatureInfo(@This()).create(.VectorsUseTwoUnits, "vectors-use-two-units", "Vectors use two units", "vectors-use-two-units"),
+    };
+};
diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..a489b6f5d38f6ff0fd2bf2ebc05a45d61fc678f7
--- /dev/null
+++ b/lib/std/target/feature/RiscVFeature.zig
@@ -0,0 +1,31 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const RiscVFeature = enum {
+    Bit64,
+    E,
+    RvcHints,
+    Relax,
+    A,
+    C,
+    D,
+    F,
+    M,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Bit64, "64bit", "Implements RV64", "64bit"),
+        FeatureInfo(@This()).create(.E, "e", "Implements RV32E (provides 16 rather than 32 GPRs)", "e"),
+        FeatureInfo(@This()).create(.RvcHints, "rvc-hints", "Enable RVC Hint Instructions.", "rvc-hints"),
+        FeatureInfo(@This()).create(.Relax, "relax", "Enable Linker relaxation.", "relax"),
+        FeatureInfo(@This()).create(.A, "a", "'A' (Atomic Instructions)", "a"),
+        FeatureInfo(@This()).create(.C, "c", "'C' (Compressed Instructions)", "c"),
+        FeatureInfo(@This()).createWithSubfeatures(.D, "d", "'D' (Double-Precision Floating-Point)", "d", &[_]@This() {
+            .F,
+        }),
+        FeatureInfo(@This()).create(.F, "f", "'F' (Single-Precision Floating-Point)", "f"),
+        FeatureInfo(@This()).create(.M, "m", "'M' (Integer Multiplication and Division)", "m"),
+    };
+};
diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..b0b65041531eacc08804bf235107fb098b00127d
--- /dev/null
+++ b/lib/std/target/feature/SparcFeature.zig
@@ -0,0 +1,49 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const SparcFeature = enum {
+    Detectroundchange,
+    HardQuadFloat,
+    Leon,
+    NoFmuls,
+    NoFsmuld,
+    Leonpwrpsr,
+    SoftFloat,
+    SoftMulDiv,
+    DeprecatedV8,
+    V9,
+    Vis,
+    Vis2,
+    Vis3,
+    Fixallfdivsqrt,
+    Insertnopload,
+    Hasleoncasa,
+    Leoncyclecounter,
+    Hasumacsmac,
+    Popc,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Detectroundchange, "detectroundchange", "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", "detectroundchange"),
+        FeatureInfo(@This()).create(.HardQuadFloat, "hard-quad-float", "Enable quad-word floating point instructions", "hard-quad-float"),
+        FeatureInfo(@This()).create(.Leon, "leon", "Enable LEON extensions", "leon"),
+        FeatureInfo(@This()).create(.NoFmuls, "no-fmuls", "Disable the fmuls instruction.", "no-fmuls"),
+        FeatureInfo(@This()).create(.NoFsmuld, "no-fsmuld", "Disable the fsmuld instruction.", "no-fsmuld"),
+        FeatureInfo(@This()).create(.Leonpwrpsr, "leonpwrpsr", "Enable the PWRPSR instruction", "leonpwrpsr"),
+        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software emulation for floating point", "soft-float"),
+        FeatureInfo(@This()).create(.SoftMulDiv, "soft-mul-div", "Use software emulation for integer multiply and divide", "soft-mul-div"),
+        FeatureInfo(@This()).create(.DeprecatedV8, "deprecated-v8", "Enable deprecated V8 instructions in V9 mode", "deprecated-v8"),
+        FeatureInfo(@This()).create(.V9, "v9", "Enable SPARC-V9 instructions", "v9"),
+        FeatureInfo(@This()).create(.Vis, "vis", "Enable UltraSPARC Visual Instruction Set extensions", "vis"),
+        FeatureInfo(@This()).create(.Vis2, "vis2", "Enable Visual Instruction Set extensions II", "vis2"),
+        FeatureInfo(@This()).create(.Vis3, "vis3", "Enable Visual Instruction Set extensions III", "vis3"),
+        FeatureInfo(@This()).create(.Fixallfdivsqrt, "fixallfdivsqrt", "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", "fixallfdivsqrt"),
+        FeatureInfo(@This()).create(.Insertnopload, "insertnopload", "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", "insertnopload"),
+        FeatureInfo(@This()).create(.Hasleoncasa, "hasleoncasa", "Enable CASA instruction for LEON3 and LEON4 processors", "hasleoncasa"),
+        FeatureInfo(@This()).create(.Leoncyclecounter, "leoncyclecounter", "Use the Leon cycle counter register", "leoncyclecounter"),
+        FeatureInfo(@This()).create(.Hasumacsmac, "hasumacsmac", "Enable UMAC and SMAC for LEON3 and LEON4 processors", "hasumacsmac"),
+        FeatureInfo(@This()).create(.Popc, "popc", "Use the popc (population count) instruction", "popc"),
+    };
+};
diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..6d3321a5bab2d68c7b98980a0d0d0424cdb7b3fd
--- /dev/null
+++ b/lib/std/target/feature/SystemZFeature.zig
@@ -0,0 +1,81 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const SystemZFeature = enum {
+    DfpPackedConversion,
+    DfpZonedConversion,
+    DeflateConversion,
+    DistinctOps,
+    EnhancedDat2,
+    EnhancedSort,
+    ExecutionHint,
+    FpExtension,
+    FastSerialization,
+    GuardedStorage,
+    HighWord,
+    InsertReferenceBitsMultiple,
+    InterlockedAccess1,
+    LoadAndTrap,
+    LoadAndZeroRightmostByte,
+    LoadStoreOnCond,
+    LoadStoreOnCond2,
+    MessageSecurityAssistExtension3,
+    MessageSecurityAssistExtension4,
+    MessageSecurityAssistExtension5,
+    MessageSecurityAssistExtension7,
+    MessageSecurityAssistExtension8,
+    MessageSecurityAssistExtension9,
+    MiscellaneousExtensions,
+    MiscellaneousExtensions2,
+    MiscellaneousExtensions3,
+    PopulationCount,
+    ProcessorAssist,
+    ResetReferenceBitsMultiple,
+    TransactionalExecution,
+    Vector,
+    VectorEnhancements1,
+    VectorEnhancements2,
+    VectorPackedDecimal,
+    VectorPackedDecimalEnhancement,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.DfpPackedConversion, "dfp-packed-conversion", "Assume that the DFP packed-conversion facility is installed", "dfp-packed-conversion"),
+        FeatureInfo(@This()).create(.DfpZonedConversion, "dfp-zoned-conversion", "Assume that the DFP zoned-conversion facility is installed", "dfp-zoned-conversion"),
+        FeatureInfo(@This()).create(.DeflateConversion, "deflate-conversion", "Assume that the deflate-conversion facility is installed", "deflate-conversion"),
+        FeatureInfo(@This()).create(.DistinctOps, "distinct-ops", "Assume that the distinct-operands facility is installed", "distinct-ops"),
+        FeatureInfo(@This()).create(.EnhancedDat2, "enhanced-dat-2", "Assume that the enhanced-DAT facility 2 is installed", "enhanced-dat-2"),
+        FeatureInfo(@This()).create(.EnhancedSort, "enhanced-sort", "Assume that the enhanced-sort facility is installed", "enhanced-sort"),
+        FeatureInfo(@This()).create(.ExecutionHint, "execution-hint", "Assume that the execution-hint facility is installed", "execution-hint"),
+        FeatureInfo(@This()).create(.FpExtension, "fp-extension", "Assume that the floating-point extension facility is installed", "fp-extension"),
+        FeatureInfo(@This()).create(.FastSerialization, "fast-serialization", "Assume that the fast-serialization facility is installed", "fast-serialization"),
+        FeatureInfo(@This()).create(.GuardedStorage, "guarded-storage", "Assume that the guarded-storage facility is installed", "guarded-storage"),
+        FeatureInfo(@This()).create(.HighWord, "high-word", "Assume that the high-word facility is installed", "high-word"),
+        FeatureInfo(@This()).create(.InsertReferenceBitsMultiple, "insert-reference-bits-multiple", "Assume that the insert-reference-bits-multiple facility is installed", "insert-reference-bits-multiple"),
+        FeatureInfo(@This()).create(.InterlockedAccess1, "interlocked-access1", "Assume that interlocked-access facility 1 is installed", "interlocked-access1"),
+        FeatureInfo(@This()).create(.LoadAndTrap, "load-and-trap", "Assume that the load-and-trap facility is installed", "load-and-trap"),
+        FeatureInfo(@This()).create(.LoadAndZeroRightmostByte, "load-and-zero-rightmost-byte", "Assume that the load-and-zero-rightmost-byte facility is installed", "load-and-zero-rightmost-byte"),
+        FeatureInfo(@This()).create(.LoadStoreOnCond, "load-store-on-cond", "Assume that the load/store-on-condition facility is installed", "load-store-on-cond"),
+        FeatureInfo(@This()).create(.LoadStoreOnCond2, "load-store-on-cond-2", "Assume that the load/store-on-condition facility 2 is installed", "load-store-on-cond-2"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension3, "message-security-assist-extension3", "Assume that the message-security-assist extension facility 3 is installed", "message-security-assist-extension3"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension4, "message-security-assist-extension4", "Assume that the message-security-assist extension facility 4 is installed", "message-security-assist-extension4"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension5, "message-security-assist-extension5", "Assume that the message-security-assist extension facility 5 is installed", "message-security-assist-extension5"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension7, "message-security-assist-extension7", "Assume that the message-security-assist extension facility 7 is installed", "message-security-assist-extension7"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension8, "message-security-assist-extension8", "Assume that the message-security-assist extension facility 8 is installed", "message-security-assist-extension8"),
+        FeatureInfo(@This()).create(.MessageSecurityAssistExtension9, "message-security-assist-extension9", "Assume that the message-security-assist extension facility 9 is installed", "message-security-assist-extension9"),
+        FeatureInfo(@This()).create(.MiscellaneousExtensions, "miscellaneous-extensions", "Assume that the miscellaneous-extensions facility is installed", "miscellaneous-extensions"),
+        FeatureInfo(@This()).create(.MiscellaneousExtensions2, "miscellaneous-extensions-2", "Assume that the miscellaneous-extensions facility 2 is installed", "miscellaneous-extensions-2"),
+        FeatureInfo(@This()).create(.MiscellaneousExtensions3, "miscellaneous-extensions-3", "Assume that the miscellaneous-extensions facility 3 is installed", "miscellaneous-extensions-3"),
+        FeatureInfo(@This()).create(.PopulationCount, "population-count", "Assume that the population-count facility is installed", "population-count"),
+        FeatureInfo(@This()).create(.ProcessorAssist, "processor-assist", "Assume that the processor-assist facility is installed", "processor-assist"),
+        FeatureInfo(@This()).create(.ResetReferenceBitsMultiple, "reset-reference-bits-multiple", "Assume that the reset-reference-bits-multiple facility is installed", "reset-reference-bits-multiple"),
+        FeatureInfo(@This()).create(.TransactionalExecution, "transactional-execution", "Assume that the transactional-execution facility is installed", "transactional-execution"),
+        FeatureInfo(@This()).create(.Vector, "vector", "Assume that the vectory facility is installed", "vector"),
+        FeatureInfo(@This()).create(.VectorEnhancements1, "vector-enhancements-1", "Assume that the vector enhancements facility 1 is installed", "vector-enhancements-1"),
+        FeatureInfo(@This()).create(.VectorEnhancements2, "vector-enhancements-2", "Assume that the vector enhancements facility 2 is installed", "vector-enhancements-2"),
+        FeatureInfo(@This()).create(.VectorPackedDecimal, "vector-packed-decimal", "Assume that the vector packed decimal facility is installed", "vector-packed-decimal"),
+        FeatureInfo(@This()).create(.VectorPackedDecimalEnhancement, "vector-packed-decimal-enhancement", "Assume that the vector packed decimal enhancement facility is installed", "vector-packed-decimal-enhancement"),
+    };
+};
diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..a7aaeee4f0a18db718254a8d50a3943074d23e44
--- /dev/null
+++ b/lib/std/target/feature/WebAssemblyFeature.zig
@@ -0,0 +1,33 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const WebAssemblyFeature = enum {
+    Atomics,
+    BulkMemory,
+    ExceptionHandling,
+    Multivalue,
+    MutableGlobals,
+    NontrappingFptoint,
+    Simd128,
+    SignExt,
+    TailCall,
+    UnimplementedSimd128,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).create(.Atomics, "atomics", "Enable Atomics", "atomics"),
+        FeatureInfo(@This()).create(.BulkMemory, "bulk-memory", "Enable bulk memory operations", "bulk-memory"),
+        FeatureInfo(@This()).create(.ExceptionHandling, "exception-handling", "Enable Wasm exception handling", "exception-handling"),
+        FeatureInfo(@This()).create(.Multivalue, "multivalue", "Enable multivalue blocks, instructions, and functions", "multivalue"),
+        FeatureInfo(@This()).create(.MutableGlobals, "mutable-globals", "Enable mutable globals", "mutable-globals"),
+        FeatureInfo(@This()).create(.NontrappingFptoint, "nontrapping-fptoint", "Enable non-trapping float-to-int conversion operators", "nontrapping-fptoint"),
+        FeatureInfo(@This()).create(.Simd128, "simd128", "Enable 128-bit SIMD", "simd128"),
+        FeatureInfo(@This()).create(.SignExt, "sign-ext", "Enable sign extension operators", "sign-ext"),
+        FeatureInfo(@This()).create(.TailCall, "tail-call", "Enable tail call instructions", "tail-call"),
+        FeatureInfo(@This()).createWithSubfeatures(.UnimplementedSimd128, "unimplemented-simd128", "Enable 128-bit SIMD not yet implemented in engines", "unimplemented-simd128", &[_]@This() {
+            .Simd128,
+        }),
+    };
+};
diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig
new file mode 100644
index 0000000000000000000000000000000000000000..7a2cc58169ed01c2d04df33a74e93a6457dea132
--- /dev/null
+++ b/lib/std/target/feature/X86Feature.zig
@@ -0,0 +1,342 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const X86Feature = enum {
+    Dnow3,
+    Dnowa3,
+    Bit64,
+    Adx,
+    Aes,
+    Avx,
+    Avx2,
+    Avx512f,
+    Avx512bf16,
+    Avx512bitalg,
+    Bmi,
+    Bmi2,
+    Avx512bw,
+    Branchfusion,
+    Avx512cd,
+    Cldemote,
+    Clflushopt,
+    Clwb,
+    Clzero,
+    Cmov,
+    Cx8,
+    Cx16,
+    Avx512dq,
+    Mpx,
+    Enqcmd,
+    Avx512er,
+    Ermsb,
+    F16c,
+    Fma,
+    Fma4,
+    Fsgsbase,
+    Fxsr,
+    Fast11bytenop,
+    Fast15bytenop,
+    FastBextr,
+    FastHops,
+    FastLzcnt,
+    FastPartialYmmOrZmmWrite,
+    FastShldRotate,
+    FastScalarFsqrt,
+    FastScalarShiftMasks,
+    FastVariableShuffle,
+    FastVectorFsqrt,
+    FastVectorShiftMasks,
+    Gfni,
+    FastGather,
+    Avx512ifma,
+    Invpcid,
+    Sahf,
+    LeaSp,
+    LeaUsesAg,
+    Lwp,
+    Lzcnt,
+    FalseDepsLzcntTzcnt,
+    Mmx,
+    Movbe,
+    Movdir64b,
+    Movdiri,
+    Mwaitx,
+    Macrofusion,
+    MergeToThreewayBranch,
+    Nopl,
+    Pclmul,
+    Pconfig,
+    Avx512pf,
+    Pku,
+    Popcnt,
+    FalseDepsPopcnt,
+    Prefetchwt1,
+    Prfchw,
+    Ptwrite,
+    PadShortFunctions,
+    Prefer128Bit,
+    Prefer256Bit,
+    Rdpid,
+    Rdrnd,
+    Rdseed,
+    Rtm,
+    Retpoline,
+    RetpolineExternalThunk,
+    RetpolineIndirectBranches,
+    RetpolineIndirectCalls,
+    Sgx,
+    Sha,
+    Shstk,
+    Sse,
+    Sse2,
+    Sse3,
+    Sse4a,
+    Sse41,
+    Sse42,
+    SseUnalignedMem,
+    Ssse3,
+    Slow3opsLea,
+    IdivlToDivb,
+    IdivqToDivl,
+    SlowIncdec,
+    SlowLea,
+    SlowPmaddwd,
+    SlowPmulld,
+    SlowShld,
+    SlowTwoMemOps,
+    SlowUnalignedMem16,
+    SlowUnalignedMem32,
+    SoftFloat,
+    Tbm,
+    UseAa,
+    Vaes,
+    Avx512vbmi,
+    Avx512vbmi2,
+    Avx512vl,
+    Avx512vnni,
+    Avx512vp2intersect,
+    Vpclmulqdq,
+    Avx512vpopcntdq,
+    Waitpkg,
+    Wbnoinvd,
+    X87,
+    Xop,
+    Xsave,
+    Xsavec,
+    Xsaveopt,
+    Xsaves,
+    BitMode16,
+    BitMode32,
+    BitMode64,
+
+    pub fn getInfo(self: @This()) FeatureInfo {
+        return feature_infos[@enumToInt(self)];
+    }
+
+    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
+        FeatureInfo(@This()).createWithSubfeatures(.Dnow3, "3dnow", "Enable 3DNow! instructions", "3dnow", &[_]@This() {
+            .Mmx,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Dnowa3, "3dnowa", "Enable 3DNow! Athlon instructions", "3dnowa", &[_]@This() {
+            .Mmx,
+        }),
+        FeatureInfo(@This()).create(.Bit64, "64bit", "Support 64-bit instructions", "64bit"),
+        FeatureInfo(@This()).create(.Adx, "adx", "Support ADX instructions", "adx"),
+        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES instructions", "aes", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx, "avx", "Enable AVX instructions", "avx", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx2, "avx2", "Enable AVX2 instructions", "avx2", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512f, "avx512f", "Enable AVX-512 instructions", "avx512f", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512bf16, "avx512bf16", "Support bfloat16 floating point", "avx512bf16", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512bitalg, "avx512bitalg", "Enable AVX-512 Bit Algorithms", "avx512bitalg", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Bmi, "bmi", "Support BMI instructions", "bmi"),
+        FeatureInfo(@This()).create(.Bmi2, "bmi2", "Support BMI2 instructions", "bmi2"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512bw, "avx512bw", "Enable AVX-512 Byte and Word Instructions", "avx512bw", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Branchfusion, "branchfusion", "CMP/TEST can be fused with conditional branches", "branchfusion"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512cd, "avx512cd", "Enable AVX-512 Conflict Detection Instructions", "avx512cd", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Cldemote, "cldemote", "Enable Cache Demote", "cldemote"),
+        FeatureInfo(@This()).create(.Clflushopt, "clflushopt", "Flush A Cache Line Optimized", "clflushopt"),
+        FeatureInfo(@This()).create(.Clwb, "clwb", "Cache Line Write Back", "clwb"),
+        FeatureInfo(@This()).create(.Clzero, "clzero", "Enable Cache Line Zero", "clzero"),
+        FeatureInfo(@This()).create(.Cmov, "cmov", "Enable conditional move instructions", "cmov"),
+        FeatureInfo(@This()).create(.Cx8, "cx8", "Support CMPXCHG8B instructions", "cx8"),
+        FeatureInfo(@This()).createWithSubfeatures(.Cx16, "cx16", "64-bit with cmpxchg16b", "cx16", &[_]@This() {
+            .Cx8,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512dq, "avx512dq", "Enable AVX-512 Doubleword and Quadword Instructions", "avx512dq", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Mpx, "mpx", "Deprecated. Support MPX instructions", "mpx"),
+        FeatureInfo(@This()).create(.Enqcmd, "enqcmd", "Has ENQCMD instructions", "enqcmd"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512er, "avx512er", "Enable AVX-512 Exponential and Reciprocal Instructions", "avx512er", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Ermsb, "ermsb", "REP MOVS/STOS are fast", "ermsb"),
+        FeatureInfo(@This()).createWithSubfeatures(.F16c, "f16c", "Support 16-bit floating point conversion instructions", "f16c", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fma, "fma", "Enable three-operand fused multiple-add", "fma", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Fma4, "fma4", "Enable four-operand fused multiple-add", "fma4", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Fsgsbase, "fsgsbase", "Support FS/GS Base instructions", "fsgsbase"),
+        FeatureInfo(@This()).create(.Fxsr, "fxsr", "Support fxsave/fxrestore instructions", "fxsr"),
+        FeatureInfo(@This()).create(.Fast11bytenop, "fast-11bytenop", "Target can quickly decode up to 11 byte NOPs", "fast-11bytenop"),
+        FeatureInfo(@This()).create(.Fast15bytenop, "fast-15bytenop", "Target can quickly decode up to 15 byte NOPs", "fast-15bytenop"),
+        FeatureInfo(@This()).create(.FastBextr, "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", "fast-bextr"),
+        FeatureInfo(@This()).createWithSubfeatures(.FastHops, "fast-hops", "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", "fast-hops", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.FastLzcnt, "fast-lzcnt", "LZCNT instructions are as fast as most simple integer ops", "fast-lzcnt"),
+        FeatureInfo(@This()).create(.FastPartialYmmOrZmmWrite, "fast-partial-ymm-or-zmm-write", "Partial writes to YMM/ZMM registers are fast", "fast-partial-ymm-or-zmm-write"),
+        FeatureInfo(@This()).create(.FastShldRotate, "fast-shld-rotate", "SHLD can be used as a faster rotate", "fast-shld-rotate"),
+        FeatureInfo(@This()).create(.FastScalarFsqrt, "fast-scalar-fsqrt", "Scalar SQRT is fast (disable Newton-Raphson)", "fast-scalar-fsqrt"),
+        FeatureInfo(@This()).create(.FastScalarShiftMasks, "fast-scalar-shift-masks", "Prefer a left/right scalar logical shift pair over a shift+and pair", "fast-scalar-shift-masks"),
+        FeatureInfo(@This()).create(.FastVariableShuffle, "fast-variable-shuffle", "Shuffles with variable masks are fast", "fast-variable-shuffle"),
+        FeatureInfo(@This()).create(.FastVectorFsqrt, "fast-vector-fsqrt", "Vector SQRT is fast (disable Newton-Raphson)", "fast-vector-fsqrt"),
+        FeatureInfo(@This()).create(.FastVectorShiftMasks, "fast-vector-shift-masks", "Prefer a left/right vector logical shift pair over a shift+and pair", "fast-vector-shift-masks"),
+        FeatureInfo(@This()).createWithSubfeatures(.Gfni, "gfni", "Enable Galois Field Arithmetic Instructions", "gfni", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.FastGather, "fast-gather", "Indicates if gather is reasonably fast", "fast-gather"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512ifma, "avx512ifma", "Enable AVX-512 Integer Fused Multiple-Add", "avx512ifma", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Invpcid, "invpcid", "Invalidate Process-Context Identifier", "invpcid"),
+        FeatureInfo(@This()).create(.Sahf, "sahf", "Support LAHF and SAHF instructions", "sahf"),
+        FeatureInfo(@This()).create(.LeaSp, "lea-sp", "Use LEA for adjusting the stack pointer", "lea-sp"),
+        FeatureInfo(@This()).create(.LeaUsesAg, "lea-uses-ag", "LEA instruction needs inputs at AG stage", "lea-uses-ag"),
+        FeatureInfo(@This()).create(.Lwp, "lwp", "Enable LWP instructions", "lwp"),
+        FeatureInfo(@This()).create(.Lzcnt, "lzcnt", "Support LZCNT instruction", "lzcnt"),
+        FeatureInfo(@This()).create(.FalseDepsLzcntTzcnt, "false-deps-lzcnt-tzcnt", "LZCNT/TZCNT have a false dependency on dest register", "false-deps-lzcnt-tzcnt"),
+        FeatureInfo(@This()).create(.Mmx, "mmx", "Enable MMX instructions", "mmx"),
+        FeatureInfo(@This()).create(.Movbe, "movbe", "Support MOVBE instruction", "movbe"),
+        FeatureInfo(@This()).create(.Movdir64b, "movdir64b", "Support movdir64b instruction", "movdir64b"),
+        FeatureInfo(@This()).create(.Movdiri, "movdiri", "Support movdiri instruction", "movdiri"),
+        FeatureInfo(@This()).create(.Mwaitx, "mwaitx", "Enable MONITORX/MWAITX timer functionality", "mwaitx"),
+        FeatureInfo(@This()).create(.Macrofusion, "macrofusion", "Various instructions can be fused with conditional branches", "macrofusion"),
+        FeatureInfo(@This()).create(.MergeToThreewayBranch, "merge-to-threeway-branch", "Merge branches to a three-way conditional branch", "merge-to-threeway-branch"),
+        FeatureInfo(@This()).create(.Nopl, "nopl", "Enable NOPL instruction", "nopl"),
+        FeatureInfo(@This()).createWithSubfeatures(.Pclmul, "pclmul", "Enable packed carry-less multiplication instructions", "pclmul", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Pconfig, "pconfig", "platform configuration instruction", "pconfig"),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512pf, "avx512pf", "Enable AVX-512 PreFetch Instructions", "avx512pf", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Pku, "pku", "Enable protection keys", "pku"),
+        FeatureInfo(@This()).create(.Popcnt, "popcnt", "Support POPCNT instruction", "popcnt"),
+        FeatureInfo(@This()).create(.FalseDepsPopcnt, "false-deps-popcnt", "POPCNT has a false dependency on dest register", "false-deps-popcnt"),
+        FeatureInfo(@This()).create(.Prefetchwt1, "prefetchwt1", "Prefetch with Intent to Write and T1 Hint", "prefetchwt1"),
+        FeatureInfo(@This()).create(.Prfchw, "prfchw", "Support PRFCHW instructions", "prfchw"),
+        FeatureInfo(@This()).create(.Ptwrite, "ptwrite", "Support ptwrite instruction", "ptwrite"),
+        FeatureInfo(@This()).create(.PadShortFunctions, "pad-short-functions", "Pad short functions", "pad-short-functions"),
+        FeatureInfo(@This()).create(.Prefer128Bit, "prefer-128-bit", "Prefer 128-bit AVX instructions", "prefer-128-bit"),
+        FeatureInfo(@This()).create(.Prefer256Bit, "prefer-256-bit", "Prefer 256-bit AVX instructions", "prefer-256-bit"),
+        FeatureInfo(@This()).create(.Rdpid, "rdpid", "Support RDPID instructions", "rdpid"),
+        FeatureInfo(@This()).create(.Rdrnd, "rdrnd", "Support RDRAND instruction", "rdrnd"),
+        FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"),
+        FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"),
+        FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() {
+            .RetpolineIndirectBranches,
+            .RetpolineIndirectCalls,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() {
+            .RetpolineIndirectCalls,
+        }),
+        FeatureInfo(@This()).create(.RetpolineIndirectBranches, "retpoline-indirect-branches", "Remove speculation of indirect branches from the generated code", "retpoline-indirect-branches"),
+        FeatureInfo(@This()).create(.RetpolineIndirectCalls, "retpoline-indirect-calls", "Remove speculation of indirect calls from the generated code", "retpoline-indirect-calls"),
+        FeatureInfo(@This()).create(.Sgx, "sgx", "Enable Software Guard Extensions", "sgx"),
+        FeatureInfo(@This()).createWithSubfeatures(.Sha, "sha", "Enable SHA instructions", "sha", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Shstk, "shstk", "Support CET Shadow-Stack instructions", "shstk"),
+        FeatureInfo(@This()).create(.Sse, "sse", "Enable SSE instructions", "sse"),
+        FeatureInfo(@This()).createWithSubfeatures(.Sse2, "sse2", "Enable SSE2 instructions", "sse2", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sse3, "sse3", "Enable SSE3 instructions", "sse3", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sse4a, "sse4a", "Support SSE 4a instructions", "sse4a", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sse41, "sse4.1", "Enable SSE 4.1 instructions", "sse4.1", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Sse42, "sse4.2", "Enable SSE 4.2 instructions", "sse4.2", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.SseUnalignedMem, "sse-unaligned-mem", "Allow unaligned memory operands with SSE instructions", "sse-unaligned-mem"),
+        FeatureInfo(@This()).createWithSubfeatures(.Ssse3, "ssse3", "Enable SSSE3 instructions", "ssse3", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Slow3opsLea, "slow-3ops-lea", "LEA instruction with 3 ops or certain registers is slow", "slow-3ops-lea"),
+        FeatureInfo(@This()).create(.IdivlToDivb, "idivl-to-divb", "Use 8-bit divide for positive values less than 256", "idivl-to-divb"),
+        FeatureInfo(@This()).create(.IdivqToDivl, "idivq-to-divl", "Use 32-bit divide for positive values less than 2^32", "idivq-to-divl"),
+        FeatureInfo(@This()).create(.SlowIncdec, "slow-incdec", "INC and DEC instructions are slower than ADD and SUB", "slow-incdec"),
+        FeatureInfo(@This()).create(.SlowLea, "slow-lea", "LEA instruction with certain arguments is slow", "slow-lea"),
+        FeatureInfo(@This()).create(.SlowPmaddwd, "slow-pmaddwd", "PMADDWD is slower than PMULLD", "slow-pmaddwd"),
+        FeatureInfo(@This()).create(.SlowPmulld, "slow-pmulld", "PMULLD instruction is slow", "slow-pmulld"),
+        FeatureInfo(@This()).create(.SlowShld, "slow-shld", "SHLD instruction is slow", "slow-shld"),
+        FeatureInfo(@This()).create(.SlowTwoMemOps, "slow-two-mem-ops", "Two memory operand instructions are slow", "slow-two-mem-ops"),
+        FeatureInfo(@This()).create(.SlowUnalignedMem16, "slow-unaligned-mem-16", "Slow unaligned 16-byte memory access", "slow-unaligned-mem-16"),
+        FeatureInfo(@This()).create(.SlowUnalignedMem32, "slow-unaligned-mem-32", "Slow unaligned 32-byte memory access", "slow-unaligned-mem-32"),
+        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features", "soft-float"),
+        FeatureInfo(@This()).create(.Tbm, "tbm", "Enable TBM instructions", "tbm"),
+        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
+        FeatureInfo(@This()).createWithSubfeatures(.Vaes, "vaes", "Promote selected AES instructions to AVX512/AVX registers", "vaes", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi, "avx512vbmi", "Enable AVX-512 Vector Byte Manipulation Instructions", "avx512vbmi", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi2, "avx512vbmi2", "Enable AVX-512 further Vector Byte Manipulation Instructions", "avx512vbmi2", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vl, "avx512vl", "Enable AVX-512 Vector Length eXtensions", "avx512vl", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vnni, "avx512vnni", "Enable AVX-512 Vector Neural Network Instructions", "avx512vnni", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vp2intersect, "avx512vp2intersect", "Enable AVX-512 vp2intersect", "avx512vp2intersect", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Vpclmulqdq, "vpclmulqdq", "Enable vpclmulqdq instructions", "vpclmulqdq", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).createWithSubfeatures(.Avx512vpopcntdq, "avx512vpopcntdq", "Enable AVX-512 Population Count Instructions", "avx512vpopcntdq", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Waitpkg, "waitpkg", "Wait and pause enhancements", "waitpkg"),
+        FeatureInfo(@This()).create(.Wbnoinvd, "wbnoinvd", "Write Back No Invalidate", "wbnoinvd"),
+        FeatureInfo(@This()).create(.X87, "x87", "Enable X87 float instructions", "x87"),
+        FeatureInfo(@This()).createWithSubfeatures(.Xop, "xop", "Enable XOP instructions", "xop", &[_]@This() {
+            .Sse,
+        }),
+        FeatureInfo(@This()).create(.Xsave, "xsave", "Support xsave instructions", "xsave"),
+        FeatureInfo(@This()).create(.Xsavec, "xsavec", "Support xsavec instructions", "xsavec"),
+        FeatureInfo(@This()).create(.Xsaveopt, "xsaveopt", "Support xsaveopt instructions", "xsaveopt"),
+        FeatureInfo(@This()).create(.Xsaves, "xsaves", "Support xsaves instructions", "xsaves"),
+        FeatureInfo(@This()).create(.BitMode16, "16bit-mode", "16-bit mode (i8086)", "16bit-mode"),
+        FeatureInfo(@This()).create(.BitMode32, "32bit-mode", "32-bit mode (80386)", "32bit-mode"),
+        FeatureInfo(@This()).create(.BitMode64, "64bit-mode", "64-bit mode (x86_64)", "64bit-mode"),
+    };
+};
diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig
new file mode 100644
index 0000000000000000000000000000000000000000..87a334978dba703130bd08382f68911b4d775093
--- /dev/null
+++ b/lib/std/target/feature/empty.zig
@@ -0,0 +1,5 @@
+const FeatureInfo = @import("std").target.feature.FeatureInfo;
+
+pub const EmptyFeature = enum {
+    pub const feature_infos = [0]FeatureInfo(@This()) {};
+}
-- 
2.54.0


From 8f191e0166ada745a677e8021dbb54598bcd94ea Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Mon, 16 Dec 2019 16:51:26 -0500
Subject: [PATCH 033/116] Update term feature deps -> subfeatures

---
 lib/std/target/feature.zig | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig
index 31dce695a5ef430a4c3b1538ab3fa58b92bb2847..b5fb4ff96d3a3b1482e3479531ae94c4e0e0694e 100644
--- a/lib/std/target/feature.zig
+++ b/lib/std/target/feature.zig
@@ -7,8 +7,7 @@ pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature;
 pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature;
 pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature;
 pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature;
-pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature;
-pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature;
+pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature;
 pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature;
 pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature;
 pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature;
@@ -51,7 +50,7 @@ pub fn FeatureInfo(comptime EnumType: type) type {
         value: EnumType,
         name: []const u8,
 
-        dependencies: []const EnumType,
+        subfeatures: []const EnumType,
 
         const Self = @This();
 
@@ -60,16 +59,16 @@ pub fn FeatureInfo(comptime EnumType: type) type {
                 .value = value,
                 .name = name,
 
-                .dependencies = &[_]EnumType{},
+                .subfeatures = &[_]EnumType{},
             };
         }
 
-        fn createWithDeps(value: EnumType, name: []const u8, dependencies: []const EnumType) Self {
+        fn createWithSubfeatures(value: EnumType, name: []const u8, subfeatures: []const EnumType) Self {
             return Self {
                 .value = value,
                 .name = name,
 
-                .dependencies = dependencies,
+                .subfeatures = subfeatures,
             };
         }
     };
-- 
2.54.0


From 8ac138a318d5581fa7fb80cc540d14e0a482f59e Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Tue, 17 Dec 2019 09:43:05 -0500
Subject: [PATCH 034/116] Add parseArchTag and fix parseArchSub

---
 lib/std/target.zig | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 029bf0148947c4b175a5f2edb81a082c13870d00..4d5de1fc85ead7369d7312405517c76d0913bfe3 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -499,7 +499,7 @@ pub const Target = union(enum) {
     pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
         const info = @typeInfo(Arch);
         inline for (info.Union.fields) |field| {
-            if (mem.eql(u8, text, field.name)) {
+            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
                 if (field.field_type == void) {
                     return @as(Arch, @field(Arch, field.name));
                 } else {
@@ -517,6 +517,31 @@ pub const Target = union(enum) {
         return error.UnknownArchitecture;
     }
 
+    pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) {
+        const info = @typeInfo(Arch);
+        inline for (info.Union.fields) |field| {
+            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
+                if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name));
+
+                if (field.field_type == void) {
+                    return error.UnknownArchitecture;
+                }
+
+                const sub_info = @typeInfo(field.field_type);
+                inline for (sub_info.Enum.fields) |sub_field| {
+                    const combined = field.name ++ sub_field.name;
+                    if (mem.eql(u8, text, combined)) {
+                        return @as(@TagType(Arch), @field(Arch, field.name));
+                    }
+                }
+
+                return error.UnknownSubArchitecture;
+            }
+        }
+
+        return error.UnknownArchitecture;
+    }
+
     pub fn parseOs(text: []const u8) !Os {
         const info = @typeInfo(Os);
         inline for (info.Enum.fields) |field| {
-- 
2.54.0


From 21908e100e42c5630e1e4253167496fb76238670 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Tue, 17 Dec 2019 09:45:00 -0500
Subject: [PATCH 035/116] Fix CPU and feature defs

---
 lib/std/target/cpu.zig                        |   12 +-
 lib/std/target/cpu/AArch64Cpu.zig             |  532 +-
 lib/std/target/cpu/AmdGpuCpu.zig              | 1046 ++--
 lib/std/target/cpu/ArmCpu.zig                 | 1020 ++--
 lib/std/target/cpu/AvrCpu.zig                 | 4304 ++++++++---------
 lib/std/target/cpu/BpfCpu.zig                 |   28 +-
 lib/std/target/cpu/HexagonCpu.zig             |   36 +-
 lib/std/target/cpu/MipsCpu.zig                |  220 +-
 lib/std/target/cpu/Msp430Cpu.zig              |   20 +-
 lib/std/target/cpu/NvptxCpu.zig               |   68 +-
 lib/std/target/cpu/PowerPcCpu.zig             |  180 +-
 lib/std/target/cpu/RiscVCpu.zig               |   16 +-
 lib/std/target/cpu/SparcCpu.zig               |  168 +-
 lib/std/target/cpu/SystemZCpu.zig             |   60 +-
 lib/std/target/cpu/WebAssemblyCpu.zig         |   20 +-
 lib/std/target/cpu/X86Cpu.zig                 |  324 +-
 lib/std/target/cpu/empty.zig                  |    4 +-
 lib/std/target/feature.zig                    |   12 +-
 lib/std/target/feature/AArch64Feature.zig     |  440 +-
 lib/std/target/feature/AmdGpuFeature.zig      |  150 +-
 lib/std/target/feature/ArmFeature.zig         |  392 +-
 lib/std/target/feature/AvrFeature.zig         |  162 +-
 lib/std/target/feature/BpfFeature.zig         |    2 +-
 lib/std/target/feature/HexagonFeature.zig     |    2 +-
 lib/std/target/feature/MipsFeature.zig        |  146 +-
 lib/std/target/feature/Msp430Feature.zig      |    2 +-
 lib/std/target/feature/NvptxFeature.zig       |    2 +-
 lib/std/target/feature/PowerPcFeature.zig     |    2 +-
 lib/std/target/feature/RiscVFeature.zig       |    2 +-
 lib/std/target/feature/SparcFeature.zig       |    2 +-
 lib/std/target/feature/SystemZFeature.zig     |    2 +-
 lib/std/target/feature/WebAssemblyFeature.zig |    2 +-
 lib/std/target/feature/X86Feature.zig         |    4 +-
 lib/std/target/feature/empty.zig              |    4 +-
 34 files changed, 4697 insertions(+), 4689 deletions(-)

diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig
index 02e707078a608724e6e8814664134ec300775fca..99c375874b9b66dbfbd4df2da7a14e2d76ee2255 100644
--- a/lib/std/target/cpu.zig
+++ b/lib/std/target/cpu.zig
@@ -1,7 +1,7 @@
 const std = @import("std");
 
 const feature = @import("feature.zig");
-const Arch = @import("arch.zig").Arch;
+const Arch = std.Target.Arch;
 
 pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu;
 pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu;
@@ -19,7 +19,7 @@ pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu;
 pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu;
 pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu;
 
-const EmptyCpu = @import("feature/empty.zig").EmptyCpu;
+pub const EmptyCpu = @import("cpu/empty.zig").EmptyCpu;
 
 pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
     return switch (arch) {
@@ -44,19 +44,21 @@ pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
 }
 
 pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type {
-    return CpuInfo(feature.ArchFeature(arch));
+    return CpuInfo(ArchCpu(arch), feature.ArchFeature(arch));
 }
 
-pub fn CpuInfo(comptime FeatureType: type) type {
+pub fn CpuInfo(comptime CpuType: type, comptime FeatureType: type) type {
     return struct {
+        value: CpuType,
         name: []const u8,
 
         features: []const FeatureType,
 
         const Self = @This();
 
-        fn create(name: []const u8, features: []const FeatureType) Self {
+        pub fn create(value: CpuType, name: []const u8, features: []const FeatureType) Self {
             return Self {
+                .value = value,
                 .name = name,
                 .features = features,
             };
diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig
index d6c86aba0a3941a3b70aeaf7c709f6b9648b2fd3..1fb36080fd32ae600bea25a4cdd034d273103039 100644
--- a/lib/std/target/cpu/AArch64Cpu.zig
+++ b/lib/std/target/cpu/AArch64Cpu.zig
@@ -33,298 +33,298 @@ pub const AArch64Cpu = enum {
     Thunderxt88,
     Tsv110,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.AArch64Feature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.AArch64Feature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType {
-            .ZczFp,
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.AppleLatest, "apple-latest", &[_]FeatureType {
+            .ArithBccFusion,
             .ArithCbzFusion,
-            .FuseAes,
+            .ZczFp,
             .AlternateSextloadCvtF32Pattern,
-            .ZczFpWorkaround,
-            .FpArmv8,
-            .Perfmon,
             .DisableLatencySchedHeuristic,
-            .Zcm,
+            .Perfmon,
             .ZczGp,
-            .ArithBccFusion,
+            .ZczFpWorkaround,
+            .Zcm,
+            .FpArmv8,
             .FuseCryptoEor,
+            .FuseAes,
             .Cyclone,
-        },
-        CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
             .Perfmon,
             .FpArmv8,
             .Crc,
             .A35,
-        },
-        CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
+            .CustomCheapAsMove,
+            .BalanceFpOps,
             .UseAa,
-            .FuseAes,
             .FpArmv8,
-            .Perfmon,
-            .Crc,
-            .BalanceFpOps,
-            .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .FuseAes,
             .A53,
-        },
-        CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+            .Lse,
+            .Vh,
             .Rdm,
-            .FuseAes,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
             .A55,
-        },
-        CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
-            .FuseLiterals,
-            .FuseAes,
-            .FpArmv8,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
             .Perfmon,
-            .Crc,
-            .BalanceFpOps,
             .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .BalanceFpOps,
+            .FuseLiterals,
+            .FpArmv8,
+            .FuseAes,
             .A57,
-        },
-        CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA65, "cortex-a65", &[_]FeatureType {
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
-            .A65,
-        },
-        CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
             .Rcpc,
             .Ccpp,
-            .Pan,
-            .Rdm,
             .FpArmv8,
+            .A65,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
             .A65,
-        },
-        CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
             .Perfmon,
+            .FpArmv8,
+            .Crc,
             .FuseAes,
-            .FpArmv8,
-            .Crc,
             .A72,
-        },
-        CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
             .Perfmon,
-            .FuseAes,
             .FpArmv8,
             .Crc,
+            .FuseAes,
             .A73,
-        },
-        CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+            .Lse,
+            .Vh,
             .Rdm,
-            .FuseAes,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
             .A75,
-        },
-        CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
-            .A76,
-        },
-        CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
             .Rcpc,
             .Ccpp,
-            .Pan,
-            .Rdm,
             .FpArmv8,
+            .A76,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
             .A76,
-        },
-        CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
-            .ZczFp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
+            .ArithBccFusion,
             .ArithCbzFusion,
-            .FuseAes,
+            .ZczFp,
             .AlternateSextloadCvtF32Pattern,
-            .ZczFpWorkaround,
-            .FpArmv8,
-            .Perfmon,
             .DisableLatencySchedHeuristic,
-            .Zcm,
+            .Perfmon,
             .ZczGp,
-            .ArithBccFusion,
+            .ZczFpWorkaround,
+            .Zcm,
+            .FpArmv8,
             .FuseCryptoEor,
+            .FuseAes,
             .Cyclone,
-        },
-        CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
             .ZczFp,
-            .FuseAes,
-            .SlowPaired128,
-            .Force32bitJumpTables,
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
             .UseReciprocalSquareRoot,
-            .FpArmv8,
-            .Perfmon,
-            .SlowMisaligned128store,
-            .Crc,
-            .UsePostraScheduler,
             .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .SlowMisaligned128store,
+            .FpArmv8,
+            .SlowPaired128,
+            .FuseAes,
             .Exynosm1,
-        },
-        CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
             .ZczFp,
-            .FuseAes,
-            .SlowPaired128,
-            .Force32bitJumpTables,
-            .FpArmv8,
             .Perfmon,
-            .SlowMisaligned128store,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
             .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .SlowMisaligned128store,
+            .FpArmv8,
+            .SlowPaired128,
+            .FuseAes,
             .Exynosm2,
-        },
-        CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+            .FuseCsel,
             .ZczFp,
-            .FuseLiterals,
-            .FuseAes,
-            .Force32bitJumpTables,
-            .FpArmv8,
             .Perfmon,
-            .Crc,
-            .LslFast,
-            .FuseAddress,
             .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
-            .FuseCsel,
+            .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .FuseLiterals,
+            .FuseAddress,
+            .LslFast,
+            .FpArmv8,
+            .FuseAes,
             .Exynosm3,
-        },
-        CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+            .ArithBccFusion,
+            .Vh,
+            .ArithCbzFusion,
             .ZczFp,
-            .Lse,
-            .FuseArithLogic,
-            .Lor,
+            .Rdm,
             .UsePostraScheduler,
-            .Uaops,
-            .CustomCheapAsMove,
-            .ArithBccFusion,
+            .Ras,
+            .Force32bitJumpTables,
             .Ccpp,
-            .Perfmon,
+            .FuseCsel,
             .Pan,
-            .Rdm,
+            .Uaops,
             .FuseLiterals,
-            .Force32bitJumpTables,
             .LslFast,
+            .Lse,
+            .Perfmon,
+            .Dotprod,
+            .Lor,
+            .FuseArithLogic,
+            .Crc,
+            .CustomCheapAsMove,
             .FuseAddress,
             .ZczGp,
-            .Ras,
-            .FuseCsel,
-            .ArithCbzFusion,
-            .FuseAes,
             .FpArmv8,
-            .Crc,
-            .Dotprod,
-            .Vh,
+            .FuseAes,
             .Exynosm4,
-        },
-        CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+            .ArithBccFusion,
+            .Vh,
+            .ArithCbzFusion,
             .ZczFp,
-            .Lse,
-            .FuseArithLogic,
-            .Lor,
+            .Rdm,
             .UsePostraScheduler,
-            .Uaops,
-            .CustomCheapAsMove,
-            .ArithBccFusion,
+            .Ras,
+            .Force32bitJumpTables,
             .Ccpp,
-            .Perfmon,
+            .FuseCsel,
             .Pan,
-            .Rdm,
+            .Uaops,
             .FuseLiterals,
-            .Force32bitJumpTables,
             .LslFast,
+            .Lse,
+            .Perfmon,
+            .Dotprod,
+            .Lor,
+            .FuseArithLogic,
+            .Crc,
+            .CustomCheapAsMove,
             .FuseAddress,
             .ZczGp,
-            .Ras,
-            .FuseCsel,
-            .ArithCbzFusion,
-            .FuseAes,
             .FpArmv8,
-            .Crc,
-            .Dotprod,
-            .Vh,
+            .FuseAes,
             .Exynosm4,
-        },
-        CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Falkor, "falkor", &[_]FeatureType {
             .ZczFp,
             .Rdm,
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
+            .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .ZczGp,
+            .FpArmv8,
             .SlowStrqroStore,
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
             .LslFast,
-            .UsePostraScheduler,
-            .ZczGp,
-            .CustomCheapAsMove,
-            .PredictableSelectExpensive,
             .Falkor,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
             .Trbe,
             .Ete,
             .FpArmv8,
@@ -332,149 +332,149 @@ pub const AArch64Cpu = enum {
             .Neon,
             .Perfmon,
             .UsePostraScheduler,
-        },
-        CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
             .ZczFp,
             .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .LslFast,
             .UsePostraScheduler,
-            .ZczGp,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .ZczGp,
+            .FpArmv8,
+            .LslFast,
             .Kryo,
-        },
-        CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
+        }),
+        CpuInfo(@This(), FeatureType).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
             .Neoversee1,
-        },
-        CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
-            .Rcpc,
+        }),
+        CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
+            .Lse,
             .Spe,
-            .Ccpp,
-            .Pan,
+            .Vh,
             .Rdm,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
             .Neoversen1,
-        },
-        CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Saphira, "saphira", &[_]FeatureType {
+            .Spe,
+            .Vh,
             .ZczFp,
-            .Nv,
+            .Rdm,
+            .UsePostraScheduler,
+            .Dit,
             .Am,
-            .Lse,
+            .Ras,
+            .Rcpc,
             .Sel2,
-            .Lor,
-            .Tracev84,
-            .Uaops,
-            .UsePostraScheduler,
-            .CustomCheapAsMove,
             .Ccpp,
-            .Perfmon,
-            .TlbRmi,
-            .PredictableSelectExpensive,
-            .Fmi,
-            .Rcpc,
-            .Pan,
-            .Rdm,
-            .LslFast,
             .Pa,
-            .ZczGp,
-            .Dit,
-            .Ras,
-            .Spe,
+            .Pan,
+            .Uaops,
+            .Tracev84,
             .Mpam,
-            .FpArmv8,
+            .LslFast,
+            .Lse,
+            .Nv,
+            .Perfmon,
+            .Dotprod,
+            .TlbRmi,
+            .Lor,
             .Ccidx,
-            .Dotprod,
+            .PredictableSelectExpensive,
             .Crc,
-            .Vh,
+            .CustomCheapAsMove,
+            .Fmi,
+            .ZczGp,
+            .FpArmv8,
             .Saphira,
-        },
-        CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Thunderx, "thunderx", &[_]FeatureType {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
             .Thunderx,
-        },
-        CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
-            .Pan,
-            .Rdm,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
+            .Lse,
+            .ArithBccFusion,
             .Vh,
+            .Rdm,
+            .UsePostraScheduler,
+            .Crc,
+            .Lor,
+            .Pan,
             .AggressiveFma,
             .FpArmv8,
-            .Lse,
-            .Crc,
-            .Lor,
-            .UsePostraScheduler,
-            .ArithBccFusion,
             .PredictableSelectExpensive,
             .Thunderx2t99,
-        },
-        CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
             .Thunderxt81,
-        },
-        CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
             .Thunderxt83,
-        },
-        CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
             .Thunderxt88,
-        },
-        CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType {
-            .Uaops,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tsv110, "tsv110", &[_]FeatureType {
+            .Lse,
             .Spe,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FuseAes,
             .Vh,
+            .Rdm,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .UsePostraScheduler,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
-            .UsePostraScheduler,
+            .Uaops,
             .CustomCheapAsMove,
             .Ras,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
             .Tsv110,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig
index f035e0e368670903adef2ec9aa073e35df7f3a6b..3f05f6033578a4966b2901382ff3de75313898f2 100644
--- a/lib/std/target/cpu/AmdGpuCpu.zig
+++ b/lib/std/target/cpu/AmdGpuCpu.zig
@@ -42,135 +42,135 @@ pub const AmdGpuCpu = enum {
     Tonga,
     Verde,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.AmdGpuFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.AmdGpuFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Bonaire, "bonaire", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Carrizo, "carrizo", &[_]FeatureType {
             .CodeObjectV3,
             .FastFmaf,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
             .Xnack,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Fiji, "fiji", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
             .Wavefrontsize64,
-        },
-        CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
             .FlatAddressSpace,
             .Wavefrontsize64,
-        },
-        CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx1010, "gfx1010", &[_]FeatureType {
             .CodeObjectV3,
             .DlInsts,
             .NoXnackSupport,
             .FlatSegmentOffsetBug,
-            .Gfx9Insts,
-            .NoSdstCmpx,
-            .Fp64,
-            .FastFmaf,
-            .Sdwa,
-            .SdwaScalar,
-            .Dpp,
-            .RegisterBanking,
+            .Vscnt,
+            .ApertureRegs,
             .Gfx10Insts,
-            .AddNoCarryInsts,
+            .IntClampInsts,
+            .PkFmacF16Inst,
             .SdwaOmod,
-            .SdwaSdst,
+            .SdwaScalar,
+            .AddNoCarryInsts,
+            .Movrel,
+            .SMemrealtime,
+            .NoSdstCmpx,
+            .CiInsts,
             .FlatAddressSpace,
+            .Sdwa,
+            .NoSramEccSupport,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .RegisterBanking,
+            .Dpp,
+            .Localmemorysize65536,
+            .Vop3p,
+            .BitInsts16,
+            .Dpp8,
             .Gfx8Insts,
+            .Inv2piInlineImm,
+            .Gfx9Insts,
             .FmaMixInsts,
-            .PkFmacF16Inst,
-            .Vop3Literal,
             .MimgR128,
-            .NoSramEccSupport,
-            .IntClampInsts,
-            .Movrel,
-            .Dpp8,
-            .ApertureRegs,
-            .NoDataDepHazard,
-            .CiInsts,
+            .Vop3Literal,
             .FlatGlobalInsts,
-            .BitInsts16,
             .FlatScratchInsts,
-            .SMemrealtime,
-            .Vop3p,
-            .FlatInstOffsets,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
-            .Vscnt,
+            .Fp64,
+            .FastFmaf,
+            .NoDataDepHazard,
             .Gfx10,
             .InstFwdPrefetchBug,
             .Ldsbankcount32,
@@ -187,8 +187,8 @@ pub const AmdGpuCpu = enum {
             .VcmpxExecWarHazard,
             .VcmpxPermlaneHazard,
             .Wavefrontsize32,
-        },
-        CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx1011, "gfx1011", &[_]FeatureType {
             .CodeObjectV3,
             .DlInsts,
             .NoXnackSupport,
@@ -197,40 +197,40 @@ pub const AmdGpuCpu = enum {
             .Dot5Insts,
             .Dot6Insts,
             .FlatSegmentOffsetBug,
-            .Gfx9Insts,
-            .NoSdstCmpx,
-            .Fp64,
-            .FastFmaf,
-            .Sdwa,
-            .SdwaScalar,
-            .Dpp,
-            .RegisterBanking,
+            .Vscnt,
+            .ApertureRegs,
             .Gfx10Insts,
-            .AddNoCarryInsts,
+            .IntClampInsts,
+            .PkFmacF16Inst,
             .SdwaOmod,
-            .SdwaSdst,
+            .SdwaScalar,
+            .AddNoCarryInsts,
+            .Movrel,
+            .SMemrealtime,
+            .NoSdstCmpx,
+            .CiInsts,
             .FlatAddressSpace,
+            .Sdwa,
+            .NoSramEccSupport,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .RegisterBanking,
+            .Dpp,
+            .Localmemorysize65536,
+            .Vop3p,
+            .BitInsts16,
+            .Dpp8,
             .Gfx8Insts,
+            .Inv2piInlineImm,
+            .Gfx9Insts,
             .FmaMixInsts,
-            .PkFmacF16Inst,
-            .Vop3Literal,
             .MimgR128,
-            .NoSramEccSupport,
-            .IntClampInsts,
-            .Movrel,
-            .Dpp8,
-            .ApertureRegs,
-            .NoDataDepHazard,
-            .CiInsts,
+            .Vop3Literal,
             .FlatGlobalInsts,
-            .BitInsts16,
             .FlatScratchInsts,
-            .SMemrealtime,
-            .Vop3p,
-            .FlatInstOffsets,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
-            .Vscnt,
+            .Fp64,
+            .FastFmaf,
+            .NoDataDepHazard,
             .Gfx10,
             .InstFwdPrefetchBug,
             .Ldsbankcount32,
@@ -246,8 +246,8 @@ pub const AmdGpuCpu = enum {
             .VcmpxExecWarHazard,
             .VcmpxPermlaneHazard,
             .Wavefrontsize32,
-        },
-        CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx1012, "gfx1012", &[_]FeatureType {
             .CodeObjectV3,
             .DlInsts,
             .NoXnackSupport,
@@ -256,40 +256,40 @@ pub const AmdGpuCpu = enum {
             .Dot5Insts,
             .Dot6Insts,
             .FlatSegmentOffsetBug,
-            .Gfx9Insts,
-            .NoSdstCmpx,
-            .Fp64,
-            .FastFmaf,
-            .Sdwa,
-            .SdwaScalar,
-            .Dpp,
-            .RegisterBanking,
+            .Vscnt,
+            .ApertureRegs,
             .Gfx10Insts,
-            .AddNoCarryInsts,
+            .IntClampInsts,
+            .PkFmacF16Inst,
             .SdwaOmod,
-            .SdwaSdst,
+            .SdwaScalar,
+            .AddNoCarryInsts,
+            .Movrel,
+            .SMemrealtime,
+            .NoSdstCmpx,
+            .CiInsts,
             .FlatAddressSpace,
+            .Sdwa,
+            .NoSramEccSupport,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .RegisterBanking,
+            .Dpp,
+            .Localmemorysize65536,
+            .Vop3p,
+            .BitInsts16,
+            .Dpp8,
             .Gfx8Insts,
+            .Inv2piInlineImm,
+            .Gfx9Insts,
             .FmaMixInsts,
-            .PkFmacF16Inst,
-            .Vop3Literal,
             .MimgR128,
-            .NoSramEccSupport,
-            .IntClampInsts,
-            .Movrel,
-            .Dpp8,
-            .ApertureRegs,
-            .NoDataDepHazard,
-            .CiInsts,
+            .Vop3Literal,
             .FlatGlobalInsts,
-            .BitInsts16,
             .FlatScratchInsts,
-            .SMemrealtime,
-            .Vop3p,
-            .FlatInstOffsets,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
-            .Vscnt,
+            .Fp64,
+            .FastFmaf,
+            .NoDataDepHazard,
             .Gfx10,
             .InstFwdPrefetchBug,
             .Ldsbankcount32,
@@ -306,392 +306,392 @@ pub const AmdGpuCpu = enum {
             .VcmpxExecWarHazard,
             .VcmpxPermlaneHazard,
             .Wavefrontsize32,
-        },
-        CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx600, "gfx600", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .FastFmaf,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx601, "gfx601", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
-        },
-        CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx700, "gfx700", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx701, "gfx701", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .FastFmaf,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx702, "gfx702", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .FastFmaf,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx703, "gfx703", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx704, "gfx704", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx801, "gfx801", &[_]FeatureType {
             .CodeObjectV3,
             .FastFmaf,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
             .Xnack,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx802, "gfx802", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .SgprInitBug,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx803, "gfx803", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx810, "gfx810", &[_]FeatureType {
             .CodeObjectV3,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
+            .CiInsts,
+            .FlatAddressSpace,
             .Sdwa,
-            .VgprIndexMode,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .ScalarStores,
+            .Gfx7Gfx8Gfx9Insts,
             .Dpp,
-            .FlatAddressSpace,
+            .Localmemorysize65536,
+            .BitInsts16,
+            .VgprIndexMode,
             .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
+            .Inv2piInlineImm,
             .MimgR128,
-            .NoSramEccSupport,
-            .IntClampInsts,
-            .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
-            .BitInsts16,
-            .SMemrealtime,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
             .Xnack,
-        },
-        CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx900, "gfx900", &[_]FeatureType {
             .CodeObjectV3,
             .NoSramEccSupport,
             .NoXnackSupport,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
             .MadMixInsts,
-        },
-        CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx902, "gfx902", &[_]FeatureType {
             .CodeObjectV3,
             .NoSramEccSupport,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
             .MadMixInsts,
             .Xnack,
-        },
-        CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx904, "gfx904", &[_]FeatureType {
             .CodeObjectV3,
             .NoSramEccSupport,
             .NoXnackSupport,
             .FmaMixInsts,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
-        },
-        CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx906, "gfx906", &[_]FeatureType {
             .CodeObjectV3,
             .DlInsts,
             .NoXnackSupport,
             .Dot1Insts,
             .Dot2Insts,
             .FmaMixInsts,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx908, "gfx908", &[_]FeatureType {
             .AtomicFaddInsts,
             .CodeObjectV3,
             .DlInsts,
@@ -702,36 +702,36 @@ pub const AmdGpuCpu = enum {
             .Dot5Insts,
             .Dot6Insts,
             .FmaMixInsts,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
             .MaiInsts,
@@ -739,322 +739,322 @@ pub const AmdGpuCpu = enum {
             .PkFmacF16Inst,
             .SramEcc,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gfx909, "gfx909", &[_]FeatureType {
             .CodeObjectV3,
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
+            .Dpp,
+            .Localmemorysize65536,
+            .Vop3p,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
+            .Inv2piInlineImm,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
             .FlatGlobalInsts,
-            .BitInsts16,
             .FlatScratchInsts,
-            .SMemrealtime,
-            .Vop3p,
-            .FlatInstOffsets,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Fp64,
+            .FastFmaf,
             .Gfx9,
             .Ldsbankcount32,
             .MadMixInsts,
             .Xnack,
-        },
-        CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hainan, "hainan", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
-        },
-        CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hawaii, "hawaii", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .FastFmaf,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Iceland, "iceland", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .SgprInitBug,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Kabini, "kabini", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Kaveri, "kaveri", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mullins, "mullins", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
             .SeaIslands,
-        },
-        CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Oland, "oland", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
-        },
-        CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pitcairn, "pitcairn", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
-        },
-        CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Polaris10, "polaris10", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Polaris11, "polaris11", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Stoney, "stoney", &[_]FeatureType {
             .CodeObjectV3,
             .Ldsbankcount16,
-            .Wavefrontsize64,
-            .Fp64,
+            .IntClampInsts,
+            .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
             .Gcn3Encoding,
             .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
+            .CiInsts,
             .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
+            .Sdwa,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .IntClampInsts,
             .ScalarStores,
-            .Movrel,
-            .SdwaMav,
-            .CiInsts,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
             .Xnack,
-        },
-        CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tahiti, "tahiti", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .FastFmaf,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
             .HalfRate64Ops,
-        },
-        CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tonga, "tonga", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
             .SgprInitBug,
             .UnpackedD16Vmem,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
-            .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
-            .NoSramEccSupport,
             .IntClampInsts,
-            .ScalarStores,
-            .Movrel,
             .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .TrigReducedRange,
             .CiInsts,
+            .FlatAddressSpace,
+            .Sdwa,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .ScalarStores,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
             .VolcanicIslands,
-        },
-        CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Verde, "verde", &[_]FeatureType {
             .CodeObjectV3,
             .NoXnackSupport,
             .Ldsbankcount32,
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
             .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize32768,
             .SouthernIslands,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig
index 5e60628d48177d300248ecdc3b2172763e6ac907..bb5179464495be7269191ad2161a59d4cc275dfe 100644
--- a/lib/std/target/cpu/ArmCpu.zig
+++ b/lib/std/target/cpu/ArmCpu.zig
@@ -86,154 +86,154 @@ pub const ArmCpu = enum {
     Swift,
     Xscale,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.ArmFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.ArmFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Arm1020e, "arm1020e", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1020t, "arm1020t", &[_]FeatureType {
             .V4t,
             .Armv5t,
-        },
-        CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1022e, "arm1022e", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm10e, "arm10e", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
             .V4t,
             .Armv5t,
-        },
-        CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
             .V4t,
             .Dsp,
             .Armv6,
-        },
-        CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
             .V4t,
             .Dsp,
             .Armv6,
             .Slowfpvmlx,
             .Fpregs,
             .Vfp2,
-        },
-        CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
             .V4t,
+            .Thumb2,
             .Dsp,
             .Armv6t2,
-        },
-        CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
             .V4t,
+            .Thumb2,
             .Dsp,
             .Armv6t2,
             .Slowfpvmlx,
             .Fpregs,
             .Vfp2,
-        },
-        CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
             .V4t,
             .Trustzone,
             .Armv6kz,
-        },
-        CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
             .V4t,
             .Trustzone,
             .Armv6kz,
-        },
-        CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
             .V4t,
             .Trustzone,
             .Armv6kz,
             .Slowfpvmlx,
             .Fpregs,
             .Vfp2,
-        },
-        CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm710t, "arm710t", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm720t, "arm720t", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm8, "arm8", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm810, "arm810", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm9, "arm9", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm920, "arm920", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm920t, "arm920t", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm922t, "arm922t", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm940t, "arm940t", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm9e, "arm9e", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA12, "cortex-a12", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidPartialCpsr,
@@ -247,16 +247,16 @@ pub const ArmCpu = enum {
             .Hwdiv,
             .Virtualization,
             .A12,
-        },
-        CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA15, "cortex-a15", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidPartialCpsr,
@@ -273,16 +273,16 @@ pub const ArmCpu = enum {
             .Hwdiv,
             .Virtualization,
             .A15,
-        },
-        CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA17, "cortex-a17", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidPartialCpsr,
@@ -296,57 +296,57 @@ pub const ArmCpu = enum {
             .Hwdiv,
             .Virtualization,
             .A17,
-        },
-        CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA32, "cortex-a32", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
-        },
-        CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
             .A35,
-        },
-        CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA5, "cortex-a5", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .RetAddrStack,
@@ -358,84 +358,84 @@ pub const ArmCpu = enum {
             .Vfp4,
             .VmlxForwarding,
             .A5,
-        },
-        CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
             .Fpao,
             .A53,
-        },
-        CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Dotprod,
             .A55,
-        },
-        CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .AvoidPartialCpsr,
             .CheapPredicableCpsr,
             .Crypto,
             .Fpao,
             .A57,
-        },
-        CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA7, "cortex-a7", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .RetAddrStack,
@@ -451,128 +451,128 @@ pub const ArmCpu = enum {
             .Hwdiv,
             .Virtualization,
             .A7,
-        },
-        CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
             .A72,
-        },
-        CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
             .A73,
-        },
-        CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Dotprod,
             .A75,
-        },
-        CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Crypto,
             .Dotprod,
             .Fullfp16,
             .A76,
-        },
-        CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Crypto,
             .Dotprod,
             .Fullfp16,
             .A76,
-        },
-        CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA8, "cortex-a8", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .RetAddrStack,
@@ -583,16 +583,16 @@ pub const ArmCpu = enum {
             .Trustzone,
             .VmlxForwarding,
             .A8,
-        },
-        CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexA9, "cortex-a9", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidPartialCpsr,
@@ -608,171 +608,171 @@ pub const ArmCpu = enum {
             .Trustzone,
             .VmlxForwarding,
             .A9,
-        },
-        CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType {
-            .Mclass,
-            .StrictAlign,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM0, "cortex-m0", &[_]FeatureType {
+            .V4t,
             .ThumbMode,
             .Db,
-            .V4t,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
             .Armv6M,
-        },
-        CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
-            .Mclass,
-            .StrictAlign,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
+            .V4t,
             .ThumbMode,
             .Db,
-            .V4t,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
             .Armv6M,
-        },
-        CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType {
-            .Mclass,
-            .StrictAlign,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM1, "cortex-m1", &[_]FeatureType {
+            .V4t,
             .ThumbMode,
             .Db,
-            .V4t,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
             .Armv6M,
-        },
-        CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType {
-            .Mclass,
-            .StrictAlign,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM23, "cortex-m23", &[_]FeatureType {
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Db,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
             .AcquireRelease,
+            .Hwdiv,
             .Armv8Mbase,
             .NoMovt,
-        },
-        CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM3, "cortex-m3", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
             .Armv7M,
             .NoBranchPredictor,
             .LoopAlign,
             .UseAa,
             .UseMisched,
             .M3,
-        },
-        CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM33, "cortex-m33", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
             .AcquireRelease,
+            .Hwdiv,
             .Armv8Mmain,
             .Dsp,
-            .Fp16,
             .Fpregs,
+            .Fp16,
             .FpArmv8d16sp,
             .NoBranchPredictor,
             .Slowfpvmlx,
             .LoopAlign,
             .UseAa,
             .UseMisched,
-        },
-        CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
             .AcquireRelease,
+            .Hwdiv,
             .Armv8Mmain,
             .Dsp,
-            .Fp16,
             .Fpregs,
+            .Fp16,
             .FpArmv8d16sp,
             .NoBranchPredictor,
             .Slowfpvmlx,
             .LoopAlign,
             .UseAa,
             .UseMisched,
-        },
-        CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM4, "cortex-m4", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
-            .Dsp,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Dsp,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
             .Armv7eM,
             .NoBranchPredictor,
             .Slowfpvmlx,
             .LoopAlign,
             .UseAa,
             .UseMisched,
-            .Fp16,
             .Fpregs,
+            .Fp16,
             .Vfp4d16sp,
-        },
-        CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexM7, "cortex-m7", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
-            .Dsp,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Dsp,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
             .Armv7eM,
-            .Fp16,
             .Fpregs,
+            .Fp16,
             .FpArmv8d16,
-        },
-        CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR4, "cortex-r4", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .Rclass,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Hwdiv,
+            .Rclass,
             .Armv7R,
             .AvoidPartialCpsr,
             .RetAddrStack,
             .R4,
-        },
-        CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .Rclass,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Hwdiv,
+            .Rclass,
             .Armv7R,
             .AvoidPartialCpsr,
             .RetAddrStack,
@@ -781,16 +781,16 @@ pub const ArmCpu = enum {
             .Fpregs,
             .Vfp3d16,
             .R4,
-        },
-        CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR5, "cortex-r5", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .Rclass,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Hwdiv,
+            .Rclass,
             .Armv7R,
             .AvoidPartialCpsr,
             .HwdivArm,
@@ -800,39 +800,39 @@ pub const ArmCpu = enum {
             .Fpregs,
             .Vfp3d16,
             .R5,
-        },
-        CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR52, "cortex-r52", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
             .Crc,
-            .Fp16,
+            .Fpregs,
+            .Mp,
             .Dfb,
             .Dsp,
-            .Rclass,
-            .V7clrex,
+            .Fp16,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .Db,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Rclass,
             .Armv8R,
             .Fpao,
             .UseAa,
             .UseMisched,
             .R52,
-        },
-        CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR7, "cortex-r7", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .Rclass,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Hwdiv,
+            .Rclass,
             .Armv7R,
             .AvoidPartialCpsr,
             .Fp16,
@@ -844,16 +844,16 @@ pub const ArmCpu = enum {
             .Fpregs,
             .Vfp3d16,
             .R7,
-        },
-        CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.CortexR8, "cortex-r8", &[_]FeatureType {
             .Perfmon,
-            .Db,
+            .V4t,
+            .V7clrex,
             .Dsp,
+            .Thumb2,
+            .Db,
+            .Hwdiv,
             .Rclass,
-            .V7clrex,
-            .V4t,
-            .Hwdiv,
             .Armv7R,
             .AvoidPartialCpsr,
             .Fp16,
@@ -864,24 +864,24 @@ pub const ArmCpu = enum {
             .SlowFpBrcc,
             .Fpregs,
             .Vfp3d16,
-        },
-        CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .AvoidMovsShop,
             .AvoidPartialCpsr,
@@ -894,197 +894,197 @@ pub const ArmCpu = enum {
             .Vfp4,
             .Zcz,
             .Swift,
-        },
-        CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ep9312, "ep9312", &[_]FeatureType {
             .V4t,
             .Armv4t,
-        },
-        CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
-            .Zcz,
-            .SlowVdup32,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
             .ExpandFpMlx,
-            .RetAddrStack,
-            .UseAa,
             .Exynos,
-        },
-        CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
-            .Zcz,
-            .SlowVdup32,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
             .ExpandFpMlx,
-            .RetAddrStack,
-            .UseAa,
             .Exynos,
-        },
-        CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
-            .Zcz,
-            .SlowVdup32,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
             .ExpandFpMlx,
-            .RetAddrStack,
-            .UseAa,
             .Exynos,
-        },
-        CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Dotprod,
             .Fullfp16,
-            .Zcz,
-            .SlowVdup32,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
             .ExpandFpMlx,
-            .RetAddrStack,
-            .UseAa,
             .Exynos,
-        },
-        CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Dotprod,
             .Fullfp16,
-            .Zcz,
-            .SlowVdup32,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
             .ExpandFpMlx,
-            .RetAddrStack,
-            .UseAa,
             .Exynos,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
-        CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Krait, "krait", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidPartialCpsr,
@@ -1097,107 +1097,107 @@ pub const ArmCpu = enum {
             .Vfp4,
             .VmlxForwarding,
             .Krait,
-        },
-        CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv8A,
             .Crypto,
             .Kryo,
-        },
-        CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mpcore, "mpcore", &[_]FeatureType {
             .V4t,
             .Armv6k,
             .Slowfpvmlx,
             .Fpregs,
             .Vfp2,
-        },
-        CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
             .V4t,
             .Armv6k,
-        },
-        CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
-            .Thumb2,
-            .Mp,
+        }),
+        CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
             .Armv82A,
             .Crypto,
             .Dotprod,
-        },
-        CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType {
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sc000, "sc000", &[_]FeatureType {
+            .V4t,
+            .ThumbMode,
+            .Db,
             .StrictAlign,
-            .ThumbMode,
-            .Db,
-            .V4t,
+            .Mclass,
             .Noarm,
             .Armv6M,
-        },
-        CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType {
-            .Thumb2,
-            .Mclass,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sc300, "sc300", &[_]FeatureType {
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
             .Armv7M,
             .NoBranchPredictor,
             .UseAa,
             .UseMisched,
             .M3,
-        },
-        CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Strongarm, "strongarm", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Strongarm110, "strongarm110", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
             .Armv4,
-        },
-        CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType {
-            .Thumb2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Swift, "swift", &[_]FeatureType {
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
             .Armv7A,
             .AvoidMovsShop,
@@ -1221,10 +1221,10 @@ pub const ArmCpu = enum {
             .Fp16,
             .Vfp4,
             .Swift,
-        },
-        CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Xscale, "xscale", &[_]FeatureType {
             .V4t,
             .Armv5te,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig
index 529152899b222a49092aa6e5bb8188808fe518c5..812554134bc274b4e76698160bceb6b50d472ce4 100644
--- a/lib/std/target/cpu/AvrCpu.zig
+++ b/lib/std/target/cpu/AvrCpu.zig
@@ -260,3604 +260,3604 @@ pub const AvrCpu = enum {
     Avrxmega7,
     M3000,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.AvrFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.AvrFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.At43usb320, "at43usb320", &[_]FeatureType {
+            .Lpm,
             .Elpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr31,
-        },
-        CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr31,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At43usb355, "at43usb355", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr3,
-        },
-        CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr3,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At76c711, "at76c711", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr3,
-        },
-        CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr3,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At86rf401, "at86rf401", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr2,
             .Lpmx,
             .Movw,
-        },
-        CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90c8534, "at90c8534", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90can128, "at90can128", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90can32, "at90can32", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90can64, "at90can64", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
             .Avr4,
-        },
-        CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s1200, "at90s1200", &[_]FeatureType {
             .Avr0,
-        },
-        CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s2313, "at90s2313", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s2323, "at90s2323", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s2333, "at90s2333", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s2343, "at90s2343", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s4414, "at90s4414", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s4433, "at90s4433", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s4434, "at90s4434", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s8515, "at90s8515", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90s8535, "at90s8535", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType {
             .Ijmpcall,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90scr100, "at90scr100", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb162, "at90usb162", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb646, "at90usb646", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb647, "at90usb647", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At90usb82, "at90usb82", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.At94k, "at94k", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr3,
             .Lpmx,
             .Movw,
             .Mul,
-        },
-        CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata5272, "ata5272", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata5505, "ata5505", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata5790, "ata5790", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata5795, "ata5795", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata6285, "ata6285", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata6286, "ata6286", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ata6289, "ata6289", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega103, "atmega103", &[_]FeatureType {
+            .Lpm,
             .Elpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr31,
-        },
-        CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Avr31,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega128, "atmega128", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega1280, "atmega1280", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega1281, "atmega1281", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega1284, "atmega1284", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
             .Lpmx,
+            .Ijmpcall,
+            .Break,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega128a, "atmega128a", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16, "atmega16", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega161, "atmega161", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr3,
             .Lpmx,
             .Movw,
             .Mul,
             .Spm,
-        },
-        CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega162, "atmega162", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega163, "atmega163", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr3,
             .Lpmx,
             .Movw,
             .Mul,
             .Spm,
-        },
-        CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega164a, "atmega164a", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega164p, "atmega164p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega165, "atmega165", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega165a, "atmega165a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega165p, "atmega165p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega168, "atmega168", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega168a, "atmega168a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega168p, "atmega168p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega169, "atmega169", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega169a, "atmega169a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega169p, "atmega169p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16a, "atmega16a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega2560, "atmega2560", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr6,
-        },
-        CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr6,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega2561, "atmega2561", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr6,
-        },
-        CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr6,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr6,
-        },
-        CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr6,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr6,
-        },
-        CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr6,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32, "atmega32", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega323, "atmega323", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega324a, "atmega324a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega324p, "atmega324p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega325, "atmega325", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3250, "atmega3250", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega325a, "atmega325a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega325p, "atmega325p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega328, "atmega328", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega328p, "atmega328p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega329, "atmega329", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3290, "atmega3290", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega329a, "atmega329a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega329p, "atmega329p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32a, "atmega32a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega406, "atmega406", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega48, "atmega48", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega48a, "atmega48a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega48p, "atmega48p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64, "atmega64", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega640, "atmega640", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega644, "atmega644", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega644a, "atmega644a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega644p, "atmega644p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega645, "atmega645", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6450, "atmega6450", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega645a, "atmega645a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega645p, "atmega645p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega649, "atmega649", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6490, "atmega6490", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega649a, "atmega649a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega649p, "atmega649p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64a, "atmega64a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8, "atmega8", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8515, "atmega8515", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr2,
             .Lpmx,
             .Movw,
             .Mul,
             .Spm,
-        },
-        CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8535, "atmega8535", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr2,
             .Lpmx,
             .Movw,
             .Mul,
             .Spm,
-        },
-        CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega88, "atmega88", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega88a, "atmega88a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega88p, "atmega88p", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8a, "atmega8a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType {
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Tinyencoding,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny10, "attiny10", &[_]FeatureType {
             .Avr0,
             .Sram,
-            .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType {
             .Break,
             .Tinyencoding,
+            .Avrtiny,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny102, "attiny102", &[_]FeatureType {
             .Avr0,
             .Sram,
-            .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType {
             .Break,
             .Tinyencoding,
+            .Avrtiny,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny104, "attiny104", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType {
-            .Lpm,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny11, "attiny11", &[_]FeatureType {
             .Avr0,
-            .Avr1,
-        },
-        CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType {
             .Lpm,
+            .Avr1,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny12, "attiny12", &[_]FeatureType {
             .Avr0,
+            .Lpm,
             .Avr1,
-        },
-        CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny13, "attiny13", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny13a, "attiny13a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
             .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType {
-            .Lpm,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny15, "attiny15", &[_]FeatureType {
             .Avr0,
+            .Lpm,
             .Avr1,
-        },
-        CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny1634, "attiny1634", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny167, "attiny167", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType {
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Tinyencoding,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny20, "attiny20", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny22, "attiny22", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType {
             .Ijmpcall,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny2313, "attiny2313", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny24, "attiny24", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny24a, "attiny24a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny25, "attiny25", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny26, "attiny26", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
             .Avr2,
             .Lpmx,
-        },
-        CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny261, "attiny261", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny261a, "attiny261a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
             .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType {
-            .Lpm,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny28, "attiny28", &[_]FeatureType {
             .Avr0,
+            .Lpm,
             .Avr1,
-        },
-        CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType {
-            .Break,
-            .Tinyencoding,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny4, "attiny4", &[_]FeatureType {
             .Avr0,
             .Sram,
-            .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType {
             .Break,
             .Tinyencoding,
+            .Avrtiny,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny40, "attiny40", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny4313, "attiny4313", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny43u, "attiny43u", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny44, "attiny44", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny44a, "attiny44a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny45, "attiny45", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny461, "attiny461", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny461a, "attiny461a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny48, "attiny48", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType {
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Tinyencoding,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny5, "attiny5", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType {
-            .Ijmpcall,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny828, "attiny828", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny84, "attiny84", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny84a, "attiny84a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny85, "attiny85", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny861, "attiny861", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny861a, "attiny861a", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny87, "attiny87", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Sram,
             .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny88, "attiny88", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType {
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Tinyencoding,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Attiny9, "attiny9", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
-            .Avr0,
-            .Jmpcall,
-            .Addsubiw,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
             .Lpm,
-            .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
             .Spmx,
-            .Avr0,
-            .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
             .Mul,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
             .Lpmx,
-            .Spmx,
-            .Avr0,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpm,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
-            .Avr0,
-            .Jmpcall,
-            .Addsubiw,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
             .Lpm,
-            .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
             .Spmx,
-            .Avr0,
-            .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
             .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
             .Lpmx,
-            .Spmx,
-            .Avr0,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpm,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
-            .Avr0,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
             .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
-            .Spm,
-            .Elpm,
-            .Lpmx,
             .Spmx,
-            .Avr0,
-            .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
-            .Addsubiw,
-            .Lpm,
-            .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
+            .Lpmx,
             .Rmw,
-            .Sram,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmegau,
-        },
-        CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmegau,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
+            .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
+            .Elpmx,
+            .Spm,
+            .Avr0,
+            .Sram,
+            .Jmpcall,
             .Eijmpcall,
+            .Spmx,
+            .Addsubiw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Des,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
+            .Ijmpcall,
+            .Break,
             .Xmega,
-        },
-        CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType {
-            .Lpm,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr1, "avr1", &[_]FeatureType {
             .Avr0,
+            .Lpm,
             .Avr1,
-        },
-        CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType {
-            .Ijmpcall,
-            .Sram,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr2, "avr2", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr2,
-        },
-        CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType {
             .Ijmpcall,
+            .Avr2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr25, "avr25", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr25,
-        },
-        CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Sram,
+            .Break,
+            .Avr25,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr3, "avr3", &[_]FeatureType {
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr3,
-        },
-        CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType {
             .Ijmpcall,
-            .Sram,
+            .Avr3,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr31, "avr31", &[_]FeatureType {
+            .Lpm,
             .Elpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr31,
-        },
-        CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType {
             .Ijmpcall,
+            .Avr31,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr35, "avr35", &[_]FeatureType {
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr35,
-        },
-        CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType {
+            .Lpmx,
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Avr35,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr4, "avr4", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
-            .Avr4,
-        },
-        CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType {
-            .Ijmpcall,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
+            .Avr4,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr5, "avr5", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr5,
-        },
-        CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr5,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr51, "avr51", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr51,
-        },
-        CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
-            .Movw,
             .Mul,
-            .Sram,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Spm,
+            .Avr51,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avr6, "avr6", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
-            .Avr6,
-        },
-        CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType {
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
             .Break,
-            .Tinyencoding,
+            .Avr6,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrtiny, "avrtiny", &[_]FeatureType {
             .Avr0,
             .Sram,
+            .Break,
+            .Tinyencoding,
             .Avrtiny,
-        },
-        CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
-            .Ijmpcall,
-            .Elpmx,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
             .Ijmpcall,
-            .Elpmx,
-            .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
             .Break,
-            .Spm,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
+            .Lpm,
             .Elpm,
-            .Lpmx,
-            .Spmx,
+            .Movw,
+            .Elpmx,
+            .Spm,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
-            .Xmega,
-        },
-        CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType {
             .Ijmpcall,
-            .Movw,
-            .Mul,
-            .Sram,
             .Break,
+            .Xmega,
+        }),
+        CpuInfo(@This(), FeatureType).create(.M3000, "m3000", &[_]FeatureType {
+            .Lpm,
+            .Movw,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
             .Avr5,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig
index f53b00a915e3fcdb0359c1f80dca812399396eeb..2faecd08bd238da0816b19c1dce8829c434cd82c 100644
--- a/lib/std/target/cpu/BpfCpu.zig
+++ b/lib/std/target/cpu/BpfCpu.zig
@@ -8,22 +8,22 @@ pub const BpfCpu = enum {
     V2,
     V3,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.BpfFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.BpfFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType {
-        },
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Probe, "probe", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V1, "v1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V2, "v2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V3, "v3", &[_]FeatureType {
+        }),
     };
 };
diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig
index fc0449cb3b27468bea4d7a797988980cd9dc3ab5..0287eb7acf33ae7e6052dfb7de14aedfb2e63bf7 100644
--- a/lib/std/target/cpu/HexagonCpu.zig
+++ b/lib/std/target/cpu/HexagonCpu.zig
@@ -10,14 +10,14 @@ pub const HexagonCpu = enum {
     Hexagonv65,
     Hexagonv66,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.HexagonFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.HexagonFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
             .V5,
             .V55,
             .V60,
@@ -27,8 +27,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
             .V5,
             .Duplex,
             .Memops,
@@ -36,8 +36,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
             .V5,
             .V55,
             .Duplex,
@@ -46,8 +46,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
             .V5,
             .V55,
             .V60,
@@ -57,8 +57,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
             .V5,
             .V55,
             .V60,
@@ -69,8 +69,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
             .V5,
             .V55,
             .V60,
@@ -83,8 +83,8 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
-        CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
             .V5,
             .V55,
             .V60,
@@ -98,6 +98,6 @@ pub const HexagonCpu = enum {
             .Nvj,
             .Nvs,
             .SmallData,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig
index fc1653d64785c60718b421f53ec867d14c0386c5..2462e6212ce53cb3f9166b5f9bbd03264bc2e276 100644
--- a/lib/std/target/cpu/MipsCpu.zig
+++ b/lib/std/target/cpu/MipsCpu.zig
@@ -20,171 +20,171 @@ pub const MipsCpu = enum {
     Octeon,
     P5600,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.MipsFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.MipsFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Mips1, "mips1", &[_]FeatureType {
             .Mips1,
-        },
-        CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips2, "mips2", &[_]FeatureType {
             .Mips1,
             .Mips2,
-        },
-        CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips3, "mips3", &[_]FeatureType {
             .Mips3_32r2,
-            .Mips1,
+            .Fp64,
             .Gp64,
+            .Mips1,
+            .Mips3_32,
             .Mips3,
-        },
-        CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType {
-            .Mips3_32,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips32, "mips32", &[_]FeatureType {
             .Mips4_32,
             .Mips1,
+            .Mips3_32,
             .Mips32,
-        },
-        CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType {
-            .Mips3_32,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips32r2, "mips32r2", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips4_32r2,
             .Mips3_32r2,
-            .Mips1,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
             .Mips32r2,
-        },
-        CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType {
-            .Mips3_32,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips32r3, "mips32r3", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
             .Mips32r3,
-        },
-        CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType {
-            .Mips3_32,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips32r5, "mips32r5", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
             .Mips32r5,
-        },
-        CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips32r6, "mips32r6", &[_]FeatureType {
+            .Mips5_32r2,
+            .Mips3_32r2,
             .Mips4_32r2,
             .Abs2008,
-            .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Nan2008,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips32r6,
-        },
-        CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips4, "mips4", &[_]FeatureType {
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
+            .Fp64,
             .Gp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips4,
-        },
-        CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips5, "mips5", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips4_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips5,
-        },
-        CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips64, "mips64", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips64,
-        },
-        CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips64r2, "mips64r2", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips64r2,
-        },
-        CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips64r3, "mips64r3", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips64r3,
-        },
-        CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips64r5, "mips64r5", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips64r5,
-        },
-        CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
-            .Abs2008,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mips64r6, "mips64r6", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Nan2008,
+            .Abs2008,
+            .Mips4_32r2,
+            .Fp64,
             .Gp64,
-            .Mips5_32r2,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Mips64r6,
-        },
-        CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.Octeon, "octeon", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
             .Cnmips,
             .Mips64r2,
-        },
-        CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType {
-            .Mips3_32,
-            .Mips4_32r2,
+        }),
+        CpuInfo(@This(), FeatureType).create(.P5600, "p5600", &[_]FeatureType {
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
             .P5600,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig
index e501c71063dc35f839f42eba4afeeac38efab36c..b64e5102a8540d3adf1c0d7edd9c0e094aae2b00 100644
--- a/lib/std/target/cpu/Msp430Cpu.zig
+++ b/lib/std/target/cpu/Msp430Cpu.zig
@@ -6,19 +6,19 @@ pub const Msp430Cpu = enum {
     Msp430,
     Msp430x,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.Msp430Feature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.Msp430Feature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Msp430, "msp430", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Msp430x, "msp430x", &[_]FeatureType {
             .Ext,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig
index 5519bc35cb24f8aafbe2352073d0b9b57f052f6f..03f36e214c3fa1a6e27f9aac98575ad45cce0a08 100644
--- a/lib/std/target/cpu/NvptxCpu.zig
+++ b/lib/std/target/cpu/NvptxCpu.zig
@@ -18,68 +18,68 @@ pub const NvptxCpu = enum {
     Sm_72,
     Sm_75,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.NvptxFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.NvptxFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Sm_20, "sm_20", &[_]FeatureType {
             .Sm_20,
-        },
-        CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_21, "sm_21", &[_]FeatureType {
             .Sm_21,
-        },
-        CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_30, "sm_30", &[_]FeatureType {
             .Sm_30,
-        },
-        CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_32, "sm_32", &[_]FeatureType {
             .Ptx40,
             .Sm_32,
-        },
-        CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_35, "sm_35", &[_]FeatureType {
             .Sm_35,
-        },
-        CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_37, "sm_37", &[_]FeatureType {
             .Ptx41,
             .Sm_37,
-        },
-        CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_50, "sm_50", &[_]FeatureType {
             .Ptx40,
             .Sm_50,
-        },
-        CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_52, "sm_52", &[_]FeatureType {
             .Ptx41,
             .Sm_52,
-        },
-        CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_53, "sm_53", &[_]FeatureType {
             .Ptx42,
             .Sm_53,
-        },
-        CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_60, "sm_60", &[_]FeatureType {
             .Ptx50,
             .Sm_60,
-        },
-        CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_61, "sm_61", &[_]FeatureType {
             .Ptx50,
             .Sm_61,
-        },
-        CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_62, "sm_62", &[_]FeatureType {
             .Ptx50,
             .Sm_62,
-        },
-        CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_70, "sm_70", &[_]FeatureType {
             .Ptx60,
             .Sm_70,
-        },
-        CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_72, "sm_72", &[_]FeatureType {
             .Ptx61,
             .Sm_72,
-        },
-        CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sm_75, "sm_75", &[_]FeatureType {
             .Ptx63,
             .Sm_75,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig
index 8b6deb3222db7df33f9ade0e54bf0ae640010910..7e34cf52cb08d3a269cb9020849a563207ad09d6 100644
--- a/lib/std/target/cpu/PowerPcCpu.zig
+++ b/lib/std/target/cpu/PowerPcCpu.zig
@@ -2,20 +2,20 @@ const feature = @import("std").target.feature;
 const CpuInfo = @import("std").target.cpu.CpuInfo;
 
 pub const PowerPcCpu = enum {
-    440,
-    450,
-    601,
-    602,
-    603,
+    Cpu440,
+    Cpu450,
+    Cpu601,
+    Cpu602,
+    Cpu603,
     E603,
     Ev603,
-    604,
+    Cpu604,
     E604,
-    620,
-    7400,
-    7450,
-    750,
-    970,
+    Cpu620,
+    Cpu7400,
+    Cpu7450,
+    Cpu750,
+    Cpu970,
     A2,
     A2q,
     E500,
@@ -23,7 +23,7 @@ pub const PowerPcCpu = enum {
     E5500,
     G3,
     G4,
-    G4+,
+    G4plus,
     G5,
     Generic,
     Ppc,
@@ -40,14 +40,14 @@ pub const PowerPcCpu = enum {
     Pwr8,
     Pwr9,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.PowerPcFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.PowerPcFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.440, "440", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Cpu440, "440", &[_]FeatureType {
             .Icbt,
             .Booke,
             .HardFloat,
@@ -55,8 +55,8 @@ pub const PowerPcCpu = enum {
             .Frsqrte,
             .Isel,
             .Msync,
-        },
-        CpuInfo(@This()).create(.450, "450", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu450, "450", &[_]FeatureType {
             .Icbt,
             .Booke,
             .HardFloat,
@@ -64,63 +64,63 @@ pub const PowerPcCpu = enum {
             .Frsqrte,
             .Isel,
             .Msync,
-        },
-        CpuInfo(@This()).create(.601, "601", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu601, "601", &[_]FeatureType {
             .HardFloat,
             .Fpu,
-        },
-        CpuInfo(@This()).create(.602, "602", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu602, "602", &[_]FeatureType {
             .HardFloat,
             .Fpu,
-        },
-        CpuInfo(@This()).create(.603, "603", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu603, "603", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.E603, "603e", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ev603, "603ev", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.604, "604", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu604, "604", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.E604, "604e", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.620, "620", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu620, "620", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu7400, "7400", &[_]FeatureType {
             .HardFloat,
             .Altivec,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu7450, "7450", &[_]FeatureType {
             .HardFloat,
             .Altivec,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.750, "750", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu750, "750", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.970, "970", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cpu970, "970", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -129,8 +129,8 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.A2, "a2", &[_]FeatureType {
             .Bit64,
             .Icbt,
             .Booke,
@@ -151,8 +151,8 @@ pub const PowerPcCpu = enum {
             .Recipprec,
             .Stfiwx,
             .SlowPopcntd,
-        },
-        CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.A2q, "a2q", &[_]FeatureType {
             .Bit64,
             .Icbt,
             .Booke,
@@ -174,20 +174,20 @@ pub const PowerPcCpu = enum {
             .Recipprec,
             .Stfiwx,
             .SlowPopcntd,
-        },
-        CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.E500, "e500", &[_]FeatureType {
             .Icbt,
             .Booke,
             .Isel,
-        },
-        CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.E500mc, "e500mc", &[_]FeatureType {
             .Icbt,
             .Booke,
             .Isel,
             .HardFloat,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.E5500, "e5500", &[_]FeatureType {
             .Bit64,
             .Icbt,
             .Booke,
@@ -195,25 +195,25 @@ pub const PowerPcCpu = enum {
             .Mfocrf,
             .HardFloat,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.G3, "g3", &[_]FeatureType {
             .HardFloat,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.G4, "g4", &[_]FeatureType {
             .HardFloat,
             .Altivec,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.G4plus, "g4+", &[_]FeatureType {
             .HardFloat,
             .Altivec,
             .Fres,
             .Frsqrte,
-        },
-        CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.G5, "g5", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -222,17 +222,17 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
             .HardFloat,
-        },
-        CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ppc, "ppc", &[_]FeatureType {
             .HardFloat,
-        },
-        CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ppc32, "ppc32", &[_]FeatureType {
             .HardFloat,
-        },
-        CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ppc64, "ppc64", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -241,8 +241,8 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ppc64le, "ppc64le", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -273,8 +273,8 @@ pub const PowerPcCpu = enum {
             .Stfiwx,
             .TwoConstNr,
             .Vsx,
-        },
-        CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr3, "pwr3", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -282,8 +282,8 @@ pub const PowerPcCpu = enum {
             .Frsqrte,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr4, "pwr4", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -292,8 +292,8 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr5, "pwr5", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -304,8 +304,8 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr5x, "pwr5x", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -317,8 +317,8 @@ pub const PowerPcCpu = enum {
             .Fsqrt,
             .Mfocrf,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr6, "pwr6", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -334,8 +334,8 @@ pub const PowerPcCpu = enum {
             .Mfocrf,
             .Recipprec,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr6x, "pwr6x", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -351,8 +351,8 @@ pub const PowerPcCpu = enum {
             .Mfocrf,
             .Recipprec,
             .Stfiwx,
-        },
-        CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr7, "pwr7", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -376,8 +376,8 @@ pub const PowerPcCpu = enum {
             .Stfiwx,
             .TwoConstNr,
             .Vsx,
-        },
-        CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr8, "pwr8", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -408,8 +408,8 @@ pub const PowerPcCpu = enum {
             .Stfiwx,
             .TwoConstNr,
             .Vsx,
-        },
-        CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pwr9, "pwr9", &[_]FeatureType {
             .Bit64,
             .HardFloat,
             .Altivec,
@@ -446,6 +446,6 @@ pub const PowerPcCpu = enum {
             .TwoConstNr,
             .Vsx,
             .VectorsUseTwoUnits,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig
index d5ba5144686670a4fed1802286350486490c0d40..d191e04acfdf66bde044c000d60381c1612cbc5e 100644
--- a/lib/std/target/cpu/RiscVCpu.zig
+++ b/lib/std/target/cpu/RiscVCpu.zig
@@ -5,19 +5,19 @@ pub const RiscVCpu = enum {
     GenericRv32,
     GenericRv64,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.RiscVFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.RiscVFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
             .RvcHints,
-        },
-        CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
             .Bit64,
             .RvcHints,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig
index e1887ad7c57fe5605dbcac981c9fb39c7aa483a0..bd5dca79cabe52f2d0063fdb6af969765b9ecf58 100644
--- a/lib/std/target/cpu/SparcCpu.zig
+++ b/lib/std/target/cpu/SparcCpu.zig
@@ -43,174 +43,174 @@ pub const SparcCpu = enum {
     V8,
     V9,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.SparcFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.SparcFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.At697e, "at697e", &[_]FeatureType {
             .Leon,
             .Insertnopload,
-        },
-        CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.At697f, "at697f", &[_]FeatureType {
             .Leon,
             .Insertnopload,
-        },
-        CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.F934, "f934", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gr712rc, "gr712rc", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Gr740, "gr740", &[_]FeatureType {
             .Leon,
             .Leonpwrpsr,
             .Hasleoncasa,
             .Leoncyclecounter,
             .Hasumacsmac,
-        },
-        CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Hypersparc, "hypersparc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Leon2, "leon2", &[_]FeatureType {
             .Leon,
-        },
-        CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Leon3, "leon3", &[_]FeatureType {
             .Leon,
             .Hasumacsmac,
-        },
-        CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Leon4, "leon4", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
             .Hasumacsmac,
-        },
-        CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2080, "ma2080", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2085, "ma2085", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2100, "ma2100", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2150, "ma2150", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2155, "ma2155", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2450, "ma2450", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2455, "ma2455", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2480, "ma2480", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2485, "ma2485", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Myriad2, "myriad2", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Myriad21, "myriad2.1", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Myriad22, "myriad2.2", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Myriad23, "myriad2.3", &[_]FeatureType {
             .Leon,
             .Hasleoncasa,
-        },
-        CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Niagara, "niagara", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
             .Vis2,
-        },
-        CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Niagara2, "niagara2", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
             .Vis2,
             .Popc,
-        },
-        CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Niagara3, "niagara3", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
             .Vis2,
             .Popc,
-        },
-        CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Niagara4, "niagara4", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
             .Vis2,
             .Vis3,
             .Popc,
-        },
-        CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sparclet, "sparclet", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sparclite, "sparclite", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Supersparc, "supersparc", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tsc701, "tsc701", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
-        },
-        CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
             .DeprecatedV8,
             .V9,
             .Vis,
             .Vis2,
-        },
-        CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ut699, "ut699", &[_]FeatureType {
             .Leon,
             .NoFmuls,
             .NoFsmuld,
             .Fixallfdivsqrt,
             .Insertnopload,
-        },
-        CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V7, "v7", &[_]FeatureType {
             .NoFsmuld,
             .SoftMulDiv,
-        },
-        CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V8, "v8", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.V9, "v9", &[_]FeatureType {
             .V9,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig
index ec5efcc1aed4a9c042a2119fc25544bb807e8e49..7e5b21c85898f184b8b9df3da83519c85efa7595 100644
--- a/lib/std/target/cpu/SystemZCpu.zig
+++ b/lib/std/target/cpu/SystemZCpu.zig
@@ -16,14 +16,14 @@ pub const SystemZCpu = enum {
     Z196,
     ZEC12,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.SystemZFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.SystemZFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Arch10, "arch10", &[_]FeatureType {
             .DfpZonedConversion,
             .DistinctOps,
             .EnhancedDat2,
@@ -41,8 +41,8 @@ pub const SystemZCpu = enum {
             .ProcessorAssist,
             .ResetReferenceBitsMultiple,
             .TransactionalExecution,
-        },
-        CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arch11, "arch11", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DistinctOps,
@@ -65,8 +65,8 @@ pub const SystemZCpu = enum {
             .ResetReferenceBitsMultiple,
             .TransactionalExecution,
             .Vector,
-        },
-        CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arch12, "arch12", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DistinctOps,
@@ -96,8 +96,8 @@ pub const SystemZCpu = enum {
             .Vector,
             .VectorEnhancements1,
             .VectorPackedDecimal,
-        },
-        CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arch13, "arch13", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DeflateConversion,
@@ -133,10 +133,10 @@ pub const SystemZCpu = enum {
             .VectorEnhancements2,
             .VectorPackedDecimal,
             .VectorPackedDecimalEnhancement,
-        },
-        CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arch8, "arch8", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Arch9, "arch9", &[_]FeatureType {
             .DistinctOps,
             .FpExtension,
             .FastSerialization,
@@ -147,12 +147,12 @@ pub const SystemZCpu = enum {
             .MessageSecurityAssistExtension4,
             .PopulationCount,
             .ResetReferenceBitsMultiple,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Z10, "z10", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Z13, "z13", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DistinctOps,
@@ -175,8 +175,8 @@ pub const SystemZCpu = enum {
             .ResetReferenceBitsMultiple,
             .TransactionalExecution,
             .Vector,
-        },
-        CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Z14, "z14", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DistinctOps,
@@ -206,8 +206,8 @@ pub const SystemZCpu = enum {
             .Vector,
             .VectorEnhancements1,
             .VectorPackedDecimal,
-        },
-        CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Z15, "z15", &[_]FeatureType {
             .DfpPackedConversion,
             .DfpZonedConversion,
             .DeflateConversion,
@@ -243,8 +243,8 @@ pub const SystemZCpu = enum {
             .VectorEnhancements2,
             .VectorPackedDecimal,
             .VectorPackedDecimalEnhancement,
-        },
-        CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Z196, "z196", &[_]FeatureType {
             .DistinctOps,
             .FpExtension,
             .FastSerialization,
@@ -255,8 +255,8 @@ pub const SystemZCpu = enum {
             .MessageSecurityAssistExtension4,
             .PopulationCount,
             .ResetReferenceBitsMultiple,
-        },
-        CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.ZEC12, "zEC12", &[_]FeatureType {
             .DfpZonedConversion,
             .DistinctOps,
             .EnhancedDat2,
@@ -274,6 +274,6 @@ pub const SystemZCpu = enum {
             .ProcessorAssist,
             .ResetReferenceBitsMultiple,
             .TransactionalExecution,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig
index b68b859c13a7f0b4482b3a7bcdc58d442514ce73..a05702dac19ac3bcdb86bd4e5374b0b5cb4ddf27 100644
--- a/lib/std/target/cpu/WebAssemblyCpu.zig
+++ b/lib/std/target/cpu/WebAssemblyCpu.zig
@@ -6,23 +6,23 @@ pub const WebAssemblyCpu = enum {
     Generic,
     Mvp,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.WebAssemblyFeature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.WebAssemblyFeature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
             .Atomics,
             .MutableGlobals,
             .NontrappingFptoint,
             .Simd128,
             .SignExt,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType {
-        },
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Mvp, "mvp", &[_]FeatureType {
+        }),
     };
 };
diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig
index dba81c654da297232465b0de0871aeefba31285c..0a3a15f347a3b74a4aa4143d374d03ac5191a5c8 100644
--- a/lib/std/target/cpu/X86Cpu.zig
+++ b/lib/std/target/cpu/X86Cpu.zig
@@ -82,14 +82,14 @@ pub const X86Cpu = enum {
     Znver1,
     Znver2,
 
-    pub fn getInfo(self: @This()) CpuInfo {
+    const FeatureType = feature.X86Feature;
+
+    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
         return cpu_infos[@enumToInt(self)];
     }
 
-    pub const FeatureType = feature.X86Feature;
-
-    const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
-        CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType {
+    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
+        CpuInfo(@This(), FeatureType).create(.Amdfam10, "amdfam10", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -106,8 +106,8 @@ pub const X86Cpu = enum {
             .Sse4a,
             .SlowShld,
             .X87,
-        },
-        CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Athlon, "athlon", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cmov,
@@ -116,8 +116,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Athlon4, "athlon-4", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cmov,
@@ -128,8 +128,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -143,8 +143,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cmov,
@@ -155,8 +155,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cmov,
@@ -165,8 +165,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cmov,
@@ -177,8 +177,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Athlon64, "athlon64", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -192,8 +192,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -208,8 +208,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Atom, "atom", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -229,8 +229,8 @@ pub const X86Cpu = enum {
             .SlowTwoMemOps,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Barcelona, "barcelona", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -247,8 +247,8 @@ pub const X86Cpu = enum {
             .Sse4a,
             .SlowShld,
             .X87,
-        },
-        CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Bdver1, "bdver1", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -271,8 +271,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xop,
             .Xsave,
-        },
-        CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Bdver2, "bdver2", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -300,8 +300,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xop,
             .Xsave,
-        },
-        CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Bdver3, "bdver3", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -331,8 +331,8 @@ pub const X86Cpu = enum {
             .Xop,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Bdver4, "bdver4", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -365,8 +365,8 @@ pub const X86Cpu = enum {
             .Xop,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Bonnell, "bonnell", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -386,8 +386,8 @@ pub const X86Cpu = enum {
             .SlowTwoMemOps,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Broadwell, "broadwell", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -427,8 +427,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Btver1, "btver1", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -448,8 +448,8 @@ pub const X86Cpu = enum {
             .Ssse3,
             .SlowShld,
             .X87,
-        },
-        CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Btver2, "btver2", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -481,14 +481,14 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.C3, "c3", &[_]FeatureType {
             .Mmx,
             .Dnow3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.C32, "c3-2", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -496,8 +496,8 @@ pub const X86Cpu = enum {
             .Sse,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cannonlake, "cannonlake", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -552,8 +552,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cascadelake, "cascadelake", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -607,8 +607,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Cooperlake, "cooperlake", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -663,8 +663,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -692,8 +692,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -730,8 +730,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Core2, "core2", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -745,8 +745,8 @@ pub const X86Cpu = enum {
             .Ssse3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Corei7, "corei7", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -760,8 +760,8 @@ pub const X86Cpu = enum {
             .Sse,
             .Sse42,
             .X87,
-        },
-        CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -786,20 +786,20 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Geode, "geode", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Goldmont, "goldmont", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -830,8 +830,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -864,8 +864,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Haswell, "haswell", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -902,27 +902,27 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.I386, "i386", &[_]FeatureType {
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.I486, "i486", &[_]FeatureType {
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.I586, "i586", &[_]FeatureType {
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.I686, "i686", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -986,8 +986,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1053,8 +1053,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Ivybridge, "ivybridge", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -1082,28 +1082,28 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.K6, "k6", &[_]FeatureType {
             .Cx8,
             .Mmx,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.K62, "k6-2", &[_]FeatureType {
             .Mmx,
             .Dnow3,
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.K63, "k6-3", &[_]FeatureType {
             .Mmx,
             .Dnow3,
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.K8, "k8", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -1117,8 +1117,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -1133,8 +1133,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Knl, "knl", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1173,8 +1173,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Knm, "knm", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1214,10 +1214,10 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType {
-        },
-        CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Lakemont, "lakemont", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Nehalem, "nehalem", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1231,8 +1231,8 @@ pub const X86Cpu = enum {
             .Sse,
             .Sse42,
             .X87,
-        },
-        CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Nocona, "nocona", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1244,8 +1244,8 @@ pub const X86Cpu = enum {
             .Sse3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Opteron, "opteron", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -1259,8 +1259,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
             .Mmx,
             .Dnowa3,
             .Bit64,
@@ -1275,8 +1275,8 @@ pub const X86Cpu = enum {
             .SlowShld,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Penryn, "penryn", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1290,13 +1290,13 @@ pub const X86Cpu = enum {
             .Sse41,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium, "pentium", &[_]FeatureType {
             .Cx8,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.PentiumM, "pentium-m", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1306,14 +1306,14 @@ pub const X86Cpu = enum {
             .Sse2,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
             .Cx8,
             .Mmx,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium2, "pentium2", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1321,8 +1321,8 @@ pub const X86Cpu = enum {
             .Nopl,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium3, "pentium3", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1331,8 +1331,8 @@ pub const X86Cpu = enum {
             .Sse,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium3m, "pentium3m", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1341,8 +1341,8 @@ pub const X86Cpu = enum {
             .Sse,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium4, "pentium4", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1352,8 +1352,8 @@ pub const X86Cpu = enum {
             .Sse2,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentium4m, "pentium4m", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1363,15 +1363,15 @@ pub const X86Cpu = enum {
             .Sse2,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Nopl,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Prescott, "prescott", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1381,8 +1381,8 @@ pub const X86Cpu = enum {
             .Sse3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Sandybridge, "sandybridge", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Avx,
@@ -1407,8 +1407,8 @@ pub const X86Cpu = enum {
             .X87,
             .Xsave,
             .Xsaveopt,
-        },
-        CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Silvermont, "silvermont", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1432,8 +1432,8 @@ pub const X86Cpu = enum {
             .SlowPmulld,
             .SlowTwoMemOps,
             .X87,
-        },
-        CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Skx, "skx", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1486,8 +1486,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Skylake, "skylake", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1533,8 +1533,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1587,8 +1587,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Slm, "slm", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1612,8 +1612,8 @@ pub const X86Cpu = enum {
             .SlowPmulld,
             .SlowTwoMemOps,
             .X87,
-        },
-        CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tigerlake, "tigerlake", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1681,8 +1681,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Tremont, "tremont", &[_]FeatureType {
             .Bit64,
             .Sse,
             .Aes,
@@ -1720,8 +1720,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Westmere, "westmere", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1736,19 +1736,19 @@ pub const X86Cpu = enum {
             .Popcnt,
             .Sse42,
             .X87,
-        },
-        CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
             .Mmx,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Winchip2, "winchip2", &[_]FeatureType {
             .Mmx,
             .Dnow3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.X8664, "x86-64", &[_]FeatureType {
             .Bit64,
             .Cmov,
             .Cx8,
@@ -1761,8 +1761,8 @@ pub const X86Cpu = enum {
             .Slow3opsLea,
             .SlowIncdec,
             .X87,
-        },
-        CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Yonah, "yonah", &[_]FeatureType {
             .Cmov,
             .Cx8,
             .Fxsr,
@@ -1772,8 +1772,8 @@ pub const X86Cpu = enum {
             .Sse3,
             .SlowUnalignedMem16,
             .X87,
-        },
-        CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Znver1, "znver1", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1814,8 +1814,8 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
-        CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType {
+        }),
+        CpuInfo(@This(), FeatureType).create(.Znver2, "znver2", &[_]FeatureType {
             .Bit64,
             .Adx,
             .Sse,
@@ -1859,6 +1859,6 @@ pub const X86Cpu = enum {
             .Xsavec,
             .Xsaveopt,
             .Xsaves,
-        },
+        }),
     };
 };
diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig
index 79e1826ddc8975f7cf34b56e03601505939199d2..e35eaaf41d1b5bb9447a44309a825d56c9b8d984 100644
--- a/lib/std/target/cpu/empty.zig
+++ b/lib/std/target/cpu/empty.zig
@@ -1,6 +1,6 @@
 const feature = @import("std").target.feature;
 const CpuInfo = @import("std").target.cpu.CpuInfo;
 
-pub const EmptyCpu = enum {
-    pub const cpu_infos = [0]CpuInfo(@This()) {};
+pub const EmptyCpu = struct {
+    pub const cpu_infos = [0]CpuInfo(@This(), feature.EmptyFeature) {};
 };
diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig
index b5fb4ff96d3a3b1482e3479531ae94c4e0e0694e..d5bf45cd0ef9ddc6cfd450bf20d10e856af6c9f0 100644
--- a/lib/std/target/feature.zig
+++ b/lib/std/target/feature.zig
@@ -17,7 +17,7 @@ pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature;
 pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature;
 pub const X86Feature = @import("feature/X86Feature.zig").X86Feature;
 
-const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
+pub const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
 
 pub fn ArchFeature(comptime arch: @TagType(Arch)) type {
     return switch (arch) {
@@ -49,24 +49,30 @@ pub fn FeatureInfo(comptime EnumType: type) type {
     return struct {
         value: EnumType,
         name: []const u8,
+        description: []const u8,
+        llvm_name: []const u8,
 
         subfeatures: []const EnumType,
 
         const Self = @This();
 
-        fn create(value: EnumType, name: []const u8) Self {
+        pub fn create(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8) Self {
             return Self {
                 .value = value,
                 .name = name,
+                .description = description,
+                .llvm_name = llvm_name,
 
                 .subfeatures = &[_]EnumType{},
             };
         }
 
-        fn createWithSubfeatures(value: EnumType, name: []const u8, subfeatures: []const EnumType) Self {
+        pub fn createWithSubfeatures(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8, subfeatures: []const EnumType) Self {
             return Self {
                 .value = value,
                 .name = name,
+                .description = description,
+                .llvm_name = llvm_name,
 
                 .subfeatures = subfeatures,
             };
diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig
index 849c028169709b92a91c8101faf4481786da574d..8044d957be998f9a038bd10e57596d28367b9eab 100644
--- a/lib/std/target/feature/AArch64Feature.zig
+++ b/lib/std/target/feature/AArch64Feature.zig
@@ -155,7 +155,7 @@ pub const AArch64Feature = enum {
     Thunderxt83,
     Thunderxt88,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
@@ -291,19 +291,19 @@ pub const AArch64Feature = enum {
             .Sve,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() {
-            .Sve,
             .FpArmv8,
+            .Sve,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() {
             .Sve,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() {
-            .Sve,
             .FpArmv8,
+            .Sve,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() {
-            .Sve,
             .FpArmv8,
+            .Sve,
         }),
         FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"),
         FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"),
@@ -323,101 +323,101 @@ pub const AArch64Feature = enum {
         FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"),
         FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"),
         FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() {
-            .ZczFp,
             .ZczGp,
+            .ZczFp,
         }),
         FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"),
         FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"),
         FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"),
         FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
-            .Pan,
-            .Rdm,
             .Lse,
+            .Rdm,
             .Crc,
             .Lor,
+            .Pan,
             .Vh,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
-            .Ccpp,
-            .Pan,
-            .Rdm,
             .Lse,
+            .Rdm,
+            .Pan,
             .Crc,
             .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Ccpp,
+            .Vh,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
             .Lse,
-            .Ccidx,
+            .Vh,
+            .Pa,
+            .Rdm,
+            .Pan,
             .Crc,
             .Lor,
-            .Pa,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .Ccidx,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
-            .Nv,
+            .Rdm,
+            .Dit,
             .Am,
-            .Lse,
+            .Ras,
+            .Rcpc,
             .Sel2,
-            .Lor,
-            .Tracev84,
-            .Uaops,
             .Ccpp,
-            .TlbRmi,
-            .Fmi,
-            .Rcpc,
-            .Pan,
-            .Rdm,
             .Pa,
-            .Dit,
-            .Ras,
+            .Pan,
+            .Uaops,
+            .Tracev84,
             .Mpam,
-            .FpArmv8,
-            .Ccidx,
+            .Lse,
+            .Nv,
             .Dotprod,
+            .TlbRmi,
+            .Lor,
+            .Ccidx,
+            .FpArmv8,
             .Crc,
+            .Fmi,
             .Vh,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
-            .Nv,
+            .Vh,
+            .Rdm,
+            .Dit,
             .Am,
-            .Lse,
-            .Fptoint,
-            .Sel2,
-            .Lor,
-            .Tracev84,
-            .Uaops,
-            .Sb,
-            .Ccpp,
+            .Ssbs,
             .Specrestrict,
+            .Ras,
+            .Rcpc,
+            .Sel2,
+            .Ccpp,
+            .Pa,
             .Bti,
             .Ccdp,
-            .TlbRmi,
-            .Fmi,
-            .Rcpc,
             .Pan,
-            .Rdm,
-            .Pa,
-            .Ssbs,
-            .Dit,
-            .Ras,
+            .Uaops,
+            .Tracev84,
             .Mpam,
+            .Lse,
+            .Sb,
+            .Nv,
             .Altnzcv,
-            .FpArmv8,
-            .Ccidx,
             .Dotprod,
-            .Crc,
+            .TlbRmi,
+            .Lor,
+            .Ccidx,
             .Predres,
-            .Vh,
+            .Crc,
+            .Fptoint,
+            .Fmi,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() {
             .Perfmon,
@@ -425,325 +425,325 @@ pub const AArch64Feature = enum {
             .Crc,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() {
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
+            .CustomCheapAsMove,
+            .BalanceFpOps,
             .UseAa,
-            .FuseAes,
             .FpArmv8,
-            .Perfmon,
-            .Crc,
-            .BalanceFpOps,
-            .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
+            .Lse,
+            .Vh,
             .Rdm,
-            .FuseAes,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() {
-            .FuseLiterals,
-            .FuseAes,
-            .FpArmv8,
             .Perfmon,
-            .Crc,
-            .BalanceFpOps,
             .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .BalanceFpOps,
+            .FuseLiterals,
+            .FpArmv8,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() {
             .Perfmon,
-            .FuseAes,
             .FpArmv8,
             .Crc,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() {
             .Perfmon,
-            .FuseAes,
             .FpArmv8,
             .Crc,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
+            .Lse,
+            .Vh,
             .Rdm,
-            .FuseAes,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() {
-            .ZczFp,
+            .ArithBccFusion,
             .ArithCbzFusion,
-            .FuseAes,
+            .ZczFp,
             .AlternateSextloadCvtF32Pattern,
-            .ZczFpWorkaround,
-            .FpArmv8,
-            .Perfmon,
             .DisableLatencySchedHeuristic,
+            .Perfmon,
+            .ZczGp,
+            .ZczFpWorkaround,
             .Zcm,
-            .ZczGp,
-            .ArithBccFusion,
+            .FpArmv8,
             .FuseCryptoEor,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() {
             .ZczFp,
-            .FuseAes,
-            .SlowPaired128,
-            .Force32bitJumpTables,
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
             .UseReciprocalSquareRoot,
-            .FpArmv8,
-            .Perfmon,
-            .SlowMisaligned128store,
-            .Crc,
-            .UsePostraScheduler,
             .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .SlowMisaligned128store,
+            .FpArmv8,
+            .SlowPaired128,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() {
             .ZczFp,
-            .FuseAes,
-            .SlowPaired128,
-            .Force32bitJumpTables,
-            .FpArmv8,
             .Perfmon,
-            .SlowMisaligned128store,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
             .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .SlowMisaligned128store,
+            .FpArmv8,
+            .SlowPaired128,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() {
+            .FuseCsel,
             .ZczFp,
-            .FuseLiterals,
-            .FuseAes,
-            .Force32bitJumpTables,
-            .FpArmv8,
             .Perfmon,
-            .Crc,
-            .LslFast,
-            .FuseAddress,
             .UsePostraScheduler,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
-            .FuseCsel,
+            .CustomCheapAsMove,
+            .Force32bitJumpTables,
+            .FuseLiterals,
+            .FuseAddress,
+            .LslFast,
+            .FpArmv8,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() {
+            .ArithBccFusion,
+            .Vh,
+            .ArithCbzFusion,
             .ZczFp,
+            .Rdm,
+            .UsePostraScheduler,
+            .Ras,
+            .Force32bitJumpTables,
+            .Ccpp,
+            .FuseCsel,
+            .Pan,
+            .Uaops,
+            .FuseLiterals,
+            .LslFast,
             .Lse,
+            .Perfmon,
+            .Dotprod,
+            .Lor,
             .FuseArithLogic,
-            .Lor,
-            .UsePostraScheduler,
-            .Uaops,
+            .Crc,
             .CustomCheapAsMove,
-            .ArithBccFusion,
-            .Ccpp,
-            .Perfmon,
-            .Pan,
-            .Rdm,
-            .FuseLiterals,
-            .Force32bitJumpTables,
-            .LslFast,
             .FuseAddress,
             .ZczGp,
-            .Ras,
-            .FuseCsel,
-            .ArithCbzFusion,
-            .FuseAes,
             .FpArmv8,
-            .Crc,
-            .Dotprod,
-            .Vh,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() {
             .ZczFp,
             .Rdm,
+            .Perfmon,
+            .UsePostraScheduler,
+            .Crc,
+            .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .ZczGp,
+            .FpArmv8,
             .SlowStrqroStore,
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
             .LslFast,
-            .UsePostraScheduler,
-            .ZczGp,
-            .CustomCheapAsMove,
-            .PredictableSelectExpensive,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() {
             .ZczFp,
             .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .LslFast,
             .UsePostraScheduler,
-            .ZczGp,
-            .CustomCheapAsMove,
+            .Crc,
             .PredictableSelectExpensive,
+            .CustomCheapAsMove,
+            .ZczGp,
+            .FpArmv8,
+            .LslFast,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() {
-            .Rcpc,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FpArmv8,
             .Lse,
-            .Crc,
+            .Vh,
+            .Rdm,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
-            .Rcpc,
+            .Lse,
             .Spe,
-            .Ccpp,
-            .Pan,
+            .Vh,
             .Rdm,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .Pan,
             .Dotprod,
-            .Lor,
+            .Crc,
             .Ssbs,
+            .Lor,
             .Uaops,
-            .Vh,
             .Ras,
+            .Rcpc,
+            .Ccpp,
+            .FpArmv8,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() {
+            .Spe,
+            .Vh,
             .ZczFp,
-            .Nv,
+            .Rdm,
+            .UsePostraScheduler,
+            .Dit,
             .Am,
-            .Lse,
+            .Ras,
+            .Rcpc,
             .Sel2,
-            .Lor,
-            .Tracev84,
-            .Uaops,
-            .UsePostraScheduler,
-            .CustomCheapAsMove,
             .Ccpp,
+            .Pa,
+            .Pan,
+            .Uaops,
+            .Tracev84,
+            .Mpam,
+            .LslFast,
+            .Lse,
+            .Nv,
             .Perfmon,
+            .Dotprod,
             .TlbRmi,
+            .Lor,
+            .Ccidx,
             .PredictableSelectExpensive,
+            .Crc,
+            .CustomCheapAsMove,
             .Fmi,
-            .Rcpc,
-            .Pan,
-            .Rdm,
-            .LslFast,
-            .Pa,
             .ZczGp,
-            .Dit,
-            .Ras,
-            .Spe,
-            .Mpam,
             .FpArmv8,
-            .Ccidx,
-            .Dotprod,
-            .Crc,
-            .Vh,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() {
-            .Uaops,
+            .Lse,
             .Spe,
-            .Ccpp,
-            .Pan,
-            .Rdm,
-            .FuseAes,
             .Vh,
+            .Rdm,
             .Perfmon,
-            .FpArmv8,
-            .Lse,
-            .Crc,
+            .UsePostraScheduler,
+            .Pan,
             .Dotprod,
+            .Crc,
             .Lor,
-            .UsePostraScheduler,
+            .Uaops,
             .CustomCheapAsMove,
             .Ras,
+            .Ccpp,
+            .FpArmv8,
+            .FuseAes,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() {
-            .Pan,
-            .Rdm,
+            .Lse,
+            .ArithBccFusion,
             .Vh,
+            .Rdm,
+            .UsePostraScheduler,
+            .Crc,
+            .Lor,
+            .Pan,
             .AggressiveFma,
             .FpArmv8,
-            .Lse,
-            .Crc,
-            .Lor,
-            .UsePostraScheduler,
-            .ArithBccFusion,
             .PredictableSelectExpensive,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() {
             .Perfmon,
-            .FpArmv8,
-            .Crc,
             .UsePostraScheduler,
+            .Crc,
+            .FpArmv8,
             .PredictableSelectExpensive,
         }),
     };
diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig
index e8688a7492e0ba799cc5fc989a6137ee4cb77e4d..f7b9cb9da7e8e0d72c069b86cd88d7f2c2e474d5 100644
--- a/lib/std/target/feature/AmdGpuFeature.zig
+++ b/lib/std/target/feature/AmdGpuFeature.zig
@@ -110,7 +110,7 @@ pub const AmdGpuFeature = enum {
     Xnack,
     HalfRate64Ops,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
@@ -166,73 +166,73 @@ pub const AmdGpuFeature = enum {
         FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"),
         FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"),
         FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() {
-            .Gfx9Insts,
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .FastFmaf,
-            .Sdwa,
+            .ApertureRegs,
+            .IntClampInsts,
+            .SdwaOmod,
             .SdwaScalar,
-            .VgprIndexMode,
-            .Dpp,
             .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
             .ScalarAtomics,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .CiInsts,
             .FlatAddressSpace,
-            .ScalarFlatScratchInsts,
-            .Gfx8Insts,
+            .Sdwa,
+            .Wavefrontsize64,
+            .SdwaSdst,
+            .FlatInstOffsets,
+            .ScalarStores,
             .Gfx7Gfx8Gfx9Insts,
             .R128A16,
-            .IntClampInsts,
-            .ScalarStores,
-            .ApertureRegs,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
+            .Dpp,
+            .Localmemorysize65536,
             .Vop3p,
-            .FlatInstOffsets,
+            .BitInsts16,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .Gfx9Insts,
+            .ScalarFlatScratchInsts,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
         }),
         FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
         FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
-            .Gfx9Insts,
+            .Vscnt,
+            .ApertureRegs,
+            .Gfx10Insts,
+            .IntClampInsts,
+            .PkFmacF16Inst,
+            .SdwaOmod,
+            .SdwaScalar,
+            .AddNoCarryInsts,
+            .Movrel,
+            .SMemrealtime,
             .NoSdstCmpx,
-            .Fp64,
-            .FastFmaf,
+            .CiInsts,
+            .FlatAddressSpace,
             .Sdwa,
-            .SdwaScalar,
-            .Dpp,
+            .NoSramEccSupport,
+            .SdwaSdst,
+            .FlatInstOffsets,
             .RegisterBanking,
-            .Gfx10Insts,
-            .AddNoCarryInsts,
-            .SdwaOmod,
-            .SdwaSdst,
-            .FlatAddressSpace,
+            .Dpp,
+            .Localmemorysize65536,
+            .Vop3p,
+            .BitInsts16,
+            .Dpp8,
             .Gfx8Insts,
+            .Inv2piInlineImm,
+            .Gfx9Insts,
             .FmaMixInsts,
-            .PkFmacF16Inst,
+            .MimgR128,
             .Vop3Literal,
-            .MimgR128,
-            .NoSramEccSupport,
-            .IntClampInsts,
-            .Movrel,
-            .Dpp8,
-            .ApertureRegs,
+            .FlatGlobalInsts,
+            .FlatScratchInsts,
+            .Fp64,
+            .FastFmaf,
             .NoDataDepHazard,
-            .CiInsts,
-            .FlatGlobalInsts,
-            .BitInsts16,
-            .FlatScratchInsts,
-            .SMemrealtime,
-            .Vop3p,
-            .FlatInstOffsets,
-            .Inv2piInlineImm,
-            .Localmemorysize65536,
-            .Vscnt,
         }),
         FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"),
         FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"),
@@ -276,25 +276,25 @@ pub const AmdGpuFeature = enum {
         FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"),
         FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"),
         FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() {
-            .Wavefrontsize64,
-            .MimgR128,
+            .Movrel,
+            .Gfx7Gfx8Gfx9Insts,
             .Fp64,
+            .TrigReducedRange,
             .CiInsts,
             .FlatAddressSpace,
-            .TrigReducedRange,
-            .NoSramEccSupport,
-            .Movrel,
             .Localmemorysize65536,
-            .Gfx7Gfx8Gfx9Insts,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .MimgR128,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() {
-            .Wavefrontsize64,
+            .Movrel,
             .MimgR128,
             .Fp64,
+            .TrigReducedRange,
             .NoXnackSupport,
-            .TrigReducedRange,
+            .Wavefrontsize64,
             .NoSramEccSupport,
-            .Movrel,
             .Ldsbankcount32,
             .Localmemorysize32768,
         }),
@@ -310,28 +310,28 @@ pub const AmdGpuFeature = enum {
         FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"),
         FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"),
         FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() {
-            .Wavefrontsize64,
-            .Fp64,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .Sdwa,
-            .VgprIndexMode,
-            .Dpp,
-            .FlatAddressSpace,
-            .Gfx8Insts,
-            .Gfx7Gfx8Gfx9Insts,
-            .MimgR128,
-            .NoSramEccSupport,
             .IntClampInsts,
-            .ScalarStores,
-            .Movrel,
             .SdwaMav,
+            .Movrel,
+            .SMemrealtime,
+            .Gcn3Encoding,
+            .TrigReducedRange,
             .CiInsts,
+            .FlatAddressSpace,
+            .Sdwa,
+            .Wavefrontsize64,
+            .NoSramEccSupport,
+            .ScalarStores,
+            .Gfx7Gfx8Gfx9Insts,
+            .Dpp,
+            .Localmemorysize65536,
             .BitInsts16,
-            .SMemrealtime,
+            .VgprIndexMode,
+            .Gfx8Insts,
             .Inv2piInlineImm,
-            .Localmemorysize65536,
+            .MimgR128,
             .SdwaOutModsVopc,
+            .Fp64,
         }),
         FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"),
         FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"),
diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig
index 842becda2c6f5d36368d96bdf70d150c786cc877..b7a951a63dbf12371a67f2a8da745a2787290844 100644
--- a/lib/std/target/feature/ArmFeature.zig
+++ b/lib/std/target/feature/ArmFeature.zig
@@ -177,7 +177,7 @@ pub const ArmFeature = enum {
     Swift,
     Xscale,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
@@ -215,283 +215,283 @@ pub const ArmFeature = enum {
             .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() {
-            .Mclass,
-            .StrictAlign,
+            .V4t,
             .ThumbMode,
             .Db,
-            .V4t,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() {
-            .Mclass,
-            .StrictAlign,
+            .V4t,
             .ThumbMode,
             .Db,
-            .V4t,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() {
-            .Thumb2,
             .V4t,
+            .Thumb2,
             .Dsp,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() {
-            .Thumb2,
-            .Mclass,
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
-            .Dsp,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Dsp,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() {
-            .Thumb2,
-            .Mclass,
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
+            .Hwdiv,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Db,
-            .Dsp,
-            .Rclass,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Hwdiv,
+            .Rclass,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
-            .Dsp,
-            .V7clrex,
-            .V4t,
-            .Fpregs,
             .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .Mp,
+            .Fpregs,
+            .V4t,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
+            .Db,
             .Aclass,
+            .Hwdiv,
             .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() {
-            .Mclass,
-            .StrictAlign,
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Db,
+            .StrictAlign,
+            .Mclass,
             .Noarm,
             .AcquireRelease,
+            .Hwdiv,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() {
-            .Thumb2,
-            .Mclass,
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Mclass,
             .Noarm,
             .AcquireRelease,
+            .Hwdiv,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
             .Crc,
-            .Fp16,
+            .Fpregs,
+            .Mp,
             .Dfb,
             .Dsp,
-            .Rclass,
-            .V7clrex,
+            .Fp16,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .Db,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Rclass,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() {
-            .Thumb2,
-            .Mclass,
             .Perfmon,
+            .V4t,
             .ThumbMode,
-            .Db,
             .Msecext8,
-            .Ras,
             .V7clrex,
-            .V4t,
-            .Hwdiv,
+            .Thumb2,
+            .Db,
+            .Ras,
+            .Mclass,
             .Noarm,
+            .AcquireRelease,
+            .Hwdiv,
             .Lob,
-            .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() {
-            .Thumb2,
-            .Mp,
+            .HwdivArm,
             .Perfmon,
-            .Sb,
-            .Db,
+            .D32,
+            .Fpregs,
             .Crc,
+            .Mp,
             .Fp16,
-            .Ras,
             .Dsp,
-            .V7clrex,
             .V4t,
-            .Fpregs,
-            .D32,
-            .Hwdiv,
-            .HwdivArm,
+            .V7clrex,
+            .Db,
             .Aclass,
-            .Trustzone,
+            .Thumb2,
+            .Ras,
+            .Sb,
             .AcquireRelease,
+            .Hwdiv,
+            .Trustzone,
         }),
         FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"),
         FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"),
         FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex  etc) instructions", "acquire-release"),
         FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"),
@@ -500,8 +500,8 @@ pub const ArmFeature = enum {
         FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"),
         FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"),
         FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"),
         FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"),
@@ -509,37 +509,37 @@ pub const ArmFeature = enum {
         FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"),
         FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"),
         FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"),
         FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"),
         FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"),
         FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() {
             .Fpregs,
         }),
         FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"),
         FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() {
-            .Fp16,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() {
-            .Fp16,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"),
         FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() {
@@ -549,8 +549,8 @@ pub const ArmFeature = enum {
             .Fpregs,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
         FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
@@ -569,8 +569,8 @@ pub const ArmFeature = enum {
         FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"),
         FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"),
         FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"),
         FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"),
@@ -592,8 +592,8 @@ pub const ArmFeature = enum {
         FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"),
         FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"),
         FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"),
         FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"),
@@ -617,8 +617,8 @@ pub const ArmFeature = enum {
             .Fpregs,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() {
             .Fpregs,
@@ -627,26 +627,26 @@ pub const ArmFeature = enum {
             .Fpregs,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() {
-            .Fpregs,
             .D32,
+            .Fpregs,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() {
-            .Fp16,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() {
-            .Fp16,
             .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() {
-            .Fp16,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .Fp16,
         }),
         FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"),
         FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() {
@@ -655,21 +655,21 @@ pub const ArmFeature = enum {
         }),
         FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"),
         FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Fp16,
-            .Dsp,
-            .V7clrex,
             .V4t,
             .Fpregs,
+            .V7clrex,
+            .Fp16,
+            .Dsp,
+            .Thumb2,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Dsp,
-            .V7clrex,
             .V4t,
             .Fpregs,
+            .V7clrex,
+            .Dsp,
+            .Thumb2,
         }),
         FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"),
         FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() {
@@ -688,76 +688,76 @@ pub const ArmFeature = enum {
             .V4t,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() {
-            .Thumb2,
             .V4t,
+            .Thumb2,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() {
-            .V7clrex,
-            .V4t,
             .Perfmon,
             .Thumb2,
+            .V4t,
+            .V7clrex,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() {
             .V4t,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() {
-            .V7clrex,
-            .V4t,
             .Perfmon,
             .Thumb2,
+            .V4t,
+            .V7clrex,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() {
-            .V7clrex,
-            .V4t,
             .Perfmon,
             .Thumb2,
+            .V4t,
+            .V7clrex,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .V7clrex,
             .V4t,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
-            .Thumb2,
             .Perfmon,
-            .Sb,
-            .V7clrex,
             .V4t,
-            .Fpregs,
             .D32,
+            .Fpregs,
+            .V7clrex,
+            .Thumb2,
             .AcquireRelease,
+            .Sb,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() {
             .V4t,
@@ -784,24 +784,24 @@ pub const ArmFeature = enum {
         FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"),
         FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"),
         FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() {
-            .Zcz,
-            .SlowVdup32,
+            .HwdivArm,
+            .D32,
+            .Crc,
+            .Fpregs,
+            .RetAddrStack,
             .SlowVgetlni32,
-            .DontWidenVmovs,
-            .Crc,
-            .FuseAes,
             .WideStrideVfp,
+            .SlowVdup32,
+            .SlowFpBrcc,
             .ProfUnpr,
+            .DontWidenVmovs,
+            .Zcz,
+            .Hwdiv,
+            .FuseAes,
             .Slowfpvmlx,
-            .SlowFpBrcc,
+            .UseAa,
             .FuseLiterals,
-            .Fpregs,
-            .D32,
             .ExpandFpMlx,
-            .Hwdiv,
-            .HwdivArm,
-            .RetAddrStack,
-            .UseAa,
         }),
         FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"),
         FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"),
diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig
index 6efacedbc2a95a31580cf045c96cee7736087735..1749c6c15cac15a8b04097ea2970df27d2fe7056 100644
--- a/lib/std/target/feature/AvrFeature.zig
+++ b/lib/std/target/feature/AvrFeature.zig
@@ -35,160 +35,160 @@ pub const AvrFeature = enum {
     Smallstack,
     Tinyencoding,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
     pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
         FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"),
         FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() {
-            .Lpm,
             .Avr0,
+            .Lpm,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() {
-            .Ijmpcall,
-            .Sram,
+            .Lpm,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() {
-            .Ijmpcall,
-            .Sram,
+            .Lpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() {
-            .Ijmpcall,
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() {
-            .Ijmpcall,
+            .Lpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() {
-            .Ijmpcall,
-            .Elpmx,
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() {
-            .Ijmpcall,
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() {
-            .Ijmpcall,
-            .Sram,
+            .Lpm,
             .Elpm,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Ijmpcall,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() {
-            .Ijmpcall,
+            .Lpm,
             .Movw,
-            .Sram,
-            .Break,
             .Spm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() {
-            .Ijmpcall,
-            .Elpmx,
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() {
+            .Avr0,
+            .Sram,
             .Break,
             .Tinyencoding,
-            .Avr0,
-            .Sram,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() {
-            .Ijmpcall,
-            .Elpmx,
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
             .Des,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() {
-            .Ijmpcall,
-            .Elpmx,
+            .Lpm,
+            .Elpm,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
+            .Elpmx,
             .Spm,
-            .Elpm,
-            .Lpmx,
-            .Spmx,
             .Avr0,
+            .Sram,
             .Jmpcall,
+            .Eijmpcall,
+            .Spmx,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"),
         FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"),
@@ -207,22 +207,22 @@ pub const AvrFeature = enum {
         FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"),
         FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"),
         FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() {
-            .Ijmpcall,
+            .Lpm,
+            .Elpm,
             .Elpmx,
             .Movw,
-            .Eijmpcall,
-            .Mul,
-            .Rmw,
-            .Sram,
-            .Break,
-            .Elpm,
             .Spm,
-            .Lpmx,
+            .Eijmpcall,
             .Spmx,
             .Jmpcall,
+            .Sram,
             .Addsubiw,
-            .Lpm,
+            .Mul,
+            .Lpmx,
+            .Rmw,
             .Des,
+            .Ijmpcall,
+            .Break,
         }),
         FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"),
         FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"),
diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig
index 028974ec2b61662f822154c3a9290d7286355043..b13da4615362ccedeea99e6c38265d843f920c23 100644
--- a/lib/std/target/feature/BpfFeature.zig
+++ b/lib/std/target/feature/BpfFeature.zig
@@ -5,7 +5,7 @@ pub const BpfFeature = enum {
     Dummy,
     Dwarfris,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig
index 560f282334b675734bb778f11f56d36f57ecf342..4b074f1694c04e0ec9c9abf32ca98a8f0041a02a 100644
--- a/lib/std/target/feature/HexagonFeature.zig
+++ b/lib/std/target/feature/HexagonFeature.zig
@@ -26,7 +26,7 @@ pub const HexagonFeature = enum {
     ReservedR19,
     SmallData,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig
index 16c7339f77a4eda1409b86b695096143677c61b0..2caaaa0dd048ee42d6ecc80721be7737c3c92638 100644
--- a/lib/std/target/feature/MipsFeature.zig
+++ b/lib/std/target/feature/MipsFeature.zig
@@ -52,7 +52,7 @@ pub const MipsFeature = enum {
     Xgot,
     P5600,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
@@ -60,14 +60,14 @@ pub const MipsFeature = enum {
         FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
         FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
         FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
         FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
@@ -91,128 +91,128 @@ pub const MipsFeature = enum {
             .Mips1,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
             .Mips3_32r2,
-            .Mips1,
+            .Fp64,
             .Gp64,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
         FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
         FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
+            .Fp64,
             .Gp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
         FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
         FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
+            .Mips5_32r2,
             .Mips4_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
         FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
         FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
-            .Mips3_32,
             .Mips4_32,
             .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
-            .Mips3_32,
+            .Mips5_32r2,
             .Mips4_32r2,
             .Mips3_32r2,
-            .Mips1,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
-            .Mips3_32,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
-            .Mips3_32,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
+            .Mips5_32r2,
+            .Mips3_32r2,
             .Mips4_32r2,
             .Abs2008,
-            .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Nan2008,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
+            .Mips4_32r2,
             .Gp64,
-            .Mips5_32r2,
+            .Fp64,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
-            .Mips3_32,
-            .Fp64,
-            .Mips4_32r2,
-            .Abs2008,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
-            .Mips4_32,
             .Nan2008,
+            .Abs2008,
+            .Mips4_32r2,
+            .Fp64,
             .Gp64,
-            .Mips5_32r2,
+            .Mips4_32,
+            .Mips1,
+            .Mips3_32,
         }),
         FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
         FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
@@ -227,12 +227,12 @@ pub const MipsFeature = enum {
         FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
         FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
         FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
-            .Mips3_32,
-            .Mips4_32r2,
+            .Mips5_32r2,
             .Mips3_32r2,
-            .Mips1,
+            .Mips4_32r2,
             .Mips4_32,
-            .Mips5_32r2,
+            .Mips1,
+            .Mips3_32,
         }),
     };
 };
diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig
index 47c7b71fcae07cf942dfd49e70a87f9c2ab19811..4213283af59f4f290372bc2183c85cd8b5015e07 100644
--- a/lib/std/target/feature/Msp430Feature.zig
+++ b/lib/std/target/feature/Msp430Feature.zig
@@ -6,7 +6,7 @@ pub const Msp430Feature = enum {
     Hwmultf5,
     Ext,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig
index 04250a3e26720008a47877d32344172450bd08fd..a22dec066da3aab31f384a001006ac446deee677 100644
--- a/lib/std/target/feature/NvptxFeature.zig
+++ b/lib/std/target/feature/NvptxFeature.zig
@@ -27,7 +27,7 @@ pub const NvptxFeature = enum {
     Sm_72,
     Sm_75,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig
index 9fe67055dd1b43b63daf7b2de3b2a68896e7c5e8..c3a43e98c42489998631ecd36deeaab85ba78156 100644
--- a/lib/std/target/feature/PowerPcFeature.zig
+++ b/lib/std/target/feature/PowerPcFeature.zig
@@ -53,7 +53,7 @@ pub const PowerPcFeature = enum {
     Vsx,
     VectorsUseTwoUnits,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig
index a489b6f5d38f6ff0fd2bf2ebc05a45d61fc678f7..b8fbe95299fc023103d2f253be6c19b28fba7e53 100644
--- a/lib/std/target/feature/RiscVFeature.zig
+++ b/lib/std/target/feature/RiscVFeature.zig
@@ -11,7 +11,7 @@ pub const RiscVFeature = enum {
     F,
     M,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig
index b0b65041531eacc08804bf235107fb098b00127d..07d9375581fdc92a7e5b02b3c8be5367f63f7176 100644
--- a/lib/std/target/feature/SparcFeature.zig
+++ b/lib/std/target/feature/SparcFeature.zig
@@ -21,7 +21,7 @@ pub const SparcFeature = enum {
     Hasumacsmac,
     Popc,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig
index 6d3321a5bab2d68c7b98980a0d0d0424cdb7b3fd..773c6583d0f2875aad289644947e27fc074cc70d 100644
--- a/lib/std/target/feature/SystemZFeature.zig
+++ b/lib/std/target/feature/SystemZFeature.zig
@@ -37,7 +37,7 @@ pub const SystemZFeature = enum {
     VectorPackedDecimal,
     VectorPackedDecimalEnhancement,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig
index a7aaeee4f0a18db718254a8d50a3943074d23e44..1cd80b0f9424403f500a9efa98532a7266367d14 100644
--- a/lib/std/target/feature/WebAssemblyFeature.zig
+++ b/lib/std/target/feature/WebAssemblyFeature.zig
@@ -12,7 +12,7 @@ pub const WebAssemblyFeature = enum {
     TailCall,
     UnimplementedSimd128,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig
index 7a2cc58169ed01c2d04df33a74e93a6457dea132..089215ed3f27a7715c8831d8f6ad2bd0e323ad1c 100644
--- a/lib/std/target/feature/X86Feature.zig
+++ b/lib/std/target/feature/X86Feature.zig
@@ -128,7 +128,7 @@ pub const X86Feature = enum {
     BitMode32,
     BitMode64,
 
-    pub fn getInfo(self: @This()) FeatureInfo {
+    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
         return feature_infos[@enumToInt(self)];
     }
 
@@ -254,8 +254,8 @@ pub const X86Feature = enum {
         FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"),
         FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"),
         FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() {
+            .RetpolineIndirectCalls,
             .RetpolineIndirectBranches,
-            .RetpolineIndirectCalls,
         }),
         FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() {
             .RetpolineIndirectCalls,
diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig
index 87a334978dba703130bd08382f68911b4d775093..e18d66aa132262804145ee773d7d63949f6a9aec 100644
--- a/lib/std/target/feature/empty.zig
+++ b/lib/std/target/feature/empty.zig
@@ -1,5 +1,5 @@
 const FeatureInfo = @import("std").target.feature.FeatureInfo;
 
-pub const EmptyFeature = enum {
+pub const EmptyFeature = struct {
     pub const feature_infos = [0]FeatureInfo(@This()) {};
-}
+};
-- 
2.54.0


From 5bc4690d85bfaade48393c182b2b3aa207ebebc7 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Tue, 17 Dec 2019 09:45:30 -0500
Subject: [PATCH 036/116] Make targets cmd able to list CPUs and features

---
 src-self-hosted/stage1.zig | 99 ++++++++++++++++++++++++++++++++++++++
 src/main.cpp               | 33 ++++++++++++-
 src/userland.cpp           |  3 ++
 src/userland.h             |  6 +++
 4 files changed, 139 insertions(+), 2 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index ec683e4ba882b3c6fd14caf96630489f369d549e..fc6cb18bf23b07039a21f41d2a8a7426fc3ddb5f 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -6,9 +6,12 @@ const io = std.io;
 const mem = std.mem;
 const fs = std.fs;
 const process = std.process;
+const feature = std.target.feature;
+const cpu = std.target.cpu;
 const Allocator = mem.Allocator;
 const ArrayList = std.ArrayList;
 const Buffer = std.Buffer;
+const Target = std.Target;
 const self_hosted_main = @import("main.zig");
 const errmsg = @import("errmsg.zig");
 const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
@@ -527,3 +530,99 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
     node.activate();
     node.context.maybeRefresh();
 }
+
+// ABI warning
+export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
+    print_features_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+        std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
+    };
+}
+
+fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
+    const stdout_stream = &std.io.getStdOut().outStream().stream;
+
+    const arch = Target.parseArchTag(arch_name) catch {
+        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
+        return;
+    };
+
+    inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| {
+        if (@enumToInt(arch) == arch_enum_field.value) {
+            const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value);
+
+            const feature_infos = feature.ArchFeature(enum_arch).feature_infos;
+
+            try stdout_stream.print("Available features for {}:\n", .{ arch_enum_field.name });
+
+            var longest_len: usize = 0;
+            for (feature_infos) |feature_info| {
+                if (feature_info.name.len > longest_len) longest_len = feature_info.name.len;
+            }
+
+            for (feature_infos) |feature_info| {
+                try stdout_stream.print("  {}", .{ feature_info.name });
+                
+                var i: usize = 0;
+                while (i < longest_len - feature_info.name.len) : (i += 1) {
+                    try stdout_stream.write(" ");    
+                }
+
+                try stdout_stream.print(" - {}\n", .{ feature_info.description });
+
+                if (show_subfeatures and feature_info.subfeatures.len > 0) {
+                    for (feature_info.subfeatures) |subfeature| {
+                        try stdout_stream.print("    {}\n", .{ subfeature.getInfo().name });
+                    }
+                }
+            }
+        }
+    }
+}
+
+// ABI warning
+export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
+    print_cpus_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+        std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
+    };
+}
+
+fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
+    const stdout_stream = &std.io.getStdOut().outStream().stream;
+
+    const arch = Target.parseArchTag(arch_name) catch {
+        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
+        return;
+    };
+
+    inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| {
+        if (@enumToInt(arch) == arch_enum_field.value) {
+            const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value);
+
+            const cpu_infos = cpu.ArchCpu(enum_arch).cpu_infos;
+
+            try stdout_stream.print("Available cpus for {}:\n", .{ arch_enum_field.name });
+
+            var longest_len: usize = 0;
+            for (cpu_infos) |cpu_info| {
+                if (cpu_info.name.len > longest_len) longest_len = cpu_info.name.len;
+            }
+
+            for (cpu_infos) |cpu_info| {
+                try stdout_stream.print("  {}", .{ cpu_info.name });
+                
+                var i: usize = 0;
+                while (i < longest_len - cpu_info.name.len) : (i += 1) {
+                    try stdout_stream.write(" ");    
+                }
+
+                try stdout_stream.write("\n");
+
+                if (show_subfeatures and cpu_info.features.len > 0) {
+                    for (cpu_info.features) |subfeature| {
+                        try stdout_stream.print("    {}\n", .{ subfeature.getInfo().name });
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/src/main.cpp b/src/main.cpp
index d89ac352a5e856a2c225a747c6d4ca1222cc205f..5c0a0b23fcf4f71adcfd4ad7aabf51773f65e8c8 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -129,6 +129,11 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "  --test-name-prefix [text]    add prefix to all tests\n"
         "  --test-cmd [arg]             specify test execution command one arg at a time\n"
         "  --test-cmd-bin               appends test binary path to test cmd args\n"
+        "\n"
+        "Targets Options:\n"
+        "  --list-features [arch]       list available features for the given architecture\n"
+        "  --list-cpus [arch]           list available cpus for the given architecture\n"
+        "  --show-subfeatures           list subfeatures for each entry from --list-features or --list-cpus\n"
     , arg0);
     return return_code;
 }
@@ -529,6 +534,10 @@ int main(int argc, char **argv) {
     WantCSanitize want_sanitize_c = WantCSanitizeAuto;
     bool function_sections = false;
 
+    const char *targets_list_features_arch = nullptr;
+    const char *targets_list_cpus_arch = nullptr;
+    bool targets_show_subfeatures = false;
+
     ZigList<const char *> llvm_argv = {0};
     llvm_argv.append("zig (LLVM option parsing)");
 
@@ -779,6 +788,8 @@ int main(int argc, char **argv) {
                 cur_pkg = cur_pkg->parent;
             } else if (strcmp(arg, "-ffunction-sections") == 0) {
                 function_sections = true;
+            } else if (strcmp(arg, "--show-subfeatures") == 0) {
+                    targets_show_subfeatures = true;
             } else if (i + 1 >= argc) {
                 fprintf(stderr, "Expected another argument after %s\n", arg);
                 return print_error_usage(arg0);
@@ -936,7 +947,11 @@ int main(int argc, char **argv) {
                             , argv[i]);
                         return EXIT_FAILURE;
                     }
-                } else {
+                } else if (strcmp(arg, "--list-features") == 0) {
+                    targets_list_features_arch = argv[i];
+                } else if (strcmp(arg, "--list-cpus") == 0) {
+                    targets_list_cpus_arch = argv[i];
+                }else {
                     fprintf(stderr, "Invalid argument: %s\n", arg);
                     return print_error_usage(arg0);
                 }
@@ -1413,7 +1428,21 @@ int main(int argc, char **argv) {
         return main_exit(root_progress_node, EXIT_SUCCESS);
     }
     case CmdTargets:
-        return print_target_list(stdout);
+        if (targets_list_features_arch != nullptr) {
+            stage2_list_features_for_arch(
+                targets_list_features_arch,
+                strlen(targets_list_features_arch),
+                targets_show_subfeatures);
+            return 0;
+        } else if (targets_list_cpus_arch != nullptr) {
+            stage2_list_cpus_for_arch(
+                targets_list_cpus_arch,
+                strlen(targets_list_cpus_arch),
+                targets_show_subfeatures);
+            return 0;
+        } else {
+            return print_target_list(stdout);
+        }
     case CmdNone:
         return print_full_usage(arg0, stderr, EXIT_FAILURE);
     }
diff --git a/src/userland.cpp b/src/userland.cpp
index 263ef0cbc38c36a281ef7cd0a2301df17a7fa7d3..87ef99c03a91fa16eb0ce0d06890c3adb2e6dae0 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -88,3 +88,6 @@ void stage2_progress_end(Stage2ProgressNode *node) {}
 void stage2_progress_complete_one(Stage2ProgressNode *node) {}
 void stage2_progress_disable_tty(Stage2Progress *progress) {}
 void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
+
+void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
+void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
diff --git a/src/userland.h b/src/userland.h
index fe3f072ae5699cd2631cb8e0e0e6c18613d35ecd..c85684cb36f3f7b37c7462bc21270f9b4022298a 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -174,4 +174,10 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
 ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
         size_t completed_count, size_t estimated_total_items);
 
+// ABI warning
+ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
+
+// ABI warning
+ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
+
 #endif
-- 
2.54.0


From 9d66bda26421c2b687afc26122736515c9cc35da Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Tue, 17 Dec 2019 16:50:48 -0500
Subject: [PATCH 037/116] Fix spacing in main.cpp

---
 src/main.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main.cpp b/src/main.cpp
index 5c0a0b23fcf4f71adcfd4ad7aabf51773f65e8c8..ee2faa9a78ab43b60d4e337bfa17cc4a6c5fb342 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -789,7 +789,7 @@ int main(int argc, char **argv) {
             } else if (strcmp(arg, "-ffunction-sections") == 0) {
                 function_sections = true;
             } else if (strcmp(arg, "--show-subfeatures") == 0) {
-                    targets_show_subfeatures = true;
+                targets_show_subfeatures = true;
             } else if (i + 1 >= argc) {
                 fprintf(stderr, "Expected another argument after %s\n", arg);
                 return print_error_usage(arg0);
-- 
2.54.0


From c131e50ea7ea0fb95d188c3d0f71ef77bcc96952 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Fri, 20 Dec 2019 19:27:13 -0500
Subject: [PATCH 038/116] Switch CPU/features to simple format

---
 lib/std/target.zig                            |   78 +-
 lib/std/target/aarch64.zig                    | 2383 +++++++
 lib/std/target/amdgpu.zig                     | 2329 +++++++
 lib/std/target/arm.zig                        | 3595 +++++++++++
 lib/std/target/avr.zig                        | 5578 +++++++++++++++++
 lib/std/target/bpf.zig                        |   75 +
 lib/std/target/cpu.zig                        |   67 -
 lib/std/target/cpu/AArch64Cpu.zig             |  480 --
 lib/std/target/cpu/AmdGpuCpu.zig              | 1060 ----
 lib/std/target/cpu/ArmCpu.zig                 | 1230 ----
 lib/std/target/cpu/AvrCpu.zig                 | 3863 ------------
 lib/std/target/cpu/BpfCpu.zig                 |   29 -
 lib/std/target/cpu/HexagonCpu.zig             |  103 -
 lib/std/target/cpu/MipsCpu.zig                |  190 -
 lib/std/target/cpu/Msp430Cpu.zig              |   24 -
 lib/std/target/cpu/NvptxCpu.zig               |   85 -
 lib/std/target/cpu/PowerPcCpu.zig             |  451 --
 lib/std/target/cpu/RiscVCpu.zig               |   23 -
 lib/std/target/cpu/SparcCpu.zig               |  216 -
 lib/std/target/cpu/SystemZCpu.zig             |  279 -
 lib/std/target/cpu/WebAssemblyCpu.zig         |   28 -
 lib/std/target/cpu/X86Cpu.zig                 | 1864 ------
 lib/std/target/cpu/empty.zig                  |    6 -
 lib/std/target/feature.zig                    |   81 -
 lib/std/target/feature/AArch64Feature.zig     |  750 ---
 lib/std/target/feature/AmdGpuFeature.zig      |  343 -
 lib/std/target/feature/ArmFeature.zig         |  818 ---
 lib/std/target/feature/AvrFeature.zig         |  230 -
 lib/std/target/feature/BpfFeature.zig         |   17 -
 lib/std/target/feature/HexagonFeature.zig     |   76 -
 lib/std/target/feature/MipsFeature.zig        |  238 -
 lib/std/target/feature/Msp430Feature.zig      |   19 -
 lib/std/target/feature/NvptxFeature.zig       |   61 -
 lib/std/target/feature/PowerPcFeature.zig     |  163 -
 lib/std/target/feature/RiscVFeature.zig       |   31 -
 lib/std/target/feature/SparcFeature.zig       |   49 -
 lib/std/target/feature/SystemZFeature.zig     |   81 -
 lib/std/target/feature/WebAssemblyFeature.zig |   33 -
 lib/std/target/feature/X86Feature.zig         |  342 -
 lib/std/target/feature/empty.zig              |    5 -
 lib/std/target/hexagon.zig                    |  357 ++
 lib/std/target/mips.zig                       |  828 +++
 lib/std/target/msp430.zig                     |   69 +
 lib/std/target/nvptx.zig                      |  379 ++
 lib/std/target/powerpc.zig                    | 1115 ++++
 lib/std/target/riscv.zig                      |  109 +
 lib/std/target/sparc.zig                      |  581 ++
 lib/std/target/systemz.zig                    |  653 ++
 lib/std/target/wasm.zig                       |  128 +
 lib/std/target/x86.zig                        | 3427 ++++++++++
 src-self-hosted/stage1.zig                    |   88 +-
 51 files changed, 21721 insertions(+), 13386 deletions(-)
 create mode 100644 lib/std/target/aarch64.zig
 create mode 100644 lib/std/target/amdgpu.zig
 create mode 100644 lib/std/target/arm.zig
 create mode 100644 lib/std/target/avr.zig
 create mode 100644 lib/std/target/bpf.zig
 delete mode 100644 lib/std/target/cpu.zig
 delete mode 100644 lib/std/target/cpu/AArch64Cpu.zig
 delete mode 100644 lib/std/target/cpu/AmdGpuCpu.zig
 delete mode 100644 lib/std/target/cpu/ArmCpu.zig
 delete mode 100644 lib/std/target/cpu/AvrCpu.zig
 delete mode 100644 lib/std/target/cpu/BpfCpu.zig
 delete mode 100644 lib/std/target/cpu/HexagonCpu.zig
 delete mode 100644 lib/std/target/cpu/MipsCpu.zig
 delete mode 100644 lib/std/target/cpu/Msp430Cpu.zig
 delete mode 100644 lib/std/target/cpu/NvptxCpu.zig
 delete mode 100644 lib/std/target/cpu/PowerPcCpu.zig
 delete mode 100644 lib/std/target/cpu/RiscVCpu.zig
 delete mode 100644 lib/std/target/cpu/SparcCpu.zig
 delete mode 100644 lib/std/target/cpu/SystemZCpu.zig
 delete mode 100644 lib/std/target/cpu/WebAssemblyCpu.zig
 delete mode 100644 lib/std/target/cpu/X86Cpu.zig
 delete mode 100644 lib/std/target/cpu/empty.zig
 delete mode 100644 lib/std/target/feature.zig
 delete mode 100644 lib/std/target/feature/AArch64Feature.zig
 delete mode 100644 lib/std/target/feature/AmdGpuFeature.zig
 delete mode 100644 lib/std/target/feature/ArmFeature.zig
 delete mode 100644 lib/std/target/feature/AvrFeature.zig
 delete mode 100644 lib/std/target/feature/BpfFeature.zig
 delete mode 100644 lib/std/target/feature/HexagonFeature.zig
 delete mode 100644 lib/std/target/feature/MipsFeature.zig
 delete mode 100644 lib/std/target/feature/Msp430Feature.zig
 delete mode 100644 lib/std/target/feature/NvptxFeature.zig
 delete mode 100644 lib/std/target/feature/PowerPcFeature.zig
 delete mode 100644 lib/std/target/feature/RiscVFeature.zig
 delete mode 100644 lib/std/target/feature/SparcFeature.zig
 delete mode 100644 lib/std/target/feature/SystemZFeature.zig
 delete mode 100644 lib/std/target/feature/WebAssemblyFeature.zig
 delete mode 100644 lib/std/target/feature/X86Feature.zig
 delete mode 100644 lib/std/target/feature/empty.zig
 create mode 100644 lib/std/target/hexagon.zig
 create mode 100644 lib/std/target/mips.zig
 create mode 100644 lib/std/target/msp430.zig
 create mode 100644 lib/std/target/nvptx.zig
 create mode 100644 lib/std/target/powerpc.zig
 create mode 100644 lib/std/target/riscv.zig
 create mode 100644 lib/std/target/sparc.zig
 create mode 100644 lib/std/target/systemz.zig
 create mode 100644 lib/std/target/wasm.zig
 create mode 100644 lib/std/target/x86.zig

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 4d5de1fc85ead7369d7312405517c76d0913bfe3..c9113118101b9adac6f214ada9f00bae3ea66ff0 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -2,9 +2,6 @@ const std = @import("std.zig");
 const mem = std.mem;
 const builtin = std.builtin;
 
-pub const feature = @import("target/feature.zig");
-pub const cpu = @import("target/cpu.zig");
-
 /// TODO Nearly all the functions in this namespace would be
 /// better off if https://github.com/ziglang/zig/issues/425
 /// was solved.
@@ -844,3 +841,78 @@ pub const Target = union(enum) {
         return .unavailable;
     }
 };
+
+pub const aarch64 = @import("target/aarch64.zig");
+pub const amdgpu = @import("target/amdgpu.zig");
+pub const arm = @import("target/arm.zig");
+pub const avr = @import("target/avr.zig");
+pub const bpf = @import("target/bpf.zig");
+pub const hexagon = @import("target/hexagon.zig");
+pub const mips = @import("target/mips.zig");
+pub const msp430 = @import("target/msp430.zig");
+pub const nvptx = @import("target/nvptx.zig");
+pub const powerpc = @import("target/powerpc.zig");
+pub const riscv = @import("target/riscv.zig");
+pub const sparc = @import("target/sparc.zig");
+pub const systemz = @import("target/systemz.zig");
+pub const wasm = @import("target/wasm.zig");
+pub const x86 = @import("target/x86.zig");
+
+pub const Feature = struct {
+    name: []const u8,
+    description: []const u8,
+    llvm_name: []const u8,
+
+    subfeatures: []*const Feature,
+};
+
+pub const Cpu = struct {
+    name: []const u8,
+    llvm_name: []const u8,
+
+    subfeatures: []*const Feature,
+};
+
+pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => arm.features,
+        .aarch64, .aarch64_be, .aarch64_32 => aarch64.features,
+        .avr => avr.features,
+        .bpfel, .bpfeb => bpf.features,
+        .hexagon => hexagon.features,
+        .mips, .mipsel, .mips64, .mips64el => mips.features,
+        .msp430 => msp430.features,
+        .powerpc, .powerpc64, .powerpc64le => powerpc.features,
+        .amdgcn => amdgpu.features,
+        .riscv32, .riscv64 => riscv.features,
+        .sparc, .sparcv9, .sparcel => sparc.features,
+        .s390x => systemz.features,
+        .i386, .x86_64 => x86.features,
+        .nvptx, .nvptx64 => nvptx.features,
+        .wasm32, .wasm64 => wasm.features,
+
+        else => &[_]*const Feature{},
+    };
+}
+
+pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu {
+    return switch (arch) {
+        .arm, .armeb, .thumb, .thumbeb => arm.cpus,
+        .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus,
+        .avr => avr.cpus,
+        .bpfel, .bpfeb => bpf.cpus,
+        .hexagon => hexagon.cpus,
+        .mips, .mipsel, .mips64, .mips64el => mips.cpus,
+        .msp430 => msp430.cpus,
+        .powerpc, .powerpc64, .powerpc64le => powerpc.cpus,
+        .amdgcn => amdgpu.cpus,
+        .riscv32, .riscv64 => riscv.cpus,
+        .sparc, .sparcv9, .sparcel => sparc.cpus,
+        .s390x => systemz.cpus,
+        .i386, .x86_64 => x86.cpus,
+        .nvptx, .nvptx64 => nvptx.cpus,
+        .wasm32, .wasm64 => wasm.cpus,
+
+        else => &[_]*const Cpu{},
+    };
+}
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
new file mode 100644
index 0000000000000000000000000000000000000000..ca87c33bbbb7c1c0c213fb3591d3157859685c9c
--- /dev/null
+++ b/lib/std/target/aarch64.zig
@@ -0,0 +1,2383 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_aes = Feature{
+    .name = "aes",
+    .description = "Enable AES support",
+    .llvm_name = "aes",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_am = Feature{
+    .name = "am",
+    .description = "Enable v8.4-A Activity Monitors extension",
+    .llvm_name = "am",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_aggressiveFma = Feature{
+    .name = "aggressive-fma",
+    .description = "Enable Aggressive FMA for floating-point.",
+    .llvm_name = "aggressive-fma",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_altnzcv = Feature{
+    .name = "altnzcv",
+    .description = "Enable alternative NZCV format for floating point comparisons",
+    .llvm_name = "altnzcv",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_alternateSextloadCvtF32Pattern = Feature{
+    .name = "alternate-sextload-cvt-f32-pattern",
+    .description = "Use alternative pattern for sextload convert to f32",
+    .llvm_name = "alternate-sextload-cvt-f32-pattern",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_arithBccFusion = Feature{
+    .name = "arith-bcc-fusion",
+    .description = "CPU fuses arithmetic+bcc operations",
+    .llvm_name = "arith-bcc-fusion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_arithCbzFusion = Feature{
+    .name = "arith-cbz-fusion",
+    .description = "CPU fuses arithmetic + cbz/cbnz operations",
+    .llvm_name = "arith-cbz-fusion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_balanceFpOps = Feature{
+    .name = "balance-fp-ops",
+    .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
+    .llvm_name = "balance-fp-ops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bti = Feature{
+    .name = "bti",
+    .description = "Enable Branch Target Identification",
+    .llvm_name = "bti",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ccidx = Feature{
+    .name = "ccidx",
+    .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
+    .llvm_name = "ccidx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ccpp = Feature{
+    .name = "ccpp",
+    .description = "Enable v8.2 data Cache Clean to Point of Persistence",
+    .llvm_name = "ccpp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_crc = Feature{
+    .name = "crc",
+    .description = "Enable ARMv8 CRC-32 checksum instructions",
+    .llvm_name = "crc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ccdp = Feature{
+    .name = "ccdp",
+    .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
+    .llvm_name = "ccdp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX8 = Feature{
+    .name = "call-saved-x8",
+    .description = "Make X8 callee saved.",
+    .llvm_name = "call-saved-x8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX9 = Feature{
+    .name = "call-saved-x9",
+    .description = "Make X9 callee saved.",
+    .llvm_name = "call-saved-x9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX10 = Feature{
+    .name = "call-saved-x10",
+    .description = "Make X10 callee saved.",
+    .llvm_name = "call-saved-x10",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX11 = Feature{
+    .name = "call-saved-x11",
+    .description = "Make X11 callee saved.",
+    .llvm_name = "call-saved-x11",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX12 = Feature{
+    .name = "call-saved-x12",
+    .description = "Make X12 callee saved.",
+    .llvm_name = "call-saved-x12",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX13 = Feature{
+    .name = "call-saved-x13",
+    .description = "Make X13 callee saved.",
+    .llvm_name = "call-saved-x13",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX14 = Feature{
+    .name = "call-saved-x14",
+    .description = "Make X14 callee saved.",
+    .llvm_name = "call-saved-x14",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX15 = Feature{
+    .name = "call-saved-x15",
+    .description = "Make X15 callee saved.",
+    .llvm_name = "call-saved-x15",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_callSavedX18 = Feature{
+    .name = "call-saved-x18",
+    .description = "Make X18 callee saved.",
+    .llvm_name = "call-saved-x18",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_complxnum = Feature{
+    .name = "complxnum",
+    .description = "Enable v8.3-A Floating-point complex number support",
+    .llvm_name = "complxnum",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_crypto = Feature{
+    .name = "crypto",
+    .description = "Enable cryptographic instructions",
+    .llvm_name = "crypto",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_customCheapAsMove = Feature{
+    .name = "custom-cheap-as-move",
+    .description = "Use custom handling of cheap instructions",
+    .llvm_name = "custom-cheap-as-move",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dit = Feature{
+    .name = "dit",
+    .description = "Enable v8.4-A Data Independent Timing instructions",
+    .llvm_name = "dit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_disableLatencySchedHeuristic = Feature{
+    .name = "disable-latency-sched-heuristic",
+    .description = "Disable latency scheduling heuristic",
+    .llvm_name = "disable-latency-sched-heuristic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dotprod = Feature{
+    .name = "dotprod",
+    .description = "Enable dot product support",
+    .llvm_name = "dotprod",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ete = Feature{
+    .name = "ete",
+    .description = "Enable Embedded Trace Extension",
+    .llvm_name = "ete",
+    .subfeatures = &[_]*const Feature {
+        &feature_trbe,
+    },
+};
+
+pub const feature_exynosCheapAsMove = Feature{
+    .name = "exynos-cheap-as-move",
+    .description = "Use Exynos specific handling of cheap instructions",
+    .llvm_name = "exynos-cheap-as-move",
+    .subfeatures = &[_]*const Feature {
+        &feature_customCheapAsMove,
+    },
+};
+
+pub const feature_fmi = Feature{
+    .name = "fmi",
+    .description = "Enable v8.4-A Flag Manipulation Instructions",
+    .llvm_name = "fmi",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp16fml = Feature{
+    .name = "fp16fml",
+    .description = "Enable FP16 FML instructions",
+    .llvm_name = "fp16fml",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_fpArmv8 = Feature{
+    .name = "fp-armv8",
+    .description = "Enable ARMv8 FP",
+    .llvm_name = "fp-armv8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fptoint = Feature{
+    .name = "fptoint",
+    .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
+    .llvm_name = "fptoint",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_force32bitJumpTables = Feature{
+    .name = "force-32bit-jump-tables",
+    .description = "Force jump table entries to be 32-bits wide except at MinSize",
+    .llvm_name = "force-32bit-jump-tables",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fullfp16 = Feature{
+    .name = "fullfp16",
+    .description = "Full FP16",
+    .llvm_name = "fullfp16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_fuseAes = Feature{
+    .name = "fuse-aes",
+    .description = "CPU fuses AES crypto operations",
+    .llvm_name = "fuse-aes",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseAddress = Feature{
+    .name = "fuse-address",
+    .description = "CPU fuses address generation and memory operations",
+    .llvm_name = "fuse-address",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseArithLogic = Feature{
+    .name = "fuse-arith-logic",
+    .description = "CPU fuses arithmetic and logic operations",
+    .llvm_name = "fuse-arith-logic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseCsel = Feature{
+    .name = "fuse-csel",
+    .description = "CPU fuses conditional select operations",
+    .llvm_name = "fuse-csel",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseCryptoEor = Feature{
+    .name = "fuse-crypto-eor",
+    .description = "CPU fuses AES/PMULL and EOR operations",
+    .llvm_name = "fuse-crypto-eor",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseLiterals = Feature{
+    .name = "fuse-literals",
+    .description = "CPU fuses literal generation operations",
+    .llvm_name = "fuse-literals",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_jsconv = Feature{
+    .name = "jsconv",
+    .description = "Enable v8.3-A JavaScript FP conversion enchancement",
+    .llvm_name = "jsconv",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_lor = Feature{
+    .name = "lor",
+    .description = "Enables ARM v8.1 Limited Ordering Regions extension",
+    .llvm_name = "lor",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lse = Feature{
+    .name = "lse",
+    .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
+    .llvm_name = "lse",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lslFast = Feature{
+    .name = "lsl-fast",
+    .description = "CPU has a fastpath logical shift of up to 3 places",
+    .llvm_name = "lsl-fast",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mpam = Feature{
+    .name = "mpam",
+    .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
+    .llvm_name = "mpam",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mte = Feature{
+    .name = "mte",
+    .description = "Enable Memory Tagging Extension",
+    .llvm_name = "mte",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_neon = Feature{
+    .name = "neon",
+    .description = "Enable Advanced SIMD instructions",
+    .llvm_name = "neon",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_nv = Feature{
+    .name = "nv",
+    .description = "Enable v8.4-A Nested Virtualization Enchancement",
+    .llvm_name = "nv",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noNegImmediates = Feature{
+    .name = "no-neg-immediates",
+    .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
+    .llvm_name = "no-neg-immediates",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_pa = Feature{
+    .name = "pa",
+    .description = "Enable v8.3-A Pointer Authentication enchancement",
+    .llvm_name = "pa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_pan = Feature{
+    .name = "pan",
+    .description = "Enables ARM v8.1 Privileged Access-Never extension",
+    .llvm_name = "pan",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_panRwv = Feature{
+    .name = "pan-rwv",
+    .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
+    .llvm_name = "pan-rwv",
+    .subfeatures = &[_]*const Feature {
+        &feature_pan,
+    },
+};
+
+pub const feature_perfmon = Feature{
+    .name = "perfmon",
+    .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
+    .llvm_name = "perfmon",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_usePostraScheduler = Feature{
+    .name = "use-postra-scheduler",
+    .description = "Schedule again after register allocation",
+    .llvm_name = "use-postra-scheduler",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_predres = Feature{
+    .name = "predres",
+    .description = "Enable v8.5a execution and data prediction invalidation instructions",
+    .llvm_name = "predres",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_predictableSelectExpensive = Feature{
+    .name = "predictable-select-expensive",
+    .description = "Prefer likely predicted branches over selects",
+    .llvm_name = "predictable-select-expensive",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_uaops = Feature{
+    .name = "uaops",
+    .description = "Enable v8.2 UAO PState",
+    .llvm_name = "uaops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ras = Feature{
+    .name = "ras",
+    .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
+    .llvm_name = "ras",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rasv8_4 = Feature{
+    .name = "rasv8_4",
+    .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
+    .llvm_name = "rasv8_4",
+    .subfeatures = &[_]*const Feature {
+        &feature_ras,
+    },
+};
+
+pub const feature_rcpc = Feature{
+    .name = "rcpc",
+    .description = "Enable support for RCPC extension",
+    .llvm_name = "rcpc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rcpcImmo = Feature{
+    .name = "rcpc-immo",
+    .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
+    .llvm_name = "rcpc-immo",
+    .subfeatures = &[_]*const Feature {
+        &feature_rcpc,
+    },
+};
+
+pub const feature_rdm = Feature{
+    .name = "rdm",
+    .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
+    .llvm_name = "rdm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rand = Feature{
+    .name = "rand",
+    .description = "Enable Random Number generation instructions",
+    .llvm_name = "rand",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX1 = Feature{
+    .name = "reserve-x1",
+    .description = "Reserve X1, making it unavailable as a GPR",
+    .llvm_name = "reserve-x1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX2 = Feature{
+    .name = "reserve-x2",
+    .description = "Reserve X2, making it unavailable as a GPR",
+    .llvm_name = "reserve-x2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX3 = Feature{
+    .name = "reserve-x3",
+    .description = "Reserve X3, making it unavailable as a GPR",
+    .llvm_name = "reserve-x3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX4 = Feature{
+    .name = "reserve-x4",
+    .description = "Reserve X4, making it unavailable as a GPR",
+    .llvm_name = "reserve-x4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX5 = Feature{
+    .name = "reserve-x5",
+    .description = "Reserve X5, making it unavailable as a GPR",
+    .llvm_name = "reserve-x5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX6 = Feature{
+    .name = "reserve-x6",
+    .description = "Reserve X6, making it unavailable as a GPR",
+    .llvm_name = "reserve-x6",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX7 = Feature{
+    .name = "reserve-x7",
+    .description = "Reserve X7, making it unavailable as a GPR",
+    .llvm_name = "reserve-x7",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX9 = Feature{
+    .name = "reserve-x9",
+    .description = "Reserve X9, making it unavailable as a GPR",
+    .llvm_name = "reserve-x9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX10 = Feature{
+    .name = "reserve-x10",
+    .description = "Reserve X10, making it unavailable as a GPR",
+    .llvm_name = "reserve-x10",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX11 = Feature{
+    .name = "reserve-x11",
+    .description = "Reserve X11, making it unavailable as a GPR",
+    .llvm_name = "reserve-x11",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX12 = Feature{
+    .name = "reserve-x12",
+    .description = "Reserve X12, making it unavailable as a GPR",
+    .llvm_name = "reserve-x12",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX13 = Feature{
+    .name = "reserve-x13",
+    .description = "Reserve X13, making it unavailable as a GPR",
+    .llvm_name = "reserve-x13",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX14 = Feature{
+    .name = "reserve-x14",
+    .description = "Reserve X14, making it unavailable as a GPR",
+    .llvm_name = "reserve-x14",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX15 = Feature{
+    .name = "reserve-x15",
+    .description = "Reserve X15, making it unavailable as a GPR",
+    .llvm_name = "reserve-x15",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX18 = Feature{
+    .name = "reserve-x18",
+    .description = "Reserve X18, making it unavailable as a GPR",
+    .llvm_name = "reserve-x18",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX20 = Feature{
+    .name = "reserve-x20",
+    .description = "Reserve X20, making it unavailable as a GPR",
+    .llvm_name = "reserve-x20",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX21 = Feature{
+    .name = "reserve-x21",
+    .description = "Reserve X21, making it unavailable as a GPR",
+    .llvm_name = "reserve-x21",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX22 = Feature{
+    .name = "reserve-x22",
+    .description = "Reserve X22, making it unavailable as a GPR",
+    .llvm_name = "reserve-x22",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX23 = Feature{
+    .name = "reserve-x23",
+    .description = "Reserve X23, making it unavailable as a GPR",
+    .llvm_name = "reserve-x23",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX24 = Feature{
+    .name = "reserve-x24",
+    .description = "Reserve X24, making it unavailable as a GPR",
+    .llvm_name = "reserve-x24",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX25 = Feature{
+    .name = "reserve-x25",
+    .description = "Reserve X25, making it unavailable as a GPR",
+    .llvm_name = "reserve-x25",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX26 = Feature{
+    .name = "reserve-x26",
+    .description = "Reserve X26, making it unavailable as a GPR",
+    .llvm_name = "reserve-x26",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX27 = Feature{
+    .name = "reserve-x27",
+    .description = "Reserve X27, making it unavailable as a GPR",
+    .llvm_name = "reserve-x27",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveX28 = Feature{
+    .name = "reserve-x28",
+    .description = "Reserve X28, making it unavailable as a GPR",
+    .llvm_name = "reserve-x28",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sb = Feature{
+    .name = "sb",
+    .description = "Enable v8.5 Speculation Barrier",
+    .llvm_name = "sb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sel2 = Feature{
+    .name = "sel2",
+    .description = "Enable v8.4-A Secure Exception Level 2 extension",
+    .llvm_name = "sel2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sha2 = Feature{
+    .name = "sha2",
+    .description = "Enable SHA1 and SHA256 support",
+    .llvm_name = "sha2",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_sha3 = Feature{
+    .name = "sha3",
+    .description = "Enable SHA512 and SHA3 support",
+    .llvm_name = "sha3",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_sm4 = Feature{
+    .name = "sm4",
+    .description = "Enable SM3 and SM4 support",
+    .llvm_name = "sm4",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+    },
+};
+
+pub const feature_spe = Feature{
+    .name = "spe",
+    .description = "Enable Statistical Profiling extension",
+    .llvm_name = "spe",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ssbs = Feature{
+    .name = "ssbs",
+    .description = "Enable Speculative Store Bypass Safe bit",
+    .llvm_name = "ssbs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sve = Feature{
+    .name = "sve",
+    .description = "Enable Scalable Vector Extension (SVE) instructions",
+    .llvm_name = "sve",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sve2 = Feature{
+    .name = "sve2",
+    .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
+    .llvm_name = "sve2",
+    .subfeatures = &[_]*const Feature {
+        &feature_sve,
+    },
+};
+
+pub const feature_sve2Aes = Feature{
+    .name = "sve2-aes",
+    .description = "Enable AES SVE2 instructions",
+    .llvm_name = "sve2-aes",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_sve,
+    },
+};
+
+pub const feature_sve2Bitperm = Feature{
+    .name = "sve2-bitperm",
+    .description = "Enable bit permutation SVE2 instructions",
+    .llvm_name = "sve2-bitperm",
+    .subfeatures = &[_]*const Feature {
+        &feature_sve,
+    },
+};
+
+pub const feature_sve2Sha3 = Feature{
+    .name = "sve2-sha3",
+    .description = "Enable SHA3 SVE2 instructions",
+    .llvm_name = "sve2-sha3",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_sve,
+    },
+};
+
+pub const feature_sve2Sm4 = Feature{
+    .name = "sve2-sm4",
+    .description = "Enable SM4 SVE2 instructions",
+    .llvm_name = "sve2-sm4",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_sve,
+    },
+};
+
+pub const feature_slowMisaligned128store = Feature{
+    .name = "slow-misaligned-128store",
+    .description = "Misaligned 128 bit stores are slow",
+    .llvm_name = "slow-misaligned-128store",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowPaired128 = Feature{
+    .name = "slow-paired-128",
+    .description = "Paired 128 bit loads and stores are slow",
+    .llvm_name = "slow-paired-128",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowStrqroStore = Feature{
+    .name = "slow-strqro-store",
+    .description = "STR of Q register with register offset is slow",
+    .llvm_name = "slow-strqro-store",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_specrestrict = Feature{
+    .name = "specrestrict",
+    .description = "Enable architectural speculation restriction",
+    .llvm_name = "specrestrict",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_strictAlign = Feature{
+    .name = "strict-align",
+    .description = "Disallow all unaligned memory access",
+    .llvm_name = "strict-align",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tlbRmi = Feature{
+    .name = "tlb-rmi",
+    .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
+    .llvm_name = "tlb-rmi",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tme = Feature{
+    .name = "tme",
+    .description = "Enable Transactional Memory Extension",
+    .llvm_name = "tme",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tracev84 = Feature{
+    .name = "tracev8.4",
+    .description = "Enable v8.4-A Trace extension",
+    .llvm_name = "tracev8.4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_trbe = Feature{
+    .name = "trbe",
+    .description = "Enable Trace Buffer Extension",
+    .llvm_name = "trbe",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_taggedGlobals = Feature{
+    .name = "tagged-globals",
+    .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
+    .llvm_name = "tagged-globals",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useAa = Feature{
+    .name = "use-aa",
+    .description = "Use alias analysis during codegen",
+    .llvm_name = "use-aa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tpidrEl1 = Feature{
+    .name = "tpidr-el1",
+    .description = "Permit use of TPIDR_EL1 for the TLS base",
+    .llvm_name = "tpidr-el1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tpidrEl2 = Feature{
+    .name = "tpidr-el2",
+    .description = "Permit use of TPIDR_EL2 for the TLS base",
+    .llvm_name = "tpidr-el2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tpidrEl3 = Feature{
+    .name = "tpidr-el3",
+    .description = "Permit use of TPIDR_EL3 for the TLS base",
+    .llvm_name = "tpidr-el3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useReciprocalSquareRoot = Feature{
+    .name = "use-reciprocal-square-root",
+    .description = "Use the reciprocal square root approximation",
+    .llvm_name = "use-reciprocal-square-root",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vh = Feature{
+    .name = "vh",
+    .description = "Enables ARM v8.1 Virtual Host extension",
+    .llvm_name = "vh",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_zcm = Feature{
+    .name = "zcm",
+    .description = "Has zero-cycle register moves",
+    .llvm_name = "zcm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_zcz = Feature{
+    .name = "zcz",
+    .description = "Has zero-cycle zeroing instructions",
+    .llvm_name = "zcz",
+    .subfeatures = &[_]*const Feature {
+        &feature_zczGp,
+        &feature_zczFp,
+    },
+};
+
+pub const feature_zczFp = Feature{
+    .name = "zcz-fp",
+    .description = "Has zero-cycle zeroing instructions for FP registers",
+    .llvm_name = "zcz-fp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_zczFpWorkaround = Feature{
+    .name = "zcz-fp-workaround",
+    .description = "The zero-cycle floating-point zeroing instruction has a bug",
+    .llvm_name = "zcz-fp-workaround",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_zczGp = Feature{
+    .name = "zcz-gp",
+    .description = "Has zero-cycle zeroing instructions for generic registers",
+    .llvm_name = "zcz-gp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v81a = Feature{
+    .name = "v8.1a",
+    .description = "Support ARM v8.1a instructions",
+    .llvm_name = "v8.1a",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_lse,
+        &feature_lor,
+        &feature_crc,
+        &feature_pan,
+        &feature_vh,
+    },
+};
+
+pub const feature_v82a = Feature{
+    .name = "v8.2a",
+    .description = "Support ARM v8.2a instructions",
+    .llvm_name = "v8.2a",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_ras,
+        &feature_lor,
+        &feature_crc,
+        &feature_pan,
+        &feature_uaops,
+        &feature_vh,
+    },
+};
+
+pub const feature_v83a = Feature{
+    .name = "v8.3a",
+    .description = "Support ARM v8.3a instructions",
+    .llvm_name = "v8.3a",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_pa,
+        &feature_ccpp,
+        &feature_uaops,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_ccidx,
+        &feature_vh,
+    },
+};
+
+pub const feature_v84a = Feature{
+    .name = "v8.4a",
+    .description = "Support ARM v8.4a instructions",
+    .llvm_name = "v8.4a",
+    .subfeatures = &[_]*const Feature {
+        &feature_am,
+        &feature_nv,
+        &feature_ccpp,
+        &feature_dotprod,
+        &feature_lse,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ccidx,
+        &feature_vh,
+        &feature_tracev84,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_dit,
+        &feature_mpam,
+        &feature_ras,
+        &feature_tlbRmi,
+        &feature_fmi,
+        &feature_crc,
+        &feature_pa,
+        &feature_sel2,
+        &feature_lor,
+        &feature_pan,
+    },
+};
+
+pub const feature_v85a = Feature{
+    .name = "v8.5a",
+    .description = "Support ARM v8.5a instructions",
+    .llvm_name = "v8.5a",
+    .subfeatures = &[_]*const Feature {
+        &feature_am,
+        &feature_nv,
+        &feature_specrestrict,
+        &feature_ccpp,
+        &feature_dotprod,
+        &feature_lse,
+        &feature_ccdp,
+        &feature_sb,
+        &feature_rcpc,
+        &feature_ccidx,
+        &feature_uaops,
+        &feature_vh,
+        &feature_altnzcv,
+        &feature_tracev84,
+        &feature_rdm,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_dit,
+        &feature_mpam,
+        &feature_ras,
+        &feature_tlbRmi,
+        &feature_fmi,
+        &feature_crc,
+        &feature_predres,
+        &feature_pa,
+        &feature_sel2,
+        &feature_lor,
+        &feature_fptoint,
+        &feature_bti,
+        &feature_pan,
+    },
+};
+
+pub const feature_a35 = Feature{
+    .name = "a35",
+    .description = "Cortex-A35 ARM processors",
+    .llvm_name = "a35",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+    },
+};
+
+pub const feature_a53 = Feature{
+    .name = "a53",
+    .description = "Cortex-A53 ARM processors",
+    .llvm_name = "a53",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_balanceFpOps,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_useAa,
+        &feature_crc,
+    },
+};
+
+pub const feature_a55 = Feature{
+    .name = "a55",
+    .description = "Cortex-A55 ARM processors",
+    .llvm_name = "a55",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+    },
+};
+
+pub const feature_a57 = Feature{
+    .name = "a57",
+    .description = "Cortex-A57 ARM processors",
+    .llvm_name = "a57",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_balanceFpOps,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_fuseLiterals,
+        &feature_crc,
+    },
+};
+
+pub const feature_a65 = Feature{
+    .name = "a65",
+    .description = "Cortex-A65 ARM processors",
+    .llvm_name = "a65",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+    },
+};
+
+pub const feature_a72 = Feature{
+    .name = "a72",
+    .description = "Cortex-A72 ARM processors",
+    .llvm_name = "a72",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseAes,
+    },
+};
+
+pub const feature_a73 = Feature{
+    .name = "a73",
+    .description = "Cortex-A73 ARM processors",
+    .llvm_name = "a73",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseAes,
+    },
+};
+
+pub const feature_a75 = Feature{
+    .name = "a75",
+    .description = "Cortex-A75 ARM processors",
+    .llvm_name = "a75",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+    },
+};
+
+pub const feature_a76 = Feature{
+    .name = "a76",
+    .description = "Cortex-A76 ARM processors",
+    .llvm_name = "a76",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+    },
+};
+
+pub const feature_cyclone = Feature{
+    .name = "cyclone",
+    .description = "Cyclone",
+    .llvm_name = "cyclone",
+    .subfeatures = &[_]*const Feature {
+        &feature_zczGp,
+        &feature_arithBccFusion,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_zczFpWorkaround,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zcm,
+        &feature_arithCbzFusion,
+        &feature_fuseCryptoEor,
+        &feature_alternateSextloadCvtF32Pattern,
+    },
+};
+
+pub const feature_exynosm1 = Feature{
+    .name = "exynosm1",
+    .description = "Samsung Exynos-M1 processors",
+    .llvm_name = "exynosm1",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_slowPaired128,
+        &feature_useReciprocalSquareRoot,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+    },
+};
+
+pub const feature_exynosm2 = Feature{
+    .name = "exynosm2",
+    .description = "Samsung Exynos-M2 processors",
+    .llvm_name = "exynosm2",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_slowPaired128,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+    },
+};
+
+pub const feature_exynosm3 = Feature{
+    .name = "exynosm3",
+    .description = "Samsung Exynos-M3 processors",
+    .llvm_name = "exynosm3",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_fuseLiterals,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+        &feature_lslFast,
+        &feature_fuseCsel,
+    },
+};
+
+pub const feature_exynosm4 = Feature{
+    .name = "exynosm4",
+    .description = "Samsung Exynos-M4 processors",
+    .llvm_name = "exynosm4",
+    .subfeatures = &[_]*const Feature {
+        &feature_ccpp,
+        &feature_perfmon,
+        &feature_dotprod,
+        &feature_fuseArithLogic,
+        &feature_force32bitJumpTables,
+        &feature_lslFast,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_lse,
+        &feature_arithCbzFusion,
+        &feature_uaops,
+        &feature_fuseCsel,
+        &feature_vh,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_fuseLiterals,
+        &feature_crc,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
+        &feature_zczFp,
+        &feature_lor,
+        &feature_pan,
+    },
+};
+
+pub const feature_falkor = Feature{
+    .name = "falkor",
+    .description = "Qualcomm Falkor processors",
+    .llvm_name = "falkor",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_zczGp,
+        &feature_slowStrqroStore,
+        &feature_customCheapAsMove,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_crc,
+        &feature_lslFast,
+    },
+};
+
+pub const feature_kryo = Feature{
+    .name = "kryo",
+    .description = "Qualcomm Kryo processors",
+    .llvm_name = "kryo",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_crc,
+        &feature_lslFast,
+    },
+};
+
+pub const feature_neoversee1 = Feature{
+    .name = "neoversee1",
+    .description = "Neoverse E1 ARM processors",
+    .llvm_name = "neoversee1",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+    },
+};
+
+pub const feature_neoversen1 = Feature{
+    .name = "neoversen1",
+    .description = "Neoverse N1 ARM processors",
+    .llvm_name = "neoversen1",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_spe,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+    },
+};
+
+pub const feature_saphira = Feature{
+    .name = "saphira",
+    .description = "Qualcomm Saphira processors",
+    .llvm_name = "saphira",
+    .subfeatures = &[_]*const Feature {
+        &feature_am,
+        &feature_nv,
+        &feature_ccpp,
+        &feature_predictableSelectExpensive,
+        &feature_perfmon,
+        &feature_dotprod,
+        &feature_spe,
+        &feature_lslFast,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_lse,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ccidx,
+        &feature_vh,
+        &feature_tracev84,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_dit,
+        &feature_mpam,
+        &feature_ras,
+        &feature_tlbRmi,
+        &feature_fmi,
+        &feature_crc,
+        &feature_usePostraScheduler,
+        &feature_pa,
+        &feature_zczFp,
+        &feature_sel2,
+        &feature_lor,
+        &feature_pan,
+    },
+};
+
+pub const feature_tsv110 = Feature{
+    .name = "tsv110",
+    .description = "HiSilicon TS-V110 processors",
+    .llvm_name = "tsv110",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_spe,
+        &feature_crc,
+        &feature_pan,
+        &feature_uaops,
+        &feature_vh,
+    },
+};
+
+pub const feature_thunderx = Feature{
+    .name = "thunderx",
+    .description = "Cavium ThunderX processors",
+    .llvm_name = "thunderx",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+    },
+};
+
+pub const feature_thunderx2t99 = Feature{
+    .name = "thunderx2t99",
+    .description = "Cavium ThunderX2 processors",
+    .llvm_name = "thunderx2t99",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_predictableSelectExpensive,
+        &feature_lor,
+        &feature_crc,
+        &feature_pan,
+        &feature_aggressiveFma,
+        &feature_vh,
+    },
+};
+
+pub const feature_thunderxt81 = Feature{
+    .name = "thunderxt81",
+    .description = "Cavium ThunderX processors",
+    .llvm_name = "thunderxt81",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+    },
+};
+
+pub const feature_thunderxt83 = Feature{
+    .name = "thunderxt83",
+    .description = "Cavium ThunderX processors",
+    .llvm_name = "thunderxt83",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+    },
+};
+
+pub const feature_thunderxt88 = Feature{
+    .name = "thunderxt88",
+    .description = "Cavium ThunderX processors",
+    .llvm_name = "thunderxt88",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_aes,
+    &feature_am,
+    &feature_aggressiveFma,
+    &feature_altnzcv,
+    &feature_alternateSextloadCvtF32Pattern,
+    &feature_arithBccFusion,
+    &feature_arithCbzFusion,
+    &feature_balanceFpOps,
+    &feature_bti,
+    &feature_ccidx,
+    &feature_ccpp,
+    &feature_crc,
+    &feature_ccdp,
+    &feature_callSavedX8,
+    &feature_callSavedX9,
+    &feature_callSavedX10,
+    &feature_callSavedX11,
+    &feature_callSavedX12,
+    &feature_callSavedX13,
+    &feature_callSavedX14,
+    &feature_callSavedX15,
+    &feature_callSavedX18,
+    &feature_complxnum,
+    &feature_crypto,
+    &feature_customCheapAsMove,
+    &feature_dit,
+    &feature_disableLatencySchedHeuristic,
+    &feature_dotprod,
+    &feature_ete,
+    &feature_exynosCheapAsMove,
+    &feature_fmi,
+    &feature_fp16fml,
+    &feature_fpArmv8,
+    &feature_fptoint,
+    &feature_force32bitJumpTables,
+    &feature_fullfp16,
+    &feature_fuseAes,
+    &feature_fuseAddress,
+    &feature_fuseArithLogic,
+    &feature_fuseCsel,
+    &feature_fuseCryptoEor,
+    &feature_fuseLiterals,
+    &feature_jsconv,
+    &feature_lor,
+    &feature_lse,
+    &feature_lslFast,
+    &feature_mpam,
+    &feature_mte,
+    &feature_neon,
+    &feature_nv,
+    &feature_noNegImmediates,
+    &feature_pa,
+    &feature_pan,
+    &feature_panRwv,
+    &feature_perfmon,
+    &feature_usePostraScheduler,
+    &feature_predres,
+    &feature_predictableSelectExpensive,
+    &feature_uaops,
+    &feature_ras,
+    &feature_rasv8_4,
+    &feature_rcpc,
+    &feature_rcpcImmo,
+    &feature_rdm,
+    &feature_rand,
+    &feature_reserveX1,
+    &feature_reserveX2,
+    &feature_reserveX3,
+    &feature_reserveX4,
+    &feature_reserveX5,
+    &feature_reserveX6,
+    &feature_reserveX7,
+    &feature_reserveX9,
+    &feature_reserveX10,
+    &feature_reserveX11,
+    &feature_reserveX12,
+    &feature_reserveX13,
+    &feature_reserveX14,
+    &feature_reserveX15,
+    &feature_reserveX18,
+    &feature_reserveX20,
+    &feature_reserveX21,
+    &feature_reserveX22,
+    &feature_reserveX23,
+    &feature_reserveX24,
+    &feature_reserveX25,
+    &feature_reserveX26,
+    &feature_reserveX27,
+    &feature_reserveX28,
+    &feature_sb,
+    &feature_sel2,
+    &feature_sha2,
+    &feature_sha3,
+    &feature_sm4,
+    &feature_spe,
+    &feature_ssbs,
+    &feature_sve,
+    &feature_sve2,
+    &feature_sve2Aes,
+    &feature_sve2Bitperm,
+    &feature_sve2Sha3,
+    &feature_sve2Sm4,
+    &feature_slowMisaligned128store,
+    &feature_slowPaired128,
+    &feature_slowStrqroStore,
+    &feature_specrestrict,
+    &feature_strictAlign,
+    &feature_tlbRmi,
+    &feature_tme,
+    &feature_tracev84,
+    &feature_trbe,
+    &feature_taggedGlobals,
+    &feature_useAa,
+    &feature_tpidrEl1,
+    &feature_tpidrEl2,
+    &feature_tpidrEl3,
+    &feature_useReciprocalSquareRoot,
+    &feature_vh,
+    &feature_zcm,
+    &feature_zcz,
+    &feature_zczFp,
+    &feature_zczFpWorkaround,
+    &feature_zczGp,
+    &feature_v81a,
+    &feature_v82a,
+    &feature_v83a,
+    &feature_v84a,
+    &feature_v85a,
+    &feature_a35,
+    &feature_a53,
+    &feature_a55,
+    &feature_a57,
+    &feature_a65,
+    &feature_a72,
+    &feature_a73,
+    &feature_a75,
+    &feature_a76,
+    &feature_cyclone,
+    &feature_exynosm1,
+    &feature_exynosm2,
+    &feature_exynosm3,
+    &feature_exynosm4,
+    &feature_falkor,
+    &feature_kryo,
+    &feature_neoversee1,
+    &feature_neoversen1,
+    &feature_saphira,
+    &feature_tsv110,
+    &feature_thunderx,
+    &feature_thunderx2t99,
+    &feature_thunderxt81,
+    &feature_thunderxt83,
+    &feature_thunderxt88,
+};
+
+pub const cpu_appleLatest = Cpu{
+    .name = "apple-latest",
+    .llvm_name = "apple-latest",
+    .subfeatures = &[_]*const Feature {
+        &feature_zczGp,
+        &feature_arithBccFusion,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_zczFpWorkaround,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zcm,
+        &feature_arithCbzFusion,
+        &feature_fuseCryptoEor,
+        &feature_alternateSextloadCvtF32Pattern,
+        &feature_cyclone,
+    },
+};
+
+pub const cpu_cortexA35 = Cpu{
+    .name = "cortex-a35",
+    .llvm_name = "cortex-a35",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_a35,
+    },
+};
+
+pub const cpu_cortexA53 = Cpu{
+    .name = "cortex-a53",
+    .llvm_name = "cortex-a53",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_balanceFpOps,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_useAa,
+        &feature_crc,
+        &feature_a53,
+    },
+};
+
+pub const cpu_cortexA55 = Cpu{
+    .name = "cortex-a55",
+    .llvm_name = "cortex-a55",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_a55,
+    },
+};
+
+pub const cpu_cortexA57 = Cpu{
+    .name = "cortex-a57",
+    .llvm_name = "cortex-a57",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_balanceFpOps,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_fuseLiterals,
+        &feature_crc,
+        &feature_a57,
+    },
+};
+
+pub const cpu_cortexA65 = Cpu{
+    .name = "cortex-a65",
+    .llvm_name = "cortex-a65",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_a65,
+    },
+};
+
+pub const cpu_cortexA65ae = Cpu{
+    .name = "cortex-a65ae",
+    .llvm_name = "cortex-a65ae",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_a65,
+    },
+};
+
+pub const cpu_cortexA72 = Cpu{
+    .name = "cortex-a72",
+    .llvm_name = "cortex-a72",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseAes,
+        &feature_a72,
+    },
+};
+
+pub const cpu_cortexA73 = Cpu{
+    .name = "cortex-a73",
+    .llvm_name = "cortex-a73",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseAes,
+        &feature_a73,
+    },
+};
+
+pub const cpu_cortexA75 = Cpu{
+    .name = "cortex-a75",
+    .llvm_name = "cortex-a75",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_a75,
+    },
+};
+
+pub const cpu_cortexA76 = Cpu{
+    .name = "cortex-a76",
+    .llvm_name = "cortex-a76",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_a76,
+    },
+};
+
+pub const cpu_cortexA76ae = Cpu{
+    .name = "cortex-a76ae",
+    .llvm_name = "cortex-a76ae",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_a76,
+    },
+};
+
+pub const cpu_cyclone = Cpu{
+    .name = "cyclone",
+    .llvm_name = "cyclone",
+    .subfeatures = &[_]*const Feature {
+        &feature_zczGp,
+        &feature_arithBccFusion,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_zczFpWorkaround,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zcm,
+        &feature_arithCbzFusion,
+        &feature_fuseCryptoEor,
+        &feature_alternateSextloadCvtF32Pattern,
+        &feature_cyclone,
+    },
+};
+
+pub const cpu_exynosM1 = Cpu{
+    .name = "exynos-m1",
+    .llvm_name = "exynos-m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_slowPaired128,
+        &feature_useReciprocalSquareRoot,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+        &feature_exynosm1,
+    },
+};
+
+pub const cpu_exynosM2 = Cpu{
+    .name = "exynos-m2",
+    .llvm_name = "exynos-m2",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_slowPaired128,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+        &feature_exynosm2,
+    },
+};
+
+pub const cpu_exynosM3 = Cpu{
+    .name = "exynos-m3",
+    .llvm_name = "exynos-m3",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_fuseLiterals,
+        &feature_force32bitJumpTables,
+        &feature_crc,
+        &feature_lslFast,
+        &feature_fuseCsel,
+        &feature_exynosm3,
+    },
+};
+
+pub const cpu_exynosM4 = Cpu{
+    .name = "exynos-m4",
+    .llvm_name = "exynos-m4",
+    .subfeatures = &[_]*const Feature {
+        &feature_ccpp,
+        &feature_perfmon,
+        &feature_dotprod,
+        &feature_fuseArithLogic,
+        &feature_force32bitJumpTables,
+        &feature_lslFast,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_lse,
+        &feature_arithCbzFusion,
+        &feature_uaops,
+        &feature_fuseCsel,
+        &feature_vh,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_fuseLiterals,
+        &feature_crc,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
+        &feature_zczFp,
+        &feature_lor,
+        &feature_pan,
+        &feature_exynosm4,
+    },
+};
+
+pub const cpu_exynosM5 = Cpu{
+    .name = "exynos-m5",
+    .llvm_name = "exynos-m5",
+    .subfeatures = &[_]*const Feature {
+        &feature_ccpp,
+        &feature_perfmon,
+        &feature_dotprod,
+        &feature_fuseArithLogic,
+        &feature_force32bitJumpTables,
+        &feature_lslFast,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_lse,
+        &feature_arithCbzFusion,
+        &feature_uaops,
+        &feature_fuseCsel,
+        &feature_vh,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_fuseLiterals,
+        &feature_crc,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
+        &feature_zczFp,
+        &feature_lor,
+        &feature_pan,
+        &feature_exynosm4,
+    },
+};
+
+pub const cpu_falkor = Cpu{
+    .name = "falkor",
+    .llvm_name = "falkor",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_zczGp,
+        &feature_slowStrqroStore,
+        &feature_customCheapAsMove,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_crc,
+        &feature_lslFast,
+        &feature_falkor,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+        &feature_trbe,
+        &feature_ete,
+        &feature_fpArmv8,
+        &feature_fuseAes,
+        &feature_neon,
+        &feature_perfmon,
+        &feature_usePostraScheduler,
+    },
+};
+
+pub const cpu_kryo = Cpu{
+    .name = "kryo",
+    .llvm_name = "kryo",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_zczFp,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
+        &feature_crc,
+        &feature_lslFast,
+        &feature_kryo,
+    },
+};
+
+pub const cpu_neoverseE1 = Cpu{
+    .name = "neoverse-e1",
+    .llvm_name = "neoverse-e1",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_neoversee1,
+    },
+};
+
+pub const cpu_neoverseN1 = Cpu{
+    .name = "neoverse-n1",
+    .llvm_name = "neoverse-n1",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_spe,
+        &feature_pan,
+        &feature_crc,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_vh,
+        &feature_ssbs,
+        &feature_neoversen1,
+    },
+};
+
+pub const cpu_saphira = Cpu{
+    .name = "saphira",
+    .llvm_name = "saphira",
+    .subfeatures = &[_]*const Feature {
+        &feature_am,
+        &feature_nv,
+        &feature_ccpp,
+        &feature_predictableSelectExpensive,
+        &feature_perfmon,
+        &feature_dotprod,
+        &feature_spe,
+        &feature_lslFast,
+        &feature_zczGp,
+        &feature_customCheapAsMove,
+        &feature_lse,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ccidx,
+        &feature_vh,
+        &feature_tracev84,
+        &feature_rdm,
+        &feature_fpArmv8,
+        &feature_dit,
+        &feature_mpam,
+        &feature_ras,
+        &feature_tlbRmi,
+        &feature_fmi,
+        &feature_crc,
+        &feature_usePostraScheduler,
+        &feature_pa,
+        &feature_zczFp,
+        &feature_sel2,
+        &feature_lor,
+        &feature_pan,
+        &feature_saphira,
+    },
+};
+
+pub const cpu_thunderx = Cpu{
+    .name = "thunderx",
+    .llvm_name = "thunderx",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_thunderx,
+    },
+};
+
+pub const cpu_thunderx2t99 = Cpu{
+    .name = "thunderx2t99",
+    .llvm_name = "thunderx2t99",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_predictableSelectExpensive,
+        &feature_lor,
+        &feature_crc,
+        &feature_pan,
+        &feature_aggressiveFma,
+        &feature_vh,
+        &feature_thunderx2t99,
+    },
+};
+
+pub const cpu_thunderxt81 = Cpu{
+    .name = "thunderxt81",
+    .llvm_name = "thunderxt81",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_thunderxt81,
+    },
+};
+
+pub const cpu_thunderxt83 = Cpu{
+    .name = "thunderxt83",
+    .llvm_name = "thunderxt83",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_thunderxt83,
+    },
+};
+
+pub const cpu_thunderxt88 = Cpu{
+    .name = "thunderxt88",
+    .llvm_name = "thunderxt88",
+    .subfeatures = &[_]*const Feature {
+        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_thunderxt88,
+    },
+};
+
+pub const cpu_tsv110 = Cpu{
+    .name = "tsv110",
+    .llvm_name = "tsv110",
+    .subfeatures = &[_]*const Feature {
+        &feature_rdm,
+        &feature_usePostraScheduler,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
+        &feature_perfmon,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_lor,
+        &feature_spe,
+        &feature_crc,
+        &feature_pan,
+        &feature_uaops,
+        &feature_vh,
+        &feature_tsv110,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_appleLatest,
+    &cpu_cortexA35,
+    &cpu_cortexA53,
+    &cpu_cortexA55,
+    &cpu_cortexA57,
+    &cpu_cortexA65,
+    &cpu_cortexA65ae,
+    &cpu_cortexA72,
+    &cpu_cortexA73,
+    &cpu_cortexA75,
+    &cpu_cortexA76,
+    &cpu_cortexA76ae,
+    &cpu_cyclone,
+    &cpu_exynosM1,
+    &cpu_exynosM2,
+    &cpu_exynosM3,
+    &cpu_exynosM4,
+    &cpu_exynosM5,
+    &cpu_falkor,
+    &cpu_generic,
+    &cpu_kryo,
+    &cpu_neoverseE1,
+    &cpu_neoverseN1,
+    &cpu_saphira,
+    &cpu_thunderx,
+    &cpu_thunderx2t99,
+    &cpu_thunderxt81,
+    &cpu_thunderxt83,
+    &cpu_thunderxt88,
+    &cpu_tsv110,
+};
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
new file mode 100644
index 0000000000000000000000000000000000000000..80563b4d02a289ab8c9f34805d99e714dedce379
--- /dev/null
+++ b/lib/std/target/amdgpu.zig
@@ -0,0 +1,2329 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_BitInsts16 = Feature{
+    .name = "16-bit-insts",
+    .description = "Has i16/f16 instructions",
+    .llvm_name = "16-bit-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_addNoCarryInsts = Feature{
+    .name = "add-no-carry-insts",
+    .description = "Have VALU add/sub instructions without carry out",
+    .llvm_name = "add-no-carry-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_apertureRegs = Feature{
+    .name = "aperture-regs",
+    .description = "Has Memory Aperture Base and Size Registers",
+    .llvm_name = "aperture-regs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_atomicFaddInsts = Feature{
+    .name = "atomic-fadd-insts",
+    .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
+    .llvm_name = "atomic-fadd-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_autoWaitcntBeforeBarrier = Feature{
+    .name = "auto-waitcnt-before-barrier",
+    .description = "Hardware automatically inserts waitcnt before barrier",
+    .llvm_name = "auto-waitcnt-before-barrier",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ciInsts = Feature{
+    .name = "ci-insts",
+    .description = "Additional instructions for CI+",
+    .llvm_name = "ci-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_codeObjectV3 = Feature{
+    .name = "code-object-v3",
+    .description = "Generate code object version 3",
+    .llvm_name = "code-object-v3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cumode = Feature{
+    .name = "cumode",
+    .description = "Enable CU wavefront execution mode",
+    .llvm_name = "cumode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dlInsts = Feature{
+    .name = "dl-insts",
+    .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
+    .llvm_name = "dl-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dpp = Feature{
+    .name = "dpp",
+    .description = "Support DPP (Data Parallel Primitives) extension",
+    .llvm_name = "dpp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dpp8 = Feature{
+    .name = "dpp8",
+    .description = "Support DPP8 (Data Parallel Primitives) extension",
+    .llvm_name = "dpp8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noSramEccSupport = Feature{
+    .name = "no-sram-ecc-support",
+    .description = "Hardware does not support SRAM ECC",
+    .llvm_name = "no-sram-ecc-support",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noXnackSupport = Feature{
+    .name = "no-xnack-support",
+    .description = "Hardware does not support XNACK",
+    .llvm_name = "no-xnack-support",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot1Insts = Feature{
+    .name = "dot1-insts",
+    .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
+    .llvm_name = "dot1-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot2Insts = Feature{
+    .name = "dot2-insts",
+    .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
+    .llvm_name = "dot2-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot3Insts = Feature{
+    .name = "dot3-insts",
+    .description = "Has v_dot8c_i32_i4 instruction",
+    .llvm_name = "dot3-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot4Insts = Feature{
+    .name = "dot4-insts",
+    .description = "Has v_dot2c_i32_i16 instruction",
+    .llvm_name = "dot4-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot5Insts = Feature{
+    .name = "dot5-insts",
+    .description = "Has v_dot2c_f32_f16 instruction",
+    .llvm_name = "dot5-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dot6Insts = Feature{
+    .name = "dot6-insts",
+    .description = "Has v_dot4c_i32_i8 instruction",
+    .llvm_name = "dot6-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_DumpCode = Feature{
+    .name = "DumpCode",
+    .description = "Dump MachineInstrs in the CodeEmitter",
+    .llvm_name = "DumpCode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dumpcode = Feature{
+    .name = "dumpcode",
+    .description = "Dump MachineInstrs in the CodeEmitter",
+    .llvm_name = "dumpcode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_enableDs128 = Feature{
+    .name = "enable-ds128",
+    .description = "Use ds_{read|write}_b128",
+    .llvm_name = "enable-ds128",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loadStoreOpt = Feature{
+    .name = "load-store-opt",
+    .description = "Enable SI load/store optimizer pass",
+    .llvm_name = "load-store-opt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_enablePrtStrictNull = Feature{
+    .name = "enable-prt-strict-null",
+    .description = "Enable zeroing of result registers for sparse texture fetches",
+    .llvm_name = "enable-prt-strict-null",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_siScheduler = Feature{
+    .name = "si-scheduler",
+    .description = "Enable SI Machine Scheduler",
+    .llvm_name = "si-scheduler",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_unsafeDsOffsetFolding = Feature{
+    .name = "unsafe-ds-offset-folding",
+    .description = "Force using DS instruction immediate offsets on SI",
+    .llvm_name = "unsafe-ds-offset-folding",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fmaf = Feature{
+    .name = "fmaf",
+    .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
+    .llvm_name = "fmaf",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp16Denormals = Feature{
+    .name = "fp16-denormals",
+    .description = "Enable half precision denormal handling",
+    .llvm_name = "fp16-denormals",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp64,
+    },
+};
+
+pub const feature_fp32Denormals = Feature{
+    .name = "fp32-denormals",
+    .description = "Enable single precision denormal handling",
+    .llvm_name = "fp32-denormals",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp64 = Feature{
+    .name = "fp64",
+    .description = "Enable double precision operations",
+    .llvm_name = "fp64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp64Denormals = Feature{
+    .name = "fp64-denormals",
+    .description = "Enable double and half precision denormal handling",
+    .llvm_name = "fp64-denormals",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp64,
+    },
+};
+
+pub const feature_fp64Fp16Denormals = Feature{
+    .name = "fp64-fp16-denormals",
+    .description = "Enable double and half precision denormal handling",
+    .llvm_name = "fp64-fp16-denormals",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp64,
+    },
+};
+
+pub const feature_fpExceptions = Feature{
+    .name = "fp-exceptions",
+    .description = "Enable floating point exceptions",
+    .llvm_name = "fp-exceptions",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastFmaf = Feature{
+    .name = "fast-fmaf",
+    .description = "Assuming f32 fma is at least as fast as mul + add",
+    .llvm_name = "fast-fmaf",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatAddressSpace = Feature{
+    .name = "flat-address-space",
+    .description = "Support flat address space",
+    .llvm_name = "flat-address-space",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatForGlobal = Feature{
+    .name = "flat-for-global",
+    .description = "Force to generate flat instruction for global",
+    .llvm_name = "flat-for-global",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatGlobalInsts = Feature{
+    .name = "flat-global-insts",
+    .description = "Have global_* flat memory instructions",
+    .llvm_name = "flat-global-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatInstOffsets = Feature{
+    .name = "flat-inst-offsets",
+    .description = "Flat instructions have immediate offset addressing mode",
+    .llvm_name = "flat-inst-offsets",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatScratchInsts = Feature{
+    .name = "flat-scratch-insts",
+    .description = "Have scratch_* flat memory instructions",
+    .llvm_name = "flat-scratch-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_flatSegmentOffsetBug = Feature{
+    .name = "flat-segment-offset-bug",
+    .description = "GFX10 bug, inst_offset ignored in flat segment",
+    .llvm_name = "flat-segment-offset-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fmaMixInsts = Feature{
+    .name = "fma-mix-insts",
+    .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
+    .llvm_name = "fma-mix-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gcn3Encoding = Feature{
+    .name = "gcn3-encoding",
+    .description = "Encoding format for VI",
+    .llvm_name = "gcn3-encoding",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gfx7Gfx8Gfx9Insts = Feature{
+    .name = "gfx7-gfx8-gfx9-insts",
+    .description = "Instructions shared in GFX7, GFX8, GFX9",
+    .llvm_name = "gfx7-gfx8-gfx9-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gfx8Insts = Feature{
+    .name = "gfx8-insts",
+    .description = "Additional instructions for GFX8+",
+    .llvm_name = "gfx8-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gfx9 = Feature{
+    .name = "gfx9",
+    .description = "GFX9 GPU generation",
+    .llvm_name = "gfx9",
+    .subfeatures = &[_]*const Feature {
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+    },
+};
+
+pub const feature_gfx9Insts = Feature{
+    .name = "gfx9-insts",
+    .description = "Additional instructions for GFX9+",
+    .llvm_name = "gfx9-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gfx10 = Feature{
+    .name = "gfx10",
+    .description = "GFX10 GPU generation",
+    .llvm_name = "gfx10",
+    .subfeatures = &[_]*const Feature {
+        &feature_movrel,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_noSdstCmpx,
+        &feature_fmaMixInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_vscnt,
+        &feature_noDataDepHazard,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_dpp8,
+        &feature_BitInsts16,
+        &feature_registerBanking,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_flatInstOffsets,
+        &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_vop3Literal,
+        &feature_sdwaOmod,
+        &feature_gfx10Insts,
+    },
+};
+
+pub const feature_gfx10Insts = Feature{
+    .name = "gfx10-insts",
+    .description = "Additional instructions for GFX10+",
+    .llvm_name = "gfx10-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_instFwdPrefetchBug = Feature{
+    .name = "inst-fwd-prefetch-bug",
+    .description = "S_INST_PREFETCH instruction causes shader to hang",
+    .llvm_name = "inst-fwd-prefetch-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_intClampInsts = Feature{
+    .name = "int-clamp-insts",
+    .description = "Support clamp for integer destination",
+    .llvm_name = "int-clamp-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_inv2piInlineImm = Feature{
+    .name = "inv-2pi-inline-imm",
+    .description = "Has 1 / (2 * pi) as inline immediate",
+    .llvm_name = "inv-2pi-inline-imm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ldsbankcount16 = Feature{
+    .name = "ldsbankcount16",
+    .description = "The number of LDS banks per compute unit.",
+    .llvm_name = "ldsbankcount16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ldsbankcount32 = Feature{
+    .name = "ldsbankcount32",
+    .description = "The number of LDS banks per compute unit.",
+    .llvm_name = "ldsbankcount32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ldsBranchVmemWarHazard = Feature{
+    .name = "lds-branch-vmem-war-hazard",
+    .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
+    .llvm_name = "lds-branch-vmem-war-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ldsMisalignedBug = Feature{
+    .name = "lds-misaligned-bug",
+    .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
+    .llvm_name = "lds-misaligned-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_localmemorysize0 = Feature{
+    .name = "localmemorysize0",
+    .description = "The size of local memory in bytes",
+    .llvm_name = "localmemorysize0",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_localmemorysize32768 = Feature{
+    .name = "localmemorysize32768",
+    .description = "The size of local memory in bytes",
+    .llvm_name = "localmemorysize32768",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_localmemorysize65536 = Feature{
+    .name = "localmemorysize65536",
+    .description = "The size of local memory in bytes",
+    .llvm_name = "localmemorysize65536",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_maiInsts = Feature{
+    .name = "mai-insts",
+    .description = "Has mAI instructions",
+    .llvm_name = "mai-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mfmaInlineLiteralBug = Feature{
+    .name = "mfma-inline-literal-bug",
+    .description = "MFMA cannot use inline literal as SrcC",
+    .llvm_name = "mfma-inline-literal-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mimgR128 = Feature{
+    .name = "mimg-r128",
+    .description = "Support 128-bit texture resources",
+    .llvm_name = "mimg-r128",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_madMixInsts = Feature{
+    .name = "mad-mix-insts",
+    .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
+    .llvm_name = "mad-mix-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_maxPrivateElementSize4 = Feature{
+    .name = "max-private-element-size-4",
+    .description = "Maximum private access size may be 4",
+    .llvm_name = "max-private-element-size-4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_maxPrivateElementSize8 = Feature{
+    .name = "max-private-element-size-8",
+    .description = "Maximum private access size may be 8",
+    .llvm_name = "max-private-element-size-8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_maxPrivateElementSize16 = Feature{
+    .name = "max-private-element-size-16",
+    .description = "Maximum private access size may be 16",
+    .llvm_name = "max-private-element-size-16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_movrel = Feature{
+    .name = "movrel",
+    .description = "Has v_movrel*_b32 instructions",
+    .llvm_name = "movrel",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nsaEncoding = Feature{
+    .name = "nsa-encoding",
+    .description = "Support NSA encoding for image instructions",
+    .llvm_name = "nsa-encoding",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nsaToVmemBug = Feature{
+    .name = "nsa-to-vmem-bug",
+    .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
+    .llvm_name = "nsa-to-vmem-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noDataDepHazard = Feature{
+    .name = "no-data-dep-hazard",
+    .description = "Does not need SW waitstates",
+    .llvm_name = "no-data-dep-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noSdstCmpx = Feature{
+    .name = "no-sdst-cmpx",
+    .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
+    .llvm_name = "no-sdst-cmpx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_offset3fBug = Feature{
+    .name = "offset-3f-bug",
+    .description = "Branch offset of 3f hardware bug",
+    .llvm_name = "offset-3f-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_pkFmacF16Inst = Feature{
+    .name = "pk-fmac-f16-inst",
+    .description = "Has v_pk_fmac_f16 instruction",
+    .llvm_name = "pk-fmac-f16-inst",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_promoteAlloca = Feature{
+    .name = "promote-alloca",
+    .description = "Enable promote alloca pass",
+    .llvm_name = "promote-alloca",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_r128A16 = Feature{
+    .name = "r128-a16",
+    .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
+    .llvm_name = "r128-a16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_registerBanking = Feature{
+    .name = "register-banking",
+    .description = "Has register banking",
+    .llvm_name = "register-banking",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwa = Feature{
+    .name = "sdwa",
+    .description = "Support SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwaMav = Feature{
+    .name = "sdwa-mav",
+    .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa-mav",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwaOmod = Feature{
+    .name = "sdwa-omod",
+    .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa-omod",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwaOutModsVopc = Feature{
+    .name = "sdwa-out-mods-vopc",
+    .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa-out-mods-vopc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwaScalar = Feature{
+    .name = "sdwa-scalar",
+    .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa-scalar",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sdwaSdst = Feature{
+    .name = "sdwa-sdst",
+    .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
+    .llvm_name = "sdwa-sdst",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sgprInitBug = Feature{
+    .name = "sgpr-init-bug",
+    .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
+    .llvm_name = "sgpr-init-bug",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_smemToVectorWriteHazard = Feature{
+    .name = "smem-to-vector-write-hazard",
+    .description = "s_load_dword followed by v_cmp page faults",
+    .llvm_name = "smem-to-vector-write-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sMemrealtime = Feature{
+    .name = "s-memrealtime",
+    .description = "Has s_memrealtime instruction",
+    .llvm_name = "s-memrealtime",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sramEcc = Feature{
+    .name = "sram-ecc",
+    .description = "Enable SRAM ECC",
+    .llvm_name = "sram-ecc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_scalarAtomics = Feature{
+    .name = "scalar-atomics",
+    .description = "Has atomic scalar memory instructions",
+    .llvm_name = "scalar-atomics",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_scalarFlatScratchInsts = Feature{
+    .name = "scalar-flat-scratch-insts",
+    .description = "Have s_scratch_* flat memory instructions",
+    .llvm_name = "scalar-flat-scratch-insts",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_scalarStores = Feature{
+    .name = "scalar-stores",
+    .description = "Has store scalar memory instructions",
+    .llvm_name = "scalar-stores",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_seaIslands = Feature{
+    .name = "sea-islands",
+    .description = "SEA_ISLANDS GPU generation",
+    .llvm_name = "sea-islands",
+    .subfeatures = &[_]*const Feature {
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+    },
+};
+
+pub const feature_southernIslands = Feature{
+    .name = "southern-islands",
+    .description = "SOUTHERN_ISLANDS GPU generation",
+    .llvm_name = "southern-islands",
+    .subfeatures = &[_]*const Feature {
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_ldsbankcount32,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_noXnackSupport,
+        &feature_fp64,
+    },
+};
+
+pub const feature_trapHandler = Feature{
+    .name = "trap-handler",
+    .description = "Trap handler support",
+    .llvm_name = "trap-handler",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_trigReducedRange = Feature{
+    .name = "trig-reduced-range",
+    .description = "Requires use of fract on arguments to trig instructions",
+    .llvm_name = "trig-reduced-range",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_unalignedBufferAccess = Feature{
+    .name = "unaligned-buffer-access",
+    .description = "Support unaligned global loads and stores",
+    .llvm_name = "unaligned-buffer-access",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_unalignedScratchAccess = Feature{
+    .name = "unaligned-scratch-access",
+    .description = "Support unaligned scratch loads and stores",
+    .llvm_name = "unaligned-scratch-access",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_unpackedD16Vmem = Feature{
+    .name = "unpacked-d16-vmem",
+    .description = "Has unpacked d16 vmem instructions",
+    .llvm_name = "unpacked-d16-vmem",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vgprIndexMode = Feature{
+    .name = "vgpr-index-mode",
+    .description = "Has VGPR mode register indexing",
+    .llvm_name = "vgpr-index-mode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vmemToScalarWriteHazard = Feature{
+    .name = "vmem-to-scalar-write-hazard",
+    .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
+    .llvm_name = "vmem-to-scalar-write-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vop3Literal = Feature{
+    .name = "vop3-literal",
+    .description = "Can use one literal in VOP3",
+    .llvm_name = "vop3-literal",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vop3p = Feature{
+    .name = "vop3p",
+    .description = "Has VOP3P packed instructions",
+    .llvm_name = "vop3p",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vcmpxExecWarHazard = Feature{
+    .name = "vcmpx-exec-war-hazard",
+    .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
+    .llvm_name = "vcmpx-exec-war-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vcmpxPermlaneHazard = Feature{
+    .name = "vcmpx-permlane-hazard",
+    .description = "TODO: describe me",
+    .llvm_name = "vcmpx-permlane-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_volcanicIslands = Feature{
+    .name = "volcanic-islands",
+    .description = "VOLCANIC_ISLANDS GPU generation",
+    .llvm_name = "volcanic-islands",
+    .subfeatures = &[_]*const Feature {
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+    },
+};
+
+pub const feature_vscnt = Feature{
+    .name = "vscnt",
+    .description = "Has separate store vscnt counter",
+    .llvm_name = "vscnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_wavefrontsize16 = Feature{
+    .name = "wavefrontsize16",
+    .description = "The number of threads per wavefront",
+    .llvm_name = "wavefrontsize16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_wavefrontsize32 = Feature{
+    .name = "wavefrontsize32",
+    .description = "The number of threads per wavefront",
+    .llvm_name = "wavefrontsize32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_wavefrontsize64 = Feature{
+    .name = "wavefrontsize64",
+    .description = "The number of threads per wavefront",
+    .llvm_name = "wavefrontsize64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xnack = Feature{
+    .name = "xnack",
+    .description = "Enable XNACK support",
+    .llvm_name = "xnack",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_halfRate64Ops = Feature{
+    .name = "half-rate-64-ops",
+    .description = "Most fp64 instructions are half rate instead of quarter",
+    .llvm_name = "half-rate-64-ops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_BitInsts16,
+    &feature_addNoCarryInsts,
+    &feature_apertureRegs,
+    &feature_atomicFaddInsts,
+    &feature_autoWaitcntBeforeBarrier,
+    &feature_ciInsts,
+    &feature_codeObjectV3,
+    &feature_cumode,
+    &feature_dlInsts,
+    &feature_dpp,
+    &feature_dpp8,
+    &feature_noSramEccSupport,
+    &feature_noXnackSupport,
+    &feature_dot1Insts,
+    &feature_dot2Insts,
+    &feature_dot3Insts,
+    &feature_dot4Insts,
+    &feature_dot5Insts,
+    &feature_dot6Insts,
+    &feature_DumpCode,
+    &feature_dumpcode,
+    &feature_enableDs128,
+    &feature_loadStoreOpt,
+    &feature_enablePrtStrictNull,
+    &feature_siScheduler,
+    &feature_unsafeDsOffsetFolding,
+    &feature_fmaf,
+    &feature_fp16Denormals,
+    &feature_fp32Denormals,
+    &feature_fp64,
+    &feature_fp64Denormals,
+    &feature_fp64Fp16Denormals,
+    &feature_fpExceptions,
+    &feature_fastFmaf,
+    &feature_flatAddressSpace,
+    &feature_flatForGlobal,
+    &feature_flatGlobalInsts,
+    &feature_flatInstOffsets,
+    &feature_flatScratchInsts,
+    &feature_flatSegmentOffsetBug,
+    &feature_fmaMixInsts,
+    &feature_gcn3Encoding,
+    &feature_gfx7Gfx8Gfx9Insts,
+    &feature_gfx8Insts,
+    &feature_gfx9,
+    &feature_gfx9Insts,
+    &feature_gfx10,
+    &feature_gfx10Insts,
+    &feature_instFwdPrefetchBug,
+    &feature_intClampInsts,
+    &feature_inv2piInlineImm,
+    &feature_ldsbankcount16,
+    &feature_ldsbankcount32,
+    &feature_ldsBranchVmemWarHazard,
+    &feature_ldsMisalignedBug,
+    &feature_localmemorysize0,
+    &feature_localmemorysize32768,
+    &feature_localmemorysize65536,
+    &feature_maiInsts,
+    &feature_mfmaInlineLiteralBug,
+    &feature_mimgR128,
+    &feature_madMixInsts,
+    &feature_maxPrivateElementSize4,
+    &feature_maxPrivateElementSize8,
+    &feature_maxPrivateElementSize16,
+    &feature_movrel,
+    &feature_nsaEncoding,
+    &feature_nsaToVmemBug,
+    &feature_noDataDepHazard,
+    &feature_noSdstCmpx,
+    &feature_offset3fBug,
+    &feature_pkFmacF16Inst,
+    &feature_promoteAlloca,
+    &feature_r128A16,
+    &feature_registerBanking,
+    &feature_sdwa,
+    &feature_sdwaMav,
+    &feature_sdwaOmod,
+    &feature_sdwaOutModsVopc,
+    &feature_sdwaScalar,
+    &feature_sdwaSdst,
+    &feature_sgprInitBug,
+    &feature_smemToVectorWriteHazard,
+    &feature_sMemrealtime,
+    &feature_sramEcc,
+    &feature_scalarAtomics,
+    &feature_scalarFlatScratchInsts,
+    &feature_scalarStores,
+    &feature_seaIslands,
+    &feature_southernIslands,
+    &feature_trapHandler,
+    &feature_trigReducedRange,
+    &feature_unalignedBufferAccess,
+    &feature_unalignedScratchAccess,
+    &feature_unpackedD16Vmem,
+    &feature_vgprIndexMode,
+    &feature_vmemToScalarWriteHazard,
+    &feature_vop3Literal,
+    &feature_vop3p,
+    &feature_vcmpxExecWarHazard,
+    &feature_vcmpxPermlaneHazard,
+    &feature_volcanicIslands,
+    &feature_vscnt,
+    &feature_wavefrontsize16,
+    &feature_wavefrontsize32,
+    &feature_wavefrontsize64,
+    &feature_xnack,
+    &feature_halfRate64Ops,
+};
+
+pub const cpu_bonaire = Cpu{
+    .name = "bonaire",
+    .llvm_name = "bonaire",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_carrizo = Cpu{
+    .name = "carrizo",
+    .llvm_name = "carrizo",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+        &feature_xnack,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_fiji = Cpu{
+    .name = "fiji",
+    .llvm_name = "fiji",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+        &feature_wavefrontsize64,
+    },
+};
+
+pub const cpu_genericHsa = Cpu{
+    .name = "generic-hsa",
+    .llvm_name = "generic-hsa",
+    .subfeatures = &[_]*const Feature {
+        &feature_flatAddressSpace,
+        &feature_wavefrontsize64,
+    },
+};
+
+pub const cpu_gfx1010 = Cpu{
+    .name = "gfx1010",
+    .llvm_name = "gfx1010",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_dlInsts,
+        &feature_noXnackSupport,
+        &feature_flatSegmentOffsetBug,
+        &feature_movrel,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_noSdstCmpx,
+        &feature_fmaMixInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_vscnt,
+        &feature_noDataDepHazard,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_dpp8,
+        &feature_BitInsts16,
+        &feature_registerBanking,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_flatInstOffsets,
+        &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_vop3Literal,
+        &feature_sdwaOmod,
+        &feature_gfx10Insts,
+        &feature_gfx10,
+        &feature_instFwdPrefetchBug,
+        &feature_ldsbankcount32,
+        &feature_ldsBranchVmemWarHazard,
+        &feature_ldsMisalignedBug,
+        &feature_nsaEncoding,
+        &feature_nsaToVmemBug,
+        &feature_offset3fBug,
+        &feature_smemToVectorWriteHazard,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_vmemToScalarWriteHazard,
+        &feature_vcmpxExecWarHazard,
+        &feature_vcmpxPermlaneHazard,
+        &feature_wavefrontsize32,
+    },
+};
+
+pub const cpu_gfx1011 = Cpu{
+    .name = "gfx1011",
+    .llvm_name = "gfx1011",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_dlInsts,
+        &feature_noXnackSupport,
+        &feature_dot1Insts,
+        &feature_dot2Insts,
+        &feature_dot5Insts,
+        &feature_dot6Insts,
+        &feature_flatSegmentOffsetBug,
+        &feature_movrel,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_noSdstCmpx,
+        &feature_fmaMixInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_vscnt,
+        &feature_noDataDepHazard,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_dpp8,
+        &feature_BitInsts16,
+        &feature_registerBanking,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_flatInstOffsets,
+        &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_vop3Literal,
+        &feature_sdwaOmod,
+        &feature_gfx10Insts,
+        &feature_gfx10,
+        &feature_instFwdPrefetchBug,
+        &feature_ldsbankcount32,
+        &feature_ldsBranchVmemWarHazard,
+        &feature_nsaEncoding,
+        &feature_nsaToVmemBug,
+        &feature_offset3fBug,
+        &feature_smemToVectorWriteHazard,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_vmemToScalarWriteHazard,
+        &feature_vcmpxExecWarHazard,
+        &feature_vcmpxPermlaneHazard,
+        &feature_wavefrontsize32,
+    },
+};
+
+pub const cpu_gfx1012 = Cpu{
+    .name = "gfx1012",
+    .llvm_name = "gfx1012",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_dlInsts,
+        &feature_noXnackSupport,
+        &feature_dot1Insts,
+        &feature_dot2Insts,
+        &feature_dot5Insts,
+        &feature_dot6Insts,
+        &feature_flatSegmentOffsetBug,
+        &feature_movrel,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_noSdstCmpx,
+        &feature_fmaMixInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_vscnt,
+        &feature_noDataDepHazard,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_dpp8,
+        &feature_BitInsts16,
+        &feature_registerBanking,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_flatInstOffsets,
+        &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_vop3Literal,
+        &feature_sdwaOmod,
+        &feature_gfx10Insts,
+        &feature_gfx10,
+        &feature_instFwdPrefetchBug,
+        &feature_ldsbankcount32,
+        &feature_ldsBranchVmemWarHazard,
+        &feature_ldsMisalignedBug,
+        &feature_nsaEncoding,
+        &feature_nsaToVmemBug,
+        &feature_offset3fBug,
+        &feature_smemToVectorWriteHazard,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_vmemToScalarWriteHazard,
+        &feature_vcmpxExecWarHazard,
+        &feature_vcmpxPermlaneHazard,
+        &feature_wavefrontsize32,
+    },
+};
+
+pub const cpu_gfx600 = Cpu{
+    .name = "gfx600",
+    .llvm_name = "gfx600",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_gfx601 = Cpu{
+    .name = "gfx601",
+    .llvm_name = "gfx601",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+    },
+};
+
+pub const cpu_gfx700 = Cpu{
+    .name = "gfx700",
+    .llvm_name = "gfx700",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_gfx701 = Cpu{
+    .name = "gfx701",
+    .llvm_name = "gfx701",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_gfx702 = Cpu{
+    .name = "gfx702",
+    .llvm_name = "gfx702",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_fastFmaf,
+        &feature_ldsbankcount16,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_gfx703 = Cpu{
+    .name = "gfx703",
+    .llvm_name = "gfx703",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount16,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_gfx704 = Cpu{
+    .name = "gfx704",
+    .llvm_name = "gfx704",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_gfx801 = Cpu{
+    .name = "gfx801",
+    .llvm_name = "gfx801",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+        &feature_xnack,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_gfx802 = Cpu{
+    .name = "gfx802",
+    .llvm_name = "gfx802",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_sgprInitBug,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_gfx803 = Cpu{
+    .name = "gfx803",
+    .llvm_name = "gfx803",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_gfx810 = Cpu{
+    .name = "gfx810",
+    .llvm_name = "gfx810",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_ldsbankcount16,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+        &feature_xnack,
+    },
+};
+
+pub const cpu_gfx900 = Cpu{
+    .name = "gfx900",
+    .llvm_name = "gfx900",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noSramEccSupport,
+        &feature_noXnackSupport,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+        &feature_madMixInsts,
+    },
+};
+
+pub const cpu_gfx902 = Cpu{
+    .name = "gfx902",
+    .llvm_name = "gfx902",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noSramEccSupport,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+        &feature_madMixInsts,
+        &feature_xnack,
+    },
+};
+
+pub const cpu_gfx904 = Cpu{
+    .name = "gfx904",
+    .llvm_name = "gfx904",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noSramEccSupport,
+        &feature_noXnackSupport,
+        &feature_fmaMixInsts,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+    },
+};
+
+pub const cpu_gfx906 = Cpu{
+    .name = "gfx906",
+    .llvm_name = "gfx906",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_dlInsts,
+        &feature_noXnackSupport,
+        &feature_dot1Insts,
+        &feature_dot2Insts,
+        &feature_fmaMixInsts,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_gfx908 = Cpu{
+    .name = "gfx908",
+    .llvm_name = "gfx908",
+    .subfeatures = &[_]*const Feature {
+        &feature_atomicFaddInsts,
+        &feature_codeObjectV3,
+        &feature_dlInsts,
+        &feature_dot1Insts,
+        &feature_dot2Insts,
+        &feature_dot3Insts,
+        &feature_dot4Insts,
+        &feature_dot5Insts,
+        &feature_dot6Insts,
+        &feature_fmaMixInsts,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+        &feature_maiInsts,
+        &feature_mfmaInlineLiteralBug,
+        &feature_pkFmacF16Inst,
+        &feature_sramEcc,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_gfx909 = Cpu{
+    .name = "gfx909",
+    .llvm_name = "gfx909",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_gfx9Insts,
+        &feature_ciInsts,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_sdwaScalar,
+        &feature_sdwaSdst,
+        &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_flatScratchInsts,
+        &feature_r128A16,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_flatGlobalInsts,
+        &feature_scalarFlatScratchInsts,
+        &feature_scalarAtomics,
+        &feature_flatInstOffsets,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_intClampInsts,
+        &feature_fastFmaf,
+        &feature_sdwaOmod,
+        &feature_gfx9,
+        &feature_ldsbankcount32,
+        &feature_madMixInsts,
+        &feature_xnack,
+    },
+};
+
+pub const cpu_hainan = Cpu{
+    .name = "hainan",
+    .llvm_name = "hainan",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+    },
+};
+
+pub const cpu_hawaii = Cpu{
+    .name = "hawaii",
+    .llvm_name = "hawaii",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_iceland = Cpu{
+    .name = "iceland",
+    .llvm_name = "iceland",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_sgprInitBug,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_kabini = Cpu{
+    .name = "kabini",
+    .llvm_name = "kabini",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount16,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_kaveri = Cpu{
+    .name = "kaveri",
+    .llvm_name = "kaveri",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_mullins = Cpu{
+    .name = "mullins",
+    .llvm_name = "mullins",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount16,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_seaIslands,
+    },
+};
+
+pub const cpu_oland = Cpu{
+    .name = "oland",
+    .llvm_name = "oland",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+    },
+};
+
+pub const cpu_pitcairn = Cpu{
+    .name = "pitcairn",
+    .llvm_name = "pitcairn",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+    },
+};
+
+pub const cpu_polaris10 = Cpu{
+    .name = "polaris10",
+    .llvm_name = "polaris10",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_polaris11 = Cpu{
+    .name = "polaris11",
+    .llvm_name = "polaris11",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_stoney = Cpu{
+    .name = "stoney",
+    .llvm_name = "stoney",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_ldsbankcount16,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+        &feature_xnack,
+    },
+};
+
+pub const cpu_tahiti = Cpu{
+    .name = "tahiti",
+    .llvm_name = "tahiti",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_fastFmaf,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+        &feature_halfRate64Ops,
+    },
+};
+
+pub const cpu_tonga = Cpu{
+    .name = "tonga",
+    .llvm_name = "tonga",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_sgprInitBug,
+        &feature_unpackedD16Vmem,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_fp64,
+        &feature_BitInsts16,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
+        &feature_wavefrontsize64,
+        &feature_gfx8Insts,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_mimgR128,
+        &feature_intClampInsts,
+        &feature_sMemrealtime,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
+        &feature_volcanicIslands,
+    },
+};
+
+pub const cpu_verde = Cpu{
+    .name = "verde",
+    .llvm_name = "verde",
+    .subfeatures = &[_]*const Feature {
+        &feature_codeObjectV3,
+        &feature_noXnackSupport,
+        &feature_ldsbankcount32,
+        &feature_mimgR128,
+        &feature_movrel,
+        &feature_localmemorysize32768,
+        &feature_trigReducedRange,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_southernIslands,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_bonaire,
+    &cpu_carrizo,
+    &cpu_fiji,
+    &cpu_generic,
+    &cpu_genericHsa,
+    &cpu_gfx1010,
+    &cpu_gfx1011,
+    &cpu_gfx1012,
+    &cpu_gfx600,
+    &cpu_gfx601,
+    &cpu_gfx700,
+    &cpu_gfx701,
+    &cpu_gfx702,
+    &cpu_gfx703,
+    &cpu_gfx704,
+    &cpu_gfx801,
+    &cpu_gfx802,
+    &cpu_gfx803,
+    &cpu_gfx810,
+    &cpu_gfx900,
+    &cpu_gfx902,
+    &cpu_gfx904,
+    &cpu_gfx906,
+    &cpu_gfx908,
+    &cpu_gfx909,
+    &cpu_hainan,
+    &cpu_hawaii,
+    &cpu_iceland,
+    &cpu_kabini,
+    &cpu_kaveri,
+    &cpu_mullins,
+    &cpu_oland,
+    &cpu_pitcairn,
+    &cpu_polaris10,
+    &cpu_polaris11,
+    &cpu_stoney,
+    &cpu_tahiti,
+    &cpu_tonga,
+    &cpu_verde,
+};
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
new file mode 100644
index 0000000000000000000000000000000000000000..e45f0170cffcf1d8570b360c155b3fdd51ab32fd
--- /dev/null
+++ b/lib/std/target/arm.zig
@@ -0,0 +1,3595 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_armv2 = Feature{
+    .name = "armv2",
+    .description = "ARMv2 architecture",
+    .llvm_name = "armv2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_armv2a = Feature{
+    .name = "armv2a",
+    .description = "ARMv2a architecture",
+    .llvm_name = "armv2a",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_armv3 = Feature{
+    .name = "armv3",
+    .description = "ARMv3 architecture",
+    .llvm_name = "armv3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_armv3m = Feature{
+    .name = "armv3m",
+    .description = "ARMv3m architecture",
+    .llvm_name = "armv3m",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_armv4 = Feature{
+    .name = "armv4",
+    .description = "ARMv4 architecture",
+    .llvm_name = "armv4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_armv4t = Feature{
+    .name = "armv4t",
+    .description = "ARMv4t architecture",
+    .llvm_name = "armv4t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_armv5t = Feature{
+    .name = "armv5t",
+    .description = "ARMv5t architecture",
+    .llvm_name = "armv5t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_armv5te = Feature{
+    .name = "armv5te",
+    .description = "ARMv5te architecture",
+    .llvm_name = "armv5te",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_armv5tej = Feature{
+    .name = "armv5tej",
+    .description = "ARMv5tej architecture",
+    .llvm_name = "armv5tej",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_armv6 = Feature{
+    .name = "armv6",
+    .description = "ARMv6 architecture",
+    .llvm_name = "armv6",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+    },
+};
+
+pub const feature_armv6j = Feature{
+    .name = "armv6j",
+    .description = "ARMv7a architecture",
+    .llvm_name = "armv6j",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+    },
+};
+
+pub const feature_armv6k = Feature{
+    .name = "armv6k",
+    .description = "ARMv6k architecture",
+    .llvm_name = "armv6k",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_armv6kz = Feature{
+    .name = "armv6kz",
+    .description = "ARMv6kz architecture",
+    .llvm_name = "armv6kz",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_trustzone,
+    },
+};
+
+pub const feature_armv6M = Feature{
+    .name = "armv6-m",
+    .description = "ARMv6m architecture",
+    .llvm_name = "armv6-m",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+    },
+};
+
+pub const feature_armv6sM = Feature{
+    .name = "armv6s-m",
+    .description = "ARMv6sm architecture",
+    .llvm_name = "armv6s-m",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+    },
+};
+
+pub const feature_armv6t2 = Feature{
+    .name = "armv6t2",
+    .description = "ARMv6t2 architecture",
+    .llvm_name = "armv6t2",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+        &feature_thumb2,
+    },
+};
+
+pub const feature_armv7A = Feature{
+    .name = "armv7-a",
+    .description = "ARMv7a architecture",
+    .llvm_name = "armv7-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv7eM = Feature{
+    .name = "armv7e-m",
+    .description = "ARMv7em architecture",
+    .llvm_name = "armv7e-m",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+    },
+};
+
+pub const feature_armv7k = Feature{
+    .name = "armv7k",
+    .description = "ARMv7a architecture",
+    .llvm_name = "armv7k",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv7M = Feature{
+    .name = "armv7-m",
+    .description = "ARMv7m architecture",
+    .llvm_name = "armv7-m",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+    },
+};
+
+pub const feature_armv7R = Feature{
+    .name = "armv7-r",
+    .description = "ARMv7r architecture",
+    .llvm_name = "armv7-r",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+    },
+};
+
+pub const feature_armv7s = Feature{
+    .name = "armv7s",
+    .description = "ARMv7a architecture",
+    .llvm_name = "armv7s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv7ve = Feature{
+    .name = "armv7ve",
+    .description = "ARMv7ve architecture",
+    .llvm_name = "armv7ve",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv8A = Feature{
+    .name = "armv8-a",
+    .description = "ARMv8a architecture",
+    .llvm_name = "armv8-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv8Mbase = Feature{
+    .name = "armv8-m.base",
+    .description = "ARMv8mBaseline architecture",
+    .llvm_name = "armv8-m.base",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_hwdiv,
+    },
+};
+
+pub const feature_armv8Mmain = Feature{
+    .name = "armv8-m.main",
+    .description = "ARMv8mMainline architecture",
+    .llvm_name = "armv8-m.main",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+    },
+};
+
+pub const feature_armv8R = Feature{
+    .name = "armv8-r",
+    .description = "ARMv8r architecture",
+    .llvm_name = "armv8-r",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_dfb,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_rclass,
+    },
+};
+
+pub const feature_armv81A = Feature{
+    .name = "armv8.1-a",
+    .description = "ARMv81a architecture",
+    .llvm_name = "armv8.1-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv81Mmain = Feature{
+    .name = "armv8.1-m.main",
+    .description = "ARMv81mMainline architecture",
+    .llvm_name = "armv8.1-m.main",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_lob,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_ras,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_thumbMode,
+        &feature_perfmon,
+        &feature_hwdiv,
+    },
+};
+
+pub const feature_armv82A = Feature{
+    .name = "armv8.2-a",
+    .description = "ARMv82a architecture",
+    .llvm_name = "armv8.2-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv83A = Feature{
+    .name = "armv8.3-a",
+    .description = "ARMv83a architecture",
+    .llvm_name = "armv8.3-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv84A = Feature{
+    .name = "armv8.4-a",
+    .description = "ARMv84a architecture",
+    .llvm_name = "armv8.4-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_armv85A = Feature{
+    .name = "armv8.5-a",
+    .description = "ARMv85a architecture",
+    .llvm_name = "armv8.5-a",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_sb,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_msecext8 = Feature{
+    .name = "8msecext",
+    .description = "Enable support for ARMv8-M Security Extensions",
+    .llvm_name = "8msecext",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_aclass = Feature{
+    .name = "aclass",
+    .description = "Is application profile ('A' series)",
+    .llvm_name = "aclass",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_aes = Feature{
+    .name = "aes",
+    .description = "Enable AES support",
+    .llvm_name = "aes",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_acquireRelease = Feature{
+    .name = "acquire-release",
+    .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
+    .llvm_name = "acquire-release",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avoidMovsShop = Feature{
+    .name = "avoid-movs-shop",
+    .description = "Avoid movs instructions with shifter operand",
+    .llvm_name = "avoid-movs-shop",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avoidPartialCpsr = Feature{
+    .name = "avoid-partial-cpsr",
+    .description = "Avoid CPSR partial update for OOO execution",
+    .llvm_name = "avoid-partial-cpsr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_crc = Feature{
+    .name = "crc",
+    .description = "Enable support for CRC instructions",
+    .llvm_name = "crc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cheapPredicableCpsr = Feature{
+    .name = "cheap-predicable-cpsr",
+    .description = "Disable +1 predication cost for instructions updating CPSR",
+    .llvm_name = "cheap-predicable-cpsr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vldnAlign = Feature{
+    .name = "vldn-align",
+    .description = "Check for VLDn unaligned access",
+    .llvm_name = "vldn-align",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_crypto = Feature{
+    .name = "crypto",
+    .description = "Enable support for Cryptography extensions",
+    .llvm_name = "crypto",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_d32 = Feature{
+    .name = "d32",
+    .description = "Extend FP to 32 double registers",
+    .llvm_name = "d32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_db = Feature{
+    .name = "db",
+    .description = "Has data barrier (dmb/dsb) instructions",
+    .llvm_name = "db",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dfb = Feature{
+    .name = "dfb",
+    .description = "Has full data barrier (dfb) instruction",
+    .llvm_name = "dfb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dsp = Feature{
+    .name = "dsp",
+    .description = "Supports DSP instructions in ARM and/or Thumb2",
+    .llvm_name = "dsp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dontWidenVmovs = Feature{
+    .name = "dont-widen-vmovs",
+    .description = "Don't widen VMOVS to VMOVD",
+    .llvm_name = "dont-widen-vmovs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dotprod = Feature{
+    .name = "dotprod",
+    .description = "Enable support for dot product instructions",
+    .llvm_name = "dotprod",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_executeOnly = Feature{
+    .name = "execute-only",
+    .description = "Enable the generation of execute only code.",
+    .llvm_name = "execute-only",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_expandFpMlx = Feature{
+    .name = "expand-fp-mlx",
+    .description = "Expand VFP/NEON MLA/MLS instructions",
+    .llvm_name = "expand-fp-mlx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp16 = Feature{
+    .name = "fp16",
+    .description = "Enable half-precision floating point",
+    .llvm_name = "fp16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp16fml = Feature{
+    .name = "fp16fml",
+    .description = "Enable full half-precision floating point fml instructions",
+    .llvm_name = "fp16fml",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fp64 = Feature{
+    .name = "fp64",
+    .description = "Floating point unit supports double precision",
+    .llvm_name = "fp64",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpao = Feature{
+    .name = "fpao",
+    .description = "Enable fast computation of positive address offsets",
+    .llvm_name = "fpao",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fpArmv8 = Feature{
+    .name = "fp-armv8",
+    .description = "Enable ARMv8 FP",
+    .llvm_name = "fp-armv8",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpArmv8d16 = Feature{
+    .name = "fp-armv8d16",
+    .description = "Enable ARMv8 FP with only 16 d-registers",
+    .llvm_name = "fp-armv8d16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpArmv8d16sp = Feature{
+    .name = "fp-armv8d16sp",
+    .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
+    .llvm_name = "fp-armv8d16sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpArmv8sp = Feature{
+    .name = "fp-armv8sp",
+    .description = "Enable ARMv8 FP with no double precision",
+    .llvm_name = "fp-armv8sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpregs = Feature{
+    .name = "fpregs",
+    .description = "Enable FP registers",
+    .llvm_name = "fpregs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fpregs16 = Feature{
+    .name = "fpregs16",
+    .description = "Enable 16-bit FP registers",
+    .llvm_name = "fpregs16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fpregs64 = Feature{
+    .name = "fpregs64",
+    .description = "Enable 64-bit FP registers",
+    .llvm_name = "fpregs64",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fullfp16 = Feature{
+    .name = "fullfp16",
+    .description = "Enable full half-precision floating point",
+    .llvm_name = "fullfp16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_fuseAes = Feature{
+    .name = "fuse-aes",
+    .description = "CPU fuses AES crypto operations",
+    .llvm_name = "fuse-aes",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fuseLiterals = Feature{
+    .name = "fuse-literals",
+    .description = "CPU fuses literal generation operations",
+    .llvm_name = "fuse-literals",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hwdivArm = Feature{
+    .name = "hwdiv-arm",
+    .description = "Enable divide instructions in ARM mode",
+    .llvm_name = "hwdiv-arm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hwdiv = Feature{
+    .name = "hwdiv",
+    .description = "Enable divide instructions in Thumb",
+    .llvm_name = "hwdiv",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noBranchPredictor = Feature{
+    .name = "no-branch-predictor",
+    .description = "Has no branch predictor",
+    .llvm_name = "no-branch-predictor",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_retAddrStack = Feature{
+    .name = "ret-addr-stack",
+    .description = "Has return address stack",
+    .llvm_name = "ret-addr-stack",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowfpvmlx = Feature{
+    .name = "slowfpvmlx",
+    .description = "Disable VFP / NEON MAC instructions",
+    .llvm_name = "slowfpvmlx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vmlxHazards = Feature{
+    .name = "vmlx-hazards",
+    .description = "Has VMLx hazards",
+    .llvm_name = "vmlx-hazards",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lob = Feature{
+    .name = "lob",
+    .description = "Enable Low Overhead Branch extensions",
+    .llvm_name = "lob",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_longCalls = Feature{
+    .name = "long-calls",
+    .description = "Generate calls via indirect call instructions",
+    .llvm_name = "long-calls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mclass = Feature{
+    .name = "mclass",
+    .description = "Is microcontroller profile ('M' series)",
+    .llvm_name = "mclass",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mp = Feature{
+    .name = "mp",
+    .description = "Supports Multiprocessing extension",
+    .llvm_name = "mp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mve1beat = Feature{
+    .name = "mve1beat",
+    .description = "Model MVE instructions as a 1 beat per tick architecture",
+    .llvm_name = "mve1beat",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mve2beat = Feature{
+    .name = "mve2beat",
+    .description = "Model MVE instructions as a 2 beats per tick architecture",
+    .llvm_name = "mve2beat",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mve4beat = Feature{
+    .name = "mve4beat",
+    .description = "Model MVE instructions as a 4 beats per tick architecture",
+    .llvm_name = "mve4beat",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_muxedUnits = Feature{
+    .name = "muxed-units",
+    .description = "Has muxed AGU and NEON/FPU",
+    .llvm_name = "muxed-units",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_neon = Feature{
+    .name = "neon",
+    .description = "Enable NEON instructions",
+    .llvm_name = "neon",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_neonfp = Feature{
+    .name = "neonfp",
+    .description = "Use NEON for single precision FP",
+    .llvm_name = "neonfp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_neonFpmovs = Feature{
+    .name = "neon-fpmovs",
+    .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
+    .llvm_name = "neon-fpmovs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_naclTrap = Feature{
+    .name = "nacl-trap",
+    .description = "NaCl trap",
+    .llvm_name = "nacl-trap",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noarm = Feature{
+    .name = "noarm",
+    .description = "Does not support ARM mode execution",
+    .llvm_name = "noarm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noMovt = Feature{
+    .name = "no-movt",
+    .description = "Don't use movt/movw pairs for 32-bit imms",
+    .llvm_name = "no-movt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noNegImmediates = Feature{
+    .name = "no-neg-immediates",
+    .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
+    .llvm_name = "no-neg-immediates",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_disablePostraScheduler = Feature{
+    .name = "disable-postra-scheduler",
+    .description = "Don't schedule again after register allocation",
+    .llvm_name = "disable-postra-scheduler",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nonpipelinedVfp = Feature{
+    .name = "nonpipelined-vfp",
+    .description = "VFP instructions are not pipelined",
+    .llvm_name = "nonpipelined-vfp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_perfmon = Feature{
+    .name = "perfmon",
+    .description = "Enable support for Performance Monitor extensions",
+    .llvm_name = "perfmon",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bit32 = Feature{
+    .name = "32bit",
+    .description = "Prefer 32-bit Thumb instrs",
+    .llvm_name = "32bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_preferIshst = Feature{
+    .name = "prefer-ishst",
+    .description = "Prefer ISHST barriers",
+    .llvm_name = "prefer-ishst",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loopAlign = Feature{
+    .name = "loop-align",
+    .description = "Prefer 32-bit alignment for loops",
+    .llvm_name = "loop-align",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_preferVmovsr = Feature{
+    .name = "prefer-vmovsr",
+    .description = "Prefer VMOVSR",
+    .llvm_name = "prefer-vmovsr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_profUnpr = Feature{
+    .name = "prof-unpr",
+    .description = "Is profitable to unpredicate",
+    .llvm_name = "prof-unpr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ras = Feature{
+    .name = "ras",
+    .description = "Enable Reliability, Availability and Serviceability extensions",
+    .llvm_name = "ras",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rclass = Feature{
+    .name = "rclass",
+    .description = "Is realtime profile ('R' series)",
+    .llvm_name = "rclass",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_readTpHard = Feature{
+    .name = "read-tp-hard",
+    .description = "Reading thread pointer from register",
+    .llvm_name = "read-tp-hard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reserveR9 = Feature{
+    .name = "reserve-r9",
+    .description = "Reserve R9, making it unavailable as GPR",
+    .llvm_name = "reserve-r9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sb = Feature{
+    .name = "sb",
+    .description = "Enable v8.5a Speculation Barrier",
+    .llvm_name = "sb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sha2 = Feature{
+    .name = "sha2",
+    .description = "Enable SHA1 and SHA256 support",
+    .llvm_name = "sha2",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_slowFpBrcc = Feature{
+    .name = "slow-fp-brcc",
+    .description = "FP compare + branch is slow",
+    .llvm_name = "slow-fp-brcc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowLoadDSubreg = Feature{
+    .name = "slow-load-D-subreg",
+    .description = "Loading into D subregs is slow",
+    .llvm_name = "slow-load-D-subreg",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowOddReg = Feature{
+    .name = "slow-odd-reg",
+    .description = "VLDM/VSTM starting with an odd register is slow",
+    .llvm_name = "slow-odd-reg",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowVdup32 = Feature{
+    .name = "slow-vdup32",
+    .description = "Has slow VDUP32 - prefer VMOV",
+    .llvm_name = "slow-vdup32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowVgetlni32 = Feature{
+    .name = "slow-vgetlni32",
+    .description = "Has slow VGETLNi32 - prefer VMOV",
+    .llvm_name = "slow-vgetlni32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_splatVfpNeon = Feature{
+    .name = "splat-vfp-neon",
+    .description = "Splat register from VFP to NEON",
+    .llvm_name = "splat-vfp-neon",
+    .subfeatures = &[_]*const Feature {
+        &feature_dontWidenVmovs,
+    },
+};
+
+pub const feature_strictAlign = Feature{
+    .name = "strict-align",
+    .description = "Disallow all unaligned memory access",
+    .llvm_name = "strict-align",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_thumb2 = Feature{
+    .name = "thumb2",
+    .description = "Enable Thumb2 instructions",
+    .llvm_name = "thumb2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_trustzone = Feature{
+    .name = "trustzone",
+    .description = "Enable support for TrustZone security extensions",
+    .llvm_name = "trustzone",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useAa = Feature{
+    .name = "use-aa",
+    .description = "Use alias analysis during codegen",
+    .llvm_name = "use-aa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useMisched = Feature{
+    .name = "use-misched",
+    .description = "Use the MachineScheduler",
+    .llvm_name = "use-misched",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_wideStrideVfp = Feature{
+    .name = "wide-stride-vfp",
+    .description = "Use a wide stride when allocating VFP registers",
+    .llvm_name = "wide-stride-vfp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v7clrex = Feature{
+    .name = "v7clrex",
+    .description = "Has v7 clrex instruction",
+    .llvm_name = "v7clrex",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vfp2 = Feature{
+    .name = "vfp2",
+    .description = "Enable VFP2 instructions",
+    .llvm_name = "vfp2",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp2sp = Feature{
+    .name = "vfp2sp",
+    .description = "Enable VFP2 instructions with no double precision",
+    .llvm_name = "vfp2sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp3 = Feature{
+    .name = "vfp3",
+    .description = "Enable VFP3 instructions",
+    .llvm_name = "vfp3",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp3d16 = Feature{
+    .name = "vfp3d16",
+    .description = "Enable VFP3 instructions with only 16 d-registers",
+    .llvm_name = "vfp3d16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp3d16sp = Feature{
+    .name = "vfp3d16sp",
+    .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
+    .llvm_name = "vfp3d16sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp3sp = Feature{
+    .name = "vfp3sp",
+    .description = "Enable VFP3 instructions with no double precision",
+    .llvm_name = "vfp3sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp4 = Feature{
+    .name = "vfp4",
+    .description = "Enable VFP4 instructions",
+    .llvm_name = "vfp4",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp4d16 = Feature{
+    .name = "vfp4d16",
+    .description = "Enable VFP4 instructions with only 16 d-registers",
+    .llvm_name = "vfp4d16",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp4d16sp = Feature{
+    .name = "vfp4d16sp",
+    .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
+    .llvm_name = "vfp4d16sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp4sp = Feature{
+    .name = "vfp4sp",
+    .description = "Enable VFP4 instructions with no double precision",
+    .llvm_name = "vfp4sp",
+    .subfeatures = &[_]*const Feature {
+        &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vmlxForwarding = Feature{
+    .name = "vmlx-forwarding",
+    .description = "Has multiplier accumulator forwarding",
+    .llvm_name = "vmlx-forwarding",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_virtualization = Feature{
+    .name = "virtualization",
+    .description = "Supports Virtualization extension",
+    .llvm_name = "virtualization",
+    .subfeatures = &[_]*const Feature {
+        &feature_hwdiv,
+        &feature_hwdivArm,
+    },
+};
+
+pub const feature_zcz = Feature{
+    .name = "zcz",
+    .description = "Has zero-cycle zeroing instructions",
+    .llvm_name = "zcz",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mvefp = Feature{
+    .name = "mve.fp",
+    .description = "Support M-Class Vector Extension with integer and floating ops",
+    .llvm_name = "mve.fp",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_perfmon,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_mve = Feature{
+    .name = "mve",
+    .description = "Support M-Class Vector Extension with integer ops",
+    .llvm_name = "mve",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_v4t = Feature{
+    .name = "v4t",
+    .description = "Support ARM v4T instructions",
+    .llvm_name = "v4t",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v5te = Feature{
+    .name = "v5te",
+    .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
+    .llvm_name = "v5te",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v5t = Feature{
+    .name = "v5t",
+    .description = "Support ARM v5T instructions",
+    .llvm_name = "v5t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v6k = Feature{
+    .name = "v6k",
+    .description = "Support ARM v6k instructions",
+    .llvm_name = "v6k",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v6m = Feature{
+    .name = "v6m",
+    .description = "Support ARM v6M instructions",
+    .llvm_name = "v6m",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v6 = Feature{
+    .name = "v6",
+    .description = "Support ARM v6 instructions",
+    .llvm_name = "v6",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v6t2 = Feature{
+    .name = "v6t2",
+    .description = "Support ARM v6t2 instructions",
+    .llvm_name = "v6t2",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_thumb2,
+    },
+};
+
+pub const feature_v7 = Feature{
+    .name = "v7",
+    .description = "Support ARM v7 instructions",
+    .llvm_name = "v7",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_thumb2,
+    },
+};
+
+pub const feature_v8m = Feature{
+    .name = "v8m",
+    .description = "Support ARM v8M Baseline instructions",
+    .llvm_name = "v8m",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_v8mmain = Feature{
+    .name = "v8m.main",
+    .description = "Support ARM v8M Mainline instructions",
+    .llvm_name = "v8m.main",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_thumb2,
+    },
+};
+
+pub const feature_v8 = Feature{
+    .name = "v8",
+    .description = "Support ARM v8 instructions",
+    .llvm_name = "v8",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_perfmon,
+    },
+};
+
+pub const feature_v81mmain = Feature{
+    .name = "v8.1m.main",
+    .description = "Support ARM v8-1M Mainline instructions",
+    .llvm_name = "v8.1m.main",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_thumb2,
+    },
+};
+
+pub const feature_v81a = Feature{
+    .name = "v8.1a",
+    .description = "Support ARM v8.1a instructions",
+    .llvm_name = "v8.1a",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_perfmon,
+    },
+};
+
+pub const feature_v82a = Feature{
+    .name = "v8.2a",
+    .description = "Support ARM v8.2a instructions",
+    .llvm_name = "v8.2a",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_perfmon,
+    },
+};
+
+pub const feature_v83a = Feature{
+    .name = "v8.3a",
+    .description = "Support ARM v8.3a instructions",
+    .llvm_name = "v8.3a",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_perfmon,
+    },
+};
+
+pub const feature_v84a = Feature{
+    .name = "v8.4a",
+    .description = "Support ARM v8.4a instructions",
+    .llvm_name = "v8.4a",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_v85a = Feature{
+    .name = "v8.5a",
+    .description = "Support ARM v8.5a instructions",
+    .llvm_name = "v8.5a",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_sb,
+        &feature_perfmon,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_iwmmxt = Feature{
+    .name = "iwmmxt",
+    .description = "ARMv5te architecture",
+    .llvm_name = "iwmmxt",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_iwmmxt2 = Feature{
+    .name = "iwmmxt2",
+    .description = "ARMv5te architecture",
+    .llvm_name = "iwmmxt2",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const feature_softFloat = Feature{
+    .name = "soft-float",
+    .description = "Use software floating point features.",
+    .llvm_name = "soft-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_thumbMode = Feature{
+    .name = "thumb-mode",
+    .description = "Thumb mode",
+    .llvm_name = "thumb-mode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a5 = Feature{
+    .name = "a5",
+    .description = "Cortex-A5 ARM processors",
+    .llvm_name = "a5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a7 = Feature{
+    .name = "a7",
+    .description = "Cortex-A7 ARM processors",
+    .llvm_name = "a7",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a8 = Feature{
+    .name = "a8",
+    .description = "Cortex-A8 ARM processors",
+    .llvm_name = "a8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a9 = Feature{
+    .name = "a9",
+    .description = "Cortex-A9 ARM processors",
+    .llvm_name = "a9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a12 = Feature{
+    .name = "a12",
+    .description = "Cortex-A12 ARM processors",
+    .llvm_name = "a12",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a15 = Feature{
+    .name = "a15",
+    .description = "Cortex-A15 ARM processors",
+    .llvm_name = "a15",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a17 = Feature{
+    .name = "a17",
+    .description = "Cortex-A17 ARM processors",
+    .llvm_name = "a17",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a32 = Feature{
+    .name = "a32",
+    .description = "Cortex-A32 ARM processors",
+    .llvm_name = "a32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a35 = Feature{
+    .name = "a35",
+    .description = "Cortex-A35 ARM processors",
+    .llvm_name = "a35",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a53 = Feature{
+    .name = "a53",
+    .description = "Cortex-A53 ARM processors",
+    .llvm_name = "a53",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a55 = Feature{
+    .name = "a55",
+    .description = "Cortex-A55 ARM processors",
+    .llvm_name = "a55",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a57 = Feature{
+    .name = "a57",
+    .description = "Cortex-A57 ARM processors",
+    .llvm_name = "a57",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a72 = Feature{
+    .name = "a72",
+    .description = "Cortex-A72 ARM processors",
+    .llvm_name = "a72",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a73 = Feature{
+    .name = "a73",
+    .description = "Cortex-A73 ARM processors",
+    .llvm_name = "a73",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a75 = Feature{
+    .name = "a75",
+    .description = "Cortex-A75 ARM processors",
+    .llvm_name = "a75",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a76 = Feature{
+    .name = "a76",
+    .description = "Cortex-A76 ARM processors",
+    .llvm_name = "a76",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_exynos = Feature{
+    .name = "exynos",
+    .description = "Samsung Exynos processors",
+    .llvm_name = "exynos",
+    .subfeatures = &[_]*const Feature {
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_hwdiv,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_d32,
+        &feature_hwdivArm,
+        &feature_retAddrStack,
+        &feature_crc,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fpregs,
+        &feature_fuseLiterals,
+    },
+};
+
+pub const feature_krait = Feature{
+    .name = "krait",
+    .description = "Qualcomm Krait processors",
+    .llvm_name = "krait",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_kryo = Feature{
+    .name = "kryo",
+    .description = "Qualcomm Kryo processors",
+    .llvm_name = "kryo",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_m3 = Feature{
+    .name = "m3",
+    .description = "Cortex-M3 ARM processors",
+    .llvm_name = "m3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_r4 = Feature{
+    .name = "r4",
+    .description = "Cortex-R4 ARM processors",
+    .llvm_name = "r4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_r5 = Feature{
+    .name = "r5",
+    .description = "Cortex-R5 ARM processors",
+    .llvm_name = "r5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_r7 = Feature{
+    .name = "r7",
+    .description = "Cortex-R7 ARM processors",
+    .llvm_name = "r7",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_r52 = Feature{
+    .name = "r52",
+    .description = "Cortex-R52 ARM processors",
+    .llvm_name = "r52",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_swift = Feature{
+    .name = "swift",
+    .description = "Swift ARM processors",
+    .llvm_name = "swift",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xscale = Feature{
+    .name = "xscale",
+    .description = "ARMv5te architecture",
+    .llvm_name = "xscale",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_armv2,
+    &feature_armv2a,
+    &feature_armv3,
+    &feature_armv3m,
+    &feature_armv4,
+    &feature_armv4t,
+    &feature_armv5t,
+    &feature_armv5te,
+    &feature_armv5tej,
+    &feature_armv6,
+    &feature_armv6j,
+    &feature_armv6k,
+    &feature_armv6kz,
+    &feature_armv6M,
+    &feature_armv6sM,
+    &feature_armv6t2,
+    &feature_armv7A,
+    &feature_armv7eM,
+    &feature_armv7k,
+    &feature_armv7M,
+    &feature_armv7R,
+    &feature_armv7s,
+    &feature_armv7ve,
+    &feature_armv8A,
+    &feature_armv8Mbase,
+    &feature_armv8Mmain,
+    &feature_armv8R,
+    &feature_armv81A,
+    &feature_armv81Mmain,
+    &feature_armv82A,
+    &feature_armv83A,
+    &feature_armv84A,
+    &feature_armv85A,
+    &feature_msecext8,
+    &feature_aclass,
+    &feature_aes,
+    &feature_acquireRelease,
+    &feature_avoidMovsShop,
+    &feature_avoidPartialCpsr,
+    &feature_crc,
+    &feature_cheapPredicableCpsr,
+    &feature_vldnAlign,
+    &feature_crypto,
+    &feature_d32,
+    &feature_db,
+    &feature_dfb,
+    &feature_dsp,
+    &feature_dontWidenVmovs,
+    &feature_dotprod,
+    &feature_executeOnly,
+    &feature_expandFpMlx,
+    &feature_fp16,
+    &feature_fp16fml,
+    &feature_fp64,
+    &feature_fpao,
+    &feature_fpArmv8,
+    &feature_fpArmv8d16,
+    &feature_fpArmv8d16sp,
+    &feature_fpArmv8sp,
+    &feature_fpregs,
+    &feature_fpregs16,
+    &feature_fpregs64,
+    &feature_fullfp16,
+    &feature_fuseAes,
+    &feature_fuseLiterals,
+    &feature_hwdivArm,
+    &feature_hwdiv,
+    &feature_noBranchPredictor,
+    &feature_retAddrStack,
+    &feature_slowfpvmlx,
+    &feature_vmlxHazards,
+    &feature_lob,
+    &feature_longCalls,
+    &feature_mclass,
+    &feature_mp,
+    &feature_mve1beat,
+    &feature_mve2beat,
+    &feature_mve4beat,
+    &feature_muxedUnits,
+    &feature_neon,
+    &feature_neonfp,
+    &feature_neonFpmovs,
+    &feature_naclTrap,
+    &feature_noarm,
+    &feature_noMovt,
+    &feature_noNegImmediates,
+    &feature_disablePostraScheduler,
+    &feature_nonpipelinedVfp,
+    &feature_perfmon,
+    &feature_bit32,
+    &feature_preferIshst,
+    &feature_loopAlign,
+    &feature_preferVmovsr,
+    &feature_profUnpr,
+    &feature_ras,
+    &feature_rclass,
+    &feature_readTpHard,
+    &feature_reserveR9,
+    &feature_sb,
+    &feature_sha2,
+    &feature_slowFpBrcc,
+    &feature_slowLoadDSubreg,
+    &feature_slowOddReg,
+    &feature_slowVdup32,
+    &feature_slowVgetlni32,
+    &feature_splatVfpNeon,
+    &feature_strictAlign,
+    &feature_thumb2,
+    &feature_trustzone,
+    &feature_useAa,
+    &feature_useMisched,
+    &feature_wideStrideVfp,
+    &feature_v7clrex,
+    &feature_vfp2,
+    &feature_vfp2sp,
+    &feature_vfp3,
+    &feature_vfp3d16,
+    &feature_vfp3d16sp,
+    &feature_vfp3sp,
+    &feature_vfp4,
+    &feature_vfp4d16,
+    &feature_vfp4d16sp,
+    &feature_vfp4sp,
+    &feature_vmlxForwarding,
+    &feature_virtualization,
+    &feature_zcz,
+    &feature_mvefp,
+    &feature_mve,
+    &feature_v4t,
+    &feature_v5te,
+    &feature_v5t,
+    &feature_v6k,
+    &feature_v6m,
+    &feature_v6,
+    &feature_v6t2,
+    &feature_v7,
+    &feature_v8m,
+    &feature_v8mmain,
+    &feature_v8,
+    &feature_v81mmain,
+    &feature_v81a,
+    &feature_v82a,
+    &feature_v83a,
+    &feature_v84a,
+    &feature_v85a,
+    &feature_iwmmxt,
+    &feature_iwmmxt2,
+    &feature_softFloat,
+    &feature_thumbMode,
+    &feature_a5,
+    &feature_a7,
+    &feature_a8,
+    &feature_a9,
+    &feature_a12,
+    &feature_a15,
+    &feature_a17,
+    &feature_a32,
+    &feature_a35,
+    &feature_a53,
+    &feature_a55,
+    &feature_a57,
+    &feature_a72,
+    &feature_a73,
+    &feature_a75,
+    &feature_a76,
+    &feature_exynos,
+    &feature_krait,
+    &feature_kryo,
+    &feature_m3,
+    &feature_r4,
+    &feature_r5,
+    &feature_r7,
+    &feature_r52,
+    &feature_swift,
+    &feature_xscale,
+};
+
+pub const cpu_arm1020e = Cpu{
+    .name = "arm1020e",
+    .llvm_name = "arm1020e",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm1020t = Cpu{
+    .name = "arm1020t",
+    .llvm_name = "arm1020t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5t,
+    },
+};
+
+pub const cpu_arm1022e = Cpu{
+    .name = "arm1022e",
+    .llvm_name = "arm1022e",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm10e = Cpu{
+    .name = "arm10e",
+    .llvm_name = "arm10e",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm10tdmi = Cpu{
+    .name = "arm10tdmi",
+    .llvm_name = "arm10tdmi",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5t,
+    },
+};
+
+pub const cpu_arm1136jS = Cpu{
+    .name = "arm1136j-s",
+    .llvm_name = "arm1136j-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+        &feature_armv6,
+    },
+};
+
+pub const cpu_arm1136jfS = Cpu{
+    .name = "arm1136jf-s",
+    .llvm_name = "arm1136jf-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+        &feature_armv6,
+        &feature_slowfpvmlx,
+        &feature_fpregs,
+        &feature_vfp2,
+    },
+};
+
+pub const cpu_arm1156t2S = Cpu{
+    .name = "arm1156t2-s",
+    .llvm_name = "arm1156t2-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+        &feature_thumb2,
+        &feature_armv6t2,
+    },
+};
+
+pub const cpu_arm1156t2fS = Cpu{
+    .name = "arm1156t2f-s",
+    .llvm_name = "arm1156t2f-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_dsp,
+        &feature_thumb2,
+        &feature_armv6t2,
+        &feature_slowfpvmlx,
+        &feature_fpregs,
+        &feature_vfp2,
+    },
+};
+
+pub const cpu_arm1176jS = Cpu{
+    .name = "arm1176j-s",
+    .llvm_name = "arm1176j-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_trustzone,
+        &feature_armv6kz,
+    },
+};
+
+pub const cpu_arm1176jzS = Cpu{
+    .name = "arm1176jz-s",
+    .llvm_name = "arm1176jz-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_trustzone,
+        &feature_armv6kz,
+    },
+};
+
+pub const cpu_arm1176jzfS = Cpu{
+    .name = "arm1176jzf-s",
+    .llvm_name = "arm1176jzf-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_trustzone,
+        &feature_armv6kz,
+        &feature_slowfpvmlx,
+        &feature_fpregs,
+        &feature_vfp2,
+    },
+};
+
+pub const cpu_arm710t = Cpu{
+    .name = "arm710t",
+    .llvm_name = "arm710t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm720t = Cpu{
+    .name = "arm720t",
+    .llvm_name = "arm720t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm7tdmi = Cpu{
+    .name = "arm7tdmi",
+    .llvm_name = "arm7tdmi",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm7tdmiS = Cpu{
+    .name = "arm7tdmi-s",
+    .llvm_name = "arm7tdmi-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm8 = Cpu{
+    .name = "arm8",
+    .llvm_name = "arm8",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_arm810 = Cpu{
+    .name = "arm810",
+    .llvm_name = "arm810",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_arm9 = Cpu{
+    .name = "arm9",
+    .llvm_name = "arm9",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm920 = Cpu{
+    .name = "arm920",
+    .llvm_name = "arm920",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm920t = Cpu{
+    .name = "arm920t",
+    .llvm_name = "arm920t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm922t = Cpu{
+    .name = "arm922t",
+    .llvm_name = "arm922t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm926ejS = Cpu{
+    .name = "arm926ej-s",
+    .llvm_name = "arm926ej-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm940t = Cpu{
+    .name = "arm940t",
+    .llvm_name = "arm940t",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_arm946eS = Cpu{
+    .name = "arm946e-s",
+    .llvm_name = "arm946e-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm966eS = Cpu{
+    .name = "arm966e-s",
+    .llvm_name = "arm966e-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm968eS = Cpu{
+    .name = "arm968e-s",
+    .llvm_name = "arm968e-s",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm9e = Cpu{
+    .name = "arm9e",
+    .llvm_name = "arm9e",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_arm9tdmi = Cpu{
+    .name = "arm9tdmi",
+    .llvm_name = "arm9tdmi",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_cortexA12 = Cpu{
+    .name = "cortex-a12",
+    .llvm_name = "cortex-a12",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidPartialCpsr,
+        &feature_retAddrStack,
+        &feature_mp,
+        &feature_trustzone,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_vmlxForwarding,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_virtualization,
+        &feature_a12,
+    },
+};
+
+pub const cpu_cortexA15 = Cpu{
+    .name = "cortex-a15",
+    .llvm_name = "cortex-a15",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidPartialCpsr,
+        &feature_vldnAlign,
+        &feature_dontWidenVmovs,
+        &feature_retAddrStack,
+        &feature_mp,
+        &feature_muxedUnits,
+        &feature_splatVfpNeon,
+        &feature_trustzone,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_virtualization,
+        &feature_a15,
+    },
+};
+
+pub const cpu_cortexA17 = Cpu{
+    .name = "cortex-a17",
+    .llvm_name = "cortex-a17",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidPartialCpsr,
+        &feature_retAddrStack,
+        &feature_mp,
+        &feature_trustzone,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_vmlxForwarding,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_virtualization,
+        &feature_a17,
+    },
+};
+
+pub const cpu_cortexA32 = Cpu{
+    .name = "cortex-a32",
+    .llvm_name = "cortex-a32",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+    },
+};
+
+pub const cpu_cortexA35 = Cpu{
+    .name = "cortex-a35",
+    .llvm_name = "cortex-a35",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+        &feature_a35,
+    },
+};
+
+pub const cpu_cortexA5 = Cpu{
+    .name = "cortex-a5",
+    .llvm_name = "cortex-a5",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_mp,
+        &feature_slowFpBrcc,
+        &feature_trustzone,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_vmlxForwarding,
+        &feature_a5,
+    },
+};
+
+pub const cpu_cortexA53 = Cpu{
+    .name = "cortex-a53",
+    .llvm_name = "cortex-a53",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+        &feature_fpao,
+        &feature_a53,
+    },
+};
+
+pub const cpu_cortexA55 = Cpu{
+    .name = "cortex-a55",
+    .llvm_name = "cortex-a55",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_dotprod,
+        &feature_a55,
+    },
+};
+
+pub const cpu_cortexA57 = Cpu{
+    .name = "cortex-a57",
+    .llvm_name = "cortex-a57",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_avoidPartialCpsr,
+        &feature_cheapPredicableCpsr,
+        &feature_crypto,
+        &feature_fpao,
+        &feature_a57,
+    },
+};
+
+pub const cpu_cortexA7 = Cpu{
+    .name = "cortex-a7",
+    .llvm_name = "cortex-a7",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_vmlxHazards,
+        &feature_mp,
+        &feature_slowFpBrcc,
+        &feature_trustzone,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_vmlxForwarding,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_virtualization,
+        &feature_a7,
+    },
+};
+
+pub const cpu_cortexA72 = Cpu{
+    .name = "cortex-a72",
+    .llvm_name = "cortex-a72",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+        &feature_a72,
+    },
+};
+
+pub const cpu_cortexA73 = Cpu{
+    .name = "cortex-a73",
+    .llvm_name = "cortex-a73",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+        &feature_a73,
+    },
+};
+
+pub const cpu_cortexA75 = Cpu{
+    .name = "cortex-a75",
+    .llvm_name = "cortex-a75",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_dotprod,
+        &feature_a75,
+    },
+};
+
+pub const cpu_cortexA76 = Cpu{
+    .name = "cortex-a76",
+    .llvm_name = "cortex-a76",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_crypto,
+        &feature_dotprod,
+        &feature_fullfp16,
+        &feature_a76,
+    },
+};
+
+pub const cpu_cortexA76ae = Cpu{
+    .name = "cortex-a76ae",
+    .llvm_name = "cortex-a76ae",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_crypto,
+        &feature_dotprod,
+        &feature_fullfp16,
+        &feature_a76,
+    },
+};
+
+pub const cpu_cortexA8 = Cpu{
+    .name = "cortex-a8",
+    .llvm_name = "cortex-a8",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_vmlxHazards,
+        &feature_nonpipelinedVfp,
+        &feature_slowFpBrcc,
+        &feature_trustzone,
+        &feature_vmlxForwarding,
+        &feature_a8,
+    },
+};
+
+pub const cpu_cortexA9 = Cpu{
+    .name = "cortex-a9",
+    .llvm_name = "cortex-a9",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidPartialCpsr,
+        &feature_vldnAlign,
+        &feature_expandFpMlx,
+        &feature_fp16,
+        &feature_retAddrStack,
+        &feature_vmlxHazards,
+        &feature_mp,
+        &feature_muxedUnits,
+        &feature_neonFpmovs,
+        &feature_preferVmovsr,
+        &feature_trustzone,
+        &feature_vmlxForwarding,
+        &feature_a9,
+    },
+};
+
+pub const cpu_cortexM0 = Cpu{
+    .name = "cortex-m0",
+    .llvm_name = "cortex-m0",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_armv6M,
+    },
+};
+
+pub const cpu_cortexM0plus = Cpu{
+    .name = "cortex-m0plus",
+    .llvm_name = "cortex-m0plus",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_armv6M,
+    },
+};
+
+pub const cpu_cortexM1 = Cpu{
+    .name = "cortex-m1",
+    .llvm_name = "cortex-m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_armv6M,
+    },
+};
+
+pub const cpu_cortexM23 = Cpu{
+    .name = "cortex-m23",
+    .llvm_name = "cortex-m23",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_hwdiv,
+        &feature_armv8Mbase,
+        &feature_noMovt,
+    },
+};
+
+pub const cpu_cortexM3 = Cpu{
+    .name = "cortex-m3",
+    .llvm_name = "cortex-m3",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_armv7M,
+        &feature_noBranchPredictor,
+        &feature_loopAlign,
+        &feature_useAa,
+        &feature_useMisched,
+        &feature_m3,
+    },
+};
+
+pub const cpu_cortexM33 = Cpu{
+    .name = "cortex-m33",
+    .llvm_name = "cortex-m33",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_armv8Mmain,
+        &feature_dsp,
+        &feature_fp16,
+        &feature_fpregs,
+        &feature_fpArmv8d16sp,
+        &feature_noBranchPredictor,
+        &feature_slowfpvmlx,
+        &feature_loopAlign,
+        &feature_useAa,
+        &feature_useMisched,
+    },
+};
+
+pub const cpu_cortexM35p = Cpu{
+    .name = "cortex-m35p",
+    .llvm_name = "cortex-m35p",
+    .subfeatures = &[_]*const Feature {
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_msecext8,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_armv8Mmain,
+        &feature_dsp,
+        &feature_fp16,
+        &feature_fpregs,
+        &feature_fpArmv8d16sp,
+        &feature_noBranchPredictor,
+        &feature_slowfpvmlx,
+        &feature_loopAlign,
+        &feature_useAa,
+        &feature_useMisched,
+    },
+};
+
+pub const cpu_cortexM4 = Cpu{
+    .name = "cortex-m4",
+    .llvm_name = "cortex-m4",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_armv7eM,
+        &feature_noBranchPredictor,
+        &feature_slowfpvmlx,
+        &feature_loopAlign,
+        &feature_useAa,
+        &feature_useMisched,
+        &feature_fp16,
+        &feature_fpregs,
+        &feature_vfp4d16sp,
+    },
+};
+
+pub const cpu_cortexM7 = Cpu{
+    .name = "cortex-m7",
+    .llvm_name = "cortex-m7",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_armv7eM,
+        &feature_fp16,
+        &feature_fpregs,
+        &feature_fpArmv8d16,
+    },
+};
+
+pub const cpu_cortexR4 = Cpu{
+    .name = "cortex-r4",
+    .llvm_name = "cortex-r4",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_armv7R,
+        &feature_avoidPartialCpsr,
+        &feature_retAddrStack,
+        &feature_r4,
+    },
+};
+
+pub const cpu_cortexR4f = Cpu{
+    .name = "cortex-r4f",
+    .llvm_name = "cortex-r4f",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_armv7R,
+        &feature_avoidPartialCpsr,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_fpregs,
+        &feature_vfp3d16,
+        &feature_r4,
+    },
+};
+
+pub const cpu_cortexR5 = Cpu{
+    .name = "cortex-r5",
+    .llvm_name = "cortex-r5",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_armv7R,
+        &feature_avoidPartialCpsr,
+        &feature_hwdivArm,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_fpregs,
+        &feature_vfp3d16,
+        &feature_r5,
+    },
+};
+
+pub const cpu_cortexR52 = Cpu{
+    .name = "cortex-r52",
+    .llvm_name = "cortex-r52",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_dfb,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_rclass,
+        &feature_armv8R,
+        &feature_fpao,
+        &feature_useAa,
+        &feature_useMisched,
+        &feature_r52,
+    },
+};
+
+pub const cpu_cortexR7 = Cpu{
+    .name = "cortex-r7",
+    .llvm_name = "cortex-r7",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_armv7R,
+        &feature_avoidPartialCpsr,
+        &feature_fp16,
+        &feature_hwdivArm,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_mp,
+        &feature_slowFpBrcc,
+        &feature_fpregs,
+        &feature_vfp3d16,
+        &feature_r7,
+    },
+};
+
+pub const cpu_cortexR8 = Cpu{
+    .name = "cortex-r8",
+    .llvm_name = "cortex-r8",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_dsp,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_armv7R,
+        &feature_avoidPartialCpsr,
+        &feature_fp16,
+        &feature_hwdivArm,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_mp,
+        &feature_slowFpBrcc,
+        &feature_fpregs,
+        &feature_vfp3d16,
+    },
+};
+
+pub const cpu_cyclone = Cpu{
+    .name = "cyclone",
+    .llvm_name = "cyclone",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_avoidMovsShop,
+        &feature_avoidPartialCpsr,
+        &feature_crypto,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_neonfp,
+        &feature_disablePostraScheduler,
+        &feature_useMisched,
+        &feature_vfp4,
+        &feature_zcz,
+        &feature_swift,
+    },
+};
+
+pub const cpu_ep9312 = Cpu{
+    .name = "ep9312",
+    .llvm_name = "ep9312",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv4t,
+    },
+};
+
+pub const cpu_exynosM1 = Cpu{
+    .name = "exynos-m1",
+    .llvm_name = "exynos-m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fuseLiterals,
+        &feature_exynos,
+    },
+};
+
+pub const cpu_exynosM2 = Cpu{
+    .name = "exynos-m2",
+    .llvm_name = "exynos-m2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fuseLiterals,
+        &feature_exynos,
+    },
+};
+
+pub const cpu_exynosM3 = Cpu{
+    .name = "exynos-m3",
+    .llvm_name = "exynos-m3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fuseLiterals,
+        &feature_exynos,
+    },
+};
+
+pub const cpu_exynosM4 = Cpu{
+    .name = "exynos-m4",
+    .llvm_name = "exynos-m4",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_dotprod,
+        &feature_fullfp16,
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fuseLiterals,
+        &feature_exynos,
+    },
+};
+
+pub const cpu_exynosM5 = Cpu{
+    .name = "exynos-m5",
+    .llvm_name = "exynos-m5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_dotprod,
+        &feature_fullfp16,
+        &feature_slowFpBrcc,
+        &feature_slowfpvmlx,
+        &feature_slowVdup32,
+        &feature_wideStrideVfp,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
+        &feature_zcz,
+        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_useAa,
+        &feature_dontWidenVmovs,
+        &feature_fuseLiterals,
+        &feature_exynos,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_iwmmxt = Cpu{
+    .name = "iwmmxt",
+    .llvm_name = "iwmmxt",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpu_krait = Cpu{
+    .name = "krait",
+    .llvm_name = "krait",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidPartialCpsr,
+        &feature_vldnAlign,
+        &feature_fp16,
+        &feature_hwdivArm,
+        &feature_hwdiv,
+        &feature_retAddrStack,
+        &feature_muxedUnits,
+        &feature_vfp4,
+        &feature_vmlxForwarding,
+        &feature_krait,
+    },
+};
+
+pub const cpu_kryo = Cpu{
+    .name = "kryo",
+    .llvm_name = "kryo",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv8A,
+        &feature_crypto,
+        &feature_kryo,
+    },
+};
+
+pub const cpu_mpcore = Cpu{
+    .name = "mpcore",
+    .llvm_name = "mpcore",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv6k,
+        &feature_slowfpvmlx,
+        &feature_fpregs,
+        &feature_vfp2,
+    },
+};
+
+pub const cpu_mpcorenovfp = Cpu{
+    .name = "mpcorenovfp",
+    .llvm_name = "mpcorenovfp",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv6k,
+    },
+};
+
+pub const cpu_neoverseN1 = Cpu{
+    .name = "neoverse-n1",
+    .llvm_name = "neoverse-n1",
+    .subfeatures = &[_]*const Feature {
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_ras,
+        &feature_fp16,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_hwdivArm,
+        &feature_crc,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv82A,
+        &feature_crypto,
+        &feature_dotprod,
+    },
+};
+
+pub const cpu_sc000 = Cpu{
+    .name = "sc000",
+    .llvm_name = "sc000",
+    .subfeatures = &[_]*const Feature {
+        &feature_db,
+        &feature_thumbMode,
+        &feature_mclass,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_strictAlign,
+        &feature_armv6M,
+    },
+};
+
+pub const cpu_sc300 = Cpu{
+    .name = "sc300",
+    .llvm_name = "sc300",
+    .subfeatures = &[_]*const Feature {
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_mclass,
+        &feature_thumbMode,
+        &feature_noarm,
+        &feature_v4t,
+        &feature_perfmon,
+        &feature_hwdiv,
+        &feature_armv7M,
+        &feature_noBranchPredictor,
+        &feature_useAa,
+        &feature_useMisched,
+        &feature_m3,
+    },
+};
+
+pub const cpu_strongarm = Cpu{
+    .name = "strongarm",
+    .llvm_name = "strongarm",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_strongarm110 = Cpu{
+    .name = "strongarm110",
+    .llvm_name = "strongarm110",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_strongarm1100 = Cpu{
+    .name = "strongarm1100",
+    .llvm_name = "strongarm1100",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_strongarm1110 = Cpu{
+    .name = "strongarm1110",
+    .llvm_name = "strongarm1110",
+    .subfeatures = &[_]*const Feature {
+        &feature_armv4,
+    },
+};
+
+pub const cpu_swift = Cpu{
+    .name = "swift",
+    .llvm_name = "swift",
+    .subfeatures = &[_]*const Feature {
+        &feature_perfmon,
+        &feature_v7clrex,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v4t,
+        &feature_d32,
+        &feature_aclass,
+        &feature_dsp,
+        &feature_fpregs,
+        &feature_armv7A,
+        &feature_avoidMovsShop,
+        &feature_avoidPartialCpsr,
+        &feature_hwdivArm,
+        &feature_hwdiv,
+        &feature_retAddrStack,
+        &feature_slowfpvmlx,
+        &feature_vmlxHazards,
+        &feature_mp,
+        &feature_neonfp,
+        &feature_disablePostraScheduler,
+        &feature_preferIshst,
+        &feature_profUnpr,
+        &feature_slowLoadDSubreg,
+        &feature_slowOddReg,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
+        &feature_useMisched,
+        &feature_wideStrideVfp,
+        &feature_fp16,
+        &feature_vfp4,
+        &feature_swift,
+    },
+};
+
+pub const cpu_xscale = Cpu{
+    .name = "xscale",
+    .llvm_name = "xscale",
+    .subfeatures = &[_]*const Feature {
+        &feature_v4t,
+        &feature_armv5te,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_arm1020e,
+    &cpu_arm1020t,
+    &cpu_arm1022e,
+    &cpu_arm10e,
+    &cpu_arm10tdmi,
+    &cpu_arm1136jS,
+    &cpu_arm1136jfS,
+    &cpu_arm1156t2S,
+    &cpu_arm1156t2fS,
+    &cpu_arm1176jS,
+    &cpu_arm1176jzS,
+    &cpu_arm1176jzfS,
+    &cpu_arm710t,
+    &cpu_arm720t,
+    &cpu_arm7tdmi,
+    &cpu_arm7tdmiS,
+    &cpu_arm8,
+    &cpu_arm810,
+    &cpu_arm9,
+    &cpu_arm920,
+    &cpu_arm920t,
+    &cpu_arm922t,
+    &cpu_arm926ejS,
+    &cpu_arm940t,
+    &cpu_arm946eS,
+    &cpu_arm966eS,
+    &cpu_arm968eS,
+    &cpu_arm9e,
+    &cpu_arm9tdmi,
+    &cpu_cortexA12,
+    &cpu_cortexA15,
+    &cpu_cortexA17,
+    &cpu_cortexA32,
+    &cpu_cortexA35,
+    &cpu_cortexA5,
+    &cpu_cortexA53,
+    &cpu_cortexA55,
+    &cpu_cortexA57,
+    &cpu_cortexA7,
+    &cpu_cortexA72,
+    &cpu_cortexA73,
+    &cpu_cortexA75,
+    &cpu_cortexA76,
+    &cpu_cortexA76ae,
+    &cpu_cortexA8,
+    &cpu_cortexA9,
+    &cpu_cortexM0,
+    &cpu_cortexM0plus,
+    &cpu_cortexM1,
+    &cpu_cortexM23,
+    &cpu_cortexM3,
+    &cpu_cortexM33,
+    &cpu_cortexM35p,
+    &cpu_cortexM4,
+    &cpu_cortexM7,
+    &cpu_cortexR4,
+    &cpu_cortexR4f,
+    &cpu_cortexR5,
+    &cpu_cortexR52,
+    &cpu_cortexR7,
+    &cpu_cortexR8,
+    &cpu_cyclone,
+    &cpu_ep9312,
+    &cpu_exynosM1,
+    &cpu_exynosM2,
+    &cpu_exynosM3,
+    &cpu_exynosM4,
+    &cpu_exynosM5,
+    &cpu_generic,
+    &cpu_iwmmxt,
+    &cpu_krait,
+    &cpu_kryo,
+    &cpu_mpcore,
+    &cpu_mpcorenovfp,
+    &cpu_neoverseN1,
+    &cpu_sc000,
+    &cpu_sc300,
+    &cpu_strongarm,
+    &cpu_strongarm110,
+    &cpu_strongarm1100,
+    &cpu_strongarm1110,
+    &cpu_swift,
+    &cpu_xscale,
+};
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
new file mode 100644
index 0000000000000000000000000000000000000000..a843ba5e28776304461bcf829ee12d6f5d8ae513
--- /dev/null
+++ b/lib/std/target/avr.zig
@@ -0,0 +1,5578 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_avr0 = Feature{
+    .name = "avr0",
+    .description = "The device is a part of the avr0 family",
+    .llvm_name = "avr0",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avr1 = Feature{
+    .name = "avr1",
+    .description = "The device is a part of the avr1 family",
+    .llvm_name = "avr1",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+    },
+};
+
+pub const feature_avr2 = Feature{
+    .name = "avr2",
+    .description = "The device is a part of the avr2 family",
+    .llvm_name = "avr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr3 = Feature{
+    .name = "avr3",
+    .description = "The device is a part of the avr3 family",
+    .llvm_name = "avr3",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr4 = Feature{
+    .name = "avr4",
+    .description = "The device is a part of the avr4 family",
+    .llvm_name = "avr4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr5 = Feature{
+    .name = "avr5",
+    .description = "The device is a part of the avr5 family",
+    .llvm_name = "avr5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr6 = Feature{
+    .name = "avr6",
+    .description = "The device is a part of the avr6 family",
+    .llvm_name = "avr6",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr25 = Feature{
+    .name = "avr25",
+    .description = "The device is a part of the avr25 family",
+    .llvm_name = "avr25",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr31 = Feature{
+    .name = "avr31",
+    .description = "The device is a part of the avr31 family",
+    .llvm_name = "avr31",
+    .subfeatures = &[_]*const Feature {
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_elpm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr35 = Feature{
+    .name = "avr35",
+    .description = "The device is a part of the avr35 family",
+    .llvm_name = "avr35",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avr51 = Feature{
+    .name = "avr51",
+    .description = "The device is a part of the avr51 family",
+    .llvm_name = "avr51",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+    },
+};
+
+pub const feature_avrtiny = Feature{
+    .name = "avrtiny",
+    .description = "The device is a part of the avrtiny family",
+    .llvm_name = "avrtiny",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+    },
+};
+
+pub const feature_xmega = Feature{
+    .name = "xmega",
+    .description = "The device is a part of the xmega family",
+    .llvm_name = "xmega",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+    },
+};
+
+pub const feature_xmegau = Feature{
+    .name = "xmegau",
+    .description = "The device is a part of the xmegau family",
+    .llvm_name = "xmegau",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+    },
+};
+
+pub const feature_addsubiw = Feature{
+    .name = "addsubiw",
+    .description = "Enable 16-bit register-immediate addition and subtraction instructions",
+    .llvm_name = "addsubiw",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_break = Feature{
+    .name = "break",
+    .description = "The device supports the `BREAK` debugging instruction",
+    .llvm_name = "break",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_des = Feature{
+    .name = "des",
+    .description = "The device supports the `DES k` encryption instruction",
+    .llvm_name = "des",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_eijmpcall = Feature{
+    .name = "eijmpcall",
+    .description = "The device supports the `EIJMP`/`EICALL` instructions",
+    .llvm_name = "eijmpcall",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_elpm = Feature{
+    .name = "elpm",
+    .description = "The device supports the ELPM instruction",
+    .llvm_name = "elpm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_elpmx = Feature{
+    .name = "elpmx",
+    .description = "The device supports the `ELPM Rd, Z[+]` instructions",
+    .llvm_name = "elpmx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ijmpcall = Feature{
+    .name = "ijmpcall",
+    .description = "The device supports `IJMP`/`ICALL`instructions",
+    .llvm_name = "ijmpcall",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_jmpcall = Feature{
+    .name = "jmpcall",
+    .description = "The device supports the `JMP` and `CALL` instructions",
+    .llvm_name = "jmpcall",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lpm = Feature{
+    .name = "lpm",
+    .description = "The device supports the `LPM` instruction",
+    .llvm_name = "lpm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lpmx = Feature{
+    .name = "lpmx",
+    .description = "The device supports the `LPM Rd, Z[+]` instruction",
+    .llvm_name = "lpmx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_movw = Feature{
+    .name = "movw",
+    .description = "The device supports the 16-bit MOVW instruction",
+    .llvm_name = "movw",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mul = Feature{
+    .name = "mul",
+    .description = "The device supports the multiplication instructions",
+    .llvm_name = "mul",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rmw = Feature{
+    .name = "rmw",
+    .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
+    .llvm_name = "rmw",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_spm = Feature{
+    .name = "spm",
+    .description = "The device supports the `SPM` instruction",
+    .llvm_name = "spm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_spmx = Feature{
+    .name = "spmx",
+    .description = "The device supports the `SPM Z+` instruction",
+    .llvm_name = "spmx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sram = Feature{
+    .name = "sram",
+    .description = "The device has random access memory",
+    .llvm_name = "sram",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_special = Feature{
+    .name = "special",
+    .description = "Enable use of the entire instruction set - used for debugging",
+    .llvm_name = "special",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_rmw,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+    },
+};
+
+pub const feature_smallstack = Feature{
+    .name = "smallstack",
+    .description = "The device has an 8-bit stack pointer",
+    .llvm_name = "smallstack",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tinyencoding = Feature{
+    .name = "tinyencoding",
+    .description = "The device has Tiny core specific instruction encodings",
+    .llvm_name = "tinyencoding",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_avr0,
+    &feature_avr1,
+    &feature_avr2,
+    &feature_avr3,
+    &feature_avr4,
+    &feature_avr5,
+    &feature_avr6,
+    &feature_avr25,
+    &feature_avr31,
+    &feature_avr35,
+    &feature_avr51,
+    &feature_avrtiny,
+    &feature_xmega,
+    &feature_xmegau,
+    &feature_addsubiw,
+    &feature_break,
+    &feature_des,
+    &feature_eijmpcall,
+    &feature_elpm,
+    &feature_elpmx,
+    &feature_ijmpcall,
+    &feature_jmpcall,
+    &feature_lpm,
+    &feature_lpmx,
+    &feature_movw,
+    &feature_mul,
+    &feature_rmw,
+    &feature_spm,
+    &feature_spmx,
+    &feature_sram,
+    &feature_special,
+    &feature_smallstack,
+    &feature_tinyencoding,
+};
+
+pub const cpu_at43usb320 = Cpu{
+    .name = "at43usb320",
+    .llvm_name = "at43usb320",
+    .subfeatures = &[_]*const Feature {
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr31,
+    },
+};
+
+pub const cpu_at43usb355 = Cpu{
+    .name = "at43usb355",
+    .llvm_name = "at43usb355",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+    },
+};
+
+pub const cpu_at76c711 = Cpu{
+    .name = "at76c711",
+    .llvm_name = "at76c711",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+    },
+};
+
+pub const cpu_at86rf401 = Cpu{
+    .name = "at86rf401",
+    .llvm_name = "at86rf401",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+        &feature_lpmx,
+        &feature_movw,
+    },
+};
+
+pub const cpu_at90c8534 = Cpu{
+    .name = "at90c8534",
+    .llvm_name = "at90c8534",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90can128 = Cpu{
+    .name = "at90can128",
+    .llvm_name = "at90can128",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_at90can32 = Cpu{
+    .name = "at90can32",
+    .llvm_name = "at90can32",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90can64 = Cpu{
+    .name = "at90can64",
+    .llvm_name = "at90can64",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90pwm1 = Cpu{
+    .name = "at90pwm1",
+    .llvm_name = "at90pwm1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90pwm161 = Cpu{
+    .name = "at90pwm161",
+    .llvm_name = "at90pwm161",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90pwm2 = Cpu{
+    .name = "at90pwm2",
+    .llvm_name = "at90pwm2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90pwm216 = Cpu{
+    .name = "at90pwm216",
+    .llvm_name = "at90pwm216",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90pwm2b = Cpu{
+    .name = "at90pwm2b",
+    .llvm_name = "at90pwm2b",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90pwm3 = Cpu{
+    .name = "at90pwm3",
+    .llvm_name = "at90pwm3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90pwm316 = Cpu{
+    .name = "at90pwm316",
+    .llvm_name = "at90pwm316",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90pwm3b = Cpu{
+    .name = "at90pwm3b",
+    .llvm_name = "at90pwm3b",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90pwm81 = Cpu{
+    .name = "at90pwm81",
+    .llvm_name = "at90pwm81",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_at90s1200 = Cpu{
+    .name = "at90s1200",
+    .llvm_name = "at90s1200",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+    },
+};
+
+pub const cpu_at90s2313 = Cpu{
+    .name = "at90s2313",
+    .llvm_name = "at90s2313",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s2323 = Cpu{
+    .name = "at90s2323",
+    .llvm_name = "at90s2323",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s2333 = Cpu{
+    .name = "at90s2333",
+    .llvm_name = "at90s2333",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s2343 = Cpu{
+    .name = "at90s2343",
+    .llvm_name = "at90s2343",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s4414 = Cpu{
+    .name = "at90s4414",
+    .llvm_name = "at90s4414",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s4433 = Cpu{
+    .name = "at90s4433",
+    .llvm_name = "at90s4433",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s4434 = Cpu{
+    .name = "at90s4434",
+    .llvm_name = "at90s4434",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s8515 = Cpu{
+    .name = "at90s8515",
+    .llvm_name = "at90s8515",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90s8535 = Cpu{
+    .name = "at90s8535",
+    .llvm_name = "at90s8535",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_at90scr100 = Cpu{
+    .name = "at90scr100",
+    .llvm_name = "at90scr100",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90usb1286 = Cpu{
+    .name = "at90usb1286",
+    .llvm_name = "at90usb1286",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_at90usb1287 = Cpu{
+    .name = "at90usb1287",
+    .llvm_name = "at90usb1287",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_at90usb162 = Cpu{
+    .name = "at90usb162",
+    .llvm_name = "at90usb162",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_at90usb646 = Cpu{
+    .name = "at90usb646",
+    .llvm_name = "at90usb646",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90usb647 = Cpu{
+    .name = "at90usb647",
+    .llvm_name = "at90usb647",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_at90usb82 = Cpu{
+    .name = "at90usb82",
+    .llvm_name = "at90usb82",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_at94k = Cpu{
+    .name = "at94k",
+    .llvm_name = "at94k",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+        &feature_lpmx,
+        &feature_movw,
+        &feature_mul,
+    },
+};
+
+pub const cpu_ata5272 = Cpu{
+    .name = "ata5272",
+    .llvm_name = "ata5272",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_ata5505 = Cpu{
+    .name = "ata5505",
+    .llvm_name = "ata5505",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_ata5790 = Cpu{
+    .name = "ata5790",
+    .llvm_name = "ata5790",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_ata5795 = Cpu{
+    .name = "ata5795",
+    .llvm_name = "ata5795",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_ata6285 = Cpu{
+    .name = "ata6285",
+    .llvm_name = "ata6285",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_ata6286 = Cpu{
+    .name = "ata6286",
+    .llvm_name = "ata6286",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_ata6289 = Cpu{
+    .name = "ata6289",
+    .llvm_name = "ata6289",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega103 = Cpu{
+    .name = "atmega103",
+    .llvm_name = "atmega103",
+    .subfeatures = &[_]*const Feature {
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr31,
+    },
+};
+
+pub const cpu_atmega128 = Cpu{
+    .name = "atmega128",
+    .llvm_name = "atmega128",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega1280 = Cpu{
+    .name = "atmega1280",
+    .llvm_name = "atmega1280",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega1281 = Cpu{
+    .name = "atmega1281",
+    .llvm_name = "atmega1281",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega1284 = Cpu{
+    .name = "atmega1284",
+    .llvm_name = "atmega1284",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega1284p = Cpu{
+    .name = "atmega1284p",
+    .llvm_name = "atmega1284p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega1284rfr2 = Cpu{
+    .name = "atmega1284rfr2",
+    .llvm_name = "atmega1284rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega128a = Cpu{
+    .name = "atmega128a",
+    .llvm_name = "atmega128a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega128rfa1 = Cpu{
+    .name = "atmega128rfa1",
+    .llvm_name = "atmega128rfa1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega128rfr2 = Cpu{
+    .name = "atmega128rfr2",
+    .llvm_name = "atmega128rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_atmega16 = Cpu{
+    .name = "atmega16",
+    .llvm_name = "atmega16",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega161 = Cpu{
+    .name = "atmega161",
+    .llvm_name = "atmega161",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+        &feature_lpmx,
+        &feature_movw,
+        &feature_mul,
+        &feature_spm,
+    },
+};
+
+pub const cpu_atmega162 = Cpu{
+    .name = "atmega162",
+    .llvm_name = "atmega162",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega163 = Cpu{
+    .name = "atmega163",
+    .llvm_name = "atmega163",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+        &feature_lpmx,
+        &feature_movw,
+        &feature_mul,
+        &feature_spm,
+    },
+};
+
+pub const cpu_atmega164a = Cpu{
+    .name = "atmega164a",
+    .llvm_name = "atmega164a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega164p = Cpu{
+    .name = "atmega164p",
+    .llvm_name = "atmega164p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega164pa = Cpu{
+    .name = "atmega164pa",
+    .llvm_name = "atmega164pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega165 = Cpu{
+    .name = "atmega165",
+    .llvm_name = "atmega165",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega165a = Cpu{
+    .name = "atmega165a",
+    .llvm_name = "atmega165a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega165p = Cpu{
+    .name = "atmega165p",
+    .llvm_name = "atmega165p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega165pa = Cpu{
+    .name = "atmega165pa",
+    .llvm_name = "atmega165pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega168 = Cpu{
+    .name = "atmega168",
+    .llvm_name = "atmega168",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega168a = Cpu{
+    .name = "atmega168a",
+    .llvm_name = "atmega168a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega168p = Cpu{
+    .name = "atmega168p",
+    .llvm_name = "atmega168p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega168pa = Cpu{
+    .name = "atmega168pa",
+    .llvm_name = "atmega168pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega169 = Cpu{
+    .name = "atmega169",
+    .llvm_name = "atmega169",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega169a = Cpu{
+    .name = "atmega169a",
+    .llvm_name = "atmega169a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega169p = Cpu{
+    .name = "atmega169p",
+    .llvm_name = "atmega169p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega169pa = Cpu{
+    .name = "atmega169pa",
+    .llvm_name = "atmega169pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16a = Cpu{
+    .name = "atmega16a",
+    .llvm_name = "atmega16a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16hva = Cpu{
+    .name = "atmega16hva",
+    .llvm_name = "atmega16hva",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16hva2 = Cpu{
+    .name = "atmega16hva2",
+    .llvm_name = "atmega16hva2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16hvb = Cpu{
+    .name = "atmega16hvb",
+    .llvm_name = "atmega16hvb",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16hvbrevb = Cpu{
+    .name = "atmega16hvbrevb",
+    .llvm_name = "atmega16hvbrevb",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16m1 = Cpu{
+    .name = "atmega16m1",
+    .llvm_name = "atmega16m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega16u2 = Cpu{
+    .name = "atmega16u2",
+    .llvm_name = "atmega16u2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_atmega16u4 = Cpu{
+    .name = "atmega16u4",
+    .llvm_name = "atmega16u4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega2560 = Cpu{
+    .name = "atmega2560",
+    .llvm_name = "atmega2560",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr6,
+    },
+};
+
+pub const cpu_atmega2561 = Cpu{
+    .name = "atmega2561",
+    .llvm_name = "atmega2561",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr6,
+    },
+};
+
+pub const cpu_atmega2564rfr2 = Cpu{
+    .name = "atmega2564rfr2",
+    .llvm_name = "atmega2564rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr6,
+    },
+};
+
+pub const cpu_atmega256rfr2 = Cpu{
+    .name = "atmega256rfr2",
+    .llvm_name = "atmega256rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr6,
+    },
+};
+
+pub const cpu_atmega32 = Cpu{
+    .name = "atmega32",
+    .llvm_name = "atmega32",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega323 = Cpu{
+    .name = "atmega323",
+    .llvm_name = "atmega323",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega324a = Cpu{
+    .name = "atmega324a",
+    .llvm_name = "atmega324a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega324p = Cpu{
+    .name = "atmega324p",
+    .llvm_name = "atmega324p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega324pa = Cpu{
+    .name = "atmega324pa",
+    .llvm_name = "atmega324pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega325 = Cpu{
+    .name = "atmega325",
+    .llvm_name = "atmega325",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3250 = Cpu{
+    .name = "atmega3250",
+    .llvm_name = "atmega3250",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3250a = Cpu{
+    .name = "atmega3250a",
+    .llvm_name = "atmega3250a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3250p = Cpu{
+    .name = "atmega3250p",
+    .llvm_name = "atmega3250p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3250pa = Cpu{
+    .name = "atmega3250pa",
+    .llvm_name = "atmega3250pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega325a = Cpu{
+    .name = "atmega325a",
+    .llvm_name = "atmega325a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega325p = Cpu{
+    .name = "atmega325p",
+    .llvm_name = "atmega325p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega325pa = Cpu{
+    .name = "atmega325pa",
+    .llvm_name = "atmega325pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega328 = Cpu{
+    .name = "atmega328",
+    .llvm_name = "atmega328",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega328p = Cpu{
+    .name = "atmega328p",
+    .llvm_name = "atmega328p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega329 = Cpu{
+    .name = "atmega329",
+    .llvm_name = "atmega329",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3290 = Cpu{
+    .name = "atmega3290",
+    .llvm_name = "atmega3290",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3290a = Cpu{
+    .name = "atmega3290a",
+    .llvm_name = "atmega3290a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3290p = Cpu{
+    .name = "atmega3290p",
+    .llvm_name = "atmega3290p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega3290pa = Cpu{
+    .name = "atmega3290pa",
+    .llvm_name = "atmega3290pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega329a = Cpu{
+    .name = "atmega329a",
+    .llvm_name = "atmega329a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega329p = Cpu{
+    .name = "atmega329p",
+    .llvm_name = "atmega329p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega329pa = Cpu{
+    .name = "atmega329pa",
+    .llvm_name = "atmega329pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32a = Cpu{
+    .name = "atmega32a",
+    .llvm_name = "atmega32a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32c1 = Cpu{
+    .name = "atmega32c1",
+    .llvm_name = "atmega32c1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32hvb = Cpu{
+    .name = "atmega32hvb",
+    .llvm_name = "atmega32hvb",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32hvbrevb = Cpu{
+    .name = "atmega32hvbrevb",
+    .llvm_name = "atmega32hvbrevb",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32m1 = Cpu{
+    .name = "atmega32m1",
+    .llvm_name = "atmega32m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32u2 = Cpu{
+    .name = "atmega32u2",
+    .llvm_name = "atmega32u2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_atmega32u4 = Cpu{
+    .name = "atmega32u4",
+    .llvm_name = "atmega32u4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega32u6 = Cpu{
+    .name = "atmega32u6",
+    .llvm_name = "atmega32u6",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega406 = Cpu{
+    .name = "atmega406",
+    .llvm_name = "atmega406",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega48 = Cpu{
+    .name = "atmega48",
+    .llvm_name = "atmega48",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega48a = Cpu{
+    .name = "atmega48a",
+    .llvm_name = "atmega48a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega48p = Cpu{
+    .name = "atmega48p",
+    .llvm_name = "atmega48p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega48pa = Cpu{
+    .name = "atmega48pa",
+    .llvm_name = "atmega48pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega64 = Cpu{
+    .name = "atmega64",
+    .llvm_name = "atmega64",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega640 = Cpu{
+    .name = "atmega640",
+    .llvm_name = "atmega640",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega644 = Cpu{
+    .name = "atmega644",
+    .llvm_name = "atmega644",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega644a = Cpu{
+    .name = "atmega644a",
+    .llvm_name = "atmega644a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega644p = Cpu{
+    .name = "atmega644p",
+    .llvm_name = "atmega644p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega644pa = Cpu{
+    .name = "atmega644pa",
+    .llvm_name = "atmega644pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega644rfr2 = Cpu{
+    .name = "atmega644rfr2",
+    .llvm_name = "atmega644rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega645 = Cpu{
+    .name = "atmega645",
+    .llvm_name = "atmega645",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6450 = Cpu{
+    .name = "atmega6450",
+    .llvm_name = "atmega6450",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6450a = Cpu{
+    .name = "atmega6450a",
+    .llvm_name = "atmega6450a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6450p = Cpu{
+    .name = "atmega6450p",
+    .llvm_name = "atmega6450p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega645a = Cpu{
+    .name = "atmega645a",
+    .llvm_name = "atmega645a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega645p = Cpu{
+    .name = "atmega645p",
+    .llvm_name = "atmega645p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega649 = Cpu{
+    .name = "atmega649",
+    .llvm_name = "atmega649",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6490 = Cpu{
+    .name = "atmega6490",
+    .llvm_name = "atmega6490",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6490a = Cpu{
+    .name = "atmega6490a",
+    .llvm_name = "atmega6490a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega6490p = Cpu{
+    .name = "atmega6490p",
+    .llvm_name = "atmega6490p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega649a = Cpu{
+    .name = "atmega649a",
+    .llvm_name = "atmega649a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega649p = Cpu{
+    .name = "atmega649p",
+    .llvm_name = "atmega649p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega64a = Cpu{
+    .name = "atmega64a",
+    .llvm_name = "atmega64a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega64c1 = Cpu{
+    .name = "atmega64c1",
+    .llvm_name = "atmega64c1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega64hve = Cpu{
+    .name = "atmega64hve",
+    .llvm_name = "atmega64hve",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega64m1 = Cpu{
+    .name = "atmega64m1",
+    .llvm_name = "atmega64m1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega64rfr2 = Cpu{
+    .name = "atmega64rfr2",
+    .llvm_name = "atmega64rfr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_atmega8 = Cpu{
+    .name = "atmega8",
+    .llvm_name = "atmega8",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega8515 = Cpu{
+    .name = "atmega8515",
+    .llvm_name = "atmega8515",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+        &feature_lpmx,
+        &feature_movw,
+        &feature_mul,
+        &feature_spm,
+    },
+};
+
+pub const cpu_atmega8535 = Cpu{
+    .name = "atmega8535",
+    .llvm_name = "atmega8535",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+        &feature_lpmx,
+        &feature_movw,
+        &feature_mul,
+        &feature_spm,
+    },
+};
+
+pub const cpu_atmega88 = Cpu{
+    .name = "atmega88",
+    .llvm_name = "atmega88",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega88a = Cpu{
+    .name = "atmega88a",
+    .llvm_name = "atmega88a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega88p = Cpu{
+    .name = "atmega88p",
+    .llvm_name = "atmega88p",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega88pa = Cpu{
+    .name = "atmega88pa",
+    .llvm_name = "atmega88pa",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega8a = Cpu{
+    .name = "atmega8a",
+    .llvm_name = "atmega8a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega8hva = Cpu{
+    .name = "atmega8hva",
+    .llvm_name = "atmega8hva",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_atmega8u2 = Cpu{
+    .name = "atmega8u2",
+    .llvm_name = "atmega8u2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_attiny10 = Cpu{
+    .name = "attiny10",
+    .llvm_name = "attiny10",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny102 = Cpu{
+    .name = "attiny102",
+    .llvm_name = "attiny102",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny104 = Cpu{
+    .name = "attiny104",
+    .llvm_name = "attiny104",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny11 = Cpu{
+    .name = "attiny11",
+    .llvm_name = "attiny11",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+        &feature_avr1,
+    },
+};
+
+pub const cpu_attiny12 = Cpu{
+    .name = "attiny12",
+    .llvm_name = "attiny12",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+        &feature_avr1,
+    },
+};
+
+pub const cpu_attiny13 = Cpu{
+    .name = "attiny13",
+    .llvm_name = "attiny13",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny13a = Cpu{
+    .name = "attiny13a",
+    .llvm_name = "attiny13a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny15 = Cpu{
+    .name = "attiny15",
+    .llvm_name = "attiny15",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+        &feature_avr1,
+    },
+};
+
+pub const cpu_attiny1634 = Cpu{
+    .name = "attiny1634",
+    .llvm_name = "attiny1634",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_attiny167 = Cpu{
+    .name = "attiny167",
+    .llvm_name = "attiny167",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_attiny20 = Cpu{
+    .name = "attiny20",
+    .llvm_name = "attiny20",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny22 = Cpu{
+    .name = "attiny22",
+    .llvm_name = "attiny22",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_attiny2313 = Cpu{
+    .name = "attiny2313",
+    .llvm_name = "attiny2313",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny2313a = Cpu{
+    .name = "attiny2313a",
+    .llvm_name = "attiny2313a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny24 = Cpu{
+    .name = "attiny24",
+    .llvm_name = "attiny24",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny24a = Cpu{
+    .name = "attiny24a",
+    .llvm_name = "attiny24a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny25 = Cpu{
+    .name = "attiny25",
+    .llvm_name = "attiny25",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny26 = Cpu{
+    .name = "attiny26",
+    .llvm_name = "attiny26",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+        &feature_lpmx,
+    },
+};
+
+pub const cpu_attiny261 = Cpu{
+    .name = "attiny261",
+    .llvm_name = "attiny261",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny261a = Cpu{
+    .name = "attiny261a",
+    .llvm_name = "attiny261a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny28 = Cpu{
+    .name = "attiny28",
+    .llvm_name = "attiny28",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+        &feature_avr1,
+    },
+};
+
+pub const cpu_attiny4 = Cpu{
+    .name = "attiny4",
+    .llvm_name = "attiny4",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny40 = Cpu{
+    .name = "attiny40",
+    .llvm_name = "attiny40",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny4313 = Cpu{
+    .name = "attiny4313",
+    .llvm_name = "attiny4313",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny43u = Cpu{
+    .name = "attiny43u",
+    .llvm_name = "attiny43u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny44 = Cpu{
+    .name = "attiny44",
+    .llvm_name = "attiny44",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny44a = Cpu{
+    .name = "attiny44a",
+    .llvm_name = "attiny44a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny45 = Cpu{
+    .name = "attiny45",
+    .llvm_name = "attiny45",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny461 = Cpu{
+    .name = "attiny461",
+    .llvm_name = "attiny461",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny461a = Cpu{
+    .name = "attiny461a",
+    .llvm_name = "attiny461a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny48 = Cpu{
+    .name = "attiny48",
+    .llvm_name = "attiny48",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny5 = Cpu{
+    .name = "attiny5",
+    .llvm_name = "attiny5",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_attiny828 = Cpu{
+    .name = "attiny828",
+    .llvm_name = "attiny828",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny84 = Cpu{
+    .name = "attiny84",
+    .llvm_name = "attiny84",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny84a = Cpu{
+    .name = "attiny84a",
+    .llvm_name = "attiny84a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny85 = Cpu{
+    .name = "attiny85",
+    .llvm_name = "attiny85",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny861 = Cpu{
+    .name = "attiny861",
+    .llvm_name = "attiny861",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny861a = Cpu{
+    .name = "attiny861a",
+    .llvm_name = "attiny861a",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny87 = Cpu{
+    .name = "attiny87",
+    .llvm_name = "attiny87",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny88 = Cpu{
+    .name = "attiny88",
+    .llvm_name = "attiny88",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_attiny9 = Cpu{
+    .name = "attiny9",
+    .llvm_name = "attiny9",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_atxmega128a1 = Cpu{
+    .name = "atxmega128a1",
+    .llvm_name = "atxmega128a1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega128a1u = Cpu{
+    .name = "atxmega128a1u",
+    .llvm_name = "atxmega128a1u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128a3 = Cpu{
+    .name = "atxmega128a3",
+    .llvm_name = "atxmega128a3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega128a3u = Cpu{
+    .name = "atxmega128a3u",
+    .llvm_name = "atxmega128a3u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128a4u = Cpu{
+    .name = "atxmega128a4u",
+    .llvm_name = "atxmega128a4u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128b1 = Cpu{
+    .name = "atxmega128b1",
+    .llvm_name = "atxmega128b1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128b3 = Cpu{
+    .name = "atxmega128b3",
+    .llvm_name = "atxmega128b3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128c3 = Cpu{
+    .name = "atxmega128c3",
+    .llvm_name = "atxmega128c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega128d3 = Cpu{
+    .name = "atxmega128d3",
+    .llvm_name = "atxmega128d3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega128d4 = Cpu{
+    .name = "atxmega128d4",
+    .llvm_name = "atxmega128d4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega16a4 = Cpu{
+    .name = "atxmega16a4",
+    .llvm_name = "atxmega16a4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega16a4u = Cpu{
+    .name = "atxmega16a4u",
+    .llvm_name = "atxmega16a4u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega16c4 = Cpu{
+    .name = "atxmega16c4",
+    .llvm_name = "atxmega16c4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega16d4 = Cpu{
+    .name = "atxmega16d4",
+    .llvm_name = "atxmega16d4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega16e5 = Cpu{
+    .name = "atxmega16e5",
+    .llvm_name = "atxmega16e5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega192a3 = Cpu{
+    .name = "atxmega192a3",
+    .llvm_name = "atxmega192a3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega192a3u = Cpu{
+    .name = "atxmega192a3u",
+    .llvm_name = "atxmega192a3u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega192c3 = Cpu{
+    .name = "atxmega192c3",
+    .llvm_name = "atxmega192c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega192d3 = Cpu{
+    .name = "atxmega192d3",
+    .llvm_name = "atxmega192d3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega256a3 = Cpu{
+    .name = "atxmega256a3",
+    .llvm_name = "atxmega256a3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega256a3b = Cpu{
+    .name = "atxmega256a3b",
+    .llvm_name = "atxmega256a3b",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega256a3bu = Cpu{
+    .name = "atxmega256a3bu",
+    .llvm_name = "atxmega256a3bu",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega256a3u = Cpu{
+    .name = "atxmega256a3u",
+    .llvm_name = "atxmega256a3u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega256c3 = Cpu{
+    .name = "atxmega256c3",
+    .llvm_name = "atxmega256c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega256d3 = Cpu{
+    .name = "atxmega256d3",
+    .llvm_name = "atxmega256d3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega32a4 = Cpu{
+    .name = "atxmega32a4",
+    .llvm_name = "atxmega32a4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega32a4u = Cpu{
+    .name = "atxmega32a4u",
+    .llvm_name = "atxmega32a4u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega32c4 = Cpu{
+    .name = "atxmega32c4",
+    .llvm_name = "atxmega32c4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega32d4 = Cpu{
+    .name = "atxmega32d4",
+    .llvm_name = "atxmega32d4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega32e5 = Cpu{
+    .name = "atxmega32e5",
+    .llvm_name = "atxmega32e5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega32x1 = Cpu{
+    .name = "atxmega32x1",
+    .llvm_name = "atxmega32x1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega384c3 = Cpu{
+    .name = "atxmega384c3",
+    .llvm_name = "atxmega384c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega384d3 = Cpu{
+    .name = "atxmega384d3",
+    .llvm_name = "atxmega384d3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega64a1 = Cpu{
+    .name = "atxmega64a1",
+    .llvm_name = "atxmega64a1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega64a1u = Cpu{
+    .name = "atxmega64a1u",
+    .llvm_name = "atxmega64a1u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64a3 = Cpu{
+    .name = "atxmega64a3",
+    .llvm_name = "atxmega64a3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega64a3u = Cpu{
+    .name = "atxmega64a3u",
+    .llvm_name = "atxmega64a3u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64a4u = Cpu{
+    .name = "atxmega64a4u",
+    .llvm_name = "atxmega64a4u",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64b1 = Cpu{
+    .name = "atxmega64b1",
+    .llvm_name = "atxmega64b1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64b3 = Cpu{
+    .name = "atxmega64b3",
+    .llvm_name = "atxmega64b3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64c3 = Cpu{
+    .name = "atxmega64c3",
+    .llvm_name = "atxmega64c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_rmw,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmegau,
+    },
+};
+
+pub const cpu_atxmega64d3 = Cpu{
+    .name = "atxmega64d3",
+    .llvm_name = "atxmega64d3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega64d4 = Cpu{
+    .name = "atxmega64d4",
+    .llvm_name = "atxmega64d4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_atxmega8e5 = Cpu{
+    .name = "atxmega8e5",
+    .llvm_name = "atxmega8e5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avr1 = Cpu{
+    .name = "avr1",
+    .llvm_name = "avr1",
+    .subfeatures = &[_]*const Feature {
+        &feature_avr0,
+        &feature_lpm,
+        &feature_avr1,
+    },
+};
+
+pub const cpu_avr2 = Cpu{
+    .name = "avr2",
+    .llvm_name = "avr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr2,
+    },
+};
+
+pub const cpu_avr25 = Cpu{
+    .name = "avr25",
+    .llvm_name = "avr25",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr25,
+    },
+};
+
+pub const cpu_avr3 = Cpu{
+    .name = "avr3",
+    .llvm_name = "avr3",
+    .subfeatures = &[_]*const Feature {
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_addsubiw,
+        &feature_avr3,
+    },
+};
+
+pub const cpu_avr31 = Cpu{
+    .name = "avr31",
+    .llvm_name = "avr31",
+    .subfeatures = &[_]*const Feature {
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr31,
+    },
+};
+
+pub const cpu_avr35 = Cpu{
+    .name = "avr35",
+    .llvm_name = "avr35",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr35,
+    },
+};
+
+pub const cpu_avr4 = Cpu{
+    .name = "avr4",
+    .llvm_name = "avr4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr4,
+    },
+};
+
+pub const cpu_avr5 = Cpu{
+    .name = "avr5",
+    .llvm_name = "avr5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpu_avr51 = Cpu{
+    .name = "avr51",
+    .llvm_name = "avr51",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_ijmpcall,
+        &feature_jmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr51,
+    },
+};
+
+pub const cpu_avr6 = Cpu{
+    .name = "avr6",
+    .llvm_name = "avr6",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_avr6,
+    },
+};
+
+pub const cpu_avrtiny = Cpu{
+    .name = "avrtiny",
+    .llvm_name = "avrtiny",
+    .subfeatures = &[_]*const Feature {
+        &feature_tinyencoding,
+        &feature_sram,
+        &feature_break,
+        &feature_avr0,
+        &feature_avrtiny,
+    },
+};
+
+pub const cpu_avrxmega1 = Cpu{
+    .name = "avrxmega1",
+    .llvm_name = "avrxmega1",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega2 = Cpu{
+    .name = "avrxmega2",
+    .llvm_name = "avrxmega2",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega3 = Cpu{
+    .name = "avrxmega3",
+    .llvm_name = "avrxmega3",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega4 = Cpu{
+    .name = "avrxmega4",
+    .llvm_name = "avrxmega4",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega5 = Cpu{
+    .name = "avrxmega5",
+    .llvm_name = "avrxmega5",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega6 = Cpu{
+    .name = "avrxmega6",
+    .llvm_name = "avrxmega6",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_avrxmega7 = Cpu{
+    .name = "avrxmega7",
+    .llvm_name = "avrxmega7",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_spm,
+        &feature_elpmx,
+        &feature_elpm,
+        &feature_addsubiw,
+        &feature_des,
+        &feature_xmega,
+    },
+};
+
+pub const cpu_m3000 = Cpu{
+    .name = "m3000",
+    .llvm_name = "m3000",
+    .subfeatures = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_mul,
+        &feature_avr0,
+        &feature_lpm,
+        &feature_break,
+        &feature_spm,
+        &feature_addsubiw,
+        &feature_avr5,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_at43usb320,
+    &cpu_at43usb355,
+    &cpu_at76c711,
+    &cpu_at86rf401,
+    &cpu_at90c8534,
+    &cpu_at90can128,
+    &cpu_at90can32,
+    &cpu_at90can64,
+    &cpu_at90pwm1,
+    &cpu_at90pwm161,
+    &cpu_at90pwm2,
+    &cpu_at90pwm216,
+    &cpu_at90pwm2b,
+    &cpu_at90pwm3,
+    &cpu_at90pwm316,
+    &cpu_at90pwm3b,
+    &cpu_at90pwm81,
+    &cpu_at90s1200,
+    &cpu_at90s2313,
+    &cpu_at90s2323,
+    &cpu_at90s2333,
+    &cpu_at90s2343,
+    &cpu_at90s4414,
+    &cpu_at90s4433,
+    &cpu_at90s4434,
+    &cpu_at90s8515,
+    &cpu_at90s8535,
+    &cpu_at90scr100,
+    &cpu_at90usb1286,
+    &cpu_at90usb1287,
+    &cpu_at90usb162,
+    &cpu_at90usb646,
+    &cpu_at90usb647,
+    &cpu_at90usb82,
+    &cpu_at94k,
+    &cpu_ata5272,
+    &cpu_ata5505,
+    &cpu_ata5790,
+    &cpu_ata5795,
+    &cpu_ata6285,
+    &cpu_ata6286,
+    &cpu_ata6289,
+    &cpu_atmega103,
+    &cpu_atmega128,
+    &cpu_atmega1280,
+    &cpu_atmega1281,
+    &cpu_atmega1284,
+    &cpu_atmega1284p,
+    &cpu_atmega1284rfr2,
+    &cpu_atmega128a,
+    &cpu_atmega128rfa1,
+    &cpu_atmega128rfr2,
+    &cpu_atmega16,
+    &cpu_atmega161,
+    &cpu_atmega162,
+    &cpu_atmega163,
+    &cpu_atmega164a,
+    &cpu_atmega164p,
+    &cpu_atmega164pa,
+    &cpu_atmega165,
+    &cpu_atmega165a,
+    &cpu_atmega165p,
+    &cpu_atmega165pa,
+    &cpu_atmega168,
+    &cpu_atmega168a,
+    &cpu_atmega168p,
+    &cpu_atmega168pa,
+    &cpu_atmega169,
+    &cpu_atmega169a,
+    &cpu_atmega169p,
+    &cpu_atmega169pa,
+    &cpu_atmega16a,
+    &cpu_atmega16hva,
+    &cpu_atmega16hva2,
+    &cpu_atmega16hvb,
+    &cpu_atmega16hvbrevb,
+    &cpu_atmega16m1,
+    &cpu_atmega16u2,
+    &cpu_atmega16u4,
+    &cpu_atmega2560,
+    &cpu_atmega2561,
+    &cpu_atmega2564rfr2,
+    &cpu_atmega256rfr2,
+    &cpu_atmega32,
+    &cpu_atmega323,
+    &cpu_atmega324a,
+    &cpu_atmega324p,
+    &cpu_atmega324pa,
+    &cpu_atmega325,
+    &cpu_atmega3250,
+    &cpu_atmega3250a,
+    &cpu_atmega3250p,
+    &cpu_atmega3250pa,
+    &cpu_atmega325a,
+    &cpu_atmega325p,
+    &cpu_atmega325pa,
+    &cpu_atmega328,
+    &cpu_atmega328p,
+    &cpu_atmega329,
+    &cpu_atmega3290,
+    &cpu_atmega3290a,
+    &cpu_atmega3290p,
+    &cpu_atmega3290pa,
+    &cpu_atmega329a,
+    &cpu_atmega329p,
+    &cpu_atmega329pa,
+    &cpu_atmega32a,
+    &cpu_atmega32c1,
+    &cpu_atmega32hvb,
+    &cpu_atmega32hvbrevb,
+    &cpu_atmega32m1,
+    &cpu_atmega32u2,
+    &cpu_atmega32u4,
+    &cpu_atmega32u6,
+    &cpu_atmega406,
+    &cpu_atmega48,
+    &cpu_atmega48a,
+    &cpu_atmega48p,
+    &cpu_atmega48pa,
+    &cpu_atmega64,
+    &cpu_atmega640,
+    &cpu_atmega644,
+    &cpu_atmega644a,
+    &cpu_atmega644p,
+    &cpu_atmega644pa,
+    &cpu_atmega644rfr2,
+    &cpu_atmega645,
+    &cpu_atmega6450,
+    &cpu_atmega6450a,
+    &cpu_atmega6450p,
+    &cpu_atmega645a,
+    &cpu_atmega645p,
+    &cpu_atmega649,
+    &cpu_atmega6490,
+    &cpu_atmega6490a,
+    &cpu_atmega6490p,
+    &cpu_atmega649a,
+    &cpu_atmega649p,
+    &cpu_atmega64a,
+    &cpu_atmega64c1,
+    &cpu_atmega64hve,
+    &cpu_atmega64m1,
+    &cpu_atmega64rfr2,
+    &cpu_atmega8,
+    &cpu_atmega8515,
+    &cpu_atmega8535,
+    &cpu_atmega88,
+    &cpu_atmega88a,
+    &cpu_atmega88p,
+    &cpu_atmega88pa,
+    &cpu_atmega8a,
+    &cpu_atmega8hva,
+    &cpu_atmega8u2,
+    &cpu_attiny10,
+    &cpu_attiny102,
+    &cpu_attiny104,
+    &cpu_attiny11,
+    &cpu_attiny12,
+    &cpu_attiny13,
+    &cpu_attiny13a,
+    &cpu_attiny15,
+    &cpu_attiny1634,
+    &cpu_attiny167,
+    &cpu_attiny20,
+    &cpu_attiny22,
+    &cpu_attiny2313,
+    &cpu_attiny2313a,
+    &cpu_attiny24,
+    &cpu_attiny24a,
+    &cpu_attiny25,
+    &cpu_attiny26,
+    &cpu_attiny261,
+    &cpu_attiny261a,
+    &cpu_attiny28,
+    &cpu_attiny4,
+    &cpu_attiny40,
+    &cpu_attiny4313,
+    &cpu_attiny43u,
+    &cpu_attiny44,
+    &cpu_attiny44a,
+    &cpu_attiny45,
+    &cpu_attiny461,
+    &cpu_attiny461a,
+    &cpu_attiny48,
+    &cpu_attiny5,
+    &cpu_attiny828,
+    &cpu_attiny84,
+    &cpu_attiny84a,
+    &cpu_attiny85,
+    &cpu_attiny861,
+    &cpu_attiny861a,
+    &cpu_attiny87,
+    &cpu_attiny88,
+    &cpu_attiny9,
+    &cpu_atxmega128a1,
+    &cpu_atxmega128a1u,
+    &cpu_atxmega128a3,
+    &cpu_atxmega128a3u,
+    &cpu_atxmega128a4u,
+    &cpu_atxmega128b1,
+    &cpu_atxmega128b3,
+    &cpu_atxmega128c3,
+    &cpu_atxmega128d3,
+    &cpu_atxmega128d4,
+    &cpu_atxmega16a4,
+    &cpu_atxmega16a4u,
+    &cpu_atxmega16c4,
+    &cpu_atxmega16d4,
+    &cpu_atxmega16e5,
+    &cpu_atxmega192a3,
+    &cpu_atxmega192a3u,
+    &cpu_atxmega192c3,
+    &cpu_atxmega192d3,
+    &cpu_atxmega256a3,
+    &cpu_atxmega256a3b,
+    &cpu_atxmega256a3bu,
+    &cpu_atxmega256a3u,
+    &cpu_atxmega256c3,
+    &cpu_atxmega256d3,
+    &cpu_atxmega32a4,
+    &cpu_atxmega32a4u,
+    &cpu_atxmega32c4,
+    &cpu_atxmega32d4,
+    &cpu_atxmega32e5,
+    &cpu_atxmega32x1,
+    &cpu_atxmega384c3,
+    &cpu_atxmega384d3,
+    &cpu_atxmega64a1,
+    &cpu_atxmega64a1u,
+    &cpu_atxmega64a3,
+    &cpu_atxmega64a3u,
+    &cpu_atxmega64a4u,
+    &cpu_atxmega64b1,
+    &cpu_atxmega64b3,
+    &cpu_atxmega64c3,
+    &cpu_atxmega64d3,
+    &cpu_atxmega64d4,
+    &cpu_atxmega8e5,
+    &cpu_avr1,
+    &cpu_avr2,
+    &cpu_avr25,
+    &cpu_avr3,
+    &cpu_avr31,
+    &cpu_avr35,
+    &cpu_avr4,
+    &cpu_avr5,
+    &cpu_avr51,
+    &cpu_avr6,
+    &cpu_avrtiny,
+    &cpu_avrxmega1,
+    &cpu_avrxmega2,
+    &cpu_avrxmega3,
+    &cpu_avrxmega4,
+    &cpu_avrxmega5,
+    &cpu_avrxmega6,
+    &cpu_avrxmega7,
+    &cpu_m3000,
+};
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
new file mode 100644
index 0000000000000000000000000000000000000000..8a504eaf9e23d4a19625be4328bb606ce212bac1
--- /dev/null
+++ b/lib/std/target/bpf.zig
@@ -0,0 +1,75 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_alu32 = Feature{
+    .name = "alu32",
+    .description = "Enable ALU32 instructions",
+    .llvm_name = "alu32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dummy = Feature{
+    .name = "dummy",
+    .description = "unused feature",
+    .llvm_name = "dummy",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dwarfris = Feature{
+    .name = "dwarfris",
+    .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
+    .llvm_name = "dwarfris",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_alu32,
+    &feature_dummy,
+    &feature_dwarfris,
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_probe = Cpu{
+    .name = "probe",
+    .llvm_name = "probe",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_v1 = Cpu{
+    .name = "v1",
+    .llvm_name = "v1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_v2 = Cpu{
+    .name = "v2",
+    .llvm_name = "v2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_v3 = Cpu{
+    .name = "v3",
+    .llvm_name = "v3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_generic,
+    &cpu_probe,
+    &cpu_v1,
+    &cpu_v2,
+    &cpu_v3,
+};
diff --git a/lib/std/target/cpu.zig b/lib/std/target/cpu.zig
deleted file mode 100644
index 99c375874b9b66dbfbd4df2da7a14e2d76ee2255..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu.zig
+++ /dev/null
@@ -1,67 +0,0 @@
-const std = @import("std");
-
-const feature = @import("feature.zig");
-const Arch = std.Target.Arch;
-
-pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu;
-pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu;
-pub const ArmCpu = @import("cpu/ArmCpu.zig").ArmCpu;
-pub const AvrCpu = @import("cpu/AvrCpu.zig").AvrCpu;
-pub const BpfCpu = @import("cpu/BpfCpu.zig").BpfCpu;
-pub const HexagonCpu = @import("cpu/HexagonCpu.zig").HexagonCpu;
-pub const MipsCpu = @import("cpu/MipsCpu.zig").MipsCpu;
-pub const Msp430Cpu = @import("cpu/Msp430Cpu.zig").Msp430Cpu;
-pub const NvptxCpu = @import("cpu/NvptxCpu.zig").NvptxCpu;
-pub const PowerPcCpu = @import("cpu/PowerPcCpu.zig").PowerPcCpu;
-pub const RiscVCpu = @import("cpu/RiscVCpu.zig").RiscVCpu;
-pub const SparcCpu = @import("cpu/SparcCpu.zig").SparcCpu;
-pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu;
-pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu;
-pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu;
-
-pub const EmptyCpu = @import("cpu/empty.zig").EmptyCpu;
-
-pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
-    return switch (arch) {
-        .arm, .armeb, .thumb, .thumbeb => ArmCpu,
-        .aarch64, .aarch64_be, .aarch64_32 => AArch64Cpu,
-        .avr => AvrCpu,
-        .bpfel, .bpfeb => BpfCpu,
-        .hexagon => HexagonCpu,
-        .mips, .mipsel, .mips64, .mips64el => MipsCpu,
-        .msp430 => Msp430Cpu,
-        .powerpc, .powerpc64, .powerpc64le => PowerPcCpu,
-        .amdgcn => AmdGpuCpu,
-        .riscv32, .riscv64 => RiscVCpu,
-        .sparc, .sparcv9, .sparcel => SparcCpu,
-        .s390x => SystemZCpu,
-        .i386, .x86_64 => X86Cpu,
-        .nvptx, .nvptx64 => NvptxCpu,
-        .wasm32, .wasm64 => WebAssemblyCpu,
-
-        else => EmptyCpu,
-    };
-}
-
-pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type {
-    return CpuInfo(ArchCpu(arch), feature.ArchFeature(arch));
-}
-
-pub fn CpuInfo(comptime CpuType: type, comptime FeatureType: type) type {
-    return struct {
-        value: CpuType,
-        name: []const u8,
-
-        features: []const FeatureType,
-
-        const Self = @This();
-
-        pub fn create(value: CpuType, name: []const u8, features: []const FeatureType) Self {
-            return Self {
-                .value = value,
-                .name = name,
-                .features = features,
-            };
-        }
-    };
-}
diff --git a/lib/std/target/cpu/AArch64Cpu.zig b/lib/std/target/cpu/AArch64Cpu.zig
deleted file mode 100644
index 1fb36080fd32ae600bea25a4cdd034d273103039..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/AArch64Cpu.zig
+++ /dev/null
@@ -1,480 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const AArch64Cpu = enum {
-    AppleLatest,
-    CortexA35,
-    CortexA53,
-    CortexA55,
-    CortexA57,
-    CortexA65,
-    CortexA65ae,
-    CortexA72,
-    CortexA73,
-    CortexA75,
-    CortexA76,
-    CortexA76ae,
-    Cyclone,
-    ExynosM1,
-    ExynosM2,
-    ExynosM3,
-    ExynosM4,
-    ExynosM5,
-    Falkor,
-    Generic,
-    Kryo,
-    NeoverseE1,
-    NeoverseN1,
-    Saphira,
-    Thunderx,
-    Thunderx2t99,
-    Thunderxt81,
-    Thunderxt83,
-    Thunderxt88,
-    Tsv110,
-
-    const FeatureType = feature.AArch64Feature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.AppleLatest, "apple-latest", &[_]FeatureType {
-            .ArithBccFusion,
-            .ArithCbzFusion,
-            .ZczFp,
-            .AlternateSextloadCvtF32Pattern,
-            .DisableLatencySchedHeuristic,
-            .Perfmon,
-            .ZczGp,
-            .ZczFpWorkaround,
-            .Zcm,
-            .FpArmv8,
-            .FuseCryptoEor,
-            .FuseAes,
-            .Cyclone,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .A35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .CustomCheapAsMove,
-            .BalanceFpOps,
-            .UseAa,
-            .FpArmv8,
-            .FuseAes,
-            .A53,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-            .A55,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .BalanceFpOps,
-            .FuseLiterals,
-            .FpArmv8,
-            .FuseAes,
-            .A57,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA65, "cortex-a65", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .A65,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .A65,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .FuseAes,
-            .A72,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .FuseAes,
-            .A73,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-            .A75,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .A76,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .A76,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
-            .ArithBccFusion,
-            .ArithCbzFusion,
-            .ZczFp,
-            .AlternateSextloadCvtF32Pattern,
-            .DisableLatencySchedHeuristic,
-            .Perfmon,
-            .ZczGp,
-            .ZczFpWorkaround,
-            .Zcm,
-            .FpArmv8,
-            .FuseCryptoEor,
-            .FuseAes,
-            .Cyclone,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .UseReciprocalSquareRoot,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .SlowMisaligned128store,
-            .FpArmv8,
-            .SlowPaired128,
-            .FuseAes,
-            .Exynosm1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .SlowMisaligned128store,
-            .FpArmv8,
-            .SlowPaired128,
-            .FuseAes,
-            .Exynosm2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
-            .FuseCsel,
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .FuseLiterals,
-            .FuseAddress,
-            .LslFast,
-            .FpArmv8,
-            .FuseAes,
-            .Exynosm3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
-            .ArithBccFusion,
-            .Vh,
-            .ArithCbzFusion,
-            .ZczFp,
-            .Rdm,
-            .UsePostraScheduler,
-            .Ras,
-            .Force32bitJumpTables,
-            .Ccpp,
-            .FuseCsel,
-            .Pan,
-            .Uaops,
-            .FuseLiterals,
-            .LslFast,
-            .Lse,
-            .Perfmon,
-            .Dotprod,
-            .Lor,
-            .FuseArithLogic,
-            .Crc,
-            .CustomCheapAsMove,
-            .FuseAddress,
-            .ZczGp,
-            .FpArmv8,
-            .FuseAes,
-            .Exynosm4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
-            .ArithBccFusion,
-            .Vh,
-            .ArithCbzFusion,
-            .ZczFp,
-            .Rdm,
-            .UsePostraScheduler,
-            .Ras,
-            .Force32bitJumpTables,
-            .Ccpp,
-            .FuseCsel,
-            .Pan,
-            .Uaops,
-            .FuseLiterals,
-            .LslFast,
-            .Lse,
-            .Perfmon,
-            .Dotprod,
-            .Lor,
-            .FuseArithLogic,
-            .Crc,
-            .CustomCheapAsMove,
-            .FuseAddress,
-            .ZczGp,
-            .FpArmv8,
-            .FuseAes,
-            .Exynosm4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Falkor, "falkor", &[_]FeatureType {
-            .ZczFp,
-            .Rdm,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .ZczGp,
-            .FpArmv8,
-            .SlowStrqroStore,
-            .LslFast,
-            .Falkor,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-            .Trbe,
-            .Ete,
-            .FpArmv8,
-            .FuseAes,
-            .Neon,
-            .Perfmon,
-            .UsePostraScheduler,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .ZczGp,
-            .FpArmv8,
-            .LslFast,
-            .Kryo,
-        }),
-        CpuInfo(@This(), FeatureType).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .Neoversee1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
-            .Lse,
-            .Spe,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .Neoversen1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Saphira, "saphira", &[_]FeatureType {
-            .Spe,
-            .Vh,
-            .ZczFp,
-            .Rdm,
-            .UsePostraScheduler,
-            .Dit,
-            .Am,
-            .Ras,
-            .Rcpc,
-            .Sel2,
-            .Ccpp,
-            .Pa,
-            .Pan,
-            .Uaops,
-            .Tracev84,
-            .Mpam,
-            .LslFast,
-            .Lse,
-            .Nv,
-            .Perfmon,
-            .Dotprod,
-            .TlbRmi,
-            .Lor,
-            .Ccidx,
-            .PredictableSelectExpensive,
-            .Crc,
-            .CustomCheapAsMove,
-            .Fmi,
-            .ZczGp,
-            .FpArmv8,
-            .Saphira,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Thunderx, "thunderx", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-            .Thunderx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
-            .Lse,
-            .ArithBccFusion,
-            .Vh,
-            .Rdm,
-            .UsePostraScheduler,
-            .Crc,
-            .Lor,
-            .Pan,
-            .AggressiveFma,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-            .Thunderx2t99,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-            .Thunderxt81,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-            .Thunderxt83,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-            .Thunderxt88,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tsv110, "tsv110", &[_]FeatureType {
-            .Lse,
-            .Spe,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .CustomCheapAsMove,
-            .Ras,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-            .Tsv110,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/AmdGpuCpu.zig b/lib/std/target/cpu/AmdGpuCpu.zig
deleted file mode 100644
index 3f05f6033578a4966b2901382ff3de75313898f2..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/AmdGpuCpu.zig
+++ /dev/null
@@ -1,1060 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const AmdGpuCpu = enum {
-    Bonaire,
-    Carrizo,
-    Fiji,
-    Generic,
-    GenericHsa,
-    Gfx1010,
-    Gfx1011,
-    Gfx1012,
-    Gfx600,
-    Gfx601,
-    Gfx700,
-    Gfx701,
-    Gfx702,
-    Gfx703,
-    Gfx704,
-    Gfx801,
-    Gfx802,
-    Gfx803,
-    Gfx810,
-    Gfx900,
-    Gfx902,
-    Gfx904,
-    Gfx906,
-    Gfx908,
-    Gfx909,
-    Hainan,
-    Hawaii,
-    Iceland,
-    Kabini,
-    Kaveri,
-    Mullins,
-    Oland,
-    Pitcairn,
-    Polaris10,
-    Polaris11,
-    Stoney,
-    Tahiti,
-    Tonga,
-    Verde,
-
-    const FeatureType = feature.AmdGpuFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Bonaire, "bonaire", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Carrizo, "carrizo", &[_]FeatureType {
-            .CodeObjectV3,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-            .Xnack,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Fiji, "fiji", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-            .Wavefrontsize64,
-        }),
-        CpuInfo(@This(), FeatureType).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
-            .FlatAddressSpace,
-            .Wavefrontsize64,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx1010, "gfx1010", &[_]FeatureType {
-            .CodeObjectV3,
-            .DlInsts,
-            .NoXnackSupport,
-            .FlatSegmentOffsetBug,
-            .Vscnt,
-            .ApertureRegs,
-            .Gfx10Insts,
-            .IntClampInsts,
-            .PkFmacF16Inst,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .Movrel,
-            .SMemrealtime,
-            .NoSdstCmpx,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .NoSramEccSupport,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .RegisterBanking,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .Dpp8,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .FmaMixInsts,
-            .MimgR128,
-            .Vop3Literal,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .NoDataDepHazard,
-            .Gfx10,
-            .InstFwdPrefetchBug,
-            .Ldsbankcount32,
-            .LdsBranchVmemWarHazard,
-            .LdsMisalignedBug,
-            .NsaEncoding,
-            .NsaToVmemBug,
-            .Offset3fBug,
-            .SmemToVectorWriteHazard,
-            .ScalarAtomics,
-            .ScalarFlatScratchInsts,
-            .ScalarStores,
-            .VmemToScalarWriteHazard,
-            .VcmpxExecWarHazard,
-            .VcmpxPermlaneHazard,
-            .Wavefrontsize32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx1011, "gfx1011", &[_]FeatureType {
-            .CodeObjectV3,
-            .DlInsts,
-            .NoXnackSupport,
-            .Dot1Insts,
-            .Dot2Insts,
-            .Dot5Insts,
-            .Dot6Insts,
-            .FlatSegmentOffsetBug,
-            .Vscnt,
-            .ApertureRegs,
-            .Gfx10Insts,
-            .IntClampInsts,
-            .PkFmacF16Inst,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .Movrel,
-            .SMemrealtime,
-            .NoSdstCmpx,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .NoSramEccSupport,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .RegisterBanking,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .Dpp8,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .FmaMixInsts,
-            .MimgR128,
-            .Vop3Literal,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .NoDataDepHazard,
-            .Gfx10,
-            .InstFwdPrefetchBug,
-            .Ldsbankcount32,
-            .LdsBranchVmemWarHazard,
-            .NsaEncoding,
-            .NsaToVmemBug,
-            .Offset3fBug,
-            .SmemToVectorWriteHazard,
-            .ScalarAtomics,
-            .ScalarFlatScratchInsts,
-            .ScalarStores,
-            .VmemToScalarWriteHazard,
-            .VcmpxExecWarHazard,
-            .VcmpxPermlaneHazard,
-            .Wavefrontsize32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx1012, "gfx1012", &[_]FeatureType {
-            .CodeObjectV3,
-            .DlInsts,
-            .NoXnackSupport,
-            .Dot1Insts,
-            .Dot2Insts,
-            .Dot5Insts,
-            .Dot6Insts,
-            .FlatSegmentOffsetBug,
-            .Vscnt,
-            .ApertureRegs,
-            .Gfx10Insts,
-            .IntClampInsts,
-            .PkFmacF16Inst,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .Movrel,
-            .SMemrealtime,
-            .NoSdstCmpx,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .NoSramEccSupport,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .RegisterBanking,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .Dpp8,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .FmaMixInsts,
-            .MimgR128,
-            .Vop3Literal,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .NoDataDepHazard,
-            .Gfx10,
-            .InstFwdPrefetchBug,
-            .Ldsbankcount32,
-            .LdsBranchVmemWarHazard,
-            .LdsMisalignedBug,
-            .NsaEncoding,
-            .NsaToVmemBug,
-            .Offset3fBug,
-            .SmemToVectorWriteHazard,
-            .ScalarAtomics,
-            .ScalarFlatScratchInsts,
-            .ScalarStores,
-            .VmemToScalarWriteHazard,
-            .VcmpxExecWarHazard,
-            .VcmpxPermlaneHazard,
-            .Wavefrontsize32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx600, "gfx600", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx601, "gfx601", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx700, "gfx700", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx701, "gfx701", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx702, "gfx702", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .FastFmaf,
-            .Ldsbankcount16,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx703, "gfx703", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount16,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx704, "gfx704", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx801, "gfx801", &[_]FeatureType {
-            .CodeObjectV3,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-            .Xnack,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx802, "gfx802", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .SgprInitBug,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx803, "gfx803", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx810, "gfx810", &[_]FeatureType {
-            .CodeObjectV3,
-            .Ldsbankcount16,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-            .Xnack,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx900, "gfx900", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoSramEccSupport,
-            .NoXnackSupport,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-            .MadMixInsts,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx902, "gfx902", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoSramEccSupport,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-            .MadMixInsts,
-            .Xnack,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx904, "gfx904", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoSramEccSupport,
-            .NoXnackSupport,
-            .FmaMixInsts,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx906, "gfx906", &[_]FeatureType {
-            .CodeObjectV3,
-            .DlInsts,
-            .NoXnackSupport,
-            .Dot1Insts,
-            .Dot2Insts,
-            .FmaMixInsts,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx908, "gfx908", &[_]FeatureType {
-            .AtomicFaddInsts,
-            .CodeObjectV3,
-            .DlInsts,
-            .Dot1Insts,
-            .Dot2Insts,
-            .Dot3Insts,
-            .Dot4Insts,
-            .Dot5Insts,
-            .Dot6Insts,
-            .FmaMixInsts,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-            .MaiInsts,
-            .MfmaInlineLiteralBug,
-            .PkFmacF16Inst,
-            .SramEcc,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gfx909, "gfx909", &[_]FeatureType {
-            .CodeObjectV3,
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .Gfx9,
-            .Ldsbankcount32,
-            .MadMixInsts,
-            .Xnack,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hainan, "hainan", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hawaii, "hawaii", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Iceland, "iceland", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .SgprInitBug,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Kabini, "kabini", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount16,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Kaveri, "kaveri", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mullins, "mullins", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount16,
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-            .SeaIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Oland, "oland", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pitcairn, "pitcairn", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Polaris10, "polaris10", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Polaris11, "polaris11", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Stoney, "stoney", &[_]FeatureType {
-            .CodeObjectV3,
-            .Ldsbankcount16,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-            .Xnack,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tahiti, "tahiti", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .FastFmaf,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-            .HalfRate64Ops,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tonga, "tonga", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .SgprInitBug,
-            .UnpackedD16Vmem,
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-            .VolcanicIslands,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Verde, "verde", &[_]FeatureType {
-            .CodeObjectV3,
-            .NoXnackSupport,
-            .Ldsbankcount32,
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Localmemorysize32768,
-            .SouthernIslands,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/ArmCpu.zig b/lib/std/target/cpu/ArmCpu.zig
deleted file mode 100644
index bb5179464495be7269191ad2161a59d4cc275dfe..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/ArmCpu.zig
+++ /dev/null
@@ -1,1230 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const ArmCpu = enum {
-    Arm1020e,
-    Arm1020t,
-    Arm1022e,
-    Arm10e,
-    Arm10tdmi,
-    Arm1136jS,
-    Arm1136jfS,
-    Arm1156t2S,
-    Arm1156t2fS,
-    Arm1176jS,
-    Arm1176jzS,
-    Arm1176jzfS,
-    Arm710t,
-    Arm720t,
-    Arm7tdmi,
-    Arm7tdmiS,
-    Arm8,
-    Arm810,
-    Arm9,
-    Arm920,
-    Arm920t,
-    Arm922t,
-    Arm926ejS,
-    Arm940t,
-    Arm946eS,
-    Arm966eS,
-    Arm968eS,
-    Arm9e,
-    Arm9tdmi,
-    CortexA12,
-    CortexA15,
-    CortexA17,
-    CortexA32,
-    CortexA35,
-    CortexA5,
-    CortexA53,
-    CortexA55,
-    CortexA57,
-    CortexA7,
-    CortexA72,
-    CortexA73,
-    CortexA75,
-    CortexA76,
-    CortexA76ae,
-    CortexA8,
-    CortexA9,
-    CortexM0,
-    CortexM0plus,
-    CortexM1,
-    CortexM23,
-    CortexM3,
-    CortexM33,
-    CortexM35p,
-    CortexM4,
-    CortexM7,
-    CortexR4,
-    CortexR4f,
-    CortexR5,
-    CortexR52,
-    CortexR7,
-    CortexR8,
-    Cyclone,
-    Ep9312,
-    ExynosM1,
-    ExynosM2,
-    ExynosM3,
-    ExynosM4,
-    ExynosM5,
-    Generic,
-    Iwmmxt,
-    Krait,
-    Kryo,
-    Mpcore,
-    Mpcorenovfp,
-    NeoverseN1,
-    Sc000,
-    Sc300,
-    Strongarm,
-    Strongarm110,
-    Strongarm1100,
-    Strongarm1110,
-    Swift,
-    Xscale,
-
-    const FeatureType = feature.ArmFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Arm1020e, "arm1020e", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1020t, "arm1020t", &[_]FeatureType {
-            .V4t,
-            .Armv5t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1022e, "arm1022e", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm10e, "arm10e", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
-            .V4t,
-            .Armv5t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
-            .V4t,
-            .Dsp,
-            .Armv6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
-            .V4t,
-            .Dsp,
-            .Armv6,
-            .Slowfpvmlx,
-            .Fpregs,
-            .Vfp2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
-            .V4t,
-            .Thumb2,
-            .Dsp,
-            .Armv6t2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
-            .V4t,
-            .Thumb2,
-            .Dsp,
-            .Armv6t2,
-            .Slowfpvmlx,
-            .Fpregs,
-            .Vfp2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
-            .V4t,
-            .Trustzone,
-            .Armv6kz,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
-            .V4t,
-            .Trustzone,
-            .Armv6kz,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
-            .V4t,
-            .Trustzone,
-            .Armv6kz,
-            .Slowfpvmlx,
-            .Fpregs,
-            .Vfp2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm710t, "arm710t", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm720t, "arm720t", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm8, "arm8", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm810, "arm810", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm9, "arm9", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm920, "arm920", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm920t, "arm920t", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm922t, "arm922t", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm940t, "arm940t", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm9e, "arm9e", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA12, "cortex-a12", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidPartialCpsr,
-            .RetAddrStack,
-            .Mp,
-            .Trustzone,
-            .Fp16,
-            .Vfp4,
-            .VmlxForwarding,
-            .HwdivArm,
-            .Hwdiv,
-            .Virtualization,
-            .A12,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA15, "cortex-a15", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidPartialCpsr,
-            .VldnAlign,
-            .DontWidenVmovs,
-            .RetAddrStack,
-            .Mp,
-            .MuxedUnits,
-            .SplatVfpNeon,
-            .Trustzone,
-            .Fp16,
-            .Vfp4,
-            .HwdivArm,
-            .Hwdiv,
-            .Virtualization,
-            .A15,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA17, "cortex-a17", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidPartialCpsr,
-            .RetAddrStack,
-            .Mp,
-            .Trustzone,
-            .Fp16,
-            .Vfp4,
-            .VmlxForwarding,
-            .HwdivArm,
-            .Hwdiv,
-            .Virtualization,
-            .A17,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA32, "cortex-a32", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA35, "cortex-a35", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-            .A35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA5, "cortex-a5", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .Mp,
-            .SlowFpBrcc,
-            .Trustzone,
-            .Fp16,
-            .Vfp4,
-            .VmlxForwarding,
-            .A5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA53, "cortex-a53", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-            .Fpao,
-            .A53,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA55, "cortex-a55", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Dotprod,
-            .A55,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA57, "cortex-a57", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .AvoidPartialCpsr,
-            .CheapPredicableCpsr,
-            .Crypto,
-            .Fpao,
-            .A57,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA7, "cortex-a7", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .VmlxHazards,
-            .Mp,
-            .SlowFpBrcc,
-            .Trustzone,
-            .Fp16,
-            .Vfp4,
-            .VmlxForwarding,
-            .HwdivArm,
-            .Hwdiv,
-            .Virtualization,
-            .A7,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA72, "cortex-a72", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-            .A72,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA73, "cortex-a73", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-            .A73,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA75, "cortex-a75", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Dotprod,
-            .A75,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA76, "cortex-a76", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Crypto,
-            .Dotprod,
-            .Fullfp16,
-            .A76,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Crypto,
-            .Dotprod,
-            .Fullfp16,
-            .A76,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA8, "cortex-a8", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .VmlxHazards,
-            .NonpipelinedVfp,
-            .SlowFpBrcc,
-            .Trustzone,
-            .VmlxForwarding,
-            .A8,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexA9, "cortex-a9", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidPartialCpsr,
-            .VldnAlign,
-            .ExpandFpMlx,
-            .Fp16,
-            .RetAddrStack,
-            .VmlxHazards,
-            .Mp,
-            .MuxedUnits,
-            .NeonFpmovs,
-            .PreferVmovsr,
-            .Trustzone,
-            .VmlxForwarding,
-            .A9,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM0, "cortex-m0", &[_]FeatureType {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .Armv6M,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .Armv6M,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM1, "cortex-m1", &[_]FeatureType {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .Armv6M,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM23, "cortex-m23", &[_]FeatureType {
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-            .Armv8Mbase,
-            .NoMovt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM3, "cortex-m3", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-            .Armv7M,
-            .NoBranchPredictor,
-            .LoopAlign,
-            .UseAa,
-            .UseMisched,
-            .M3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM33, "cortex-m33", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-            .Armv8Mmain,
-            .Dsp,
-            .Fpregs,
-            .Fp16,
-            .FpArmv8d16sp,
-            .NoBranchPredictor,
-            .Slowfpvmlx,
-            .LoopAlign,
-            .UseAa,
-            .UseMisched,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-            .Armv8Mmain,
-            .Dsp,
-            .Fpregs,
-            .Fp16,
-            .FpArmv8d16sp,
-            .NoBranchPredictor,
-            .Slowfpvmlx,
-            .LoopAlign,
-            .UseAa,
-            .UseMisched,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM4, "cortex-m4", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-            .Armv7eM,
-            .NoBranchPredictor,
-            .Slowfpvmlx,
-            .LoopAlign,
-            .UseAa,
-            .UseMisched,
-            .Fpregs,
-            .Fp16,
-            .Vfp4d16sp,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexM7, "cortex-m7", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-            .Armv7eM,
-            .Fpregs,
-            .Fp16,
-            .FpArmv8d16,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR4, "cortex-r4", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-            .Armv7R,
-            .AvoidPartialCpsr,
-            .RetAddrStack,
-            .R4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-            .Armv7R,
-            .AvoidPartialCpsr,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .SlowFpBrcc,
-            .Fpregs,
-            .Vfp3d16,
-            .R4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR5, "cortex-r5", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-            .Armv7R,
-            .AvoidPartialCpsr,
-            .HwdivArm,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .SlowFpBrcc,
-            .Fpregs,
-            .Vfp3d16,
-            .R5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR52, "cortex-r52", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Crc,
-            .Fpregs,
-            .Mp,
-            .Dfb,
-            .Dsp,
-            .Fp16,
-            .V4t,
-            .Db,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Rclass,
-            .Armv8R,
-            .Fpao,
-            .UseAa,
-            .UseMisched,
-            .R52,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR7, "cortex-r7", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-            .Armv7R,
-            .AvoidPartialCpsr,
-            .Fp16,
-            .HwdivArm,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .Mp,
-            .SlowFpBrcc,
-            .Fpregs,
-            .Vfp3d16,
-            .R7,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CortexR8, "cortex-r8", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-            .Armv7R,
-            .AvoidPartialCpsr,
-            .Fp16,
-            .HwdivArm,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .Mp,
-            .SlowFpBrcc,
-            .Fpregs,
-            .Vfp3d16,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cyclone, "cyclone", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .AvoidMovsShop,
-            .AvoidPartialCpsr,
-            .Crypto,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .Neonfp,
-            .DisablePostraScheduler,
-            .UseMisched,
-            .Vfp4,
-            .Zcz,
-            .Swift,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ep9312, "ep9312", &[_]FeatureType {
-            .V4t,
-            .Armv4t,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-            .Exynos,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-            .Exynos,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-            .Exynos,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Dotprod,
-            .Fullfp16,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-            .Exynos,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Dotprod,
-            .Fullfp16,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-            .Exynos,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Krait, "krait", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidPartialCpsr,
-            .VldnAlign,
-            .Fp16,
-            .HwdivArm,
-            .Hwdiv,
-            .RetAddrStack,
-            .MuxedUnits,
-            .Vfp4,
-            .VmlxForwarding,
-            .Krait,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Kryo, "kryo", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv8A,
-            .Crypto,
-            .Kryo,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mpcore, "mpcore", &[_]FeatureType {
-            .V4t,
-            .Armv6k,
-            .Slowfpvmlx,
-            .Fpregs,
-            .Vfp2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
-            .V4t,
-            .Armv6k,
-        }),
-        CpuInfo(@This(), FeatureType).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-            .Armv82A,
-            .Crypto,
-            .Dotprod,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sc000, "sc000", &[_]FeatureType {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .Armv6M,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sc300, "sc300", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-            .Armv7M,
-            .NoBranchPredictor,
-            .UseAa,
-            .UseMisched,
-            .M3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Strongarm, "strongarm", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Strongarm110, "strongarm110", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
-            .Armv4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Swift, "swift", &[_]FeatureType {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Armv7A,
-            .AvoidMovsShop,
-            .AvoidPartialCpsr,
-            .HwdivArm,
-            .Hwdiv,
-            .RetAddrStack,
-            .Slowfpvmlx,
-            .VmlxHazards,
-            .Mp,
-            .Neonfp,
-            .DisablePostraScheduler,
-            .PreferIshst,
-            .ProfUnpr,
-            .SlowLoadDSubreg,
-            .SlowOddReg,
-            .SlowVdup32,
-            .SlowVgetlni32,
-            .UseMisched,
-            .WideStrideVfp,
-            .Fp16,
-            .Vfp4,
-            .Swift,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Xscale, "xscale", &[_]FeatureType {
-            .V4t,
-            .Armv5te,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/AvrCpu.zig b/lib/std/target/cpu/AvrCpu.zig
deleted file mode 100644
index 812554134bc274b4e76698160bceb6b50d472ce4..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/AvrCpu.zig
+++ /dev/null
@@ -1,3863 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const AvrCpu = enum {
-    At43usb320,
-    At43usb355,
-    At76c711,
-    At86rf401,
-    At90c8534,
-    At90can128,
-    At90can32,
-    At90can64,
-    At90pwm1,
-    At90pwm161,
-    At90pwm2,
-    At90pwm216,
-    At90pwm2b,
-    At90pwm3,
-    At90pwm316,
-    At90pwm3b,
-    At90pwm81,
-    At90s1200,
-    At90s2313,
-    At90s2323,
-    At90s2333,
-    At90s2343,
-    At90s4414,
-    At90s4433,
-    At90s4434,
-    At90s8515,
-    At90s8535,
-    At90scr100,
-    At90usb1286,
-    At90usb1287,
-    At90usb162,
-    At90usb646,
-    At90usb647,
-    At90usb82,
-    At94k,
-    Ata5272,
-    Ata5505,
-    Ata5790,
-    Ata5795,
-    Ata6285,
-    Ata6286,
-    Ata6289,
-    Atmega103,
-    Atmega128,
-    Atmega1280,
-    Atmega1281,
-    Atmega1284,
-    Atmega1284p,
-    Atmega1284rfr2,
-    Atmega128a,
-    Atmega128rfa1,
-    Atmega128rfr2,
-    Atmega16,
-    Atmega161,
-    Atmega162,
-    Atmega163,
-    Atmega164a,
-    Atmega164p,
-    Atmega164pa,
-    Atmega165,
-    Atmega165a,
-    Atmega165p,
-    Atmega165pa,
-    Atmega168,
-    Atmega168a,
-    Atmega168p,
-    Atmega168pa,
-    Atmega169,
-    Atmega169a,
-    Atmega169p,
-    Atmega169pa,
-    Atmega16a,
-    Atmega16hva,
-    Atmega16hva2,
-    Atmega16hvb,
-    Atmega16hvbrevb,
-    Atmega16m1,
-    Atmega16u2,
-    Atmega16u4,
-    Atmega2560,
-    Atmega2561,
-    Atmega2564rfr2,
-    Atmega256rfr2,
-    Atmega32,
-    Atmega323,
-    Atmega324a,
-    Atmega324p,
-    Atmega324pa,
-    Atmega325,
-    Atmega3250,
-    Atmega3250a,
-    Atmega3250p,
-    Atmega3250pa,
-    Atmega325a,
-    Atmega325p,
-    Atmega325pa,
-    Atmega328,
-    Atmega328p,
-    Atmega329,
-    Atmega3290,
-    Atmega3290a,
-    Atmega3290p,
-    Atmega3290pa,
-    Atmega329a,
-    Atmega329p,
-    Atmega329pa,
-    Atmega32a,
-    Atmega32c1,
-    Atmega32hvb,
-    Atmega32hvbrevb,
-    Atmega32m1,
-    Atmega32u2,
-    Atmega32u4,
-    Atmega32u6,
-    Atmega406,
-    Atmega48,
-    Atmega48a,
-    Atmega48p,
-    Atmega48pa,
-    Atmega64,
-    Atmega640,
-    Atmega644,
-    Atmega644a,
-    Atmega644p,
-    Atmega644pa,
-    Atmega644rfr2,
-    Atmega645,
-    Atmega6450,
-    Atmega6450a,
-    Atmega6450p,
-    Atmega645a,
-    Atmega645p,
-    Atmega649,
-    Atmega6490,
-    Atmega6490a,
-    Atmega6490p,
-    Atmega649a,
-    Atmega649p,
-    Atmega64a,
-    Atmega64c1,
-    Atmega64hve,
-    Atmega64m1,
-    Atmega64rfr2,
-    Atmega8,
-    Atmega8515,
-    Atmega8535,
-    Atmega88,
-    Atmega88a,
-    Atmega88p,
-    Atmega88pa,
-    Atmega8a,
-    Atmega8hva,
-    Atmega8u2,
-    Attiny10,
-    Attiny102,
-    Attiny104,
-    Attiny11,
-    Attiny12,
-    Attiny13,
-    Attiny13a,
-    Attiny15,
-    Attiny1634,
-    Attiny167,
-    Attiny20,
-    Attiny22,
-    Attiny2313,
-    Attiny2313a,
-    Attiny24,
-    Attiny24a,
-    Attiny25,
-    Attiny26,
-    Attiny261,
-    Attiny261a,
-    Attiny28,
-    Attiny4,
-    Attiny40,
-    Attiny4313,
-    Attiny43u,
-    Attiny44,
-    Attiny44a,
-    Attiny45,
-    Attiny461,
-    Attiny461a,
-    Attiny48,
-    Attiny5,
-    Attiny828,
-    Attiny84,
-    Attiny84a,
-    Attiny85,
-    Attiny861,
-    Attiny861a,
-    Attiny87,
-    Attiny88,
-    Attiny9,
-    Atxmega128a1,
-    Atxmega128a1u,
-    Atxmega128a3,
-    Atxmega128a3u,
-    Atxmega128a4u,
-    Atxmega128b1,
-    Atxmega128b3,
-    Atxmega128c3,
-    Atxmega128d3,
-    Atxmega128d4,
-    Atxmega16a4,
-    Atxmega16a4u,
-    Atxmega16c4,
-    Atxmega16d4,
-    Atxmega16e5,
-    Atxmega192a3,
-    Atxmega192a3u,
-    Atxmega192c3,
-    Atxmega192d3,
-    Atxmega256a3,
-    Atxmega256a3b,
-    Atxmega256a3bu,
-    Atxmega256a3u,
-    Atxmega256c3,
-    Atxmega256d3,
-    Atxmega32a4,
-    Atxmega32a4u,
-    Atxmega32c4,
-    Atxmega32d4,
-    Atxmega32e5,
-    Atxmega32x1,
-    Atxmega384c3,
-    Atxmega384d3,
-    Atxmega64a1,
-    Atxmega64a1u,
-    Atxmega64a3,
-    Atxmega64a3u,
-    Atxmega64a4u,
-    Atxmega64b1,
-    Atxmega64b3,
-    Atxmega64c3,
-    Atxmega64d3,
-    Atxmega64d4,
-    Atxmega8e5,
-    Avr1,
-    Avr2,
-    Avr25,
-    Avr3,
-    Avr31,
-    Avr35,
-    Avr4,
-    Avr5,
-    Avr51,
-    Avr6,
-    Avrtiny,
-    Avrxmega1,
-    Avrxmega2,
-    Avrxmega3,
-    Avrxmega4,
-    Avrxmega5,
-    Avrxmega6,
-    Avrxmega7,
-    M3000,
-
-    const FeatureType = feature.AvrFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.At43usb320, "at43usb320", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr31,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At43usb355, "at43usb355", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At76c711, "at76c711", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At86rf401, "at86rf401", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-            .Lpmx,
-            .Movw,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90c8534, "at90c8534", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90can128, "at90can128", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90can32, "at90can32", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90can64, "at90can64", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s1200, "at90s1200", &[_]FeatureType {
-            .Avr0,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s2313, "at90s2313", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s2323, "at90s2323", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s2333, "at90s2333", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s2343, "at90s2343", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s4414, "at90s4414", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s4433, "at90s4433", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s4434, "at90s4434", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s8515, "at90s8515", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90s8535, "at90s8535", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90scr100, "at90scr100", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb162, "at90usb162", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb646, "at90usb646", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb647, "at90usb647", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At90usb82, "at90usb82", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At94k, "at94k", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-            .Lpmx,
-            .Movw,
-            .Mul,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata5272, "ata5272", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata5505, "ata5505", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata5790, "ata5790", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata5795, "ata5795", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata6285, "ata6285", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata6286, "ata6286", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ata6289, "ata6289", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega103, "atmega103", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr31,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega128, "atmega128", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega1280, "atmega1280", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega1281, "atmega1281", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega1284, "atmega1284", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega128a, "atmega128a", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16, "atmega16", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega161, "atmega161", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-            .Lpmx,
-            .Movw,
-            .Mul,
-            .Spm,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega162, "atmega162", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega163, "atmega163", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-            .Lpmx,
-            .Movw,
-            .Mul,
-            .Spm,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega164a, "atmega164a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega164p, "atmega164p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega165, "atmega165", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega165a, "atmega165a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega165p, "atmega165p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega168, "atmega168", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega168a, "atmega168a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega168p, "atmega168p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega169, "atmega169", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega169a, "atmega169a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega169p, "atmega169p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16a, "atmega16a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega2560, "atmega2560", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega2561, "atmega2561", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32, "atmega32", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega323, "atmega323", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega324a, "atmega324a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega324p, "atmega324p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega325, "atmega325", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3250, "atmega3250", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega325a, "atmega325a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega325p, "atmega325p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega328, "atmega328", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega328p, "atmega328p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega329, "atmega329", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3290, "atmega3290", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega329a, "atmega329a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega329p, "atmega329p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32a, "atmega32a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega406, "atmega406", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega48, "atmega48", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega48a, "atmega48a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega48p, "atmega48p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64, "atmega64", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega640, "atmega640", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega644, "atmega644", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega644a, "atmega644a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega644p, "atmega644p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega645, "atmega645", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6450, "atmega6450", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega645a, "atmega645a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega645p, "atmega645p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega649, "atmega649", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6490, "atmega6490", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega649a, "atmega649a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega649p, "atmega649p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64a, "atmega64a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8, "atmega8", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8515, "atmega8515", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-            .Lpmx,
-            .Movw,
-            .Mul,
-            .Spm,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8535, "atmega8535", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-            .Lpmx,
-            .Movw,
-            .Mul,
-            .Spm,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega88, "atmega88", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega88a, "atmega88a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega88p, "atmega88p", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8a, "atmega8a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny10, "attiny10", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny102, "attiny102", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny104, "attiny104", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny11, "attiny11", &[_]FeatureType {
-            .Avr0,
-            .Lpm,
-            .Avr1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny12, "attiny12", &[_]FeatureType {
-            .Avr0,
-            .Lpm,
-            .Avr1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny13, "attiny13", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny13a, "attiny13a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny15, "attiny15", &[_]FeatureType {
-            .Avr0,
-            .Lpm,
-            .Avr1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny1634, "attiny1634", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny167, "attiny167", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny20, "attiny20", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny22, "attiny22", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny2313, "attiny2313", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny24, "attiny24", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny24a, "attiny24a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny25, "attiny25", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny26, "attiny26", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-            .Lpmx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny261, "attiny261", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny261a, "attiny261a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny28, "attiny28", &[_]FeatureType {
-            .Avr0,
-            .Lpm,
-            .Avr1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny4, "attiny4", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny40, "attiny40", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny4313, "attiny4313", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny43u, "attiny43u", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny44, "attiny44", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny44a, "attiny44a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny45, "attiny45", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny461, "attiny461", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny461a, "attiny461a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny48, "attiny48", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny5, "attiny5", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny828, "attiny828", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny84, "attiny84", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny84a, "attiny84a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny85, "attiny85", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny861, "attiny861", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny861a, "attiny861a", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny87, "attiny87", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny88, "attiny88", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Attiny9, "attiny9", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmegau,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr1, "avr1", &[_]FeatureType {
-            .Avr0,
-            .Lpm,
-            .Avr1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr2, "avr2", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr25, "avr25", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr25,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr3, "avr3", &[_]FeatureType {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr31, "avr31", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-            .Avr31,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr35, "avr35", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr4, "avr4", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr5, "avr5", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr51, "avr51", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr51,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avr6, "avr6", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrtiny, "avrtiny", &[_]FeatureType {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-            .Avrtiny,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-            .Xmega,
-        }),
-        CpuInfo(@This(), FeatureType).create(.M3000, "m3000", &[_]FeatureType {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-            .Avr5,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/BpfCpu.zig b/lib/std/target/cpu/BpfCpu.zig
deleted file mode 100644
index 2faecd08bd238da0816b19c1dce8829c434cd82c..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/BpfCpu.zig
+++ /dev/null
@@ -1,29 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const BpfCpu = enum {
-    Generic,
-    Probe,
-    V1,
-    V2,
-    V3,
-
-    const FeatureType = feature.BpfFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Probe, "probe", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.V1, "v1", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.V2, "v2", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.V3, "v3", &[_]FeatureType {
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/HexagonCpu.zig b/lib/std/target/cpu/HexagonCpu.zig
deleted file mode 100644
index 0287eb7acf33ae7e6052dfb7de14aedfb2e63bf7..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/HexagonCpu.zig
+++ /dev/null
@@ -1,103 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const HexagonCpu = enum {
-    Generic,
-    Hexagonv5,
-    Hexagonv55,
-    Hexagonv60,
-    Hexagonv62,
-    Hexagonv65,
-    Hexagonv66,
-
-    const FeatureType = feature.HexagonFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-            .V5,
-            .V55,
-            .V60,
-            .Duplex,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
-            .V5,
-            .Duplex,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
-            .V5,
-            .V55,
-            .Duplex,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
-            .V5,
-            .V55,
-            .V60,
-            .Duplex,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
-            .V5,
-            .V55,
-            .V60,
-            .V62,
-            .Duplex,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
-            .V5,
-            .V55,
-            .V60,
-            .V62,
-            .V65,
-            .Duplex,
-            .Mem_noshuf,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
-            .V5,
-            .V55,
-            .V60,
-            .V62,
-            .V65,
-            .V66,
-            .Duplex,
-            .Mem_noshuf,
-            .Memops,
-            .Packets,
-            .Nvj,
-            .Nvs,
-            .SmallData,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/MipsCpu.zig b/lib/std/target/cpu/MipsCpu.zig
deleted file mode 100644
index 2462e6212ce53cb3f9166b5f9bbd03264bc2e276..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/MipsCpu.zig
+++ /dev/null
@@ -1,190 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const MipsCpu = enum {
-    Mips1,
-    Mips2,
-    Mips3,
-    Mips32,
-    Mips32r2,
-    Mips32r3,
-    Mips32r5,
-    Mips32r6,
-    Mips4,
-    Mips5,
-    Mips64,
-    Mips64r2,
-    Mips64r3,
-    Mips64r5,
-    Mips64r6,
-    Octeon,
-    P5600,
-
-    const FeatureType = feature.MipsFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Mips1, "mips1", &[_]FeatureType {
-            .Mips1,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips2, "mips2", &[_]FeatureType {
-            .Mips1,
-            .Mips2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips3, "mips3", &[_]FeatureType {
-            .Mips3_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips1,
-            .Mips3_32,
-            .Mips3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips32, "mips32", &[_]FeatureType {
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips32r2, "mips32r2", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips4_32r2,
-            .Mips3_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips32r2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips32r3, "mips32r3", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips32r3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips32r5, "mips32r5", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips32r5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips32r6, "mips32r6", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Abs2008,
-            .Nan2008,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips32r6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips4, "mips4", &[_]FeatureType {
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips4,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips5, "mips5", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips4_32r2,
-            .Mips3_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips64, "mips64", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips64,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips64r2, "mips64r2", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips64r2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips64r3, "mips64r3", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips64r3,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips64r5, "mips64r5", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips64r5,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mips64r6, "mips64r6", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Nan2008,
-            .Abs2008,
-            .Mips4_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Mips64r6,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Octeon, "octeon", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .Cnmips,
-            .Mips64r2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.P5600, "p5600", &[_]FeatureType {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-            .P5600,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/Msp430Cpu.zig b/lib/std/target/cpu/Msp430Cpu.zig
deleted file mode 100644
index b64e5102a8540d3adf1c0d7edd9c0e094aae2b00..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/Msp430Cpu.zig
+++ /dev/null
@@ -1,24 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const Msp430Cpu = enum {
-    Generic,
-    Msp430,
-    Msp430x,
-
-    const FeatureType = feature.Msp430Feature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Msp430, "msp430", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Msp430x, "msp430x", &[_]FeatureType {
-            .Ext,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/NvptxCpu.zig b/lib/std/target/cpu/NvptxCpu.zig
deleted file mode 100644
index 03f36e214c3fa1a6e27f9aac98575ad45cce0a08..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/NvptxCpu.zig
+++ /dev/null
@@ -1,85 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const NvptxCpu = enum {
-    Sm_20,
-    Sm_21,
-    Sm_30,
-    Sm_32,
-    Sm_35,
-    Sm_37,
-    Sm_50,
-    Sm_52,
-    Sm_53,
-    Sm_60,
-    Sm_61,
-    Sm_62,
-    Sm_70,
-    Sm_72,
-    Sm_75,
-
-    const FeatureType = feature.NvptxFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Sm_20, "sm_20", &[_]FeatureType {
-            .Sm_20,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_21, "sm_21", &[_]FeatureType {
-            .Sm_21,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_30, "sm_30", &[_]FeatureType {
-            .Sm_30,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_32, "sm_32", &[_]FeatureType {
-            .Ptx40,
-            .Sm_32,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_35, "sm_35", &[_]FeatureType {
-            .Sm_35,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_37, "sm_37", &[_]FeatureType {
-            .Ptx41,
-            .Sm_37,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_50, "sm_50", &[_]FeatureType {
-            .Ptx40,
-            .Sm_50,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_52, "sm_52", &[_]FeatureType {
-            .Ptx41,
-            .Sm_52,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_53, "sm_53", &[_]FeatureType {
-            .Ptx42,
-            .Sm_53,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_60, "sm_60", &[_]FeatureType {
-            .Ptx50,
-            .Sm_60,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_61, "sm_61", &[_]FeatureType {
-            .Ptx50,
-            .Sm_61,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_62, "sm_62", &[_]FeatureType {
-            .Ptx50,
-            .Sm_62,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_70, "sm_70", &[_]FeatureType {
-            .Ptx60,
-            .Sm_70,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_72, "sm_72", &[_]FeatureType {
-            .Ptx61,
-            .Sm_72,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sm_75, "sm_75", &[_]FeatureType {
-            .Ptx63,
-            .Sm_75,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/PowerPcCpu.zig b/lib/std/target/cpu/PowerPcCpu.zig
deleted file mode 100644
index 7e34cf52cb08d3a269cb9020849a563207ad09d6..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/PowerPcCpu.zig
+++ /dev/null
@@ -1,451 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const PowerPcCpu = enum {
-    Cpu440,
-    Cpu450,
-    Cpu601,
-    Cpu602,
-    Cpu603,
-    E603,
-    Ev603,
-    Cpu604,
-    E604,
-    Cpu620,
-    Cpu7400,
-    Cpu7450,
-    Cpu750,
-    Cpu970,
-    A2,
-    A2q,
-    E500,
-    E500mc,
-    E5500,
-    G3,
-    G4,
-    G4plus,
-    G5,
-    Generic,
-    Ppc,
-    Ppc32,
-    Ppc64,
-    Ppc64le,
-    Pwr3,
-    Pwr4,
-    Pwr5,
-    Pwr5x,
-    Pwr6,
-    Pwr6x,
-    Pwr7,
-    Pwr8,
-    Pwr9,
-
-    const FeatureType = feature.PowerPcFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Cpu440, "440", &[_]FeatureType {
-            .Icbt,
-            .Booke,
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-            .Isel,
-            .Msync,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu450, "450", &[_]FeatureType {
-            .Icbt,
-            .Booke,
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-            .Isel,
-            .Msync,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu601, "601", &[_]FeatureType {
-            .HardFloat,
-            .Fpu,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu602, "602", &[_]FeatureType {
-            .HardFloat,
-            .Fpu,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu603, "603", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.E603, "603e", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ev603, "603ev", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu604, "604", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.E604, "604e", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu620, "620", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu7400, "7400", &[_]FeatureType {
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu7450, "7450", &[_]FeatureType {
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu750, "750", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cpu970, "970", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.A2, "a2", &[_]FeatureType {
-            .Bit64,
-            .Icbt,
-            .Booke,
-            .Cmpb,
-            .HardFloat,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Recipprec,
-            .Stfiwx,
-            .SlowPopcntd,
-        }),
-        CpuInfo(@This(), FeatureType).create(.A2q, "a2q", &[_]FeatureType {
-            .Bit64,
-            .Icbt,
-            .Booke,
-            .Cmpb,
-            .HardFloat,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Qpx,
-            .Recipprec,
-            .Stfiwx,
-            .SlowPopcntd,
-        }),
-        CpuInfo(@This(), FeatureType).create(.E500, "e500", &[_]FeatureType {
-            .Icbt,
-            .Booke,
-            .Isel,
-        }),
-        CpuInfo(@This(), FeatureType).create(.E500mc, "e500mc", &[_]FeatureType {
-            .Icbt,
-            .Booke,
-            .Isel,
-            .HardFloat,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.E5500, "e5500", &[_]FeatureType {
-            .Bit64,
-            .Icbt,
-            .Booke,
-            .Isel,
-            .Mfocrf,
-            .HardFloat,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.G3, "g3", &[_]FeatureType {
-            .HardFloat,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.G4, "g4", &[_]FeatureType {
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.G4plus, "g4+", &[_]FeatureType {
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-        }),
-        CpuInfo(@This(), FeatureType).create(.G5, "g5", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-            .HardFloat,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ppc, "ppc", &[_]FeatureType {
-            .HardFloat,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ppc32, "ppc32", &[_]FeatureType {
-            .HardFloat,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ppc64, "ppc64", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ppc64le, "ppc64le", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Bpermd,
-            .Cmpb,
-            .DirectMove,
-            .Extdiv,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Htm,
-            .Icbt,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Power8Altivec,
-            .Crypto,
-            .Power8Vector,
-            .Popcntd,
-            .PartwordAtomics,
-            .Recipprec,
-            .Stfiwx,
-            .TwoConstNr,
-            .Vsx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr3, "pwr3", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr4, "pwr4", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fres,
-            .Frsqrte,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr5, "pwr5", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr5x, "pwr5x", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Mfocrf,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr6, "pwr6", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Cmpb,
-            .Fcpsgn,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Lfiwax,
-            .Mfocrf,
-            .Recipprec,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr6x, "pwr6x", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Cmpb,
-            .Fcpsgn,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Lfiwax,
-            .Mfocrf,
-            .Recipprec,
-            .Stfiwx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr7, "pwr7", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Bpermd,
-            .Cmpb,
-            .Extdiv,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Popcntd,
-            .Recipprec,
-            .Stfiwx,
-            .TwoConstNr,
-            .Vsx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr8, "pwr8", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Bpermd,
-            .Cmpb,
-            .DirectMove,
-            .Extdiv,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Htm,
-            .Icbt,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Power8Altivec,
-            .Crypto,
-            .Power8Vector,
-            .Popcntd,
-            .PartwordAtomics,
-            .Recipprec,
-            .Stfiwx,
-            .TwoConstNr,
-            .Vsx,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pwr9, "pwr9", &[_]FeatureType {
-            .Bit64,
-            .HardFloat,
-            .Altivec,
-            .Bpermd,
-            .Cmpb,
-            .DirectMove,
-            .Extdiv,
-            .Fcpsgn,
-            .Fpcvt,
-            .Fprnd,
-            .Fre,
-            .Fres,
-            .Frsqrte,
-            .Frsqrtes,
-            .Fsqrt,
-            .Htm,
-            .Icbt,
-            .IsaV30Instructions,
-            .Isel,
-            .Ldbrx,
-            .Lfiwax,
-            .Mfocrf,
-            .Power8Altivec,
-            .Crypto,
-            .Power8Vector,
-            .Power9Altivec,
-            .Power9Vector,
-            .Popcntd,
-            .PpcPostraSched,
-            .PpcPreraSched,
-            .PartwordAtomics,
-            .Recipprec,
-            .Stfiwx,
-            .TwoConstNr,
-            .Vsx,
-            .VectorsUseTwoUnits,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/RiscVCpu.zig b/lib/std/target/cpu/RiscVCpu.zig
deleted file mode 100644
index d191e04acfdf66bde044c000d60381c1612cbc5e..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/RiscVCpu.zig
+++ /dev/null
@@ -1,23 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const RiscVCpu = enum {
-    GenericRv32,
-    GenericRv64,
-
-    const FeatureType = feature.RiscVFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
-            .RvcHints,
-        }),
-        CpuInfo(@This(), FeatureType).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
-            .Bit64,
-            .RvcHints,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/SparcCpu.zig b/lib/std/target/cpu/SparcCpu.zig
deleted file mode 100644
index bd5dca79cabe52f2d0063fdb6af969765b9ecf58..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/SparcCpu.zig
+++ /dev/null
@@ -1,216 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const SparcCpu = enum {
-    At697e,
-    At697f,
-    F934,
-    Generic,
-    Gr712rc,
-    Gr740,
-    Hypersparc,
-    Leon2,
-    Leon3,
-    Leon4,
-    Ma2080,
-    Ma2085,
-    Ma2100,
-    Ma2150,
-    Ma2155,
-    Ma2450,
-    Ma2455,
-    Ma2480,
-    Ma2485,
-    Ma2x5x,
-    Ma2x8x,
-    Myriad2,
-    Myriad21,
-    Myriad22,
-    Myriad23,
-    Niagara,
-    Niagara2,
-    Niagara3,
-    Niagara4,
-    Sparclet,
-    Sparclite,
-    Sparclite86x,
-    Supersparc,
-    Tsc701,
-    Ultrasparc,
-    Ultrasparc3,
-    Ut699,
-    V7,
-    V8,
-    V9,
-
-    const FeatureType = feature.SparcFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.At697e, "at697e", &[_]FeatureType {
-            .Leon,
-            .Insertnopload,
-        }),
-        CpuInfo(@This(), FeatureType).create(.At697f, "at697f", &[_]FeatureType {
-            .Leon,
-            .Insertnopload,
-        }),
-        CpuInfo(@This(), FeatureType).create(.F934, "f934", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gr712rc, "gr712rc", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Gr740, "gr740", &[_]FeatureType {
-            .Leon,
-            .Leonpwrpsr,
-            .Hasleoncasa,
-            .Leoncyclecounter,
-            .Hasumacsmac,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Hypersparc, "hypersparc", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Leon2, "leon2", &[_]FeatureType {
-            .Leon,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Leon3, "leon3", &[_]FeatureType {
-            .Leon,
-            .Hasumacsmac,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Leon4, "leon4", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-            .Hasumacsmac,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2080, "ma2080", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2085, "ma2085", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2100, "ma2100", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2150, "ma2150", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2155, "ma2155", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2450, "ma2450", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2455, "ma2455", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2480, "ma2480", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2485, "ma2485", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Myriad2, "myriad2", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Myriad21, "myriad2.1", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Myriad22, "myriad2.2", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Myriad23, "myriad2.3", &[_]FeatureType {
-            .Leon,
-            .Hasleoncasa,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Niagara, "niagara", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-            .Vis2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Niagara2, "niagara2", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-            .Vis2,
-            .Popc,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Niagara3, "niagara3", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-            .Vis2,
-            .Popc,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Niagara4, "niagara4", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-            .Vis2,
-            .Vis3,
-            .Popc,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sparclet, "sparclet", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sparclite, "sparclite", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Supersparc, "supersparc", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tsc701, "tsc701", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
-            .DeprecatedV8,
-            .V9,
-            .Vis,
-            .Vis2,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ut699, "ut699", &[_]FeatureType {
-            .Leon,
-            .NoFmuls,
-            .NoFsmuld,
-            .Fixallfdivsqrt,
-            .Insertnopload,
-        }),
-        CpuInfo(@This(), FeatureType).create(.V7, "v7", &[_]FeatureType {
-            .NoFsmuld,
-            .SoftMulDiv,
-        }),
-        CpuInfo(@This(), FeatureType).create(.V8, "v8", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.V9, "v9", &[_]FeatureType {
-            .V9,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/SystemZCpu.zig b/lib/std/target/cpu/SystemZCpu.zig
deleted file mode 100644
index 7e5b21c85898f184b8b9df3da83519c85efa7595..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/SystemZCpu.zig
+++ /dev/null
@@ -1,279 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const SystemZCpu = enum {
-    Arch10,
-    Arch11,
-    Arch12,
-    Arch13,
-    Arch8,
-    Arch9,
-    Generic,
-    Z10,
-    Z13,
-    Z14,
-    Z15,
-    Z196,
-    ZEC12,
-
-    const FeatureType = feature.SystemZFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Arch10, "arch10", &[_]FeatureType {
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadStoreOnCond,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MiscellaneousExtensions,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arch11, "arch11", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MiscellaneousExtensions,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arch12, "arch12", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .GuardedStorage,
-            .HighWord,
-            .InsertReferenceBitsMultiple,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MessageSecurityAssistExtension7,
-            .MessageSecurityAssistExtension8,
-            .MiscellaneousExtensions,
-            .MiscellaneousExtensions2,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-            .VectorEnhancements1,
-            .VectorPackedDecimal,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arch13, "arch13", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DeflateConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .EnhancedSort,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .GuardedStorage,
-            .HighWord,
-            .InsertReferenceBitsMultiple,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MessageSecurityAssistExtension7,
-            .MessageSecurityAssistExtension8,
-            .MessageSecurityAssistExtension9,
-            .MiscellaneousExtensions,
-            .MiscellaneousExtensions2,
-            .MiscellaneousExtensions3,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-            .VectorEnhancements1,
-            .VectorEnhancements2,
-            .VectorPackedDecimal,
-            .VectorPackedDecimalEnhancement,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arch8, "arch8", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Arch9, "arch9", &[_]FeatureType {
-            .DistinctOps,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadStoreOnCond,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .PopulationCount,
-            .ResetReferenceBitsMultiple,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Z10, "z10", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Z13, "z13", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MiscellaneousExtensions,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Z14, "z14", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .GuardedStorage,
-            .HighWord,
-            .InsertReferenceBitsMultiple,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MessageSecurityAssistExtension7,
-            .MessageSecurityAssistExtension8,
-            .MiscellaneousExtensions,
-            .MiscellaneousExtensions2,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-            .VectorEnhancements1,
-            .VectorPackedDecimal,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Z15, "z15", &[_]FeatureType {
-            .DfpPackedConversion,
-            .DfpZonedConversion,
-            .DeflateConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .EnhancedSort,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .GuardedStorage,
-            .HighWord,
-            .InsertReferenceBitsMultiple,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadAndZeroRightmostByte,
-            .LoadStoreOnCond,
-            .LoadStoreOnCond2,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MessageSecurityAssistExtension5,
-            .MessageSecurityAssistExtension7,
-            .MessageSecurityAssistExtension8,
-            .MessageSecurityAssistExtension9,
-            .MiscellaneousExtensions,
-            .MiscellaneousExtensions2,
-            .MiscellaneousExtensions3,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-            .Vector,
-            .VectorEnhancements1,
-            .VectorEnhancements2,
-            .VectorPackedDecimal,
-            .VectorPackedDecimalEnhancement,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Z196, "z196", &[_]FeatureType {
-            .DistinctOps,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadStoreOnCond,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .PopulationCount,
-            .ResetReferenceBitsMultiple,
-        }),
-        CpuInfo(@This(), FeatureType).create(.ZEC12, "zEC12", &[_]FeatureType {
-            .DfpZonedConversion,
-            .DistinctOps,
-            .EnhancedDat2,
-            .ExecutionHint,
-            .FpExtension,
-            .FastSerialization,
-            .HighWord,
-            .InterlockedAccess1,
-            .LoadAndTrap,
-            .LoadStoreOnCond,
-            .MessageSecurityAssistExtension3,
-            .MessageSecurityAssistExtension4,
-            .MiscellaneousExtensions,
-            .PopulationCount,
-            .ProcessorAssist,
-            .ResetReferenceBitsMultiple,
-            .TransactionalExecution,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/WebAssemblyCpu.zig b/lib/std/target/cpu/WebAssemblyCpu.zig
deleted file mode 100644
index a05702dac19ac3bcdb86bd4e5374b0b5cb4ddf27..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/WebAssemblyCpu.zig
+++ /dev/null
@@ -1,28 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const WebAssemblyCpu = enum {
-    BleedingEdge,
-    Generic,
-    Mvp,
-
-    const FeatureType = feature.WebAssemblyFeature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
-            .Atomics,
-            .MutableGlobals,
-            .NontrappingFptoint,
-            .Simd128,
-            .SignExt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Mvp, "mvp", &[_]FeatureType {
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/X86Cpu.zig b/lib/std/target/cpu/X86Cpu.zig
deleted file mode 100644
index 0a3a15f347a3b74a4aa4143d374d03ac5191a5c8..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/X86Cpu.zig
+++ /dev/null
@@ -1,1864 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const X86Cpu = enum {
-    Amdfam10,
-    Athlon,
-    Athlon4,
-    AthlonFx,
-    AthlonMp,
-    AthlonTbird,
-    AthlonXp,
-    Athlon64,
-    Athlon64Sse3,
-    Atom,
-    Barcelona,
-    Bdver1,
-    Bdver2,
-    Bdver3,
-    Bdver4,
-    Bonnell,
-    Broadwell,
-    Btver1,
-    Btver2,
-    C3,
-    C32,
-    Cannonlake,
-    Cascadelake,
-    Cooperlake,
-    CoreAvxI,
-    CoreAvx2,
-    Core2,
-    Corei7,
-    Corei7Avx,
-    Generic,
-    Geode,
-    Goldmont,
-    GoldmontPlus,
-    Haswell,
-    I386,
-    I486,
-    I586,
-    I686,
-    IcelakeClient,
-    IcelakeServer,
-    Ivybridge,
-    K6,
-    K62,
-    K63,
-    K8,
-    K8Sse3,
-    Knl,
-    Knm,
-    Lakemont,
-    Nehalem,
-    Nocona,
-    Opteron,
-    OpteronSse3,
-    Penryn,
-    Pentium,
-    PentiumM,
-    PentiumMmx,
-    Pentium2,
-    Pentium3,
-    Pentium3m,
-    Pentium4,
-    Pentium4m,
-    Pentiumpro,
-    Prescott,
-    Sandybridge,
-    Silvermont,
-    Skx,
-    Skylake,
-    SkylakeAvx512,
-    Slm,
-    Tigerlake,
-    Tremont,
-    Westmere,
-    WinchipC6,
-    Winchip2,
-    X8664,
-    Yonah,
-    Znver1,
-    Znver2,
-
-    const FeatureType = feature.X86Feature;
-
-    pub fn getInfo(self: @This()) CpuInfo(@This(), FeatureType) {
-        return cpu_infos[@enumToInt(self)];
-    }
-
-    pub const cpu_infos = [@memberCount(@This())]CpuInfo(@This(), FeatureType) {
-        CpuInfo(@This(), FeatureType).create(.Amdfam10, "amdfam10", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Nopl,
-            .Popcnt,
-            .Sse,
-            .Sse4a,
-            .SlowShld,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Athlon, "athlon", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cmov,
-            .Cx8,
-            .Nopl,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Athlon4, "athlon-4", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Nopl,
-            .Sse,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Nopl,
-            .Sse,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cmov,
-            .Cx8,
-            .Nopl,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Nopl,
-            .Sse,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Athlon64, "athlon64", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Atom, "atom", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .LeaSp,
-            .LeaUsesAg,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .PadShortFunctions,
-            .Sse,
-            .Ssse3,
-            .IdivlToDivb,
-            .IdivqToDivl,
-            .SlowTwoMemOps,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Barcelona, "barcelona", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Nopl,
-            .Popcnt,
-            .Sse,
-            .Sse4a,
-            .SlowShld,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Bdver1, "bdver1", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Branchfusion,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Fast11bytenop,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lwp,
-            .Lzcnt,
-            .Mmx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .SlowShld,
-            .X87,
-            .Xop,
-            .Xsave,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Bdver2, "bdver2", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Bmi,
-            .Branchfusion,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fma,
-            .Fxsr,
-            .Fast11bytenop,
-            .FastBextr,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lwp,
-            .Lzcnt,
-            .Mmx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .SlowShld,
-            .Tbm,
-            .X87,
-            .Xop,
-            .Xsave,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Bdver3, "bdver3", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Bmi,
-            .Branchfusion,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .Fast11bytenop,
-            .FastBextr,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lwp,
-            .Lzcnt,
-            .Mmx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .SlowShld,
-            .Tbm,
-            .X87,
-            .Xop,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Bdver4, "bdver4", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Branchfusion,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .Fast11bytenop,
-            .FastBextr,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lwp,
-            .Lzcnt,
-            .Mmx,
-            .Mwaitx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .SlowShld,
-            .Tbm,
-            .X87,
-            .Xop,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Bonnell, "bonnell", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .LeaSp,
-            .LeaUsesAg,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .PadShortFunctions,
-            .Sse,
-            .Ssse3,
-            .IdivlToDivb,
-            .IdivqToDivl,
-            .SlowTwoMemOps,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Broadwell, "broadwell", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Avx,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .FalseDepsLzcntTzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Btver1, "btver1", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Fast15bytenop,
-            .FastScalarShiftMasks,
-            .FastVectorShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Nopl,
-            .Popcnt,
-            .Prfchw,
-            .Sse,
-            .Sse4a,
-            .Ssse3,
-            .SlowShld,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Btver2, "btver2", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Bmi,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fxsr,
-            .Fast15bytenop,
-            .FastBextr,
-            .FastHops,
-            .FastLzcnt,
-            .FastPartialYmmOrZmmWrite,
-            .FastScalarShiftMasks,
-            .FastVectorShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .Sse4a,
-            .Ssse3,
-            .SlowShld,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.C3, "c3", &[_]FeatureType {
-            .Mmx,
-            .Dnow3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.C32, "c3-2", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Sse,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cannonlake, "cannonlake", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Avx512ifma,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Avx512vbmi,
-            .Avx512vl,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cascadelake, "cascadelake", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdrnd,
-            .Rdseed,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Avx512vl,
-            .Avx512vnni,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Cooperlake, "cooperlake", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Avx512bf16,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdrnd,
-            .Rdseed,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Avx512vl,
-            .Avx512vnni,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Rdrnd,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowUnalignedMem32,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .FalseDepsLzcntTzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Rdrnd,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Core2, "core2", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Sse,
-            .Ssse3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Corei7, "corei7", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Popcnt,
-            .Sse,
-            .Sse42,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowUnalignedMem32,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Generic, "generic", &[_]FeatureType {
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Geode, "geode", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Goldmont, "goldmont", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Clflushopt,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fsgsbase,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Sha,
-            .Sse42,
-            .Ssse3,
-            .SlowIncdec,
-            .SlowLea,
-            .SlowTwoMemOps,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Clflushopt,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fsgsbase,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .Ptwrite,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Sse42,
-            .Ssse3,
-            .SlowIncdec,
-            .SlowLea,
-            .SlowTwoMemOps,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Haswell, "haswell", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .FalseDepsLzcntTzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Rdrnd,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.I386, "i386", &[_]FeatureType {
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.I486, "i486", &[_]FeatureType {
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.I586, "i586", &[_]FeatureType {
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.I686, "i686", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Avx512bitalg,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .Gfni,
-            .FastGather,
-            .Avx512ifma,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Vaes,
-            .Avx512vbmi,
-            .Avx512vbmi2,
-            .Avx512vl,
-            .Avx512vnni,
-            .Vpclmulqdq,
-            .Avx512vpopcntdq,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Avx512bitalg,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .Gfni,
-            .FastGather,
-            .Avx512ifma,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pconfig,
-            .Pku,
-            .Popcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Vaes,
-            .Avx512vbmi,
-            .Avx512vbmi2,
-            .Avx512vl,
-            .Avx512vnni,
-            .Vpclmulqdq,
-            .Avx512vpopcntdq,
-            .Wbnoinvd,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Ivybridge, "ivybridge", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Rdrnd,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowUnalignedMem32,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.K6, "k6", &[_]FeatureType {
-            .Cx8,
-            .Mmx,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.K62, "k6-2", &[_]FeatureType {
-            .Mmx,
-            .Dnow3,
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.K63, "k6-3", &[_]FeatureType {
-            .Mmx,
-            .Dnow3,
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.K8, "k8", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Knl, "knl", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512cd,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512er,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastPartialYmmOrZmmWrite,
-            .FastGather,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Pclmul,
-            .Avx512pf,
-            .Popcnt,
-            .Prefetchwt1,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowIncdec,
-            .SlowPmaddwd,
-            .SlowTwoMemOps,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Knm, "knm", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512cd,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512er,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastPartialYmmOrZmmWrite,
-            .FastGather,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Pclmul,
-            .Avx512pf,
-            .Popcnt,
-            .Prefetchwt1,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowIncdec,
-            .SlowPmaddwd,
-            .SlowTwoMemOps,
-            .Avx512vpopcntdq,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Lakemont, "lakemont", &[_]FeatureType {
-        }),
-        CpuInfo(@This(), FeatureType).create(.Nehalem, "nehalem", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Popcnt,
-            .Sse,
-            .Sse42,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Nocona, "nocona", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Opteron, "opteron", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
-            .Mmx,
-            .Dnowa3,
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastScalarShiftMasks,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowShld,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Penryn, "penryn", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Sse,
-            .Sse41,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium, "pentium", &[_]FeatureType {
-            .Cx8,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.PentiumM, "pentium-m", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
-            .Cx8,
-            .Mmx,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium2, "pentium2", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium3, "pentium3", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium3m, "pentium3m", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium4, "pentium4", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentium4m, "pentium4m", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Nopl,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Prescott, "prescott", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Sandybridge, "sandybridge", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Avx,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .SlowUnalignedMem32,
-            .X87,
-            .Xsave,
-            .Xsaveopt,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Silvermont, "silvermont", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Sse,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Sse42,
-            .Ssse3,
-            .IdivqToDivl,
-            .SlowIncdec,
-            .SlowLea,
-            .SlowPmulld,
-            .SlowTwoMemOps,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Skx, "skx", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdrnd,
-            .Rdseed,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Avx512vl,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Skylake, "skylake", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Clflushopt,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .FastGather,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdrnd,
-            .Rdseed,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Avx512vl,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Slm, "slm", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Movbe,
-            .Nopl,
-            .Sse,
-            .Pclmul,
-            .Popcnt,
-            .FalseDepsPopcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Sse42,
-            .Ssse3,
-            .IdivqToDivl,
-            .SlowIncdec,
-            .SlowLea,
-            .SlowPmulld,
-            .SlowTwoMemOps,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tigerlake, "tigerlake", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx,
-            .Avx2,
-            .Avx512f,
-            .Avx512bitalg,
-            .Bmi,
-            .Bmi2,
-            .Avx512bw,
-            .Avx512cd,
-            .Clflushopt,
-            .Clwb,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Avx512dq,
-            .Ermsb,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .FastShldRotate,
-            .FastScalarFsqrt,
-            .FastVariableShuffle,
-            .FastVectorFsqrt,
-            .Gfni,
-            .FastGather,
-            .Avx512ifma,
-            .Invpcid,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Movdir64b,
-            .Movdiri,
-            .Macrofusion,
-            .MergeToThreewayBranch,
-            .Nopl,
-            .Pclmul,
-            .Pku,
-            .Popcnt,
-            .Prfchw,
-            .Prefer256Bit,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Shstk,
-            .Sse42,
-            .Slow3opsLea,
-            .IdivqToDivl,
-            .Vaes,
-            .Avx512vbmi,
-            .Avx512vbmi2,
-            .Avx512vl,
-            .Avx512vnni,
-            .Avx512vp2intersect,
-            .Vpclmulqdq,
-            .Avx512vpopcntdq,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Tremont, "tremont", &[_]FeatureType {
-            .Bit64,
-            .Sse,
-            .Aes,
-            .Cldemote,
-            .Clflushopt,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fsgsbase,
-            .Fxsr,
-            .Gfni,
-            .Sahf,
-            .Mmx,
-            .Movbe,
-            .Movdir64b,
-            .Movdiri,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .Ptwrite,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sgx,
-            .Sha,
-            .Sse42,
-            .Ssse3,
-            .SlowIncdec,
-            .SlowLea,
-            .SlowTwoMemOps,
-            .Waitpkg,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Westmere, "westmere", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .Fxsr,
-            .Sahf,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Sse,
-            .Pclmul,
-            .Popcnt,
-            .Sse42,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
-            .Mmx,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Winchip2, "winchip2", &[_]FeatureType {
-            .Mmx,
-            .Dnow3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.X8664, "x86-64", &[_]FeatureType {
-            .Bit64,
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Macrofusion,
-            .Nopl,
-            .Sse,
-            .Sse2,
-            .Slow3opsLea,
-            .SlowIncdec,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Yonah, "yonah", &[_]FeatureType {
-            .Cmov,
-            .Cx8,
-            .Fxsr,
-            .Mmx,
-            .Nopl,
-            .Sse,
-            .Sse3,
-            .SlowUnalignedMem16,
-            .X87,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Znver1, "znver1", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Branchfusion,
-            .Clflushopt,
-            .Clzero,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .Fast15bytenop,
-            .FastBextr,
-            .FastLzcnt,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Mwaitx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .Rdrnd,
-            .Rdseed,
-            .Sha,
-            .Sse4a,
-            .SlowShld,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-        CpuInfo(@This(), FeatureType).create(.Znver2, "znver2", &[_]FeatureType {
-            .Bit64,
-            .Adx,
-            .Sse,
-            .Aes,
-            .Avx2,
-            .Bmi,
-            .Bmi2,
-            .Branchfusion,
-            .Clflushopt,
-            .Clwb,
-            .Clzero,
-            .Cmov,
-            .Cx8,
-            .Cx16,
-            .F16c,
-            .Fma,
-            .Fsgsbase,
-            .Fxsr,
-            .Fast15bytenop,
-            .FastBextr,
-            .FastLzcnt,
-            .FastScalarShiftMasks,
-            .Sahf,
-            .Lzcnt,
-            .Mmx,
-            .Movbe,
-            .Mwaitx,
-            .Nopl,
-            .Pclmul,
-            .Popcnt,
-            .Prfchw,
-            .Rdpid,
-            .Rdrnd,
-            .Rdseed,
-            .Sha,
-            .Sse4a,
-            .SlowShld,
-            .Wbnoinvd,
-            .X87,
-            .Xsave,
-            .Xsavec,
-            .Xsaveopt,
-            .Xsaves,
-        }),
-    };
-};
diff --git a/lib/std/target/cpu/empty.zig b/lib/std/target/cpu/empty.zig
deleted file mode 100644
index e35eaaf41d1b5bb9447a44309a825d56c9b8d984..0000000000000000000000000000000000000000
--- a/lib/std/target/cpu/empty.zig
+++ /dev/null
@@ -1,6 +0,0 @@
-const feature = @import("std").target.feature;
-const CpuInfo = @import("std").target.cpu.CpuInfo;
-
-pub const EmptyCpu = struct {
-    pub const cpu_infos = [0]CpuInfo(@This(), feature.EmptyFeature) {};
-};
diff --git a/lib/std/target/feature.zig b/lib/std/target/feature.zig
deleted file mode 100644
index d5bf45cd0ef9ddc6cfd450bf20d10e856af6c9f0..0000000000000000000000000000000000000000
--- a/lib/std/target/feature.zig
+++ /dev/null
@@ -1,81 +0,0 @@
-const builtin = @import("builtin");
-const std = @import("std");
-const Arch = std.Target.Arch;
-
-pub const AArch64Feature = @import("feature/AArch64Feature.zig").AArch64Feature;
-pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature;
-pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature;
-pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature;
-pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature;
-pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature; pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature;
-pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature;
-pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature;
-pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature;
-pub const RiscVFeature = @import("feature/RiscVFeature.zig").RiscVFeature;
-pub const SparcFeature = @import("feature/SparcFeature.zig").SparcFeature;
-pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature;
-pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature;
-pub const X86Feature = @import("feature/X86Feature.zig").X86Feature;
-
-pub const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
-
-pub fn ArchFeature(comptime arch: @TagType(Arch)) type {
-    return switch (arch) {
-        .arm, .armeb, .thumb, .thumbeb => ArmFeature,
-        .aarch64, .aarch64_be, .aarch64_32 => AArch64Feature,
-        .avr => AvrFeature,
-        .bpfel, .bpfeb => BpfFeature,
-        .hexagon => HexagonFeature,
-        .mips, .mipsel, .mips64, .mips64el => MipsFeature,
-        .msp430 => Msp430Feature,
-        .powerpc, .powerpc64, .powerpc64le => PowerPcFeature,
-        .amdgcn => AmdGpuFeature,
-        .riscv32, .riscv64 => RiscVFeature,
-        .sparc, .sparcv9, .sparcel => SparcFeature,
-        .s390x => SystemZFeature,
-        .i386, .x86_64 => X86Feature,
-        .nvptx, .nvptx64 => NvptxFeature,
-        .wasm32, .wasm64 => WebAssemblyFeature,
-
-        else => EmptyFeature,
-    };
-}
-
-pub fn ArchFeatureInfo(comptime arch: @TagType(Arch)) type {
-    return FeatureInfo(ArchFeature(arch));
-}
-
-pub fn FeatureInfo(comptime EnumType: type) type {
-    return struct {
-        value: EnumType,
-        name: []const u8,
-        description: []const u8,
-        llvm_name: []const u8,
-
-        subfeatures: []const EnumType,
-
-        const Self = @This();
-
-        pub fn create(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8) Self {
-            return Self {
-                .value = value,
-                .name = name,
-                .description = description,
-                .llvm_name = llvm_name,
-
-                .subfeatures = &[_]EnumType{},
-            };
-        }
-
-        pub fn createWithSubfeatures(value: EnumType, name: []const u8, description: []const u8, llvm_name: []const u8, subfeatures: []const EnumType) Self {
-            return Self {
-                .value = value,
-                .name = name,
-                .description = description,
-                .llvm_name = llvm_name,
-
-                .subfeatures = subfeatures,
-            };
-        }
-    };
-}
diff --git a/lib/std/target/feature/AArch64Feature.zig b/lib/std/target/feature/AArch64Feature.zig
deleted file mode 100644
index 8044d957be998f9a038bd10e57596d28367b9eab..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/AArch64Feature.zig
+++ /dev/null
@@ -1,750 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const AArch64Feature = enum {
-    Aes,
-    Am,
-    AggressiveFma,
-    Altnzcv,
-    AlternateSextloadCvtF32Pattern,
-    ArithBccFusion,
-    ArithCbzFusion,
-    BalanceFpOps,
-    Bti,
-    Ccidx,
-    Ccpp,
-    Crc,
-    Ccdp,
-    CallSavedX8,
-    CallSavedX9,
-    CallSavedX10,
-    CallSavedX11,
-    CallSavedX12,
-    CallSavedX13,
-    CallSavedX14,
-    CallSavedX15,
-    CallSavedX18,
-    Complxnum,
-    Crypto,
-    CustomCheapAsMove,
-    Dit,
-    DisableLatencySchedHeuristic,
-    Dotprod,
-    Ete,
-    ExynosCheapAsMove,
-    Fmi,
-    Fp16fml,
-    FpArmv8,
-    Fptoint,
-    Force32bitJumpTables,
-    Fullfp16,
-    FuseAes,
-    FuseAddress,
-    FuseArithLogic,
-    FuseCsel,
-    FuseCryptoEor,
-    FuseLiterals,
-    Jsconv,
-    Lor,
-    Lse,
-    LslFast,
-    Mpam,
-    Mte,
-    Neon,
-    Nv,
-    NoNegImmediates,
-    Pa,
-    Pan,
-    PanRwv,
-    Perfmon,
-    UsePostraScheduler,
-    Predres,
-    PredictableSelectExpensive,
-    Uaops,
-    Ras,
-    Rasv8_4,
-    Rcpc,
-    RcpcImmo,
-    Rdm,
-    Rand,
-    ReserveX1,
-    ReserveX2,
-    ReserveX3,
-    ReserveX4,
-    ReserveX5,
-    ReserveX6,
-    ReserveX7,
-    ReserveX9,
-    ReserveX10,
-    ReserveX11,
-    ReserveX12,
-    ReserveX13,
-    ReserveX14,
-    ReserveX15,
-    ReserveX18,
-    ReserveX20,
-    ReserveX21,
-    ReserveX22,
-    ReserveX23,
-    ReserveX24,
-    ReserveX25,
-    ReserveX26,
-    ReserveX27,
-    ReserveX28,
-    Sb,
-    Sel2,
-    Sha2,
-    Sha3,
-    Sm4,
-    Spe,
-    Ssbs,
-    Sve,
-    Sve2,
-    Sve2Aes,
-    Sve2Bitperm,
-    Sve2Sha3,
-    Sve2Sm4,
-    SlowMisaligned128store,
-    SlowPaired128,
-    SlowStrqroStore,
-    Specrestrict,
-    StrictAlign,
-    TlbRmi,
-    Tme,
-    Tracev84,
-    Trbe,
-    TaggedGlobals,
-    UseAa,
-    TpidrEl1,
-    TpidrEl2,
-    TpidrEl3,
-    UseReciprocalSquareRoot,
-    Vh,
-    Zcm,
-    Zcz,
-    ZczFp,
-    ZczFpWorkaround,
-    ZczGp,
-    V81a,
-    V82a,
-    V83a,
-    V84a,
-    V85a,
-    A35,
-    A53,
-    A55,
-    A57,
-    A65,
-    A72,
-    A73,
-    A75,
-    A76,
-    Cyclone,
-    Exynosm1,
-    Exynosm2,
-    Exynosm3,
-    Exynosm4,
-    Falkor,
-    Kryo,
-    Neoversee1,
-    Neoversen1,
-    Saphira,
-    Tsv110,
-    Thunderx,
-    Thunderx2t99,
-    Thunderxt81,
-    Thunderxt83,
-    Thunderxt88,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.Am, "am", "Enable v8.4-A Activity Monitors extension", "am"),
-        FeatureInfo(@This()).create(.AggressiveFma, "aggressive-fma", "Enable Aggressive FMA for floating-point.", "aggressive-fma"),
-        FeatureInfo(@This()).create(.Altnzcv, "altnzcv", "Enable alternative NZCV format for floating point comparisons", "altnzcv"),
-        FeatureInfo(@This()).create(.AlternateSextloadCvtF32Pattern, "alternate-sextload-cvt-f32-pattern", "Use alternative pattern for sextload convert to f32", "alternate-sextload-cvt-f32-pattern"),
-        FeatureInfo(@This()).create(.ArithBccFusion, "arith-bcc-fusion", "CPU fuses arithmetic+bcc operations", "arith-bcc-fusion"),
-        FeatureInfo(@This()).create(.ArithCbzFusion, "arith-cbz-fusion", "CPU fuses arithmetic + cbz/cbnz operations", "arith-cbz-fusion"),
-        FeatureInfo(@This()).create(.BalanceFpOps, "balance-fp-ops", "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", "balance-fp-ops"),
-        FeatureInfo(@This()).create(.Bti, "bti", "Enable Branch Target Identification", "bti"),
-        FeatureInfo(@This()).create(.Ccidx, "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", "ccidx"),
-        FeatureInfo(@This()).create(.Ccpp, "ccpp", "Enable v8.2 data Cache Clean to Point of Persistence", "ccpp"),
-        FeatureInfo(@This()).create(.Crc, "crc", "Enable ARMv8 CRC-32 checksum instructions", "crc"),
-        FeatureInfo(@This()).create(.Ccdp, "ccdp", "Enable v8.5 Cache Clean to Point of Deep Persistence", "ccdp"),
-        FeatureInfo(@This()).create(.CallSavedX8, "call-saved-x8", "Make X8 callee saved.", "call-saved-x8"),
-        FeatureInfo(@This()).create(.CallSavedX9, "call-saved-x9", "Make X9 callee saved.", "call-saved-x9"),
-        FeatureInfo(@This()).create(.CallSavedX10, "call-saved-x10", "Make X10 callee saved.", "call-saved-x10"),
-        FeatureInfo(@This()).create(.CallSavedX11, "call-saved-x11", "Make X11 callee saved.", "call-saved-x11"),
-        FeatureInfo(@This()).create(.CallSavedX12, "call-saved-x12", "Make X12 callee saved.", "call-saved-x12"),
-        FeatureInfo(@This()).create(.CallSavedX13, "call-saved-x13", "Make X13 callee saved.", "call-saved-x13"),
-        FeatureInfo(@This()).create(.CallSavedX14, "call-saved-x14", "Make X14 callee saved.", "call-saved-x14"),
-        FeatureInfo(@This()).create(.CallSavedX15, "call-saved-x15", "Make X15 callee saved.", "call-saved-x15"),
-        FeatureInfo(@This()).create(.CallSavedX18, "call-saved-x18", "Make X18 callee saved.", "call-saved-x18"),
-        FeatureInfo(@This()).createWithSubfeatures(.Complxnum, "complxnum", "Enable v8.3-A Floating-point complex number support", "complxnum", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable cryptographic instructions", "crypto", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.CustomCheapAsMove, "custom-cheap-as-move", "Use custom handling of cheap instructions", "custom-cheap-as-move"),
-        FeatureInfo(@This()).create(.Dit, "dit", "Enable v8.4-A Data Independent Timing instructions", "dit"),
-        FeatureInfo(@This()).create(.DisableLatencySchedHeuristic, "disable-latency-sched-heuristic", "Disable latency scheduling heuristic", "disable-latency-sched-heuristic"),
-        FeatureInfo(@This()).create(.Dotprod, "dotprod", "Enable dot product support", "dotprod"),
-        FeatureInfo(@This()).createWithSubfeatures(.Ete, "ete", "Enable Embedded Trace Extension", "ete", &[_]@This() {
-            .Trbe,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.ExynosCheapAsMove, "exynos-cheap-as-move", "Use Exynos specific handling of cheap instructions", "exynos-cheap-as-move", &[_]@This() {
-            .CustomCheapAsMove,
-        }),
-        FeatureInfo(@This()).create(.Fmi, "fmi", "Enable v8.4-A Flag Manipulation Instructions", "fmi"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable FP16 FML instructions", "fp16fml", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8"),
-        FeatureInfo(@This()).create(.Fptoint, "fptoint", "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", "fptoint"),
-        FeatureInfo(@This()).create(.Force32bitJumpTables, "force-32bit-jump-tables", "Force jump table entries to be 32-bits wide except at MinSize", "force-32bit-jump-tables"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Full FP16", "fullfp16", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
-        FeatureInfo(@This()).create(.FuseAddress, "fuse-address", "CPU fuses address generation and memory operations", "fuse-address"),
-        FeatureInfo(@This()).create(.FuseArithLogic, "fuse-arith-logic", "CPU fuses arithmetic and logic operations", "fuse-arith-logic"),
-        FeatureInfo(@This()).create(.FuseCsel, "fuse-csel", "CPU fuses conditional select operations", "fuse-csel"),
-        FeatureInfo(@This()).create(.FuseCryptoEor, "fuse-crypto-eor", "CPU fuses AES/PMULL and EOR operations", "fuse-crypto-eor"),
-        FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
-        FeatureInfo(@This()).createWithSubfeatures(.Jsconv, "jsconv", "Enable v8.3-A JavaScript FP conversion enchancement", "jsconv", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.Lor, "lor", "Enables ARM v8.1 Limited Ordering Regions extension", "lor"),
-        FeatureInfo(@This()).create(.Lse, "lse", "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", "lse"),
-        FeatureInfo(@This()).create(.LslFast, "lsl-fast", "CPU has a fastpath logical shift of up to 3 places", "lsl-fast"),
-        FeatureInfo(@This()).create(.Mpam, "mpam", "Enable v8.4-A Memory system Partitioning and Monitoring extension", "mpam"),
-        FeatureInfo(@This()).create(.Mte, "mte", "Enable Memory Tagging Extension", "mte"),
-        FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable Advanced SIMD instructions", "neon", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.Nv, "nv", "Enable v8.4-A Nested Virtualization Enchancement", "nv"),
-        FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
-        FeatureInfo(@This()).create(.Pa, "pa", "Enable v8.3-A Pointer Authentication enchancement", "pa"),
-        FeatureInfo(@This()).create(.Pan, "pan", "Enables ARM v8.1 Privileged Access-Never extension", "pan"),
-        FeatureInfo(@This()).createWithSubfeatures(.PanRwv, "pan-rwv", "Enable v8.2 PAN s1e1R and s1e1W Variants", "pan-rwv", &[_]@This() {
-            .Pan,
-        }),
-        FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", "perfmon"),
-        FeatureInfo(@This()).create(.UsePostraScheduler, "use-postra-scheduler", "Schedule again after register allocation", "use-postra-scheduler"),
-        FeatureInfo(@This()).create(.Predres, "predres", "Enable v8.5a execution and data prediction invalidation instructions", "predres"),
-        FeatureInfo(@This()).create(.PredictableSelectExpensive, "predictable-select-expensive", "Prefer likely predicted branches over selects", "predictable-select-expensive"),
-        FeatureInfo(@This()).create(.Uaops, "uaops", "Enable v8.2 UAO PState", "uaops"),
-        FeatureInfo(@This()).create(.Ras, "ras", "Enable ARMv8 Reliability, Availability and Serviceability Extensions", "ras"),
-        FeatureInfo(@This()).createWithSubfeatures(.Rasv8_4, "rasv8_4", "Enable v8.4-A Reliability, Availability and Serviceability extension", "rasv8_4", &[_]@This() {
-            .Ras,
-        }),
-        FeatureInfo(@This()).create(.Rcpc, "rcpc", "Enable support for RCPC extension", "rcpc"),
-        FeatureInfo(@This()).createWithSubfeatures(.RcpcImmo, "rcpc-immo", "Enable v8.4-A RCPC instructions with Immediate Offsets", "rcpc-immo", &[_]@This() {
-            .Rcpc,
-        }),
-        FeatureInfo(@This()).create(.Rdm, "rdm", "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", "rdm"),
-        FeatureInfo(@This()).create(.Rand, "rand", "Enable Random Number generation instructions", "rand"),
-        FeatureInfo(@This()).create(.ReserveX1, "reserve-x1", "Reserve X1, making it unavailable as a GPR", "reserve-x1"),
-        FeatureInfo(@This()).create(.ReserveX2, "reserve-x2", "Reserve X2, making it unavailable as a GPR", "reserve-x2"),
-        FeatureInfo(@This()).create(.ReserveX3, "reserve-x3", "Reserve X3, making it unavailable as a GPR", "reserve-x3"),
-        FeatureInfo(@This()).create(.ReserveX4, "reserve-x4", "Reserve X4, making it unavailable as a GPR", "reserve-x4"),
-        FeatureInfo(@This()).create(.ReserveX5, "reserve-x5", "Reserve X5, making it unavailable as a GPR", "reserve-x5"),
-        FeatureInfo(@This()).create(.ReserveX6, "reserve-x6", "Reserve X6, making it unavailable as a GPR", "reserve-x6"),
-        FeatureInfo(@This()).create(.ReserveX7, "reserve-x7", "Reserve X7, making it unavailable as a GPR", "reserve-x7"),
-        FeatureInfo(@This()).create(.ReserveX9, "reserve-x9", "Reserve X9, making it unavailable as a GPR", "reserve-x9"),
-        FeatureInfo(@This()).create(.ReserveX10, "reserve-x10", "Reserve X10, making it unavailable as a GPR", "reserve-x10"),
-        FeatureInfo(@This()).create(.ReserveX11, "reserve-x11", "Reserve X11, making it unavailable as a GPR", "reserve-x11"),
-        FeatureInfo(@This()).create(.ReserveX12, "reserve-x12", "Reserve X12, making it unavailable as a GPR", "reserve-x12"),
-        FeatureInfo(@This()).create(.ReserveX13, "reserve-x13", "Reserve X13, making it unavailable as a GPR", "reserve-x13"),
-        FeatureInfo(@This()).create(.ReserveX14, "reserve-x14", "Reserve X14, making it unavailable as a GPR", "reserve-x14"),
-        FeatureInfo(@This()).create(.ReserveX15, "reserve-x15", "Reserve X15, making it unavailable as a GPR", "reserve-x15"),
-        FeatureInfo(@This()).create(.ReserveX18, "reserve-x18", "Reserve X18, making it unavailable as a GPR", "reserve-x18"),
-        FeatureInfo(@This()).create(.ReserveX20, "reserve-x20", "Reserve X20, making it unavailable as a GPR", "reserve-x20"),
-        FeatureInfo(@This()).create(.ReserveX21, "reserve-x21", "Reserve X21, making it unavailable as a GPR", "reserve-x21"),
-        FeatureInfo(@This()).create(.ReserveX22, "reserve-x22", "Reserve X22, making it unavailable as a GPR", "reserve-x22"),
-        FeatureInfo(@This()).create(.ReserveX23, "reserve-x23", "Reserve X23, making it unavailable as a GPR", "reserve-x23"),
-        FeatureInfo(@This()).create(.ReserveX24, "reserve-x24", "Reserve X24, making it unavailable as a GPR", "reserve-x24"),
-        FeatureInfo(@This()).create(.ReserveX25, "reserve-x25", "Reserve X25, making it unavailable as a GPR", "reserve-x25"),
-        FeatureInfo(@This()).create(.ReserveX26, "reserve-x26", "Reserve X26, making it unavailable as a GPR", "reserve-x26"),
-        FeatureInfo(@This()).create(.ReserveX27, "reserve-x27", "Reserve X27, making it unavailable as a GPR", "reserve-x27"),
-        FeatureInfo(@This()).create(.ReserveX28, "reserve-x28", "Reserve X28, making it unavailable as a GPR", "reserve-x28"),
-        FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5 Speculation Barrier", "sb"),
-        FeatureInfo(@This()).create(.Sel2, "sel2", "Enable v8.4-A Secure Exception Level 2 extension", "sel2"),
-        FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sha3, "sha3", "Enable SHA512 and SHA3 support", "sha3", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sm4, "sm4", "Enable SM3 and SM4 support", "sm4", &[_]@This() {
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).create(.Spe, "spe", "Enable Statistical Profiling extension", "spe"),
-        FeatureInfo(@This()).create(.Ssbs, "ssbs", "Enable Speculative Store Bypass Safe bit", "ssbs"),
-        FeatureInfo(@This()).create(.Sve, "sve", "Enable Scalable Vector Extension (SVE) instructions", "sve"),
-        FeatureInfo(@This()).createWithSubfeatures(.Sve2, "sve2", "Enable Scalable Vector Extension 2 (SVE2) instructions", "sve2", &[_]@This() {
-            .Sve,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() {
-            .FpArmv8,
-            .Sve,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() {
-            .Sve,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() {
-            .FpArmv8,
-            .Sve,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() {
-            .FpArmv8,
-            .Sve,
-        }),
-        FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"),
-        FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"),
-        FeatureInfo(@This()).create(.SlowStrqroStore, "slow-strqro-store", "STR of Q register with register offset is slow", "slow-strqro-store"),
-        FeatureInfo(@This()).create(.Specrestrict, "specrestrict", "Enable architectural speculation restriction", "specrestrict"),
-        FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
-        FeatureInfo(@This()).create(.TlbRmi, "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", "tlb-rmi"),
-        FeatureInfo(@This()).create(.Tme, "tme", "Enable Transactional Memory Extension", "tme"),
-        FeatureInfo(@This()).create(.Tracev84, "tracev8.4", "Enable v8.4-A Trace extension", "tracev8.4"),
-        FeatureInfo(@This()).create(.Trbe, "trbe", "Enable Trace Buffer Extension", "trbe"),
-        FeatureInfo(@This()).create(.TaggedGlobals, "tagged-globals", "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", "tagged-globals"),
-        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
-        FeatureInfo(@This()).create(.TpidrEl1, "tpidr-el1", "Permit use of TPIDR_EL1 for the TLS base", "tpidr-el1"),
-        FeatureInfo(@This()).create(.TpidrEl2, "tpidr-el2", "Permit use of TPIDR_EL2 for the TLS base", "tpidr-el2"),
-        FeatureInfo(@This()).create(.TpidrEl3, "tpidr-el3", "Permit use of TPIDR_EL3 for the TLS base", "tpidr-el3"),
-        FeatureInfo(@This()).create(.UseReciprocalSquareRoot, "use-reciprocal-square-root", "Use the reciprocal square root approximation", "use-reciprocal-square-root"),
-        FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"),
-        FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"),
-        FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() {
-            .ZczGp,
-            .ZczFp,
-        }),
-        FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"),
-        FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"),
-        FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"),
-        FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
-            .Lse,
-            .Rdm,
-            .Crc,
-            .Lor,
-            .Pan,
-            .Vh,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
-            .Lse,
-            .Rdm,
-            .Pan,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Ccpp,
-            .Vh,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Pa,
-            .Rdm,
-            .Pan,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .Ccidx,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
-            .Rdm,
-            .Dit,
-            .Am,
-            .Ras,
-            .Rcpc,
-            .Sel2,
-            .Ccpp,
-            .Pa,
-            .Pan,
-            .Uaops,
-            .Tracev84,
-            .Mpam,
-            .Lse,
-            .Nv,
-            .Dotprod,
-            .TlbRmi,
-            .Lor,
-            .Ccidx,
-            .FpArmv8,
-            .Crc,
-            .Fmi,
-            .Vh,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
-            .Vh,
-            .Rdm,
-            .Dit,
-            .Am,
-            .Ssbs,
-            .Specrestrict,
-            .Ras,
-            .Rcpc,
-            .Sel2,
-            .Ccpp,
-            .Pa,
-            .Bti,
-            .Ccdp,
-            .Pan,
-            .Uaops,
-            .Tracev84,
-            .Mpam,
-            .Lse,
-            .Sb,
-            .Nv,
-            .Altnzcv,
-            .Dotprod,
-            .TlbRmi,
-            .Lor,
-            .Ccidx,
-            .Predres,
-            .Crc,
-            .Fptoint,
-            .Fmi,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .CustomCheapAsMove,
-            .BalanceFpOps,
-            .UseAa,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .BalanceFpOps,
-            .FuseLiterals,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() {
-            .Perfmon,
-            .FpArmv8,
-            .Crc,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() {
-            .ArithBccFusion,
-            .ArithCbzFusion,
-            .ZczFp,
-            .AlternateSextloadCvtF32Pattern,
-            .DisableLatencySchedHeuristic,
-            .Perfmon,
-            .ZczGp,
-            .ZczFpWorkaround,
-            .Zcm,
-            .FpArmv8,
-            .FuseCryptoEor,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .UseReciprocalSquareRoot,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .SlowMisaligned128store,
-            .FpArmv8,
-            .SlowPaired128,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .SlowMisaligned128store,
-            .FpArmv8,
-            .SlowPaired128,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() {
-            .FuseCsel,
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .Force32bitJumpTables,
-            .FuseLiterals,
-            .FuseAddress,
-            .LslFast,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() {
-            .ArithBccFusion,
-            .Vh,
-            .ArithCbzFusion,
-            .ZczFp,
-            .Rdm,
-            .UsePostraScheduler,
-            .Ras,
-            .Force32bitJumpTables,
-            .Ccpp,
-            .FuseCsel,
-            .Pan,
-            .Uaops,
-            .FuseLiterals,
-            .LslFast,
-            .Lse,
-            .Perfmon,
-            .Dotprod,
-            .Lor,
-            .FuseArithLogic,
-            .Crc,
-            .CustomCheapAsMove,
-            .FuseAddress,
-            .ZczGp,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() {
-            .ZczFp,
-            .Rdm,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .ZczGp,
-            .FpArmv8,
-            .SlowStrqroStore,
-            .LslFast,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() {
-            .ZczFp,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .PredictableSelectExpensive,
-            .CustomCheapAsMove,
-            .ZczGp,
-            .FpArmv8,
-            .LslFast,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() {
-            .Lse,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
-            .Lse,
-            .Spe,
-            .Vh,
-            .Rdm,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Ssbs,
-            .Lor,
-            .Uaops,
-            .Ras,
-            .Rcpc,
-            .Ccpp,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() {
-            .Spe,
-            .Vh,
-            .ZczFp,
-            .Rdm,
-            .UsePostraScheduler,
-            .Dit,
-            .Am,
-            .Ras,
-            .Rcpc,
-            .Sel2,
-            .Ccpp,
-            .Pa,
-            .Pan,
-            .Uaops,
-            .Tracev84,
-            .Mpam,
-            .LslFast,
-            .Lse,
-            .Nv,
-            .Perfmon,
-            .Dotprod,
-            .TlbRmi,
-            .Lor,
-            .Ccidx,
-            .PredictableSelectExpensive,
-            .Crc,
-            .CustomCheapAsMove,
-            .Fmi,
-            .ZczGp,
-            .FpArmv8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() {
-            .Lse,
-            .Spe,
-            .Vh,
-            .Rdm,
-            .Perfmon,
-            .UsePostraScheduler,
-            .Pan,
-            .Dotprod,
-            .Crc,
-            .Lor,
-            .Uaops,
-            .CustomCheapAsMove,
-            .Ras,
-            .Ccpp,
-            .FpArmv8,
-            .FuseAes,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() {
-            .Lse,
-            .ArithBccFusion,
-            .Vh,
-            .Rdm,
-            .UsePostraScheduler,
-            .Crc,
-            .Lor,
-            .Pan,
-            .AggressiveFma,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() {
-            .Perfmon,
-            .UsePostraScheduler,
-            .Crc,
-            .FpArmv8,
-            .PredictableSelectExpensive,
-        }),
-    };
-};
diff --git a/lib/std/target/feature/AmdGpuFeature.zig b/lib/std/target/feature/AmdGpuFeature.zig
deleted file mode 100644
index f7b9cb9da7e8e0d72c069b86cd88d7f2c2e474d5..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/AmdGpuFeature.zig
+++ /dev/null
@@ -1,343 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const AmdGpuFeature = enum {
-    BitInsts16,
-    AddNoCarryInsts,
-    ApertureRegs,
-    AtomicFaddInsts,
-    AutoWaitcntBeforeBarrier,
-    CiInsts,
-    CodeObjectV3,
-    Cumode,
-    DlInsts,
-    Dpp,
-    Dpp8,
-    NoSramEccSupport,
-    NoXnackSupport,
-    Dot1Insts,
-    Dot2Insts,
-    Dot3Insts,
-    Dot4Insts,
-    Dot5Insts,
-    Dot6Insts,
-    DumpCode,
-    Dumpcode,
-    EnableDs128,
-    LoadStoreOpt,
-    EnablePrtStrictNull,
-    SiScheduler,
-    UnsafeDsOffsetFolding,
-    Fmaf,
-    Fp16Denormals,
-    Fp32Denormals,
-    Fp64,
-    Fp64Denormals,
-    Fp64Fp16Denormals,
-    FpExceptions,
-    FastFmaf,
-    FlatAddressSpace,
-    FlatForGlobal,
-    FlatGlobalInsts,
-    FlatInstOffsets,
-    FlatScratchInsts,
-    FlatSegmentOffsetBug,
-    FmaMixInsts,
-    Gcn3Encoding,
-    Gfx7Gfx8Gfx9Insts,
-    Gfx8Insts,
-    Gfx9,
-    Gfx9Insts,
-    Gfx10,
-    Gfx10Insts,
-    InstFwdPrefetchBug,
-    IntClampInsts,
-    Inv2piInlineImm,
-    Ldsbankcount16,
-    Ldsbankcount32,
-    LdsBranchVmemWarHazard,
-    LdsMisalignedBug,
-    Localmemorysize0,
-    Localmemorysize32768,
-    Localmemorysize65536,
-    MaiInsts,
-    MfmaInlineLiteralBug,
-    MimgR128,
-    MadMixInsts,
-    MaxPrivateElementSize4,
-    MaxPrivateElementSize8,
-    MaxPrivateElementSize16,
-    Movrel,
-    NsaEncoding,
-    NsaToVmemBug,
-    NoDataDepHazard,
-    NoSdstCmpx,
-    Offset3fBug,
-    PkFmacF16Inst,
-    PromoteAlloca,
-    R128A16,
-    RegisterBanking,
-    Sdwa,
-    SdwaMav,
-    SdwaOmod,
-    SdwaOutModsVopc,
-    SdwaScalar,
-    SdwaSdst,
-    SgprInitBug,
-    SmemToVectorWriteHazard,
-    SMemrealtime,
-    SramEcc,
-    ScalarAtomics,
-    ScalarFlatScratchInsts,
-    ScalarStores,
-    SeaIslands,
-    SouthernIslands,
-    TrapHandler,
-    TrigReducedRange,
-    UnalignedBufferAccess,
-    UnalignedScratchAccess,
-    UnpackedD16Vmem,
-    VgprIndexMode,
-    VmemToScalarWriteHazard,
-    Vop3Literal,
-    Vop3p,
-    VcmpxExecWarHazard,
-    VcmpxPermlaneHazard,
-    VolcanicIslands,
-    Vscnt,
-    Wavefrontsize16,
-    Wavefrontsize32,
-    Wavefrontsize64,
-    Xnack,
-    HalfRate64Ops,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.BitInsts16, "16-bit-insts", "Has i16/f16 instructions", "16-bit-insts"),
-        FeatureInfo(@This()).create(.AddNoCarryInsts, "add-no-carry-insts", "Have VALU add/sub instructions without carry out", "add-no-carry-insts"),
-        FeatureInfo(@This()).create(.ApertureRegs, "aperture-regs", "Has Memory Aperture Base and Size Registers", "aperture-regs"),
-        FeatureInfo(@This()).create(.AtomicFaddInsts, "atomic-fadd-insts", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", "atomic-fadd-insts"),
-        FeatureInfo(@This()).create(.AutoWaitcntBeforeBarrier, "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", "auto-waitcnt-before-barrier"),
-        FeatureInfo(@This()).create(.CiInsts, "ci-insts", "Additional instructions for CI+", "ci-insts"),
-        FeatureInfo(@This()).create(.CodeObjectV3, "code-object-v3", "Generate code object version 3", "code-object-v3"),
-        FeatureInfo(@This()).create(.Cumode, "cumode", "Enable CU wavefront execution mode", "cumode"),
-        FeatureInfo(@This()).create(.DlInsts, "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", "dl-insts"),
-        FeatureInfo(@This()).create(.Dpp, "dpp", "Support DPP (Data Parallel Primitives) extension", "dpp"),
-        FeatureInfo(@This()).create(.Dpp8, "dpp8", "Support DPP8 (Data Parallel Primitives) extension", "dpp8"),
-        FeatureInfo(@This()).create(.NoSramEccSupport, "no-sram-ecc-support", "Hardware does not support SRAM ECC", "no-sram-ecc-support"),
-        FeatureInfo(@This()).create(.NoXnackSupport, "no-xnack-support", "Hardware does not support XNACK", "no-xnack-support"),
-        FeatureInfo(@This()).create(.Dot1Insts, "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", "dot1-insts"),
-        FeatureInfo(@This()).create(.Dot2Insts, "dot2-insts", "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", "dot2-insts"),
-        FeatureInfo(@This()).create(.Dot3Insts, "dot3-insts", "Has v_dot8c_i32_i4 instruction", "dot3-insts"),
-        FeatureInfo(@This()).create(.Dot4Insts, "dot4-insts", "Has v_dot2c_i32_i16 instruction", "dot4-insts"),
-        FeatureInfo(@This()).create(.Dot5Insts, "dot5-insts", "Has v_dot2c_f32_f16 instruction", "dot5-insts"),
-        FeatureInfo(@This()).create(.Dot6Insts, "dot6-insts", "Has v_dot4c_i32_i8 instruction", "dot6-insts"),
-        FeatureInfo(@This()).create(.DumpCode, "DumpCode", "Dump MachineInstrs in the CodeEmitter", "DumpCode"),
-        FeatureInfo(@This()).create(.Dumpcode, "dumpcode", "Dump MachineInstrs in the CodeEmitter", "dumpcode"),
-        FeatureInfo(@This()).create(.EnableDs128, "enable-ds128", "Use ds_{read|write}_b128", "enable-ds128"),
-        FeatureInfo(@This()).create(.LoadStoreOpt, "load-store-opt", "Enable SI load/store optimizer pass", "load-store-opt"),
-        FeatureInfo(@This()).create(.EnablePrtStrictNull, "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", "enable-prt-strict-null"),
-        FeatureInfo(@This()).create(.SiScheduler, "si-scheduler", "Enable SI Machine Scheduler", "si-scheduler"),
-        FeatureInfo(@This()).create(.UnsafeDsOffsetFolding, "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", "unsafe-ds-offset-folding"),
-        FeatureInfo(@This()).create(.Fmaf, "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", "fmaf"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp16Denormals, "fp16-denormals", "Enable half precision denormal handling", "fp16-denormals", &[_]@This() {
-            .Fp64,
-        }),
-        FeatureInfo(@This()).create(.Fp32Denormals, "fp32-denormals", "Enable single precision denormal handling", "fp32-denormals"),
-        FeatureInfo(@This()).create(.Fp64, "fp64", "Enable double precision operations", "fp64"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp64Denormals, "fp64-denormals", "Enable double and half precision denormal handling", "fp64-denormals", &[_]@This() {
-            .Fp64,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp64Fp16Denormals, "fp64-fp16-denormals", "Enable double and half precision denormal handling", "fp64-fp16-denormals", &[_]@This() {
-            .Fp64,
-        }),
-        FeatureInfo(@This()).create(.FpExceptions, "fp-exceptions", "Enable floating point exceptions", "fp-exceptions"),
-        FeatureInfo(@This()).create(.FastFmaf, "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", "fast-fmaf"),
-        FeatureInfo(@This()).create(.FlatAddressSpace, "flat-address-space", "Support flat address space", "flat-address-space"),
-        FeatureInfo(@This()).create(.FlatForGlobal, "flat-for-global", "Force to generate flat instruction for global", "flat-for-global"),
-        FeatureInfo(@This()).create(.FlatGlobalInsts, "flat-global-insts", "Have global_* flat memory instructions", "flat-global-insts"),
-        FeatureInfo(@This()).create(.FlatInstOffsets, "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", "flat-inst-offsets"),
-        FeatureInfo(@This()).create(.FlatScratchInsts, "flat-scratch-insts", "Have scratch_* flat memory instructions", "flat-scratch-insts"),
-        FeatureInfo(@This()).create(.FlatSegmentOffsetBug, "flat-segment-offset-bug", "GFX10 bug, inst_offset ignored in flat segment", "flat-segment-offset-bug"),
-        FeatureInfo(@This()).create(.FmaMixInsts, "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", "fma-mix-insts"),
-        FeatureInfo(@This()).create(.Gcn3Encoding, "gcn3-encoding", "Encoding format for VI", "gcn3-encoding"),
-        FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"),
-        FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"),
-        FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() {
-            .ApertureRegs,
-            .IntClampInsts,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .ScalarAtomics,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .R128A16,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .ScalarFlatScratchInsts,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-        }),
-        FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
-        FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
-            .Vscnt,
-            .ApertureRegs,
-            .Gfx10Insts,
-            .IntClampInsts,
-            .PkFmacF16Inst,
-            .SdwaOmod,
-            .SdwaScalar,
-            .AddNoCarryInsts,
-            .Movrel,
-            .SMemrealtime,
-            .NoSdstCmpx,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .NoSramEccSupport,
-            .SdwaSdst,
-            .FlatInstOffsets,
-            .RegisterBanking,
-            .Dpp,
-            .Localmemorysize65536,
-            .Vop3p,
-            .BitInsts16,
-            .Dpp8,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .Gfx9Insts,
-            .FmaMixInsts,
-            .MimgR128,
-            .Vop3Literal,
-            .FlatGlobalInsts,
-            .FlatScratchInsts,
-            .Fp64,
-            .FastFmaf,
-            .NoDataDepHazard,
-        }),
-        FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"),
-        FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"),
-        FeatureInfo(@This()).create(.IntClampInsts, "int-clamp-insts", "Support clamp for integer destination", "int-clamp-insts"),
-        FeatureInfo(@This()).create(.Inv2piInlineImm, "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", "inv-2pi-inline-imm"),
-        FeatureInfo(@This()).create(.Ldsbankcount16, "ldsbankcount16", "The number of LDS banks per compute unit.", "ldsbankcount16"),
-        FeatureInfo(@This()).create(.Ldsbankcount32, "ldsbankcount32", "The number of LDS banks per compute unit.", "ldsbankcount32"),
-        FeatureInfo(@This()).create(.LdsBranchVmemWarHazard, "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", "lds-branch-vmem-war-hazard"),
-        FeatureInfo(@This()).create(.LdsMisalignedBug, "lds-misaligned-bug", "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", "lds-misaligned-bug"),
-        FeatureInfo(@This()).create(.Localmemorysize0, "localmemorysize0", "The size of local memory in bytes", "localmemorysize0"),
-        FeatureInfo(@This()).create(.Localmemorysize32768, "localmemorysize32768", "The size of local memory in bytes", "localmemorysize32768"),
-        FeatureInfo(@This()).create(.Localmemorysize65536, "localmemorysize65536", "The size of local memory in bytes", "localmemorysize65536"),
-        FeatureInfo(@This()).create(.MaiInsts, "mai-insts", "Has mAI instructions", "mai-insts"),
-        FeatureInfo(@This()).create(.MfmaInlineLiteralBug, "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", "mfma-inline-literal-bug"),
-        FeatureInfo(@This()).create(.MimgR128, "mimg-r128", "Support 128-bit texture resources", "mimg-r128"),
-        FeatureInfo(@This()).create(.MadMixInsts, "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", "mad-mix-insts"),
-        FeatureInfo(@This()).create(.MaxPrivateElementSize4, "max-private-element-size-4", "Maximum private access size may be 4", "max-private-element-size-4"),
-        FeatureInfo(@This()).create(.MaxPrivateElementSize8, "max-private-element-size-8", "Maximum private access size may be 8", "max-private-element-size-8"),
-        FeatureInfo(@This()).create(.MaxPrivateElementSize16, "max-private-element-size-16", "Maximum private access size may be 16", "max-private-element-size-16"),
-        FeatureInfo(@This()).create(.Movrel, "movrel", "Has v_movrel*_b32 instructions", "movrel"),
-        FeatureInfo(@This()).create(.NsaEncoding, "nsa-encoding", "Support NSA encoding for image instructions", "nsa-encoding"),
-        FeatureInfo(@This()).create(.NsaToVmemBug, "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", "nsa-to-vmem-bug"),
-        FeatureInfo(@This()).create(.NoDataDepHazard, "no-data-dep-hazard", "Does not need SW waitstates", "no-data-dep-hazard"),
-        FeatureInfo(@This()).create(.NoSdstCmpx, "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", "no-sdst-cmpx"),
-        FeatureInfo(@This()).create(.Offset3fBug, "offset-3f-bug", "Branch offset of 3f hardware bug", "offset-3f-bug"),
-        FeatureInfo(@This()).create(.PkFmacF16Inst, "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", "pk-fmac-f16-inst"),
-        FeatureInfo(@This()).create(.PromoteAlloca, "promote-alloca", "Enable promote alloca pass", "promote-alloca"),
-        FeatureInfo(@This()).create(.R128A16, "r128-a16", "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", "r128-a16"),
-        FeatureInfo(@This()).create(.RegisterBanking, "register-banking", "Has register banking", "register-banking"),
-        FeatureInfo(@This()).create(.Sdwa, "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", "sdwa"),
-        FeatureInfo(@This()).create(.SdwaMav, "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", "sdwa-mav"),
-        FeatureInfo(@This()).create(.SdwaOmod, "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", "sdwa-omod"),
-        FeatureInfo(@This()).create(.SdwaOutModsVopc, "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-out-mods-vopc"),
-        FeatureInfo(@This()).create(.SdwaScalar, "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", "sdwa-scalar"),
-        FeatureInfo(@This()).create(.SdwaSdst, "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-sdst"),
-        FeatureInfo(@This()).create(.SgprInitBug, "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", "sgpr-init-bug"),
-        FeatureInfo(@This()).create(.SmemToVectorWriteHazard, "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", "smem-to-vector-write-hazard"),
-        FeatureInfo(@This()).create(.SMemrealtime, "s-memrealtime", "Has s_memrealtime instruction", "s-memrealtime"),
-        FeatureInfo(@This()).create(.SramEcc, "sram-ecc", "Enable SRAM ECC", "sram-ecc"),
-        FeatureInfo(@This()).create(.ScalarAtomics, "scalar-atomics", "Has atomic scalar memory instructions", "scalar-atomics"),
-        FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"),
-        FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"),
-        FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() {
-            .Movrel,
-            .Gfx7Gfx8Gfx9Insts,
-            .Fp64,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Localmemorysize65536,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .MimgR128,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() {
-            .Movrel,
-            .MimgR128,
-            .Fp64,
-            .TrigReducedRange,
-            .NoXnackSupport,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .Ldsbankcount32,
-            .Localmemorysize32768,
-        }),
-        FeatureInfo(@This()).create(.TrapHandler, "trap-handler", "Trap handler support", "trap-handler"),
-        FeatureInfo(@This()).create(.TrigReducedRange, "trig-reduced-range", "Requires use of fract on arguments to trig instructions", "trig-reduced-range"),
-        FeatureInfo(@This()).create(.UnalignedBufferAccess, "unaligned-buffer-access", "Support unaligned global loads and stores", "unaligned-buffer-access"),
-        FeatureInfo(@This()).create(.UnalignedScratchAccess, "unaligned-scratch-access", "Support unaligned scratch loads and stores", "unaligned-scratch-access"),
-        FeatureInfo(@This()).create(.UnpackedD16Vmem, "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", "unpacked-d16-vmem"),
-        FeatureInfo(@This()).create(.VgprIndexMode, "vgpr-index-mode", "Has VGPR mode register indexing", "vgpr-index-mode"),
-        FeatureInfo(@This()).create(.VmemToScalarWriteHazard, "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", "vmem-to-scalar-write-hazard"),
-        FeatureInfo(@This()).create(.Vop3Literal, "vop3-literal", "Can use one literal in VOP3", "vop3-literal"),
-        FeatureInfo(@This()).create(.Vop3p, "vop3p", "Has VOP3P packed instructions", "vop3p"),
-        FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"),
-        FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"),
-        FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() {
-            .IntClampInsts,
-            .SdwaMav,
-            .Movrel,
-            .SMemrealtime,
-            .Gcn3Encoding,
-            .TrigReducedRange,
-            .CiInsts,
-            .FlatAddressSpace,
-            .Sdwa,
-            .Wavefrontsize64,
-            .NoSramEccSupport,
-            .ScalarStores,
-            .Gfx7Gfx8Gfx9Insts,
-            .Dpp,
-            .Localmemorysize65536,
-            .BitInsts16,
-            .VgprIndexMode,
-            .Gfx8Insts,
-            .Inv2piInlineImm,
-            .MimgR128,
-            .SdwaOutModsVopc,
-            .Fp64,
-        }),
-        FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"),
-        FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"),
-        FeatureInfo(@This()).create(.Wavefrontsize32, "wavefrontsize32", "The number of threads per wavefront", "wavefrontsize32"),
-        FeatureInfo(@This()).create(.Wavefrontsize64, "wavefrontsize64", "The number of threads per wavefront", "wavefrontsize64"),
-        FeatureInfo(@This()).create(.Xnack, "xnack", "Enable XNACK support", "xnack"),
-        FeatureInfo(@This()).create(.HalfRate64Ops, "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", "half-rate-64-ops"),
-    };
-};
diff --git a/lib/std/target/feature/ArmFeature.zig b/lib/std/target/feature/ArmFeature.zig
deleted file mode 100644
index b7a951a63dbf12371a67f2a8da745a2787290844..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/ArmFeature.zig
+++ /dev/null
@@ -1,818 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const ArmFeature = enum {
-    Armv2,
-    Armv2a,
-    Armv3,
-    Armv3m,
-    Armv4,
-    Armv4t,
-    Armv5t,
-    Armv5te,
-    Armv5tej,
-    Armv6,
-    Armv6j,
-    Armv6k,
-    Armv6kz,
-    Armv6M,
-    Armv6sM,
-    Armv6t2,
-    Armv7A,
-    Armv7eM,
-    Armv7k,
-    Armv7M,
-    Armv7R,
-    Armv7s,
-    Armv7ve,
-    Armv8A,
-    Armv8Mbase,
-    Armv8Mmain,
-    Armv8R,
-    Armv81A,
-    Armv81Mmain,
-    Armv82A,
-    Armv83A,
-    Armv84A,
-    Armv85A,
-    Msecext8,
-    Aclass,
-    Aes,
-    AcquireRelease,
-    AvoidMovsShop,
-    AvoidPartialCpsr,
-    Crc,
-    CheapPredicableCpsr,
-    VldnAlign,
-    Crypto,
-    D32,
-    Db,
-    Dfb,
-    Dsp,
-    DontWidenVmovs,
-    Dotprod,
-    ExecuteOnly,
-    ExpandFpMlx,
-    Fp16,
-    Fp16fml,
-    Fp64,
-    Fpao,
-    FpArmv8,
-    FpArmv8d16,
-    FpArmv8d16sp,
-    FpArmv8sp,
-    Fpregs,
-    Fpregs16,
-    Fpregs64,
-    Fullfp16,
-    FuseAes,
-    FuseLiterals,
-    HwdivArm,
-    Hwdiv,
-    NoBranchPredictor,
-    RetAddrStack,
-    Slowfpvmlx,
-    VmlxHazards,
-    Lob,
-    LongCalls,
-    Mclass,
-    Mp,
-    Mve1beat,
-    Mve2beat,
-    Mve4beat,
-    MuxedUnits,
-    Neon,
-    Neonfp,
-    NeonFpmovs,
-    NaclTrap,
-    Noarm,
-    NoMovt,
-    NoNegImmediates,
-    DisablePostraScheduler,
-    NonpipelinedVfp,
-    Perfmon,
-    Bit32,
-    PreferIshst,
-    LoopAlign,
-    PreferVmovsr,
-    ProfUnpr,
-    Ras,
-    Rclass,
-    ReadTpHard,
-    ReserveR9,
-    Sb,
-    Sha2,
-    SlowFpBrcc,
-    SlowLoadDSubreg,
-    SlowOddReg,
-    SlowVdup32,
-    SlowVgetlni32,
-    SplatVfpNeon,
-    StrictAlign,
-    Thumb2,
-    Trustzone,
-    UseAa,
-    UseMisched,
-    WideStrideVfp,
-    V7clrex,
-    Vfp2,
-    Vfp2sp,
-    Vfp3,
-    Vfp3d16,
-    Vfp3d16sp,
-    Vfp3sp,
-    Vfp4,
-    Vfp4d16,
-    Vfp4d16sp,
-    Vfp4sp,
-    VmlxForwarding,
-    Virtualization,
-    Zcz,
-    Mvefp,
-    Mve,
-    V4t,
-    V5te,
-    V5t,
-    V6k,
-    V6m,
-    V6,
-    V6t2,
-    V7,
-    V8m,
-    V8mmain,
-    V8,
-    V81mmain,
-    V81a,
-    V82a,
-    V83a,
-    V84a,
-    V85a,
-    Iwmmxt,
-    Iwmmxt2,
-    SoftFloat,
-    ThumbMode,
-    A5,
-    A7,
-    A8,
-    A9,
-    A12,
-    A15,
-    A17,
-    A32,
-    A35,
-    A53,
-    A55,
-    A57,
-    A72,
-    A73,
-    A75,
-    A76,
-    Exynos,
-    Krait,
-    Kryo,
-    M3,
-    R4,
-    R5,
-    R7,
-    R52,
-    Swift,
-    Xscale,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"),
-        FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"),
-        FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"),
-        FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"),
-        FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() {
-            .V4t,
-            .Dsp,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() {
-            .V4t,
-            .Dsp,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() {
-            .V4t,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() {
-            .V4t,
-            .ThumbMode,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() {
-            .V4t,
-            .Thumb2,
-            .Dsp,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .Hwdiv,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Hwdiv,
-            .Rclass,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Mp,
-            .Fpregs,
-            .V4t,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-            .Db,
-            .Aclass,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() {
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Db,
-            .StrictAlign,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Crc,
-            .Fpregs,
-            .Mp,
-            .Dfb,
-            .Dsp,
-            .Fp16,
-            .V4t,
-            .Db,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Rclass,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .ThumbMode,
-            .Msecext8,
-            .V7clrex,
-            .Thumb2,
-            .Db,
-            .Ras,
-            .Mclass,
-            .Noarm,
-            .AcquireRelease,
-            .Hwdiv,
-            .Lob,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() {
-            .HwdivArm,
-            .Perfmon,
-            .D32,
-            .Fpregs,
-            .Crc,
-            .Mp,
-            .Fp16,
-            .Dsp,
-            .V4t,
-            .V7clrex,
-            .Db,
-            .Aclass,
-            .Thumb2,
-            .Ras,
-            .Sb,
-            .AcquireRelease,
-            .Hwdiv,
-            .Trustzone,
-        }),
-        FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"),
-        FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"),
-        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex  etc) instructions", "acquire-release"),
-        FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"),
-        FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"),
-        FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"),
-        FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"),
-        FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"),
-        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"),
-        FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"),
-        FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"),
-        FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"),
-        FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"),
-        FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"),
-        FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"),
-        FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"),
-        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() {
-            .D32,
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() {
-            .D32,
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
-        FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
-        FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"),
-        FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"),
-        FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"),
-        FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"),
-        FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"),
-        FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"),
-        FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"),
-        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"),
-        FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"),
-        FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"),
-        FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"),
-        FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"),
-        FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"),
-        FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"),
-        FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"),
-        FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"),
-        FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"),
-        FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"),
-        FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"),
-        FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
-        FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"),
-        FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"),
-        FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"),
-        FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"),
-        FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"),
-        FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"),
-        FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"),
-        FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"),
-        FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"),
-        FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"),
-        FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"),
-        FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"),
-        FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"),
-        FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"),
-        FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"),
-        FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"),
-        FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"),
-        FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"),
-        FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() {
-            .DontWidenVmovs,
-        }),
-        FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
-        FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"),
-        FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"),
-        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
-        FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"),
-        FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"),
-        FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() {
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() {
-            .D32,
-            .Fpregs,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() {
-            .D32,
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() {
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() {
-            .D32,
-            .Fpregs,
-            .Fp16,
-        }),
-        FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"),
-        FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() {
-            .HwdivArm,
-            .Hwdiv,
-        }),
-        FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"),
-        FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .Fpregs,
-            .V7clrex,
-            .Fp16,
-            .Dsp,
-            .Thumb2,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .Fpregs,
-            .V7clrex,
-            .Dsp,
-            .Thumb2,
-        }),
-        FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"),
-        FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() {
-            .V4t,
-            .Thumb2,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() {
-            .Perfmon,
-            .Thumb2,
-            .V4t,
-            .V7clrex,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() {
-            .Perfmon,
-            .Thumb2,
-            .V4t,
-            .V7clrex,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() {
-            .Perfmon,
-            .Thumb2,
-            .V4t,
-            .V7clrex,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
-            .Perfmon,
-            .V4t,
-            .D32,
-            .Fpregs,
-            .V7clrex,
-            .Thumb2,
-            .AcquireRelease,
-            .Sb,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() {
-            .V4t,
-        }),
-        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"),
-        FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"),
-        FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"),
-        FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"),
-        FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"),
-        FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"),
-        FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"),
-        FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"),
-        FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"),
-        FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"),
-        FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"),
-        FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"),
-        FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"),
-        FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"),
-        FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"),
-        FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"),
-        FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"),
-        FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"),
-        FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() {
-            .HwdivArm,
-            .D32,
-            .Crc,
-            .Fpregs,
-            .RetAddrStack,
-            .SlowVgetlni32,
-            .WideStrideVfp,
-            .SlowVdup32,
-            .SlowFpBrcc,
-            .ProfUnpr,
-            .DontWidenVmovs,
-            .Zcz,
-            .Hwdiv,
-            .FuseAes,
-            .Slowfpvmlx,
-            .UseAa,
-            .FuseLiterals,
-            .ExpandFpMlx,
-        }),
-        FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"),
-        FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"),
-        FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"),
-        FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"),
-        FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"),
-        FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"),
-        FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"),
-        FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"),
-        FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() {
-            .V4t,
-        }),
-    };
-};
diff --git a/lib/std/target/feature/AvrFeature.zig b/lib/std/target/feature/AvrFeature.zig
deleted file mode 100644
index 1749c6c15cac15a8b04097ea2970df27d2fe7056..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/AvrFeature.zig
+++ /dev/null
@@ -1,230 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const AvrFeature = enum {
-    Avr0,
-    Avr1,
-    Avr2,
-    Avr3,
-    Avr4,
-    Avr5,
-    Avr6,
-    Avr25,
-    Avr31,
-    Avr35,
-    Avr51,
-    Avrtiny,
-    Xmega,
-    Xmegau,
-    Addsubiw,
-    Break,
-    Des,
-    Eijmpcall,
-    Elpm,
-    Elpmx,
-    Ijmpcall,
-    Jmpcall,
-    Lpm,
-    Lpmx,
-    Movw,
-    Mul,
-    Rmw,
-    Spm,
-    Spmx,
-    Sram,
-    Special,
-    Smallstack,
-    Tinyencoding,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() {
-            .Avr0,
-            .Lpm,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Ijmpcall,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() {
-            .Lpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Ijmpcall,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() {
-            .Lpm,
-            .Movw,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() {
-            .Avr0,
-            .Sram,
-            .Break,
-            .Tinyencoding,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Des,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Movw,
-            .Elpmx,
-            .Spm,
-            .Avr0,
-            .Sram,
-            .Jmpcall,
-            .Eijmpcall,
-            .Spmx,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"),
-        FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"),
-        FeatureInfo(@This()).create(.Des, "des", "The device supports the `DES k` encryption instruction", "des"),
-        FeatureInfo(@This()).create(.Eijmpcall, "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", "eijmpcall"),
-        FeatureInfo(@This()).create(.Elpm, "elpm", "The device supports the ELPM instruction", "elpm"),
-        FeatureInfo(@This()).create(.Elpmx, "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", "elpmx"),
-        FeatureInfo(@This()).create(.Ijmpcall, "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", "ijmpcall"),
-        FeatureInfo(@This()).create(.Jmpcall, "jmpcall", "The device supports the `JMP` and `CALL` instructions", "jmpcall"),
-        FeatureInfo(@This()).create(.Lpm, "lpm", "The device supports the `LPM` instruction", "lpm"),
-        FeatureInfo(@This()).create(.Lpmx, "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", "lpmx"),
-        FeatureInfo(@This()).create(.Movw, "movw", "The device supports the 16-bit MOVW instruction", "movw"),
-        FeatureInfo(@This()).create(.Mul, "mul", "The device supports the multiplication instructions", "mul"),
-        FeatureInfo(@This()).create(.Rmw, "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", "rmw"),
-        FeatureInfo(@This()).create(.Spm, "spm", "The device supports the `SPM` instruction", "spm"),
-        FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"),
-        FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"),
-        FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() {
-            .Lpm,
-            .Elpm,
-            .Elpmx,
-            .Movw,
-            .Spm,
-            .Eijmpcall,
-            .Spmx,
-            .Jmpcall,
-            .Sram,
-            .Addsubiw,
-            .Mul,
-            .Lpmx,
-            .Rmw,
-            .Des,
-            .Ijmpcall,
-            .Break,
-        }),
-        FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"),
-        FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"),
-    };
-};
diff --git a/lib/std/target/feature/BpfFeature.zig b/lib/std/target/feature/BpfFeature.zig
deleted file mode 100644
index b13da4615362ccedeea99e6c38265d843f920c23..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/BpfFeature.zig
+++ /dev/null
@@ -1,17 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const BpfFeature = enum {
-    Alu32,
-    Dummy,
-    Dwarfris,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Alu32, "alu32", "Enable ALU32 instructions", "alu32"),
-        FeatureInfo(@This()).create(.Dummy, "dummy", "unused feature", "dummy"),
-        FeatureInfo(@This()).create(.Dwarfris, "dwarfris", "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", "dwarfris"),
-    };
-};
diff --git a/lib/std/target/feature/HexagonFeature.zig b/lib/std/target/feature/HexagonFeature.zig
deleted file mode 100644
index 4b074f1694c04e0ec9c9abf32ca98a8f0041a02a..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/HexagonFeature.zig
+++ /dev/null
@@ -1,76 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const HexagonFeature = enum {
-    V5,
-    V55,
-    V60,
-    V62,
-    V65,
-    V66,
-    Hvx,
-    HvxLength64b,
-    HvxLength128b,
-    Hvxv60,
-    Hvxv62,
-    Hvxv65,
-    Hvxv66,
-    Zreg,
-    Duplex,
-    LongCalls,
-    Mem_noshuf,
-    Memops,
-    Nvj,
-    Nvs,
-    NoreturnStackElim,
-    Packets,
-    ReservedR19,
-    SmallData,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.V5, "v5", "Enable Hexagon V5 architecture", "v5"),
-        FeatureInfo(@This()).create(.V55, "v55", "Enable Hexagon V55 architecture", "v55"),
-        FeatureInfo(@This()).create(.V60, "v60", "Enable Hexagon V60 architecture", "v60"),
-        FeatureInfo(@This()).create(.V62, "v62", "Enable Hexagon V62 architecture", "v62"),
-        FeatureInfo(@This()).create(.V65, "v65", "Enable Hexagon V65 architecture", "v65"),
-        FeatureInfo(@This()).create(.V66, "v66", "Enable Hexagon V66 architecture", "v66"),
-        FeatureInfo(@This()).create(.Hvx, "hvx", "Hexagon HVX instructions", "hvx"),
-        FeatureInfo(@This()).createWithSubfeatures(.HvxLength64b, "hvx-length64b", "Hexagon HVX 64B instructions", "hvx-length64b", &[_]@This() {
-            .Hvx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.HvxLength128b, "hvx-length128b", "Hexagon HVX 128B instructions", "hvx-length128b", &[_]@This() {
-            .Hvx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Hvxv60, "hvxv60", "Hexagon HVX instructions", "hvxv60", &[_]@This() {
-            .Hvx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Hvxv62, "hvxv62", "Hexagon HVX instructions", "hvxv62", &[_]@This() {
-            .Hvx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Hvxv65, "hvxv65", "Hexagon HVX instructions", "hvxv65", &[_]@This() {
-            .Hvx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Hvxv66, "hvxv66", "Hexagon HVX instructions", "hvxv66", &[_]@This() {
-            .Hvx,
-            .Zreg,
-        }),
-        FeatureInfo(@This()).create(.Zreg, "zreg", "Hexagon ZReg extension instructions", "zreg"),
-        FeatureInfo(@This()).create(.Duplex, "duplex", "Enable generation of duplex instruction", "duplex"),
-        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Use constant-extended calls", "long-calls"),
-        FeatureInfo(@This()).create(.Mem_noshuf, "mem_noshuf", "Supports mem_noshuf feature", "mem_noshuf"),
-        FeatureInfo(@This()).create(.Memops, "memops", "Use memop instructions", "memops"),
-        FeatureInfo(@This()).createWithSubfeatures(.Nvj, "nvj", "Support for new-value jumps", "nvj", &[_]@This() {
-            .Packets,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Nvs, "nvs", "Support for new-value stores", "nvs", &[_]@This() {
-            .Packets,
-        }),
-        FeatureInfo(@This()).create(.NoreturnStackElim, "noreturn-stack-elim", "Eliminate stack allocation in a noreturn function when possible", "noreturn-stack-elim"),
-        FeatureInfo(@This()).create(.Packets, "packets", "Support for instruction packets", "packets"),
-        FeatureInfo(@This()).create(.ReservedR19, "reserved-r19", "Reserve register R19", "reserved-r19"),
-        FeatureInfo(@This()).create(.SmallData, "small-data", "Allow GP-relative addressing of global variables", "small-data"),
-    };
-};
diff --git a/lib/std/target/feature/MipsFeature.zig b/lib/std/target/feature/MipsFeature.zig
deleted file mode 100644
index 2caaaa0dd048ee42d6ecc80721be7737c3c92638..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/MipsFeature.zig
+++ /dev/null
@@ -1,238 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const MipsFeature = enum {
-    Abs2008,
-    Crc,
-    Cnmips,
-    Dsp,
-    Dspr2,
-    Dspr3,
-    Eva,
-    Fp64,
-    Fpxx,
-    Ginv,
-    Gp64,
-    LongCalls,
-    Msa,
-    Mt,
-    Nomadd4,
-    Micromips,
-    Mips1,
-    Mips2,
-    Mips3,
-    Mips3_32,
-    Mips3_32r2,
-    Mips4,
-    Mips4_32,
-    Mips4_32r2,
-    Mips5,
-    Mips5_32r2,
-    Mips16,
-    Mips32,
-    Mips32r2,
-    Mips32r3,
-    Mips32r5,
-    Mips32r6,
-    Mips64,
-    Mips64r2,
-    Mips64r3,
-    Mips64r5,
-    Mips64r6,
-    Nan2008,
-    Noabicalls,
-    Nooddspreg,
-    Ptr64,
-    SingleFloat,
-    SoftFloat,
-    Sym32,
-    UseIndirectJumpHazard,
-    UseTccInDiv,
-    Vfpu,
-    Virt,
-    Xgot,
-    P5600,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
-        FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
-        FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
-        FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
-            .Dsp,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() {
-            .Dsp,
-        }),
-        FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"),
-        FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"),
-        FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"),
-        FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"),
-        FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"),
-        FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"),
-        FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"),
-        FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"),
-        FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"),
-        FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"),
-        FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() {
-            .Mips1,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
-            .Mips3_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
-        FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
-        FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
-            .Mips5_32r2,
-            .Mips4_32r2,
-            .Mips3_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
-        FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
-            .Mips5_32r2,
-            .Mips4_32r2,
-            .Mips3_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Abs2008,
-            .Nan2008,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Gp64,
-            .Fp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Nan2008,
-            .Abs2008,
-            .Mips4_32r2,
-            .Fp64,
-            .Gp64,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-        FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
-        FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
-        FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"),
-        FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"),
-        FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"),
-        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"),
-        FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"),
-        FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"),
-        FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"),
-        FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"),
-        FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
-        FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
-        FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
-            .Mips5_32r2,
-            .Mips3_32r2,
-            .Mips4_32r2,
-            .Mips4_32,
-            .Mips1,
-            .Mips3_32,
-        }),
-    };
-};
diff --git a/lib/std/target/feature/Msp430Feature.zig b/lib/std/target/feature/Msp430Feature.zig
deleted file mode 100644
index 4213283af59f4f290372bc2183c85cd8b5015e07..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/Msp430Feature.zig
+++ /dev/null
@@ -1,19 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const Msp430Feature = enum {
-    Hwmult16,
-    Hwmult32,
-    Hwmultf5,
-    Ext,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Hwmult16, "hwmult16", "Enable 16-bit hardware multiplier", "hwmult16"),
-        FeatureInfo(@This()).create(.Hwmult32, "hwmult32", "Enable 32-bit hardware multiplier", "hwmult32"),
-        FeatureInfo(@This()).create(.Hwmultf5, "hwmultf5", "Enable F5 series hardware multiplier", "hwmultf5"),
-        FeatureInfo(@This()).create(.Ext, "ext", "Enable MSP430-X extensions", "ext"),
-    };
-};
diff --git a/lib/std/target/feature/NvptxFeature.zig b/lib/std/target/feature/NvptxFeature.zig
deleted file mode 100644
index a22dec066da3aab31f384a001006ac446deee677..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/NvptxFeature.zig
+++ /dev/null
@@ -1,61 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const NvptxFeature = enum {
-    Ptx32,
-    Ptx40,
-    Ptx41,
-    Ptx42,
-    Ptx43,
-    Ptx50,
-    Ptx60,
-    Ptx61,
-    Ptx63,
-    Ptx64,
-    Sm_20,
-    Sm_21,
-    Sm_30,
-    Sm_32,
-    Sm_35,
-    Sm_37,
-    Sm_50,
-    Sm_52,
-    Sm_53,
-    Sm_60,
-    Sm_61,
-    Sm_62,
-    Sm_70,
-    Sm_72,
-    Sm_75,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Ptx32, "ptx32", "Use PTX version 3.2", "ptx32"),
-        FeatureInfo(@This()).create(.Ptx40, "ptx40", "Use PTX version 4.0", "ptx40"),
-        FeatureInfo(@This()).create(.Ptx41, "ptx41", "Use PTX version 4.1", "ptx41"),
-        FeatureInfo(@This()).create(.Ptx42, "ptx42", "Use PTX version 4.2", "ptx42"),
-        FeatureInfo(@This()).create(.Ptx43, "ptx43", "Use PTX version 4.3", "ptx43"),
-        FeatureInfo(@This()).create(.Ptx50, "ptx50", "Use PTX version 5.0", "ptx50"),
-        FeatureInfo(@This()).create(.Ptx60, "ptx60", "Use PTX version 6.0", "ptx60"),
-        FeatureInfo(@This()).create(.Ptx61, "ptx61", "Use PTX version 6.1", "ptx61"),
-        FeatureInfo(@This()).create(.Ptx63, "ptx63", "Use PTX version 6.3", "ptx63"),
-        FeatureInfo(@This()).create(.Ptx64, "ptx64", "Use PTX version 6.4", "ptx64"),
-        FeatureInfo(@This()).create(.Sm_20, "sm_20", "Target SM 2.0", "sm_20"),
-        FeatureInfo(@This()).create(.Sm_21, "sm_21", "Target SM 2.1", "sm_21"),
-        FeatureInfo(@This()).create(.Sm_30, "sm_30", "Target SM 3.0", "sm_30"),
-        FeatureInfo(@This()).create(.Sm_32, "sm_32", "Target SM 3.2", "sm_32"),
-        FeatureInfo(@This()).create(.Sm_35, "sm_35", "Target SM 3.5", "sm_35"),
-        FeatureInfo(@This()).create(.Sm_37, "sm_37", "Target SM 3.7", "sm_37"),
-        FeatureInfo(@This()).create(.Sm_50, "sm_50", "Target SM 5.0", "sm_50"),
-        FeatureInfo(@This()).create(.Sm_52, "sm_52", "Target SM 5.2", "sm_52"),
-        FeatureInfo(@This()).create(.Sm_53, "sm_53", "Target SM 5.3", "sm_53"),
-        FeatureInfo(@This()).create(.Sm_60, "sm_60", "Target SM 6.0", "sm_60"),
-        FeatureInfo(@This()).create(.Sm_61, "sm_61", "Target SM 6.1", "sm_61"),
-        FeatureInfo(@This()).create(.Sm_62, "sm_62", "Target SM 6.2", "sm_62"),
-        FeatureInfo(@This()).create(.Sm_70, "sm_70", "Target SM 7.0", "sm_70"),
-        FeatureInfo(@This()).create(.Sm_72, "sm_72", "Target SM 7.2", "sm_72"),
-        FeatureInfo(@This()).create(.Sm_75, "sm_75", "Target SM 7.5", "sm_75"),
-    };
-};
diff --git a/lib/std/target/feature/PowerPcFeature.zig b/lib/std/target/feature/PowerPcFeature.zig
deleted file mode 100644
index c3a43e98c42489998631ecd36deeaab85ba78156..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/PowerPcFeature.zig
+++ /dev/null
@@ -1,163 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const PowerPcFeature = enum {
-    Bit64,
-    Bitregs64,
-    Altivec,
-    Bpermd,
-    Booke,
-    Cmpb,
-    Crbits,
-    DirectMove,
-    E500,
-    Extdiv,
-    Fcpsgn,
-    Fpcvt,
-    Fprnd,
-    Fpu,
-    Fre,
-    Fres,
-    Frsqrte,
-    Frsqrtes,
-    Fsqrt,
-    Float128,
-    Htm,
-    HardFloat,
-    Icbt,
-    IsaV30Instructions,
-    Isel,
-    InvariantFunctionDescriptors,
-    Ldbrx,
-    Lfiwax,
-    Longcall,
-    Mfocrf,
-    Msync,
-    Power8Altivec,
-    Crypto,
-    Power8Vector,
-    Power9Altivec,
-    Power9Vector,
-    Popcntd,
-    Ppc4xx,
-    Ppc6xx,
-    PpcPostraSched,
-    PpcPreraSched,
-    PartwordAtomics,
-    Qpx,
-    Recipprec,
-    Spe,
-    Stfiwx,
-    SecurePlt,
-    SlowPopcntd,
-    TwoConstNr,
-    Vsx,
-    VectorsUseTwoUnits,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Bit64, "64bit", "Enable 64-bit instructions", "64bit"),
-        FeatureInfo(@This()).create(.Bitregs64, "64bitregs", "Enable 64-bit registers usage for ppc32 [beta]", "64bitregs"),
-        FeatureInfo(@This()).createWithSubfeatures(.Altivec, "altivec", "Enable Altivec instructions", "altivec", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.Bpermd, "bpermd", "Enable the bpermd instruction", "bpermd"),
-        FeatureInfo(@This()).createWithSubfeatures(.Booke, "booke", "Enable Book E instructions", "booke", &[_]@This() {
-            .Icbt,
-        }),
-        FeatureInfo(@This()).create(.Cmpb, "cmpb", "Enable the cmpb instruction", "cmpb"),
-        FeatureInfo(@This()).create(.Crbits, "crbits", "Use condition-register bits individually", "crbits"),
-        FeatureInfo(@This()).createWithSubfeatures(.DirectMove, "direct-move", "Enable Power8 direct move instructions", "direct-move", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.E500, "e500", "Enable E500/E500mc instructions", "e500"),
-        FeatureInfo(@This()).create(.Extdiv, "extdiv", "Enable extended divide instructions", "extdiv"),
-        FeatureInfo(@This()).createWithSubfeatures(.Fcpsgn, "fcpsgn", "Enable the fcpsgn instruction", "fcpsgn", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fpcvt, "fpcvt", "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", "fpcvt", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fprnd, "fprnd", "Enable the fri[mnpz] instructions", "fprnd", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fpu, "fpu", "Enable classic FPU instructions", "fpu", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fre, "fre", "Enable the fre instruction", "fre", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fres, "fres", "Enable the fres instruction", "fres", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Frsqrte, "frsqrte", "Enable the frsqrte instruction", "frsqrte", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Frsqrtes, "frsqrtes", "Enable the frsqrtes instruction", "frsqrtes", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fsqrt, "fsqrt", "Enable the fsqrt instruction", "fsqrt", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Float128, "float128", "Enable the __float128 data type for IEEE-754R Binary128.", "float128", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.Htm, "htm", "Enable Hardware Transactional Memory instructions", "htm"),
-        FeatureInfo(@This()).create(.HardFloat, "hard-float", "Enable floating-point instructions", "hard-float"),
-        FeatureInfo(@This()).create(.Icbt, "icbt", "Enable icbt instruction", "icbt"),
-        FeatureInfo(@This()).create(.IsaV30Instructions, "isa-v30-instructions", "Enable instructions added in ISA 3.0.", "isa-v30-instructions"),
-        FeatureInfo(@This()).create(.Isel, "isel", "Enable the isel instruction", "isel"),
-        FeatureInfo(@This()).create(.InvariantFunctionDescriptors, "invariant-function-descriptors", "Assume function descriptors are invariant", "invariant-function-descriptors"),
-        FeatureInfo(@This()).create(.Ldbrx, "ldbrx", "Enable the ldbrx instruction", "ldbrx"),
-        FeatureInfo(@This()).createWithSubfeatures(.Lfiwax, "lfiwax", "Enable the lfiwax instruction", "lfiwax", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.Longcall, "longcall", "Always use indirect calls", "longcall"),
-        FeatureInfo(@This()).create(.Mfocrf, "mfocrf", "Enable the MFOCRF instruction", "mfocrf"),
-        FeatureInfo(@This()).createWithSubfeatures(.Msync, "msync", "Has only the msync instruction instead of sync", "msync", &[_]@This() {
-            .Icbt,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Power8Altivec, "power8-altivec", "Enable POWER8 Altivec instructions", "power8-altivec", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable POWER8 Crypto instructions", "crypto", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Power8Vector, "power8-vector", "Enable POWER8 vector instructions", "power8-vector", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Power9Altivec, "power9-altivec", "Enable POWER9 Altivec instructions", "power9-altivec", &[_]@This() {
-            .IsaV30Instructions,
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Power9Vector, "power9-vector", "Enable POWER9 vector instructions", "power9-vector", &[_]@This() {
-            .IsaV30Instructions,
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.Popcntd, "popcntd", "Enable the popcnt[dw] instructions", "popcntd"),
-        FeatureInfo(@This()).create(.Ppc4xx, "ppc4xx", "Enable PPC 4xx instructions", "ppc4xx"),
-        FeatureInfo(@This()).create(.Ppc6xx, "ppc6xx", "Enable PPC 6xx instructions", "ppc6xx"),
-        FeatureInfo(@This()).create(.PpcPostraSched, "ppc-postra-sched", "Use PowerPC post-RA scheduling strategy", "ppc-postra-sched"),
-        FeatureInfo(@This()).create(.PpcPreraSched, "ppc-prera-sched", "Use PowerPC pre-RA scheduling strategy", "ppc-prera-sched"),
-        FeatureInfo(@This()).create(.PartwordAtomics, "partword-atomics", "Enable l[bh]arx and st[bh]cx.", "partword-atomics"),
-        FeatureInfo(@This()).createWithSubfeatures(.Qpx, "qpx", "Enable QPX instructions", "qpx", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.Recipprec, "recipprec", "Assume higher precision reciprocal estimates", "recipprec"),
-        FeatureInfo(@This()).createWithSubfeatures(.Spe, "spe", "Enable SPE instructions", "spe", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Stfiwx, "stfiwx", "Enable the stfiwx instruction", "stfiwx", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.SecurePlt, "secure-plt", "Enable secure plt mode", "secure-plt"),
-        FeatureInfo(@This()).create(.SlowPopcntd, "slow-popcntd", "Has slow popcnt[dw] instructions", "slow-popcntd"),
-        FeatureInfo(@This()).create(.TwoConstNr, "two-const-nr", "Requires two constant Newton-Raphson computation", "two-const-nr"),
-        FeatureInfo(@This()).createWithSubfeatures(.Vsx, "vsx", "Enable VSX instructions", "vsx", &[_]@This() {
-            .HardFloat,
-        }),
-        FeatureInfo(@This()).create(.VectorsUseTwoUnits, "vectors-use-two-units", "Vectors use two units", "vectors-use-two-units"),
-    };
-};
diff --git a/lib/std/target/feature/RiscVFeature.zig b/lib/std/target/feature/RiscVFeature.zig
deleted file mode 100644
index b8fbe95299fc023103d2f253be6c19b28fba7e53..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/RiscVFeature.zig
+++ /dev/null
@@ -1,31 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const RiscVFeature = enum {
-    Bit64,
-    E,
-    RvcHints,
-    Relax,
-    A,
-    C,
-    D,
-    F,
-    M,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Bit64, "64bit", "Implements RV64", "64bit"),
-        FeatureInfo(@This()).create(.E, "e", "Implements RV32E (provides 16 rather than 32 GPRs)", "e"),
-        FeatureInfo(@This()).create(.RvcHints, "rvc-hints", "Enable RVC Hint Instructions.", "rvc-hints"),
-        FeatureInfo(@This()).create(.Relax, "relax", "Enable Linker relaxation.", "relax"),
-        FeatureInfo(@This()).create(.A, "a", "'A' (Atomic Instructions)", "a"),
-        FeatureInfo(@This()).create(.C, "c", "'C' (Compressed Instructions)", "c"),
-        FeatureInfo(@This()).createWithSubfeatures(.D, "d", "'D' (Double-Precision Floating-Point)", "d", &[_]@This() {
-            .F,
-        }),
-        FeatureInfo(@This()).create(.F, "f", "'F' (Single-Precision Floating-Point)", "f"),
-        FeatureInfo(@This()).create(.M, "m", "'M' (Integer Multiplication and Division)", "m"),
-    };
-};
diff --git a/lib/std/target/feature/SparcFeature.zig b/lib/std/target/feature/SparcFeature.zig
deleted file mode 100644
index 07d9375581fdc92a7e5b02b3c8be5367f63f7176..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/SparcFeature.zig
+++ /dev/null
@@ -1,49 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const SparcFeature = enum {
-    Detectroundchange,
-    HardQuadFloat,
-    Leon,
-    NoFmuls,
-    NoFsmuld,
-    Leonpwrpsr,
-    SoftFloat,
-    SoftMulDiv,
-    DeprecatedV8,
-    V9,
-    Vis,
-    Vis2,
-    Vis3,
-    Fixallfdivsqrt,
-    Insertnopload,
-    Hasleoncasa,
-    Leoncyclecounter,
-    Hasumacsmac,
-    Popc,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Detectroundchange, "detectroundchange", "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", "detectroundchange"),
-        FeatureInfo(@This()).create(.HardQuadFloat, "hard-quad-float", "Enable quad-word floating point instructions", "hard-quad-float"),
-        FeatureInfo(@This()).create(.Leon, "leon", "Enable LEON extensions", "leon"),
-        FeatureInfo(@This()).create(.NoFmuls, "no-fmuls", "Disable the fmuls instruction.", "no-fmuls"),
-        FeatureInfo(@This()).create(.NoFsmuld, "no-fsmuld", "Disable the fsmuld instruction.", "no-fsmuld"),
-        FeatureInfo(@This()).create(.Leonpwrpsr, "leonpwrpsr", "Enable the PWRPSR instruction", "leonpwrpsr"),
-        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software emulation for floating point", "soft-float"),
-        FeatureInfo(@This()).create(.SoftMulDiv, "soft-mul-div", "Use software emulation for integer multiply and divide", "soft-mul-div"),
-        FeatureInfo(@This()).create(.DeprecatedV8, "deprecated-v8", "Enable deprecated V8 instructions in V9 mode", "deprecated-v8"),
-        FeatureInfo(@This()).create(.V9, "v9", "Enable SPARC-V9 instructions", "v9"),
-        FeatureInfo(@This()).create(.Vis, "vis", "Enable UltraSPARC Visual Instruction Set extensions", "vis"),
-        FeatureInfo(@This()).create(.Vis2, "vis2", "Enable Visual Instruction Set extensions II", "vis2"),
-        FeatureInfo(@This()).create(.Vis3, "vis3", "Enable Visual Instruction Set extensions III", "vis3"),
-        FeatureInfo(@This()).create(.Fixallfdivsqrt, "fixallfdivsqrt", "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", "fixallfdivsqrt"),
-        FeatureInfo(@This()).create(.Insertnopload, "insertnopload", "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", "insertnopload"),
-        FeatureInfo(@This()).create(.Hasleoncasa, "hasleoncasa", "Enable CASA instruction for LEON3 and LEON4 processors", "hasleoncasa"),
-        FeatureInfo(@This()).create(.Leoncyclecounter, "leoncyclecounter", "Use the Leon cycle counter register", "leoncyclecounter"),
-        FeatureInfo(@This()).create(.Hasumacsmac, "hasumacsmac", "Enable UMAC and SMAC for LEON3 and LEON4 processors", "hasumacsmac"),
-        FeatureInfo(@This()).create(.Popc, "popc", "Use the popc (population count) instruction", "popc"),
-    };
-};
diff --git a/lib/std/target/feature/SystemZFeature.zig b/lib/std/target/feature/SystemZFeature.zig
deleted file mode 100644
index 773c6583d0f2875aad289644947e27fc074cc70d..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/SystemZFeature.zig
+++ /dev/null
@@ -1,81 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const SystemZFeature = enum {
-    DfpPackedConversion,
-    DfpZonedConversion,
-    DeflateConversion,
-    DistinctOps,
-    EnhancedDat2,
-    EnhancedSort,
-    ExecutionHint,
-    FpExtension,
-    FastSerialization,
-    GuardedStorage,
-    HighWord,
-    InsertReferenceBitsMultiple,
-    InterlockedAccess1,
-    LoadAndTrap,
-    LoadAndZeroRightmostByte,
-    LoadStoreOnCond,
-    LoadStoreOnCond2,
-    MessageSecurityAssistExtension3,
-    MessageSecurityAssistExtension4,
-    MessageSecurityAssistExtension5,
-    MessageSecurityAssistExtension7,
-    MessageSecurityAssistExtension8,
-    MessageSecurityAssistExtension9,
-    MiscellaneousExtensions,
-    MiscellaneousExtensions2,
-    MiscellaneousExtensions3,
-    PopulationCount,
-    ProcessorAssist,
-    ResetReferenceBitsMultiple,
-    TransactionalExecution,
-    Vector,
-    VectorEnhancements1,
-    VectorEnhancements2,
-    VectorPackedDecimal,
-    VectorPackedDecimalEnhancement,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.DfpPackedConversion, "dfp-packed-conversion", "Assume that the DFP packed-conversion facility is installed", "dfp-packed-conversion"),
-        FeatureInfo(@This()).create(.DfpZonedConversion, "dfp-zoned-conversion", "Assume that the DFP zoned-conversion facility is installed", "dfp-zoned-conversion"),
-        FeatureInfo(@This()).create(.DeflateConversion, "deflate-conversion", "Assume that the deflate-conversion facility is installed", "deflate-conversion"),
-        FeatureInfo(@This()).create(.DistinctOps, "distinct-ops", "Assume that the distinct-operands facility is installed", "distinct-ops"),
-        FeatureInfo(@This()).create(.EnhancedDat2, "enhanced-dat-2", "Assume that the enhanced-DAT facility 2 is installed", "enhanced-dat-2"),
-        FeatureInfo(@This()).create(.EnhancedSort, "enhanced-sort", "Assume that the enhanced-sort facility is installed", "enhanced-sort"),
-        FeatureInfo(@This()).create(.ExecutionHint, "execution-hint", "Assume that the execution-hint facility is installed", "execution-hint"),
-        FeatureInfo(@This()).create(.FpExtension, "fp-extension", "Assume that the floating-point extension facility is installed", "fp-extension"),
-        FeatureInfo(@This()).create(.FastSerialization, "fast-serialization", "Assume that the fast-serialization facility is installed", "fast-serialization"),
-        FeatureInfo(@This()).create(.GuardedStorage, "guarded-storage", "Assume that the guarded-storage facility is installed", "guarded-storage"),
-        FeatureInfo(@This()).create(.HighWord, "high-word", "Assume that the high-word facility is installed", "high-word"),
-        FeatureInfo(@This()).create(.InsertReferenceBitsMultiple, "insert-reference-bits-multiple", "Assume that the insert-reference-bits-multiple facility is installed", "insert-reference-bits-multiple"),
-        FeatureInfo(@This()).create(.InterlockedAccess1, "interlocked-access1", "Assume that interlocked-access facility 1 is installed", "interlocked-access1"),
-        FeatureInfo(@This()).create(.LoadAndTrap, "load-and-trap", "Assume that the load-and-trap facility is installed", "load-and-trap"),
-        FeatureInfo(@This()).create(.LoadAndZeroRightmostByte, "load-and-zero-rightmost-byte", "Assume that the load-and-zero-rightmost-byte facility is installed", "load-and-zero-rightmost-byte"),
-        FeatureInfo(@This()).create(.LoadStoreOnCond, "load-store-on-cond", "Assume that the load/store-on-condition facility is installed", "load-store-on-cond"),
-        FeatureInfo(@This()).create(.LoadStoreOnCond2, "load-store-on-cond-2", "Assume that the load/store-on-condition facility 2 is installed", "load-store-on-cond-2"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension3, "message-security-assist-extension3", "Assume that the message-security-assist extension facility 3 is installed", "message-security-assist-extension3"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension4, "message-security-assist-extension4", "Assume that the message-security-assist extension facility 4 is installed", "message-security-assist-extension4"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension5, "message-security-assist-extension5", "Assume that the message-security-assist extension facility 5 is installed", "message-security-assist-extension5"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension7, "message-security-assist-extension7", "Assume that the message-security-assist extension facility 7 is installed", "message-security-assist-extension7"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension8, "message-security-assist-extension8", "Assume that the message-security-assist extension facility 8 is installed", "message-security-assist-extension8"),
-        FeatureInfo(@This()).create(.MessageSecurityAssistExtension9, "message-security-assist-extension9", "Assume that the message-security-assist extension facility 9 is installed", "message-security-assist-extension9"),
-        FeatureInfo(@This()).create(.MiscellaneousExtensions, "miscellaneous-extensions", "Assume that the miscellaneous-extensions facility is installed", "miscellaneous-extensions"),
-        FeatureInfo(@This()).create(.MiscellaneousExtensions2, "miscellaneous-extensions-2", "Assume that the miscellaneous-extensions facility 2 is installed", "miscellaneous-extensions-2"),
-        FeatureInfo(@This()).create(.MiscellaneousExtensions3, "miscellaneous-extensions-3", "Assume that the miscellaneous-extensions facility 3 is installed", "miscellaneous-extensions-3"),
-        FeatureInfo(@This()).create(.PopulationCount, "population-count", "Assume that the population-count facility is installed", "population-count"),
-        FeatureInfo(@This()).create(.ProcessorAssist, "processor-assist", "Assume that the processor-assist facility is installed", "processor-assist"),
-        FeatureInfo(@This()).create(.ResetReferenceBitsMultiple, "reset-reference-bits-multiple", "Assume that the reset-reference-bits-multiple facility is installed", "reset-reference-bits-multiple"),
-        FeatureInfo(@This()).create(.TransactionalExecution, "transactional-execution", "Assume that the transactional-execution facility is installed", "transactional-execution"),
-        FeatureInfo(@This()).create(.Vector, "vector", "Assume that the vectory facility is installed", "vector"),
-        FeatureInfo(@This()).create(.VectorEnhancements1, "vector-enhancements-1", "Assume that the vector enhancements facility 1 is installed", "vector-enhancements-1"),
-        FeatureInfo(@This()).create(.VectorEnhancements2, "vector-enhancements-2", "Assume that the vector enhancements facility 2 is installed", "vector-enhancements-2"),
-        FeatureInfo(@This()).create(.VectorPackedDecimal, "vector-packed-decimal", "Assume that the vector packed decimal facility is installed", "vector-packed-decimal"),
-        FeatureInfo(@This()).create(.VectorPackedDecimalEnhancement, "vector-packed-decimal-enhancement", "Assume that the vector packed decimal enhancement facility is installed", "vector-packed-decimal-enhancement"),
-    };
-};
diff --git a/lib/std/target/feature/WebAssemblyFeature.zig b/lib/std/target/feature/WebAssemblyFeature.zig
deleted file mode 100644
index 1cd80b0f9424403f500a9efa98532a7266367d14..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/WebAssemblyFeature.zig
+++ /dev/null
@@ -1,33 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const WebAssemblyFeature = enum {
-    Atomics,
-    BulkMemory,
-    ExceptionHandling,
-    Multivalue,
-    MutableGlobals,
-    NontrappingFptoint,
-    Simd128,
-    SignExt,
-    TailCall,
-    UnimplementedSimd128,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).create(.Atomics, "atomics", "Enable Atomics", "atomics"),
-        FeatureInfo(@This()).create(.BulkMemory, "bulk-memory", "Enable bulk memory operations", "bulk-memory"),
-        FeatureInfo(@This()).create(.ExceptionHandling, "exception-handling", "Enable Wasm exception handling", "exception-handling"),
-        FeatureInfo(@This()).create(.Multivalue, "multivalue", "Enable multivalue blocks, instructions, and functions", "multivalue"),
-        FeatureInfo(@This()).create(.MutableGlobals, "mutable-globals", "Enable mutable globals", "mutable-globals"),
-        FeatureInfo(@This()).create(.NontrappingFptoint, "nontrapping-fptoint", "Enable non-trapping float-to-int conversion operators", "nontrapping-fptoint"),
-        FeatureInfo(@This()).create(.Simd128, "simd128", "Enable 128-bit SIMD", "simd128"),
-        FeatureInfo(@This()).create(.SignExt, "sign-ext", "Enable sign extension operators", "sign-ext"),
-        FeatureInfo(@This()).create(.TailCall, "tail-call", "Enable tail call instructions", "tail-call"),
-        FeatureInfo(@This()).createWithSubfeatures(.UnimplementedSimd128, "unimplemented-simd128", "Enable 128-bit SIMD not yet implemented in engines", "unimplemented-simd128", &[_]@This() {
-            .Simd128,
-        }),
-    };
-};
diff --git a/lib/std/target/feature/X86Feature.zig b/lib/std/target/feature/X86Feature.zig
deleted file mode 100644
index 089215ed3f27a7715c8831d8f6ad2bd0e323ad1c..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/X86Feature.zig
+++ /dev/null
@@ -1,342 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const X86Feature = enum {
-    Dnow3,
-    Dnowa3,
-    Bit64,
-    Adx,
-    Aes,
-    Avx,
-    Avx2,
-    Avx512f,
-    Avx512bf16,
-    Avx512bitalg,
-    Bmi,
-    Bmi2,
-    Avx512bw,
-    Branchfusion,
-    Avx512cd,
-    Cldemote,
-    Clflushopt,
-    Clwb,
-    Clzero,
-    Cmov,
-    Cx8,
-    Cx16,
-    Avx512dq,
-    Mpx,
-    Enqcmd,
-    Avx512er,
-    Ermsb,
-    F16c,
-    Fma,
-    Fma4,
-    Fsgsbase,
-    Fxsr,
-    Fast11bytenop,
-    Fast15bytenop,
-    FastBextr,
-    FastHops,
-    FastLzcnt,
-    FastPartialYmmOrZmmWrite,
-    FastShldRotate,
-    FastScalarFsqrt,
-    FastScalarShiftMasks,
-    FastVariableShuffle,
-    FastVectorFsqrt,
-    FastVectorShiftMasks,
-    Gfni,
-    FastGather,
-    Avx512ifma,
-    Invpcid,
-    Sahf,
-    LeaSp,
-    LeaUsesAg,
-    Lwp,
-    Lzcnt,
-    FalseDepsLzcntTzcnt,
-    Mmx,
-    Movbe,
-    Movdir64b,
-    Movdiri,
-    Mwaitx,
-    Macrofusion,
-    MergeToThreewayBranch,
-    Nopl,
-    Pclmul,
-    Pconfig,
-    Avx512pf,
-    Pku,
-    Popcnt,
-    FalseDepsPopcnt,
-    Prefetchwt1,
-    Prfchw,
-    Ptwrite,
-    PadShortFunctions,
-    Prefer128Bit,
-    Prefer256Bit,
-    Rdpid,
-    Rdrnd,
-    Rdseed,
-    Rtm,
-    Retpoline,
-    RetpolineExternalThunk,
-    RetpolineIndirectBranches,
-    RetpolineIndirectCalls,
-    Sgx,
-    Sha,
-    Shstk,
-    Sse,
-    Sse2,
-    Sse3,
-    Sse4a,
-    Sse41,
-    Sse42,
-    SseUnalignedMem,
-    Ssse3,
-    Slow3opsLea,
-    IdivlToDivb,
-    IdivqToDivl,
-    SlowIncdec,
-    SlowLea,
-    SlowPmaddwd,
-    SlowPmulld,
-    SlowShld,
-    SlowTwoMemOps,
-    SlowUnalignedMem16,
-    SlowUnalignedMem32,
-    SoftFloat,
-    Tbm,
-    UseAa,
-    Vaes,
-    Avx512vbmi,
-    Avx512vbmi2,
-    Avx512vl,
-    Avx512vnni,
-    Avx512vp2intersect,
-    Vpclmulqdq,
-    Avx512vpopcntdq,
-    Waitpkg,
-    Wbnoinvd,
-    X87,
-    Xop,
-    Xsave,
-    Xsavec,
-    Xsaveopt,
-    Xsaves,
-    BitMode16,
-    BitMode32,
-    BitMode64,
-
-    pub fn getInfo(self: @This()) FeatureInfo(@This()) {
-        return feature_infos[@enumToInt(self)];
-    }
-
-    pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
-        FeatureInfo(@This()).createWithSubfeatures(.Dnow3, "3dnow", "Enable 3DNow! instructions", "3dnow", &[_]@This() {
-            .Mmx,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Dnowa3, "3dnowa", "Enable 3DNow! Athlon instructions", "3dnowa", &[_]@This() {
-            .Mmx,
-        }),
-        FeatureInfo(@This()).create(.Bit64, "64bit", "Support 64-bit instructions", "64bit"),
-        FeatureInfo(@This()).create(.Adx, "adx", "Support ADX instructions", "adx"),
-        FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES instructions", "aes", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx, "avx", "Enable AVX instructions", "avx", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx2, "avx2", "Enable AVX2 instructions", "avx2", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512f, "avx512f", "Enable AVX-512 instructions", "avx512f", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512bf16, "avx512bf16", "Support bfloat16 floating point", "avx512bf16", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512bitalg, "avx512bitalg", "Enable AVX-512 Bit Algorithms", "avx512bitalg", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Bmi, "bmi", "Support BMI instructions", "bmi"),
-        FeatureInfo(@This()).create(.Bmi2, "bmi2", "Support BMI2 instructions", "bmi2"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512bw, "avx512bw", "Enable AVX-512 Byte and Word Instructions", "avx512bw", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Branchfusion, "branchfusion", "CMP/TEST can be fused with conditional branches", "branchfusion"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512cd, "avx512cd", "Enable AVX-512 Conflict Detection Instructions", "avx512cd", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Cldemote, "cldemote", "Enable Cache Demote", "cldemote"),
-        FeatureInfo(@This()).create(.Clflushopt, "clflushopt", "Flush A Cache Line Optimized", "clflushopt"),
-        FeatureInfo(@This()).create(.Clwb, "clwb", "Cache Line Write Back", "clwb"),
-        FeatureInfo(@This()).create(.Clzero, "clzero", "Enable Cache Line Zero", "clzero"),
-        FeatureInfo(@This()).create(.Cmov, "cmov", "Enable conditional move instructions", "cmov"),
-        FeatureInfo(@This()).create(.Cx8, "cx8", "Support CMPXCHG8B instructions", "cx8"),
-        FeatureInfo(@This()).createWithSubfeatures(.Cx16, "cx16", "64-bit with cmpxchg16b", "cx16", &[_]@This() {
-            .Cx8,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512dq, "avx512dq", "Enable AVX-512 Doubleword and Quadword Instructions", "avx512dq", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Mpx, "mpx", "Deprecated. Support MPX instructions", "mpx"),
-        FeatureInfo(@This()).create(.Enqcmd, "enqcmd", "Has ENQCMD instructions", "enqcmd"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512er, "avx512er", "Enable AVX-512 Exponential and Reciprocal Instructions", "avx512er", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Ermsb, "ermsb", "REP MOVS/STOS are fast", "ermsb"),
-        FeatureInfo(@This()).createWithSubfeatures(.F16c, "f16c", "Support 16-bit floating point conversion instructions", "f16c", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fma, "fma", "Enable three-operand fused multiple-add", "fma", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Fma4, "fma4", "Enable four-operand fused multiple-add", "fma4", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Fsgsbase, "fsgsbase", "Support FS/GS Base instructions", "fsgsbase"),
-        FeatureInfo(@This()).create(.Fxsr, "fxsr", "Support fxsave/fxrestore instructions", "fxsr"),
-        FeatureInfo(@This()).create(.Fast11bytenop, "fast-11bytenop", "Target can quickly decode up to 11 byte NOPs", "fast-11bytenop"),
-        FeatureInfo(@This()).create(.Fast15bytenop, "fast-15bytenop", "Target can quickly decode up to 15 byte NOPs", "fast-15bytenop"),
-        FeatureInfo(@This()).create(.FastBextr, "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", "fast-bextr"),
-        FeatureInfo(@This()).createWithSubfeatures(.FastHops, "fast-hops", "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", "fast-hops", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.FastLzcnt, "fast-lzcnt", "LZCNT instructions are as fast as most simple integer ops", "fast-lzcnt"),
-        FeatureInfo(@This()).create(.FastPartialYmmOrZmmWrite, "fast-partial-ymm-or-zmm-write", "Partial writes to YMM/ZMM registers are fast", "fast-partial-ymm-or-zmm-write"),
-        FeatureInfo(@This()).create(.FastShldRotate, "fast-shld-rotate", "SHLD can be used as a faster rotate", "fast-shld-rotate"),
-        FeatureInfo(@This()).create(.FastScalarFsqrt, "fast-scalar-fsqrt", "Scalar SQRT is fast (disable Newton-Raphson)", "fast-scalar-fsqrt"),
-        FeatureInfo(@This()).create(.FastScalarShiftMasks, "fast-scalar-shift-masks", "Prefer a left/right scalar logical shift pair over a shift+and pair", "fast-scalar-shift-masks"),
-        FeatureInfo(@This()).create(.FastVariableShuffle, "fast-variable-shuffle", "Shuffles with variable masks are fast", "fast-variable-shuffle"),
-        FeatureInfo(@This()).create(.FastVectorFsqrt, "fast-vector-fsqrt", "Vector SQRT is fast (disable Newton-Raphson)", "fast-vector-fsqrt"),
-        FeatureInfo(@This()).create(.FastVectorShiftMasks, "fast-vector-shift-masks", "Prefer a left/right vector logical shift pair over a shift+and pair", "fast-vector-shift-masks"),
-        FeatureInfo(@This()).createWithSubfeatures(.Gfni, "gfni", "Enable Galois Field Arithmetic Instructions", "gfni", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.FastGather, "fast-gather", "Indicates if gather is reasonably fast", "fast-gather"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512ifma, "avx512ifma", "Enable AVX-512 Integer Fused Multiple-Add", "avx512ifma", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Invpcid, "invpcid", "Invalidate Process-Context Identifier", "invpcid"),
-        FeatureInfo(@This()).create(.Sahf, "sahf", "Support LAHF and SAHF instructions", "sahf"),
-        FeatureInfo(@This()).create(.LeaSp, "lea-sp", "Use LEA for adjusting the stack pointer", "lea-sp"),
-        FeatureInfo(@This()).create(.LeaUsesAg, "lea-uses-ag", "LEA instruction needs inputs at AG stage", "lea-uses-ag"),
-        FeatureInfo(@This()).create(.Lwp, "lwp", "Enable LWP instructions", "lwp"),
-        FeatureInfo(@This()).create(.Lzcnt, "lzcnt", "Support LZCNT instruction", "lzcnt"),
-        FeatureInfo(@This()).create(.FalseDepsLzcntTzcnt, "false-deps-lzcnt-tzcnt", "LZCNT/TZCNT have a false dependency on dest register", "false-deps-lzcnt-tzcnt"),
-        FeatureInfo(@This()).create(.Mmx, "mmx", "Enable MMX instructions", "mmx"),
-        FeatureInfo(@This()).create(.Movbe, "movbe", "Support MOVBE instruction", "movbe"),
-        FeatureInfo(@This()).create(.Movdir64b, "movdir64b", "Support movdir64b instruction", "movdir64b"),
-        FeatureInfo(@This()).create(.Movdiri, "movdiri", "Support movdiri instruction", "movdiri"),
-        FeatureInfo(@This()).create(.Mwaitx, "mwaitx", "Enable MONITORX/MWAITX timer functionality", "mwaitx"),
-        FeatureInfo(@This()).create(.Macrofusion, "macrofusion", "Various instructions can be fused with conditional branches", "macrofusion"),
-        FeatureInfo(@This()).create(.MergeToThreewayBranch, "merge-to-threeway-branch", "Merge branches to a three-way conditional branch", "merge-to-threeway-branch"),
-        FeatureInfo(@This()).create(.Nopl, "nopl", "Enable NOPL instruction", "nopl"),
-        FeatureInfo(@This()).createWithSubfeatures(.Pclmul, "pclmul", "Enable packed carry-less multiplication instructions", "pclmul", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Pconfig, "pconfig", "platform configuration instruction", "pconfig"),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512pf, "avx512pf", "Enable AVX-512 PreFetch Instructions", "avx512pf", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Pku, "pku", "Enable protection keys", "pku"),
-        FeatureInfo(@This()).create(.Popcnt, "popcnt", "Support POPCNT instruction", "popcnt"),
-        FeatureInfo(@This()).create(.FalseDepsPopcnt, "false-deps-popcnt", "POPCNT has a false dependency on dest register", "false-deps-popcnt"),
-        FeatureInfo(@This()).create(.Prefetchwt1, "prefetchwt1", "Prefetch with Intent to Write and T1 Hint", "prefetchwt1"),
-        FeatureInfo(@This()).create(.Prfchw, "prfchw", "Support PRFCHW instructions", "prfchw"),
-        FeatureInfo(@This()).create(.Ptwrite, "ptwrite", "Support ptwrite instruction", "ptwrite"),
-        FeatureInfo(@This()).create(.PadShortFunctions, "pad-short-functions", "Pad short functions", "pad-short-functions"),
-        FeatureInfo(@This()).create(.Prefer128Bit, "prefer-128-bit", "Prefer 128-bit AVX instructions", "prefer-128-bit"),
-        FeatureInfo(@This()).create(.Prefer256Bit, "prefer-256-bit", "Prefer 256-bit AVX instructions", "prefer-256-bit"),
-        FeatureInfo(@This()).create(.Rdpid, "rdpid", "Support RDPID instructions", "rdpid"),
-        FeatureInfo(@This()).create(.Rdrnd, "rdrnd", "Support RDRAND instruction", "rdrnd"),
-        FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"),
-        FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"),
-        FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() {
-            .RetpolineIndirectCalls,
-            .RetpolineIndirectBranches,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() {
-            .RetpolineIndirectCalls,
-        }),
-        FeatureInfo(@This()).create(.RetpolineIndirectBranches, "retpoline-indirect-branches", "Remove speculation of indirect branches from the generated code", "retpoline-indirect-branches"),
-        FeatureInfo(@This()).create(.RetpolineIndirectCalls, "retpoline-indirect-calls", "Remove speculation of indirect calls from the generated code", "retpoline-indirect-calls"),
-        FeatureInfo(@This()).create(.Sgx, "sgx", "Enable Software Guard Extensions", "sgx"),
-        FeatureInfo(@This()).createWithSubfeatures(.Sha, "sha", "Enable SHA instructions", "sha", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Shstk, "shstk", "Support CET Shadow-Stack instructions", "shstk"),
-        FeatureInfo(@This()).create(.Sse, "sse", "Enable SSE instructions", "sse"),
-        FeatureInfo(@This()).createWithSubfeatures(.Sse2, "sse2", "Enable SSE2 instructions", "sse2", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sse3, "sse3", "Enable SSE3 instructions", "sse3", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sse4a, "sse4a", "Support SSE 4a instructions", "sse4a", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sse41, "sse4.1", "Enable SSE 4.1 instructions", "sse4.1", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Sse42, "sse4.2", "Enable SSE 4.2 instructions", "sse4.2", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.SseUnalignedMem, "sse-unaligned-mem", "Allow unaligned memory operands with SSE instructions", "sse-unaligned-mem"),
-        FeatureInfo(@This()).createWithSubfeatures(.Ssse3, "ssse3", "Enable SSSE3 instructions", "ssse3", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Slow3opsLea, "slow-3ops-lea", "LEA instruction with 3 ops or certain registers is slow", "slow-3ops-lea"),
-        FeatureInfo(@This()).create(.IdivlToDivb, "idivl-to-divb", "Use 8-bit divide for positive values less than 256", "idivl-to-divb"),
-        FeatureInfo(@This()).create(.IdivqToDivl, "idivq-to-divl", "Use 32-bit divide for positive values less than 2^32", "idivq-to-divl"),
-        FeatureInfo(@This()).create(.SlowIncdec, "slow-incdec", "INC and DEC instructions are slower than ADD and SUB", "slow-incdec"),
-        FeatureInfo(@This()).create(.SlowLea, "slow-lea", "LEA instruction with certain arguments is slow", "slow-lea"),
-        FeatureInfo(@This()).create(.SlowPmaddwd, "slow-pmaddwd", "PMADDWD is slower than PMULLD", "slow-pmaddwd"),
-        FeatureInfo(@This()).create(.SlowPmulld, "slow-pmulld", "PMULLD instruction is slow", "slow-pmulld"),
-        FeatureInfo(@This()).create(.SlowShld, "slow-shld", "SHLD instruction is slow", "slow-shld"),
-        FeatureInfo(@This()).create(.SlowTwoMemOps, "slow-two-mem-ops", "Two memory operand instructions are slow", "slow-two-mem-ops"),
-        FeatureInfo(@This()).create(.SlowUnalignedMem16, "slow-unaligned-mem-16", "Slow unaligned 16-byte memory access", "slow-unaligned-mem-16"),
-        FeatureInfo(@This()).create(.SlowUnalignedMem32, "slow-unaligned-mem-32", "Slow unaligned 32-byte memory access", "slow-unaligned-mem-32"),
-        FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features", "soft-float"),
-        FeatureInfo(@This()).create(.Tbm, "tbm", "Enable TBM instructions", "tbm"),
-        FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
-        FeatureInfo(@This()).createWithSubfeatures(.Vaes, "vaes", "Promote selected AES instructions to AVX512/AVX registers", "vaes", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi, "avx512vbmi", "Enable AVX-512 Vector Byte Manipulation Instructions", "avx512vbmi", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi2, "avx512vbmi2", "Enable AVX-512 further Vector Byte Manipulation Instructions", "avx512vbmi2", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vl, "avx512vl", "Enable AVX-512 Vector Length eXtensions", "avx512vl", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vnni, "avx512vnni", "Enable AVX-512 Vector Neural Network Instructions", "avx512vnni", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vp2intersect, "avx512vp2intersect", "Enable AVX-512 vp2intersect", "avx512vp2intersect", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Vpclmulqdq, "vpclmulqdq", "Enable vpclmulqdq instructions", "vpclmulqdq", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).createWithSubfeatures(.Avx512vpopcntdq, "avx512vpopcntdq", "Enable AVX-512 Population Count Instructions", "avx512vpopcntdq", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Waitpkg, "waitpkg", "Wait and pause enhancements", "waitpkg"),
-        FeatureInfo(@This()).create(.Wbnoinvd, "wbnoinvd", "Write Back No Invalidate", "wbnoinvd"),
-        FeatureInfo(@This()).create(.X87, "x87", "Enable X87 float instructions", "x87"),
-        FeatureInfo(@This()).createWithSubfeatures(.Xop, "xop", "Enable XOP instructions", "xop", &[_]@This() {
-            .Sse,
-        }),
-        FeatureInfo(@This()).create(.Xsave, "xsave", "Support xsave instructions", "xsave"),
-        FeatureInfo(@This()).create(.Xsavec, "xsavec", "Support xsavec instructions", "xsavec"),
-        FeatureInfo(@This()).create(.Xsaveopt, "xsaveopt", "Support xsaveopt instructions", "xsaveopt"),
-        FeatureInfo(@This()).create(.Xsaves, "xsaves", "Support xsaves instructions", "xsaves"),
-        FeatureInfo(@This()).create(.BitMode16, "16bit-mode", "16-bit mode (i8086)", "16bit-mode"),
-        FeatureInfo(@This()).create(.BitMode32, "32bit-mode", "32-bit mode (80386)", "32bit-mode"),
-        FeatureInfo(@This()).create(.BitMode64, "64bit-mode", "64-bit mode (x86_64)", "64bit-mode"),
-    };
-};
diff --git a/lib/std/target/feature/empty.zig b/lib/std/target/feature/empty.zig
deleted file mode 100644
index e18d66aa132262804145ee773d7d63949f6a9aec..0000000000000000000000000000000000000000
--- a/lib/std/target/feature/empty.zig
+++ /dev/null
@@ -1,5 +0,0 @@
-const FeatureInfo = @import("std").target.feature.FeatureInfo;
-
-pub const EmptyFeature = struct {
-    pub const feature_infos = [0]FeatureInfo(@This()) {};
-};
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
new file mode 100644
index 0000000000000000000000000000000000000000..4ebc7edc2f9c20a52d36a7eee2e0a2abb843fbf3
--- /dev/null
+++ b/lib/std/target/hexagon.zig
@@ -0,0 +1,357 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_v5 = Feature{
+    .name = "v5",
+    .description = "Enable Hexagon V5 architecture",
+    .llvm_name = "v5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v55 = Feature{
+    .name = "v55",
+    .description = "Enable Hexagon V55 architecture",
+    .llvm_name = "v55",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v60 = Feature{
+    .name = "v60",
+    .description = "Enable Hexagon V60 architecture",
+    .llvm_name = "v60",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v62 = Feature{
+    .name = "v62",
+    .description = "Enable Hexagon V62 architecture",
+    .llvm_name = "v62",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v65 = Feature{
+    .name = "v65",
+    .description = "Enable Hexagon V65 architecture",
+    .llvm_name = "v65",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v66 = Feature{
+    .name = "v66",
+    .description = "Enable Hexagon V66 architecture",
+    .llvm_name = "v66",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hvx = Feature{
+    .name = "hvx",
+    .description = "Hexagon HVX instructions",
+    .llvm_name = "hvx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hvxLength64b = Feature{
+    .name = "hvx-length64b",
+    .description = "Hexagon HVX 64B instructions",
+    .llvm_name = "hvx-length64b",
+    .subfeatures = &[_]*const Feature {
+        &feature_hvx,
+    },
+};
+
+pub const feature_hvxLength128b = Feature{
+    .name = "hvx-length128b",
+    .description = "Hexagon HVX 128B instructions",
+    .llvm_name = "hvx-length128b",
+    .subfeatures = &[_]*const Feature {
+        &feature_hvx,
+    },
+};
+
+pub const feature_hvxv60 = Feature{
+    .name = "hvxv60",
+    .description = "Hexagon HVX instructions",
+    .llvm_name = "hvxv60",
+    .subfeatures = &[_]*const Feature {
+        &feature_hvx,
+    },
+};
+
+pub const feature_hvxv62 = Feature{
+    .name = "hvxv62",
+    .description = "Hexagon HVX instructions",
+    .llvm_name = "hvxv62",
+    .subfeatures = &[_]*const Feature {
+        &feature_hvx,
+    },
+};
+
+pub const feature_hvxv65 = Feature{
+    .name = "hvxv65",
+    .description = "Hexagon HVX instructions",
+    .llvm_name = "hvxv65",
+    .subfeatures = &[_]*const Feature {
+        &feature_hvx,
+    },
+};
+
+pub const feature_hvxv66 = Feature{
+    .name = "hvxv66",
+    .description = "Hexagon HVX instructions",
+    .llvm_name = "hvxv66",
+    .subfeatures = &[_]*const Feature {
+        &feature_zreg,
+        &feature_hvx,
+    },
+};
+
+pub const feature_zreg = Feature{
+    .name = "zreg",
+    .description = "Hexagon ZReg extension instructions",
+    .llvm_name = "zreg",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_duplex = Feature{
+    .name = "duplex",
+    .description = "Enable generation of duplex instruction",
+    .llvm_name = "duplex",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_longCalls = Feature{
+    .name = "long-calls",
+    .description = "Use constant-extended calls",
+    .llvm_name = "long-calls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mem_noshuf = Feature{
+    .name = "mem_noshuf",
+    .description = "Supports mem_noshuf feature",
+    .llvm_name = "mem_noshuf",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_memops = Feature{
+    .name = "memops",
+    .description = "Use memop instructions",
+    .llvm_name = "memops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nvj = Feature{
+    .name = "nvj",
+    .description = "Support for new-value jumps",
+    .llvm_name = "nvj",
+    .subfeatures = &[_]*const Feature {
+        &feature_packets,
+    },
+};
+
+pub const feature_nvs = Feature{
+    .name = "nvs",
+    .description = "Support for new-value stores",
+    .llvm_name = "nvs",
+    .subfeatures = &[_]*const Feature {
+        &feature_packets,
+    },
+};
+
+pub const feature_noreturnStackElim = Feature{
+    .name = "noreturn-stack-elim",
+    .description = "Eliminate stack allocation in a noreturn function when possible",
+    .llvm_name = "noreturn-stack-elim",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_packets = Feature{
+    .name = "packets",
+    .description = "Support for instruction packets",
+    .llvm_name = "packets",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_reservedR19 = Feature{
+    .name = "reserved-r19",
+    .description = "Reserve register R19",
+    .llvm_name = "reserved-r19",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_smallData = Feature{
+    .name = "small-data",
+    .description = "Allow GP-relative addressing of global variables",
+    .llvm_name = "small-data",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_v5,
+    &feature_v55,
+    &feature_v60,
+    &feature_v62,
+    &feature_v65,
+    &feature_v66,
+    &feature_hvx,
+    &feature_hvxLength64b,
+    &feature_hvxLength128b,
+    &feature_hvxv60,
+    &feature_hvxv62,
+    &feature_hvxv65,
+    &feature_hvxv66,
+    &feature_zreg,
+    &feature_duplex,
+    &feature_longCalls,
+    &feature_mem_noshuf,
+    &feature_memops,
+    &feature_nvj,
+    &feature_nvs,
+    &feature_noreturnStackElim,
+    &feature_packets,
+    &feature_reservedR19,
+    &feature_smallData,
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_v60,
+        &feature_duplex,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv5 = Cpu{
+    .name = "hexagonv5",
+    .llvm_name = "hexagonv5",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_duplex,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv55 = Cpu{
+    .name = "hexagonv55",
+    .llvm_name = "hexagonv55",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_duplex,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv60 = Cpu{
+    .name = "hexagonv60",
+    .llvm_name = "hexagonv60",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_v60,
+        &feature_duplex,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv62 = Cpu{
+    .name = "hexagonv62",
+    .llvm_name = "hexagonv62",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_v60,
+        &feature_v62,
+        &feature_duplex,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv65 = Cpu{
+    .name = "hexagonv65",
+    .llvm_name = "hexagonv65",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_v60,
+        &feature_v62,
+        &feature_v65,
+        &feature_duplex,
+        &feature_mem_noshuf,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpu_hexagonv66 = Cpu{
+    .name = "hexagonv66",
+    .llvm_name = "hexagonv66",
+    .subfeatures = &[_]*const Feature {
+        &feature_v5,
+        &feature_v55,
+        &feature_v60,
+        &feature_v62,
+        &feature_v65,
+        &feature_v66,
+        &feature_duplex,
+        &feature_mem_noshuf,
+        &feature_memops,
+        &feature_packets,
+        &feature_nvj,
+        &feature_nvs,
+        &feature_smallData,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_generic,
+    &cpu_hexagonv5,
+    &cpu_hexagonv55,
+    &cpu_hexagonv60,
+    &cpu_hexagonv62,
+    &cpu_hexagonv65,
+    &cpu_hexagonv66,
+};
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
new file mode 100644
index 0000000000000000000000000000000000000000..f2de051623fd46fbce71368bd3f9453038c3418e
--- /dev/null
+++ b/lib/std/target/mips.zig
@@ -0,0 +1,828 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_abs2008 = Feature{
+    .name = "abs2008",
+    .description = "Disable IEEE 754-2008 abs.fmt mode",
+    .llvm_name = "abs2008",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_crc = Feature{
+    .name = "crc",
+    .description = "Mips R6 CRC ASE",
+    .llvm_name = "crc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cnmips = Feature{
+    .name = "cnmips",
+    .description = "Octeon cnMIPS Support",
+    .llvm_name = "cnmips",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_dsp = Feature{
+    .name = "dsp",
+    .description = "Mips DSP ASE",
+    .llvm_name = "dsp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dspr2 = Feature{
+    .name = "dspr2",
+    .description = "Mips DSP-R2 ASE",
+    .llvm_name = "dspr2",
+    .subfeatures = &[_]*const Feature {
+        &feature_dsp,
+    },
+};
+
+pub const feature_dspr3 = Feature{
+    .name = "dspr3",
+    .description = "Mips DSP-R3 ASE",
+    .llvm_name = "dspr3",
+    .subfeatures = &[_]*const Feature {
+        &feature_dsp,
+    },
+};
+
+pub const feature_eva = Feature{
+    .name = "eva",
+    .description = "Mips EVA ASE",
+    .llvm_name = "eva",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fp64 = Feature{
+    .name = "fp64",
+    .description = "Support 64-bit FP registers",
+    .llvm_name = "fp64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fpxx = Feature{
+    .name = "fpxx",
+    .description = "Support for FPXX",
+    .llvm_name = "fpxx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ginv = Feature{
+    .name = "ginv",
+    .description = "Mips Global Invalidate ASE",
+    .llvm_name = "ginv",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gp64 = Feature{
+    .name = "gp64",
+    .description = "General Purpose Registers are 64-bit wide",
+    .llvm_name = "gp64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_longCalls = Feature{
+    .name = "long-calls",
+    .description = "Disable use of the jal instruction",
+    .llvm_name = "long-calls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_msa = Feature{
+    .name = "msa",
+    .description = "Mips MSA ASE",
+    .llvm_name = "msa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mt = Feature{
+    .name = "mt",
+    .description = "Mips MT ASE",
+    .llvm_name = "mt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nomadd4 = Feature{
+    .name = "nomadd4",
+    .description = "Disable 4-operand madd.fmt and related instructions",
+    .llvm_name = "nomadd4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_micromips = Feature{
+    .name = "micromips",
+    .description = "microMips mode",
+    .llvm_name = "micromips",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips1 = Feature{
+    .name = "mips1",
+    .description = "Mips I ISA Support [highly experimental]",
+    .llvm_name = "mips1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips2 = Feature{
+    .name = "mips2",
+    .description = "Mips II ISA Support [highly experimental]",
+    .llvm_name = "mips2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips1,
+    },
+};
+
+pub const feature_mips3 = Feature{
+    .name = "mips3",
+    .description = "MIPS III ISA Support [highly experimental]",
+    .llvm_name = "mips3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips3_32 = Feature{
+    .name = "mips3_32",
+    .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
+    .llvm_name = "mips3_32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips3_32r2 = Feature{
+    .name = "mips3_32r2",
+    .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
+    .llvm_name = "mips3_32r2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips4 = Feature{
+    .name = "mips4",
+    .description = "MIPS IV ISA Support",
+    .llvm_name = "mips4",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips4_32 = Feature{
+    .name = "mips4_32",
+    .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
+    .llvm_name = "mips4_32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips4_32r2 = Feature{
+    .name = "mips4_32r2",
+    .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
+    .llvm_name = "mips4_32r2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips5 = Feature{
+    .name = "mips5",
+    .description = "MIPS V ISA Support [highly experimental]",
+    .llvm_name = "mips5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips5_32r2 = Feature{
+    .name = "mips5_32r2",
+    .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
+    .llvm_name = "mips5_32r2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips16 = Feature{
+    .name = "mips16",
+    .description = "Mips16 mode",
+    .llvm_name = "mips16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mips32 = Feature{
+    .name = "mips32",
+    .description = "Mips32 ISA Support",
+    .llvm_name = "mips32",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32,
+        &feature_mips1,
+    },
+};
+
+pub const feature_mips32r2 = Feature{
+    .name = "mips32r2",
+    .description = "Mips32r2 ISA Support",
+    .llvm_name = "mips32r2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+    },
+};
+
+pub const feature_mips32r3 = Feature{
+    .name = "mips32r3",
+    .description = "Mips32r3 ISA Support",
+    .llvm_name = "mips32r3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+    },
+};
+
+pub const feature_mips32r5 = Feature{
+    .name = "mips32r5",
+    .description = "Mips32r5 ISA Support",
+    .llvm_name = "mips32r5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+    },
+};
+
+pub const feature_mips32r6 = Feature{
+    .name = "mips32r6",
+    .description = "Mips32r6 ISA Support [experimental]",
+    .llvm_name = "mips32r6",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_abs2008,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips64 = Feature{
+    .name = "mips64",
+    .description = "Mips64 ISA Support",
+    .llvm_name = "mips64",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips64r2 = Feature{
+    .name = "mips64r2",
+    .description = "Mips64r2 ISA Support",
+    .llvm_name = "mips64r2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips64r3 = Feature{
+    .name = "mips64r3",
+    .description = "Mips64r3 ISA Support",
+    .llvm_name = "mips64r3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips64r5 = Feature{
+    .name = "mips64r5",
+    .description = "Mips64r5 ISA Support",
+    .llvm_name = "mips64r5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_mips64r6 = Feature{
+    .name = "mips64r6",
+    .description = "Mips64r6 ISA Support [experimental]",
+    .llvm_name = "mips64r6",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_abs2008,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+    },
+};
+
+pub const feature_nan2008 = Feature{
+    .name = "nan2008",
+    .description = "IEEE 754-2008 NaN encoding",
+    .llvm_name = "nan2008",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noabicalls = Feature{
+    .name = "noabicalls",
+    .description = "Disable SVR4-style position-independent code",
+    .llvm_name = "noabicalls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nooddspreg = Feature{
+    .name = "nooddspreg",
+    .description = "Disable odd numbered single-precision registers",
+    .llvm_name = "nooddspreg",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptr64 = Feature{
+    .name = "ptr64",
+    .description = "Pointers are 64-bit wide",
+    .llvm_name = "ptr64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_singleFloat = Feature{
+    .name = "single-float",
+    .description = "Only supports single precision float",
+    .llvm_name = "single-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_softFloat = Feature{
+    .name = "soft-float",
+    .description = "Does not support floating point instructions",
+    .llvm_name = "soft-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sym32 = Feature{
+    .name = "sym32",
+    .description = "Symbols are 32 bit on Mips64",
+    .llvm_name = "sym32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useIndirectJumpHazard = Feature{
+    .name = "use-indirect-jump-hazard",
+    .description = "Use indirect jump guards to prevent certain speculation based attacks",
+    .llvm_name = "use-indirect-jump-hazard",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useTccInDiv = Feature{
+    .name = "use-tcc-in-div",
+    .description = "Force the assembler to use trapping",
+    .llvm_name = "use-tcc-in-div",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vfpu = Feature{
+    .name = "vfpu",
+    .description = "Enable vector FPU instructions",
+    .llvm_name = "vfpu",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_virt = Feature{
+    .name = "virt",
+    .description = "Mips Virtualization ASE",
+    .llvm_name = "virt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xgot = Feature{
+    .name = "xgot",
+    .description = "Assume 32-bit GOT",
+    .llvm_name = "xgot",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_p5600 = Feature{
+    .name = "p5600",
+    .description = "The P5600 Processor",
+    .llvm_name = "p5600",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_abs2008,
+    &feature_crc,
+    &feature_cnmips,
+    &feature_dsp,
+    &feature_dspr2,
+    &feature_dspr3,
+    &feature_eva,
+    &feature_fp64,
+    &feature_fpxx,
+    &feature_ginv,
+    &feature_gp64,
+    &feature_longCalls,
+    &feature_msa,
+    &feature_mt,
+    &feature_nomadd4,
+    &feature_micromips,
+    &feature_mips1,
+    &feature_mips2,
+    &feature_mips3,
+    &feature_mips3_32,
+    &feature_mips3_32r2,
+    &feature_mips4,
+    &feature_mips4_32,
+    &feature_mips4_32r2,
+    &feature_mips5,
+    &feature_mips5_32r2,
+    &feature_mips16,
+    &feature_mips32,
+    &feature_mips32r2,
+    &feature_mips32r3,
+    &feature_mips32r5,
+    &feature_mips32r6,
+    &feature_mips64,
+    &feature_mips64r2,
+    &feature_mips64r3,
+    &feature_mips64r5,
+    &feature_mips64r6,
+    &feature_nan2008,
+    &feature_noabicalls,
+    &feature_nooddspreg,
+    &feature_ptr64,
+    &feature_singleFloat,
+    &feature_softFloat,
+    &feature_sym32,
+    &feature_useIndirectJumpHazard,
+    &feature_useTccInDiv,
+    &feature_vfpu,
+    &feature_virt,
+    &feature_xgot,
+    &feature_p5600,
+};
+
+pub const cpu_mips1 = Cpu{
+    .name = "mips1",
+    .llvm_name = "mips1",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips1,
+    },
+};
+
+pub const cpu_mips2 = Cpu{
+    .name = "mips2",
+    .llvm_name = "mips2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips1,
+        &feature_mips2,
+    },
+};
+
+pub const cpu_mips3 = Cpu{
+    .name = "mips3",
+    .llvm_name = "mips3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips3,
+    },
+};
+
+pub const cpu_mips32 = Cpu{
+    .name = "mips32",
+    .llvm_name = "mips32",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32,
+        &feature_mips1,
+        &feature_mips32,
+    },
+};
+
+pub const cpu_mips32r2 = Cpu{
+    .name = "mips32r2",
+    .llvm_name = "mips32r2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_mips32r2,
+    },
+};
+
+pub const cpu_mips32r3 = Cpu{
+    .name = "mips32r3",
+    .llvm_name = "mips32r3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_mips32r3,
+    },
+};
+
+pub const cpu_mips32r5 = Cpu{
+    .name = "mips32r5",
+    .llvm_name = "mips32r5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_mips32r5,
+    },
+};
+
+pub const cpu_mips32r6 = Cpu{
+    .name = "mips32r6",
+    .llvm_name = "mips32r6",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_abs2008,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips32r6,
+    },
+};
+
+pub const cpu_mips4 = Cpu{
+    .name = "mips4",
+    .llvm_name = "mips4",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips4,
+    },
+};
+
+pub const cpu_mips5 = Cpu{
+    .name = "mips5",
+    .llvm_name = "mips5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips5,
+    },
+};
+
+pub const cpu_mips64 = Cpu{
+    .name = "mips64",
+    .llvm_name = "mips64",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips64,
+    },
+};
+
+pub const cpu_mips64r2 = Cpu{
+    .name = "mips64r2",
+    .llvm_name = "mips64r2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips64r2,
+    },
+};
+
+pub const cpu_mips64r3 = Cpu{
+    .name = "mips64r3",
+    .llvm_name = "mips64r3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips64r3,
+    },
+};
+
+pub const cpu_mips64r5 = Cpu{
+    .name = "mips64r5",
+    .llvm_name = "mips64r5",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips64r5,
+    },
+};
+
+pub const cpu_mips64r6 = Cpu{
+    .name = "mips64r6",
+    .llvm_name = "mips64r6",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_abs2008,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_mips64r6,
+    },
+};
+
+pub const cpu_octeon = Cpu{
+    .name = "octeon",
+    .llvm_name = "octeon",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_fp64,
+        &feature_cnmips,
+        &feature_mips64r2,
+    },
+};
+
+pub const cpu_p5600 = Cpu{
+    .name = "p5600",
+    .llvm_name = "p5600",
+    .subfeatures = &[_]*const Feature {
+        &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips1,
+        &feature_mips4_32r2,
+        &feature_mips5_32r2,
+        &feature_mips3_32,
+        &feature_p5600,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_mips1,
+    &cpu_mips2,
+    &cpu_mips3,
+    &cpu_mips32,
+    &cpu_mips32r2,
+    &cpu_mips32r3,
+    &cpu_mips32r5,
+    &cpu_mips32r6,
+    &cpu_mips4,
+    &cpu_mips5,
+    &cpu_mips64,
+    &cpu_mips64r2,
+    &cpu_mips64r3,
+    &cpu_mips64r5,
+    &cpu_mips64r6,
+    &cpu_octeon,
+    &cpu_p5600,
+};
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
new file mode 100644
index 0000000000000000000000000000000000000000..8a773328b2fe768baaeb4e649ba10ce949654e87
--- /dev/null
+++ b/lib/std/target/msp430.zig
@@ -0,0 +1,69 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_hwmult16 = Feature{
+    .name = "hwmult16",
+    .description = "Enable 16-bit hardware multiplier",
+    .llvm_name = "hwmult16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hwmult32 = Feature{
+    .name = "hwmult32",
+    .description = "Enable 32-bit hardware multiplier",
+    .llvm_name = "hwmult32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hwmultf5 = Feature{
+    .name = "hwmultf5",
+    .description = "Enable F5 series hardware multiplier",
+    .llvm_name = "hwmultf5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ext = Feature{
+    .name = "ext",
+    .description = "Enable MSP430-X extensions",
+    .llvm_name = "ext",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_hwmult16,
+    &feature_hwmult32,
+    &feature_hwmultf5,
+    &feature_ext,
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_msp430 = Cpu{
+    .name = "msp430",
+    .llvm_name = "msp430",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_msp430x = Cpu{
+    .name = "msp430x",
+    .llvm_name = "msp430x",
+    .subfeatures = &[_]*const Feature {
+        &feature_ext,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_generic,
+    &cpu_msp430,
+    &cpu_msp430x,
+};
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
new file mode 100644
index 0000000000000000000000000000000000000000..e978f64331b4708b5a60f026db73535565965814
--- /dev/null
+++ b/lib/std/target/nvptx.zig
@@ -0,0 +1,379 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_ptx32 = Feature{
+    .name = "ptx32",
+    .description = "Use PTX version 3.2",
+    .llvm_name = "ptx32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx40 = Feature{
+    .name = "ptx40",
+    .description = "Use PTX version 4.0",
+    .llvm_name = "ptx40",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx41 = Feature{
+    .name = "ptx41",
+    .description = "Use PTX version 4.1",
+    .llvm_name = "ptx41",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx42 = Feature{
+    .name = "ptx42",
+    .description = "Use PTX version 4.2",
+    .llvm_name = "ptx42",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx43 = Feature{
+    .name = "ptx43",
+    .description = "Use PTX version 4.3",
+    .llvm_name = "ptx43",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx50 = Feature{
+    .name = "ptx50",
+    .description = "Use PTX version 5.0",
+    .llvm_name = "ptx50",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx60 = Feature{
+    .name = "ptx60",
+    .description = "Use PTX version 6.0",
+    .llvm_name = "ptx60",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx61 = Feature{
+    .name = "ptx61",
+    .description = "Use PTX version 6.1",
+    .llvm_name = "ptx61",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx63 = Feature{
+    .name = "ptx63",
+    .description = "Use PTX version 6.3",
+    .llvm_name = "ptx63",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptx64 = Feature{
+    .name = "ptx64",
+    .description = "Use PTX version 6.4",
+    .llvm_name = "ptx64",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_20 = Feature{
+    .name = "sm_20",
+    .description = "Target SM 2.0",
+    .llvm_name = "sm_20",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_21 = Feature{
+    .name = "sm_21",
+    .description = "Target SM 2.1",
+    .llvm_name = "sm_21",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_30 = Feature{
+    .name = "sm_30",
+    .description = "Target SM 3.0",
+    .llvm_name = "sm_30",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_32 = Feature{
+    .name = "sm_32",
+    .description = "Target SM 3.2",
+    .llvm_name = "sm_32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_35 = Feature{
+    .name = "sm_35",
+    .description = "Target SM 3.5",
+    .llvm_name = "sm_35",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_37 = Feature{
+    .name = "sm_37",
+    .description = "Target SM 3.7",
+    .llvm_name = "sm_37",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_50 = Feature{
+    .name = "sm_50",
+    .description = "Target SM 5.0",
+    .llvm_name = "sm_50",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_52 = Feature{
+    .name = "sm_52",
+    .description = "Target SM 5.2",
+    .llvm_name = "sm_52",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_53 = Feature{
+    .name = "sm_53",
+    .description = "Target SM 5.3",
+    .llvm_name = "sm_53",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_60 = Feature{
+    .name = "sm_60",
+    .description = "Target SM 6.0",
+    .llvm_name = "sm_60",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_61 = Feature{
+    .name = "sm_61",
+    .description = "Target SM 6.1",
+    .llvm_name = "sm_61",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_62 = Feature{
+    .name = "sm_62",
+    .description = "Target SM 6.2",
+    .llvm_name = "sm_62",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_70 = Feature{
+    .name = "sm_70",
+    .description = "Target SM 7.0",
+    .llvm_name = "sm_70",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_72 = Feature{
+    .name = "sm_72",
+    .description = "Target SM 7.2",
+    .llvm_name = "sm_72",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sm_75 = Feature{
+    .name = "sm_75",
+    .description = "Target SM 7.5",
+    .llvm_name = "sm_75",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_ptx32,
+    &feature_ptx40,
+    &feature_ptx41,
+    &feature_ptx42,
+    &feature_ptx43,
+    &feature_ptx50,
+    &feature_ptx60,
+    &feature_ptx61,
+    &feature_ptx63,
+    &feature_ptx64,
+    &feature_sm_20,
+    &feature_sm_21,
+    &feature_sm_30,
+    &feature_sm_32,
+    &feature_sm_35,
+    &feature_sm_37,
+    &feature_sm_50,
+    &feature_sm_52,
+    &feature_sm_53,
+    &feature_sm_60,
+    &feature_sm_61,
+    &feature_sm_62,
+    &feature_sm_70,
+    &feature_sm_72,
+    &feature_sm_75,
+};
+
+pub const cpu_sm_20 = Cpu{
+    .name = "sm_20",
+    .llvm_name = "sm_20",
+    .subfeatures = &[_]*const Feature {
+        &feature_sm_20,
+    },
+};
+
+pub const cpu_sm_21 = Cpu{
+    .name = "sm_21",
+    .llvm_name = "sm_21",
+    .subfeatures = &[_]*const Feature {
+        &feature_sm_21,
+    },
+};
+
+pub const cpu_sm_30 = Cpu{
+    .name = "sm_30",
+    .llvm_name = "sm_30",
+    .subfeatures = &[_]*const Feature {
+        &feature_sm_30,
+    },
+};
+
+pub const cpu_sm_32 = Cpu{
+    .name = "sm_32",
+    .llvm_name = "sm_32",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx40,
+        &feature_sm_32,
+    },
+};
+
+pub const cpu_sm_35 = Cpu{
+    .name = "sm_35",
+    .llvm_name = "sm_35",
+    .subfeatures = &[_]*const Feature {
+        &feature_sm_35,
+    },
+};
+
+pub const cpu_sm_37 = Cpu{
+    .name = "sm_37",
+    .llvm_name = "sm_37",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx41,
+        &feature_sm_37,
+    },
+};
+
+pub const cpu_sm_50 = Cpu{
+    .name = "sm_50",
+    .llvm_name = "sm_50",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx40,
+        &feature_sm_50,
+    },
+};
+
+pub const cpu_sm_52 = Cpu{
+    .name = "sm_52",
+    .llvm_name = "sm_52",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx41,
+        &feature_sm_52,
+    },
+};
+
+pub const cpu_sm_53 = Cpu{
+    .name = "sm_53",
+    .llvm_name = "sm_53",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx42,
+        &feature_sm_53,
+    },
+};
+
+pub const cpu_sm_60 = Cpu{
+    .name = "sm_60",
+    .llvm_name = "sm_60",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx50,
+        &feature_sm_60,
+    },
+};
+
+pub const cpu_sm_61 = Cpu{
+    .name = "sm_61",
+    .llvm_name = "sm_61",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx50,
+        &feature_sm_61,
+    },
+};
+
+pub const cpu_sm_62 = Cpu{
+    .name = "sm_62",
+    .llvm_name = "sm_62",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx50,
+        &feature_sm_62,
+    },
+};
+
+pub const cpu_sm_70 = Cpu{
+    .name = "sm_70",
+    .llvm_name = "sm_70",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx60,
+        &feature_sm_70,
+    },
+};
+
+pub const cpu_sm_72 = Cpu{
+    .name = "sm_72",
+    .llvm_name = "sm_72",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx61,
+        &feature_sm_72,
+    },
+};
+
+pub const cpu_sm_75 = Cpu{
+    .name = "sm_75",
+    .llvm_name = "sm_75",
+    .subfeatures = &[_]*const Feature {
+        &feature_ptx63,
+        &feature_sm_75,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_sm_20,
+    &cpu_sm_21,
+    &cpu_sm_30,
+    &cpu_sm_32,
+    &cpu_sm_35,
+    &cpu_sm_37,
+    &cpu_sm_50,
+    &cpu_sm_52,
+    &cpu_sm_53,
+    &cpu_sm_60,
+    &cpu_sm_61,
+    &cpu_sm_62,
+    &cpu_sm_70,
+    &cpu_sm_72,
+    &cpu_sm_75,
+};
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
new file mode 100644
index 0000000000000000000000000000000000000000..49f92cdc1a445651b1adf2ef92c7d39a99a9ff9b
--- /dev/null
+++ b/lib/std/target/powerpc.zig
@@ -0,0 +1,1115 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_bit64 = Feature{
+    .name = "64bit",
+    .description = "Enable 64-bit instructions",
+    .llvm_name = "64bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bitregs64 = Feature{
+    .name = "64bitregs",
+    .description = "Enable 64-bit registers usage for ppc32 [beta]",
+    .llvm_name = "64bitregs",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_altivec = Feature{
+    .name = "altivec",
+    .description = "Enable Altivec instructions",
+    .llvm_name = "altivec",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_bpermd = Feature{
+    .name = "bpermd",
+    .description = "Enable the bpermd instruction",
+    .llvm_name = "bpermd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_booke = Feature{
+    .name = "booke",
+    .description = "Enable Book E instructions",
+    .llvm_name = "booke",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+    },
+};
+
+pub const feature_cmpb = Feature{
+    .name = "cmpb",
+    .description = "Enable the cmpb instruction",
+    .llvm_name = "cmpb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_crbits = Feature{
+    .name = "crbits",
+    .description = "Use condition-register bits individually",
+    .llvm_name = "crbits",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_directMove = Feature{
+    .name = "direct-move",
+    .description = "Enable Power8 direct move instructions",
+    .llvm_name = "direct-move",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_e500 = Feature{
+    .name = "e500",
+    .description = "Enable E500/E500mc instructions",
+    .llvm_name = "e500",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_extdiv = Feature{
+    .name = "extdiv",
+    .description = "Enable extended divide instructions",
+    .llvm_name = "extdiv",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fcpsgn = Feature{
+    .name = "fcpsgn",
+    .description = "Enable the fcpsgn instruction",
+    .llvm_name = "fcpsgn",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fpcvt = Feature{
+    .name = "fpcvt",
+    .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
+    .llvm_name = "fpcvt",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fprnd = Feature{
+    .name = "fprnd",
+    .description = "Enable the fri[mnpz] instructions",
+    .llvm_name = "fprnd",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fpu = Feature{
+    .name = "fpu",
+    .description = "Enable classic FPU instructions",
+    .llvm_name = "fpu",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fre = Feature{
+    .name = "fre",
+    .description = "Enable the fre instruction",
+    .llvm_name = "fre",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fres = Feature{
+    .name = "fres",
+    .description = "Enable the fres instruction",
+    .llvm_name = "fres",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_frsqrte = Feature{
+    .name = "frsqrte",
+    .description = "Enable the frsqrte instruction",
+    .llvm_name = "frsqrte",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_frsqrtes = Feature{
+    .name = "frsqrtes",
+    .description = "Enable the frsqrtes instruction",
+    .llvm_name = "frsqrtes",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_fsqrt = Feature{
+    .name = "fsqrt",
+    .description = "Enable the fsqrt instruction",
+    .llvm_name = "fsqrt",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_float128 = Feature{
+    .name = "float128",
+    .description = "Enable the __float128 data type for IEEE-754R Binary128.",
+    .llvm_name = "float128",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_htm = Feature{
+    .name = "htm",
+    .description = "Enable Hardware Transactional Memory instructions",
+    .llvm_name = "htm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hardFloat = Feature{
+    .name = "hard-float",
+    .description = "Enable floating-point instructions",
+    .llvm_name = "hard-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_icbt = Feature{
+    .name = "icbt",
+    .description = "Enable icbt instruction",
+    .llvm_name = "icbt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_isaV30Instructions = Feature{
+    .name = "isa-v30-instructions",
+    .description = "Enable instructions added in ISA 3.0.",
+    .llvm_name = "isa-v30-instructions",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_isel = Feature{
+    .name = "isel",
+    .description = "Enable the isel instruction",
+    .llvm_name = "isel",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_invariantFunctionDescriptors = Feature{
+    .name = "invariant-function-descriptors",
+    .description = "Assume function descriptors are invariant",
+    .llvm_name = "invariant-function-descriptors",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ldbrx = Feature{
+    .name = "ldbrx",
+    .description = "Enable the ldbrx instruction",
+    .llvm_name = "ldbrx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lfiwax = Feature{
+    .name = "lfiwax",
+    .description = "Enable the lfiwax instruction",
+    .llvm_name = "lfiwax",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_longcall = Feature{
+    .name = "longcall",
+    .description = "Always use indirect calls",
+    .llvm_name = "longcall",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mfocrf = Feature{
+    .name = "mfocrf",
+    .description = "Enable the MFOCRF instruction",
+    .llvm_name = "mfocrf",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_msync = Feature{
+    .name = "msync",
+    .description = "Has only the msync instruction instead of sync",
+    .llvm_name = "msync",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+    },
+};
+
+pub const feature_power8Altivec = Feature{
+    .name = "power8-altivec",
+    .description = "Enable POWER8 Altivec instructions",
+    .llvm_name = "power8-altivec",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_crypto = Feature{
+    .name = "crypto",
+    .description = "Enable POWER8 Crypto instructions",
+    .llvm_name = "crypto",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_power8Vector = Feature{
+    .name = "power8-vector",
+    .description = "Enable POWER8 vector instructions",
+    .llvm_name = "power8-vector",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_power9Altivec = Feature{
+    .name = "power9-altivec",
+    .description = "Enable POWER9 Altivec instructions",
+    .llvm_name = "power9-altivec",
+    .subfeatures = &[_]*const Feature {
+        &feature_isaV30Instructions,
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_power9Vector = Feature{
+    .name = "power9-vector",
+    .description = "Enable POWER9 vector instructions",
+    .llvm_name = "power9-vector",
+    .subfeatures = &[_]*const Feature {
+        &feature_isaV30Instructions,
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_popcntd = Feature{
+    .name = "popcntd",
+    .description = "Enable the popcnt[dw] instructions",
+    .llvm_name = "popcntd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ppc4xx = Feature{
+    .name = "ppc4xx",
+    .description = "Enable PPC 4xx instructions",
+    .llvm_name = "ppc4xx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ppc6xx = Feature{
+    .name = "ppc6xx",
+    .description = "Enable PPC 6xx instructions",
+    .llvm_name = "ppc6xx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ppcPostraSched = Feature{
+    .name = "ppc-postra-sched",
+    .description = "Use PowerPC post-RA scheduling strategy",
+    .llvm_name = "ppc-postra-sched",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ppcPreraSched = Feature{
+    .name = "ppc-prera-sched",
+    .description = "Use PowerPC pre-RA scheduling strategy",
+    .llvm_name = "ppc-prera-sched",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_partwordAtomics = Feature{
+    .name = "partword-atomics",
+    .description = "Enable l[bh]arx and st[bh]cx.",
+    .llvm_name = "partword-atomics",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_qpx = Feature{
+    .name = "qpx",
+    .description = "Enable QPX instructions",
+    .llvm_name = "qpx",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_recipprec = Feature{
+    .name = "recipprec",
+    .description = "Assume higher precision reciprocal estimates",
+    .llvm_name = "recipprec",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_spe = Feature{
+    .name = "spe",
+    .description = "Enable SPE instructions",
+    .llvm_name = "spe",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_stfiwx = Feature{
+    .name = "stfiwx",
+    .description = "Enable the stfiwx instruction",
+    .llvm_name = "stfiwx",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_securePlt = Feature{
+    .name = "secure-plt",
+    .description = "Enable secure plt mode",
+    .llvm_name = "secure-plt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowPopcntd = Feature{
+    .name = "slow-popcntd",
+    .description = "Has slow popcnt[dw] instructions",
+    .llvm_name = "slow-popcntd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_twoConstNr = Feature{
+    .name = "two-const-nr",
+    .description = "Requires two constant Newton-Raphson computation",
+    .llvm_name = "two-const-nr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vsx = Feature{
+    .name = "vsx",
+    .description = "Enable VSX instructions",
+    .llvm_name = "vsx",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const feature_vectorsUseTwoUnits = Feature{
+    .name = "vectors-use-two-units",
+    .description = "Vectors use two units",
+    .llvm_name = "vectors-use-two-units",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_bit64,
+    &feature_bitregs64,
+    &feature_altivec,
+    &feature_bpermd,
+    &feature_booke,
+    &feature_cmpb,
+    &feature_crbits,
+    &feature_directMove,
+    &feature_e500,
+    &feature_extdiv,
+    &feature_fcpsgn,
+    &feature_fpcvt,
+    &feature_fprnd,
+    &feature_fpu,
+    &feature_fre,
+    &feature_fres,
+    &feature_frsqrte,
+    &feature_frsqrtes,
+    &feature_fsqrt,
+    &feature_float128,
+    &feature_htm,
+    &feature_hardFloat,
+    &feature_icbt,
+    &feature_isaV30Instructions,
+    &feature_isel,
+    &feature_invariantFunctionDescriptors,
+    &feature_ldbrx,
+    &feature_lfiwax,
+    &feature_longcall,
+    &feature_mfocrf,
+    &feature_msync,
+    &feature_power8Altivec,
+    &feature_crypto,
+    &feature_power8Vector,
+    &feature_power9Altivec,
+    &feature_power9Vector,
+    &feature_popcntd,
+    &feature_ppc4xx,
+    &feature_ppc6xx,
+    &feature_ppcPostraSched,
+    &feature_ppcPreraSched,
+    &feature_partwordAtomics,
+    &feature_qpx,
+    &feature_recipprec,
+    &feature_spe,
+    &feature_stfiwx,
+    &feature_securePlt,
+    &feature_slowPopcntd,
+    &feature_twoConstNr,
+    &feature_vsx,
+    &feature_vectorsUseTwoUnits,
+};
+
+pub const cpu_440 = Cpu{
+    .name = "440",
+    .llvm_name = "440",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+        &feature_booke,
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_isel,
+        &feature_msync,
+    },
+};
+
+pub const cpu_450 = Cpu{
+    .name = "450",
+    .llvm_name = "450",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+        &feature_booke,
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_isel,
+        &feature_msync,
+    },
+};
+
+pub const cpu_601 = Cpu{
+    .name = "601",
+    .llvm_name = "601",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fpu,
+    },
+};
+
+pub const cpu_602 = Cpu{
+    .name = "602",
+    .llvm_name = "602",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fpu,
+    },
+};
+
+pub const cpu_603 = Cpu{
+    .name = "603",
+    .llvm_name = "603",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_e603 = Cpu{
+    .name = "603e",
+    .llvm_name = "603e",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_ev603 = Cpu{
+    .name = "603ev",
+    .llvm_name = "603ev",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_604 = Cpu{
+    .name = "604",
+    .llvm_name = "604",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_e604 = Cpu{
+    .name = "604e",
+    .llvm_name = "604e",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_620 = Cpu{
+    .name = "620",
+    .llvm_name = "620",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_7400 = Cpu{
+    .name = "7400",
+    .llvm_name = "7400",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_7450 = Cpu{
+    .name = "7450",
+    .llvm_name = "7450",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_750 = Cpu{
+    .name = "750",
+    .llvm_name = "750",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_970 = Cpu{
+    .name = "970",
+    .llvm_name = "970",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_a2 = Cpu{
+    .name = "a2",
+    .llvm_name = "a2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_icbt,
+        &feature_booke,
+        &feature_cmpb,
+        &feature_hardFloat,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_slowPopcntd,
+    },
+};
+
+pub const cpu_a2q = Cpu{
+    .name = "a2q",
+    .llvm_name = "a2q",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_icbt,
+        &feature_booke,
+        &feature_cmpb,
+        &feature_hardFloat,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_qpx,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_slowPopcntd,
+    },
+};
+
+pub const cpu_e500 = Cpu{
+    .name = "e500",
+    .llvm_name = "e500",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+        &feature_booke,
+        &feature_isel,
+    },
+};
+
+pub const cpu_e500mc = Cpu{
+    .name = "e500mc",
+    .llvm_name = "e500mc",
+    .subfeatures = &[_]*const Feature {
+        &feature_icbt,
+        &feature_booke,
+        &feature_isel,
+        &feature_hardFloat,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_e5500 = Cpu{
+    .name = "e5500",
+    .llvm_name = "e5500",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_icbt,
+        &feature_booke,
+        &feature_isel,
+        &feature_mfocrf,
+        &feature_hardFloat,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_g3 = Cpu{
+    .name = "g3",
+    .llvm_name = "g3",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_g4 = Cpu{
+    .name = "g4",
+    .llvm_name = "g4",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_g4Plus = Cpu{
+    .name = "g4+",
+    .llvm_name = "g4+",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+    },
+};
+
+pub const cpu_g5 = Cpu{
+    .name = "g5",
+    .llvm_name = "g5",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const cpu_ppc = Cpu{
+    .name = "ppc",
+    .llvm_name = "ppc",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const cpu_ppc32 = Cpu{
+    .name = "ppc32",
+    .llvm_name = "ppc32",
+    .subfeatures = &[_]*const Feature {
+        &feature_hardFloat,
+    },
+};
+
+pub const cpu_ppc64 = Cpu{
+    .name = "ppc64",
+    .llvm_name = "ppc64",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_ppc64le = Cpu{
+    .name = "ppc64le",
+    .llvm_name = "ppc64le",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_bpermd,
+        &feature_cmpb,
+        &feature_directMove,
+        &feature_extdiv,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_htm,
+        &feature_icbt,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_power8Altivec,
+        &feature_crypto,
+        &feature_power8Vector,
+        &feature_popcntd,
+        &feature_partwordAtomics,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_twoConstNr,
+        &feature_vsx,
+    },
+};
+
+pub const cpu_pwr3 = Cpu{
+    .name = "pwr3",
+    .llvm_name = "pwr3",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr4 = Cpu{
+    .name = "pwr4",
+    .llvm_name = "pwr4",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr5 = Cpu{
+    .name = "pwr5",
+    .llvm_name = "pwr5",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr5x = Cpu{
+    .name = "pwr5x",
+    .llvm_name = "pwr5x",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_mfocrf,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr6 = Cpu{
+    .name = "pwr6",
+    .llvm_name = "pwr6",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_cmpb,
+        &feature_fcpsgn,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_recipprec,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr6x = Cpu{
+    .name = "pwr6x",
+    .llvm_name = "pwr6x",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_cmpb,
+        &feature_fcpsgn,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_recipprec,
+        &feature_stfiwx,
+    },
+};
+
+pub const cpu_pwr7 = Cpu{
+    .name = "pwr7",
+    .llvm_name = "pwr7",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_bpermd,
+        &feature_cmpb,
+        &feature_extdiv,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_popcntd,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_twoConstNr,
+        &feature_vsx,
+    },
+};
+
+pub const cpu_pwr8 = Cpu{
+    .name = "pwr8",
+    .llvm_name = "pwr8",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_bpermd,
+        &feature_cmpb,
+        &feature_directMove,
+        &feature_extdiv,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_htm,
+        &feature_icbt,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_power8Altivec,
+        &feature_crypto,
+        &feature_power8Vector,
+        &feature_popcntd,
+        &feature_partwordAtomics,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_twoConstNr,
+        &feature_vsx,
+    },
+};
+
+pub const cpu_pwr9 = Cpu{
+    .name = "pwr9",
+    .llvm_name = "pwr9",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_hardFloat,
+        &feature_altivec,
+        &feature_bpermd,
+        &feature_cmpb,
+        &feature_directMove,
+        &feature_extdiv,
+        &feature_fcpsgn,
+        &feature_fpcvt,
+        &feature_fprnd,
+        &feature_fre,
+        &feature_fres,
+        &feature_frsqrte,
+        &feature_frsqrtes,
+        &feature_fsqrt,
+        &feature_htm,
+        &feature_icbt,
+        &feature_isaV30Instructions,
+        &feature_isel,
+        &feature_ldbrx,
+        &feature_lfiwax,
+        &feature_mfocrf,
+        &feature_power8Altivec,
+        &feature_crypto,
+        &feature_power8Vector,
+        &feature_power9Altivec,
+        &feature_power9Vector,
+        &feature_popcntd,
+        &feature_ppcPostraSched,
+        &feature_ppcPreraSched,
+        &feature_partwordAtomics,
+        &feature_recipprec,
+        &feature_stfiwx,
+        &feature_twoConstNr,
+        &feature_vsx,
+        &feature_vectorsUseTwoUnits,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_440,
+    &cpu_450,
+    &cpu_601,
+    &cpu_602,
+    &cpu_603,
+    &cpu_e603,
+    &cpu_ev603,
+    &cpu_604,
+    &cpu_e604,
+    &cpu_620,
+    &cpu_7400,
+    &cpu_7450,
+    &cpu_750,
+    &cpu_970,
+    &cpu_a2,
+    &cpu_a2q,
+    &cpu_e500,
+    &cpu_e500mc,
+    &cpu_e5500,
+    &cpu_g3,
+    &cpu_g4,
+    &cpu_g4Plus,
+    &cpu_g5,
+    &cpu_generic,
+    &cpu_ppc,
+    &cpu_ppc32,
+    &cpu_ppc64,
+    &cpu_ppc64le,
+    &cpu_pwr3,
+    &cpu_pwr4,
+    &cpu_pwr5,
+    &cpu_pwr5x,
+    &cpu_pwr6,
+    &cpu_pwr6x,
+    &cpu_pwr7,
+    &cpu_pwr8,
+    &cpu_pwr9,
+};
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
new file mode 100644
index 0000000000000000000000000000000000000000..6ed1012f215c8ac557ca2660f1460e1c160aa752
--- /dev/null
+++ b/lib/std/target/riscv.zig
@@ -0,0 +1,109 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_bit64 = Feature{
+    .name = "64bit",
+    .description = "Implements RV64",
+    .llvm_name = "64bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_e = Feature{
+    .name = "e",
+    .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
+    .llvm_name = "e",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rvcHints = Feature{
+    .name = "rvc-hints",
+    .description = "Enable RVC Hint Instructions.",
+    .llvm_name = "rvc-hints",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_relax = Feature{
+    .name = "relax",
+    .description = "Enable Linker relaxation.",
+    .llvm_name = "relax",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_a = Feature{
+    .name = "a",
+    .description = "'A' (Atomic Instructions)",
+    .llvm_name = "a",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_c = Feature{
+    .name = "c",
+    .description = "'C' (Compressed Instructions)",
+    .llvm_name = "c",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_d = Feature{
+    .name = "d",
+    .description = "'D' (Double-Precision Floating-Point)",
+    .llvm_name = "d",
+    .subfeatures = &[_]*const Feature {
+        &feature_f,
+    },
+};
+
+pub const feature_f = Feature{
+    .name = "f",
+    .description = "'F' (Single-Precision Floating-Point)",
+    .llvm_name = "f",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_m = Feature{
+    .name = "m",
+    .description = "'M' (Integer Multiplication and Division)",
+    .llvm_name = "m",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_bit64,
+    &feature_e,
+    &feature_rvcHints,
+    &feature_relax,
+    &feature_a,
+    &feature_c,
+    &feature_d,
+    &feature_f,
+    &feature_m,
+};
+
+pub const cpu_genericRv32 = Cpu{
+    .name = "generic-rv32",
+    .llvm_name = "generic-rv32",
+    .subfeatures = &[_]*const Feature {
+        &feature_rvcHints,
+    },
+};
+
+pub const cpu_genericRv64 = Cpu{
+    .name = "generic-rv64",
+    .llvm_name = "generic-rv64",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_rvcHints,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_genericRv32,
+    &cpu_genericRv64,
+};
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
new file mode 100644
index 0000000000000000000000000000000000000000..69c6208b2a086dd45538584524b025e863df7700
--- /dev/null
+++ b/lib/std/target/sparc.zig
@@ -0,0 +1,581 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_detectroundchange = Feature{
+    .name = "detectroundchange",
+    .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
+    .llvm_name = "detectroundchange",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hardQuadFloat = Feature{
+    .name = "hard-quad-float",
+    .description = "Enable quad-word floating point instructions",
+    .llvm_name = "hard-quad-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_leon = Feature{
+    .name = "leon",
+    .description = "Enable LEON extensions",
+    .llvm_name = "leon",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noFmuls = Feature{
+    .name = "no-fmuls",
+    .description = "Disable the fmuls instruction.",
+    .llvm_name = "no-fmuls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_noFsmuld = Feature{
+    .name = "no-fsmuld",
+    .description = "Disable the fsmuld instruction.",
+    .llvm_name = "no-fsmuld",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_leonpwrpsr = Feature{
+    .name = "leonpwrpsr",
+    .description = "Enable the PWRPSR instruction",
+    .llvm_name = "leonpwrpsr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_softFloat = Feature{
+    .name = "soft-float",
+    .description = "Use software emulation for floating point",
+    .llvm_name = "soft-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_softMulDiv = Feature{
+    .name = "soft-mul-div",
+    .description = "Use software emulation for integer multiply and divide",
+    .llvm_name = "soft-mul-div",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_deprecatedV8 = Feature{
+    .name = "deprecated-v8",
+    .description = "Enable deprecated V8 instructions in V9 mode",
+    .llvm_name = "deprecated-v8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_v9 = Feature{
+    .name = "v9",
+    .description = "Enable SPARC-V9 instructions",
+    .llvm_name = "v9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vis = Feature{
+    .name = "vis",
+    .description = "Enable UltraSPARC Visual Instruction Set extensions",
+    .llvm_name = "vis",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vis2 = Feature{
+    .name = "vis2",
+    .description = "Enable Visual Instruction Set extensions II",
+    .llvm_name = "vis2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vis3 = Feature{
+    .name = "vis3",
+    .description = "Enable Visual Instruction Set extensions III",
+    .llvm_name = "vis3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fixallfdivsqrt = Feature{
+    .name = "fixallfdivsqrt",
+    .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
+    .llvm_name = "fixallfdivsqrt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_insertnopload = Feature{
+    .name = "insertnopload",
+    .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
+    .llvm_name = "insertnopload",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hasleoncasa = Feature{
+    .name = "hasleoncasa",
+    .description = "Enable CASA instruction for LEON3 and LEON4 processors",
+    .llvm_name = "hasleoncasa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_leoncyclecounter = Feature{
+    .name = "leoncyclecounter",
+    .description = "Use the Leon cycle counter register",
+    .llvm_name = "leoncyclecounter",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_hasumacsmac = Feature{
+    .name = "hasumacsmac",
+    .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
+    .llvm_name = "hasumacsmac",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_popc = Feature{
+    .name = "popc",
+    .description = "Use the popc (population count) instruction",
+    .llvm_name = "popc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_detectroundchange,
+    &feature_hardQuadFloat,
+    &feature_leon,
+    &feature_noFmuls,
+    &feature_noFsmuld,
+    &feature_leonpwrpsr,
+    &feature_softFloat,
+    &feature_softMulDiv,
+    &feature_deprecatedV8,
+    &feature_v9,
+    &feature_vis,
+    &feature_vis2,
+    &feature_vis3,
+    &feature_fixallfdivsqrt,
+    &feature_insertnopload,
+    &feature_hasleoncasa,
+    &feature_leoncyclecounter,
+    &feature_hasumacsmac,
+    &feature_popc,
+};
+
+pub const cpu_at697e = Cpu{
+    .name = "at697e",
+    .llvm_name = "at697e",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_insertnopload,
+    },
+};
+
+pub const cpu_at697f = Cpu{
+    .name = "at697f",
+    .llvm_name = "at697f",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_insertnopload,
+    },
+};
+
+pub const cpu_f934 = Cpu{
+    .name = "f934",
+    .llvm_name = "f934",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_gr712rc = Cpu{
+    .name = "gr712rc",
+    .llvm_name = "gr712rc",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_gr740 = Cpu{
+    .name = "gr740",
+    .llvm_name = "gr740",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_leonpwrpsr,
+        &feature_hasleoncasa,
+        &feature_leoncyclecounter,
+        &feature_hasumacsmac,
+    },
+};
+
+pub const cpu_hypersparc = Cpu{
+    .name = "hypersparc",
+    .llvm_name = "hypersparc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_leon2 = Cpu{
+    .name = "leon2",
+    .llvm_name = "leon2",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+    },
+};
+
+pub const cpu_leon3 = Cpu{
+    .name = "leon3",
+    .llvm_name = "leon3",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasumacsmac,
+    },
+};
+
+pub const cpu_leon4 = Cpu{
+    .name = "leon4",
+    .llvm_name = "leon4",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+        &feature_hasumacsmac,
+    },
+};
+
+pub const cpu_ma2080 = Cpu{
+    .name = "ma2080",
+    .llvm_name = "ma2080",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2085 = Cpu{
+    .name = "ma2085",
+    .llvm_name = "ma2085",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2100 = Cpu{
+    .name = "ma2100",
+    .llvm_name = "ma2100",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2150 = Cpu{
+    .name = "ma2150",
+    .llvm_name = "ma2150",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2155 = Cpu{
+    .name = "ma2155",
+    .llvm_name = "ma2155",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2450 = Cpu{
+    .name = "ma2450",
+    .llvm_name = "ma2450",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2455 = Cpu{
+    .name = "ma2455",
+    .llvm_name = "ma2455",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2480 = Cpu{
+    .name = "ma2480",
+    .llvm_name = "ma2480",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2485 = Cpu{
+    .name = "ma2485",
+    .llvm_name = "ma2485",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2x5x = Cpu{
+    .name = "ma2x5x",
+    .llvm_name = "ma2x5x",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_ma2x8x = Cpu{
+    .name = "ma2x8x",
+    .llvm_name = "ma2x8x",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_myriad2 = Cpu{
+    .name = "myriad2",
+    .llvm_name = "myriad2",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_myriad21 = Cpu{
+    .name = "myriad2.1",
+    .llvm_name = "myriad2.1",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_myriad22 = Cpu{
+    .name = "myriad2.2",
+    .llvm_name = "myriad2.2",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_myriad23 = Cpu{
+    .name = "myriad2.3",
+    .llvm_name = "myriad2.3",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_hasleoncasa,
+    },
+};
+
+pub const cpu_niagara = Cpu{
+    .name = "niagara",
+    .llvm_name = "niagara",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+        &feature_vis2,
+    },
+};
+
+pub const cpu_niagara2 = Cpu{
+    .name = "niagara2",
+    .llvm_name = "niagara2",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+        &feature_vis2,
+        &feature_popc,
+    },
+};
+
+pub const cpu_niagara3 = Cpu{
+    .name = "niagara3",
+    .llvm_name = "niagara3",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+        &feature_vis2,
+        &feature_popc,
+    },
+};
+
+pub const cpu_niagara4 = Cpu{
+    .name = "niagara4",
+    .llvm_name = "niagara4",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+        &feature_vis2,
+        &feature_vis3,
+        &feature_popc,
+    },
+};
+
+pub const cpu_sparclet = Cpu{
+    .name = "sparclet",
+    .llvm_name = "sparclet",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_sparclite = Cpu{
+    .name = "sparclite",
+    .llvm_name = "sparclite",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_sparclite86x = Cpu{
+    .name = "sparclite86x",
+    .llvm_name = "sparclite86x",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_supersparc = Cpu{
+    .name = "supersparc",
+    .llvm_name = "supersparc",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_tsc701 = Cpu{
+    .name = "tsc701",
+    .llvm_name = "tsc701",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_ultrasparc = Cpu{
+    .name = "ultrasparc",
+    .llvm_name = "ultrasparc",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+    },
+};
+
+pub const cpu_ultrasparc3 = Cpu{
+    .name = "ultrasparc3",
+    .llvm_name = "ultrasparc3",
+    .subfeatures = &[_]*const Feature {
+        &feature_deprecatedV8,
+        &feature_v9,
+        &feature_vis,
+        &feature_vis2,
+    },
+};
+
+pub const cpu_ut699 = Cpu{
+    .name = "ut699",
+    .llvm_name = "ut699",
+    .subfeatures = &[_]*const Feature {
+        &feature_leon,
+        &feature_noFmuls,
+        &feature_noFsmuld,
+        &feature_fixallfdivsqrt,
+        &feature_insertnopload,
+    },
+};
+
+pub const cpu_v7 = Cpu{
+    .name = "v7",
+    .llvm_name = "v7",
+    .subfeatures = &[_]*const Feature {
+        &feature_noFsmuld,
+        &feature_softMulDiv,
+    },
+};
+
+pub const cpu_v8 = Cpu{
+    .name = "v8",
+    .llvm_name = "v8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_v9 = Cpu{
+    .name = "v9",
+    .llvm_name = "v9",
+    .subfeatures = &[_]*const Feature {
+        &feature_v9,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_at697e,
+    &cpu_at697f,
+    &cpu_f934,
+    &cpu_generic,
+    &cpu_gr712rc,
+    &cpu_gr740,
+    &cpu_hypersparc,
+    &cpu_leon2,
+    &cpu_leon3,
+    &cpu_leon4,
+    &cpu_ma2080,
+    &cpu_ma2085,
+    &cpu_ma2100,
+    &cpu_ma2150,
+    &cpu_ma2155,
+    &cpu_ma2450,
+    &cpu_ma2455,
+    &cpu_ma2480,
+    &cpu_ma2485,
+    &cpu_ma2x5x,
+    &cpu_ma2x8x,
+    &cpu_myriad2,
+    &cpu_myriad21,
+    &cpu_myriad22,
+    &cpu_myriad23,
+    &cpu_niagara,
+    &cpu_niagara2,
+    &cpu_niagara3,
+    &cpu_niagara4,
+    &cpu_sparclet,
+    &cpu_sparclite,
+    &cpu_sparclite86x,
+    &cpu_supersparc,
+    &cpu_tsc701,
+    &cpu_ultrasparc,
+    &cpu_ultrasparc3,
+    &cpu_ut699,
+    &cpu_v7,
+    &cpu_v8,
+    &cpu_v9,
+};
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
new file mode 100644
index 0000000000000000000000000000000000000000..03fb49ca5530e30fbf668612687aa0dbce3399c0
--- /dev/null
+++ b/lib/std/target/systemz.zig
@@ -0,0 +1,653 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_dfpPackedConversion = Feature{
+    .name = "dfp-packed-conversion",
+    .description = "Assume that the DFP packed-conversion facility is installed",
+    .llvm_name = "dfp-packed-conversion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_dfpZonedConversion = Feature{
+    .name = "dfp-zoned-conversion",
+    .description = "Assume that the DFP zoned-conversion facility is installed",
+    .llvm_name = "dfp-zoned-conversion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_deflateConversion = Feature{
+    .name = "deflate-conversion",
+    .description = "Assume that the deflate-conversion facility is installed",
+    .llvm_name = "deflate-conversion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_distinctOps = Feature{
+    .name = "distinct-ops",
+    .description = "Assume that the distinct-operands facility is installed",
+    .llvm_name = "distinct-ops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_enhancedDat2 = Feature{
+    .name = "enhanced-dat-2",
+    .description = "Assume that the enhanced-DAT facility 2 is installed",
+    .llvm_name = "enhanced-dat-2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_enhancedSort = Feature{
+    .name = "enhanced-sort",
+    .description = "Assume that the enhanced-sort facility is installed",
+    .llvm_name = "enhanced-sort",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_executionHint = Feature{
+    .name = "execution-hint",
+    .description = "Assume that the execution-hint facility is installed",
+    .llvm_name = "execution-hint",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fpExtension = Feature{
+    .name = "fp-extension",
+    .description = "Assume that the floating-point extension facility is installed",
+    .llvm_name = "fp-extension",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastSerialization = Feature{
+    .name = "fast-serialization",
+    .description = "Assume that the fast-serialization facility is installed",
+    .llvm_name = "fast-serialization",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_guardedStorage = Feature{
+    .name = "guarded-storage",
+    .description = "Assume that the guarded-storage facility is installed",
+    .llvm_name = "guarded-storage",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_highWord = Feature{
+    .name = "high-word",
+    .description = "Assume that the high-word facility is installed",
+    .llvm_name = "high-word",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_insertReferenceBitsMultiple = Feature{
+    .name = "insert-reference-bits-multiple",
+    .description = "Assume that the insert-reference-bits-multiple facility is installed",
+    .llvm_name = "insert-reference-bits-multiple",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_interlockedAccess1 = Feature{
+    .name = "interlocked-access1",
+    .description = "Assume that interlocked-access facility 1 is installed",
+    .llvm_name = "interlocked-access1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loadAndTrap = Feature{
+    .name = "load-and-trap",
+    .description = "Assume that the load-and-trap facility is installed",
+    .llvm_name = "load-and-trap",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loadAndZeroRightmostByte = Feature{
+    .name = "load-and-zero-rightmost-byte",
+    .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
+    .llvm_name = "load-and-zero-rightmost-byte",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loadStoreOnCond = Feature{
+    .name = "load-store-on-cond",
+    .description = "Assume that the load/store-on-condition facility is installed",
+    .llvm_name = "load-store-on-cond",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_loadStoreOnCond2 = Feature{
+    .name = "load-store-on-cond-2",
+    .description = "Assume that the load/store-on-condition facility 2 is installed",
+    .llvm_name = "load-store-on-cond-2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension3 = Feature{
+    .name = "message-security-assist-extension3",
+    .description = "Assume that the message-security-assist extension facility 3 is installed",
+    .llvm_name = "message-security-assist-extension3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension4 = Feature{
+    .name = "message-security-assist-extension4",
+    .description = "Assume that the message-security-assist extension facility 4 is installed",
+    .llvm_name = "message-security-assist-extension4",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension5 = Feature{
+    .name = "message-security-assist-extension5",
+    .description = "Assume that the message-security-assist extension facility 5 is installed",
+    .llvm_name = "message-security-assist-extension5",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension7 = Feature{
+    .name = "message-security-assist-extension7",
+    .description = "Assume that the message-security-assist extension facility 7 is installed",
+    .llvm_name = "message-security-assist-extension7",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension8 = Feature{
+    .name = "message-security-assist-extension8",
+    .description = "Assume that the message-security-assist extension facility 8 is installed",
+    .llvm_name = "message-security-assist-extension8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_messageSecurityAssistExtension9 = Feature{
+    .name = "message-security-assist-extension9",
+    .description = "Assume that the message-security-assist extension facility 9 is installed",
+    .llvm_name = "message-security-assist-extension9",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_miscellaneousExtensions = Feature{
+    .name = "miscellaneous-extensions",
+    .description = "Assume that the miscellaneous-extensions facility is installed",
+    .llvm_name = "miscellaneous-extensions",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_miscellaneousExtensions2 = Feature{
+    .name = "miscellaneous-extensions-2",
+    .description = "Assume that the miscellaneous-extensions facility 2 is installed",
+    .llvm_name = "miscellaneous-extensions-2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_miscellaneousExtensions3 = Feature{
+    .name = "miscellaneous-extensions-3",
+    .description = "Assume that the miscellaneous-extensions facility 3 is installed",
+    .llvm_name = "miscellaneous-extensions-3",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_populationCount = Feature{
+    .name = "population-count",
+    .description = "Assume that the population-count facility is installed",
+    .llvm_name = "population-count",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_processorAssist = Feature{
+    .name = "processor-assist",
+    .description = "Assume that the processor-assist facility is installed",
+    .llvm_name = "processor-assist",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_resetReferenceBitsMultiple = Feature{
+    .name = "reset-reference-bits-multiple",
+    .description = "Assume that the reset-reference-bits-multiple facility is installed",
+    .llvm_name = "reset-reference-bits-multiple",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_transactionalExecution = Feature{
+    .name = "transactional-execution",
+    .description = "Assume that the transactional-execution facility is installed",
+    .llvm_name = "transactional-execution",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vector = Feature{
+    .name = "vector",
+    .description = "Assume that the vectory facility is installed",
+    .llvm_name = "vector",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vectorEnhancements1 = Feature{
+    .name = "vector-enhancements-1",
+    .description = "Assume that the vector enhancements facility 1 is installed",
+    .llvm_name = "vector-enhancements-1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vectorEnhancements2 = Feature{
+    .name = "vector-enhancements-2",
+    .description = "Assume that the vector enhancements facility 2 is installed",
+    .llvm_name = "vector-enhancements-2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vectorPackedDecimal = Feature{
+    .name = "vector-packed-decimal",
+    .description = "Assume that the vector packed decimal facility is installed",
+    .llvm_name = "vector-packed-decimal",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vectorPackedDecimalEnhancement = Feature{
+    .name = "vector-packed-decimal-enhancement",
+    .description = "Assume that the vector packed decimal enhancement facility is installed",
+    .llvm_name = "vector-packed-decimal-enhancement",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_dfpPackedConversion,
+    &feature_dfpZonedConversion,
+    &feature_deflateConversion,
+    &feature_distinctOps,
+    &feature_enhancedDat2,
+    &feature_enhancedSort,
+    &feature_executionHint,
+    &feature_fpExtension,
+    &feature_fastSerialization,
+    &feature_guardedStorage,
+    &feature_highWord,
+    &feature_insertReferenceBitsMultiple,
+    &feature_interlockedAccess1,
+    &feature_loadAndTrap,
+    &feature_loadAndZeroRightmostByte,
+    &feature_loadStoreOnCond,
+    &feature_loadStoreOnCond2,
+    &feature_messageSecurityAssistExtension3,
+    &feature_messageSecurityAssistExtension4,
+    &feature_messageSecurityAssistExtension5,
+    &feature_messageSecurityAssistExtension7,
+    &feature_messageSecurityAssistExtension8,
+    &feature_messageSecurityAssistExtension9,
+    &feature_miscellaneousExtensions,
+    &feature_miscellaneousExtensions2,
+    &feature_miscellaneousExtensions3,
+    &feature_populationCount,
+    &feature_processorAssist,
+    &feature_resetReferenceBitsMultiple,
+    &feature_transactionalExecution,
+    &feature_vector,
+    &feature_vectorEnhancements1,
+    &feature_vectorEnhancements2,
+    &feature_vectorPackedDecimal,
+    &feature_vectorPackedDecimalEnhancement,
+};
+
+pub const cpu_arch10 = Cpu{
+    .name = "arch10",
+    .llvm_name = "arch10",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadStoreOnCond,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_miscellaneousExtensions,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+    },
+};
+
+pub const cpu_arch11 = Cpu{
+    .name = "arch11",
+    .llvm_name = "arch11",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_miscellaneousExtensions,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+    },
+};
+
+pub const cpu_arch12 = Cpu{
+    .name = "arch12",
+    .llvm_name = "arch12",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_guardedStorage,
+        &feature_highWord,
+        &feature_insertReferenceBitsMultiple,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_messageSecurityAssistExtension7,
+        &feature_messageSecurityAssistExtension8,
+        &feature_miscellaneousExtensions,
+        &feature_miscellaneousExtensions2,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+        &feature_vectorEnhancements1,
+        &feature_vectorPackedDecimal,
+    },
+};
+
+pub const cpu_arch13 = Cpu{
+    .name = "arch13",
+    .llvm_name = "arch13",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_deflateConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_enhancedSort,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_guardedStorage,
+        &feature_highWord,
+        &feature_insertReferenceBitsMultiple,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_messageSecurityAssistExtension7,
+        &feature_messageSecurityAssistExtension8,
+        &feature_messageSecurityAssistExtension9,
+        &feature_miscellaneousExtensions,
+        &feature_miscellaneousExtensions2,
+        &feature_miscellaneousExtensions3,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+        &feature_vectorEnhancements1,
+        &feature_vectorEnhancements2,
+        &feature_vectorPackedDecimal,
+        &feature_vectorPackedDecimalEnhancement,
+    },
+};
+
+pub const cpu_arch8 = Cpu{
+    .name = "arch8",
+    .llvm_name = "arch8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_arch9 = Cpu{
+    .name = "arch9",
+    .llvm_name = "arch9",
+    .subfeatures = &[_]*const Feature {
+        &feature_distinctOps,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadStoreOnCond,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_populationCount,
+        &feature_resetReferenceBitsMultiple,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_z10 = Cpu{
+    .name = "z10",
+    .llvm_name = "z10",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_z13 = Cpu{
+    .name = "z13",
+    .llvm_name = "z13",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_miscellaneousExtensions,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+    },
+};
+
+pub const cpu_z14 = Cpu{
+    .name = "z14",
+    .llvm_name = "z14",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_guardedStorage,
+        &feature_highWord,
+        &feature_insertReferenceBitsMultiple,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_messageSecurityAssistExtension7,
+        &feature_messageSecurityAssistExtension8,
+        &feature_miscellaneousExtensions,
+        &feature_miscellaneousExtensions2,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+        &feature_vectorEnhancements1,
+        &feature_vectorPackedDecimal,
+    },
+};
+
+pub const cpu_z15 = Cpu{
+    .name = "z15",
+    .llvm_name = "z15",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpPackedConversion,
+        &feature_dfpZonedConversion,
+        &feature_deflateConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_enhancedSort,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_guardedStorage,
+        &feature_highWord,
+        &feature_insertReferenceBitsMultiple,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadAndZeroRightmostByte,
+        &feature_loadStoreOnCond,
+        &feature_loadStoreOnCond2,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_messageSecurityAssistExtension5,
+        &feature_messageSecurityAssistExtension7,
+        &feature_messageSecurityAssistExtension8,
+        &feature_messageSecurityAssistExtension9,
+        &feature_miscellaneousExtensions,
+        &feature_miscellaneousExtensions2,
+        &feature_miscellaneousExtensions3,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+        &feature_vector,
+        &feature_vectorEnhancements1,
+        &feature_vectorEnhancements2,
+        &feature_vectorPackedDecimal,
+        &feature_vectorPackedDecimalEnhancement,
+    },
+};
+
+pub const cpu_z196 = Cpu{
+    .name = "z196",
+    .llvm_name = "z196",
+    .subfeatures = &[_]*const Feature {
+        &feature_distinctOps,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadStoreOnCond,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_populationCount,
+        &feature_resetReferenceBitsMultiple,
+    },
+};
+
+pub const cpu_zEC12 = Cpu{
+    .name = "zEC12",
+    .llvm_name = "zEC12",
+    .subfeatures = &[_]*const Feature {
+        &feature_dfpZonedConversion,
+        &feature_distinctOps,
+        &feature_enhancedDat2,
+        &feature_executionHint,
+        &feature_fpExtension,
+        &feature_fastSerialization,
+        &feature_highWord,
+        &feature_interlockedAccess1,
+        &feature_loadAndTrap,
+        &feature_loadStoreOnCond,
+        &feature_messageSecurityAssistExtension3,
+        &feature_messageSecurityAssistExtension4,
+        &feature_miscellaneousExtensions,
+        &feature_populationCount,
+        &feature_processorAssist,
+        &feature_resetReferenceBitsMultiple,
+        &feature_transactionalExecution,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_arch10,
+    &cpu_arch11,
+    &cpu_arch12,
+    &cpu_arch13,
+    &cpu_arch8,
+    &cpu_arch9,
+    &cpu_generic,
+    &cpu_z10,
+    &cpu_z13,
+    &cpu_z14,
+    &cpu_z15,
+    &cpu_z196,
+    &cpu_zEC12,
+};
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
new file mode 100644
index 0000000000000000000000000000000000000000..ba41b622a469aa9f906a4b462e87f3499cbfef30
--- /dev/null
+++ b/lib/std/target/wasm.zig
@@ -0,0 +1,128 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_atomics = Feature{
+    .name = "atomics",
+    .description = "Enable Atomics",
+    .llvm_name = "atomics",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bulkMemory = Feature{
+    .name = "bulk-memory",
+    .description = "Enable bulk memory operations",
+    .llvm_name = "bulk-memory",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_exceptionHandling = Feature{
+    .name = "exception-handling",
+    .description = "Enable Wasm exception handling",
+    .llvm_name = "exception-handling",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_multivalue = Feature{
+    .name = "multivalue",
+    .description = "Enable multivalue blocks, instructions, and functions",
+    .llvm_name = "multivalue",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mutableGlobals = Feature{
+    .name = "mutable-globals",
+    .description = "Enable mutable globals",
+    .llvm_name = "mutable-globals",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nontrappingFptoint = Feature{
+    .name = "nontrapping-fptoint",
+    .description = "Enable non-trapping float-to-int conversion operators",
+    .llvm_name = "nontrapping-fptoint",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_simd128 = Feature{
+    .name = "simd128",
+    .description = "Enable 128-bit SIMD",
+    .llvm_name = "simd128",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_signExt = Feature{
+    .name = "sign-ext",
+    .description = "Enable sign extension operators",
+    .llvm_name = "sign-ext",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tailCall = Feature{
+    .name = "tail-call",
+    .description = "Enable tail call instructions",
+    .llvm_name = "tail-call",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_unimplementedSimd128 = Feature{
+    .name = "unimplemented-simd128",
+    .description = "Enable 128-bit SIMD not yet implemented in engines",
+    .llvm_name = "unimplemented-simd128",
+    .subfeatures = &[_]*const Feature {
+        &feature_simd128,
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_atomics,
+    &feature_bulkMemory,
+    &feature_exceptionHandling,
+    &feature_multivalue,
+    &feature_mutableGlobals,
+    &feature_nontrappingFptoint,
+    &feature_simd128,
+    &feature_signExt,
+    &feature_tailCall,
+    &feature_unimplementedSimd128,
+};
+
+pub const cpu_bleedingEdge = Cpu{
+    .name = "bleeding-edge",
+    .llvm_name = "bleeding-edge",
+    .subfeatures = &[_]*const Feature {
+        &feature_atomics,
+        &feature_mutableGlobals,
+        &feature_nontrappingFptoint,
+        &feature_simd128,
+        &feature_signExt,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_mvp = Cpu{
+    .name = "mvp",
+    .llvm_name = "mvp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_bleedingEdge,
+    &cpu_generic,
+    &cpu_mvp,
+};
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
new file mode 100644
index 0000000000000000000000000000000000000000..c6497112bb884777e1e4f19e32ae152091eee090
--- /dev/null
+++ b/lib/std/target/x86.zig
@@ -0,0 +1,3427 @@
+const Feature = @import("std").target.Feature;
+const Cpu = @import("std").target.Cpu;
+
+pub const feature_dnow3 = Feature{
+    .name = "3dnow",
+    .description = "Enable 3DNow! instructions",
+    .llvm_name = "3dnow",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+    },
+};
+
+pub const feature_dnowa3 = Feature{
+    .name = "3dnowa",
+    .description = "Enable 3DNow! Athlon instructions",
+    .llvm_name = "3dnowa",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+    },
+};
+
+pub const feature_bit64 = Feature{
+    .name = "64bit",
+    .description = "Support 64-bit instructions",
+    .llvm_name = "64bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_adx = Feature{
+    .name = "adx",
+    .description = "Support ADX instructions",
+    .llvm_name = "adx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_aes = Feature{
+    .name = "aes",
+    .description = "Enable AES instructions",
+    .llvm_name = "aes",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx = Feature{
+    .name = "avx",
+    .description = "Enable AVX instructions",
+    .llvm_name = "avx",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx2 = Feature{
+    .name = "avx2",
+    .description = "Enable AVX2 instructions",
+    .llvm_name = "avx2",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512f = Feature{
+    .name = "avx512f",
+    .description = "Enable AVX-512 instructions",
+    .llvm_name = "avx512f",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512bf16 = Feature{
+    .name = "avx512bf16",
+    .description = "Support bfloat16 floating point",
+    .llvm_name = "avx512bf16",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512bitalg = Feature{
+    .name = "avx512bitalg",
+    .description = "Enable AVX-512 Bit Algorithms",
+    .llvm_name = "avx512bitalg",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_bmi = Feature{
+    .name = "bmi",
+    .description = "Support BMI instructions",
+    .llvm_name = "bmi",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bmi2 = Feature{
+    .name = "bmi2",
+    .description = "Support BMI2 instructions",
+    .llvm_name = "bmi2",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avx512bw = Feature{
+    .name = "avx512bw",
+    .description = "Enable AVX-512 Byte and Word Instructions",
+    .llvm_name = "avx512bw",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_branchfusion = Feature{
+    .name = "branchfusion",
+    .description = "CMP/TEST can be fused with conditional branches",
+    .llvm_name = "branchfusion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avx512cd = Feature{
+    .name = "avx512cd",
+    .description = "Enable AVX-512 Conflict Detection Instructions",
+    .llvm_name = "avx512cd",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_cldemote = Feature{
+    .name = "cldemote",
+    .description = "Enable Cache Demote",
+    .llvm_name = "cldemote",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_clflushopt = Feature{
+    .name = "clflushopt",
+    .description = "Flush A Cache Line Optimized",
+    .llvm_name = "clflushopt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_clwb = Feature{
+    .name = "clwb",
+    .description = "Cache Line Write Back",
+    .llvm_name = "clwb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_clzero = Feature{
+    .name = "clzero",
+    .description = "Enable Cache Line Zero",
+    .llvm_name = "clzero",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cmov = Feature{
+    .name = "cmov",
+    .description = "Enable conditional move instructions",
+    .llvm_name = "cmov",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cx8 = Feature{
+    .name = "cx8",
+    .description = "Support CMPXCHG8B instructions",
+    .llvm_name = "cx8",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_cx16 = Feature{
+    .name = "cx16",
+    .description = "64-bit with cmpxchg16b",
+    .llvm_name = "cx16",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+    },
+};
+
+pub const feature_avx512dq = Feature{
+    .name = "avx512dq",
+    .description = "Enable AVX-512 Doubleword and Quadword Instructions",
+    .llvm_name = "avx512dq",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_mpx = Feature{
+    .name = "mpx",
+    .description = "Deprecated. Support MPX instructions",
+    .llvm_name = "mpx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_enqcmd = Feature{
+    .name = "enqcmd",
+    .description = "Has ENQCMD instructions",
+    .llvm_name = "enqcmd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avx512er = Feature{
+    .name = "avx512er",
+    .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
+    .llvm_name = "avx512er",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_ermsb = Feature{
+    .name = "ermsb",
+    .description = "REP MOVS/STOS are fast",
+    .llvm_name = "ermsb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_f16c = Feature{
+    .name = "f16c",
+    .description = "Support 16-bit floating point conversion instructions",
+    .llvm_name = "f16c",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_fma = Feature{
+    .name = "fma",
+    .description = "Enable three-operand fused multiple-add",
+    .llvm_name = "fma",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_fma4 = Feature{
+    .name = "fma4",
+    .description = "Enable four-operand fused multiple-add",
+    .llvm_name = "fma4",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_fsgsbase = Feature{
+    .name = "fsgsbase",
+    .description = "Support FS/GS Base instructions",
+    .llvm_name = "fsgsbase",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fxsr = Feature{
+    .name = "fxsr",
+    .description = "Support fxsave/fxrestore instructions",
+    .llvm_name = "fxsr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fast11bytenop = Feature{
+    .name = "fast-11bytenop",
+    .description = "Target can quickly decode up to 11 byte NOPs",
+    .llvm_name = "fast-11bytenop",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fast15bytenop = Feature{
+    .name = "fast-15bytenop",
+    .description = "Target can quickly decode up to 15 byte NOPs",
+    .llvm_name = "fast-15bytenop",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastBextr = Feature{
+    .name = "fast-bextr",
+    .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
+    .llvm_name = "fast-bextr",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastHops = Feature{
+    .name = "fast-hops",
+    .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
+    .llvm_name = "fast-hops",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_fastLzcnt = Feature{
+    .name = "fast-lzcnt",
+    .description = "LZCNT instructions are as fast as most simple integer ops",
+    .llvm_name = "fast-lzcnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastPartialYmmOrZmmWrite = Feature{
+    .name = "fast-partial-ymm-or-zmm-write",
+    .description = "Partial writes to YMM/ZMM registers are fast",
+    .llvm_name = "fast-partial-ymm-or-zmm-write",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastShldRotate = Feature{
+    .name = "fast-shld-rotate",
+    .description = "SHLD can be used as a faster rotate",
+    .llvm_name = "fast-shld-rotate",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastScalarFsqrt = Feature{
+    .name = "fast-scalar-fsqrt",
+    .description = "Scalar SQRT is fast (disable Newton-Raphson)",
+    .llvm_name = "fast-scalar-fsqrt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastScalarShiftMasks = Feature{
+    .name = "fast-scalar-shift-masks",
+    .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
+    .llvm_name = "fast-scalar-shift-masks",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastVariableShuffle = Feature{
+    .name = "fast-variable-shuffle",
+    .description = "Shuffles with variable masks are fast",
+    .llvm_name = "fast-variable-shuffle",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastVectorFsqrt = Feature{
+    .name = "fast-vector-fsqrt",
+    .description = "Vector SQRT is fast (disable Newton-Raphson)",
+    .llvm_name = "fast-vector-fsqrt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_fastVectorShiftMasks = Feature{
+    .name = "fast-vector-shift-masks",
+    .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
+    .llvm_name = "fast-vector-shift-masks",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_gfni = Feature{
+    .name = "gfni",
+    .description = "Enable Galois Field Arithmetic Instructions",
+    .llvm_name = "gfni",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_fastGather = Feature{
+    .name = "fast-gather",
+    .description = "Indicates if gather is reasonably fast",
+    .llvm_name = "fast-gather",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avx512ifma = Feature{
+    .name = "avx512ifma",
+    .description = "Enable AVX-512 Integer Fused Multiple-Add",
+    .llvm_name = "avx512ifma",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_invpcid = Feature{
+    .name = "invpcid",
+    .description = "Invalidate Process-Context Identifier",
+    .llvm_name = "invpcid",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sahf = Feature{
+    .name = "sahf",
+    .description = "Support LAHF and SAHF instructions",
+    .llvm_name = "sahf",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_leaSp = Feature{
+    .name = "lea-sp",
+    .description = "Use LEA for adjusting the stack pointer",
+    .llvm_name = "lea-sp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_leaUsesAg = Feature{
+    .name = "lea-uses-ag",
+    .description = "LEA instruction needs inputs at AG stage",
+    .llvm_name = "lea-uses-ag",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lwp = Feature{
+    .name = "lwp",
+    .description = "Enable LWP instructions",
+    .llvm_name = "lwp",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_lzcnt = Feature{
+    .name = "lzcnt",
+    .description = "Support LZCNT instruction",
+    .llvm_name = "lzcnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_falseDepsLzcntTzcnt = Feature{
+    .name = "false-deps-lzcnt-tzcnt",
+    .description = "LZCNT/TZCNT have a false dependency on dest register",
+    .llvm_name = "false-deps-lzcnt-tzcnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mmx = Feature{
+    .name = "mmx",
+    .description = "Enable MMX instructions",
+    .llvm_name = "mmx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_movbe = Feature{
+    .name = "movbe",
+    .description = "Support MOVBE instruction",
+    .llvm_name = "movbe",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_movdir64b = Feature{
+    .name = "movdir64b",
+    .description = "Support movdir64b instruction",
+    .llvm_name = "movdir64b",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_movdiri = Feature{
+    .name = "movdiri",
+    .description = "Support movdiri instruction",
+    .llvm_name = "movdiri",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mwaitx = Feature{
+    .name = "mwaitx",
+    .description = "Enable MONITORX/MWAITX timer functionality",
+    .llvm_name = "mwaitx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_macrofusion = Feature{
+    .name = "macrofusion",
+    .description = "Various instructions can be fused with conditional branches",
+    .llvm_name = "macrofusion",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_mergeToThreewayBranch = Feature{
+    .name = "merge-to-threeway-branch",
+    .description = "Merge branches to a three-way conditional branch",
+    .llvm_name = "merge-to-threeway-branch",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_nopl = Feature{
+    .name = "nopl",
+    .description = "Enable NOPL instruction",
+    .llvm_name = "nopl",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_pclmul = Feature{
+    .name = "pclmul",
+    .description = "Enable packed carry-less multiplication instructions",
+    .llvm_name = "pclmul",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_pconfig = Feature{
+    .name = "pconfig",
+    .description = "platform configuration instruction",
+    .llvm_name = "pconfig",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_avx512pf = Feature{
+    .name = "avx512pf",
+    .description = "Enable AVX-512 PreFetch Instructions",
+    .llvm_name = "avx512pf",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_pku = Feature{
+    .name = "pku",
+    .description = "Enable protection keys",
+    .llvm_name = "pku",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_popcnt = Feature{
+    .name = "popcnt",
+    .description = "Support POPCNT instruction",
+    .llvm_name = "popcnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_falseDepsPopcnt = Feature{
+    .name = "false-deps-popcnt",
+    .description = "POPCNT has a false dependency on dest register",
+    .llvm_name = "false-deps-popcnt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_prefetchwt1 = Feature{
+    .name = "prefetchwt1",
+    .description = "Prefetch with Intent to Write and T1 Hint",
+    .llvm_name = "prefetchwt1",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_prfchw = Feature{
+    .name = "prfchw",
+    .description = "Support PRFCHW instructions",
+    .llvm_name = "prfchw",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ptwrite = Feature{
+    .name = "ptwrite",
+    .description = "Support ptwrite instruction",
+    .llvm_name = "ptwrite",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_padShortFunctions = Feature{
+    .name = "pad-short-functions",
+    .description = "Pad short functions",
+    .llvm_name = "pad-short-functions",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_prefer128Bit = Feature{
+    .name = "prefer-128-bit",
+    .description = "Prefer 128-bit AVX instructions",
+    .llvm_name = "prefer-128-bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_prefer256Bit = Feature{
+    .name = "prefer-256-bit",
+    .description = "Prefer 256-bit AVX instructions",
+    .llvm_name = "prefer-256-bit",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rdpid = Feature{
+    .name = "rdpid",
+    .description = "Support RDPID instructions",
+    .llvm_name = "rdpid",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rdrnd = Feature{
+    .name = "rdrnd",
+    .description = "Support RDRAND instruction",
+    .llvm_name = "rdrnd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rdseed = Feature{
+    .name = "rdseed",
+    .description = "Support RDSEED instruction",
+    .llvm_name = "rdseed",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_rtm = Feature{
+    .name = "rtm",
+    .description = "Support RTM instructions",
+    .llvm_name = "rtm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_retpoline = Feature{
+    .name = "retpoline",
+    .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
+    .llvm_name = "retpoline",
+    .subfeatures = &[_]*const Feature {
+        &feature_retpolineIndirectCalls,
+        &feature_retpolineIndirectBranches,
+    },
+};
+
+pub const feature_retpolineExternalThunk = Feature{
+    .name = "retpoline-external-thunk",
+    .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
+    .llvm_name = "retpoline-external-thunk",
+    .subfeatures = &[_]*const Feature {
+        &feature_retpolineIndirectCalls,
+    },
+};
+
+pub const feature_retpolineIndirectBranches = Feature{
+    .name = "retpoline-indirect-branches",
+    .description = "Remove speculation of indirect branches from the generated code",
+    .llvm_name = "retpoline-indirect-branches",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_retpolineIndirectCalls = Feature{
+    .name = "retpoline-indirect-calls",
+    .description = "Remove speculation of indirect calls from the generated code",
+    .llvm_name = "retpoline-indirect-calls",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sgx = Feature{
+    .name = "sgx",
+    .description = "Enable Software Guard Extensions",
+    .llvm_name = "sgx",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sha = Feature{
+    .name = "sha",
+    .description = "Enable SHA instructions",
+    .llvm_name = "sha",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_shstk = Feature{
+    .name = "shstk",
+    .description = "Support CET Shadow-Stack instructions",
+    .llvm_name = "shstk",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sse = Feature{
+    .name = "sse",
+    .description = "Enable SSE instructions",
+    .llvm_name = "sse",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_sse2 = Feature{
+    .name = "sse2",
+    .description = "Enable SSE2 instructions",
+    .llvm_name = "sse2",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_sse3 = Feature{
+    .name = "sse3",
+    .description = "Enable SSE3 instructions",
+    .llvm_name = "sse3",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_sse4a = Feature{
+    .name = "sse4a",
+    .description = "Support SSE 4a instructions",
+    .llvm_name = "sse4a",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_sse41 = Feature{
+    .name = "sse4.1",
+    .description = "Enable SSE 4.1 instructions",
+    .llvm_name = "sse4.1",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_sse42 = Feature{
+    .name = "sse4.2",
+    .description = "Enable SSE 4.2 instructions",
+    .llvm_name = "sse4.2",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_sseUnalignedMem = Feature{
+    .name = "sse-unaligned-mem",
+    .description = "Allow unaligned memory operands with SSE instructions",
+    .llvm_name = "sse-unaligned-mem",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_ssse3 = Feature{
+    .name = "ssse3",
+    .description = "Enable SSSE3 instructions",
+    .llvm_name = "ssse3",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_slow3opsLea = Feature{
+    .name = "slow-3ops-lea",
+    .description = "LEA instruction with 3 ops or certain registers is slow",
+    .llvm_name = "slow-3ops-lea",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_idivlToDivb = Feature{
+    .name = "idivl-to-divb",
+    .description = "Use 8-bit divide for positive values less than 256",
+    .llvm_name = "idivl-to-divb",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_idivqToDivl = Feature{
+    .name = "idivq-to-divl",
+    .description = "Use 32-bit divide for positive values less than 2^32",
+    .llvm_name = "idivq-to-divl",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowIncdec = Feature{
+    .name = "slow-incdec",
+    .description = "INC and DEC instructions are slower than ADD and SUB",
+    .llvm_name = "slow-incdec",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowLea = Feature{
+    .name = "slow-lea",
+    .description = "LEA instruction with certain arguments is slow",
+    .llvm_name = "slow-lea",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowPmaddwd = Feature{
+    .name = "slow-pmaddwd",
+    .description = "PMADDWD is slower than PMULLD",
+    .llvm_name = "slow-pmaddwd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowPmulld = Feature{
+    .name = "slow-pmulld",
+    .description = "PMULLD instruction is slow",
+    .llvm_name = "slow-pmulld",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowShld = Feature{
+    .name = "slow-shld",
+    .description = "SHLD instruction is slow",
+    .llvm_name = "slow-shld",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowTwoMemOps = Feature{
+    .name = "slow-two-mem-ops",
+    .description = "Two memory operand instructions are slow",
+    .llvm_name = "slow-two-mem-ops",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowUnalignedMem16 = Feature{
+    .name = "slow-unaligned-mem-16",
+    .description = "Slow unaligned 16-byte memory access",
+    .llvm_name = "slow-unaligned-mem-16",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_slowUnalignedMem32 = Feature{
+    .name = "slow-unaligned-mem-32",
+    .description = "Slow unaligned 32-byte memory access",
+    .llvm_name = "slow-unaligned-mem-32",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_softFloat = Feature{
+    .name = "soft-float",
+    .description = "Use software floating point features",
+    .llvm_name = "soft-float",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_tbm = Feature{
+    .name = "tbm",
+    .description = "Enable TBM instructions",
+    .llvm_name = "tbm",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_useAa = Feature{
+    .name = "use-aa",
+    .description = "Use alias analysis during codegen",
+    .llvm_name = "use-aa",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_vaes = Feature{
+    .name = "vaes",
+    .description = "Promote selected AES instructions to AVX512/AVX registers",
+    .llvm_name = "vaes",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vbmi = Feature{
+    .name = "avx512vbmi",
+    .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
+    .llvm_name = "avx512vbmi",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vbmi2 = Feature{
+    .name = "avx512vbmi2",
+    .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
+    .llvm_name = "avx512vbmi2",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vl = Feature{
+    .name = "avx512vl",
+    .description = "Enable AVX-512 Vector Length eXtensions",
+    .llvm_name = "avx512vl",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vnni = Feature{
+    .name = "avx512vnni",
+    .description = "Enable AVX-512 Vector Neural Network Instructions",
+    .llvm_name = "avx512vnni",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vp2intersect = Feature{
+    .name = "avx512vp2intersect",
+    .description = "Enable AVX-512 vp2intersect",
+    .llvm_name = "avx512vp2intersect",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_vpclmulqdq = Feature{
+    .name = "vpclmulqdq",
+    .description = "Enable vpclmulqdq instructions",
+    .llvm_name = "vpclmulqdq",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_avx512vpopcntdq = Feature{
+    .name = "avx512vpopcntdq",
+    .description = "Enable AVX-512 Population Count Instructions",
+    .llvm_name = "avx512vpopcntdq",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_waitpkg = Feature{
+    .name = "waitpkg",
+    .description = "Wait and pause enhancements",
+    .llvm_name = "waitpkg",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_wbnoinvd = Feature{
+    .name = "wbnoinvd",
+    .description = "Write Back No Invalidate",
+    .llvm_name = "wbnoinvd",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_x87 = Feature{
+    .name = "x87",
+    .description = "Enable X87 float instructions",
+    .llvm_name = "x87",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xop = Feature{
+    .name = "xop",
+    .description = "Enable XOP instructions",
+    .llvm_name = "xop",
+    .subfeatures = &[_]*const Feature {
+        &feature_sse,
+    },
+};
+
+pub const feature_xsave = Feature{
+    .name = "xsave",
+    .description = "Support xsave instructions",
+    .llvm_name = "xsave",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xsavec = Feature{
+    .name = "xsavec",
+    .description = "Support xsavec instructions",
+    .llvm_name = "xsavec",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xsaveopt = Feature{
+    .name = "xsaveopt",
+    .description = "Support xsaveopt instructions",
+    .llvm_name = "xsaveopt",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_xsaves = Feature{
+    .name = "xsaves",
+    .description = "Support xsaves instructions",
+    .llvm_name = "xsaves",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bitMode16 = Feature{
+    .name = "16bit-mode",
+    .description = "16-bit mode (i8086)",
+    .llvm_name = "16bit-mode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bitMode32 = Feature{
+    .name = "32bit-mode",
+    .description = "32-bit mode (80386)",
+    .llvm_name = "32bit-mode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const feature_bitMode64 = Feature{
+    .name = "64bit-mode",
+    .description = "64-bit mode (x86_64)",
+    .llvm_name = "64bit-mode",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const features = &[_]*const Feature {
+    &feature_dnow3,
+    &feature_dnowa3,
+    &feature_bit64,
+    &feature_adx,
+    &feature_aes,
+    &feature_avx,
+    &feature_avx2,
+    &feature_avx512f,
+    &feature_avx512bf16,
+    &feature_avx512bitalg,
+    &feature_bmi,
+    &feature_bmi2,
+    &feature_avx512bw,
+    &feature_branchfusion,
+    &feature_avx512cd,
+    &feature_cldemote,
+    &feature_clflushopt,
+    &feature_clwb,
+    &feature_clzero,
+    &feature_cmov,
+    &feature_cx8,
+    &feature_cx16,
+    &feature_avx512dq,
+    &feature_mpx,
+    &feature_enqcmd,
+    &feature_avx512er,
+    &feature_ermsb,
+    &feature_f16c,
+    &feature_fma,
+    &feature_fma4,
+    &feature_fsgsbase,
+    &feature_fxsr,
+    &feature_fast11bytenop,
+    &feature_fast15bytenop,
+    &feature_fastBextr,
+    &feature_fastHops,
+    &feature_fastLzcnt,
+    &feature_fastPartialYmmOrZmmWrite,
+    &feature_fastShldRotate,
+    &feature_fastScalarFsqrt,
+    &feature_fastScalarShiftMasks,
+    &feature_fastVariableShuffle,
+    &feature_fastVectorFsqrt,
+    &feature_fastVectorShiftMasks,
+    &feature_gfni,
+    &feature_fastGather,
+    &feature_avx512ifma,
+    &feature_invpcid,
+    &feature_sahf,
+    &feature_leaSp,
+    &feature_leaUsesAg,
+    &feature_lwp,
+    &feature_lzcnt,
+    &feature_falseDepsLzcntTzcnt,
+    &feature_mmx,
+    &feature_movbe,
+    &feature_movdir64b,
+    &feature_movdiri,
+    &feature_mwaitx,
+    &feature_macrofusion,
+    &feature_mergeToThreewayBranch,
+    &feature_nopl,
+    &feature_pclmul,
+    &feature_pconfig,
+    &feature_avx512pf,
+    &feature_pku,
+    &feature_popcnt,
+    &feature_falseDepsPopcnt,
+    &feature_prefetchwt1,
+    &feature_prfchw,
+    &feature_ptwrite,
+    &feature_padShortFunctions,
+    &feature_prefer128Bit,
+    &feature_prefer256Bit,
+    &feature_rdpid,
+    &feature_rdrnd,
+    &feature_rdseed,
+    &feature_rtm,
+    &feature_retpoline,
+    &feature_retpolineExternalThunk,
+    &feature_retpolineIndirectBranches,
+    &feature_retpolineIndirectCalls,
+    &feature_sgx,
+    &feature_sha,
+    &feature_shstk,
+    &feature_sse,
+    &feature_sse2,
+    &feature_sse3,
+    &feature_sse4a,
+    &feature_sse41,
+    &feature_sse42,
+    &feature_sseUnalignedMem,
+    &feature_ssse3,
+    &feature_slow3opsLea,
+    &feature_idivlToDivb,
+    &feature_idivqToDivl,
+    &feature_slowIncdec,
+    &feature_slowLea,
+    &feature_slowPmaddwd,
+    &feature_slowPmulld,
+    &feature_slowShld,
+    &feature_slowTwoMemOps,
+    &feature_slowUnalignedMem16,
+    &feature_slowUnalignedMem32,
+    &feature_softFloat,
+    &feature_tbm,
+    &feature_useAa,
+    &feature_vaes,
+    &feature_avx512vbmi,
+    &feature_avx512vbmi2,
+    &feature_avx512vl,
+    &feature_avx512vnni,
+    &feature_avx512vp2intersect,
+    &feature_vpclmulqdq,
+    &feature_avx512vpopcntdq,
+    &feature_waitpkg,
+    &feature_wbnoinvd,
+    &feature_x87,
+    &feature_xop,
+    &feature_xsave,
+    &feature_xsavec,
+    &feature_xsaveopt,
+    &feature_xsaves,
+    &feature_bitMode16,
+    &feature_bitMode32,
+    &feature_bitMode64,
+};
+
+pub const cpu_amdfam10 = Cpu{
+    .name = "amdfam10",
+    .llvm_name = "amdfam10",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_nopl,
+        &feature_popcnt,
+        &feature_sse,
+        &feature_sse4a,
+        &feature_slowShld,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlon = Cpu{
+    .name = "athlon",
+    .llvm_name = "athlon",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_nopl,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlon4 = Cpu{
+    .name = "athlon-4",
+    .llvm_name = "athlon-4",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_nopl,
+        &feature_sse,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlonFx = Cpu{
+    .name = "athlon-fx",
+    .llvm_name = "athlon-fx",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlonMp = Cpu{
+    .name = "athlon-mp",
+    .llvm_name = "athlon-mp",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_nopl,
+        &feature_sse,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlonTbird = Cpu{
+    .name = "athlon-tbird",
+    .llvm_name = "athlon-tbird",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_nopl,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlonXp = Cpu{
+    .name = "athlon-xp",
+    .llvm_name = "athlon-xp",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_nopl,
+        &feature_sse,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlon64 = Cpu{
+    .name = "athlon64",
+    .llvm_name = "athlon64",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_athlon64Sse3 = Cpu{
+    .name = "athlon64-sse3",
+    .llvm_name = "athlon64-sse3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_atom = Cpu{
+    .name = "atom",
+    .llvm_name = "atom",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_leaSp,
+        &feature_leaUsesAg,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_padShortFunctions,
+        &feature_sse,
+        &feature_ssse3,
+        &feature_idivlToDivb,
+        &feature_idivqToDivl,
+        &feature_slowTwoMemOps,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_barcelona = Cpu{
+    .name = "barcelona",
+    .llvm_name = "barcelona",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_nopl,
+        &feature_popcnt,
+        &feature_sse,
+        &feature_sse4a,
+        &feature_slowShld,
+        &feature_x87,
+    },
+};
+
+pub const cpu_bdver1 = Cpu{
+    .name = "bdver1",
+    .llvm_name = "bdver1",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_branchfusion,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fast11bytenop,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lwp,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_slowShld,
+        &feature_x87,
+        &feature_xop,
+        &feature_xsave,
+    },
+};
+
+pub const cpu_bdver2 = Cpu{
+    .name = "bdver2",
+    .llvm_name = "bdver2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_bmi,
+        &feature_branchfusion,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fxsr,
+        &feature_fast11bytenop,
+        &feature_fastBextr,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lwp,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_slowShld,
+        &feature_tbm,
+        &feature_x87,
+        &feature_xop,
+        &feature_xsave,
+    },
+};
+
+pub const cpu_bdver3 = Cpu{
+    .name = "bdver3",
+    .llvm_name = "bdver3",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_bmi,
+        &feature_branchfusion,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fast11bytenop,
+        &feature_fastBextr,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lwp,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_slowShld,
+        &feature_tbm,
+        &feature_x87,
+        &feature_xop,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_bdver4 = Cpu{
+    .name = "bdver4",
+    .llvm_name = "bdver4",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_branchfusion,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fast11bytenop,
+        &feature_fastBextr,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lwp,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_mwaitx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_slowShld,
+        &feature_tbm,
+        &feature_x87,
+        &feature_xop,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_bonnell = Cpu{
+    .name = "bonnell",
+    .llvm_name = "bonnell",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_leaSp,
+        &feature_leaUsesAg,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_padShortFunctions,
+        &feature_sse,
+        &feature_ssse3,
+        &feature_idivlToDivb,
+        &feature_idivqToDivl,
+        &feature_slowTwoMemOps,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_broadwell = Cpu{
+    .name = "broadwell",
+    .llvm_name = "broadwell",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_avx,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_falseDepsLzcntTzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_btver1 = Cpu{
+    .name = "btver1",
+    .llvm_name = "btver1",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fast15bytenop,
+        &feature_fastScalarShiftMasks,
+        &feature_fastVectorShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_sse,
+        &feature_sse4a,
+        &feature_ssse3,
+        &feature_slowShld,
+        &feature_x87,
+    },
+};
+
+pub const cpu_btver2 = Cpu{
+    .name = "btver2",
+    .llvm_name = "btver2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_bmi,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fxsr,
+        &feature_fast15bytenop,
+        &feature_fastBextr,
+        &feature_fastHops,
+        &feature_fastLzcnt,
+        &feature_fastPartialYmmOrZmmWrite,
+        &feature_fastScalarShiftMasks,
+        &feature_fastVectorShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_sse4a,
+        &feature_ssse3,
+        &feature_slowShld,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_c3 = Cpu{
+    .name = "c3",
+    .llvm_name = "c3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnow3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_c32 = Cpu{
+    .name = "c3-2",
+    .llvm_name = "c3-2",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_sse,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_cannonlake = Cpu{
+    .name = "cannonlake",
+    .llvm_name = "cannonlake",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_avx512ifma,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_avx512vbmi,
+        &feature_avx512vl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_cascadelake = Cpu{
+    .name = "cascadelake",
+    .llvm_name = "cascadelake",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_avx512vl,
+        &feature_avx512vnni,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_cooperlake = Cpu{
+    .name = "cooperlake",
+    .llvm_name = "cooperlake",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_avx512bf16,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_avx512vl,
+        &feature_avx512vnni,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_coreAvxI = Cpu{
+    .name = "core-avx-i",
+    .llvm_name = "core-avx-i",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowUnalignedMem32,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_coreAvx2 = Cpu{
+    .name = "core-avx2",
+    .llvm_name = "core-avx2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_falseDepsLzcntTzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_core2 = Cpu{
+    .name = "core2",
+    .llvm_name = "core2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_sse,
+        &feature_ssse3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_corei7 = Cpu{
+    .name = "corei7",
+    .llvm_name = "corei7",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_popcnt,
+        &feature_sse,
+        &feature_sse42,
+        &feature_x87,
+    },
+};
+
+pub const cpu_corei7Avx = Cpu{
+    .name = "corei7-avx",
+    .llvm_name = "corei7-avx",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowUnalignedMem32,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_generic = Cpu{
+    .name = "generic",
+    .llvm_name = "generic",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_geode = Cpu{
+    .name = "geode",
+    .llvm_name = "geode",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_goldmont = Cpu{
+    .name = "goldmont",
+    .llvm_name = "goldmont",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_clflushopt,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sha,
+        &feature_sse42,
+        &feature_ssse3,
+        &feature_slowIncdec,
+        &feature_slowLea,
+        &feature_slowTwoMemOps,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_goldmontPlus = Cpu{
+    .name = "goldmont-plus",
+    .llvm_name = "goldmont-plus",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_clflushopt,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_ptwrite,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_sse42,
+        &feature_ssse3,
+        &feature_slowIncdec,
+        &feature_slowLea,
+        &feature_slowTwoMemOps,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_haswell = Cpu{
+    .name = "haswell",
+    .llvm_name = "haswell",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_falseDepsLzcntTzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_i386 = Cpu{
+    .name = "i386",
+    .llvm_name = "i386",
+    .subfeatures = &[_]*const Feature {
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_i486 = Cpu{
+    .name = "i486",
+    .llvm_name = "i486",
+    .subfeatures = &[_]*const Feature {
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_i586 = Cpu{
+    .name = "i586",
+    .llvm_name = "i586",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_i686 = Cpu{
+    .name = "i686",
+    .llvm_name = "i686",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_icelakeClient = Cpu{
+    .name = "icelake-client",
+    .llvm_name = "icelake-client",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_avx512bitalg,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_gfni,
+        &feature_fastGather,
+        &feature_avx512ifma,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_vaes,
+        &feature_avx512vbmi,
+        &feature_avx512vbmi2,
+        &feature_avx512vl,
+        &feature_avx512vnni,
+        &feature_vpclmulqdq,
+        &feature_avx512vpopcntdq,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_icelakeServer = Cpu{
+    .name = "icelake-server",
+    .llvm_name = "icelake-server",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_avx512bitalg,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_gfni,
+        &feature_fastGather,
+        &feature_avx512ifma,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pconfig,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_vaes,
+        &feature_avx512vbmi,
+        &feature_avx512vbmi2,
+        &feature_avx512vl,
+        &feature_avx512vnni,
+        &feature_vpclmulqdq,
+        &feature_avx512vpopcntdq,
+        &feature_wbnoinvd,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_ivybridge = Cpu{
+    .name = "ivybridge",
+    .llvm_name = "ivybridge",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowUnalignedMem32,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_k6 = Cpu{
+    .name = "k6",
+    .llvm_name = "k6",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+        &feature_mmx,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_k62 = Cpu{
+    .name = "k6-2",
+    .llvm_name = "k6-2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnow3,
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_k63 = Cpu{
+    .name = "k6-3",
+    .llvm_name = "k6-3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnow3,
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_k8 = Cpu{
+    .name = "k8",
+    .llvm_name = "k8",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_k8Sse3 = Cpu{
+    .name = "k8-sse3",
+    .llvm_name = "k8-sse3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_knl = Cpu{
+    .name = "knl",
+    .llvm_name = "knl",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512cd,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512er,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastPartialYmmOrZmmWrite,
+        &feature_fastGather,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_avx512pf,
+        &feature_popcnt,
+        &feature_prefetchwt1,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowIncdec,
+        &feature_slowPmaddwd,
+        &feature_slowTwoMemOps,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_knm = Cpu{
+    .name = "knm",
+    .llvm_name = "knm",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512cd,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512er,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastPartialYmmOrZmmWrite,
+        &feature_fastGather,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_avx512pf,
+        &feature_popcnt,
+        &feature_prefetchwt1,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowIncdec,
+        &feature_slowPmaddwd,
+        &feature_slowTwoMemOps,
+        &feature_avx512vpopcntdq,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_lakemont = Cpu{
+    .name = "lakemont",
+    .llvm_name = "lakemont",
+    .subfeatures = &[_]*const Feature {
+    },
+};
+
+pub const cpu_nehalem = Cpu{
+    .name = "nehalem",
+    .llvm_name = "nehalem",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_popcnt,
+        &feature_sse,
+        &feature_sse42,
+        &feature_x87,
+    },
+};
+
+pub const cpu_nocona = Cpu{
+    .name = "nocona",
+    .llvm_name = "nocona",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_opteron = Cpu{
+    .name = "opteron",
+    .llvm_name = "opteron",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_opteronSse3 = Cpu{
+    .name = "opteron-sse3",
+    .llvm_name = "opteron-sse3",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnowa3,
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastScalarShiftMasks,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowShld,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_penryn = Cpu{
+    .name = "penryn",
+    .llvm_name = "penryn",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse41,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium = Cpu{
+    .name = "pentium",
+    .llvm_name = "pentium",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentiumM = Cpu{
+    .name = "pentium-m",
+    .llvm_name = "pentium-m",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentiumMmx = Cpu{
+    .name = "pentium-mmx",
+    .llvm_name = "pentium-mmx",
+    .subfeatures = &[_]*const Feature {
+        &feature_cx8,
+        &feature_mmx,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium2 = Cpu{
+    .name = "pentium2",
+    .llvm_name = "pentium2",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium3 = Cpu{
+    .name = "pentium3",
+    .llvm_name = "pentium3",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium3m = Cpu{
+    .name = "pentium3m",
+    .llvm_name = "pentium3m",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium4 = Cpu{
+    .name = "pentium4",
+    .llvm_name = "pentium4",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentium4m = Cpu{
+    .name = "pentium4m",
+    .llvm_name = "pentium4m",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_pentiumpro = Cpu{
+    .name = "pentiumpro",
+    .llvm_name = "pentiumpro",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_nopl,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_prescott = Cpu{
+    .name = "prescott",
+    .llvm_name = "prescott",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_sandybridge = Cpu{
+    .name = "sandybridge",
+    .llvm_name = "sandybridge",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_avx,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_slowUnalignedMem32,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsaveopt,
+    },
+};
+
+pub const cpu_silvermont = Cpu{
+    .name = "silvermont",
+    .llvm_name = "silvermont",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_sse,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_ssse3,
+        &feature_idivqToDivl,
+        &feature_slowIncdec,
+        &feature_slowLea,
+        &feature_slowPmulld,
+        &feature_slowTwoMemOps,
+        &feature_x87,
+    },
+};
+
+pub const cpu_skx = Cpu{
+    .name = "skx",
+    .llvm_name = "skx",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_avx512vl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_skylake = Cpu{
+    .name = "skylake",
+    .llvm_name = "skylake",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_clflushopt,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_skylakeAvx512 = Cpu{
+    .name = "skylake-avx512",
+    .llvm_name = "skylake-avx512",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_fastGather,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_avx512vl,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_slm = Cpu{
+    .name = "slm",
+    .llvm_name = "slm",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_nopl,
+        &feature_sse,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_falseDepsPopcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_sse42,
+        &feature_ssse3,
+        &feature_idivqToDivl,
+        &feature_slowIncdec,
+        &feature_slowLea,
+        &feature_slowPmulld,
+        &feature_slowTwoMemOps,
+        &feature_x87,
+    },
+};
+
+pub const cpu_tigerlake = Cpu{
+    .name = "tigerlake",
+    .llvm_name = "tigerlake",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx,
+        &feature_avx2,
+        &feature_avx512f,
+        &feature_avx512bitalg,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_avx512bw,
+        &feature_avx512cd,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_avx512dq,
+        &feature_ermsb,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fastShldRotate,
+        &feature_fastScalarFsqrt,
+        &feature_fastVariableShuffle,
+        &feature_fastVectorFsqrt,
+        &feature_gfni,
+        &feature_fastGather,
+        &feature_avx512ifma,
+        &feature_invpcid,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_movdir64b,
+        &feature_movdiri,
+        &feature_macrofusion,
+        &feature_mergeToThreewayBranch,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_pku,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_prefer256Bit,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_shstk,
+        &feature_sse42,
+        &feature_slow3opsLea,
+        &feature_idivqToDivl,
+        &feature_vaes,
+        &feature_avx512vbmi,
+        &feature_avx512vbmi2,
+        &feature_avx512vl,
+        &feature_avx512vnni,
+        &feature_avx512vp2intersect,
+        &feature_vpclmulqdq,
+        &feature_avx512vpopcntdq,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_tremont = Cpu{
+    .name = "tremont",
+    .llvm_name = "tremont",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_sse,
+        &feature_aes,
+        &feature_cldemote,
+        &feature_clflushopt,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_gfni,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_movdir64b,
+        &feature_movdiri,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_ptwrite,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sgx,
+        &feature_sha,
+        &feature_sse42,
+        &feature_ssse3,
+        &feature_slowIncdec,
+        &feature_slowLea,
+        &feature_slowTwoMemOps,
+        &feature_waitpkg,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_westmere = Cpu{
+    .name = "westmere",
+    .llvm_name = "westmere",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_fxsr,
+        &feature_sahf,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_sse,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_sse42,
+        &feature_x87,
+    },
+};
+
+pub const cpu_winchipC6 = Cpu{
+    .name = "winchip-c6",
+    .llvm_name = "winchip-c6",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_winchip2 = Cpu{
+    .name = "winchip2",
+    .llvm_name = "winchip2",
+    .subfeatures = &[_]*const Feature {
+        &feature_mmx,
+        &feature_dnow3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_x8664 = Cpu{
+    .name = "x86-64",
+    .llvm_name = "x86-64",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_macrofusion,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse2,
+        &feature_slow3opsLea,
+        &feature_slowIncdec,
+        &feature_x87,
+    },
+};
+
+pub const cpu_yonah = Cpu{
+    .name = "yonah",
+    .llvm_name = "yonah",
+    .subfeatures = &[_]*const Feature {
+        &feature_cmov,
+        &feature_cx8,
+        &feature_fxsr,
+        &feature_mmx,
+        &feature_nopl,
+        &feature_sse,
+        &feature_sse3,
+        &feature_slowUnalignedMem16,
+        &feature_x87,
+    },
+};
+
+pub const cpu_znver1 = Cpu{
+    .name = "znver1",
+    .llvm_name = "znver1",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_branchfusion,
+        &feature_clflushopt,
+        &feature_clzero,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fast15bytenop,
+        &feature_fastBextr,
+        &feature_fastLzcnt,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_mwaitx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sha,
+        &feature_sse4a,
+        &feature_slowShld,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpu_znver2 = Cpu{
+    .name = "znver2",
+    .llvm_name = "znver2",
+    .subfeatures = &[_]*const Feature {
+        &feature_bit64,
+        &feature_adx,
+        &feature_sse,
+        &feature_aes,
+        &feature_avx2,
+        &feature_bmi,
+        &feature_bmi2,
+        &feature_branchfusion,
+        &feature_clflushopt,
+        &feature_clwb,
+        &feature_clzero,
+        &feature_cmov,
+        &feature_cx8,
+        &feature_cx16,
+        &feature_f16c,
+        &feature_fma,
+        &feature_fsgsbase,
+        &feature_fxsr,
+        &feature_fast15bytenop,
+        &feature_fastBextr,
+        &feature_fastLzcnt,
+        &feature_fastScalarShiftMasks,
+        &feature_sahf,
+        &feature_lzcnt,
+        &feature_mmx,
+        &feature_movbe,
+        &feature_mwaitx,
+        &feature_nopl,
+        &feature_pclmul,
+        &feature_popcnt,
+        &feature_prfchw,
+        &feature_rdpid,
+        &feature_rdrnd,
+        &feature_rdseed,
+        &feature_sha,
+        &feature_sse4a,
+        &feature_slowShld,
+        &feature_wbnoinvd,
+        &feature_x87,
+        &feature_xsave,
+        &feature_xsavec,
+        &feature_xsaveopt,
+        &feature_xsaves,
+    },
+};
+
+pub const cpus = &[_]*const Cpu {
+    &cpu_amdfam10,
+    &cpu_athlon,
+    &cpu_athlon4,
+    &cpu_athlonFx,
+    &cpu_athlonMp,
+    &cpu_athlonTbird,
+    &cpu_athlonXp,
+    &cpu_athlon64,
+    &cpu_athlon64Sse3,
+    &cpu_atom,
+    &cpu_barcelona,
+    &cpu_bdver1,
+    &cpu_bdver2,
+    &cpu_bdver3,
+    &cpu_bdver4,
+    &cpu_bonnell,
+    &cpu_broadwell,
+    &cpu_btver1,
+    &cpu_btver2,
+    &cpu_c3,
+    &cpu_c32,
+    &cpu_cannonlake,
+    &cpu_cascadelake,
+    &cpu_cooperlake,
+    &cpu_coreAvxI,
+    &cpu_coreAvx2,
+    &cpu_core2,
+    &cpu_corei7,
+    &cpu_corei7Avx,
+    &cpu_generic,
+    &cpu_geode,
+    &cpu_goldmont,
+    &cpu_goldmontPlus,
+    &cpu_haswell,
+    &cpu_i386,
+    &cpu_i486,
+    &cpu_i586,
+    &cpu_i686,
+    &cpu_icelakeClient,
+    &cpu_icelakeServer,
+    &cpu_ivybridge,
+    &cpu_k6,
+    &cpu_k62,
+    &cpu_k63,
+    &cpu_k8,
+    &cpu_k8Sse3,
+    &cpu_knl,
+    &cpu_knm,
+    &cpu_lakemont,
+    &cpu_nehalem,
+    &cpu_nocona,
+    &cpu_opteron,
+    &cpu_opteronSse3,
+    &cpu_penryn,
+    &cpu_pentium,
+    &cpu_pentiumM,
+    &cpu_pentiumMmx,
+    &cpu_pentium2,
+    &cpu_pentium3,
+    &cpu_pentium3m,
+    &cpu_pentium4,
+    &cpu_pentium4m,
+    &cpu_pentiumpro,
+    &cpu_prescott,
+    &cpu_sandybridge,
+    &cpu_silvermont,
+    &cpu_skx,
+    &cpu_skylake,
+    &cpu_skylakeAvx512,
+    &cpu_slm,
+    &cpu_tigerlake,
+    &cpu_tremont,
+    &cpu_westmere,
+    &cpu_winchipC6,
+    &cpu_winchip2,
+    &cpu_x8664,
+    &cpu_yonah,
+    &cpu_znver1,
+    &cpu_znver2,
+};
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index fc6cb18bf23b07039a21f41d2a8a7426fc3ddb5f..1544fcbc8f2b4fc591c6883f9444ea15fa296622 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -6,8 +6,6 @@ const io = std.io;
 const mem = std.mem;
 const fs = std.fs;
 const process = std.process;
-const feature = std.target.feature;
-const cpu = std.target.cpu;
 const Allocator = mem.Allocator;
 const ArrayList = std.ArrayList;
 const Buffer = std.Buffer;
@@ -546,34 +544,30 @@ fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void
         return;
     };
 
-    inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| {
-        if (@enumToInt(arch) == arch_enum_field.value) {
-            const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value);
+    try stdout_stream.print("Available features for {}:\n", .{ @tagName(arch) });
 
-            const feature_infos = feature.ArchFeature(enum_arch).feature_infos;
+    const features = std.target.getFeaturesForArch(arch);
 
-            try stdout_stream.print("Available features for {}:\n", .{ arch_enum_field.name });
+    var longest_len: usize = 0;
+    for (features) |feature| {
+        if (feature.name.len > longest_len) {
+            longest_len = feature.name.len;
+        }
+    }
 
-            var longest_len: usize = 0;
-            for (feature_infos) |feature_info| {
-                if (feature_info.name.len > longest_len) longest_len = feature_info.name.len;
-            }
+    for (features) |feature| {
+        try stdout_stream.print("  {}", .{ feature.name });
+        
+        var i: usize = 0;
+        while (i < longest_len - feature.name.len) : (i += 1) {
+            try stdout_stream.write(" ");    
+        }
 
-            for (feature_infos) |feature_info| {
-                try stdout_stream.print("  {}", .{ feature_info.name });
-                
-                var i: usize = 0;
-                while (i < longest_len - feature_info.name.len) : (i += 1) {
-                    try stdout_stream.write(" ");    
-                }
+        try stdout_stream.print(" - {}\n", .{ feature.description });
 
-                try stdout_stream.print(" - {}\n", .{ feature_info.description });
-
-                if (show_subfeatures and feature_info.subfeatures.len > 0) {
-                    for (feature_info.subfeatures) |subfeature| {
-                        try stdout_stream.print("    {}\n", .{ subfeature.getInfo().name });
-                    }
-                }
+        if (show_subfeatures and feature.subfeatures.len > 0) {
+            for (feature.subfeatures) |subfeature| {
+                try stdout_stream.print("    {}\n", .{ subfeature.name });
             }
         }
     }
@@ -594,35 +588,33 @@ fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
         return;
     };
 
-    inline for (@typeInfo(@TagType(Target.Arch)).Enum.fields) |arch_enum_field| {
-        if (@enumToInt(arch) == arch_enum_field.value) {
-            const enum_arch = @intToEnum(@TagType(Target.Arch), arch_enum_field.value);
+    const cpus = std.target.getCpusForArch(arch);
 
-            const cpu_infos = cpu.ArchCpu(enum_arch).cpu_infos;
+    try stdout_stream.print("Available cpus for {}:\n", .{ @tagName(arch) });
 
-            try stdout_stream.print("Available cpus for {}:\n", .{ arch_enum_field.name });
+    var longest_len: usize = 0;
+    for (cpus) |cpu| {
+        if (cpu.name.len > longest_len) {
+            longest_len = cpu.name.len;
+        }
+    }
 
-            var longest_len: usize = 0;
-            for (cpu_infos) |cpu_info| {
-                if (cpu_info.name.len > longest_len) longest_len = cpu_info.name.len;
-            }
+    for (cpus) |cpu| {
+        try stdout_stream.print("  {}", .{ cpu.name });
+        
+        var i: usize = 0;
+        while (i < longest_len - cpu.name.len) : (i += 1) {
+            try stdout_stream.write(" ");    
+        }
 
-            for (cpu_infos) |cpu_info| {
-                try stdout_stream.print("  {}", .{ cpu_info.name });
-                
-                var i: usize = 0;
-                while (i < longest_len - cpu_info.name.len) : (i += 1) {
-                    try stdout_stream.write(" ");    
-                }
+        try stdout_stream.write("\n");
 
-                try stdout_stream.write("\n");
-
-                if (show_subfeatures and cpu_info.features.len > 0) {
-                    for (cpu_info.features) |subfeature| {
-                        try stdout_stream.print("    {}\n", .{ subfeature.getInfo().name });
-                    }
-                }
+        if (show_subfeatures and cpu.subfeatures.len > 0) {
+            for (cpu.subfeatures) |subfeature| {
+                try stdout_stream.print("    {}\n", .{ subfeature.name });
             }
         }
     }
 }
+
+// use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'.
-- 
2.54.0


From c8f1e0d6d8f3ccfa952e9612903783baa9b2c12f Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Fri, 20 Dec 2019 20:07:29 -0500
Subject: [PATCH 039/116] Remove llvm_name from features

---
 lib/std/target.zig         |    1 -
 lib/std/target/aarch64.zig |  985 +++++------
 lib/std/target/amdgpu.zig  | 1190 ++++++-------
 lib/std/target/arm.zig     | 1311 +++++++--------
 lib/std/target/avr.zig     | 3223 ++++++++++++++++++------------------
 lib/std/target/bpf.zig     |    3 -
 lib/std/target/hexagon.zig |   24 -
 lib/std/target/mips.zig    |  290 ++--
 lib/std/target/msp430.zig  |    4 -
 lib/std/target/nvptx.zig   |   25 -
 lib/std/target/powerpc.zig |   55 +-
 lib/std/target/riscv.zig   |    9 -
 lib/std/target/sparc.zig   |   19 -
 lib/std/target/systemz.zig |   35 -
 lib/std/target/wasm.zig    |   10 -
 lib/std/target/x86.zig     |  128 +-
 16 files changed, 3243 insertions(+), 4069 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index c9113118101b9adac6f214ada9f00bae3ea66ff0..ad2ca59ee8d266eb321bf99b37b2f5417b6adf44 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -861,7 +861,6 @@ pub const x86 = @import("target/x86.zig");
 pub const Feature = struct {
     name: []const u8,
     description: []const u8,
-    llvm_name: []const u8,
 
     subfeatures: []*const Feature,
 };
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index ca87c33bbbb7c1c0c213fb3591d3157859685c9c..b7a6283f861e6bcbc721458c69f739bb091f4449 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES support",
-    .llvm_name = "aes",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -13,7 +12,6 @@ pub const feature_aes = Feature{
 pub const feature_am = Feature{
     .name = "am",
     .description = "Enable v8.4-A Activity Monitors extension",
-    .llvm_name = "am",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -21,7 +19,6 @@ pub const feature_am = Feature{
 pub const feature_aggressiveFma = Feature{
     .name = "aggressive-fma",
     .description = "Enable Aggressive FMA for floating-point.",
-    .llvm_name = "aggressive-fma",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -29,7 +26,6 @@ pub const feature_aggressiveFma = Feature{
 pub const feature_altnzcv = Feature{
     .name = "altnzcv",
     .description = "Enable alternative NZCV format for floating point comparisons",
-    .llvm_name = "altnzcv",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -37,7 +33,6 @@ pub const feature_altnzcv = Feature{
 pub const feature_alternateSextloadCvtF32Pattern = Feature{
     .name = "alternate-sextload-cvt-f32-pattern",
     .description = "Use alternative pattern for sextload convert to f32",
-    .llvm_name = "alternate-sextload-cvt-f32-pattern",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -45,7 +40,6 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{
 pub const feature_arithBccFusion = Feature{
     .name = "arith-bcc-fusion",
     .description = "CPU fuses arithmetic+bcc operations",
-    .llvm_name = "arith-bcc-fusion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -53,7 +47,6 @@ pub const feature_arithBccFusion = Feature{
 pub const feature_arithCbzFusion = Feature{
     .name = "arith-cbz-fusion",
     .description = "CPU fuses arithmetic + cbz/cbnz operations",
-    .llvm_name = "arith-cbz-fusion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -61,7 +54,6 @@ pub const feature_arithCbzFusion = Feature{
 pub const feature_balanceFpOps = Feature{
     .name = "balance-fp-ops",
     .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-    .llvm_name = "balance-fp-ops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -69,7 +61,6 @@ pub const feature_balanceFpOps = Feature{
 pub const feature_bti = Feature{
     .name = "bti",
     .description = "Enable Branch Target Identification",
-    .llvm_name = "bti",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -77,7 +68,6 @@ pub const feature_bti = Feature{
 pub const feature_ccidx = Feature{
     .name = "ccidx",
     .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-    .llvm_name = "ccidx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -85,7 +75,6 @@ pub const feature_ccidx = Feature{
 pub const feature_ccpp = Feature{
     .name = "ccpp",
     .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-    .llvm_name = "ccpp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -93,7 +82,6 @@ pub const feature_ccpp = Feature{
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Enable ARMv8 CRC-32 checksum instructions",
-    .llvm_name = "crc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -101,7 +89,6 @@ pub const feature_crc = Feature{
 pub const feature_ccdp = Feature{
     .name = "ccdp",
     .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-    .llvm_name = "ccdp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -109,7 +96,6 @@ pub const feature_ccdp = Feature{
 pub const feature_callSavedX8 = Feature{
     .name = "call-saved-x8",
     .description = "Make X8 callee saved.",
-    .llvm_name = "call-saved-x8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -117,7 +103,6 @@ pub const feature_callSavedX8 = Feature{
 pub const feature_callSavedX9 = Feature{
     .name = "call-saved-x9",
     .description = "Make X9 callee saved.",
-    .llvm_name = "call-saved-x9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -125,7 +110,6 @@ pub const feature_callSavedX9 = Feature{
 pub const feature_callSavedX10 = Feature{
     .name = "call-saved-x10",
     .description = "Make X10 callee saved.",
-    .llvm_name = "call-saved-x10",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -133,7 +117,6 @@ pub const feature_callSavedX10 = Feature{
 pub const feature_callSavedX11 = Feature{
     .name = "call-saved-x11",
     .description = "Make X11 callee saved.",
-    .llvm_name = "call-saved-x11",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -141,7 +124,6 @@ pub const feature_callSavedX11 = Feature{
 pub const feature_callSavedX12 = Feature{
     .name = "call-saved-x12",
     .description = "Make X12 callee saved.",
-    .llvm_name = "call-saved-x12",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -149,7 +131,6 @@ pub const feature_callSavedX12 = Feature{
 pub const feature_callSavedX13 = Feature{
     .name = "call-saved-x13",
     .description = "Make X13 callee saved.",
-    .llvm_name = "call-saved-x13",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -157,7 +138,6 @@ pub const feature_callSavedX13 = Feature{
 pub const feature_callSavedX14 = Feature{
     .name = "call-saved-x14",
     .description = "Make X14 callee saved.",
-    .llvm_name = "call-saved-x14",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -165,7 +145,6 @@ pub const feature_callSavedX14 = Feature{
 pub const feature_callSavedX15 = Feature{
     .name = "call-saved-x15",
     .description = "Make X15 callee saved.",
-    .llvm_name = "call-saved-x15",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -173,7 +152,6 @@ pub const feature_callSavedX15 = Feature{
 pub const feature_callSavedX18 = Feature{
     .name = "call-saved-x18",
     .description = "Make X18 callee saved.",
-    .llvm_name = "call-saved-x18",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -181,7 +159,6 @@ pub const feature_callSavedX18 = Feature{
 pub const feature_complxnum = Feature{
     .name = "complxnum",
     .description = "Enable v8.3-A Floating-point complex number support",
-    .llvm_name = "complxnum",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -190,7 +167,6 @@ pub const feature_complxnum = Feature{
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable cryptographic instructions",
-    .llvm_name = "crypto",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -199,7 +175,6 @@ pub const feature_crypto = Feature{
 pub const feature_customCheapAsMove = Feature{
     .name = "custom-cheap-as-move",
     .description = "Use custom handling of cheap instructions",
-    .llvm_name = "custom-cheap-as-move",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -207,7 +182,6 @@ pub const feature_customCheapAsMove = Feature{
 pub const feature_dit = Feature{
     .name = "dit",
     .description = "Enable v8.4-A Data Independent Timing instructions",
-    .llvm_name = "dit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -215,7 +189,6 @@ pub const feature_dit = Feature{
 pub const feature_disableLatencySchedHeuristic = Feature{
     .name = "disable-latency-sched-heuristic",
     .description = "Disable latency scheduling heuristic",
-    .llvm_name = "disable-latency-sched-heuristic",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -223,7 +196,6 @@ pub const feature_disableLatencySchedHeuristic = Feature{
 pub const feature_dotprod = Feature{
     .name = "dotprod",
     .description = "Enable dot product support",
-    .llvm_name = "dotprod",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -231,7 +203,6 @@ pub const feature_dotprod = Feature{
 pub const feature_ete = Feature{
     .name = "ete",
     .description = "Enable Embedded Trace Extension",
-    .llvm_name = "ete",
     .subfeatures = &[_]*const Feature {
         &feature_trbe,
     },
@@ -240,7 +211,6 @@ pub const feature_ete = Feature{
 pub const feature_exynosCheapAsMove = Feature{
     .name = "exynos-cheap-as-move",
     .description = "Use Exynos specific handling of cheap instructions",
-    .llvm_name = "exynos-cheap-as-move",
     .subfeatures = &[_]*const Feature {
         &feature_customCheapAsMove,
     },
@@ -249,7 +219,6 @@ pub const feature_exynosCheapAsMove = Feature{
 pub const feature_fmi = Feature{
     .name = "fmi",
     .description = "Enable v8.4-A Flag Manipulation Instructions",
-    .llvm_name = "fmi",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -257,7 +226,6 @@ pub const feature_fmi = Feature{
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
     .description = "Enable FP16 FML instructions",
-    .llvm_name = "fp16fml",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -266,7 +234,6 @@ pub const feature_fp16fml = Feature{
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
     .description = "Enable ARMv8 FP",
-    .llvm_name = "fp-armv8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -274,7 +241,6 @@ pub const feature_fpArmv8 = Feature{
 pub const feature_fptoint = Feature{
     .name = "fptoint",
     .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-    .llvm_name = "fptoint",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -282,7 +248,6 @@ pub const feature_fptoint = Feature{
 pub const feature_force32bitJumpTables = Feature{
     .name = "force-32bit-jump-tables",
     .description = "Force jump table entries to be 32-bits wide except at MinSize",
-    .llvm_name = "force-32bit-jump-tables",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -290,7 +255,6 @@ pub const feature_force32bitJumpTables = Feature{
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
     .description = "Full FP16",
-    .llvm_name = "fullfp16",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -299,7 +263,6 @@ pub const feature_fullfp16 = Feature{
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
-    .llvm_name = "fuse-aes",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -307,7 +270,6 @@ pub const feature_fuseAes = Feature{
 pub const feature_fuseAddress = Feature{
     .name = "fuse-address",
     .description = "CPU fuses address generation and memory operations",
-    .llvm_name = "fuse-address",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -315,7 +277,6 @@ pub const feature_fuseAddress = Feature{
 pub const feature_fuseArithLogic = Feature{
     .name = "fuse-arith-logic",
     .description = "CPU fuses arithmetic and logic operations",
-    .llvm_name = "fuse-arith-logic",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -323,7 +284,6 @@ pub const feature_fuseArithLogic = Feature{
 pub const feature_fuseCsel = Feature{
     .name = "fuse-csel",
     .description = "CPU fuses conditional select operations",
-    .llvm_name = "fuse-csel",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -331,7 +291,6 @@ pub const feature_fuseCsel = Feature{
 pub const feature_fuseCryptoEor = Feature{
     .name = "fuse-crypto-eor",
     .description = "CPU fuses AES/PMULL and EOR operations",
-    .llvm_name = "fuse-crypto-eor",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -339,7 +298,6 @@ pub const feature_fuseCryptoEor = Feature{
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
-    .llvm_name = "fuse-literals",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -347,7 +305,6 @@ pub const feature_fuseLiterals = Feature{
 pub const feature_jsconv = Feature{
     .name = "jsconv",
     .description = "Enable v8.3-A JavaScript FP conversion enchancement",
-    .llvm_name = "jsconv",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -356,7 +313,6 @@ pub const feature_jsconv = Feature{
 pub const feature_lor = Feature{
     .name = "lor",
     .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-    .llvm_name = "lor",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -364,7 +320,6 @@ pub const feature_lor = Feature{
 pub const feature_lse = Feature{
     .name = "lse",
     .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-    .llvm_name = "lse",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -372,7 +327,6 @@ pub const feature_lse = Feature{
 pub const feature_lslFast = Feature{
     .name = "lsl-fast",
     .description = "CPU has a fastpath logical shift of up to 3 places",
-    .llvm_name = "lsl-fast",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -380,7 +334,6 @@ pub const feature_lslFast = Feature{
 pub const feature_mpam = Feature{
     .name = "mpam",
     .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-    .llvm_name = "mpam",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -388,7 +341,6 @@ pub const feature_mpam = Feature{
 pub const feature_mte = Feature{
     .name = "mte",
     .description = "Enable Memory Tagging Extension",
-    .llvm_name = "mte",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -396,7 +348,6 @@ pub const feature_mte = Feature{
 pub const feature_neon = Feature{
     .name = "neon",
     .description = "Enable Advanced SIMD instructions",
-    .llvm_name = "neon",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -405,7 +356,6 @@ pub const feature_neon = Feature{
 pub const feature_nv = Feature{
     .name = "nv",
     .description = "Enable v8.4-A Nested Virtualization Enchancement",
-    .llvm_name = "nv",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -413,7 +363,6 @@ pub const feature_nv = Feature{
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .llvm_name = "no-neg-immediates",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -421,7 +370,6 @@ pub const feature_noNegImmediates = Feature{
 pub const feature_pa = Feature{
     .name = "pa",
     .description = "Enable v8.3-A Pointer Authentication enchancement",
-    .llvm_name = "pa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -429,7 +377,6 @@ pub const feature_pa = Feature{
 pub const feature_pan = Feature{
     .name = "pan",
     .description = "Enables ARM v8.1 Privileged Access-Never extension",
-    .llvm_name = "pan",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -437,7 +384,6 @@ pub const feature_pan = Feature{
 pub const feature_panRwv = Feature{
     .name = "pan-rwv",
     .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
-    .llvm_name = "pan-rwv",
     .subfeatures = &[_]*const Feature {
         &feature_pan,
     },
@@ -446,7 +392,6 @@ pub const feature_panRwv = Feature{
 pub const feature_perfmon = Feature{
     .name = "perfmon",
     .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-    .llvm_name = "perfmon",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -454,7 +399,6 @@ pub const feature_perfmon = Feature{
 pub const feature_usePostraScheduler = Feature{
     .name = "use-postra-scheduler",
     .description = "Schedule again after register allocation",
-    .llvm_name = "use-postra-scheduler",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -462,7 +406,6 @@ pub const feature_usePostraScheduler = Feature{
 pub const feature_predres = Feature{
     .name = "predres",
     .description = "Enable v8.5a execution and data prediction invalidation instructions",
-    .llvm_name = "predres",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -470,7 +413,6 @@ pub const feature_predres = Feature{
 pub const feature_predictableSelectExpensive = Feature{
     .name = "predictable-select-expensive",
     .description = "Prefer likely predicted branches over selects",
-    .llvm_name = "predictable-select-expensive",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -478,7 +420,6 @@ pub const feature_predictableSelectExpensive = Feature{
 pub const feature_uaops = Feature{
     .name = "uaops",
     .description = "Enable v8.2 UAO PState",
-    .llvm_name = "uaops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -486,7 +427,6 @@ pub const feature_uaops = Feature{
 pub const feature_ras = Feature{
     .name = "ras",
     .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-    .llvm_name = "ras",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -494,7 +434,6 @@ pub const feature_ras = Feature{
 pub const feature_rasv8_4 = Feature{
     .name = "rasv8_4",
     .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-    .llvm_name = "rasv8_4",
     .subfeatures = &[_]*const Feature {
         &feature_ras,
     },
@@ -503,7 +442,6 @@ pub const feature_rasv8_4 = Feature{
 pub const feature_rcpc = Feature{
     .name = "rcpc",
     .description = "Enable support for RCPC extension",
-    .llvm_name = "rcpc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -511,7 +449,6 @@ pub const feature_rcpc = Feature{
 pub const feature_rcpcImmo = Feature{
     .name = "rcpc-immo",
     .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
-    .llvm_name = "rcpc-immo",
     .subfeatures = &[_]*const Feature {
         &feature_rcpc,
     },
@@ -520,7 +457,6 @@ pub const feature_rcpcImmo = Feature{
 pub const feature_rdm = Feature{
     .name = "rdm",
     .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-    .llvm_name = "rdm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -528,7 +464,6 @@ pub const feature_rdm = Feature{
 pub const feature_rand = Feature{
     .name = "rand",
     .description = "Enable Random Number generation instructions",
-    .llvm_name = "rand",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -536,7 +471,6 @@ pub const feature_rand = Feature{
 pub const feature_reserveX1 = Feature{
     .name = "reserve-x1",
     .description = "Reserve X1, making it unavailable as a GPR",
-    .llvm_name = "reserve-x1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -544,7 +478,6 @@ pub const feature_reserveX1 = Feature{
 pub const feature_reserveX2 = Feature{
     .name = "reserve-x2",
     .description = "Reserve X2, making it unavailable as a GPR",
-    .llvm_name = "reserve-x2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -552,7 +485,6 @@ pub const feature_reserveX2 = Feature{
 pub const feature_reserveX3 = Feature{
     .name = "reserve-x3",
     .description = "Reserve X3, making it unavailable as a GPR",
-    .llvm_name = "reserve-x3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -560,7 +492,6 @@ pub const feature_reserveX3 = Feature{
 pub const feature_reserveX4 = Feature{
     .name = "reserve-x4",
     .description = "Reserve X4, making it unavailable as a GPR",
-    .llvm_name = "reserve-x4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -568,7 +499,6 @@ pub const feature_reserveX4 = Feature{
 pub const feature_reserveX5 = Feature{
     .name = "reserve-x5",
     .description = "Reserve X5, making it unavailable as a GPR",
-    .llvm_name = "reserve-x5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -576,7 +506,6 @@ pub const feature_reserveX5 = Feature{
 pub const feature_reserveX6 = Feature{
     .name = "reserve-x6",
     .description = "Reserve X6, making it unavailable as a GPR",
-    .llvm_name = "reserve-x6",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -584,7 +513,6 @@ pub const feature_reserveX6 = Feature{
 pub const feature_reserveX7 = Feature{
     .name = "reserve-x7",
     .description = "Reserve X7, making it unavailable as a GPR",
-    .llvm_name = "reserve-x7",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -592,7 +520,6 @@ pub const feature_reserveX7 = Feature{
 pub const feature_reserveX9 = Feature{
     .name = "reserve-x9",
     .description = "Reserve X9, making it unavailable as a GPR",
-    .llvm_name = "reserve-x9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -600,7 +527,6 @@ pub const feature_reserveX9 = Feature{
 pub const feature_reserveX10 = Feature{
     .name = "reserve-x10",
     .description = "Reserve X10, making it unavailable as a GPR",
-    .llvm_name = "reserve-x10",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -608,7 +534,6 @@ pub const feature_reserveX10 = Feature{
 pub const feature_reserveX11 = Feature{
     .name = "reserve-x11",
     .description = "Reserve X11, making it unavailable as a GPR",
-    .llvm_name = "reserve-x11",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -616,7 +541,6 @@ pub const feature_reserveX11 = Feature{
 pub const feature_reserveX12 = Feature{
     .name = "reserve-x12",
     .description = "Reserve X12, making it unavailable as a GPR",
-    .llvm_name = "reserve-x12",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -624,7 +548,6 @@ pub const feature_reserveX12 = Feature{
 pub const feature_reserveX13 = Feature{
     .name = "reserve-x13",
     .description = "Reserve X13, making it unavailable as a GPR",
-    .llvm_name = "reserve-x13",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -632,7 +555,6 @@ pub const feature_reserveX13 = Feature{
 pub const feature_reserveX14 = Feature{
     .name = "reserve-x14",
     .description = "Reserve X14, making it unavailable as a GPR",
-    .llvm_name = "reserve-x14",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -640,7 +562,6 @@ pub const feature_reserveX14 = Feature{
 pub const feature_reserveX15 = Feature{
     .name = "reserve-x15",
     .description = "Reserve X15, making it unavailable as a GPR",
-    .llvm_name = "reserve-x15",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -648,7 +569,6 @@ pub const feature_reserveX15 = Feature{
 pub const feature_reserveX18 = Feature{
     .name = "reserve-x18",
     .description = "Reserve X18, making it unavailable as a GPR",
-    .llvm_name = "reserve-x18",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -656,7 +576,6 @@ pub const feature_reserveX18 = Feature{
 pub const feature_reserveX20 = Feature{
     .name = "reserve-x20",
     .description = "Reserve X20, making it unavailable as a GPR",
-    .llvm_name = "reserve-x20",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -664,7 +583,6 @@ pub const feature_reserveX20 = Feature{
 pub const feature_reserveX21 = Feature{
     .name = "reserve-x21",
     .description = "Reserve X21, making it unavailable as a GPR",
-    .llvm_name = "reserve-x21",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -672,7 +590,6 @@ pub const feature_reserveX21 = Feature{
 pub const feature_reserveX22 = Feature{
     .name = "reserve-x22",
     .description = "Reserve X22, making it unavailable as a GPR",
-    .llvm_name = "reserve-x22",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -680,7 +597,6 @@ pub const feature_reserveX22 = Feature{
 pub const feature_reserveX23 = Feature{
     .name = "reserve-x23",
     .description = "Reserve X23, making it unavailable as a GPR",
-    .llvm_name = "reserve-x23",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -688,7 +604,6 @@ pub const feature_reserveX23 = Feature{
 pub const feature_reserveX24 = Feature{
     .name = "reserve-x24",
     .description = "Reserve X24, making it unavailable as a GPR",
-    .llvm_name = "reserve-x24",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -696,7 +611,6 @@ pub const feature_reserveX24 = Feature{
 pub const feature_reserveX25 = Feature{
     .name = "reserve-x25",
     .description = "Reserve X25, making it unavailable as a GPR",
-    .llvm_name = "reserve-x25",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -704,7 +618,6 @@ pub const feature_reserveX25 = Feature{
 pub const feature_reserveX26 = Feature{
     .name = "reserve-x26",
     .description = "Reserve X26, making it unavailable as a GPR",
-    .llvm_name = "reserve-x26",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -712,7 +625,6 @@ pub const feature_reserveX26 = Feature{
 pub const feature_reserveX27 = Feature{
     .name = "reserve-x27",
     .description = "Reserve X27, making it unavailable as a GPR",
-    .llvm_name = "reserve-x27",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -720,7 +632,6 @@ pub const feature_reserveX27 = Feature{
 pub const feature_reserveX28 = Feature{
     .name = "reserve-x28",
     .description = "Reserve X28, making it unavailable as a GPR",
-    .llvm_name = "reserve-x28",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -728,7 +639,6 @@ pub const feature_reserveX28 = Feature{
 pub const feature_sb = Feature{
     .name = "sb",
     .description = "Enable v8.5 Speculation Barrier",
-    .llvm_name = "sb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -736,7 +646,6 @@ pub const feature_sb = Feature{
 pub const feature_sel2 = Feature{
     .name = "sel2",
     .description = "Enable v8.4-A Secure Exception Level 2 extension",
-    .llvm_name = "sel2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -744,7 +653,6 @@ pub const feature_sel2 = Feature{
 pub const feature_sha2 = Feature{
     .name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
-    .llvm_name = "sha2",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -753,7 +661,6 @@ pub const feature_sha2 = Feature{
 pub const feature_sha3 = Feature{
     .name = "sha3",
     .description = "Enable SHA512 and SHA3 support",
-    .llvm_name = "sha3",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -762,7 +669,6 @@ pub const feature_sha3 = Feature{
 pub const feature_sm4 = Feature{
     .name = "sm4",
     .description = "Enable SM3 and SM4 support",
-    .llvm_name = "sm4",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
     },
@@ -771,7 +677,6 @@ pub const feature_sm4 = Feature{
 pub const feature_spe = Feature{
     .name = "spe",
     .description = "Enable Statistical Profiling extension",
-    .llvm_name = "spe",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -779,7 +684,6 @@ pub const feature_spe = Feature{
 pub const feature_ssbs = Feature{
     .name = "ssbs",
     .description = "Enable Speculative Store Bypass Safe bit",
-    .llvm_name = "ssbs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -787,7 +691,6 @@ pub const feature_ssbs = Feature{
 pub const feature_sve = Feature{
     .name = "sve",
     .description = "Enable Scalable Vector Extension (SVE) instructions",
-    .llvm_name = "sve",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -795,7 +698,6 @@ pub const feature_sve = Feature{
 pub const feature_sve2 = Feature{
     .name = "sve2",
     .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
-    .llvm_name = "sve2",
     .subfeatures = &[_]*const Feature {
         &feature_sve,
     },
@@ -804,7 +706,6 @@ pub const feature_sve2 = Feature{
 pub const feature_sve2Aes = Feature{
     .name = "sve2-aes",
     .description = "Enable AES SVE2 instructions",
-    .llvm_name = "sve2-aes",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
@@ -814,7 +715,6 @@ pub const feature_sve2Aes = Feature{
 pub const feature_sve2Bitperm = Feature{
     .name = "sve2-bitperm",
     .description = "Enable bit permutation SVE2 instructions",
-    .llvm_name = "sve2-bitperm",
     .subfeatures = &[_]*const Feature {
         &feature_sve,
     },
@@ -823,7 +723,6 @@ pub const feature_sve2Bitperm = Feature{
 pub const feature_sve2Sha3 = Feature{
     .name = "sve2-sha3",
     .description = "Enable SHA3 SVE2 instructions",
-    .llvm_name = "sve2-sha3",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
@@ -833,7 +732,6 @@ pub const feature_sve2Sha3 = Feature{
 pub const feature_sve2Sm4 = Feature{
     .name = "sve2-sm4",
     .description = "Enable SM4 SVE2 instructions",
-    .llvm_name = "sve2-sm4",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
@@ -843,7 +741,6 @@ pub const feature_sve2Sm4 = Feature{
 pub const feature_slowMisaligned128store = Feature{
     .name = "slow-misaligned-128store",
     .description = "Misaligned 128 bit stores are slow",
-    .llvm_name = "slow-misaligned-128store",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -851,7 +748,6 @@ pub const feature_slowMisaligned128store = Feature{
 pub const feature_slowPaired128 = Feature{
     .name = "slow-paired-128",
     .description = "Paired 128 bit loads and stores are slow",
-    .llvm_name = "slow-paired-128",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -859,7 +755,6 @@ pub const feature_slowPaired128 = Feature{
 pub const feature_slowStrqroStore = Feature{
     .name = "slow-strqro-store",
     .description = "STR of Q register with register offset is slow",
-    .llvm_name = "slow-strqro-store",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -867,7 +762,6 @@ pub const feature_slowStrqroStore = Feature{
 pub const feature_specrestrict = Feature{
     .name = "specrestrict",
     .description = "Enable architectural speculation restriction",
-    .llvm_name = "specrestrict",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -875,7 +769,6 @@ pub const feature_specrestrict = Feature{
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
     .description = "Disallow all unaligned memory access",
-    .llvm_name = "strict-align",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -883,7 +776,6 @@ pub const feature_strictAlign = Feature{
 pub const feature_tlbRmi = Feature{
     .name = "tlb-rmi",
     .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-    .llvm_name = "tlb-rmi",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -891,7 +783,6 @@ pub const feature_tlbRmi = Feature{
 pub const feature_tme = Feature{
     .name = "tme",
     .description = "Enable Transactional Memory Extension",
-    .llvm_name = "tme",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -899,7 +790,6 @@ pub const feature_tme = Feature{
 pub const feature_tracev84 = Feature{
     .name = "tracev8.4",
     .description = "Enable v8.4-A Trace extension",
-    .llvm_name = "tracev8.4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -907,7 +797,6 @@ pub const feature_tracev84 = Feature{
 pub const feature_trbe = Feature{
     .name = "trbe",
     .description = "Enable Trace Buffer Extension",
-    .llvm_name = "trbe",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -915,7 +804,6 @@ pub const feature_trbe = Feature{
 pub const feature_taggedGlobals = Feature{
     .name = "tagged-globals",
     .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
-    .llvm_name = "tagged-globals",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -923,7 +811,6 @@ pub const feature_taggedGlobals = Feature{
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .llvm_name = "use-aa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -931,7 +818,6 @@ pub const feature_useAa = Feature{
 pub const feature_tpidrEl1 = Feature{
     .name = "tpidr-el1",
     .description = "Permit use of TPIDR_EL1 for the TLS base",
-    .llvm_name = "tpidr-el1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -939,7 +825,6 @@ pub const feature_tpidrEl1 = Feature{
 pub const feature_tpidrEl2 = Feature{
     .name = "tpidr-el2",
     .description = "Permit use of TPIDR_EL2 for the TLS base",
-    .llvm_name = "tpidr-el2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -947,7 +832,6 @@ pub const feature_tpidrEl2 = Feature{
 pub const feature_tpidrEl3 = Feature{
     .name = "tpidr-el3",
     .description = "Permit use of TPIDR_EL3 for the TLS base",
-    .llvm_name = "tpidr-el3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -955,7 +839,6 @@ pub const feature_tpidrEl3 = Feature{
 pub const feature_useReciprocalSquareRoot = Feature{
     .name = "use-reciprocal-square-root",
     .description = "Use the reciprocal square root approximation",
-    .llvm_name = "use-reciprocal-square-root",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -963,7 +846,6 @@ pub const feature_useReciprocalSquareRoot = Feature{
 pub const feature_vh = Feature{
     .name = "vh",
     .description = "Enables ARM v8.1 Virtual Host extension",
-    .llvm_name = "vh",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -971,7 +853,6 @@ pub const feature_vh = Feature{
 pub const feature_zcm = Feature{
     .name = "zcm",
     .description = "Has zero-cycle register moves",
-    .llvm_name = "zcm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -979,7 +860,6 @@ pub const feature_zcm = Feature{
 pub const feature_zcz = Feature{
     .name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
-    .llvm_name = "zcz",
     .subfeatures = &[_]*const Feature {
         &feature_zczGp,
         &feature_zczFp,
@@ -989,7 +869,6 @@ pub const feature_zcz = Feature{
 pub const feature_zczFp = Feature{
     .name = "zcz-fp",
     .description = "Has zero-cycle zeroing instructions for FP registers",
-    .llvm_name = "zcz-fp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -997,7 +876,6 @@ pub const feature_zczFp = Feature{
 pub const feature_zczFpWorkaround = Feature{
     .name = "zcz-fp-workaround",
     .description = "The zero-cycle floating-point zeroing instruction has a bug",
-    .llvm_name = "zcz-fp-workaround",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1005,7 +883,6 @@ pub const feature_zczFpWorkaround = Feature{
 pub const feature_zczGp = Feature{
     .name = "zcz-gp",
     .description = "Has zero-cycle zeroing instructions for generic registers",
-    .llvm_name = "zcz-gp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1013,127 +890,121 @@ pub const feature_zczGp = Feature{
 pub const feature_v81a = Feature{
     .name = "v8.1a",
     .description = "Support ARM v8.1a instructions",
-    .llvm_name = "v8.1a",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_lse,
         &feature_lor,
-        &feature_crc,
         &feature_pan,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_crc,
     },
 };
 
 pub const feature_v82a = Feature{
     .name = "v8.2a",
     .description = "Support ARM v8.2a instructions",
-    .llvm_name = "v8.2a",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
+        &feature_lor,
+        &feature_pan,
         &feature_lse,
+        &feature_rdm,
+        &feature_vh,
         &feature_ras,
-        &feature_lor,
         &feature_crc,
-        &feature_pan,
         &feature_uaops,
-        &feature_vh,
     },
 };
 
 pub const feature_v83a = Feature{
     .name = "v8.3a",
     .description = "Support ARM v8.3a instructions",
-    .llvm_name = "v8.3a",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_pa,
         &feature_ccpp,
-        &feature_uaops,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
         &feature_lor,
         &feature_pan,
-        &feature_crc,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
+        &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
         &feature_rcpc,
         &feature_ccidx,
-        &feature_vh,
+        &feature_crc,
+        &feature_pa,
     },
 };
 
 pub const feature_v84a = Feature{
     .name = "v8.4a",
     .description = "Support ARM v8.4a instructions",
-    .llvm_name = "v8.4a",
     .subfeatures = &[_]*const Feature {
-        &feature_am,
-        &feature_nv,
         &feature_ccpp,
+        &feature_lor,
         &feature_dotprod,
+        &feature_fpArmv8,
+        &feature_crc,
+        &feature_fmi,
+        &feature_tracev84,
+        &feature_tlbRmi,
+        &feature_rdm,
+        &feature_ccidx,
+        &feature_mpam,
+        &feature_pan,
         &feature_lse,
         &feature_rcpc,
         &feature_uaops,
-        &feature_ccidx,
-        &feature_vh,
-        &feature_tracev84,
-        &feature_rdm,
-        &feature_fpArmv8,
+        &feature_sel2,
+        &feature_nv,
+        &feature_am,
         &feature_dit,
-        &feature_mpam,
+        &feature_vh,
         &feature_ras,
-        &feature_tlbRmi,
-        &feature_fmi,
-        &feature_crc,
         &feature_pa,
-        &feature_sel2,
-        &feature_lor,
-        &feature_pan,
     },
 };
 
 pub const feature_v85a = Feature{
     .name = "v8.5a",
     .description = "Support ARM v8.5a instructions",
-    .llvm_name = "v8.5a",
     .subfeatures = &[_]*const Feature {
-        &feature_am,
-        &feature_nv,
-        &feature_specrestrict,
         &feature_ccpp,
+        &feature_lor,
         &feature_dotprod,
-        &feature_lse,
-        &feature_ccdp,
+        &feature_fpArmv8,
+        &feature_ssbs,
+        &feature_crc,
+        &feature_fmi,
+        &feature_bti,
+        &feature_tracev84,
+        &feature_tlbRmi,
+        &feature_fptoint,
+        &feature_rdm,
         &feature_sb,
-        &feature_rcpc,
         &feature_ccidx,
-        &feature_uaops,
-        &feature_vh,
-        &feature_altnzcv,
-        &feature_tracev84,
-        &feature_rdm,
-        &feature_ssbs,
-        &feature_fpArmv8,
-        &feature_dit,
         &feature_mpam,
-        &feature_ras,
-        &feature_tlbRmi,
-        &feature_fmi,
-        &feature_crc,
+        &feature_pan,
+        &feature_lse,
         &feature_predres,
-        &feature_pa,
+        &feature_rcpc,
+        &feature_uaops,
         &feature_sel2,
-        &feature_lor,
-        &feature_fptoint,
-        &feature_bti,
-        &feature_pan,
+        &feature_nv,
+        &feature_am,
+        &feature_dit,
+        &feature_specrestrict,
+        &feature_vh,
+        &feature_altnzcv,
+        &feature_ras,
+        &feature_ccdp,
+        &feature_pa,
     },
 };
 
 pub const feature_a35 = Feature{
     .name = "a35",
     .description = "Cortex-A35 ARM processors",
-    .llvm_name = "a35",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_perfmon,
@@ -1144,15 +1015,14 @@ pub const feature_a35 = Feature{
 pub const feature_a53 = Feature{
     .name = "a53",
     .description = "Cortex-A53 ARM processors",
-    .llvm_name = "a53",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_balanceFpOps,
-        &feature_fpArmv8,
+        &feature_fuseAes,
+        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_useAa,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_crc,
     },
 };
@@ -1160,38 +1030,36 @@ pub const feature_a53 = Feature{
 pub const feature_a55 = Feature{
     .name = "a55",
     .description = "Cortex-A55 ARM processors",
-    .llvm_name = "a55",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_fuseAes,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_perfmon,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_crc,
     },
 };
 
 pub const feature_a57 = Feature{
     .name = "a57",
     .description = "Cortex-A57 ARM processors",
-    .llvm_name = "a57",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_fuseLiterals,
         &feature_balanceFpOps,
-        &feature_fpArmv8,
-        &feature_perfmon,
         &feature_predictableSelectExpensive,
-        &feature_fuseLiterals,
+        &feature_fuseAes,
+        &feature_usePostraScheduler,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_crc,
     },
 };
@@ -1199,352 +1067,335 @@ pub const feature_a57 = Feature{
 pub const feature_a65 = Feature{
     .name = "a65",
     .description = "Cortex-A65 ARM processors",
-    .llvm_name = "a65",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
+        &feature_rcpc,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_ras,
         &feature_ssbs,
+        &feature_crc,
     },
 };
 
 pub const feature_a72 = Feature{
     .name = "a72",
     .description = "Cortex-A72 ARM processors",
-    .llvm_name = "a72",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
         &feature_fuseAes,
+        &feature_crc,
+        &feature_perfmon,
     },
 };
 
 pub const feature_a73 = Feature{
     .name = "a73",
     .description = "Cortex-A73 ARM processors",
-    .llvm_name = "a73",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
         &feature_fuseAes,
+        &feature_crc,
+        &feature_perfmon,
     },
 };
 
 pub const feature_a75 = Feature{
     .name = "a75",
     .description = "Cortex-A75 ARM processors",
-    .llvm_name = "a75",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_fuseAes,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_perfmon,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_crc,
     },
 };
 
 pub const feature_a76 = Feature{
     .name = "a76",
     .description = "Cortex-A76 ARM processors",
-    .llvm_name = "a76",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
     },
 };
 
 pub const feature_cyclone = Feature{
     .name = "cyclone",
     .description = "Cyclone",
-    .llvm_name = "cyclone",
     .subfeatures = &[_]*const Feature {
-        &feature_zczGp,
-        &feature_arithBccFusion,
-        &feature_fuseAes,
-        &feature_zczFp,
         &feature_zczFpWorkaround,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_disableLatencySchedHeuristic,
+        &feature_fuseAes,
         &feature_zcm,
         &feature_arithCbzFusion,
-        &feature_fuseCryptoEor,
+        &feature_perfmon,
         &feature_alternateSextloadCvtF32Pattern,
+        &feature_arithBccFusion,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zczGp,
+        &feature_fuseCryptoEor,
+        &feature_fpArmv8,
+        &feature_zczFp,
     },
 };
 
 pub const feature_exynosm1 = Feature{
     .name = "exynosm1",
     .description = "Samsung Exynos-M1 processors",
-    .llvm_name = "exynosm1",
     .subfeatures = &[_]*const Feature {
+        &feature_useReciprocalSquareRoot,
+        &feature_fuseAes,
         &feature_usePostraScheduler,
         &feature_slowMisaligned128store,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
-        &feature_zczFp,
-        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_slowPaired128,
-        &feature_useReciprocalSquareRoot,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
+        &feature_slowPaired128,
     },
 };
 
 pub const feature_exynosm2 = Feature{
     .name = "exynosm2",
     .description = "Samsung Exynos-M2 processors",
-    .llvm_name = "exynosm2",
     .subfeatures = &[_]*const Feature {
+        &feature_fuseAes,
         &feature_usePostraScheduler,
         &feature_slowMisaligned128store,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
-        &feature_zczFp,
-        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_slowPaired128,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
+        &feature_slowPaired128,
     },
 };
 
 pub const feature_exynosm3 = Feature{
     .name = "exynosm3",
     .description = "Samsung Exynos-M3 processors",
-    .llvm_name = "exynosm3",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
+        &feature_fuseLiterals,
+        &feature_predictableSelectExpensive,
         &feature_fuseAes,
         &feature_fuseAddress,
-        &feature_zczFp,
-        &feature_fpArmv8,
+        &feature_fuseCsel,
+        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
-        &feature_fuseLiterals,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
-        &feature_lslFast,
-        &feature_fuseCsel,
     },
 };
 
 pub const feature_exynosm4 = Feature{
     .name = "exynosm4",
     .description = "Samsung Exynos-M4 processors",
-    .llvm_name = "exynosm4",
     .subfeatures = &[_]*const Feature {
+        &feature_fuseLiterals,
+        &feature_fuseAes,
         &feature_ccpp,
-        &feature_perfmon,
+        &feature_lor,
         &feature_dotprod,
-        &feature_fuseArithLogic,
-        &feature_force32bitJumpTables,
-        &feature_lslFast,
-        &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_lslFast,
+        &feature_crc,
         &feature_fuseAddress,
-        &feature_lse,
         &feature_arithCbzFusion,
-        &feature_uaops,
+        &feature_perfmon,
+        &feature_arithBccFusion,
+        &feature_zczGp,
+        &feature_rdm,
+        &feature_force32bitJumpTables,
+        &feature_pan,
+        &feature_lse,
         &feature_fuseCsel,
+        &feature_uaops,
+        &feature_fuseArithLogic,
+        &feature_usePostraScheduler,
         &feature_vh,
-        &feature_rdm,
-        &feature_fpArmv8,
         &feature_ras,
-        &feature_fuseLiterals,
-        &feature_crc,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
         &feature_zczFp,
-        &feature_lor,
-        &feature_pan,
     },
 };
 
 pub const feature_falkor = Feature{
     .name = "falkor",
     .description = "Qualcomm Falkor processors",
-    .llvm_name = "falkor",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
+        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
-        &feature_zczGp,
+        &feature_perfmon,
         &feature_slowStrqroStore,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_zczFp,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_predictableSelectExpensive,
         &feature_crc,
-        &feature_lslFast,
     },
 };
 
 pub const feature_kryo = Feature{
     .name = "kryo",
     .description = "Qualcomm Kryo processors",
-    .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
+        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_perfmon,
         &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_zczFp,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_predictableSelectExpensive,
         &feature_crc,
-        &feature_lslFast,
     },
 };
 
 pub const feature_neoversee1 = Feature{
     .name = "neoversee1",
     .description = "Neoverse E1 ARM processors",
-    .llvm_name = "neoversee1",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
     },
 };
 
 pub const feature_neoversen1 = Feature{
     .name = "neoversen1",
     .description = "Neoverse N1 ARM processors",
-    .llvm_name = "neoversen1",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_spe,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
     },
 };
 
 pub const feature_saphira = Feature{
     .name = "saphira",
     .description = "Qualcomm Saphira processors",
-    .llvm_name = "saphira",
     .subfeatures = &[_]*const Feature {
-        &feature_am,
-        &feature_nv,
         &feature_ccpp,
-        &feature_predictableSelectExpensive,
-        &feature_perfmon,
+        &feature_lor,
         &feature_dotprod,
-        &feature_spe,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_lslFast,
+        &feature_crc,
+        &feature_fmi,
+        &feature_predictableSelectExpensive,
+        &feature_tracev84,
+        &feature_tlbRmi,
+        &feature_perfmon,
         &feature_zczGp,
-        &feature_customCheapAsMove,
+        &feature_rdm,
+        &feature_ccidx,
+        &feature_mpam,
+        &feature_pan,
         &feature_lse,
         &feature_rcpc,
         &feature_uaops,
-        &feature_ccidx,
-        &feature_vh,
-        &feature_tracev84,
-        &feature_rdm,
-        &feature_fpArmv8,
+        &feature_sel2,
+        &feature_usePostraScheduler,
+        &feature_nv,
+        &feature_am,
+        &feature_spe,
         &feature_dit,
-        &feature_mpam,
+        &feature_vh,
         &feature_ras,
-        &feature_tlbRmi,
-        &feature_fmi,
-        &feature_crc,
-        &feature_usePostraScheduler,
-        &feature_pa,
         &feature_zczFp,
-        &feature_sel2,
-        &feature_lor,
-        &feature_pan,
+        &feature_pa,
     },
 };
 
 pub const feature_tsv110 = Feature{
     .name = "tsv110",
     .description = "HiSilicon TS-V110 processors",
-    .llvm_name = "tsv110",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
         &feature_fuseAes,
+        &feature_usePostraScheduler,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_uaops,
+        &feature_perfmon,
         &feature_spe,
-        &feature_crc,
         &feature_pan,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
+        &feature_ras,
+        &feature_crc,
     },
 };
 
 pub const feature_thunderx = Feature{
     .name = "thunderx",
     .description = "Cavium ThunderX processors",
-    .llvm_name = "thunderx",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
     },
 };
@@ -1552,31 +1403,29 @@ pub const feature_thunderx = Feature{
 pub const feature_thunderx2t99 = Feature{
     .name = "thunderx2t99",
     .description = "Cavium ThunderX2 processors",
-    .llvm_name = "thunderx2t99",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
-        &feature_lse,
-        &feature_fpArmv8,
         &feature_predictableSelectExpensive,
+        &feature_usePostraScheduler,
         &feature_lor,
-        &feature_crc,
+        &feature_lse,
         &feature_pan,
+        &feature_arithBccFusion,
+        &feature_rdm,
         &feature_aggressiveFma,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_crc,
     },
 };
 
 pub const feature_thunderxt81 = Feature{
     .name = "thunderxt81",
     .description = "Cavium ThunderX processors",
-    .llvm_name = "thunderxt81",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
     },
 };
@@ -1584,12 +1433,11 @@ pub const feature_thunderxt81 = Feature{
 pub const feature_thunderxt83 = Feature{
     .name = "thunderxt83",
     .description = "Cavium ThunderX processors",
-    .llvm_name = "thunderxt83",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
     },
 };
@@ -1597,12 +1445,11 @@ pub const feature_thunderxt83 = Feature{
 pub const feature_thunderxt88 = Feature{
     .name = "thunderxt88",
     .description = "Cavium ThunderX processors",
-    .llvm_name = "thunderxt88",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
     },
 };
@@ -1767,18 +1614,18 @@ pub const cpu_appleLatest = Cpu{
     .name = "apple-latest",
     .llvm_name = "apple-latest",
     .subfeatures = &[_]*const Feature {
-        &feature_zczGp,
-        &feature_arithBccFusion,
-        &feature_fuseAes,
-        &feature_zczFp,
         &feature_zczFpWorkaround,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_disableLatencySchedHeuristic,
+        &feature_fuseAes,
         &feature_zcm,
         &feature_arithCbzFusion,
-        &feature_fuseCryptoEor,
+        &feature_perfmon,
         &feature_alternateSextloadCvtF32Pattern,
+        &feature_arithBccFusion,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zczGp,
+        &feature_fuseCryptoEor,
+        &feature_fpArmv8,
+        &feature_zczFp,
         &feature_cyclone,
     },
 };
@@ -1798,13 +1645,13 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_balanceFpOps,
-        &feature_fpArmv8,
+        &feature_fuseAes,
+        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_useAa,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_crc,
         &feature_a53,
     },
@@ -1814,20 +1661,20 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_fuseAes,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_perfmon,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_crc,
         &feature_a55,
     },
 };
@@ -1836,14 +1683,14 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_fuseLiterals,
         &feature_balanceFpOps,
-        &feature_fpArmv8,
-        &feature_perfmon,
         &feature_predictableSelectExpensive,
-        &feature_fuseLiterals,
+        &feature_fuseAes,
+        &feature_usePostraScheduler,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_crc,
         &feature_a57,
     },
@@ -1853,19 +1700,19 @@ pub const cpu_cortexA65 = Cpu{
     .name = "cortex-a65",
     .llvm_name = "cortex-a65",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
+        &feature_rcpc,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_ras,
         &feature_ssbs,
+        &feature_crc,
         &feature_a65,
     },
 };
@@ -1874,19 +1721,19 @@ pub const cpu_cortexA65ae = Cpu{
     .name = "cortex-a65ae",
     .llvm_name = "cortex-a65ae",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
+        &feature_rcpc,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_ras,
         &feature_ssbs,
+        &feature_crc,
         &feature_a65,
     },
 };
@@ -1896,9 +1743,9 @@ pub const cpu_cortexA72 = Cpu{
     .llvm_name = "cortex-a72",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
         &feature_fuseAes,
+        &feature_crc,
+        &feature_perfmon,
         &feature_a72,
     },
 };
@@ -1908,9 +1755,9 @@ pub const cpu_cortexA73 = Cpu{
     .llvm_name = "cortex-a73",
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
         &feature_fuseAes,
+        &feature_crc,
+        &feature_perfmon,
         &feature_a73,
     },
 };
@@ -1919,20 +1766,20 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_fuseAes,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_perfmon,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_crc,
         &feature_a75,
     },
 };
@@ -1941,19 +1788,19 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
         &feature_a76,
     },
 };
@@ -1962,19 +1809,19 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
         &feature_a76,
     },
 };
@@ -1983,18 +1830,18 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .subfeatures = &[_]*const Feature {
-        &feature_zczGp,
-        &feature_arithBccFusion,
-        &feature_fuseAes,
-        &feature_zczFp,
         &feature_zczFpWorkaround,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_disableLatencySchedHeuristic,
+        &feature_fuseAes,
         &feature_zcm,
         &feature_arithCbzFusion,
-        &feature_fuseCryptoEor,
+        &feature_perfmon,
         &feature_alternateSextloadCvtF32Pattern,
+        &feature_arithBccFusion,
+        &feature_disableLatencySchedHeuristic,
+        &feature_zczGp,
+        &feature_fuseCryptoEor,
+        &feature_fpArmv8,
+        &feature_zczFp,
         &feature_cyclone,
     },
 };
@@ -2003,17 +1850,17 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
     .subfeatures = &[_]*const Feature {
+        &feature_useReciprocalSquareRoot,
+        &feature_fuseAes,
         &feature_usePostraScheduler,
         &feature_slowMisaligned128store,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
-        &feature_zczFp,
-        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_slowPaired128,
-        &feature_useReciprocalSquareRoot,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
+        &feature_slowPaired128,
         &feature_exynosm1,
     },
 };
@@ -2022,16 +1869,16 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .subfeatures = &[_]*const Feature {
+        &feature_fuseAes,
         &feature_usePostraScheduler,
         &feature_slowMisaligned128store,
-        &feature_customCheapAsMove,
-        &feature_fuseAes,
-        &feature_zczFp,
-        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_slowPaired128,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
+        &feature_slowPaired128,
         &feature_exynosm2,
     },
 };
@@ -2040,19 +1887,19 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
+        &feature_fuseLiterals,
+        &feature_predictableSelectExpensive,
         &feature_fuseAes,
         &feature_fuseAddress,
-        &feature_zczFp,
-        &feature_fpArmv8,
+        &feature_fuseCsel,
+        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
-        &feature_fuseLiterals,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_force32bitJumpTables,
+        &feature_zczFp,
         &feature_crc,
-        &feature_lslFast,
-        &feature_fuseCsel,
         &feature_exynosm3,
     },
 };
@@ -2061,31 +1908,31 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
     .subfeatures = &[_]*const Feature {
+        &feature_fuseLiterals,
+        &feature_fuseAes,
         &feature_ccpp,
-        &feature_perfmon,
+        &feature_lor,
         &feature_dotprod,
-        &feature_fuseArithLogic,
-        &feature_force32bitJumpTables,
-        &feature_lslFast,
-        &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_lslFast,
+        &feature_crc,
         &feature_fuseAddress,
-        &feature_lse,
         &feature_arithCbzFusion,
-        &feature_uaops,
+        &feature_perfmon,
+        &feature_arithBccFusion,
+        &feature_zczGp,
+        &feature_rdm,
+        &feature_force32bitJumpTables,
+        &feature_pan,
+        &feature_lse,
         &feature_fuseCsel,
+        &feature_uaops,
+        &feature_fuseArithLogic,
+        &feature_usePostraScheduler,
         &feature_vh,
-        &feature_rdm,
-        &feature_fpArmv8,
         &feature_ras,
-        &feature_fuseLiterals,
-        &feature_crc,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
         &feature_zczFp,
-        &feature_lor,
-        &feature_pan,
         &feature_exynosm4,
     },
 };
@@ -2094,31 +1941,31 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
     .subfeatures = &[_]*const Feature {
+        &feature_fuseLiterals,
+        &feature_fuseAes,
         &feature_ccpp,
-        &feature_perfmon,
+        &feature_lor,
         &feature_dotprod,
-        &feature_fuseArithLogic,
-        &feature_force32bitJumpTables,
-        &feature_lslFast,
-        &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_lslFast,
+        &feature_crc,
         &feature_fuseAddress,
-        &feature_lse,
         &feature_arithCbzFusion,
-        &feature_uaops,
+        &feature_perfmon,
+        &feature_arithBccFusion,
+        &feature_zczGp,
+        &feature_rdm,
+        &feature_force32bitJumpTables,
+        &feature_pan,
+        &feature_lse,
         &feature_fuseCsel,
+        &feature_uaops,
+        &feature_fuseArithLogic,
+        &feature_usePostraScheduler,
         &feature_vh,
-        &feature_rdm,
-        &feature_fpArmv8,
         &feature_ras,
-        &feature_fuseLiterals,
-        &feature_crc,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
         &feature_zczFp,
-        &feature_lor,
-        &feature_pan,
         &feature_exynosm4,
     },
 };
@@ -2127,17 +1974,17 @@ pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
+        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
-        &feature_zczGp,
+        &feature_perfmon,
         &feature_slowStrqroStore,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_zczFp,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_predictableSelectExpensive,
         &feature_crc,
-        &feature_lslFast,
         &feature_falkor,
     },
 };
@@ -2160,15 +2007,15 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
+        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_perfmon,
         &feature_zczGp,
+        &feature_fpArmv8,
         &feature_customCheapAsMove,
+        &feature_lslFast,
         &feature_zczFp,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_predictableSelectExpensive,
         &feature_crc,
-        &feature_lslFast,
         &feature_kryo,
     },
 };
@@ -2177,19 +2024,19 @@ pub const cpu_neoverseE1 = Cpu{
     .name = "neoverse-e1",
     .llvm_name = "neoverse-e1",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
         &feature_neoversee1,
     },
 };
@@ -2198,20 +2045,20 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
         &feature_spe,
         &feature_pan,
-        &feature_crc,
-        &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
+        &feature_ras,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_ssbs,
+        &feature_crc,
         &feature_neoversen1,
     },
 };
@@ -2220,36 +2067,36 @@ pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
     .subfeatures = &[_]*const Feature {
-        &feature_am,
-        &feature_nv,
         &feature_ccpp,
-        &feature_predictableSelectExpensive,
-        &feature_perfmon,
+        &feature_lor,
         &feature_dotprod,
-        &feature_spe,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
         &feature_lslFast,
+        &feature_crc,
+        &feature_fmi,
+        &feature_predictableSelectExpensive,
+        &feature_tracev84,
+        &feature_tlbRmi,
+        &feature_perfmon,
         &feature_zczGp,
-        &feature_customCheapAsMove,
+        &feature_rdm,
+        &feature_ccidx,
+        &feature_mpam,
+        &feature_pan,
         &feature_lse,
         &feature_rcpc,
         &feature_uaops,
-        &feature_ccidx,
-        &feature_vh,
-        &feature_tracev84,
-        &feature_rdm,
-        &feature_fpArmv8,
+        &feature_sel2,
+        &feature_usePostraScheduler,
+        &feature_nv,
+        &feature_am,
+        &feature_spe,
         &feature_dit,
-        &feature_mpam,
+        &feature_vh,
         &feature_ras,
-        &feature_tlbRmi,
-        &feature_fmi,
-        &feature_crc,
-        &feature_usePostraScheduler,
-        &feature_pa,
         &feature_zczFp,
-        &feature_sel2,
-        &feature_lor,
-        &feature_pan,
+        &feature_pa,
         &feature_saphira,
     },
 };
@@ -2258,10 +2105,10 @@ pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
         &feature_thunderx,
     },
@@ -2271,17 +2118,17 @@ pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
-        &feature_lse,
-        &feature_fpArmv8,
         &feature_predictableSelectExpensive,
+        &feature_usePostraScheduler,
         &feature_lor,
-        &feature_crc,
+        &feature_lse,
         &feature_pan,
+        &feature_arithBccFusion,
+        &feature_rdm,
         &feature_aggressiveFma,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_crc,
         &feature_thunderx2t99,
     },
 };
@@ -2290,10 +2137,10 @@ pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
         &feature_thunderxt81,
     },
@@ -2303,10 +2150,10 @@ pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
         &feature_thunderxt83,
     },
@@ -2316,10 +2163,10 @@ pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
     .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
         &feature_crc,
         &feature_thunderxt88,
     },
@@ -2329,22 +2176,22 @@ pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
     .subfeatures = &[_]*const Feature {
-        &feature_rdm,
-        &feature_usePostraScheduler,
-        &feature_customCheapAsMove,
         &feature_fuseAes,
+        &feature_usePostraScheduler,
         &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_ras,
-        &feature_dotprod,
         &feature_lor,
+        &feature_dotprod,
+        &feature_uaops,
+        &feature_perfmon,
         &feature_spe,
-        &feature_crc,
         &feature_pan,
-        &feature_uaops,
+        &feature_lse,
+        &feature_rdm,
         &feature_vh,
+        &feature_fpArmv8,
+        &feature_customCheapAsMove,
+        &feature_ras,
+        &feature_crc,
         &feature_tsv110,
     },
 };
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 80563b4d02a289ab8c9f34805d99e714dedce379..e6eec35ab3d6c4635c12e1ab3ac3e2d33ec579b6 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_BitInsts16 = Feature{
     .name = "16-bit-insts",
     .description = "Has i16/f16 instructions",
-    .llvm_name = "16-bit-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_BitInsts16 = Feature{
 pub const feature_addNoCarryInsts = Feature{
     .name = "add-no-carry-insts",
     .description = "Have VALU add/sub instructions without carry out",
-    .llvm_name = "add-no-carry-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_addNoCarryInsts = Feature{
 pub const feature_apertureRegs = Feature{
     .name = "aperture-regs",
     .description = "Has Memory Aperture Base and Size Registers",
-    .llvm_name = "aperture-regs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_apertureRegs = Feature{
 pub const feature_atomicFaddInsts = Feature{
     .name = "atomic-fadd-insts",
     .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-    .llvm_name = "atomic-fadd-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_atomicFaddInsts = Feature{
 pub const feature_autoWaitcntBeforeBarrier = Feature{
     .name = "auto-waitcnt-before-barrier",
     .description = "Hardware automatically inserts waitcnt before barrier",
-    .llvm_name = "auto-waitcnt-before-barrier",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{
 pub const feature_ciInsts = Feature{
     .name = "ci-insts",
     .description = "Additional instructions for CI+",
-    .llvm_name = "ci-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_ciInsts = Feature{
 pub const feature_codeObjectV3 = Feature{
     .name = "code-object-v3",
     .description = "Generate code object version 3",
-    .llvm_name = "code-object-v3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_codeObjectV3 = Feature{
 pub const feature_cumode = Feature{
     .name = "cumode",
     .description = "Enable CU wavefront execution mode",
-    .llvm_name = "cumode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -68,7 +60,6 @@ pub const feature_cumode = Feature{
 pub const feature_dlInsts = Feature{
     .name = "dl-insts",
     .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-    .llvm_name = "dl-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -76,7 +67,6 @@ pub const feature_dlInsts = Feature{
 pub const feature_dpp = Feature{
     .name = "dpp",
     .description = "Support DPP (Data Parallel Primitives) extension",
-    .llvm_name = "dpp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -84,7 +74,6 @@ pub const feature_dpp = Feature{
 pub const feature_dpp8 = Feature{
     .name = "dpp8",
     .description = "Support DPP8 (Data Parallel Primitives) extension",
-    .llvm_name = "dpp8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -92,7 +81,6 @@ pub const feature_dpp8 = Feature{
 pub const feature_noSramEccSupport = Feature{
     .name = "no-sram-ecc-support",
     .description = "Hardware does not support SRAM ECC",
-    .llvm_name = "no-sram-ecc-support",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -100,7 +88,6 @@ pub const feature_noSramEccSupport = Feature{
 pub const feature_noXnackSupport = Feature{
     .name = "no-xnack-support",
     .description = "Hardware does not support XNACK",
-    .llvm_name = "no-xnack-support",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -108,7 +95,6 @@ pub const feature_noXnackSupport = Feature{
 pub const feature_dot1Insts = Feature{
     .name = "dot1-insts",
     .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-    .llvm_name = "dot1-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -116,7 +102,6 @@ pub const feature_dot1Insts = Feature{
 pub const feature_dot2Insts = Feature{
     .name = "dot2-insts",
     .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-    .llvm_name = "dot2-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -124,7 +109,6 @@ pub const feature_dot2Insts = Feature{
 pub const feature_dot3Insts = Feature{
     .name = "dot3-insts",
     .description = "Has v_dot8c_i32_i4 instruction",
-    .llvm_name = "dot3-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -132,7 +116,6 @@ pub const feature_dot3Insts = Feature{
 pub const feature_dot4Insts = Feature{
     .name = "dot4-insts",
     .description = "Has v_dot2c_i32_i16 instruction",
-    .llvm_name = "dot4-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -140,7 +123,6 @@ pub const feature_dot4Insts = Feature{
 pub const feature_dot5Insts = Feature{
     .name = "dot5-insts",
     .description = "Has v_dot2c_f32_f16 instruction",
-    .llvm_name = "dot5-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -148,7 +130,6 @@ pub const feature_dot5Insts = Feature{
 pub const feature_dot6Insts = Feature{
     .name = "dot6-insts",
     .description = "Has v_dot4c_i32_i8 instruction",
-    .llvm_name = "dot6-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -156,7 +137,6 @@ pub const feature_dot6Insts = Feature{
 pub const feature_DumpCode = Feature{
     .name = "DumpCode",
     .description = "Dump MachineInstrs in the CodeEmitter",
-    .llvm_name = "DumpCode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -164,7 +144,6 @@ pub const feature_DumpCode = Feature{
 pub const feature_dumpcode = Feature{
     .name = "dumpcode",
     .description = "Dump MachineInstrs in the CodeEmitter",
-    .llvm_name = "dumpcode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -172,7 +151,6 @@ pub const feature_dumpcode = Feature{
 pub const feature_enableDs128 = Feature{
     .name = "enable-ds128",
     .description = "Use ds_{read|write}_b128",
-    .llvm_name = "enable-ds128",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -180,7 +158,6 @@ pub const feature_enableDs128 = Feature{
 pub const feature_loadStoreOpt = Feature{
     .name = "load-store-opt",
     .description = "Enable SI load/store optimizer pass",
-    .llvm_name = "load-store-opt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -188,7 +165,6 @@ pub const feature_loadStoreOpt = Feature{
 pub const feature_enablePrtStrictNull = Feature{
     .name = "enable-prt-strict-null",
     .description = "Enable zeroing of result registers for sparse texture fetches",
-    .llvm_name = "enable-prt-strict-null",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -196,7 +172,6 @@ pub const feature_enablePrtStrictNull = Feature{
 pub const feature_siScheduler = Feature{
     .name = "si-scheduler",
     .description = "Enable SI Machine Scheduler",
-    .llvm_name = "si-scheduler",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -204,7 +179,6 @@ pub const feature_siScheduler = Feature{
 pub const feature_unsafeDsOffsetFolding = Feature{
     .name = "unsafe-ds-offset-folding",
     .description = "Force using DS instruction immediate offsets on SI",
-    .llvm_name = "unsafe-ds-offset-folding",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -212,7 +186,6 @@ pub const feature_unsafeDsOffsetFolding = Feature{
 pub const feature_fmaf = Feature{
     .name = "fmaf",
     .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-    .llvm_name = "fmaf",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -220,7 +193,6 @@ pub const feature_fmaf = Feature{
 pub const feature_fp16Denormals = Feature{
     .name = "fp16-denormals",
     .description = "Enable half precision denormal handling",
-    .llvm_name = "fp16-denormals",
     .subfeatures = &[_]*const Feature {
         &feature_fp64,
     },
@@ -229,7 +201,6 @@ pub const feature_fp16Denormals = Feature{
 pub const feature_fp32Denormals = Feature{
     .name = "fp32-denormals",
     .description = "Enable single precision denormal handling",
-    .llvm_name = "fp32-denormals",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -237,7 +208,6 @@ pub const feature_fp32Denormals = Feature{
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Enable double precision operations",
-    .llvm_name = "fp64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -245,7 +215,6 @@ pub const feature_fp64 = Feature{
 pub const feature_fp64Denormals = Feature{
     .name = "fp64-denormals",
     .description = "Enable double and half precision denormal handling",
-    .llvm_name = "fp64-denormals",
     .subfeatures = &[_]*const Feature {
         &feature_fp64,
     },
@@ -254,7 +223,6 @@ pub const feature_fp64Denormals = Feature{
 pub const feature_fp64Fp16Denormals = Feature{
     .name = "fp64-fp16-denormals",
     .description = "Enable double and half precision denormal handling",
-    .llvm_name = "fp64-fp16-denormals",
     .subfeatures = &[_]*const Feature {
         &feature_fp64,
     },
@@ -263,7 +231,6 @@ pub const feature_fp64Fp16Denormals = Feature{
 pub const feature_fpExceptions = Feature{
     .name = "fp-exceptions",
     .description = "Enable floating point exceptions",
-    .llvm_name = "fp-exceptions",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -271,7 +238,6 @@ pub const feature_fpExceptions = Feature{
 pub const feature_fastFmaf = Feature{
     .name = "fast-fmaf",
     .description = "Assuming f32 fma is at least as fast as mul + add",
-    .llvm_name = "fast-fmaf",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -279,7 +245,6 @@ pub const feature_fastFmaf = Feature{
 pub const feature_flatAddressSpace = Feature{
     .name = "flat-address-space",
     .description = "Support flat address space",
-    .llvm_name = "flat-address-space",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -287,7 +252,6 @@ pub const feature_flatAddressSpace = Feature{
 pub const feature_flatForGlobal = Feature{
     .name = "flat-for-global",
     .description = "Force to generate flat instruction for global",
-    .llvm_name = "flat-for-global",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -295,7 +259,6 @@ pub const feature_flatForGlobal = Feature{
 pub const feature_flatGlobalInsts = Feature{
     .name = "flat-global-insts",
     .description = "Have global_* flat memory instructions",
-    .llvm_name = "flat-global-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -303,7 +266,6 @@ pub const feature_flatGlobalInsts = Feature{
 pub const feature_flatInstOffsets = Feature{
     .name = "flat-inst-offsets",
     .description = "Flat instructions have immediate offset addressing mode",
-    .llvm_name = "flat-inst-offsets",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -311,7 +273,6 @@ pub const feature_flatInstOffsets = Feature{
 pub const feature_flatScratchInsts = Feature{
     .name = "flat-scratch-insts",
     .description = "Have scratch_* flat memory instructions",
-    .llvm_name = "flat-scratch-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -319,7 +280,6 @@ pub const feature_flatScratchInsts = Feature{
 pub const feature_flatSegmentOffsetBug = Feature{
     .name = "flat-segment-offset-bug",
     .description = "GFX10 bug, inst_offset ignored in flat segment",
-    .llvm_name = "flat-segment-offset-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -327,7 +287,6 @@ pub const feature_flatSegmentOffsetBug = Feature{
 pub const feature_fmaMixInsts = Feature{
     .name = "fma-mix-insts",
     .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-    .llvm_name = "fma-mix-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -335,7 +294,6 @@ pub const feature_fmaMixInsts = Feature{
 pub const feature_gcn3Encoding = Feature{
     .name = "gcn3-encoding",
     .description = "Encoding format for VI",
-    .llvm_name = "gcn3-encoding",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -343,7 +301,6 @@ pub const feature_gcn3Encoding = Feature{
 pub const feature_gfx7Gfx8Gfx9Insts = Feature{
     .name = "gfx7-gfx8-gfx9-insts",
     .description = "Instructions shared in GFX7, GFX8, GFX9",
-    .llvm_name = "gfx7-gfx8-gfx9-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -351,7 +308,6 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{
 pub const feature_gfx8Insts = Feature{
     .name = "gfx8-insts",
     .description = "Additional instructions for GFX8+",
-    .llvm_name = "gfx8-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -359,45 +315,43 @@ pub const feature_gfx8Insts = Feature{
 pub const feature_gfx9 = Feature{
     .name = "gfx9",
     .description = "GFX9 GPU generation",
-    .llvm_name = "gfx9",
     .subfeatures = &[_]*const Feature {
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
     },
 };
 
 pub const feature_gfx9Insts = Feature{
     .name = "gfx9-insts",
     .description = "Additional instructions for GFX9+",
-    .llvm_name = "gfx9-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -405,49 +359,47 @@ pub const feature_gfx9Insts = Feature{
 pub const feature_gfx10 = Feature{
     .name = "gfx10",
     .description = "GFX10 GPU generation",
-    .llvm_name = "gfx10",
     .subfeatures = &[_]*const Feature {
-        &feature_movrel,
-        &feature_gfx9Insts,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_noSdstCmpx,
-        &feature_fmaMixInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_sdwaScalar,
+        &feature_registerBanking,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_sdwaSdst,
+        &feature_ciInsts,
         &feature_apertureRegs,
+        &feature_intClampInsts,
         &feature_flatScratchInsts,
+        &feature_sdwaScalar,
+        &feature_fastFmaf,
+        &feature_pkFmacF16Inst,
         &feature_vscnt,
-        &feature_noDataDepHazard,
+        &feature_movrel,
+        &feature_fmaMixInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_sdwaOmod,
+        &feature_vop3Literal,
+        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_addNoCarryInsts,
+        &feature_noDataDepHazard,
+        &feature_flatInstOffsets,
         &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_dpp8,
-        &feature_BitInsts16,
-        &feature_registerBanking,
-        &feature_gfx8Insts,
+        &feature_gfx9Insts,
         &feature_flatGlobalInsts,
-        &feature_flatInstOffsets,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_fastFmaf,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_gfx10Insts,
+        &feature_BitInsts16,
+        &feature_noSdstCmpx,
     },
 };
 
 pub const feature_gfx10Insts = Feature{
     .name = "gfx10-insts",
     .description = "Additional instructions for GFX10+",
-    .llvm_name = "gfx10-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -455,7 +407,6 @@ pub const feature_gfx10Insts = Feature{
 pub const feature_instFwdPrefetchBug = Feature{
     .name = "inst-fwd-prefetch-bug",
     .description = "S_INST_PREFETCH instruction causes shader to hang",
-    .llvm_name = "inst-fwd-prefetch-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -463,7 +414,6 @@ pub const feature_instFwdPrefetchBug = Feature{
 pub const feature_intClampInsts = Feature{
     .name = "int-clamp-insts",
     .description = "Support clamp for integer destination",
-    .llvm_name = "int-clamp-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -471,7 +421,6 @@ pub const feature_intClampInsts = Feature{
 pub const feature_inv2piInlineImm = Feature{
     .name = "inv-2pi-inline-imm",
     .description = "Has 1 / (2 * pi) as inline immediate",
-    .llvm_name = "inv-2pi-inline-imm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -479,7 +428,6 @@ pub const feature_inv2piInlineImm = Feature{
 pub const feature_ldsbankcount16 = Feature{
     .name = "ldsbankcount16",
     .description = "The number of LDS banks per compute unit.",
-    .llvm_name = "ldsbankcount16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -487,7 +435,6 @@ pub const feature_ldsbankcount16 = Feature{
 pub const feature_ldsbankcount32 = Feature{
     .name = "ldsbankcount32",
     .description = "The number of LDS banks per compute unit.",
-    .llvm_name = "ldsbankcount32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -495,7 +442,6 @@ pub const feature_ldsbankcount32 = Feature{
 pub const feature_ldsBranchVmemWarHazard = Feature{
     .name = "lds-branch-vmem-war-hazard",
     .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-    .llvm_name = "lds-branch-vmem-war-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -503,7 +449,6 @@ pub const feature_ldsBranchVmemWarHazard = Feature{
 pub const feature_ldsMisalignedBug = Feature{
     .name = "lds-misaligned-bug",
     .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-    .llvm_name = "lds-misaligned-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -511,7 +456,6 @@ pub const feature_ldsMisalignedBug = Feature{
 pub const feature_localmemorysize0 = Feature{
     .name = "localmemorysize0",
     .description = "The size of local memory in bytes",
-    .llvm_name = "localmemorysize0",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -519,7 +463,6 @@ pub const feature_localmemorysize0 = Feature{
 pub const feature_localmemorysize32768 = Feature{
     .name = "localmemorysize32768",
     .description = "The size of local memory in bytes",
-    .llvm_name = "localmemorysize32768",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -527,7 +470,6 @@ pub const feature_localmemorysize32768 = Feature{
 pub const feature_localmemorysize65536 = Feature{
     .name = "localmemorysize65536",
     .description = "The size of local memory in bytes",
-    .llvm_name = "localmemorysize65536",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -535,7 +477,6 @@ pub const feature_localmemorysize65536 = Feature{
 pub const feature_maiInsts = Feature{
     .name = "mai-insts",
     .description = "Has mAI instructions",
-    .llvm_name = "mai-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -543,7 +484,6 @@ pub const feature_maiInsts = Feature{
 pub const feature_mfmaInlineLiteralBug = Feature{
     .name = "mfma-inline-literal-bug",
     .description = "MFMA cannot use inline literal as SrcC",
-    .llvm_name = "mfma-inline-literal-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -551,7 +491,6 @@ pub const feature_mfmaInlineLiteralBug = Feature{
 pub const feature_mimgR128 = Feature{
     .name = "mimg-r128",
     .description = "Support 128-bit texture resources",
-    .llvm_name = "mimg-r128",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -559,7 +498,6 @@ pub const feature_mimgR128 = Feature{
 pub const feature_madMixInsts = Feature{
     .name = "mad-mix-insts",
     .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-    .llvm_name = "mad-mix-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -567,7 +505,6 @@ pub const feature_madMixInsts = Feature{
 pub const feature_maxPrivateElementSize4 = Feature{
     .name = "max-private-element-size-4",
     .description = "Maximum private access size may be 4",
-    .llvm_name = "max-private-element-size-4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -575,7 +512,6 @@ pub const feature_maxPrivateElementSize4 = Feature{
 pub const feature_maxPrivateElementSize8 = Feature{
     .name = "max-private-element-size-8",
     .description = "Maximum private access size may be 8",
-    .llvm_name = "max-private-element-size-8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -583,7 +519,6 @@ pub const feature_maxPrivateElementSize8 = Feature{
 pub const feature_maxPrivateElementSize16 = Feature{
     .name = "max-private-element-size-16",
     .description = "Maximum private access size may be 16",
-    .llvm_name = "max-private-element-size-16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -591,7 +526,6 @@ pub const feature_maxPrivateElementSize16 = Feature{
 pub const feature_movrel = Feature{
     .name = "movrel",
     .description = "Has v_movrel*_b32 instructions",
-    .llvm_name = "movrel",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -599,7 +533,6 @@ pub const feature_movrel = Feature{
 pub const feature_nsaEncoding = Feature{
     .name = "nsa-encoding",
     .description = "Support NSA encoding for image instructions",
-    .llvm_name = "nsa-encoding",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -607,7 +540,6 @@ pub const feature_nsaEncoding = Feature{
 pub const feature_nsaToVmemBug = Feature{
     .name = "nsa-to-vmem-bug",
     .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-    .llvm_name = "nsa-to-vmem-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -615,7 +547,6 @@ pub const feature_nsaToVmemBug = Feature{
 pub const feature_noDataDepHazard = Feature{
     .name = "no-data-dep-hazard",
     .description = "Does not need SW waitstates",
-    .llvm_name = "no-data-dep-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -623,7 +554,6 @@ pub const feature_noDataDepHazard = Feature{
 pub const feature_noSdstCmpx = Feature{
     .name = "no-sdst-cmpx",
     .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-    .llvm_name = "no-sdst-cmpx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -631,7 +561,6 @@ pub const feature_noSdstCmpx = Feature{
 pub const feature_offset3fBug = Feature{
     .name = "offset-3f-bug",
     .description = "Branch offset of 3f hardware bug",
-    .llvm_name = "offset-3f-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -639,7 +568,6 @@ pub const feature_offset3fBug = Feature{
 pub const feature_pkFmacF16Inst = Feature{
     .name = "pk-fmac-f16-inst",
     .description = "Has v_pk_fmac_f16 instruction",
-    .llvm_name = "pk-fmac-f16-inst",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -647,7 +575,6 @@ pub const feature_pkFmacF16Inst = Feature{
 pub const feature_promoteAlloca = Feature{
     .name = "promote-alloca",
     .description = "Enable promote alloca pass",
-    .llvm_name = "promote-alloca",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -655,7 +582,6 @@ pub const feature_promoteAlloca = Feature{
 pub const feature_r128A16 = Feature{
     .name = "r128-a16",
     .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-    .llvm_name = "r128-a16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -663,7 +589,6 @@ pub const feature_r128A16 = Feature{
 pub const feature_registerBanking = Feature{
     .name = "register-banking",
     .description = "Has register banking",
-    .llvm_name = "register-banking",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -671,7 +596,6 @@ pub const feature_registerBanking = Feature{
 pub const feature_sdwa = Feature{
     .name = "sdwa",
     .description = "Support SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -679,7 +603,6 @@ pub const feature_sdwa = Feature{
 pub const feature_sdwaMav = Feature{
     .name = "sdwa-mav",
     .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa-mav",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -687,7 +610,6 @@ pub const feature_sdwaMav = Feature{
 pub const feature_sdwaOmod = Feature{
     .name = "sdwa-omod",
     .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa-omod",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -695,7 +617,6 @@ pub const feature_sdwaOmod = Feature{
 pub const feature_sdwaOutModsVopc = Feature{
     .name = "sdwa-out-mods-vopc",
     .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa-out-mods-vopc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -703,7 +624,6 @@ pub const feature_sdwaOutModsVopc = Feature{
 pub const feature_sdwaScalar = Feature{
     .name = "sdwa-scalar",
     .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa-scalar",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -711,7 +631,6 @@ pub const feature_sdwaScalar = Feature{
 pub const feature_sdwaSdst = Feature{
     .name = "sdwa-sdst",
     .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .llvm_name = "sdwa-sdst",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -719,7 +638,6 @@ pub const feature_sdwaSdst = Feature{
 pub const feature_sgprInitBug = Feature{
     .name = "sgpr-init-bug",
     .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-    .llvm_name = "sgpr-init-bug",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -727,7 +645,6 @@ pub const feature_sgprInitBug = Feature{
 pub const feature_smemToVectorWriteHazard = Feature{
     .name = "smem-to-vector-write-hazard",
     .description = "s_load_dword followed by v_cmp page faults",
-    .llvm_name = "smem-to-vector-write-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -735,7 +652,6 @@ pub const feature_smemToVectorWriteHazard = Feature{
 pub const feature_sMemrealtime = Feature{
     .name = "s-memrealtime",
     .description = "Has s_memrealtime instruction",
-    .llvm_name = "s-memrealtime",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -743,7 +659,6 @@ pub const feature_sMemrealtime = Feature{
 pub const feature_sramEcc = Feature{
     .name = "sram-ecc",
     .description = "Enable SRAM ECC",
-    .llvm_name = "sram-ecc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -751,7 +666,6 @@ pub const feature_sramEcc = Feature{
 pub const feature_scalarAtomics = Feature{
     .name = "scalar-atomics",
     .description = "Has atomic scalar memory instructions",
-    .llvm_name = "scalar-atomics",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -759,7 +673,6 @@ pub const feature_scalarAtomics = Feature{
 pub const feature_scalarFlatScratchInsts = Feature{
     .name = "scalar-flat-scratch-insts",
     .description = "Have s_scratch_* flat memory instructions",
-    .llvm_name = "scalar-flat-scratch-insts",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -767,7 +680,6 @@ pub const feature_scalarFlatScratchInsts = Feature{
 pub const feature_scalarStores = Feature{
     .name = "scalar-stores",
     .description = "Has store scalar memory instructions",
-    .llvm_name = "scalar-stores",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -775,42 +687,39 @@ pub const feature_scalarStores = Feature{
 pub const feature_seaIslands = Feature{
     .name = "sea-islands",
     .description = "SEA_ISLANDS GPU generation",
-    .llvm_name = "sea-islands",
     .subfeatures = &[_]*const Feature {
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
     },
 };
 
 pub const feature_southernIslands = Feature{
     .name = "southern-islands",
     .description = "SOUTHERN_ISLANDS GPU generation",
-    .llvm_name = "southern-islands",
     .subfeatures = &[_]*const Feature {
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_ldsbankcount32,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
-        &feature_noXnackSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ldsbankcount32,
+        &feature_noXnackSupport,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
     },
 };
 
 pub const feature_trapHandler = Feature{
     .name = "trap-handler",
     .description = "Trap handler support",
-    .llvm_name = "trap-handler",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -818,7 +727,6 @@ pub const feature_trapHandler = Feature{
 pub const feature_trigReducedRange = Feature{
     .name = "trig-reduced-range",
     .description = "Requires use of fract on arguments to trig instructions",
-    .llvm_name = "trig-reduced-range",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -826,7 +734,6 @@ pub const feature_trigReducedRange = Feature{
 pub const feature_unalignedBufferAccess = Feature{
     .name = "unaligned-buffer-access",
     .description = "Support unaligned global loads and stores",
-    .llvm_name = "unaligned-buffer-access",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -834,7 +741,6 @@ pub const feature_unalignedBufferAccess = Feature{
 pub const feature_unalignedScratchAccess = Feature{
     .name = "unaligned-scratch-access",
     .description = "Support unaligned scratch loads and stores",
-    .llvm_name = "unaligned-scratch-access",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -842,7 +748,6 @@ pub const feature_unalignedScratchAccess = Feature{
 pub const feature_unpackedD16Vmem = Feature{
     .name = "unpacked-d16-vmem",
     .description = "Has unpacked d16 vmem instructions",
-    .llvm_name = "unpacked-d16-vmem",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -850,7 +755,6 @@ pub const feature_unpackedD16Vmem = Feature{
 pub const feature_vgprIndexMode = Feature{
     .name = "vgpr-index-mode",
     .description = "Has VGPR mode register indexing",
-    .llvm_name = "vgpr-index-mode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -858,7 +762,6 @@ pub const feature_vgprIndexMode = Feature{
 pub const feature_vmemToScalarWriteHazard = Feature{
     .name = "vmem-to-scalar-write-hazard",
     .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-    .llvm_name = "vmem-to-scalar-write-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -866,7 +769,6 @@ pub const feature_vmemToScalarWriteHazard = Feature{
 pub const feature_vop3Literal = Feature{
     .name = "vop3-literal",
     .description = "Can use one literal in VOP3",
-    .llvm_name = "vop3-literal",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -874,7 +776,6 @@ pub const feature_vop3Literal = Feature{
 pub const feature_vop3p = Feature{
     .name = "vop3p",
     .description = "Has VOP3P packed instructions",
-    .llvm_name = "vop3p",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -882,7 +783,6 @@ pub const feature_vop3p = Feature{
 pub const feature_vcmpxExecWarHazard = Feature{
     .name = "vcmpx-exec-war-hazard",
     .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-    .llvm_name = "vcmpx-exec-war-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -890,7 +790,6 @@ pub const feature_vcmpxExecWarHazard = Feature{
 pub const feature_vcmpxPermlaneHazard = Feature{
     .name = "vcmpx-permlane-hazard",
     .description = "TODO: describe me",
-    .llvm_name = "vcmpx-permlane-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -898,37 +797,35 @@ pub const feature_vcmpxPermlaneHazard = Feature{
 pub const feature_volcanicIslands = Feature{
     .name = "volcanic-islands",
     .description = "VOLCANIC_ISLANDS GPU generation",
-    .llvm_name = "volcanic-islands",
     .subfeatures = &[_]*const Feature {
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
     },
 };
 
 pub const feature_vscnt = Feature{
     .name = "vscnt",
     .description = "Has separate store vscnt counter",
-    .llvm_name = "vscnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -936,7 +833,6 @@ pub const feature_vscnt = Feature{
 pub const feature_wavefrontsize16 = Feature{
     .name = "wavefrontsize16",
     .description = "The number of threads per wavefront",
-    .llvm_name = "wavefrontsize16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -944,7 +840,6 @@ pub const feature_wavefrontsize16 = Feature{
 pub const feature_wavefrontsize32 = Feature{
     .name = "wavefrontsize32",
     .description = "The number of threads per wavefront",
-    .llvm_name = "wavefrontsize32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -952,7 +847,6 @@ pub const feature_wavefrontsize32 = Feature{
 pub const feature_wavefrontsize64 = Feature{
     .name = "wavefrontsize64",
     .description = "The number of threads per wavefront",
-    .llvm_name = "wavefrontsize64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -960,7 +854,6 @@ pub const feature_wavefrontsize64 = Feature{
 pub const feature_xnack = Feature{
     .name = "xnack",
     .description = "Enable XNACK support",
-    .llvm_name = "xnack",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -968,7 +861,6 @@ pub const feature_xnack = Feature{
 pub const feature_halfRate64Ops = Feature{
     .name = "half-rate-64-ops",
     .description = "Most fp64 instructions are half rate instead of quarter",
-    .llvm_name = "half-rate-64-ops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1091,16 +983,16 @@ pub const cpu_bonaire = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -1113,28 +1005,28 @@ pub const cpu_carrizo = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
         &feature_xnack,
         &feature_halfRate64Ops,
@@ -1149,28 +1041,28 @@ pub const cpu_fiji = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -1200,40 +1092,40 @@ pub const cpu_gfx1010 = Cpu{
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_movrel,
-        &feature_gfx9Insts,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_noSdstCmpx,
-        &feature_fmaMixInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_sdwaScalar,
+        &feature_registerBanking,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_sdwaSdst,
+        &feature_ciInsts,
         &feature_apertureRegs,
+        &feature_intClampInsts,
         &feature_flatScratchInsts,
+        &feature_sdwaScalar,
+        &feature_fastFmaf,
+        &feature_pkFmacF16Inst,
         &feature_vscnt,
-        &feature_noDataDepHazard,
+        &feature_movrel,
+        &feature_fmaMixInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_sdwaOmod,
+        &feature_vop3Literal,
+        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_addNoCarryInsts,
+        &feature_noDataDepHazard,
+        &feature_flatInstOffsets,
         &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_dpp8,
-        &feature_BitInsts16,
-        &feature_registerBanking,
-        &feature_gfx8Insts,
+        &feature_gfx9Insts,
         &feature_flatGlobalInsts,
-        &feature_flatInstOffsets,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_fastFmaf,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_gfx10Insts,
+        &feature_BitInsts16,
+        &feature_noSdstCmpx,
         &feature_gfx10,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
@@ -1265,40 +1157,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_movrel,
-        &feature_gfx9Insts,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_noSdstCmpx,
-        &feature_fmaMixInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_sdwaScalar,
+        &feature_registerBanking,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_sdwaSdst,
+        &feature_ciInsts,
         &feature_apertureRegs,
+        &feature_intClampInsts,
         &feature_flatScratchInsts,
+        &feature_sdwaScalar,
+        &feature_fastFmaf,
+        &feature_pkFmacF16Inst,
         &feature_vscnt,
-        &feature_noDataDepHazard,
+        &feature_movrel,
+        &feature_fmaMixInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_sdwaOmod,
+        &feature_vop3Literal,
+        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_addNoCarryInsts,
+        &feature_noDataDepHazard,
+        &feature_flatInstOffsets,
         &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_dpp8,
-        &feature_BitInsts16,
-        &feature_registerBanking,
-        &feature_gfx8Insts,
+        &feature_gfx9Insts,
         &feature_flatGlobalInsts,
-        &feature_flatInstOffsets,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_fastFmaf,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_gfx10Insts,
+        &feature_BitInsts16,
+        &feature_noSdstCmpx,
         &feature_gfx10,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
@@ -1329,40 +1221,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_movrel,
-        &feature_gfx9Insts,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_noSdstCmpx,
-        &feature_fmaMixInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_sdwaScalar,
+        &feature_registerBanking,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_sdwaSdst,
+        &feature_ciInsts,
         &feature_apertureRegs,
+        &feature_intClampInsts,
         &feature_flatScratchInsts,
+        &feature_sdwaScalar,
+        &feature_fastFmaf,
+        &feature_pkFmacF16Inst,
         &feature_vscnt,
-        &feature_noDataDepHazard,
+        &feature_movrel,
+        &feature_fmaMixInsts,
+        &feature_noSramEccSupport,
+        &feature_sdwa,
+        &feature_sdwaOmod,
+        &feature_vop3Literal,
+        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_addNoCarryInsts,
+        &feature_noDataDepHazard,
+        &feature_flatInstOffsets,
         &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_dpp8,
-        &feature_BitInsts16,
-        &feature_registerBanking,
-        &feature_gfx8Insts,
+        &feature_gfx9Insts,
         &feature_flatGlobalInsts,
-        &feature_flatInstOffsets,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_fastFmaf,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_gfx10Insts,
+        &feature_BitInsts16,
+        &feature_noSdstCmpx,
         &feature_gfx10,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
@@ -1390,13 +1282,13 @@ pub const cpu_gfx600 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
         &feature_halfRate64Ops,
     },
@@ -1409,13 +1301,13 @@ pub const cpu_gfx601 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
     },
 };
@@ -1427,16 +1319,16 @@ pub const cpu_gfx700 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -1449,16 +1341,16 @@ pub const cpu_gfx701 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
         &feature_halfRate64Ops,
     },
@@ -1472,16 +1364,16 @@ pub const cpu_gfx702 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount16,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -1493,16 +1385,16 @@ pub const cpu_gfx703 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -1514,16 +1406,16 @@ pub const cpu_gfx704 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -1536,28 +1428,28 @@ pub const cpu_gfx801 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
         &feature_xnack,
         &feature_halfRate64Ops,
@@ -1573,28 +1465,28 @@ pub const cpu_gfx802 = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -1607,28 +1499,28 @@ pub const cpu_gfx803 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -1639,28 +1531,28 @@ pub const cpu_gfx810 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
         &feature_xnack,
     },
@@ -1673,36 +1565,36 @@ pub const cpu_gfx900 = Cpu{
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
@@ -1715,36 +1607,36 @@ pub const cpu_gfx902 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
@@ -1760,36 +1652,36 @@ pub const cpu_gfx904 = Cpu{
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
     },
@@ -1805,36 +1697,36 @@ pub const cpu_gfx906 = Cpu{
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
@@ -1855,36 +1747,36 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
         &feature_maiInsts,
@@ -1900,36 +1792,36 @@ pub const cpu_gfx909 = Cpu{
     .llvm_name = "gfx909",
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
-        &feature_gfx9Insts,
+        &feature_fp64,
+        &feature_vop3p,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_sdwaSdst,
         &feature_ciInsts,
-        &feature_sdwa,
-        &feature_localmemorysize65536,
+        &feature_apertureRegs,
         &feature_scalarStores,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
+        &feature_intClampInsts,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
         &feature_flatScratchInsts,
-        &feature_r128A16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
-        &feature_fp64,
-        &feature_BitInsts16,
-        &feature_vgprIndexMode,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
         &feature_scalarAtomics,
-        &feature_flatInstOffsets,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_intClampInsts,
+        &feature_sdwaScalar,
         &feature_fastFmaf,
+        &feature_vgprIndexMode,
+        &feature_scalarFlatScratchInsts,
+        &feature_sdwa,
         &feature_sdwaOmod,
+        &feature_localmemorysize65536,
+        &feature_flatAddressSpace,
+        &feature_addNoCarryInsts,
+        &feature_flatInstOffsets,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_r128A16,
         &feature_gfx9,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
@@ -1944,13 +1836,13 @@ pub const cpu_hainan = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
     },
 };
@@ -1963,16 +1855,16 @@ pub const cpu_hawaii = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
         &feature_halfRate64Ops,
     },
@@ -1987,28 +1879,28 @@ pub const cpu_iceland = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -2020,16 +1912,16 @@ pub const cpu_kabini = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -2041,16 +1933,16 @@ pub const cpu_kaveri = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -2062,16 +1954,16 @@ pub const cpu_mullins = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_ciInsts,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_ciInsts,
+        &feature_localmemorysize65536,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
+        &feature_flatAddressSpace,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_seaIslands,
     },
 };
@@ -2083,13 +1975,13 @@ pub const cpu_oland = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
     },
 };
@@ -2101,13 +1993,13 @@ pub const cpu_pitcairn = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
     },
 };
@@ -2120,28 +2012,28 @@ pub const cpu_polaris10 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -2154,28 +2046,28 @@ pub const cpu_polaris11 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -2186,28 +2078,28 @@ pub const cpu_stoney = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
         &feature_xnack,
     },
@@ -2221,13 +2113,13 @@ pub const cpu_tahiti = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
         &feature_halfRate64Ops,
     },
@@ -2242,28 +2134,28 @@ pub const cpu_tonga = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_movrel,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_dpp,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_gcn3Encoding,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_wavefrontsize64,
+        &feature_movrel,
+        &feature_vgprIndexMode,
+        &feature_trigReducedRange,
         &feature_noSramEccSupport,
         &feature_sdwa,
+        &feature_sdwaMav,
+        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_mimgR128,
         &feature_flatAddressSpace,
-        &feature_dpp,
         &feature_inv2piInlineImm,
-        &feature_fp64,
         &feature_BitInsts16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_gfx8Insts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_mimgR128,
-        &feature_intClampInsts,
-        &feature_sMemrealtime,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_volcanicIslands,
     },
 };
@@ -2275,13 +2167,13 @@ pub const cpu_verde = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_mimgR128,
-        &feature_movrel,
         &feature_localmemorysize32768,
         &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_noSramEccSupport,
         &feature_fp64,
+        &feature_movrel,
+        &feature_mimgR128,
+        &feature_wavefrontsize64,
         &feature_southernIslands,
     },
 };
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index e45f0170cffcf1d8570b360c155b3fdd51ab32fd..c28ece032f875a4e330d7b35becc897016a575c4 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_armv2 = Feature{
     .name = "armv2",
     .description = "ARMv2 architecture",
-    .llvm_name = "armv2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_armv2 = Feature{
 pub const feature_armv2a = Feature{
     .name = "armv2a",
     .description = "ARMv2a architecture",
-    .llvm_name = "armv2a",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_armv2a = Feature{
 pub const feature_armv3 = Feature{
     .name = "armv3",
     .description = "ARMv3 architecture",
-    .llvm_name = "armv3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_armv3 = Feature{
 pub const feature_armv3m = Feature{
     .name = "armv3m",
     .description = "ARMv3m architecture",
-    .llvm_name = "armv3m",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_armv3m = Feature{
 pub const feature_armv4 = Feature{
     .name = "armv4",
     .description = "ARMv4 architecture",
-    .llvm_name = "armv4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_armv4 = Feature{
 pub const feature_armv4t = Feature{
     .name = "armv4t",
     .description = "ARMv4t architecture",
-    .llvm_name = "armv4t",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -53,7 +47,6 @@ pub const feature_armv4t = Feature{
 pub const feature_armv5t = Feature{
     .name = "armv5t",
     .description = "ARMv5t architecture",
-    .llvm_name = "armv5t",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -62,7 +55,6 @@ pub const feature_armv5t = Feature{
 pub const feature_armv5te = Feature{
     .name = "armv5te",
     .description = "ARMv5te architecture",
-    .llvm_name = "armv5te",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -71,7 +63,6 @@ pub const feature_armv5te = Feature{
 pub const feature_armv5tej = Feature{
     .name = "armv5tej",
     .description = "ARMv5tej architecture",
-    .llvm_name = "armv5tej",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -80,7 +71,6 @@ pub const feature_armv5tej = Feature{
 pub const feature_armv6 = Feature{
     .name = "armv6",
     .description = "ARMv6 architecture",
-    .llvm_name = "armv6",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
         &feature_dsp,
@@ -90,7 +80,6 @@ pub const feature_armv6 = Feature{
 pub const feature_armv6j = Feature{
     .name = "armv6j",
     .description = "ARMv7a architecture",
-    .llvm_name = "armv6j",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
         &feature_dsp,
@@ -100,7 +89,6 @@ pub const feature_armv6j = Feature{
 pub const feature_armv6k = Feature{
     .name = "armv6k",
     .description = "ARMv6k architecture",
-    .llvm_name = "armv6k",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -109,7 +97,6 @@ pub const feature_armv6k = Feature{
 pub const feature_armv6kz = Feature{
     .name = "armv6kz",
     .description = "ARMv6kz architecture",
-    .llvm_name = "armv6kz",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
         &feature_trustzone,
@@ -119,400 +106,379 @@ pub const feature_armv6kz = Feature{
 pub const feature_armv6M = Feature{
     .name = "armv6-m",
     .description = "ARMv6m architecture",
-    .llvm_name = "armv6-m",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
     },
 };
 
 pub const feature_armv6sM = Feature{
     .name = "armv6s-m",
     .description = "ARMv6sm architecture",
-    .llvm_name = "armv6s-m",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
     },
 };
 
 pub const feature_armv6t2 = Feature{
     .name = "armv6t2",
     .description = "ARMv6t2 architecture",
-    .llvm_name = "armv6t2",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_dsp,
         &feature_thumb2,
+        &feature_dsp,
+        &feature_v4t,
     },
 };
 
 pub const feature_armv7A = Feature{
     .name = "armv7-a",
     .description = "ARMv7a architecture",
-    .llvm_name = "armv7-a",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
     },
 };
 
 pub const feature_armv7eM = Feature{
     .name = "armv7e-m",
     .description = "ARMv7em architecture",
-    .llvm_name = "armv7e-m",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
+        &feature_dsp,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_dsp,
-        &feature_hwdiv,
     },
 };
 
 pub const feature_armv7k = Feature{
     .name = "armv7k",
     .description = "ARMv7a architecture",
-    .llvm_name = "armv7k",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
-        &feature_d32,
         &feature_dsp,
+        &feature_fpregs,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
         &feature_perfmon,
-        &feature_fpregs,
+        &feature_v4t,
+        &feature_d32,
     },
 };
 
 pub const feature_armv7M = Feature{
     .name = "armv7-m",
     .description = "ARMv7m architecture",
-    .llvm_name = "armv7-m",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
     },
 };
 
 pub const feature_armv7R = Feature{
     .name = "armv7-r",
     .description = "ARMv7r architecture",
-    .llvm_name = "armv7-r",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_armv7s = Feature{
     .name = "armv7s",
     .description = "ARMv7a architecture",
-    .llvm_name = "armv7s",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
-        &feature_d32,
         &feature_dsp,
+        &feature_fpregs,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
         &feature_perfmon,
-        &feature_fpregs,
+        &feature_v4t,
+        &feature_d32,
     },
 };
 
 pub const feature_armv7ve = Feature{
     .name = "armv7ve",
     .description = "ARMv7ve architecture",
-    .llvm_name = "armv7ve",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_mp,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_hwdivArm,
-        &feature_dsp,
-        &feature_fpregs,
     },
 };
 
 pub const feature_armv8A = Feature{
     .name = "armv8-a",
     .description = "ARMv8a architecture",
-    .llvm_name = "armv8-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
     },
 };
 
 pub const feature_armv8Mbase = Feature{
     .name = "armv8-m.base",
     .description = "ARMv8mBaseline architecture",
-    .llvm_name = "armv8-m.base",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumbMode,
+        &feature_strictAlign,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
-        &feature_hwdiv,
     },
 };
 
 pub const feature_armv8Mmain = Feature{
     .name = "armv8-m.main",
     .description = "ARMv8mMainline architecture",
-    .llvm_name = "armv8-m.main",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
     },
 };
 
 pub const feature_armv8R = Feature{
     .name = "armv8-r",
     .description = "ARMv8r architecture",
-    .llvm_name = "armv8-r",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_hwdiv,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_dsp,
+        &feature_hwdivArm,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
         &feature_dfb,
-        &feature_hwdivArm,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_rclass,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_d32,
     },
 };
 
 pub const feature_armv81A = Feature{
     .name = "armv8.1-a",
     .description = "ARMv81a architecture",
-    .llvm_name = "armv8.1-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
     },
 };
 
 pub const feature_armv81Mmain = Feature{
     .name = "armv8.1-m.main",
     .description = "ARMv81mMainline architecture",
-    .llvm_name = "armv8.1-m.main",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
+        &feature_db,
+        &feature_mclass,
+        &feature_hwdiv,
         &feature_lob,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_msecext8,
+        &feature_thumbMode,
         &feature_thumb2,
-        &feature_mclass,
         &feature_ras,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_thumbMode,
-        &feature_perfmon,
-        &feature_hwdiv,
     },
 };
 
 pub const feature_armv82A = Feature{
     .name = "armv8.2-a",
     .description = "ARMv82a architecture",
-    .llvm_name = "armv8.2-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
     },
 };
 
 pub const feature_armv83A = Feature{
     .name = "armv8.3-a",
     .description = "ARMv83a architecture",
-    .llvm_name = "armv8.3-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
     },
 };
 
 pub const feature_armv84A = Feature{
     .name = "armv8.4-a",
     .description = "ARMv84a architecture",
-    .llvm_name = "armv8.4-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
     },
 };
 
 pub const feature_armv85A = Feature{
     .name = "armv8.5-a",
     .description = "ARMv85a architecture",
-    .llvm_name = "armv8.5-a",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
-        &feature_aclass,
-        &feature_hwdivArm,
         &feature_sb,
+        &feature_aclass,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_v7clrex,
+        &feature_fp16,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
     },
 };
 
 pub const feature_msecext8 = Feature{
     .name = "8msecext",
     .description = "Enable support for ARMv8-M Security Extensions",
-    .llvm_name = "8msecext",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -520,7 +486,6 @@ pub const feature_msecext8 = Feature{
 pub const feature_aclass = Feature{
     .name = "aclass",
     .description = "Is application profile ('A' series)",
-    .llvm_name = "aclass",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -528,17 +493,15 @@ pub const feature_aclass = Feature{
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES support",
-    .llvm_name = "aes",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_acquireRelease = Feature{
     .name = "acquire-release",
     .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-    .llvm_name = "acquire-release",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -546,7 +509,6 @@ pub const feature_acquireRelease = Feature{
 pub const feature_avoidMovsShop = Feature{
     .name = "avoid-movs-shop",
     .description = "Avoid movs instructions with shifter operand",
-    .llvm_name = "avoid-movs-shop",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -554,7 +516,6 @@ pub const feature_avoidMovsShop = Feature{
 pub const feature_avoidPartialCpsr = Feature{
     .name = "avoid-partial-cpsr",
     .description = "Avoid CPSR partial update for OOO execution",
-    .llvm_name = "avoid-partial-cpsr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -562,7 +523,6 @@ pub const feature_avoidPartialCpsr = Feature{
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Enable support for CRC instructions",
-    .llvm_name = "crc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -570,7 +530,6 @@ pub const feature_crc = Feature{
 pub const feature_cheapPredicableCpsr = Feature{
     .name = "cheap-predicable-cpsr",
     .description = "Disable +1 predication cost for instructions updating CPSR",
-    .llvm_name = "cheap-predicable-cpsr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -578,7 +537,6 @@ pub const feature_cheapPredicableCpsr = Feature{
 pub const feature_vldnAlign = Feature{
     .name = "vldn-align",
     .description = "Check for VLDn unaligned access",
-    .llvm_name = "vldn-align",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -586,17 +544,15 @@ pub const feature_vldnAlign = Feature{
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable support for Cryptography extensions",
-    .llvm_name = "crypto",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_d32 = Feature{
     .name = "d32",
     .description = "Extend FP to 32 double registers",
-    .llvm_name = "d32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -604,7 +560,6 @@ pub const feature_d32 = Feature{
 pub const feature_db = Feature{
     .name = "db",
     .description = "Has data barrier (dmb/dsb) instructions",
-    .llvm_name = "db",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -612,7 +567,6 @@ pub const feature_db = Feature{
 pub const feature_dfb = Feature{
     .name = "dfb",
     .description = "Has full data barrier (dfb) instruction",
-    .llvm_name = "dfb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -620,7 +574,6 @@ pub const feature_dfb = Feature{
 pub const feature_dsp = Feature{
     .name = "dsp",
     .description = "Supports DSP instructions in ARM and/or Thumb2",
-    .llvm_name = "dsp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -628,7 +581,6 @@ pub const feature_dsp = Feature{
 pub const feature_dontWidenVmovs = Feature{
     .name = "dont-widen-vmovs",
     .description = "Don't widen VMOVS to VMOVD",
-    .llvm_name = "dont-widen-vmovs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -636,17 +588,15 @@ pub const feature_dontWidenVmovs = Feature{
 pub const feature_dotprod = Feature{
     .name = "dotprod",
     .description = "Enable support for dot product instructions",
-    .llvm_name = "dotprod",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_executeOnly = Feature{
     .name = "execute-only",
     .description = "Enable the generation of execute only code.",
-    .llvm_name = "execute-only",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -654,7 +604,6 @@ pub const feature_executeOnly = Feature{
 pub const feature_expandFpMlx = Feature{
     .name = "expand-fp-mlx",
     .description = "Expand VFP/NEON MLA/MLS instructions",
-    .llvm_name = "expand-fp-mlx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -662,7 +611,6 @@ pub const feature_expandFpMlx = Feature{
 pub const feature_fp16 = Feature{
     .name = "fp16",
     .description = "Enable half-precision floating point",
-    .llvm_name = "fp16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -670,7 +618,6 @@ pub const feature_fp16 = Feature{
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
     .description = "Enable full half-precision floating point fml instructions",
-    .llvm_name = "fp16fml",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
@@ -680,7 +627,6 @@ pub const feature_fp16fml = Feature{
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Floating point unit supports double precision",
-    .llvm_name = "fp64",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -689,7 +635,6 @@ pub const feature_fp64 = Feature{
 pub const feature_fpao = Feature{
     .name = "fpao",
     .description = "Enable fast computation of positive address offsets",
-    .llvm_name = "fpao",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -697,28 +642,25 @@ pub const feature_fpao = Feature{
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
     .description = "Enable ARMv8 FP",
-    .llvm_name = "fp-armv8",
     .subfeatures = &[_]*const Feature {
-        &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8d16 = Feature{
     .name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
-    .llvm_name = "fp-armv8d16",
     .subfeatures = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8d16sp = Feature{
     .name = "fp-armv8d16sp",
     .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
-    .llvm_name = "fp-armv8d16sp",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
@@ -728,7 +670,6 @@ pub const feature_fpArmv8d16sp = Feature{
 pub const feature_fpArmv8sp = Feature{
     .name = "fp-armv8sp",
     .description = "Enable ARMv8 FP with no double precision",
-    .llvm_name = "fp-armv8sp",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_d32,
@@ -739,7 +680,6 @@ pub const feature_fpArmv8sp = Feature{
 pub const feature_fpregs = Feature{
     .name = "fpregs",
     .description = "Enable FP registers",
-    .llvm_name = "fpregs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -747,7 +687,6 @@ pub const feature_fpregs = Feature{
 pub const feature_fpregs16 = Feature{
     .name = "fpregs16",
     .description = "Enable 16-bit FP registers",
-    .llvm_name = "fpregs16",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -756,7 +695,6 @@ pub const feature_fpregs16 = Feature{
 pub const feature_fpregs64 = Feature{
     .name = "fpregs64",
     .description = "Enable 64-bit FP registers",
-    .llvm_name = "fpregs64",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -765,7 +703,6 @@ pub const feature_fpregs64 = Feature{
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
     .description = "Enable full half-precision floating point",
-    .llvm_name = "fullfp16",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
@@ -775,7 +712,6 @@ pub const feature_fullfp16 = Feature{
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
-    .llvm_name = "fuse-aes",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -783,7 +719,6 @@ pub const feature_fuseAes = Feature{
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
-    .llvm_name = "fuse-literals",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -791,7 +726,6 @@ pub const feature_fuseLiterals = Feature{
 pub const feature_hwdivArm = Feature{
     .name = "hwdiv-arm",
     .description = "Enable divide instructions in ARM mode",
-    .llvm_name = "hwdiv-arm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -799,7 +733,6 @@ pub const feature_hwdivArm = Feature{
 pub const feature_hwdiv = Feature{
     .name = "hwdiv",
     .description = "Enable divide instructions in Thumb",
-    .llvm_name = "hwdiv",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -807,7 +740,6 @@ pub const feature_hwdiv = Feature{
 pub const feature_noBranchPredictor = Feature{
     .name = "no-branch-predictor",
     .description = "Has no branch predictor",
-    .llvm_name = "no-branch-predictor",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -815,7 +747,6 @@ pub const feature_noBranchPredictor = Feature{
 pub const feature_retAddrStack = Feature{
     .name = "ret-addr-stack",
     .description = "Has return address stack",
-    .llvm_name = "ret-addr-stack",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -823,7 +754,6 @@ pub const feature_retAddrStack = Feature{
 pub const feature_slowfpvmlx = Feature{
     .name = "slowfpvmlx",
     .description = "Disable VFP / NEON MAC instructions",
-    .llvm_name = "slowfpvmlx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -831,7 +761,6 @@ pub const feature_slowfpvmlx = Feature{
 pub const feature_vmlxHazards = Feature{
     .name = "vmlx-hazards",
     .description = "Has VMLx hazards",
-    .llvm_name = "vmlx-hazards",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -839,7 +768,6 @@ pub const feature_vmlxHazards = Feature{
 pub const feature_lob = Feature{
     .name = "lob",
     .description = "Enable Low Overhead Branch extensions",
-    .llvm_name = "lob",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -847,7 +775,6 @@ pub const feature_lob = Feature{
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Generate calls via indirect call instructions",
-    .llvm_name = "long-calls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -855,7 +782,6 @@ pub const feature_longCalls = Feature{
 pub const feature_mclass = Feature{
     .name = "mclass",
     .description = "Is microcontroller profile ('M' series)",
-    .llvm_name = "mclass",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -863,7 +789,6 @@ pub const feature_mclass = Feature{
 pub const feature_mp = Feature{
     .name = "mp",
     .description = "Supports Multiprocessing extension",
-    .llvm_name = "mp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -871,7 +796,6 @@ pub const feature_mp = Feature{
 pub const feature_mve1beat = Feature{
     .name = "mve1beat",
     .description = "Model MVE instructions as a 1 beat per tick architecture",
-    .llvm_name = "mve1beat",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -879,7 +803,6 @@ pub const feature_mve1beat = Feature{
 pub const feature_mve2beat = Feature{
     .name = "mve2beat",
     .description = "Model MVE instructions as a 2 beats per tick architecture",
-    .llvm_name = "mve2beat",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -887,7 +810,6 @@ pub const feature_mve2beat = Feature{
 pub const feature_mve4beat = Feature{
     .name = "mve4beat",
     .description = "Model MVE instructions as a 4 beats per tick architecture",
-    .llvm_name = "mve4beat",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -895,7 +817,6 @@ pub const feature_mve4beat = Feature{
 pub const feature_muxedUnits = Feature{
     .name = "muxed-units",
     .description = "Has muxed AGU and NEON/FPU",
-    .llvm_name = "muxed-units",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -903,17 +824,15 @@ pub const feature_muxedUnits = Feature{
 pub const feature_neon = Feature{
     .name = "neon",
     .description = "Enable NEON instructions",
-    .llvm_name = "neon",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_neonfp = Feature{
     .name = "neonfp",
     .description = "Use NEON for single precision FP",
-    .llvm_name = "neonfp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -921,7 +840,6 @@ pub const feature_neonfp = Feature{
 pub const feature_neonFpmovs = Feature{
     .name = "neon-fpmovs",
     .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-    .llvm_name = "neon-fpmovs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -929,7 +847,6 @@ pub const feature_neonFpmovs = Feature{
 pub const feature_naclTrap = Feature{
     .name = "nacl-trap",
     .description = "NaCl trap",
-    .llvm_name = "nacl-trap",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -937,7 +854,6 @@ pub const feature_naclTrap = Feature{
 pub const feature_noarm = Feature{
     .name = "noarm",
     .description = "Does not support ARM mode execution",
-    .llvm_name = "noarm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -945,7 +861,6 @@ pub const feature_noarm = Feature{
 pub const feature_noMovt = Feature{
     .name = "no-movt",
     .description = "Don't use movt/movw pairs for 32-bit imms",
-    .llvm_name = "no-movt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -953,7 +868,6 @@ pub const feature_noMovt = Feature{
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .llvm_name = "no-neg-immediates",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -961,7 +875,6 @@ pub const feature_noNegImmediates = Feature{
 pub const feature_disablePostraScheduler = Feature{
     .name = "disable-postra-scheduler",
     .description = "Don't schedule again after register allocation",
-    .llvm_name = "disable-postra-scheduler",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -969,7 +882,6 @@ pub const feature_disablePostraScheduler = Feature{
 pub const feature_nonpipelinedVfp = Feature{
     .name = "nonpipelined-vfp",
     .description = "VFP instructions are not pipelined",
-    .llvm_name = "nonpipelined-vfp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -977,7 +889,6 @@ pub const feature_nonpipelinedVfp = Feature{
 pub const feature_perfmon = Feature{
     .name = "perfmon",
     .description = "Enable support for Performance Monitor extensions",
-    .llvm_name = "perfmon",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -985,7 +896,6 @@ pub const feature_perfmon = Feature{
 pub const feature_bit32 = Feature{
     .name = "32bit",
     .description = "Prefer 32-bit Thumb instrs",
-    .llvm_name = "32bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -993,7 +903,6 @@ pub const feature_bit32 = Feature{
 pub const feature_preferIshst = Feature{
     .name = "prefer-ishst",
     .description = "Prefer ISHST barriers",
-    .llvm_name = "prefer-ishst",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1001,7 +910,6 @@ pub const feature_preferIshst = Feature{
 pub const feature_loopAlign = Feature{
     .name = "loop-align",
     .description = "Prefer 32-bit alignment for loops",
-    .llvm_name = "loop-align",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1009,7 +917,6 @@ pub const feature_loopAlign = Feature{
 pub const feature_preferVmovsr = Feature{
     .name = "prefer-vmovsr",
     .description = "Prefer VMOVSR",
-    .llvm_name = "prefer-vmovsr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1017,7 +924,6 @@ pub const feature_preferVmovsr = Feature{
 pub const feature_profUnpr = Feature{
     .name = "prof-unpr",
     .description = "Is profitable to unpredicate",
-    .llvm_name = "prof-unpr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1025,7 +931,6 @@ pub const feature_profUnpr = Feature{
 pub const feature_ras = Feature{
     .name = "ras",
     .description = "Enable Reliability, Availability and Serviceability extensions",
-    .llvm_name = "ras",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1033,7 +938,6 @@ pub const feature_ras = Feature{
 pub const feature_rclass = Feature{
     .name = "rclass",
     .description = "Is realtime profile ('R' series)",
-    .llvm_name = "rclass",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1041,7 +945,6 @@ pub const feature_rclass = Feature{
 pub const feature_readTpHard = Feature{
     .name = "read-tp-hard",
     .description = "Reading thread pointer from register",
-    .llvm_name = "read-tp-hard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1049,7 +952,6 @@ pub const feature_readTpHard = Feature{
 pub const feature_reserveR9 = Feature{
     .name = "reserve-r9",
     .description = "Reserve R9, making it unavailable as GPR",
-    .llvm_name = "reserve-r9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1057,7 +959,6 @@ pub const feature_reserveR9 = Feature{
 pub const feature_sb = Feature{
     .name = "sb",
     .description = "Enable v8.5a Speculation Barrier",
-    .llvm_name = "sb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1065,17 +966,15 @@ pub const feature_sb = Feature{
 pub const feature_sha2 = Feature{
     .name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
-    .llvm_name = "sha2",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_slowFpBrcc = Feature{
     .name = "slow-fp-brcc",
     .description = "FP compare + branch is slow",
-    .llvm_name = "slow-fp-brcc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1083,7 +982,6 @@ pub const feature_slowFpBrcc = Feature{
 pub const feature_slowLoadDSubreg = Feature{
     .name = "slow-load-D-subreg",
     .description = "Loading into D subregs is slow",
-    .llvm_name = "slow-load-D-subreg",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1091,7 +989,6 @@ pub const feature_slowLoadDSubreg = Feature{
 pub const feature_slowOddReg = Feature{
     .name = "slow-odd-reg",
     .description = "VLDM/VSTM starting with an odd register is slow",
-    .llvm_name = "slow-odd-reg",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1099,7 +996,6 @@ pub const feature_slowOddReg = Feature{
 pub const feature_slowVdup32 = Feature{
     .name = "slow-vdup32",
     .description = "Has slow VDUP32 - prefer VMOV",
-    .llvm_name = "slow-vdup32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1107,7 +1003,6 @@ pub const feature_slowVdup32 = Feature{
 pub const feature_slowVgetlni32 = Feature{
     .name = "slow-vgetlni32",
     .description = "Has slow VGETLNi32 - prefer VMOV",
-    .llvm_name = "slow-vgetlni32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1115,7 +1010,6 @@ pub const feature_slowVgetlni32 = Feature{
 pub const feature_splatVfpNeon = Feature{
     .name = "splat-vfp-neon",
     .description = "Splat register from VFP to NEON",
-    .llvm_name = "splat-vfp-neon",
     .subfeatures = &[_]*const Feature {
         &feature_dontWidenVmovs,
     },
@@ -1124,7 +1018,6 @@ pub const feature_splatVfpNeon = Feature{
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
     .description = "Disallow all unaligned memory access",
-    .llvm_name = "strict-align",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1132,7 +1025,6 @@ pub const feature_strictAlign = Feature{
 pub const feature_thumb2 = Feature{
     .name = "thumb2",
     .description = "Enable Thumb2 instructions",
-    .llvm_name = "thumb2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1140,7 +1032,6 @@ pub const feature_thumb2 = Feature{
 pub const feature_trustzone = Feature{
     .name = "trustzone",
     .description = "Enable support for TrustZone security extensions",
-    .llvm_name = "trustzone",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1148,7 +1039,6 @@ pub const feature_trustzone = Feature{
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .llvm_name = "use-aa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1156,7 +1046,6 @@ pub const feature_useAa = Feature{
 pub const feature_useMisched = Feature{
     .name = "use-misched",
     .description = "Use the MachineScheduler",
-    .llvm_name = "use-misched",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1164,7 +1053,6 @@ pub const feature_useMisched = Feature{
 pub const feature_wideStrideVfp = Feature{
     .name = "wide-stride-vfp",
     .description = "Use a wide stride when allocating VFP registers",
-    .llvm_name = "wide-stride-vfp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1172,7 +1060,6 @@ pub const feature_wideStrideVfp = Feature{
 pub const feature_v7clrex = Feature{
     .name = "v7clrex",
     .description = "Has v7 clrex instruction",
-    .llvm_name = "v7clrex",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1180,7 +1067,6 @@ pub const feature_v7clrex = Feature{
 pub const feature_vfp2 = Feature{
     .name = "vfp2",
     .description = "Enable VFP2 instructions",
-    .llvm_name = "vfp2",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -1189,7 +1075,6 @@ pub const feature_vfp2 = Feature{
 pub const feature_vfp2sp = Feature{
     .name = "vfp2sp",
     .description = "Enable VFP2 instructions with no double precision",
-    .llvm_name = "vfp2sp",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -1198,17 +1083,15 @@ pub const feature_vfp2sp = Feature{
 pub const feature_vfp3 = Feature{
     .name = "vfp3",
     .description = "Enable VFP3 instructions",
-    .llvm_name = "vfp3",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_vfp3d16 = Feature{
     .name = "vfp3d16",
     .description = "Enable VFP3 instructions with only 16 d-registers",
-    .llvm_name = "vfp3d16",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -1217,7 +1100,6 @@ pub const feature_vfp3d16 = Feature{
 pub const feature_vfp3d16sp = Feature{
     .name = "vfp3d16sp",
     .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
-    .llvm_name = "vfp3d16sp",
     .subfeatures = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -1226,17 +1108,15 @@ pub const feature_vfp3d16sp = Feature{
 pub const feature_vfp3sp = Feature{
     .name = "vfp3sp",
     .description = "Enable VFP3 instructions with no double precision",
-    .llvm_name = "vfp3sp",
     .subfeatures = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
 pub const feature_vfp4 = Feature{
     .name = "vfp4",
     .description = "Enable VFP4 instructions",
-    .llvm_name = "vfp4",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_d32,
@@ -1247,7 +1127,6 @@ pub const feature_vfp4 = Feature{
 pub const feature_vfp4d16 = Feature{
     .name = "vfp4d16",
     .description = "Enable VFP4 instructions with only 16 d-registers",
-    .llvm_name = "vfp4d16",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
@@ -1257,7 +1136,6 @@ pub const feature_vfp4d16 = Feature{
 pub const feature_vfp4d16sp = Feature{
     .name = "vfp4d16sp",
     .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
-    .llvm_name = "vfp4d16sp",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
@@ -1267,7 +1145,6 @@ pub const feature_vfp4d16sp = Feature{
 pub const feature_vfp4sp = Feature{
     .name = "vfp4sp",
     .description = "Enable VFP4 instructions with no double precision",
-    .llvm_name = "vfp4sp",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
         &feature_d32,
@@ -1278,7 +1155,6 @@ pub const feature_vfp4sp = Feature{
 pub const feature_vmlxForwarding = Feature{
     .name = "vmlx-forwarding",
     .description = "Has multiplier accumulator forwarding",
-    .llvm_name = "vmlx-forwarding",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1286,17 +1162,15 @@ pub const feature_vmlxForwarding = Feature{
 pub const feature_virtualization = Feature{
     .name = "virtualization",
     .description = "Supports Virtualization extension",
-    .llvm_name = "virtualization",
     .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
         &feature_hwdivArm,
+        &feature_hwdiv,
     },
 };
 
 pub const feature_zcz = Feature{
     .name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
-    .llvm_name = "zcz",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1304,36 +1178,33 @@ pub const feature_zcz = Feature{
 pub const feature_mvefp = Feature{
     .name = "mve.fp",
     .description = "Support M-Class Vector Extension with integer and floating ops",
-    .llvm_name = "mve.fp",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
-        &feature_thumb2,
-        &feature_fp16,
-        &feature_v4t,
         &feature_dsp,
-        &feature_perfmon,
         &feature_fpregs,
+        &feature_v4t,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_fp16,
     },
 };
 
 pub const feature_mve = Feature{
     .name = "mve",
     .description = "Support M-Class Vector Extension with integer ops",
-    .llvm_name = "mve",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_fpregs,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_v4t = Feature{
     .name = "v4t",
     .description = "Support ARM v4T instructions",
-    .llvm_name = "v4t",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1341,7 +1212,6 @@ pub const feature_v4t = Feature{
 pub const feature_v5te = Feature{
     .name = "v5te",
     .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
-    .llvm_name = "v5te",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1350,7 +1220,6 @@ pub const feature_v5te = Feature{
 pub const feature_v5t = Feature{
     .name = "v5t",
     .description = "Support ARM v5T instructions",
-    .llvm_name = "v5t",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1359,7 +1228,6 @@ pub const feature_v5t = Feature{
 pub const feature_v6k = Feature{
     .name = "v6k",
     .description = "Support ARM v6k instructions",
-    .llvm_name = "v6k",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1368,7 +1236,6 @@ pub const feature_v6k = Feature{
 pub const feature_v6m = Feature{
     .name = "v6m",
     .description = "Support ARM v6M instructions",
-    .llvm_name = "v6m",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1377,7 +1244,6 @@ pub const feature_v6m = Feature{
 pub const feature_v6 = Feature{
     .name = "v6",
     .description = "Support ARM v6 instructions",
-    .llvm_name = "v6",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1386,29 +1252,26 @@ pub const feature_v6 = Feature{
 pub const feature_v6t2 = Feature{
     .name = "v6t2",
     .description = "Support ARM v6t2 instructions",
-    .llvm_name = "v6t2",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_thumb2,
+        &feature_v4t,
     },
 };
 
 pub const feature_v7 = Feature{
     .name = "v7",
     .description = "Support ARM v7 instructions",
-    .llvm_name = "v7",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
+        &feature_thumb2,
         &feature_v7clrex,
+        &feature_v4t,
         &feature_perfmon,
-        &feature_thumb2,
     },
 };
 
 pub const feature_v8m = Feature{
     .name = "v8m",
     .description = "Support ARM v8M Baseline instructions",
-    .llvm_name = "v8m",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1417,114 +1280,105 @@ pub const feature_v8m = Feature{
 pub const feature_v8mmain = Feature{
     .name = "v8m.main",
     .description = "Support ARM v8M Mainline instructions",
-    .llvm_name = "v8m.main",
     .subfeatures = &[_]*const Feature {
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_v4t,
         &feature_perfmon,
-        &feature_v7clrex,
-        &feature_thumb2,
     },
 };
 
 pub const feature_v8 = Feature{
     .name = "v8",
     .description = "Support ARM v8 instructions",
-    .llvm_name = "v8",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_thumb2,
-        &feature_v4t,
+        &feature_v7clrex,
+        &feature_acquireRelease,
         &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_v81mmain = Feature{
     .name = "v8.1m.main",
     .description = "Support ARM v8-1M Mainline instructions",
-    .llvm_name = "v8.1m.main",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
+        &feature_thumb2,
         &feature_v7clrex,
+        &feature_v4t,
         &feature_perfmon,
-        &feature_thumb2,
     },
 };
 
 pub const feature_v81a = Feature{
     .name = "v8.1a",
     .description = "Support ARM v8.1a instructions",
-    .llvm_name = "v8.1a",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_thumb2,
-        &feature_v4t,
+        &feature_v7clrex,
+        &feature_acquireRelease,
         &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_v82a = Feature{
     .name = "v8.2a",
     .description = "Support ARM v8.2a instructions",
-    .llvm_name = "v8.2a",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_thumb2,
-        &feature_v4t,
+        &feature_v7clrex,
+        &feature_acquireRelease,
         &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_v83a = Feature{
     .name = "v8.3a",
     .description = "Support ARM v8.3a instructions",
-    .llvm_name = "v8.3a",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_thumb2,
-        &feature_v4t,
+        &feature_v7clrex,
+        &feature_acquireRelease,
         &feature_perfmon,
+        &feature_v4t,
     },
 };
 
 pub const feature_v84a = Feature{
     .name = "v8.4a",
     .description = "Support ARM v8.4a instructions",
-    .llvm_name = "v8.4a",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_acquireRelease,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_perfmon,
-        &feature_fpregs,
     },
 };
 
 pub const feature_v85a = Feature{
     .name = "v8.5a",
     .description = "Support ARM v8.5a instructions",
-    .llvm_name = "v8.5a",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
+        &feature_fpregs,
         &feature_thumb2,
-        &feature_v4t,
-        &feature_d32,
         &feature_sb,
+        &feature_v7clrex,
+        &feature_acquireRelease,
         &feature_perfmon,
-        &feature_fpregs,
+        &feature_v4t,
+        &feature_d32,
     },
 };
 
 pub const feature_iwmmxt = Feature{
     .name = "iwmmxt",
     .description = "ARMv5te architecture",
-    .llvm_name = "iwmmxt",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1533,7 +1387,6 @@ pub const feature_iwmmxt = Feature{
 pub const feature_iwmmxt2 = Feature{
     .name = "iwmmxt2",
     .description = "ARMv5te architecture",
-    .llvm_name = "iwmmxt2",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -1542,7 +1395,6 @@ pub const feature_iwmmxt2 = Feature{
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Use software floating point features.",
-    .llvm_name = "soft-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1550,7 +1402,6 @@ pub const feature_softFloat = Feature{
 pub const feature_thumbMode = Feature{
     .name = "thumb-mode",
     .description = "Thumb mode",
-    .llvm_name = "thumb-mode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1558,7 +1409,6 @@ pub const feature_thumbMode = Feature{
 pub const feature_a5 = Feature{
     .name = "a5",
     .description = "Cortex-A5 ARM processors",
-    .llvm_name = "a5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1566,7 +1416,6 @@ pub const feature_a5 = Feature{
 pub const feature_a7 = Feature{
     .name = "a7",
     .description = "Cortex-A7 ARM processors",
-    .llvm_name = "a7",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1574,7 +1423,6 @@ pub const feature_a7 = Feature{
 pub const feature_a8 = Feature{
     .name = "a8",
     .description = "Cortex-A8 ARM processors",
-    .llvm_name = "a8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1582,7 +1430,6 @@ pub const feature_a8 = Feature{
 pub const feature_a9 = Feature{
     .name = "a9",
     .description = "Cortex-A9 ARM processors",
-    .llvm_name = "a9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1590,7 +1437,6 @@ pub const feature_a9 = Feature{
 pub const feature_a12 = Feature{
     .name = "a12",
     .description = "Cortex-A12 ARM processors",
-    .llvm_name = "a12",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1598,7 +1444,6 @@ pub const feature_a12 = Feature{
 pub const feature_a15 = Feature{
     .name = "a15",
     .description = "Cortex-A15 ARM processors",
-    .llvm_name = "a15",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1606,7 +1451,6 @@ pub const feature_a15 = Feature{
 pub const feature_a17 = Feature{
     .name = "a17",
     .description = "Cortex-A17 ARM processors",
-    .llvm_name = "a17",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1614,7 +1458,6 @@ pub const feature_a17 = Feature{
 pub const feature_a32 = Feature{
     .name = "a32",
     .description = "Cortex-A32 ARM processors",
-    .llvm_name = "a32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1622,7 +1465,6 @@ pub const feature_a32 = Feature{
 pub const feature_a35 = Feature{
     .name = "a35",
     .description = "Cortex-A35 ARM processors",
-    .llvm_name = "a35",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1630,7 +1472,6 @@ pub const feature_a35 = Feature{
 pub const feature_a53 = Feature{
     .name = "a53",
     .description = "Cortex-A53 ARM processors",
-    .llvm_name = "a53",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1638,7 +1479,6 @@ pub const feature_a53 = Feature{
 pub const feature_a55 = Feature{
     .name = "a55",
     .description = "Cortex-A55 ARM processors",
-    .llvm_name = "a55",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1646,7 +1486,6 @@ pub const feature_a55 = Feature{
 pub const feature_a57 = Feature{
     .name = "a57",
     .description = "Cortex-A57 ARM processors",
-    .llvm_name = "a57",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1654,7 +1493,6 @@ pub const feature_a57 = Feature{
 pub const feature_a72 = Feature{
     .name = "a72",
     .description = "Cortex-A72 ARM processors",
-    .llvm_name = "a72",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1662,7 +1500,6 @@ pub const feature_a72 = Feature{
 pub const feature_a73 = Feature{
     .name = "a73",
     .description = "Cortex-A73 ARM processors",
-    .llvm_name = "a73",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1670,7 +1507,6 @@ pub const feature_a73 = Feature{
 pub const feature_a75 = Feature{
     .name = "a75",
     .description = "Cortex-A75 ARM processors",
-    .llvm_name = "a75",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1678,7 +1514,6 @@ pub const feature_a75 = Feature{
 pub const feature_a76 = Feature{
     .name = "a76",
     .description = "Cortex-A76 ARM processors",
-    .llvm_name = "a76",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1686,33 +1521,31 @@ pub const feature_a76 = Feature{
 pub const feature_exynos = Feature{
     .name = "exynos",
     .description = "Samsung Exynos processors",
-    .llvm_name = "exynos",
     .subfeatures = &[_]*const Feature {
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_hwdivArm,
+        &feature_zcz,
         &feature_hwdiv,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
+        &feature_fpregs,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
-        &feature_d32,
-        &feature_hwdivArm,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
+        &feature_fuseAes,
+        &feature_fuseLiterals,
         &feature_crc,
-        &feature_expandFpMlx,
-        &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
         &feature_dontWidenVmovs,
-        &feature_fpregs,
-        &feature_fuseLiterals,
+        &feature_d32,
     },
 };
 
 pub const feature_krait = Feature{
     .name = "krait",
     .description = "Qualcomm Krait processors",
-    .llvm_name = "krait",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1720,7 +1553,6 @@ pub const feature_krait = Feature{
 pub const feature_kryo = Feature{
     .name = "kryo",
     .description = "Qualcomm Kryo processors",
-    .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1728,7 +1560,6 @@ pub const feature_kryo = Feature{
 pub const feature_m3 = Feature{
     .name = "m3",
     .description = "Cortex-M3 ARM processors",
-    .llvm_name = "m3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1736,7 +1567,6 @@ pub const feature_m3 = Feature{
 pub const feature_r4 = Feature{
     .name = "r4",
     .description = "Cortex-R4 ARM processors",
-    .llvm_name = "r4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1744,7 +1574,6 @@ pub const feature_r4 = Feature{
 pub const feature_r5 = Feature{
     .name = "r5",
     .description = "Cortex-R5 ARM processors",
-    .llvm_name = "r5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1752,7 +1581,6 @@ pub const feature_r5 = Feature{
 pub const feature_r7 = Feature{
     .name = "r7",
     .description = "Cortex-R7 ARM processors",
-    .llvm_name = "r7",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1760,7 +1588,6 @@ pub const feature_r7 = Feature{
 pub const feature_r52 = Feature{
     .name = "r52",
     .description = "Cortex-R52 ARM processors",
-    .llvm_name = "r52",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1768,7 +1595,6 @@ pub const feature_r52 = Feature{
 pub const feature_swift = Feature{
     .name = "swift",
     .description = "Swift ARM processors",
-    .llvm_name = "swift",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1776,7 +1602,6 @@ pub const feature_swift = Feature{
 pub const feature_xscale = Feature{
     .name = "xscale",
     .description = "ARMv5te architecture",
-    .llvm_name = "xscale",
     .subfeatures = &[_]*const Feature {
         &feature_v4t,
     },
@@ -2032,9 +1857,9 @@ pub const cpu_arm1156t2S = Cpu{
     .name = "arm1156t2-s",
     .llvm_name = "arm1156t2-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_dsp,
         &feature_thumb2,
+        &feature_dsp,
+        &feature_v4t,
         &feature_armv6t2,
     },
 };
@@ -2043,9 +1868,9 @@ pub const cpu_arm1156t2fS = Cpu{
     .name = "arm1156t2f-s",
     .llvm_name = "arm1156t2f-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_dsp,
         &feature_thumb2,
+        &feature_dsp,
+        &feature_v4t,
         &feature_armv6t2,
         &feature_slowfpvmlx,
         &feature_fpregs,
@@ -2241,15 +2066,15 @@ pub const cpu_cortexA12 = Cpu{
     .name = "cortex-a12",
     .llvm_name = "cortex-a12",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -2258,8 +2083,8 @@ pub const cpu_cortexA12 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdiv,
         &feature_hwdivArm,
+        &feature_hwdiv,
         &feature_virtualization,
         &feature_a12,
     },
@@ -2269,15 +2094,15 @@ pub const cpu_cortexA15 = Cpu{
     .name = "cortex-a15",
     .llvm_name = "cortex-a15",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -2289,8 +2114,8 @@ pub const cpu_cortexA15 = Cpu{
         &feature_trustzone,
         &feature_fp16,
         &feature_vfp4,
-        &feature_hwdiv,
         &feature_hwdivArm,
+        &feature_hwdiv,
         &feature_virtualization,
         &feature_a15,
     },
@@ -2300,15 +2125,15 @@ pub const cpu_cortexA17 = Cpu{
     .name = "cortex-a17",
     .llvm_name = "cortex-a17",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -2317,8 +2142,8 @@ pub const cpu_cortexA17 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdiv,
         &feature_hwdivArm,
+        &feature_hwdiv,
         &feature_virtualization,
         &feature_a17,
     },
@@ -2328,22 +2153,22 @@ pub const cpu_cortexA32 = Cpu{
     .name = "cortex-a32",
     .llvm_name = "cortex-a32",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
     },
@@ -2353,22 +2178,22 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
         &feature_a35,
@@ -2379,15 +2204,15 @@ pub const cpu_cortexA5 = Cpu{
     .name = "cortex-a5",
     .llvm_name = "cortex-a5",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -2405,22 +2230,22 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
         &feature_fpao,
@@ -2432,23 +2257,23 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_dotprod,
         &feature_a55,
@@ -2459,22 +2284,22 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
@@ -2488,15 +2313,15 @@ pub const cpu_cortexA7 = Cpu{
     .name = "cortex-a7",
     .llvm_name = "cortex-a7",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -2507,8 +2332,8 @@ pub const cpu_cortexA7 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdiv,
         &feature_hwdivArm,
+        &feature_hwdiv,
         &feature_virtualization,
         &feature_a7,
     },
@@ -2518,22 +2343,22 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
         &feature_a72,
@@ -2544,22 +2369,22 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
         &feature_a73,
@@ -2570,23 +2395,23 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_dotprod,
         &feature_a75,
@@ -2597,23 +2422,23 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_crypto,
         &feature_dotprod,
@@ -2626,23 +2451,23 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_crypto,
         &feature_dotprod,
@@ -2655,15 +2480,15 @@ pub const cpu_cortexA8 = Cpu{
     .name = "cortex-a8",
     .llvm_name = "cortex-a8",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -2680,15 +2505,15 @@ pub const cpu_cortexA9 = Cpu{
     .name = "cortex-a9",
     .llvm_name = "cortex-a9",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -2711,11 +2536,11 @@ pub const cpu_cortexM0 = Cpu{
     .llvm_name = "cortex-m0",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
         &feature_armv6M,
     },
 };
@@ -2725,11 +2550,11 @@ pub const cpu_cortexM0plus = Cpu{
     .llvm_name = "cortex-m0plus",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
         &feature_armv6M,
     },
 };
@@ -2739,11 +2564,11 @@ pub const cpu_cortexM1 = Cpu{
     .llvm_name = "cortex-m1",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
         &feature_armv6M,
     },
 };
@@ -2752,16 +2577,16 @@ pub const cpu_cortexM23 = Cpu{
     .name = "cortex-m23",
     .llvm_name = "cortex-m23",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumbMode,
+        &feature_strictAlign,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
-        &feature_hwdiv,
         &feature_armv8Mbase,
         &feature_noMovt,
     },
@@ -2771,15 +2596,15 @@ pub const cpu_cortexM3 = Cpu{
     .name = "cortex-m3",
     .llvm_name = "cortex-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
         &feature_armv7M,
         &feature_noBranchPredictor,
         &feature_loopAlign,
@@ -2793,17 +2618,17 @@ pub const cpu_cortexM33 = Cpu{
     .name = "cortex-m33",
     .llvm_name = "cortex-m33",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
         &feature_armv8Mmain,
         &feature_dsp,
         &feature_fp16,
@@ -2821,17 +2646,17 @@ pub const cpu_cortexM35p = Cpu{
     .name = "cortex-m35p",
     .llvm_name = "cortex-m35p",
     .subfeatures = &[_]*const Feature {
-        &feature_acquireRelease,
-        &feature_v7clrex,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_msecext8,
+        &feature_acquireRelease,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
         &feature_armv8Mmain,
         &feature_dsp,
         &feature_fp16,
@@ -2849,16 +2674,16 @@ pub const cpu_cortexM4 = Cpu{
     .name = "cortex-m4",
     .llvm_name = "cortex-m4",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
+        &feature_dsp,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_dsp,
-        &feature_hwdiv,
         &feature_armv7eM,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
@@ -2875,19 +2700,19 @@ pub const cpu_cortexM7 = Cpu{
     .name = "cortex-m7",
     .llvm_name = "cortex-m7",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
+        &feature_dsp,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_dsp,
-        &feature_hwdiv,
         &feature_armv7eM,
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
         &feature_fpArmv8d16,
     },
 };
@@ -2896,14 +2721,14 @@ pub const cpu_cortexR4 = Cpu{
     .name = "cortex-r4",
     .llvm_name = "cortex-r4",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
         &feature_armv7R,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -2915,14 +2740,14 @@ pub const cpu_cortexR4f = Cpu{
     .name = "cortex-r4f",
     .llvm_name = "cortex-r4f",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
         &feature_armv7R,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -2938,14 +2763,14 @@ pub const cpu_cortexR5 = Cpu{
     .name = "cortex-r5",
     .llvm_name = "cortex-r5",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
         &feature_armv7R,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
@@ -2962,22 +2787,22 @@ pub const cpu_cortexR52 = Cpu{
     .name = "cortex-r52",
     .llvm_name = "cortex-r52",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_hwdiv,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_dsp,
+        &feature_hwdivArm,
+        &feature_hwdiv,
+        &feature_rclass,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
         &feature_dfb,
-        &feature_hwdivArm,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_rclass,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_d32,
         &feature_armv8R,
         &feature_fpao,
         &feature_useAa,
@@ -2990,14 +2815,14 @@ pub const cpu_cortexR7 = Cpu{
     .name = "cortex-r7",
     .llvm_name = "cortex-r7",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
         &feature_armv7R,
         &feature_avoidPartialCpsr,
         &feature_fp16,
@@ -3016,14 +2841,14 @@ pub const cpu_cortexR8 = Cpu{
     .name = "cortex-r8",
     .llvm_name = "cortex-r8",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
-        &feature_v4t,
         &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_v4t,
         &feature_armv7R,
         &feature_avoidPartialCpsr,
         &feature_fp16,
@@ -3041,22 +2866,22 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
@@ -3085,36 +2910,36 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_zcz,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
+        &feature_fuseAes,
         &feature_fuseLiterals,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_dontWidenVmovs,
         &feature_exynos,
     },
 };
@@ -3123,36 +2948,36 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_zcz,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
+        &feature_fuseAes,
         &feature_fuseLiterals,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_dontWidenVmovs,
         &feature_exynos,
     },
 };
@@ -3161,36 +2986,36 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_zcz,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
+        &feature_fuseAes,
         &feature_fuseLiterals,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_dontWidenVmovs,
         &feature_exynos,
     },
 };
@@ -3199,39 +3024,39 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_zcz,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
+        &feature_fuseAes,
         &feature_fuseLiterals,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_dontWidenVmovs,
         &feature_exynos,
     },
 };
@@ -3240,39 +3065,39 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_slowFpBrcc,
-        &feature_slowfpvmlx,
+        &feature_useAa,
+        &feature_zcz,
+        &feature_expandFpMlx,
         &feature_slowVdup32,
-        &feature_wideStrideVfp,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_zcz,
         &feature_profUnpr,
+        &feature_wideStrideVfp,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
+        &feature_fuseAes,
         &feature_fuseLiterals,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
+        &feature_dontWidenVmovs,
         &feature_exynos,
     },
 };
@@ -3297,15 +3122,15 @@ pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -3324,22 +3149,22 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_fpregs,
         &feature_v4t,
-        &feature_d32,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv8A,
         &feature_crypto,
         &feature_kryo,
@@ -3371,23 +3196,23 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .subfeatures = &[_]*const Feature {
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_perfmon,
+        &feature_db,
+        &feature_dsp,
+        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
-        &feature_v7clrex,
-        &feature_db,
+        &feature_fpregs,
+        &feature_v4t,
         &feature_thumb2,
         &feature_ras,
-        &feature_fp16,
-        &feature_v4t,
-        &feature_d32,
+        &feature_v7clrex,
         &feature_aclass,
-        &feature_hwdivArm,
         &feature_crc,
-        &feature_dsp,
-        &feature_fpregs,
+        &feature_mp,
+        &feature_acquireRelease,
+        &feature_fp16,
+        &feature_perfmon,
+        &feature_d32,
         &feature_armv82A,
         &feature_crypto,
         &feature_dotprod,
@@ -3399,11 +3224,11 @@ pub const cpu_sc000 = Cpu{
     .llvm_name = "sc000",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_thumbMode,
         &feature_mclass,
+        &feature_thumbMode,
+        &feature_strictAlign,
         &feature_noarm,
         &feature_v4t,
-        &feature_strictAlign,
         &feature_armv6M,
     },
 };
@@ -3412,15 +3237,15 @@ pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
     .subfeatures = &[_]*const Feature {
-        &feature_v7clrex,
         &feature_db,
-        &feature_thumb2,
         &feature_mclass,
+        &feature_hwdiv,
         &feature_thumbMode,
+        &feature_thumb2,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_noarm,
         &feature_v4t,
-        &feature_perfmon,
-        &feature_hwdiv,
         &feature_armv7M,
         &feature_noBranchPredictor,
         &feature_useAa,
@@ -3465,15 +3290,15 @@ pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
     .subfeatures = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_v7clrex,
         &feature_db,
+        &feature_dsp,
+        &feature_fpregs,
         &feature_thumb2,
+        &feature_v7clrex,
+        &feature_aclass,
+        &feature_perfmon,
         &feature_v4t,
         &feature_d32,
-        &feature_aclass,
-        &feature_dsp,
-        &feature_fpregs,
         &feature_armv7A,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index a843ba5e28776304461bcf829ee12d6f5d8ae513..4ca020d897b10d56f842da34d9c28f693d44e491 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_avr0 = Feature{
     .name = "avr0",
     .description = "The device is a part of the avr0 family",
-    .llvm_name = "avr0",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,234 +11,220 @@ pub const feature_avr0 = Feature{
 pub const feature_avr1 = Feature{
     .name = "avr1",
     .description = "The device is a part of the avr1 family",
-    .llvm_name = "avr1",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
     },
 };
 
 pub const feature_avr2 = Feature{
     .name = "avr2",
     .description = "The device is a part of the avr2 family",
-    .llvm_name = "avr2",
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
     },
 };
 
 pub const feature_avr3 = Feature{
     .name = "avr3",
     .description = "The device is a part of the avr3 family",
-    .llvm_name = "avr3",
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
     },
 };
 
 pub const feature_avr4 = Feature{
     .name = "avr4",
     .description = "The device is a part of the avr4 family",
-    .llvm_name = "avr4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avr5 = Feature{
     .name = "avr5",
     .description = "The device is a part of the avr5 family",
-    .llvm_name = "avr5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avr6 = Feature{
     .name = "avr6",
     .description = "The device is a part of the avr6 family",
-    .llvm_name = "avr6",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avr25 = Feature{
     .name = "avr25",
     .description = "The device is a part of the avr25 family",
-    .llvm_name = "avr25",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avr31 = Feature{
     .name = "avr31",
     .description = "The device is a part of the avr31 family",
-    .llvm_name = "avr31",
     .subfeatures = &[_]*const Feature {
-        &feature_jmpcall,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_elpm,
         &feature_addsubiw,
+        &feature_elpm,
+        &feature_lpm,
+        &feature_avr0,
     },
 };
 
 pub const feature_avr35 = Feature{
     .name = "avr35",
     .description = "The device is a part of the avr35 family",
-    .llvm_name = "avr35",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avr51 = Feature{
     .name = "avr51",
     .description = "The device is a part of the avr51 family",
-    .llvm_name = "avr51",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
     },
 };
 
 pub const feature_avrtiny = Feature{
     .name = "avrtiny",
     .description = "The device is a part of the avrtiny family",
-    .llvm_name = "avrtiny",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
     },
 };
 
 pub const feature_xmega = Feature{
     .name = "xmega",
     .description = "The device is a part of the xmega family",
-    .llvm_name = "xmega",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
     },
 };
 
 pub const feature_xmegau = Feature{
     .name = "xmegau",
     .description = "The device is a part of the xmegau family",
-    .llvm_name = "xmegau",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
     },
 };
 
 pub const feature_addsubiw = Feature{
     .name = "addsubiw",
     .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-    .llvm_name = "addsubiw",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -247,7 +232,6 @@ pub const feature_addsubiw = Feature{
 pub const feature_break = Feature{
     .name = "break",
     .description = "The device supports the `BREAK` debugging instruction",
-    .llvm_name = "break",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -255,7 +239,6 @@ pub const feature_break = Feature{
 pub const feature_des = Feature{
     .name = "des",
     .description = "The device supports the `DES k` encryption instruction",
-    .llvm_name = "des",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -263,7 +246,6 @@ pub const feature_des = Feature{
 pub const feature_eijmpcall = Feature{
     .name = "eijmpcall",
     .description = "The device supports the `EIJMP`/`EICALL` instructions",
-    .llvm_name = "eijmpcall",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -271,7 +253,6 @@ pub const feature_eijmpcall = Feature{
 pub const feature_elpm = Feature{
     .name = "elpm",
     .description = "The device supports the ELPM instruction",
-    .llvm_name = "elpm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -279,7 +260,6 @@ pub const feature_elpm = Feature{
 pub const feature_elpmx = Feature{
     .name = "elpmx",
     .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-    .llvm_name = "elpmx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -287,7 +267,6 @@ pub const feature_elpmx = Feature{
 pub const feature_ijmpcall = Feature{
     .name = "ijmpcall",
     .description = "The device supports `IJMP`/`ICALL`instructions",
-    .llvm_name = "ijmpcall",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -295,7 +274,6 @@ pub const feature_ijmpcall = Feature{
 pub const feature_jmpcall = Feature{
     .name = "jmpcall",
     .description = "The device supports the `JMP` and `CALL` instructions",
-    .llvm_name = "jmpcall",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -303,7 +281,6 @@ pub const feature_jmpcall = Feature{
 pub const feature_lpm = Feature{
     .name = "lpm",
     .description = "The device supports the `LPM` instruction",
-    .llvm_name = "lpm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -311,7 +288,6 @@ pub const feature_lpm = Feature{
 pub const feature_lpmx = Feature{
     .name = "lpmx",
     .description = "The device supports the `LPM Rd, Z[+]` instruction",
-    .llvm_name = "lpmx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -319,7 +295,6 @@ pub const feature_lpmx = Feature{
 pub const feature_movw = Feature{
     .name = "movw",
     .description = "The device supports the 16-bit MOVW instruction",
-    .llvm_name = "movw",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -327,7 +302,6 @@ pub const feature_movw = Feature{
 pub const feature_mul = Feature{
     .name = "mul",
     .description = "The device supports the multiplication instructions",
-    .llvm_name = "mul",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -335,7 +309,6 @@ pub const feature_mul = Feature{
 pub const feature_rmw = Feature{
     .name = "rmw",
     .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-    .llvm_name = "rmw",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -343,7 +316,6 @@ pub const feature_rmw = Feature{
 pub const feature_spm = Feature{
     .name = "spm",
     .description = "The device supports the `SPM` instruction",
-    .llvm_name = "spm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -351,7 +323,6 @@ pub const feature_spm = Feature{
 pub const feature_spmx = Feature{
     .name = "spmx",
     .description = "The device supports the `SPM Z+` instruction",
-    .llvm_name = "spmx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -359,7 +330,6 @@ pub const feature_spmx = Feature{
 pub const feature_sram = Feature{
     .name = "sram",
     .description = "The device has random access memory",
-    .llvm_name = "sram",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -367,31 +337,29 @@ pub const feature_sram = Feature{
 pub const feature_special = Feature{
     .name = "special",
     .description = "Enable use of the entire instruction set - used for debugging",
-    .llvm_name = "special",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_mul,
         &feature_rmw,
-        &feature_spmx,
-        &feature_lpm,
-        &feature_eijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_elpmx,
+        &feature_sram,
         &feature_elpm,
         &feature_addsubiw,
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_elpmx,
+        &feature_break,
+        &feature_lpm,
+        &feature_mul,
+        &feature_movw,
+        &feature_spmx,
     },
 };
 
 pub const feature_smallstack = Feature{
     .name = "smallstack",
     .description = "The device has an 8-bit stack pointer",
-    .llvm_name = "smallstack",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -399,7 +367,6 @@ pub const feature_smallstack = Feature{
 pub const feature_tinyencoding = Feature{
     .name = "tinyencoding",
     .description = "The device has Tiny core specific instruction encodings",
-    .llvm_name = "tinyencoding",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -444,13 +411,13 @@ pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
     .subfeatures = &[_]*const Feature {
-        &feature_jmpcall,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_elpm,
         &feature_addsubiw,
+        &feature_elpm,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr31,
     },
 };
@@ -462,9 +429,9 @@ pub const cpu_at43usb355 = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
     },
 };
@@ -476,9 +443,9 @@ pub const cpu_at76c711 = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
     },
 };
@@ -489,9 +456,9 @@ pub const cpu_at86rf401 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
         &feature_lpmx,
         &feature_movw,
@@ -504,9 +471,9 @@ pub const cpu_at90c8534 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -515,19 +482,19 @@ pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -536,17 +503,17 @@ pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -555,17 +522,17 @@ pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -574,16 +541,16 @@ pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -592,17 +559,17 @@ pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -611,16 +578,16 @@ pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -629,17 +596,17 @@ pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -648,16 +615,16 @@ pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -666,16 +633,16 @@ pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -684,17 +651,17 @@ pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -703,16 +670,16 @@ pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -721,16 +688,16 @@ pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -749,9 +716,9 @@ pub const cpu_at90s2313 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -762,9 +729,9 @@ pub const cpu_at90s2323 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -775,9 +742,9 @@ pub const cpu_at90s2333 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -788,9 +755,9 @@ pub const cpu_at90s2343 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -801,9 +768,9 @@ pub const cpu_at90s4414 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -814,9 +781,9 @@ pub const cpu_at90s4433 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -827,9 +794,9 @@ pub const cpu_at90s4434 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -840,9 +807,9 @@ pub const cpu_at90s8515 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -853,9 +820,9 @@ pub const cpu_at90s8535 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -864,17 +831,17 @@ pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -883,19 +850,19 @@ pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -904,19 +871,19 @@ pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -925,16 +892,16 @@ pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -943,17 +910,17 @@ pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -962,17 +929,17 @@ pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -981,16 +948,16 @@ pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -1002,9 +969,9 @@ pub const cpu_at94k = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
         &feature_lpmx,
         &feature_movw,
@@ -1016,15 +983,15 @@ pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -1033,16 +1000,16 @@ pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -1051,17 +1018,17 @@ pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1070,17 +1037,17 @@ pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1089,16 +1056,16 @@ pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -1107,16 +1074,16 @@ pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -1125,16 +1092,16 @@ pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -1143,13 +1110,13 @@ pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
     .subfeatures = &[_]*const Feature {
-        &feature_jmpcall,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_elpm,
         &feature_addsubiw,
+        &feature_elpm,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr31,
     },
 };
@@ -1158,19 +1125,19 @@ pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1179,19 +1146,19 @@ pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1200,19 +1167,19 @@ pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1221,19 +1188,19 @@ pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1242,19 +1209,19 @@ pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1263,19 +1230,19 @@ pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1284,19 +1251,19 @@ pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1305,19 +1272,19 @@ pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1326,19 +1293,19 @@ pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -1347,17 +1314,17 @@ pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1369,9 +1336,9 @@ pub const cpu_atmega161 = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
         &feature_lpmx,
         &feature_movw,
@@ -1384,17 +1351,17 @@ pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1406,9 +1373,9 @@ pub const cpu_atmega163 = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
         &feature_lpmx,
         &feature_movw,
@@ -1421,17 +1388,17 @@ pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1440,17 +1407,17 @@ pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1459,17 +1426,17 @@ pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1478,17 +1445,17 @@ pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1497,17 +1464,17 @@ pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1516,17 +1483,17 @@ pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1535,17 +1502,17 @@ pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1554,17 +1521,17 @@ pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1573,17 +1540,17 @@ pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1592,17 +1559,17 @@ pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1611,17 +1578,17 @@ pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1630,17 +1597,17 @@ pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1649,17 +1616,17 @@ pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1668,17 +1635,17 @@ pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1687,17 +1654,17 @@ pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1706,17 +1673,17 @@ pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1725,17 +1692,17 @@ pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1744,17 +1711,17 @@ pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1763,17 +1730,17 @@ pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1782,17 +1749,17 @@ pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1801,17 +1768,17 @@ pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1820,16 +1787,16 @@ pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -1838,17 +1805,17 @@ pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1857,19 +1824,19 @@ pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr6,
     },
 };
@@ -1878,19 +1845,19 @@ pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr6,
     },
 };
@@ -1899,19 +1866,19 @@ pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr6,
     },
 };
@@ -1920,19 +1887,19 @@ pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr6,
     },
 };
@@ -1941,17 +1908,17 @@ pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1960,17 +1927,17 @@ pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1979,17 +1946,17 @@ pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -1998,17 +1965,17 @@ pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2017,17 +1984,17 @@ pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2036,17 +2003,17 @@ pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2055,17 +2022,17 @@ pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2074,17 +2041,17 @@ pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2093,17 +2060,17 @@ pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2112,17 +2079,17 @@ pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2131,17 +2098,17 @@ pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2150,17 +2117,17 @@ pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2169,17 +2136,17 @@ pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2188,17 +2155,17 @@ pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2207,17 +2174,17 @@ pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2226,17 +2193,17 @@ pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2245,17 +2212,17 @@ pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2264,17 +2231,17 @@ pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2283,17 +2250,17 @@ pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2302,17 +2269,17 @@ pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2321,17 +2288,17 @@ pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2340,17 +2307,17 @@ pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2359,17 +2326,17 @@ pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2378,17 +2345,17 @@ pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2397,17 +2364,17 @@ pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2416,17 +2383,17 @@ pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2435,17 +2402,17 @@ pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2454,17 +2421,17 @@ pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2473,16 +2440,16 @@ pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -2491,17 +2458,17 @@ pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2510,17 +2477,17 @@ pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2529,17 +2496,17 @@ pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2548,16 +2515,16 @@ pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -2566,16 +2533,16 @@ pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -2584,16 +2551,16 @@ pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -2602,16 +2569,16 @@ pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -2620,17 +2587,17 @@ pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2639,17 +2606,17 @@ pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2658,17 +2625,17 @@ pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2677,17 +2644,17 @@ pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2696,17 +2663,17 @@ pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2715,17 +2682,17 @@ pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2734,17 +2701,17 @@ pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2753,17 +2720,17 @@ pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2772,17 +2739,17 @@ pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2791,17 +2758,17 @@ pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2810,17 +2777,17 @@ pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2829,17 +2796,17 @@ pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2848,17 +2815,17 @@ pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2867,17 +2834,17 @@ pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2886,17 +2853,17 @@ pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2905,17 +2872,17 @@ pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2924,17 +2891,17 @@ pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2943,17 +2910,17 @@ pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2962,17 +2929,17 @@ pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -2981,17 +2948,17 @@ pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -3000,17 +2967,17 @@ pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -3019,17 +2986,17 @@ pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -3038,17 +3005,17 @@ pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -3057,17 +3024,17 @@ pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -3076,16 +3043,16 @@ pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3096,9 +3063,9 @@ pub const cpu_atmega8515 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
         &feature_lpmx,
         &feature_movw,
@@ -3113,9 +3080,9 @@ pub const cpu_atmega8535 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
         &feature_lpmx,
         &feature_movw,
@@ -3128,16 +3095,16 @@ pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3146,16 +3113,16 @@ pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3164,16 +3131,16 @@ pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3182,16 +3149,16 @@ pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3200,16 +3167,16 @@ pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3218,16 +3185,16 @@ pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -3236,16 +3203,16 @@ pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -3254,10 +3221,10 @@ pub const cpu_attiny10 = Cpu{
     .name = "attiny10",
     .llvm_name = "attiny10",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3266,10 +3233,10 @@ pub const cpu_attiny102 = Cpu{
     .name = "attiny102",
     .llvm_name = "attiny102",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3278,10 +3245,10 @@ pub const cpu_attiny104 = Cpu{
     .name = "attiny104",
     .llvm_name = "attiny104",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3290,8 +3257,8 @@ pub const cpu_attiny11 = Cpu{
     .name = "attiny11",
     .llvm_name = "attiny11",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
         &feature_avr1,
     },
 };
@@ -3300,8 +3267,8 @@ pub const cpu_attiny12 = Cpu{
     .name = "attiny12",
     .llvm_name = "attiny12",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
         &feature_avr1,
     },
 };
@@ -3310,15 +3277,15 @@ pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3327,15 +3294,15 @@ pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3344,8 +3311,8 @@ pub const cpu_attiny15 = Cpu{
     .name = "attiny15",
     .llvm_name = "attiny15",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
         &feature_avr1,
     },
 };
@@ -3354,16 +3321,16 @@ pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -3372,16 +3339,16 @@ pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -3390,10 +3357,10 @@ pub const cpu_attiny20 = Cpu{
     .name = "attiny20",
     .llvm_name = "attiny20",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3404,9 +3371,9 @@ pub const cpu_attiny22 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -3415,15 +3382,15 @@ pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3432,15 +3399,15 @@ pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3449,15 +3416,15 @@ pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3466,15 +3433,15 @@ pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3483,15 +3450,15 @@ pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3502,9 +3469,9 @@ pub const cpu_attiny26 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
         &feature_lpmx,
     },
@@ -3514,15 +3481,15 @@ pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3531,15 +3498,15 @@ pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3548,8 +3515,8 @@ pub const cpu_attiny28 = Cpu{
     .name = "attiny28",
     .llvm_name = "attiny28",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
         &feature_avr1,
     },
 };
@@ -3558,10 +3525,10 @@ pub const cpu_attiny4 = Cpu{
     .name = "attiny4",
     .llvm_name = "attiny4",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3570,10 +3537,10 @@ pub const cpu_attiny40 = Cpu{
     .name = "attiny40",
     .llvm_name = "attiny40",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3582,15 +3549,15 @@ pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3599,15 +3566,15 @@ pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3616,15 +3583,15 @@ pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3633,15 +3600,15 @@ pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3650,15 +3617,15 @@ pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3667,15 +3634,15 @@ pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3684,15 +3651,15 @@ pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3701,15 +3668,15 @@ pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3718,10 +3685,10 @@ pub const cpu_attiny5 = Cpu{
     .name = "attiny5",
     .llvm_name = "attiny5",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3730,15 +3697,15 @@ pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3747,15 +3714,15 @@ pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3764,15 +3731,15 @@ pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3781,15 +3748,15 @@ pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3798,15 +3765,15 @@ pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3815,15 +3782,15 @@ pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3832,15 +3799,15 @@ pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3849,15 +3816,15 @@ pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -3866,10 +3833,10 @@ pub const cpu_attiny9 = Cpu{
     .name = "attiny9",
     .llvm_name = "attiny9",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -3878,22 +3845,22 @@ pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -3902,23 +3869,23 @@ pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -3927,22 +3894,22 @@ pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -3951,23 +3918,23 @@ pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -3976,23 +3943,23 @@ pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4001,23 +3968,23 @@ pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4026,23 +3993,23 @@ pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4051,23 +4018,23 @@ pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4076,22 +4043,22 @@ pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4100,22 +4067,22 @@ pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4124,22 +4091,22 @@ pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4148,23 +4115,23 @@ pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4173,23 +4140,23 @@ pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4198,22 +4165,22 @@ pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4222,22 +4189,22 @@ pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4246,22 +4213,22 @@ pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4270,23 +4237,23 @@ pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4295,23 +4262,23 @@ pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4320,22 +4287,22 @@ pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4344,22 +4311,22 @@ pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4368,22 +4335,22 @@ pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4392,23 +4359,23 @@ pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4417,23 +4384,23 @@ pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4442,23 +4409,23 @@ pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4467,22 +4434,22 @@ pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4491,22 +4458,22 @@ pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4515,23 +4482,23 @@ pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4540,23 +4507,23 @@ pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4565,22 +4532,22 @@ pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4589,22 +4556,22 @@ pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4613,22 +4580,22 @@ pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4637,23 +4604,23 @@ pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4662,22 +4629,22 @@ pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4686,22 +4653,22 @@ pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4710,23 +4677,23 @@ pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4735,22 +4702,22 @@ pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4759,23 +4726,23 @@ pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4784,23 +4751,23 @@ pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4809,23 +4776,23 @@ pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4834,23 +4801,23 @@ pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4859,23 +4826,23 @@ pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
+        &feature_des,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
         &feature_rmw,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmegau,
     },
 };
@@ -4884,22 +4851,22 @@ pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4908,22 +4875,22 @@ pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4932,22 +4899,22 @@ pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -4956,8 +4923,8 @@ pub const cpu_avr1 = Cpu{
     .name = "avr1",
     .llvm_name = "avr1",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
         &feature_lpm,
+        &feature_avr0,
         &feature_avr1,
     },
 };
@@ -4968,9 +4935,9 @@ pub const cpu_avr2 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_ijmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr2,
     },
 };
@@ -4979,15 +4946,15 @@ pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr25,
     },
 };
@@ -4999,9 +4966,9 @@ pub const cpu_avr3 = Cpu{
         &feature_ijmpcall,
         &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
         &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr3,
     },
 };
@@ -5010,13 +4977,13 @@ pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
     .subfeatures = &[_]*const Feature {
-        &feature_jmpcall,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_elpm,
         &feature_addsubiw,
+        &feature_elpm,
+        &feature_lpm,
+        &feature_avr0,
         &feature_avr31,
     },
 };
@@ -5025,16 +4992,16 @@ pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_avr0,
-        &feature_lpm,
-        &feature_break,
-        &feature_spm,
         &feature_addsubiw,
+        &feature_break,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr35,
     },
 };
@@ -5043,16 +5010,16 @@ pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr4,
     },
 };
@@ -5061,17 +5028,17 @@ pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
@@ -5080,19 +5047,19 @@ pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
         &feature_ijmpcall,
         &feature_jmpcall,
-        &feature_movw,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr51,
     },
 };
@@ -5101,19 +5068,19 @@ pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr6,
     },
 };
@@ -5122,10 +5089,10 @@ pub const cpu_avrtiny = Cpu{
     .name = "avrtiny",
     .llvm_name = "avrtiny",
     .subfeatures = &[_]*const Feature {
-        &feature_tinyencoding,
+        &feature_avr0,
         &feature_sram,
+        &feature_tinyencoding,
         &feature_break,
-        &feature_avr0,
         &feature_avrtiny,
     },
 };
@@ -5134,22 +5101,22 @@ pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5158,22 +5125,22 @@ pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5182,22 +5149,22 @@ pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5206,22 +5173,22 @@ pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5230,22 +5197,22 @@ pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5254,22 +5221,22 @@ pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5278,22 +5245,22 @@ pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
+        &feature_des,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
-        &feature_mul,
-        &feature_avr0,
-        &feature_spmx,
-        &feature_lpm,
+        &feature_addsubiw,
+        &feature_elpm,
         &feature_eijmpcall,
+        &feature_mul,
         &feature_break,
-        &feature_spm,
+        &feature_lpm,
         &feature_elpmx,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_des,
+        &feature_avr0,
+        &feature_movw,
+        &feature_spmx,
         &feature_xmega,
     },
 };
@@ -5302,17 +5269,17 @@ pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
     .subfeatures = &[_]*const Feature {
+        &feature_spm,
         &feature_lpmx,
-        &feature_jmpcall,
         &feature_ijmpcall,
-        &feature_movw,
+        &feature_jmpcall,
         &feature_sram,
+        &feature_addsubiw,
         &feature_mul,
-        &feature_avr0,
-        &feature_lpm,
         &feature_break,
-        &feature_spm,
-        &feature_addsubiw,
+        &feature_lpm,
+        &feature_avr0,
+        &feature_movw,
         &feature_avr5,
     },
 };
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 8a504eaf9e23d4a19625be4328bb606ce212bac1..d36f9f2e1deb3ca024577ce0d0867b53e64ceed5 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_alu32 = Feature{
     .name = "alu32",
     .description = "Enable ALU32 instructions",
-    .llvm_name = "alu32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_alu32 = Feature{
 pub const feature_dummy = Feature{
     .name = "dummy",
     .description = "unused feature",
-    .llvm_name = "dummy",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_dummy = Feature{
 pub const feature_dwarfris = Feature{
     .name = "dwarfris",
     .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-    .llvm_name = "dwarfris",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 4ebc7edc2f9c20a52d36a7eee2e0a2abb843fbf3..0219b88815a0e85bea4db163cf65c7b1cab16da7 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_v5 = Feature{
     .name = "v5",
     .description = "Enable Hexagon V5 architecture",
-    .llvm_name = "v5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_v5 = Feature{
 pub const feature_v55 = Feature{
     .name = "v55",
     .description = "Enable Hexagon V55 architecture",
-    .llvm_name = "v55",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_v55 = Feature{
 pub const feature_v60 = Feature{
     .name = "v60",
     .description = "Enable Hexagon V60 architecture",
-    .llvm_name = "v60",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_v60 = Feature{
 pub const feature_v62 = Feature{
     .name = "v62",
     .description = "Enable Hexagon V62 architecture",
-    .llvm_name = "v62",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_v62 = Feature{
 pub const feature_v65 = Feature{
     .name = "v65",
     .description = "Enable Hexagon V65 architecture",
-    .llvm_name = "v65",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_v65 = Feature{
 pub const feature_v66 = Feature{
     .name = "v66",
     .description = "Enable Hexagon V66 architecture",
-    .llvm_name = "v66",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_v66 = Feature{
 pub const feature_hvx = Feature{
     .name = "hvx",
     .description = "Hexagon HVX instructions",
-    .llvm_name = "hvx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_hvx = Feature{
 pub const feature_hvxLength64b = Feature{
     .name = "hvx-length64b",
     .description = "Hexagon HVX 64B instructions",
-    .llvm_name = "hvx-length64b",
     .subfeatures = &[_]*const Feature {
         &feature_hvx,
     },
@@ -69,7 +61,6 @@ pub const feature_hvxLength64b = Feature{
 pub const feature_hvxLength128b = Feature{
     .name = "hvx-length128b",
     .description = "Hexagon HVX 128B instructions",
-    .llvm_name = "hvx-length128b",
     .subfeatures = &[_]*const Feature {
         &feature_hvx,
     },
@@ -78,7 +69,6 @@ pub const feature_hvxLength128b = Feature{
 pub const feature_hvxv60 = Feature{
     .name = "hvxv60",
     .description = "Hexagon HVX instructions",
-    .llvm_name = "hvxv60",
     .subfeatures = &[_]*const Feature {
         &feature_hvx,
     },
@@ -87,7 +77,6 @@ pub const feature_hvxv60 = Feature{
 pub const feature_hvxv62 = Feature{
     .name = "hvxv62",
     .description = "Hexagon HVX instructions",
-    .llvm_name = "hvxv62",
     .subfeatures = &[_]*const Feature {
         &feature_hvx,
     },
@@ -96,7 +85,6 @@ pub const feature_hvxv62 = Feature{
 pub const feature_hvxv65 = Feature{
     .name = "hvxv65",
     .description = "Hexagon HVX instructions",
-    .llvm_name = "hvxv65",
     .subfeatures = &[_]*const Feature {
         &feature_hvx,
     },
@@ -105,7 +93,6 @@ pub const feature_hvxv65 = Feature{
 pub const feature_hvxv66 = Feature{
     .name = "hvxv66",
     .description = "Hexagon HVX instructions",
-    .llvm_name = "hvxv66",
     .subfeatures = &[_]*const Feature {
         &feature_zreg,
         &feature_hvx,
@@ -115,7 +102,6 @@ pub const feature_hvxv66 = Feature{
 pub const feature_zreg = Feature{
     .name = "zreg",
     .description = "Hexagon ZReg extension instructions",
-    .llvm_name = "zreg",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -123,7 +109,6 @@ pub const feature_zreg = Feature{
 pub const feature_duplex = Feature{
     .name = "duplex",
     .description = "Enable generation of duplex instruction",
-    .llvm_name = "duplex",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -131,7 +116,6 @@ pub const feature_duplex = Feature{
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Use constant-extended calls",
-    .llvm_name = "long-calls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -139,7 +123,6 @@ pub const feature_longCalls = Feature{
 pub const feature_mem_noshuf = Feature{
     .name = "mem_noshuf",
     .description = "Supports mem_noshuf feature",
-    .llvm_name = "mem_noshuf",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -147,7 +130,6 @@ pub const feature_mem_noshuf = Feature{
 pub const feature_memops = Feature{
     .name = "memops",
     .description = "Use memop instructions",
-    .llvm_name = "memops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -155,7 +137,6 @@ pub const feature_memops = Feature{
 pub const feature_nvj = Feature{
     .name = "nvj",
     .description = "Support for new-value jumps",
-    .llvm_name = "nvj",
     .subfeatures = &[_]*const Feature {
         &feature_packets,
     },
@@ -164,7 +145,6 @@ pub const feature_nvj = Feature{
 pub const feature_nvs = Feature{
     .name = "nvs",
     .description = "Support for new-value stores",
-    .llvm_name = "nvs",
     .subfeatures = &[_]*const Feature {
         &feature_packets,
     },
@@ -173,7 +153,6 @@ pub const feature_nvs = Feature{
 pub const feature_noreturnStackElim = Feature{
     .name = "noreturn-stack-elim",
     .description = "Eliminate stack allocation in a noreturn function when possible",
-    .llvm_name = "noreturn-stack-elim",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -181,7 +160,6 @@ pub const feature_noreturnStackElim = Feature{
 pub const feature_packets = Feature{
     .name = "packets",
     .description = "Support for instruction packets",
-    .llvm_name = "packets",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -189,7 +167,6 @@ pub const feature_packets = Feature{
 pub const feature_reservedR19 = Feature{
     .name = "reserved-r19",
     .description = "Reserve register R19",
-    .llvm_name = "reserved-r19",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -197,7 +174,6 @@ pub const feature_reservedR19 = Feature{
 pub const feature_smallData = Feature{
     .name = "small-data",
     .description = "Allow GP-relative addressing of global variables",
-    .llvm_name = "small-data",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index f2de051623fd46fbce71368bd3f9453038c3418e..3d02746606192af9566551929dbf2bc40319d61d 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_abs2008 = Feature{
     .name = "abs2008",
     .description = "Disable IEEE 754-2008 abs.fmt mode",
-    .llvm_name = "abs2008",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_abs2008 = Feature{
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Mips R6 CRC ASE",
-    .llvm_name = "crc",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,23 +18,21 @@ pub const feature_crc = Feature{
 pub const feature_cnmips = Feature{
     .name = "cnmips",
     .description = "Octeon cnMIPS Support",
-    .llvm_name = "cnmips",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_dsp = Feature{
     .name = "dsp",
     .description = "Mips DSP ASE",
-    .llvm_name = "dsp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +40,6 @@ pub const feature_dsp = Feature{
 pub const feature_dspr2 = Feature{
     .name = "dspr2",
     .description = "Mips DSP-R2 ASE",
-    .llvm_name = "dspr2",
     .subfeatures = &[_]*const Feature {
         &feature_dsp,
     },
@@ -53,7 +48,6 @@ pub const feature_dspr2 = Feature{
 pub const feature_dspr3 = Feature{
     .name = "dspr3",
     .description = "Mips DSP-R3 ASE",
-    .llvm_name = "dspr3",
     .subfeatures = &[_]*const Feature {
         &feature_dsp,
     },
@@ -62,7 +56,6 @@ pub const feature_dspr3 = Feature{
 pub const feature_eva = Feature{
     .name = "eva",
     .description = "Mips EVA ASE",
-    .llvm_name = "eva",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -70,7 +63,6 @@ pub const feature_eva = Feature{
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Support 64-bit FP registers",
-    .llvm_name = "fp64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -78,7 +70,6 @@ pub const feature_fp64 = Feature{
 pub const feature_fpxx = Feature{
     .name = "fpxx",
     .description = "Support for FPXX",
-    .llvm_name = "fpxx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -86,7 +77,6 @@ pub const feature_fpxx = Feature{
 pub const feature_ginv = Feature{
     .name = "ginv",
     .description = "Mips Global Invalidate ASE",
-    .llvm_name = "ginv",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -94,7 +84,6 @@ pub const feature_ginv = Feature{
 pub const feature_gp64 = Feature{
     .name = "gp64",
     .description = "General Purpose Registers are 64-bit wide",
-    .llvm_name = "gp64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -102,7 +91,6 @@ pub const feature_gp64 = Feature{
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Disable use of the jal instruction",
-    .llvm_name = "long-calls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -110,7 +98,6 @@ pub const feature_longCalls = Feature{
 pub const feature_msa = Feature{
     .name = "msa",
     .description = "Mips MSA ASE",
-    .llvm_name = "msa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -118,7 +105,6 @@ pub const feature_msa = Feature{
 pub const feature_mt = Feature{
     .name = "mt",
     .description = "Mips MT ASE",
-    .llvm_name = "mt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -126,7 +112,6 @@ pub const feature_mt = Feature{
 pub const feature_nomadd4 = Feature{
     .name = "nomadd4",
     .description = "Disable 4-operand madd.fmt and related instructions",
-    .llvm_name = "nomadd4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -134,7 +119,6 @@ pub const feature_nomadd4 = Feature{
 pub const feature_micromips = Feature{
     .name = "micromips",
     .description = "microMips mode",
-    .llvm_name = "micromips",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -142,7 +126,6 @@ pub const feature_micromips = Feature{
 pub const feature_mips1 = Feature{
     .name = "mips1",
     .description = "Mips I ISA Support [highly experimental]",
-    .llvm_name = "mips1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -150,7 +133,6 @@ pub const feature_mips1 = Feature{
 pub const feature_mips2 = Feature{
     .name = "mips2",
     .description = "Mips II ISA Support [highly experimental]",
-    .llvm_name = "mips2",
     .subfeatures = &[_]*const Feature {
         &feature_mips1,
     },
@@ -159,20 +141,18 @@ pub const feature_mips2 = Feature{
 pub const feature_mips3 = Feature{
     .name = "mips3",
     .description = "MIPS III ISA Support [highly experimental]",
-    .llvm_name = "mips3",
     .subfeatures = &[_]*const Feature {
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
         &feature_mips3_32,
+        &feature_mips1,
         &feature_fp64,
+        &feature_gp64,
     },
 };
 
 pub const feature_mips3_32 = Feature{
     .name = "mips3_32",
     .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-    .llvm_name = "mips3_32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -180,7 +160,6 @@ pub const feature_mips3_32 = Feature{
 pub const feature_mips3_32r2 = Feature{
     .name = "mips3_32r2",
     .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-    .llvm_name = "mips3_32r2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -188,22 +167,20 @@ pub const feature_mips3_32r2 = Feature{
 pub const feature_mips4 = Feature{
     .name = "mips4",
     .description = "MIPS IV ISA Support",
-    .llvm_name = "mips4",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips4_32 = Feature{
     .name = "mips4_32",
     .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-    .llvm_name = "mips4_32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -211,7 +188,6 @@ pub const feature_mips4_32 = Feature{
 pub const feature_mips4_32r2 = Feature{
     .name = "mips4_32r2",
     .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-    .llvm_name = "mips4_32r2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -219,23 +195,21 @@ pub const feature_mips4_32r2 = Feature{
 pub const feature_mips5 = Feature{
     .name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
-    .llvm_name = "mips5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips5_32r2 = Feature{
     .name = "mips5_32r2",
     .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-    .llvm_name = "mips5_32r2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -243,7 +217,6 @@ pub const feature_mips5_32r2 = Feature{
 pub const feature_mips16 = Feature{
     .name = "mips16",
     .description = "Mips16 mode",
-    .llvm_name = "mips16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -251,159 +224,148 @@ pub const feature_mips16 = Feature{
 pub const feature_mips32 = Feature{
     .name = "mips32",
     .description = "Mips32 ISA Support",
-    .llvm_name = "mips32",
     .subfeatures = &[_]*const Feature {
+        &feature_mips1,
         &feature_mips4_32,
         &feature_mips3_32,
-        &feature_mips1,
     },
 };
 
 pub const feature_mips32r2 = Feature{
     .name = "mips32r2",
     .description = "Mips32r2 ISA Support",
-    .llvm_name = "mips32r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips32r3 = Feature{
     .name = "mips32r3",
     .description = "Mips32r3 ISA Support",
-    .llvm_name = "mips32r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips32r5 = Feature{
     .name = "mips32r5",
     .description = "Mips32r5 ISA Support",
-    .llvm_name = "mips32r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips32r6 = Feature{
     .name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
-    .llvm_name = "mips32r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_nan2008,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_nan2008,
+        &feature_mips4_32r2,
         &feature_mips1,
         &feature_abs2008,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips64 = Feature{
     .name = "mips64",
     .description = "Mips64 ISA Support",
-    .llvm_name = "mips64",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips64r2 = Feature{
     .name = "mips64r2",
     .description = "Mips64r2 ISA Support",
-    .llvm_name = "mips64r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips64r3 = Feature{
     .name = "mips64r3",
     .description = "Mips64r3 ISA Support",
-    .llvm_name = "mips64r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips64r5 = Feature{
     .name = "mips64r5",
     .description = "Mips64r5 ISA Support",
-    .llvm_name = "mips64r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips64r6 = Feature{
     .name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
-    .llvm_name = "mips64r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_nan2008,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_nan2008,
+        &feature_mips4_32r2,
         &feature_mips1,
         &feature_abs2008,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_nan2008 = Feature{
     .name = "nan2008",
     .description = "IEEE 754-2008 NaN encoding",
-    .llvm_name = "nan2008",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -411,7 +373,6 @@ pub const feature_nan2008 = Feature{
 pub const feature_noabicalls = Feature{
     .name = "noabicalls",
     .description = "Disable SVR4-style position-independent code",
-    .llvm_name = "noabicalls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -419,7 +380,6 @@ pub const feature_noabicalls = Feature{
 pub const feature_nooddspreg = Feature{
     .name = "nooddspreg",
     .description = "Disable odd numbered single-precision registers",
-    .llvm_name = "nooddspreg",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -427,7 +387,6 @@ pub const feature_nooddspreg = Feature{
 pub const feature_ptr64 = Feature{
     .name = "ptr64",
     .description = "Pointers are 64-bit wide",
-    .llvm_name = "ptr64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -435,7 +394,6 @@ pub const feature_ptr64 = Feature{
 pub const feature_singleFloat = Feature{
     .name = "single-float",
     .description = "Only supports single precision float",
-    .llvm_name = "single-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -443,7 +401,6 @@ pub const feature_singleFloat = Feature{
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Does not support floating point instructions",
-    .llvm_name = "soft-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -451,7 +408,6 @@ pub const feature_softFloat = Feature{
 pub const feature_sym32 = Feature{
     .name = "sym32",
     .description = "Symbols are 32 bit on Mips64",
-    .llvm_name = "sym32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -459,7 +415,6 @@ pub const feature_sym32 = Feature{
 pub const feature_useIndirectJumpHazard = Feature{
     .name = "use-indirect-jump-hazard",
     .description = "Use indirect jump guards to prevent certain speculation based attacks",
-    .llvm_name = "use-indirect-jump-hazard",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -467,7 +422,6 @@ pub const feature_useIndirectJumpHazard = Feature{
 pub const feature_useTccInDiv = Feature{
     .name = "use-tcc-in-div",
     .description = "Force the assembler to use trapping",
-    .llvm_name = "use-tcc-in-div",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -475,7 +429,6 @@ pub const feature_useTccInDiv = Feature{
 pub const feature_vfpu = Feature{
     .name = "vfpu",
     .description = "Enable vector FPU instructions",
-    .llvm_name = "vfpu",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -483,7 +436,6 @@ pub const feature_vfpu = Feature{
 pub const feature_virt = Feature{
     .name = "virt",
     .description = "Mips Virtualization ASE",
-    .llvm_name = "virt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -491,7 +443,6 @@ pub const feature_virt = Feature{
 pub const feature_xgot = Feature{
     .name = "xgot",
     .description = "Assume 32-bit GOT",
-    .llvm_name = "xgot",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -499,14 +450,13 @@ pub const feature_xgot = Feature{
 pub const feature_p5600 = Feature{
     .name = "p5600",
     .description = "The P5600 Processor",
-    .llvm_name = "p5600",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
     },
 };
 
@@ -585,10 +535,10 @@ pub const cpu_mips3 = Cpu{
     .llvm_name = "mips3",
     .subfeatures = &[_]*const Feature {
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
         &feature_mips3_32,
+        &feature_mips1,
         &feature_fp64,
+        &feature_gp64,
         &feature_mips3,
     },
 };
@@ -597,9 +547,9 @@ pub const cpu_mips32 = Cpu{
     .name = "mips32",
     .llvm_name = "mips32",
     .subfeatures = &[_]*const Feature {
+        &feature_mips1,
         &feature_mips4_32,
         &feature_mips3_32,
-        &feature_mips1,
         &feature_mips32,
     },
 };
@@ -608,12 +558,12 @@ pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
         &feature_mips32r2,
     },
 };
@@ -622,12 +572,12 @@ pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
         &feature_mips32r3,
     },
 };
@@ -636,12 +586,12 @@ pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
         &feature_mips32r5,
     },
 };
@@ -650,15 +600,15 @@ pub const cpu_mips32r6 = Cpu{
     .name = "mips32r6",
     .llvm_name = "mips32r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_nan2008,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_nan2008,
+        &feature_mips4_32r2,
         &feature_mips1,
         &feature_abs2008,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
         &feature_mips32r6,
     },
 };
@@ -667,13 +617,13 @@ pub const cpu_mips4 = Cpu{
     .name = "mips4",
     .llvm_name = "mips4",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips4,
     },
 };
@@ -682,14 +632,14 @@ pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips5,
     },
 };
@@ -698,14 +648,14 @@ pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips64,
     },
 };
@@ -714,14 +664,14 @@ pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips64r2,
     },
 };
@@ -730,14 +680,14 @@ pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips64r3,
     },
 };
@@ -746,14 +696,14 @@ pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips64r5,
     },
 };
@@ -762,16 +712,16 @@ pub const cpu_mips64r6 = Cpu{
     .name = "mips64r6",
     .llvm_name = "mips64r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_nan2008,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_nan2008,
+        &feature_mips4_32r2,
         &feature_mips1,
         &feature_abs2008,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_mips64r6,
     },
 };
@@ -780,14 +730,14 @@ pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_fp64,
+        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips4_32,
         &feature_cnmips,
         &feature_mips64r2,
     },
@@ -797,12 +747,12 @@ pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
     .subfeatures = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips3_32r2,
-        &feature_mips1,
+        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips1,
         &feature_mips5_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 8a773328b2fe768baaeb4e649ba10ce949654e87..433537824d7f73651eb3ea17ae46d505973950fb 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_hwmult16 = Feature{
     .name = "hwmult16",
     .description = "Enable 16-bit hardware multiplier",
-    .llvm_name = "hwmult16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_hwmult16 = Feature{
 pub const feature_hwmult32 = Feature{
     .name = "hwmult32",
     .description = "Enable 32-bit hardware multiplier",
-    .llvm_name = "hwmult32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_hwmult32 = Feature{
 pub const feature_hwmultf5 = Feature{
     .name = "hwmultf5",
     .description = "Enable F5 series hardware multiplier",
-    .llvm_name = "hwmultf5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_hwmultf5 = Feature{
 pub const feature_ext = Feature{
     .name = "ext",
     .description = "Enable MSP430-X extensions",
-    .llvm_name = "ext",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index e978f64331b4708b5a60f026db73535565965814..5d5e27658753b9a823eb5ed79319ab05b1f20863 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_ptx32 = Feature{
     .name = "ptx32",
     .description = "Use PTX version 3.2",
-    .llvm_name = "ptx32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_ptx32 = Feature{
 pub const feature_ptx40 = Feature{
     .name = "ptx40",
     .description = "Use PTX version 4.0",
-    .llvm_name = "ptx40",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_ptx40 = Feature{
 pub const feature_ptx41 = Feature{
     .name = "ptx41",
     .description = "Use PTX version 4.1",
-    .llvm_name = "ptx41",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_ptx41 = Feature{
 pub const feature_ptx42 = Feature{
     .name = "ptx42",
     .description = "Use PTX version 4.2",
-    .llvm_name = "ptx42",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_ptx42 = Feature{
 pub const feature_ptx43 = Feature{
     .name = "ptx43",
     .description = "Use PTX version 4.3",
-    .llvm_name = "ptx43",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_ptx43 = Feature{
 pub const feature_ptx50 = Feature{
     .name = "ptx50",
     .description = "Use PTX version 5.0",
-    .llvm_name = "ptx50",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_ptx50 = Feature{
 pub const feature_ptx60 = Feature{
     .name = "ptx60",
     .description = "Use PTX version 6.0",
-    .llvm_name = "ptx60",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_ptx60 = Feature{
 pub const feature_ptx61 = Feature{
     .name = "ptx61",
     .description = "Use PTX version 6.1",
-    .llvm_name = "ptx61",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -68,7 +60,6 @@ pub const feature_ptx61 = Feature{
 pub const feature_ptx63 = Feature{
     .name = "ptx63",
     .description = "Use PTX version 6.3",
-    .llvm_name = "ptx63",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -76,7 +67,6 @@ pub const feature_ptx63 = Feature{
 pub const feature_ptx64 = Feature{
     .name = "ptx64",
     .description = "Use PTX version 6.4",
-    .llvm_name = "ptx64",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -84,7 +74,6 @@ pub const feature_ptx64 = Feature{
 pub const feature_sm_20 = Feature{
     .name = "sm_20",
     .description = "Target SM 2.0",
-    .llvm_name = "sm_20",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -92,7 +81,6 @@ pub const feature_sm_20 = Feature{
 pub const feature_sm_21 = Feature{
     .name = "sm_21",
     .description = "Target SM 2.1",
-    .llvm_name = "sm_21",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -100,7 +88,6 @@ pub const feature_sm_21 = Feature{
 pub const feature_sm_30 = Feature{
     .name = "sm_30",
     .description = "Target SM 3.0",
-    .llvm_name = "sm_30",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -108,7 +95,6 @@ pub const feature_sm_30 = Feature{
 pub const feature_sm_32 = Feature{
     .name = "sm_32",
     .description = "Target SM 3.2",
-    .llvm_name = "sm_32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -116,7 +102,6 @@ pub const feature_sm_32 = Feature{
 pub const feature_sm_35 = Feature{
     .name = "sm_35",
     .description = "Target SM 3.5",
-    .llvm_name = "sm_35",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -124,7 +109,6 @@ pub const feature_sm_35 = Feature{
 pub const feature_sm_37 = Feature{
     .name = "sm_37",
     .description = "Target SM 3.7",
-    .llvm_name = "sm_37",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -132,7 +116,6 @@ pub const feature_sm_37 = Feature{
 pub const feature_sm_50 = Feature{
     .name = "sm_50",
     .description = "Target SM 5.0",
-    .llvm_name = "sm_50",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -140,7 +123,6 @@ pub const feature_sm_50 = Feature{
 pub const feature_sm_52 = Feature{
     .name = "sm_52",
     .description = "Target SM 5.2",
-    .llvm_name = "sm_52",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -148,7 +130,6 @@ pub const feature_sm_52 = Feature{
 pub const feature_sm_53 = Feature{
     .name = "sm_53",
     .description = "Target SM 5.3",
-    .llvm_name = "sm_53",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -156,7 +137,6 @@ pub const feature_sm_53 = Feature{
 pub const feature_sm_60 = Feature{
     .name = "sm_60",
     .description = "Target SM 6.0",
-    .llvm_name = "sm_60",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -164,7 +144,6 @@ pub const feature_sm_60 = Feature{
 pub const feature_sm_61 = Feature{
     .name = "sm_61",
     .description = "Target SM 6.1",
-    .llvm_name = "sm_61",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -172,7 +151,6 @@ pub const feature_sm_61 = Feature{
 pub const feature_sm_62 = Feature{
     .name = "sm_62",
     .description = "Target SM 6.2",
-    .llvm_name = "sm_62",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -180,7 +158,6 @@ pub const feature_sm_62 = Feature{
 pub const feature_sm_70 = Feature{
     .name = "sm_70",
     .description = "Target SM 7.0",
-    .llvm_name = "sm_70",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -188,7 +165,6 @@ pub const feature_sm_70 = Feature{
 pub const feature_sm_72 = Feature{
     .name = "sm_72",
     .description = "Target SM 7.2",
-    .llvm_name = "sm_72",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -196,7 +172,6 @@ pub const feature_sm_72 = Feature{
 pub const feature_sm_75 = Feature{
     .name = "sm_75",
     .description = "Target SM 7.5",
-    .llvm_name = "sm_75",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 49f92cdc1a445651b1adf2ef92c7d39a99a9ff9b..212a604a4a05431fbbc1363c468ba774be0ecb5b 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Enable 64-bit instructions",
-    .llvm_name = "64bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_bit64 = Feature{
 pub const feature_bitregs64 = Feature{
     .name = "64bitregs",
     .description = "Enable 64-bit registers usage for ppc32 [beta]",
-    .llvm_name = "64bitregs",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_bitregs64 = Feature{
 pub const feature_altivec = Feature{
     .name = "altivec",
     .description = "Enable Altivec instructions",
-    .llvm_name = "altivec",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -29,7 +26,6 @@ pub const feature_altivec = Feature{
 pub const feature_bpermd = Feature{
     .name = "bpermd",
     .description = "Enable the bpermd instruction",
-    .llvm_name = "bpermd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -37,7 +33,6 @@ pub const feature_bpermd = Feature{
 pub const feature_booke = Feature{
     .name = "booke",
     .description = "Enable Book E instructions",
-    .llvm_name = "booke",
     .subfeatures = &[_]*const Feature {
         &feature_icbt,
     },
@@ -46,7 +41,6 @@ pub const feature_booke = Feature{
 pub const feature_cmpb = Feature{
     .name = "cmpb",
     .description = "Enable the cmpb instruction",
-    .llvm_name = "cmpb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -54,7 +48,6 @@ pub const feature_cmpb = Feature{
 pub const feature_crbits = Feature{
     .name = "crbits",
     .description = "Use condition-register bits individually",
-    .llvm_name = "crbits",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -62,7 +55,6 @@ pub const feature_crbits = Feature{
 pub const feature_directMove = Feature{
     .name = "direct-move",
     .description = "Enable Power8 direct move instructions",
-    .llvm_name = "direct-move",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -71,7 +63,6 @@ pub const feature_directMove = Feature{
 pub const feature_e500 = Feature{
     .name = "e500",
     .description = "Enable E500/E500mc instructions",
-    .llvm_name = "e500",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -79,7 +70,6 @@ pub const feature_e500 = Feature{
 pub const feature_extdiv = Feature{
     .name = "extdiv",
     .description = "Enable extended divide instructions",
-    .llvm_name = "extdiv",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -87,7 +77,6 @@ pub const feature_extdiv = Feature{
 pub const feature_fcpsgn = Feature{
     .name = "fcpsgn",
     .description = "Enable the fcpsgn instruction",
-    .llvm_name = "fcpsgn",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -96,7 +85,6 @@ pub const feature_fcpsgn = Feature{
 pub const feature_fpcvt = Feature{
     .name = "fpcvt",
     .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
-    .llvm_name = "fpcvt",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -105,7 +93,6 @@ pub const feature_fpcvt = Feature{
 pub const feature_fprnd = Feature{
     .name = "fprnd",
     .description = "Enable the fri[mnpz] instructions",
-    .llvm_name = "fprnd",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -114,7 +101,6 @@ pub const feature_fprnd = Feature{
 pub const feature_fpu = Feature{
     .name = "fpu",
     .description = "Enable classic FPU instructions",
-    .llvm_name = "fpu",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -123,7 +109,6 @@ pub const feature_fpu = Feature{
 pub const feature_fre = Feature{
     .name = "fre",
     .description = "Enable the fre instruction",
-    .llvm_name = "fre",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -132,7 +117,6 @@ pub const feature_fre = Feature{
 pub const feature_fres = Feature{
     .name = "fres",
     .description = "Enable the fres instruction",
-    .llvm_name = "fres",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -141,7 +125,6 @@ pub const feature_fres = Feature{
 pub const feature_frsqrte = Feature{
     .name = "frsqrte",
     .description = "Enable the frsqrte instruction",
-    .llvm_name = "frsqrte",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -150,7 +133,6 @@ pub const feature_frsqrte = Feature{
 pub const feature_frsqrtes = Feature{
     .name = "frsqrtes",
     .description = "Enable the frsqrtes instruction",
-    .llvm_name = "frsqrtes",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -159,7 +141,6 @@ pub const feature_frsqrtes = Feature{
 pub const feature_fsqrt = Feature{
     .name = "fsqrt",
     .description = "Enable the fsqrt instruction",
-    .llvm_name = "fsqrt",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -168,7 +149,6 @@ pub const feature_fsqrt = Feature{
 pub const feature_float128 = Feature{
     .name = "float128",
     .description = "Enable the __float128 data type for IEEE-754R Binary128.",
-    .llvm_name = "float128",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -177,7 +157,6 @@ pub const feature_float128 = Feature{
 pub const feature_htm = Feature{
     .name = "htm",
     .description = "Enable Hardware Transactional Memory instructions",
-    .llvm_name = "htm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -185,7 +164,6 @@ pub const feature_htm = Feature{
 pub const feature_hardFloat = Feature{
     .name = "hard-float",
     .description = "Enable floating-point instructions",
-    .llvm_name = "hard-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -193,7 +171,6 @@ pub const feature_hardFloat = Feature{
 pub const feature_icbt = Feature{
     .name = "icbt",
     .description = "Enable icbt instruction",
-    .llvm_name = "icbt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -201,7 +178,6 @@ pub const feature_icbt = Feature{
 pub const feature_isaV30Instructions = Feature{
     .name = "isa-v30-instructions",
     .description = "Enable instructions added in ISA 3.0.",
-    .llvm_name = "isa-v30-instructions",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -209,7 +185,6 @@ pub const feature_isaV30Instructions = Feature{
 pub const feature_isel = Feature{
     .name = "isel",
     .description = "Enable the isel instruction",
-    .llvm_name = "isel",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -217,7 +192,6 @@ pub const feature_isel = Feature{
 pub const feature_invariantFunctionDescriptors = Feature{
     .name = "invariant-function-descriptors",
     .description = "Assume function descriptors are invariant",
-    .llvm_name = "invariant-function-descriptors",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -225,7 +199,6 @@ pub const feature_invariantFunctionDescriptors = Feature{
 pub const feature_ldbrx = Feature{
     .name = "ldbrx",
     .description = "Enable the ldbrx instruction",
-    .llvm_name = "ldbrx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -233,7 +206,6 @@ pub const feature_ldbrx = Feature{
 pub const feature_lfiwax = Feature{
     .name = "lfiwax",
     .description = "Enable the lfiwax instruction",
-    .llvm_name = "lfiwax",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -242,7 +214,6 @@ pub const feature_lfiwax = Feature{
 pub const feature_longcall = Feature{
     .name = "longcall",
     .description = "Always use indirect calls",
-    .llvm_name = "longcall",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -250,7 +221,6 @@ pub const feature_longcall = Feature{
 pub const feature_mfocrf = Feature{
     .name = "mfocrf",
     .description = "Enable the MFOCRF instruction",
-    .llvm_name = "mfocrf",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -258,7 +228,6 @@ pub const feature_mfocrf = Feature{
 pub const feature_msync = Feature{
     .name = "msync",
     .description = "Has only the msync instruction instead of sync",
-    .llvm_name = "msync",
     .subfeatures = &[_]*const Feature {
         &feature_icbt,
     },
@@ -267,7 +236,6 @@ pub const feature_msync = Feature{
 pub const feature_power8Altivec = Feature{
     .name = "power8-altivec",
     .description = "Enable POWER8 Altivec instructions",
-    .llvm_name = "power8-altivec",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -276,7 +244,6 @@ pub const feature_power8Altivec = Feature{
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable POWER8 Crypto instructions",
-    .llvm_name = "crypto",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -285,7 +252,6 @@ pub const feature_crypto = Feature{
 pub const feature_power8Vector = Feature{
     .name = "power8-vector",
     .description = "Enable POWER8 vector instructions",
-    .llvm_name = "power8-vector",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -294,27 +260,24 @@ pub const feature_power8Vector = Feature{
 pub const feature_power9Altivec = Feature{
     .name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
-    .llvm_name = "power9-altivec",
     .subfeatures = &[_]*const Feature {
-        &feature_isaV30Instructions,
         &feature_hardFloat,
+        &feature_isaV30Instructions,
     },
 };
 
 pub const feature_power9Vector = Feature{
     .name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
-    .llvm_name = "power9-vector",
     .subfeatures = &[_]*const Feature {
-        &feature_isaV30Instructions,
         &feature_hardFloat,
+        &feature_isaV30Instructions,
     },
 };
 
 pub const feature_popcntd = Feature{
     .name = "popcntd",
     .description = "Enable the popcnt[dw] instructions",
-    .llvm_name = "popcntd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -322,7 +285,6 @@ pub const feature_popcntd = Feature{
 pub const feature_ppc4xx = Feature{
     .name = "ppc4xx",
     .description = "Enable PPC 4xx instructions",
-    .llvm_name = "ppc4xx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -330,7 +292,6 @@ pub const feature_ppc4xx = Feature{
 pub const feature_ppc6xx = Feature{
     .name = "ppc6xx",
     .description = "Enable PPC 6xx instructions",
-    .llvm_name = "ppc6xx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -338,7 +299,6 @@ pub const feature_ppc6xx = Feature{
 pub const feature_ppcPostraSched = Feature{
     .name = "ppc-postra-sched",
     .description = "Use PowerPC post-RA scheduling strategy",
-    .llvm_name = "ppc-postra-sched",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -346,7 +306,6 @@ pub const feature_ppcPostraSched = Feature{
 pub const feature_ppcPreraSched = Feature{
     .name = "ppc-prera-sched",
     .description = "Use PowerPC pre-RA scheduling strategy",
-    .llvm_name = "ppc-prera-sched",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -354,7 +313,6 @@ pub const feature_ppcPreraSched = Feature{
 pub const feature_partwordAtomics = Feature{
     .name = "partword-atomics",
     .description = "Enable l[bh]arx and st[bh]cx.",
-    .llvm_name = "partword-atomics",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -362,7 +320,6 @@ pub const feature_partwordAtomics = Feature{
 pub const feature_qpx = Feature{
     .name = "qpx",
     .description = "Enable QPX instructions",
-    .llvm_name = "qpx",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -371,7 +328,6 @@ pub const feature_qpx = Feature{
 pub const feature_recipprec = Feature{
     .name = "recipprec",
     .description = "Assume higher precision reciprocal estimates",
-    .llvm_name = "recipprec",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -379,7 +335,6 @@ pub const feature_recipprec = Feature{
 pub const feature_spe = Feature{
     .name = "spe",
     .description = "Enable SPE instructions",
-    .llvm_name = "spe",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -388,7 +343,6 @@ pub const feature_spe = Feature{
 pub const feature_stfiwx = Feature{
     .name = "stfiwx",
     .description = "Enable the stfiwx instruction",
-    .llvm_name = "stfiwx",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -397,7 +351,6 @@ pub const feature_stfiwx = Feature{
 pub const feature_securePlt = Feature{
     .name = "secure-plt",
     .description = "Enable secure plt mode",
-    .llvm_name = "secure-plt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -405,7 +358,6 @@ pub const feature_securePlt = Feature{
 pub const feature_slowPopcntd = Feature{
     .name = "slow-popcntd",
     .description = "Has slow popcnt[dw] instructions",
-    .llvm_name = "slow-popcntd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -413,7 +365,6 @@ pub const feature_slowPopcntd = Feature{
 pub const feature_twoConstNr = Feature{
     .name = "two-const-nr",
     .description = "Requires two constant Newton-Raphson computation",
-    .llvm_name = "two-const-nr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -421,7 +372,6 @@ pub const feature_twoConstNr = Feature{
 pub const feature_vsx = Feature{
     .name = "vsx",
     .description = "Enable VSX instructions",
-    .llvm_name = "vsx",
     .subfeatures = &[_]*const Feature {
         &feature_hardFloat,
     },
@@ -430,7 +380,6 @@ pub const feature_vsx = Feature{
 pub const feature_vectorsUseTwoUnits = Feature{
     .name = "vectors-use-two-units",
     .description = "Vectors use two units",
-    .llvm_name = "vectors-use-two-units",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index 6ed1012f215c8ac557ca2660f1460e1c160aa752..46f66aff12baaa62e41e5569bc7a9ebcd9f4555a 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Implements RV64",
-    .llvm_name = "64bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_bit64 = Feature{
 pub const feature_e = Feature{
     .name = "e",
     .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-    .llvm_name = "e",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_e = Feature{
 pub const feature_rvcHints = Feature{
     .name = "rvc-hints",
     .description = "Enable RVC Hint Instructions.",
-    .llvm_name = "rvc-hints",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_rvcHints = Feature{
 pub const feature_relax = Feature{
     .name = "relax",
     .description = "Enable Linker relaxation.",
-    .llvm_name = "relax",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_relax = Feature{
 pub const feature_a = Feature{
     .name = "a",
     .description = "'A' (Atomic Instructions)",
-    .llvm_name = "a",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_a = Feature{
 pub const feature_c = Feature{
     .name = "c",
     .description = "'C' (Compressed Instructions)",
-    .llvm_name = "c",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_c = Feature{
 pub const feature_d = Feature{
     .name = "d",
     .description = "'D' (Double-Precision Floating-Point)",
-    .llvm_name = "d",
     .subfeatures = &[_]*const Feature {
         &feature_f,
     },
@@ -61,7 +54,6 @@ pub const feature_d = Feature{
 pub const feature_f = Feature{
     .name = "f",
     .description = "'F' (Single-Precision Floating-Point)",
-    .llvm_name = "f",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -69,7 +61,6 @@ pub const feature_f = Feature{
 pub const feature_m = Feature{
     .name = "m",
     .description = "'M' (Integer Multiplication and Division)",
-    .llvm_name = "m",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 69c6208b2a086dd45538584524b025e863df7700..75c824c8bcf8446e8183dbc0dc531955fffe2190 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_detectroundchange = Feature{
     .name = "detectroundchange",
     .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
-    .llvm_name = "detectroundchange",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_detectroundchange = Feature{
 pub const feature_hardQuadFloat = Feature{
     .name = "hard-quad-float",
     .description = "Enable quad-word floating point instructions",
-    .llvm_name = "hard-quad-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_hardQuadFloat = Feature{
 pub const feature_leon = Feature{
     .name = "leon",
     .description = "Enable LEON extensions",
-    .llvm_name = "leon",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_leon = Feature{
 pub const feature_noFmuls = Feature{
     .name = "no-fmuls",
     .description = "Disable the fmuls instruction.",
-    .llvm_name = "no-fmuls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_noFmuls = Feature{
 pub const feature_noFsmuld = Feature{
     .name = "no-fsmuld",
     .description = "Disable the fsmuld instruction.",
-    .llvm_name = "no-fsmuld",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_noFsmuld = Feature{
 pub const feature_leonpwrpsr = Feature{
     .name = "leonpwrpsr",
     .description = "Enable the PWRPSR instruction",
-    .llvm_name = "leonpwrpsr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_leonpwrpsr = Feature{
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Use software emulation for floating point",
-    .llvm_name = "soft-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_softFloat = Feature{
 pub const feature_softMulDiv = Feature{
     .name = "soft-mul-div",
     .description = "Use software emulation for integer multiply and divide",
-    .llvm_name = "soft-mul-div",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -68,7 +60,6 @@ pub const feature_softMulDiv = Feature{
 pub const feature_deprecatedV8 = Feature{
     .name = "deprecated-v8",
     .description = "Enable deprecated V8 instructions in V9 mode",
-    .llvm_name = "deprecated-v8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -76,7 +67,6 @@ pub const feature_deprecatedV8 = Feature{
 pub const feature_v9 = Feature{
     .name = "v9",
     .description = "Enable SPARC-V9 instructions",
-    .llvm_name = "v9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -84,7 +74,6 @@ pub const feature_v9 = Feature{
 pub const feature_vis = Feature{
     .name = "vis",
     .description = "Enable UltraSPARC Visual Instruction Set extensions",
-    .llvm_name = "vis",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -92,7 +81,6 @@ pub const feature_vis = Feature{
 pub const feature_vis2 = Feature{
     .name = "vis2",
     .description = "Enable Visual Instruction Set extensions II",
-    .llvm_name = "vis2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -100,7 +88,6 @@ pub const feature_vis2 = Feature{
 pub const feature_vis3 = Feature{
     .name = "vis3",
     .description = "Enable Visual Instruction Set extensions III",
-    .llvm_name = "vis3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -108,7 +95,6 @@ pub const feature_vis3 = Feature{
 pub const feature_fixallfdivsqrt = Feature{
     .name = "fixallfdivsqrt",
     .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
-    .llvm_name = "fixallfdivsqrt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -116,7 +102,6 @@ pub const feature_fixallfdivsqrt = Feature{
 pub const feature_insertnopload = Feature{
     .name = "insertnopload",
     .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
-    .llvm_name = "insertnopload",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -124,7 +109,6 @@ pub const feature_insertnopload = Feature{
 pub const feature_hasleoncasa = Feature{
     .name = "hasleoncasa",
     .description = "Enable CASA instruction for LEON3 and LEON4 processors",
-    .llvm_name = "hasleoncasa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -132,7 +116,6 @@ pub const feature_hasleoncasa = Feature{
 pub const feature_leoncyclecounter = Feature{
     .name = "leoncyclecounter",
     .description = "Use the Leon cycle counter register",
-    .llvm_name = "leoncyclecounter",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -140,7 +123,6 @@ pub const feature_leoncyclecounter = Feature{
 pub const feature_hasumacsmac = Feature{
     .name = "hasumacsmac",
     .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
-    .llvm_name = "hasumacsmac",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -148,7 +130,6 @@ pub const feature_hasumacsmac = Feature{
 pub const feature_popc = Feature{
     .name = "popc",
     .description = "Use the popc (population count) instruction",
-    .llvm_name = "popc",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 03fb49ca5530e30fbf668612687aa0dbce3399c0..e7fa7c7333025e8fa0cbdeedef35c9dbb6fcd4d0 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_dfpPackedConversion = Feature{
     .name = "dfp-packed-conversion",
     .description = "Assume that the DFP packed-conversion facility is installed",
-    .llvm_name = "dfp-packed-conversion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_dfpPackedConversion = Feature{
 pub const feature_dfpZonedConversion = Feature{
     .name = "dfp-zoned-conversion",
     .description = "Assume that the DFP zoned-conversion facility is installed",
-    .llvm_name = "dfp-zoned-conversion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_dfpZonedConversion = Feature{
 pub const feature_deflateConversion = Feature{
     .name = "deflate-conversion",
     .description = "Assume that the deflate-conversion facility is installed",
-    .llvm_name = "deflate-conversion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_deflateConversion = Feature{
 pub const feature_distinctOps = Feature{
     .name = "distinct-ops",
     .description = "Assume that the distinct-operands facility is installed",
-    .llvm_name = "distinct-ops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_distinctOps = Feature{
 pub const feature_enhancedDat2 = Feature{
     .name = "enhanced-dat-2",
     .description = "Assume that the enhanced-DAT facility 2 is installed",
-    .llvm_name = "enhanced-dat-2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_enhancedDat2 = Feature{
 pub const feature_enhancedSort = Feature{
     .name = "enhanced-sort",
     .description = "Assume that the enhanced-sort facility is installed",
-    .llvm_name = "enhanced-sort",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_enhancedSort = Feature{
 pub const feature_executionHint = Feature{
     .name = "execution-hint",
     .description = "Assume that the execution-hint facility is installed",
-    .llvm_name = "execution-hint",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_executionHint = Feature{
 pub const feature_fpExtension = Feature{
     .name = "fp-extension",
     .description = "Assume that the floating-point extension facility is installed",
-    .llvm_name = "fp-extension",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -68,7 +60,6 @@ pub const feature_fpExtension = Feature{
 pub const feature_fastSerialization = Feature{
     .name = "fast-serialization",
     .description = "Assume that the fast-serialization facility is installed",
-    .llvm_name = "fast-serialization",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -76,7 +67,6 @@ pub const feature_fastSerialization = Feature{
 pub const feature_guardedStorage = Feature{
     .name = "guarded-storage",
     .description = "Assume that the guarded-storage facility is installed",
-    .llvm_name = "guarded-storage",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -84,7 +74,6 @@ pub const feature_guardedStorage = Feature{
 pub const feature_highWord = Feature{
     .name = "high-word",
     .description = "Assume that the high-word facility is installed",
-    .llvm_name = "high-word",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -92,7 +81,6 @@ pub const feature_highWord = Feature{
 pub const feature_insertReferenceBitsMultiple = Feature{
     .name = "insert-reference-bits-multiple",
     .description = "Assume that the insert-reference-bits-multiple facility is installed",
-    .llvm_name = "insert-reference-bits-multiple",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -100,7 +88,6 @@ pub const feature_insertReferenceBitsMultiple = Feature{
 pub const feature_interlockedAccess1 = Feature{
     .name = "interlocked-access1",
     .description = "Assume that interlocked-access facility 1 is installed",
-    .llvm_name = "interlocked-access1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -108,7 +95,6 @@ pub const feature_interlockedAccess1 = Feature{
 pub const feature_loadAndTrap = Feature{
     .name = "load-and-trap",
     .description = "Assume that the load-and-trap facility is installed",
-    .llvm_name = "load-and-trap",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -116,7 +102,6 @@ pub const feature_loadAndTrap = Feature{
 pub const feature_loadAndZeroRightmostByte = Feature{
     .name = "load-and-zero-rightmost-byte",
     .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-    .llvm_name = "load-and-zero-rightmost-byte",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -124,7 +109,6 @@ pub const feature_loadAndZeroRightmostByte = Feature{
 pub const feature_loadStoreOnCond = Feature{
     .name = "load-store-on-cond",
     .description = "Assume that the load/store-on-condition facility is installed",
-    .llvm_name = "load-store-on-cond",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -132,7 +116,6 @@ pub const feature_loadStoreOnCond = Feature{
 pub const feature_loadStoreOnCond2 = Feature{
     .name = "load-store-on-cond-2",
     .description = "Assume that the load/store-on-condition facility 2 is installed",
-    .llvm_name = "load-store-on-cond-2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -140,7 +123,6 @@ pub const feature_loadStoreOnCond2 = Feature{
 pub const feature_messageSecurityAssistExtension3 = Feature{
     .name = "message-security-assist-extension3",
     .description = "Assume that the message-security-assist extension facility 3 is installed",
-    .llvm_name = "message-security-assist-extension3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -148,7 +130,6 @@ pub const feature_messageSecurityAssistExtension3 = Feature{
 pub const feature_messageSecurityAssistExtension4 = Feature{
     .name = "message-security-assist-extension4",
     .description = "Assume that the message-security-assist extension facility 4 is installed",
-    .llvm_name = "message-security-assist-extension4",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -156,7 +137,6 @@ pub const feature_messageSecurityAssistExtension4 = Feature{
 pub const feature_messageSecurityAssistExtension5 = Feature{
     .name = "message-security-assist-extension5",
     .description = "Assume that the message-security-assist extension facility 5 is installed",
-    .llvm_name = "message-security-assist-extension5",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -164,7 +144,6 @@ pub const feature_messageSecurityAssistExtension5 = Feature{
 pub const feature_messageSecurityAssistExtension7 = Feature{
     .name = "message-security-assist-extension7",
     .description = "Assume that the message-security-assist extension facility 7 is installed",
-    .llvm_name = "message-security-assist-extension7",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -172,7 +151,6 @@ pub const feature_messageSecurityAssistExtension7 = Feature{
 pub const feature_messageSecurityAssistExtension8 = Feature{
     .name = "message-security-assist-extension8",
     .description = "Assume that the message-security-assist extension facility 8 is installed",
-    .llvm_name = "message-security-assist-extension8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -180,7 +158,6 @@ pub const feature_messageSecurityAssistExtension8 = Feature{
 pub const feature_messageSecurityAssistExtension9 = Feature{
     .name = "message-security-assist-extension9",
     .description = "Assume that the message-security-assist extension facility 9 is installed",
-    .llvm_name = "message-security-assist-extension9",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -188,7 +165,6 @@ pub const feature_messageSecurityAssistExtension9 = Feature{
 pub const feature_miscellaneousExtensions = Feature{
     .name = "miscellaneous-extensions",
     .description = "Assume that the miscellaneous-extensions facility is installed",
-    .llvm_name = "miscellaneous-extensions",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -196,7 +172,6 @@ pub const feature_miscellaneousExtensions = Feature{
 pub const feature_miscellaneousExtensions2 = Feature{
     .name = "miscellaneous-extensions-2",
     .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-    .llvm_name = "miscellaneous-extensions-2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -204,7 +179,6 @@ pub const feature_miscellaneousExtensions2 = Feature{
 pub const feature_miscellaneousExtensions3 = Feature{
     .name = "miscellaneous-extensions-3",
     .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-    .llvm_name = "miscellaneous-extensions-3",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -212,7 +186,6 @@ pub const feature_miscellaneousExtensions3 = Feature{
 pub const feature_populationCount = Feature{
     .name = "population-count",
     .description = "Assume that the population-count facility is installed",
-    .llvm_name = "population-count",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -220,7 +193,6 @@ pub const feature_populationCount = Feature{
 pub const feature_processorAssist = Feature{
     .name = "processor-assist",
     .description = "Assume that the processor-assist facility is installed",
-    .llvm_name = "processor-assist",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -228,7 +200,6 @@ pub const feature_processorAssist = Feature{
 pub const feature_resetReferenceBitsMultiple = Feature{
     .name = "reset-reference-bits-multiple",
     .description = "Assume that the reset-reference-bits-multiple facility is installed",
-    .llvm_name = "reset-reference-bits-multiple",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -236,7 +207,6 @@ pub const feature_resetReferenceBitsMultiple = Feature{
 pub const feature_transactionalExecution = Feature{
     .name = "transactional-execution",
     .description = "Assume that the transactional-execution facility is installed",
-    .llvm_name = "transactional-execution",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -244,7 +214,6 @@ pub const feature_transactionalExecution = Feature{
 pub const feature_vector = Feature{
     .name = "vector",
     .description = "Assume that the vectory facility is installed",
-    .llvm_name = "vector",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -252,7 +221,6 @@ pub const feature_vector = Feature{
 pub const feature_vectorEnhancements1 = Feature{
     .name = "vector-enhancements-1",
     .description = "Assume that the vector enhancements facility 1 is installed",
-    .llvm_name = "vector-enhancements-1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -260,7 +228,6 @@ pub const feature_vectorEnhancements1 = Feature{
 pub const feature_vectorEnhancements2 = Feature{
     .name = "vector-enhancements-2",
     .description = "Assume that the vector enhancements facility 2 is installed",
-    .llvm_name = "vector-enhancements-2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -268,7 +235,6 @@ pub const feature_vectorEnhancements2 = Feature{
 pub const feature_vectorPackedDecimal = Feature{
     .name = "vector-packed-decimal",
     .description = "Assume that the vector packed decimal facility is installed",
-    .llvm_name = "vector-packed-decimal",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -276,7 +242,6 @@ pub const feature_vectorPackedDecimal = Feature{
 pub const feature_vectorPackedDecimalEnhancement = Feature{
     .name = "vector-packed-decimal-enhancement",
     .description = "Assume that the vector packed decimal enhancement facility is installed",
-    .llvm_name = "vector-packed-decimal-enhancement",
     .subfeatures = &[_]*const Feature {
     },
 };
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index ba41b622a469aa9f906a4b462e87f3499cbfef30..6b302a9ff661275a5df20b5fa6139b13275cb514 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_atomics = Feature{
     .name = "atomics",
     .description = "Enable Atomics",
-    .llvm_name = "atomics",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -12,7 +11,6 @@ pub const feature_atomics = Feature{
 pub const feature_bulkMemory = Feature{
     .name = "bulk-memory",
     .description = "Enable bulk memory operations",
-    .llvm_name = "bulk-memory",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -20,7 +18,6 @@ pub const feature_bulkMemory = Feature{
 pub const feature_exceptionHandling = Feature{
     .name = "exception-handling",
     .description = "Enable Wasm exception handling",
-    .llvm_name = "exception-handling",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -28,7 +25,6 @@ pub const feature_exceptionHandling = Feature{
 pub const feature_multivalue = Feature{
     .name = "multivalue",
     .description = "Enable multivalue blocks, instructions, and functions",
-    .llvm_name = "multivalue",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -36,7 +32,6 @@ pub const feature_multivalue = Feature{
 pub const feature_mutableGlobals = Feature{
     .name = "mutable-globals",
     .description = "Enable mutable globals",
-    .llvm_name = "mutable-globals",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -44,7 +39,6 @@ pub const feature_mutableGlobals = Feature{
 pub const feature_nontrappingFptoint = Feature{
     .name = "nontrapping-fptoint",
     .description = "Enable non-trapping float-to-int conversion operators",
-    .llvm_name = "nontrapping-fptoint",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -52,7 +46,6 @@ pub const feature_nontrappingFptoint = Feature{
 pub const feature_simd128 = Feature{
     .name = "simd128",
     .description = "Enable 128-bit SIMD",
-    .llvm_name = "simd128",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -60,7 +53,6 @@ pub const feature_simd128 = Feature{
 pub const feature_signExt = Feature{
     .name = "sign-ext",
     .description = "Enable sign extension operators",
-    .llvm_name = "sign-ext",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -68,7 +60,6 @@ pub const feature_signExt = Feature{
 pub const feature_tailCall = Feature{
     .name = "tail-call",
     .description = "Enable tail call instructions",
-    .llvm_name = "tail-call",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -76,7 +67,6 @@ pub const feature_tailCall = Feature{
 pub const feature_unimplementedSimd128 = Feature{
     .name = "unimplemented-simd128",
     .description = "Enable 128-bit SIMD not yet implemented in engines",
-    .llvm_name = "unimplemented-simd128",
     .subfeatures = &[_]*const Feature {
         &feature_simd128,
     },
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index c6497112bb884777e1e4f19e32ae152091eee090..de49ce937cc43000c6567c0e599eb9b907409d18 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -4,7 +4,6 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_dnow3 = Feature{
     .name = "3dnow",
     .description = "Enable 3DNow! instructions",
-    .llvm_name = "3dnow",
     .subfeatures = &[_]*const Feature {
         &feature_mmx,
     },
@@ -13,7 +12,6 @@ pub const feature_dnow3 = Feature{
 pub const feature_dnowa3 = Feature{
     .name = "3dnowa",
     .description = "Enable 3DNow! Athlon instructions",
-    .llvm_name = "3dnowa",
     .subfeatures = &[_]*const Feature {
         &feature_mmx,
     },
@@ -22,7 +20,6 @@ pub const feature_dnowa3 = Feature{
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Support 64-bit instructions",
-    .llvm_name = "64bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -30,7 +27,6 @@ pub const feature_bit64 = Feature{
 pub const feature_adx = Feature{
     .name = "adx",
     .description = "Support ADX instructions",
-    .llvm_name = "adx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -38,7 +34,6 @@ pub const feature_adx = Feature{
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES instructions",
-    .llvm_name = "aes",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -47,7 +42,6 @@ pub const feature_aes = Feature{
 pub const feature_avx = Feature{
     .name = "avx",
     .description = "Enable AVX instructions",
-    .llvm_name = "avx",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -56,7 +50,6 @@ pub const feature_avx = Feature{
 pub const feature_avx2 = Feature{
     .name = "avx2",
     .description = "Enable AVX2 instructions",
-    .llvm_name = "avx2",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -65,7 +58,6 @@ pub const feature_avx2 = Feature{
 pub const feature_avx512f = Feature{
     .name = "avx512f",
     .description = "Enable AVX-512 instructions",
-    .llvm_name = "avx512f",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -74,7 +66,6 @@ pub const feature_avx512f = Feature{
 pub const feature_avx512bf16 = Feature{
     .name = "avx512bf16",
     .description = "Support bfloat16 floating point",
-    .llvm_name = "avx512bf16",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -83,7 +74,6 @@ pub const feature_avx512bf16 = Feature{
 pub const feature_avx512bitalg = Feature{
     .name = "avx512bitalg",
     .description = "Enable AVX-512 Bit Algorithms",
-    .llvm_name = "avx512bitalg",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -92,7 +82,6 @@ pub const feature_avx512bitalg = Feature{
 pub const feature_bmi = Feature{
     .name = "bmi",
     .description = "Support BMI instructions",
-    .llvm_name = "bmi",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -100,7 +89,6 @@ pub const feature_bmi = Feature{
 pub const feature_bmi2 = Feature{
     .name = "bmi2",
     .description = "Support BMI2 instructions",
-    .llvm_name = "bmi2",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -108,7 +96,6 @@ pub const feature_bmi2 = Feature{
 pub const feature_avx512bw = Feature{
     .name = "avx512bw",
     .description = "Enable AVX-512 Byte and Word Instructions",
-    .llvm_name = "avx512bw",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -117,7 +104,6 @@ pub const feature_avx512bw = Feature{
 pub const feature_branchfusion = Feature{
     .name = "branchfusion",
     .description = "CMP/TEST can be fused with conditional branches",
-    .llvm_name = "branchfusion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -125,7 +111,6 @@ pub const feature_branchfusion = Feature{
 pub const feature_avx512cd = Feature{
     .name = "avx512cd",
     .description = "Enable AVX-512 Conflict Detection Instructions",
-    .llvm_name = "avx512cd",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -134,7 +119,6 @@ pub const feature_avx512cd = Feature{
 pub const feature_cldemote = Feature{
     .name = "cldemote",
     .description = "Enable Cache Demote",
-    .llvm_name = "cldemote",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -142,7 +126,6 @@ pub const feature_cldemote = Feature{
 pub const feature_clflushopt = Feature{
     .name = "clflushopt",
     .description = "Flush A Cache Line Optimized",
-    .llvm_name = "clflushopt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -150,7 +133,6 @@ pub const feature_clflushopt = Feature{
 pub const feature_clwb = Feature{
     .name = "clwb",
     .description = "Cache Line Write Back",
-    .llvm_name = "clwb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -158,7 +140,6 @@ pub const feature_clwb = Feature{
 pub const feature_clzero = Feature{
     .name = "clzero",
     .description = "Enable Cache Line Zero",
-    .llvm_name = "clzero",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -166,7 +147,6 @@ pub const feature_clzero = Feature{
 pub const feature_cmov = Feature{
     .name = "cmov",
     .description = "Enable conditional move instructions",
-    .llvm_name = "cmov",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -174,7 +154,6 @@ pub const feature_cmov = Feature{
 pub const feature_cx8 = Feature{
     .name = "cx8",
     .description = "Support CMPXCHG8B instructions",
-    .llvm_name = "cx8",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -182,7 +161,6 @@ pub const feature_cx8 = Feature{
 pub const feature_cx16 = Feature{
     .name = "cx16",
     .description = "64-bit with cmpxchg16b",
-    .llvm_name = "cx16",
     .subfeatures = &[_]*const Feature {
         &feature_cx8,
     },
@@ -191,7 +169,6 @@ pub const feature_cx16 = Feature{
 pub const feature_avx512dq = Feature{
     .name = "avx512dq",
     .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-    .llvm_name = "avx512dq",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -200,7 +177,6 @@ pub const feature_avx512dq = Feature{
 pub const feature_mpx = Feature{
     .name = "mpx",
     .description = "Deprecated. Support MPX instructions",
-    .llvm_name = "mpx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -208,7 +184,6 @@ pub const feature_mpx = Feature{
 pub const feature_enqcmd = Feature{
     .name = "enqcmd",
     .description = "Has ENQCMD instructions",
-    .llvm_name = "enqcmd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -216,7 +191,6 @@ pub const feature_enqcmd = Feature{
 pub const feature_avx512er = Feature{
     .name = "avx512er",
     .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-    .llvm_name = "avx512er",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -225,7 +199,6 @@ pub const feature_avx512er = Feature{
 pub const feature_ermsb = Feature{
     .name = "ermsb",
     .description = "REP MOVS/STOS are fast",
-    .llvm_name = "ermsb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -233,7 +206,6 @@ pub const feature_ermsb = Feature{
 pub const feature_f16c = Feature{
     .name = "f16c",
     .description = "Support 16-bit floating point conversion instructions",
-    .llvm_name = "f16c",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -242,7 +214,6 @@ pub const feature_f16c = Feature{
 pub const feature_fma = Feature{
     .name = "fma",
     .description = "Enable three-operand fused multiple-add",
-    .llvm_name = "fma",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -251,7 +222,6 @@ pub const feature_fma = Feature{
 pub const feature_fma4 = Feature{
     .name = "fma4",
     .description = "Enable four-operand fused multiple-add",
-    .llvm_name = "fma4",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -260,7 +230,6 @@ pub const feature_fma4 = Feature{
 pub const feature_fsgsbase = Feature{
     .name = "fsgsbase",
     .description = "Support FS/GS Base instructions",
-    .llvm_name = "fsgsbase",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -268,7 +237,6 @@ pub const feature_fsgsbase = Feature{
 pub const feature_fxsr = Feature{
     .name = "fxsr",
     .description = "Support fxsave/fxrestore instructions",
-    .llvm_name = "fxsr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -276,7 +244,6 @@ pub const feature_fxsr = Feature{
 pub const feature_fast11bytenop = Feature{
     .name = "fast-11bytenop",
     .description = "Target can quickly decode up to 11 byte NOPs",
-    .llvm_name = "fast-11bytenop",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -284,7 +251,6 @@ pub const feature_fast11bytenop = Feature{
 pub const feature_fast15bytenop = Feature{
     .name = "fast-15bytenop",
     .description = "Target can quickly decode up to 15 byte NOPs",
-    .llvm_name = "fast-15bytenop",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -292,7 +258,6 @@ pub const feature_fast15bytenop = Feature{
 pub const feature_fastBextr = Feature{
     .name = "fast-bextr",
     .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-    .llvm_name = "fast-bextr",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -300,7 +265,6 @@ pub const feature_fastBextr = Feature{
 pub const feature_fastHops = Feature{
     .name = "fast-hops",
     .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
-    .llvm_name = "fast-hops",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -309,7 +273,6 @@ pub const feature_fastHops = Feature{
 pub const feature_fastLzcnt = Feature{
     .name = "fast-lzcnt",
     .description = "LZCNT instructions are as fast as most simple integer ops",
-    .llvm_name = "fast-lzcnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -317,7 +280,6 @@ pub const feature_fastLzcnt = Feature{
 pub const feature_fastPartialYmmOrZmmWrite = Feature{
     .name = "fast-partial-ymm-or-zmm-write",
     .description = "Partial writes to YMM/ZMM registers are fast",
-    .llvm_name = "fast-partial-ymm-or-zmm-write",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -325,7 +287,6 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{
 pub const feature_fastShldRotate = Feature{
     .name = "fast-shld-rotate",
     .description = "SHLD can be used as a faster rotate",
-    .llvm_name = "fast-shld-rotate",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -333,7 +294,6 @@ pub const feature_fastShldRotate = Feature{
 pub const feature_fastScalarFsqrt = Feature{
     .name = "fast-scalar-fsqrt",
     .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-    .llvm_name = "fast-scalar-fsqrt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -341,7 +301,6 @@ pub const feature_fastScalarFsqrt = Feature{
 pub const feature_fastScalarShiftMasks = Feature{
     .name = "fast-scalar-shift-masks",
     .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-    .llvm_name = "fast-scalar-shift-masks",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -349,7 +308,6 @@ pub const feature_fastScalarShiftMasks = Feature{
 pub const feature_fastVariableShuffle = Feature{
     .name = "fast-variable-shuffle",
     .description = "Shuffles with variable masks are fast",
-    .llvm_name = "fast-variable-shuffle",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -357,7 +315,6 @@ pub const feature_fastVariableShuffle = Feature{
 pub const feature_fastVectorFsqrt = Feature{
     .name = "fast-vector-fsqrt",
     .description = "Vector SQRT is fast (disable Newton-Raphson)",
-    .llvm_name = "fast-vector-fsqrt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -365,7 +322,6 @@ pub const feature_fastVectorFsqrt = Feature{
 pub const feature_fastVectorShiftMasks = Feature{
     .name = "fast-vector-shift-masks",
     .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-    .llvm_name = "fast-vector-shift-masks",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -373,7 +329,6 @@ pub const feature_fastVectorShiftMasks = Feature{
 pub const feature_gfni = Feature{
     .name = "gfni",
     .description = "Enable Galois Field Arithmetic Instructions",
-    .llvm_name = "gfni",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -382,7 +337,6 @@ pub const feature_gfni = Feature{
 pub const feature_fastGather = Feature{
     .name = "fast-gather",
     .description = "Indicates if gather is reasonably fast",
-    .llvm_name = "fast-gather",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -390,7 +344,6 @@ pub const feature_fastGather = Feature{
 pub const feature_avx512ifma = Feature{
     .name = "avx512ifma",
     .description = "Enable AVX-512 Integer Fused Multiple-Add",
-    .llvm_name = "avx512ifma",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -399,7 +352,6 @@ pub const feature_avx512ifma = Feature{
 pub const feature_invpcid = Feature{
     .name = "invpcid",
     .description = "Invalidate Process-Context Identifier",
-    .llvm_name = "invpcid",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -407,7 +359,6 @@ pub const feature_invpcid = Feature{
 pub const feature_sahf = Feature{
     .name = "sahf",
     .description = "Support LAHF and SAHF instructions",
-    .llvm_name = "sahf",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -415,7 +366,6 @@ pub const feature_sahf = Feature{
 pub const feature_leaSp = Feature{
     .name = "lea-sp",
     .description = "Use LEA for adjusting the stack pointer",
-    .llvm_name = "lea-sp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -423,7 +373,6 @@ pub const feature_leaSp = Feature{
 pub const feature_leaUsesAg = Feature{
     .name = "lea-uses-ag",
     .description = "LEA instruction needs inputs at AG stage",
-    .llvm_name = "lea-uses-ag",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -431,7 +380,6 @@ pub const feature_leaUsesAg = Feature{
 pub const feature_lwp = Feature{
     .name = "lwp",
     .description = "Enable LWP instructions",
-    .llvm_name = "lwp",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -439,7 +387,6 @@ pub const feature_lwp = Feature{
 pub const feature_lzcnt = Feature{
     .name = "lzcnt",
     .description = "Support LZCNT instruction",
-    .llvm_name = "lzcnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -447,7 +394,6 @@ pub const feature_lzcnt = Feature{
 pub const feature_falseDepsLzcntTzcnt = Feature{
     .name = "false-deps-lzcnt-tzcnt",
     .description = "LZCNT/TZCNT have a false dependency on dest register",
-    .llvm_name = "false-deps-lzcnt-tzcnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -455,7 +401,6 @@ pub const feature_falseDepsLzcntTzcnt = Feature{
 pub const feature_mmx = Feature{
     .name = "mmx",
     .description = "Enable MMX instructions",
-    .llvm_name = "mmx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -463,7 +408,6 @@ pub const feature_mmx = Feature{
 pub const feature_movbe = Feature{
     .name = "movbe",
     .description = "Support MOVBE instruction",
-    .llvm_name = "movbe",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -471,7 +415,6 @@ pub const feature_movbe = Feature{
 pub const feature_movdir64b = Feature{
     .name = "movdir64b",
     .description = "Support movdir64b instruction",
-    .llvm_name = "movdir64b",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -479,7 +422,6 @@ pub const feature_movdir64b = Feature{
 pub const feature_movdiri = Feature{
     .name = "movdiri",
     .description = "Support movdiri instruction",
-    .llvm_name = "movdiri",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -487,7 +429,6 @@ pub const feature_movdiri = Feature{
 pub const feature_mwaitx = Feature{
     .name = "mwaitx",
     .description = "Enable MONITORX/MWAITX timer functionality",
-    .llvm_name = "mwaitx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -495,7 +436,6 @@ pub const feature_mwaitx = Feature{
 pub const feature_macrofusion = Feature{
     .name = "macrofusion",
     .description = "Various instructions can be fused with conditional branches",
-    .llvm_name = "macrofusion",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -503,7 +443,6 @@ pub const feature_macrofusion = Feature{
 pub const feature_mergeToThreewayBranch = Feature{
     .name = "merge-to-threeway-branch",
     .description = "Merge branches to a three-way conditional branch",
-    .llvm_name = "merge-to-threeway-branch",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -511,7 +450,6 @@ pub const feature_mergeToThreewayBranch = Feature{
 pub const feature_nopl = Feature{
     .name = "nopl",
     .description = "Enable NOPL instruction",
-    .llvm_name = "nopl",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -519,7 +457,6 @@ pub const feature_nopl = Feature{
 pub const feature_pclmul = Feature{
     .name = "pclmul",
     .description = "Enable packed carry-less multiplication instructions",
-    .llvm_name = "pclmul",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -528,7 +465,6 @@ pub const feature_pclmul = Feature{
 pub const feature_pconfig = Feature{
     .name = "pconfig",
     .description = "platform configuration instruction",
-    .llvm_name = "pconfig",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -536,7 +472,6 @@ pub const feature_pconfig = Feature{
 pub const feature_avx512pf = Feature{
     .name = "avx512pf",
     .description = "Enable AVX-512 PreFetch Instructions",
-    .llvm_name = "avx512pf",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -545,7 +480,6 @@ pub const feature_avx512pf = Feature{
 pub const feature_pku = Feature{
     .name = "pku",
     .description = "Enable protection keys",
-    .llvm_name = "pku",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -553,7 +487,6 @@ pub const feature_pku = Feature{
 pub const feature_popcnt = Feature{
     .name = "popcnt",
     .description = "Support POPCNT instruction",
-    .llvm_name = "popcnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -561,7 +494,6 @@ pub const feature_popcnt = Feature{
 pub const feature_falseDepsPopcnt = Feature{
     .name = "false-deps-popcnt",
     .description = "POPCNT has a false dependency on dest register",
-    .llvm_name = "false-deps-popcnt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -569,7 +501,6 @@ pub const feature_falseDepsPopcnt = Feature{
 pub const feature_prefetchwt1 = Feature{
     .name = "prefetchwt1",
     .description = "Prefetch with Intent to Write and T1 Hint",
-    .llvm_name = "prefetchwt1",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -577,7 +508,6 @@ pub const feature_prefetchwt1 = Feature{
 pub const feature_prfchw = Feature{
     .name = "prfchw",
     .description = "Support PRFCHW instructions",
-    .llvm_name = "prfchw",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -585,7 +515,6 @@ pub const feature_prfchw = Feature{
 pub const feature_ptwrite = Feature{
     .name = "ptwrite",
     .description = "Support ptwrite instruction",
-    .llvm_name = "ptwrite",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -593,7 +522,6 @@ pub const feature_ptwrite = Feature{
 pub const feature_padShortFunctions = Feature{
     .name = "pad-short-functions",
     .description = "Pad short functions",
-    .llvm_name = "pad-short-functions",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -601,7 +529,6 @@ pub const feature_padShortFunctions = Feature{
 pub const feature_prefer128Bit = Feature{
     .name = "prefer-128-bit",
     .description = "Prefer 128-bit AVX instructions",
-    .llvm_name = "prefer-128-bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -609,7 +536,6 @@ pub const feature_prefer128Bit = Feature{
 pub const feature_prefer256Bit = Feature{
     .name = "prefer-256-bit",
     .description = "Prefer 256-bit AVX instructions",
-    .llvm_name = "prefer-256-bit",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -617,7 +543,6 @@ pub const feature_prefer256Bit = Feature{
 pub const feature_rdpid = Feature{
     .name = "rdpid",
     .description = "Support RDPID instructions",
-    .llvm_name = "rdpid",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -625,7 +550,6 @@ pub const feature_rdpid = Feature{
 pub const feature_rdrnd = Feature{
     .name = "rdrnd",
     .description = "Support RDRAND instruction",
-    .llvm_name = "rdrnd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -633,7 +557,6 @@ pub const feature_rdrnd = Feature{
 pub const feature_rdseed = Feature{
     .name = "rdseed",
     .description = "Support RDSEED instruction",
-    .llvm_name = "rdseed",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -641,7 +564,6 @@ pub const feature_rdseed = Feature{
 pub const feature_rtm = Feature{
     .name = "rtm",
     .description = "Support RTM instructions",
-    .llvm_name = "rtm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -649,17 +571,15 @@ pub const feature_rtm = Feature{
 pub const feature_retpoline = Feature{
     .name = "retpoline",
     .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
-    .llvm_name = "retpoline",
     .subfeatures = &[_]*const Feature {
-        &feature_retpolineIndirectCalls,
         &feature_retpolineIndirectBranches,
+        &feature_retpolineIndirectCalls,
     },
 };
 
 pub const feature_retpolineExternalThunk = Feature{
     .name = "retpoline-external-thunk",
     .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
-    .llvm_name = "retpoline-external-thunk",
     .subfeatures = &[_]*const Feature {
         &feature_retpolineIndirectCalls,
     },
@@ -668,7 +588,6 @@ pub const feature_retpolineExternalThunk = Feature{
 pub const feature_retpolineIndirectBranches = Feature{
     .name = "retpoline-indirect-branches",
     .description = "Remove speculation of indirect branches from the generated code",
-    .llvm_name = "retpoline-indirect-branches",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -676,7 +595,6 @@ pub const feature_retpolineIndirectBranches = Feature{
 pub const feature_retpolineIndirectCalls = Feature{
     .name = "retpoline-indirect-calls",
     .description = "Remove speculation of indirect calls from the generated code",
-    .llvm_name = "retpoline-indirect-calls",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -684,7 +602,6 @@ pub const feature_retpolineIndirectCalls = Feature{
 pub const feature_sgx = Feature{
     .name = "sgx",
     .description = "Enable Software Guard Extensions",
-    .llvm_name = "sgx",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -692,7 +609,6 @@ pub const feature_sgx = Feature{
 pub const feature_sha = Feature{
     .name = "sha",
     .description = "Enable SHA instructions",
-    .llvm_name = "sha",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -701,7 +617,6 @@ pub const feature_sha = Feature{
 pub const feature_shstk = Feature{
     .name = "shstk",
     .description = "Support CET Shadow-Stack instructions",
-    .llvm_name = "shstk",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -709,7 +624,6 @@ pub const feature_shstk = Feature{
 pub const feature_sse = Feature{
     .name = "sse",
     .description = "Enable SSE instructions",
-    .llvm_name = "sse",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -717,7 +631,6 @@ pub const feature_sse = Feature{
 pub const feature_sse2 = Feature{
     .name = "sse2",
     .description = "Enable SSE2 instructions",
-    .llvm_name = "sse2",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -726,7 +639,6 @@ pub const feature_sse2 = Feature{
 pub const feature_sse3 = Feature{
     .name = "sse3",
     .description = "Enable SSE3 instructions",
-    .llvm_name = "sse3",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -735,7 +647,6 @@ pub const feature_sse3 = Feature{
 pub const feature_sse4a = Feature{
     .name = "sse4a",
     .description = "Support SSE 4a instructions",
-    .llvm_name = "sse4a",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -744,7 +655,6 @@ pub const feature_sse4a = Feature{
 pub const feature_sse41 = Feature{
     .name = "sse4.1",
     .description = "Enable SSE 4.1 instructions",
-    .llvm_name = "sse4.1",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -753,7 +663,6 @@ pub const feature_sse41 = Feature{
 pub const feature_sse42 = Feature{
     .name = "sse4.2",
     .description = "Enable SSE 4.2 instructions",
-    .llvm_name = "sse4.2",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -762,7 +671,6 @@ pub const feature_sse42 = Feature{
 pub const feature_sseUnalignedMem = Feature{
     .name = "sse-unaligned-mem",
     .description = "Allow unaligned memory operands with SSE instructions",
-    .llvm_name = "sse-unaligned-mem",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -770,7 +678,6 @@ pub const feature_sseUnalignedMem = Feature{
 pub const feature_ssse3 = Feature{
     .name = "ssse3",
     .description = "Enable SSSE3 instructions",
-    .llvm_name = "ssse3",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -779,7 +686,6 @@ pub const feature_ssse3 = Feature{
 pub const feature_slow3opsLea = Feature{
     .name = "slow-3ops-lea",
     .description = "LEA instruction with 3 ops or certain registers is slow",
-    .llvm_name = "slow-3ops-lea",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -787,7 +693,6 @@ pub const feature_slow3opsLea = Feature{
 pub const feature_idivlToDivb = Feature{
     .name = "idivl-to-divb",
     .description = "Use 8-bit divide for positive values less than 256",
-    .llvm_name = "idivl-to-divb",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -795,7 +700,6 @@ pub const feature_idivlToDivb = Feature{
 pub const feature_idivqToDivl = Feature{
     .name = "idivq-to-divl",
     .description = "Use 32-bit divide for positive values less than 2^32",
-    .llvm_name = "idivq-to-divl",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -803,7 +707,6 @@ pub const feature_idivqToDivl = Feature{
 pub const feature_slowIncdec = Feature{
     .name = "slow-incdec",
     .description = "INC and DEC instructions are slower than ADD and SUB",
-    .llvm_name = "slow-incdec",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -811,7 +714,6 @@ pub const feature_slowIncdec = Feature{
 pub const feature_slowLea = Feature{
     .name = "slow-lea",
     .description = "LEA instruction with certain arguments is slow",
-    .llvm_name = "slow-lea",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -819,7 +721,6 @@ pub const feature_slowLea = Feature{
 pub const feature_slowPmaddwd = Feature{
     .name = "slow-pmaddwd",
     .description = "PMADDWD is slower than PMULLD",
-    .llvm_name = "slow-pmaddwd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -827,7 +728,6 @@ pub const feature_slowPmaddwd = Feature{
 pub const feature_slowPmulld = Feature{
     .name = "slow-pmulld",
     .description = "PMULLD instruction is slow",
-    .llvm_name = "slow-pmulld",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -835,7 +735,6 @@ pub const feature_slowPmulld = Feature{
 pub const feature_slowShld = Feature{
     .name = "slow-shld",
     .description = "SHLD instruction is slow",
-    .llvm_name = "slow-shld",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -843,7 +742,6 @@ pub const feature_slowShld = Feature{
 pub const feature_slowTwoMemOps = Feature{
     .name = "slow-two-mem-ops",
     .description = "Two memory operand instructions are slow",
-    .llvm_name = "slow-two-mem-ops",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -851,7 +749,6 @@ pub const feature_slowTwoMemOps = Feature{
 pub const feature_slowUnalignedMem16 = Feature{
     .name = "slow-unaligned-mem-16",
     .description = "Slow unaligned 16-byte memory access",
-    .llvm_name = "slow-unaligned-mem-16",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -859,7 +756,6 @@ pub const feature_slowUnalignedMem16 = Feature{
 pub const feature_slowUnalignedMem32 = Feature{
     .name = "slow-unaligned-mem-32",
     .description = "Slow unaligned 32-byte memory access",
-    .llvm_name = "slow-unaligned-mem-32",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -867,7 +763,6 @@ pub const feature_slowUnalignedMem32 = Feature{
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Use software floating point features",
-    .llvm_name = "soft-float",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -875,7 +770,6 @@ pub const feature_softFloat = Feature{
 pub const feature_tbm = Feature{
     .name = "tbm",
     .description = "Enable TBM instructions",
-    .llvm_name = "tbm",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -883,7 +777,6 @@ pub const feature_tbm = Feature{
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .llvm_name = "use-aa",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -891,7 +784,6 @@ pub const feature_useAa = Feature{
 pub const feature_vaes = Feature{
     .name = "vaes",
     .description = "Promote selected AES instructions to AVX512/AVX registers",
-    .llvm_name = "vaes",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -900,7 +792,6 @@ pub const feature_vaes = Feature{
 pub const feature_avx512vbmi = Feature{
     .name = "avx512vbmi",
     .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-    .llvm_name = "avx512vbmi",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -909,7 +800,6 @@ pub const feature_avx512vbmi = Feature{
 pub const feature_avx512vbmi2 = Feature{
     .name = "avx512vbmi2",
     .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-    .llvm_name = "avx512vbmi2",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -918,7 +808,6 @@ pub const feature_avx512vbmi2 = Feature{
 pub const feature_avx512vl = Feature{
     .name = "avx512vl",
     .description = "Enable AVX-512 Vector Length eXtensions",
-    .llvm_name = "avx512vl",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -927,7 +816,6 @@ pub const feature_avx512vl = Feature{
 pub const feature_avx512vnni = Feature{
     .name = "avx512vnni",
     .description = "Enable AVX-512 Vector Neural Network Instructions",
-    .llvm_name = "avx512vnni",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -936,7 +824,6 @@ pub const feature_avx512vnni = Feature{
 pub const feature_avx512vp2intersect = Feature{
     .name = "avx512vp2intersect",
     .description = "Enable AVX-512 vp2intersect",
-    .llvm_name = "avx512vp2intersect",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -945,7 +832,6 @@ pub const feature_avx512vp2intersect = Feature{
 pub const feature_vpclmulqdq = Feature{
     .name = "vpclmulqdq",
     .description = "Enable vpclmulqdq instructions",
-    .llvm_name = "vpclmulqdq",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -954,7 +840,6 @@ pub const feature_vpclmulqdq = Feature{
 pub const feature_avx512vpopcntdq = Feature{
     .name = "avx512vpopcntdq",
     .description = "Enable AVX-512 Population Count Instructions",
-    .llvm_name = "avx512vpopcntdq",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -963,7 +848,6 @@ pub const feature_avx512vpopcntdq = Feature{
 pub const feature_waitpkg = Feature{
     .name = "waitpkg",
     .description = "Wait and pause enhancements",
-    .llvm_name = "waitpkg",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -971,7 +855,6 @@ pub const feature_waitpkg = Feature{
 pub const feature_wbnoinvd = Feature{
     .name = "wbnoinvd",
     .description = "Write Back No Invalidate",
-    .llvm_name = "wbnoinvd",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -979,7 +862,6 @@ pub const feature_wbnoinvd = Feature{
 pub const feature_x87 = Feature{
     .name = "x87",
     .description = "Enable X87 float instructions",
-    .llvm_name = "x87",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -987,7 +869,6 @@ pub const feature_x87 = Feature{
 pub const feature_xop = Feature{
     .name = "xop",
     .description = "Enable XOP instructions",
-    .llvm_name = "xop",
     .subfeatures = &[_]*const Feature {
         &feature_sse,
     },
@@ -996,7 +877,6 @@ pub const feature_xop = Feature{
 pub const feature_xsave = Feature{
     .name = "xsave",
     .description = "Support xsave instructions",
-    .llvm_name = "xsave",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1004,7 +884,6 @@ pub const feature_xsave = Feature{
 pub const feature_xsavec = Feature{
     .name = "xsavec",
     .description = "Support xsavec instructions",
-    .llvm_name = "xsavec",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1012,7 +891,6 @@ pub const feature_xsavec = Feature{
 pub const feature_xsaveopt = Feature{
     .name = "xsaveopt",
     .description = "Support xsaveopt instructions",
-    .llvm_name = "xsaveopt",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1020,7 +898,6 @@ pub const feature_xsaveopt = Feature{
 pub const feature_xsaves = Feature{
     .name = "xsaves",
     .description = "Support xsaves instructions",
-    .llvm_name = "xsaves",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1028,7 +905,6 @@ pub const feature_xsaves = Feature{
 pub const feature_bitMode16 = Feature{
     .name = "16bit-mode",
     .description = "16-bit mode (i8086)",
-    .llvm_name = "16bit-mode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1036,7 +912,6 @@ pub const feature_bitMode16 = Feature{
 pub const feature_bitMode32 = Feature{
     .name = "32bit-mode",
     .description = "32-bit mode (80386)",
-    .llvm_name = "32bit-mode",
     .subfeatures = &[_]*const Feature {
     },
 };
@@ -1044,7 +919,6 @@ pub const feature_bitMode32 = Feature{
 pub const feature_bitMode64 = Feature{
     .name = "64bit-mode",
     .description = "64-bit mode (x86_64)",
-    .llvm_name = "64bit-mode",
     .subfeatures = &[_]*const Feature {
     },
 };
-- 
2.54.0


From bd6ef21f8556b3872c5780eee70621e6c66a0aa4 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Fri, 20 Dec 2019 21:46:42 -0500
Subject: [PATCH 040/116] Add cpu/feature specification to cmndline

---
 src-self-hosted/stage1.zig | 95 ++++++++++++++++++++++++++++++++++++--
 src/all_types.hpp          |  3 ++
 src/codegen.cpp            |  9 ++++
 src/main.cpp               | 16 +++++++
 src/userland.cpp           |  1 +
 src/userland.h             |  3 ++
 6 files changed, 123 insertions(+), 4 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 1544fcbc8f2b4fc591c6883f9444ea15fa296622..8734b37a02e2752b98e9b93fac6d79bb2eedcfc4 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -531,12 +531,12 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
 
 // ABI warning
 export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
-    print_features_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+    printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
         std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
     };
 }
 
-fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
+fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
@@ -575,12 +575,12 @@ fn print_features_for_arch(arch_name: []const u8, show_subfeatures: bool) !void
 
 // ABI warning
 export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
-    print_cpus_for_arch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+    printCpusForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
         std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
     };
 }
 
-fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
+fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
@@ -618,3 +618,90 @@ fn print_cpus_for_arch(arch_name: []const u8, show_subfeatures: bool) !void {
 }
 
 // use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'.
+// ABI warning
+export fn stage2_validate_cpu_and_features(
+    arch_name: [*:0]const u8, 
+    cpu: ?[*:0]const u8, 
+    features: ?[*:0]const u8, 
+) bool {
+    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_name)) catch {
+        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
+        return false;
+    };
+
+    const res = validateCpuAndFeatures(
+        arch, 
+        if (cpu) |def_cpu| std.mem.toSliceConst(u8, def_cpu) else "",
+        if (features) |def_features| std.mem.toSliceConst(u8, def_features) else "");
+
+    switch (res) {
+        .Ok => return true,
+        .InvalidCpu => |invalid_cpu| {
+            std.debug.warn("Invalid CPU '{}'\n", .{ invalid_cpu });
+            return false;
+        },
+        .InvalidFeaturesString => {
+            std.debug.warn("Invalid features string\n", .{});
+            std.debug.warn("Must have format \"+yes_feature,-no_feature\"\n", .{});
+            return false;
+        },
+        .InvalidFeature => |invalid_feature| {
+            std.debug.warn("Invalid feature '{}'\n", .{ invalid_feature });
+            return false;
+        }
+    }
+}
+
+const ValidateCpuAndFeaturesResult = union(enum) {
+    Ok,
+    InvalidCpu: []const u8,
+    InvalidFeaturesString,
+    InvalidFeature: []const u8,
+};
+
+fn validateCpuAndFeatures(arch: @TagType(std.Target.Arch), cpu: []const u8, features: []const u8) ValidateCpuAndFeaturesResult {
+
+    const known_cpus = std.target.getCpusForArch(arch);
+    const known_features = std.target.getFeaturesForArch(arch);
+    
+    if (cpu.len > 0) {
+        var found_cpu = false;
+        for (known_cpus) |known_cpu| {
+            if (std.mem.eql(u8, cpu, known_cpu.name)) {
+                found_cpu = true;
+                break;
+            }
+        }
+
+        if (!found_cpu) {
+            return .{ .InvalidCpu = cpu };
+        }
+    }
+
+    if (features.len > 0) {
+        var start: usize = 0;
+        while (start < features.len) {
+            const next_comma_pos = std.mem.indexOfScalar(u8, features[start..], ',') orelse features.len - start;
+            var feature = features[start..start+next_comma_pos];
+
+            if (feature.len < 2) return .{ .InvalidFeaturesString = {} };
+            
+            if (feature[0] != '+' and feature[0] != '-') return .{ .InvalidFeaturesString = {} };
+            feature = feature[1..];
+
+            var found_feature = false;
+            for (known_features) |known_feature| {
+                if (std.mem.eql(u8, feature, known_feature.name)) {
+                    found_feature = true;
+                    break;
+                }
+            }
+
+            if (!found_feature) return .{ .InvalidFeature = feature };
+
+            start += next_comma_pos + 1;
+        }
+    }
+
+    return .{ .Ok = {} };
+}
diff --git a/src/all_types.hpp b/src/all_types.hpp
index df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f..af4914e29ecf0f2df75d3528506ac3f72dd960de 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -2215,6 +2215,9 @@ struct CodeGen {
 
     const char **clang_argv;
     size_t clang_argv_len;
+
+    const char *llvm_cpu;
+    const char *llvm_features;
 };
 
 struct ZigVar {
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 3d4d2a8c317e0f360c8bce83f2d8e800995e6aee..43fc002a1207ee273cf737f0356cbb861ff90e78 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8800,6 +8800,15 @@ static void init(CodeGen *g) {
         target_specific_features = "";
     }
 
+    // Override CPU and features if non-null.
+    if (g->llvm_cpu != nullptr) {
+        target_specific_cpu_args = g->llvm_cpu;
+    }
+    
+    if (g->llvm_features != nullptr) {
+        target_specific_features = g->llvm_features;
+    }
+
     g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
             target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
             LLVMCodeModelDefault, g->function_sections);
diff --git a/src/main.cpp b/src/main.cpp
index ee2faa9a78ab43b60d4e337bfa17cc4a6c5fb342..f061b13414ec1ee2ca83f2ba246c1222a658fe59 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -100,6 +100,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "  --override-lib-dir [arg]     override path to Zig lib directory\n"
         "  -ffunction-sections          places each function in a separate section\n"
         "  -D[macro]=[value]            define C [macro] to [value] (1 if [value] omitted)\n"
+        "  --cpu [cpu]                  compile for [cpu] on the current target\n"
+        "  --features [feature_str]     compile with features in [feature_str] on the current target\n"
         "\n"
         "Link Options:\n"
         "  --bundle-compiler-rt         for static libraries, include compiler-rt symbols\n"
@@ -533,6 +535,8 @@ int main(int argc, char **argv) {
     WantStackCheck want_stack_check = WantStackCheckAuto;
     WantCSanitize want_sanitize_c = WantCSanitizeAuto;
     bool function_sections = false;
+    const char *cpu = "";
+    const char *features = "";
 
     const char *targets_list_features_arch = nullptr;
     const char *targets_list_cpus_arch = nullptr;
@@ -951,6 +955,10 @@ int main(int argc, char **argv) {
                     targets_list_features_arch = argv[i];
                 } else if (strcmp(arg, "--list-cpus") == 0) {
                     targets_list_cpus_arch = argv[i];
+                } else if (strcmp(arg, "--cpu") == 0) {
+                    cpu = argv[i];
+                } else if (strcmp(arg, "--features") == 0) {
+                    features = argv[i];
                 }else {
                     fprintf(stderr, "Invalid argument: %s\n", arg);
                     return print_error_usage(arg0);
@@ -1248,6 +1256,7 @@ int main(int argc, char **argv) {
             g->system_linker_hack = system_linker_hack;
             g->function_sections = function_sections;
 
+
             for (size_t i = 0; i < lib_dirs.length; i += 1) {
                 codegen_add_lib_dir(g, lib_dirs.at(i));
             }
@@ -1269,6 +1278,13 @@ int main(int argc, char **argv) {
                 codegen_add_rpath(g, rpath_list.at(i));
             }
 
+            if (!stage2_validate_cpu_and_features(target_arch_name(target.arch), cpu, features)) {
+                return 1;
+            }
+
+            g->llvm_cpu = cpu;
+            g->llvm_features = features;
+
             codegen_set_rdynamic(g, rdynamic);
             if (mmacosx_version_min && mios_version_min) {
                 fprintf(stderr, "-mmacosx-version-min and -mios-version-min options not allowed together\n");
diff --git a/src/userland.cpp b/src/userland.cpp
index 87ef99c03a91fa16eb0ce0d06890c3adb2e6dae0..e0c8b33fa2b2d6ed234ab90c3f7adc206d8cd986 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -91,3 +91,4 @@ void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_coun
 
 void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
 void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
+bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features) { return true; }
diff --git a/src/userland.h b/src/userland.h
index c85684cb36f3f7b37c7462bc21270f9b4022298a..9d3e9623fba9eda5ffb1ec6cf6d0931a2afc5671 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -180,4 +180,7 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_
 // ABI warning
 ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
 
+// ABI warning
+ZIG_EXTERN_C bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features);
+
 #endif
-- 
2.54.0


From b3324f1901ab9eb7321ad65161e6e07047284cab Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Sat, 21 Dec 2019 21:18:05 -0500
Subject: [PATCH 041/116] Add cpu/feature to cache hash

---
 src/codegen.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/codegen.cpp b/src/codegen.cpp
index 43fc002a1207ee273cf737f0356cbb861ff90e78..798f406c8e02ce11768420ea79110ff8cfd10704 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8655,6 +8655,8 @@ static Error define_builtin_compile_vars(CodeGen *g) {
     cache_bool(&cache_hash, g->valgrind_support);
     cache_bool(&cache_hash, g->link_eh_frame_hdr);
     cache_int(&cache_hash, detect_subsystem(g));
+    if (g->llvm_cpu) cache_str(&cache_hash, g->llvm_cpu);
+    if (g->llvm_features) cache_str(&cache_hash, g->llvm_features);
 
     Buf digest = BUF_INIT;
     buf_resize(&digest, 0);
@@ -10388,6 +10390,8 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
     }
     cache_buf_opt(ch, g->dynamic_linker_path);
     cache_buf_opt(ch, g->version_script_path);
+    if (g->llvm_cpu) cache_str(ch, g->llvm_cpu);
+    if (g->llvm_features) cache_str(ch, g->llvm_features);
 
     // gen_c_objects appends objects to g->link_objects which we want to include in the hash
     gen_c_objects(g);
-- 
2.54.0


From c1798cb632a1f8b7a0824a9e5d58cd8c30e4f373 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Sat, 21 Dec 2019 21:38:39 -0500
Subject: [PATCH 042/116] Add build.zig cpu and feature options

---
 lib/std/build.zig | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index ad4be9e4ca3c252424b4257cd46aaa80ea476a27..65c5a6f0640bcce1618e49abcbec0f04efba25b6 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1199,6 +1199,9 @@ pub const LibExeObjStep = struct {
 
     subsystem: ?builtin.SubSystem = null,
 
+    cpu: ?[]const u8 = null,
+    features: ?[]const u8 = null,
+
     const LinkObject = union(enum) {
         StaticPath: []const u8,
         OtherStep: *LibExeObjStep,
@@ -1384,6 +1387,23 @@ pub const LibExeObjStep = struct {
         self.computeOutFileNames();
     }
 
+    pub fn setCpu(self: *LibExeObjStep, cpu: *const std.target.Cpu) void {
+        self.cpu = cpu.name;
+    }
+
+    pub fn setFeatures(self: *LibExeObjStep, features: []*const std.target.Feature) void {
+        var features_str_buffer = std.Buffer.init(self.builder.allocator, "") catch unreachable;
+        defer features_str_buffer.deinit();
+
+        for (features) |feature| {
+            features_str_buffer.append("+") catch unreachable;
+            features_str_buffer.append(feature.name) catch unreachable;
+            features_str_buffer.append(",") catch unreachable;
+        }
+
+        self.features = features_str_buffer.toOwnedSlice();
+    }
+
     pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void {
         self.target_glibc = Version{
             .major = major,
@@ -1974,6 +1994,16 @@ pub const LibExeObjStep = struct {
             },
         }
 
+        if (self.cpu) |cpu| {
+            try zig_args.append("--cpu");
+            try zig_args.append(cpu);
+        }
+
+        if (self.features) |features| {
+            try zig_args.append("--features");
+            try zig_args.append(features);
+        }
+
         if (self.target_glibc) |ver| {
             try zig_args.append("-target-glibc");
             try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch }));
-- 
2.54.0


From 51372200d36ee0f78d32a5f7c7f8d4faf6dc9a35 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Sat, 4 Jan 2020 17:50:19 -0500
Subject: [PATCH 043/116] Filter out non-features

---
 lib/std/target/aarch64.zig | 1008 ++--------
 lib/std/target/amdgpu.zig  | 1068 +++++------
 lib/std/target/arm.zig     | 1862 ++++---------------
 lib/std/target/avr.zig     | 3538 ++++++++++++++----------------------
 lib/std/target/hexagon.zig |  143 --
 lib/std/target/mips.zig    |  216 +--
 lib/std/target/powerpc.zig |    4 +-
 lib/std/target/sparc.zig   |   85 -
 8 files changed, 2463 insertions(+), 5461 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index b7a6283f861e6bcbc721458c69f739bb091f4449..b907d96b7d9badf8ce6bd1f56ef88abb6bf78f1f 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -887,573 +887,6 @@ pub const feature_zczGp = Feature{
     },
 };
 
-pub const feature_v81a = Feature{
-    .name = "v8.1a",
-    .description = "Support ARM v8.1a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_lor,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_vh,
-        &feature_crc,
-    },
-};
-
-pub const feature_v82a = Feature{
-    .name = "v8.2a",
-    .description = "Support ARM v8.2a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_vh,
-        &feature_ras,
-        &feature_crc,
-        &feature_uaops,
-    },
-};
-
-pub const feature_v83a = Feature{
-    .name = "v8.3a",
-    .description = "Support ARM v8.3a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ccidx,
-        &feature_crc,
-        &feature_pa,
-    },
-};
-
-pub const feature_v84a = Feature{
-    .name = "v8.4a",
-    .description = "Support ARM v8.4a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_crc,
-        &feature_fmi,
-        &feature_tracev84,
-        &feature_tlbRmi,
-        &feature_rdm,
-        &feature_ccidx,
-        &feature_mpam,
-        &feature_pan,
-        &feature_lse,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_sel2,
-        &feature_nv,
-        &feature_am,
-        &feature_dit,
-        &feature_vh,
-        &feature_ras,
-        &feature_pa,
-    },
-};
-
-pub const feature_v85a = Feature{
-    .name = "v8.5a",
-    .description = "Support ARM v8.5a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_fmi,
-        &feature_bti,
-        &feature_tracev84,
-        &feature_tlbRmi,
-        &feature_fptoint,
-        &feature_rdm,
-        &feature_sb,
-        &feature_ccidx,
-        &feature_mpam,
-        &feature_pan,
-        &feature_lse,
-        &feature_predres,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_sel2,
-        &feature_nv,
-        &feature_am,
-        &feature_dit,
-        &feature_specrestrict,
-        &feature_vh,
-        &feature_altnzcv,
-        &feature_ras,
-        &feature_ccdp,
-        &feature_pa,
-    },
-};
-
-pub const feature_a35 = Feature{
-    .name = "a35",
-    .description = "Cortex-A35 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
-    },
-};
-
-pub const feature_a53 = Feature{
-    .name = "a53",
-    .description = "Cortex-A53 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_useAa,
-        &feature_balanceFpOps,
-        &feature_fuseAes,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_crc,
-    },
-};
-
-pub const feature_a55 = Feature{
-    .name = "a55",
-    .description = "Cortex-A55 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_perfmon,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_crc,
-    },
-};
-
-pub const feature_a57 = Feature{
-    .name = "a57",
-    .description = "Cortex-A57 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_balanceFpOps,
-        &feature_predictableSelectExpensive,
-        &feature_fuseAes,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_crc,
-    },
-};
-
-pub const feature_a65 = Feature{
-    .name = "a65",
-    .description = "Cortex-A65 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_rcpc,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_crc,
-    },
-};
-
-pub const feature_a72 = Feature{
-    .name = "a72",
-    .description = "Cortex-A72 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_crc,
-        &feature_perfmon,
-    },
-};
-
-pub const feature_a73 = Feature{
-    .name = "a73",
-    .description = "Cortex-A73 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_crc,
-        &feature_perfmon,
-    },
-};
-
-pub const feature_a75 = Feature{
-    .name = "a75",
-    .description = "Cortex-A75 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_perfmon,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_crc,
-    },
-};
-
-pub const feature_a76 = Feature{
-    .name = "a76",
-    .description = "Cortex-A76 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-    },
-};
-
-pub const feature_cyclone = Feature{
-    .name = "cyclone",
-    .description = "Cyclone",
-    .subfeatures = &[_]*const Feature {
-        &feature_zczFpWorkaround,
-        &feature_fuseAes,
-        &feature_zcm,
-        &feature_arithCbzFusion,
-        &feature_perfmon,
-        &feature_alternateSextloadCvtF32Pattern,
-        &feature_arithBccFusion,
-        &feature_disableLatencySchedHeuristic,
-        &feature_zczGp,
-        &feature_fuseCryptoEor,
-        &feature_fpArmv8,
-        &feature_zczFp,
-    },
-};
-
-pub const feature_exynosm1 = Feature{
-    .name = "exynosm1",
-    .description = "Samsung Exynos-M1 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_useReciprocalSquareRoot,
-        &feature_fuseAes,
-        &feature_usePostraScheduler,
-        &feature_slowMisaligned128store,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_slowPaired128,
-    },
-};
-
-pub const feature_exynosm2 = Feature{
-    .name = "exynosm2",
-    .description = "Samsung Exynos-M2 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_usePostraScheduler,
-        &feature_slowMisaligned128store,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_slowPaired128,
-    },
-};
-
-pub const feature_exynosm3 = Feature{
-    .name = "exynosm3",
-    .description = "Samsung Exynos-M3 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_predictableSelectExpensive,
-        &feature_fuseAes,
-        &feature_fuseAddress,
-        &feature_fuseCsel,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-    },
-};
-
-pub const feature_exynosm4 = Feature{
-    .name = "exynosm4",
-    .description = "Samsung Exynos-M4 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_fuseAes,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_fuseAddress,
-        &feature_arithCbzFusion,
-        &feature_perfmon,
-        &feature_arithBccFusion,
-        &feature_zczGp,
-        &feature_rdm,
-        &feature_force32bitJumpTables,
-        &feature_pan,
-        &feature_lse,
-        &feature_fuseCsel,
-        &feature_uaops,
-        &feature_fuseArithLogic,
-        &feature_usePostraScheduler,
-        &feature_vh,
-        &feature_ras,
-        &feature_zczFp,
-    },
-};
-
-pub const feature_falkor = Feature{
-    .name = "falkor",
-    .description = "Qualcomm Falkor processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_slowStrqroStore,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_zczFp,
-        &feature_crc,
-    },
-};
-
-pub const feature_kryo = Feature{
-    .name = "kryo",
-    .description = "Qualcomm Kryo processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_zczFp,
-        &feature_crc,
-    },
-};
-
-pub const feature_neoversee1 = Feature{
-    .name = "neoversee1",
-    .description = "Neoverse E1 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-    },
-};
-
-pub const feature_neoversen1 = Feature{
-    .name = "neoversen1",
-    .description = "Neoverse N1 ARM processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_spe,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_ras,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-    },
-};
-
-pub const feature_saphira = Feature{
-    .name = "saphira",
-    .description = "Qualcomm Saphira processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_fmi,
-        &feature_predictableSelectExpensive,
-        &feature_tracev84,
-        &feature_tlbRmi,
-        &feature_perfmon,
-        &feature_zczGp,
-        &feature_rdm,
-        &feature_ccidx,
-        &feature_mpam,
-        &feature_pan,
-        &feature_lse,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_sel2,
-        &feature_usePostraScheduler,
-        &feature_nv,
-        &feature_am,
-        &feature_spe,
-        &feature_dit,
-        &feature_vh,
-        &feature_ras,
-        &feature_zczFp,
-        &feature_pa,
-    },
-};
-
-pub const feature_tsv110 = Feature{
-    .name = "tsv110",
-    .description = "HiSilicon TS-V110 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_usePostraScheduler,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_uaops,
-        &feature_perfmon,
-        &feature_spe,
-        &feature_pan,
-        &feature_lse,
-        &feature_rdm,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_ras,
-        &feature_crc,
-    },
-};
-
-pub const feature_thunderx = Feature{
-    .name = "thunderx",
-    .description = "Cavium ThunderX processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
-pub const feature_thunderx2t99 = Feature{
-    .name = "thunderx2t99",
-    .description = "Cavium ThunderX2 processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_lor,
-        &feature_lse,
-        &feature_pan,
-        &feature_arithBccFusion,
-        &feature_rdm,
-        &feature_aggressiveFma,
-        &feature_vh,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
-pub const feature_thunderxt81 = Feature{
-    .name = "thunderxt81",
-    .description = "Cavium ThunderX processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
-pub const feature_thunderxt83 = Feature{
-    .name = "thunderxt83",
-    .description = "Cavium ThunderX processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
-pub const feature_thunderxt88 = Feature{
-    .name = "thunderxt88",
-    .description = "Cavium ThunderX processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
 pub const features = &[_]*const Feature {
     &feature_aes,
     &feature_am,
@@ -1578,55 +1011,24 @@ pub const features = &[_]*const Feature {
     &feature_zczFp,
     &feature_zczFpWorkaround,
     &feature_zczGp,
-    &feature_v81a,
-    &feature_v82a,
-    &feature_v83a,
-    &feature_v84a,
-    &feature_v85a,
-    &feature_a35,
-    &feature_a53,
-    &feature_a55,
-    &feature_a57,
-    &feature_a65,
-    &feature_a72,
-    &feature_a73,
-    &feature_a75,
-    &feature_a76,
-    &feature_cyclone,
-    &feature_exynosm1,
-    &feature_exynosm2,
-    &feature_exynosm3,
-    &feature_exynosm4,
-    &feature_falkor,
-    &feature_kryo,
-    &feature_neoversee1,
-    &feature_neoversen1,
-    &feature_saphira,
-    &feature_tsv110,
-    &feature_thunderx,
-    &feature_thunderx2t99,
-    &feature_thunderxt81,
-    &feature_thunderxt83,
-    &feature_thunderxt88,
 };
 
 pub const cpu_appleLatest = Cpu{
     .name = "apple-latest",
     .llvm_name = "apple-latest",
     .subfeatures = &[_]*const Feature {
+        &feature_arithCbzFusion,
+        &feature_alternateSextloadCvtF32Pattern,
         &feature_zczFpWorkaround,
-        &feature_fuseAes,
+        &feature_fuseCryptoEor,
+        &feature_disableLatencySchedHeuristic,
         &feature_zcm,
-        &feature_arithCbzFusion,
+        &feature_zczFp,
         &feature_perfmon,
-        &feature_alternateSextloadCvtF32Pattern,
+        &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_arithBccFusion,
-        &feature_disableLatencySchedHeuristic,
         &feature_zczGp,
-        &feature_fuseCryptoEor,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_cyclone,
     },
 };
 
@@ -1637,7 +1039,6 @@ pub const cpu_cortexA35 = Cpu{
         &feature_fpArmv8,
         &feature_perfmon,
         &feature_crc,
-        &feature_a35,
     },
 };
 
@@ -1645,15 +1046,14 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .subfeatures = &[_]*const Feature {
-        &feature_useAa,
-        &feature_balanceFpOps,
-        &feature_fuseAes,
         &feature_usePostraScheduler,
+        &feature_crc,
         &feature_perfmon,
+        &feature_fuseAes,
+        &feature_useAa,
         &feature_fpArmv8,
+        &feature_balanceFpOps,
         &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_a53,
     },
 };
 
@@ -1661,21 +1061,20 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
+        &feature_crc,
+        &feature_dotprod,
         &feature_ccpp,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_lse,
         &feature_lor,
-        &feature_dotprod,
-        &feature_perfmon,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
+        &feature_perfmon,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_crc,
-        &feature_a55,
+        &feature_fuseAes,
     },
 };
 
@@ -1683,16 +1082,15 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_balanceFpOps,
-        &feature_predictableSelectExpensive,
-        &feature_fuseAes,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_fuseLiterals,
         &feature_perfmon,
+        &feature_fuseAes,
         &feature_fpArmv8,
+        &feature_balanceFpOps,
         &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_a57,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1700,20 +1098,19 @@ pub const cpu_cortexA65 = Cpu{
     .name = "cortex-a65",
     .llvm_name = "cortex-a65",
     .subfeatures = &[_]*const Feature {
+        &feature_ssbs,
+        &feature_dotprod,
+        &feature_crc,
+        &feature_uaops,
         &feature_rcpc,
-        &feature_ccpp,
+        &feature_lse,
         &feature_lor,
-        &feature_dotprod,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
+        &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_a65,
+        &feature_ccpp,
     },
 };
 
@@ -1721,20 +1118,19 @@ pub const cpu_cortexA65ae = Cpu{
     .name = "cortex-a65ae",
     .llvm_name = "cortex-a65ae",
     .subfeatures = &[_]*const Feature {
+        &feature_ssbs,
+        &feature_dotprod,
+        &feature_crc,
+        &feature_uaops,
         &feature_rcpc,
-        &feature_ccpp,
+        &feature_lse,
         &feature_lor,
-        &feature_dotprod,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
+        &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_a65,
+        &feature_ccpp,
     },
 };
 
@@ -1744,9 +1140,8 @@ pub const cpu_cortexA72 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_fuseAes,
-        &feature_crc,
         &feature_perfmon,
-        &feature_a72,
+        &feature_crc,
     },
 };
 
@@ -1756,9 +1151,8 @@ pub const cpu_cortexA73 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_fuseAes,
-        &feature_crc,
         &feature_perfmon,
-        &feature_a73,
+        &feature_crc,
     },
 };
 
@@ -1766,21 +1160,20 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
+        &feature_crc,
+        &feature_dotprod,
         &feature_ccpp,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_lse,
         &feature_lor,
-        &feature_dotprod,
-        &feature_perfmon,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
+        &feature_perfmon,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_crc,
-        &feature_a75,
+        &feature_fuseAes,
     },
 };
 
@@ -1788,20 +1181,19 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
+        &feature_crc,
+        &feature_ssbs,
         &feature_dotprod,
-        &feature_pan,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_lse,
+        &feature_lor,
+        &feature_pan,
         &feature_rdm,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_a76,
+        &feature_ccpp,
     },
 };
 
@@ -1809,20 +1201,19 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
+        &feature_crc,
+        &feature_ssbs,
         &feature_dotprod,
-        &feature_pan,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_lse,
+        &feature_lor,
+        &feature_pan,
         &feature_rdm,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_a76,
+        &feature_ccpp,
     },
 };
 
@@ -1830,19 +1221,18 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .subfeatures = &[_]*const Feature {
+        &feature_arithCbzFusion,
+        &feature_alternateSextloadCvtF32Pattern,
         &feature_zczFpWorkaround,
-        &feature_fuseAes,
+        &feature_fuseCryptoEor,
+        &feature_disableLatencySchedHeuristic,
         &feature_zcm,
-        &feature_arithCbzFusion,
+        &feature_zczFp,
         &feature_perfmon,
-        &feature_alternateSextloadCvtF32Pattern,
+        &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_arithBccFusion,
-        &feature_disableLatencySchedHeuristic,
         &feature_zczGp,
-        &feature_fuseCryptoEor,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_cyclone,
     },
 };
 
@@ -1851,17 +1241,16 @@ pub const cpu_exynosM1 = Cpu{
     .llvm_name = "exynos-m1",
     .subfeatures = &[_]*const Feature {
         &feature_useReciprocalSquareRoot,
-        &feature_fuseAes,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_zczFp,
+        &feature_slowPaired128,
+        &feature_force32bitJumpTables,
         &feature_slowMisaligned128store,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_customCheapAsMove,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_slowPaired128,
-        &feature_exynosm1,
     },
 };
 
@@ -1869,17 +1258,16 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_zczFp,
+        &feature_slowPaired128,
+        &feature_force32bitJumpTables,
         &feature_slowMisaligned128store,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_customCheapAsMove,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_slowPaired128,
-        &feature_exynosm2,
     },
 };
 
@@ -1887,20 +1275,19 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_predictableSelectExpensive,
-        &feature_fuseAes,
         &feature_fuseAddress,
-        &feature_fuseCsel,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_zczFp,
+        &feature_fuseLiterals,
+        &feature_lslFast,
+        &feature_fuseCsel,
+        &feature_force32bitJumpTables,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_force32bitJumpTables,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_exynosm3,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1909,31 +1296,30 @@ pub const cpu_exynosM4 = Cpu{
     .llvm_name = "exynos-m4",
     .subfeatures = &[_]*const Feature {
         &feature_fuseLiterals,
-        &feature_fuseAes,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_fuseAddress,
-        &feature_arithCbzFusion,
-        &feature_perfmon,
-        &feature_arithBccFusion,
-        &feature_zczGp,
-        &feature_rdm,
-        &feature_force32bitJumpTables,
-        &feature_pan,
-        &feature_lse,
-        &feature_fuseCsel,
         &feature_uaops,
+        &feature_fuseCsel,
+        &feature_force32bitJumpTables,
         &feature_fuseArithLogic,
-        &feature_usePostraScheduler,
         &feature_vh,
+        &feature_arithBccFusion,
+        &feature_zczGp,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
+        &feature_lse,
+        &feature_pan,
         &feature_ras,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_rdm,
+        &feature_arithCbzFusion,
+        &feature_crc,
         &feature_zczFp,
-        &feature_exynosm4,
+        &feature_lslFast,
+        &feature_lor,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_ccpp,
+        &feature_customCheapAsMove,
     },
 };
 
@@ -1942,31 +1328,30 @@ pub const cpu_exynosM5 = Cpu{
     .llvm_name = "exynos-m5",
     .subfeatures = &[_]*const Feature {
         &feature_fuseLiterals,
-        &feature_fuseAes,
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_fuseAddress,
-        &feature_arithCbzFusion,
-        &feature_perfmon,
-        &feature_arithBccFusion,
-        &feature_zczGp,
-        &feature_rdm,
-        &feature_force32bitJumpTables,
-        &feature_pan,
-        &feature_lse,
-        &feature_fuseCsel,
         &feature_uaops,
+        &feature_fuseCsel,
+        &feature_force32bitJumpTables,
         &feature_fuseArithLogic,
-        &feature_usePostraScheduler,
         &feature_vh,
+        &feature_arithBccFusion,
+        &feature_zczGp,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
+        &feature_lse,
+        &feature_pan,
         &feature_ras,
+        &feature_fuseAes,
+        &feature_fuseAddress,
+        &feature_rdm,
+        &feature_arithCbzFusion,
+        &feature_crc,
         &feature_zczFp,
-        &feature_exynosm4,
+        &feature_lslFast,
+        &feature_lor,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_ccpp,
+        &feature_customCheapAsMove,
     },
 };
 
@@ -1974,18 +1359,17 @@ pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
-        &feature_perfmon,
+        &feature_crc,
+        &feature_zczFp,
+        &feature_lslFast,
         &feature_slowStrqroStore,
         &feature_rdm,
-        &feature_zczGp,
+        &feature_perfmon,
         &feature_fpArmv8,
+        &feature_zczGp,
         &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_falkor,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2007,16 +1391,15 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_zczFp,
+        &feature_lslFast,
         &feature_perfmon,
-        &feature_zczGp,
         &feature_fpArmv8,
+        &feature_zczGp,
         &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_zczFp,
-        &feature_crc,
-        &feature_kryo,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2024,20 +1407,19 @@ pub const cpu_neoverseE1 = Cpu{
     .name = "neoverse-e1",
     .llvm_name = "neoverse-e1",
     .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
+        &feature_crc,
+        &feature_ssbs,
         &feature_dotprod,
-        &feature_pan,
+        &feature_uaops,
+        &feature_rcpc,
         &feature_lse,
+        &feature_lor,
+        &feature_pan,
         &feature_rdm,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_neoversee1,
+        &feature_ccpp,
     },
 };
 
@@ -2045,21 +1427,20 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
+        &feature_ssbs,
         &feature_dotprod,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rcpc,
+        &feature_lse,
         &feature_spe,
+        &feature_lor,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
         &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_ssbs,
-        &feature_crc,
-        &feature_neoversen1,
+        &feature_ccpp,
     },
 };
 
@@ -2067,37 +1448,36 @@ pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
     .subfeatures = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_fpArmv8,
-        &feature_customCheapAsMove,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_fmi,
-        &feature_predictableSelectExpensive,
-        &feature_tracev84,
-        &feature_tlbRmi,
-        &feature_perfmon,
+        &feature_uaops,
+        &feature_vh,
+        &feature_nv,
         &feature_zczGp,
-        &feature_rdm,
-        &feature_ccidx,
         &feature_mpam,
-        &feature_pan,
-        &feature_lse,
+        &feature_predictableSelectExpensive,
+        &feature_am,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
+        &feature_lse,
+        &feature_pan,
+        &feature_ras,
+        &feature_tlbRmi,
         &feature_sel2,
-        &feature_usePostraScheduler,
-        &feature_nv,
-        &feature_am,
-        &feature_spe,
+        &feature_rdm,
+        &feature_ccidx,
         &feature_dit,
-        &feature_vh,
-        &feature_ras,
+        &feature_crc,
         &feature_zczFp,
+        &feature_lslFast,
+        &feature_fmi,
+        &feature_spe,
+        &feature_lor,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_ccpp,
+        &feature_tracev84,
+        &feature_customCheapAsMove,
         &feature_pa,
-        &feature_saphira,
     },
 };
 
@@ -2105,12 +1485,11 @@ pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_crc,
-        &feature_thunderx,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2118,18 +1497,17 @@ pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
-        &feature_lor,
+        &feature_crc,
         &feature_lse,
+        &feature_lor,
+        &feature_aggressiveFma,
         &feature_pan,
-        &feature_arithBccFusion,
         &feature_rdm,
-        &feature_aggressiveFma,
         &feature_vh,
         &feature_fpArmv8,
-        &feature_crc,
-        &feature_thunderx2t99,
+        &feature_arithBccFusion,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2137,12 +1515,11 @@ pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_crc,
-        &feature_thunderxt81,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2150,12 +1527,11 @@ pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_crc,
-        &feature_thunderxt83,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2163,12 +1539,11 @@ pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
     .subfeatures = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
         &feature_usePostraScheduler,
+        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_crc,
-        &feature_thunderxt88,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -2176,23 +1551,22 @@ pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
     .subfeatures = &[_]*const Feature {
-        &feature_fuseAes,
         &feature_usePostraScheduler,
-        &feature_ccpp,
-        &feature_lor,
+        &feature_crc,
         &feature_dotprod,
+        &feature_ccpp,
         &feature_uaops,
-        &feature_perfmon,
+        &feature_lse,
+        &feature_lor,
         &feature_spe,
         &feature_pan,
-        &feature_lse,
         &feature_rdm,
+        &feature_perfmon,
+        &feature_ras,
         &feature_vh,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_customCheapAsMove,
-        &feature_ras,
-        &feature_crc,
-        &feature_tsv110,
     },
 };
 
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index e6eec35ab3d6c4635c12e1ab3ac3e2d33ec579b6..5f6fe8dcf6ffb2e166b4b54afd3e37efc66d7c58 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -312,43 +312,6 @@ pub const feature_gfx8Insts = Feature{
     },
 };
 
-pub const feature_gfx9 = Feature{
-    .name = "gfx9",
-    .description = "GFX9 GPU generation",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
-        &feature_ciInsts,
-        &feature_apertureRegs,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_gcn3Encoding,
-        &feature_flatScratchInsts,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
-        &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
-        &feature_localmemorysize65536,
-        &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
-        &feature_BitInsts16,
-        &feature_r128A16,
-    },
-};
-
 pub const feature_gfx9Insts = Feature{
     .name = "gfx9-insts",
     .description = "Additional instructions for GFX9+",
@@ -356,47 +319,6 @@ pub const feature_gfx9Insts = Feature{
     },
 };
 
-pub const feature_gfx10 = Feature{
-    .name = "gfx10",
-    .description = "GFX10 GPU generation",
-    .subfeatures = &[_]*const Feature {
-        &feature_registerBanking,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
-        &feature_ciInsts,
-        &feature_apertureRegs,
-        &feature_intClampInsts,
-        &feature_flatScratchInsts,
-        &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_pkFmacF16Inst,
-        &feature_vscnt,
-        &feature_movrel,
-        &feature_fmaMixInsts,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaOmod,
-        &feature_vop3Literal,
-        &feature_dpp8,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_noDataDepHazard,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
-        &feature_BitInsts16,
-        &feature_noSdstCmpx,
-    },
-};
-
 pub const feature_gfx10Insts = Feature{
     .name = "gfx10-insts",
     .description = "Additional instructions for GFX10+",
@@ -684,39 +606,6 @@ pub const feature_scalarStores = Feature{
     },
 };
 
-pub const feature_seaIslands = Feature{
-    .name = "sea-islands",
-    .description = "SEA_ISLANDS GPU generation",
-    .subfeatures = &[_]*const Feature {
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-    },
-};
-
-pub const feature_southernIslands = Feature{
-    .name = "southern-islands",
-    .description = "SOUTHERN_ISLANDS GPU generation",
-    .subfeatures = &[_]*const Feature {
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
-        &feature_ldsbankcount32,
-        &feature_noXnackSupport,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-    },
-};
-
 pub const feature_trapHandler = Feature{
     .name = "trap-handler",
     .description = "Trap handler support",
@@ -794,35 +683,6 @@ pub const feature_vcmpxPermlaneHazard = Feature{
     },
 };
 
-pub const feature_volcanicIslands = Feature{
-    .name = "volcanic-islands",
-    .description = "VOLCANIC_ISLANDS GPU generation",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_gcn3Encoding,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_BitInsts16,
-    },
-};
-
 pub const feature_vscnt = Feature{
     .name = "vscnt",
     .description = "Has separate store vscnt counter",
@@ -910,9 +770,7 @@ pub const features = &[_]*const Feature {
     &feature_gcn3Encoding,
     &feature_gfx7Gfx8Gfx9Insts,
     &feature_gfx8Insts,
-    &feature_gfx9,
     &feature_gfx9Insts,
-    &feature_gfx10,
     &feature_gfx10Insts,
     &feature_instFwdPrefetchBug,
     &feature_intClampInsts,
@@ -954,8 +812,6 @@ pub const features = &[_]*const Feature {
     &feature_scalarAtomics,
     &feature_scalarFlatScratchInsts,
     &feature_scalarStores,
-    &feature_seaIslands,
-    &feature_southernIslands,
     &feature_trapHandler,
     &feature_trigReducedRange,
     &feature_unalignedBufferAccess,
@@ -967,7 +823,6 @@ pub const features = &[_]*const Feature {
     &feature_vop3p,
     &feature_vcmpxExecWarHazard,
     &feature_vcmpxPermlaneHazard,
-    &feature_volcanicIslands,
     &feature_vscnt,
     &feature_wavefrontsize16,
     &feature_wavefrontsize32,
@@ -983,17 +838,16 @@ pub const cpu_bonaire = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1005,29 +859,28 @@ pub const cpu_carrizo = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1041,29 +894,28 @@ pub const cpu_fiji = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -1092,41 +944,40 @@ pub const cpu_gfx1010 = Cpu{
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_registerBanking,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_mimgR128,
+        &feature_addNoCarryInsts,
+        &feature_dpp8,
+        &feature_gfx9Insts,
         &feature_ciInsts,
+        &feature_inv2piInlineImm,
+        &feature_fastFmaf,
+        &feature_registerBanking,
         &feature_apertureRegs,
-        &feature_intClampInsts,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
+        &feature_vscnt,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_pkFmacF16Inst,
-        &feature_vscnt,
+        &feature_sdwaSdst,
         &feature_movrel,
-        &feature_fmaMixInsts,
+        &feature_localmemorysize65536,
+        &feature_noSdstCmpx,
+        &feature_pkFmacF16Inst,
         &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaOmod,
         &feature_vop3Literal,
-        &feature_dpp8,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_noDataDepHazard,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_noSdstCmpx,
-        &feature_gfx10,
+        &feature_gfx10Insts,
+        &feature_sdwa,
+        &feature_intClampInsts,
+        &feature_noDataDepHazard,
+        &feature_fmaMixInsts,
+        &feature_sdwaOmod,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1157,41 +1008,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_registerBanking,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_mimgR128,
+        &feature_addNoCarryInsts,
+        &feature_dpp8,
+        &feature_gfx9Insts,
         &feature_ciInsts,
+        &feature_inv2piInlineImm,
+        &feature_fastFmaf,
+        &feature_registerBanking,
         &feature_apertureRegs,
-        &feature_intClampInsts,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
+        &feature_vscnt,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_pkFmacF16Inst,
-        &feature_vscnt,
+        &feature_sdwaSdst,
         &feature_movrel,
-        &feature_fmaMixInsts,
+        &feature_localmemorysize65536,
+        &feature_noSdstCmpx,
+        &feature_pkFmacF16Inst,
         &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaOmod,
         &feature_vop3Literal,
-        &feature_dpp8,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_noDataDepHazard,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_noSdstCmpx,
-        &feature_gfx10,
+        &feature_gfx10Insts,
+        &feature_sdwa,
+        &feature_intClampInsts,
+        &feature_noDataDepHazard,
+        &feature_fmaMixInsts,
+        &feature_sdwaOmod,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1221,41 +1071,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_registerBanking,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_mimgR128,
+        &feature_addNoCarryInsts,
+        &feature_dpp8,
+        &feature_gfx9Insts,
         &feature_ciInsts,
+        &feature_inv2piInlineImm,
+        &feature_fastFmaf,
+        &feature_registerBanking,
         &feature_apertureRegs,
-        &feature_intClampInsts,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
+        &feature_vscnt,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_pkFmacF16Inst,
-        &feature_vscnt,
+        &feature_sdwaSdst,
         &feature_movrel,
-        &feature_fmaMixInsts,
+        &feature_localmemorysize65536,
+        &feature_noSdstCmpx,
+        &feature_pkFmacF16Inst,
         &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaOmod,
         &feature_vop3Literal,
-        &feature_dpp8,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_noDataDepHazard,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_noSdstCmpx,
-        &feature_gfx10,
+        &feature_gfx10Insts,
+        &feature_sdwa,
+        &feature_intClampInsts,
+        &feature_noDataDepHazard,
+        &feature_fmaMixInsts,
+        &feature_sdwaOmod,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1282,14 +1131,13 @@ pub const cpu_gfx600 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
         &feature_halfRate64Ops,
     },
 };
@@ -1301,14 +1149,13 @@ pub const cpu_gfx601 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
     },
 };
 
@@ -1319,17 +1166,16 @@ pub const cpu_gfx700 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1341,17 +1187,16 @@ pub const cpu_gfx701 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
         &feature_halfRate64Ops,
     },
 };
@@ -1364,17 +1209,16 @@ pub const cpu_gfx702 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount16,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1385,17 +1229,16 @@ pub const cpu_gfx703 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1406,17 +1249,16 @@ pub const cpu_gfx704 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1428,29 +1270,28 @@ pub const cpu_gfx801 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1465,29 +1306,28 @@ pub const cpu_gfx802 = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -1499,29 +1339,28 @@ pub const cpu_gfx803 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -1531,29 +1370,28 @@ pub const cpu_gfx810 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
         &feature_xnack,
     },
 };
@@ -1565,37 +1403,36 @@ pub const cpu_gfx900 = Cpu{
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
     },
@@ -1607,37 +1444,36 @@ pub const cpu_gfx902 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1652,37 +1488,36 @@ pub const cpu_gfx904 = Cpu{
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
     },
 };
@@ -1697,37 +1532,36 @@ pub const cpu_gfx906 = Cpu{
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
     },
@@ -1747,37 +1581,36 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
         &feature_maiInsts,
         &feature_mfmaInlineLiteralBug,
@@ -1792,37 +1625,36 @@ pub const cpu_gfx909 = Cpu{
     .llvm_name = "gfx909",
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
-        &feature_fp64,
-        &feature_vop3p,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_sdwaSdst,
+        &feature_r128A16,
+        &feature_addNoCarryInsts,
+        &feature_inv2piInlineImm,
+        &feature_gfx9Insts,
         &feature_ciInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_fastFmaf,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_apertureRegs,
+        &feature_scalarAtomics,
+        &feature_flatGlobalInsts,
+        &feature_fp64,
         &feature_flatScratchInsts,
+        &feature_dpp,
+        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
-        &feature_scalarAtomics,
+        &feature_sMemrealtime,
+        &feature_vop3p,
+        &feature_flatInstOffsets,
         &feature_sdwaScalar,
-        &feature_fastFmaf,
-        &feature_vgprIndexMode,
-        &feature_scalarFlatScratchInsts,
-        &feature_sdwa,
-        &feature_sdwaOmod,
+        &feature_sdwaSdst,
         &feature_localmemorysize65536,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
-        &feature_inv2piInlineImm,
-        &feature_gfx9Insts,
-        &feature_flatGlobalInsts,
         &feature_BitInsts16,
-        &feature_r128A16,
-        &feature_gfx9,
+        &feature_sdwa,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
+        &feature_sdwaOmod,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1836,14 +1668,13 @@ pub const cpu_hainan = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
     },
 };
 
@@ -1855,17 +1686,16 @@ pub const cpu_hawaii = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
         &feature_halfRate64Ops,
     },
 };
@@ -1879,29 +1709,28 @@ pub const cpu_iceland = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -1912,17 +1741,16 @@ pub const cpu_kabini = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1933,17 +1761,16 @@ pub const cpu_kaveri = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1954,17 +1781,16 @@ pub const cpu_mullins = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
+        &feature_mimgR128,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_ciInsts,
+        &feature_wavefrontsize64,
         &feature_fp64,
         &feature_movrel,
-        &feature_ciInsts,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
-        &feature_wavefrontsize64,
-        &feature_flatAddressSpace,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_seaIslands,
     },
 };
 
@@ -1975,14 +1801,13 @@ pub const cpu_oland = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
     },
 };
 
@@ -1993,14 +1818,13 @@ pub const cpu_pitcairn = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
     },
 };
 
@@ -2012,29 +1836,28 @@ pub const cpu_polaris10 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -2046,29 +1869,28 @@ pub const cpu_polaris11 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -2078,29 +1900,28 @@ pub const cpu_stoney = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
         &feature_xnack,
     },
 };
@@ -2113,14 +1934,13 @@ pub const cpu_tahiti = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
         &feature_halfRate64Ops,
     },
 };
@@ -2134,29 +1954,28 @@ pub const cpu_tonga = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
-        &feature_sMemrealtime,
-        &feature_gfx8Insts,
-        &feature_dpp,
+        &feature_mimgR128,
+        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_vgprIndexMode,
         &feature_scalarStores,
-        &feature_intClampInsts,
         &feature_gcn3Encoding,
+        &feature_fp64,
+        &feature_dpp,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_wavefrontsize64,
+        &feature_sMemrealtime,
         &feature_movrel,
-        &feature_vgprIndexMode,
-        &feature_trigReducedRange,
-        &feature_noSramEccSupport,
-        &feature_sdwa,
-        &feature_sdwaMav,
-        &feature_sdwaOutModsVopc,
         &feature_localmemorysize65536,
-        &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
         &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
         &feature_BitInsts16,
-        &feature_volcanicIslands,
+        &feature_sdwaMav,
+        &feature_sdwa,
+        &feature_sdwaOutModsVopc,
+        &feature_wavefrontsize64,
+        &feature_intClampInsts,
     },
 };
 
@@ -2167,14 +1986,13 @@ pub const cpu_verde = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_trigReducedRange,
         &feature_noSramEccSupport,
-        &feature_fp64,
-        &feature_movrel,
         &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_wavefrontsize64,
-        &feature_southernIslands,
+        &feature_localmemorysize32768,
+        &feature_fp64,
+        &feature_movrel,
     },
 };
 
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index c28ece032f875a4e330d7b35becc897016a575c4..73f2d3ead9eaa1ff6a03a9d9366e27bf92da5f77 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -1,481 +1,6 @@
 const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
-pub const feature_armv2 = Feature{
-    .name = "armv2",
-    .description = "ARMv2 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_armv2a = Feature{
-    .name = "armv2a",
-    .description = "ARMv2a architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_armv3 = Feature{
-    .name = "armv3",
-    .description = "ARMv3 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_armv3m = Feature{
-    .name = "armv3m",
-    .description = "ARMv3m architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_armv4 = Feature{
-    .name = "armv4",
-    .description = "ARMv4 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_armv4t = Feature{
-    .name = "armv4t",
-    .description = "ARMv4t architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv5t = Feature{
-    .name = "armv5t",
-    .description = "ARMv5t architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv5te = Feature{
-    .name = "armv5te",
-    .description = "ARMv5te architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv5tej = Feature{
-    .name = "armv5tej",
-    .description = "ARMv5tej architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv6 = Feature{
-    .name = "armv6",
-    .description = "ARMv6 architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_dsp,
-    },
-};
-
-pub const feature_armv6j = Feature{
-    .name = "armv6j",
-    .description = "ARMv7a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_dsp,
-    },
-};
-
-pub const feature_armv6k = Feature{
-    .name = "armv6k",
-    .description = "ARMv6k architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv6kz = Feature{
-    .name = "armv6kz",
-    .description = "ARMv6kz architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_trustzone,
-    },
-};
-
-pub const feature_armv6M = Feature{
-    .name = "armv6-m",
-    .description = "ARMv6m architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
-        &feature_strictAlign,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv6sM = Feature{
-    .name = "armv6s-m",
-    .description = "ARMv6sm architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
-        &feature_strictAlign,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv6t2 = Feature{
-    .name = "armv6t2",
-    .description = "ARMv6t2 architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_dsp,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv7A = Feature{
-    .name = "armv7-a",
-    .description = "ARMv7a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv7eM = Feature{
-    .name = "armv7e-m",
-    .description = "ARMv7em architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv7k = Feature{
-    .name = "armv7k",
-    .description = "ARMv7a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv7M = Feature{
-    .name = "armv7-m",
-    .description = "ARMv7m architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv7R = Feature{
-    .name = "armv7-r",
-    .description = "ARMv7r architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv7s = Feature{
-    .name = "armv7s",
-    .description = "ARMv7a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv7ve = Feature{
-    .name = "armv7ve",
-    .description = "ARMv7ve architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_mp,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv8A = Feature{
-    .name = "armv8-a",
-    .description = "ARMv8a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv8Mbase = Feature{
-    .name = "armv8-m.base",
-    .description = "ARMv8mBaseline architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_strictAlign,
-        &feature_v7clrex,
-        &feature_msecext8,
-        &feature_acquireRelease,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv8Mmain = Feature{
-    .name = "armv8-m.main",
-    .description = "ARMv8mMainline architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_msecext8,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv8R = Feature{
-    .name = "armv8-r",
-    .description = "ARMv8r architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_dfb,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv81A = Feature{
-    .name = "armv8.1-a",
-    .description = "ARMv81a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv81Mmain = Feature{
-    .name = "armv8.1-m.main",
-    .description = "ARMv81mMainline architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
-        &feature_hwdiv,
-        &feature_lob,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_msecext8,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_v4t,
-    },
-};
-
-pub const feature_armv82A = Feature{
-    .name = "armv8.2-a",
-    .description = "ARMv82a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv83A = Feature{
-    .name = "armv8.3-a",
-    .description = "ARMv83a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv84A = Feature{
-    .name = "armv8.4-a",
-    .description = "ARMv84a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-    },
-};
-
-pub const feature_armv85A = Feature{
-    .name = "armv8.5-a",
-    .description = "ARMv85a architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_trustzone,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_ras,
-        &feature_sb,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_v7clrex,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_d32,
-        &feature_perfmon,
-    },
-};
-
 pub const feature_msecext8 = Feature{
     .name = "8msecext",
     .description = "Enable support for ARMv8-M Security Extensions",
@@ -643,9 +168,9 @@ pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .subfeatures = &[_]*const Feature {
+        &feature_fp16,
         &feature_fpregs,
         &feature_d32,
-        &feature_fp16,
     },
 };
 
@@ -653,8 +178,8 @@ pub const feature_fpArmv8d16 = Feature{
     .name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
     .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -672,8 +197,8 @@ pub const feature_fpArmv8sp = Feature{
     .description = "Enable ARMv8 FP with no double precision",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -1119,8 +644,8 @@ pub const feature_vfp4 = Feature{
     .description = "Enable VFP4 instructions",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -1147,8 +672,8 @@ pub const feature_vfp4sp = Feature{
     .description = "Enable VFP4 instructions with no double precision",
     .subfeatures = &[_]*const Feature {
         &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -1163,8 +688,8 @@ pub const feature_virtualization = Feature{
     .name = "virtualization",
     .description = "Supports Virtualization extension",
     .subfeatures = &[_]*const Feature {
-        &feature_hwdivArm,
         &feature_hwdiv,
+        &feature_hwdivArm,
     },
 };
 
@@ -1175,472 +700,7 @@ pub const feature_zcz = Feature{
     },
 };
 
-pub const feature_mvefp = Feature{
-    .name = "mve.fp",
-    .description = "Support M-Class Vector Extension with integer and floating ops",
-    .subfeatures = &[_]*const Feature {
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_fp16,
-    },
-};
-
-pub const feature_mve = Feature{
-    .name = "mve",
-    .description = "Support M-Class Vector Extension with integer ops",
-    .subfeatures = &[_]*const Feature {
-        &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v4t = Feature{
-    .name = "v4t",
-    .description = "Support ARM v4T instructions",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v5te = Feature{
-    .name = "v5te",
-    .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v5t = Feature{
-    .name = "v5t",
-    .description = "Support ARM v5T instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v6k = Feature{
-    .name = "v6k",
-    .description = "Support ARM v6k instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v6m = Feature{
-    .name = "v6m",
-    .description = "Support ARM v6M instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v6 = Feature{
-    .name = "v6",
-    .description = "Support ARM v6 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v6t2 = Feature{
-    .name = "v6t2",
-    .description = "Support ARM v6t2 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v7 = Feature{
-    .name = "v7",
-    .description = "Support ARM v7 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_v4t,
-        &feature_perfmon,
-    },
-};
-
-pub const feature_v8m = Feature{
-    .name = "v8m",
-    .description = "Support ARM v8M Baseline instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_v8mmain = Feature{
-    .name = "v8m.main",
-    .description = "Support ARM v8M Mainline instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_v4t,
-        &feature_perfmon,
-    },
-};
-
-pub const feature_v8 = Feature{
-    .name = "v8",
-    .description = "Support ARM v8 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v81mmain = Feature{
-    .name = "v8.1m.main",
-    .description = "Support ARM v8-1M Mainline instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_v4t,
-        &feature_perfmon,
-    },
-};
-
-pub const feature_v81a = Feature{
-    .name = "v8.1a",
-    .description = "Support ARM v8.1a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v82a = Feature{
-    .name = "v8.2a",
-    .description = "Support ARM v8.2a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v83a = Feature{
-    .name = "v8.3a",
-    .description = "Support ARM v8.3a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-    },
-};
-
-pub const feature_v84a = Feature{
-    .name = "v8.4a",
-    .description = "Support ARM v8.4a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_v85a = Feature{
-    .name = "v8.5a",
-    .description = "Support ARM v8.5a instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_sb,
-        &feature_v7clrex,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-    },
-};
-
-pub const feature_iwmmxt = Feature{
-    .name = "iwmmxt",
-    .description = "ARMv5te architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_iwmmxt2 = Feature{
-    .name = "iwmmxt2",
-    .description = "ARMv5te architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
-pub const feature_softFloat = Feature{
-    .name = "soft-float",
-    .description = "Use software floating point features.",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_thumbMode = Feature{
-    .name = "thumb-mode",
-    .description = "Thumb mode",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a5 = Feature{
-    .name = "a5",
-    .description = "Cortex-A5 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a7 = Feature{
-    .name = "a7",
-    .description = "Cortex-A7 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a8 = Feature{
-    .name = "a8",
-    .description = "Cortex-A8 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a9 = Feature{
-    .name = "a9",
-    .description = "Cortex-A9 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a12 = Feature{
-    .name = "a12",
-    .description = "Cortex-A12 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a15 = Feature{
-    .name = "a15",
-    .description = "Cortex-A15 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a17 = Feature{
-    .name = "a17",
-    .description = "Cortex-A17 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a32 = Feature{
-    .name = "a32",
-    .description = "Cortex-A32 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a35 = Feature{
-    .name = "a35",
-    .description = "Cortex-A35 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a53 = Feature{
-    .name = "a53",
-    .description = "Cortex-A53 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a55 = Feature{
-    .name = "a55",
-    .description = "Cortex-A55 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a57 = Feature{
-    .name = "a57",
-    .description = "Cortex-A57 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a72 = Feature{
-    .name = "a72",
-    .description = "Cortex-A72 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a73 = Feature{
-    .name = "a73",
-    .description = "Cortex-A73 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a75 = Feature{
-    .name = "a75",
-    .description = "Cortex-A75 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_a76 = Feature{
-    .name = "a76",
-    .description = "Cortex-A76 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_exynos = Feature{
-    .name = "exynos",
-    .description = "Samsung Exynos processors",
-    .subfeatures = &[_]*const Feature {
-        &feature_useAa,
-        &feature_hwdivArm,
-        &feature_zcz,
-        &feature_hwdiv,
-        &feature_expandFpMlx,
-        &feature_slowVdup32,
-        &feature_fpregs,
-        &feature_slowVgetlni32,
-        &feature_profUnpr,
-        &feature_wideStrideVfp,
-        &feature_retAddrStack,
-        &feature_fuseAes,
-        &feature_fuseLiterals,
-        &feature_crc,
-        &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_d32,
-    },
-};
-
-pub const feature_krait = Feature{
-    .name = "krait",
-    .description = "Qualcomm Krait processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_kryo = Feature{
-    .name = "kryo",
-    .description = "Qualcomm Kryo processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_m3 = Feature{
-    .name = "m3",
-    .description = "Cortex-M3 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_r4 = Feature{
-    .name = "r4",
-    .description = "Cortex-R4 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_r5 = Feature{
-    .name = "r5",
-    .description = "Cortex-R5 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_r7 = Feature{
-    .name = "r7",
-    .description = "Cortex-R7 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_r52 = Feature{
-    .name = "r52",
-    .description = "Cortex-R52 ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_swift = Feature{
-    .name = "swift",
-    .description = "Swift ARM processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_xscale = Feature{
-    .name = "xscale",
-    .description = "ARMv5te architecture",
-    .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-    },
-};
-
 pub const features = &[_]*const Feature {
-    &feature_armv2,
-    &feature_armv2a,
-    &feature_armv3,
-    &feature_armv3m,
-    &feature_armv4,
-    &feature_armv4t,
-    &feature_armv5t,
-    &feature_armv5te,
-    &feature_armv5tej,
-    &feature_armv6,
-    &feature_armv6j,
-    &feature_armv6k,
-    &feature_armv6kz,
-    &feature_armv6M,
-    &feature_armv6sM,
-    &feature_armv6t2,
-    &feature_armv7A,
-    &feature_armv7eM,
-    &feature_armv7k,
-    &feature_armv7M,
-    &feature_armv7R,
-    &feature_armv7s,
-    &feature_armv7ve,
-    &feature_armv8A,
-    &feature_armv8Mbase,
-    &feature_armv8Mmain,
-    &feature_armv8R,
-    &feature_armv81A,
-    &feature_armv81Mmain,
-    &feature_armv82A,
-    &feature_armv83A,
-    &feature_armv84A,
-    &feature_armv85A,
     &feature_msecext8,
     &feature_aclass,
     &feature_aes,
@@ -1734,63 +794,12 @@ pub const features = &[_]*const Feature {
     &feature_vmlxForwarding,
     &feature_virtualization,
     &feature_zcz,
-    &feature_mvefp,
-    &feature_mve,
-    &feature_v4t,
-    &feature_v5te,
-    &feature_v5t,
-    &feature_v6k,
-    &feature_v6m,
-    &feature_v6,
-    &feature_v6t2,
-    &feature_v7,
-    &feature_v8m,
-    &feature_v8mmain,
-    &feature_v8,
-    &feature_v81mmain,
-    &feature_v81a,
-    &feature_v82a,
-    &feature_v83a,
-    &feature_v84a,
-    &feature_v85a,
-    &feature_iwmmxt,
-    &feature_iwmmxt2,
-    &feature_softFloat,
-    &feature_thumbMode,
-    &feature_a5,
-    &feature_a7,
-    &feature_a8,
-    &feature_a9,
-    &feature_a12,
-    &feature_a15,
-    &feature_a17,
-    &feature_a32,
-    &feature_a35,
-    &feature_a53,
-    &feature_a55,
-    &feature_a57,
-    &feature_a72,
-    &feature_a73,
-    &feature_a75,
-    &feature_a76,
-    &feature_exynos,
-    &feature_krait,
-    &feature_kryo,
-    &feature_m3,
-    &feature_r4,
-    &feature_r5,
-    &feature_r7,
-    &feature_r52,
-    &feature_swift,
-    &feature_xscale,
 };
 
 pub const cpu_arm1020e = Cpu{
     .name = "arm1020e",
     .llvm_name = "arm1020e",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -1798,8 +807,6 @@ pub const cpu_arm1020t = Cpu{
     .name = "arm1020t",
     .llvm_name = "arm1020t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5t,
     },
 };
 
@@ -1807,8 +814,6 @@ pub const cpu_arm1022e = Cpu{
     .name = "arm1022e",
     .llvm_name = "arm1022e",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -1816,8 +821,6 @@ pub const cpu_arm10e = Cpu{
     .name = "arm10e",
     .llvm_name = "arm10e",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -1825,8 +828,6 @@ pub const cpu_arm10tdmi = Cpu{
     .name = "arm10tdmi",
     .llvm_name = "arm10tdmi",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5t,
     },
 };
 
@@ -1834,9 +835,7 @@ pub const cpu_arm1136jS = Cpu{
     .name = "arm1136j-s",
     .llvm_name = "arm1136j-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_dsp,
-        &feature_armv6,
     },
 };
 
@@ -1844,9 +843,7 @@ pub const cpu_arm1136jfS = Cpu{
     .name = "arm1136jf-s",
     .llvm_name = "arm1136jf-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_dsp,
-        &feature_armv6,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -1857,10 +854,8 @@ pub const cpu_arm1156t2S = Cpu{
     .name = "arm1156t2-s",
     .llvm_name = "arm1156t2-s",
     .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
-        &feature_v4t,
-        &feature_armv6t2,
+        &feature_thumb2,
     },
 };
 
@@ -1868,10 +863,8 @@ pub const cpu_arm1156t2fS = Cpu{
     .name = "arm1156t2f-s",
     .llvm_name = "arm1156t2f-s",
     .subfeatures = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
-        &feature_v4t,
-        &feature_armv6t2,
+        &feature_thumb2,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -1882,9 +875,7 @@ pub const cpu_arm1176jS = Cpu{
     .name = "arm1176j-s",
     .llvm_name = "arm1176j-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_trustzone,
-        &feature_armv6kz,
     },
 };
 
@@ -1892,9 +883,7 @@ pub const cpu_arm1176jzS = Cpu{
     .name = "arm1176jz-s",
     .llvm_name = "arm1176jz-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_trustzone,
-        &feature_armv6kz,
     },
 };
 
@@ -1902,9 +891,7 @@ pub const cpu_arm1176jzfS = Cpu{
     .name = "arm1176jzf-s",
     .llvm_name = "arm1176jzf-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
         &feature_trustzone,
-        &feature_armv6kz,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -1915,8 +902,6 @@ pub const cpu_arm710t = Cpu{
     .name = "arm710t",
     .llvm_name = "arm710t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1924,8 +909,6 @@ pub const cpu_arm720t = Cpu{
     .name = "arm720t",
     .llvm_name = "arm720t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1933,8 +916,6 @@ pub const cpu_arm7tdmi = Cpu{
     .name = "arm7tdmi",
     .llvm_name = "arm7tdmi",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1942,8 +923,6 @@ pub const cpu_arm7tdmiS = Cpu{
     .name = "arm7tdmi-s",
     .llvm_name = "arm7tdmi-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1951,7 +930,6 @@ pub const cpu_arm8 = Cpu{
     .name = "arm8",
     .llvm_name = "arm8",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -1959,7 +937,6 @@ pub const cpu_arm810 = Cpu{
     .name = "arm810",
     .llvm_name = "arm810",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -1967,8 +944,6 @@ pub const cpu_arm9 = Cpu{
     .name = "arm9",
     .llvm_name = "arm9",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1976,8 +951,6 @@ pub const cpu_arm920 = Cpu{
     .name = "arm920",
     .llvm_name = "arm920",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1985,8 +958,6 @@ pub const cpu_arm920t = Cpu{
     .name = "arm920t",
     .llvm_name = "arm920t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -1994,8 +965,6 @@ pub const cpu_arm922t = Cpu{
     .name = "arm922t",
     .llvm_name = "arm922t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -2003,8 +972,6 @@ pub const cpu_arm926ejS = Cpu{
     .name = "arm926ej-s",
     .llvm_name = "arm926ej-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -2012,8 +979,6 @@ pub const cpu_arm940t = Cpu{
     .name = "arm940t",
     .llvm_name = "arm940t",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -2021,8 +986,6 @@ pub const cpu_arm946eS = Cpu{
     .name = "arm946e-s",
     .llvm_name = "arm946e-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -2030,8 +993,6 @@ pub const cpu_arm966eS = Cpu{
     .name = "arm966e-s",
     .llvm_name = "arm966e-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -2039,8 +1000,6 @@ pub const cpu_arm968eS = Cpu{
     .name = "arm968e-s",
     .llvm_name = "arm968e-s",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -2048,8 +1007,6 @@ pub const cpu_arm9e = Cpu{
     .name = "arm9e",
     .llvm_name = "arm9e",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -2057,8 +1014,6 @@ pub const cpu_arm9tdmi = Cpu{
     .name = "arm9tdmi",
     .llvm_name = "arm9tdmi",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -2066,16 +1021,14 @@ pub const cpu_cortexA12 = Cpu{
     .name = "cortex-a12",
     .llvm_name = "cortex-a12",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -2083,10 +1036,9 @@ pub const cpu_cortexA12 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdivArm,
         &feature_hwdiv,
+        &feature_hwdivArm,
         &feature_virtualization,
-        &feature_a12,
     },
 };
 
@@ -2094,16 +1046,14 @@ pub const cpu_cortexA15 = Cpu{
     .name = "cortex-a15",
     .llvm_name = "cortex-a15",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_dontWidenVmovs,
@@ -2114,10 +1064,9 @@ pub const cpu_cortexA15 = Cpu{
         &feature_trustzone,
         &feature_fp16,
         &feature_vfp4,
-        &feature_hwdivArm,
         &feature_hwdiv,
+        &feature_hwdivArm,
         &feature_virtualization,
-        &feature_a15,
     },
 };
 
@@ -2125,16 +1074,14 @@ pub const cpu_cortexA17 = Cpu{
     .name = "cortex-a17",
     .llvm_name = "cortex-a17",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -2142,10 +1089,9 @@ pub const cpu_cortexA17 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdivArm,
         &feature_hwdiv,
+        &feature_hwdivArm,
         &feature_virtualization,
-        &feature_a17,
     },
 };
 
@@ -2153,23 +1099,21 @@ pub const cpu_cortexA32 = Cpu{
     .name = "cortex-a32",
     .llvm_name = "cortex-a32",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -2178,25 +1122,22 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
-        &feature_a35,
     },
 };
 
@@ -2204,16 +1145,14 @@ pub const cpu_cortexA5 = Cpu{
     .name = "cortex-a5",
     .llvm_name = "cortex-a5",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_mp,
@@ -2222,7 +1161,6 @@ pub const cpu_cortexA5 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_a5,
     },
 };
 
@@ -2230,26 +1168,23 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
         &feature_fpao,
-        &feature_a53,
     },
 };
 
@@ -2257,26 +1192,23 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_dotprod,
-        &feature_a55,
     },
 };
 
@@ -2284,28 +1216,25 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
         &feature_crypto,
         &feature_fpao,
-        &feature_a57,
     },
 };
 
@@ -2313,16 +1242,14 @@ pub const cpu_cortexA7 = Cpu{
     .name = "cortex-a7",
     .llvm_name = "cortex-a7",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -2332,10 +1259,9 @@ pub const cpu_cortexA7 = Cpu{
         &feature_fp16,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_hwdivArm,
         &feature_hwdiv,
+        &feature_hwdivArm,
         &feature_virtualization,
-        &feature_a7,
     },
 };
 
@@ -2343,25 +1269,22 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
-        &feature_a72,
     },
 };
 
@@ -2369,25 +1292,22 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
-        &feature_a73,
     },
 };
 
@@ -2395,26 +1315,23 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_dotprod,
-        &feature_a75,
     },
 };
 
@@ -2422,28 +1339,25 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_a76,
     },
 };
 
@@ -2451,28 +1365,25 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_a76,
     },
 };
 
@@ -2480,16 +1391,14 @@ pub const cpu_cortexA8 = Cpu{
     .name = "cortex-a8",
     .llvm_name = "cortex-a8",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -2497,7 +1406,6 @@ pub const cpu_cortexA8 = Cpu{
         &feature_slowFpBrcc,
         &feature_trustzone,
         &feature_vmlxForwarding,
-        &feature_a8,
     },
 };
 
@@ -2505,16 +1413,14 @@ pub const cpu_cortexA9 = Cpu{
     .name = "cortex-a9",
     .llvm_name = "cortex-a9",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_expandFpMlx,
@@ -2527,7 +1433,6 @@ pub const cpu_cortexA9 = Cpu{
         &feature_preferVmovsr,
         &feature_trustzone,
         &feature_vmlxForwarding,
-        &feature_a9,
     },
 };
 
@@ -2536,12 +1441,9 @@ pub const cpu_cortexM0 = Cpu{
     .llvm_name = "cortex-m0",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv6M,
+        &feature_mclass,
     },
 };
 
@@ -2550,12 +1452,9 @@ pub const cpu_cortexM0plus = Cpu{
     .llvm_name = "cortex-m0plus",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv6M,
+        &feature_mclass,
     },
 };
 
@@ -2564,12 +1463,9 @@ pub const cpu_cortexM1 = Cpu{
     .llvm_name = "cortex-m1",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv6M,
+        &feature_mclass,
     },
 };
 
@@ -2577,17 +1473,14 @@ pub const cpu_cortexM23 = Cpu{
     .name = "cortex-m23",
     .llvm_name = "cortex-m23",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_strictAlign,
-        &feature_v7clrex,
         &feature_msecext8,
+        &feature_db,
+        &feature_strictAlign,
         &feature_acquireRelease,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv8Mbase,
+        &feature_v7clrex,
+        &feature_mclass,
         &feature_noMovt,
     },
 };
@@ -2596,21 +1489,17 @@ pub const cpu_cortexM3 = Cpu{
     .name = "cortex-m3",
     .llvm_name = "cortex-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv7M,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_loopAlign,
         &feature_useAa,
         &feature_useMisched,
-        &feature_m3,
     },
 };
 
@@ -2618,18 +1507,15 @@ pub const cpu_cortexM33 = Cpu{
     .name = "cortex-m33",
     .llvm_name = "cortex-m33",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_msecext8,
+        &feature_db,
         &feature_acquireRelease,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv8Mmain,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -2646,18 +1532,15 @@ pub const cpu_cortexM35p = Cpu{
     .name = "cortex-m35p",
     .llvm_name = "cortex-m35p",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_msecext8,
+        &feature_db,
         &feature_acquireRelease,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv8Mmain,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -2674,17 +1557,14 @@ pub const cpu_cortexM4 = Cpu{
     .name = "cortex-m4",
     .llvm_name = "cortex-m4",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_dsp,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv7eM,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
         &feature_loopAlign,
@@ -2700,19 +1580,16 @@ pub const cpu_cortexM7 = Cpu{
     .name = "cortex-m7",
     .llvm_name = "cortex-m7",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_dsp,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv7eM,
-        &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_fp16,
+        &feature_fpregs,
         &feature_fpArmv8d16,
     },
 };
@@ -2721,18 +1598,15 @@ pub const cpu_cortexR4 = Cpu{
     .name = "cortex-r4",
     .llvm_name = "cortex-r4",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
-        &feature_v4t,
-        &feature_armv7R,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
-        &feature_r4,
     },
 };
 
@@ -2740,22 +1614,19 @@ pub const cpu_cortexR4f = Cpu{
     .name = "cortex-r4f",
     .llvm_name = "cortex-r4f",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
-        &feature_v4t,
-        &feature_armv7R,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_slowFpBrcc,
         &feature_fpregs,
         &feature_vfp3d16,
-        &feature_r4,
     },
 };
 
@@ -2763,15 +1634,13 @@ pub const cpu_cortexR5 = Cpu{
     .name = "cortex-r5",
     .llvm_name = "cortex-r5",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
-        &feature_v4t,
-        &feature_armv7R,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
         &feature_retAddrStack,
@@ -2779,7 +1648,6 @@ pub const cpu_cortexR5 = Cpu{
         &feature_slowFpBrcc,
         &feature_fpregs,
         &feature_vfp3d16,
-        &feature_r5,
     },
 };
 
@@ -2787,27 +1655,24 @@ pub const cpu_cortexR52 = Cpu{
     .name = "cortex-r52",
     .llvm_name = "cortex-r52",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_rclass,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_dfb,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
         &feature_perfmon,
-        &feature_crc,
         &feature_mp,
-        &feature_acquireRelease,
+        &feature_dfb,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_fp16,
-        &feature_d32,
-        &feature_armv8R,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_fpao,
         &feature_useAa,
         &feature_useMisched,
-        &feature_r52,
     },
 };
 
@@ -2815,15 +1680,13 @@ pub const cpu_cortexR7 = Cpu{
     .name = "cortex-r7",
     .llvm_name = "cortex-r7",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
-        &feature_v4t,
-        &feature_armv7R,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -2833,7 +1696,6 @@ pub const cpu_cortexR7 = Cpu{
         &feature_slowFpBrcc,
         &feature_fpregs,
         &feature_vfp3d16,
-        &feature_r7,
     },
 };
 
@@ -2841,15 +1703,13 @@ pub const cpu_cortexR8 = Cpu{
     .name = "cortex-r8",
     .llvm_name = "cortex-r8",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
         &feature_hwdiv,
         &feature_rclass,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
-        &feature_v4t,
-        &feature_armv7R,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -2866,23 +1726,21 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_crypto,
@@ -2893,7 +1751,6 @@ pub const cpu_cyclone = Cpu{
         &feature_useMisched,
         &feature_vfp4,
         &feature_zcz,
-        &feature_swift,
     },
 };
 
@@ -2901,8 +1758,6 @@ pub const cpu_ep9312 = Cpu{
     .name = "ep9312",
     .llvm_name = "ep9312",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv4t,
     },
 };
 
@@ -2910,37 +1765,34 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
-        &feature_useAa,
-        &feature_zcz,
-        &feature_expandFpMlx,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_slowVdup32,
+        &feature_expandFpMlx,
         &feature_slowVgetlni32,
-        &feature_profUnpr,
+        &feature_fuseLiterals,
         &feature_wideStrideVfp,
+        &feature_slowFpBrcc,
         &feature_retAddrStack,
+        &feature_dontWidenVmovs,
+        &feature_zcz,
         &feature_fuseAes,
-        &feature_fuseLiterals,
         &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_exynos,
+        &feature_profUnpr,
+        &feature_useAa,
     },
 };
 
@@ -2948,37 +1800,34 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
-        &feature_useAa,
-        &feature_zcz,
-        &feature_expandFpMlx,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_slowVdup32,
+        &feature_expandFpMlx,
         &feature_slowVgetlni32,
-        &feature_profUnpr,
+        &feature_fuseLiterals,
         &feature_wideStrideVfp,
+        &feature_slowFpBrcc,
         &feature_retAddrStack,
+        &feature_dontWidenVmovs,
+        &feature_zcz,
         &feature_fuseAes,
-        &feature_fuseLiterals,
         &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_exynos,
+        &feature_profUnpr,
+        &feature_useAa,
     },
 };
 
@@ -2986,37 +1835,34 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
-        &feature_useAa,
-        &feature_zcz,
-        &feature_expandFpMlx,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_slowVdup32,
+        &feature_expandFpMlx,
         &feature_slowVgetlni32,
-        &feature_profUnpr,
+        &feature_fuseLiterals,
         &feature_wideStrideVfp,
+        &feature_slowFpBrcc,
         &feature_retAddrStack,
+        &feature_dontWidenVmovs,
+        &feature_zcz,
         &feature_fuseAes,
-        &feature_fuseLiterals,
         &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_exynos,
+        &feature_profUnpr,
+        &feature_useAa,
     },
 };
 
@@ -3024,40 +1870,37 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_useAa,
-        &feature_zcz,
-        &feature_expandFpMlx,
         &feature_slowVdup32,
+        &feature_expandFpMlx,
         &feature_slowVgetlni32,
-        &feature_profUnpr,
+        &feature_fuseLiterals,
         &feature_wideStrideVfp,
+        &feature_slowFpBrcc,
         &feature_retAddrStack,
+        &feature_dontWidenVmovs,
+        &feature_zcz,
         &feature_fuseAes,
-        &feature_fuseLiterals,
         &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_exynos,
+        &feature_profUnpr,
+        &feature_useAa,
     },
 };
 
@@ -3065,40 +1908,37 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_useAa,
-        &feature_zcz,
-        &feature_expandFpMlx,
         &feature_slowVdup32,
+        &feature_expandFpMlx,
         &feature_slowVgetlni32,
-        &feature_profUnpr,
+        &feature_fuseLiterals,
         &feature_wideStrideVfp,
+        &feature_slowFpBrcc,
         &feature_retAddrStack,
+        &feature_dontWidenVmovs,
+        &feature_zcz,
         &feature_fuseAes,
-        &feature_fuseLiterals,
         &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_dontWidenVmovs,
-        &feature_exynos,
+        &feature_profUnpr,
+        &feature_useAa,
     },
 };
 
@@ -3113,8 +1953,6 @@ pub const cpu_iwmmxt = Cpu{
     .name = "iwmmxt",
     .llvm_name = "iwmmxt",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
@@ -3122,16 +1960,14 @@ pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_fp16,
@@ -3141,7 +1977,6 @@ pub const cpu_krait = Cpu{
         &feature_muxedUnits,
         &feature_vfp4,
         &feature_vmlxForwarding,
-        &feature_krait,
     },
 };
 
@@ -3149,25 +1984,22 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
-        &feature_v7clrex,
-        &feature_aclass,
-        &feature_crc,
-        &feature_mp,
+        &feature_db,
         &feature_acquireRelease,
-        &feature_fp16,
-        &feature_perfmon,
         &feature_d32,
-        &feature_armv8A,
+        &feature_perfmon,
+        &feature_mp,
+        &feature_hwdivArm,
+        &feature_dsp,
+        &feature_aclass,
+        &feature_fp16,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
-        &feature_kryo,
     },
 };
 
@@ -3175,8 +2007,6 @@ pub const cpu_mpcore = Cpu{
     .name = "mpcore",
     .llvm_name = "mpcore",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv6k,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -3187,8 +2017,6 @@ pub const cpu_mpcorenovfp = Cpu{
     .name = "mpcorenovfp",
     .llvm_name = "mpcorenovfp",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv6k,
     },
 };
 
@@ -3196,24 +2024,22 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_dsp,
-        &feature_hwdivArm,
         &feature_hwdiv,
         &feature_trustzone,
         &feature_fpregs,
-        &feature_v4t,
-        &feature_thumb2,
+        &feature_db,
+        &feature_acquireRelease,
+        &feature_d32,
+        &feature_perfmon,
+        &feature_mp,
         &feature_ras,
-        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_dsp,
         &feature_aclass,
-        &feature_crc,
-        &feature_mp,
-        &feature_acquireRelease,
         &feature_fp16,
-        &feature_perfmon,
-        &feature_d32,
-        &feature_armv82A,
+        &feature_v7clrex,
+        &feature_crc,
+        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
     },
@@ -3224,12 +2050,9 @@ pub const cpu_sc000 = Cpu{
     .llvm_name = "sc000",
     .subfeatures = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
-        &feature_thumbMode,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv6M,
+        &feature_mclass,
     },
 };
 
@@ -3237,20 +2060,16 @@ pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
     .subfeatures = &[_]*const Feature {
-        &feature_db,
-        &feature_mclass,
         &feature_hwdiv,
-        &feature_thumbMode,
-        &feature_thumb2,
-        &feature_v7clrex,
+        &feature_db,
         &feature_perfmon,
         &feature_noarm,
-        &feature_v4t,
-        &feature_armv7M,
+        &feature_v7clrex,
+        &feature_mclass,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_useAa,
         &feature_useMisched,
-        &feature_m3,
     },
 };
 
@@ -3258,7 +2077,6 @@ pub const cpu_strongarm = Cpu{
     .name = "strongarm",
     .llvm_name = "strongarm",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -3266,7 +2084,6 @@ pub const cpu_strongarm110 = Cpu{
     .name = "strongarm110",
     .llvm_name = "strongarm110",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -3274,7 +2091,6 @@ pub const cpu_strongarm1100 = Cpu{
     .name = "strongarm1100",
     .llvm_name = "strongarm1100",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -3282,7 +2098,6 @@ pub const cpu_strongarm1110 = Cpu{
     .name = "strongarm1110",
     .llvm_name = "strongarm1110",
     .subfeatures = &[_]*const Feature {
-        &feature_armv4,
     },
 };
 
@@ -3290,16 +2105,14 @@ pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
     .subfeatures = &[_]*const Feature {
+        &feature_fpregs,
         &feature_db,
+        &feature_d32,
+        &feature_perfmon,
         &feature_dsp,
-        &feature_fpregs,
-        &feature_thumb2,
-        &feature_v7clrex,
         &feature_aclass,
-        &feature_perfmon,
-        &feature_v4t,
-        &feature_d32,
-        &feature_armv7A,
+        &feature_v7clrex,
+        &feature_thumb2,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
@@ -3320,7 +2133,6 @@ pub const cpu_swift = Cpu{
         &feature_wideStrideVfp,
         &feature_fp16,
         &feature_vfp4,
-        &feature_swift,
     },
 };
 
@@ -3328,8 +2140,6 @@ pub const cpu_xscale = Cpu{
     .name = "xscale",
     .llvm_name = "xscale",
     .subfeatures = &[_]*const Feature {
-        &feature_v4t,
-        &feature_armv5te,
     },
 };
 
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 4ca020d897b10d56f842da34d9c28f693d44e491..79cbb04dc458fb5e9e1f80cb492f90df69b9c4b4 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -1,227 +1,6 @@
 const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
-pub const feature_avr0 = Feature{
-    .name = "avr0",
-    .description = "The device is a part of the avr0 family",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_avr1 = Feature{
-    .name = "avr1",
-    .description = "The device is a part of the avr1 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_lpm,
-        &feature_avr0,
-    },
-};
-
-pub const feature_avr2 = Feature{
-    .name = "avr2",
-    .description = "The device is a part of the avr2 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_lpm,
-        &feature_avr0,
-    },
-};
-
-pub const feature_avr3 = Feature{
-    .name = "avr3",
-    .description = "The device is a part of the avr3 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_lpm,
-        &feature_avr0,
-    },
-};
-
-pub const feature_avr4 = Feature{
-    .name = "avr4",
-    .description = "The device is a part of the avr4 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avr5 = Feature{
-    .name = "avr5",
-    .description = "The device is a part of the avr5 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avr6 = Feature{
-    .name = "avr6",
-    .description = "The device is a part of the avr6 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_elpmx,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avr25 = Feature{
-    .name = "avr25",
-    .description = "The device is a part of the avr25 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_break,
-        &feature_lpm,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avr31 = Feature{
-    .name = "avr31",
-    .description = "The device is a part of the avr31 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpm,
-        &feature_lpm,
-        &feature_avr0,
-    },
-};
-
-pub const feature_avr35 = Feature{
-    .name = "avr35",
-    .description = "The device is a part of the avr35 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_break,
-        &feature_lpm,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avr51 = Feature{
-    .name = "avr51",
-    .description = "The device is a part of the avr51 family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_elpmx,
-        &feature_avr0,
-        &feature_movw,
-    },
-};
-
-pub const feature_avrtiny = Feature{
-    .name = "avrtiny",
-    .description = "The device is a part of the avrtiny family",
-    .subfeatures = &[_]*const Feature {
-        &feature_avr0,
-        &feature_sram,
-        &feature_tinyencoding,
-        &feature_break,
-    },
-};
-
-pub const feature_xmega = Feature{
-    .name = "xmega",
-    .description = "The device is a part of the xmega family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpm,
-        &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_elpmx,
-        &feature_avr0,
-        &feature_movw,
-        &feature_spmx,
-    },
-};
-
-pub const feature_xmegau = Feature{
-    .name = "xmegau",
-    .description = "The device is a part of the xmegau family",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
-        &feature_rmw,
-        &feature_addsubiw,
-        &feature_elpm,
-        &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
-        &feature_elpmx,
-        &feature_avr0,
-        &feature_movw,
-        &feature_spmx,
-    },
-};
-
 pub const feature_addsubiw = Feature{
     .name = "addsubiw",
     .description = "Enable 16-bit register-immediate addition and subtraction instructions",
@@ -334,29 +113,6 @@ pub const feature_sram = Feature{
     },
 };
 
-pub const feature_special = Feature{
-    .name = "special",
-    .description = "Enable use of the entire instruction set - used for debugging",
-    .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_rmw,
-        &feature_sram,
-        &feature_elpm,
-        &feature_addsubiw,
-        &feature_eijmpcall,
-        &feature_elpmx,
-        &feature_break,
-        &feature_lpm,
-        &feature_mul,
-        &feature_movw,
-        &feature_spmx,
-    },
-};
-
 pub const feature_smallstack = Feature{
     .name = "smallstack",
     .description = "The device has an 8-bit stack pointer",
@@ -372,20 +128,6 @@ pub const feature_tinyencoding = Feature{
 };
 
 pub const features = &[_]*const Feature {
-    &feature_avr0,
-    &feature_avr1,
-    &feature_avr2,
-    &feature_avr3,
-    &feature_avr4,
-    &feature_avr5,
-    &feature_avr6,
-    &feature_avr25,
-    &feature_avr31,
-    &feature_avr35,
-    &feature_avr51,
-    &feature_avrtiny,
-    &feature_xmega,
-    &feature_xmegau,
     &feature_addsubiw,
     &feature_break,
     &feature_des,
@@ -402,7 +144,6 @@ pub const features = &[_]*const Feature {
     &feature_spm,
     &feature_spmx,
     &feature_sram,
-    &feature_special,
     &feature_smallstack,
     &feature_tinyencoding,
 };
@@ -411,14 +152,12 @@ pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr31,
+        &feature_elpm,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -426,13 +165,11 @@ pub const cpu_at43usb355 = Cpu{
     .name = "at43usb355",
     .llvm_name = "at43usb355",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -440,13 +177,11 @@ pub const cpu_at76c711 = Cpu{
     .name = "at76c711",
     .llvm_name = "at76c711",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -454,12 +189,10 @@ pub const cpu_at86rf401 = Cpu{
     .name = "at86rf401",
     .llvm_name = "at86rf401",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
     },
@@ -469,12 +202,10 @@ pub const cpu_at90c8534 = Cpu{
     .name = "at90c8534",
     .llvm_name = "at90c8534",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -482,20 +213,18 @@ pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -503,18 +232,16 @@ pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -522,18 +249,16 @@ pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -541,17 +266,15 @@ pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -559,18 +282,16 @@ pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -578,17 +299,15 @@ pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -596,18 +315,16 @@ pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -615,17 +332,15 @@ pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -633,17 +348,15 @@ pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -651,18 +364,16 @@ pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -670,17 +381,15 @@ pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -688,17 +397,15 @@ pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -706,7 +413,6 @@ pub const cpu_at90s1200 = Cpu{
     .name = "at90s1200",
     .llvm_name = "at90s1200",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
     },
 };
 
@@ -714,12 +420,10 @@ pub const cpu_at90s2313 = Cpu{
     .name = "at90s2313",
     .llvm_name = "at90s2313",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -727,12 +431,10 @@ pub const cpu_at90s2323 = Cpu{
     .name = "at90s2323",
     .llvm_name = "at90s2323",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -740,12 +442,10 @@ pub const cpu_at90s2333 = Cpu{
     .name = "at90s2333",
     .llvm_name = "at90s2333",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -753,12 +453,10 @@ pub const cpu_at90s2343 = Cpu{
     .name = "at90s2343",
     .llvm_name = "at90s2343",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -766,12 +464,10 @@ pub const cpu_at90s4414 = Cpu{
     .name = "at90s4414",
     .llvm_name = "at90s4414",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -779,12 +475,10 @@ pub const cpu_at90s4433 = Cpu{
     .name = "at90s4433",
     .llvm_name = "at90s4433",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -792,12 +486,10 @@ pub const cpu_at90s4434 = Cpu{
     .name = "at90s4434",
     .llvm_name = "at90s4434",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -805,12 +497,10 @@ pub const cpu_at90s8515 = Cpu{
     .name = "at90s8515",
     .llvm_name = "at90s8515",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -818,12 +508,10 @@ pub const cpu_at90s8535 = Cpu{
     .name = "at90s8535",
     .llvm_name = "at90s8535",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -831,18 +519,16 @@ pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -850,20 +536,18 @@ pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -871,20 +555,18 @@ pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -892,17 +574,15 @@ pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -910,18 +590,16 @@ pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -929,18 +607,16 @@ pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -948,17 +624,15 @@ pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -966,13 +640,11 @@ pub const cpu_at94k = Cpu{
     .name = "at94k",
     .llvm_name = "at94k",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -983,16 +655,14 @@ pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -1000,17 +670,15 @@ pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -1018,18 +686,16 @@ pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1037,18 +703,16 @@ pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1056,17 +720,15 @@ pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -1074,17 +736,15 @@ pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -1092,17 +752,15 @@ pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -1110,14 +768,12 @@ pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr31,
+        &feature_elpm,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -1125,20 +781,18 @@ pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1146,20 +800,18 @@ pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1167,20 +819,18 @@ pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1188,20 +838,18 @@ pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1209,20 +857,18 @@ pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1230,20 +876,18 @@ pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1251,20 +895,18 @@ pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1272,20 +914,18 @@ pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1293,20 +933,18 @@ pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -1314,18 +952,16 @@ pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1333,13 +969,11 @@ pub const cpu_atmega161 = Cpu{
     .name = "atmega161",
     .llvm_name = "atmega161",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1351,18 +985,16 @@ pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1370,13 +1002,11 @@ pub const cpu_atmega163 = Cpu{
     .name = "atmega163",
     .llvm_name = "atmega163",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1388,18 +1018,16 @@ pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1407,18 +1035,16 @@ pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1426,18 +1052,16 @@ pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1445,18 +1069,16 @@ pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1464,18 +1086,16 @@ pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1483,18 +1103,16 @@ pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1502,18 +1120,16 @@ pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1521,18 +1137,16 @@ pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1540,18 +1154,16 @@ pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1559,18 +1171,16 @@ pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1578,18 +1188,16 @@ pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1597,18 +1205,16 @@ pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1616,18 +1222,16 @@ pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1635,18 +1239,16 @@ pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1654,18 +1256,16 @@ pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1673,18 +1273,16 @@ pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1692,18 +1290,16 @@ pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1711,18 +1307,16 @@ pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1730,18 +1324,16 @@ pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1749,18 +1341,16 @@ pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1768,18 +1358,16 @@ pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1787,17 +1375,15 @@ pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -1805,18 +1391,16 @@ pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1824,20 +1408,18 @@ pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr6,
     },
 };
 
@@ -1845,20 +1427,18 @@ pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr6,
     },
 };
 
@@ -1866,20 +1446,18 @@ pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr6,
     },
 };
 
@@ -1887,20 +1465,18 @@ pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr6,
     },
 };
 
@@ -1908,18 +1484,16 @@ pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1927,18 +1501,16 @@ pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1946,18 +1518,16 @@ pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1965,18 +1535,16 @@ pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -1984,18 +1552,16 @@ pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2003,18 +1569,16 @@ pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2022,18 +1586,16 @@ pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2041,18 +1603,16 @@ pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2060,18 +1620,16 @@ pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2079,18 +1637,16 @@ pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2098,18 +1654,16 @@ pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2117,18 +1671,16 @@ pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2136,18 +1688,16 @@ pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2155,18 +1705,16 @@ pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2174,18 +1722,16 @@ pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2193,18 +1739,16 @@ pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2212,18 +1756,16 @@ pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2231,18 +1773,16 @@ pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2250,18 +1790,16 @@ pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2269,18 +1807,16 @@ pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2288,18 +1824,16 @@ pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2307,18 +1841,16 @@ pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2326,18 +1858,16 @@ pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2345,18 +1875,16 @@ pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2364,18 +1892,16 @@ pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2383,18 +1909,16 @@ pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2402,18 +1926,16 @@ pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2421,18 +1943,16 @@ pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2440,17 +1960,15 @@ pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -2458,18 +1976,16 @@ pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2477,18 +1993,16 @@ pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2496,18 +2010,16 @@ pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2515,17 +2027,15 @@ pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -2533,17 +2043,15 @@ pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -2551,17 +2059,15 @@ pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -2569,17 +2075,15 @@ pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -2587,18 +2091,16 @@ pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2606,18 +2108,16 @@ pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2625,18 +2125,16 @@ pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2644,18 +2142,16 @@ pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2663,18 +2159,16 @@ pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2682,18 +2176,16 @@ pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2701,18 +2193,16 @@ pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2720,18 +2210,16 @@ pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2739,18 +2227,16 @@ pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2758,18 +2244,16 @@ pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2777,18 +2261,16 @@ pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2796,18 +2278,16 @@ pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2815,18 +2295,16 @@ pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2834,18 +2312,16 @@ pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2853,18 +2329,16 @@ pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2872,18 +2346,16 @@ pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2891,18 +2363,16 @@ pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2910,18 +2380,16 @@ pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2929,18 +2397,16 @@ pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2948,18 +2414,16 @@ pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2967,18 +2431,16 @@ pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -2986,18 +2448,16 @@ pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -3005,18 +2465,16 @@ pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -3024,18 +2482,16 @@ pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -3043,17 +2499,15 @@ pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3061,12 +2515,10 @@ pub const cpu_atmega8515 = Cpu{
     .name = "atmega8515",
     .llvm_name = "atmega8515",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -3078,12 +2530,10 @@ pub const cpu_atmega8535 = Cpu{
     .name = "atmega8535",
     .llvm_name = "atmega8535",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -3095,17 +2545,15 @@ pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3113,17 +2561,15 @@ pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3131,17 +2577,15 @@ pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3149,17 +2593,15 @@ pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3167,17 +2609,15 @@ pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3185,17 +2625,15 @@ pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -3203,17 +2641,15 @@ pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -3221,11 +2657,9 @@ pub const cpu_attiny10 = Cpu{
     .name = "attiny10",
     .llvm_name = "attiny10",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3233,11 +2667,9 @@ pub const cpu_attiny102 = Cpu{
     .name = "attiny102",
     .llvm_name = "attiny102",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3245,11 +2677,9 @@ pub const cpu_attiny104 = Cpu{
     .name = "attiny104",
     .llvm_name = "attiny104",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3258,8 +2688,6 @@ pub const cpu_attiny11 = Cpu{
     .llvm_name = "attiny11",
     .subfeatures = &[_]*const Feature {
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr1,
     },
 };
 
@@ -3268,8 +2696,6 @@ pub const cpu_attiny12 = Cpu{
     .llvm_name = "attiny12",
     .subfeatures = &[_]*const Feature {
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr1,
     },
 };
 
@@ -3277,16 +2703,14 @@ pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3294,16 +2718,14 @@ pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3312,8 +2734,6 @@ pub const cpu_attiny15 = Cpu{
     .llvm_name = "attiny15",
     .subfeatures = &[_]*const Feature {
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr1,
     },
 };
 
@@ -3321,17 +2741,15 @@ pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -3339,17 +2757,15 @@ pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -3357,11 +2773,9 @@ pub const cpu_attiny20 = Cpu{
     .name = "attiny20",
     .llvm_name = "attiny20",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3369,12 +2783,10 @@ pub const cpu_attiny22 = Cpu{
     .name = "attiny22",
     .llvm_name = "attiny22",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -3382,16 +2794,14 @@ pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3399,16 +2809,14 @@ pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3416,16 +2824,14 @@ pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3433,16 +2839,14 @@ pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3450,16 +2854,14 @@ pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3467,12 +2869,10 @@ pub const cpu_attiny26 = Cpu{
     .name = "attiny26",
     .llvm_name = "attiny26",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_lpmx,
     },
 };
@@ -3481,16 +2881,14 @@ pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3498,16 +2896,14 @@ pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3516,8 +2912,6 @@ pub const cpu_attiny28 = Cpu{
     .llvm_name = "attiny28",
     .subfeatures = &[_]*const Feature {
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr1,
     },
 };
 
@@ -3525,11 +2919,9 @@ pub const cpu_attiny4 = Cpu{
     .name = "attiny4",
     .llvm_name = "attiny4",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3537,11 +2929,9 @@ pub const cpu_attiny40 = Cpu{
     .name = "attiny40",
     .llvm_name = "attiny40",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3549,16 +2939,14 @@ pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3566,16 +2954,14 @@ pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3583,16 +2969,14 @@ pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3600,16 +2984,14 @@ pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3617,16 +2999,14 @@ pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3634,16 +3014,14 @@ pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3651,16 +3029,14 @@ pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3668,16 +3044,14 @@ pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3685,11 +3059,9 @@ pub const cpu_attiny5 = Cpu{
     .name = "attiny5",
     .llvm_name = "attiny5",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3697,16 +3069,14 @@ pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3714,16 +3084,14 @@ pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3731,16 +3099,14 @@ pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3748,16 +3114,14 @@ pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3765,16 +3129,14 @@ pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3782,16 +3144,14 @@ pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3799,16 +3159,14 @@ pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3816,16 +3174,14 @@ pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -3833,11 +3189,9 @@ pub const cpu_attiny9 = Cpu{
     .name = "attiny9",
     .llvm_name = "attiny9",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -3845,23 +3199,21 @@ pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -3869,24 +3221,22 @@ pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -3894,23 +3244,21 @@ pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -3918,24 +3266,22 @@ pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -3943,24 +3289,22 @@ pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -3968,24 +3312,22 @@ pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -3993,24 +3335,22 @@ pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4018,24 +3358,22 @@ pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4043,23 +3381,21 @@ pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4067,23 +3403,21 @@ pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4091,23 +3425,21 @@ pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4115,24 +3447,22 @@ pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4140,24 +3470,22 @@ pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4165,23 +3493,21 @@ pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4189,23 +3515,21 @@ pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4213,23 +3537,21 @@ pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4237,24 +3559,22 @@ pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4262,24 +3582,22 @@ pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4287,23 +3605,21 @@ pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4311,23 +3627,21 @@ pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4335,23 +3649,21 @@ pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4359,24 +3671,22 @@ pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4384,24 +3694,22 @@ pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4409,24 +3717,22 @@ pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4434,23 +3740,21 @@ pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4458,23 +3762,21 @@ pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4482,24 +3784,22 @@ pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4507,24 +3807,22 @@ pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4532,23 +3830,21 @@ pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4556,23 +3852,21 @@ pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4580,23 +3874,21 @@ pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4604,24 +3896,22 @@ pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4629,23 +3919,21 @@ pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4653,23 +3941,21 @@ pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4677,24 +3963,22 @@ pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4702,23 +3986,21 @@ pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4726,24 +4008,22 @@ pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4751,24 +4031,22 @@ pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4776,24 +4054,22 @@ pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4801,24 +4077,22 @@ pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4826,24 +4100,22 @@ pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
-        &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_rmw,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmegau,
     },
 };
 
@@ -4851,23 +4123,21 @@ pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4875,23 +4145,21 @@ pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4899,23 +4167,21 @@ pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -4924,8 +4190,6 @@ pub const cpu_avr1 = Cpu{
     .llvm_name = "avr1",
     .subfeatures = &[_]*const Feature {
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr1,
     },
 };
 
@@ -4933,12 +4197,10 @@ pub const cpu_avr2 = Cpu{
     .name = "avr2",
     .llvm_name = "avr2",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_sram,
         &feature_addsubiw,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr2,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -4946,16 +4208,14 @@ pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr25,
     },
 };
 
@@ -4963,13 +4223,11 @@ pub const cpu_avr3 = Cpu{
     .name = "avr3",
     .llvm_name = "avr3",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr3,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -4977,14 +4235,12 @@ pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
     .subfeatures = &[_]*const Feature {
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
-        &feature_avr31,
+        &feature_elpm,
+        &feature_sram,
+        &feature_ijmpcall,
     },
 };
 
@@ -4992,17 +4248,15 @@ pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr35,
     },
 };
 
@@ -5010,17 +4264,15 @@ pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
         &feature_break,
         &feature_lpm,
-        &feature_avr0,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr4,
     },
 };
 
@@ -5028,18 +4280,16 @@ pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
@@ -5047,20 +4297,18 @@ pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr51,
     },
 };
 
@@ -5068,20 +4316,18 @@ pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_elpm,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_break,
+        &feature_mul,
+        &feature_elpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr6,
     },
 };
 
@@ -5089,11 +4335,9 @@ pub const cpu_avrtiny = Cpu{
     .name = "avrtiny",
     .llvm_name = "avrtiny",
     .subfeatures = &[_]*const Feature {
-        &feature_avr0,
+        &feature_break,
         &feature_sram,
         &feature_tinyencoding,
-        &feature_break,
-        &feature_avrtiny,
     },
 };
 
@@ -5101,23 +4345,21 @@ pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5125,23 +4367,21 @@ pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5149,23 +4389,21 @@ pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5173,23 +4411,21 @@ pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5197,23 +4433,21 @@ pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5221,23 +4455,21 @@ pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5245,23 +4477,21 @@ pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_jmpcall,
+        &feature_lpm,
+        &feature_break,
+        &feature_mul,
         &feature_elpm,
         &feature_eijmpcall,
-        &feature_mul,
-        &feature_break,
-        &feature_lpm,
         &feature_elpmx,
-        &feature_avr0,
+        &feature_sram,
+        &feature_des,
+        &feature_ijmpcall,
         &feature_movw,
         &feature_spmx,
-        &feature_xmega,
     },
 };
 
@@ -5269,18 +4499,16 @@ pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
     .subfeatures = &[_]*const Feature {
-        &feature_spm,
         &feature_lpmx,
-        &feature_ijmpcall,
-        &feature_jmpcall,
-        &feature_sram,
+        &feature_spm,
         &feature_addsubiw,
-        &feature_mul,
-        &feature_break,
+        &feature_jmpcall,
         &feature_lpm,
-        &feature_avr0,
+        &feature_break,
+        &feature_mul,
+        &feature_sram,
+        &feature_ijmpcall,
         &feature_movw,
-        &feature_avr5,
     },
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 0219b88815a0e85bea4db163cf65c7b1cab16da7..3051f3273a54294b11adcec592af9f9370286600 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -1,111 +1,6 @@
 const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
-pub const feature_v5 = Feature{
-    .name = "v5",
-    .description = "Enable Hexagon V5 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v55 = Feature{
-    .name = "v55",
-    .description = "Enable Hexagon V55 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v60 = Feature{
-    .name = "v60",
-    .description = "Enable Hexagon V60 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v62 = Feature{
-    .name = "v62",
-    .description = "Enable Hexagon V62 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v65 = Feature{
-    .name = "v65",
-    .description = "Enable Hexagon V65 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_v66 = Feature{
-    .name = "v66",
-    .description = "Enable Hexagon V66 architecture",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_hvx = Feature{
-    .name = "hvx",
-    .description = "Hexagon HVX instructions",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_hvxLength64b = Feature{
-    .name = "hvx-length64b",
-    .description = "Hexagon HVX 64B instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_hvx,
-    },
-};
-
-pub const feature_hvxLength128b = Feature{
-    .name = "hvx-length128b",
-    .description = "Hexagon HVX 128B instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_hvx,
-    },
-};
-
-pub const feature_hvxv60 = Feature{
-    .name = "hvxv60",
-    .description = "Hexagon HVX instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_hvx,
-    },
-};
-
-pub const feature_hvxv62 = Feature{
-    .name = "hvxv62",
-    .description = "Hexagon HVX instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_hvx,
-    },
-};
-
-pub const feature_hvxv65 = Feature{
-    .name = "hvxv65",
-    .description = "Hexagon HVX instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_hvx,
-    },
-};
-
-pub const feature_hvxv66 = Feature{
-    .name = "hvxv66",
-    .description = "Hexagon HVX instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_zreg,
-        &feature_hvx,
-    },
-};
-
-pub const feature_zreg = Feature{
-    .name = "zreg",
-    .description = "Hexagon ZReg extension instructions",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
 pub const feature_duplex = Feature{
     .name = "duplex",
     .description = "Enable generation of duplex instruction",
@@ -179,20 +74,6 @@ pub const feature_smallData = Feature{
 };
 
 pub const features = &[_]*const Feature {
-    &feature_v5,
-    &feature_v55,
-    &feature_v60,
-    &feature_v62,
-    &feature_v65,
-    &feature_v66,
-    &feature_hvx,
-    &feature_hvxLength64b,
-    &feature_hvxLength128b,
-    &feature_hvxv60,
-    &feature_hvxv62,
-    &feature_hvxv65,
-    &feature_hvxv66,
-    &feature_zreg,
     &feature_duplex,
     &feature_longCalls,
     &feature_mem_noshuf,
@@ -209,9 +90,6 @@ pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
-        &feature_v60,
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -225,7 +103,6 @@ pub const cpu_hexagonv5 = Cpu{
     .name = "hexagonv5",
     .llvm_name = "hexagonv5",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -239,8 +116,6 @@ pub const cpu_hexagonv55 = Cpu{
     .name = "hexagonv55",
     .llvm_name = "hexagonv55",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -254,9 +129,6 @@ pub const cpu_hexagonv60 = Cpu{
     .name = "hexagonv60",
     .llvm_name = "hexagonv60",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
-        &feature_v60,
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -270,10 +142,6 @@ pub const cpu_hexagonv62 = Cpu{
     .name = "hexagonv62",
     .llvm_name = "hexagonv62",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
-        &feature_v60,
-        &feature_v62,
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -287,11 +155,6 @@ pub const cpu_hexagonv65 = Cpu{
     .name = "hexagonv65",
     .llvm_name = "hexagonv65",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
-        &feature_v60,
-        &feature_v62,
-        &feature_v65,
         &feature_duplex,
         &feature_mem_noshuf,
         &feature_memops,
@@ -306,12 +169,6 @@ pub const cpu_hexagonv66 = Cpu{
     .name = "hexagonv66",
     .llvm_name = "hexagonv66",
     .subfeatures = &[_]*const Feature {
-        &feature_v5,
-        &feature_v55,
-        &feature_v60,
-        &feature_v62,
-        &feature_v65,
-        &feature_v66,
         &feature_duplex,
         &feature_mem_noshuf,
         &feature_memops,
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 3d02746606192af9566551929dbf2bc40319d61d..17582a9313a0adeab901ba5606df7112fdeabb22 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -19,14 +19,14 @@ pub const feature_cnmips = Feature{
     .name = "cnmips",
     .description = "Octeon cnMIPS Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -142,11 +142,11 @@ pub const feature_mips3 = Feature{
     .name = "mips3",
     .description = "MIPS III ISA Support [highly experimental]",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips1,
         &feature_fp64,
+        &feature_mips1,
         &feature_gp64,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -168,13 +168,13 @@ pub const feature_mips4 = Feature{
     .name = "mips4",
     .description = "MIPS IV ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -196,14 +196,14 @@ pub const feature_mips5 = Feature{
     .name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -235,12 +235,12 @@ pub const feature_mips32r2 = Feature{
     .name = "mips32r2",
     .description = "Mips32r2 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -248,12 +248,12 @@ pub const feature_mips32r3 = Feature{
     .name = "mips32r3",
     .description = "Mips32r3 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -261,12 +261,12 @@ pub const feature_mips32r5 = Feature{
     .name = "mips32r5",
     .description = "Mips32r5 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -274,15 +274,15 @@ pub const feature_mips32r6 = Feature{
     .name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_nan2008,
-        &feature_mips4_32r2,
-        &feature_mips1,
         &feature_abs2008,
         &feature_fp64,
-        &feature_mips5_32r2,
+        &feature_mips4_32r2,
+        &feature_nan2008,
+        &feature_mips1,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -290,14 +290,14 @@ pub const feature_mips64 = Feature{
     .name = "mips64",
     .description = "Mips64 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -305,14 +305,14 @@ pub const feature_mips64r2 = Feature{
     .name = "mips64r2",
     .description = "Mips64r2 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -320,14 +320,14 @@ pub const feature_mips64r3 = Feature{
     .name = "mips64r3",
     .description = "Mips64r3 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -335,14 +335,14 @@ pub const feature_mips64r5 = Feature{
     .name = "mips64r5",
     .description = "Mips64r5 ISA Support",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -350,16 +350,16 @@ pub const feature_mips64r6 = Feature{
     .name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_nan2008,
-        &feature_mips4_32r2,
-        &feature_mips1,
         &feature_abs2008,
         &feature_fp64,
-        &feature_mips5_32r2,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_gp64,
+        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -451,12 +451,12 @@ pub const feature_p5600 = Feature{
     .name = "p5600",
     .description = "The P5600 Processor",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -534,11 +534,11 @@ pub const cpu_mips3 = Cpu{
     .name = "mips3",
     .llvm_name = "mips3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips1,
         &feature_fp64,
+        &feature_mips1,
         &feature_gp64,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips3,
     },
 };
@@ -558,12 +558,12 @@ pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips32r2,
     },
 };
@@ -572,12 +572,12 @@ pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips32r3,
     },
 };
@@ -586,12 +586,12 @@ pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips32r5,
     },
 };
@@ -600,15 +600,15 @@ pub const cpu_mips32r6 = Cpu{
     .name = "mips32r6",
     .llvm_name = "mips32r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_nan2008,
-        &feature_mips4_32r2,
-        &feature_mips1,
         &feature_abs2008,
         &feature_fp64,
-        &feature_mips5_32r2,
+        &feature_mips4_32r2,
+        &feature_nan2008,
+        &feature_mips1,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips32r6,
     },
 };
@@ -617,13 +617,13 @@ pub const cpu_mips4 = Cpu{
     .name = "mips4",
     .llvm_name = "mips4",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips4,
     },
 };
@@ -632,14 +632,14 @@ pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips5,
     },
 };
@@ -648,14 +648,14 @@ pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips64,
     },
 };
@@ -664,14 +664,14 @@ pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips64r2,
     },
 };
@@ -680,14 +680,14 @@ pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips64r3,
     },
 };
@@ -696,14 +696,14 @@ pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips64r5,
     },
 };
@@ -712,16 +712,16 @@ pub const cpu_mips64r6 = Cpu{
     .name = "mips64r6",
     .llvm_name = "mips64r6",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_nan2008,
-        &feature_mips4_32r2,
-        &feature_mips1,
         &feature_abs2008,
         &feature_fp64,
-        &feature_mips5_32r2,
+        &feature_mips4_32r2,
+        &feature_mips1,
         &feature_gp64,
+        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_nan2008,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_mips64r6,
     },
 };
@@ -730,14 +730,14 @@ pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_fp64,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_fp64,
-        &feature_mips5_32r2,
         &feature_gp64,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_cnmips,
         &feature_mips64r2,
     },
@@ -747,12 +747,12 @@ pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
     .subfeatures = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
+        &feature_mips3_32r2,
+        &feature_mips3_32,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 212a604a4a05431fbbc1363c468ba774be0ecb5b..e8c9d98a1cfd53b8952798892eeef351009e8894 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -261,8 +261,8 @@ pub const feature_power9Altivec = Feature{
     .name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
     .subfeatures = &[_]*const Feature {
-        &feature_hardFloat,
         &feature_isaV30Instructions,
+        &feature_hardFloat,
     },
 };
 
@@ -270,8 +270,8 @@ pub const feature_power9Vector = Feature{
     .name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
     .subfeatures = &[_]*const Feature {
-        &feature_hardFloat,
         &feature_isaV30Instructions,
+        &feature_hardFloat,
     },
 };
 
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 75c824c8bcf8446e8183dbc0dc531955fffe2190..d302c28063ec4a8437848a39ae4eed7549ca60ab 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -1,13 +1,6 @@
 const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
-pub const feature_detectroundchange = Feature{
-    .name = "detectroundchange",
-    .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
 pub const feature_hardQuadFloat = Feature{
     .name = "hard-quad-float",
     .description = "Enable quad-word floating point instructions",
@@ -92,50 +85,7 @@ pub const feature_vis3 = Feature{
     },
 };
 
-pub const feature_fixallfdivsqrt = Feature{
-    .name = "fixallfdivsqrt",
-    .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_insertnopload = Feature{
-    .name = "insertnopload",
-    .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_hasleoncasa = Feature{
-    .name = "hasleoncasa",
-    .description = "Enable CASA instruction for LEON3 and LEON4 processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_leoncyclecounter = Feature{
-    .name = "leoncyclecounter",
-    .description = "Use the Leon cycle counter register",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_hasumacsmac = Feature{
-    .name = "hasumacsmac",
-    .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
-pub const feature_popc = Feature{
-    .name = "popc",
-    .description = "Use the popc (population count) instruction",
-    .subfeatures = &[_]*const Feature {
-    },
-};
-
 pub const features = &[_]*const Feature {
-    &feature_detectroundchange,
     &feature_hardQuadFloat,
     &feature_leon,
     &feature_noFmuls,
@@ -148,12 +98,6 @@ pub const features = &[_]*const Feature {
     &feature_vis,
     &feature_vis2,
     &feature_vis3,
-    &feature_fixallfdivsqrt,
-    &feature_insertnopload,
-    &feature_hasleoncasa,
-    &feature_leoncyclecounter,
-    &feature_hasumacsmac,
-    &feature_popc,
 };
 
 pub const cpu_at697e = Cpu{
@@ -161,7 +105,6 @@ pub const cpu_at697e = Cpu{
     .llvm_name = "at697e",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_insertnopload,
     },
 };
 
@@ -170,7 +113,6 @@ pub const cpu_at697f = Cpu{
     .llvm_name = "at697f",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_insertnopload,
     },
 };
 
@@ -193,7 +135,6 @@ pub const cpu_gr712rc = Cpu{
     .llvm_name = "gr712rc",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -203,9 +144,6 @@ pub const cpu_gr740 = Cpu{
     .subfeatures = &[_]*const Feature {
         &feature_leon,
         &feature_leonpwrpsr,
-        &feature_hasleoncasa,
-        &feature_leoncyclecounter,
-        &feature_hasumacsmac,
     },
 };
 
@@ -229,7 +167,6 @@ pub const cpu_leon3 = Cpu{
     .llvm_name = "leon3",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasumacsmac,
     },
 };
 
@@ -238,8 +175,6 @@ pub const cpu_leon4 = Cpu{
     .llvm_name = "leon4",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
-        &feature_hasumacsmac,
     },
 };
 
@@ -248,7 +183,6 @@ pub const cpu_ma2080 = Cpu{
     .llvm_name = "ma2080",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -257,7 +191,6 @@ pub const cpu_ma2085 = Cpu{
     .llvm_name = "ma2085",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -266,7 +199,6 @@ pub const cpu_ma2100 = Cpu{
     .llvm_name = "ma2100",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -275,7 +207,6 @@ pub const cpu_ma2150 = Cpu{
     .llvm_name = "ma2150",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -284,7 +215,6 @@ pub const cpu_ma2155 = Cpu{
     .llvm_name = "ma2155",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -293,7 +223,6 @@ pub const cpu_ma2450 = Cpu{
     .llvm_name = "ma2450",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -302,7 +231,6 @@ pub const cpu_ma2455 = Cpu{
     .llvm_name = "ma2455",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -311,7 +239,6 @@ pub const cpu_ma2480 = Cpu{
     .llvm_name = "ma2480",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -320,7 +247,6 @@ pub const cpu_ma2485 = Cpu{
     .llvm_name = "ma2485",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -329,7 +255,6 @@ pub const cpu_ma2x5x = Cpu{
     .llvm_name = "ma2x5x",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -338,7 +263,6 @@ pub const cpu_ma2x8x = Cpu{
     .llvm_name = "ma2x8x",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -347,7 +271,6 @@ pub const cpu_myriad2 = Cpu{
     .llvm_name = "myriad2",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -356,7 +279,6 @@ pub const cpu_myriad21 = Cpu{
     .llvm_name = "myriad2.1",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -365,7 +287,6 @@ pub const cpu_myriad22 = Cpu{
     .llvm_name = "myriad2.2",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -374,7 +295,6 @@ pub const cpu_myriad23 = Cpu{
     .llvm_name = "myriad2.3",
     .subfeatures = &[_]*const Feature {
         &feature_leon,
-        &feature_hasleoncasa,
     },
 };
 
@@ -397,7 +317,6 @@ pub const cpu_niagara2 = Cpu{
         &feature_v9,
         &feature_vis,
         &feature_vis2,
-        &feature_popc,
     },
 };
 
@@ -409,7 +328,6 @@ pub const cpu_niagara3 = Cpu{
         &feature_v9,
         &feature_vis,
         &feature_vis2,
-        &feature_popc,
     },
 };
 
@@ -422,7 +340,6 @@ pub const cpu_niagara4 = Cpu{
         &feature_vis,
         &feature_vis2,
         &feature_vis3,
-        &feature_popc,
     },
 };
 
@@ -489,8 +406,6 @@ pub const cpu_ut699 = Cpu{
         &feature_leon,
         &feature_noFmuls,
         &feature_noFsmuld,
-        &feature_fixallfdivsqrt,
-        &feature_insertnopload,
     },
 };
 
-- 
2.54.0


From e4ecdefa9a668d34c830816eea242b110c30c475 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Tue, 7 Jan 2020 10:36:06 -0500
Subject: [PATCH 044/116] Rename subfeatures -> dependencies

---
 lib/std/target.zig         |    4 +-
 lib/std/target/aarch64.zig |  748 ++++-----
 lib/std/target/amdgpu.zig  | 1160 ++++++-------
 lib/std/target/arm.zig     | 1020 ++++++------
 lib/std/target/avr.zig     | 3220 ++++++++++++++++++------------------
 lib/std/target/bpf.zig     |   16 +-
 lib/std/target/hexagon.zig |   34 +-
 lib/std/target/mips.zig    |  382 ++---
 lib/std/target/msp430.zig  |   14 +-
 lib/std/target/nvptx.zig   |   80 +-
 lib/std/target/powerpc.zig |  176 +-
 lib/std/target/riscv.zig   |   22 +-
 lib/std/target/sparc.zig   |  104 +-
 lib/std/target/systemz.zig |   96 +-
 lib/std/target/wasm.zig    |   26 +-
 lib/std/target/x86.zig     |  412 ++---
 src/main.cpp               |   12 +-
 17 files changed, 3763 insertions(+), 3763 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index ad2ca59ee8d266eb321bf99b37b2f5417b6adf44..8a86af6733e27a2025864404acd051b313501e2f 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -862,14 +862,14 @@ pub const Feature = struct {
     name: []const u8,
     description: []const u8,
 
-    subfeatures: []*const Feature,
+    dependencies: []*const Feature,
 };
 
 pub const Cpu = struct {
     name: []const u8,
     llvm_name: []const u8,
 
-    subfeatures: []*const Feature,
+    dependencies: []*const Feature,
 };
 
 pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature {
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index b907d96b7d9badf8ce6bd1f56ef88abb6bf78f1f..85ef813dea6e5e7cebecd84122fab6d61d94f188 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -4,7 +4,7 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -12,154 +12,154 @@ pub const feature_aes = Feature{
 pub const feature_am = Feature{
     .name = "am",
     .description = "Enable v8.4-A Activity Monitors extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_aggressiveFma = Feature{
     .name = "aggressive-fma",
     .description = "Enable Aggressive FMA for floating-point.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_altnzcv = Feature{
     .name = "altnzcv",
     .description = "Enable alternative NZCV format for floating point comparisons",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_alternateSextloadCvtF32Pattern = Feature{
     .name = "alternate-sextload-cvt-f32-pattern",
     .description = "Use alternative pattern for sextload convert to f32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_arithBccFusion = Feature{
     .name = "arith-bcc-fusion",
     .description = "CPU fuses arithmetic+bcc operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_arithCbzFusion = Feature{
     .name = "arith-cbz-fusion",
     .description = "CPU fuses arithmetic + cbz/cbnz operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_balanceFpOps = Feature{
     .name = "balance-fp-ops",
     .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bti = Feature{
     .name = "bti",
     .description = "Enable Branch Target Identification",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ccidx = Feature{
     .name = "ccidx",
     .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ccpp = Feature{
     .name = "ccpp",
     .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Enable ARMv8 CRC-32 checksum instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ccdp = Feature{
     .name = "ccdp",
     .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX8 = Feature{
     .name = "call-saved-x8",
     .description = "Make X8 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX9 = Feature{
     .name = "call-saved-x9",
     .description = "Make X9 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX10 = Feature{
     .name = "call-saved-x10",
     .description = "Make X10 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX11 = Feature{
     .name = "call-saved-x11",
     .description = "Make X11 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX12 = Feature{
     .name = "call-saved-x12",
     .description = "Make X12 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX13 = Feature{
     .name = "call-saved-x13",
     .description = "Make X13 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX14 = Feature{
     .name = "call-saved-x14",
     .description = "Make X14 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX15 = Feature{
     .name = "call-saved-x15",
     .description = "Make X15 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_callSavedX18 = Feature{
     .name = "call-saved-x18",
     .description = "Make X18 callee saved.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_complxnum = Feature{
     .name = "complxnum",
     .description = "Enable v8.3-A Floating-point complex number support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -167,7 +167,7 @@ pub const feature_complxnum = Feature{
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable cryptographic instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -175,35 +175,35 @@ pub const feature_crypto = Feature{
 pub const feature_customCheapAsMove = Feature{
     .name = "custom-cheap-as-move",
     .description = "Use custom handling of cheap instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dit = Feature{
     .name = "dit",
     .description = "Enable v8.4-A Data Independent Timing instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_disableLatencySchedHeuristic = Feature{
     .name = "disable-latency-sched-heuristic",
     .description = "Disable latency scheduling heuristic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dotprod = Feature{
     .name = "dotprod",
     .description = "Enable dot product support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ete = Feature{
     .name = "ete",
     .description = "Enable Embedded Trace Extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_trbe,
     },
 };
@@ -211,7 +211,7 @@ pub const feature_ete = Feature{
 pub const feature_exynosCheapAsMove = Feature{
     .name = "exynos-cheap-as-move",
     .description = "Use Exynos specific handling of cheap instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_customCheapAsMove,
     },
 };
@@ -219,14 +219,14 @@ pub const feature_exynosCheapAsMove = Feature{
 pub const feature_fmi = Feature{
     .name = "fmi",
     .description = "Enable v8.4-A Flag Manipulation Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
     .description = "Enable FP16 FML instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -234,28 +234,28 @@ pub const feature_fp16fml = Feature{
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
     .description = "Enable ARMv8 FP",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fptoint = Feature{
     .name = "fptoint",
     .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_force32bitJumpTables = Feature{
     .name = "force-32bit-jump-tables",
     .description = "Force jump table entries to be 32-bits wide except at MinSize",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
     .description = "Full FP16",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -263,49 +263,49 @@ pub const feature_fullfp16 = Feature{
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseAddress = Feature{
     .name = "fuse-address",
     .description = "CPU fuses address generation and memory operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseArithLogic = Feature{
     .name = "fuse-arith-logic",
     .description = "CPU fuses arithmetic and logic operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseCsel = Feature{
     .name = "fuse-csel",
     .description = "CPU fuses conditional select operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseCryptoEor = Feature{
     .name = "fuse-crypto-eor",
     .description = "CPU fuses AES/PMULL and EOR operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_jsconv = Feature{
     .name = "jsconv",
     .description = "Enable v8.3-A JavaScript FP conversion enchancement",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -313,42 +313,42 @@ pub const feature_jsconv = Feature{
 pub const feature_lor = Feature{
     .name = "lor",
     .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lse = Feature{
     .name = "lse",
     .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lslFast = Feature{
     .name = "lsl-fast",
     .description = "CPU has a fastpath logical shift of up to 3 places",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mpam = Feature{
     .name = "mpam",
     .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mte = Feature{
     .name = "mte",
     .description = "Enable Memory Tagging Extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_neon = Feature{
     .name = "neon",
     .description = "Enable Advanced SIMD instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -356,35 +356,35 @@ pub const feature_neon = Feature{
 pub const feature_nv = Feature{
     .name = "nv",
     .description = "Enable v8.4-A Nested Virtualization Enchancement",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_pa = Feature{
     .name = "pa",
     .description = "Enable v8.3-A Pointer Authentication enchancement",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_pan = Feature{
     .name = "pan",
     .description = "Enables ARM v8.1 Privileged Access-Never extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_panRwv = Feature{
     .name = "pan-rwv",
     .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_pan,
     },
 };
@@ -392,49 +392,49 @@ pub const feature_panRwv = Feature{
 pub const feature_perfmon = Feature{
     .name = "perfmon",
     .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_usePostraScheduler = Feature{
     .name = "use-postra-scheduler",
     .description = "Schedule again after register allocation",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_predres = Feature{
     .name = "predres",
     .description = "Enable v8.5a execution and data prediction invalidation instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_predictableSelectExpensive = Feature{
     .name = "predictable-select-expensive",
     .description = "Prefer likely predicted branches over selects",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_uaops = Feature{
     .name = "uaops",
     .description = "Enable v8.2 UAO PState",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ras = Feature{
     .name = "ras",
     .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rasv8_4 = Feature{
     .name = "rasv8_4",
     .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ras,
     },
 };
@@ -442,14 +442,14 @@ pub const feature_rasv8_4 = Feature{
 pub const feature_rcpc = Feature{
     .name = "rcpc",
     .description = "Enable support for RCPC extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rcpcImmo = Feature{
     .name = "rcpc-immo",
     .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_rcpc,
     },
 };
@@ -457,203 +457,203 @@ pub const feature_rcpcImmo = Feature{
 pub const feature_rdm = Feature{
     .name = "rdm",
     .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rand = Feature{
     .name = "rand",
     .description = "Enable Random Number generation instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX1 = Feature{
     .name = "reserve-x1",
     .description = "Reserve X1, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX2 = Feature{
     .name = "reserve-x2",
     .description = "Reserve X2, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX3 = Feature{
     .name = "reserve-x3",
     .description = "Reserve X3, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX4 = Feature{
     .name = "reserve-x4",
     .description = "Reserve X4, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX5 = Feature{
     .name = "reserve-x5",
     .description = "Reserve X5, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX6 = Feature{
     .name = "reserve-x6",
     .description = "Reserve X6, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX7 = Feature{
     .name = "reserve-x7",
     .description = "Reserve X7, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX9 = Feature{
     .name = "reserve-x9",
     .description = "Reserve X9, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX10 = Feature{
     .name = "reserve-x10",
     .description = "Reserve X10, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX11 = Feature{
     .name = "reserve-x11",
     .description = "Reserve X11, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX12 = Feature{
     .name = "reserve-x12",
     .description = "Reserve X12, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX13 = Feature{
     .name = "reserve-x13",
     .description = "Reserve X13, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX14 = Feature{
     .name = "reserve-x14",
     .description = "Reserve X14, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX15 = Feature{
     .name = "reserve-x15",
     .description = "Reserve X15, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX18 = Feature{
     .name = "reserve-x18",
     .description = "Reserve X18, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX20 = Feature{
     .name = "reserve-x20",
     .description = "Reserve X20, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX21 = Feature{
     .name = "reserve-x21",
     .description = "Reserve X21, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX22 = Feature{
     .name = "reserve-x22",
     .description = "Reserve X22, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX23 = Feature{
     .name = "reserve-x23",
     .description = "Reserve X23, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX24 = Feature{
     .name = "reserve-x24",
     .description = "Reserve X24, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX25 = Feature{
     .name = "reserve-x25",
     .description = "Reserve X25, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX26 = Feature{
     .name = "reserve-x26",
     .description = "Reserve X26, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX27 = Feature{
     .name = "reserve-x27",
     .description = "Reserve X27, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveX28 = Feature{
     .name = "reserve-x28",
     .description = "Reserve X28, making it unavailable as a GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sb = Feature{
     .name = "sb",
     .description = "Enable v8.5 Speculation Barrier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sel2 = Feature{
     .name = "sel2",
     .description = "Enable v8.4-A Secure Exception Level 2 extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sha2 = Feature{
     .name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -661,7 +661,7 @@ pub const feature_sha2 = Feature{
 pub const feature_sha3 = Feature{
     .name = "sha3",
     .description = "Enable SHA512 and SHA3 support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -669,7 +669,7 @@ pub const feature_sha3 = Feature{
 pub const feature_sm4 = Feature{
     .name = "sm4",
     .description = "Enable SM3 and SM4 support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
     },
 };
@@ -677,28 +677,28 @@ pub const feature_sm4 = Feature{
 pub const feature_spe = Feature{
     .name = "spe",
     .description = "Enable Statistical Profiling extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ssbs = Feature{
     .name = "ssbs",
     .description = "Enable Speculative Store Bypass Safe bit",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sve = Feature{
     .name = "sve",
     .description = "Enable Scalable Vector Extension (SVE) instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sve2 = Feature{
     .name = "sve2",
     .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sve,
     },
 };
@@ -706,7 +706,7 @@ pub const feature_sve2 = Feature{
 pub const feature_sve2Aes = Feature{
     .name = "sve2-aes",
     .description = "Enable AES SVE2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
     },
@@ -715,7 +715,7 @@ pub const feature_sve2Aes = Feature{
 pub const feature_sve2Bitperm = Feature{
     .name = "sve2-bitperm",
     .description = "Enable bit permutation SVE2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sve,
     },
 };
@@ -723,7 +723,7 @@ pub const feature_sve2Bitperm = Feature{
 pub const feature_sve2Sha3 = Feature{
     .name = "sve2-sha3",
     .description = "Enable SHA3 SVE2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
     },
@@ -732,7 +732,7 @@ pub const feature_sve2Sha3 = Feature{
 pub const feature_sve2Sm4 = Feature{
     .name = "sve2-sm4",
     .description = "Enable SM4 SVE2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
         &feature_sve,
     },
@@ -741,126 +741,126 @@ pub const feature_sve2Sm4 = Feature{
 pub const feature_slowMisaligned128store = Feature{
     .name = "slow-misaligned-128store",
     .description = "Misaligned 128 bit stores are slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowPaired128 = Feature{
     .name = "slow-paired-128",
     .description = "Paired 128 bit loads and stores are slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowStrqroStore = Feature{
     .name = "slow-strqro-store",
     .description = "STR of Q register with register offset is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_specrestrict = Feature{
     .name = "specrestrict",
     .description = "Enable architectural speculation restriction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
     .description = "Disallow all unaligned memory access",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tlbRmi = Feature{
     .name = "tlb-rmi",
     .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tme = Feature{
     .name = "tme",
     .description = "Enable Transactional Memory Extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tracev84 = Feature{
     .name = "tracev8.4",
     .description = "Enable v8.4-A Trace extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_trbe = Feature{
     .name = "trbe",
     .description = "Enable Trace Buffer Extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_taggedGlobals = Feature{
     .name = "tagged-globals",
     .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tpidrEl1 = Feature{
     .name = "tpidr-el1",
     .description = "Permit use of TPIDR_EL1 for the TLS base",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tpidrEl2 = Feature{
     .name = "tpidr-el2",
     .description = "Permit use of TPIDR_EL2 for the TLS base",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tpidrEl3 = Feature{
     .name = "tpidr-el3",
     .description = "Permit use of TPIDR_EL3 for the TLS base",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useReciprocalSquareRoot = Feature{
     .name = "use-reciprocal-square-root",
     .description = "Use the reciprocal square root approximation",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vh = Feature{
     .name = "vh",
     .description = "Enables ARM v8.1 Virtual Host extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_zcm = Feature{
     .name = "zcm",
     .description = "Has zero-cycle register moves",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_zcz = Feature{
     .name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_zczGp,
         &feature_zczFp,
     },
@@ -869,21 +869,21 @@ pub const feature_zcz = Feature{
 pub const feature_zczFp = Feature{
     .name = "zcz-fp",
     .description = "Has zero-cycle zeroing instructions for FP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_zczFpWorkaround = Feature{
     .name = "zcz-fp-workaround",
     .description = "The zero-cycle floating-point zeroing instruction has a bug",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_zczGp = Feature{
     .name = "zcz-gp",
     .description = "Has zero-cycle zeroing instructions for generic registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -1016,80 +1016,80 @@ pub const features = &[_]*const Feature {
 pub const cpu_appleLatest = Cpu{
     .name = "apple-latest",
     .llvm_name = "apple-latest",
-    .subfeatures = &[_]*const Feature {
-        &feature_arithCbzFusion,
+    .dependencies = &[_]*const Feature {
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_zczFpWorkaround,
         &feature_fuseCryptoEor,
+        &feature_fuseAes,
+        &feature_zczGp,
+        &feature_zczFpWorkaround,
         &feature_disableLatencySchedHeuristic,
-        &feature_zcm,
-        &feature_zczFp,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_fuseAes,
         &feature_arithBccFusion,
-        &feature_zczGp,
+        &feature_arithCbzFusion,
+        &feature_zczFp,
+        &feature_zcm,
     },
 };
 
 pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_crc,
         &feature_fpArmv8,
         &feature_perfmon,
-        &feature_crc,
     },
 };
 
 pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
         &feature_usePostraScheduler,
-        &feature_crc,
         &feature_perfmon,
-        &feature_fuseAes,
+        &feature_fpArmv8,
+        &feature_crc,
+        &feature_balanceFpOps,
         &feature_useAa,
-        &feature_fpArmv8,
-        &feature_balanceFpOps,
-        &feature_customCheapAsMove,
     },
 };
 
 pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
-    .subfeatures = &[_]*const Feature {
-        &feature_crc,
-        &feature_dotprod,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
         &feature_ccpp,
-        &feature_uaops,
-        &feature_rcpc,
+        &feature_fuseAes,
         &feature_lse,
-        &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_lor,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_fuseAes,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
         &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_fuseLiterals,
         &feature_perfmon,
-        &feature_fuseAes,
         &feature_fpArmv8,
+        &feature_crc,
         &feature_balanceFpOps,
-        &feature_customCheapAsMove,
+        &feature_fuseLiterals,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1097,196 +1097,196 @@ pub const cpu_cortexA57 = Cpu{
 pub const cpu_cortexA65 = Cpu{
     .name = "cortex-a65",
     .llvm_name = "cortex-a65",
-    .subfeatures = &[_]*const Feature {
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_lor,
-        &feature_pan,
+    .dependencies = &[_]*const Feature {
         &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
         &feature_ras,
+        &feature_lor,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cortexA65ae = Cpu{
     .name = "cortex-a65ae",
     .llvm_name = "cortex-a65ae",
-    .subfeatures = &[_]*const Feature {
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_lor,
-        &feature_pan,
+    .dependencies = &[_]*const Feature {
         &feature_rdm,
+        &feature_ccpp,
+        &feature_lse,
+        &feature_fpArmv8,
         &feature_ras,
+        &feature_lor,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpArmv8,
+    .dependencies = &[_]*const Feature {
+        &feature_crc,
         &feature_fuseAes,
+        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_crc,
     },
 };
 
 pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpArmv8,
+    .dependencies = &[_]*const Feature {
+        &feature_crc,
         &feature_fuseAes,
+        &feature_fpArmv8,
         &feature_perfmon,
-        &feature_crc,
     },
 };
 
 pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
-    .subfeatures = &[_]*const Feature {
-        &feature_crc,
-        &feature_dotprod,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
         &feature_ccpp,
-        &feature_uaops,
-        &feature_rcpc,
+        &feature_fuseAes,
         &feature_lse,
-        &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_lor,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_fuseAes,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
-    .subfeatures = &[_]*const Feature {
-        &feature_crc,
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_uaops,
-        &feature_rcpc,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
         &feature_lse,
+        &feature_fpArmv8,
         &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
-    .subfeatures = &[_]*const Feature {
-        &feature_crc,
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_uaops,
-        &feature_rcpc,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
         &feature_lse,
+        &feature_fpArmv8,
         &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
-    .subfeatures = &[_]*const Feature {
-        &feature_arithCbzFusion,
+    .dependencies = &[_]*const Feature {
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_zczFpWorkaround,
         &feature_fuseCryptoEor,
+        &feature_fuseAes,
+        &feature_zczGp,
+        &feature_zczFpWorkaround,
         &feature_disableLatencySchedHeuristic,
-        &feature_zcm,
-        &feature_zczFp,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_fuseAes,
         &feature_arithBccFusion,
-        &feature_zczGp,
+        &feature_arithCbzFusion,
+        &feature_zczFp,
+        &feature_zcm,
     },
 };
 
 pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_force32bitJumpTables,
+        &feature_usePostraScheduler,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_slowMisaligned128store,
         &feature_useReciprocalSquareRoot,
-        &feature_usePostraScheduler,
         &feature_crc,
-        &feature_zczFp,
         &feature_slowPaired128,
-        &feature_force32bitJumpTables,
-        &feature_slowMisaligned128store,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_customCheapAsMove,
+        &feature_zczFp,
     },
 };
 
 pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
-    .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_zczFp,
-        &feature_slowPaired128,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
         &feature_force32bitJumpTables,
-        &feature_slowMisaligned128store,
+        &feature_usePostraScheduler,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_customCheapAsMove,
+        &feature_slowMisaligned128store,
+        &feature_crc,
+        &feature_slowPaired128,
+        &feature_zczFp,
     },
 };
 
 pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseAddress,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_zczFp,
-        &feature_fuseLiterals,
-        &feature_lslFast,
-        &feature_fuseCsel,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
         &feature_force32bitJumpTables,
+        &feature_usePostraScheduler,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_customCheapAsMove,
+        &feature_fuseAddress,
+        &feature_fuseCsel,
+        &feature_lslFast,
+        &feature_zczFp,
+        &feature_crc,
+        &feature_fuseLiterals,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1294,81 +1294,81 @@ pub const cpu_exynosM3 = Cpu{
 pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_uaops,
-        &feature_fuseCsel,
-        &feature_force32bitJumpTables,
-        &feature_fuseArithLogic,
-        &feature_vh,
-        &feature_arithBccFusion,
-        &feature_zczGp,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
         &feature_lse,
-        &feature_pan,
-        &feature_ras,
-        &feature_fuseAes,
+        &feature_perfmon,
         &feature_fuseAddress,
-        &feature_rdm,
+        &feature_dotprod,
         &feature_arithCbzFusion,
-        &feature_crc,
         &feature_zczFp,
+        &feature_fuseArithLogic,
+        &feature_ccpp,
+        &feature_fuseAes,
+        &feature_fuseCsel,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_force32bitJumpTables,
+        &feature_usePostraScheduler,
         &feature_lslFast,
-        &feature_lor,
-        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseLiterals,
+        &feature_pan,
         &feature_fpArmv8,
-        &feature_ccpp,
-        &feature_customCheapAsMove,
+        &feature_lor,
+        &feature_ras,
+        &feature_vh,
+        &feature_arithBccFusion,
+        &feature_uaops,
     },
 };
 
 pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
-    .subfeatures = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_uaops,
-        &feature_fuseCsel,
-        &feature_force32bitJumpTables,
-        &feature_fuseArithLogic,
-        &feature_vh,
-        &feature_arithBccFusion,
-        &feature_zczGp,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
         &feature_lse,
-        &feature_pan,
-        &feature_ras,
-        &feature_fuseAes,
+        &feature_perfmon,
         &feature_fuseAddress,
-        &feature_rdm,
+        &feature_dotprod,
         &feature_arithCbzFusion,
-        &feature_crc,
         &feature_zczFp,
+        &feature_fuseArithLogic,
+        &feature_ccpp,
+        &feature_fuseAes,
+        &feature_fuseCsel,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_force32bitJumpTables,
+        &feature_usePostraScheduler,
         &feature_lslFast,
-        &feature_lor,
-        &feature_perfmon,
+        &feature_crc,
+        &feature_fuseLiterals,
+        &feature_pan,
         &feature_fpArmv8,
-        &feature_ccpp,
-        &feature_customCheapAsMove,
+        &feature_lor,
+        &feature_ras,
+        &feature_vh,
+        &feature_arithBccFusion,
+        &feature_uaops,
     },
 };
 
 pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_rdm,
+        &feature_zczGp,
         &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_zczFp,
+        &feature_perfmon,
+        &feature_fpArmv8,
         &feature_lslFast,
+        &feature_zczFp,
+        &feature_crc,
         &feature_slowStrqroStore,
-        &feature_rdm,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_zczGp,
-        &feature_customCheapAsMove,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1376,7 +1376,7 @@ pub const cpu_falkor = Cpu{
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_trbe,
         &feature_ete,
         &feature_fpArmv8,
@@ -1390,15 +1390,15 @@ pub const cpu_generic = Cpu{
 pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_zczGp,
         &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_zczFp,
-        &feature_lslFast,
         &feature_perfmon,
         &feature_fpArmv8,
-        &feature_zczGp,
-        &feature_customCheapAsMove,
+        &feature_lslFast,
+        &feature_zczFp,
+        &feature_crc,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1406,89 +1406,89 @@ pub const cpu_kryo = Cpu{
 pub const cpu_neoverseE1 = Cpu{
     .name = "neoverse-e1",
     .llvm_name = "neoverse-e1",
-    .subfeatures = &[_]*const Feature {
-        &feature_crc,
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_uaops,
-        &feature_rcpc,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
         &feature_lse,
+        &feature_fpArmv8,
         &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
     },
 };
 
 pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
-    .subfeatures = &[_]*const Feature {
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rcpc,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
+        &feature_ccpp,
         &feature_lse,
-        &feature_spe,
+        &feature_fpArmv8,
         &feature_lor,
-        &feature_pan,
-        &feature_rdm,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_ccpp,
+        &feature_rcpc,
+        &feature_dotprod,
+        &feature_ssbs,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
+        &feature_spe,
     },
 };
 
 pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
-    .subfeatures = &[_]*const Feature {
-        &feature_uaops,
-        &feature_vh,
-        &feature_nv,
-        &feature_zczGp,
-        &feature_mpam,
-        &feature_predictableSelectExpensive,
-        &feature_am,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-        &feature_rcpc,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
         &feature_lse,
-        &feature_pan,
-        &feature_ras,
-        &feature_tlbRmi,
+        &feature_fmi,
+        &feature_perfmon,
         &feature_sel2,
-        &feature_rdm,
-        &feature_ccidx,
+        &feature_dotprod,
+        &feature_am,
+        &feature_zczFp,
+        &feature_mpam,
+        &feature_ccpp,
         &feature_dit,
-        &feature_crc,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_fmi,
-        &feature_spe,
-        &feature_lor,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_ccpp,
         &feature_tracev84,
-        &feature_customCheapAsMove,
+        &feature_spe,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_usePostraScheduler,
+        &feature_nv,
+        &feature_tlbRmi,
+        &feature_lslFast,
+        &feature_crc,
+        &feature_pan,
+        &feature_ccidx,
+        &feature_fpArmv8,
+        &feature_ras,
+        &feature_lor,
+        &feature_vh,
+        &feature_rcpc,
+        &feature_uaops,
         &feature_pa,
+        &feature_predictableSelectExpensive,
     },
 };
 
 pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_usePostraScheduler,
-        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_crc,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1496,17 +1496,17 @@ pub const cpu_thunderx = Cpu{
 pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
-    .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_crc,
+    .dependencies = &[_]*const Feature {
+        &feature_rdm,
         &feature_lse,
-        &feature_lor,
+        &feature_usePostraScheduler,
         &feature_aggressiveFma,
-        &feature_pan,
-        &feature_rdm,
-        &feature_vh,
         &feature_fpArmv8,
+        &feature_lor,
+        &feature_vh,
         &feature_arithBccFusion,
+        &feature_crc,
+        &feature_pan,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1514,11 +1514,11 @@ pub const cpu_thunderx2t99 = Cpu{
 pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_usePostraScheduler,
-        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_crc,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1526,11 +1526,11 @@ pub const cpu_thunderxt81 = Cpu{
 pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_usePostraScheduler,
-        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_crc,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1538,11 +1538,11 @@ pub const cpu_thunderxt83 = Cpu{
 pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_usePostraScheduler,
-        &feature_crc,
         &feature_perfmon,
         &feature_fpArmv8,
+        &feature_crc,
         &feature_predictableSelectExpensive,
     },
 };
@@ -1550,23 +1550,23 @@ pub const cpu_thunderxt88 = Cpu{
 pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
-    .subfeatures = &[_]*const Feature {
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_dotprod,
+    .dependencies = &[_]*const Feature {
+        &feature_customCheapAsMove,
+        &feature_rdm,
         &feature_ccpp,
-        &feature_uaops,
+        &feature_fuseAes,
         &feature_lse,
-        &feature_lor,
-        &feature_spe,
-        &feature_pan,
-        &feature_rdm,
+        &feature_usePostraScheduler,
         &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_lor,
         &feature_ras,
         &feature_vh,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_customCheapAsMove,
+        &feature_dotprod,
+        &feature_uaops,
+        &feature_crc,
+        &feature_pan,
+        &feature_spe,
     },
 };
 
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 5f6fe8dcf6ffb2e166b4b54afd3e37efc66d7c58..b428615124292f136db61cea067683209212f862 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -4,196 +4,196 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_BitInsts16 = Feature{
     .name = "16-bit-insts",
     .description = "Has i16/f16 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_addNoCarryInsts = Feature{
     .name = "add-no-carry-insts",
     .description = "Have VALU add/sub instructions without carry out",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_apertureRegs = Feature{
     .name = "aperture-regs",
     .description = "Has Memory Aperture Base and Size Registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_atomicFaddInsts = Feature{
     .name = "atomic-fadd-insts",
     .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_autoWaitcntBeforeBarrier = Feature{
     .name = "auto-waitcnt-before-barrier",
     .description = "Hardware automatically inserts waitcnt before barrier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ciInsts = Feature{
     .name = "ci-insts",
     .description = "Additional instructions for CI+",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_codeObjectV3 = Feature{
     .name = "code-object-v3",
     .description = "Generate code object version 3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cumode = Feature{
     .name = "cumode",
     .description = "Enable CU wavefront execution mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dlInsts = Feature{
     .name = "dl-insts",
     .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dpp = Feature{
     .name = "dpp",
     .description = "Support DPP (Data Parallel Primitives) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dpp8 = Feature{
     .name = "dpp8",
     .description = "Support DPP8 (Data Parallel Primitives) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noSramEccSupport = Feature{
     .name = "no-sram-ecc-support",
     .description = "Hardware does not support SRAM ECC",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noXnackSupport = Feature{
     .name = "no-xnack-support",
     .description = "Hardware does not support XNACK",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot1Insts = Feature{
     .name = "dot1-insts",
     .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot2Insts = Feature{
     .name = "dot2-insts",
     .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot3Insts = Feature{
     .name = "dot3-insts",
     .description = "Has v_dot8c_i32_i4 instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot4Insts = Feature{
     .name = "dot4-insts",
     .description = "Has v_dot2c_i32_i16 instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot5Insts = Feature{
     .name = "dot5-insts",
     .description = "Has v_dot2c_f32_f16 instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dot6Insts = Feature{
     .name = "dot6-insts",
     .description = "Has v_dot4c_i32_i8 instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_DumpCode = Feature{
     .name = "DumpCode",
     .description = "Dump MachineInstrs in the CodeEmitter",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dumpcode = Feature{
     .name = "dumpcode",
     .description = "Dump MachineInstrs in the CodeEmitter",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_enableDs128 = Feature{
     .name = "enable-ds128",
     .description = "Use ds_{read|write}_b128",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loadStoreOpt = Feature{
     .name = "load-store-opt",
     .description = "Enable SI load/store optimizer pass",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_enablePrtStrictNull = Feature{
     .name = "enable-prt-strict-null",
     .description = "Enable zeroing of result registers for sparse texture fetches",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_siScheduler = Feature{
     .name = "si-scheduler",
     .description = "Enable SI Machine Scheduler",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_unsafeDsOffsetFolding = Feature{
     .name = "unsafe-ds-offset-folding",
     .description = "Force using DS instruction immediate offsets on SI",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fmaf = Feature{
     .name = "fmaf",
     .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp16Denormals = Feature{
     .name = "fp16-denormals",
     .description = "Enable half precision denormal handling",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp64,
     },
 };
@@ -201,21 +201,21 @@ pub const feature_fp16Denormals = Feature{
 pub const feature_fp32Denormals = Feature{
     .name = "fp32-denormals",
     .description = "Enable single precision denormal handling",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Enable double precision operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp64Denormals = Feature{
     .name = "fp64-denormals",
     .description = "Enable double and half precision denormal handling",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp64,
     },
 };
@@ -223,7 +223,7 @@ pub const feature_fp64Denormals = Feature{
 pub const feature_fp64Fp16Denormals = Feature{
     .name = "fp64-fp16-denormals",
     .description = "Enable double and half precision denormal handling",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp64,
     },
 };
@@ -231,497 +231,497 @@ pub const feature_fp64Fp16Denormals = Feature{
 pub const feature_fpExceptions = Feature{
     .name = "fp-exceptions",
     .description = "Enable floating point exceptions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastFmaf = Feature{
     .name = "fast-fmaf",
     .description = "Assuming f32 fma is at least as fast as mul + add",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatAddressSpace = Feature{
     .name = "flat-address-space",
     .description = "Support flat address space",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatForGlobal = Feature{
     .name = "flat-for-global",
     .description = "Force to generate flat instruction for global",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatGlobalInsts = Feature{
     .name = "flat-global-insts",
     .description = "Have global_* flat memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatInstOffsets = Feature{
     .name = "flat-inst-offsets",
     .description = "Flat instructions have immediate offset addressing mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatScratchInsts = Feature{
     .name = "flat-scratch-insts",
     .description = "Have scratch_* flat memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_flatSegmentOffsetBug = Feature{
     .name = "flat-segment-offset-bug",
     .description = "GFX10 bug, inst_offset ignored in flat segment",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fmaMixInsts = Feature{
     .name = "fma-mix-insts",
     .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gcn3Encoding = Feature{
     .name = "gcn3-encoding",
     .description = "Encoding format for VI",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gfx7Gfx8Gfx9Insts = Feature{
     .name = "gfx7-gfx8-gfx9-insts",
     .description = "Instructions shared in GFX7, GFX8, GFX9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gfx8Insts = Feature{
     .name = "gfx8-insts",
     .description = "Additional instructions for GFX8+",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gfx9Insts = Feature{
     .name = "gfx9-insts",
     .description = "Additional instructions for GFX9+",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gfx10Insts = Feature{
     .name = "gfx10-insts",
     .description = "Additional instructions for GFX10+",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_instFwdPrefetchBug = Feature{
     .name = "inst-fwd-prefetch-bug",
     .description = "S_INST_PREFETCH instruction causes shader to hang",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_intClampInsts = Feature{
     .name = "int-clamp-insts",
     .description = "Support clamp for integer destination",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_inv2piInlineImm = Feature{
     .name = "inv-2pi-inline-imm",
     .description = "Has 1 / (2 * pi) as inline immediate",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ldsbankcount16 = Feature{
     .name = "ldsbankcount16",
     .description = "The number of LDS banks per compute unit.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ldsbankcount32 = Feature{
     .name = "ldsbankcount32",
     .description = "The number of LDS banks per compute unit.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ldsBranchVmemWarHazard = Feature{
     .name = "lds-branch-vmem-war-hazard",
     .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ldsMisalignedBug = Feature{
     .name = "lds-misaligned-bug",
     .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_localmemorysize0 = Feature{
     .name = "localmemorysize0",
     .description = "The size of local memory in bytes",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_localmemorysize32768 = Feature{
     .name = "localmemorysize32768",
     .description = "The size of local memory in bytes",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_localmemorysize65536 = Feature{
     .name = "localmemorysize65536",
     .description = "The size of local memory in bytes",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_maiInsts = Feature{
     .name = "mai-insts",
     .description = "Has mAI instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mfmaInlineLiteralBug = Feature{
     .name = "mfma-inline-literal-bug",
     .description = "MFMA cannot use inline literal as SrcC",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mimgR128 = Feature{
     .name = "mimg-r128",
     .description = "Support 128-bit texture resources",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_madMixInsts = Feature{
     .name = "mad-mix-insts",
     .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_maxPrivateElementSize4 = Feature{
     .name = "max-private-element-size-4",
     .description = "Maximum private access size may be 4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_maxPrivateElementSize8 = Feature{
     .name = "max-private-element-size-8",
     .description = "Maximum private access size may be 8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_maxPrivateElementSize16 = Feature{
     .name = "max-private-element-size-16",
     .description = "Maximum private access size may be 16",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_movrel = Feature{
     .name = "movrel",
     .description = "Has v_movrel*_b32 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nsaEncoding = Feature{
     .name = "nsa-encoding",
     .description = "Support NSA encoding for image instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nsaToVmemBug = Feature{
     .name = "nsa-to-vmem-bug",
     .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noDataDepHazard = Feature{
     .name = "no-data-dep-hazard",
     .description = "Does not need SW waitstates",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noSdstCmpx = Feature{
     .name = "no-sdst-cmpx",
     .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_offset3fBug = Feature{
     .name = "offset-3f-bug",
     .description = "Branch offset of 3f hardware bug",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_pkFmacF16Inst = Feature{
     .name = "pk-fmac-f16-inst",
     .description = "Has v_pk_fmac_f16 instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_promoteAlloca = Feature{
     .name = "promote-alloca",
     .description = "Enable promote alloca pass",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_r128A16 = Feature{
     .name = "r128-a16",
     .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_registerBanking = Feature{
     .name = "register-banking",
     .description = "Has register banking",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwa = Feature{
     .name = "sdwa",
     .description = "Support SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwaMav = Feature{
     .name = "sdwa-mav",
     .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwaOmod = Feature{
     .name = "sdwa-omod",
     .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwaOutModsVopc = Feature{
     .name = "sdwa-out-mods-vopc",
     .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwaScalar = Feature{
     .name = "sdwa-scalar",
     .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sdwaSdst = Feature{
     .name = "sdwa-sdst",
     .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sgprInitBug = Feature{
     .name = "sgpr-init-bug",
     .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_smemToVectorWriteHazard = Feature{
     .name = "smem-to-vector-write-hazard",
     .description = "s_load_dword followed by v_cmp page faults",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sMemrealtime = Feature{
     .name = "s-memrealtime",
     .description = "Has s_memrealtime instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sramEcc = Feature{
     .name = "sram-ecc",
     .description = "Enable SRAM ECC",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_scalarAtomics = Feature{
     .name = "scalar-atomics",
     .description = "Has atomic scalar memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_scalarFlatScratchInsts = Feature{
     .name = "scalar-flat-scratch-insts",
     .description = "Have s_scratch_* flat memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_scalarStores = Feature{
     .name = "scalar-stores",
     .description = "Has store scalar memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_trapHandler = Feature{
     .name = "trap-handler",
     .description = "Trap handler support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_trigReducedRange = Feature{
     .name = "trig-reduced-range",
     .description = "Requires use of fract on arguments to trig instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_unalignedBufferAccess = Feature{
     .name = "unaligned-buffer-access",
     .description = "Support unaligned global loads and stores",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_unalignedScratchAccess = Feature{
     .name = "unaligned-scratch-access",
     .description = "Support unaligned scratch loads and stores",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_unpackedD16Vmem = Feature{
     .name = "unpacked-d16-vmem",
     .description = "Has unpacked d16 vmem instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vgprIndexMode = Feature{
     .name = "vgpr-index-mode",
     .description = "Has VGPR mode register indexing",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vmemToScalarWriteHazard = Feature{
     .name = "vmem-to-scalar-write-hazard",
     .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vop3Literal = Feature{
     .name = "vop3-literal",
     .description = "Can use one literal in VOP3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vop3p = Feature{
     .name = "vop3p",
     .description = "Has VOP3P packed instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vcmpxExecWarHazard = Feature{
     .name = "vcmpx-exec-war-hazard",
     .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vcmpxPermlaneHazard = Feature{
     .name = "vcmpx-permlane-hazard",
     .description = "TODO: describe me",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vscnt = Feature{
     .name = "vscnt",
     .description = "Has separate store vscnt counter",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_wavefrontsize16 = Feature{
     .name = "wavefrontsize16",
     .description = "The number of threads per wavefront",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_wavefrontsize32 = Feature{
     .name = "wavefrontsize32",
     .description = "The number of threads per wavefront",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_wavefrontsize64 = Feature{
     .name = "wavefrontsize64",
     .description = "The number of threads per wavefront",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xnack = Feature{
     .name = "xnack",
     .description = "Enable XNACK support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_halfRate64Ops = Feature{
     .name = "half-rate-64-ops",
     .description = "Most fp64 instructions are half rate instead of quarter",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -834,53 +834,53 @@ pub const features = &[_]*const Feature {
 pub const cpu_bonaire = Cpu{
     .name = "bonaire",
     .llvm_name = "bonaire",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_carrizo = Cpu{
     .name = "carrizo",
     .llvm_name = "carrizo",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -889,40 +889,40 @@ pub const cpu_carrizo = Cpu{
 pub const cpu_fiji = Cpu{
     .name = "fiji",
     .llvm_name = "fiji",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_wavefrontsize64,
     },
 };
@@ -930,7 +930,7 @@ pub const cpu_generic = Cpu{
 pub const cpu_genericHsa = Cpu{
     .name = "generic-hsa",
     .llvm_name = "generic-hsa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_flatAddressSpace,
         &feature_wavefrontsize64,
     },
@@ -939,45 +939,45 @@ pub const cpu_genericHsa = Cpu{
 pub const cpu_gfx1010 = Cpu{
     .name = "gfx1010",
     .llvm_name = "gfx1010",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_mimgR128,
+        &feature_noSdstCmpx,
+        &feature_flatScratchInsts,
+        &feature_fp64,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_dpp8,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
+        &feature_mimgR128,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
         &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_apertureRegs,
-        &feature_flatGlobalInsts,
-        &feature_fp64,
+        &feature_gfx8Insts,
+        &feature_intClampInsts,
         &feature_vscnt,
-        &feature_flatScratchInsts,
-        &feature_dpp,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSdstCmpx,
-        &feature_pkFmacF16Inst,
-        &feature_noSramEccSupport,
-        &feature_vop3Literal,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
         &feature_gfx10Insts,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_noDataDepHazard,
-        &feature_fmaMixInsts,
+        &feature_flatGlobalInsts,
         &feature_sdwaOmod,
+        &feature_dpp8,
+        &feature_pkFmacF16Inst,
+        &feature_dpp,
+        &feature_sdwaSdst,
+        &feature_flatInstOffsets,
+        &feature_fmaMixInsts,
+        &feature_registerBanking,
+        &feature_noDataDepHazard,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -999,7 +999,7 @@ pub const cpu_gfx1010 = Cpu{
 pub const cpu_gfx1011 = Cpu{
     .name = "gfx1011",
     .llvm_name = "gfx1011",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_dlInsts,
         &feature_noXnackSupport,
@@ -1008,40 +1008,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_mimgR128,
+        &feature_noSdstCmpx,
+        &feature_flatScratchInsts,
+        &feature_fp64,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_dpp8,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
+        &feature_mimgR128,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
         &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_apertureRegs,
-        &feature_flatGlobalInsts,
-        &feature_fp64,
+        &feature_gfx8Insts,
+        &feature_intClampInsts,
         &feature_vscnt,
-        &feature_flatScratchInsts,
-        &feature_dpp,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSdstCmpx,
-        &feature_pkFmacF16Inst,
-        &feature_noSramEccSupport,
-        &feature_vop3Literal,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
         &feature_gfx10Insts,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_noDataDepHazard,
-        &feature_fmaMixInsts,
+        &feature_flatGlobalInsts,
         &feature_sdwaOmod,
+        &feature_dpp8,
+        &feature_pkFmacF16Inst,
+        &feature_dpp,
+        &feature_sdwaSdst,
+        &feature_flatInstOffsets,
+        &feature_fmaMixInsts,
+        &feature_registerBanking,
+        &feature_noDataDepHazard,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1062,7 +1062,7 @@ pub const cpu_gfx1011 = Cpu{
 pub const cpu_gfx1012 = Cpu{
     .name = "gfx1012",
     .llvm_name = "gfx1012",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_dlInsts,
         &feature_noXnackSupport,
@@ -1071,40 +1071,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_mimgR128,
+        &feature_noSdstCmpx,
+        &feature_flatScratchInsts,
+        &feature_fp64,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_dpp8,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
+        &feature_mimgR128,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
         &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_apertureRegs,
-        &feature_flatGlobalInsts,
-        &feature_fp64,
+        &feature_gfx8Insts,
+        &feature_intClampInsts,
         &feature_vscnt,
-        &feature_flatScratchInsts,
-        &feature_dpp,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
-        &feature_sdwaSdst,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSdstCmpx,
-        &feature_pkFmacF16Inst,
-        &feature_noSramEccSupport,
-        &feature_vop3Literal,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
         &feature_gfx10Insts,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_noDataDepHazard,
-        &feature_fmaMixInsts,
+        &feature_flatGlobalInsts,
         &feature_sdwaOmod,
+        &feature_dpp8,
+        &feature_pkFmacF16Inst,
+        &feature_dpp,
+        &feature_sdwaSdst,
+        &feature_flatInstOffsets,
+        &feature_fmaMixInsts,
+        &feature_registerBanking,
+        &feature_noDataDepHazard,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1126,18 +1126,18 @@ pub const cpu_gfx1012 = Cpu{
 pub const cpu_gfx600 = Cpu{
     .name = "gfx600",
     .llvm_name = "gfx600",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1145,58 +1145,58 @@ pub const cpu_gfx600 = Cpu{
 pub const cpu_gfx601 = Cpu{
     .name = "gfx601",
     .llvm_name = "gfx601",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx700 = Cpu{
     .name = "gfx700",
     .llvm_name = "gfx700",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx701 = Cpu{
     .name = "gfx701",
     .llvm_name = "gfx701",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1204,94 +1204,94 @@ pub const cpu_gfx701 = Cpu{
 pub const cpu_gfx702 = Cpu{
     .name = "gfx702",
     .llvm_name = "gfx702",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount16,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx703 = Cpu{
     .name = "gfx703",
     .llvm_name = "gfx703",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx704 = Cpu{
     .name = "gfx704",
     .llvm_name = "gfx704",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx801 = Cpu{
     .name = "gfx801",
     .llvm_name = "gfx801",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1300,98 +1300,98 @@ pub const cpu_gfx801 = Cpu{
 pub const cpu_gfx802 = Cpu{
     .name = "gfx802",
     .llvm_name = "gfx802",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx803 = Cpu{
     .name = "gfx803",
     .llvm_name = "gfx803",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_gfx810 = Cpu{
     .name = "gfx810",
     .llvm_name = "gfx810",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
         &feature_xnack,
     },
 };
@@ -1399,40 +1399,40 @@ pub const cpu_gfx810 = Cpu{
 pub const cpu_gfx900 = Cpu{
     .name = "gfx900",
     .llvm_name = "gfx900",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
     },
@@ -1441,39 +1441,39 @@ pub const cpu_gfx900 = Cpu{
 pub const cpu_gfx902 = Cpu{
     .name = "gfx902",
     .llvm_name = "gfx902",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1483,41 +1483,41 @@ pub const cpu_gfx902 = Cpu{
 pub const cpu_gfx904 = Cpu{
     .name = "gfx904",
     .llvm_name = "gfx904",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
     },
 };
@@ -1525,43 +1525,43 @@ pub const cpu_gfx904 = Cpu{
 pub const cpu_gfx906 = Cpu{
     .name = "gfx906",
     .llvm_name = "gfx906",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
     },
@@ -1570,7 +1570,7 @@ pub const cpu_gfx906 = Cpu{
 pub const cpu_gfx908 = Cpu{
     .name = "gfx908",
     .llvm_name = "gfx908",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_atomicFaddInsts,
         &feature_codeObjectV3,
         &feature_dlInsts,
@@ -1581,36 +1581,36 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
         &feature_maiInsts,
         &feature_mfmaInlineLiteralBug,
@@ -1623,38 +1623,38 @@ pub const cpu_gfx908 = Cpu{
 pub const cpu_gfx909 = Cpu{
     .name = "gfx909",
     .llvm_name = "gfx909",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
+        &feature_flatScratchInsts,
+        &feature_fp64,
         &feature_r128A16,
+        &feature_sMemrealtime,
         &feature_addNoCarryInsts,
-        &feature_inv2piInlineImm,
+        &feature_vop3p,
+        &feature_fastFmaf,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
         &feature_gfx9Insts,
+        &feature_flatAddressSpace,
+        &feature_apertureRegs,
+        &feature_sdwaScalar,
         &feature_ciInsts,
+        &feature_scalarAtomics,
+        &feature_scalarFlatScratchInsts,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_fastFmaf,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_apertureRegs,
-        &feature_scalarAtomics,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
+        &feature_localmemorysize65536,
         &feature_flatGlobalInsts,
-        &feature_fp64,
-        &feature_flatScratchInsts,
+        &feature_sdwaOmod,
         &feature_dpp,
-        &feature_scalarFlatScratchInsts,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
-        &feature_vop3p,
-        &feature_flatInstOffsets,
-        &feature_sdwaScalar,
         &feature_sdwaSdst,
-        &feature_localmemorysize65536,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
-        &feature_sdwaOmod,
+        &feature_flatInstOffsets,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1664,38 +1664,38 @@ pub const cpu_gfx909 = Cpu{
 pub const cpu_hainan = Cpu{
     .name = "hainan",
     .llvm_name = "hainan",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_hawaii = Cpu{
     .name = "hawaii",
     .llvm_name = "hawaii",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1703,225 +1703,225 @@ pub const cpu_hawaii = Cpu{
 pub const cpu_iceland = Cpu{
     .name = "iceland",
     .llvm_name = "iceland",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_kabini = Cpu{
     .name = "kabini",
     .llvm_name = "kabini",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_kaveri = Cpu{
     .name = "kaveri",
     .llvm_name = "kaveri",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_mullins = Cpu{
     .name = "mullins",
     .llvm_name = "mullins",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_noSramEccSupport,
         &feature_flatAddressSpace,
+        &feature_fp64,
         &feature_mimgR128,
-        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_ciInsts,
-        &feature_wavefrontsize64,
-        &feature_fp64,
         &feature_movrel,
         &feature_localmemorysize65536,
+        &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_oland = Cpu{
     .name = "oland",
     .llvm_name = "oland",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_pitcairn = Cpu{
     .name = "pitcairn",
     .llvm_name = "pitcairn",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_polaris10 = Cpu{
     .name = "polaris10",
     .llvm_name = "polaris10",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_polaris11 = Cpu{
     .name = "polaris11",
     .llvm_name = "polaris11",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_stoney = Cpu{
     .name = "stoney",
     .llvm_name = "stoney",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
         &feature_xnack,
     },
 };
@@ -1929,18 +1929,18 @@ pub const cpu_stoney = Cpu{
 pub const cpu_tahiti = Cpu{
     .name = "tahiti",
     .llvm_name = "tahiti",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1948,51 +1948,51 @@ pub const cpu_tahiti = Cpu{
 pub const cpu_tonga = Cpu{
     .name = "tonga",
     .llvm_name = "tonga",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
+        &feature_fp64,
+        &feature_sMemrealtime,
+        &feature_BitInsts16,
+        &feature_wavefrontsize64,
+        &feature_sdwa,
+        &feature_flatAddressSpace,
+        &feature_sdwaMav,
         &feature_mimgR128,
-        &feature_inv2piInlineImm,
         &feature_ciInsts,
+        &feature_noSramEccSupport,
+        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_scalarStores,
         &feature_gcn3Encoding,
-        &feature_fp64,
-        &feature_dpp,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sMemrealtime,
+        &feature_gfx8Insts,
+        &feature_scalarStores,
+        &feature_intClampInsts,
         &feature_movrel,
         &feature_localmemorysize65536,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_flatAddressSpace,
-        &feature_BitInsts16,
-        &feature_sdwaMav,
-        &feature_sdwa,
         &feature_sdwaOutModsVopc,
-        &feature_wavefrontsize64,
-        &feature_intClampInsts,
+        &feature_dpp,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_trigReducedRange,
     },
 };
 
 pub const cpu_verde = Cpu{
     .name = "verde",
     .llvm_name = "verde",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_noSramEccSupport,
-        &feature_mimgR128,
-        &feature_trigReducedRange,
-        &feature_wavefrontsize64,
         &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_mimgR128,
         &feature_movrel,
+        &feature_noSramEccSupport,
+        &feature_wavefrontsize64,
+        &feature_trigReducedRange,
     },
 };
 
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 73f2d3ead9eaa1ff6a03a9d9366e27bf92da5f77..964b2882af7b2bd511b1270febea273c1441a6c4 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -4,146 +4,146 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_msecext8 = Feature{
     .name = "8msecext",
     .description = "Enable support for ARMv8-M Security Extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_aclass = Feature{
     .name = "aclass",
     .description = "Is application profile ('A' series)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_acquireRelease = Feature{
     .name = "acquire-release",
     .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avoidMovsShop = Feature{
     .name = "avoid-movs-shop",
     .description = "Avoid movs instructions with shifter operand",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avoidPartialCpsr = Feature{
     .name = "avoid-partial-cpsr",
     .description = "Avoid CPSR partial update for OOO execution",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Enable support for CRC instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cheapPredicableCpsr = Feature{
     .name = "cheap-predicable-cpsr",
     .description = "Disable +1 predication cost for instructions updating CPSR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vldnAlign = Feature{
     .name = "vldn-align",
     .description = "Check for VLDn unaligned access",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable support for Cryptography extensions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_d32 = Feature{
     .name = "d32",
     .description = "Extend FP to 32 double registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_db = Feature{
     .name = "db",
     .description = "Has data barrier (dmb/dsb) instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dfb = Feature{
     .name = "dfb",
     .description = "Has full data barrier (dfb) instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dsp = Feature{
     .name = "dsp",
     .description = "Supports DSP instructions in ARM and/or Thumb2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dontWidenVmovs = Feature{
     .name = "dont-widen-vmovs",
     .description = "Don't widen VMOVS to VMOVD",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dotprod = Feature{
     .name = "dotprod",
     .description = "Enable support for dot product instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_executeOnly = Feature{
     .name = "execute-only",
     .description = "Enable the generation of execute only code.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_expandFpMlx = Feature{
     .name = "expand-fp-mlx",
     .description = "Expand VFP/NEON MLA/MLS instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp16 = Feature{
     .name = "fp16",
     .description = "Enable half-precision floating point",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
     .description = "Enable full half-precision floating point fml instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
     },
@@ -152,7 +152,7 @@ pub const feature_fp16fml = Feature{
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Floating point unit supports double precision",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -160,24 +160,24 @@ pub const feature_fp64 = Feature{
 pub const feature_fpao = Feature{
     .name = "fpao",
     .description = "Enable fast computation of positive address offsets",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
     .description = "Enable ARMv8 FP",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
         &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8d16 = Feature{
     .name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
     },
@@ -186,7 +186,7 @@ pub const feature_fpArmv8d16 = Feature{
 pub const feature_fpArmv8d16sp = Feature{
     .name = "fp-armv8d16sp",
     .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fp16,
         &feature_fpregs,
     },
@@ -195,24 +195,24 @@ pub const feature_fpArmv8d16sp = Feature{
 pub const feature_fpArmv8sp = Feature{
     .name = "fp-armv8sp",
     .description = "Enable ARMv8 FP with no double precision",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
         &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpregs = Feature{
     .name = "fpregs",
     .description = "Enable FP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fpregs16 = Feature{
     .name = "fpregs16",
     .description = "Enable 16-bit FP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -220,7 +220,7 @@ pub const feature_fpregs16 = Feature{
 pub const feature_fpregs64 = Feature{
     .name = "fpregs64",
     .description = "Enable 64-bit FP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -228,314 +228,314 @@ pub const feature_fpregs64 = Feature{
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
     .description = "Enable full half-precision floating point",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_hwdivArm = Feature{
     .name = "hwdiv-arm",
     .description = "Enable divide instructions in ARM mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_hwdiv = Feature{
     .name = "hwdiv",
     .description = "Enable divide instructions in Thumb",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noBranchPredictor = Feature{
     .name = "no-branch-predictor",
     .description = "Has no branch predictor",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_retAddrStack = Feature{
     .name = "ret-addr-stack",
     .description = "Has return address stack",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowfpvmlx = Feature{
     .name = "slowfpvmlx",
     .description = "Disable VFP / NEON MAC instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vmlxHazards = Feature{
     .name = "vmlx-hazards",
     .description = "Has VMLx hazards",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lob = Feature{
     .name = "lob",
     .description = "Enable Low Overhead Branch extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Generate calls via indirect call instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mclass = Feature{
     .name = "mclass",
     .description = "Is microcontroller profile ('M' series)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mp = Feature{
     .name = "mp",
     .description = "Supports Multiprocessing extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mve1beat = Feature{
     .name = "mve1beat",
     .description = "Model MVE instructions as a 1 beat per tick architecture",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mve2beat = Feature{
     .name = "mve2beat",
     .description = "Model MVE instructions as a 2 beats per tick architecture",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mve4beat = Feature{
     .name = "mve4beat",
     .description = "Model MVE instructions as a 4 beats per tick architecture",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_muxedUnits = Feature{
     .name = "muxed-units",
     .description = "Has muxed AGU and NEON/FPU",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_neon = Feature{
     .name = "neon",
     .description = "Enable NEON instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_neonfp = Feature{
     .name = "neonfp",
     .description = "Use NEON for single precision FP",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_neonFpmovs = Feature{
     .name = "neon-fpmovs",
     .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_naclTrap = Feature{
     .name = "nacl-trap",
     .description = "NaCl trap",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noarm = Feature{
     .name = "noarm",
     .description = "Does not support ARM mode execution",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noMovt = Feature{
     .name = "no-movt",
     .description = "Don't use movt/movw pairs for 32-bit imms",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_disablePostraScheduler = Feature{
     .name = "disable-postra-scheduler",
     .description = "Don't schedule again after register allocation",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nonpipelinedVfp = Feature{
     .name = "nonpipelined-vfp",
     .description = "VFP instructions are not pipelined",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_perfmon = Feature{
     .name = "perfmon",
     .description = "Enable support for Performance Monitor extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bit32 = Feature{
     .name = "32bit",
     .description = "Prefer 32-bit Thumb instrs",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_preferIshst = Feature{
     .name = "prefer-ishst",
     .description = "Prefer ISHST barriers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loopAlign = Feature{
     .name = "loop-align",
     .description = "Prefer 32-bit alignment for loops",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_preferVmovsr = Feature{
     .name = "prefer-vmovsr",
     .description = "Prefer VMOVSR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_profUnpr = Feature{
     .name = "prof-unpr",
     .description = "Is profitable to unpredicate",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ras = Feature{
     .name = "ras",
     .description = "Enable Reliability, Availability and Serviceability extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rclass = Feature{
     .name = "rclass",
     .description = "Is realtime profile ('R' series)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_readTpHard = Feature{
     .name = "read-tp-hard",
     .description = "Reading thread pointer from register",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reserveR9 = Feature{
     .name = "reserve-r9",
     .description = "Reserve R9, making it unavailable as GPR",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sb = Feature{
     .name = "sb",
     .description = "Enable v8.5a Speculation Barrier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sha2 = Feature{
     .name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_slowFpBrcc = Feature{
     .name = "slow-fp-brcc",
     .description = "FP compare + branch is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowLoadDSubreg = Feature{
     .name = "slow-load-D-subreg",
     .description = "Loading into D subregs is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowOddReg = Feature{
     .name = "slow-odd-reg",
     .description = "VLDM/VSTM starting with an odd register is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowVdup32 = Feature{
     .name = "slow-vdup32",
     .description = "Has slow VDUP32 - prefer VMOV",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowVgetlni32 = Feature{
     .name = "slow-vgetlni32",
     .description = "Has slow VGETLNi32 - prefer VMOV",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_splatVfpNeon = Feature{
     .name = "splat-vfp-neon",
     .description = "Splat register from VFP to NEON",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dontWidenVmovs,
     },
 };
@@ -543,56 +543,56 @@ pub const feature_splatVfpNeon = Feature{
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
     .description = "Disallow all unaligned memory access",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_thumb2 = Feature{
     .name = "thumb2",
     .description = "Enable Thumb2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_trustzone = Feature{
     .name = "trustzone",
     .description = "Enable support for TrustZone security extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useMisched = Feature{
     .name = "use-misched",
     .description = "Use the MachineScheduler",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_wideStrideVfp = Feature{
     .name = "wide-stride-vfp",
     .description = "Use a wide stride when allocating VFP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_v7clrex = Feature{
     .name = "v7clrex",
     .description = "Has v7 clrex instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vfp2 = Feature{
     .name = "vfp2",
     .description = "Enable VFP2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -600,7 +600,7 @@ pub const feature_vfp2 = Feature{
 pub const feature_vfp2sp = Feature{
     .name = "vfp2sp",
     .description = "Enable VFP2 instructions with no double precision",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -608,16 +608,16 @@ pub const feature_vfp2sp = Feature{
 pub const feature_vfp3 = Feature{
     .name = "vfp3",
     .description = "Enable VFP3 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vfp3d16 = Feature{
     .name = "vfp3d16",
     .description = "Enable VFP3 instructions with only 16 d-registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -625,7 +625,7 @@ pub const feature_vfp3d16 = Feature{
 pub const feature_vfp3d16sp = Feature{
     .name = "vfp3d16sp",
     .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
 };
@@ -633,61 +633,61 @@ pub const feature_vfp3d16sp = Feature{
 pub const feature_vfp3sp = Feature{
     .name = "vfp3sp",
     .description = "Enable VFP3 instructions with no double precision",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vfp4 = Feature{
     .name = "vfp4",
     .description = "Enable VFP4 instructions",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
         &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_vfp4d16 = Feature{
     .name = "vfp4d16",
     .description = "Enable VFP4 instructions with only 16 d-registers",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_vfp4d16sp = Feature{
     .name = "vfp4d16sp",
     .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_vfp4sp = Feature{
     .name = "vfp4sp",
     .description = "Enable VFP4 instructions with no double precision",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp16,
+    .dependencies = &[_]*const Feature {
         &feature_fpregs,
         &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_vmlxForwarding = Feature{
     .name = "vmlx-forwarding",
     .description = "Has multiplier accumulator forwarding",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_virtualization = Feature{
     .name = "virtualization",
     .description = "Supports Virtualization extension",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hwdiv,
         &feature_hwdivArm,
     },
@@ -696,7 +696,7 @@ pub const feature_virtualization = Feature{
 pub const feature_zcz = Feature{
     .name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -799,42 +799,42 @@ pub const features = &[_]*const Feature {
 pub const cpu_arm1020e = Cpu{
     .name = "arm1020e",
     .llvm_name = "arm1020e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm1020t = Cpu{
     .name = "arm1020t",
     .llvm_name = "arm1020t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm1022e = Cpu{
     .name = "arm1022e",
     .llvm_name = "arm1022e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm10e = Cpu{
     .name = "arm10e",
     .llvm_name = "arm10e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm10tdmi = Cpu{
     .name = "arm10tdmi",
     .llvm_name = "arm10tdmi",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm1136jS = Cpu{
     .name = "arm1136j-s",
     .llvm_name = "arm1136j-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dsp,
     },
 };
@@ -842,7 +842,7 @@ pub const cpu_arm1136jS = Cpu{
 pub const cpu_arm1136jfS = Cpu{
     .name = "arm1136jf-s",
     .llvm_name = "arm1136jf-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dsp,
         &feature_slowfpvmlx,
         &feature_fpregs,
@@ -853,18 +853,18 @@ pub const cpu_arm1136jfS = Cpu{
 pub const cpu_arm1156t2S = Cpu{
     .name = "arm1156t2-s",
     .llvm_name = "arm1156t2-s",
-    .subfeatures = &[_]*const Feature {
-        &feature_dsp,
+    .dependencies = &[_]*const Feature {
         &feature_thumb2,
+        &feature_dsp,
     },
 };
 
 pub const cpu_arm1156t2fS = Cpu{
     .name = "arm1156t2f-s",
     .llvm_name = "arm1156t2f-s",
-    .subfeatures = &[_]*const Feature {
-        &feature_dsp,
+    .dependencies = &[_]*const Feature {
         &feature_thumb2,
+        &feature_dsp,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -874,7 +874,7 @@ pub const cpu_arm1156t2fS = Cpu{
 pub const cpu_arm1176jS = Cpu{
     .name = "arm1176j-s",
     .llvm_name = "arm1176j-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_trustzone,
     },
 };
@@ -882,7 +882,7 @@ pub const cpu_arm1176jS = Cpu{
 pub const cpu_arm1176jzS = Cpu{
     .name = "arm1176jz-s",
     .llvm_name = "arm1176jz-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_trustzone,
     },
 };
@@ -890,7 +890,7 @@ pub const cpu_arm1176jzS = Cpu{
 pub const cpu_arm1176jzfS = Cpu{
     .name = "arm1176jzf-s",
     .llvm_name = "arm1176jzf-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_trustzone,
         &feature_slowfpvmlx,
         &feature_fpregs,
@@ -901,134 +901,134 @@ pub const cpu_arm1176jzfS = Cpu{
 pub const cpu_arm710t = Cpu{
     .name = "arm710t",
     .llvm_name = "arm710t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm720t = Cpu{
     .name = "arm720t",
     .llvm_name = "arm720t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm7tdmi = Cpu{
     .name = "arm7tdmi",
     .llvm_name = "arm7tdmi",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm7tdmiS = Cpu{
     .name = "arm7tdmi-s",
     .llvm_name = "arm7tdmi-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm8 = Cpu{
     .name = "arm8",
     .llvm_name = "arm8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm810 = Cpu{
     .name = "arm810",
     .llvm_name = "arm810",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm9 = Cpu{
     .name = "arm9",
     .llvm_name = "arm9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm920 = Cpu{
     .name = "arm920",
     .llvm_name = "arm920",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm920t = Cpu{
     .name = "arm920t",
     .llvm_name = "arm920t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm922t = Cpu{
     .name = "arm922t",
     .llvm_name = "arm922t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm926ejS = Cpu{
     .name = "arm926ej-s",
     .llvm_name = "arm926ej-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm940t = Cpu{
     .name = "arm940t",
     .llvm_name = "arm940t",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm946eS = Cpu{
     .name = "arm946e-s",
     .llvm_name = "arm946e-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm966eS = Cpu{
     .name = "arm966e-s",
     .llvm_name = "arm966e-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm968eS = Cpu{
     .name = "arm968e-s",
     .llvm_name = "arm968e-s",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm9e = Cpu{
     .name = "arm9e",
     .llvm_name = "arm9e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm9tdmi = Cpu{
     .name = "arm9tdmi",
     .llvm_name = "arm9tdmi",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_cortexA12 = Cpu{
     .name = "cortex-a12",
     .llvm_name = "cortex-a12",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1045,15 +1045,15 @@ pub const cpu_cortexA12 = Cpu{
 pub const cpu_cortexA15 = Cpu{
     .name = "cortex-a15",
     .llvm_name = "cortex-a15",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_dontWidenVmovs,
@@ -1073,15 +1073,15 @@ pub const cpu_cortexA15 = Cpu{
 pub const cpu_cortexA17 = Cpu{
     .name = "cortex-a17",
     .llvm_name = "cortex-a17",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1098,22 +1098,22 @@ pub const cpu_cortexA17 = Cpu{
 pub const cpu_cortexA32 = Cpu{
     .name = "cortex-a32",
     .llvm_name = "cortex-a32",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -1121,22 +1121,22 @@ pub const cpu_cortexA32 = Cpu{
 pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -1144,15 +1144,15 @@ pub const cpu_cortexA35 = Cpu{
 pub const cpu_cortexA5 = Cpu{
     .name = "cortex-a5",
     .llvm_name = "cortex-a5",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_mp,
@@ -1167,22 +1167,22 @@ pub const cpu_cortexA5 = Cpu{
 pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
         &feature_fpao,
     },
@@ -1191,23 +1191,23 @@ pub const cpu_cortexA53 = Cpu{
 pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_dotprod,
     },
 };
@@ -1215,22 +1215,22 @@ pub const cpu_cortexA55 = Cpu{
 pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
         &feature_crypto,
@@ -1241,15 +1241,15 @@ pub const cpu_cortexA57 = Cpu{
 pub const cpu_cortexA7 = Cpu{
     .name = "cortex-a7",
     .llvm_name = "cortex-a7",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1268,22 +1268,22 @@ pub const cpu_cortexA7 = Cpu{
 pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -1291,22 +1291,22 @@ pub const cpu_cortexA72 = Cpu{
 pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -1314,23 +1314,23 @@ pub const cpu_cortexA73 = Cpu{
 pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_dotprod,
     },
 };
@@ -1338,23 +1338,23 @@ pub const cpu_cortexA75 = Cpu{
 pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1364,23 +1364,23 @@ pub const cpu_cortexA76 = Cpu{
 pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1390,15 +1390,15 @@ pub const cpu_cortexA76ae = Cpu{
 pub const cpu_cortexA8 = Cpu{
     .name = "cortex-a8",
     .llvm_name = "cortex-a8",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1412,15 +1412,15 @@ pub const cpu_cortexA8 = Cpu{
 pub const cpu_cortexA9 = Cpu{
     .name = "cortex-a9",
     .llvm_name = "cortex-a9",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_expandFpMlx,
@@ -1439,48 +1439,48 @@ pub const cpu_cortexA9 = Cpu{
 pub const cpu_cortexM0 = Cpu{
     .name = "cortex-m0",
     .llvm_name = "cortex-m0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_db,
+        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_mclass,
     },
 };
 
 pub const cpu_cortexM0plus = Cpu{
     .name = "cortex-m0plus",
     .llvm_name = "cortex-m0plus",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_db,
+        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_mclass,
     },
 };
 
 pub const cpu_cortexM1 = Cpu{
     .name = "cortex-m1",
     .llvm_name = "cortex-m1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_db,
+        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_mclass,
     },
 };
 
 pub const cpu_cortexM23 = Cpu{
     .name = "cortex-m23",
     .llvm_name = "cortex-m23",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_msecext8,
+    .dependencies = &[_]*const Feature {
+        &feature_mclass,
         &feature_db,
+        &feature_msecext8,
         &feature_strictAlign,
         &feature_acquireRelease,
-        &feature_noarm,
+        &feature_hwdiv,
         &feature_v7clrex,
-        &feature_mclass,
+        &feature_noarm,
         &feature_noMovt,
     },
 };
@@ -1488,14 +1488,14 @@ pub const cpu_cortexM23 = Cpu{
 pub const cpu_cortexM3 = Cpu{
     .name = "cortex-m3",
     .llvm_name = "cortex-m3",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_v7clrex,
+        &feature_db,
         &feature_mclass,
         &feature_thumb2,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_loopAlign,
         &feature_useAa,
@@ -1506,16 +1506,16 @@ pub const cpu_cortexM3 = Cpu{
 pub const cpu_cortexM33 = Cpu{
     .name = "cortex-m33",
     .llvm_name = "cortex-m33",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_msecext8,
-        &feature_db,
-        &feature_acquireRelease,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_v7clrex,
         &feature_mclass,
+        &feature_db,
+        &feature_msecext8,
         &feature_thumb2,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_noarm,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -1531,16 +1531,16 @@ pub const cpu_cortexM33 = Cpu{
 pub const cpu_cortexM35p = Cpu{
     .name = "cortex-m35p",
     .llvm_name = "cortex-m35p",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_msecext8,
-        &feature_db,
-        &feature_acquireRelease,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_v7clrex,
         &feature_mclass,
+        &feature_db,
+        &feature_msecext8,
         &feature_thumb2,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_noarm,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -1556,22 +1556,22 @@ pub const cpu_cortexM35p = Cpu{
 pub const cpu_cortexM4 = Cpu{
     .name = "cortex-m4",
     .llvm_name = "cortex-m4",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_mclass,
         &feature_thumb2,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
         &feature_loopAlign,
         &feature_useAa,
         &feature_useMisched,
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
         &feature_vfp4d16sp,
     },
 };
@@ -1579,15 +1579,15 @@ pub const cpu_cortexM4 = Cpu{
 pub const cpu_cortexM7 = Cpu{
     .name = "cortex-m7",
     .llvm_name = "cortex-m7",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_mclass,
         &feature_thumb2,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
+        &feature_noarm,
         &feature_fp16,
         &feature_fpregs,
         &feature_fpArmv8d16,
@@ -1597,14 +1597,14 @@ pub const cpu_cortexM7 = Cpu{
 pub const cpu_cortexR4 = Cpu{
     .name = "cortex-r4",
     .llvm_name = "cortex-r4",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_thumb2,
+        &feature_rclass,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
     },
@@ -1613,14 +1613,14 @@ pub const cpu_cortexR4 = Cpu{
 pub const cpu_cortexR4f = Cpu{
     .name = "cortex-r4f",
     .llvm_name = "cortex-r4f",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_thumb2,
+        &feature_rclass,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1633,14 +1633,14 @@ pub const cpu_cortexR4f = Cpu{
 pub const cpu_cortexR5 = Cpu{
     .name = "cortex-r5",
     .llvm_name = "cortex-r5",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_thumb2,
+        &feature_rclass,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
         &feature_retAddrStack,
@@ -1654,22 +1654,22 @@ pub const cpu_cortexR5 = Cpu{
 pub const cpu_cortexR52 = Cpu{
     .name = "cortex-r52",
     .llvm_name = "cortex-r52",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
+        &feature_rclass,
         &feature_mp,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_v7clrex,
         &feature_dfb,
-        &feature_hwdivArm,
         &feature_dsp,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_fpao,
         &feature_useAa,
         &feature_useMisched,
@@ -1679,14 +1679,14 @@ pub const cpu_cortexR52 = Cpu{
 pub const cpu_cortexR7 = Cpu{
     .name = "cortex-r7",
     .llvm_name = "cortex-r7",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_thumb2,
+        &feature_rclass,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1702,14 +1702,14 @@ pub const cpu_cortexR7 = Cpu{
 pub const cpu_cortexR8 = Cpu{
     .name = "cortex-r8",
     .llvm_name = "cortex-r8",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_rclass,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_dsp,
-        &feature_v7clrex,
+        &feature_db,
         &feature_thumb2,
+        &feature_rclass,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_dsp,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1725,22 +1725,22 @@ pub const cpu_cortexR8 = Cpu{
 pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_crypto,
@@ -1757,217 +1757,217 @@ pub const cpu_cyclone = Cpu{
 pub const cpu_ep9312 = Cpu{
     .name = "ep9312",
     .llvm_name = "ep9312",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
-        &feature_slowVdup32,
-        &feature_expandFpMlx,
-        &feature_slowVgetlni32,
         &feature_fuseLiterals,
+        &feature_profUnpr,
         &feature_wideStrideVfp,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
         &feature_dontWidenVmovs,
-        &feature_zcz,
         &feature_fuseAes,
-        &feature_slowfpvmlx,
-        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_zcz,
         &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
     },
 };
 
 pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
-        &feature_slowVdup32,
-        &feature_expandFpMlx,
-        &feature_slowVgetlni32,
         &feature_fuseLiterals,
+        &feature_profUnpr,
         &feature_wideStrideVfp,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
         &feature_dontWidenVmovs,
-        &feature_zcz,
         &feature_fuseAes,
-        &feature_slowfpvmlx,
-        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_zcz,
         &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
     },
 };
 
 pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
-        &feature_slowVdup32,
-        &feature_expandFpMlx,
-        &feature_slowVgetlni32,
         &feature_fuseLiterals,
+        &feature_profUnpr,
         &feature_wideStrideVfp,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
         &feature_dontWidenVmovs,
-        &feature_zcz,
         &feature_fuseAes,
-        &feature_slowfpvmlx,
-        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_zcz,
         &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
     },
 };
 
 pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_slowVdup32,
-        &feature_expandFpMlx,
-        &feature_slowVgetlni32,
         &feature_fuseLiterals,
+        &feature_profUnpr,
         &feature_wideStrideVfp,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
         &feature_dontWidenVmovs,
-        &feature_zcz,
         &feature_fuseAes,
-        &feature_slowfpvmlx,
-        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_zcz,
         &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
     },
 };
 
 pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_slowVdup32,
-        &feature_expandFpMlx,
-        &feature_slowVgetlni32,
         &feature_fuseLiterals,
+        &feature_profUnpr,
         &feature_wideStrideVfp,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
+        &feature_slowVdup32,
+        &feature_slowVgetlni32,
         &feature_dontWidenVmovs,
-        &feature_zcz,
         &feature_fuseAes,
-        &feature_slowfpvmlx,
-        &feature_profUnpr,
+        &feature_retAddrStack,
+        &feature_expandFpMlx,
+        &feature_zcz,
         &feature_useAa,
+        &feature_slowfpvmlx,
+        &feature_slowFpBrcc,
     },
 };
 
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_iwmmxt = Cpu{
     .name = "iwmmxt",
     .llvm_name = "iwmmxt",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_fp16,
@@ -1983,22 +1983,22 @@ pub const cpu_krait = Cpu{
 pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
     },
 };
@@ -2006,7 +2006,7 @@ pub const cpu_kryo = Cpu{
 pub const cpu_mpcore = Cpu{
     .name = "mpcore",
     .llvm_name = "mpcore",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -2016,30 +2016,30 @@ pub const cpu_mpcore = Cpu{
 pub const cpu_mpcorenovfp = Cpu{
     .name = "mpcorenovfp",
     .llvm_name = "mpcorenovfp",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_trustzone,
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_hwdivArm,
         &feature_fpregs,
         &feature_db,
-        &feature_acquireRelease,
-        &feature_d32,
+        &feature_crc,
+        &feature_fp16,
+        &feature_ras,
         &feature_perfmon,
+        &feature_thumb2,
         &feature_mp,
-        &feature_ras,
-        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_hwdiv,
+        &feature_trustzone,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_fp16,
-        &feature_v7clrex,
-        &feature_crc,
-        &feature_thumb2,
         &feature_crypto,
         &feature_dotprod,
     },
@@ -2048,25 +2048,25 @@ pub const cpu_neoverseN1 = Cpu{
 pub const cpu_sc000 = Cpu{
     .name = "sc000",
     .llvm_name = "sc000",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_db,
+        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
-        &feature_mclass,
     },
 };
 
 pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
-    .subfeatures = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_perfmon,
-        &feature_noarm,
-        &feature_v7clrex,
+        &feature_db,
         &feature_mclass,
         &feature_thumb2,
+        &feature_hwdiv,
+        &feature_v7clrex,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_useAa,
         &feature_useMisched,
@@ -2076,43 +2076,43 @@ pub const cpu_sc300 = Cpu{
 pub const cpu_strongarm = Cpu{
     .name = "strongarm",
     .llvm_name = "strongarm",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_strongarm110 = Cpu{
     .name = "strongarm110",
     .llvm_name = "strongarm110",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_strongarm1100 = Cpu{
     .name = "strongarm1100",
     .llvm_name = "strongarm1100",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_strongarm1110 = Cpu{
     .name = "strongarm1110",
     .llvm_name = "strongarm1110",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
-    .subfeatures = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_db,
+    .dependencies = &[_]*const Feature {
         &feature_d32,
         &feature_perfmon,
+        &feature_fpregs,
+        &feature_db,
+        &feature_thumb2,
+        &feature_v7clrex,
         &feature_dsp,
         &feature_aclass,
-        &feature_v7clrex,
-        &feature_thumb2,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
@@ -2139,7 +2139,7 @@ pub const cpu_swift = Cpu{
 pub const cpu_xscale = Cpu{
     .name = "xscale",
     .llvm_name = "xscale",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 79cbb04dc458fb5e9e1f80cb492f90df69b9c4b4..de44399ceaef6b81ebf6d83c3711f3a3b2cc788e 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -4,126 +4,126 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_addsubiw = Feature{
     .name = "addsubiw",
     .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_break = Feature{
     .name = "break",
     .description = "The device supports the `BREAK` debugging instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_des = Feature{
     .name = "des",
     .description = "The device supports the `DES k` encryption instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_eijmpcall = Feature{
     .name = "eijmpcall",
     .description = "The device supports the `EIJMP`/`EICALL` instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_elpm = Feature{
     .name = "elpm",
     .description = "The device supports the ELPM instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_elpmx = Feature{
     .name = "elpmx",
     .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ijmpcall = Feature{
     .name = "ijmpcall",
     .description = "The device supports `IJMP`/`ICALL`instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_jmpcall = Feature{
     .name = "jmpcall",
     .description = "The device supports the `JMP` and `CALL` instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lpm = Feature{
     .name = "lpm",
     .description = "The device supports the `LPM` instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lpmx = Feature{
     .name = "lpmx",
     .description = "The device supports the `LPM Rd, Z[+]` instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_movw = Feature{
     .name = "movw",
     .description = "The device supports the 16-bit MOVW instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mul = Feature{
     .name = "mul",
     .description = "The device supports the multiplication instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rmw = Feature{
     .name = "rmw",
     .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_spm = Feature{
     .name = "spm",
     .description = "The device supports the `SPM` instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_spmx = Feature{
     .name = "spmx",
     .description = "The device supports the `SPM Z+` instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sram = Feature{
     .name = "sram",
     .description = "The device has random access memory",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_smallstack = Feature{
     .name = "smallstack",
     .description = "The device has an 8-bit stack pointer",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tinyencoding = Feature{
     .name = "tinyencoding",
     .description = "The device has Tiny core specific instruction encodings",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -151,48 +151,48 @@ pub const features = &[_]*const Feature {
 pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
-        &feature_lpm,
+    .dependencies = &[_]*const Feature {
         &feature_elpm,
-        &feature_sram,
+        &feature_lpm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at43usb355 = Cpu{
     .name = "at43usb355",
     .llvm_name = "at43usb355",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at76c711 = Cpu{
     .name = "at76c711",
     .llvm_name = "at76c711",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at86rf401 = Cpu{
     .name = "at86rf401",
     .llvm_name = "at86rf401",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
     },
@@ -201,450 +201,450 @@ pub const cpu_at86rf401 = Cpu{
 pub const cpu_at90c8534 = Cpu{
     .name = "at90c8534",
     .llvm_name = "at90c8534",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s1200 = Cpu{
     .name = "at90s1200",
     .llvm_name = "at90s1200",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_at90s2313 = Cpu{
     .name = "at90s2313",
     .llvm_name = "at90s2313",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s2323 = Cpu{
     .name = "at90s2323",
     .llvm_name = "at90s2323",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s2333 = Cpu{
     .name = "at90s2333",
     .llvm_name = "at90s2333",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s2343 = Cpu{
     .name = "at90s2343",
     .llvm_name = "at90s2343",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s4414 = Cpu{
     .name = "at90s4414",
     .llvm_name = "at90s4414",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s4433 = Cpu{
     .name = "at90s4433",
     .llvm_name = "at90s4433",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s4434 = Cpu{
     .name = "at90s4434",
     .llvm_name = "at90s4434",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s8515 = Cpu{
     .name = "at90s8515",
     .llvm_name = "at90s8515",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90s8535 = Cpu{
     .name = "at90s8535",
     .llvm_name = "at90s8535",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_at94k = Cpu{
     .name = "at94k",
     .llvm_name = "at94k",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -654,326 +654,326 @@ pub const cpu_at94k = Cpu{
 pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
-        &feature_lpm,
+    .dependencies = &[_]*const Feature {
         &feature_elpm,
-        &feature_sram,
+        &feature_lpm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega161 = Cpu{
     .name = "atmega161",
     .llvm_name = "atmega161",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -984,29 +984,29 @@ pub const cpu_atmega161 = Cpu{
 pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega163 = Cpu{
     .name = "atmega163",
     .llvm_name = "atmega163",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1017,1508 +1017,1508 @@ pub const cpu_atmega163 = Cpu{
 pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_elpm,
         &feature_elpmx,
-        &feature_sram,
-        &feature_ijmpcall,
-        &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_elpm,
         &feature_elpmx,
-        &feature_sram,
-        &feature_ijmpcall,
-        &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_elpm,
         &feature_elpmx,
-        &feature_sram,
-        &feature_ijmpcall,
-        &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_elpm,
         &feature_elpmx,
-        &feature_sram,
-        &feature_ijmpcall,
-        &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega8515 = Cpu{
     .name = "atmega8515",
     .llvm_name = "atmega8515",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -2529,11 +2529,11 @@ pub const cpu_atmega8515 = Cpu{
 pub const cpu_atmega8535 = Cpu{
     .name = "atmega8535",
     .llvm_name = "atmega8535",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -2544,149 +2544,149 @@ pub const cpu_atmega8535 = Cpu{
 pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny10 = Cpu{
     .name = "attiny10",
     .llvm_name = "attiny10",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny102 = Cpu{
     .name = "attiny102",
     .llvm_name = "attiny102",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny104 = Cpu{
     .name = "attiny104",
     .llvm_name = "attiny104",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny11 = Cpu{
     .name = "attiny11",
     .llvm_name = "attiny11",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
     },
 };
@@ -2694,7 +2694,7 @@ pub const cpu_attiny11 = Cpu{
 pub const cpu_attiny12 = Cpu{
     .name = "attiny12",
     .llvm_name = "attiny12",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
     },
 };
@@ -2702,37 +2702,37 @@ pub const cpu_attiny12 = Cpu{
 pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny15 = Cpu{
     .name = "attiny15",
     .llvm_name = "attiny15",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
     },
 };
@@ -2740,139 +2740,139 @@ pub const cpu_attiny15 = Cpu{
 pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny20 = Cpu{
     .name = "attiny20",
     .llvm_name = "attiny20",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny22 = Cpu{
     .name = "attiny22",
     .llvm_name = "attiny22",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny26 = Cpu{
     .name = "attiny26",
     .llvm_name = "attiny26",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
         &feature_lpmx,
     },
 };
@@ -2880,37 +2880,37 @@ pub const cpu_attiny26 = Cpu{
 pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny28 = Cpu{
     .name = "attiny28",
     .llvm_name = "attiny28",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
     },
 };
@@ -2918,1277 +2918,1277 @@ pub const cpu_attiny28 = Cpu{
 pub const cpu_attiny4 = Cpu{
     .name = "attiny4",
     .llvm_name = "attiny4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny40 = Cpu{
     .name = "attiny40",
     .llvm_name = "attiny40",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny5 = Cpu{
     .name = "attiny5",
     .llvm_name = "attiny5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_attiny9 = Cpu{
     .name = "attiny9",
     .llvm_name = "attiny9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
-    .subfeatures = &[_]*const Feature {
-        &feature_rmw,
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
-        &feature_eijmpcall,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
+        &feature_spmx,
+        &feature_break,
+        &feature_jmpcall,
         &feature_des,
-        &feature_ijmpcall,
+        &feature_rmw,
+        &feature_mul,
+        &feature_eijmpcall,
         &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr1 = Cpu{
     .name = "avr1",
     .llvm_name = "avr1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
     },
 };
@@ -4196,319 +4196,319 @@ pub const cpu_avr1 = Cpu{
 pub const cpu_avr2 = Cpu{
     .name = "avr2",
     .llvm_name = "avr2",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_break,
         &feature_lpm,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr3 = Cpu{
     .name = "avr3",
     .llvm_name = "avr3",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
+    .dependencies = &[_]*const Feature {
         &feature_lpm,
-        &feature_sram,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
-    .subfeatures = &[_]*const Feature {
-        &feature_addsubiw,
-        &feature_jmpcall,
-        &feature_lpm,
+    .dependencies = &[_]*const Feature {
         &feature_elpm,
-        &feature_sram,
+        &feature_lpm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_sram,
+        &feature_spm,
         &feature_ijmpcall,
+        &feature_sram,
+        &feature_break,
+        &feature_jmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_lpm,
         &feature_spm,
-        &feature_addsubiw,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
-        &feature_lpm,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
+        &feature_elpm,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_break,
-        &feature_mul,
-        &feature_elpm,
+        &feature_ijmpcall,
         &feature_elpmx,
         &feature_sram,
-        &feature_ijmpcall,
+        &feature_break,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_elpm,
         &feature_elpmx,
-        &feature_sram,
-        &feature_ijmpcall,
-        &feature_movw,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrtiny = Cpu{
     .name = "avrtiny",
     .llvm_name = "avrtiny",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_break,
-        &feature_sram,
         &feature_tinyencoding,
+        &feature_sram,
     },
 };
 
 pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
+        &feature_elpm,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_movw,
+        &feature_sram,
+        &feature_spmx,
         &feature_break,
+        &feature_jmpcall,
+        &feature_des,
         &feature_mul,
-        &feature_elpm,
         &feature_eijmpcall,
         &feature_elpmx,
-        &feature_sram,
-        &feature_des,
-        &feature_ijmpcall,
-        &feature_movw,
-        &feature_spmx,
+        &feature_addsubiw,
     },
 };
 
 pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_lpmx,
-        &feature_spm,
-        &feature_addsubiw,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_spm,
+        &feature_ijmpcall,
+        &feature_sram,
         &feature_break,
+        &feature_jmpcall,
         &feature_mul,
-        &feature_sram,
-        &feature_ijmpcall,
         &feature_movw,
+        &feature_addsubiw,
     },
 };
 
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index d36f9f2e1deb3ca024577ce0d0867b53e64ceed5..9dc27093a6b18e141ac4cfb0556341861839204e 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -4,21 +4,21 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_alu32 = Feature{
     .name = "alu32",
     .description = "Enable ALU32 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dummy = Feature{
     .name = "dummy",
     .description = "unused feature",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dwarfris = Feature{
     .name = "dwarfris",
     .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -31,35 +31,35 @@ pub const features = &[_]*const Feature {
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_probe = Cpu{
     .name = "probe",
     .llvm_name = "probe",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_v1 = Cpu{
     .name = "v1",
     .llvm_name = "v1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_v2 = Cpu{
     .name = "v2",
     .llvm_name = "v2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_v3 = Cpu{
     .name = "v3",
     .llvm_name = "v3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 3051f3273a54294b11adcec592af9f9370286600..a007ee10cf4984b8b15bb77fa746554c03f8de7a 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -4,35 +4,35 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_duplex = Feature{
     .name = "duplex",
     .description = "Enable generation of duplex instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Use constant-extended calls",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mem_noshuf = Feature{
     .name = "mem_noshuf",
     .description = "Supports mem_noshuf feature",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_memops = Feature{
     .name = "memops",
     .description = "Use memop instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nvj = Feature{
     .name = "nvj",
     .description = "Support for new-value jumps",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_packets,
     },
 };
@@ -40,7 +40,7 @@ pub const feature_nvj = Feature{
 pub const feature_nvs = Feature{
     .name = "nvs",
     .description = "Support for new-value stores",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_packets,
     },
 };
@@ -48,28 +48,28 @@ pub const feature_nvs = Feature{
 pub const feature_noreturnStackElim = Feature{
     .name = "noreturn-stack-elim",
     .description = "Eliminate stack allocation in a noreturn function when possible",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_packets = Feature{
     .name = "packets",
     .description = "Support for instruction packets",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_reservedR19 = Feature{
     .name = "reserved-r19",
     .description = "Reserve register R19",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_smallData = Feature{
     .name = "small-data",
     .description = "Allow GP-relative addressing of global variables",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -89,7 +89,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -102,7 +102,7 @@ pub const cpu_generic = Cpu{
 pub const cpu_hexagonv5 = Cpu{
     .name = "hexagonv5",
     .llvm_name = "hexagonv5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -115,7 +115,7 @@ pub const cpu_hexagonv5 = Cpu{
 pub const cpu_hexagonv55 = Cpu{
     .name = "hexagonv55",
     .llvm_name = "hexagonv55",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -128,7 +128,7 @@ pub const cpu_hexagonv55 = Cpu{
 pub const cpu_hexagonv60 = Cpu{
     .name = "hexagonv60",
     .llvm_name = "hexagonv60",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -141,7 +141,7 @@ pub const cpu_hexagonv60 = Cpu{
 pub const cpu_hexagonv62 = Cpu{
     .name = "hexagonv62",
     .llvm_name = "hexagonv62",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_memops,
         &feature_packets,
@@ -154,7 +154,7 @@ pub const cpu_hexagonv62 = Cpu{
 pub const cpu_hexagonv65 = Cpu{
     .name = "hexagonv65",
     .llvm_name = "hexagonv65",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_mem_noshuf,
         &feature_memops,
@@ -168,7 +168,7 @@ pub const cpu_hexagonv65 = Cpu{
 pub const cpu_hexagonv66 = Cpu{
     .name = "hexagonv66",
     .llvm_name = "hexagonv66",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_duplex,
         &feature_mem_noshuf,
         &feature_memops,
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 17582a9313a0adeab901ba5606df7112fdeabb22..e7c26230af4583a094a6bc022e9bf17527d2c900 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -4,43 +4,43 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_abs2008 = Feature{
     .name = "abs2008",
     .description = "Disable IEEE 754-2008 abs.fmt mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_crc = Feature{
     .name = "crc",
     .description = "Mips R6 CRC ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cnmips = Feature{
     .name = "cnmips",
     .description = "Octeon cnMIPS Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
     },
 };
 
 pub const feature_dsp = Feature{
     .name = "dsp",
     .description = "Mips DSP ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dspr2 = Feature{
     .name = "dspr2",
     .description = "Mips DSP-R2 ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dsp,
     },
 };
@@ -48,7 +48,7 @@ pub const feature_dspr2 = Feature{
 pub const feature_dspr3 = Feature{
     .name = "dspr3",
     .description = "Mips DSP-R3 ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dsp,
     },
 };
@@ -56,84 +56,84 @@ pub const feature_dspr3 = Feature{
 pub const feature_eva = Feature{
     .name = "eva",
     .description = "Mips EVA ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fp64 = Feature{
     .name = "fp64",
     .description = "Support 64-bit FP registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fpxx = Feature{
     .name = "fpxx",
     .description = "Support for FPXX",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ginv = Feature{
     .name = "ginv",
     .description = "Mips Global Invalidate ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gp64 = Feature{
     .name = "gp64",
     .description = "General Purpose Registers are 64-bit wide",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
     .description = "Disable use of the jal instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_msa = Feature{
     .name = "msa",
     .description = "Mips MSA ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mt = Feature{
     .name = "mt",
     .description = "Mips MT ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nomadd4 = Feature{
     .name = "nomadd4",
     .description = "Disable 4-operand madd.fmt and related instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_micromips = Feature{
     .name = "micromips",
     .description = "microMips mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips1 = Feature{
     .name = "mips1",
     .description = "Mips I ISA Support [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips2 = Feature{
     .name = "mips2",
     .description = "Mips II ISA Support [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
     },
 };
@@ -141,322 +141,322 @@ pub const feature_mips2 = Feature{
 pub const feature_mips3 = Feature{
     .name = "mips3",
     .description = "MIPS III ISA Support [highly experimental]",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_gp64,
         &feature_mips3_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips3_32 = Feature{
     .name = "mips3_32",
     .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips3_32r2 = Feature{
     .name = "mips3_32r2",
     .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips4 = Feature{
     .name = "mips4",
     .description = "MIPS IV ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
         &feature_mips3_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips4_32 = Feature{
     .name = "mips4_32",
     .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips4_32r2 = Feature{
     .name = "mips4_32r2",
     .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips5 = Feature{
     .name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips5_32r2 = Feature{
     .name = "mips5_32r2",
     .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips16 = Feature{
     .name = "mips16",
     .description = "Mips16 mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mips32 = Feature{
     .name = "mips32",
     .description = "Mips32 ISA Support",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_mips4_32,
         &feature_mips3_32,
+        &feature_mips4_32,
     },
 };
 
 pub const feature_mips32r2 = Feature{
     .name = "mips32r2",
     .description = "Mips32r2 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
     },
 };
 
 pub const feature_mips32r3 = Feature{
     .name = "mips32r3",
     .description = "Mips32r3 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
     },
 };
 
 pub const feature_mips32r5 = Feature{
     .name = "mips32r5",
     .description = "Mips32r5 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
     },
 };
 
 pub const feature_mips32r6 = Feature{
     .name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_fp64,
-        &feature_mips4_32r2,
         &feature_nan2008,
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips64 = Feature{
     .name = "mips64",
     .description = "Mips64 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips64r2 = Feature{
     .name = "mips64r2",
     .description = "Mips64r2 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips64r3 = Feature{
     .name = "mips64r3",
     .description = "Mips64r3 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_gp64,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips64r5 = Feature{
     .name = "mips64r5",
     .description = "Mips64r5 ISA Support",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_mips64r6 = Feature{
     .name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips5_32r2,
-        &feature_mips4_32,
         &feature_nan2008,
+        &feature_mips4_32,
+        &feature_gp64,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
     },
 };
 
 pub const feature_nan2008 = Feature{
     .name = "nan2008",
     .description = "IEEE 754-2008 NaN encoding",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noabicalls = Feature{
     .name = "noabicalls",
     .description = "Disable SVR4-style position-independent code",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nooddspreg = Feature{
     .name = "nooddspreg",
     .description = "Disable odd numbered single-precision registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptr64 = Feature{
     .name = "ptr64",
     .description = "Pointers are 64-bit wide",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_singleFloat = Feature{
     .name = "single-float",
     .description = "Only supports single precision float",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Does not support floating point instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sym32 = Feature{
     .name = "sym32",
     .description = "Symbols are 32 bit on Mips64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useIndirectJumpHazard = Feature{
     .name = "use-indirect-jump-hazard",
     .description = "Use indirect jump guards to prevent certain speculation based attacks",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useTccInDiv = Feature{
     .name = "use-tcc-in-div",
     .description = "Force the assembler to use trapping",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vfpu = Feature{
     .name = "vfpu",
     .description = "Enable vector FPU instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_virt = Feature{
     .name = "virt",
     .description = "Mips Virtualization ASE",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xgot = Feature{
     .name = "xgot",
     .description = "Assume 32-bit GOT",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_p5600 = Feature{
     .name = "p5600",
     .description = "The P5600 Processor",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
     },
 };
 
@@ -516,7 +516,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_mips1 = Cpu{
     .name = "mips1",
     .llvm_name = "mips1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
     },
 };
@@ -524,7 +524,7 @@ pub const cpu_mips1 = Cpu{
 pub const cpu_mips2 = Cpu{
     .name = "mips2",
     .llvm_name = "mips2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips2,
     },
@@ -533,12 +533,12 @@ pub const cpu_mips2 = Cpu{
 pub const cpu_mips3 = Cpu{
     .name = "mips3",
     .llvm_name = "mips3",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_gp64,
         &feature_mips3_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
         &feature_mips3,
     },
 };
@@ -546,10 +546,10 @@ pub const cpu_mips3 = Cpu{
 pub const cpu_mips32 = Cpu{
     .name = "mips32",
     .llvm_name = "mips32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_mips4_32,
         &feature_mips3_32,
+        &feature_mips4_32,
         &feature_mips32,
     },
 };
@@ -557,13 +557,13 @@ pub const cpu_mips32 = Cpu{
 pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
         &feature_mips32r2,
     },
 };
@@ -571,13 +571,13 @@ pub const cpu_mips32r2 = Cpu{
 pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
         &feature_mips32r3,
     },
 };
@@ -585,13 +585,13 @@ pub const cpu_mips32r3 = Cpu{
 pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
         &feature_mips32r5,
     },
 };
@@ -599,16 +599,16 @@ pub const cpu_mips32r5 = Cpu{
 pub const cpu_mips32r6 = Cpu{
     .name = "mips32r6",
     .llvm_name = "mips32r6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_fp64,
-        &feature_mips4_32r2,
         &feature_nan2008,
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips32r6,
     },
 };
@@ -616,14 +616,14 @@ pub const cpu_mips32r6 = Cpu{
 pub const cpu_mips4 = Cpu{
     .name = "mips4",
     .llvm_name = "mips4",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
         &feature_mips3_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
         &feature_mips4,
     },
 };
@@ -631,15 +631,15 @@ pub const cpu_mips4 = Cpu{
 pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips5,
     },
 };
@@ -647,15 +647,15 @@ pub const cpu_mips5 = Cpu{
 pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
         &feature_mips64,
     },
 };
@@ -663,15 +663,15 @@ pub const cpu_mips64 = Cpu{
 pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips64r2,
     },
 };
@@ -679,15 +679,15 @@ pub const cpu_mips64r2 = Cpu{
 pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_gp64,
+    .dependencies = &[_]*const Feature {
         &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_gp64,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips64r3,
     },
 };
@@ -695,15 +695,15 @@ pub const cpu_mips64r3 = Cpu{
 pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
+        &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips64r5,
     },
 };
@@ -711,17 +711,17 @@ pub const cpu_mips64r5 = Cpu{
 pub const cpu_mips64r6 = Cpu{
     .name = "mips64r6",
     .llvm_name = "mips64r6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_gp64,
-        &feature_mips5_32r2,
-        &feature_mips4_32,
         &feature_nan2008,
+        &feature_mips4_32,
+        &feature_gp64,
+        &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_fp64,
         &feature_mips64r6,
     },
 };
@@ -729,15 +729,15 @@ pub const cpu_mips64r6 = Cpu{
 pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
-    .subfeatures = &[_]*const Feature {
-        &feature_fp64,
+    .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips4_32r2,
         &feature_mips1,
-        &feature_gp64,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
+        &feature_mips5_32r2,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
         &feature_cnmips,
         &feature_mips64r2,
     },
@@ -746,13 +746,13 @@ pub const cpu_octeon = Cpu{
 pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
-    .subfeatures = &[_]*const Feature {
-        &feature_mips4_32r2,
+    .dependencies = &[_]*const Feature {
+        &feature_mips3_32,
         &feature_mips1,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_mips3_32r2,
-        &feature_mips3_32,
+        &feature_mips5_32r2,
+        &feature_mips4_32,
+        &feature_mips4_32r2,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 433537824d7f73651eb3ea17ae46d505973950fb..1e3b93b9d0daf31752200f051143cfc74cbf8b13 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -4,28 +4,28 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_hwmult16 = Feature{
     .name = "hwmult16",
     .description = "Enable 16-bit hardware multiplier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_hwmult32 = Feature{
     .name = "hwmult32",
     .description = "Enable 32-bit hardware multiplier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_hwmultf5 = Feature{
     .name = "hwmultf5",
     .description = "Enable F5 series hardware multiplier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ext = Feature{
     .name = "ext",
     .description = "Enable MSP430-X extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -39,21 +39,21 @@ pub const features = &[_]*const Feature {
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_msp430 = Cpu{
     .name = "msp430",
     .llvm_name = "msp430",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_msp430x = Cpu{
     .name = "msp430x",
     .llvm_name = "msp430x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ext,
     },
 };
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index 5d5e27658753b9a823eb5ed79319ab05b1f20863..815d1116c57ac9f5a2a38becc8e36fdc3829cb47 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -4,175 +4,175 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_ptx32 = Feature{
     .name = "ptx32",
     .description = "Use PTX version 3.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx40 = Feature{
     .name = "ptx40",
     .description = "Use PTX version 4.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx41 = Feature{
     .name = "ptx41",
     .description = "Use PTX version 4.1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx42 = Feature{
     .name = "ptx42",
     .description = "Use PTX version 4.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx43 = Feature{
     .name = "ptx43",
     .description = "Use PTX version 4.3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx50 = Feature{
     .name = "ptx50",
     .description = "Use PTX version 5.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx60 = Feature{
     .name = "ptx60",
     .description = "Use PTX version 6.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx61 = Feature{
     .name = "ptx61",
     .description = "Use PTX version 6.1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx63 = Feature{
     .name = "ptx63",
     .description = "Use PTX version 6.3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptx64 = Feature{
     .name = "ptx64",
     .description = "Use PTX version 6.4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_20 = Feature{
     .name = "sm_20",
     .description = "Target SM 2.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_21 = Feature{
     .name = "sm_21",
     .description = "Target SM 2.1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_30 = Feature{
     .name = "sm_30",
     .description = "Target SM 3.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_32 = Feature{
     .name = "sm_32",
     .description = "Target SM 3.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_35 = Feature{
     .name = "sm_35",
     .description = "Target SM 3.5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_37 = Feature{
     .name = "sm_37",
     .description = "Target SM 3.7",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_50 = Feature{
     .name = "sm_50",
     .description = "Target SM 5.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_52 = Feature{
     .name = "sm_52",
     .description = "Target SM 5.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_53 = Feature{
     .name = "sm_53",
     .description = "Target SM 5.3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_60 = Feature{
     .name = "sm_60",
     .description = "Target SM 6.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_61 = Feature{
     .name = "sm_61",
     .description = "Target SM 6.1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_62 = Feature{
     .name = "sm_62",
     .description = "Target SM 6.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_70 = Feature{
     .name = "sm_70",
     .description = "Target SM 7.0",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_72 = Feature{
     .name = "sm_72",
     .description = "Target SM 7.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sm_75 = Feature{
     .name = "sm_75",
     .description = "Target SM 7.5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -207,7 +207,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_sm_20 = Cpu{
     .name = "sm_20",
     .llvm_name = "sm_20",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sm_20,
     },
 };
@@ -215,7 +215,7 @@ pub const cpu_sm_20 = Cpu{
 pub const cpu_sm_21 = Cpu{
     .name = "sm_21",
     .llvm_name = "sm_21",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sm_21,
     },
 };
@@ -223,7 +223,7 @@ pub const cpu_sm_21 = Cpu{
 pub const cpu_sm_30 = Cpu{
     .name = "sm_30",
     .llvm_name = "sm_30",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sm_30,
     },
 };
@@ -231,7 +231,7 @@ pub const cpu_sm_30 = Cpu{
 pub const cpu_sm_32 = Cpu{
     .name = "sm_32",
     .llvm_name = "sm_32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx40,
         &feature_sm_32,
     },
@@ -240,7 +240,7 @@ pub const cpu_sm_32 = Cpu{
 pub const cpu_sm_35 = Cpu{
     .name = "sm_35",
     .llvm_name = "sm_35",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sm_35,
     },
 };
@@ -248,7 +248,7 @@ pub const cpu_sm_35 = Cpu{
 pub const cpu_sm_37 = Cpu{
     .name = "sm_37",
     .llvm_name = "sm_37",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx41,
         &feature_sm_37,
     },
@@ -257,7 +257,7 @@ pub const cpu_sm_37 = Cpu{
 pub const cpu_sm_50 = Cpu{
     .name = "sm_50",
     .llvm_name = "sm_50",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx40,
         &feature_sm_50,
     },
@@ -266,7 +266,7 @@ pub const cpu_sm_50 = Cpu{
 pub const cpu_sm_52 = Cpu{
     .name = "sm_52",
     .llvm_name = "sm_52",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx41,
         &feature_sm_52,
     },
@@ -275,7 +275,7 @@ pub const cpu_sm_52 = Cpu{
 pub const cpu_sm_53 = Cpu{
     .name = "sm_53",
     .llvm_name = "sm_53",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx42,
         &feature_sm_53,
     },
@@ -284,7 +284,7 @@ pub const cpu_sm_53 = Cpu{
 pub const cpu_sm_60 = Cpu{
     .name = "sm_60",
     .llvm_name = "sm_60",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx50,
         &feature_sm_60,
     },
@@ -293,7 +293,7 @@ pub const cpu_sm_60 = Cpu{
 pub const cpu_sm_61 = Cpu{
     .name = "sm_61",
     .llvm_name = "sm_61",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx50,
         &feature_sm_61,
     },
@@ -302,7 +302,7 @@ pub const cpu_sm_61 = Cpu{
 pub const cpu_sm_62 = Cpu{
     .name = "sm_62",
     .llvm_name = "sm_62",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx50,
         &feature_sm_62,
     },
@@ -311,7 +311,7 @@ pub const cpu_sm_62 = Cpu{
 pub const cpu_sm_70 = Cpu{
     .name = "sm_70",
     .llvm_name = "sm_70",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx60,
         &feature_sm_70,
     },
@@ -320,7 +320,7 @@ pub const cpu_sm_70 = Cpu{
 pub const cpu_sm_72 = Cpu{
     .name = "sm_72",
     .llvm_name = "sm_72",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx61,
         &feature_sm_72,
     },
@@ -329,7 +329,7 @@ pub const cpu_sm_72 = Cpu{
 pub const cpu_sm_75 = Cpu{
     .name = "sm_75",
     .llvm_name = "sm_75",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_ptx63,
         &feature_sm_75,
     },
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index e8c9d98a1cfd53b8952798892eeef351009e8894..9e86df21854579b1da8e2c97b7407054ff1b1aa7 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -4,21 +4,21 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Enable 64-bit instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bitregs64 = Feature{
     .name = "64bitregs",
     .description = "Enable 64-bit registers usage for ppc32 [beta]",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_altivec = Feature{
     .name = "altivec",
     .description = "Enable Altivec instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -26,14 +26,14 @@ pub const feature_altivec = Feature{
 pub const feature_bpermd = Feature{
     .name = "bpermd",
     .description = "Enable the bpermd instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_booke = Feature{
     .name = "booke",
     .description = "Enable Book E instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
     },
 };
@@ -41,21 +41,21 @@ pub const feature_booke = Feature{
 pub const feature_cmpb = Feature{
     .name = "cmpb",
     .description = "Enable the cmpb instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_crbits = Feature{
     .name = "crbits",
     .description = "Use condition-register bits individually",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_directMove = Feature{
     .name = "direct-move",
     .description = "Enable Power8 direct move instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -63,21 +63,21 @@ pub const feature_directMove = Feature{
 pub const feature_e500 = Feature{
     .name = "e500",
     .description = "Enable E500/E500mc instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_extdiv = Feature{
     .name = "extdiv",
     .description = "Enable extended divide instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fcpsgn = Feature{
     .name = "fcpsgn",
     .description = "Enable the fcpsgn instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -85,7 +85,7 @@ pub const feature_fcpsgn = Feature{
 pub const feature_fpcvt = Feature{
     .name = "fpcvt",
     .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -93,7 +93,7 @@ pub const feature_fpcvt = Feature{
 pub const feature_fprnd = Feature{
     .name = "fprnd",
     .description = "Enable the fri[mnpz] instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -101,7 +101,7 @@ pub const feature_fprnd = Feature{
 pub const feature_fpu = Feature{
     .name = "fpu",
     .description = "Enable classic FPU instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -109,7 +109,7 @@ pub const feature_fpu = Feature{
 pub const feature_fre = Feature{
     .name = "fre",
     .description = "Enable the fre instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -117,7 +117,7 @@ pub const feature_fre = Feature{
 pub const feature_fres = Feature{
     .name = "fres",
     .description = "Enable the fres instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -125,7 +125,7 @@ pub const feature_fres = Feature{
 pub const feature_frsqrte = Feature{
     .name = "frsqrte",
     .description = "Enable the frsqrte instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -133,7 +133,7 @@ pub const feature_frsqrte = Feature{
 pub const feature_frsqrtes = Feature{
     .name = "frsqrtes",
     .description = "Enable the frsqrtes instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -141,7 +141,7 @@ pub const feature_frsqrtes = Feature{
 pub const feature_fsqrt = Feature{
     .name = "fsqrt",
     .description = "Enable the fsqrt instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -149,7 +149,7 @@ pub const feature_fsqrt = Feature{
 pub const feature_float128 = Feature{
     .name = "float128",
     .description = "Enable the __float128 data type for IEEE-754R Binary128.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -157,56 +157,56 @@ pub const feature_float128 = Feature{
 pub const feature_htm = Feature{
     .name = "htm",
     .description = "Enable Hardware Transactional Memory instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_hardFloat = Feature{
     .name = "hard-float",
     .description = "Enable floating-point instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_icbt = Feature{
     .name = "icbt",
     .description = "Enable icbt instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_isaV30Instructions = Feature{
     .name = "isa-v30-instructions",
     .description = "Enable instructions added in ISA 3.0.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_isel = Feature{
     .name = "isel",
     .description = "Enable the isel instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_invariantFunctionDescriptors = Feature{
     .name = "invariant-function-descriptors",
     .description = "Assume function descriptors are invariant",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ldbrx = Feature{
     .name = "ldbrx",
     .description = "Enable the ldbrx instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lfiwax = Feature{
     .name = "lfiwax",
     .description = "Enable the lfiwax instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -214,21 +214,21 @@ pub const feature_lfiwax = Feature{
 pub const feature_longcall = Feature{
     .name = "longcall",
     .description = "Always use indirect calls",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mfocrf = Feature{
     .name = "mfocrf",
     .description = "Enable the MFOCRF instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_msync = Feature{
     .name = "msync",
     .description = "Has only the msync instruction instead of sync",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
     },
 };
@@ -236,7 +236,7 @@ pub const feature_msync = Feature{
 pub const feature_power8Altivec = Feature{
     .name = "power8-altivec",
     .description = "Enable POWER8 Altivec instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -244,7 +244,7 @@ pub const feature_power8Altivec = Feature{
 pub const feature_crypto = Feature{
     .name = "crypto",
     .description = "Enable POWER8 Crypto instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -252,7 +252,7 @@ pub const feature_crypto = Feature{
 pub const feature_power8Vector = Feature{
     .name = "power8-vector",
     .description = "Enable POWER8 vector instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -260,7 +260,7 @@ pub const feature_power8Vector = Feature{
 pub const feature_power9Altivec = Feature{
     .name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_isaV30Instructions,
         &feature_hardFloat,
     },
@@ -269,7 +269,7 @@ pub const feature_power9Altivec = Feature{
 pub const feature_power9Vector = Feature{
     .name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_isaV30Instructions,
         &feature_hardFloat,
     },
@@ -278,49 +278,49 @@ pub const feature_power9Vector = Feature{
 pub const feature_popcntd = Feature{
     .name = "popcntd",
     .description = "Enable the popcnt[dw] instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ppc4xx = Feature{
     .name = "ppc4xx",
     .description = "Enable PPC 4xx instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ppc6xx = Feature{
     .name = "ppc6xx",
     .description = "Enable PPC 6xx instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ppcPostraSched = Feature{
     .name = "ppc-postra-sched",
     .description = "Use PowerPC post-RA scheduling strategy",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ppcPreraSched = Feature{
     .name = "ppc-prera-sched",
     .description = "Use PowerPC pre-RA scheduling strategy",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_partwordAtomics = Feature{
     .name = "partword-atomics",
     .description = "Enable l[bh]arx and st[bh]cx.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_qpx = Feature{
     .name = "qpx",
     .description = "Enable QPX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -328,14 +328,14 @@ pub const feature_qpx = Feature{
 pub const feature_recipprec = Feature{
     .name = "recipprec",
     .description = "Assume higher precision reciprocal estimates",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_spe = Feature{
     .name = "spe",
     .description = "Enable SPE instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -343,7 +343,7 @@ pub const feature_spe = Feature{
 pub const feature_stfiwx = Feature{
     .name = "stfiwx",
     .description = "Enable the stfiwx instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -351,28 +351,28 @@ pub const feature_stfiwx = Feature{
 pub const feature_securePlt = Feature{
     .name = "secure-plt",
     .description = "Enable secure plt mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowPopcntd = Feature{
     .name = "slow-popcntd",
     .description = "Has slow popcnt[dw] instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_twoConstNr = Feature{
     .name = "two-const-nr",
     .description = "Requires two constant Newton-Raphson computation",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vsx = Feature{
     .name = "vsx",
     .description = "Enable VSX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -380,7 +380,7 @@ pub const feature_vsx = Feature{
 pub const feature_vectorsUseTwoUnits = Feature{
     .name = "vectors-use-two-units",
     .description = "Vectors use two units",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -441,7 +441,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_440 = Cpu{
     .name = "440",
     .llvm_name = "440",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
         &feature_booke,
         &feature_hardFloat,
@@ -455,7 +455,7 @@ pub const cpu_440 = Cpu{
 pub const cpu_450 = Cpu{
     .name = "450",
     .llvm_name = "450",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
         &feature_booke,
         &feature_hardFloat,
@@ -469,7 +469,7 @@ pub const cpu_450 = Cpu{
 pub const cpu_601 = Cpu{
     .name = "601",
     .llvm_name = "601",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fpu,
     },
@@ -478,7 +478,7 @@ pub const cpu_601 = Cpu{
 pub const cpu_602 = Cpu{
     .name = "602",
     .llvm_name = "602",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fpu,
     },
@@ -487,7 +487,7 @@ pub const cpu_602 = Cpu{
 pub const cpu_603 = Cpu{
     .name = "603",
     .llvm_name = "603",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -497,7 +497,7 @@ pub const cpu_603 = Cpu{
 pub const cpu_e603 = Cpu{
     .name = "603e",
     .llvm_name = "603e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -507,7 +507,7 @@ pub const cpu_e603 = Cpu{
 pub const cpu_ev603 = Cpu{
     .name = "603ev",
     .llvm_name = "603ev",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -517,7 +517,7 @@ pub const cpu_ev603 = Cpu{
 pub const cpu_604 = Cpu{
     .name = "604",
     .llvm_name = "604",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -527,7 +527,7 @@ pub const cpu_604 = Cpu{
 pub const cpu_e604 = Cpu{
     .name = "604e",
     .llvm_name = "604e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -537,7 +537,7 @@ pub const cpu_e604 = Cpu{
 pub const cpu_620 = Cpu{
     .name = "620",
     .llvm_name = "620",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -547,7 +547,7 @@ pub const cpu_620 = Cpu{
 pub const cpu_7400 = Cpu{
     .name = "7400",
     .llvm_name = "7400",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_altivec,
         &feature_fres,
@@ -558,7 +558,7 @@ pub const cpu_7400 = Cpu{
 pub const cpu_7450 = Cpu{
     .name = "7450",
     .llvm_name = "7450",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_altivec,
         &feature_fres,
@@ -569,7 +569,7 @@ pub const cpu_7450 = Cpu{
 pub const cpu_750 = Cpu{
     .name = "750",
     .llvm_name = "750",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -579,7 +579,7 @@ pub const cpu_750 = Cpu{
 pub const cpu_970 = Cpu{
     .name = "970",
     .llvm_name = "970",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -594,7 +594,7 @@ pub const cpu_970 = Cpu{
 pub const cpu_a2 = Cpu{
     .name = "a2",
     .llvm_name = "a2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_icbt,
         &feature_booke,
@@ -621,7 +621,7 @@ pub const cpu_a2 = Cpu{
 pub const cpu_a2q = Cpu{
     .name = "a2q",
     .llvm_name = "a2q",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_icbt,
         &feature_booke,
@@ -649,7 +649,7 @@ pub const cpu_a2q = Cpu{
 pub const cpu_e500 = Cpu{
     .name = "e500",
     .llvm_name = "e500",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
         &feature_booke,
         &feature_isel,
@@ -659,7 +659,7 @@ pub const cpu_e500 = Cpu{
 pub const cpu_e500mc = Cpu{
     .name = "e500mc",
     .llvm_name = "e500mc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_icbt,
         &feature_booke,
         &feature_isel,
@@ -671,7 +671,7 @@ pub const cpu_e500mc = Cpu{
 pub const cpu_e5500 = Cpu{
     .name = "e5500",
     .llvm_name = "e5500",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_icbt,
         &feature_booke,
@@ -685,7 +685,7 @@ pub const cpu_e5500 = Cpu{
 pub const cpu_g3 = Cpu{
     .name = "g3",
     .llvm_name = "g3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_fres,
         &feature_frsqrte,
@@ -695,7 +695,7 @@ pub const cpu_g3 = Cpu{
 pub const cpu_g4 = Cpu{
     .name = "g4",
     .llvm_name = "g4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_altivec,
         &feature_fres,
@@ -706,7 +706,7 @@ pub const cpu_g4 = Cpu{
 pub const cpu_g4Plus = Cpu{
     .name = "g4+",
     .llvm_name = "g4+",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
         &feature_altivec,
         &feature_fres,
@@ -717,7 +717,7 @@ pub const cpu_g4Plus = Cpu{
 pub const cpu_g5 = Cpu{
     .name = "g5",
     .llvm_name = "g5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -732,7 +732,7 @@ pub const cpu_g5 = Cpu{
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -740,7 +740,7 @@ pub const cpu_generic = Cpu{
 pub const cpu_ppc = Cpu{
     .name = "ppc",
     .llvm_name = "ppc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -748,7 +748,7 @@ pub const cpu_ppc = Cpu{
 pub const cpu_ppc32 = Cpu{
     .name = "ppc32",
     .llvm_name = "ppc32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_hardFloat,
     },
 };
@@ -756,7 +756,7 @@ pub const cpu_ppc32 = Cpu{
 pub const cpu_ppc64 = Cpu{
     .name = "ppc64",
     .llvm_name = "ppc64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -771,7 +771,7 @@ pub const cpu_ppc64 = Cpu{
 pub const cpu_ppc64le = Cpu{
     .name = "ppc64le",
     .llvm_name = "ppc64le",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -808,7 +808,7 @@ pub const cpu_ppc64le = Cpu{
 pub const cpu_pwr3 = Cpu{
     .name = "pwr3",
     .llvm_name = "pwr3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -822,7 +822,7 @@ pub const cpu_pwr3 = Cpu{
 pub const cpu_pwr4 = Cpu{
     .name = "pwr4",
     .llvm_name = "pwr4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -837,7 +837,7 @@ pub const cpu_pwr4 = Cpu{
 pub const cpu_pwr5 = Cpu{
     .name = "pwr5",
     .llvm_name = "pwr5",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -854,7 +854,7 @@ pub const cpu_pwr5 = Cpu{
 pub const cpu_pwr5x = Cpu{
     .name = "pwr5x",
     .llvm_name = "pwr5x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -872,7 +872,7 @@ pub const cpu_pwr5x = Cpu{
 pub const cpu_pwr6 = Cpu{
     .name = "pwr6",
     .llvm_name = "pwr6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -894,7 +894,7 @@ pub const cpu_pwr6 = Cpu{
 pub const cpu_pwr6x = Cpu{
     .name = "pwr6x",
     .llvm_name = "pwr6x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -916,7 +916,7 @@ pub const cpu_pwr6x = Cpu{
 pub const cpu_pwr7 = Cpu{
     .name = "pwr7",
     .llvm_name = "pwr7",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -946,7 +946,7 @@ pub const cpu_pwr7 = Cpu{
 pub const cpu_pwr8 = Cpu{
     .name = "pwr8",
     .llvm_name = "pwr8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
@@ -983,7 +983,7 @@ pub const cpu_pwr8 = Cpu{
 pub const cpu_pwr9 = Cpu{
     .name = "pwr9",
     .llvm_name = "pwr9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_hardFloat,
         &feature_altivec,
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index 46f66aff12baaa62e41e5569bc7a9ebcd9f4555a..cbb7ccb9ad0325fcb4cbf2ec2809ae7b9ffca72d 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -4,49 +4,49 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Implements RV64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_e = Feature{
     .name = "e",
     .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rvcHints = Feature{
     .name = "rvc-hints",
     .description = "Enable RVC Hint Instructions.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_relax = Feature{
     .name = "relax",
     .description = "Enable Linker relaxation.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_a = Feature{
     .name = "a",
     .description = "'A' (Atomic Instructions)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_c = Feature{
     .name = "c",
     .description = "'C' (Compressed Instructions)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_d = Feature{
     .name = "d",
     .description = "'D' (Double-Precision Floating-Point)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_f,
     },
 };
@@ -54,14 +54,14 @@ pub const feature_d = Feature{
 pub const feature_f = Feature{
     .name = "f",
     .description = "'F' (Single-Precision Floating-Point)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_m = Feature{
     .name = "m",
     .description = "'M' (Integer Multiplication and Division)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -80,7 +80,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_genericRv32 = Cpu{
     .name = "generic-rv32",
     .llvm_name = "generic-rv32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_rvcHints,
     },
 };
@@ -88,7 +88,7 @@ pub const cpu_genericRv32 = Cpu{
 pub const cpu_genericRv64 = Cpu{
     .name = "generic-rv64",
     .llvm_name = "generic-rv64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_rvcHints,
     },
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index d302c28063ec4a8437848a39ae4eed7549ca60ab..7cdeddb976cea4dd18b6ae4b0b013429b6a045e1 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -4,84 +4,84 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_hardQuadFloat = Feature{
     .name = "hard-quad-float",
     .description = "Enable quad-word floating point instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_leon = Feature{
     .name = "leon",
     .description = "Enable LEON extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noFmuls = Feature{
     .name = "no-fmuls",
     .description = "Disable the fmuls instruction.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_noFsmuld = Feature{
     .name = "no-fsmuld",
     .description = "Disable the fsmuld instruction.",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_leonpwrpsr = Feature{
     .name = "leonpwrpsr",
     .description = "Enable the PWRPSR instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Use software emulation for floating point",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_softMulDiv = Feature{
     .name = "soft-mul-div",
     .description = "Use software emulation for integer multiply and divide",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_deprecatedV8 = Feature{
     .name = "deprecated-v8",
     .description = "Enable deprecated V8 instructions in V9 mode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_v9 = Feature{
     .name = "v9",
     .description = "Enable SPARC-V9 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vis = Feature{
     .name = "vis",
     .description = "Enable UltraSPARC Visual Instruction Set extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vis2 = Feature{
     .name = "vis2",
     .description = "Enable Visual Instruction Set extensions II",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vis3 = Feature{
     .name = "vis3",
     .description = "Enable Visual Instruction Set extensions III",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -103,7 +103,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_at697e = Cpu{
     .name = "at697e",
     .llvm_name = "at697e",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -111,7 +111,7 @@ pub const cpu_at697e = Cpu{
 pub const cpu_at697f = Cpu{
     .name = "at697f",
     .llvm_name = "at697f",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -119,21 +119,21 @@ pub const cpu_at697f = Cpu{
 pub const cpu_f934 = Cpu{
     .name = "f934",
     .llvm_name = "f934",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_gr712rc = Cpu{
     .name = "gr712rc",
     .llvm_name = "gr712rc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -141,7 +141,7 @@ pub const cpu_gr712rc = Cpu{
 pub const cpu_gr740 = Cpu{
     .name = "gr740",
     .llvm_name = "gr740",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
         &feature_leonpwrpsr,
     },
@@ -150,14 +150,14 @@ pub const cpu_gr740 = Cpu{
 pub const cpu_hypersparc = Cpu{
     .name = "hypersparc",
     .llvm_name = "hypersparc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_leon2 = Cpu{
     .name = "leon2",
     .llvm_name = "leon2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -165,7 +165,7 @@ pub const cpu_leon2 = Cpu{
 pub const cpu_leon3 = Cpu{
     .name = "leon3",
     .llvm_name = "leon3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -173,7 +173,7 @@ pub const cpu_leon3 = Cpu{
 pub const cpu_leon4 = Cpu{
     .name = "leon4",
     .llvm_name = "leon4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -181,7 +181,7 @@ pub const cpu_leon4 = Cpu{
 pub const cpu_ma2080 = Cpu{
     .name = "ma2080",
     .llvm_name = "ma2080",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -189,7 +189,7 @@ pub const cpu_ma2080 = Cpu{
 pub const cpu_ma2085 = Cpu{
     .name = "ma2085",
     .llvm_name = "ma2085",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -197,7 +197,7 @@ pub const cpu_ma2085 = Cpu{
 pub const cpu_ma2100 = Cpu{
     .name = "ma2100",
     .llvm_name = "ma2100",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -205,7 +205,7 @@ pub const cpu_ma2100 = Cpu{
 pub const cpu_ma2150 = Cpu{
     .name = "ma2150",
     .llvm_name = "ma2150",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -213,7 +213,7 @@ pub const cpu_ma2150 = Cpu{
 pub const cpu_ma2155 = Cpu{
     .name = "ma2155",
     .llvm_name = "ma2155",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -221,7 +221,7 @@ pub const cpu_ma2155 = Cpu{
 pub const cpu_ma2450 = Cpu{
     .name = "ma2450",
     .llvm_name = "ma2450",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -229,7 +229,7 @@ pub const cpu_ma2450 = Cpu{
 pub const cpu_ma2455 = Cpu{
     .name = "ma2455",
     .llvm_name = "ma2455",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -237,7 +237,7 @@ pub const cpu_ma2455 = Cpu{
 pub const cpu_ma2480 = Cpu{
     .name = "ma2480",
     .llvm_name = "ma2480",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -245,7 +245,7 @@ pub const cpu_ma2480 = Cpu{
 pub const cpu_ma2485 = Cpu{
     .name = "ma2485",
     .llvm_name = "ma2485",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -253,7 +253,7 @@ pub const cpu_ma2485 = Cpu{
 pub const cpu_ma2x5x = Cpu{
     .name = "ma2x5x",
     .llvm_name = "ma2x5x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -261,7 +261,7 @@ pub const cpu_ma2x5x = Cpu{
 pub const cpu_ma2x8x = Cpu{
     .name = "ma2x8x",
     .llvm_name = "ma2x8x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -269,7 +269,7 @@ pub const cpu_ma2x8x = Cpu{
 pub const cpu_myriad2 = Cpu{
     .name = "myriad2",
     .llvm_name = "myriad2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -277,7 +277,7 @@ pub const cpu_myriad2 = Cpu{
 pub const cpu_myriad21 = Cpu{
     .name = "myriad2.1",
     .llvm_name = "myriad2.1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -285,7 +285,7 @@ pub const cpu_myriad21 = Cpu{
 pub const cpu_myriad22 = Cpu{
     .name = "myriad2.2",
     .llvm_name = "myriad2.2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -293,7 +293,7 @@ pub const cpu_myriad22 = Cpu{
 pub const cpu_myriad23 = Cpu{
     .name = "myriad2.3",
     .llvm_name = "myriad2.3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
     },
 };
@@ -301,7 +301,7 @@ pub const cpu_myriad23 = Cpu{
 pub const cpu_niagara = Cpu{
     .name = "niagara",
     .llvm_name = "niagara",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -312,7 +312,7 @@ pub const cpu_niagara = Cpu{
 pub const cpu_niagara2 = Cpu{
     .name = "niagara2",
     .llvm_name = "niagara2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -323,7 +323,7 @@ pub const cpu_niagara2 = Cpu{
 pub const cpu_niagara3 = Cpu{
     .name = "niagara3",
     .llvm_name = "niagara3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -334,7 +334,7 @@ pub const cpu_niagara3 = Cpu{
 pub const cpu_niagara4 = Cpu{
     .name = "niagara4",
     .llvm_name = "niagara4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -346,42 +346,42 @@ pub const cpu_niagara4 = Cpu{
 pub const cpu_sparclet = Cpu{
     .name = "sparclet",
     .llvm_name = "sparclet",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_sparclite = Cpu{
     .name = "sparclite",
     .llvm_name = "sparclite",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_sparclite86x = Cpu{
     .name = "sparclite86x",
     .llvm_name = "sparclite86x",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_supersparc = Cpu{
     .name = "supersparc",
     .llvm_name = "supersparc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_tsc701 = Cpu{
     .name = "tsc701",
     .llvm_name = "tsc701",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_ultrasparc = Cpu{
     .name = "ultrasparc",
     .llvm_name = "ultrasparc",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -391,7 +391,7 @@ pub const cpu_ultrasparc = Cpu{
 pub const cpu_ultrasparc3 = Cpu{
     .name = "ultrasparc3",
     .llvm_name = "ultrasparc3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_deprecatedV8,
         &feature_v9,
         &feature_vis,
@@ -402,7 +402,7 @@ pub const cpu_ultrasparc3 = Cpu{
 pub const cpu_ut699 = Cpu{
     .name = "ut699",
     .llvm_name = "ut699",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_leon,
         &feature_noFmuls,
         &feature_noFsmuld,
@@ -412,7 +412,7 @@ pub const cpu_ut699 = Cpu{
 pub const cpu_v7 = Cpu{
     .name = "v7",
     .llvm_name = "v7",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_noFsmuld,
         &feature_softMulDiv,
     },
@@ -421,14 +421,14 @@ pub const cpu_v7 = Cpu{
 pub const cpu_v8 = Cpu{
     .name = "v8",
     .llvm_name = "v8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_v9 = Cpu{
     .name = "v9",
     .llvm_name = "v9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_v9,
     },
 };
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index e7fa7c7333025e8fa0cbdeedef35c9dbb6fcd4d0..1f5d64846855472b213a07e43d9752789e165090 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -4,245 +4,245 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_dfpPackedConversion = Feature{
     .name = "dfp-packed-conversion",
     .description = "Assume that the DFP packed-conversion facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_dfpZonedConversion = Feature{
     .name = "dfp-zoned-conversion",
     .description = "Assume that the DFP zoned-conversion facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_deflateConversion = Feature{
     .name = "deflate-conversion",
     .description = "Assume that the deflate-conversion facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_distinctOps = Feature{
     .name = "distinct-ops",
     .description = "Assume that the distinct-operands facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_enhancedDat2 = Feature{
     .name = "enhanced-dat-2",
     .description = "Assume that the enhanced-DAT facility 2 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_enhancedSort = Feature{
     .name = "enhanced-sort",
     .description = "Assume that the enhanced-sort facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_executionHint = Feature{
     .name = "execution-hint",
     .description = "Assume that the execution-hint facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fpExtension = Feature{
     .name = "fp-extension",
     .description = "Assume that the floating-point extension facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastSerialization = Feature{
     .name = "fast-serialization",
     .description = "Assume that the fast-serialization facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_guardedStorage = Feature{
     .name = "guarded-storage",
     .description = "Assume that the guarded-storage facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_highWord = Feature{
     .name = "high-word",
     .description = "Assume that the high-word facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_insertReferenceBitsMultiple = Feature{
     .name = "insert-reference-bits-multiple",
     .description = "Assume that the insert-reference-bits-multiple facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_interlockedAccess1 = Feature{
     .name = "interlocked-access1",
     .description = "Assume that interlocked-access facility 1 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loadAndTrap = Feature{
     .name = "load-and-trap",
     .description = "Assume that the load-and-trap facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loadAndZeroRightmostByte = Feature{
     .name = "load-and-zero-rightmost-byte",
     .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loadStoreOnCond = Feature{
     .name = "load-store-on-cond",
     .description = "Assume that the load/store-on-condition facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_loadStoreOnCond2 = Feature{
     .name = "load-store-on-cond-2",
     .description = "Assume that the load/store-on-condition facility 2 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension3 = Feature{
     .name = "message-security-assist-extension3",
     .description = "Assume that the message-security-assist extension facility 3 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension4 = Feature{
     .name = "message-security-assist-extension4",
     .description = "Assume that the message-security-assist extension facility 4 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension5 = Feature{
     .name = "message-security-assist-extension5",
     .description = "Assume that the message-security-assist extension facility 5 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension7 = Feature{
     .name = "message-security-assist-extension7",
     .description = "Assume that the message-security-assist extension facility 7 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension8 = Feature{
     .name = "message-security-assist-extension8",
     .description = "Assume that the message-security-assist extension facility 8 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_messageSecurityAssistExtension9 = Feature{
     .name = "message-security-assist-extension9",
     .description = "Assume that the message-security-assist extension facility 9 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_miscellaneousExtensions = Feature{
     .name = "miscellaneous-extensions",
     .description = "Assume that the miscellaneous-extensions facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_miscellaneousExtensions2 = Feature{
     .name = "miscellaneous-extensions-2",
     .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_miscellaneousExtensions3 = Feature{
     .name = "miscellaneous-extensions-3",
     .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_populationCount = Feature{
     .name = "population-count",
     .description = "Assume that the population-count facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_processorAssist = Feature{
     .name = "processor-assist",
     .description = "Assume that the processor-assist facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_resetReferenceBitsMultiple = Feature{
     .name = "reset-reference-bits-multiple",
     .description = "Assume that the reset-reference-bits-multiple facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_transactionalExecution = Feature{
     .name = "transactional-execution",
     .description = "Assume that the transactional-execution facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vector = Feature{
     .name = "vector",
     .description = "Assume that the vectory facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vectorEnhancements1 = Feature{
     .name = "vector-enhancements-1",
     .description = "Assume that the vector enhancements facility 1 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vectorEnhancements2 = Feature{
     .name = "vector-enhancements-2",
     .description = "Assume that the vector enhancements facility 2 is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vectorPackedDecimal = Feature{
     .name = "vector-packed-decimal",
     .description = "Assume that the vector packed decimal facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vectorPackedDecimalEnhancement = Feature{
     .name = "vector-packed-decimal-enhancement",
     .description = "Assume that the vector packed decimal enhancement facility is installed",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -287,7 +287,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_arch10 = Cpu{
     .name = "arch10",
     .llvm_name = "arch10",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpZonedConversion,
         &feature_distinctOps,
         &feature_enhancedDat2,
@@ -311,7 +311,7 @@ pub const cpu_arch10 = Cpu{
 pub const cpu_arch11 = Cpu{
     .name = "arch11",
     .llvm_name = "arch11",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_distinctOps,
@@ -340,7 +340,7 @@ pub const cpu_arch11 = Cpu{
 pub const cpu_arch12 = Cpu{
     .name = "arch12",
     .llvm_name = "arch12",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_distinctOps,
@@ -376,7 +376,7 @@ pub const cpu_arch12 = Cpu{
 pub const cpu_arch13 = Cpu{
     .name = "arch13",
     .llvm_name = "arch13",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_deflateConversion,
@@ -418,14 +418,14 @@ pub const cpu_arch13 = Cpu{
 pub const cpu_arch8 = Cpu{
     .name = "arch8",
     .llvm_name = "arch8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arch9 = Cpu{
     .name = "arch9",
     .llvm_name = "arch9",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_distinctOps,
         &feature_fpExtension,
         &feature_fastSerialization,
@@ -442,21 +442,21 @@ pub const cpu_arch9 = Cpu{
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_z10 = Cpu{
     .name = "z10",
     .llvm_name = "z10",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_z13 = Cpu{
     .name = "z13",
     .llvm_name = "z13",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_distinctOps,
@@ -485,7 +485,7 @@ pub const cpu_z13 = Cpu{
 pub const cpu_z14 = Cpu{
     .name = "z14",
     .llvm_name = "z14",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_distinctOps,
@@ -521,7 +521,7 @@ pub const cpu_z14 = Cpu{
 pub const cpu_z15 = Cpu{
     .name = "z15",
     .llvm_name = "z15",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpPackedConversion,
         &feature_dfpZonedConversion,
         &feature_deflateConversion,
@@ -563,7 +563,7 @@ pub const cpu_z15 = Cpu{
 pub const cpu_z196 = Cpu{
     .name = "z196",
     .llvm_name = "z196",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_distinctOps,
         &feature_fpExtension,
         &feature_fastSerialization,
@@ -580,7 +580,7 @@ pub const cpu_z196 = Cpu{
 pub const cpu_zEC12 = Cpu{
     .name = "zEC12",
     .llvm_name = "zEC12",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_dfpZonedConversion,
         &feature_distinctOps,
         &feature_enhancedDat2,
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 6b302a9ff661275a5df20b5fa6139b13275cb514..17d771770898b209ed7054d83373835d027893a1 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -4,70 +4,70 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_atomics = Feature{
     .name = "atomics",
     .description = "Enable Atomics",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bulkMemory = Feature{
     .name = "bulk-memory",
     .description = "Enable bulk memory operations",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_exceptionHandling = Feature{
     .name = "exception-handling",
     .description = "Enable Wasm exception handling",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_multivalue = Feature{
     .name = "multivalue",
     .description = "Enable multivalue blocks, instructions, and functions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mutableGlobals = Feature{
     .name = "mutable-globals",
     .description = "Enable mutable globals",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nontrappingFptoint = Feature{
     .name = "nontrapping-fptoint",
     .description = "Enable non-trapping float-to-int conversion operators",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_simd128 = Feature{
     .name = "simd128",
     .description = "Enable 128-bit SIMD",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_signExt = Feature{
     .name = "sign-ext",
     .description = "Enable sign extension operators",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tailCall = Feature{
     .name = "tail-call",
     .description = "Enable tail call instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_unimplementedSimd128 = Feature{
     .name = "unimplemented-simd128",
     .description = "Enable 128-bit SIMD not yet implemented in engines",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_simd128,
     },
 };
@@ -88,7 +88,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_bleedingEdge = Cpu{
     .name = "bleeding-edge",
     .llvm_name = "bleeding-edge",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_atomics,
         &feature_mutableGlobals,
         &feature_nontrappingFptoint,
@@ -100,14 +100,14 @@ pub const cpu_bleedingEdge = Cpu{
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_mvp = Cpu{
     .name = "mvp",
     .llvm_name = "mvp",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index de49ce937cc43000c6567c0e599eb9b907409d18..573282c664458f912d44d69ef96f1d43bc260116 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -4,7 +4,7 @@ const Cpu = @import("std").target.Cpu;
 pub const feature_dnow3 = Feature{
     .name = "3dnow",
     .description = "Enable 3DNow! instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
     },
 };
@@ -12,7 +12,7 @@ pub const feature_dnow3 = Feature{
 pub const feature_dnowa3 = Feature{
     .name = "3dnowa",
     .description = "Enable 3DNow! Athlon instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
     },
 };
@@ -20,21 +20,21 @@ pub const feature_dnowa3 = Feature{
 pub const feature_bit64 = Feature{
     .name = "64bit",
     .description = "Support 64-bit instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_adx = Feature{
     .name = "adx",
     .description = "Support ADX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_aes = Feature{
     .name = "aes",
     .description = "Enable AES instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -42,7 +42,7 @@ pub const feature_aes = Feature{
 pub const feature_avx = Feature{
     .name = "avx",
     .description = "Enable AVX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -50,7 +50,7 @@ pub const feature_avx = Feature{
 pub const feature_avx2 = Feature{
     .name = "avx2",
     .description = "Enable AVX2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -58,7 +58,7 @@ pub const feature_avx2 = Feature{
 pub const feature_avx512f = Feature{
     .name = "avx512f",
     .description = "Enable AVX-512 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -66,7 +66,7 @@ pub const feature_avx512f = Feature{
 pub const feature_avx512bf16 = Feature{
     .name = "avx512bf16",
     .description = "Support bfloat16 floating point",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -74,7 +74,7 @@ pub const feature_avx512bf16 = Feature{
 pub const feature_avx512bitalg = Feature{
     .name = "avx512bitalg",
     .description = "Enable AVX-512 Bit Algorithms",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -82,21 +82,21 @@ pub const feature_avx512bitalg = Feature{
 pub const feature_bmi = Feature{
     .name = "bmi",
     .description = "Support BMI instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bmi2 = Feature{
     .name = "bmi2",
     .description = "Support BMI2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avx512bw = Feature{
     .name = "avx512bw",
     .description = "Enable AVX-512 Byte and Word Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -104,14 +104,14 @@ pub const feature_avx512bw = Feature{
 pub const feature_branchfusion = Feature{
     .name = "branchfusion",
     .description = "CMP/TEST can be fused with conditional branches",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avx512cd = Feature{
     .name = "avx512cd",
     .description = "Enable AVX-512 Conflict Detection Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -119,49 +119,49 @@ pub const feature_avx512cd = Feature{
 pub const feature_cldemote = Feature{
     .name = "cldemote",
     .description = "Enable Cache Demote",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_clflushopt = Feature{
     .name = "clflushopt",
     .description = "Flush A Cache Line Optimized",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_clwb = Feature{
     .name = "clwb",
     .description = "Cache Line Write Back",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_clzero = Feature{
     .name = "clzero",
     .description = "Enable Cache Line Zero",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cmov = Feature{
     .name = "cmov",
     .description = "Enable conditional move instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cx8 = Feature{
     .name = "cx8",
     .description = "Support CMPXCHG8B instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_cx16 = Feature{
     .name = "cx16",
     .description = "64-bit with cmpxchg16b",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
     },
 };
@@ -169,7 +169,7 @@ pub const feature_cx16 = Feature{
 pub const feature_avx512dq = Feature{
     .name = "avx512dq",
     .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -177,21 +177,21 @@ pub const feature_avx512dq = Feature{
 pub const feature_mpx = Feature{
     .name = "mpx",
     .description = "Deprecated. Support MPX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_enqcmd = Feature{
     .name = "enqcmd",
     .description = "Has ENQCMD instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avx512er = Feature{
     .name = "avx512er",
     .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -199,14 +199,14 @@ pub const feature_avx512er = Feature{
 pub const feature_ermsb = Feature{
     .name = "ermsb",
     .description = "REP MOVS/STOS are fast",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_f16c = Feature{
     .name = "f16c",
     .description = "Support 16-bit floating point conversion instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -214,7 +214,7 @@ pub const feature_f16c = Feature{
 pub const feature_fma = Feature{
     .name = "fma",
     .description = "Enable three-operand fused multiple-add",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -222,7 +222,7 @@ pub const feature_fma = Feature{
 pub const feature_fma4 = Feature{
     .name = "fma4",
     .description = "Enable four-operand fused multiple-add",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -230,42 +230,42 @@ pub const feature_fma4 = Feature{
 pub const feature_fsgsbase = Feature{
     .name = "fsgsbase",
     .description = "Support FS/GS Base instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fxsr = Feature{
     .name = "fxsr",
     .description = "Support fxsave/fxrestore instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fast11bytenop = Feature{
     .name = "fast-11bytenop",
     .description = "Target can quickly decode up to 11 byte NOPs",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fast15bytenop = Feature{
     .name = "fast-15bytenop",
     .description = "Target can quickly decode up to 15 byte NOPs",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastBextr = Feature{
     .name = "fast-bextr",
     .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastHops = Feature{
     .name = "fast-hops",
     .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -273,63 +273,63 @@ pub const feature_fastHops = Feature{
 pub const feature_fastLzcnt = Feature{
     .name = "fast-lzcnt",
     .description = "LZCNT instructions are as fast as most simple integer ops",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastPartialYmmOrZmmWrite = Feature{
     .name = "fast-partial-ymm-or-zmm-write",
     .description = "Partial writes to YMM/ZMM registers are fast",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastShldRotate = Feature{
     .name = "fast-shld-rotate",
     .description = "SHLD can be used as a faster rotate",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastScalarFsqrt = Feature{
     .name = "fast-scalar-fsqrt",
     .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastScalarShiftMasks = Feature{
     .name = "fast-scalar-shift-masks",
     .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastVariableShuffle = Feature{
     .name = "fast-variable-shuffle",
     .description = "Shuffles with variable masks are fast",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastVectorFsqrt = Feature{
     .name = "fast-vector-fsqrt",
     .description = "Vector SQRT is fast (disable Newton-Raphson)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_fastVectorShiftMasks = Feature{
     .name = "fast-vector-shift-masks",
     .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_gfni = Feature{
     .name = "gfni",
     .description = "Enable Galois Field Arithmetic Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -337,14 +337,14 @@ pub const feature_gfni = Feature{
 pub const feature_fastGather = Feature{
     .name = "fast-gather",
     .description = "Indicates if gather is reasonably fast",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avx512ifma = Feature{
     .name = "avx512ifma",
     .description = "Enable AVX-512 Integer Fused Multiple-Add",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -352,112 +352,112 @@ pub const feature_avx512ifma = Feature{
 pub const feature_invpcid = Feature{
     .name = "invpcid",
     .description = "Invalidate Process-Context Identifier",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sahf = Feature{
     .name = "sahf",
     .description = "Support LAHF and SAHF instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_leaSp = Feature{
     .name = "lea-sp",
     .description = "Use LEA for adjusting the stack pointer",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_leaUsesAg = Feature{
     .name = "lea-uses-ag",
     .description = "LEA instruction needs inputs at AG stage",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lwp = Feature{
     .name = "lwp",
     .description = "Enable LWP instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_lzcnt = Feature{
     .name = "lzcnt",
     .description = "Support LZCNT instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_falseDepsLzcntTzcnt = Feature{
     .name = "false-deps-lzcnt-tzcnt",
     .description = "LZCNT/TZCNT have a false dependency on dest register",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mmx = Feature{
     .name = "mmx",
     .description = "Enable MMX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_movbe = Feature{
     .name = "movbe",
     .description = "Support MOVBE instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_movdir64b = Feature{
     .name = "movdir64b",
     .description = "Support movdir64b instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_movdiri = Feature{
     .name = "movdiri",
     .description = "Support movdiri instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mwaitx = Feature{
     .name = "mwaitx",
     .description = "Enable MONITORX/MWAITX timer functionality",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_macrofusion = Feature{
     .name = "macrofusion",
     .description = "Various instructions can be fused with conditional branches",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_mergeToThreewayBranch = Feature{
     .name = "merge-to-threeway-branch",
     .description = "Merge branches to a three-way conditional branch",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_nopl = Feature{
     .name = "nopl",
     .description = "Enable NOPL instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_pclmul = Feature{
     .name = "pclmul",
     .description = "Enable packed carry-less multiplication instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -465,14 +465,14 @@ pub const feature_pclmul = Feature{
 pub const feature_pconfig = Feature{
     .name = "pconfig",
     .description = "platform configuration instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_avx512pf = Feature{
     .name = "avx512pf",
     .description = "Enable AVX-512 PreFetch Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -480,107 +480,107 @@ pub const feature_avx512pf = Feature{
 pub const feature_pku = Feature{
     .name = "pku",
     .description = "Enable protection keys",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_popcnt = Feature{
     .name = "popcnt",
     .description = "Support POPCNT instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_falseDepsPopcnt = Feature{
     .name = "false-deps-popcnt",
     .description = "POPCNT has a false dependency on dest register",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_prefetchwt1 = Feature{
     .name = "prefetchwt1",
     .description = "Prefetch with Intent to Write and T1 Hint",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_prfchw = Feature{
     .name = "prfchw",
     .description = "Support PRFCHW instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ptwrite = Feature{
     .name = "ptwrite",
     .description = "Support ptwrite instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_padShortFunctions = Feature{
     .name = "pad-short-functions",
     .description = "Pad short functions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_prefer128Bit = Feature{
     .name = "prefer-128-bit",
     .description = "Prefer 128-bit AVX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_prefer256Bit = Feature{
     .name = "prefer-256-bit",
     .description = "Prefer 256-bit AVX instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rdpid = Feature{
     .name = "rdpid",
     .description = "Support RDPID instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rdrnd = Feature{
     .name = "rdrnd",
     .description = "Support RDRAND instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rdseed = Feature{
     .name = "rdseed",
     .description = "Support RDSEED instruction",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_rtm = Feature{
     .name = "rtm",
     .description = "Support RTM instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_retpoline = Feature{
     .name = "retpoline",
     .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
+        &feature_retpolineIndirectCalls,
         &feature_retpolineIndirectBranches,
-        &feature_retpolineIndirectCalls,
     },
 };
 
 pub const feature_retpolineExternalThunk = Feature{
     .name = "retpoline-external-thunk",
     .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_retpolineIndirectCalls,
     },
 };
@@ -588,28 +588,28 @@ pub const feature_retpolineExternalThunk = Feature{
 pub const feature_retpolineIndirectBranches = Feature{
     .name = "retpoline-indirect-branches",
     .description = "Remove speculation of indirect branches from the generated code",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_retpolineIndirectCalls = Feature{
     .name = "retpoline-indirect-calls",
     .description = "Remove speculation of indirect calls from the generated code",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sgx = Feature{
     .name = "sgx",
     .description = "Enable Software Guard Extensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sha = Feature{
     .name = "sha",
     .description = "Enable SHA instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -617,21 +617,21 @@ pub const feature_sha = Feature{
 pub const feature_shstk = Feature{
     .name = "shstk",
     .description = "Support CET Shadow-Stack instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sse = Feature{
     .name = "sse",
     .description = "Enable SSE instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_sse2 = Feature{
     .name = "sse2",
     .description = "Enable SSE2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -639,7 +639,7 @@ pub const feature_sse2 = Feature{
 pub const feature_sse3 = Feature{
     .name = "sse3",
     .description = "Enable SSE3 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -647,7 +647,7 @@ pub const feature_sse3 = Feature{
 pub const feature_sse4a = Feature{
     .name = "sse4a",
     .description = "Support SSE 4a instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -655,7 +655,7 @@ pub const feature_sse4a = Feature{
 pub const feature_sse41 = Feature{
     .name = "sse4.1",
     .description = "Enable SSE 4.1 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -663,7 +663,7 @@ pub const feature_sse41 = Feature{
 pub const feature_sse42 = Feature{
     .name = "sse4.2",
     .description = "Enable SSE 4.2 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -671,14 +671,14 @@ pub const feature_sse42 = Feature{
 pub const feature_sseUnalignedMem = Feature{
     .name = "sse-unaligned-mem",
     .description = "Allow unaligned memory operands with SSE instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_ssse3 = Feature{
     .name = "ssse3",
     .description = "Enable SSSE3 instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -686,105 +686,105 @@ pub const feature_ssse3 = Feature{
 pub const feature_slow3opsLea = Feature{
     .name = "slow-3ops-lea",
     .description = "LEA instruction with 3 ops or certain registers is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_idivlToDivb = Feature{
     .name = "idivl-to-divb",
     .description = "Use 8-bit divide for positive values less than 256",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_idivqToDivl = Feature{
     .name = "idivq-to-divl",
     .description = "Use 32-bit divide for positive values less than 2^32",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowIncdec = Feature{
     .name = "slow-incdec",
     .description = "INC and DEC instructions are slower than ADD and SUB",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowLea = Feature{
     .name = "slow-lea",
     .description = "LEA instruction with certain arguments is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowPmaddwd = Feature{
     .name = "slow-pmaddwd",
     .description = "PMADDWD is slower than PMULLD",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowPmulld = Feature{
     .name = "slow-pmulld",
     .description = "PMULLD instruction is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowShld = Feature{
     .name = "slow-shld",
     .description = "SHLD instruction is slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowTwoMemOps = Feature{
     .name = "slow-two-mem-ops",
     .description = "Two memory operand instructions are slow",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowUnalignedMem16 = Feature{
     .name = "slow-unaligned-mem-16",
     .description = "Slow unaligned 16-byte memory access",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_slowUnalignedMem32 = Feature{
     .name = "slow-unaligned-mem-32",
     .description = "Slow unaligned 32-byte memory access",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
     .description = "Use software floating point features",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_tbm = Feature{
     .name = "tbm",
     .description = "Enable TBM instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
     .description = "Use alias analysis during codegen",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_vaes = Feature{
     .name = "vaes",
     .description = "Promote selected AES instructions to AVX512/AVX registers",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -792,7 +792,7 @@ pub const feature_vaes = Feature{
 pub const feature_avx512vbmi = Feature{
     .name = "avx512vbmi",
     .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -800,7 +800,7 @@ pub const feature_avx512vbmi = Feature{
 pub const feature_avx512vbmi2 = Feature{
     .name = "avx512vbmi2",
     .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -808,7 +808,7 @@ pub const feature_avx512vbmi2 = Feature{
 pub const feature_avx512vl = Feature{
     .name = "avx512vl",
     .description = "Enable AVX-512 Vector Length eXtensions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -816,7 +816,7 @@ pub const feature_avx512vl = Feature{
 pub const feature_avx512vnni = Feature{
     .name = "avx512vnni",
     .description = "Enable AVX-512 Vector Neural Network Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -824,7 +824,7 @@ pub const feature_avx512vnni = Feature{
 pub const feature_avx512vp2intersect = Feature{
     .name = "avx512vp2intersect",
     .description = "Enable AVX-512 vp2intersect",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -832,7 +832,7 @@ pub const feature_avx512vp2intersect = Feature{
 pub const feature_vpclmulqdq = Feature{
     .name = "vpclmulqdq",
     .description = "Enable vpclmulqdq instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -840,7 +840,7 @@ pub const feature_vpclmulqdq = Feature{
 pub const feature_avx512vpopcntdq = Feature{
     .name = "avx512vpopcntdq",
     .description = "Enable AVX-512 Population Count Instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -848,28 +848,28 @@ pub const feature_avx512vpopcntdq = Feature{
 pub const feature_waitpkg = Feature{
     .name = "waitpkg",
     .description = "Wait and pause enhancements",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_wbnoinvd = Feature{
     .name = "wbnoinvd",
     .description = "Write Back No Invalidate",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_x87 = Feature{
     .name = "x87",
     .description = "Enable X87 float instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xop = Feature{
     .name = "xop",
     .description = "Enable XOP instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_sse,
     },
 };
@@ -877,49 +877,49 @@ pub const feature_xop = Feature{
 pub const feature_xsave = Feature{
     .name = "xsave",
     .description = "Support xsave instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xsavec = Feature{
     .name = "xsavec",
     .description = "Support xsavec instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xsaveopt = Feature{
     .name = "xsaveopt",
     .description = "Support xsaveopt instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_xsaves = Feature{
     .name = "xsaves",
     .description = "Support xsaves instructions",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bitMode16 = Feature{
     .name = "16bit-mode",
     .description = "16-bit mode (i8086)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bitMode32 = Feature{
     .name = "32bit-mode",
     .description = "32-bit mode (80386)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const feature_bitMode64 = Feature{
     .name = "64bit-mode",
     .description = "64-bit mode (x86_64)",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
@@ -1055,7 +1055,7 @@ pub const features = &[_]*const Feature {
 pub const cpu_amdfam10 = Cpu{
     .name = "amdfam10",
     .llvm_name = "amdfam10",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -1078,7 +1078,7 @@ pub const cpu_amdfam10 = Cpu{
 pub const cpu_athlon = Cpu{
     .name = "athlon",
     .llvm_name = "athlon",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cmov,
@@ -1093,7 +1093,7 @@ pub const cpu_athlon = Cpu{
 pub const cpu_athlon4 = Cpu{
     .name = "athlon-4",
     .llvm_name = "athlon-4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cmov,
@@ -1110,7 +1110,7 @@ pub const cpu_athlon4 = Cpu{
 pub const cpu_athlonFx = Cpu{
     .name = "athlon-fx",
     .llvm_name = "athlon-fx",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -1130,7 +1130,7 @@ pub const cpu_athlonFx = Cpu{
 pub const cpu_athlonMp = Cpu{
     .name = "athlon-mp",
     .llvm_name = "athlon-mp",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cmov,
@@ -1147,7 +1147,7 @@ pub const cpu_athlonMp = Cpu{
 pub const cpu_athlonTbird = Cpu{
     .name = "athlon-tbird",
     .llvm_name = "athlon-tbird",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cmov,
@@ -1162,7 +1162,7 @@ pub const cpu_athlonTbird = Cpu{
 pub const cpu_athlonXp = Cpu{
     .name = "athlon-xp",
     .llvm_name = "athlon-xp",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cmov,
@@ -1179,7 +1179,7 @@ pub const cpu_athlonXp = Cpu{
 pub const cpu_athlon64 = Cpu{
     .name = "athlon64",
     .llvm_name = "athlon64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -1199,7 +1199,7 @@ pub const cpu_athlon64 = Cpu{
 pub const cpu_athlon64Sse3 = Cpu{
     .name = "athlon64-sse3",
     .llvm_name = "athlon64-sse3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -1220,7 +1220,7 @@ pub const cpu_athlon64Sse3 = Cpu{
 pub const cpu_atom = Cpu{
     .name = "atom",
     .llvm_name = "atom",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -1246,7 +1246,7 @@ pub const cpu_atom = Cpu{
 pub const cpu_barcelona = Cpu{
     .name = "barcelona",
     .llvm_name = "barcelona",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -1269,7 +1269,7 @@ pub const cpu_barcelona = Cpu{
 pub const cpu_bdver1 = Cpu{
     .name = "bdver1",
     .llvm_name = "bdver1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1298,7 +1298,7 @@ pub const cpu_bdver1 = Cpu{
 pub const cpu_bdver2 = Cpu{
     .name = "bdver2",
     .llvm_name = "bdver2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1332,7 +1332,7 @@ pub const cpu_bdver2 = Cpu{
 pub const cpu_bdver3 = Cpu{
     .name = "bdver3",
     .llvm_name = "bdver3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1368,7 +1368,7 @@ pub const cpu_bdver3 = Cpu{
 pub const cpu_bdver4 = Cpu{
     .name = "bdver4",
     .llvm_name = "bdver4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1407,7 +1407,7 @@ pub const cpu_bdver4 = Cpu{
 pub const cpu_bonnell = Cpu{
     .name = "bonnell",
     .llvm_name = "bonnell",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -1433,7 +1433,7 @@ pub const cpu_bonnell = Cpu{
 pub const cpu_broadwell = Cpu{
     .name = "broadwell",
     .llvm_name = "broadwell",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -1479,7 +1479,7 @@ pub const cpu_broadwell = Cpu{
 pub const cpu_btver1 = Cpu{
     .name = "btver1",
     .llvm_name = "btver1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -1505,7 +1505,7 @@ pub const cpu_btver1 = Cpu{
 pub const cpu_btver2 = Cpu{
     .name = "btver2",
     .llvm_name = "btver2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1543,7 +1543,7 @@ pub const cpu_btver2 = Cpu{
 pub const cpu_c3 = Cpu{
     .name = "c3",
     .llvm_name = "c3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnow3,
         &feature_slowUnalignedMem16,
@@ -1554,7 +1554,7 @@ pub const cpu_c3 = Cpu{
 pub const cpu_c32 = Cpu{
     .name = "c3-2",
     .llvm_name = "c3-2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -1568,7 +1568,7 @@ pub const cpu_c32 = Cpu{
 pub const cpu_cannonlake = Cpu{
     .name = "cannonlake",
     .llvm_name = "cannonlake",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -1629,7 +1629,7 @@ pub const cpu_cannonlake = Cpu{
 pub const cpu_cascadelake = Cpu{
     .name = "cascadelake",
     .llvm_name = "cascadelake",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -1689,7 +1689,7 @@ pub const cpu_cascadelake = Cpu{
 pub const cpu_cooperlake = Cpu{
     .name = "cooperlake",
     .llvm_name = "cooperlake",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -1750,7 +1750,7 @@ pub const cpu_cooperlake = Cpu{
 pub const cpu_coreAvxI = Cpu{
     .name = "core-avx-i",
     .llvm_name = "core-avx-i",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -1784,7 +1784,7 @@ pub const cpu_coreAvxI = Cpu{
 pub const cpu_coreAvx2 = Cpu{
     .name = "core-avx2",
     .llvm_name = "core-avx2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -1827,7 +1827,7 @@ pub const cpu_coreAvx2 = Cpu{
 pub const cpu_core2 = Cpu{
     .name = "core2",
     .llvm_name = "core2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -1847,7 +1847,7 @@ pub const cpu_core2 = Cpu{
 pub const cpu_corei7 = Cpu{
     .name = "corei7",
     .llvm_name = "corei7",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -1867,7 +1867,7 @@ pub const cpu_corei7 = Cpu{
 pub const cpu_corei7Avx = Cpu{
     .name = "corei7-avx",
     .llvm_name = "corei7-avx",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -1898,7 +1898,7 @@ pub const cpu_corei7Avx = Cpu{
 pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
         &feature_slowUnalignedMem16,
         &feature_x87,
@@ -1908,7 +1908,7 @@ pub const cpu_generic = Cpu{
 pub const cpu_geode = Cpu{
     .name = "geode",
     .llvm_name = "geode",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_cx8,
@@ -1920,7 +1920,7 @@ pub const cpu_geode = Cpu{
 pub const cpu_goldmont = Cpu{
     .name = "goldmont",
     .llvm_name = "goldmont",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1957,7 +1957,7 @@ pub const cpu_goldmont = Cpu{
 pub const cpu_goldmontPlus = Cpu{
     .name = "goldmont-plus",
     .llvm_name = "goldmont-plus",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -1996,7 +1996,7 @@ pub const cpu_goldmontPlus = Cpu{
 pub const cpu_haswell = Cpu{
     .name = "haswell",
     .llvm_name = "haswell",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -2039,7 +2039,7 @@ pub const cpu_haswell = Cpu{
 pub const cpu_i386 = Cpu{
     .name = "i386",
     .llvm_name = "i386",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_slowUnalignedMem16,
         &feature_x87,
     },
@@ -2048,7 +2048,7 @@ pub const cpu_i386 = Cpu{
 pub const cpu_i486 = Cpu{
     .name = "i486",
     .llvm_name = "i486",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_slowUnalignedMem16,
         &feature_x87,
     },
@@ -2057,7 +2057,7 @@ pub const cpu_i486 = Cpu{
 pub const cpu_i586 = Cpu{
     .name = "i586",
     .llvm_name = "i586",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
         &feature_slowUnalignedMem16,
         &feature_x87,
@@ -2067,7 +2067,7 @@ pub const cpu_i586 = Cpu{
 pub const cpu_i686 = Cpu{
     .name = "i686",
     .llvm_name = "i686",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_slowUnalignedMem16,
@@ -2078,7 +2078,7 @@ pub const cpu_i686 = Cpu{
 pub const cpu_icelakeClient = Cpu{
     .name = "icelake-client",
     .llvm_name = "icelake-client",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2148,7 +2148,7 @@ pub const cpu_icelakeClient = Cpu{
 pub const cpu_icelakeServer = Cpu{
     .name = "icelake-server",
     .llvm_name = "icelake-server",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2220,7 +2220,7 @@ pub const cpu_icelakeServer = Cpu{
 pub const cpu_ivybridge = Cpu{
     .name = "ivybridge",
     .llvm_name = "ivybridge",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -2254,7 +2254,7 @@ pub const cpu_ivybridge = Cpu{
 pub const cpu_k6 = Cpu{
     .name = "k6",
     .llvm_name = "k6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
         &feature_mmx,
         &feature_slowUnalignedMem16,
@@ -2265,7 +2265,7 @@ pub const cpu_k6 = Cpu{
 pub const cpu_k62 = Cpu{
     .name = "k6-2",
     .llvm_name = "k6-2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnow3,
         &feature_cx8,
@@ -2277,7 +2277,7 @@ pub const cpu_k62 = Cpu{
 pub const cpu_k63 = Cpu{
     .name = "k6-3",
     .llvm_name = "k6-3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnow3,
         &feature_cx8,
@@ -2289,7 +2289,7 @@ pub const cpu_k63 = Cpu{
 pub const cpu_k8 = Cpu{
     .name = "k8",
     .llvm_name = "k8",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -2309,7 +2309,7 @@ pub const cpu_k8 = Cpu{
 pub const cpu_k8Sse3 = Cpu{
     .name = "k8-sse3",
     .llvm_name = "k8-sse3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -2330,7 +2330,7 @@ pub const cpu_k8Sse3 = Cpu{
 pub const cpu_knl = Cpu{
     .name = "knl",
     .llvm_name = "knl",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2375,7 +2375,7 @@ pub const cpu_knl = Cpu{
 pub const cpu_knm = Cpu{
     .name = "knm",
     .llvm_name = "knm",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2421,14 +2421,14 @@ pub const cpu_knm = Cpu{
 pub const cpu_lakemont = Cpu{
     .name = "lakemont",
     .llvm_name = "lakemont",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_nehalem = Cpu{
     .name = "nehalem",
     .llvm_name = "nehalem",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -2448,7 +2448,7 @@ pub const cpu_nehalem = Cpu{
 pub const cpu_nocona = Cpu{
     .name = "nocona",
     .llvm_name = "nocona",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -2466,7 +2466,7 @@ pub const cpu_nocona = Cpu{
 pub const cpu_opteron = Cpu{
     .name = "opteron",
     .llvm_name = "opteron",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -2486,7 +2486,7 @@ pub const cpu_opteron = Cpu{
 pub const cpu_opteronSse3 = Cpu{
     .name = "opteron-sse3",
     .llvm_name = "opteron-sse3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnowa3,
         &feature_bit64,
@@ -2507,7 +2507,7 @@ pub const cpu_opteronSse3 = Cpu{
 pub const cpu_penryn = Cpu{
     .name = "penryn",
     .llvm_name = "penryn",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -2527,7 +2527,7 @@ pub const cpu_penryn = Cpu{
 pub const cpu_pentium = Cpu{
     .name = "pentium",
     .llvm_name = "pentium",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
         &feature_slowUnalignedMem16,
         &feature_x87,
@@ -2537,7 +2537,7 @@ pub const cpu_pentium = Cpu{
 pub const cpu_pentiumM = Cpu{
     .name = "pentium-m",
     .llvm_name = "pentium-m",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2553,7 +2553,7 @@ pub const cpu_pentiumM = Cpu{
 pub const cpu_pentiumMmx = Cpu{
     .name = "pentium-mmx",
     .llvm_name = "pentium-mmx",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cx8,
         &feature_mmx,
         &feature_slowUnalignedMem16,
@@ -2564,7 +2564,7 @@ pub const cpu_pentiumMmx = Cpu{
 pub const cpu_pentium2 = Cpu{
     .name = "pentium2",
     .llvm_name = "pentium2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2578,7 +2578,7 @@ pub const cpu_pentium2 = Cpu{
 pub const cpu_pentium3 = Cpu{
     .name = "pentium3",
     .llvm_name = "pentium3",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2593,7 +2593,7 @@ pub const cpu_pentium3 = Cpu{
 pub const cpu_pentium3m = Cpu{
     .name = "pentium3m",
     .llvm_name = "pentium3m",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2608,7 +2608,7 @@ pub const cpu_pentium3m = Cpu{
 pub const cpu_pentium4 = Cpu{
     .name = "pentium4",
     .llvm_name = "pentium4",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2624,7 +2624,7 @@ pub const cpu_pentium4 = Cpu{
 pub const cpu_pentium4m = Cpu{
     .name = "pentium4m",
     .llvm_name = "pentium4m",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2640,7 +2640,7 @@ pub const cpu_pentium4m = Cpu{
 pub const cpu_pentiumpro = Cpu{
     .name = "pentiumpro",
     .llvm_name = "pentiumpro",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_nopl,
@@ -2652,7 +2652,7 @@ pub const cpu_pentiumpro = Cpu{
 pub const cpu_prescott = Cpu{
     .name = "prescott",
     .llvm_name = "prescott",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -2668,7 +2668,7 @@ pub const cpu_prescott = Cpu{
 pub const cpu_sandybridge = Cpu{
     .name = "sandybridge",
     .llvm_name = "sandybridge",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_avx,
@@ -2699,7 +2699,7 @@ pub const cpu_sandybridge = Cpu{
 pub const cpu_silvermont = Cpu{
     .name = "silvermont",
     .llvm_name = "silvermont",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -2729,7 +2729,7 @@ pub const cpu_silvermont = Cpu{
 pub const cpu_skx = Cpu{
     .name = "skx",
     .llvm_name = "skx",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2788,7 +2788,7 @@ pub const cpu_skx = Cpu{
 pub const cpu_skylake = Cpu{
     .name = "skylake",
     .llvm_name = "skylake",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2840,7 +2840,7 @@ pub const cpu_skylake = Cpu{
 pub const cpu_skylakeAvx512 = Cpu{
     .name = "skylake-avx512",
     .llvm_name = "skylake-avx512",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -2899,7 +2899,7 @@ pub const cpu_skylakeAvx512 = Cpu{
 pub const cpu_slm = Cpu{
     .name = "slm",
     .llvm_name = "slm",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -2929,7 +2929,7 @@ pub const cpu_slm = Cpu{
 pub const cpu_tigerlake = Cpu{
     .name = "tigerlake",
     .llvm_name = "tigerlake",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -3003,7 +3003,7 @@ pub const cpu_tigerlake = Cpu{
 pub const cpu_tremont = Cpu{
     .name = "tremont",
     .llvm_name = "tremont",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_sse,
         &feature_aes,
@@ -3047,7 +3047,7 @@ pub const cpu_tremont = Cpu{
 pub const cpu_westmere = Cpu{
     .name = "westmere",
     .llvm_name = "westmere",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -3068,7 +3068,7 @@ pub const cpu_westmere = Cpu{
 pub const cpu_winchipC6 = Cpu{
     .name = "winchip-c6",
     .llvm_name = "winchip-c6",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_slowUnalignedMem16,
         &feature_x87,
@@ -3078,7 +3078,7 @@ pub const cpu_winchipC6 = Cpu{
 pub const cpu_winchip2 = Cpu{
     .name = "winchip2",
     .llvm_name = "winchip2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_mmx,
         &feature_dnow3,
         &feature_slowUnalignedMem16,
@@ -3089,7 +3089,7 @@ pub const cpu_winchip2 = Cpu{
 pub const cpu_x8664 = Cpu{
     .name = "x86-64",
     .llvm_name = "x86-64",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_cmov,
         &feature_cx8,
@@ -3108,7 +3108,7 @@ pub const cpu_x8664 = Cpu{
 pub const cpu_yonah = Cpu{
     .name = "yonah",
     .llvm_name = "yonah",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_cmov,
         &feature_cx8,
         &feature_fxsr,
@@ -3124,7 +3124,7 @@ pub const cpu_yonah = Cpu{
 pub const cpu_znver1 = Cpu{
     .name = "znver1",
     .llvm_name = "znver1",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
@@ -3171,7 +3171,7 @@ pub const cpu_znver1 = Cpu{
 pub const cpu_znver2 = Cpu{
     .name = "znver2",
     .llvm_name = "znver2",
-    .subfeatures = &[_]*const Feature {
+    .dependencies = &[_]*const Feature {
         &feature_bit64,
         &feature_adx,
         &feature_sse,
diff --git a/src/main.cpp b/src/main.cpp
index f061b13414ec1ee2ca83f2ba246c1222a658fe59..32efb9f0202566cf56e2a31a3a118883efc0bab2 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -135,7 +135,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "Targets Options:\n"
         "  --list-features [arch]       list available features for the given architecture\n"
         "  --list-cpus [arch]           list available cpus for the given architecture\n"
-        "  --show-subfeatures           list subfeatures for each entry from --list-features or --list-cpus\n"
+        "  --show-dependencies          list feature dependencies for each entry from --list-{features,cpus}\n"
     , arg0);
     return return_code;
 }
@@ -540,7 +540,7 @@ int main(int argc, char **argv) {
 
     const char *targets_list_features_arch = nullptr;
     const char *targets_list_cpus_arch = nullptr;
-    bool targets_show_subfeatures = false;
+    bool targets_show_dependencies = false;
 
     ZigList<const char *> llvm_argv = {0};
     llvm_argv.append("zig (LLVM option parsing)");
@@ -792,8 +792,8 @@ int main(int argc, char **argv) {
                 cur_pkg = cur_pkg->parent;
             } else if (strcmp(arg, "-ffunction-sections") == 0) {
                 function_sections = true;
-            } else if (strcmp(arg, "--show-subfeatures") == 0) {
-                targets_show_subfeatures = true;
+            } else if (strcmp(arg, "--show-dependencies") == 0) {
+                targets_show_dependencies = true;
             } else if (i + 1 >= argc) {
                 fprintf(stderr, "Expected another argument after %s\n", arg);
                 return print_error_usage(arg0);
@@ -1448,13 +1448,13 @@ int main(int argc, char **argv) {
             stage2_list_features_for_arch(
                 targets_list_features_arch,
                 strlen(targets_list_features_arch),
-                targets_show_subfeatures);
+                targets_show_dependencies);
             return 0;
         } else if (targets_list_cpus_arch != nullptr) {
             stage2_list_cpus_for_arch(
                 targets_list_cpus_arch,
                 strlen(targets_list_cpus_arch),
-                targets_show_subfeatures);
+                targets_show_dependencies);
             return 0;
         } else {
             return print_target_list(stdout);
-- 
2.54.0


From 79a2747de490ca2bb1603fd1ce55637fb5278671 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 8 Jan 2020 20:27:05 -0500
Subject: [PATCH 045/116] Add llvm_name to feature defs

---
 lib/std/target/aarch64.zig |  537 ++++---
 lib/std/target/amdgpu.zig  | 1037 +++++++------
 lib/std/target/arm.zig     |  687 +++++----
 lib/std/target/avr.zig     | 2806 ++++++++++++++++++------------------
 lib/std/target/bpf.zig     |    3 +
 lib/std/target/hexagon.zig |   10 +
 lib/std/target/mips.zig    |  242 ++--
 lib/std/target/msp430.zig  |    4 +
 lib/std/target/nvptx.zig   |   25 +
 lib/std/target/powerpc.zig |   55 +-
 lib/std/target/riscv.zig   |    9 +
 lib/std/target/sparc.zig   |   12 +
 lib/std/target/systemz.zig |   35 +
 lib/std/target/wasm.zig    |   10 +
 lib/std/target/x86.zig     |  126 ++
 15 files changed, 3135 insertions(+), 2463 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 85ef813dea6e5e7cebecd84122fab6d61d94f188..404a55e7a5543b747d52e34fd1469d1639c38562 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_aes = Feature{
     .name = "aes",
+    .llvm_name = "aes",
     .description = "Enable AES support",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -11,6 +12,7 @@ pub const feature_aes = Feature{
 
 pub const feature_am = Feature{
     .name = "am",
+    .llvm_name = "am",
     .description = "Enable v8.4-A Activity Monitors extension",
     .dependencies = &[_]*const Feature {
     },
@@ -18,6 +20,7 @@ pub const feature_am = Feature{
 
 pub const feature_aggressiveFma = Feature{
     .name = "aggressive-fma",
+    .llvm_name = "aggressive-fma",
     .description = "Enable Aggressive FMA for floating-point.",
     .dependencies = &[_]*const Feature {
     },
@@ -25,6 +28,7 @@ pub const feature_aggressiveFma = Feature{
 
 pub const feature_altnzcv = Feature{
     .name = "altnzcv",
+    .llvm_name = "altnzcv",
     .description = "Enable alternative NZCV format for floating point comparisons",
     .dependencies = &[_]*const Feature {
     },
@@ -32,6 +36,7 @@ pub const feature_altnzcv = Feature{
 
 pub const feature_alternateSextloadCvtF32Pattern = Feature{
     .name = "alternate-sextload-cvt-f32-pattern",
+    .llvm_name = "alternate-sextload-cvt-f32-pattern",
     .description = "Use alternative pattern for sextload convert to f32",
     .dependencies = &[_]*const Feature {
     },
@@ -39,6 +44,7 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{
 
 pub const feature_arithBccFusion = Feature{
     .name = "arith-bcc-fusion",
+    .llvm_name = "arith-bcc-fusion",
     .description = "CPU fuses arithmetic+bcc operations",
     .dependencies = &[_]*const Feature {
     },
@@ -46,6 +52,7 @@ pub const feature_arithBccFusion = Feature{
 
 pub const feature_arithCbzFusion = Feature{
     .name = "arith-cbz-fusion",
+    .llvm_name = "arith-cbz-fusion",
     .description = "CPU fuses arithmetic + cbz/cbnz operations",
     .dependencies = &[_]*const Feature {
     },
@@ -53,6 +60,7 @@ pub const feature_arithCbzFusion = Feature{
 
 pub const feature_balanceFpOps = Feature{
     .name = "balance-fp-ops",
+    .llvm_name = "balance-fp-ops",
     .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
     .dependencies = &[_]*const Feature {
     },
@@ -60,6 +68,7 @@ pub const feature_balanceFpOps = Feature{
 
 pub const feature_bti = Feature{
     .name = "bti",
+    .llvm_name = "bti",
     .description = "Enable Branch Target Identification",
     .dependencies = &[_]*const Feature {
     },
@@ -67,6 +76,7 @@ pub const feature_bti = Feature{
 
 pub const feature_ccidx = Feature{
     .name = "ccidx",
+    .llvm_name = "ccidx",
     .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
     .dependencies = &[_]*const Feature {
     },
@@ -74,6 +84,7 @@ pub const feature_ccidx = Feature{
 
 pub const feature_ccpp = Feature{
     .name = "ccpp",
+    .llvm_name = "ccpp",
     .description = "Enable v8.2 data Cache Clean to Point of Persistence",
     .dependencies = &[_]*const Feature {
     },
@@ -81,6 +92,7 @@ pub const feature_ccpp = Feature{
 
 pub const feature_crc = Feature{
     .name = "crc",
+    .llvm_name = "crc",
     .description = "Enable ARMv8 CRC-32 checksum instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -88,6 +100,7 @@ pub const feature_crc = Feature{
 
 pub const feature_ccdp = Feature{
     .name = "ccdp",
+    .llvm_name = "ccdp",
     .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
     .dependencies = &[_]*const Feature {
     },
@@ -95,6 +108,7 @@ pub const feature_ccdp = Feature{
 
 pub const feature_callSavedX8 = Feature{
     .name = "call-saved-x8",
+    .llvm_name = "call-saved-x8",
     .description = "Make X8 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -102,6 +116,7 @@ pub const feature_callSavedX8 = Feature{
 
 pub const feature_callSavedX9 = Feature{
     .name = "call-saved-x9",
+    .llvm_name = "call-saved-x9",
     .description = "Make X9 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -109,6 +124,7 @@ pub const feature_callSavedX9 = Feature{
 
 pub const feature_callSavedX10 = Feature{
     .name = "call-saved-x10",
+    .llvm_name = "call-saved-x10",
     .description = "Make X10 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -116,6 +132,7 @@ pub const feature_callSavedX10 = Feature{
 
 pub const feature_callSavedX11 = Feature{
     .name = "call-saved-x11",
+    .llvm_name = "call-saved-x11",
     .description = "Make X11 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -123,6 +140,7 @@ pub const feature_callSavedX11 = Feature{
 
 pub const feature_callSavedX12 = Feature{
     .name = "call-saved-x12",
+    .llvm_name = "call-saved-x12",
     .description = "Make X12 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -130,6 +148,7 @@ pub const feature_callSavedX12 = Feature{
 
 pub const feature_callSavedX13 = Feature{
     .name = "call-saved-x13",
+    .llvm_name = "call-saved-x13",
     .description = "Make X13 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -137,6 +156,7 @@ pub const feature_callSavedX13 = Feature{
 
 pub const feature_callSavedX14 = Feature{
     .name = "call-saved-x14",
+    .llvm_name = "call-saved-x14",
     .description = "Make X14 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -144,6 +164,7 @@ pub const feature_callSavedX14 = Feature{
 
 pub const feature_callSavedX15 = Feature{
     .name = "call-saved-x15",
+    .llvm_name = "call-saved-x15",
     .description = "Make X15 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -151,6 +172,7 @@ pub const feature_callSavedX15 = Feature{
 
 pub const feature_callSavedX18 = Feature{
     .name = "call-saved-x18",
+    .llvm_name = "call-saved-x18",
     .description = "Make X18 callee saved.",
     .dependencies = &[_]*const Feature {
     },
@@ -158,6 +180,7 @@ pub const feature_callSavedX18 = Feature{
 
 pub const feature_complxnum = Feature{
     .name = "complxnum",
+    .llvm_name = "complxnum",
     .description = "Enable v8.3-A Floating-point complex number support",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -166,6 +189,7 @@ pub const feature_complxnum = Feature{
 
 pub const feature_crypto = Feature{
     .name = "crypto",
+    .llvm_name = "crypto",
     .description = "Enable cryptographic instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -174,6 +198,7 @@ pub const feature_crypto = Feature{
 
 pub const feature_customCheapAsMove = Feature{
     .name = "custom-cheap-as-move",
+    .llvm_name = "custom-cheap-as-move",
     .description = "Use custom handling of cheap instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -181,6 +206,7 @@ pub const feature_customCheapAsMove = Feature{
 
 pub const feature_dit = Feature{
     .name = "dit",
+    .llvm_name = "dit",
     .description = "Enable v8.4-A Data Independent Timing instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -188,6 +214,7 @@ pub const feature_dit = Feature{
 
 pub const feature_disableLatencySchedHeuristic = Feature{
     .name = "disable-latency-sched-heuristic",
+    .llvm_name = "disable-latency-sched-heuristic",
     .description = "Disable latency scheduling heuristic",
     .dependencies = &[_]*const Feature {
     },
@@ -195,6 +222,7 @@ pub const feature_disableLatencySchedHeuristic = Feature{
 
 pub const feature_dotprod = Feature{
     .name = "dotprod",
+    .llvm_name = "dotprod",
     .description = "Enable dot product support",
     .dependencies = &[_]*const Feature {
     },
@@ -202,6 +230,7 @@ pub const feature_dotprod = Feature{
 
 pub const feature_ete = Feature{
     .name = "ete",
+    .llvm_name = "ete",
     .description = "Enable Embedded Trace Extension",
     .dependencies = &[_]*const Feature {
         &feature_trbe,
@@ -210,6 +239,7 @@ pub const feature_ete = Feature{
 
 pub const feature_exynosCheapAsMove = Feature{
     .name = "exynos-cheap-as-move",
+    .llvm_name = "exynos-cheap-as-move",
     .description = "Use Exynos specific handling of cheap instructions",
     .dependencies = &[_]*const Feature {
         &feature_customCheapAsMove,
@@ -218,6 +248,7 @@ pub const feature_exynosCheapAsMove = Feature{
 
 pub const feature_fmi = Feature{
     .name = "fmi",
+    .llvm_name = "fmi",
     .description = "Enable v8.4-A Flag Manipulation Instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -225,6 +256,7 @@ pub const feature_fmi = Feature{
 
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
+    .llvm_name = "fp16fml",
     .description = "Enable FP16 FML instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -233,6 +265,7 @@ pub const feature_fp16fml = Feature{
 
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
+    .llvm_name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .dependencies = &[_]*const Feature {
     },
@@ -240,6 +273,7 @@ pub const feature_fpArmv8 = Feature{
 
 pub const feature_fptoint = Feature{
     .name = "fptoint",
+    .llvm_name = "fptoint",
     .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
     .dependencies = &[_]*const Feature {
     },
@@ -247,6 +281,7 @@ pub const feature_fptoint = Feature{
 
 pub const feature_force32bitJumpTables = Feature{
     .name = "force-32bit-jump-tables",
+    .llvm_name = "force-32bit-jump-tables",
     .description = "Force jump table entries to be 32-bits wide except at MinSize",
     .dependencies = &[_]*const Feature {
     },
@@ -254,6 +289,7 @@ pub const feature_force32bitJumpTables = Feature{
 
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
+    .llvm_name = "fullfp16",
     .description = "Full FP16",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -262,6 +298,7 @@ pub const feature_fullfp16 = Feature{
 
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
+    .llvm_name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
     .dependencies = &[_]*const Feature {
     },
@@ -269,6 +306,7 @@ pub const feature_fuseAes = Feature{
 
 pub const feature_fuseAddress = Feature{
     .name = "fuse-address",
+    .llvm_name = "fuse-address",
     .description = "CPU fuses address generation and memory operations",
     .dependencies = &[_]*const Feature {
     },
@@ -276,6 +314,7 @@ pub const feature_fuseAddress = Feature{
 
 pub const feature_fuseArithLogic = Feature{
     .name = "fuse-arith-logic",
+    .llvm_name = "fuse-arith-logic",
     .description = "CPU fuses arithmetic and logic operations",
     .dependencies = &[_]*const Feature {
     },
@@ -283,6 +322,7 @@ pub const feature_fuseArithLogic = Feature{
 
 pub const feature_fuseCsel = Feature{
     .name = "fuse-csel",
+    .llvm_name = "fuse-csel",
     .description = "CPU fuses conditional select operations",
     .dependencies = &[_]*const Feature {
     },
@@ -290,6 +330,7 @@ pub const feature_fuseCsel = Feature{
 
 pub const feature_fuseCryptoEor = Feature{
     .name = "fuse-crypto-eor",
+    .llvm_name = "fuse-crypto-eor",
     .description = "CPU fuses AES/PMULL and EOR operations",
     .dependencies = &[_]*const Feature {
     },
@@ -297,6 +338,7 @@ pub const feature_fuseCryptoEor = Feature{
 
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
+    .llvm_name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
     .dependencies = &[_]*const Feature {
     },
@@ -304,6 +346,7 @@ pub const feature_fuseLiterals = Feature{
 
 pub const feature_jsconv = Feature{
     .name = "jsconv",
+    .llvm_name = "jsconv",
     .description = "Enable v8.3-A JavaScript FP conversion enchancement",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -312,6 +355,7 @@ pub const feature_jsconv = Feature{
 
 pub const feature_lor = Feature{
     .name = "lor",
+    .llvm_name = "lor",
     .description = "Enables ARM v8.1 Limited Ordering Regions extension",
     .dependencies = &[_]*const Feature {
     },
@@ -319,6 +363,7 @@ pub const feature_lor = Feature{
 
 pub const feature_lse = Feature{
     .name = "lse",
+    .llvm_name = "lse",
     .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -326,6 +371,7 @@ pub const feature_lse = Feature{
 
 pub const feature_lslFast = Feature{
     .name = "lsl-fast",
+    .llvm_name = "lsl-fast",
     .description = "CPU has a fastpath logical shift of up to 3 places",
     .dependencies = &[_]*const Feature {
     },
@@ -333,6 +379,7 @@ pub const feature_lslFast = Feature{
 
 pub const feature_mpam = Feature{
     .name = "mpam",
+    .llvm_name = "mpam",
     .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
     .dependencies = &[_]*const Feature {
     },
@@ -340,6 +387,7 @@ pub const feature_mpam = Feature{
 
 pub const feature_mte = Feature{
     .name = "mte",
+    .llvm_name = "mte",
     .description = "Enable Memory Tagging Extension",
     .dependencies = &[_]*const Feature {
     },
@@ -347,6 +395,7 @@ pub const feature_mte = Feature{
 
 pub const feature_neon = Feature{
     .name = "neon",
+    .llvm_name = "neon",
     .description = "Enable Advanced SIMD instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -355,6 +404,7 @@ pub const feature_neon = Feature{
 
 pub const feature_nv = Feature{
     .name = "nv",
+    .llvm_name = "nv",
     .description = "Enable v8.4-A Nested Virtualization Enchancement",
     .dependencies = &[_]*const Feature {
     },
@@ -362,6 +412,7 @@ pub const feature_nv = Feature{
 
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
+    .llvm_name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
     .dependencies = &[_]*const Feature {
     },
@@ -369,6 +420,7 @@ pub const feature_noNegImmediates = Feature{
 
 pub const feature_pa = Feature{
     .name = "pa",
+    .llvm_name = "pa",
     .description = "Enable v8.3-A Pointer Authentication enchancement",
     .dependencies = &[_]*const Feature {
     },
@@ -376,6 +428,7 @@ pub const feature_pa = Feature{
 
 pub const feature_pan = Feature{
     .name = "pan",
+    .llvm_name = "pan",
     .description = "Enables ARM v8.1 Privileged Access-Never extension",
     .dependencies = &[_]*const Feature {
     },
@@ -383,6 +436,7 @@ pub const feature_pan = Feature{
 
 pub const feature_panRwv = Feature{
     .name = "pan-rwv",
+    .llvm_name = "pan-rwv",
     .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
     .dependencies = &[_]*const Feature {
         &feature_pan,
@@ -391,6 +445,7 @@ pub const feature_panRwv = Feature{
 
 pub const feature_perfmon = Feature{
     .name = "perfmon",
+    .llvm_name = "perfmon",
     .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
     .dependencies = &[_]*const Feature {
     },
@@ -398,6 +453,7 @@ pub const feature_perfmon = Feature{
 
 pub const feature_usePostraScheduler = Feature{
     .name = "use-postra-scheduler",
+    .llvm_name = "use-postra-scheduler",
     .description = "Schedule again after register allocation",
     .dependencies = &[_]*const Feature {
     },
@@ -405,6 +461,7 @@ pub const feature_usePostraScheduler = Feature{
 
 pub const feature_predres = Feature{
     .name = "predres",
+    .llvm_name = "predres",
     .description = "Enable v8.5a execution and data prediction invalidation instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -412,6 +469,7 @@ pub const feature_predres = Feature{
 
 pub const feature_predictableSelectExpensive = Feature{
     .name = "predictable-select-expensive",
+    .llvm_name = "predictable-select-expensive",
     .description = "Prefer likely predicted branches over selects",
     .dependencies = &[_]*const Feature {
     },
@@ -419,6 +477,7 @@ pub const feature_predictableSelectExpensive = Feature{
 
 pub const feature_uaops = Feature{
     .name = "uaops",
+    .llvm_name = "uaops",
     .description = "Enable v8.2 UAO PState",
     .dependencies = &[_]*const Feature {
     },
@@ -426,6 +485,7 @@ pub const feature_uaops = Feature{
 
 pub const feature_ras = Feature{
     .name = "ras",
+    .llvm_name = "ras",
     .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -433,6 +493,7 @@ pub const feature_ras = Feature{
 
 pub const feature_rasv8_4 = Feature{
     .name = "rasv8_4",
+    .llvm_name = "rasv8_4",
     .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
     .dependencies = &[_]*const Feature {
         &feature_ras,
@@ -441,6 +502,7 @@ pub const feature_rasv8_4 = Feature{
 
 pub const feature_rcpc = Feature{
     .name = "rcpc",
+    .llvm_name = "rcpc",
     .description = "Enable support for RCPC extension",
     .dependencies = &[_]*const Feature {
     },
@@ -448,6 +510,7 @@ pub const feature_rcpc = Feature{
 
 pub const feature_rcpcImmo = Feature{
     .name = "rcpc-immo",
+    .llvm_name = "rcpc-immo",
     .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
     .dependencies = &[_]*const Feature {
         &feature_rcpc,
@@ -456,6 +519,7 @@ pub const feature_rcpcImmo = Feature{
 
 pub const feature_rdm = Feature{
     .name = "rdm",
+    .llvm_name = "rdm",
     .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -463,6 +527,7 @@ pub const feature_rdm = Feature{
 
 pub const feature_rand = Feature{
     .name = "rand",
+    .llvm_name = "rand",
     .description = "Enable Random Number generation instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -470,6 +535,7 @@ pub const feature_rand = Feature{
 
 pub const feature_reserveX1 = Feature{
     .name = "reserve-x1",
+    .llvm_name = "reserve-x1",
     .description = "Reserve X1, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -477,6 +543,7 @@ pub const feature_reserveX1 = Feature{
 
 pub const feature_reserveX2 = Feature{
     .name = "reserve-x2",
+    .llvm_name = "reserve-x2",
     .description = "Reserve X2, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -484,6 +551,7 @@ pub const feature_reserveX2 = Feature{
 
 pub const feature_reserveX3 = Feature{
     .name = "reserve-x3",
+    .llvm_name = "reserve-x3",
     .description = "Reserve X3, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -491,6 +559,7 @@ pub const feature_reserveX3 = Feature{
 
 pub const feature_reserveX4 = Feature{
     .name = "reserve-x4",
+    .llvm_name = "reserve-x4",
     .description = "Reserve X4, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -498,6 +567,7 @@ pub const feature_reserveX4 = Feature{
 
 pub const feature_reserveX5 = Feature{
     .name = "reserve-x5",
+    .llvm_name = "reserve-x5",
     .description = "Reserve X5, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -505,6 +575,7 @@ pub const feature_reserveX5 = Feature{
 
 pub const feature_reserveX6 = Feature{
     .name = "reserve-x6",
+    .llvm_name = "reserve-x6",
     .description = "Reserve X6, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -512,6 +583,7 @@ pub const feature_reserveX6 = Feature{
 
 pub const feature_reserveX7 = Feature{
     .name = "reserve-x7",
+    .llvm_name = "reserve-x7",
     .description = "Reserve X7, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -519,6 +591,7 @@ pub const feature_reserveX7 = Feature{
 
 pub const feature_reserveX9 = Feature{
     .name = "reserve-x9",
+    .llvm_name = "reserve-x9",
     .description = "Reserve X9, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -526,6 +599,7 @@ pub const feature_reserveX9 = Feature{
 
 pub const feature_reserveX10 = Feature{
     .name = "reserve-x10",
+    .llvm_name = "reserve-x10",
     .description = "Reserve X10, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -533,6 +607,7 @@ pub const feature_reserveX10 = Feature{
 
 pub const feature_reserveX11 = Feature{
     .name = "reserve-x11",
+    .llvm_name = "reserve-x11",
     .description = "Reserve X11, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -540,6 +615,7 @@ pub const feature_reserveX11 = Feature{
 
 pub const feature_reserveX12 = Feature{
     .name = "reserve-x12",
+    .llvm_name = "reserve-x12",
     .description = "Reserve X12, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -547,6 +623,7 @@ pub const feature_reserveX12 = Feature{
 
 pub const feature_reserveX13 = Feature{
     .name = "reserve-x13",
+    .llvm_name = "reserve-x13",
     .description = "Reserve X13, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -554,6 +631,7 @@ pub const feature_reserveX13 = Feature{
 
 pub const feature_reserveX14 = Feature{
     .name = "reserve-x14",
+    .llvm_name = "reserve-x14",
     .description = "Reserve X14, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -561,6 +639,7 @@ pub const feature_reserveX14 = Feature{
 
 pub const feature_reserveX15 = Feature{
     .name = "reserve-x15",
+    .llvm_name = "reserve-x15",
     .description = "Reserve X15, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -568,6 +647,7 @@ pub const feature_reserveX15 = Feature{
 
 pub const feature_reserveX18 = Feature{
     .name = "reserve-x18",
+    .llvm_name = "reserve-x18",
     .description = "Reserve X18, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -575,6 +655,7 @@ pub const feature_reserveX18 = Feature{
 
 pub const feature_reserveX20 = Feature{
     .name = "reserve-x20",
+    .llvm_name = "reserve-x20",
     .description = "Reserve X20, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -582,6 +663,7 @@ pub const feature_reserveX20 = Feature{
 
 pub const feature_reserveX21 = Feature{
     .name = "reserve-x21",
+    .llvm_name = "reserve-x21",
     .description = "Reserve X21, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -589,6 +671,7 @@ pub const feature_reserveX21 = Feature{
 
 pub const feature_reserveX22 = Feature{
     .name = "reserve-x22",
+    .llvm_name = "reserve-x22",
     .description = "Reserve X22, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -596,6 +679,7 @@ pub const feature_reserveX22 = Feature{
 
 pub const feature_reserveX23 = Feature{
     .name = "reserve-x23",
+    .llvm_name = "reserve-x23",
     .description = "Reserve X23, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -603,6 +687,7 @@ pub const feature_reserveX23 = Feature{
 
 pub const feature_reserveX24 = Feature{
     .name = "reserve-x24",
+    .llvm_name = "reserve-x24",
     .description = "Reserve X24, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -610,6 +695,7 @@ pub const feature_reserveX24 = Feature{
 
 pub const feature_reserveX25 = Feature{
     .name = "reserve-x25",
+    .llvm_name = "reserve-x25",
     .description = "Reserve X25, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -617,6 +703,7 @@ pub const feature_reserveX25 = Feature{
 
 pub const feature_reserveX26 = Feature{
     .name = "reserve-x26",
+    .llvm_name = "reserve-x26",
     .description = "Reserve X26, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -624,6 +711,7 @@ pub const feature_reserveX26 = Feature{
 
 pub const feature_reserveX27 = Feature{
     .name = "reserve-x27",
+    .llvm_name = "reserve-x27",
     .description = "Reserve X27, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -631,6 +719,7 @@ pub const feature_reserveX27 = Feature{
 
 pub const feature_reserveX28 = Feature{
     .name = "reserve-x28",
+    .llvm_name = "reserve-x28",
     .description = "Reserve X28, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -638,6 +727,7 @@ pub const feature_reserveX28 = Feature{
 
 pub const feature_sb = Feature{
     .name = "sb",
+    .llvm_name = "sb",
     .description = "Enable v8.5 Speculation Barrier",
     .dependencies = &[_]*const Feature {
     },
@@ -645,6 +735,7 @@ pub const feature_sb = Feature{
 
 pub const feature_sel2 = Feature{
     .name = "sel2",
+    .llvm_name = "sel2",
     .description = "Enable v8.4-A Secure Exception Level 2 extension",
     .dependencies = &[_]*const Feature {
     },
@@ -652,6 +743,7 @@ pub const feature_sel2 = Feature{
 
 pub const feature_sha2 = Feature{
     .name = "sha2",
+    .llvm_name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -660,6 +752,7 @@ pub const feature_sha2 = Feature{
 
 pub const feature_sha3 = Feature{
     .name = "sha3",
+    .llvm_name = "sha3",
     .description = "Enable SHA512 and SHA3 support",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -668,6 +761,7 @@ pub const feature_sha3 = Feature{
 
 pub const feature_sm4 = Feature{
     .name = "sm4",
+    .llvm_name = "sm4",
     .description = "Enable SM3 and SM4 support",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -676,6 +770,7 @@ pub const feature_sm4 = Feature{
 
 pub const feature_spe = Feature{
     .name = "spe",
+    .llvm_name = "spe",
     .description = "Enable Statistical Profiling extension",
     .dependencies = &[_]*const Feature {
     },
@@ -683,6 +778,7 @@ pub const feature_spe = Feature{
 
 pub const feature_ssbs = Feature{
     .name = "ssbs",
+    .llvm_name = "ssbs",
     .description = "Enable Speculative Store Bypass Safe bit",
     .dependencies = &[_]*const Feature {
     },
@@ -690,6 +786,7 @@ pub const feature_ssbs = Feature{
 
 pub const feature_sve = Feature{
     .name = "sve",
+    .llvm_name = "sve",
     .description = "Enable Scalable Vector Extension (SVE) instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -697,6 +794,7 @@ pub const feature_sve = Feature{
 
 pub const feature_sve2 = Feature{
     .name = "sve2",
+    .llvm_name = "sve2",
     .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
     .dependencies = &[_]*const Feature {
         &feature_sve,
@@ -705,6 +803,7 @@ pub const feature_sve2 = Feature{
 
 pub const feature_sve2Aes = Feature{
     .name = "sve2-aes",
+    .llvm_name = "sve2-aes",
     .description = "Enable AES SVE2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -714,6 +813,7 @@ pub const feature_sve2Aes = Feature{
 
 pub const feature_sve2Bitperm = Feature{
     .name = "sve2-bitperm",
+    .llvm_name = "sve2-bitperm",
     .description = "Enable bit permutation SVE2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sve,
@@ -722,6 +822,7 @@ pub const feature_sve2Bitperm = Feature{
 
 pub const feature_sve2Sha3 = Feature{
     .name = "sve2-sha3",
+    .llvm_name = "sve2-sha3",
     .description = "Enable SHA3 SVE2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -731,6 +832,7 @@ pub const feature_sve2Sha3 = Feature{
 
 pub const feature_sve2Sm4 = Feature{
     .name = "sve2-sm4",
+    .llvm_name = "sve2-sm4",
     .description = "Enable SM4 SVE2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
@@ -740,6 +842,7 @@ pub const feature_sve2Sm4 = Feature{
 
 pub const feature_slowMisaligned128store = Feature{
     .name = "slow-misaligned-128store",
+    .llvm_name = "slow-misaligned-128store",
     .description = "Misaligned 128 bit stores are slow",
     .dependencies = &[_]*const Feature {
     },
@@ -747,6 +850,7 @@ pub const feature_slowMisaligned128store = Feature{
 
 pub const feature_slowPaired128 = Feature{
     .name = "slow-paired-128",
+    .llvm_name = "slow-paired-128",
     .description = "Paired 128 bit loads and stores are slow",
     .dependencies = &[_]*const Feature {
     },
@@ -754,6 +858,7 @@ pub const feature_slowPaired128 = Feature{
 
 pub const feature_slowStrqroStore = Feature{
     .name = "slow-strqro-store",
+    .llvm_name = "slow-strqro-store",
     .description = "STR of Q register with register offset is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -761,6 +866,7 @@ pub const feature_slowStrqroStore = Feature{
 
 pub const feature_specrestrict = Feature{
     .name = "specrestrict",
+    .llvm_name = "specrestrict",
     .description = "Enable architectural speculation restriction",
     .dependencies = &[_]*const Feature {
     },
@@ -768,6 +874,7 @@ pub const feature_specrestrict = Feature{
 
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
+    .llvm_name = "strict-align",
     .description = "Disallow all unaligned memory access",
     .dependencies = &[_]*const Feature {
     },
@@ -775,6 +882,7 @@ pub const feature_strictAlign = Feature{
 
 pub const feature_tlbRmi = Feature{
     .name = "tlb-rmi",
+    .llvm_name = "tlb-rmi",
     .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -782,6 +890,7 @@ pub const feature_tlbRmi = Feature{
 
 pub const feature_tme = Feature{
     .name = "tme",
+    .llvm_name = "tme",
     .description = "Enable Transactional Memory Extension",
     .dependencies = &[_]*const Feature {
     },
@@ -789,6 +898,7 @@ pub const feature_tme = Feature{
 
 pub const feature_tracev84 = Feature{
     .name = "tracev8.4",
+    .llvm_name = "tracev8.4",
     .description = "Enable v8.4-A Trace extension",
     .dependencies = &[_]*const Feature {
     },
@@ -796,6 +906,7 @@ pub const feature_tracev84 = Feature{
 
 pub const feature_trbe = Feature{
     .name = "trbe",
+    .llvm_name = "trbe",
     .description = "Enable Trace Buffer Extension",
     .dependencies = &[_]*const Feature {
     },
@@ -803,6 +914,7 @@ pub const feature_trbe = Feature{
 
 pub const feature_taggedGlobals = Feature{
     .name = "tagged-globals",
+    .llvm_name = "tagged-globals",
     .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
     .dependencies = &[_]*const Feature {
     },
@@ -810,6 +922,7 @@ pub const feature_taggedGlobals = Feature{
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
+    .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
     },
@@ -817,6 +930,7 @@ pub const feature_useAa = Feature{
 
 pub const feature_tpidrEl1 = Feature{
     .name = "tpidr-el1",
+    .llvm_name = "tpidr-el1",
     .description = "Permit use of TPIDR_EL1 for the TLS base",
     .dependencies = &[_]*const Feature {
     },
@@ -824,6 +938,7 @@ pub const feature_tpidrEl1 = Feature{
 
 pub const feature_tpidrEl2 = Feature{
     .name = "tpidr-el2",
+    .llvm_name = "tpidr-el2",
     .description = "Permit use of TPIDR_EL2 for the TLS base",
     .dependencies = &[_]*const Feature {
     },
@@ -831,6 +946,7 @@ pub const feature_tpidrEl2 = Feature{
 
 pub const feature_tpidrEl3 = Feature{
     .name = "tpidr-el3",
+    .llvm_name = "tpidr-el3",
     .description = "Permit use of TPIDR_EL3 for the TLS base",
     .dependencies = &[_]*const Feature {
     },
@@ -838,6 +954,7 @@ pub const feature_tpidrEl3 = Feature{
 
 pub const feature_useReciprocalSquareRoot = Feature{
     .name = "use-reciprocal-square-root",
+    .llvm_name = "use-reciprocal-square-root",
     .description = "Use the reciprocal square root approximation",
     .dependencies = &[_]*const Feature {
     },
@@ -845,6 +962,7 @@ pub const feature_useReciprocalSquareRoot = Feature{
 
 pub const feature_vh = Feature{
     .name = "vh",
+    .llvm_name = "vh",
     .description = "Enables ARM v8.1 Virtual Host extension",
     .dependencies = &[_]*const Feature {
     },
@@ -852,6 +970,7 @@ pub const feature_vh = Feature{
 
 pub const feature_zcm = Feature{
     .name = "zcm",
+    .llvm_name = "zcm",
     .description = "Has zero-cycle register moves",
     .dependencies = &[_]*const Feature {
     },
@@ -859,6 +978,7 @@ pub const feature_zcm = Feature{
 
 pub const feature_zcz = Feature{
     .name = "zcz",
+    .llvm_name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
     .dependencies = &[_]*const Feature {
         &feature_zczGp,
@@ -868,6 +988,7 @@ pub const feature_zcz = Feature{
 
 pub const feature_zczFp = Feature{
     .name = "zcz-fp",
+    .llvm_name = "zcz-fp",
     .description = "Has zero-cycle zeroing instructions for FP registers",
     .dependencies = &[_]*const Feature {
     },
@@ -875,6 +996,7 @@ pub const feature_zczFp = Feature{
 
 pub const feature_zczFpWorkaround = Feature{
     .name = "zcz-fp-workaround",
+    .llvm_name = "zcz-fp-workaround",
     .description = "The zero-cycle floating-point zeroing instruction has a bug",
     .dependencies = &[_]*const Feature {
     },
@@ -882,6 +1004,7 @@ pub const feature_zczFpWorkaround = Feature{
 
 pub const feature_zczGp = Feature{
     .name = "zcz-gp",
+    .llvm_name = "zcz-gp",
     .description = "Has zero-cycle zeroing instructions for generic registers",
     .dependencies = &[_]*const Feature {
     },
@@ -1017,18 +1140,18 @@ pub const cpu_appleLatest = Cpu{
     .name = "apple-latest",
     .llvm_name = "apple-latest",
     .dependencies = &[_]*const Feature {
-        &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
         &feature_fuseAes,
-        &feature_zczGp,
         &feature_zczFpWorkaround,
-        &feature_disableLatencySchedHeuristic,
         &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_arithBccFusion,
         &feature_arithCbzFusion,
-        &feature_zczFp,
+        &feature_alternateSextloadCvtF32Pattern,
+        &feature_fuseCryptoEor,
+        &feature_disableLatencySchedHeuristic,
         &feature_zcm,
+        &feature_zczFp,
+        &feature_zczGp,
+        &feature_fpArmv8,
+        &feature_arithBccFusion,
     },
 };
 
@@ -1036,9 +1159,9 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
-        &feature_crc,
         &feature_fpArmv8,
         &feature_perfmon,
+        &feature_crc,
     },
 };
 
@@ -1046,13 +1169,13 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
         &feature_fuseAes,
-        &feature_usePostraScheduler,
+        &feature_balanceFpOps,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
-        &feature_balanceFpOps,
+        &feature_customCheapAsMove,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_useAa,
     },
 };
@@ -1061,20 +1184,20 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
         &feature_fuseAes,
-        &feature_lse,
-        &feature_perfmon,
         &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_perfmon,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1082,15 +1205,15 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
         &feature_fuseAes,
-        &feature_usePostraScheduler,
+        &feature_balanceFpOps,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
-        &feature_balanceFpOps,
         &feature_fuseLiterals,
         &feature_predictableSelectExpensive,
+        &feature_customCheapAsMove,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1098,19 +1221,19 @@ pub const cpu_cortexA65 = Cpu{
     .name = "cortex-a65",
     .llvm_name = "cortex-a65",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
         &feature_ras,
-        &feature_lor,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1118,19 +1241,19 @@ pub const cpu_cortexA65ae = Cpu{
     .name = "cortex-a65ae",
     .llvm_name = "cortex-a65ae",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
         &feature_ras,
-        &feature_lor,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1138,10 +1261,10 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
-        &feature_crc,
-        &feature_fuseAes,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_perfmon,
+        &feature_crc,
     },
 };
 
@@ -1149,10 +1272,10 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
-        &feature_crc,
-        &feature_fuseAes,
         &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_perfmon,
+        &feature_crc,
     },
 };
 
@@ -1160,20 +1283,20 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
         &feature_fuseAes,
-        &feature_lse,
-        &feature_perfmon,
         &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_perfmon,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1181,19 +1304,19 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1201,19 +1324,19 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1221,18 +1344,18 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
         &feature_fuseAes,
-        &feature_zczGp,
         &feature_zczFpWorkaround,
-        &feature_disableLatencySchedHeuristic,
         &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_arithBccFusion,
         &feature_arithCbzFusion,
-        &feature_zczFp,
+        &feature_alternateSextloadCvtF32Pattern,
+        &feature_fuseCryptoEor,
+        &feature_disableLatencySchedHeuristic,
         &feature_zcm,
+        &feature_zczFp,
+        &feature_zczGp,
+        &feature_fpArmv8,
+        &feature_arithBccFusion,
     },
 };
 
@@ -1240,17 +1363,17 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
         &feature_fuseAes,
         &feature_force32bitJumpTables,
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_slowMisaligned128store,
+        &feature_crc,
         &feature_useReciprocalSquareRoot,
-        &feature_crc,
         &feature_slowPaired128,
         &feature_zczFp,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1258,16 +1381,16 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
         &feature_fuseAes,
         &feature_force32bitJumpTables,
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_slowMisaligned128store,
         &feature_crc,
         &feature_slowPaired128,
         &feature_zczFp,
+        &feature_slowMisaligned128store,
+        &feature_customCheapAsMove,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1275,19 +1398,19 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
         &feature_fuseAes,
+        &feature_lslFast,
         &feature_force32bitJumpTables,
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_fuseAddress,
-        &feature_fuseCsel,
-        &feature_lslFast,
-        &feature_zczFp,
         &feature_crc,
         &feature_fuseLiterals,
+        &feature_fuseCsel,
+        &feature_zczFp,
         &feature_predictableSelectExpensive,
+        &feature_customCheapAsMove,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
+        &feature_fuseAddress,
     },
 };
 
@@ -1295,31 +1418,31 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_lse,
-        &feature_perfmon,
-        &feature_fuseAddress,
-        &feature_dotprod,
-        &feature_arithCbzFusion,
-        &feature_zczFp,
-        &feature_fuseArithLogic,
-        &feature_ccpp,
         &feature_fuseAes,
-        &feature_fuseCsel,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_force32bitJumpTables,
-        &feature_usePostraScheduler,
         &feature_lslFast,
+        &feature_force32bitJumpTables,
         &feature_crc,
-        &feature_fuseLiterals,
-        &feature_pan,
+        &feature_rdm,
         &feature_fpArmv8,
-        &feature_lor,
-        &feature_ras,
+        &feature_lse,
         &feature_vh,
+        &feature_arithCbzFusion,
+        &feature_fuseLiterals,
+        &feature_ccpp,
+        &feature_lor,
         &feature_arithBccFusion,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_fuseCsel,
+        &feature_zczFp,
         &feature_uaops,
+        &feature_zczGp,
+        &feature_perfmon,
+        &feature_usePostraScheduler,
+        &feature_fuseAddress,
+        &feature_fuseArithLogic,
+        &feature_customCheapAsMove,
+        &feature_pan,
     },
 };
 
@@ -1327,31 +1450,31 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_lse,
-        &feature_perfmon,
-        &feature_fuseAddress,
-        &feature_dotprod,
-        &feature_arithCbzFusion,
-        &feature_zczFp,
-        &feature_fuseArithLogic,
-        &feature_ccpp,
         &feature_fuseAes,
-        &feature_fuseCsel,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_force32bitJumpTables,
-        &feature_usePostraScheduler,
         &feature_lslFast,
+        &feature_force32bitJumpTables,
         &feature_crc,
-        &feature_fuseLiterals,
-        &feature_pan,
+        &feature_rdm,
         &feature_fpArmv8,
-        &feature_lor,
-        &feature_ras,
+        &feature_lse,
         &feature_vh,
+        &feature_arithCbzFusion,
+        &feature_fuseLiterals,
+        &feature_ccpp,
+        &feature_lor,
         &feature_arithBccFusion,
+        &feature_ras,
+        &feature_dotprod,
+        &feature_fuseCsel,
+        &feature_zczFp,
         &feature_uaops,
+        &feature_zczGp,
+        &feature_perfmon,
+        &feature_usePostraScheduler,
+        &feature_fuseAddress,
+        &feature_fuseArithLogic,
+        &feature_customCheapAsMove,
+        &feature_pan,
     },
 };
 
@@ -1359,17 +1482,17 @@ pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
         &feature_lslFast,
-        &feature_zczFp,
+        &feature_perfmon,
         &feature_crc,
         &feature_slowStrqroStore,
+        &feature_rdm,
+        &feature_zczFp,
         &feature_predictableSelectExpensive,
+        &feature_customCheapAsMove,
+        &feature_zczGp,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1391,15 +1514,15 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_zczGp,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
-        &feature_fpArmv8,
         &feature_lslFast,
-        &feature_zczFp,
+        &feature_perfmon,
         &feature_crc,
+        &feature_zczFp,
         &feature_predictableSelectExpensive,
+        &feature_customCheapAsMove,
+        &feature_zczGp,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1407,19 +1530,19 @@ pub const cpu_neoverseE1 = Cpu{
     .name = "neoverse-e1",
     .llvm_name = "neoverse-e1",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1427,20 +1550,20 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_ccpp,
-        &feature_lse,
-        &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
-        &feature_rcpc,
         &feature_dotprod,
-        &feature_ssbs,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
         &feature_spe,
+        &feature_rcpc,
+        &feature_uaops,
+        &feature_ssbs,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
     },
 };
 
@@ -1448,36 +1571,36 @@ pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_lse,
-        &feature_fmi,
-        &feature_perfmon,
-        &feature_sel2,
-        &feature_dotprod,
+        &feature_lslFast,
+        &feature_crc,
+        &feature_rdm,
         &feature_am,
-        &feature_zczFp,
         &feature_mpam,
-        &feature_ccpp,
+        &feature_fmi,
+        &feature_fpArmv8,
+        &feature_lse,
         &feature_dit,
-        &feature_tracev84,
-        &feature_spe,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_usePostraScheduler,
+        &feature_vh,
+        &feature_ccpp,
+        &feature_sel2,
+        &feature_lor,
         &feature_nv,
+        &feature_ras,
         &feature_tlbRmi,
-        &feature_lslFast,
-        &feature_crc,
-        &feature_pan,
-        &feature_ccidx,
-        &feature_fpArmv8,
-        &feature_ras,
-        &feature_lor,
-        &feature_vh,
+        &feature_dotprod,
+        &feature_zczFp,
+        &feature_spe,
         &feature_rcpc,
+        &feature_predictableSelectExpensive,
         &feature_uaops,
+        &feature_zczGp,
+        &feature_perfmon,
+        &feature_usePostraScheduler,
         &feature_pa,
-        &feature_predictableSelectExpensive,
+        &feature_ccidx,
+        &feature_customCheapAsMove,
+        &feature_pan,
+        &feature_tracev84,
     },
 };
 
@@ -1485,11 +1608,11 @@ pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
     .dependencies = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
         &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1497,17 +1620,17 @@ pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
     .dependencies = &[_]*const Feature {
-        &feature_rdm,
-        &feature_lse,
-        &feature_usePostraScheduler,
         &feature_aggressiveFma,
-        &feature_fpArmv8,
-        &feature_lor,
         &feature_vh,
-        &feature_arithBccFusion,
         &feature_crc,
         &feature_pan,
+        &feature_rdm,
         &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_lse,
+        &feature_lor,
+        &feature_usePostraScheduler,
+        &feature_arithBccFusion,
     },
 };
 
@@ -1515,11 +1638,11 @@ pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
     .dependencies = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
         &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1527,11 +1650,11 @@ pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
     .dependencies = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
         &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1539,11 +1662,11 @@ pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
     .dependencies = &[_]*const Feature {
-        &feature_usePostraScheduler,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_crc,
         &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1551,22 +1674,22 @@ pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
     .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_rdm,
-        &feature_ccpp,
         &feature_fuseAes,
-        &feature_lse,
-        &feature_usePostraScheduler,
-        &feature_perfmon,
         &feature_fpArmv8,
-        &feature_lor,
         &feature_ras,
-        &feature_vh,
         &feature_dotprod,
-        &feature_uaops,
+        &feature_vh,
         &feature_crc,
         &feature_pan,
+        &feature_ccpp,
+        &feature_rdm,
         &feature_spe,
+        &feature_uaops,
+        &feature_customCheapAsMove,
+        &feature_perfmon,
+        &feature_lse,
+        &feature_lor,
+        &feature_usePostraScheduler,
     },
 };
 
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index b428615124292f136db61cea067683209212f862..3d4b4950caf8ac5df673b958edde128864b3e4ee 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_BitInsts16 = Feature{
     .name = "16-bit-insts",
+    .llvm_name = "16-bit-insts",
     .description = "Has i16/f16 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_BitInsts16 = Feature{
 
 pub const feature_addNoCarryInsts = Feature{
     .name = "add-no-carry-insts",
+    .llvm_name = "add-no-carry-insts",
     .description = "Have VALU add/sub instructions without carry out",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_addNoCarryInsts = Feature{
 
 pub const feature_apertureRegs = Feature{
     .name = "aperture-regs",
+    .llvm_name = "aperture-regs",
     .description = "Has Memory Aperture Base and Size Registers",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_apertureRegs = Feature{
 
 pub const feature_atomicFaddInsts = Feature{
     .name = "atomic-fadd-insts",
+    .llvm_name = "atomic-fadd-insts",
     .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_atomicFaddInsts = Feature{
 
 pub const feature_autoWaitcntBeforeBarrier = Feature{
     .name = "auto-waitcnt-before-barrier",
+    .llvm_name = "auto-waitcnt-before-barrier",
     .description = "Hardware automatically inserts waitcnt before barrier",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{
 
 pub const feature_ciInsts = Feature{
     .name = "ci-insts",
+    .llvm_name = "ci-insts",
     .description = "Additional instructions for CI+",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_ciInsts = Feature{
 
 pub const feature_codeObjectV3 = Feature{
     .name = "code-object-v3",
+    .llvm_name = "code-object-v3",
     .description = "Generate code object version 3",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_codeObjectV3 = Feature{
 
 pub const feature_cumode = Feature{
     .name = "cumode",
+    .llvm_name = "cumode",
     .description = "Enable CU wavefront execution mode",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_cumode = Feature{
 
 pub const feature_dlInsts = Feature{
     .name = "dl-insts",
+    .llvm_name = "dl-insts",
     .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_dlInsts = Feature{
 
 pub const feature_dpp = Feature{
     .name = "dpp",
+    .llvm_name = "dpp",
     .description = "Support DPP (Data Parallel Primitives) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -73,6 +83,7 @@ pub const feature_dpp = Feature{
 
 pub const feature_dpp8 = Feature{
     .name = "dpp8",
+    .llvm_name = "dpp8",
     .description = "Support DPP8 (Data Parallel Primitives) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -80,6 +91,7 @@ pub const feature_dpp8 = Feature{
 
 pub const feature_noSramEccSupport = Feature{
     .name = "no-sram-ecc-support",
+    .llvm_name = "no-sram-ecc-support",
     .description = "Hardware does not support SRAM ECC",
     .dependencies = &[_]*const Feature {
     },
@@ -87,6 +99,7 @@ pub const feature_noSramEccSupport = Feature{
 
 pub const feature_noXnackSupport = Feature{
     .name = "no-xnack-support",
+    .llvm_name = "no-xnack-support",
     .description = "Hardware does not support XNACK",
     .dependencies = &[_]*const Feature {
     },
@@ -94,6 +107,7 @@ pub const feature_noXnackSupport = Feature{
 
 pub const feature_dot1Insts = Feature{
     .name = "dot1-insts",
+    .llvm_name = "dot1-insts",
     .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -101,6 +115,7 @@ pub const feature_dot1Insts = Feature{
 
 pub const feature_dot2Insts = Feature{
     .name = "dot2-insts",
+    .llvm_name = "dot2-insts",
     .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -108,6 +123,7 @@ pub const feature_dot2Insts = Feature{
 
 pub const feature_dot3Insts = Feature{
     .name = "dot3-insts",
+    .llvm_name = "dot3-insts",
     .description = "Has v_dot8c_i32_i4 instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -115,6 +131,7 @@ pub const feature_dot3Insts = Feature{
 
 pub const feature_dot4Insts = Feature{
     .name = "dot4-insts",
+    .llvm_name = "dot4-insts",
     .description = "Has v_dot2c_i32_i16 instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -122,6 +139,7 @@ pub const feature_dot4Insts = Feature{
 
 pub const feature_dot5Insts = Feature{
     .name = "dot5-insts",
+    .llvm_name = "dot5-insts",
     .description = "Has v_dot2c_f32_f16 instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -129,6 +147,7 @@ pub const feature_dot5Insts = Feature{
 
 pub const feature_dot6Insts = Feature{
     .name = "dot6-insts",
+    .llvm_name = "dot6-insts",
     .description = "Has v_dot4c_i32_i8 instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -136,6 +155,7 @@ pub const feature_dot6Insts = Feature{
 
 pub const feature_DumpCode = Feature{
     .name = "DumpCode",
+    .llvm_name = "DumpCode",
     .description = "Dump MachineInstrs in the CodeEmitter",
     .dependencies = &[_]*const Feature {
     },
@@ -143,6 +163,7 @@ pub const feature_DumpCode = Feature{
 
 pub const feature_dumpcode = Feature{
     .name = "dumpcode",
+    .llvm_name = "dumpcode",
     .description = "Dump MachineInstrs in the CodeEmitter",
     .dependencies = &[_]*const Feature {
     },
@@ -150,6 +171,7 @@ pub const feature_dumpcode = Feature{
 
 pub const feature_enableDs128 = Feature{
     .name = "enable-ds128",
+    .llvm_name = "enable-ds128",
     .description = "Use ds_{read|write}_b128",
     .dependencies = &[_]*const Feature {
     },
@@ -157,6 +179,7 @@ pub const feature_enableDs128 = Feature{
 
 pub const feature_loadStoreOpt = Feature{
     .name = "load-store-opt",
+    .llvm_name = "load-store-opt",
     .description = "Enable SI load/store optimizer pass",
     .dependencies = &[_]*const Feature {
     },
@@ -164,6 +187,7 @@ pub const feature_loadStoreOpt = Feature{
 
 pub const feature_enablePrtStrictNull = Feature{
     .name = "enable-prt-strict-null",
+    .llvm_name = "enable-prt-strict-null",
     .description = "Enable zeroing of result registers for sparse texture fetches",
     .dependencies = &[_]*const Feature {
     },
@@ -171,6 +195,7 @@ pub const feature_enablePrtStrictNull = Feature{
 
 pub const feature_siScheduler = Feature{
     .name = "si-scheduler",
+    .llvm_name = "si-scheduler",
     .description = "Enable SI Machine Scheduler",
     .dependencies = &[_]*const Feature {
     },
@@ -178,6 +203,7 @@ pub const feature_siScheduler = Feature{
 
 pub const feature_unsafeDsOffsetFolding = Feature{
     .name = "unsafe-ds-offset-folding",
+    .llvm_name = "unsafe-ds-offset-folding",
     .description = "Force using DS instruction immediate offsets on SI",
     .dependencies = &[_]*const Feature {
     },
@@ -185,6 +211,7 @@ pub const feature_unsafeDsOffsetFolding = Feature{
 
 pub const feature_fmaf = Feature{
     .name = "fmaf",
+    .llvm_name = "fmaf",
     .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
     .dependencies = &[_]*const Feature {
     },
@@ -192,6 +219,7 @@ pub const feature_fmaf = Feature{
 
 pub const feature_fp16Denormals = Feature{
     .name = "fp16-denormals",
+    .llvm_name = "fp16-denormals",
     .description = "Enable half precision denormal handling",
     .dependencies = &[_]*const Feature {
         &feature_fp64,
@@ -200,6 +228,7 @@ pub const feature_fp16Denormals = Feature{
 
 pub const feature_fp32Denormals = Feature{
     .name = "fp32-denormals",
+    .llvm_name = "fp32-denormals",
     .description = "Enable single precision denormal handling",
     .dependencies = &[_]*const Feature {
     },
@@ -207,6 +236,7 @@ pub const feature_fp32Denormals = Feature{
 
 pub const feature_fp64 = Feature{
     .name = "fp64",
+    .llvm_name = "fp64",
     .description = "Enable double precision operations",
     .dependencies = &[_]*const Feature {
     },
@@ -214,6 +244,7 @@ pub const feature_fp64 = Feature{
 
 pub const feature_fp64Denormals = Feature{
     .name = "fp64-denormals",
+    .llvm_name = "fp64-denormals",
     .description = "Enable double and half precision denormal handling",
     .dependencies = &[_]*const Feature {
         &feature_fp64,
@@ -222,6 +253,7 @@ pub const feature_fp64Denormals = Feature{
 
 pub const feature_fp64Fp16Denormals = Feature{
     .name = "fp64-fp16-denormals",
+    .llvm_name = "fp64-fp16-denormals",
     .description = "Enable double and half precision denormal handling",
     .dependencies = &[_]*const Feature {
         &feature_fp64,
@@ -230,6 +262,7 @@ pub const feature_fp64Fp16Denormals = Feature{
 
 pub const feature_fpExceptions = Feature{
     .name = "fp-exceptions",
+    .llvm_name = "fp-exceptions",
     .description = "Enable floating point exceptions",
     .dependencies = &[_]*const Feature {
     },
@@ -237,6 +270,7 @@ pub const feature_fpExceptions = Feature{
 
 pub const feature_fastFmaf = Feature{
     .name = "fast-fmaf",
+    .llvm_name = "fast-fmaf",
     .description = "Assuming f32 fma is at least as fast as mul + add",
     .dependencies = &[_]*const Feature {
     },
@@ -244,6 +278,7 @@ pub const feature_fastFmaf = Feature{
 
 pub const feature_flatAddressSpace = Feature{
     .name = "flat-address-space",
+    .llvm_name = "flat-address-space",
     .description = "Support flat address space",
     .dependencies = &[_]*const Feature {
     },
@@ -251,6 +286,7 @@ pub const feature_flatAddressSpace = Feature{
 
 pub const feature_flatForGlobal = Feature{
     .name = "flat-for-global",
+    .llvm_name = "flat-for-global",
     .description = "Force to generate flat instruction for global",
     .dependencies = &[_]*const Feature {
     },
@@ -258,6 +294,7 @@ pub const feature_flatForGlobal = Feature{
 
 pub const feature_flatGlobalInsts = Feature{
     .name = "flat-global-insts",
+    .llvm_name = "flat-global-insts",
     .description = "Have global_* flat memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -265,6 +302,7 @@ pub const feature_flatGlobalInsts = Feature{
 
 pub const feature_flatInstOffsets = Feature{
     .name = "flat-inst-offsets",
+    .llvm_name = "flat-inst-offsets",
     .description = "Flat instructions have immediate offset addressing mode",
     .dependencies = &[_]*const Feature {
     },
@@ -272,6 +310,7 @@ pub const feature_flatInstOffsets = Feature{
 
 pub const feature_flatScratchInsts = Feature{
     .name = "flat-scratch-insts",
+    .llvm_name = "flat-scratch-insts",
     .description = "Have scratch_* flat memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -279,6 +318,7 @@ pub const feature_flatScratchInsts = Feature{
 
 pub const feature_flatSegmentOffsetBug = Feature{
     .name = "flat-segment-offset-bug",
+    .llvm_name = "flat-segment-offset-bug",
     .description = "GFX10 bug, inst_offset ignored in flat segment",
     .dependencies = &[_]*const Feature {
     },
@@ -286,6 +326,7 @@ pub const feature_flatSegmentOffsetBug = Feature{
 
 pub const feature_fmaMixInsts = Feature{
     .name = "fma-mix-insts",
+    .llvm_name = "fma-mix-insts",
     .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -293,6 +334,7 @@ pub const feature_fmaMixInsts = Feature{
 
 pub const feature_gcn3Encoding = Feature{
     .name = "gcn3-encoding",
+    .llvm_name = "gcn3-encoding",
     .description = "Encoding format for VI",
     .dependencies = &[_]*const Feature {
     },
@@ -300,6 +342,7 @@ pub const feature_gcn3Encoding = Feature{
 
 pub const feature_gfx7Gfx8Gfx9Insts = Feature{
     .name = "gfx7-gfx8-gfx9-insts",
+    .llvm_name = "gfx7-gfx8-gfx9-insts",
     .description = "Instructions shared in GFX7, GFX8, GFX9",
     .dependencies = &[_]*const Feature {
     },
@@ -307,6 +350,7 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{
 
 pub const feature_gfx8Insts = Feature{
     .name = "gfx8-insts",
+    .llvm_name = "gfx8-insts",
     .description = "Additional instructions for GFX8+",
     .dependencies = &[_]*const Feature {
     },
@@ -314,6 +358,7 @@ pub const feature_gfx8Insts = Feature{
 
 pub const feature_gfx9Insts = Feature{
     .name = "gfx9-insts",
+    .llvm_name = "gfx9-insts",
     .description = "Additional instructions for GFX9+",
     .dependencies = &[_]*const Feature {
     },
@@ -321,6 +366,7 @@ pub const feature_gfx9Insts = Feature{
 
 pub const feature_gfx10Insts = Feature{
     .name = "gfx10-insts",
+    .llvm_name = "gfx10-insts",
     .description = "Additional instructions for GFX10+",
     .dependencies = &[_]*const Feature {
     },
@@ -328,6 +374,7 @@ pub const feature_gfx10Insts = Feature{
 
 pub const feature_instFwdPrefetchBug = Feature{
     .name = "inst-fwd-prefetch-bug",
+    .llvm_name = "inst-fwd-prefetch-bug",
     .description = "S_INST_PREFETCH instruction causes shader to hang",
     .dependencies = &[_]*const Feature {
     },
@@ -335,6 +382,7 @@ pub const feature_instFwdPrefetchBug = Feature{
 
 pub const feature_intClampInsts = Feature{
     .name = "int-clamp-insts",
+    .llvm_name = "int-clamp-insts",
     .description = "Support clamp for integer destination",
     .dependencies = &[_]*const Feature {
     },
@@ -342,6 +390,7 @@ pub const feature_intClampInsts = Feature{
 
 pub const feature_inv2piInlineImm = Feature{
     .name = "inv-2pi-inline-imm",
+    .llvm_name = "inv-2pi-inline-imm",
     .description = "Has 1 / (2 * pi) as inline immediate",
     .dependencies = &[_]*const Feature {
     },
@@ -349,6 +398,7 @@ pub const feature_inv2piInlineImm = Feature{
 
 pub const feature_ldsbankcount16 = Feature{
     .name = "ldsbankcount16",
+    .llvm_name = "ldsbankcount16",
     .description = "The number of LDS banks per compute unit.",
     .dependencies = &[_]*const Feature {
     },
@@ -356,6 +406,7 @@ pub const feature_ldsbankcount16 = Feature{
 
 pub const feature_ldsbankcount32 = Feature{
     .name = "ldsbankcount32",
+    .llvm_name = "ldsbankcount32",
     .description = "The number of LDS banks per compute unit.",
     .dependencies = &[_]*const Feature {
     },
@@ -363,6 +414,7 @@ pub const feature_ldsbankcount32 = Feature{
 
 pub const feature_ldsBranchVmemWarHazard = Feature{
     .name = "lds-branch-vmem-war-hazard",
+    .llvm_name = "lds-branch-vmem-war-hazard",
     .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
     .dependencies = &[_]*const Feature {
     },
@@ -370,6 +422,7 @@ pub const feature_ldsBranchVmemWarHazard = Feature{
 
 pub const feature_ldsMisalignedBug = Feature{
     .name = "lds-misaligned-bug",
+    .llvm_name = "lds-misaligned-bug",
     .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
     .dependencies = &[_]*const Feature {
     },
@@ -377,6 +430,7 @@ pub const feature_ldsMisalignedBug = Feature{
 
 pub const feature_localmemorysize0 = Feature{
     .name = "localmemorysize0",
+    .llvm_name = "localmemorysize0",
     .description = "The size of local memory in bytes",
     .dependencies = &[_]*const Feature {
     },
@@ -384,6 +438,7 @@ pub const feature_localmemorysize0 = Feature{
 
 pub const feature_localmemorysize32768 = Feature{
     .name = "localmemorysize32768",
+    .llvm_name = "localmemorysize32768",
     .description = "The size of local memory in bytes",
     .dependencies = &[_]*const Feature {
     },
@@ -391,6 +446,7 @@ pub const feature_localmemorysize32768 = Feature{
 
 pub const feature_localmemorysize65536 = Feature{
     .name = "localmemorysize65536",
+    .llvm_name = "localmemorysize65536",
     .description = "The size of local memory in bytes",
     .dependencies = &[_]*const Feature {
     },
@@ -398,6 +454,7 @@ pub const feature_localmemorysize65536 = Feature{
 
 pub const feature_maiInsts = Feature{
     .name = "mai-insts",
+    .llvm_name = "mai-insts",
     .description = "Has mAI instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -405,6 +462,7 @@ pub const feature_maiInsts = Feature{
 
 pub const feature_mfmaInlineLiteralBug = Feature{
     .name = "mfma-inline-literal-bug",
+    .llvm_name = "mfma-inline-literal-bug",
     .description = "MFMA cannot use inline literal as SrcC",
     .dependencies = &[_]*const Feature {
     },
@@ -412,6 +470,7 @@ pub const feature_mfmaInlineLiteralBug = Feature{
 
 pub const feature_mimgR128 = Feature{
     .name = "mimg-r128",
+    .llvm_name = "mimg-r128",
     .description = "Support 128-bit texture resources",
     .dependencies = &[_]*const Feature {
     },
@@ -419,6 +478,7 @@ pub const feature_mimgR128 = Feature{
 
 pub const feature_madMixInsts = Feature{
     .name = "mad-mix-insts",
+    .llvm_name = "mad-mix-insts",
     .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -426,6 +486,7 @@ pub const feature_madMixInsts = Feature{
 
 pub const feature_maxPrivateElementSize4 = Feature{
     .name = "max-private-element-size-4",
+    .llvm_name = "max-private-element-size-4",
     .description = "Maximum private access size may be 4",
     .dependencies = &[_]*const Feature {
     },
@@ -433,6 +494,7 @@ pub const feature_maxPrivateElementSize4 = Feature{
 
 pub const feature_maxPrivateElementSize8 = Feature{
     .name = "max-private-element-size-8",
+    .llvm_name = "max-private-element-size-8",
     .description = "Maximum private access size may be 8",
     .dependencies = &[_]*const Feature {
     },
@@ -440,6 +502,7 @@ pub const feature_maxPrivateElementSize8 = Feature{
 
 pub const feature_maxPrivateElementSize16 = Feature{
     .name = "max-private-element-size-16",
+    .llvm_name = "max-private-element-size-16",
     .description = "Maximum private access size may be 16",
     .dependencies = &[_]*const Feature {
     },
@@ -447,6 +510,7 @@ pub const feature_maxPrivateElementSize16 = Feature{
 
 pub const feature_movrel = Feature{
     .name = "movrel",
+    .llvm_name = "movrel",
     .description = "Has v_movrel*_b32 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -454,6 +518,7 @@ pub const feature_movrel = Feature{
 
 pub const feature_nsaEncoding = Feature{
     .name = "nsa-encoding",
+    .llvm_name = "nsa-encoding",
     .description = "Support NSA encoding for image instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -461,6 +526,7 @@ pub const feature_nsaEncoding = Feature{
 
 pub const feature_nsaToVmemBug = Feature{
     .name = "nsa-to-vmem-bug",
+    .llvm_name = "nsa-to-vmem-bug",
     .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
     .dependencies = &[_]*const Feature {
     },
@@ -468,6 +534,7 @@ pub const feature_nsaToVmemBug = Feature{
 
 pub const feature_noDataDepHazard = Feature{
     .name = "no-data-dep-hazard",
+    .llvm_name = "no-data-dep-hazard",
     .description = "Does not need SW waitstates",
     .dependencies = &[_]*const Feature {
     },
@@ -475,6 +542,7 @@ pub const feature_noDataDepHazard = Feature{
 
 pub const feature_noSdstCmpx = Feature{
     .name = "no-sdst-cmpx",
+    .llvm_name = "no-sdst-cmpx",
     .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
     .dependencies = &[_]*const Feature {
     },
@@ -482,6 +550,7 @@ pub const feature_noSdstCmpx = Feature{
 
 pub const feature_offset3fBug = Feature{
     .name = "offset-3f-bug",
+    .llvm_name = "offset-3f-bug",
     .description = "Branch offset of 3f hardware bug",
     .dependencies = &[_]*const Feature {
     },
@@ -489,6 +558,7 @@ pub const feature_offset3fBug = Feature{
 
 pub const feature_pkFmacF16Inst = Feature{
     .name = "pk-fmac-f16-inst",
+    .llvm_name = "pk-fmac-f16-inst",
     .description = "Has v_pk_fmac_f16 instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -496,6 +566,7 @@ pub const feature_pkFmacF16Inst = Feature{
 
 pub const feature_promoteAlloca = Feature{
     .name = "promote-alloca",
+    .llvm_name = "promote-alloca",
     .description = "Enable promote alloca pass",
     .dependencies = &[_]*const Feature {
     },
@@ -503,6 +574,7 @@ pub const feature_promoteAlloca = Feature{
 
 pub const feature_r128A16 = Feature{
     .name = "r128-a16",
+    .llvm_name = "r128-a16",
     .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
     .dependencies = &[_]*const Feature {
     },
@@ -510,6 +582,7 @@ pub const feature_r128A16 = Feature{
 
 pub const feature_registerBanking = Feature{
     .name = "register-banking",
+    .llvm_name = "register-banking",
     .description = "Has register banking",
     .dependencies = &[_]*const Feature {
     },
@@ -517,6 +590,7 @@ pub const feature_registerBanking = Feature{
 
 pub const feature_sdwa = Feature{
     .name = "sdwa",
+    .llvm_name = "sdwa",
     .description = "Support SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -524,6 +598,7 @@ pub const feature_sdwa = Feature{
 
 pub const feature_sdwaMav = Feature{
     .name = "sdwa-mav",
+    .llvm_name = "sdwa-mav",
     .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -531,6 +606,7 @@ pub const feature_sdwaMav = Feature{
 
 pub const feature_sdwaOmod = Feature{
     .name = "sdwa-omod",
+    .llvm_name = "sdwa-omod",
     .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -538,6 +614,7 @@ pub const feature_sdwaOmod = Feature{
 
 pub const feature_sdwaOutModsVopc = Feature{
     .name = "sdwa-out-mods-vopc",
+    .llvm_name = "sdwa-out-mods-vopc",
     .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -545,6 +622,7 @@ pub const feature_sdwaOutModsVopc = Feature{
 
 pub const feature_sdwaScalar = Feature{
     .name = "sdwa-scalar",
+    .llvm_name = "sdwa-scalar",
     .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -552,6 +630,7 @@ pub const feature_sdwaScalar = Feature{
 
 pub const feature_sdwaSdst = Feature{
     .name = "sdwa-sdst",
+    .llvm_name = "sdwa-sdst",
     .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
     },
@@ -559,6 +638,7 @@ pub const feature_sdwaSdst = Feature{
 
 pub const feature_sgprInitBug = Feature{
     .name = "sgpr-init-bug",
+    .llvm_name = "sgpr-init-bug",
     .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
     .dependencies = &[_]*const Feature {
     },
@@ -566,6 +646,7 @@ pub const feature_sgprInitBug = Feature{
 
 pub const feature_smemToVectorWriteHazard = Feature{
     .name = "smem-to-vector-write-hazard",
+    .llvm_name = "smem-to-vector-write-hazard",
     .description = "s_load_dword followed by v_cmp page faults",
     .dependencies = &[_]*const Feature {
     },
@@ -573,6 +654,7 @@ pub const feature_smemToVectorWriteHazard = Feature{
 
 pub const feature_sMemrealtime = Feature{
     .name = "s-memrealtime",
+    .llvm_name = "s-memrealtime",
     .description = "Has s_memrealtime instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -580,6 +662,7 @@ pub const feature_sMemrealtime = Feature{
 
 pub const feature_sramEcc = Feature{
     .name = "sram-ecc",
+    .llvm_name = "sram-ecc",
     .description = "Enable SRAM ECC",
     .dependencies = &[_]*const Feature {
     },
@@ -587,6 +670,7 @@ pub const feature_sramEcc = Feature{
 
 pub const feature_scalarAtomics = Feature{
     .name = "scalar-atomics",
+    .llvm_name = "scalar-atomics",
     .description = "Has atomic scalar memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -594,6 +678,7 @@ pub const feature_scalarAtomics = Feature{
 
 pub const feature_scalarFlatScratchInsts = Feature{
     .name = "scalar-flat-scratch-insts",
+    .llvm_name = "scalar-flat-scratch-insts",
     .description = "Have s_scratch_* flat memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -601,6 +686,7 @@ pub const feature_scalarFlatScratchInsts = Feature{
 
 pub const feature_scalarStores = Feature{
     .name = "scalar-stores",
+    .llvm_name = "scalar-stores",
     .description = "Has store scalar memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -608,6 +694,7 @@ pub const feature_scalarStores = Feature{
 
 pub const feature_trapHandler = Feature{
     .name = "trap-handler",
+    .llvm_name = "trap-handler",
     .description = "Trap handler support",
     .dependencies = &[_]*const Feature {
     },
@@ -615,6 +702,7 @@ pub const feature_trapHandler = Feature{
 
 pub const feature_trigReducedRange = Feature{
     .name = "trig-reduced-range",
+    .llvm_name = "trig-reduced-range",
     .description = "Requires use of fract on arguments to trig instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -622,6 +710,7 @@ pub const feature_trigReducedRange = Feature{
 
 pub const feature_unalignedBufferAccess = Feature{
     .name = "unaligned-buffer-access",
+    .llvm_name = "unaligned-buffer-access",
     .description = "Support unaligned global loads and stores",
     .dependencies = &[_]*const Feature {
     },
@@ -629,6 +718,7 @@ pub const feature_unalignedBufferAccess = Feature{
 
 pub const feature_unalignedScratchAccess = Feature{
     .name = "unaligned-scratch-access",
+    .llvm_name = "unaligned-scratch-access",
     .description = "Support unaligned scratch loads and stores",
     .dependencies = &[_]*const Feature {
     },
@@ -636,6 +726,7 @@ pub const feature_unalignedScratchAccess = Feature{
 
 pub const feature_unpackedD16Vmem = Feature{
     .name = "unpacked-d16-vmem",
+    .llvm_name = "unpacked-d16-vmem",
     .description = "Has unpacked d16 vmem instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -643,6 +734,7 @@ pub const feature_unpackedD16Vmem = Feature{
 
 pub const feature_vgprIndexMode = Feature{
     .name = "vgpr-index-mode",
+    .llvm_name = "vgpr-index-mode",
     .description = "Has VGPR mode register indexing",
     .dependencies = &[_]*const Feature {
     },
@@ -650,6 +742,7 @@ pub const feature_vgprIndexMode = Feature{
 
 pub const feature_vmemToScalarWriteHazard = Feature{
     .name = "vmem-to-scalar-write-hazard",
+    .llvm_name = "vmem-to-scalar-write-hazard",
     .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
     .dependencies = &[_]*const Feature {
     },
@@ -657,6 +750,7 @@ pub const feature_vmemToScalarWriteHazard = Feature{
 
 pub const feature_vop3Literal = Feature{
     .name = "vop3-literal",
+    .llvm_name = "vop3-literal",
     .description = "Can use one literal in VOP3",
     .dependencies = &[_]*const Feature {
     },
@@ -664,6 +758,7 @@ pub const feature_vop3Literal = Feature{
 
 pub const feature_vop3p = Feature{
     .name = "vop3p",
+    .llvm_name = "vop3p",
     .description = "Has VOP3P packed instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -671,6 +766,7 @@ pub const feature_vop3p = Feature{
 
 pub const feature_vcmpxExecWarHazard = Feature{
     .name = "vcmpx-exec-war-hazard",
+    .llvm_name = "vcmpx-exec-war-hazard",
     .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
     .dependencies = &[_]*const Feature {
     },
@@ -678,6 +774,7 @@ pub const feature_vcmpxExecWarHazard = Feature{
 
 pub const feature_vcmpxPermlaneHazard = Feature{
     .name = "vcmpx-permlane-hazard",
+    .llvm_name = "vcmpx-permlane-hazard",
     .description = "TODO: describe me",
     .dependencies = &[_]*const Feature {
     },
@@ -685,6 +782,7 @@ pub const feature_vcmpxPermlaneHazard = Feature{
 
 pub const feature_vscnt = Feature{
     .name = "vscnt",
+    .llvm_name = "vscnt",
     .description = "Has separate store vscnt counter",
     .dependencies = &[_]*const Feature {
     },
@@ -692,6 +790,7 @@ pub const feature_vscnt = Feature{
 
 pub const feature_wavefrontsize16 = Feature{
     .name = "wavefrontsize16",
+    .llvm_name = "wavefrontsize16",
     .description = "The number of threads per wavefront",
     .dependencies = &[_]*const Feature {
     },
@@ -699,6 +798,7 @@ pub const feature_wavefrontsize16 = Feature{
 
 pub const feature_wavefrontsize32 = Feature{
     .name = "wavefrontsize32",
+    .llvm_name = "wavefrontsize32",
     .description = "The number of threads per wavefront",
     .dependencies = &[_]*const Feature {
     },
@@ -706,6 +806,7 @@ pub const feature_wavefrontsize32 = Feature{
 
 pub const feature_wavefrontsize64 = Feature{
     .name = "wavefrontsize64",
+    .llvm_name = "wavefrontsize64",
     .description = "The number of threads per wavefront",
     .dependencies = &[_]*const Feature {
     },
@@ -713,6 +814,7 @@ pub const feature_wavefrontsize64 = Feature{
 
 pub const feature_xnack = Feature{
     .name = "xnack",
+    .llvm_name = "xnack",
     .description = "Enable XNACK support",
     .dependencies = &[_]*const Feature {
     },
@@ -720,6 +822,7 @@ pub const feature_xnack = Feature{
 
 pub const feature_halfRate64Ops = Feature{
     .name = "half-rate-64-ops",
+    .llvm_name = "half-rate-64-ops",
     .description = "Most fp64 instructions are half rate instead of quarter",
     .dependencies = &[_]*const Feature {
     },
@@ -838,16 +941,16 @@ pub const cpu_bonaire = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -859,28 +962,28 @@ pub const cpu_carrizo = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -894,28 +997,28 @@ pub const cpu_fiji = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -944,40 +1047,40 @@ pub const cpu_gfx1010 = Cpu{
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_noSdstCmpx,
-        &feature_flatScratchInsts,
-        &feature_fp64,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
-        &feature_fastFmaf,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_gfx9Insts,
         &feature_flatAddressSpace,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_gfx9Insts,
+        &feature_fastFmaf,
+        &feature_flatScratchInsts,
         &feature_mimgR128,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
-        &feature_gfx8Insts,
+        &feature_noSdstCmpx,
+        &feature_sdwaSdst,
+        &feature_vop3p,
         &feature_intClampInsts,
-        &feature_vscnt,
+        &feature_dpp,
+        &feature_registerBanking,
         &feature_movrel,
-        &feature_localmemorysize65536,
-        &feature_gfx10Insts,
+        &feature_gfx8Insts,
+        &feature_sdwa,
+        &feature_noDataDepHazard,
         &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
-        &feature_dpp,
-        &feature_sdwaSdst,
         &feature_flatInstOffsets,
         &feature_fmaMixInsts,
-        &feature_registerBanking,
-        &feature_noDataDepHazard,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_vscnt,
+        &feature_apertureRegs,
+        &feature_dpp8,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_vop3Literal,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1008,40 +1111,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_noSdstCmpx,
-        &feature_flatScratchInsts,
-        &feature_fp64,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
-        &feature_fastFmaf,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_gfx9Insts,
         &feature_flatAddressSpace,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_gfx9Insts,
+        &feature_fastFmaf,
+        &feature_flatScratchInsts,
         &feature_mimgR128,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
-        &feature_gfx8Insts,
+        &feature_noSdstCmpx,
+        &feature_sdwaSdst,
+        &feature_vop3p,
         &feature_intClampInsts,
-        &feature_vscnt,
+        &feature_dpp,
+        &feature_registerBanking,
         &feature_movrel,
-        &feature_localmemorysize65536,
-        &feature_gfx10Insts,
+        &feature_gfx8Insts,
+        &feature_sdwa,
+        &feature_noDataDepHazard,
         &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
-        &feature_dpp,
-        &feature_sdwaSdst,
         &feature_flatInstOffsets,
         &feature_fmaMixInsts,
-        &feature_registerBanking,
-        &feature_noDataDepHazard,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_vscnt,
+        &feature_apertureRegs,
+        &feature_dpp8,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_vop3Literal,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1071,40 +1174,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_noSdstCmpx,
-        &feature_flatScratchInsts,
-        &feature_fp64,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
-        &feature_fastFmaf,
-        &feature_BitInsts16,
-        &feature_sdwa,
-        &feature_gfx9Insts,
         &feature_flatAddressSpace,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_gfx9Insts,
+        &feature_fastFmaf,
+        &feature_flatScratchInsts,
         &feature_mimgR128,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
-        &feature_gfx8Insts,
+        &feature_noSdstCmpx,
+        &feature_sdwaSdst,
+        &feature_vop3p,
         &feature_intClampInsts,
-        &feature_vscnt,
+        &feature_dpp,
+        &feature_registerBanking,
         &feature_movrel,
-        &feature_localmemorysize65536,
-        &feature_gfx10Insts,
+        &feature_gfx8Insts,
+        &feature_sdwa,
+        &feature_noDataDepHazard,
         &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp8,
+        &feature_gfx10Insts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
-        &feature_dpp,
-        &feature_sdwaSdst,
         &feature_flatInstOffsets,
         &feature_fmaMixInsts,
-        &feature_registerBanking,
-        &feature_noDataDepHazard,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_vscnt,
+        &feature_apertureRegs,
+        &feature_dpp8,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_vop3Literal,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1131,13 +1234,13 @@ pub const cpu_gfx600 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
         &feature_halfRate64Ops,
     },
 };
@@ -1149,13 +1252,13 @@ pub const cpu_gfx601 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
     },
 };
 
@@ -1166,16 +1269,16 @@ pub const cpu_gfx700 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1187,16 +1290,16 @@ pub const cpu_gfx701 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1209,16 +1312,16 @@ pub const cpu_gfx702 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount16,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1229,16 +1332,16 @@ pub const cpu_gfx703 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1249,16 +1352,16 @@ pub const cpu_gfx704 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1270,28 +1373,28 @@ pub const cpu_gfx801 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1306,28 +1409,28 @@ pub const cpu_gfx802 = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1339,28 +1442,28 @@ pub const cpu_gfx803 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1370,28 +1473,28 @@ pub const cpu_gfx810 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
         &feature_xnack,
     },
 };
@@ -1403,36 +1506,36 @@ pub const cpu_gfx900 = Cpu{
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
     },
@@ -1444,36 +1547,36 @@ pub const cpu_gfx902 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1488,36 +1591,36 @@ pub const cpu_gfx904 = Cpu{
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
     },
 };
@@ -1532,36 +1635,36 @@ pub const cpu_gfx906 = Cpu{
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
     },
@@ -1581,36 +1684,36 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
         &feature_maiInsts,
         &feature_mfmaInlineLiteralBug,
@@ -1625,36 +1728,36 @@ pub const cpu_gfx909 = Cpu{
     .llvm_name = "gfx909",
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
-        &feature_flatScratchInsts,
-        &feature_fp64,
-        &feature_r128A16,
+        &feature_sdwaOmod,
         &feature_sMemrealtime,
-        &feature_addNoCarryInsts,
-        &feature_vop3p,
+        &feature_scalarStores,
+        &feature_flatAddressSpace,
+        &feature_vgprIndexMode,
+        &feature_gfx9Insts,
+        &feature_r128A16,
         &feature_fastFmaf,
-        &feature_BitInsts16,
         &feature_wavefrontsize64,
-        &feature_sdwa,
-        &feature_gfx9Insts,
-        &feature_flatAddressSpace,
-        &feature_apertureRegs,
-        &feature_sdwaScalar,
-        &feature_ciInsts,
+        &feature_flatScratchInsts,
+        &feature_sdwaSdst,
+        &feature_vop3p,
+        &feature_intClampInsts,
+        &feature_dpp,
         &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_inv2piInlineImm,
-        &feature_vgprIndexMode,
         &feature_gcn3Encoding,
         &feature_gfx8Insts,
-        &feature_scalarStores,
-        &feature_intClampInsts,
-        &feature_localmemorysize65536,
-        &feature_flatGlobalInsts,
-        &feature_sdwaOmod,
-        &feature_dpp,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaSdst,
+        &feature_sdwa,
+        &feature_flatGlobalInsts,
+        &feature_localmemorysize65536,
+        &feature_BitInsts16,
+        &feature_addNoCarryInsts,
         &feature_flatInstOffsets,
+        &feature_sdwaScalar,
+        &feature_inv2piInlineImm,
+        &feature_apertureRegs,
+        &feature_fp64,
+        &feature_ciInsts,
+        &feature_scalarFlatScratchInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1668,13 +1771,13 @@ pub const cpu_hainan = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
     },
 };
 
@@ -1686,16 +1789,16 @@ pub const cpu_hawaii = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
         &feature_halfRate64Ops,
     },
 };
@@ -1709,28 +1812,28 @@ pub const cpu_iceland = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1741,16 +1844,16 @@ pub const cpu_kabini = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1761,16 +1864,16 @@ pub const cpu_kaveri = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1781,16 +1884,16 @@ pub const cpu_mullins = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
+        &feature_movrel,
         &feature_flatAddressSpace,
-        &feature_fp64,
-        &feature_mimgR128,
+        &feature_trigReducedRange,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
+        &feature_noSramEccSupport,
         &feature_localmemorysize65536,
+        &feature_fp64,
         &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
-        &feature_trigReducedRange,
     },
 };
 
@@ -1801,13 +1904,13 @@ pub const cpu_oland = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
     },
 };
 
@@ -1818,13 +1921,13 @@ pub const cpu_pitcairn = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
     },
 };
 
@@ -1836,28 +1939,28 @@ pub const cpu_polaris10 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1869,28 +1972,28 @@ pub const cpu_polaris11 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1900,28 +2003,28 @@ pub const cpu_stoney = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
         &feature_xnack,
     },
 };
@@ -1934,13 +2037,13 @@ pub const cpu_tahiti = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
         &feature_halfRate64Ops,
     },
 };
@@ -1954,28 +2057,28 @@ pub const cpu_tonga = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_fp64,
         &feature_sMemrealtime,
-        &feature_BitInsts16,
-        &feature_wavefrontsize64,
-        &feature_sdwa,
+        &feature_scalarStores,
         &feature_flatAddressSpace,
-        &feature_sdwaMav,
-        &feature_mimgR128,
-        &feature_ciInsts,
-        &feature_noSramEccSupport,
-        &feature_inv2piInlineImm,
         &feature_vgprIndexMode,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_scalarStores,
+        &feature_wavefrontsize64,
+        &feature_mimgR128,
         &feature_intClampInsts,
+        &feature_dpp,
         &feature_movrel,
+        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_sdwaMav,
+        &feature_sdwa,
         &feature_localmemorysize65536,
+        &feature_BitInsts16,
         &feature_sdwaOutModsVopc,
-        &feature_dpp,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_trigReducedRange,
+        &feature_inv2piInlineImm,
+        &feature_noSramEccSupport,
+        &feature_fp64,
+        &feature_ciInsts,
     },
 };
 
@@ -1986,13 +2089,13 @@ pub const cpu_verde = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_localmemorysize32768,
-        &feature_fp64,
-        &feature_mimgR128,
         &feature_movrel,
-        &feature_noSramEccSupport,
-        &feature_wavefrontsize64,
         &feature_trigReducedRange,
+        &feature_mimgR128,
+        &feature_localmemorysize32768,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_fp64,
     },
 };
 
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 964b2882af7b2bd511b1270febea273c1441a6c4..6152346468cceff773e7f9cad6e441432413267e 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_msecext8 = Feature{
     .name = "8msecext",
+    .llvm_name = "8msecext",
     .description = "Enable support for ARMv8-M Security Extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_msecext8 = Feature{
 
 pub const feature_aclass = Feature{
     .name = "aclass",
+    .llvm_name = "aclass",
     .description = "Is application profile ('A' series)",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_aclass = Feature{
 
 pub const feature_aes = Feature{
     .name = "aes",
+    .llvm_name = "aes",
     .description = "Enable AES support",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -26,6 +29,7 @@ pub const feature_aes = Feature{
 
 pub const feature_acquireRelease = Feature{
     .name = "acquire-release",
+    .llvm_name = "acquire-release",
     .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -33,6 +37,7 @@ pub const feature_acquireRelease = Feature{
 
 pub const feature_avoidMovsShop = Feature{
     .name = "avoid-movs-shop",
+    .llvm_name = "avoid-movs-shop",
     .description = "Avoid movs instructions with shifter operand",
     .dependencies = &[_]*const Feature {
     },
@@ -40,6 +45,7 @@ pub const feature_avoidMovsShop = Feature{
 
 pub const feature_avoidPartialCpsr = Feature{
     .name = "avoid-partial-cpsr",
+    .llvm_name = "avoid-partial-cpsr",
     .description = "Avoid CPSR partial update for OOO execution",
     .dependencies = &[_]*const Feature {
     },
@@ -47,6 +53,7 @@ pub const feature_avoidPartialCpsr = Feature{
 
 pub const feature_crc = Feature{
     .name = "crc",
+    .llvm_name = "crc",
     .description = "Enable support for CRC instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -54,6 +61,7 @@ pub const feature_crc = Feature{
 
 pub const feature_cheapPredicableCpsr = Feature{
     .name = "cheap-predicable-cpsr",
+    .llvm_name = "cheap-predicable-cpsr",
     .description = "Disable +1 predication cost for instructions updating CPSR",
     .dependencies = &[_]*const Feature {
     },
@@ -61,6 +69,7 @@ pub const feature_cheapPredicableCpsr = Feature{
 
 pub const feature_vldnAlign = Feature{
     .name = "vldn-align",
+    .llvm_name = "vldn-align",
     .description = "Check for VLDn unaligned access",
     .dependencies = &[_]*const Feature {
     },
@@ -68,6 +77,7 @@ pub const feature_vldnAlign = Feature{
 
 pub const feature_crypto = Feature{
     .name = "crypto",
+    .llvm_name = "crypto",
     .description = "Enable support for Cryptography extensions",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -77,6 +87,7 @@ pub const feature_crypto = Feature{
 
 pub const feature_d32 = Feature{
     .name = "d32",
+    .llvm_name = "d32",
     .description = "Extend FP to 32 double registers",
     .dependencies = &[_]*const Feature {
     },
@@ -84,6 +95,7 @@ pub const feature_d32 = Feature{
 
 pub const feature_db = Feature{
     .name = "db",
+    .llvm_name = "db",
     .description = "Has data barrier (dmb/dsb) instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -91,6 +103,7 @@ pub const feature_db = Feature{
 
 pub const feature_dfb = Feature{
     .name = "dfb",
+    .llvm_name = "dfb",
     .description = "Has full data barrier (dfb) instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -98,6 +111,7 @@ pub const feature_dfb = Feature{
 
 pub const feature_dsp = Feature{
     .name = "dsp",
+    .llvm_name = "dsp",
     .description = "Supports DSP instructions in ARM and/or Thumb2",
     .dependencies = &[_]*const Feature {
     },
@@ -105,6 +119,7 @@ pub const feature_dsp = Feature{
 
 pub const feature_dontWidenVmovs = Feature{
     .name = "dont-widen-vmovs",
+    .llvm_name = "dont-widen-vmovs",
     .description = "Don't widen VMOVS to VMOVD",
     .dependencies = &[_]*const Feature {
     },
@@ -112,6 +127,7 @@ pub const feature_dontWidenVmovs = Feature{
 
 pub const feature_dotprod = Feature{
     .name = "dotprod",
+    .llvm_name = "dotprod",
     .description = "Enable support for dot product instructions",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -121,6 +137,7 @@ pub const feature_dotprod = Feature{
 
 pub const feature_executeOnly = Feature{
     .name = "execute-only",
+    .llvm_name = "execute-only",
     .description = "Enable the generation of execute only code.",
     .dependencies = &[_]*const Feature {
     },
@@ -128,6 +145,7 @@ pub const feature_executeOnly = Feature{
 
 pub const feature_expandFpMlx = Feature{
     .name = "expand-fp-mlx",
+    .llvm_name = "expand-fp-mlx",
     .description = "Expand VFP/NEON MLA/MLS instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -135,6 +153,7 @@ pub const feature_expandFpMlx = Feature{
 
 pub const feature_fp16 = Feature{
     .name = "fp16",
+    .llvm_name = "fp16",
     .description = "Enable half-precision floating point",
     .dependencies = &[_]*const Feature {
     },
@@ -142,6 +161,7 @@ pub const feature_fp16 = Feature{
 
 pub const feature_fp16fml = Feature{
     .name = "fp16fml",
+    .llvm_name = "fp16fml",
     .description = "Enable full half-precision floating point fml instructions",
     .dependencies = &[_]*const Feature {
         &feature_fp16,
@@ -151,6 +171,7 @@ pub const feature_fp16fml = Feature{
 
 pub const feature_fp64 = Feature{
     .name = "fp64",
+    .llvm_name = "fp64",
     .description = "Floating point unit supports double precision",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -159,6 +180,7 @@ pub const feature_fp64 = Feature{
 
 pub const feature_fpao = Feature{
     .name = "fpao",
+    .llvm_name = "fpao",
     .description = "Enable fast computation of positive address offsets",
     .dependencies = &[_]*const Feature {
     },
@@ -166,16 +188,18 @@ pub const feature_fpao = Feature{
 
 pub const feature_fpArmv8 = Feature{
     .name = "fp-armv8",
+    .llvm_name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
         &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_fpArmv8d16 = Feature{
     .name = "fp-armv8d16",
+    .llvm_name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
     .dependencies = &[_]*const Feature {
         &feature_fp16,
@@ -185,6 +209,7 @@ pub const feature_fpArmv8d16 = Feature{
 
 pub const feature_fpArmv8d16sp = Feature{
     .name = "fp-armv8d16sp",
+    .llvm_name = "fp-armv8d16sp",
     .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
         &feature_fp16,
@@ -194,16 +219,18 @@ pub const feature_fpArmv8d16sp = Feature{
 
 pub const feature_fpArmv8sp = Feature{
     .name = "fp-armv8sp",
+    .llvm_name = "fp-armv8sp",
     .description = "Enable ARMv8 FP with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
         &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_fpregs = Feature{
     .name = "fpregs",
+    .llvm_name = "fpregs",
     .description = "Enable FP registers",
     .dependencies = &[_]*const Feature {
     },
@@ -211,6 +238,7 @@ pub const feature_fpregs = Feature{
 
 pub const feature_fpregs16 = Feature{
     .name = "fpregs16",
+    .llvm_name = "fpregs16",
     .description = "Enable 16-bit FP registers",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -219,6 +247,7 @@ pub const feature_fpregs16 = Feature{
 
 pub const feature_fpregs64 = Feature{
     .name = "fpregs64",
+    .llvm_name = "fpregs64",
     .description = "Enable 64-bit FP registers",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -227,15 +256,17 @@ pub const feature_fpregs64 = Feature{
 
 pub const feature_fullfp16 = Feature{
     .name = "fullfp16",
+    .llvm_name = "fullfp16",
     .description = "Enable full half-precision floating point",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
 pub const feature_fuseAes = Feature{
     .name = "fuse-aes",
+    .llvm_name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
     .dependencies = &[_]*const Feature {
     },
@@ -243,6 +274,7 @@ pub const feature_fuseAes = Feature{
 
 pub const feature_fuseLiterals = Feature{
     .name = "fuse-literals",
+    .llvm_name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
     .dependencies = &[_]*const Feature {
     },
@@ -250,6 +282,7 @@ pub const feature_fuseLiterals = Feature{
 
 pub const feature_hwdivArm = Feature{
     .name = "hwdiv-arm",
+    .llvm_name = "hwdiv-arm",
     .description = "Enable divide instructions in ARM mode",
     .dependencies = &[_]*const Feature {
     },
@@ -257,6 +290,7 @@ pub const feature_hwdivArm = Feature{
 
 pub const feature_hwdiv = Feature{
     .name = "hwdiv",
+    .llvm_name = "hwdiv",
     .description = "Enable divide instructions in Thumb",
     .dependencies = &[_]*const Feature {
     },
@@ -264,6 +298,7 @@ pub const feature_hwdiv = Feature{
 
 pub const feature_noBranchPredictor = Feature{
     .name = "no-branch-predictor",
+    .llvm_name = "no-branch-predictor",
     .description = "Has no branch predictor",
     .dependencies = &[_]*const Feature {
     },
@@ -271,6 +306,7 @@ pub const feature_noBranchPredictor = Feature{
 
 pub const feature_retAddrStack = Feature{
     .name = "ret-addr-stack",
+    .llvm_name = "ret-addr-stack",
     .description = "Has return address stack",
     .dependencies = &[_]*const Feature {
     },
@@ -278,6 +314,7 @@ pub const feature_retAddrStack = Feature{
 
 pub const feature_slowfpvmlx = Feature{
     .name = "slowfpvmlx",
+    .llvm_name = "slowfpvmlx",
     .description = "Disable VFP / NEON MAC instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -285,6 +322,7 @@ pub const feature_slowfpvmlx = Feature{
 
 pub const feature_vmlxHazards = Feature{
     .name = "vmlx-hazards",
+    .llvm_name = "vmlx-hazards",
     .description = "Has VMLx hazards",
     .dependencies = &[_]*const Feature {
     },
@@ -292,6 +330,7 @@ pub const feature_vmlxHazards = Feature{
 
 pub const feature_lob = Feature{
     .name = "lob",
+    .llvm_name = "lob",
     .description = "Enable Low Overhead Branch extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -299,6 +338,7 @@ pub const feature_lob = Feature{
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
+    .llvm_name = "long-calls",
     .description = "Generate calls via indirect call instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -306,6 +346,7 @@ pub const feature_longCalls = Feature{
 
 pub const feature_mclass = Feature{
     .name = "mclass",
+    .llvm_name = "mclass",
     .description = "Is microcontroller profile ('M' series)",
     .dependencies = &[_]*const Feature {
     },
@@ -313,6 +354,7 @@ pub const feature_mclass = Feature{
 
 pub const feature_mp = Feature{
     .name = "mp",
+    .llvm_name = "mp",
     .description = "Supports Multiprocessing extension",
     .dependencies = &[_]*const Feature {
     },
@@ -320,6 +362,7 @@ pub const feature_mp = Feature{
 
 pub const feature_mve1beat = Feature{
     .name = "mve1beat",
+    .llvm_name = "mve1beat",
     .description = "Model MVE instructions as a 1 beat per tick architecture",
     .dependencies = &[_]*const Feature {
     },
@@ -327,6 +370,7 @@ pub const feature_mve1beat = Feature{
 
 pub const feature_mve2beat = Feature{
     .name = "mve2beat",
+    .llvm_name = "mve2beat",
     .description = "Model MVE instructions as a 2 beats per tick architecture",
     .dependencies = &[_]*const Feature {
     },
@@ -334,6 +378,7 @@ pub const feature_mve2beat = Feature{
 
 pub const feature_mve4beat = Feature{
     .name = "mve4beat",
+    .llvm_name = "mve4beat",
     .description = "Model MVE instructions as a 4 beats per tick architecture",
     .dependencies = &[_]*const Feature {
     },
@@ -341,6 +386,7 @@ pub const feature_mve4beat = Feature{
 
 pub const feature_muxedUnits = Feature{
     .name = "muxed-units",
+    .llvm_name = "muxed-units",
     .description = "Has muxed AGU and NEON/FPU",
     .dependencies = &[_]*const Feature {
     },
@@ -348,6 +394,7 @@ pub const feature_muxedUnits = Feature{
 
 pub const feature_neon = Feature{
     .name = "neon",
+    .llvm_name = "neon",
     .description = "Enable NEON instructions",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -357,6 +404,7 @@ pub const feature_neon = Feature{
 
 pub const feature_neonfp = Feature{
     .name = "neonfp",
+    .llvm_name = "neonfp",
     .description = "Use NEON for single precision FP",
     .dependencies = &[_]*const Feature {
     },
@@ -364,6 +412,7 @@ pub const feature_neonfp = Feature{
 
 pub const feature_neonFpmovs = Feature{
     .name = "neon-fpmovs",
+    .llvm_name = "neon-fpmovs",
     .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
     .dependencies = &[_]*const Feature {
     },
@@ -371,6 +420,7 @@ pub const feature_neonFpmovs = Feature{
 
 pub const feature_naclTrap = Feature{
     .name = "nacl-trap",
+    .llvm_name = "nacl-trap",
     .description = "NaCl trap",
     .dependencies = &[_]*const Feature {
     },
@@ -378,6 +428,7 @@ pub const feature_naclTrap = Feature{
 
 pub const feature_noarm = Feature{
     .name = "noarm",
+    .llvm_name = "noarm",
     .description = "Does not support ARM mode execution",
     .dependencies = &[_]*const Feature {
     },
@@ -385,6 +436,7 @@ pub const feature_noarm = Feature{
 
 pub const feature_noMovt = Feature{
     .name = "no-movt",
+    .llvm_name = "no-movt",
     .description = "Don't use movt/movw pairs for 32-bit imms",
     .dependencies = &[_]*const Feature {
     },
@@ -392,6 +444,7 @@ pub const feature_noMovt = Feature{
 
 pub const feature_noNegImmediates = Feature{
     .name = "no-neg-immediates",
+    .llvm_name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
     .dependencies = &[_]*const Feature {
     },
@@ -399,6 +452,7 @@ pub const feature_noNegImmediates = Feature{
 
 pub const feature_disablePostraScheduler = Feature{
     .name = "disable-postra-scheduler",
+    .llvm_name = "disable-postra-scheduler",
     .description = "Don't schedule again after register allocation",
     .dependencies = &[_]*const Feature {
     },
@@ -406,6 +460,7 @@ pub const feature_disablePostraScheduler = Feature{
 
 pub const feature_nonpipelinedVfp = Feature{
     .name = "nonpipelined-vfp",
+    .llvm_name = "nonpipelined-vfp",
     .description = "VFP instructions are not pipelined",
     .dependencies = &[_]*const Feature {
     },
@@ -413,6 +468,7 @@ pub const feature_nonpipelinedVfp = Feature{
 
 pub const feature_perfmon = Feature{
     .name = "perfmon",
+    .llvm_name = "perfmon",
     .description = "Enable support for Performance Monitor extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -420,6 +476,7 @@ pub const feature_perfmon = Feature{
 
 pub const feature_bit32 = Feature{
     .name = "32bit",
+    .llvm_name = "32bit",
     .description = "Prefer 32-bit Thumb instrs",
     .dependencies = &[_]*const Feature {
     },
@@ -427,6 +484,7 @@ pub const feature_bit32 = Feature{
 
 pub const feature_preferIshst = Feature{
     .name = "prefer-ishst",
+    .llvm_name = "prefer-ishst",
     .description = "Prefer ISHST barriers",
     .dependencies = &[_]*const Feature {
     },
@@ -434,6 +492,7 @@ pub const feature_preferIshst = Feature{
 
 pub const feature_loopAlign = Feature{
     .name = "loop-align",
+    .llvm_name = "loop-align",
     .description = "Prefer 32-bit alignment for loops",
     .dependencies = &[_]*const Feature {
     },
@@ -441,6 +500,7 @@ pub const feature_loopAlign = Feature{
 
 pub const feature_preferVmovsr = Feature{
     .name = "prefer-vmovsr",
+    .llvm_name = "prefer-vmovsr",
     .description = "Prefer VMOVSR",
     .dependencies = &[_]*const Feature {
     },
@@ -448,6 +508,7 @@ pub const feature_preferVmovsr = Feature{
 
 pub const feature_profUnpr = Feature{
     .name = "prof-unpr",
+    .llvm_name = "prof-unpr",
     .description = "Is profitable to unpredicate",
     .dependencies = &[_]*const Feature {
     },
@@ -455,6 +516,7 @@ pub const feature_profUnpr = Feature{
 
 pub const feature_ras = Feature{
     .name = "ras",
+    .llvm_name = "ras",
     .description = "Enable Reliability, Availability and Serviceability extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -462,6 +524,7 @@ pub const feature_ras = Feature{
 
 pub const feature_rclass = Feature{
     .name = "rclass",
+    .llvm_name = "rclass",
     .description = "Is realtime profile ('R' series)",
     .dependencies = &[_]*const Feature {
     },
@@ -469,6 +532,7 @@ pub const feature_rclass = Feature{
 
 pub const feature_readTpHard = Feature{
     .name = "read-tp-hard",
+    .llvm_name = "read-tp-hard",
     .description = "Reading thread pointer from register",
     .dependencies = &[_]*const Feature {
     },
@@ -476,6 +540,7 @@ pub const feature_readTpHard = Feature{
 
 pub const feature_reserveR9 = Feature{
     .name = "reserve-r9",
+    .llvm_name = "reserve-r9",
     .description = "Reserve R9, making it unavailable as GPR",
     .dependencies = &[_]*const Feature {
     },
@@ -483,6 +548,7 @@ pub const feature_reserveR9 = Feature{
 
 pub const feature_sb = Feature{
     .name = "sb",
+    .llvm_name = "sb",
     .description = "Enable v8.5a Speculation Barrier",
     .dependencies = &[_]*const Feature {
     },
@@ -490,6 +556,7 @@ pub const feature_sb = Feature{
 
 pub const feature_sha2 = Feature{
     .name = "sha2",
+    .llvm_name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -499,6 +566,7 @@ pub const feature_sha2 = Feature{
 
 pub const feature_slowFpBrcc = Feature{
     .name = "slow-fp-brcc",
+    .llvm_name = "slow-fp-brcc",
     .description = "FP compare + branch is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -506,6 +574,7 @@ pub const feature_slowFpBrcc = Feature{
 
 pub const feature_slowLoadDSubreg = Feature{
     .name = "slow-load-D-subreg",
+    .llvm_name = "slow-load-D-subreg",
     .description = "Loading into D subregs is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -513,6 +582,7 @@ pub const feature_slowLoadDSubreg = Feature{
 
 pub const feature_slowOddReg = Feature{
     .name = "slow-odd-reg",
+    .llvm_name = "slow-odd-reg",
     .description = "VLDM/VSTM starting with an odd register is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -520,6 +590,7 @@ pub const feature_slowOddReg = Feature{
 
 pub const feature_slowVdup32 = Feature{
     .name = "slow-vdup32",
+    .llvm_name = "slow-vdup32",
     .description = "Has slow VDUP32 - prefer VMOV",
     .dependencies = &[_]*const Feature {
     },
@@ -527,6 +598,7 @@ pub const feature_slowVdup32 = Feature{
 
 pub const feature_slowVgetlni32 = Feature{
     .name = "slow-vgetlni32",
+    .llvm_name = "slow-vgetlni32",
     .description = "Has slow VGETLNi32 - prefer VMOV",
     .dependencies = &[_]*const Feature {
     },
@@ -534,6 +606,7 @@ pub const feature_slowVgetlni32 = Feature{
 
 pub const feature_splatVfpNeon = Feature{
     .name = "splat-vfp-neon",
+    .llvm_name = "splat-vfp-neon",
     .description = "Splat register from VFP to NEON",
     .dependencies = &[_]*const Feature {
         &feature_dontWidenVmovs,
@@ -542,6 +615,7 @@ pub const feature_splatVfpNeon = Feature{
 
 pub const feature_strictAlign = Feature{
     .name = "strict-align",
+    .llvm_name = "strict-align",
     .description = "Disallow all unaligned memory access",
     .dependencies = &[_]*const Feature {
     },
@@ -549,6 +623,7 @@ pub const feature_strictAlign = Feature{
 
 pub const feature_thumb2 = Feature{
     .name = "thumb2",
+    .llvm_name = "thumb2",
     .description = "Enable Thumb2 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -556,6 +631,7 @@ pub const feature_thumb2 = Feature{
 
 pub const feature_trustzone = Feature{
     .name = "trustzone",
+    .llvm_name = "trustzone",
     .description = "Enable support for TrustZone security extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -563,6 +639,7 @@ pub const feature_trustzone = Feature{
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
+    .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
     },
@@ -570,6 +647,7 @@ pub const feature_useAa = Feature{
 
 pub const feature_useMisched = Feature{
     .name = "use-misched",
+    .llvm_name = "use-misched",
     .description = "Use the MachineScheduler",
     .dependencies = &[_]*const Feature {
     },
@@ -577,6 +655,7 @@ pub const feature_useMisched = Feature{
 
 pub const feature_wideStrideVfp = Feature{
     .name = "wide-stride-vfp",
+    .llvm_name = "wide-stride-vfp",
     .description = "Use a wide stride when allocating VFP registers",
     .dependencies = &[_]*const Feature {
     },
@@ -584,6 +663,7 @@ pub const feature_wideStrideVfp = Feature{
 
 pub const feature_v7clrex = Feature{
     .name = "v7clrex",
+    .llvm_name = "v7clrex",
     .description = "Has v7 clrex instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -591,6 +671,7 @@ pub const feature_v7clrex = Feature{
 
 pub const feature_vfp2 = Feature{
     .name = "vfp2",
+    .llvm_name = "vfp2",
     .description = "Enable VFP2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -599,6 +680,7 @@ pub const feature_vfp2 = Feature{
 
 pub const feature_vfp2sp = Feature{
     .name = "vfp2sp",
+    .llvm_name = "vfp2sp",
     .description = "Enable VFP2 instructions with no double precision",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -607,6 +689,7 @@ pub const feature_vfp2sp = Feature{
 
 pub const feature_vfp3 = Feature{
     .name = "vfp3",
+    .llvm_name = "vfp3",
     .description = "Enable VFP3 instructions",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -616,6 +699,7 @@ pub const feature_vfp3 = Feature{
 
 pub const feature_vfp3d16 = Feature{
     .name = "vfp3d16",
+    .llvm_name = "vfp3d16",
     .description = "Enable VFP3 instructions with only 16 d-registers",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -624,6 +708,7 @@ pub const feature_vfp3d16 = Feature{
 
 pub const feature_vfp3d16sp = Feature{
     .name = "vfp3d16sp",
+    .llvm_name = "vfp3d16sp",
     .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
@@ -632,6 +717,7 @@ pub const feature_vfp3d16sp = Feature{
 
 pub const feature_vfp3sp = Feature{
     .name = "vfp3sp",
+    .llvm_name = "vfp3sp",
     .description = "Enable VFP3 instructions with no double precision",
     .dependencies = &[_]*const Feature {
         &feature_d32,
@@ -641,44 +727,49 @@ pub const feature_vfp3sp = Feature{
 
 pub const feature_vfp4 = Feature{
     .name = "vfp4",
+    .llvm_name = "vfp4",
     .description = "Enable VFP4 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
         &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vfp4d16 = Feature{
     .name = "vfp4d16",
+    .llvm_name = "vfp4d16",
     .description = "Enable VFP4 instructions with only 16 d-registers",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vfp4d16sp = Feature{
     .name = "vfp4d16sp",
+    .llvm_name = "vfp4d16sp",
     .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vfp4sp = Feature{
     .name = "vfp4sp",
+    .llvm_name = "vfp4sp",
     .description = "Enable VFP4 instructions with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
         &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
     },
 };
 
 pub const feature_vmlxForwarding = Feature{
     .name = "vmlx-forwarding",
+    .llvm_name = "vmlx-forwarding",
     .description = "Has multiplier accumulator forwarding",
     .dependencies = &[_]*const Feature {
     },
@@ -686,6 +777,7 @@ pub const feature_vmlxForwarding = Feature{
 
 pub const feature_virtualization = Feature{
     .name = "virtualization",
+    .llvm_name = "virtualization",
     .description = "Supports Virtualization extension",
     .dependencies = &[_]*const Feature {
         &feature_hwdiv,
@@ -695,6 +787,7 @@ pub const feature_virtualization = Feature{
 
 pub const feature_zcz = Feature{
     .name = "zcz",
+    .llvm_name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -854,8 +947,8 @@ pub const cpu_arm1156t2S = Cpu{
     .name = "arm1156t2-s",
     .llvm_name = "arm1156t2-s",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
+        &feature_thumb2,
     },
 };
 
@@ -863,8 +956,8 @@ pub const cpu_arm1156t2fS = Cpu{
     .name = "arm1156t2f-s",
     .llvm_name = "arm1156t2f-s",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
+        &feature_thumb2,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -1021,13 +1114,13 @@ pub const cpu_cortexA12 = Cpu{
     .name = "cortex-a12",
     .llvm_name = "cortex-a12",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -1046,13 +1139,13 @@ pub const cpu_cortexA15 = Cpu{
     .name = "cortex-a15",
     .llvm_name = "cortex-a15",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -1074,13 +1167,13 @@ pub const cpu_cortexA17 = Cpu{
     .name = "cortex-a17",
     .llvm_name = "cortex-a17",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
@@ -1099,20 +1192,20 @@ pub const cpu_cortexA32 = Cpu{
     .name = "cortex-a32",
     .llvm_name = "cortex-a32",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
     },
@@ -1122,20 +1215,20 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortex-a35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
     },
@@ -1145,13 +1238,13 @@ pub const cpu_cortexA5 = Cpu{
     .name = "cortex-a5",
     .llvm_name = "cortex-a5",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1168,20 +1261,20 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortex-a53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
         &feature_fpao,
@@ -1192,21 +1285,21 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortex-a55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_dotprod,
     },
@@ -1216,20 +1309,20 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortex-a57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
@@ -1242,13 +1335,13 @@ pub const cpu_cortexA7 = Cpu{
     .name = "cortex-a7",
     .llvm_name = "cortex-a7",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1269,20 +1362,20 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortex-a72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
     },
@@ -1292,20 +1385,20 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortex-a73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
     },
@@ -1315,21 +1408,21 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortex-a75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_dotprod,
     },
@@ -1339,21 +1432,21 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortex-a76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
         &feature_dotprod,
@@ -1365,21 +1458,21 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortex-a76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
         &feature_dotprod,
@@ -1391,13 +1484,13 @@ pub const cpu_cortexA8 = Cpu{
     .name = "cortex-a8",
     .llvm_name = "cortex-a8",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1413,13 +1506,13 @@ pub const cpu_cortexA9 = Cpu{
     .name = "cortex-a9",
     .llvm_name = "cortex-a9",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -1441,9 +1534,9 @@ pub const cpu_cortexM0 = Cpu{
     .llvm_name = "cortex-m0",
     .dependencies = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
+        &feature_mclass,
     },
 };
 
@@ -1452,9 +1545,9 @@ pub const cpu_cortexM0plus = Cpu{
     .llvm_name = "cortex-m0plus",
     .dependencies = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
+        &feature_mclass,
     },
 };
 
@@ -1463,9 +1556,9 @@ pub const cpu_cortexM1 = Cpu{
     .llvm_name = "cortex-m1",
     .dependencies = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
+        &feature_mclass,
     },
 };
 
@@ -1473,14 +1566,14 @@ pub const cpu_cortexM23 = Cpu{
     .name = "cortex-m23",
     .llvm_name = "cortex-m23",
     .dependencies = &[_]*const Feature {
-        &feature_mclass,
         &feature_db,
-        &feature_msecext8,
         &feature_strictAlign,
         &feature_acquireRelease,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_msecext8,
         &feature_noMovt,
     },
 };
@@ -1489,13 +1582,13 @@ pub const cpu_cortexM3 = Cpu{
     .name = "cortex-m3",
     .llvm_name = "cortex-m3",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_mclass,
-        &feature_thumb2,
-        &feature_hwdiv,
+        &feature_perfmon,
         &feature_v7clrex,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_loopAlign,
         &feature_useAa,
@@ -1507,15 +1600,15 @@ pub const cpu_cortexM33 = Cpu{
     .name = "cortex-m33",
     .llvm_name = "cortex-m33",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_mclass,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_acquireRelease,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
+        &feature_msecext8,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -1532,15 +1625,15 @@ pub const cpu_cortexM35p = Cpu{
     .name = "cortex-m35p",
     .llvm_name = "cortex-m35p",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_mclass,
         &feature_db,
-        &feature_msecext8,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_acquireRelease,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
+        &feature_msecext8,
         &feature_dsp,
         &feature_fp16,
         &feature_fpregs,
@@ -1557,21 +1650,21 @@ pub const cpu_cortexM4 = Cpu{
     .name = "cortex-m4",
     .llvm_name = "cortex-m4",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_mclass,
-        &feature_thumb2,
-        &feature_hwdiv,
+        &feature_perfmon,
         &feature_v7clrex,
         &feature_dsp,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
         &feature_loopAlign,
         &feature_useAa,
         &feature_useMisched,
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
         &feature_vfp4d16sp,
     },
 };
@@ -1580,14 +1673,14 @@ pub const cpu_cortexM7 = Cpu{
     .name = "cortex-m7",
     .llvm_name = "cortex-m7",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_mclass,
-        &feature_thumb2,
-        &feature_hwdiv,
+        &feature_perfmon,
         &feature_v7clrex,
         &feature_dsp,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_fp16,
         &feature_fpregs,
         &feature_fpArmv8d16,
@@ -1598,13 +1691,13 @@ pub const cpu_cortexR4 = Cpu{
     .name = "cortex-r4",
     .llvm_name = "cortex-r4",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_rclass,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
     },
@@ -1614,13 +1707,13 @@ pub const cpu_cortexR4f = Cpu{
     .name = "cortex-r4f",
     .llvm_name = "cortex-r4f",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_rclass,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1634,13 +1727,13 @@ pub const cpu_cortexR5 = Cpu{
     .name = "cortex-r5",
     .llvm_name = "cortex-r5",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_rclass,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
         &feature_retAddrStack,
@@ -1655,21 +1748,21 @@ pub const cpu_cortexR52 = Cpu{
     .name = "cortex-r52",
     .llvm_name = "cortex-r52",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_perfmon,
-        &feature_thumb2,
+        &feature_fpregs,
         &feature_rclass,
-        &feature_mp,
         &feature_acquireRelease,
-        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
+        &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_dfb,
-        &feature_dsp,
         &feature_fpao,
         &feature_useAa,
         &feature_useMisched,
@@ -1680,13 +1773,13 @@ pub const cpu_cortexR7 = Cpu{
     .name = "cortex-r7",
     .llvm_name = "cortex-r7",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_rclass,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1703,13 +1796,13 @@ pub const cpu_cortexR8 = Cpu{
     .name = "cortex-r8",
     .llvm_name = "cortex-r8",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_thumb2,
+        &feature_perfmon,
         &feature_rclass,
-        &feature_hwdiv,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1726,20 +1819,20 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
@@ -1765,33 +1858,33 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynos-m1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
+        &feature_expandFpMlx,
         &feature_fuseLiterals,
-        &feature_profUnpr,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
         &feature_wideStrideVfp,
+        &feature_profUnpr,
         &feature_slowVdup32,
-        &feature_slowVgetlni32,
+        &feature_slowfpvmlx,
         &feature_dontWidenVmovs,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
         &feature_zcz,
-        &feature_useAa,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
     },
 };
@@ -1800,33 +1893,33 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynos-m2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
+        &feature_expandFpMlx,
         &feature_fuseLiterals,
-        &feature_profUnpr,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
         &feature_wideStrideVfp,
+        &feature_profUnpr,
         &feature_slowVdup32,
-        &feature_slowVgetlni32,
+        &feature_slowfpvmlx,
         &feature_dontWidenVmovs,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
         &feature_zcz,
-        &feature_useAa,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
     },
 };
@@ -1835,33 +1928,33 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynos-m3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
+        &feature_expandFpMlx,
         &feature_fuseLiterals,
-        &feature_profUnpr,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
         &feature_wideStrideVfp,
+        &feature_profUnpr,
         &feature_slowVdup32,
-        &feature_slowVgetlni32,
+        &feature_slowfpvmlx,
         &feature_dontWidenVmovs,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
         &feature_zcz,
-        &feature_useAa,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
     },
 };
@@ -1870,36 +1963,36 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynos-m4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_dotprod,
         &feature_fullfp16,
+        &feature_expandFpMlx,
         &feature_fuseLiterals,
-        &feature_profUnpr,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
         &feature_wideStrideVfp,
+        &feature_profUnpr,
         &feature_slowVdup32,
-        &feature_slowVgetlni32,
+        &feature_slowfpvmlx,
         &feature_dontWidenVmovs,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
         &feature_zcz,
-        &feature_useAa,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
     },
 };
@@ -1908,36 +2001,36 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynos-m5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_dotprod,
         &feature_fullfp16,
+        &feature_expandFpMlx,
         &feature_fuseLiterals,
-        &feature_profUnpr,
+        &feature_fuseAes,
+        &feature_slowVgetlni32,
         &feature_wideStrideVfp,
+        &feature_profUnpr,
         &feature_slowVdup32,
-        &feature_slowVgetlni32,
+        &feature_slowfpvmlx,
         &feature_dontWidenVmovs,
-        &feature_fuseAes,
+        &feature_useAa,
         &feature_retAddrStack,
-        &feature_expandFpMlx,
         &feature_zcz,
-        &feature_useAa,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
     },
 };
@@ -1960,13 +2053,13 @@ pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
@@ -1984,20 +2077,20 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
         &feature_db,
-        &feature_crc,
-        &feature_fp16,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
     },
@@ -2024,21 +2117,21 @@ pub const cpu_neoverseN1 = Cpu{
     .name = "neoverse-n1",
     .llvm_name = "neoverse-n1",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_hwdivArm,
-        &feature_fpregs,
-        &feature_db,
-        &feature_crc,
-        &feature_fp16,
         &feature_ras,
+        &feature_db,
+        &feature_trustzone,
         &feature_perfmon,
-        &feature_thumb2,
-        &feature_mp,
+        &feature_fpregs,
         &feature_acquireRelease,
-        &feature_hwdiv,
-        &feature_trustzone,
+        &feature_mp,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_crc,
+        &feature_fp16,
+        &feature_hwdiv,
+        &feature_hwdivArm,
+        &feature_thumb2,
         &feature_aclass,
         &feature_crypto,
         &feature_dotprod,
@@ -2050,9 +2143,9 @@ pub const cpu_sc000 = Cpu{
     .llvm_name = "sc000",
     .dependencies = &[_]*const Feature {
         &feature_db,
-        &feature_mclass,
         &feature_strictAlign,
         &feature_noarm,
+        &feature_mclass,
     },
 };
 
@@ -2060,13 +2153,13 @@ pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
         &feature_db,
-        &feature_mclass,
-        &feature_thumb2,
-        &feature_hwdiv,
+        &feature_perfmon,
         &feature_v7clrex,
         &feature_noarm,
+        &feature_mclass,
+        &feature_hwdiv,
+        &feature_thumb2,
         &feature_noBranchPredictor,
         &feature_useAa,
         &feature_useMisched,
@@ -2105,13 +2198,13 @@ pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
+        &feature_db,
         &feature_perfmon,
         &feature_fpregs,
-        &feature_db,
-        &feature_thumb2,
+        &feature_d32,
         &feature_v7clrex,
         &feature_dsp,
+        &feature_thumb2,
         &feature_aclass,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index de44399ceaef6b81ebf6d83c3711f3a3b2cc788e..ac5c8f17111c23ac40c75d971f2ae8604070c984 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_addsubiw = Feature{
     .name = "addsubiw",
+    .llvm_name = "addsubiw",
     .description = "Enable 16-bit register-immediate addition and subtraction instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_addsubiw = Feature{
 
 pub const feature_break = Feature{
     .name = "break",
+    .llvm_name = "break",
     .description = "The device supports the `BREAK` debugging instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_break = Feature{
 
 pub const feature_des = Feature{
     .name = "des",
+    .llvm_name = "des",
     .description = "The device supports the `DES k` encryption instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_des = Feature{
 
 pub const feature_eijmpcall = Feature{
     .name = "eijmpcall",
+    .llvm_name = "eijmpcall",
     .description = "The device supports the `EIJMP`/`EICALL` instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_eijmpcall = Feature{
 
 pub const feature_elpm = Feature{
     .name = "elpm",
+    .llvm_name = "elpm",
     .description = "The device supports the ELPM instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_elpm = Feature{
 
 pub const feature_elpmx = Feature{
     .name = "elpmx",
+    .llvm_name = "elpmx",
     .description = "The device supports the `ELPM Rd, Z[+]` instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_elpmx = Feature{
 
 pub const feature_ijmpcall = Feature{
     .name = "ijmpcall",
+    .llvm_name = "ijmpcall",
     .description = "The device supports `IJMP`/`ICALL`instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_ijmpcall = Feature{
 
 pub const feature_jmpcall = Feature{
     .name = "jmpcall",
+    .llvm_name = "jmpcall",
     .description = "The device supports the `JMP` and `CALL` instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_jmpcall = Feature{
 
 pub const feature_lpm = Feature{
     .name = "lpm",
+    .llvm_name = "lpm",
     .description = "The device supports the `LPM` instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_lpm = Feature{
 
 pub const feature_lpmx = Feature{
     .name = "lpmx",
+    .llvm_name = "lpmx",
     .description = "The device supports the `LPM Rd, Z[+]` instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -73,6 +83,7 @@ pub const feature_lpmx = Feature{
 
 pub const feature_movw = Feature{
     .name = "movw",
+    .llvm_name = "movw",
     .description = "The device supports the 16-bit MOVW instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -80,6 +91,7 @@ pub const feature_movw = Feature{
 
 pub const feature_mul = Feature{
     .name = "mul",
+    .llvm_name = "mul",
     .description = "The device supports the multiplication instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -87,6 +99,7 @@ pub const feature_mul = Feature{
 
 pub const feature_rmw = Feature{
     .name = "rmw",
+    .llvm_name = "rmw",
     .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
     .dependencies = &[_]*const Feature {
     },
@@ -94,6 +107,7 @@ pub const feature_rmw = Feature{
 
 pub const feature_spm = Feature{
     .name = "spm",
+    .llvm_name = "spm",
     .description = "The device supports the `SPM` instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -101,6 +115,7 @@ pub const feature_spm = Feature{
 
 pub const feature_spmx = Feature{
     .name = "spmx",
+    .llvm_name = "spmx",
     .description = "The device supports the `SPM Z+` instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -108,6 +123,7 @@ pub const feature_spmx = Feature{
 
 pub const feature_sram = Feature{
     .name = "sram",
+    .llvm_name = "sram",
     .description = "The device has random access memory",
     .dependencies = &[_]*const Feature {
     },
@@ -115,6 +131,7 @@ pub const feature_sram = Feature{
 
 pub const feature_smallstack = Feature{
     .name = "smallstack",
+    .llvm_name = "smallstack",
     .description = "The device has an 8-bit stack pointer",
     .dependencies = &[_]*const Feature {
     },
@@ -122,6 +139,7 @@ pub const feature_smallstack = Feature{
 
 pub const feature_tinyencoding = Feature{
     .name = "tinyencoding",
+    .llvm_name = "tinyencoding",
     .description = "The device has Tiny core specific instruction encodings",
     .dependencies = &[_]*const Feature {
     },
@@ -152,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
     .dependencies = &[_]*const Feature {
-        &feature_elpm,
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_elpm,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -165,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{
     .name = "at43usb355",
     .llvm_name = "at43usb355",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -177,11 +195,11 @@ pub const cpu_at76c711 = Cpu{
     .name = "at76c711",
     .llvm_name = "at76c711",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -189,10 +207,10 @@ pub const cpu_at86rf401 = Cpu{
     .name = "at86rf401",
     .llvm_name = "at86rf401",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
     },
@@ -202,10 +220,10 @@ pub const cpu_at90c8534 = Cpu{
     .name = "at90c8534",
     .llvm_name = "at90c8534",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -213,18 +231,18 @@ pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -232,16 +250,16 @@ pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -249,16 +267,16 @@ pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -266,15 +284,15 @@ pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -282,16 +300,16 @@ pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -299,15 +317,15 @@ pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -315,16 +333,16 @@ pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -332,15 +350,15 @@ pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -348,15 +366,15 @@ pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -364,16 +382,16 @@ pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -381,15 +399,15 @@ pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -397,15 +415,15 @@ pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -420,10 +438,10 @@ pub const cpu_at90s2313 = Cpu{
     .name = "at90s2313",
     .llvm_name = "at90s2313",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -431,10 +449,10 @@ pub const cpu_at90s2323 = Cpu{
     .name = "at90s2323",
     .llvm_name = "at90s2323",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -442,10 +460,10 @@ pub const cpu_at90s2333 = Cpu{
     .name = "at90s2333",
     .llvm_name = "at90s2333",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -453,10 +471,10 @@ pub const cpu_at90s2343 = Cpu{
     .name = "at90s2343",
     .llvm_name = "at90s2343",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -464,10 +482,10 @@ pub const cpu_at90s4414 = Cpu{
     .name = "at90s4414",
     .llvm_name = "at90s4414",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -475,10 +493,10 @@ pub const cpu_at90s4433 = Cpu{
     .name = "at90s4433",
     .llvm_name = "at90s4433",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -486,10 +504,10 @@ pub const cpu_at90s4434 = Cpu{
     .name = "at90s4434",
     .llvm_name = "at90s4434",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -497,10 +515,10 @@ pub const cpu_at90s8515 = Cpu{
     .name = "at90s8515",
     .llvm_name = "at90s8515",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -508,10 +526,10 @@ pub const cpu_at90s8535 = Cpu{
     .name = "at90s8535",
     .llvm_name = "at90s8535",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -519,16 +537,16 @@ pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -536,18 +554,18 @@ pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -555,18 +573,18 @@ pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -574,15 +592,15 @@ pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -590,16 +608,16 @@ pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -607,16 +625,16 @@ pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -624,15 +642,15 @@ pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -640,11 +658,11 @@ pub const cpu_at94k = Cpu{
     .name = "at94k",
     .llvm_name = "at94k",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -655,14 +673,14 @@ pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -670,15 +688,15 @@ pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -686,16 +704,16 @@ pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -703,16 +721,16 @@ pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -720,15 +738,15 @@ pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -736,15 +754,15 @@ pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -752,15 +770,15 @@ pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -768,12 +786,12 @@ pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
     .dependencies = &[_]*const Feature {
-        &feature_elpm,
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_elpm,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -781,18 +799,18 @@ pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -800,18 +818,18 @@ pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -819,18 +837,18 @@ pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -838,18 +856,18 @@ pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -857,18 +875,18 @@ pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -876,18 +894,18 @@ pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -895,18 +913,18 @@ pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -914,18 +932,18 @@ pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -933,18 +951,18 @@ pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -952,16 +970,16 @@ pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -969,11 +987,11 @@ pub const cpu_atmega161 = Cpu{
     .name = "atmega161",
     .llvm_name = "atmega161",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -985,16 +1003,16 @@ pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1002,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{
     .name = "atmega163",
     .llvm_name = "atmega163",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1018,16 +1036,16 @@ pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1035,16 +1053,16 @@ pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1052,16 +1070,16 @@ pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1069,16 +1087,16 @@ pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1086,16 +1104,16 @@ pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1103,16 +1121,16 @@ pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1120,16 +1138,16 @@ pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1137,16 +1155,16 @@ pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1154,16 +1172,16 @@ pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1171,16 +1189,16 @@ pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1188,16 +1206,16 @@ pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1205,16 +1223,16 @@ pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1222,16 +1240,16 @@ pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1239,16 +1257,16 @@ pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1256,16 +1274,16 @@ pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1273,16 +1291,16 @@ pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1290,16 +1308,16 @@ pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1307,16 +1325,16 @@ pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1324,16 +1342,16 @@ pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1341,16 +1359,16 @@ pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1358,16 +1376,16 @@ pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1375,15 +1393,15 @@ pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1391,16 +1409,16 @@ pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1408,18 +1426,18 @@ pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -1427,18 +1445,18 @@ pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -1446,18 +1464,18 @@ pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -1465,18 +1483,18 @@ pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -1484,16 +1502,16 @@ pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1501,16 +1519,16 @@ pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1518,16 +1536,16 @@ pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1535,16 +1553,16 @@ pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1552,16 +1570,16 @@ pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1569,16 +1587,16 @@ pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1586,16 +1604,16 @@ pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1603,16 +1621,16 @@ pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1620,16 +1638,16 @@ pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1637,16 +1655,16 @@ pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1654,16 +1672,16 @@ pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1671,16 +1689,16 @@ pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1688,16 +1706,16 @@ pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1705,16 +1723,16 @@ pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1722,16 +1740,16 @@ pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1739,16 +1757,16 @@ pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1756,16 +1774,16 @@ pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1773,16 +1791,16 @@ pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1790,16 +1808,16 @@ pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1807,16 +1825,16 @@ pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1824,16 +1842,16 @@ pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1841,16 +1859,16 @@ pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1858,16 +1876,16 @@ pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1875,16 +1893,16 @@ pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1892,16 +1910,16 @@ pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1909,16 +1927,16 @@ pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1926,16 +1944,16 @@ pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1943,16 +1961,16 @@ pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1960,15 +1978,15 @@ pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1976,16 +1994,16 @@ pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -1993,16 +2011,16 @@ pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2010,16 +2028,16 @@ pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2027,15 +2045,15 @@ pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2043,15 +2061,15 @@ pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2059,15 +2077,15 @@ pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2075,15 +2093,15 @@ pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2091,16 +2109,16 @@ pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2108,16 +2126,16 @@ pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2125,16 +2143,16 @@ pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2142,16 +2160,16 @@ pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2159,16 +2177,16 @@ pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2176,16 +2194,16 @@ pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2193,16 +2211,16 @@ pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2210,16 +2228,16 @@ pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2227,16 +2245,16 @@ pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2244,16 +2262,16 @@ pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2261,16 +2279,16 @@ pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2278,16 +2296,16 @@ pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2295,16 +2313,16 @@ pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2312,16 +2330,16 @@ pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2329,16 +2347,16 @@ pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2346,16 +2364,16 @@ pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2363,16 +2381,16 @@ pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2380,16 +2398,16 @@ pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2397,16 +2415,16 @@ pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2414,16 +2432,16 @@ pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2431,16 +2449,16 @@ pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2448,16 +2466,16 @@ pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2465,16 +2483,16 @@ pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2482,16 +2500,16 @@ pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2499,15 +2517,15 @@ pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2515,10 +2533,10 @@ pub const cpu_atmega8515 = Cpu{
     .name = "atmega8515",
     .llvm_name = "atmega8515",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -2530,10 +2548,10 @@ pub const cpu_atmega8535 = Cpu{
     .name = "atmega8535",
     .llvm_name = "atmega8535",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -2545,15 +2563,15 @@ pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2561,15 +2579,15 @@ pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2577,15 +2595,15 @@ pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2593,15 +2611,15 @@ pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2609,15 +2627,15 @@ pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2625,15 +2643,15 @@ pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2641,15 +2659,15 @@ pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2657,9 +2675,9 @@ pub const cpu_attiny10 = Cpu{
     .name = "attiny10",
     .llvm_name = "attiny10",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2667,9 +2685,9 @@ pub const cpu_attiny102 = Cpu{
     .name = "attiny102",
     .llvm_name = "attiny102",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2677,9 +2695,9 @@ pub const cpu_attiny104 = Cpu{
     .name = "attiny104",
     .llvm_name = "attiny104",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2703,14 +2721,14 @@ pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2718,14 +2736,14 @@ pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2741,15 +2759,15 @@ pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2757,15 +2775,15 @@ pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2773,9 +2791,9 @@ pub const cpu_attiny20 = Cpu{
     .name = "attiny20",
     .llvm_name = "attiny20",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2783,10 +2801,10 @@ pub const cpu_attiny22 = Cpu{
     .name = "attiny22",
     .llvm_name = "attiny22",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -2794,14 +2812,14 @@ pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2809,14 +2827,14 @@ pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2824,14 +2842,14 @@ pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2839,14 +2857,14 @@ pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2854,14 +2872,14 @@ pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2869,10 +2887,10 @@ pub const cpu_attiny26 = Cpu{
     .name = "attiny26",
     .llvm_name = "attiny26",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
         &feature_lpmx,
     },
 };
@@ -2881,14 +2899,14 @@ pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2896,14 +2914,14 @@ pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2919,9 +2937,9 @@ pub const cpu_attiny4 = Cpu{
     .name = "attiny4",
     .llvm_name = "attiny4",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2929,9 +2947,9 @@ pub const cpu_attiny40 = Cpu{
     .name = "attiny40",
     .llvm_name = "attiny40",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -2939,14 +2957,14 @@ pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2954,14 +2972,14 @@ pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2969,14 +2987,14 @@ pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2984,14 +3002,14 @@ pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -2999,14 +3017,14 @@ pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3014,14 +3032,14 @@ pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3029,14 +3047,14 @@ pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3044,14 +3062,14 @@ pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3059,9 +3077,9 @@ pub const cpu_attiny5 = Cpu{
     .name = "attiny5",
     .llvm_name = "attiny5",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -3069,14 +3087,14 @@ pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3084,14 +3102,14 @@ pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3099,14 +3117,14 @@ pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3114,14 +3132,14 @@ pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3129,14 +3147,14 @@ pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3144,14 +3162,14 @@ pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3159,14 +3177,14 @@ pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3174,14 +3192,14 @@ pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -3189,9 +3207,9 @@ pub const cpu_attiny9 = Cpu{
     .name = "attiny9",
     .llvm_name = "attiny9",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -3199,21 +3217,21 @@ pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3221,22 +3239,22 @@ pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3244,21 +3262,21 @@ pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3266,22 +3284,22 @@ pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3289,22 +3307,22 @@ pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3312,22 +3330,22 @@ pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3335,22 +3353,22 @@ pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3358,22 +3376,22 @@ pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3381,21 +3399,21 @@ pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3403,21 +3421,21 @@ pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3425,21 +3443,21 @@ pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3447,22 +3465,22 @@ pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3470,22 +3488,22 @@ pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3493,21 +3511,21 @@ pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3515,21 +3533,21 @@ pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3537,21 +3555,21 @@ pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3559,22 +3577,22 @@ pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3582,22 +3600,22 @@ pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3605,21 +3623,21 @@ pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3627,21 +3645,21 @@ pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3649,21 +3667,21 @@ pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3671,22 +3689,22 @@ pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3694,22 +3712,22 @@ pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3717,22 +3735,22 @@ pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3740,21 +3758,21 @@ pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3762,21 +3780,21 @@ pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3784,22 +3802,22 @@ pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3807,22 +3825,22 @@ pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3830,21 +3848,21 @@ pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3852,21 +3870,21 @@ pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3874,21 +3892,21 @@ pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3896,22 +3914,22 @@ pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3919,21 +3937,21 @@ pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3941,21 +3959,21 @@ pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -3963,22 +3981,22 @@ pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -3986,21 +4004,21 @@ pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4008,22 +4026,22 @@ pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -4031,22 +4049,22 @@ pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -4054,22 +4072,22 @@ pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -4077,22 +4095,22 @@ pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -4100,22 +4118,22 @@ pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_elpm,
-        &feature_spm,
-        &feature_lpm,
-        &feature_ijmpcall,
-        &feature_elpmx,
+        &feature_des,
         &feature_sram,
-        &feature_spmx,
-        &feature_break,
+        &feature_movw,
         &feature_jmpcall,
-        &feature_des,
-        &feature_rmw,
         &feature_mul,
-        &feature_eijmpcall,
-        &feature_movw,
+        &feature_elpm,
+        &feature_spmx,
+        &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
         &feature_addsubiw,
+        &feature_rmw,
+        &feature_ijmpcall,
+        &feature_eijmpcall,
+        &feature_break,
+        &feature_elpmx,
     },
 };
 
@@ -4123,21 +4141,21 @@ pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4145,21 +4163,21 @@ pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4167,21 +4185,21 @@ pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4197,10 +4215,10 @@ pub const cpu_avr2 = Cpu{
     .name = "avr2",
     .llvm_name = "avr2",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -4208,14 +4226,14 @@ pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -4223,11 +4241,11 @@ pub const cpu_avr3 = Cpu{
     .name = "avr3",
     .llvm_name = "avr3",
     .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -4235,12 +4253,12 @@ pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
     .dependencies = &[_]*const Feature {
-        &feature_elpm,
-        &feature_lpm,
-        &feature_ijmpcall,
         &feature_sram,
         &feature_jmpcall,
+        &feature_elpm,
+        &feature_lpm,
         &feature_addsubiw,
+        &feature_ijmpcall,
     },
 };
 
@@ -4248,15 +4266,15 @@ pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -4264,15 +4282,15 @@ pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -4280,16 +4298,16 @@ pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -4297,18 +4315,18 @@ pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
-        &feature_spm,
         &feature_lpm,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
         &feature_elpmx,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
@@ -4316,18 +4334,18 @@ pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4335,9 +4353,9 @@ pub const cpu_avrtiny = Cpu{
     .name = "avrtiny",
     .llvm_name = "avrtiny",
     .dependencies = &[_]*const Feature {
-        &feature_break,
-        &feature_tinyencoding,
         &feature_sram,
+        &feature_tinyencoding,
+        &feature_break,
     },
 };
 
@@ -4345,21 +4363,21 @@ pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4367,21 +4385,21 @@ pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4389,21 +4407,21 @@ pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4411,21 +4429,21 @@ pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4433,21 +4451,21 @@ pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4455,21 +4473,21 @@ pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4477,21 +4495,21 @@ pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_des,
+        &feature_sram,
+        &feature_eijmpcall,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_elpm,
+        &feature_spmx,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_movw,
-        &feature_sram,
-        &feature_spmx,
-        &feature_break,
-        &feature_jmpcall,
-        &feature_des,
-        &feature_mul,
-        &feature_eijmpcall,
         &feature_elpmx,
-        &feature_addsubiw,
+        &feature_break,
+        &feature_movw,
     },
 };
 
@@ -4499,16 +4517,16 @@ pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
     .dependencies = &[_]*const Feature {
-        &feature_lpmx,
+        &feature_sram,
+        &feature_jmpcall,
+        &feature_mul,
         &feature_lpm,
+        &feature_lpmx,
         &feature_spm,
+        &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_sram,
         &feature_break,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_movw,
-        &feature_addsubiw,
     },
 };
 
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 9dc27093a6b18e141ac4cfb0556341861839204e..62c69746f8e9a0171d75050e9efa3d102876cac0 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_alu32 = Feature{
     .name = "alu32",
+    .llvm_name = "alu32",
     .description = "Enable ALU32 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_alu32 = Feature{
 
 pub const feature_dummy = Feature{
     .name = "dummy",
+    .llvm_name = "dummy",
     .description = "unused feature",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_dummy = Feature{
 
 pub const feature_dwarfris = Feature{
     .name = "dwarfris",
+    .llvm_name = "dwarfris",
     .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index a007ee10cf4984b8b15bb77fa746554c03f8de7a..7deecaa6c73a8f2b5159cdc687467943019292ac 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_duplex = Feature{
     .name = "duplex",
+    .llvm_name = "duplex",
     .description = "Enable generation of duplex instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_duplex = Feature{
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
+    .llvm_name = "long-calls",
     .description = "Use constant-extended calls",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_longCalls = Feature{
 
 pub const feature_mem_noshuf = Feature{
     .name = "mem_noshuf",
+    .llvm_name = "mem_noshuf",
     .description = "Supports mem_noshuf feature",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_mem_noshuf = Feature{
 
 pub const feature_memops = Feature{
     .name = "memops",
+    .llvm_name = "memops",
     .description = "Use memop instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_memops = Feature{
 
 pub const feature_nvj = Feature{
     .name = "nvj",
+    .llvm_name = "nvj",
     .description = "Support for new-value jumps",
     .dependencies = &[_]*const Feature {
         &feature_packets,
@@ -39,6 +44,7 @@ pub const feature_nvj = Feature{
 
 pub const feature_nvs = Feature{
     .name = "nvs",
+    .llvm_name = "nvs",
     .description = "Support for new-value stores",
     .dependencies = &[_]*const Feature {
         &feature_packets,
@@ -47,6 +53,7 @@ pub const feature_nvs = Feature{
 
 pub const feature_noreturnStackElim = Feature{
     .name = "noreturn-stack-elim",
+    .llvm_name = "noreturn-stack-elim",
     .description = "Eliminate stack allocation in a noreturn function when possible",
     .dependencies = &[_]*const Feature {
     },
@@ -54,6 +61,7 @@ pub const feature_noreturnStackElim = Feature{
 
 pub const feature_packets = Feature{
     .name = "packets",
+    .llvm_name = "packets",
     .description = "Support for instruction packets",
     .dependencies = &[_]*const Feature {
     },
@@ -61,6 +69,7 @@ pub const feature_packets = Feature{
 
 pub const feature_reservedR19 = Feature{
     .name = "reserved-r19",
+    .llvm_name = "reserved-r19",
     .description = "Reserve register R19",
     .dependencies = &[_]*const Feature {
     },
@@ -68,6 +77,7 @@ pub const feature_reservedR19 = Feature{
 
 pub const feature_smallData = Feature{
     .name = "small-data",
+    .llvm_name = "small-data",
     .description = "Allow GP-relative addressing of global variables",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index e7c26230af4583a094a6bc022e9bf17527d2c900..7b97a84f18d900ea206ec0aac64b0d7d37d1497d 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_abs2008 = Feature{
     .name = "abs2008",
+    .llvm_name = "abs2008",
     .description = "Disable IEEE 754-2008 abs.fmt mode",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_abs2008 = Feature{
 
 pub const feature_crc = Feature{
     .name = "crc",
+    .llvm_name = "crc",
     .description = "Mips R6 CRC ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -17,21 +19,23 @@ pub const feature_crc = Feature{
 
 pub const feature_cnmips = Feature{
     .name = "cnmips",
+    .llvm_name = "cnmips",
     .description = "Octeon cnMIPS Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_dsp = Feature{
     .name = "dsp",
+    .llvm_name = "dsp",
     .description = "Mips DSP ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -39,6 +43,7 @@ pub const feature_dsp = Feature{
 
 pub const feature_dspr2 = Feature{
     .name = "dspr2",
+    .llvm_name = "dspr2",
     .description = "Mips DSP-R2 ASE",
     .dependencies = &[_]*const Feature {
         &feature_dsp,
@@ -47,6 +52,7 @@ pub const feature_dspr2 = Feature{
 
 pub const feature_dspr3 = Feature{
     .name = "dspr3",
+    .llvm_name = "dspr3",
     .description = "Mips DSP-R3 ASE",
     .dependencies = &[_]*const Feature {
         &feature_dsp,
@@ -55,6 +61,7 @@ pub const feature_dspr3 = Feature{
 
 pub const feature_eva = Feature{
     .name = "eva",
+    .llvm_name = "eva",
     .description = "Mips EVA ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -62,6 +69,7 @@ pub const feature_eva = Feature{
 
 pub const feature_fp64 = Feature{
     .name = "fp64",
+    .llvm_name = "fp64",
     .description = "Support 64-bit FP registers",
     .dependencies = &[_]*const Feature {
     },
@@ -69,6 +77,7 @@ pub const feature_fp64 = Feature{
 
 pub const feature_fpxx = Feature{
     .name = "fpxx",
+    .llvm_name = "fpxx",
     .description = "Support for FPXX",
     .dependencies = &[_]*const Feature {
     },
@@ -76,6 +85,7 @@ pub const feature_fpxx = Feature{
 
 pub const feature_ginv = Feature{
     .name = "ginv",
+    .llvm_name = "ginv",
     .description = "Mips Global Invalidate ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -83,6 +93,7 @@ pub const feature_ginv = Feature{
 
 pub const feature_gp64 = Feature{
     .name = "gp64",
+    .llvm_name = "gp64",
     .description = "General Purpose Registers are 64-bit wide",
     .dependencies = &[_]*const Feature {
     },
@@ -90,6 +101,7 @@ pub const feature_gp64 = Feature{
 
 pub const feature_longCalls = Feature{
     .name = "long-calls",
+    .llvm_name = "long-calls",
     .description = "Disable use of the jal instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -97,6 +109,7 @@ pub const feature_longCalls = Feature{
 
 pub const feature_msa = Feature{
     .name = "msa",
+    .llvm_name = "msa",
     .description = "Mips MSA ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -104,6 +117,7 @@ pub const feature_msa = Feature{
 
 pub const feature_mt = Feature{
     .name = "mt",
+    .llvm_name = "mt",
     .description = "Mips MT ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -111,6 +125,7 @@ pub const feature_mt = Feature{
 
 pub const feature_nomadd4 = Feature{
     .name = "nomadd4",
+    .llvm_name = "nomadd4",
     .description = "Disable 4-operand madd.fmt and related instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -118,6 +133,7 @@ pub const feature_nomadd4 = Feature{
 
 pub const feature_micromips = Feature{
     .name = "micromips",
+    .llvm_name = "micromips",
     .description = "microMips mode",
     .dependencies = &[_]*const Feature {
     },
@@ -125,6 +141,7 @@ pub const feature_micromips = Feature{
 
 pub const feature_mips1 = Feature{
     .name = "mips1",
+    .llvm_name = "mips1",
     .description = "Mips I ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -132,6 +149,7 @@ pub const feature_mips1 = Feature{
 
 pub const feature_mips2 = Feature{
     .name = "mips2",
+    .llvm_name = "mips2",
     .description = "Mips II ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
         &feature_mips1,
@@ -140,18 +158,20 @@ pub const feature_mips2 = Feature{
 
 pub const feature_mips3 = Feature{
     .name = "mips3",
+    .llvm_name = "mips3",
     .description = "MIPS III ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips3_32 = Feature{
     .name = "mips3_32",
+    .llvm_name = "mips3_32",
     .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -159,6 +179,7 @@ pub const feature_mips3_32 = Feature{
 
 pub const feature_mips3_32r2 = Feature{
     .name = "mips3_32r2",
+    .llvm_name = "mips3_32r2",
     .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -166,20 +187,22 @@ pub const feature_mips3_32r2 = Feature{
 
 pub const feature_mips4 = Feature{
     .name = "mips4",
+    .llvm_name = "mips4",
     .description = "MIPS IV ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
+        &feature_mips4_32,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips4_32 = Feature{
     .name = "mips4_32",
+    .llvm_name = "mips4_32",
     .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -187,6 +210,7 @@ pub const feature_mips4_32 = Feature{
 
 pub const feature_mips4_32r2 = Feature{
     .name = "mips4_32r2",
+    .llvm_name = "mips4_32r2",
     .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -194,21 +218,23 @@ pub const feature_mips4_32r2 = Feature{
 
 pub const feature_mips5 = Feature{
     .name = "mips5",
+    .llvm_name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips5_32r2 = Feature{
     .name = "mips5_32r2",
+    .llvm_name = "mips5_32r2",
     .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
     .dependencies = &[_]*const Feature {
     },
@@ -216,6 +242,7 @@ pub const feature_mips5_32r2 = Feature{
 
 pub const feature_mips16 = Feature{
     .name = "mips16",
+    .llvm_name = "mips16",
     .description = "Mips16 mode",
     .dependencies = &[_]*const Feature {
     },
@@ -223,148 +250,159 @@ pub const feature_mips16 = Feature{
 
 pub const feature_mips32 = Feature{
     .name = "mips32",
+    .llvm_name = "mips32",
     .description = "Mips32 ISA Support",
     .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_mips3_32,
         &feature_mips4_32,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips32r2 = Feature{
     .name = "mips32r2",
+    .llvm_name = "mips32r2",
     .description = "Mips32r2 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips32r3 = Feature{
     .name = "mips32r3",
+    .llvm_name = "mips32r3",
     .description = "Mips32r3 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
         &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips32r5 = Feature{
     .name = "mips32r5",
+    .llvm_name = "mips32r5",
     .description = "Mips32r5 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips32r6 = Feature{
     .name = "mips32r6",
+    .llvm_name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_nan2008,
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips64 = Feature{
     .name = "mips64",
+    .llvm_name = "mips64",
     .description = "Mips64 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips64r2 = Feature{
     .name = "mips64r2",
+    .llvm_name = "mips64r2",
     .description = "Mips64r2 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips64r3 = Feature{
     .name = "mips64r3",
+    .llvm_name = "mips64r3",
     .description = "Mips64r3 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips64r5 = Feature{
     .name = "mips64r5",
+    .llvm_name = "mips64r5",
     .description = "Mips64r5 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_mips64r6 = Feature{
     .name = "mips64r6",
+    .llvm_name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_nan2008,
-        &feature_mips4_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
+        &feature_nan2008,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
 pub const feature_nan2008 = Feature{
     .name = "nan2008",
+    .llvm_name = "nan2008",
     .description = "IEEE 754-2008 NaN encoding",
     .dependencies = &[_]*const Feature {
     },
@@ -372,6 +410,7 @@ pub const feature_nan2008 = Feature{
 
 pub const feature_noabicalls = Feature{
     .name = "noabicalls",
+    .llvm_name = "noabicalls",
     .description = "Disable SVR4-style position-independent code",
     .dependencies = &[_]*const Feature {
     },
@@ -379,6 +418,7 @@ pub const feature_noabicalls = Feature{
 
 pub const feature_nooddspreg = Feature{
     .name = "nooddspreg",
+    .llvm_name = "nooddspreg",
     .description = "Disable odd numbered single-precision registers",
     .dependencies = &[_]*const Feature {
     },
@@ -386,6 +426,7 @@ pub const feature_nooddspreg = Feature{
 
 pub const feature_ptr64 = Feature{
     .name = "ptr64",
+    .llvm_name = "ptr64",
     .description = "Pointers are 64-bit wide",
     .dependencies = &[_]*const Feature {
     },
@@ -393,6 +434,7 @@ pub const feature_ptr64 = Feature{
 
 pub const feature_singleFloat = Feature{
     .name = "single-float",
+    .llvm_name = "single-float",
     .description = "Only supports single precision float",
     .dependencies = &[_]*const Feature {
     },
@@ -400,6 +442,7 @@ pub const feature_singleFloat = Feature{
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
+    .llvm_name = "soft-float",
     .description = "Does not support floating point instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -407,6 +450,7 @@ pub const feature_softFloat = Feature{
 
 pub const feature_sym32 = Feature{
     .name = "sym32",
+    .llvm_name = "sym32",
     .description = "Symbols are 32 bit on Mips64",
     .dependencies = &[_]*const Feature {
     },
@@ -414,6 +458,7 @@ pub const feature_sym32 = Feature{
 
 pub const feature_useIndirectJumpHazard = Feature{
     .name = "use-indirect-jump-hazard",
+    .llvm_name = "use-indirect-jump-hazard",
     .description = "Use indirect jump guards to prevent certain speculation based attacks",
     .dependencies = &[_]*const Feature {
     },
@@ -421,6 +466,7 @@ pub const feature_useIndirectJumpHazard = Feature{
 
 pub const feature_useTccInDiv = Feature{
     .name = "use-tcc-in-div",
+    .llvm_name = "use-tcc-in-div",
     .description = "Force the assembler to use trapping",
     .dependencies = &[_]*const Feature {
     },
@@ -428,6 +474,7 @@ pub const feature_useTccInDiv = Feature{
 
 pub const feature_vfpu = Feature{
     .name = "vfpu",
+    .llvm_name = "vfpu",
     .description = "Enable vector FPU instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -435,6 +482,7 @@ pub const feature_vfpu = Feature{
 
 pub const feature_virt = Feature{
     .name = "virt",
+    .llvm_name = "virt",
     .description = "Mips Virtualization ASE",
     .dependencies = &[_]*const Feature {
     },
@@ -442,6 +490,7 @@ pub const feature_virt = Feature{
 
 pub const feature_xgot = Feature{
     .name = "xgot",
+    .llvm_name = "xgot",
     .description = "Assume 32-bit GOT",
     .dependencies = &[_]*const Feature {
     },
@@ -449,14 +498,15 @@ pub const feature_xgot = Feature{
 
 pub const feature_p5600 = Feature{
     .name = "p5600",
+    .llvm_name = "p5600",
     .description = "The P5600 Processor",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
         &feature_mips4_32r2,
+        &feature_mips3_32,
     },
 };
 
@@ -536,9 +586,9 @@ pub const cpu_mips3 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips3_32,
         &feature_mips3,
     },
 };
@@ -548,8 +598,8 @@ pub const cpu_mips32 = Cpu{
     .llvm_name = "mips32",
     .dependencies = &[_]*const Feature {
         &feature_mips1,
-        &feature_mips3_32,
         &feature_mips4_32,
+        &feature_mips3_32,
         &feature_mips32,
     },
 };
@@ -558,12 +608,12 @@ pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips32r2,
     },
 };
@@ -572,12 +622,12 @@ pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
         &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips32r3,
     },
 };
@@ -586,12 +636,12 @@ pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips32r5,
     },
 };
@@ -601,14 +651,14 @@ pub const cpu_mips32r6 = Cpu{
     .llvm_name = "mips32r6",
     .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_nan2008,
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips32r6,
     },
 };
@@ -617,13 +667,13 @@ pub const cpu_mips4 = Cpu{
     .name = "mips4",
     .llvm_name = "mips4",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
+        &feature_mips4_32,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips4,
     },
 };
@@ -632,14 +682,14 @@ pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips5,
     },
 };
@@ -648,14 +698,14 @@ pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips64,
     },
 };
@@ -664,14 +714,14 @@ pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips64r2,
     },
 };
@@ -680,14 +730,14 @@ pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips64r3,
     },
 };
@@ -696,14 +746,14 @@ pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
-        &feature_mips4_32r2,
+        &feature_mips5_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips64r5,
     },
 };
@@ -713,15 +763,15 @@ pub const cpu_mips64r6 = Cpu{
     .llvm_name = "mips64r6",
     .dependencies = &[_]*const Feature {
         &feature_abs2008,
-        &feature_nan2008,
-        &feature_mips4_32,
-        &feature_gp64,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
+        &feature_nan2008,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_mips64r6,
     },
 };
@@ -730,14 +780,14 @@ pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
     .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips4_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
         &feature_fp64,
+        &feature_gp64,
+        &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_cnmips,
         &feature_mips64r2,
     },
@@ -747,12 +797,12 @@ pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
     .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips5_32r2,
         &feature_mips4_32,
+        &feature_mips5_32r2,
         &feature_mips4_32r2,
+        &feature_mips3_32,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 1e3b93b9d0daf31752200f051143cfc74cbf8b13..75e641f0dc3edc64760fea53ce59e1ded8fb2841 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_hwmult16 = Feature{
     .name = "hwmult16",
+    .llvm_name = "hwmult16",
     .description = "Enable 16-bit hardware multiplier",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_hwmult16 = Feature{
 
 pub const feature_hwmult32 = Feature{
     .name = "hwmult32",
+    .llvm_name = "hwmult32",
     .description = "Enable 32-bit hardware multiplier",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_hwmult32 = Feature{
 
 pub const feature_hwmultf5 = Feature{
     .name = "hwmultf5",
+    .llvm_name = "hwmultf5",
     .description = "Enable F5 series hardware multiplier",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_hwmultf5 = Feature{
 
 pub const feature_ext = Feature{
     .name = "ext",
+    .llvm_name = "ext",
     .description = "Enable MSP430-X extensions",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index 815d1116c57ac9f5a2a38becc8e36fdc3829cb47..cddd800f30f4333aa4e2d651266d61d8b400de03 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_ptx32 = Feature{
     .name = "ptx32",
+    .llvm_name = "ptx32",
     .description = "Use PTX version 3.2",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_ptx32 = Feature{
 
 pub const feature_ptx40 = Feature{
     .name = "ptx40",
+    .llvm_name = "ptx40",
     .description = "Use PTX version 4.0",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_ptx40 = Feature{
 
 pub const feature_ptx41 = Feature{
     .name = "ptx41",
+    .llvm_name = "ptx41",
     .description = "Use PTX version 4.1",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_ptx41 = Feature{
 
 pub const feature_ptx42 = Feature{
     .name = "ptx42",
+    .llvm_name = "ptx42",
     .description = "Use PTX version 4.2",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_ptx42 = Feature{
 
 pub const feature_ptx43 = Feature{
     .name = "ptx43",
+    .llvm_name = "ptx43",
     .description = "Use PTX version 4.3",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_ptx43 = Feature{
 
 pub const feature_ptx50 = Feature{
     .name = "ptx50",
+    .llvm_name = "ptx50",
     .description = "Use PTX version 5.0",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_ptx50 = Feature{
 
 pub const feature_ptx60 = Feature{
     .name = "ptx60",
+    .llvm_name = "ptx60",
     .description = "Use PTX version 6.0",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_ptx60 = Feature{
 
 pub const feature_ptx61 = Feature{
     .name = "ptx61",
+    .llvm_name = "ptx61",
     .description = "Use PTX version 6.1",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_ptx61 = Feature{
 
 pub const feature_ptx63 = Feature{
     .name = "ptx63",
+    .llvm_name = "ptx63",
     .description = "Use PTX version 6.3",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_ptx63 = Feature{
 
 pub const feature_ptx64 = Feature{
     .name = "ptx64",
+    .llvm_name = "ptx64",
     .description = "Use PTX version 6.4",
     .dependencies = &[_]*const Feature {
     },
@@ -73,6 +83,7 @@ pub const feature_ptx64 = Feature{
 
 pub const feature_sm_20 = Feature{
     .name = "sm_20",
+    .llvm_name = "sm_20",
     .description = "Target SM 2.0",
     .dependencies = &[_]*const Feature {
     },
@@ -80,6 +91,7 @@ pub const feature_sm_20 = Feature{
 
 pub const feature_sm_21 = Feature{
     .name = "sm_21",
+    .llvm_name = "sm_21",
     .description = "Target SM 2.1",
     .dependencies = &[_]*const Feature {
     },
@@ -87,6 +99,7 @@ pub const feature_sm_21 = Feature{
 
 pub const feature_sm_30 = Feature{
     .name = "sm_30",
+    .llvm_name = "sm_30",
     .description = "Target SM 3.0",
     .dependencies = &[_]*const Feature {
     },
@@ -94,6 +107,7 @@ pub const feature_sm_30 = Feature{
 
 pub const feature_sm_32 = Feature{
     .name = "sm_32",
+    .llvm_name = "sm_32",
     .description = "Target SM 3.2",
     .dependencies = &[_]*const Feature {
     },
@@ -101,6 +115,7 @@ pub const feature_sm_32 = Feature{
 
 pub const feature_sm_35 = Feature{
     .name = "sm_35",
+    .llvm_name = "sm_35",
     .description = "Target SM 3.5",
     .dependencies = &[_]*const Feature {
     },
@@ -108,6 +123,7 @@ pub const feature_sm_35 = Feature{
 
 pub const feature_sm_37 = Feature{
     .name = "sm_37",
+    .llvm_name = "sm_37",
     .description = "Target SM 3.7",
     .dependencies = &[_]*const Feature {
     },
@@ -115,6 +131,7 @@ pub const feature_sm_37 = Feature{
 
 pub const feature_sm_50 = Feature{
     .name = "sm_50",
+    .llvm_name = "sm_50",
     .description = "Target SM 5.0",
     .dependencies = &[_]*const Feature {
     },
@@ -122,6 +139,7 @@ pub const feature_sm_50 = Feature{
 
 pub const feature_sm_52 = Feature{
     .name = "sm_52",
+    .llvm_name = "sm_52",
     .description = "Target SM 5.2",
     .dependencies = &[_]*const Feature {
     },
@@ -129,6 +147,7 @@ pub const feature_sm_52 = Feature{
 
 pub const feature_sm_53 = Feature{
     .name = "sm_53",
+    .llvm_name = "sm_53",
     .description = "Target SM 5.3",
     .dependencies = &[_]*const Feature {
     },
@@ -136,6 +155,7 @@ pub const feature_sm_53 = Feature{
 
 pub const feature_sm_60 = Feature{
     .name = "sm_60",
+    .llvm_name = "sm_60",
     .description = "Target SM 6.0",
     .dependencies = &[_]*const Feature {
     },
@@ -143,6 +163,7 @@ pub const feature_sm_60 = Feature{
 
 pub const feature_sm_61 = Feature{
     .name = "sm_61",
+    .llvm_name = "sm_61",
     .description = "Target SM 6.1",
     .dependencies = &[_]*const Feature {
     },
@@ -150,6 +171,7 @@ pub const feature_sm_61 = Feature{
 
 pub const feature_sm_62 = Feature{
     .name = "sm_62",
+    .llvm_name = "sm_62",
     .description = "Target SM 6.2",
     .dependencies = &[_]*const Feature {
     },
@@ -157,6 +179,7 @@ pub const feature_sm_62 = Feature{
 
 pub const feature_sm_70 = Feature{
     .name = "sm_70",
+    .llvm_name = "sm_70",
     .description = "Target SM 7.0",
     .dependencies = &[_]*const Feature {
     },
@@ -164,6 +187,7 @@ pub const feature_sm_70 = Feature{
 
 pub const feature_sm_72 = Feature{
     .name = "sm_72",
+    .llvm_name = "sm_72",
     .description = "Target SM 7.2",
     .dependencies = &[_]*const Feature {
     },
@@ -171,6 +195,7 @@ pub const feature_sm_72 = Feature{
 
 pub const feature_sm_75 = Feature{
     .name = "sm_75",
+    .llvm_name = "sm_75",
     .description = "Target SM 7.5",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 9e86df21854579b1da8e2c97b7407054ff1b1aa7..6ad23e946653cff7d1c81e16249351043a2b379d 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_bit64 = Feature{
     .name = "64bit",
+    .llvm_name = "64bit",
     .description = "Enable 64-bit instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_bit64 = Feature{
 
 pub const feature_bitregs64 = Feature{
     .name = "64bitregs",
+    .llvm_name = "64bitregs",
     .description = "Enable 64-bit registers usage for ppc32 [beta]",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_bitregs64 = Feature{
 
 pub const feature_altivec = Feature{
     .name = "altivec",
+    .llvm_name = "altivec",
     .description = "Enable Altivec instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -25,6 +28,7 @@ pub const feature_altivec = Feature{
 
 pub const feature_bpermd = Feature{
     .name = "bpermd",
+    .llvm_name = "bpermd",
     .description = "Enable the bpermd instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -32,6 +36,7 @@ pub const feature_bpermd = Feature{
 
 pub const feature_booke = Feature{
     .name = "booke",
+    .llvm_name = "booke",
     .description = "Enable Book E instructions",
     .dependencies = &[_]*const Feature {
         &feature_icbt,
@@ -40,6 +45,7 @@ pub const feature_booke = Feature{
 
 pub const feature_cmpb = Feature{
     .name = "cmpb",
+    .llvm_name = "cmpb",
     .description = "Enable the cmpb instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -47,6 +53,7 @@ pub const feature_cmpb = Feature{
 
 pub const feature_crbits = Feature{
     .name = "crbits",
+    .llvm_name = "crbits",
     .description = "Use condition-register bits individually",
     .dependencies = &[_]*const Feature {
     },
@@ -54,6 +61,7 @@ pub const feature_crbits = Feature{
 
 pub const feature_directMove = Feature{
     .name = "direct-move",
+    .llvm_name = "direct-move",
     .description = "Enable Power8 direct move instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -62,6 +70,7 @@ pub const feature_directMove = Feature{
 
 pub const feature_e500 = Feature{
     .name = "e500",
+    .llvm_name = "e500",
     .description = "Enable E500/E500mc instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -69,6 +78,7 @@ pub const feature_e500 = Feature{
 
 pub const feature_extdiv = Feature{
     .name = "extdiv",
+    .llvm_name = "extdiv",
     .description = "Enable extended divide instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -76,6 +86,7 @@ pub const feature_extdiv = Feature{
 
 pub const feature_fcpsgn = Feature{
     .name = "fcpsgn",
+    .llvm_name = "fcpsgn",
     .description = "Enable the fcpsgn instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -84,6 +95,7 @@ pub const feature_fcpsgn = Feature{
 
 pub const feature_fpcvt = Feature{
     .name = "fpcvt",
+    .llvm_name = "fpcvt",
     .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -92,6 +104,7 @@ pub const feature_fpcvt = Feature{
 
 pub const feature_fprnd = Feature{
     .name = "fprnd",
+    .llvm_name = "fprnd",
     .description = "Enable the fri[mnpz] instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -100,6 +113,7 @@ pub const feature_fprnd = Feature{
 
 pub const feature_fpu = Feature{
     .name = "fpu",
+    .llvm_name = "fpu",
     .description = "Enable classic FPU instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -108,6 +122,7 @@ pub const feature_fpu = Feature{
 
 pub const feature_fre = Feature{
     .name = "fre",
+    .llvm_name = "fre",
     .description = "Enable the fre instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -116,6 +131,7 @@ pub const feature_fre = Feature{
 
 pub const feature_fres = Feature{
     .name = "fres",
+    .llvm_name = "fres",
     .description = "Enable the fres instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -124,6 +140,7 @@ pub const feature_fres = Feature{
 
 pub const feature_frsqrte = Feature{
     .name = "frsqrte",
+    .llvm_name = "frsqrte",
     .description = "Enable the frsqrte instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -132,6 +149,7 @@ pub const feature_frsqrte = Feature{
 
 pub const feature_frsqrtes = Feature{
     .name = "frsqrtes",
+    .llvm_name = "frsqrtes",
     .description = "Enable the frsqrtes instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -140,6 +158,7 @@ pub const feature_frsqrtes = Feature{
 
 pub const feature_fsqrt = Feature{
     .name = "fsqrt",
+    .llvm_name = "fsqrt",
     .description = "Enable the fsqrt instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -148,6 +167,7 @@ pub const feature_fsqrt = Feature{
 
 pub const feature_float128 = Feature{
     .name = "float128",
+    .llvm_name = "float128",
     .description = "Enable the __float128 data type for IEEE-754R Binary128.",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -156,6 +176,7 @@ pub const feature_float128 = Feature{
 
 pub const feature_htm = Feature{
     .name = "htm",
+    .llvm_name = "htm",
     .description = "Enable Hardware Transactional Memory instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -163,6 +184,7 @@ pub const feature_htm = Feature{
 
 pub const feature_hardFloat = Feature{
     .name = "hard-float",
+    .llvm_name = "hard-float",
     .description = "Enable floating-point instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -170,6 +192,7 @@ pub const feature_hardFloat = Feature{
 
 pub const feature_icbt = Feature{
     .name = "icbt",
+    .llvm_name = "icbt",
     .description = "Enable icbt instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -177,6 +200,7 @@ pub const feature_icbt = Feature{
 
 pub const feature_isaV30Instructions = Feature{
     .name = "isa-v30-instructions",
+    .llvm_name = "isa-v30-instructions",
     .description = "Enable instructions added in ISA 3.0.",
     .dependencies = &[_]*const Feature {
     },
@@ -184,6 +208,7 @@ pub const feature_isaV30Instructions = Feature{
 
 pub const feature_isel = Feature{
     .name = "isel",
+    .llvm_name = "isel",
     .description = "Enable the isel instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -191,6 +216,7 @@ pub const feature_isel = Feature{
 
 pub const feature_invariantFunctionDescriptors = Feature{
     .name = "invariant-function-descriptors",
+    .llvm_name = "invariant-function-descriptors",
     .description = "Assume function descriptors are invariant",
     .dependencies = &[_]*const Feature {
     },
@@ -198,6 +224,7 @@ pub const feature_invariantFunctionDescriptors = Feature{
 
 pub const feature_ldbrx = Feature{
     .name = "ldbrx",
+    .llvm_name = "ldbrx",
     .description = "Enable the ldbrx instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -205,6 +232,7 @@ pub const feature_ldbrx = Feature{
 
 pub const feature_lfiwax = Feature{
     .name = "lfiwax",
+    .llvm_name = "lfiwax",
     .description = "Enable the lfiwax instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -213,6 +241,7 @@ pub const feature_lfiwax = Feature{
 
 pub const feature_longcall = Feature{
     .name = "longcall",
+    .llvm_name = "longcall",
     .description = "Always use indirect calls",
     .dependencies = &[_]*const Feature {
     },
@@ -220,6 +249,7 @@ pub const feature_longcall = Feature{
 
 pub const feature_mfocrf = Feature{
     .name = "mfocrf",
+    .llvm_name = "mfocrf",
     .description = "Enable the MFOCRF instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -227,6 +257,7 @@ pub const feature_mfocrf = Feature{
 
 pub const feature_msync = Feature{
     .name = "msync",
+    .llvm_name = "msync",
     .description = "Has only the msync instruction instead of sync",
     .dependencies = &[_]*const Feature {
         &feature_icbt,
@@ -235,6 +266,7 @@ pub const feature_msync = Feature{
 
 pub const feature_power8Altivec = Feature{
     .name = "power8-altivec",
+    .llvm_name = "power8-altivec",
     .description = "Enable POWER8 Altivec instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -243,6 +275,7 @@ pub const feature_power8Altivec = Feature{
 
 pub const feature_crypto = Feature{
     .name = "crypto",
+    .llvm_name = "crypto",
     .description = "Enable POWER8 Crypto instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -251,6 +284,7 @@ pub const feature_crypto = Feature{
 
 pub const feature_power8Vector = Feature{
     .name = "power8-vector",
+    .llvm_name = "power8-vector",
     .description = "Enable POWER8 vector instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -259,24 +293,27 @@ pub const feature_power8Vector = Feature{
 
 pub const feature_power9Altivec = Feature{
     .name = "power9-altivec",
+    .llvm_name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
     .dependencies = &[_]*const Feature {
-        &feature_isaV30Instructions,
         &feature_hardFloat,
+        &feature_isaV30Instructions,
     },
 };
 
 pub const feature_power9Vector = Feature{
     .name = "power9-vector",
+    .llvm_name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
     .dependencies = &[_]*const Feature {
-        &feature_isaV30Instructions,
         &feature_hardFloat,
+        &feature_isaV30Instructions,
     },
 };
 
 pub const feature_popcntd = Feature{
     .name = "popcntd",
+    .llvm_name = "popcntd",
     .description = "Enable the popcnt[dw] instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -284,6 +321,7 @@ pub const feature_popcntd = Feature{
 
 pub const feature_ppc4xx = Feature{
     .name = "ppc4xx",
+    .llvm_name = "ppc4xx",
     .description = "Enable PPC 4xx instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -291,6 +329,7 @@ pub const feature_ppc4xx = Feature{
 
 pub const feature_ppc6xx = Feature{
     .name = "ppc6xx",
+    .llvm_name = "ppc6xx",
     .description = "Enable PPC 6xx instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -298,6 +337,7 @@ pub const feature_ppc6xx = Feature{
 
 pub const feature_ppcPostraSched = Feature{
     .name = "ppc-postra-sched",
+    .llvm_name = "ppc-postra-sched",
     .description = "Use PowerPC post-RA scheduling strategy",
     .dependencies = &[_]*const Feature {
     },
@@ -305,6 +345,7 @@ pub const feature_ppcPostraSched = Feature{
 
 pub const feature_ppcPreraSched = Feature{
     .name = "ppc-prera-sched",
+    .llvm_name = "ppc-prera-sched",
     .description = "Use PowerPC pre-RA scheduling strategy",
     .dependencies = &[_]*const Feature {
     },
@@ -312,6 +353,7 @@ pub const feature_ppcPreraSched = Feature{
 
 pub const feature_partwordAtomics = Feature{
     .name = "partword-atomics",
+    .llvm_name = "partword-atomics",
     .description = "Enable l[bh]arx and st[bh]cx.",
     .dependencies = &[_]*const Feature {
     },
@@ -319,6 +361,7 @@ pub const feature_partwordAtomics = Feature{
 
 pub const feature_qpx = Feature{
     .name = "qpx",
+    .llvm_name = "qpx",
     .description = "Enable QPX instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -327,6 +370,7 @@ pub const feature_qpx = Feature{
 
 pub const feature_recipprec = Feature{
     .name = "recipprec",
+    .llvm_name = "recipprec",
     .description = "Assume higher precision reciprocal estimates",
     .dependencies = &[_]*const Feature {
     },
@@ -334,6 +378,7 @@ pub const feature_recipprec = Feature{
 
 pub const feature_spe = Feature{
     .name = "spe",
+    .llvm_name = "spe",
     .description = "Enable SPE instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -342,6 +387,7 @@ pub const feature_spe = Feature{
 
 pub const feature_stfiwx = Feature{
     .name = "stfiwx",
+    .llvm_name = "stfiwx",
     .description = "Enable the stfiwx instruction",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -350,6 +396,7 @@ pub const feature_stfiwx = Feature{
 
 pub const feature_securePlt = Feature{
     .name = "secure-plt",
+    .llvm_name = "secure-plt",
     .description = "Enable secure plt mode",
     .dependencies = &[_]*const Feature {
     },
@@ -357,6 +404,7 @@ pub const feature_securePlt = Feature{
 
 pub const feature_slowPopcntd = Feature{
     .name = "slow-popcntd",
+    .llvm_name = "slow-popcntd",
     .description = "Has slow popcnt[dw] instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -364,6 +412,7 @@ pub const feature_slowPopcntd = Feature{
 
 pub const feature_twoConstNr = Feature{
     .name = "two-const-nr",
+    .llvm_name = "two-const-nr",
     .description = "Requires two constant Newton-Raphson computation",
     .dependencies = &[_]*const Feature {
     },
@@ -371,6 +420,7 @@ pub const feature_twoConstNr = Feature{
 
 pub const feature_vsx = Feature{
     .name = "vsx",
+    .llvm_name = "vsx",
     .description = "Enable VSX instructions",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -379,6 +429,7 @@ pub const feature_vsx = Feature{
 
 pub const feature_vectorsUseTwoUnits = Feature{
     .name = "vectors-use-two-units",
+    .llvm_name = "vectors-use-two-units",
     .description = "Vectors use two units",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index cbb7ccb9ad0325fcb4cbf2ec2809ae7b9ffca72d..e9b976b004aa78c152efe3751b7e95867e84da9c 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_bit64 = Feature{
     .name = "64bit",
+    .llvm_name = "64bit",
     .description = "Implements RV64",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_bit64 = Feature{
 
 pub const feature_e = Feature{
     .name = "e",
+    .llvm_name = "e",
     .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_e = Feature{
 
 pub const feature_rvcHints = Feature{
     .name = "rvc-hints",
+    .llvm_name = "rvc-hints",
     .description = "Enable RVC Hint Instructions.",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_rvcHints = Feature{
 
 pub const feature_relax = Feature{
     .name = "relax",
+    .llvm_name = "relax",
     .description = "Enable Linker relaxation.",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_relax = Feature{
 
 pub const feature_a = Feature{
     .name = "a",
+    .llvm_name = "a",
     .description = "'A' (Atomic Instructions)",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_a = Feature{
 
 pub const feature_c = Feature{
     .name = "c",
+    .llvm_name = "c",
     .description = "'C' (Compressed Instructions)",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_c = Feature{
 
 pub const feature_d = Feature{
     .name = "d",
+    .llvm_name = "d",
     .description = "'D' (Double-Precision Floating-Point)",
     .dependencies = &[_]*const Feature {
         &feature_f,
@@ -53,6 +60,7 @@ pub const feature_d = Feature{
 
 pub const feature_f = Feature{
     .name = "f",
+    .llvm_name = "f",
     .description = "'F' (Single-Precision Floating-Point)",
     .dependencies = &[_]*const Feature {
     },
@@ -60,6 +68,7 @@ pub const feature_f = Feature{
 
 pub const feature_m = Feature{
     .name = "m",
+    .llvm_name = "m",
     .description = "'M' (Integer Multiplication and Division)",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 7cdeddb976cea4dd18b6ae4b0b013429b6a045e1..5bf844b8705d01d241bedbbb942974dbfb8551ba 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_hardQuadFloat = Feature{
     .name = "hard-quad-float",
+    .llvm_name = "hard-quad-float",
     .description = "Enable quad-word floating point instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_hardQuadFloat = Feature{
 
 pub const feature_leon = Feature{
     .name = "leon",
+    .llvm_name = "leon",
     .description = "Enable LEON extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_leon = Feature{
 
 pub const feature_noFmuls = Feature{
     .name = "no-fmuls",
+    .llvm_name = "no-fmuls",
     .description = "Disable the fmuls instruction.",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_noFmuls = Feature{
 
 pub const feature_noFsmuld = Feature{
     .name = "no-fsmuld",
+    .llvm_name = "no-fsmuld",
     .description = "Disable the fsmuld instruction.",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_noFsmuld = Feature{
 
 pub const feature_leonpwrpsr = Feature{
     .name = "leonpwrpsr",
+    .llvm_name = "leonpwrpsr",
     .description = "Enable the PWRPSR instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_leonpwrpsr = Feature{
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
+    .llvm_name = "soft-float",
     .description = "Use software emulation for floating point",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_softFloat = Feature{
 
 pub const feature_softMulDiv = Feature{
     .name = "soft-mul-div",
+    .llvm_name = "soft-mul-div",
     .description = "Use software emulation for integer multiply and divide",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_softMulDiv = Feature{
 
 pub const feature_deprecatedV8 = Feature{
     .name = "deprecated-v8",
+    .llvm_name = "deprecated-v8",
     .description = "Enable deprecated V8 instructions in V9 mode",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_deprecatedV8 = Feature{
 
 pub const feature_v9 = Feature{
     .name = "v9",
+    .llvm_name = "v9",
     .description = "Enable SPARC-V9 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_v9 = Feature{
 
 pub const feature_vis = Feature{
     .name = "vis",
+    .llvm_name = "vis",
     .description = "Enable UltraSPARC Visual Instruction Set extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -73,6 +83,7 @@ pub const feature_vis = Feature{
 
 pub const feature_vis2 = Feature{
     .name = "vis2",
+    .llvm_name = "vis2",
     .description = "Enable Visual Instruction Set extensions II",
     .dependencies = &[_]*const Feature {
     },
@@ -80,6 +91,7 @@ pub const feature_vis2 = Feature{
 
 pub const feature_vis3 = Feature{
     .name = "vis3",
+    .llvm_name = "vis3",
     .description = "Enable Visual Instruction Set extensions III",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 1f5d64846855472b213a07e43d9752789e165090..56bd80efd1ae0ba9a7219c173283289d714ada76 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_dfpPackedConversion = Feature{
     .name = "dfp-packed-conversion",
+    .llvm_name = "dfp-packed-conversion",
     .description = "Assume that the DFP packed-conversion facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_dfpPackedConversion = Feature{
 
 pub const feature_dfpZonedConversion = Feature{
     .name = "dfp-zoned-conversion",
+    .llvm_name = "dfp-zoned-conversion",
     .description = "Assume that the DFP zoned-conversion facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_dfpZonedConversion = Feature{
 
 pub const feature_deflateConversion = Feature{
     .name = "deflate-conversion",
+    .llvm_name = "deflate-conversion",
     .description = "Assume that the deflate-conversion facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_deflateConversion = Feature{
 
 pub const feature_distinctOps = Feature{
     .name = "distinct-ops",
+    .llvm_name = "distinct-ops",
     .description = "Assume that the distinct-operands facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_distinctOps = Feature{
 
 pub const feature_enhancedDat2 = Feature{
     .name = "enhanced-dat-2",
+    .llvm_name = "enhanced-dat-2",
     .description = "Assume that the enhanced-DAT facility 2 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_enhancedDat2 = Feature{
 
 pub const feature_enhancedSort = Feature{
     .name = "enhanced-sort",
+    .llvm_name = "enhanced-sort",
     .description = "Assume that the enhanced-sort facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_enhancedSort = Feature{
 
 pub const feature_executionHint = Feature{
     .name = "execution-hint",
+    .llvm_name = "execution-hint",
     .description = "Assume that the execution-hint facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_executionHint = Feature{
 
 pub const feature_fpExtension = Feature{
     .name = "fp-extension",
+    .llvm_name = "fp-extension",
     .description = "Assume that the floating-point extension facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_fpExtension = Feature{
 
 pub const feature_fastSerialization = Feature{
     .name = "fast-serialization",
+    .llvm_name = "fast-serialization",
     .description = "Assume that the fast-serialization facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_fastSerialization = Feature{
 
 pub const feature_guardedStorage = Feature{
     .name = "guarded-storage",
+    .llvm_name = "guarded-storage",
     .description = "Assume that the guarded-storage facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -73,6 +83,7 @@ pub const feature_guardedStorage = Feature{
 
 pub const feature_highWord = Feature{
     .name = "high-word",
+    .llvm_name = "high-word",
     .description = "Assume that the high-word facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -80,6 +91,7 @@ pub const feature_highWord = Feature{
 
 pub const feature_insertReferenceBitsMultiple = Feature{
     .name = "insert-reference-bits-multiple",
+    .llvm_name = "insert-reference-bits-multiple",
     .description = "Assume that the insert-reference-bits-multiple facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -87,6 +99,7 @@ pub const feature_insertReferenceBitsMultiple = Feature{
 
 pub const feature_interlockedAccess1 = Feature{
     .name = "interlocked-access1",
+    .llvm_name = "interlocked-access1",
     .description = "Assume that interlocked-access facility 1 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -94,6 +107,7 @@ pub const feature_interlockedAccess1 = Feature{
 
 pub const feature_loadAndTrap = Feature{
     .name = "load-and-trap",
+    .llvm_name = "load-and-trap",
     .description = "Assume that the load-and-trap facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -101,6 +115,7 @@ pub const feature_loadAndTrap = Feature{
 
 pub const feature_loadAndZeroRightmostByte = Feature{
     .name = "load-and-zero-rightmost-byte",
+    .llvm_name = "load-and-zero-rightmost-byte",
     .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -108,6 +123,7 @@ pub const feature_loadAndZeroRightmostByte = Feature{
 
 pub const feature_loadStoreOnCond = Feature{
     .name = "load-store-on-cond",
+    .llvm_name = "load-store-on-cond",
     .description = "Assume that the load/store-on-condition facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -115,6 +131,7 @@ pub const feature_loadStoreOnCond = Feature{
 
 pub const feature_loadStoreOnCond2 = Feature{
     .name = "load-store-on-cond-2",
+    .llvm_name = "load-store-on-cond-2",
     .description = "Assume that the load/store-on-condition facility 2 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -122,6 +139,7 @@ pub const feature_loadStoreOnCond2 = Feature{
 
 pub const feature_messageSecurityAssistExtension3 = Feature{
     .name = "message-security-assist-extension3",
+    .llvm_name = "message-security-assist-extension3",
     .description = "Assume that the message-security-assist extension facility 3 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -129,6 +147,7 @@ pub const feature_messageSecurityAssistExtension3 = Feature{
 
 pub const feature_messageSecurityAssistExtension4 = Feature{
     .name = "message-security-assist-extension4",
+    .llvm_name = "message-security-assist-extension4",
     .description = "Assume that the message-security-assist extension facility 4 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -136,6 +155,7 @@ pub const feature_messageSecurityAssistExtension4 = Feature{
 
 pub const feature_messageSecurityAssistExtension5 = Feature{
     .name = "message-security-assist-extension5",
+    .llvm_name = "message-security-assist-extension5",
     .description = "Assume that the message-security-assist extension facility 5 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -143,6 +163,7 @@ pub const feature_messageSecurityAssistExtension5 = Feature{
 
 pub const feature_messageSecurityAssistExtension7 = Feature{
     .name = "message-security-assist-extension7",
+    .llvm_name = "message-security-assist-extension7",
     .description = "Assume that the message-security-assist extension facility 7 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -150,6 +171,7 @@ pub const feature_messageSecurityAssistExtension7 = Feature{
 
 pub const feature_messageSecurityAssistExtension8 = Feature{
     .name = "message-security-assist-extension8",
+    .llvm_name = "message-security-assist-extension8",
     .description = "Assume that the message-security-assist extension facility 8 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -157,6 +179,7 @@ pub const feature_messageSecurityAssistExtension8 = Feature{
 
 pub const feature_messageSecurityAssistExtension9 = Feature{
     .name = "message-security-assist-extension9",
+    .llvm_name = "message-security-assist-extension9",
     .description = "Assume that the message-security-assist extension facility 9 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -164,6 +187,7 @@ pub const feature_messageSecurityAssistExtension9 = Feature{
 
 pub const feature_miscellaneousExtensions = Feature{
     .name = "miscellaneous-extensions",
+    .llvm_name = "miscellaneous-extensions",
     .description = "Assume that the miscellaneous-extensions facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -171,6 +195,7 @@ pub const feature_miscellaneousExtensions = Feature{
 
 pub const feature_miscellaneousExtensions2 = Feature{
     .name = "miscellaneous-extensions-2",
+    .llvm_name = "miscellaneous-extensions-2",
     .description = "Assume that the miscellaneous-extensions facility 2 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -178,6 +203,7 @@ pub const feature_miscellaneousExtensions2 = Feature{
 
 pub const feature_miscellaneousExtensions3 = Feature{
     .name = "miscellaneous-extensions-3",
+    .llvm_name = "miscellaneous-extensions-3",
     .description = "Assume that the miscellaneous-extensions facility 3 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -185,6 +211,7 @@ pub const feature_miscellaneousExtensions3 = Feature{
 
 pub const feature_populationCount = Feature{
     .name = "population-count",
+    .llvm_name = "population-count",
     .description = "Assume that the population-count facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -192,6 +219,7 @@ pub const feature_populationCount = Feature{
 
 pub const feature_processorAssist = Feature{
     .name = "processor-assist",
+    .llvm_name = "processor-assist",
     .description = "Assume that the processor-assist facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -199,6 +227,7 @@ pub const feature_processorAssist = Feature{
 
 pub const feature_resetReferenceBitsMultiple = Feature{
     .name = "reset-reference-bits-multiple",
+    .llvm_name = "reset-reference-bits-multiple",
     .description = "Assume that the reset-reference-bits-multiple facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -206,6 +235,7 @@ pub const feature_resetReferenceBitsMultiple = Feature{
 
 pub const feature_transactionalExecution = Feature{
     .name = "transactional-execution",
+    .llvm_name = "transactional-execution",
     .description = "Assume that the transactional-execution facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -213,6 +243,7 @@ pub const feature_transactionalExecution = Feature{
 
 pub const feature_vector = Feature{
     .name = "vector",
+    .llvm_name = "vector",
     .description = "Assume that the vectory facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -220,6 +251,7 @@ pub const feature_vector = Feature{
 
 pub const feature_vectorEnhancements1 = Feature{
     .name = "vector-enhancements-1",
+    .llvm_name = "vector-enhancements-1",
     .description = "Assume that the vector enhancements facility 1 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -227,6 +259,7 @@ pub const feature_vectorEnhancements1 = Feature{
 
 pub const feature_vectorEnhancements2 = Feature{
     .name = "vector-enhancements-2",
+    .llvm_name = "vector-enhancements-2",
     .description = "Assume that the vector enhancements facility 2 is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -234,6 +267,7 @@ pub const feature_vectorEnhancements2 = Feature{
 
 pub const feature_vectorPackedDecimal = Feature{
     .name = "vector-packed-decimal",
+    .llvm_name = "vector-packed-decimal",
     .description = "Assume that the vector packed decimal facility is installed",
     .dependencies = &[_]*const Feature {
     },
@@ -241,6 +275,7 @@ pub const feature_vectorPackedDecimal = Feature{
 
 pub const feature_vectorPackedDecimalEnhancement = Feature{
     .name = "vector-packed-decimal-enhancement",
+    .llvm_name = "vector-packed-decimal-enhancement",
     .description = "Assume that the vector packed decimal enhancement facility is installed",
     .dependencies = &[_]*const Feature {
     },
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 17d771770898b209ed7054d83373835d027893a1..ae3bfe913800c2dc6beb10b4306c4dd9f556a3f5 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_atomics = Feature{
     .name = "atomics",
+    .llvm_name = "atomics",
     .description = "Enable Atomics",
     .dependencies = &[_]*const Feature {
     },
@@ -10,6 +11,7 @@ pub const feature_atomics = Feature{
 
 pub const feature_bulkMemory = Feature{
     .name = "bulk-memory",
+    .llvm_name = "bulk-memory",
     .description = "Enable bulk memory operations",
     .dependencies = &[_]*const Feature {
     },
@@ -17,6 +19,7 @@ pub const feature_bulkMemory = Feature{
 
 pub const feature_exceptionHandling = Feature{
     .name = "exception-handling",
+    .llvm_name = "exception-handling",
     .description = "Enable Wasm exception handling",
     .dependencies = &[_]*const Feature {
     },
@@ -24,6 +27,7 @@ pub const feature_exceptionHandling = Feature{
 
 pub const feature_multivalue = Feature{
     .name = "multivalue",
+    .llvm_name = "multivalue",
     .description = "Enable multivalue blocks, instructions, and functions",
     .dependencies = &[_]*const Feature {
     },
@@ -31,6 +35,7 @@ pub const feature_multivalue = Feature{
 
 pub const feature_mutableGlobals = Feature{
     .name = "mutable-globals",
+    .llvm_name = "mutable-globals",
     .description = "Enable mutable globals",
     .dependencies = &[_]*const Feature {
     },
@@ -38,6 +43,7 @@ pub const feature_mutableGlobals = Feature{
 
 pub const feature_nontrappingFptoint = Feature{
     .name = "nontrapping-fptoint",
+    .llvm_name = "nontrapping-fptoint",
     .description = "Enable non-trapping float-to-int conversion operators",
     .dependencies = &[_]*const Feature {
     },
@@ -45,6 +51,7 @@ pub const feature_nontrappingFptoint = Feature{
 
 pub const feature_simd128 = Feature{
     .name = "simd128",
+    .llvm_name = "simd128",
     .description = "Enable 128-bit SIMD",
     .dependencies = &[_]*const Feature {
     },
@@ -52,6 +59,7 @@ pub const feature_simd128 = Feature{
 
 pub const feature_signExt = Feature{
     .name = "sign-ext",
+    .llvm_name = "sign-ext",
     .description = "Enable sign extension operators",
     .dependencies = &[_]*const Feature {
     },
@@ -59,6 +67,7 @@ pub const feature_signExt = Feature{
 
 pub const feature_tailCall = Feature{
     .name = "tail-call",
+    .llvm_name = "tail-call",
     .description = "Enable tail call instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -66,6 +75,7 @@ pub const feature_tailCall = Feature{
 
 pub const feature_unimplementedSimd128 = Feature{
     .name = "unimplemented-simd128",
+    .llvm_name = "unimplemented-simd128",
     .description = "Enable 128-bit SIMD not yet implemented in engines",
     .dependencies = &[_]*const Feature {
         &feature_simd128,
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 573282c664458f912d44d69ef96f1d43bc260116..29062173ab2e2cb4158d450ae780e43c9e15afca 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -3,6 +3,7 @@ const Cpu = @import("std").target.Cpu;
 
 pub const feature_dnow3 = Feature{
     .name = "3dnow",
+    .llvm_name = "3dnow",
     .description = "Enable 3DNow! instructions",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -11,6 +12,7 @@ pub const feature_dnow3 = Feature{
 
 pub const feature_dnowa3 = Feature{
     .name = "3dnowa",
+    .llvm_name = "3dnowa",
     .description = "Enable 3DNow! Athlon instructions",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -19,6 +21,7 @@ pub const feature_dnowa3 = Feature{
 
 pub const feature_bit64 = Feature{
     .name = "64bit",
+    .llvm_name = "64bit",
     .description = "Support 64-bit instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -26,6 +29,7 @@ pub const feature_bit64 = Feature{
 
 pub const feature_adx = Feature{
     .name = "adx",
+    .llvm_name = "adx",
     .description = "Support ADX instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -33,6 +37,7 @@ pub const feature_adx = Feature{
 
 pub const feature_aes = Feature{
     .name = "aes",
+    .llvm_name = "aes",
     .description = "Enable AES instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -41,6 +46,7 @@ pub const feature_aes = Feature{
 
 pub const feature_avx = Feature{
     .name = "avx",
+    .llvm_name = "avx",
     .description = "Enable AVX instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -49,6 +55,7 @@ pub const feature_avx = Feature{
 
 pub const feature_avx2 = Feature{
     .name = "avx2",
+    .llvm_name = "avx2",
     .description = "Enable AVX2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -57,6 +64,7 @@ pub const feature_avx2 = Feature{
 
 pub const feature_avx512f = Feature{
     .name = "avx512f",
+    .llvm_name = "avx512f",
     .description = "Enable AVX-512 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -65,6 +73,7 @@ pub const feature_avx512f = Feature{
 
 pub const feature_avx512bf16 = Feature{
     .name = "avx512bf16",
+    .llvm_name = "avx512bf16",
     .description = "Support bfloat16 floating point",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -73,6 +82,7 @@ pub const feature_avx512bf16 = Feature{
 
 pub const feature_avx512bitalg = Feature{
     .name = "avx512bitalg",
+    .llvm_name = "avx512bitalg",
     .description = "Enable AVX-512 Bit Algorithms",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -81,6 +91,7 @@ pub const feature_avx512bitalg = Feature{
 
 pub const feature_bmi = Feature{
     .name = "bmi",
+    .llvm_name = "bmi",
     .description = "Support BMI instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -88,6 +99,7 @@ pub const feature_bmi = Feature{
 
 pub const feature_bmi2 = Feature{
     .name = "bmi2",
+    .llvm_name = "bmi2",
     .description = "Support BMI2 instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -95,6 +107,7 @@ pub const feature_bmi2 = Feature{
 
 pub const feature_avx512bw = Feature{
     .name = "avx512bw",
+    .llvm_name = "avx512bw",
     .description = "Enable AVX-512 Byte and Word Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -103,6 +116,7 @@ pub const feature_avx512bw = Feature{
 
 pub const feature_branchfusion = Feature{
     .name = "branchfusion",
+    .llvm_name = "branchfusion",
     .description = "CMP/TEST can be fused with conditional branches",
     .dependencies = &[_]*const Feature {
     },
@@ -110,6 +124,7 @@ pub const feature_branchfusion = Feature{
 
 pub const feature_avx512cd = Feature{
     .name = "avx512cd",
+    .llvm_name = "avx512cd",
     .description = "Enable AVX-512 Conflict Detection Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -118,6 +133,7 @@ pub const feature_avx512cd = Feature{
 
 pub const feature_cldemote = Feature{
     .name = "cldemote",
+    .llvm_name = "cldemote",
     .description = "Enable Cache Demote",
     .dependencies = &[_]*const Feature {
     },
@@ -125,6 +141,7 @@ pub const feature_cldemote = Feature{
 
 pub const feature_clflushopt = Feature{
     .name = "clflushopt",
+    .llvm_name = "clflushopt",
     .description = "Flush A Cache Line Optimized",
     .dependencies = &[_]*const Feature {
     },
@@ -132,6 +149,7 @@ pub const feature_clflushopt = Feature{
 
 pub const feature_clwb = Feature{
     .name = "clwb",
+    .llvm_name = "clwb",
     .description = "Cache Line Write Back",
     .dependencies = &[_]*const Feature {
     },
@@ -139,6 +157,7 @@ pub const feature_clwb = Feature{
 
 pub const feature_clzero = Feature{
     .name = "clzero",
+    .llvm_name = "clzero",
     .description = "Enable Cache Line Zero",
     .dependencies = &[_]*const Feature {
     },
@@ -146,6 +165,7 @@ pub const feature_clzero = Feature{
 
 pub const feature_cmov = Feature{
     .name = "cmov",
+    .llvm_name = "cmov",
     .description = "Enable conditional move instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -153,6 +173,7 @@ pub const feature_cmov = Feature{
 
 pub const feature_cx8 = Feature{
     .name = "cx8",
+    .llvm_name = "cx8",
     .description = "Support CMPXCHG8B instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -160,6 +181,7 @@ pub const feature_cx8 = Feature{
 
 pub const feature_cx16 = Feature{
     .name = "cx16",
+    .llvm_name = "cx16",
     .description = "64-bit with cmpxchg16b",
     .dependencies = &[_]*const Feature {
         &feature_cx8,
@@ -168,6 +190,7 @@ pub const feature_cx16 = Feature{
 
 pub const feature_avx512dq = Feature{
     .name = "avx512dq",
+    .llvm_name = "avx512dq",
     .description = "Enable AVX-512 Doubleword and Quadword Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -176,6 +199,7 @@ pub const feature_avx512dq = Feature{
 
 pub const feature_mpx = Feature{
     .name = "mpx",
+    .llvm_name = "mpx",
     .description = "Deprecated. Support MPX instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -183,6 +207,7 @@ pub const feature_mpx = Feature{
 
 pub const feature_enqcmd = Feature{
     .name = "enqcmd",
+    .llvm_name = "enqcmd",
     .description = "Has ENQCMD instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -190,6 +215,7 @@ pub const feature_enqcmd = Feature{
 
 pub const feature_avx512er = Feature{
     .name = "avx512er",
+    .llvm_name = "avx512er",
     .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -198,6 +224,7 @@ pub const feature_avx512er = Feature{
 
 pub const feature_ermsb = Feature{
     .name = "ermsb",
+    .llvm_name = "ermsb",
     .description = "REP MOVS/STOS are fast",
     .dependencies = &[_]*const Feature {
     },
@@ -205,6 +232,7 @@ pub const feature_ermsb = Feature{
 
 pub const feature_f16c = Feature{
     .name = "f16c",
+    .llvm_name = "f16c",
     .description = "Support 16-bit floating point conversion instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -213,6 +241,7 @@ pub const feature_f16c = Feature{
 
 pub const feature_fma = Feature{
     .name = "fma",
+    .llvm_name = "fma",
     .description = "Enable three-operand fused multiple-add",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -221,6 +250,7 @@ pub const feature_fma = Feature{
 
 pub const feature_fma4 = Feature{
     .name = "fma4",
+    .llvm_name = "fma4",
     .description = "Enable four-operand fused multiple-add",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -229,6 +259,7 @@ pub const feature_fma4 = Feature{
 
 pub const feature_fsgsbase = Feature{
     .name = "fsgsbase",
+    .llvm_name = "fsgsbase",
     .description = "Support FS/GS Base instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -236,6 +267,7 @@ pub const feature_fsgsbase = Feature{
 
 pub const feature_fxsr = Feature{
     .name = "fxsr",
+    .llvm_name = "fxsr",
     .description = "Support fxsave/fxrestore instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -243,6 +275,7 @@ pub const feature_fxsr = Feature{
 
 pub const feature_fast11bytenop = Feature{
     .name = "fast-11bytenop",
+    .llvm_name = "fast-11bytenop",
     .description = "Target can quickly decode up to 11 byte NOPs",
     .dependencies = &[_]*const Feature {
     },
@@ -250,6 +283,7 @@ pub const feature_fast11bytenop = Feature{
 
 pub const feature_fast15bytenop = Feature{
     .name = "fast-15bytenop",
+    .llvm_name = "fast-15bytenop",
     .description = "Target can quickly decode up to 15 byte NOPs",
     .dependencies = &[_]*const Feature {
     },
@@ -257,6 +291,7 @@ pub const feature_fast15bytenop = Feature{
 
 pub const feature_fastBextr = Feature{
     .name = "fast-bextr",
+    .llvm_name = "fast-bextr",
     .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
     .dependencies = &[_]*const Feature {
     },
@@ -264,6 +299,7 @@ pub const feature_fastBextr = Feature{
 
 pub const feature_fastHops = Feature{
     .name = "fast-hops",
+    .llvm_name = "fast-hops",
     .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -272,6 +308,7 @@ pub const feature_fastHops = Feature{
 
 pub const feature_fastLzcnt = Feature{
     .name = "fast-lzcnt",
+    .llvm_name = "fast-lzcnt",
     .description = "LZCNT instructions are as fast as most simple integer ops",
     .dependencies = &[_]*const Feature {
     },
@@ -279,6 +316,7 @@ pub const feature_fastLzcnt = Feature{
 
 pub const feature_fastPartialYmmOrZmmWrite = Feature{
     .name = "fast-partial-ymm-or-zmm-write",
+    .llvm_name = "fast-partial-ymm-or-zmm-write",
     .description = "Partial writes to YMM/ZMM registers are fast",
     .dependencies = &[_]*const Feature {
     },
@@ -286,6 +324,7 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{
 
 pub const feature_fastShldRotate = Feature{
     .name = "fast-shld-rotate",
+    .llvm_name = "fast-shld-rotate",
     .description = "SHLD can be used as a faster rotate",
     .dependencies = &[_]*const Feature {
     },
@@ -293,6 +332,7 @@ pub const feature_fastShldRotate = Feature{
 
 pub const feature_fastScalarFsqrt = Feature{
     .name = "fast-scalar-fsqrt",
+    .llvm_name = "fast-scalar-fsqrt",
     .description = "Scalar SQRT is fast (disable Newton-Raphson)",
     .dependencies = &[_]*const Feature {
     },
@@ -300,6 +340,7 @@ pub const feature_fastScalarFsqrt = Feature{
 
 pub const feature_fastScalarShiftMasks = Feature{
     .name = "fast-scalar-shift-masks",
+    .llvm_name = "fast-scalar-shift-masks",
     .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
     .dependencies = &[_]*const Feature {
     },
@@ -307,6 +348,7 @@ pub const feature_fastScalarShiftMasks = Feature{
 
 pub const feature_fastVariableShuffle = Feature{
     .name = "fast-variable-shuffle",
+    .llvm_name = "fast-variable-shuffle",
     .description = "Shuffles with variable masks are fast",
     .dependencies = &[_]*const Feature {
     },
@@ -314,6 +356,7 @@ pub const feature_fastVariableShuffle = Feature{
 
 pub const feature_fastVectorFsqrt = Feature{
     .name = "fast-vector-fsqrt",
+    .llvm_name = "fast-vector-fsqrt",
     .description = "Vector SQRT is fast (disable Newton-Raphson)",
     .dependencies = &[_]*const Feature {
     },
@@ -321,6 +364,7 @@ pub const feature_fastVectorFsqrt = Feature{
 
 pub const feature_fastVectorShiftMasks = Feature{
     .name = "fast-vector-shift-masks",
+    .llvm_name = "fast-vector-shift-masks",
     .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
     .dependencies = &[_]*const Feature {
     },
@@ -328,6 +372,7 @@ pub const feature_fastVectorShiftMasks = Feature{
 
 pub const feature_gfni = Feature{
     .name = "gfni",
+    .llvm_name = "gfni",
     .description = "Enable Galois Field Arithmetic Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -336,6 +381,7 @@ pub const feature_gfni = Feature{
 
 pub const feature_fastGather = Feature{
     .name = "fast-gather",
+    .llvm_name = "fast-gather",
     .description = "Indicates if gather is reasonably fast",
     .dependencies = &[_]*const Feature {
     },
@@ -343,6 +389,7 @@ pub const feature_fastGather = Feature{
 
 pub const feature_avx512ifma = Feature{
     .name = "avx512ifma",
+    .llvm_name = "avx512ifma",
     .description = "Enable AVX-512 Integer Fused Multiple-Add",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -351,6 +398,7 @@ pub const feature_avx512ifma = Feature{
 
 pub const feature_invpcid = Feature{
     .name = "invpcid",
+    .llvm_name = "invpcid",
     .description = "Invalidate Process-Context Identifier",
     .dependencies = &[_]*const Feature {
     },
@@ -358,6 +406,7 @@ pub const feature_invpcid = Feature{
 
 pub const feature_sahf = Feature{
     .name = "sahf",
+    .llvm_name = "sahf",
     .description = "Support LAHF and SAHF instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -365,6 +414,7 @@ pub const feature_sahf = Feature{
 
 pub const feature_leaSp = Feature{
     .name = "lea-sp",
+    .llvm_name = "lea-sp",
     .description = "Use LEA for adjusting the stack pointer",
     .dependencies = &[_]*const Feature {
     },
@@ -372,6 +422,7 @@ pub const feature_leaSp = Feature{
 
 pub const feature_leaUsesAg = Feature{
     .name = "lea-uses-ag",
+    .llvm_name = "lea-uses-ag",
     .description = "LEA instruction needs inputs at AG stage",
     .dependencies = &[_]*const Feature {
     },
@@ -379,6 +430,7 @@ pub const feature_leaUsesAg = Feature{
 
 pub const feature_lwp = Feature{
     .name = "lwp",
+    .llvm_name = "lwp",
     .description = "Enable LWP instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -386,6 +438,7 @@ pub const feature_lwp = Feature{
 
 pub const feature_lzcnt = Feature{
     .name = "lzcnt",
+    .llvm_name = "lzcnt",
     .description = "Support LZCNT instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -393,6 +446,7 @@ pub const feature_lzcnt = Feature{
 
 pub const feature_falseDepsLzcntTzcnt = Feature{
     .name = "false-deps-lzcnt-tzcnt",
+    .llvm_name = "false-deps-lzcnt-tzcnt",
     .description = "LZCNT/TZCNT have a false dependency on dest register",
     .dependencies = &[_]*const Feature {
     },
@@ -400,6 +454,7 @@ pub const feature_falseDepsLzcntTzcnt = Feature{
 
 pub const feature_mmx = Feature{
     .name = "mmx",
+    .llvm_name = "mmx",
     .description = "Enable MMX instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -407,6 +462,7 @@ pub const feature_mmx = Feature{
 
 pub const feature_movbe = Feature{
     .name = "movbe",
+    .llvm_name = "movbe",
     .description = "Support MOVBE instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -414,6 +470,7 @@ pub const feature_movbe = Feature{
 
 pub const feature_movdir64b = Feature{
     .name = "movdir64b",
+    .llvm_name = "movdir64b",
     .description = "Support movdir64b instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -421,6 +478,7 @@ pub const feature_movdir64b = Feature{
 
 pub const feature_movdiri = Feature{
     .name = "movdiri",
+    .llvm_name = "movdiri",
     .description = "Support movdiri instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -428,6 +486,7 @@ pub const feature_movdiri = Feature{
 
 pub const feature_mwaitx = Feature{
     .name = "mwaitx",
+    .llvm_name = "mwaitx",
     .description = "Enable MONITORX/MWAITX timer functionality",
     .dependencies = &[_]*const Feature {
     },
@@ -435,6 +494,7 @@ pub const feature_mwaitx = Feature{
 
 pub const feature_macrofusion = Feature{
     .name = "macrofusion",
+    .llvm_name = "macrofusion",
     .description = "Various instructions can be fused with conditional branches",
     .dependencies = &[_]*const Feature {
     },
@@ -442,6 +502,7 @@ pub const feature_macrofusion = Feature{
 
 pub const feature_mergeToThreewayBranch = Feature{
     .name = "merge-to-threeway-branch",
+    .llvm_name = "merge-to-threeway-branch",
     .description = "Merge branches to a three-way conditional branch",
     .dependencies = &[_]*const Feature {
     },
@@ -449,6 +510,7 @@ pub const feature_mergeToThreewayBranch = Feature{
 
 pub const feature_nopl = Feature{
     .name = "nopl",
+    .llvm_name = "nopl",
     .description = "Enable NOPL instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -456,6 +518,7 @@ pub const feature_nopl = Feature{
 
 pub const feature_pclmul = Feature{
     .name = "pclmul",
+    .llvm_name = "pclmul",
     .description = "Enable packed carry-less multiplication instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -464,6 +527,7 @@ pub const feature_pclmul = Feature{
 
 pub const feature_pconfig = Feature{
     .name = "pconfig",
+    .llvm_name = "pconfig",
     .description = "platform configuration instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -471,6 +535,7 @@ pub const feature_pconfig = Feature{
 
 pub const feature_avx512pf = Feature{
     .name = "avx512pf",
+    .llvm_name = "avx512pf",
     .description = "Enable AVX-512 PreFetch Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -479,6 +544,7 @@ pub const feature_avx512pf = Feature{
 
 pub const feature_pku = Feature{
     .name = "pku",
+    .llvm_name = "pku",
     .description = "Enable protection keys",
     .dependencies = &[_]*const Feature {
     },
@@ -486,6 +552,7 @@ pub const feature_pku = Feature{
 
 pub const feature_popcnt = Feature{
     .name = "popcnt",
+    .llvm_name = "popcnt",
     .description = "Support POPCNT instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -493,6 +560,7 @@ pub const feature_popcnt = Feature{
 
 pub const feature_falseDepsPopcnt = Feature{
     .name = "false-deps-popcnt",
+    .llvm_name = "false-deps-popcnt",
     .description = "POPCNT has a false dependency on dest register",
     .dependencies = &[_]*const Feature {
     },
@@ -500,6 +568,7 @@ pub const feature_falseDepsPopcnt = Feature{
 
 pub const feature_prefetchwt1 = Feature{
     .name = "prefetchwt1",
+    .llvm_name = "prefetchwt1",
     .description = "Prefetch with Intent to Write and T1 Hint",
     .dependencies = &[_]*const Feature {
     },
@@ -507,6 +576,7 @@ pub const feature_prefetchwt1 = Feature{
 
 pub const feature_prfchw = Feature{
     .name = "prfchw",
+    .llvm_name = "prfchw",
     .description = "Support PRFCHW instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -514,6 +584,7 @@ pub const feature_prfchw = Feature{
 
 pub const feature_ptwrite = Feature{
     .name = "ptwrite",
+    .llvm_name = "ptwrite",
     .description = "Support ptwrite instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -521,6 +592,7 @@ pub const feature_ptwrite = Feature{
 
 pub const feature_padShortFunctions = Feature{
     .name = "pad-short-functions",
+    .llvm_name = "pad-short-functions",
     .description = "Pad short functions",
     .dependencies = &[_]*const Feature {
     },
@@ -528,6 +600,7 @@ pub const feature_padShortFunctions = Feature{
 
 pub const feature_prefer128Bit = Feature{
     .name = "prefer-128-bit",
+    .llvm_name = "prefer-128-bit",
     .description = "Prefer 128-bit AVX instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -535,6 +608,7 @@ pub const feature_prefer128Bit = Feature{
 
 pub const feature_prefer256Bit = Feature{
     .name = "prefer-256-bit",
+    .llvm_name = "prefer-256-bit",
     .description = "Prefer 256-bit AVX instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -542,6 +616,7 @@ pub const feature_prefer256Bit = Feature{
 
 pub const feature_rdpid = Feature{
     .name = "rdpid",
+    .llvm_name = "rdpid",
     .description = "Support RDPID instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -549,6 +624,7 @@ pub const feature_rdpid = Feature{
 
 pub const feature_rdrnd = Feature{
     .name = "rdrnd",
+    .llvm_name = "rdrnd",
     .description = "Support RDRAND instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -556,6 +632,7 @@ pub const feature_rdrnd = Feature{
 
 pub const feature_rdseed = Feature{
     .name = "rdseed",
+    .llvm_name = "rdseed",
     .description = "Support RDSEED instruction",
     .dependencies = &[_]*const Feature {
     },
@@ -563,6 +640,7 @@ pub const feature_rdseed = Feature{
 
 pub const feature_rtm = Feature{
     .name = "rtm",
+    .llvm_name = "rtm",
     .description = "Support RTM instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -570,6 +648,7 @@ pub const feature_rtm = Feature{
 
 pub const feature_retpoline = Feature{
     .name = "retpoline",
+    .llvm_name = "retpoline",
     .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
     .dependencies = &[_]*const Feature {
         &feature_retpolineIndirectCalls,
@@ -579,6 +658,7 @@ pub const feature_retpoline = Feature{
 
 pub const feature_retpolineExternalThunk = Feature{
     .name = "retpoline-external-thunk",
+    .llvm_name = "retpoline-external-thunk",
     .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
     .dependencies = &[_]*const Feature {
         &feature_retpolineIndirectCalls,
@@ -587,6 +667,7 @@ pub const feature_retpolineExternalThunk = Feature{
 
 pub const feature_retpolineIndirectBranches = Feature{
     .name = "retpoline-indirect-branches",
+    .llvm_name = "retpoline-indirect-branches",
     .description = "Remove speculation of indirect branches from the generated code",
     .dependencies = &[_]*const Feature {
     },
@@ -594,6 +675,7 @@ pub const feature_retpolineIndirectBranches = Feature{
 
 pub const feature_retpolineIndirectCalls = Feature{
     .name = "retpoline-indirect-calls",
+    .llvm_name = "retpoline-indirect-calls",
     .description = "Remove speculation of indirect calls from the generated code",
     .dependencies = &[_]*const Feature {
     },
@@ -601,6 +683,7 @@ pub const feature_retpolineIndirectCalls = Feature{
 
 pub const feature_sgx = Feature{
     .name = "sgx",
+    .llvm_name = "sgx",
     .description = "Enable Software Guard Extensions",
     .dependencies = &[_]*const Feature {
     },
@@ -608,6 +691,7 @@ pub const feature_sgx = Feature{
 
 pub const feature_sha = Feature{
     .name = "sha",
+    .llvm_name = "sha",
     .description = "Enable SHA instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -616,6 +700,7 @@ pub const feature_sha = Feature{
 
 pub const feature_shstk = Feature{
     .name = "shstk",
+    .llvm_name = "shstk",
     .description = "Support CET Shadow-Stack instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -623,6 +708,7 @@ pub const feature_shstk = Feature{
 
 pub const feature_sse = Feature{
     .name = "sse",
+    .llvm_name = "sse",
     .description = "Enable SSE instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -630,6 +716,7 @@ pub const feature_sse = Feature{
 
 pub const feature_sse2 = Feature{
     .name = "sse2",
+    .llvm_name = "sse2",
     .description = "Enable SSE2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -638,6 +725,7 @@ pub const feature_sse2 = Feature{
 
 pub const feature_sse3 = Feature{
     .name = "sse3",
+    .llvm_name = "sse3",
     .description = "Enable SSE3 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -646,6 +734,7 @@ pub const feature_sse3 = Feature{
 
 pub const feature_sse4a = Feature{
     .name = "sse4a",
+    .llvm_name = "sse4a",
     .description = "Support SSE 4a instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -654,6 +743,7 @@ pub const feature_sse4a = Feature{
 
 pub const feature_sse41 = Feature{
     .name = "sse4.1",
+    .llvm_name = "sse4.1",
     .description = "Enable SSE 4.1 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -662,6 +752,7 @@ pub const feature_sse41 = Feature{
 
 pub const feature_sse42 = Feature{
     .name = "sse4.2",
+    .llvm_name = "sse4.2",
     .description = "Enable SSE 4.2 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -670,6 +761,7 @@ pub const feature_sse42 = Feature{
 
 pub const feature_sseUnalignedMem = Feature{
     .name = "sse-unaligned-mem",
+    .llvm_name = "sse-unaligned-mem",
     .description = "Allow unaligned memory operands with SSE instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -677,6 +769,7 @@ pub const feature_sseUnalignedMem = Feature{
 
 pub const feature_ssse3 = Feature{
     .name = "ssse3",
+    .llvm_name = "ssse3",
     .description = "Enable SSSE3 instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -685,6 +778,7 @@ pub const feature_ssse3 = Feature{
 
 pub const feature_slow3opsLea = Feature{
     .name = "slow-3ops-lea",
+    .llvm_name = "slow-3ops-lea",
     .description = "LEA instruction with 3 ops or certain registers is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -692,6 +786,7 @@ pub const feature_slow3opsLea = Feature{
 
 pub const feature_idivlToDivb = Feature{
     .name = "idivl-to-divb",
+    .llvm_name = "idivl-to-divb",
     .description = "Use 8-bit divide for positive values less than 256",
     .dependencies = &[_]*const Feature {
     },
@@ -699,6 +794,7 @@ pub const feature_idivlToDivb = Feature{
 
 pub const feature_idivqToDivl = Feature{
     .name = "idivq-to-divl",
+    .llvm_name = "idivq-to-divl",
     .description = "Use 32-bit divide for positive values less than 2^32",
     .dependencies = &[_]*const Feature {
     },
@@ -706,6 +802,7 @@ pub const feature_idivqToDivl = Feature{
 
 pub const feature_slowIncdec = Feature{
     .name = "slow-incdec",
+    .llvm_name = "slow-incdec",
     .description = "INC and DEC instructions are slower than ADD and SUB",
     .dependencies = &[_]*const Feature {
     },
@@ -713,6 +810,7 @@ pub const feature_slowIncdec = Feature{
 
 pub const feature_slowLea = Feature{
     .name = "slow-lea",
+    .llvm_name = "slow-lea",
     .description = "LEA instruction with certain arguments is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -720,6 +818,7 @@ pub const feature_slowLea = Feature{
 
 pub const feature_slowPmaddwd = Feature{
     .name = "slow-pmaddwd",
+    .llvm_name = "slow-pmaddwd",
     .description = "PMADDWD is slower than PMULLD",
     .dependencies = &[_]*const Feature {
     },
@@ -727,6 +826,7 @@ pub const feature_slowPmaddwd = Feature{
 
 pub const feature_slowPmulld = Feature{
     .name = "slow-pmulld",
+    .llvm_name = "slow-pmulld",
     .description = "PMULLD instruction is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -734,6 +834,7 @@ pub const feature_slowPmulld = Feature{
 
 pub const feature_slowShld = Feature{
     .name = "slow-shld",
+    .llvm_name = "slow-shld",
     .description = "SHLD instruction is slow",
     .dependencies = &[_]*const Feature {
     },
@@ -741,6 +842,7 @@ pub const feature_slowShld = Feature{
 
 pub const feature_slowTwoMemOps = Feature{
     .name = "slow-two-mem-ops",
+    .llvm_name = "slow-two-mem-ops",
     .description = "Two memory operand instructions are slow",
     .dependencies = &[_]*const Feature {
     },
@@ -748,6 +850,7 @@ pub const feature_slowTwoMemOps = Feature{
 
 pub const feature_slowUnalignedMem16 = Feature{
     .name = "slow-unaligned-mem-16",
+    .llvm_name = "slow-unaligned-mem-16",
     .description = "Slow unaligned 16-byte memory access",
     .dependencies = &[_]*const Feature {
     },
@@ -755,6 +858,7 @@ pub const feature_slowUnalignedMem16 = Feature{
 
 pub const feature_slowUnalignedMem32 = Feature{
     .name = "slow-unaligned-mem-32",
+    .llvm_name = "slow-unaligned-mem-32",
     .description = "Slow unaligned 32-byte memory access",
     .dependencies = &[_]*const Feature {
     },
@@ -762,6 +866,7 @@ pub const feature_slowUnalignedMem32 = Feature{
 
 pub const feature_softFloat = Feature{
     .name = "soft-float",
+    .llvm_name = "soft-float",
     .description = "Use software floating point features",
     .dependencies = &[_]*const Feature {
     },
@@ -769,6 +874,7 @@ pub const feature_softFloat = Feature{
 
 pub const feature_tbm = Feature{
     .name = "tbm",
+    .llvm_name = "tbm",
     .description = "Enable TBM instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -776,6 +882,7 @@ pub const feature_tbm = Feature{
 
 pub const feature_useAa = Feature{
     .name = "use-aa",
+    .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
     },
@@ -783,6 +890,7 @@ pub const feature_useAa = Feature{
 
 pub const feature_vaes = Feature{
     .name = "vaes",
+    .llvm_name = "vaes",
     .description = "Promote selected AES instructions to AVX512/AVX registers",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -791,6 +899,7 @@ pub const feature_vaes = Feature{
 
 pub const feature_avx512vbmi = Feature{
     .name = "avx512vbmi",
+    .llvm_name = "avx512vbmi",
     .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -799,6 +908,7 @@ pub const feature_avx512vbmi = Feature{
 
 pub const feature_avx512vbmi2 = Feature{
     .name = "avx512vbmi2",
+    .llvm_name = "avx512vbmi2",
     .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -807,6 +917,7 @@ pub const feature_avx512vbmi2 = Feature{
 
 pub const feature_avx512vl = Feature{
     .name = "avx512vl",
+    .llvm_name = "avx512vl",
     .description = "Enable AVX-512 Vector Length eXtensions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -815,6 +926,7 @@ pub const feature_avx512vl = Feature{
 
 pub const feature_avx512vnni = Feature{
     .name = "avx512vnni",
+    .llvm_name = "avx512vnni",
     .description = "Enable AVX-512 Vector Neural Network Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -823,6 +935,7 @@ pub const feature_avx512vnni = Feature{
 
 pub const feature_avx512vp2intersect = Feature{
     .name = "avx512vp2intersect",
+    .llvm_name = "avx512vp2intersect",
     .description = "Enable AVX-512 vp2intersect",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -831,6 +944,7 @@ pub const feature_avx512vp2intersect = Feature{
 
 pub const feature_vpclmulqdq = Feature{
     .name = "vpclmulqdq",
+    .llvm_name = "vpclmulqdq",
     .description = "Enable vpclmulqdq instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -839,6 +953,7 @@ pub const feature_vpclmulqdq = Feature{
 
 pub const feature_avx512vpopcntdq = Feature{
     .name = "avx512vpopcntdq",
+    .llvm_name = "avx512vpopcntdq",
     .description = "Enable AVX-512 Population Count Instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -847,6 +962,7 @@ pub const feature_avx512vpopcntdq = Feature{
 
 pub const feature_waitpkg = Feature{
     .name = "waitpkg",
+    .llvm_name = "waitpkg",
     .description = "Wait and pause enhancements",
     .dependencies = &[_]*const Feature {
     },
@@ -854,6 +970,7 @@ pub const feature_waitpkg = Feature{
 
 pub const feature_wbnoinvd = Feature{
     .name = "wbnoinvd",
+    .llvm_name = "wbnoinvd",
     .description = "Write Back No Invalidate",
     .dependencies = &[_]*const Feature {
     },
@@ -861,6 +978,7 @@ pub const feature_wbnoinvd = Feature{
 
 pub const feature_x87 = Feature{
     .name = "x87",
+    .llvm_name = "x87",
     .description = "Enable X87 float instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -868,6 +986,7 @@ pub const feature_x87 = Feature{
 
 pub const feature_xop = Feature{
     .name = "xop",
+    .llvm_name = "xop",
     .description = "Enable XOP instructions",
     .dependencies = &[_]*const Feature {
         &feature_sse,
@@ -876,6 +995,7 @@ pub const feature_xop = Feature{
 
 pub const feature_xsave = Feature{
     .name = "xsave",
+    .llvm_name = "xsave",
     .description = "Support xsave instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -883,6 +1003,7 @@ pub const feature_xsave = Feature{
 
 pub const feature_xsavec = Feature{
     .name = "xsavec",
+    .llvm_name = "xsavec",
     .description = "Support xsavec instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -890,6 +1011,7 @@ pub const feature_xsavec = Feature{
 
 pub const feature_xsaveopt = Feature{
     .name = "xsaveopt",
+    .llvm_name = "xsaveopt",
     .description = "Support xsaveopt instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -897,6 +1019,7 @@ pub const feature_xsaveopt = Feature{
 
 pub const feature_xsaves = Feature{
     .name = "xsaves",
+    .llvm_name = "xsaves",
     .description = "Support xsaves instructions",
     .dependencies = &[_]*const Feature {
     },
@@ -904,6 +1027,7 @@ pub const feature_xsaves = Feature{
 
 pub const feature_bitMode16 = Feature{
     .name = "16bit-mode",
+    .llvm_name = "16bit-mode",
     .description = "16-bit mode (i8086)",
     .dependencies = &[_]*const Feature {
     },
@@ -911,6 +1035,7 @@ pub const feature_bitMode16 = Feature{
 
 pub const feature_bitMode32 = Feature{
     .name = "32bit-mode",
+    .llvm_name = "32bit-mode",
     .description = "32-bit mode (80386)",
     .dependencies = &[_]*const Feature {
     },
@@ -918,6 +1043,7 @@ pub const feature_bitMode32 = Feature{
 
 pub const feature_bitMode64 = Feature{
     .name = "64bit-mode",
+    .llvm_name = "64bit-mode",
     .description = "64-bit mode (x86_64)",
     .dependencies = &[_]*const Feature {
     },
-- 
2.54.0


From c61856ebcf54a55f1c17a5fd6a3b3300115b2c65 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 8 Jan 2020 20:27:36 -0500
Subject: [PATCH 046/116] Add TargetDetails abstraction

---
 lib/std/build.zig          |  42 +++----
 lib/std/target.zig         |   6 +
 src-self-hosted/stage1.zig | 223 +++++++++++++++++++++++--------------
 src/all_types.hpp          |   3 +-
 src/codegen.cpp            |  23 ++--
 src/main.cpp               |  25 ++++-
 src/userland.cpp           |  16 ++-
 src/userland.h             |  17 ++-
 8 files changed, 227 insertions(+), 128 deletions(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index 65c5a6f0640bcce1618e49abcbec0f04efba25b6..72fb173ac9b98c1a5a3f75fa88fd6711f72cb9fe 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1199,8 +1199,7 @@ pub const LibExeObjStep = struct {
 
     subsystem: ?builtin.SubSystem = null,
 
-    cpu: ?[]const u8 = null,
-    features: ?[]const u8 = null,
+    target_details: ?std.target.TargetDetails = null,
 
     const LinkObject = union(enum) {
         StaticPath: []const u8,
@@ -1387,21 +1386,8 @@ pub const LibExeObjStep = struct {
         self.computeOutFileNames();
     }
 
-    pub fn setCpu(self: *LibExeObjStep, cpu: *const std.target.Cpu) void {
-        self.cpu = cpu.name;
-    }
-
-    pub fn setFeatures(self: *LibExeObjStep, features: []*const std.target.Feature) void {
-        var features_str_buffer = std.Buffer.init(self.builder.allocator, "") catch unreachable;
-        defer features_str_buffer.deinit();
-
-        for (features) |feature| {
-            features_str_buffer.append("+") catch unreachable;
-            features_str_buffer.append(feature.name) catch unreachable;
-            features_str_buffer.append(",") catch unreachable;
-        }
-
-        self.features = features_str_buffer.toOwnedSlice();
+    pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void {
+        self.target_details = target_details;
     }
 
     pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void {
@@ -1994,14 +1980,20 @@ pub const LibExeObjStep = struct {
             },
         }
 
-        if (self.cpu) |cpu| {
-            try zig_args.append("--cpu");
-            try zig_args.append(cpu);
-        }
-
-        if (self.features) |features| {
-            try zig_args.append("--features");
-            try zig_args.append(features);
+        if (self.target_details) |td| {
+            switch (td) {
+                .cpu => |cpu| {
+                    try zig_args.append("--cpu");
+                    try zig_args.append(cpu.name);
+                },
+                .features => |features| {
+                    try zig_args.append("--features");
+                    for (features) |feature| {
+                        try zig_args.append(feature.name);
+                        try zig_args.append(",");
+                    }
+                },
+            }
         }
 
         if (self.target_glibc) |ver| {
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 8a86af6733e27a2025864404acd051b313501e2f..9bb4936f1116ffdfbf85e6f8e1dbff42c10a57a0 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -860,6 +860,7 @@ pub const x86 = @import("target/x86.zig");
 
 pub const Feature = struct {
     name: []const u8,
+    llvm_name: []const u8,
     description: []const u8,
 
     dependencies: []*const Feature,
@@ -872,6 +873,11 @@ pub const Cpu = struct {
     dependencies: []*const Feature,
 };
 
+pub const TargetDetails = union(enum) {
+    cpu: *const Cpu,
+    features: []*const Feature,
+};
+
 pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature {
     return switch (arch) {
         .arm, .armeb, .thumb, .thumbeb => arm.features,
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 8734b37a02e2752b98e9b93fac6d79bb2eedcfc4..4fdfb05df814b5ffdcf8cb57021d24fe7abe3c32 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -530,13 +530,13 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
 }
 
 // ABI warning
-export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
-    printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
+    printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
         std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
     };
 }
 
-fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void {
+fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
@@ -565,22 +565,22 @@ fn printFeaturesForArch(arch_name: []const u8, show_subfeatures: bool) !void {
 
         try stdout_stream.print(" - {}\n", .{ feature.description });
 
-        if (show_subfeatures and feature.subfeatures.len > 0) {
-            for (feature.subfeatures) |subfeature| {
-                try stdout_stream.print("    {}\n", .{ subfeature.name });
+        if (show_dependencies and feature.dependencies.len > 0) {
+            for (feature.dependencies) |dependency| {
+                try stdout_stream.print("    {}\n", .{ dependency.name });
             }
         }
     }
 }
 
 // ABI warning
-export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_subfeatures: bool) void {
-    printCpusForArch(arch_name_ptr[0..arch_name_len], show_subfeatures) catch |err| {
+export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
+    printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
         std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
     };
 }
 
-fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void {
+fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
@@ -609,99 +609,158 @@ fn printCpusForArch(arch_name: []const u8, show_subfeatures: bool) !void {
 
         try stdout_stream.write("\n");
 
-        if (show_subfeatures and cpu.subfeatures.len > 0) {
-            for (cpu.subfeatures) |subfeature| {
-                try stdout_stream.print("    {}\n", .{ subfeature.name });
+        if (show_dependencies and cpu.dependencies.len > 0) {
+            for (cpu.dependencies) |dependency| {
+                try stdout_stream.print("    {}\n", .{ dependency.name });
             }
         }
     }
 }
 
-// use target_arch_name(ZigLLVM_ArchType) to get name from main.cpp 'target'.
-// ABI warning
-export fn stage2_validate_cpu_and_features(
-    arch_name: [*:0]const u8, 
-    cpu: ?[*:0]const u8, 
-    features: ?[*:0]const u8, 
-) bool {
-    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_name)) catch {
-        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
-        return false;
-    };
-
-    const res = validateCpuAndFeatures(
-        arch, 
-        if (cpu) |def_cpu| std.mem.toSliceConst(u8, def_cpu) else "",
-        if (features) |def_features| std.mem.toSliceConst(u8, def_features) else "");
-
-    switch (res) {
-        .Ok => return true,
-        .InvalidCpu => |invalid_cpu| {
-            std.debug.warn("Invalid CPU '{}'\n", .{ invalid_cpu });
-            return false;
-        },
-        .InvalidFeaturesString => {
-            std.debug.warn("Invalid features string\n", .{});
-            std.debug.warn("Must have format \"+yes_feature,-no_feature\"\n", .{});
-            return false;
-        },
-        .InvalidFeature => |invalid_feature| {
-            std.debug.warn("Invalid feature '{}'\n", .{ invalid_feature });
-            return false;
-        }
-    }
-}
-
-const ValidateCpuAndFeaturesResult = union(enum) {
-    Ok,
-    InvalidCpu: []const u8,
-    InvalidFeaturesString,
-    InvalidFeature: []const u8,
+const Stage2TargetDetails = struct {
+    allocator: *std.mem.Allocator,
+    target_details: std.target.TargetDetails,
+    
+    llvm_cpu_str: [:0]const u8,
+    llvm_features_str: [:0]const u8,
 };
 
-fn validateCpuAndFeatures(arch: @TagType(std.Target.Arch), cpu: []const u8, features: []const u8) ValidateCpuAndFeaturesResult {
+// ABI warning
+export fn stage2_target_details_parse_cpu(arch_str: ?[*:0]const u8, cpu_str: ?[*:0]const u8) ?*Stage2TargetDetails {
+    if (cpu_str == null) return null;
+    if (arch_str == null) return null;
+
+    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch {
+        return null;
+    };
+    return parseCpu(arch, std.mem.toSliceConst(u8, cpu_str.?)) catch |err| {
+        switch (err) {
+            error.OutOfMemory => @panic("out of memory"),
+            else => return null,
+        }
+    };
+}
+
+// ABI warning
+export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, features_str: ?[*:0]const u8) ?*Stage2TargetDetails {
+    if (features_str == null) return null;
+    if (arch_str == null) return null;
+    
+    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null;
+    return parseFeatures(arch, std.mem.toSliceConst(u8, features_str.?)) catch |err| {
+        switch (err) {
+            error.OutOfMemory => @panic("out of memory"),
+            else => return null,
+        }
+    };
+}
+
+fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails {
+    const cpus = std.target.getCpusForArch(arch);
+
+    for (cpus) |cpu| {
+        if (std.mem.eql(u8, str, cpu.name)) {
+            const allocator = std.heap.c_allocator;
+
+            const ptr = try allocator.create(Stage2TargetDetails);
+            ptr.* = .{
+                .allocator = allocator,
+                .target_details = .{
+                    .cpu = cpu,
+                },
+                .llvm_cpu_str = cpu.name,
+                .llvm_features_str = "",
+            };
+
+            return ptr;
+        }
+    }
+
+    return error.InvalidCpu;
+}
+
+fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails {
+    const allocator = std.heap.c_allocator;
 
-    const known_cpus = std.target.getCpusForArch(arch);
     const known_features = std.target.getFeaturesForArch(arch);
-    
-    if (cpu.len > 0) {
-        var found_cpu = false;
-        for (known_cpus) |known_cpu| {
-            if (std.mem.eql(u8, cpu, known_cpu.name)) {
-                found_cpu = true;
+
+    var features = std.ArrayList(*const std.target.Feature).init(allocator);
+    defer features.deinit();
+
+    var start: usize = 0;
+    while (start < str.len) {
+        const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start;
+        const feature_str = std.mem.trim(u8, str[start..start+next_comma_pos], " ");
+
+        start += next_comma_pos + 1;
+
+        if (feature_str.len == 0) continue;
+
+        var feature: ?*const std.target.Feature = null;
+        for (known_features) |known_feature| {
+            if (std.mem.eql(u8, feature_str, known_feature.name)) {
+                feature = known_feature;
                 break;
             }
         }
 
-        if (!found_cpu) {
-            return .{ .InvalidCpu = cpu };
+        if (feature) |f| {
+            features.append(f) catch @panic("out of memory");
+        } else {
+            return error.InvalidFeature;
         }
     }
+    
+    const features_slice = features.toOwnedSlice();
 
-    if (features.len > 0) {
-        var start: usize = 0;
-        while (start < features.len) {
-            const next_comma_pos = std.mem.indexOfScalar(u8, features[start..], ',') orelse features.len - start;
-            var feature = features[start..start+next_comma_pos];
+    var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
+    defer llvm_features_buffer.deinit();
 
-            if (feature.len < 2) return .{ .InvalidFeaturesString = {} };
-            
-            if (feature[0] != '+' and feature[0] != '-') return .{ .InvalidFeaturesString = {} };
-            feature = feature[1..];
+    for (features_slice) |feature| {
+        try llvm_features_buffer.append("+");
+        try llvm_features_buffer.append(feature.llvm_name);
+        try llvm_features_buffer.append(",");
+    }
 
-            var found_feature = false;
-            for (known_features) |known_feature| {
-                if (std.mem.eql(u8, feature, known_feature.name)) {
-                    found_feature = true;
-                    break;
-                }
-            }
+    const ptr = try allocator.create(Stage2TargetDetails);
+    ptr.* = Stage2TargetDetails{
+        .allocator = allocator,
+        .target_details = std.target.TargetDetails{
+            .features = features_slice,
+        },
+        .llvm_cpu_str = "",
+        .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+    };
 
-            if (!found_feature) return .{ .InvalidFeature = feature };
+    return ptr;
+}
 
-            start += next_comma_pos + 1;
-        }
+// ABI warning
+export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
+    if (target_details) |td| {
+        return @as([*:0]const u8, switch (td.target_details) {
+            .cpu => td.llvm_cpu_str,
+            .features => td.llvm_features_str,
+        });
+    }
+
+    return @as([*:0]const u8, "");
+}
+
+// ABI warning
+export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
+    if (target_details) |td| {
+        return @as([*:0]const u8, td.llvm_cpu_str);
+    }
+
+    return @as([*:0]const u8, "");
+}
+
+// ABI warning
+export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
+    if (target_details) |td| {
+        return @as([*:0]const u8, td.llvm_features_str);
     }
 
-    return .{ .Ok = {} };
+    return @as([*:0]const u8, "");
 }
diff --git a/src/all_types.hpp b/src/all_types.hpp
index af4914e29ecf0f2df75d3528506ac3f72dd960de..d81e401232e057cc5a2b5454ed61a0e74cd868df 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -2216,8 +2216,7 @@ struct CodeGen {
     const char **clang_argv;
     size_t clang_argv_len;
 
-    const char *llvm_cpu;
-    const char *llvm_features;
+    Stage2TargetDetails *target_details;
 };
 
 struct ZigVar {
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 798f406c8e02ce11768420ea79110ff8cfd10704..760284a2e27b0fe4a288a24cf8d58542a7b0f863 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8655,8 +8655,10 @@ static Error define_builtin_compile_vars(CodeGen *g) {
     cache_bool(&cache_hash, g->valgrind_support);
     cache_bool(&cache_hash, g->link_eh_frame_hdr);
     cache_int(&cache_hash, detect_subsystem(g));
-    if (g->llvm_cpu) cache_str(&cache_hash, g->llvm_cpu);
-    if (g->llvm_features) cache_str(&cache_hash, g->llvm_features);
+
+    if (g->target_details) {
+        cache_str(&cache_hash, stage2_target_details_get_cache_str(g->target_details));
+    }
 
     Buf digest = BUF_INIT;
     buf_resize(&digest, 0);
@@ -8802,15 +8804,12 @@ static void init(CodeGen *g) {
         target_specific_features = "";
     }
 
-    // Override CPU and features if non-null.
-    if (g->llvm_cpu != nullptr) {
-        target_specific_cpu_args = g->llvm_cpu;
+    // Override CPU and features if defined by user.
+    if (g->target_details) {
+        target_specific_cpu_args = stage2_target_details_get_llvm_cpu(g->target_details);
+        target_specific_features = stage2_target_details_get_llvm_features(g->target_details);
     }
     
-    if (g->llvm_features != nullptr) {
-        target_specific_features = g->llvm_features;
-    }
-
     g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
             target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
             LLVMCodeModelDefault, g->function_sections);
@@ -10390,8 +10389,10 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
     }
     cache_buf_opt(ch, g->dynamic_linker_path);
     cache_buf_opt(ch, g->version_script_path);
-    if (g->llvm_cpu) cache_str(ch, g->llvm_cpu);
-    if (g->llvm_features) cache_str(ch, g->llvm_features);
+
+    if (g->target_details) {
+        cache_str(ch, stage2_target_details_get_cache_str(g->target_details));
+    }
 
     // gen_c_objects appends objects to g->link_objects which we want to include in the hash
     gen_c_objects(g);
diff --git a/src/main.cpp b/src/main.cpp
index 32efb9f0202566cf56e2a31a3a118883efc0bab2..da8b354796ad445744346d12c6a8fc8ecf25532e 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -535,8 +535,8 @@ int main(int argc, char **argv) {
     WantStackCheck want_stack_check = WantStackCheckAuto;
     WantCSanitize want_sanitize_c = WantCSanitizeAuto;
     bool function_sections = false;
-    const char *cpu = "";
-    const char *features = "";
+    const char *cpu = nullptr;
+    const char *features = nullptr;
 
     const char *targets_list_features_arch = nullptr;
     const char *targets_list_cpus_arch = nullptr;
@@ -1278,12 +1278,25 @@ int main(int argc, char **argv) {
                 codegen_add_rpath(g, rpath_list.at(i));
             }
 
-            if (!stage2_validate_cpu_and_features(target_arch_name(target.arch), cpu, features)) {
-                return 1;
+            Stage2TargetDetails *target_details = nullptr;
+            if (cpu && features) {
+                fprintf(stderr, "--cpu and --features options not allowed together\n");
+                return main_exit(root_progress_node, EXIT_FAILURE);
+            } else if (cpu) {
+                target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu);
+                if (!target_details) {
+                    fprintf(stderr, "invalid --cpu value\n");
+                    return main_exit(root_progress_node, EXIT_FAILURE);
+                }
+            } else if (features) {
+                target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features);
+                if (!target_details) {
+                    fprintf(stderr, "invalid --features value\n");
+                    return main_exit(root_progress_node, EXIT_FAILURE);
+                }
             }
 
-            g->llvm_cpu = cpu;
-            g->llvm_features = features;
+            g->target_details = target_details;
 
             codegen_set_rdynamic(g, rdynamic);
             if (mmacosx_version_min && mios_version_min) {
diff --git a/src/userland.cpp b/src/userland.cpp
index e0c8b33fa2b2d6ed234ab90c3f7adc206d8cd986..468017cb51a63b335558884dffdbc4b226d3c576 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -91,4 +91,18 @@ void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_coun
 
 void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
 void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
-bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features) { return true; }
+Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str) {
+    return nullptr;
+}
+Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str) {
+    return nullptr;
+}
+const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details) {
+    return "";
+}
+const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details) {
+    return "";
+}
+const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) {
+    return "";
+}
diff --git a/src/userland.h b/src/userland.h
index 9d3e9623fba9eda5ffb1ec6cf6d0931a2afc5671..11801e10388a5071f593c17d68ed974bdc6e6c4f 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -181,6 +181,21 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_
 ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
 
 // ABI warning
-ZIG_EXTERN_C bool stage2_validate_cpu_and_features(const char *arch_name, const char *cpu, const char *features);
+struct Stage2TargetDetails;
+
+// ABI warning
+ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str);
+
+// ABI warning
+ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str);
+
+// ABI warning
+ZIG_EXTERN_C const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details);
+
+// ABI warning
+ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details);
+
+// ABI warning
+ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details);
 
 #endif
-- 
2.54.0


From 03dd376b55a57cbc10269f771f72ced1eaa7aabb Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 8 Jan 2020 21:35:26 -0500
Subject: [PATCH 047/116] Add builtin.zig support

---
 lib/std/build.zig          |   10 +-
 lib/std/target/aarch64.zig |  658 ++++----
 lib/std/target/amdgpu.zig  | 1068 ++++++------
 lib/std/target/arm.zig     |  848 +++++-----
 lib/std/target/avr.zig     | 3166 ++++++++++++++++++------------------
 lib/std/target/hexagon.zig |    8 +-
 lib/std/target/mips.zig    |  226 +--
 lib/std/target/powerpc.zig |   42 +-
 lib/std/target/riscv.zig   |    8 +-
 lib/std/target/sparc.zig   |   18 +-
 lib/std/target/systemz.zig |   68 +-
 lib/std/target/wasm.zig    |   16 +-
 lib/std/target/x86.zig     |  136 +-
 src-self-hosted/stage1.zig |   36 +
 src/codegen.cpp            |    8 +
 src/main.cpp               |   37 +-
 src/userland.cpp           |    3 +
 src/userland.h             |    3 +
 18 files changed, 3208 insertions(+), 3151 deletions(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index 72fb173ac9b98c1a5a3f75fa88fd6711f72cb9fe..72d26ff0475eff35e5a5da656bfe0c830e4b5cbc 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1988,10 +1988,16 @@ pub const LibExeObjStep = struct {
                 },
                 .features => |features| {
                     try zig_args.append("--features");
+                    
+                    var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
+                    defer feature_str_buffer.deinit();
+
                     for (features) |feature| {
-                        try zig_args.append(feature.name);
-                        try zig_args.append(",");
+                        try feature_str_buffer.append(feature.name);
+                        try feature_str_buffer.append(",");
                     }
+
+                    try zig_args.append(feature_str_buffer.toOwnedSlice());
                 },
             }
         }
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 404a55e7a5543b747d52e34fd1469d1639c38562..c3c530fb6fd66839c2b6e443d6fa72a16186cb5a 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -19,7 +19,7 @@ pub const feature_am = Feature{
 };
 
 pub const feature_aggressiveFma = Feature{
-    .name = "aggressive-fma",
+    .name = "aggressiveFma",
     .llvm_name = "aggressive-fma",
     .description = "Enable Aggressive FMA for floating-point.",
     .dependencies = &[_]*const Feature {
@@ -35,7 +35,7 @@ pub const feature_altnzcv = Feature{
 };
 
 pub const feature_alternateSextloadCvtF32Pattern = Feature{
-    .name = "alternate-sextload-cvt-f32-pattern",
+    .name = "alternateSextloadCvtF32Pattern",
     .llvm_name = "alternate-sextload-cvt-f32-pattern",
     .description = "Use alternative pattern for sextload convert to f32",
     .dependencies = &[_]*const Feature {
@@ -43,7 +43,7 @@ pub const feature_alternateSextloadCvtF32Pattern = Feature{
 };
 
 pub const feature_arithBccFusion = Feature{
-    .name = "arith-bcc-fusion",
+    .name = "arithBccFusion",
     .llvm_name = "arith-bcc-fusion",
     .description = "CPU fuses arithmetic+bcc operations",
     .dependencies = &[_]*const Feature {
@@ -51,7 +51,7 @@ pub const feature_arithBccFusion = Feature{
 };
 
 pub const feature_arithCbzFusion = Feature{
-    .name = "arith-cbz-fusion",
+    .name = "arithCbzFusion",
     .llvm_name = "arith-cbz-fusion",
     .description = "CPU fuses arithmetic + cbz/cbnz operations",
     .dependencies = &[_]*const Feature {
@@ -59,7 +59,7 @@ pub const feature_arithCbzFusion = Feature{
 };
 
 pub const feature_balanceFpOps = Feature{
-    .name = "balance-fp-ops",
+    .name = "balanceFpOps",
     .llvm_name = "balance-fp-ops",
     .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
     .dependencies = &[_]*const Feature {
@@ -107,7 +107,7 @@ pub const feature_ccdp = Feature{
 };
 
 pub const feature_callSavedX8 = Feature{
-    .name = "call-saved-x8",
+    .name = "callSavedX8",
     .llvm_name = "call-saved-x8",
     .description = "Make X8 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -115,7 +115,7 @@ pub const feature_callSavedX8 = Feature{
 };
 
 pub const feature_callSavedX9 = Feature{
-    .name = "call-saved-x9",
+    .name = "callSavedX9",
     .llvm_name = "call-saved-x9",
     .description = "Make X9 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -123,7 +123,7 @@ pub const feature_callSavedX9 = Feature{
 };
 
 pub const feature_callSavedX10 = Feature{
-    .name = "call-saved-x10",
+    .name = "callSavedX10",
     .llvm_name = "call-saved-x10",
     .description = "Make X10 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -131,7 +131,7 @@ pub const feature_callSavedX10 = Feature{
 };
 
 pub const feature_callSavedX11 = Feature{
-    .name = "call-saved-x11",
+    .name = "callSavedX11",
     .llvm_name = "call-saved-x11",
     .description = "Make X11 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -139,7 +139,7 @@ pub const feature_callSavedX11 = Feature{
 };
 
 pub const feature_callSavedX12 = Feature{
-    .name = "call-saved-x12",
+    .name = "callSavedX12",
     .llvm_name = "call-saved-x12",
     .description = "Make X12 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -147,7 +147,7 @@ pub const feature_callSavedX12 = Feature{
 };
 
 pub const feature_callSavedX13 = Feature{
-    .name = "call-saved-x13",
+    .name = "callSavedX13",
     .llvm_name = "call-saved-x13",
     .description = "Make X13 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -155,7 +155,7 @@ pub const feature_callSavedX13 = Feature{
 };
 
 pub const feature_callSavedX14 = Feature{
-    .name = "call-saved-x14",
+    .name = "callSavedX14",
     .llvm_name = "call-saved-x14",
     .description = "Make X14 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -163,7 +163,7 @@ pub const feature_callSavedX14 = Feature{
 };
 
 pub const feature_callSavedX15 = Feature{
-    .name = "call-saved-x15",
+    .name = "callSavedX15",
     .llvm_name = "call-saved-x15",
     .description = "Make X15 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -171,7 +171,7 @@ pub const feature_callSavedX15 = Feature{
 };
 
 pub const feature_callSavedX18 = Feature{
-    .name = "call-saved-x18",
+    .name = "callSavedX18",
     .llvm_name = "call-saved-x18",
     .description = "Make X18 callee saved.",
     .dependencies = &[_]*const Feature {
@@ -197,7 +197,7 @@ pub const feature_crypto = Feature{
 };
 
 pub const feature_customCheapAsMove = Feature{
-    .name = "custom-cheap-as-move",
+    .name = "customCheapAsMove",
     .llvm_name = "custom-cheap-as-move",
     .description = "Use custom handling of cheap instructions",
     .dependencies = &[_]*const Feature {
@@ -213,7 +213,7 @@ pub const feature_dit = Feature{
 };
 
 pub const feature_disableLatencySchedHeuristic = Feature{
-    .name = "disable-latency-sched-heuristic",
+    .name = "disableLatencySchedHeuristic",
     .llvm_name = "disable-latency-sched-heuristic",
     .description = "Disable latency scheduling heuristic",
     .dependencies = &[_]*const Feature {
@@ -238,7 +238,7 @@ pub const feature_ete = Feature{
 };
 
 pub const feature_exynosCheapAsMove = Feature{
-    .name = "exynos-cheap-as-move",
+    .name = "exynosCheapAsMove",
     .llvm_name = "exynos-cheap-as-move",
     .description = "Use Exynos specific handling of cheap instructions",
     .dependencies = &[_]*const Feature {
@@ -264,7 +264,7 @@ pub const feature_fp16fml = Feature{
 };
 
 pub const feature_fpArmv8 = Feature{
-    .name = "fp-armv8",
+    .name = "fpArmv8",
     .llvm_name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .dependencies = &[_]*const Feature {
@@ -280,7 +280,7 @@ pub const feature_fptoint = Feature{
 };
 
 pub const feature_force32bitJumpTables = Feature{
-    .name = "force-32bit-jump-tables",
+    .name = "force32bitJumpTables",
     .llvm_name = "force-32bit-jump-tables",
     .description = "Force jump table entries to be 32-bits wide except at MinSize",
     .dependencies = &[_]*const Feature {
@@ -297,7 +297,7 @@ pub const feature_fullfp16 = Feature{
 };
 
 pub const feature_fuseAes = Feature{
-    .name = "fuse-aes",
+    .name = "fuseAes",
     .llvm_name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
     .dependencies = &[_]*const Feature {
@@ -305,7 +305,7 @@ pub const feature_fuseAes = Feature{
 };
 
 pub const feature_fuseAddress = Feature{
-    .name = "fuse-address",
+    .name = "fuseAddress",
     .llvm_name = "fuse-address",
     .description = "CPU fuses address generation and memory operations",
     .dependencies = &[_]*const Feature {
@@ -313,7 +313,7 @@ pub const feature_fuseAddress = Feature{
 };
 
 pub const feature_fuseArithLogic = Feature{
-    .name = "fuse-arith-logic",
+    .name = "fuseArithLogic",
     .llvm_name = "fuse-arith-logic",
     .description = "CPU fuses arithmetic and logic operations",
     .dependencies = &[_]*const Feature {
@@ -321,7 +321,7 @@ pub const feature_fuseArithLogic = Feature{
 };
 
 pub const feature_fuseCsel = Feature{
-    .name = "fuse-csel",
+    .name = "fuseCsel",
     .llvm_name = "fuse-csel",
     .description = "CPU fuses conditional select operations",
     .dependencies = &[_]*const Feature {
@@ -329,7 +329,7 @@ pub const feature_fuseCsel = Feature{
 };
 
 pub const feature_fuseCryptoEor = Feature{
-    .name = "fuse-crypto-eor",
+    .name = "fuseCryptoEor",
     .llvm_name = "fuse-crypto-eor",
     .description = "CPU fuses AES/PMULL and EOR operations",
     .dependencies = &[_]*const Feature {
@@ -337,7 +337,7 @@ pub const feature_fuseCryptoEor = Feature{
 };
 
 pub const feature_fuseLiterals = Feature{
-    .name = "fuse-literals",
+    .name = "fuseLiterals",
     .llvm_name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
     .dependencies = &[_]*const Feature {
@@ -370,7 +370,7 @@ pub const feature_lse = Feature{
 };
 
 pub const feature_lslFast = Feature{
-    .name = "lsl-fast",
+    .name = "lslFast",
     .llvm_name = "lsl-fast",
     .description = "CPU has a fastpath logical shift of up to 3 places",
     .dependencies = &[_]*const Feature {
@@ -411,7 +411,7 @@ pub const feature_nv = Feature{
 };
 
 pub const feature_noNegImmediates = Feature{
-    .name = "no-neg-immediates",
+    .name = "noNegImmediates",
     .llvm_name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
     .dependencies = &[_]*const Feature {
@@ -435,7 +435,7 @@ pub const feature_pan = Feature{
 };
 
 pub const feature_panRwv = Feature{
-    .name = "pan-rwv",
+    .name = "panRwv",
     .llvm_name = "pan-rwv",
     .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
     .dependencies = &[_]*const Feature {
@@ -452,7 +452,7 @@ pub const feature_perfmon = Feature{
 };
 
 pub const feature_usePostraScheduler = Feature{
-    .name = "use-postra-scheduler",
+    .name = "usePostraScheduler",
     .llvm_name = "use-postra-scheduler",
     .description = "Schedule again after register allocation",
     .dependencies = &[_]*const Feature {
@@ -468,7 +468,7 @@ pub const feature_predres = Feature{
 };
 
 pub const feature_predictableSelectExpensive = Feature{
-    .name = "predictable-select-expensive",
+    .name = "predictableSelectExpensive",
     .llvm_name = "predictable-select-expensive",
     .description = "Prefer likely predicted branches over selects",
     .dependencies = &[_]*const Feature {
@@ -509,7 +509,7 @@ pub const feature_rcpc = Feature{
 };
 
 pub const feature_rcpcImmo = Feature{
-    .name = "rcpc-immo",
+    .name = "rcpcImmo",
     .llvm_name = "rcpc-immo",
     .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
     .dependencies = &[_]*const Feature {
@@ -534,7 +534,7 @@ pub const feature_rand = Feature{
 };
 
 pub const feature_reserveX1 = Feature{
-    .name = "reserve-x1",
+    .name = "reserveX1",
     .llvm_name = "reserve-x1",
     .description = "Reserve X1, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -542,7 +542,7 @@ pub const feature_reserveX1 = Feature{
 };
 
 pub const feature_reserveX2 = Feature{
-    .name = "reserve-x2",
+    .name = "reserveX2",
     .llvm_name = "reserve-x2",
     .description = "Reserve X2, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -550,7 +550,7 @@ pub const feature_reserveX2 = Feature{
 };
 
 pub const feature_reserveX3 = Feature{
-    .name = "reserve-x3",
+    .name = "reserveX3",
     .llvm_name = "reserve-x3",
     .description = "Reserve X3, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -558,7 +558,7 @@ pub const feature_reserveX3 = Feature{
 };
 
 pub const feature_reserveX4 = Feature{
-    .name = "reserve-x4",
+    .name = "reserveX4",
     .llvm_name = "reserve-x4",
     .description = "Reserve X4, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -566,7 +566,7 @@ pub const feature_reserveX4 = Feature{
 };
 
 pub const feature_reserveX5 = Feature{
-    .name = "reserve-x5",
+    .name = "reserveX5",
     .llvm_name = "reserve-x5",
     .description = "Reserve X5, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -574,7 +574,7 @@ pub const feature_reserveX5 = Feature{
 };
 
 pub const feature_reserveX6 = Feature{
-    .name = "reserve-x6",
+    .name = "reserveX6",
     .llvm_name = "reserve-x6",
     .description = "Reserve X6, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -582,7 +582,7 @@ pub const feature_reserveX6 = Feature{
 };
 
 pub const feature_reserveX7 = Feature{
-    .name = "reserve-x7",
+    .name = "reserveX7",
     .llvm_name = "reserve-x7",
     .description = "Reserve X7, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -590,7 +590,7 @@ pub const feature_reserveX7 = Feature{
 };
 
 pub const feature_reserveX9 = Feature{
-    .name = "reserve-x9",
+    .name = "reserveX9",
     .llvm_name = "reserve-x9",
     .description = "Reserve X9, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -598,7 +598,7 @@ pub const feature_reserveX9 = Feature{
 };
 
 pub const feature_reserveX10 = Feature{
-    .name = "reserve-x10",
+    .name = "reserveX10",
     .llvm_name = "reserve-x10",
     .description = "Reserve X10, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -606,7 +606,7 @@ pub const feature_reserveX10 = Feature{
 };
 
 pub const feature_reserveX11 = Feature{
-    .name = "reserve-x11",
+    .name = "reserveX11",
     .llvm_name = "reserve-x11",
     .description = "Reserve X11, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -614,7 +614,7 @@ pub const feature_reserveX11 = Feature{
 };
 
 pub const feature_reserveX12 = Feature{
-    .name = "reserve-x12",
+    .name = "reserveX12",
     .llvm_name = "reserve-x12",
     .description = "Reserve X12, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -622,7 +622,7 @@ pub const feature_reserveX12 = Feature{
 };
 
 pub const feature_reserveX13 = Feature{
-    .name = "reserve-x13",
+    .name = "reserveX13",
     .llvm_name = "reserve-x13",
     .description = "Reserve X13, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -630,7 +630,7 @@ pub const feature_reserveX13 = Feature{
 };
 
 pub const feature_reserveX14 = Feature{
-    .name = "reserve-x14",
+    .name = "reserveX14",
     .llvm_name = "reserve-x14",
     .description = "Reserve X14, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -638,7 +638,7 @@ pub const feature_reserveX14 = Feature{
 };
 
 pub const feature_reserveX15 = Feature{
-    .name = "reserve-x15",
+    .name = "reserveX15",
     .llvm_name = "reserve-x15",
     .description = "Reserve X15, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -646,7 +646,7 @@ pub const feature_reserveX15 = Feature{
 };
 
 pub const feature_reserveX18 = Feature{
-    .name = "reserve-x18",
+    .name = "reserveX18",
     .llvm_name = "reserve-x18",
     .description = "Reserve X18, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -654,7 +654,7 @@ pub const feature_reserveX18 = Feature{
 };
 
 pub const feature_reserveX20 = Feature{
-    .name = "reserve-x20",
+    .name = "reserveX20",
     .llvm_name = "reserve-x20",
     .description = "Reserve X20, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -662,7 +662,7 @@ pub const feature_reserveX20 = Feature{
 };
 
 pub const feature_reserveX21 = Feature{
-    .name = "reserve-x21",
+    .name = "reserveX21",
     .llvm_name = "reserve-x21",
     .description = "Reserve X21, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -670,7 +670,7 @@ pub const feature_reserveX21 = Feature{
 };
 
 pub const feature_reserveX22 = Feature{
-    .name = "reserve-x22",
+    .name = "reserveX22",
     .llvm_name = "reserve-x22",
     .description = "Reserve X22, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -678,7 +678,7 @@ pub const feature_reserveX22 = Feature{
 };
 
 pub const feature_reserveX23 = Feature{
-    .name = "reserve-x23",
+    .name = "reserveX23",
     .llvm_name = "reserve-x23",
     .description = "Reserve X23, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -686,7 +686,7 @@ pub const feature_reserveX23 = Feature{
 };
 
 pub const feature_reserveX24 = Feature{
-    .name = "reserve-x24",
+    .name = "reserveX24",
     .llvm_name = "reserve-x24",
     .description = "Reserve X24, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -694,7 +694,7 @@ pub const feature_reserveX24 = Feature{
 };
 
 pub const feature_reserveX25 = Feature{
-    .name = "reserve-x25",
+    .name = "reserveX25",
     .llvm_name = "reserve-x25",
     .description = "Reserve X25, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -702,7 +702,7 @@ pub const feature_reserveX25 = Feature{
 };
 
 pub const feature_reserveX26 = Feature{
-    .name = "reserve-x26",
+    .name = "reserveX26",
     .llvm_name = "reserve-x26",
     .description = "Reserve X26, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -710,7 +710,7 @@ pub const feature_reserveX26 = Feature{
 };
 
 pub const feature_reserveX27 = Feature{
-    .name = "reserve-x27",
+    .name = "reserveX27",
     .llvm_name = "reserve-x27",
     .description = "Reserve X27, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -718,7 +718,7 @@ pub const feature_reserveX27 = Feature{
 };
 
 pub const feature_reserveX28 = Feature{
-    .name = "reserve-x28",
+    .name = "reserveX28",
     .llvm_name = "reserve-x28",
     .description = "Reserve X28, making it unavailable as a GPR",
     .dependencies = &[_]*const Feature {
@@ -802,7 +802,7 @@ pub const feature_sve2 = Feature{
 };
 
 pub const feature_sve2Aes = Feature{
-    .name = "sve2-aes",
+    .name = "sve2Aes",
     .llvm_name = "sve2-aes",
     .description = "Enable AES SVE2 instructions",
     .dependencies = &[_]*const Feature {
@@ -812,7 +812,7 @@ pub const feature_sve2Aes = Feature{
 };
 
 pub const feature_sve2Bitperm = Feature{
-    .name = "sve2-bitperm",
+    .name = "sve2Bitperm",
     .llvm_name = "sve2-bitperm",
     .description = "Enable bit permutation SVE2 instructions",
     .dependencies = &[_]*const Feature {
@@ -821,7 +821,7 @@ pub const feature_sve2Bitperm = Feature{
 };
 
 pub const feature_sve2Sha3 = Feature{
-    .name = "sve2-sha3",
+    .name = "sve2Sha3",
     .llvm_name = "sve2-sha3",
     .description = "Enable SHA3 SVE2 instructions",
     .dependencies = &[_]*const Feature {
@@ -831,7 +831,7 @@ pub const feature_sve2Sha3 = Feature{
 };
 
 pub const feature_sve2Sm4 = Feature{
-    .name = "sve2-sm4",
+    .name = "sve2Sm4",
     .llvm_name = "sve2-sm4",
     .description = "Enable SM4 SVE2 instructions",
     .dependencies = &[_]*const Feature {
@@ -841,7 +841,7 @@ pub const feature_sve2Sm4 = Feature{
 };
 
 pub const feature_slowMisaligned128store = Feature{
-    .name = "slow-misaligned-128store",
+    .name = "slowMisaligned128store",
     .llvm_name = "slow-misaligned-128store",
     .description = "Misaligned 128 bit stores are slow",
     .dependencies = &[_]*const Feature {
@@ -849,7 +849,7 @@ pub const feature_slowMisaligned128store = Feature{
 };
 
 pub const feature_slowPaired128 = Feature{
-    .name = "slow-paired-128",
+    .name = "slowPaired128",
     .llvm_name = "slow-paired-128",
     .description = "Paired 128 bit loads and stores are slow",
     .dependencies = &[_]*const Feature {
@@ -857,7 +857,7 @@ pub const feature_slowPaired128 = Feature{
 };
 
 pub const feature_slowStrqroStore = Feature{
-    .name = "slow-strqro-store",
+    .name = "slowStrqroStore",
     .llvm_name = "slow-strqro-store",
     .description = "STR of Q register with register offset is slow",
     .dependencies = &[_]*const Feature {
@@ -873,7 +873,7 @@ pub const feature_specrestrict = Feature{
 };
 
 pub const feature_strictAlign = Feature{
-    .name = "strict-align",
+    .name = "strictAlign",
     .llvm_name = "strict-align",
     .description = "Disallow all unaligned memory access",
     .dependencies = &[_]*const Feature {
@@ -881,7 +881,7 @@ pub const feature_strictAlign = Feature{
 };
 
 pub const feature_tlbRmi = Feature{
-    .name = "tlb-rmi",
+    .name = "tlbRmi",
     .llvm_name = "tlb-rmi",
     .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
     .dependencies = &[_]*const Feature {
@@ -897,7 +897,7 @@ pub const feature_tme = Feature{
 };
 
 pub const feature_tracev84 = Feature{
-    .name = "tracev8.4",
+    .name = "tracev84",
     .llvm_name = "tracev8.4",
     .description = "Enable v8.4-A Trace extension",
     .dependencies = &[_]*const Feature {
@@ -913,7 +913,7 @@ pub const feature_trbe = Feature{
 };
 
 pub const feature_taggedGlobals = Feature{
-    .name = "tagged-globals",
+    .name = "taggedGlobals",
     .llvm_name = "tagged-globals",
     .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
     .dependencies = &[_]*const Feature {
@@ -921,7 +921,7 @@ pub const feature_taggedGlobals = Feature{
 };
 
 pub const feature_useAa = Feature{
-    .name = "use-aa",
+    .name = "useAa",
     .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
@@ -929,7 +929,7 @@ pub const feature_useAa = Feature{
 };
 
 pub const feature_tpidrEl1 = Feature{
-    .name = "tpidr-el1",
+    .name = "tpidrEl1",
     .llvm_name = "tpidr-el1",
     .description = "Permit use of TPIDR_EL1 for the TLS base",
     .dependencies = &[_]*const Feature {
@@ -937,7 +937,7 @@ pub const feature_tpidrEl1 = Feature{
 };
 
 pub const feature_tpidrEl2 = Feature{
-    .name = "tpidr-el2",
+    .name = "tpidrEl2",
     .llvm_name = "tpidr-el2",
     .description = "Permit use of TPIDR_EL2 for the TLS base",
     .dependencies = &[_]*const Feature {
@@ -945,7 +945,7 @@ pub const feature_tpidrEl2 = Feature{
 };
 
 pub const feature_tpidrEl3 = Feature{
-    .name = "tpidr-el3",
+    .name = "tpidrEl3",
     .llvm_name = "tpidr-el3",
     .description = "Permit use of TPIDR_EL3 for the TLS base",
     .dependencies = &[_]*const Feature {
@@ -953,7 +953,7 @@ pub const feature_tpidrEl3 = Feature{
 };
 
 pub const feature_useReciprocalSquareRoot = Feature{
-    .name = "use-reciprocal-square-root",
+    .name = "useReciprocalSquareRoot",
     .llvm_name = "use-reciprocal-square-root",
     .description = "Use the reciprocal square root approximation",
     .dependencies = &[_]*const Feature {
@@ -981,13 +981,13 @@ pub const feature_zcz = Feature{
     .llvm_name = "zcz",
     .description = "Has zero-cycle zeroing instructions",
     .dependencies = &[_]*const Feature {
-        &feature_zczGp,
         &feature_zczFp,
+        &feature_zczGp,
     },
 };
 
 pub const feature_zczFp = Feature{
-    .name = "zcz-fp",
+    .name = "zczFp",
     .llvm_name = "zcz-fp",
     .description = "Has zero-cycle zeroing instructions for FP registers",
     .dependencies = &[_]*const Feature {
@@ -995,7 +995,7 @@ pub const feature_zczFp = Feature{
 };
 
 pub const feature_zczFpWorkaround = Feature{
-    .name = "zcz-fp-workaround",
+    .name = "zczFpWorkaround",
     .llvm_name = "zcz-fp-workaround",
     .description = "The zero-cycle floating-point zeroing instruction has a bug",
     .dependencies = &[_]*const Feature {
@@ -1003,7 +1003,7 @@ pub const feature_zczFpWorkaround = Feature{
 };
 
 pub const feature_zczGp = Feature{
-    .name = "zcz-gp",
+    .name = "zczGp",
     .llvm_name = "zcz-gp",
     .description = "Has zero-cycle zeroing instructions for generic registers",
     .dependencies = &[_]*const Feature {
@@ -1137,206 +1137,206 @@ pub const features = &[_]*const Feature {
 };
 
 pub const cpu_appleLatest = Cpu{
-    .name = "apple-latest",
+    .name = "appleLatest",
     .llvm_name = "apple-latest",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_zczFpWorkaround,
-        &feature_perfmon,
-        &feature_arithCbzFusion,
+        &feature_fpArmv8,
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
-        &feature_disableLatencySchedHeuristic,
-        &feature_zcm,
+        &feature_arithBccFusion,
         &feature_zczFp,
         &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_arithBccFusion,
+        &feature_zcm,
+        &feature_fuseAes,
+        &feature_disableLatencySchedHeuristic,
+        &feature_fuseCryptoEor,
+        &feature_perfmon,
+        &feature_zczFpWorkaround,
+        &feature_arithCbzFusion,
     },
 };
 
 pub const cpu_cortexA35 = Cpu{
-    .name = "cortex-a35",
+    .name = "cortexA35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_perfmon,
         &feature_crc,
+        &feature_perfmon,
     },
 };
 
 pub const cpu_cortexA53 = Cpu{
-    .name = "cortex-a53",
+    .name = "cortexA53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
+        &feature_fpArmv8,
         &feature_balanceFpOps,
-        &feature_perfmon,
+        &feature_usePostraScheduler,
         &feature_crc,
         &feature_customCheapAsMove,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
         &feature_useAa,
+        &feature_fuseAes,
+        &feature_perfmon,
     },
 };
 
 pub const cpu_cortexA55 = Cpu{
-    .name = "cortex-a55",
+    .name = "cortexA55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
         &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_perfmon,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_fuseAes,
+        &feature_ras,
+        &feature_perfmon,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_cortexA57 = Cpu{
-    .name = "cortex-a57",
+    .name = "cortexA57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
+        &feature_fpArmv8,
         &feature_balanceFpOps,
-        &feature_perfmon,
-        &feature_crc,
         &feature_fuseLiterals,
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_fpArmv8,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_customCheapAsMove,
+        &feature_fuseAes,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
 pub const cpu_cortexA65 = Cpu{
-    .name = "cortex-a65",
+    .name = "cortexA65",
     .llvm_name = "cortex-a65",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_cortexA65ae = Cpu{
-    .name = "cortex-a65ae",
+    .name = "cortexA65ae",
     .llvm_name = "cortex-a65ae",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_cortexA72 = Cpu{
-    .name = "cortex-a72",
+    .name = "cortexA72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_perfmon,
         &feature_crc,
+        &feature_perfmon,
+        &feature_fuseAes,
     },
 };
 
 pub const cpu_cortexA73 = Cpu{
-    .name = "cortex-a73",
+    .name = "cortexA73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_perfmon,
         &feature_crc,
+        &feature_perfmon,
+        &feature_fuseAes,
     },
 };
 
 pub const cpu_cortexA75 = Cpu{
-    .name = "cortex-a75",
+    .name = "cortexA75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
         &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_perfmon,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_fuseAes,
+        &feature_ras,
+        &feature_perfmon,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_cortexA76 = Cpu{
-    .name = "cortex-a76",
+    .name = "cortexA76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_cortexA76ae = Cpu{
-    .name = "cortex-a76ae",
+    .name = "cortexA76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
@@ -1344,137 +1344,137 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_zczFpWorkaround,
-        &feature_perfmon,
-        &feature_arithCbzFusion,
+        &feature_fpArmv8,
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
-        &feature_disableLatencySchedHeuristic,
-        &feature_zcm,
+        &feature_arithBccFusion,
         &feature_zczFp,
         &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_arithBccFusion,
+        &feature_zcm,
+        &feature_fuseAes,
+        &feature_disableLatencySchedHeuristic,
+        &feature_fuseCryptoEor,
+        &feature_perfmon,
+        &feature_zczFpWorkaround,
+        &feature_arithCbzFusion,
     },
 };
 
 pub const cpu_exynosM1 = Cpu{
-    .name = "exynos-m1",
+    .name = "exynosM1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_force32bitJumpTables,
-        &feature_perfmon,
-        &feature_crc,
+        &feature_fpArmv8,
+        &feature_slowMisaligned128store,
+        &feature_usePostraScheduler,
         &feature_useReciprocalSquareRoot,
-        &feature_slowPaired128,
+        &feature_crc,
         &feature_zczFp,
-        &feature_slowMisaligned128store,
         &feature_customCheapAsMove,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_force32bitJumpTables,
+        &feature_fuseAes,
+        &feature_slowPaired128,
+        &feature_perfmon,
     },
 };
 
 pub const cpu_exynosM2 = Cpu{
-    .name = "exynos-m2",
+    .name = "exynosM2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_force32bitJumpTables,
-        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_slowMisaligned128store,
+        &feature_usePostraScheduler,
         &feature_crc,
-        &feature_slowPaired128,
         &feature_zczFp,
-        &feature_slowMisaligned128store,
         &feature_customCheapAsMove,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_force32bitJumpTables,
+        &feature_fuseAes,
+        &feature_slowPaired128,
+        &feature_perfmon,
     },
 };
 
 pub const cpu_exynosM3 = Cpu{
-    .name = "exynos-m3",
+    .name = "exynosM3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
+        &feature_fpArmv8,
+        &feature_fuseAddress,
+        &feature_fuseLiterals,
+        &feature_usePostraScheduler,
+        &feature_crc,
         &feature_lslFast,
+        &feature_customCheapAsMove,
+        &feature_zczFp,
         &feature_force32bitJumpTables,
-        &feature_perfmon,
-        &feature_crc,
-        &feature_fuseLiterals,
         &feature_fuseCsel,
-        &feature_zczFp,
+        &feature_fuseAes,
+        &feature_perfmon,
         &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-        &feature_fuseAddress,
     },
 };
 
 pub const cpu_exynosM4 = Cpu{
-    .name = "exynos-m4",
+    .name = "exynosM4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_lslFast,
-        &feature_force32bitJumpTables,
+        &feature_pan,
+        &feature_fuseAddress,
+        &feature_usePostraScheduler,
         &feature_crc,
-        &feature_rdm,
-        &feature_fpArmv8,
-        &feature_lse,
-        &feature_vh,
-        &feature_arithCbzFusion,
-        &feature_fuseLiterals,
-        &feature_ccpp,
+        &feature_customCheapAsMove,
+        &feature_force32bitJumpTables,
+        &feature_uaops,
         &feature_lor,
         &feature_arithBccFusion,
-        &feature_ras,
+        &feature_arithCbzFusion,
         &feature_dotprod,
-        &feature_fuseCsel,
-        &feature_zczFp,
-        &feature_uaops,
+        &feature_fuseArithLogic,
         &feature_zczGp,
+        &feature_rdm,
+        &feature_fuseCsel,
         &feature_perfmon,
-        &feature_usePostraScheduler,
-        &feature_fuseAddress,
-        &feature_fuseArithLogic,
-        &feature_customCheapAsMove,
-        &feature_pan,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_fuseLiterals,
+        &feature_lse,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_fuseAes,
+        &feature_ras,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_exynosM5 = Cpu{
-    .name = "exynos-m5",
+    .name = "exynosM5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_lslFast,
-        &feature_force32bitJumpTables,
+        &feature_pan,
+        &feature_fuseAddress,
+        &feature_usePostraScheduler,
         &feature_crc,
-        &feature_rdm,
-        &feature_fpArmv8,
-        &feature_lse,
-        &feature_vh,
-        &feature_arithCbzFusion,
-        &feature_fuseLiterals,
-        &feature_ccpp,
+        &feature_customCheapAsMove,
+        &feature_force32bitJumpTables,
+        &feature_uaops,
         &feature_lor,
         &feature_arithBccFusion,
-        &feature_ras,
+        &feature_arithCbzFusion,
         &feature_dotprod,
-        &feature_fuseCsel,
-        &feature_zczFp,
-        &feature_uaops,
+        &feature_fuseArithLogic,
         &feature_zczGp,
+        &feature_rdm,
+        &feature_fuseCsel,
         &feature_perfmon,
-        &feature_usePostraScheduler,
-        &feature_fuseAddress,
-        &feature_fuseArithLogic,
-        &feature_customCheapAsMove,
-        &feature_pan,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_fuseLiterals,
+        &feature_lse,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_fuseAes,
+        &feature_ras,
+        &feature_ccpp,
     },
 };
 
@@ -1482,17 +1482,17 @@ pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
     .dependencies = &[_]*const Feature {
-        &feature_lslFast,
-        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_crc,
+        &feature_lslFast,
+        &feature_customCheapAsMove,
         &feature_slowStrqroStore,
-        &feature_rdm,
         &feature_zczFp,
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
+        &feature_rdm,
         &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1514,56 +1514,56 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_lslFast,
-        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
         &feature_crc,
-        &feature_zczFp,
-        &feature_predictableSelectExpensive,
+        &feature_lslFast,
         &feature_customCheapAsMove,
+        &feature_zczFp,
         &feature_zczGp,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
 pub const cpu_neoverseE1 = Cpu{
-    .name = "neoverse-e1",
+    .name = "neoverseE1",
     .llvm_name = "neoverse-e1",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
-        &feature_vh,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_pan,
-        &feature_ccpp,
-        &feature_rdm,
+        &feature_vh,
+        &feature_dotprod,
         &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
         &feature_lse,
+        &feature_crc,
+        &feature_uaops,
+        &feature_rdm,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
 pub const cpu_neoverseN1 = Cpu{
-    .name = "neoverse-n1",
+    .name = "neoverseN1",
     .llvm_name = "neoverse-n1",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_dotprod,
+        &feature_fpArmv8,
+        &feature_pan,
         &feature_vh,
+        &feature_dotprod,
+        &feature_rcpc,
+        &feature_lse,
         &feature_crc,
-        &feature_pan,
-        &feature_ccpp,
+        &feature_uaops,
         &feature_rdm,
         &feature_spe,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_ssbs,
-        &feature_fpArmv8,
-        &feature_lse,
         &feature_lor,
+        &feature_ras,
+        &feature_ssbs,
+        &feature_ccpp,
     },
 };
 
@@ -1571,36 +1571,36 @@ pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
     .dependencies = &[_]*const Feature {
-        &feature_lslFast,
-        &feature_crc,
-        &feature_rdm,
         &feature_am,
-        &feature_mpam,
-        &feature_fmi,
-        &feature_fpArmv8,
-        &feature_lse,
-        &feature_dit,
-        &feature_vh,
-        &feature_ccpp,
+        &feature_pan,
+        &feature_usePostraScheduler,
+        &feature_tracev84,
+        &feature_rcpc,
         &feature_sel2,
-        &feature_lor,
-        &feature_nv,
-        &feature_ras,
+        &feature_crc,
+        &feature_customCheapAsMove,
         &feature_tlbRmi,
-        &feature_dotprod,
-        &feature_zczFp,
-        &feature_spe,
-        &feature_rcpc,
-        &feature_predictableSelectExpensive,
         &feature_uaops,
+        &feature_lor,
+        &feature_dotprod,
         &feature_zczGp,
-        &feature_perfmon,
-        &feature_usePostraScheduler,
+        &feature_rdm,
         &feature_pa,
+        &feature_perfmon,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_lse,
+        &feature_zczFp,
+        &feature_spe,
+        &feature_predictableSelectExpensive,
+        &feature_fmi,
+        &feature_lslFast,
+        &feature_mpam,
+        &feature_dit,
+        &feature_nv,
         &feature_ccidx,
-        &feature_customCheapAsMove,
-        &feature_pan,
-        &feature_tracev84,
+        &feature_ras,
+        &feature_ccpp,
     },
 };
 
@@ -1608,11 +1608,11 @@ pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_crc,
-        &feature_predictableSelectExpensive,
         &feature_fpArmv8,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1620,17 +1620,17 @@ pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
     .dependencies = &[_]*const Feature {
+        &feature_fpArmv8,
+        &feature_pan,
+        &feature_vh,
+        &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_lse,
+        &feature_rdm,
+        &feature_lor,
+        &feature_arithBccFusion,
+        &feature_predictableSelectExpensive,
         &feature_aggressiveFma,
-        &feature_vh,
-        &feature_crc,
-        &feature_pan,
-        &feature_rdm,
-        &feature_predictableSelectExpensive,
-        &feature_fpArmv8,
-        &feature_lse,
-        &feature_lor,
-        &feature_usePostraScheduler,
-        &feature_arithBccFusion,
     },
 };
 
@@ -1638,11 +1638,11 @@ pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_crc,
-        &feature_predictableSelectExpensive,
         &feature_fpArmv8,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1650,11 +1650,11 @@ pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_crc,
-        &feature_predictableSelectExpensive,
         &feature_fpArmv8,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1662,11 +1662,11 @@ pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
     .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_crc,
-        &feature_predictableSelectExpensive,
         &feature_fpArmv8,
         &feature_usePostraScheduler,
+        &feature_crc,
+        &feature_perfmon,
+        &feature_predictableSelectExpensive,
     },
 };
 
@@ -1674,22 +1674,22 @@ pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
     .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
         &feature_fpArmv8,
-        &feature_ras,
-        &feature_dotprod,
+        &feature_pan,
         &feature_vh,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
+        &feature_lse,
         &feature_crc,
-        &feature_pan,
-        &feature_ccpp,
+        &feature_customCheapAsMove,
+        &feature_uaops,
         &feature_rdm,
         &feature_spe,
-        &feature_uaops,
-        &feature_customCheapAsMove,
-        &feature_perfmon,
-        &feature_lse,
         &feature_lor,
-        &feature_usePostraScheduler,
+        &feature_fuseAes,
+        &feature_ras,
+        &feature_perfmon,
+        &feature_ccpp,
     },
 };
 
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 3d4b4950caf8ac5df673b958edde128864b3e4ee..f1954628c5a268c9d95872e47fab44470ded3252 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_BitInsts16 = Feature{
-    .name = "16-bit-insts",
+    .name = "BitInsts16",
     .llvm_name = "16-bit-insts",
     .description = "Has i16/f16 instructions",
     .dependencies = &[_]*const Feature {
@@ -10,7 +10,7 @@ pub const feature_BitInsts16 = Feature{
 };
 
 pub const feature_addNoCarryInsts = Feature{
-    .name = "add-no-carry-insts",
+    .name = "addNoCarryInsts",
     .llvm_name = "add-no-carry-insts",
     .description = "Have VALU add/sub instructions without carry out",
     .dependencies = &[_]*const Feature {
@@ -18,7 +18,7 @@ pub const feature_addNoCarryInsts = Feature{
 };
 
 pub const feature_apertureRegs = Feature{
-    .name = "aperture-regs",
+    .name = "apertureRegs",
     .llvm_name = "aperture-regs",
     .description = "Has Memory Aperture Base and Size Registers",
     .dependencies = &[_]*const Feature {
@@ -26,7 +26,7 @@ pub const feature_apertureRegs = Feature{
 };
 
 pub const feature_atomicFaddInsts = Feature{
-    .name = "atomic-fadd-insts",
+    .name = "atomicFaddInsts",
     .llvm_name = "atomic-fadd-insts",
     .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
     .dependencies = &[_]*const Feature {
@@ -34,7 +34,7 @@ pub const feature_atomicFaddInsts = Feature{
 };
 
 pub const feature_autoWaitcntBeforeBarrier = Feature{
-    .name = "auto-waitcnt-before-barrier",
+    .name = "autoWaitcntBeforeBarrier",
     .llvm_name = "auto-waitcnt-before-barrier",
     .description = "Hardware automatically inserts waitcnt before barrier",
     .dependencies = &[_]*const Feature {
@@ -42,7 +42,7 @@ pub const feature_autoWaitcntBeforeBarrier = Feature{
 };
 
 pub const feature_ciInsts = Feature{
-    .name = "ci-insts",
+    .name = "ciInsts",
     .llvm_name = "ci-insts",
     .description = "Additional instructions for CI+",
     .dependencies = &[_]*const Feature {
@@ -50,7 +50,7 @@ pub const feature_ciInsts = Feature{
 };
 
 pub const feature_codeObjectV3 = Feature{
-    .name = "code-object-v3",
+    .name = "codeObjectV3",
     .llvm_name = "code-object-v3",
     .description = "Generate code object version 3",
     .dependencies = &[_]*const Feature {
@@ -66,7 +66,7 @@ pub const feature_cumode = Feature{
 };
 
 pub const feature_dlInsts = Feature{
-    .name = "dl-insts",
+    .name = "dlInsts",
     .llvm_name = "dl-insts",
     .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
     .dependencies = &[_]*const Feature {
@@ -90,7 +90,7 @@ pub const feature_dpp8 = Feature{
 };
 
 pub const feature_noSramEccSupport = Feature{
-    .name = "no-sram-ecc-support",
+    .name = "noSramEccSupport",
     .llvm_name = "no-sram-ecc-support",
     .description = "Hardware does not support SRAM ECC",
     .dependencies = &[_]*const Feature {
@@ -98,7 +98,7 @@ pub const feature_noSramEccSupport = Feature{
 };
 
 pub const feature_noXnackSupport = Feature{
-    .name = "no-xnack-support",
+    .name = "noXnackSupport",
     .llvm_name = "no-xnack-support",
     .description = "Hardware does not support XNACK",
     .dependencies = &[_]*const Feature {
@@ -106,7 +106,7 @@ pub const feature_noXnackSupport = Feature{
 };
 
 pub const feature_dot1Insts = Feature{
-    .name = "dot1-insts",
+    .name = "dot1Insts",
     .llvm_name = "dot1-insts",
     .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
     .dependencies = &[_]*const Feature {
@@ -114,7 +114,7 @@ pub const feature_dot1Insts = Feature{
 };
 
 pub const feature_dot2Insts = Feature{
-    .name = "dot2-insts",
+    .name = "dot2Insts",
     .llvm_name = "dot2-insts",
     .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
     .dependencies = &[_]*const Feature {
@@ -122,7 +122,7 @@ pub const feature_dot2Insts = Feature{
 };
 
 pub const feature_dot3Insts = Feature{
-    .name = "dot3-insts",
+    .name = "dot3Insts",
     .llvm_name = "dot3-insts",
     .description = "Has v_dot8c_i32_i4 instruction",
     .dependencies = &[_]*const Feature {
@@ -130,7 +130,7 @@ pub const feature_dot3Insts = Feature{
 };
 
 pub const feature_dot4Insts = Feature{
-    .name = "dot4-insts",
+    .name = "dot4Insts",
     .llvm_name = "dot4-insts",
     .description = "Has v_dot2c_i32_i16 instruction",
     .dependencies = &[_]*const Feature {
@@ -138,7 +138,7 @@ pub const feature_dot4Insts = Feature{
 };
 
 pub const feature_dot5Insts = Feature{
-    .name = "dot5-insts",
+    .name = "dot5Insts",
     .llvm_name = "dot5-insts",
     .description = "Has v_dot2c_f32_f16 instruction",
     .dependencies = &[_]*const Feature {
@@ -146,7 +146,7 @@ pub const feature_dot5Insts = Feature{
 };
 
 pub const feature_dot6Insts = Feature{
-    .name = "dot6-insts",
+    .name = "dot6Insts",
     .llvm_name = "dot6-insts",
     .description = "Has v_dot4c_i32_i8 instruction",
     .dependencies = &[_]*const Feature {
@@ -170,7 +170,7 @@ pub const feature_dumpcode = Feature{
 };
 
 pub const feature_enableDs128 = Feature{
-    .name = "enable-ds128",
+    .name = "enableDs128",
     .llvm_name = "enable-ds128",
     .description = "Use ds_{read|write}_b128",
     .dependencies = &[_]*const Feature {
@@ -178,7 +178,7 @@ pub const feature_enableDs128 = Feature{
 };
 
 pub const feature_loadStoreOpt = Feature{
-    .name = "load-store-opt",
+    .name = "loadStoreOpt",
     .llvm_name = "load-store-opt",
     .description = "Enable SI load/store optimizer pass",
     .dependencies = &[_]*const Feature {
@@ -186,7 +186,7 @@ pub const feature_loadStoreOpt = Feature{
 };
 
 pub const feature_enablePrtStrictNull = Feature{
-    .name = "enable-prt-strict-null",
+    .name = "enablePrtStrictNull",
     .llvm_name = "enable-prt-strict-null",
     .description = "Enable zeroing of result registers for sparse texture fetches",
     .dependencies = &[_]*const Feature {
@@ -194,7 +194,7 @@ pub const feature_enablePrtStrictNull = Feature{
 };
 
 pub const feature_siScheduler = Feature{
-    .name = "si-scheduler",
+    .name = "siScheduler",
     .llvm_name = "si-scheduler",
     .description = "Enable SI Machine Scheduler",
     .dependencies = &[_]*const Feature {
@@ -202,7 +202,7 @@ pub const feature_siScheduler = Feature{
 };
 
 pub const feature_unsafeDsOffsetFolding = Feature{
-    .name = "unsafe-ds-offset-folding",
+    .name = "unsafeDsOffsetFolding",
     .llvm_name = "unsafe-ds-offset-folding",
     .description = "Force using DS instruction immediate offsets on SI",
     .dependencies = &[_]*const Feature {
@@ -218,7 +218,7 @@ pub const feature_fmaf = Feature{
 };
 
 pub const feature_fp16Denormals = Feature{
-    .name = "fp16-denormals",
+    .name = "fp16Denormals",
     .llvm_name = "fp16-denormals",
     .description = "Enable half precision denormal handling",
     .dependencies = &[_]*const Feature {
@@ -227,7 +227,7 @@ pub const feature_fp16Denormals = Feature{
 };
 
 pub const feature_fp32Denormals = Feature{
-    .name = "fp32-denormals",
+    .name = "fp32Denormals",
     .llvm_name = "fp32-denormals",
     .description = "Enable single precision denormal handling",
     .dependencies = &[_]*const Feature {
@@ -243,7 +243,7 @@ pub const feature_fp64 = Feature{
 };
 
 pub const feature_fp64Denormals = Feature{
-    .name = "fp64-denormals",
+    .name = "fp64Denormals",
     .llvm_name = "fp64-denormals",
     .description = "Enable double and half precision denormal handling",
     .dependencies = &[_]*const Feature {
@@ -252,7 +252,7 @@ pub const feature_fp64Denormals = Feature{
 };
 
 pub const feature_fp64Fp16Denormals = Feature{
-    .name = "fp64-fp16-denormals",
+    .name = "fp64Fp16Denormals",
     .llvm_name = "fp64-fp16-denormals",
     .description = "Enable double and half precision denormal handling",
     .dependencies = &[_]*const Feature {
@@ -261,7 +261,7 @@ pub const feature_fp64Fp16Denormals = Feature{
 };
 
 pub const feature_fpExceptions = Feature{
-    .name = "fp-exceptions",
+    .name = "fpExceptions",
     .llvm_name = "fp-exceptions",
     .description = "Enable floating point exceptions",
     .dependencies = &[_]*const Feature {
@@ -269,7 +269,7 @@ pub const feature_fpExceptions = Feature{
 };
 
 pub const feature_fastFmaf = Feature{
-    .name = "fast-fmaf",
+    .name = "fastFmaf",
     .llvm_name = "fast-fmaf",
     .description = "Assuming f32 fma is at least as fast as mul + add",
     .dependencies = &[_]*const Feature {
@@ -277,7 +277,7 @@ pub const feature_fastFmaf = Feature{
 };
 
 pub const feature_flatAddressSpace = Feature{
-    .name = "flat-address-space",
+    .name = "flatAddressSpace",
     .llvm_name = "flat-address-space",
     .description = "Support flat address space",
     .dependencies = &[_]*const Feature {
@@ -285,7 +285,7 @@ pub const feature_flatAddressSpace = Feature{
 };
 
 pub const feature_flatForGlobal = Feature{
-    .name = "flat-for-global",
+    .name = "flatForGlobal",
     .llvm_name = "flat-for-global",
     .description = "Force to generate flat instruction for global",
     .dependencies = &[_]*const Feature {
@@ -293,7 +293,7 @@ pub const feature_flatForGlobal = Feature{
 };
 
 pub const feature_flatGlobalInsts = Feature{
-    .name = "flat-global-insts",
+    .name = "flatGlobalInsts",
     .llvm_name = "flat-global-insts",
     .description = "Have global_* flat memory instructions",
     .dependencies = &[_]*const Feature {
@@ -301,7 +301,7 @@ pub const feature_flatGlobalInsts = Feature{
 };
 
 pub const feature_flatInstOffsets = Feature{
-    .name = "flat-inst-offsets",
+    .name = "flatInstOffsets",
     .llvm_name = "flat-inst-offsets",
     .description = "Flat instructions have immediate offset addressing mode",
     .dependencies = &[_]*const Feature {
@@ -309,7 +309,7 @@ pub const feature_flatInstOffsets = Feature{
 };
 
 pub const feature_flatScratchInsts = Feature{
-    .name = "flat-scratch-insts",
+    .name = "flatScratchInsts",
     .llvm_name = "flat-scratch-insts",
     .description = "Have scratch_* flat memory instructions",
     .dependencies = &[_]*const Feature {
@@ -317,7 +317,7 @@ pub const feature_flatScratchInsts = Feature{
 };
 
 pub const feature_flatSegmentOffsetBug = Feature{
-    .name = "flat-segment-offset-bug",
+    .name = "flatSegmentOffsetBug",
     .llvm_name = "flat-segment-offset-bug",
     .description = "GFX10 bug, inst_offset ignored in flat segment",
     .dependencies = &[_]*const Feature {
@@ -325,7 +325,7 @@ pub const feature_flatSegmentOffsetBug = Feature{
 };
 
 pub const feature_fmaMixInsts = Feature{
-    .name = "fma-mix-insts",
+    .name = "fmaMixInsts",
     .llvm_name = "fma-mix-insts",
     .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
     .dependencies = &[_]*const Feature {
@@ -333,7 +333,7 @@ pub const feature_fmaMixInsts = Feature{
 };
 
 pub const feature_gcn3Encoding = Feature{
-    .name = "gcn3-encoding",
+    .name = "gcn3Encoding",
     .llvm_name = "gcn3-encoding",
     .description = "Encoding format for VI",
     .dependencies = &[_]*const Feature {
@@ -341,7 +341,7 @@ pub const feature_gcn3Encoding = Feature{
 };
 
 pub const feature_gfx7Gfx8Gfx9Insts = Feature{
-    .name = "gfx7-gfx8-gfx9-insts",
+    .name = "gfx7Gfx8Gfx9Insts",
     .llvm_name = "gfx7-gfx8-gfx9-insts",
     .description = "Instructions shared in GFX7, GFX8, GFX9",
     .dependencies = &[_]*const Feature {
@@ -349,7 +349,7 @@ pub const feature_gfx7Gfx8Gfx9Insts = Feature{
 };
 
 pub const feature_gfx8Insts = Feature{
-    .name = "gfx8-insts",
+    .name = "gfx8Insts",
     .llvm_name = "gfx8-insts",
     .description = "Additional instructions for GFX8+",
     .dependencies = &[_]*const Feature {
@@ -357,7 +357,7 @@ pub const feature_gfx8Insts = Feature{
 };
 
 pub const feature_gfx9Insts = Feature{
-    .name = "gfx9-insts",
+    .name = "gfx9Insts",
     .llvm_name = "gfx9-insts",
     .description = "Additional instructions for GFX9+",
     .dependencies = &[_]*const Feature {
@@ -365,7 +365,7 @@ pub const feature_gfx9Insts = Feature{
 };
 
 pub const feature_gfx10Insts = Feature{
-    .name = "gfx10-insts",
+    .name = "gfx10Insts",
     .llvm_name = "gfx10-insts",
     .description = "Additional instructions for GFX10+",
     .dependencies = &[_]*const Feature {
@@ -373,7 +373,7 @@ pub const feature_gfx10Insts = Feature{
 };
 
 pub const feature_instFwdPrefetchBug = Feature{
-    .name = "inst-fwd-prefetch-bug",
+    .name = "instFwdPrefetchBug",
     .llvm_name = "inst-fwd-prefetch-bug",
     .description = "S_INST_PREFETCH instruction causes shader to hang",
     .dependencies = &[_]*const Feature {
@@ -381,7 +381,7 @@ pub const feature_instFwdPrefetchBug = Feature{
 };
 
 pub const feature_intClampInsts = Feature{
-    .name = "int-clamp-insts",
+    .name = "intClampInsts",
     .llvm_name = "int-clamp-insts",
     .description = "Support clamp for integer destination",
     .dependencies = &[_]*const Feature {
@@ -389,7 +389,7 @@ pub const feature_intClampInsts = Feature{
 };
 
 pub const feature_inv2piInlineImm = Feature{
-    .name = "inv-2pi-inline-imm",
+    .name = "inv2piInlineImm",
     .llvm_name = "inv-2pi-inline-imm",
     .description = "Has 1 / (2 * pi) as inline immediate",
     .dependencies = &[_]*const Feature {
@@ -413,7 +413,7 @@ pub const feature_ldsbankcount32 = Feature{
 };
 
 pub const feature_ldsBranchVmemWarHazard = Feature{
-    .name = "lds-branch-vmem-war-hazard",
+    .name = "ldsBranchVmemWarHazard",
     .llvm_name = "lds-branch-vmem-war-hazard",
     .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
     .dependencies = &[_]*const Feature {
@@ -421,7 +421,7 @@ pub const feature_ldsBranchVmemWarHazard = Feature{
 };
 
 pub const feature_ldsMisalignedBug = Feature{
-    .name = "lds-misaligned-bug",
+    .name = "ldsMisalignedBug",
     .llvm_name = "lds-misaligned-bug",
     .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
     .dependencies = &[_]*const Feature {
@@ -453,7 +453,7 @@ pub const feature_localmemorysize65536 = Feature{
 };
 
 pub const feature_maiInsts = Feature{
-    .name = "mai-insts",
+    .name = "maiInsts",
     .llvm_name = "mai-insts",
     .description = "Has mAI instructions",
     .dependencies = &[_]*const Feature {
@@ -461,7 +461,7 @@ pub const feature_maiInsts = Feature{
 };
 
 pub const feature_mfmaInlineLiteralBug = Feature{
-    .name = "mfma-inline-literal-bug",
+    .name = "mfmaInlineLiteralBug",
     .llvm_name = "mfma-inline-literal-bug",
     .description = "MFMA cannot use inline literal as SrcC",
     .dependencies = &[_]*const Feature {
@@ -469,7 +469,7 @@ pub const feature_mfmaInlineLiteralBug = Feature{
 };
 
 pub const feature_mimgR128 = Feature{
-    .name = "mimg-r128",
+    .name = "mimgR128",
     .llvm_name = "mimg-r128",
     .description = "Support 128-bit texture resources",
     .dependencies = &[_]*const Feature {
@@ -477,7 +477,7 @@ pub const feature_mimgR128 = Feature{
 };
 
 pub const feature_madMixInsts = Feature{
-    .name = "mad-mix-insts",
+    .name = "madMixInsts",
     .llvm_name = "mad-mix-insts",
     .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
     .dependencies = &[_]*const Feature {
@@ -485,7 +485,7 @@ pub const feature_madMixInsts = Feature{
 };
 
 pub const feature_maxPrivateElementSize4 = Feature{
-    .name = "max-private-element-size-4",
+    .name = "maxPrivateElementSize4",
     .llvm_name = "max-private-element-size-4",
     .description = "Maximum private access size may be 4",
     .dependencies = &[_]*const Feature {
@@ -493,7 +493,7 @@ pub const feature_maxPrivateElementSize4 = Feature{
 };
 
 pub const feature_maxPrivateElementSize8 = Feature{
-    .name = "max-private-element-size-8",
+    .name = "maxPrivateElementSize8",
     .llvm_name = "max-private-element-size-8",
     .description = "Maximum private access size may be 8",
     .dependencies = &[_]*const Feature {
@@ -501,7 +501,7 @@ pub const feature_maxPrivateElementSize8 = Feature{
 };
 
 pub const feature_maxPrivateElementSize16 = Feature{
-    .name = "max-private-element-size-16",
+    .name = "maxPrivateElementSize16",
     .llvm_name = "max-private-element-size-16",
     .description = "Maximum private access size may be 16",
     .dependencies = &[_]*const Feature {
@@ -517,7 +517,7 @@ pub const feature_movrel = Feature{
 };
 
 pub const feature_nsaEncoding = Feature{
-    .name = "nsa-encoding",
+    .name = "nsaEncoding",
     .llvm_name = "nsa-encoding",
     .description = "Support NSA encoding for image instructions",
     .dependencies = &[_]*const Feature {
@@ -525,7 +525,7 @@ pub const feature_nsaEncoding = Feature{
 };
 
 pub const feature_nsaToVmemBug = Feature{
-    .name = "nsa-to-vmem-bug",
+    .name = "nsaToVmemBug",
     .llvm_name = "nsa-to-vmem-bug",
     .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
     .dependencies = &[_]*const Feature {
@@ -533,7 +533,7 @@ pub const feature_nsaToVmemBug = Feature{
 };
 
 pub const feature_noDataDepHazard = Feature{
-    .name = "no-data-dep-hazard",
+    .name = "noDataDepHazard",
     .llvm_name = "no-data-dep-hazard",
     .description = "Does not need SW waitstates",
     .dependencies = &[_]*const Feature {
@@ -541,7 +541,7 @@ pub const feature_noDataDepHazard = Feature{
 };
 
 pub const feature_noSdstCmpx = Feature{
-    .name = "no-sdst-cmpx",
+    .name = "noSdstCmpx",
     .llvm_name = "no-sdst-cmpx",
     .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
     .dependencies = &[_]*const Feature {
@@ -549,7 +549,7 @@ pub const feature_noSdstCmpx = Feature{
 };
 
 pub const feature_offset3fBug = Feature{
-    .name = "offset-3f-bug",
+    .name = "offset3fBug",
     .llvm_name = "offset-3f-bug",
     .description = "Branch offset of 3f hardware bug",
     .dependencies = &[_]*const Feature {
@@ -557,7 +557,7 @@ pub const feature_offset3fBug = Feature{
 };
 
 pub const feature_pkFmacF16Inst = Feature{
-    .name = "pk-fmac-f16-inst",
+    .name = "pkFmacF16Inst",
     .llvm_name = "pk-fmac-f16-inst",
     .description = "Has v_pk_fmac_f16 instruction",
     .dependencies = &[_]*const Feature {
@@ -565,7 +565,7 @@ pub const feature_pkFmacF16Inst = Feature{
 };
 
 pub const feature_promoteAlloca = Feature{
-    .name = "promote-alloca",
+    .name = "promoteAlloca",
     .llvm_name = "promote-alloca",
     .description = "Enable promote alloca pass",
     .dependencies = &[_]*const Feature {
@@ -573,7 +573,7 @@ pub const feature_promoteAlloca = Feature{
 };
 
 pub const feature_r128A16 = Feature{
-    .name = "r128-a16",
+    .name = "r128A16",
     .llvm_name = "r128-a16",
     .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
     .dependencies = &[_]*const Feature {
@@ -581,7 +581,7 @@ pub const feature_r128A16 = Feature{
 };
 
 pub const feature_registerBanking = Feature{
-    .name = "register-banking",
+    .name = "registerBanking",
     .llvm_name = "register-banking",
     .description = "Has register banking",
     .dependencies = &[_]*const Feature {
@@ -597,7 +597,7 @@ pub const feature_sdwa = Feature{
 };
 
 pub const feature_sdwaMav = Feature{
-    .name = "sdwa-mav",
+    .name = "sdwaMav",
     .llvm_name = "sdwa-mav",
     .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
@@ -605,7 +605,7 @@ pub const feature_sdwaMav = Feature{
 };
 
 pub const feature_sdwaOmod = Feature{
-    .name = "sdwa-omod",
+    .name = "sdwaOmod",
     .llvm_name = "sdwa-omod",
     .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
@@ -613,7 +613,7 @@ pub const feature_sdwaOmod = Feature{
 };
 
 pub const feature_sdwaOutModsVopc = Feature{
-    .name = "sdwa-out-mods-vopc",
+    .name = "sdwaOutModsVopc",
     .llvm_name = "sdwa-out-mods-vopc",
     .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
@@ -621,7 +621,7 @@ pub const feature_sdwaOutModsVopc = Feature{
 };
 
 pub const feature_sdwaScalar = Feature{
-    .name = "sdwa-scalar",
+    .name = "sdwaScalar",
     .llvm_name = "sdwa-scalar",
     .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
@@ -629,7 +629,7 @@ pub const feature_sdwaScalar = Feature{
 };
 
 pub const feature_sdwaSdst = Feature{
-    .name = "sdwa-sdst",
+    .name = "sdwaSdst",
     .llvm_name = "sdwa-sdst",
     .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
     .dependencies = &[_]*const Feature {
@@ -637,7 +637,7 @@ pub const feature_sdwaSdst = Feature{
 };
 
 pub const feature_sgprInitBug = Feature{
-    .name = "sgpr-init-bug",
+    .name = "sgprInitBug",
     .llvm_name = "sgpr-init-bug",
     .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
     .dependencies = &[_]*const Feature {
@@ -645,7 +645,7 @@ pub const feature_sgprInitBug = Feature{
 };
 
 pub const feature_smemToVectorWriteHazard = Feature{
-    .name = "smem-to-vector-write-hazard",
+    .name = "smemToVectorWriteHazard",
     .llvm_name = "smem-to-vector-write-hazard",
     .description = "s_load_dword followed by v_cmp page faults",
     .dependencies = &[_]*const Feature {
@@ -653,7 +653,7 @@ pub const feature_smemToVectorWriteHazard = Feature{
 };
 
 pub const feature_sMemrealtime = Feature{
-    .name = "s-memrealtime",
+    .name = "sMemrealtime",
     .llvm_name = "s-memrealtime",
     .description = "Has s_memrealtime instruction",
     .dependencies = &[_]*const Feature {
@@ -661,7 +661,7 @@ pub const feature_sMemrealtime = Feature{
 };
 
 pub const feature_sramEcc = Feature{
-    .name = "sram-ecc",
+    .name = "sramEcc",
     .llvm_name = "sram-ecc",
     .description = "Enable SRAM ECC",
     .dependencies = &[_]*const Feature {
@@ -669,7 +669,7 @@ pub const feature_sramEcc = Feature{
 };
 
 pub const feature_scalarAtomics = Feature{
-    .name = "scalar-atomics",
+    .name = "scalarAtomics",
     .llvm_name = "scalar-atomics",
     .description = "Has atomic scalar memory instructions",
     .dependencies = &[_]*const Feature {
@@ -677,7 +677,7 @@ pub const feature_scalarAtomics = Feature{
 };
 
 pub const feature_scalarFlatScratchInsts = Feature{
-    .name = "scalar-flat-scratch-insts",
+    .name = "scalarFlatScratchInsts",
     .llvm_name = "scalar-flat-scratch-insts",
     .description = "Have s_scratch_* flat memory instructions",
     .dependencies = &[_]*const Feature {
@@ -685,7 +685,7 @@ pub const feature_scalarFlatScratchInsts = Feature{
 };
 
 pub const feature_scalarStores = Feature{
-    .name = "scalar-stores",
+    .name = "scalarStores",
     .llvm_name = "scalar-stores",
     .description = "Has store scalar memory instructions",
     .dependencies = &[_]*const Feature {
@@ -693,7 +693,7 @@ pub const feature_scalarStores = Feature{
 };
 
 pub const feature_trapHandler = Feature{
-    .name = "trap-handler",
+    .name = "trapHandler",
     .llvm_name = "trap-handler",
     .description = "Trap handler support",
     .dependencies = &[_]*const Feature {
@@ -701,7 +701,7 @@ pub const feature_trapHandler = Feature{
 };
 
 pub const feature_trigReducedRange = Feature{
-    .name = "trig-reduced-range",
+    .name = "trigReducedRange",
     .llvm_name = "trig-reduced-range",
     .description = "Requires use of fract on arguments to trig instructions",
     .dependencies = &[_]*const Feature {
@@ -709,7 +709,7 @@ pub const feature_trigReducedRange = Feature{
 };
 
 pub const feature_unalignedBufferAccess = Feature{
-    .name = "unaligned-buffer-access",
+    .name = "unalignedBufferAccess",
     .llvm_name = "unaligned-buffer-access",
     .description = "Support unaligned global loads and stores",
     .dependencies = &[_]*const Feature {
@@ -717,7 +717,7 @@ pub const feature_unalignedBufferAccess = Feature{
 };
 
 pub const feature_unalignedScratchAccess = Feature{
-    .name = "unaligned-scratch-access",
+    .name = "unalignedScratchAccess",
     .llvm_name = "unaligned-scratch-access",
     .description = "Support unaligned scratch loads and stores",
     .dependencies = &[_]*const Feature {
@@ -725,7 +725,7 @@ pub const feature_unalignedScratchAccess = Feature{
 };
 
 pub const feature_unpackedD16Vmem = Feature{
-    .name = "unpacked-d16-vmem",
+    .name = "unpackedD16Vmem",
     .llvm_name = "unpacked-d16-vmem",
     .description = "Has unpacked d16 vmem instructions",
     .dependencies = &[_]*const Feature {
@@ -733,7 +733,7 @@ pub const feature_unpackedD16Vmem = Feature{
 };
 
 pub const feature_vgprIndexMode = Feature{
-    .name = "vgpr-index-mode",
+    .name = "vgprIndexMode",
     .llvm_name = "vgpr-index-mode",
     .description = "Has VGPR mode register indexing",
     .dependencies = &[_]*const Feature {
@@ -741,7 +741,7 @@ pub const feature_vgprIndexMode = Feature{
 };
 
 pub const feature_vmemToScalarWriteHazard = Feature{
-    .name = "vmem-to-scalar-write-hazard",
+    .name = "vmemToScalarWriteHazard",
     .llvm_name = "vmem-to-scalar-write-hazard",
     .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
     .dependencies = &[_]*const Feature {
@@ -749,7 +749,7 @@ pub const feature_vmemToScalarWriteHazard = Feature{
 };
 
 pub const feature_vop3Literal = Feature{
-    .name = "vop3-literal",
+    .name = "vop3Literal",
     .llvm_name = "vop3-literal",
     .description = "Can use one literal in VOP3",
     .dependencies = &[_]*const Feature {
@@ -765,7 +765,7 @@ pub const feature_vop3p = Feature{
 };
 
 pub const feature_vcmpxExecWarHazard = Feature{
-    .name = "vcmpx-exec-war-hazard",
+    .name = "vcmpxExecWarHazard",
     .llvm_name = "vcmpx-exec-war-hazard",
     .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
     .dependencies = &[_]*const Feature {
@@ -773,7 +773,7 @@ pub const feature_vcmpxExecWarHazard = Feature{
 };
 
 pub const feature_vcmpxPermlaneHazard = Feature{
-    .name = "vcmpx-permlane-hazard",
+    .name = "vcmpxPermlaneHazard",
     .llvm_name = "vcmpx-permlane-hazard",
     .description = "TODO: describe me",
     .dependencies = &[_]*const Feature {
@@ -821,7 +821,7 @@ pub const feature_xnack = Feature{
 };
 
 pub const feature_halfRate64Ops = Feature{
-    .name = "half-rate-64-ops",
+    .name = "halfRate64Ops",
     .llvm_name = "half-rate-64-ops",
     .description = "Most fp64 instructions are half rate instead of quarter",
     .dependencies = &[_]*const Feature {
@@ -942,15 +942,15 @@ pub const cpu_bonaire = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -962,28 +962,28 @@ pub const cpu_carrizo = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -997,28 +997,28 @@ pub const cpu_fiji = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -1031,7 +1031,7 @@ pub const cpu_generic = Cpu{
 };
 
 pub const cpu_genericHsa = Cpu{
-    .name = "generic-hsa",
+    .name = "genericHsa",
     .llvm_name = "generic-hsa",
     .dependencies = &[_]*const Feature {
         &feature_flatAddressSpace,
@@ -1047,40 +1047,40 @@ pub const cpu_gfx1010 = Cpu{
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_gfx9Insts,
-        &feature_fastFmaf,
-        &feature_flatScratchInsts,
-        &feature_mimgR128,
-        &feature_noSdstCmpx,
-        &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_registerBanking,
-        &feature_movrel,
-        &feature_gfx8Insts,
-        &feature_sdwa,
-        &feature_noDataDepHazard,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
         &feature_flatGlobalInsts,
         &feature_gfx10Insts,
-        &feature_localmemorysize65536,
         &feature_BitInsts16,
-        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_dpp8,
+        &feature_flatScratchInsts,
         &feature_flatInstOffsets,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_fmaMixInsts,
-        &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
+        &feature_sMemrealtime,
         &feature_vscnt,
-        &feature_apertureRegs,
-        &feature_dpp8,
-        &feature_noSramEccSupport,
+        &feature_fastFmaf,
+        &feature_registerBanking,
+        &feature_gfx9Insts,
+        &feature_sdwaSdst,
+        &feature_noSdstCmpx,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaScalar,
+        &feature_sdwaOmod,
+        &feature_noDataDepHazard,
         &feature_ciInsts,
-        &feature_vop3Literal,
+        &feature_addNoCarryInsts,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1111,40 +1111,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_gfx9Insts,
-        &feature_fastFmaf,
-        &feature_flatScratchInsts,
-        &feature_mimgR128,
-        &feature_noSdstCmpx,
-        &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_registerBanking,
-        &feature_movrel,
-        &feature_gfx8Insts,
-        &feature_sdwa,
-        &feature_noDataDepHazard,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
         &feature_flatGlobalInsts,
         &feature_gfx10Insts,
-        &feature_localmemorysize65536,
         &feature_BitInsts16,
-        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_dpp8,
+        &feature_flatScratchInsts,
         &feature_flatInstOffsets,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_fmaMixInsts,
-        &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
+        &feature_sMemrealtime,
         &feature_vscnt,
-        &feature_apertureRegs,
-        &feature_dpp8,
-        &feature_noSramEccSupport,
+        &feature_fastFmaf,
+        &feature_registerBanking,
+        &feature_gfx9Insts,
+        &feature_sdwaSdst,
+        &feature_noSdstCmpx,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaScalar,
+        &feature_sdwaOmod,
+        &feature_noDataDepHazard,
         &feature_ciInsts,
-        &feature_vop3Literal,
+        &feature_addNoCarryInsts,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1174,40 +1174,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_gfx9Insts,
-        &feature_fastFmaf,
-        &feature_flatScratchInsts,
-        &feature_mimgR128,
-        &feature_noSdstCmpx,
-        &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_registerBanking,
-        &feature_movrel,
-        &feature_gfx8Insts,
-        &feature_sdwa,
-        &feature_noDataDepHazard,
+        &feature_vop3Literal,
+        &feature_apertureRegs,
         &feature_flatGlobalInsts,
         &feature_gfx10Insts,
-        &feature_localmemorysize65536,
         &feature_BitInsts16,
-        &feature_addNoCarryInsts,
         &feature_pkFmacF16Inst,
+        &feature_vop3p,
+        &feature_flatAddressSpace,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_dpp8,
+        &feature_flatScratchInsts,
         &feature_flatInstOffsets,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_fmaMixInsts,
-        &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
+        &feature_sMemrealtime,
         &feature_vscnt,
-        &feature_apertureRegs,
-        &feature_dpp8,
-        &feature_noSramEccSupport,
+        &feature_fastFmaf,
+        &feature_registerBanking,
+        &feature_gfx9Insts,
+        &feature_sdwaSdst,
+        &feature_noSdstCmpx,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaScalar,
+        &feature_sdwaOmod,
+        &feature_noDataDepHazard,
         &feature_ciInsts,
-        &feature_vop3Literal,
+        &feature_addNoCarryInsts,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1236,11 +1236,11 @@ pub const cpu_gfx600 = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
         &feature_halfRate64Ops,
     },
 };
@@ -1254,11 +1254,11 @@ pub const cpu_gfx601 = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
     },
 };
 
@@ -1270,15 +1270,15 @@ pub const cpu_gfx700 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1291,15 +1291,15 @@ pub const cpu_gfx701 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
         &feature_halfRate64Ops,
     },
 };
@@ -1313,15 +1313,15 @@ pub const cpu_gfx702 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount16,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1333,15 +1333,15 @@ pub const cpu_gfx703 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1353,15 +1353,15 @@ pub const cpu_gfx704 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1373,28 +1373,28 @@ pub const cpu_gfx801 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1409,28 +1409,28 @@ pub const cpu_gfx802 = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -1442,28 +1442,28 @@ pub const cpu_gfx803 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -1473,28 +1473,28 @@ pub const cpu_gfx810 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
         &feature_xnack,
     },
 };
@@ -1506,36 +1506,36 @@ pub const cpu_gfx900 = Cpu{
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
     },
@@ -1547,36 +1547,36 @@ pub const cpu_gfx902 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1591,36 +1591,36 @@ pub const cpu_gfx904 = Cpu{
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
     },
 };
@@ -1635,36 +1635,36 @@ pub const cpu_gfx906 = Cpu{
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
     },
@@ -1684,36 +1684,36 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_maiInsts,
         &feature_mfmaInlineLiteralBug,
@@ -1728,36 +1728,36 @@ pub const cpu_gfx909 = Cpu{
     .llvm_name = "gfx909",
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
-        &feature_sdwaOmod,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_apertureRegs,
+        &feature_flatGlobalInsts,
+        &feature_BitInsts16,
+        &feature_vop3p,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_gfx9Insts,
-        &feature_r128A16,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
+        &feature_dpp,
+        &feature_inv2piInlineImm,
+        &feature_sdwa,
         &feature_flatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_scalarFlatScratchInsts,
+        &feature_sMemrealtime,
+        &feature_fastFmaf,
+        &feature_gfx9Insts,
         &feature_sdwaSdst,
-        &feature_vop3p,
-        &feature_intClampInsts,
-        &feature_dpp,
-        &feature_scalarAtomics,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
+        &feature_vgprIndexMode,
+        &feature_fp64,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwa,
-        &feature_flatGlobalInsts,
+        &feature_gfx8Insts,
         &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_addNoCarryInsts,
-        &feature_flatInstOffsets,
+        &feature_intClampInsts,
         &feature_sdwaScalar,
-        &feature_inv2piInlineImm,
-        &feature_apertureRegs,
-        &feature_fp64,
+        &feature_sdwaOmod,
+        &feature_scalarAtomics,
+        &feature_r128A16,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
-        &feature_scalarFlatScratchInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
+        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1773,11 +1773,11 @@ pub const cpu_hainan = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
     },
 };
 
@@ -1790,15 +1790,15 @@ pub const cpu_hawaii = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
         &feature_halfRate64Ops,
     },
 };
@@ -1812,28 +1812,28 @@ pub const cpu_iceland = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -1845,15 +1845,15 @@ pub const cpu_kabini = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1865,15 +1865,15 @@ pub const cpu_kaveri = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1885,15 +1885,15 @@ pub const cpu_mullins = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
         &feature_movrel,
-        &feature_flatAddressSpace,
         &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_wavefrontsize64,
+        &feature_ciInsts,
+        &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
+        &feature_flatAddressSpace,
         &feature_localmemorysize65536,
-        &feature_fp64,
-        &feature_ciInsts,
     },
 };
 
@@ -1906,11 +1906,11 @@ pub const cpu_oland = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
     },
 };
 
@@ -1923,11 +1923,11 @@ pub const cpu_pitcairn = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
     },
 };
 
@@ -1939,28 +1939,28 @@ pub const cpu_polaris10 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -1972,28 +1972,28 @@ pub const cpu_polaris11 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -2003,28 +2003,28 @@ pub const cpu_stoney = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
         &feature_xnack,
     },
 };
@@ -2039,11 +2039,11 @@ pub const cpu_tahiti = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
         &feature_halfRate64Ops,
     },
 };
@@ -2057,28 +2057,28 @@ pub const cpu_tonga = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_sMemrealtime,
-        &feature_scalarStores,
+        &feature_BitInsts16,
         &feature_flatAddressSpace,
-        &feature_vgprIndexMode,
-        &feature_wavefrontsize64,
-        &feature_mimgR128,
-        &feature_intClampInsts,
         &feature_dpp,
-        &feature_movrel,
-        &feature_gcn3Encoding,
-        &feature_gfx8Insts,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_sdwaMav,
         &feature_sdwa,
-        &feature_localmemorysize65536,
-        &feature_BitInsts16,
-        &feature_sdwaOutModsVopc,
+        &feature_mimgR128,
         &feature_inv2piInlineImm,
-        &feature_noSramEccSupport,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_trigReducedRange,
+        &feature_vgprIndexMode,
         &feature_fp64,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_noSramEccSupport,
+        &feature_gfx8Insts,
+        &feature_localmemorysize65536,
+        &feature_movrel,
+        &feature_intClampInsts,
+        &feature_sdwaMav,
+        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_scalarStores,
+        &feature_gcn3Encoding,
     },
 };
 
@@ -2091,11 +2091,11 @@ pub const cpu_verde = Cpu{
         &feature_ldsbankcount32,
         &feature_movrel,
         &feature_trigReducedRange,
-        &feature_mimgR128,
-        &feature_localmemorysize32768,
         &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_fp64,
+        &feature_noSramEccSupport,
+        &feature_mimgR128,
     },
 };
 
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 6152346468cceff773e7f9cad6e441432413267e..9861a1ff56f7c9265e198f58eb0945057c26d434 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_msecext8 = Feature{
-    .name = "8msecext",
+    .name = "msecext8",
     .llvm_name = "8msecext",
     .description = "Enable support for ARMv8-M Security Extensions",
     .dependencies = &[_]*const Feature {
@@ -28,7 +28,7 @@ pub const feature_aes = Feature{
 };
 
 pub const feature_acquireRelease = Feature{
-    .name = "acquire-release",
+    .name = "acquireRelease",
     .llvm_name = "acquire-release",
     .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
     .dependencies = &[_]*const Feature {
@@ -36,7 +36,7 @@ pub const feature_acquireRelease = Feature{
 };
 
 pub const feature_avoidMovsShop = Feature{
-    .name = "avoid-movs-shop",
+    .name = "avoidMovsShop",
     .llvm_name = "avoid-movs-shop",
     .description = "Avoid movs instructions with shifter operand",
     .dependencies = &[_]*const Feature {
@@ -44,7 +44,7 @@ pub const feature_avoidMovsShop = Feature{
 };
 
 pub const feature_avoidPartialCpsr = Feature{
-    .name = "avoid-partial-cpsr",
+    .name = "avoidPartialCpsr",
     .llvm_name = "avoid-partial-cpsr",
     .description = "Avoid CPSR partial update for OOO execution",
     .dependencies = &[_]*const Feature {
@@ -60,7 +60,7 @@ pub const feature_crc = Feature{
 };
 
 pub const feature_cheapPredicableCpsr = Feature{
-    .name = "cheap-predicable-cpsr",
+    .name = "cheapPredicableCpsr",
     .llvm_name = "cheap-predicable-cpsr",
     .description = "Disable +1 predication cost for instructions updating CPSR",
     .dependencies = &[_]*const Feature {
@@ -68,7 +68,7 @@ pub const feature_cheapPredicableCpsr = Feature{
 };
 
 pub const feature_vldnAlign = Feature{
-    .name = "vldn-align",
+    .name = "vldnAlign",
     .llvm_name = "vldn-align",
     .description = "Check for VLDn unaligned access",
     .dependencies = &[_]*const Feature {
@@ -118,7 +118,7 @@ pub const feature_dsp = Feature{
 };
 
 pub const feature_dontWidenVmovs = Feature{
-    .name = "dont-widen-vmovs",
+    .name = "dontWidenVmovs",
     .llvm_name = "dont-widen-vmovs",
     .description = "Don't widen VMOVS to VMOVD",
     .dependencies = &[_]*const Feature {
@@ -136,7 +136,7 @@ pub const feature_dotprod = Feature{
 };
 
 pub const feature_executeOnly = Feature{
-    .name = "execute-only",
+    .name = "executeOnly",
     .llvm_name = "execute-only",
     .description = "Enable the generation of execute only code.",
     .dependencies = &[_]*const Feature {
@@ -144,7 +144,7 @@ pub const feature_executeOnly = Feature{
 };
 
 pub const feature_expandFpMlx = Feature{
-    .name = "expand-fp-mlx",
+    .name = "expandFpMlx",
     .llvm_name = "expand-fp-mlx",
     .description = "Expand VFP/NEON MLA/MLS instructions",
     .dependencies = &[_]*const Feature {
@@ -164,8 +164,8 @@ pub const feature_fp16fml = Feature{
     .llvm_name = "fp16fml",
     .description = "Enable full half-precision floating point fml instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
@@ -187,44 +187,44 @@ pub const feature_fpao = Feature{
 };
 
 pub const feature_fpArmv8 = Feature{
-    .name = "fp-armv8",
+    .name = "fpArmv8",
     .llvm_name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_d32,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8d16 = Feature{
-    .name = "fp-armv8d16",
+    .name = "fpArmv8d16",
     .llvm_name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8d16sp = Feature{
-    .name = "fp-armv8d16sp",
+    .name = "fpArmv8d16sp",
     .llvm_name = "fp-armv8d16sp",
     .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fpArmv8sp = Feature{
-    .name = "fp-armv8sp",
+    .name = "fpArmv8sp",
     .llvm_name = "fp-armv8sp",
     .description = "Enable ARMv8 FP with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_d32,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
@@ -259,13 +259,13 @@ pub const feature_fullfp16 = Feature{
     .llvm_name = "fullfp16",
     .description = "Enable full half-precision floating point",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
 pub const feature_fuseAes = Feature{
-    .name = "fuse-aes",
+    .name = "fuseAes",
     .llvm_name = "fuse-aes",
     .description = "CPU fuses AES crypto operations",
     .dependencies = &[_]*const Feature {
@@ -273,7 +273,7 @@ pub const feature_fuseAes = Feature{
 };
 
 pub const feature_fuseLiterals = Feature{
-    .name = "fuse-literals",
+    .name = "fuseLiterals",
     .llvm_name = "fuse-literals",
     .description = "CPU fuses literal generation operations",
     .dependencies = &[_]*const Feature {
@@ -281,7 +281,7 @@ pub const feature_fuseLiterals = Feature{
 };
 
 pub const feature_hwdivArm = Feature{
-    .name = "hwdiv-arm",
+    .name = "hwdivArm",
     .llvm_name = "hwdiv-arm",
     .description = "Enable divide instructions in ARM mode",
     .dependencies = &[_]*const Feature {
@@ -297,7 +297,7 @@ pub const feature_hwdiv = Feature{
 };
 
 pub const feature_noBranchPredictor = Feature{
-    .name = "no-branch-predictor",
+    .name = "noBranchPredictor",
     .llvm_name = "no-branch-predictor",
     .description = "Has no branch predictor",
     .dependencies = &[_]*const Feature {
@@ -305,7 +305,7 @@ pub const feature_noBranchPredictor = Feature{
 };
 
 pub const feature_retAddrStack = Feature{
-    .name = "ret-addr-stack",
+    .name = "retAddrStack",
     .llvm_name = "ret-addr-stack",
     .description = "Has return address stack",
     .dependencies = &[_]*const Feature {
@@ -321,7 +321,7 @@ pub const feature_slowfpvmlx = Feature{
 };
 
 pub const feature_vmlxHazards = Feature{
-    .name = "vmlx-hazards",
+    .name = "vmlxHazards",
     .llvm_name = "vmlx-hazards",
     .description = "Has VMLx hazards",
     .dependencies = &[_]*const Feature {
@@ -337,7 +337,7 @@ pub const feature_lob = Feature{
 };
 
 pub const feature_longCalls = Feature{
-    .name = "long-calls",
+    .name = "longCalls",
     .llvm_name = "long-calls",
     .description = "Generate calls via indirect call instructions",
     .dependencies = &[_]*const Feature {
@@ -385,7 +385,7 @@ pub const feature_mve4beat = Feature{
 };
 
 pub const feature_muxedUnits = Feature{
-    .name = "muxed-units",
+    .name = "muxedUnits",
     .llvm_name = "muxed-units",
     .description = "Has muxed AGU and NEON/FPU",
     .dependencies = &[_]*const Feature {
@@ -411,7 +411,7 @@ pub const feature_neonfp = Feature{
 };
 
 pub const feature_neonFpmovs = Feature{
-    .name = "neon-fpmovs",
+    .name = "neonFpmovs",
     .llvm_name = "neon-fpmovs",
     .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
     .dependencies = &[_]*const Feature {
@@ -419,7 +419,7 @@ pub const feature_neonFpmovs = Feature{
 };
 
 pub const feature_naclTrap = Feature{
-    .name = "nacl-trap",
+    .name = "naclTrap",
     .llvm_name = "nacl-trap",
     .description = "NaCl trap",
     .dependencies = &[_]*const Feature {
@@ -435,7 +435,7 @@ pub const feature_noarm = Feature{
 };
 
 pub const feature_noMovt = Feature{
-    .name = "no-movt",
+    .name = "noMovt",
     .llvm_name = "no-movt",
     .description = "Don't use movt/movw pairs for 32-bit imms",
     .dependencies = &[_]*const Feature {
@@ -443,7 +443,7 @@ pub const feature_noMovt = Feature{
 };
 
 pub const feature_noNegImmediates = Feature{
-    .name = "no-neg-immediates",
+    .name = "noNegImmediates",
     .llvm_name = "no-neg-immediates",
     .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
     .dependencies = &[_]*const Feature {
@@ -451,7 +451,7 @@ pub const feature_noNegImmediates = Feature{
 };
 
 pub const feature_disablePostraScheduler = Feature{
-    .name = "disable-postra-scheduler",
+    .name = "disablePostraScheduler",
     .llvm_name = "disable-postra-scheduler",
     .description = "Don't schedule again after register allocation",
     .dependencies = &[_]*const Feature {
@@ -459,7 +459,7 @@ pub const feature_disablePostraScheduler = Feature{
 };
 
 pub const feature_nonpipelinedVfp = Feature{
-    .name = "nonpipelined-vfp",
+    .name = "nonpipelinedVfp",
     .llvm_name = "nonpipelined-vfp",
     .description = "VFP instructions are not pipelined",
     .dependencies = &[_]*const Feature {
@@ -475,7 +475,7 @@ pub const feature_perfmon = Feature{
 };
 
 pub const feature_bit32 = Feature{
-    .name = "32bit",
+    .name = "bit32",
     .llvm_name = "32bit",
     .description = "Prefer 32-bit Thumb instrs",
     .dependencies = &[_]*const Feature {
@@ -483,7 +483,7 @@ pub const feature_bit32 = Feature{
 };
 
 pub const feature_preferIshst = Feature{
-    .name = "prefer-ishst",
+    .name = "preferIshst",
     .llvm_name = "prefer-ishst",
     .description = "Prefer ISHST barriers",
     .dependencies = &[_]*const Feature {
@@ -491,7 +491,7 @@ pub const feature_preferIshst = Feature{
 };
 
 pub const feature_loopAlign = Feature{
-    .name = "loop-align",
+    .name = "loopAlign",
     .llvm_name = "loop-align",
     .description = "Prefer 32-bit alignment for loops",
     .dependencies = &[_]*const Feature {
@@ -499,7 +499,7 @@ pub const feature_loopAlign = Feature{
 };
 
 pub const feature_preferVmovsr = Feature{
-    .name = "prefer-vmovsr",
+    .name = "preferVmovsr",
     .llvm_name = "prefer-vmovsr",
     .description = "Prefer VMOVSR",
     .dependencies = &[_]*const Feature {
@@ -507,7 +507,7 @@ pub const feature_preferVmovsr = Feature{
 };
 
 pub const feature_profUnpr = Feature{
-    .name = "prof-unpr",
+    .name = "profUnpr",
     .llvm_name = "prof-unpr",
     .description = "Is profitable to unpredicate",
     .dependencies = &[_]*const Feature {
@@ -531,7 +531,7 @@ pub const feature_rclass = Feature{
 };
 
 pub const feature_readTpHard = Feature{
-    .name = "read-tp-hard",
+    .name = "readTpHard",
     .llvm_name = "read-tp-hard",
     .description = "Reading thread pointer from register",
     .dependencies = &[_]*const Feature {
@@ -539,7 +539,7 @@ pub const feature_readTpHard = Feature{
 };
 
 pub const feature_reserveR9 = Feature{
-    .name = "reserve-r9",
+    .name = "reserveR9",
     .llvm_name = "reserve-r9",
     .description = "Reserve R9, making it unavailable as GPR",
     .dependencies = &[_]*const Feature {
@@ -565,7 +565,7 @@ pub const feature_sha2 = Feature{
 };
 
 pub const feature_slowFpBrcc = Feature{
-    .name = "slow-fp-brcc",
+    .name = "slowFpBrcc",
     .llvm_name = "slow-fp-brcc",
     .description = "FP compare + branch is slow",
     .dependencies = &[_]*const Feature {
@@ -573,7 +573,7 @@ pub const feature_slowFpBrcc = Feature{
 };
 
 pub const feature_slowLoadDSubreg = Feature{
-    .name = "slow-load-D-subreg",
+    .name = "slowLoadDSubreg",
     .llvm_name = "slow-load-D-subreg",
     .description = "Loading into D subregs is slow",
     .dependencies = &[_]*const Feature {
@@ -581,7 +581,7 @@ pub const feature_slowLoadDSubreg = Feature{
 };
 
 pub const feature_slowOddReg = Feature{
-    .name = "slow-odd-reg",
+    .name = "slowOddReg",
     .llvm_name = "slow-odd-reg",
     .description = "VLDM/VSTM starting with an odd register is slow",
     .dependencies = &[_]*const Feature {
@@ -589,7 +589,7 @@ pub const feature_slowOddReg = Feature{
 };
 
 pub const feature_slowVdup32 = Feature{
-    .name = "slow-vdup32",
+    .name = "slowVdup32",
     .llvm_name = "slow-vdup32",
     .description = "Has slow VDUP32 - prefer VMOV",
     .dependencies = &[_]*const Feature {
@@ -597,7 +597,7 @@ pub const feature_slowVdup32 = Feature{
 };
 
 pub const feature_slowVgetlni32 = Feature{
-    .name = "slow-vgetlni32",
+    .name = "slowVgetlni32",
     .llvm_name = "slow-vgetlni32",
     .description = "Has slow VGETLNi32 - prefer VMOV",
     .dependencies = &[_]*const Feature {
@@ -605,7 +605,7 @@ pub const feature_slowVgetlni32 = Feature{
 };
 
 pub const feature_splatVfpNeon = Feature{
-    .name = "splat-vfp-neon",
+    .name = "splatVfpNeon",
     .llvm_name = "splat-vfp-neon",
     .description = "Splat register from VFP to NEON",
     .dependencies = &[_]*const Feature {
@@ -614,7 +614,7 @@ pub const feature_splatVfpNeon = Feature{
 };
 
 pub const feature_strictAlign = Feature{
-    .name = "strict-align",
+    .name = "strictAlign",
     .llvm_name = "strict-align",
     .description = "Disallow all unaligned memory access",
     .dependencies = &[_]*const Feature {
@@ -638,7 +638,7 @@ pub const feature_trustzone = Feature{
 };
 
 pub const feature_useAa = Feature{
-    .name = "use-aa",
+    .name = "useAa",
     .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
@@ -646,7 +646,7 @@ pub const feature_useAa = Feature{
 };
 
 pub const feature_useMisched = Feature{
-    .name = "use-misched",
+    .name = "useMisched",
     .llvm_name = "use-misched",
     .description = "Use the MachineScheduler",
     .dependencies = &[_]*const Feature {
@@ -654,7 +654,7 @@ pub const feature_useMisched = Feature{
 };
 
 pub const feature_wideStrideVfp = Feature{
-    .name = "wide-stride-vfp",
+    .name = "wideStrideVfp",
     .llvm_name = "wide-stride-vfp",
     .description = "Use a wide stride when allocating VFP registers",
     .dependencies = &[_]*const Feature {
@@ -730,9 +730,9 @@ pub const feature_vfp4 = Feature{
     .llvm_name = "vfp4",
     .description = "Enable VFP4 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
+        &feature_fp16,
     },
 };
 
@@ -741,8 +741,8 @@ pub const feature_vfp4d16 = Feature{
     .llvm_name = "vfp4d16",
     .description = "Enable VFP4 instructions with only 16 d-registers",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
@@ -751,8 +751,8 @@ pub const feature_vfp4d16sp = Feature{
     .llvm_name = "vfp4d16sp",
     .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
     },
 };
 
@@ -761,14 +761,14 @@ pub const feature_vfp4sp = Feature{
     .llvm_name = "vfp4sp",
     .description = "Enable VFP4 instructions with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
+        &feature_fp16,
     },
 };
 
 pub const feature_vmlxForwarding = Feature{
-    .name = "vmlx-forwarding",
+    .name = "vmlxForwarding",
     .llvm_name = "vmlx-forwarding",
     .description = "Has multiplier accumulator forwarding",
     .dependencies = &[_]*const Feature {
@@ -925,7 +925,7 @@ pub const cpu_arm10tdmi = Cpu{
 };
 
 pub const cpu_arm1136jS = Cpu{
-    .name = "arm1136j-s",
+    .name = "arm1136jS",
     .llvm_name = "arm1136j-s",
     .dependencies = &[_]*const Feature {
         &feature_dsp,
@@ -933,7 +933,7 @@ pub const cpu_arm1136jS = Cpu{
 };
 
 pub const cpu_arm1136jfS = Cpu{
-    .name = "arm1136jf-s",
+    .name = "arm1136jfS",
     .llvm_name = "arm1136jf-s",
     .dependencies = &[_]*const Feature {
         &feature_dsp,
@@ -944,20 +944,20 @@ pub const cpu_arm1136jfS = Cpu{
 };
 
 pub const cpu_arm1156t2S = Cpu{
-    .name = "arm1156t2-s",
+    .name = "arm1156t2S",
     .llvm_name = "arm1156t2-s",
     .dependencies = &[_]*const Feature {
-        &feature_dsp,
         &feature_thumb2,
+        &feature_dsp,
     },
 };
 
 pub const cpu_arm1156t2fS = Cpu{
-    .name = "arm1156t2f-s",
+    .name = "arm1156t2fS",
     .llvm_name = "arm1156t2f-s",
     .dependencies = &[_]*const Feature {
-        &feature_dsp,
         &feature_thumb2,
+        &feature_dsp,
         &feature_slowfpvmlx,
         &feature_fpregs,
         &feature_vfp2,
@@ -965,7 +965,7 @@ pub const cpu_arm1156t2fS = Cpu{
 };
 
 pub const cpu_arm1176jS = Cpu{
-    .name = "arm1176j-s",
+    .name = "arm1176jS",
     .llvm_name = "arm1176j-s",
     .dependencies = &[_]*const Feature {
         &feature_trustzone,
@@ -973,7 +973,7 @@ pub const cpu_arm1176jS = Cpu{
 };
 
 pub const cpu_arm1176jzS = Cpu{
-    .name = "arm1176jz-s",
+    .name = "arm1176jzS",
     .llvm_name = "arm1176jz-s",
     .dependencies = &[_]*const Feature {
         &feature_trustzone,
@@ -981,7 +981,7 @@ pub const cpu_arm1176jzS = Cpu{
 };
 
 pub const cpu_arm1176jzfS = Cpu{
-    .name = "arm1176jzf-s",
+    .name = "arm1176jzfS",
     .llvm_name = "arm1176jzf-s",
     .dependencies = &[_]*const Feature {
         &feature_trustzone,
@@ -1013,7 +1013,7 @@ pub const cpu_arm7tdmi = Cpu{
 };
 
 pub const cpu_arm7tdmiS = Cpu{
-    .name = "arm7tdmi-s",
+    .name = "arm7tdmiS",
     .llvm_name = "arm7tdmi-s",
     .dependencies = &[_]*const Feature {
     },
@@ -1062,7 +1062,7 @@ pub const cpu_arm922t = Cpu{
 };
 
 pub const cpu_arm926ejS = Cpu{
-    .name = "arm926ej-s",
+    .name = "arm926ejS",
     .llvm_name = "arm926ej-s",
     .dependencies = &[_]*const Feature {
     },
@@ -1076,21 +1076,21 @@ pub const cpu_arm940t = Cpu{
 };
 
 pub const cpu_arm946eS = Cpu{
-    .name = "arm946e-s",
+    .name = "arm946eS",
     .llvm_name = "arm946e-s",
     .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm966eS = Cpu{
-    .name = "arm966e-s",
+    .name = "arm966eS",
     .llvm_name = "arm966e-s",
     .dependencies = &[_]*const Feature {
     },
 };
 
 pub const cpu_arm968eS = Cpu{
-    .name = "arm968e-s",
+    .name = "arm968eS",
     .llvm_name = "arm968e-s",
     .dependencies = &[_]*const Feature {
     },
@@ -1111,17 +1111,17 @@ pub const cpu_arm9tdmi = Cpu{
 };
 
 pub const cpu_cortexA12 = Cpu{
-    .name = "cortex-a12",
+    .name = "cortexA12",
     .llvm_name = "cortex-a12",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1136,17 +1136,17 @@ pub const cpu_cortexA12 = Cpu{
 };
 
 pub const cpu_cortexA15 = Cpu{
-    .name = "cortex-a15",
+    .name = "cortexA15",
     .llvm_name = "cortex-a15",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_dontWidenVmovs,
@@ -1164,17 +1164,17 @@ pub const cpu_cortexA15 = Cpu{
 };
 
 pub const cpu_cortexA17 = Cpu{
-    .name = "cortex-a17",
+    .name = "cortexA17",
     .llvm_name = "cortex-a17",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1189,63 +1189,63 @@ pub const cpu_cortexA17 = Cpu{
 };
 
 pub const cpu_cortexA32 = Cpu{
-    .name = "cortex-a32",
+    .name = "cortexA32",
     .llvm_name = "cortex-a32",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
     },
 };
 
 pub const cpu_cortexA35 = Cpu{
-    .name = "cortex-a35",
+    .name = "cortexA35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
     },
 };
 
 pub const cpu_cortexA5 = Cpu{
-    .name = "cortex-a5",
+    .name = "cortexA5",
     .llvm_name = "cortex-a5",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_mp,
@@ -1258,72 +1258,72 @@ pub const cpu_cortexA5 = Cpu{
 };
 
 pub const cpu_cortexA53 = Cpu{
-    .name = "cortex-a53",
+    .name = "cortexA53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
         &feature_fpao,
     },
 };
 
 pub const cpu_cortexA55 = Cpu{
-    .name = "cortex-a55",
+    .name = "cortexA55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_dotprod,
     },
 };
 
 pub const cpu_cortexA57 = Cpu{
-    .name = "cortex-a57",
+    .name = "cortexA57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
         &feature_crypto,
@@ -1332,17 +1332,17 @@ pub const cpu_cortexA57 = Cpu{
 };
 
 pub const cpu_cortexA7 = Cpu{
-    .name = "cortex-a7",
+    .name = "cortexA7",
     .llvm_name = "cortex-a7",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1359,95 +1359,95 @@ pub const cpu_cortexA7 = Cpu{
 };
 
 pub const cpu_cortexA72 = Cpu{
-    .name = "cortex-a72",
+    .name = "cortexA72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
     },
 };
 
 pub const cpu_cortexA73 = Cpu{
-    .name = "cortex-a73",
+    .name = "cortexA73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
     },
 };
 
 pub const cpu_cortexA75 = Cpu{
-    .name = "cortex-a75",
+    .name = "cortexA75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_dotprod,
     },
 };
 
 pub const cpu_cortexA76 = Cpu{
-    .name = "cortex-a76",
+    .name = "cortexA76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1455,25 +1455,25 @@ pub const cpu_cortexA76 = Cpu{
 };
 
 pub const cpu_cortexA76ae = Cpu{
-    .name = "cortex-a76ae",
+    .name = "cortexA76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1481,17 +1481,17 @@ pub const cpu_cortexA76ae = Cpu{
 };
 
 pub const cpu_cortexA8 = Cpu{
-    .name = "cortex-a8",
+    .name = "cortexA8",
     .llvm_name = "cortex-a8",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1503,17 +1503,17 @@ pub const cpu_cortexA8 = Cpu{
 };
 
 pub const cpu_cortexA9 = Cpu{
-    .name = "cortex-a9",
+    .name = "cortexA9",
     .llvm_name = "cortex-a9",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_expandFpMlx,
@@ -1530,65 +1530,65 @@ pub const cpu_cortexA9 = Cpu{
 };
 
 pub const cpu_cortexM0 = Cpu{
-    .name = "cortex-m0",
+    .name = "cortexM0",
     .llvm_name = "cortex-m0",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_strictAlign,
         &feature_noarm,
+        &feature_strictAlign,
         &feature_mclass,
+        &feature_db,
     },
 };
 
 pub const cpu_cortexM0plus = Cpu{
-    .name = "cortex-m0plus",
+    .name = "cortexM0plus",
     .llvm_name = "cortex-m0plus",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_strictAlign,
         &feature_noarm,
+        &feature_strictAlign,
         &feature_mclass,
+        &feature_db,
     },
 };
 
 pub const cpu_cortexM1 = Cpu{
-    .name = "cortex-m1",
+    .name = "cortexM1",
     .llvm_name = "cortex-m1",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_strictAlign,
         &feature_noarm,
+        &feature_strictAlign,
         &feature_mclass,
+        &feature_db,
     },
 };
 
 pub const cpu_cortexM23 = Cpu{
-    .name = "cortex-m23",
+    .name = "cortexM23",
     .llvm_name = "cortex-m23",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_strictAlign,
+        &feature_noarm,
         &feature_acquireRelease,
         &feature_v7clrex,
-        &feature_noarm,
+        &feature_strictAlign,
         &feature_mclass,
         &feature_hwdiv,
         &feature_msecext8,
+        &feature_db,
         &feature_noMovt,
     },
 };
 
 pub const cpu_cortexM3 = Cpu{
-    .name = "cortex-m3",
+    .name = "cortexM3",
     .llvm_name = "cortex-m3",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
-        &feature_v7clrex,
+        &feature_thumb2,
         &feature_noarm,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_noBranchPredictor,
         &feature_loopAlign,
         &feature_useAa,
@@ -1597,21 +1597,21 @@ pub const cpu_cortexM3 = Cpu{
 };
 
 pub const cpu_cortexM33 = Cpu{
-    .name = "cortex-m33",
+    .name = "cortexM33",
     .llvm_name = "cortex-m33",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_noarm,
         &feature_acquireRelease,
         &feature_v7clrex,
-        &feature_noarm,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
         &feature_msecext8,
+        &feature_db,
         &feature_dsp,
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
         &feature_fpArmv8d16sp,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
@@ -1622,21 +1622,21 @@ pub const cpu_cortexM33 = Cpu{
 };
 
 pub const cpu_cortexM35p = Cpu{
-    .name = "cortex-m35p",
+    .name = "cortexM35p",
     .llvm_name = "cortex-m35p",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_noarm,
         &feature_acquireRelease,
         &feature_v7clrex,
-        &feature_noarm,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
         &feature_msecext8,
+        &feature_db,
         &feature_dsp,
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
         &feature_fpArmv8d16sp,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
@@ -1647,73 +1647,73 @@ pub const cpu_cortexM35p = Cpu{
 };
 
 pub const cpu_cortexM4 = Cpu{
-    .name = "cortex-m4",
+    .name = "cortexM4",
     .llvm_name = "cortex-m4",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
-        &feature_v7clrex,
+        &feature_thumb2,
         &feature_dsp,
         &feature_noarm,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
         &feature_loopAlign,
         &feature_useAa,
         &feature_useMisched,
-        &feature_fp16,
         &feature_fpregs,
+        &feature_fp16,
         &feature_vfp4d16sp,
     },
 };
 
 pub const cpu_cortexM7 = Cpu{
-    .name = "cortex-m7",
+    .name = "cortexM7",
     .llvm_name = "cortex-m7",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
-        &feature_v7clrex,
+        &feature_thumb2,
         &feature_dsp,
         &feature_noarm,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
-        &feature_fp16,
+        &feature_db,
         &feature_fpregs,
+        &feature_fp16,
         &feature_fpArmv8d16,
     },
 };
 
 pub const cpu_cortexR4 = Cpu{
-    .name = "cortex-r4",
+    .name = "cortexR4",
     .llvm_name = "cortex-r4",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_dsp,
         &feature_rclass,
         &feature_v7clrex,
-        &feature_dsp,
+        &feature_perfmon,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
     },
 };
 
 pub const cpu_cortexR4f = Cpu{
-    .name = "cortex-r4f",
+    .name = "cortexR4f",
     .llvm_name = "cortex-r4f",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_dsp,
         &feature_rclass,
         &feature_v7clrex,
-        &feature_dsp,
+        &feature_perfmon,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1724,16 +1724,16 @@ pub const cpu_cortexR4f = Cpu{
 };
 
 pub const cpu_cortexR5 = Cpu{
-    .name = "cortex-r5",
+    .name = "cortexR5",
     .llvm_name = "cortex-r5",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_dsp,
         &feature_rclass,
         &feature_v7clrex,
-        &feature_dsp,
+        &feature_perfmon,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
         &feature_retAddrStack,
@@ -1745,24 +1745,24 @@ pub const cpu_cortexR5 = Cpu{
 };
 
 pub const cpu_cortexR52 = Cpu{
-    .name = "cortex-r52",
+    .name = "cortexR52",
     .llvm_name = "cortex-r52",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_rclass,
-        &feature_acquireRelease,
-        &feature_mp,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_crc,
-        &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
         &feature_dfb,
+        &feature_rclass,
+        &feature_v7clrex,
+        &feature_hwdivArm,
+        &feature_acquireRelease,
+        &feature_perfmon,
+        &feature_crc,
+        &feature_mp,
+        &feature_hwdiv,
+        &feature_d32,
+        &feature_fp16,
+        &feature_db,
         &feature_fpao,
         &feature_useAa,
         &feature_useMisched,
@@ -1770,16 +1770,16 @@ pub const cpu_cortexR52 = Cpu{
 };
 
 pub const cpu_cortexR7 = Cpu{
-    .name = "cortex-r7",
+    .name = "cortexR7",
     .llvm_name = "cortex-r7",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_dsp,
         &feature_rclass,
         &feature_v7clrex,
-        &feature_dsp,
+        &feature_perfmon,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1793,16 +1793,16 @@ pub const cpu_cortexR7 = Cpu{
 };
 
 pub const cpu_cortexR8 = Cpu{
-    .name = "cortex-r8",
+    .name = "cortexR8",
     .llvm_name = "cortex-r8",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
+        &feature_dsp,
         &feature_rclass,
         &feature_v7clrex,
-        &feature_dsp,
+        &feature_perfmon,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1819,21 +1819,21 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_crypto,
@@ -1855,183 +1855,183 @@ pub const cpu_ep9312 = Cpu{
 };
 
 pub const cpu_exynosM1 = Cpu{
-    .name = "exynos-m1",
+    .name = "exynosM1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_expandFpMlx,
-        &feature_fuseLiterals,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_wideStrideVfp,
         &feature_profUnpr,
-        &feature_slowVdup32,
         &feature_slowfpvmlx,
-        &feature_dontWidenVmovs,
+        &feature_slowFpBrcc,
         &feature_useAa,
+        &feature_dontWidenVmovs,
         &feature_retAddrStack,
+        &feature_fuseLiterals,
+        &feature_wideStrideVfp,
         &feature_zcz,
-        &feature_slowFpBrcc,
+        &feature_fuseAes,
+        &feature_slowVdup32,
     },
 };
 
 pub const cpu_exynosM2 = Cpu{
-    .name = "exynos-m2",
+    .name = "exynosM2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_expandFpMlx,
-        &feature_fuseLiterals,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_wideStrideVfp,
         &feature_profUnpr,
-        &feature_slowVdup32,
         &feature_slowfpvmlx,
-        &feature_dontWidenVmovs,
+        &feature_slowFpBrcc,
         &feature_useAa,
+        &feature_dontWidenVmovs,
         &feature_retAddrStack,
+        &feature_fuseLiterals,
+        &feature_wideStrideVfp,
         &feature_zcz,
-        &feature_slowFpBrcc,
+        &feature_fuseAes,
+        &feature_slowVdup32,
     },
 };
 
 pub const cpu_exynosM3 = Cpu{
-    .name = "exynos-m3",
+    .name = "exynosM3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_expandFpMlx,
-        &feature_fuseLiterals,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_wideStrideVfp,
         &feature_profUnpr,
-        &feature_slowVdup32,
         &feature_slowfpvmlx,
-        &feature_dontWidenVmovs,
+        &feature_slowFpBrcc,
         &feature_useAa,
+        &feature_dontWidenVmovs,
         &feature_retAddrStack,
+        &feature_fuseLiterals,
+        &feature_wideStrideVfp,
         &feature_zcz,
-        &feature_slowFpBrcc,
+        &feature_fuseAes,
+        &feature_slowVdup32,
     },
 };
 
 pub const cpu_exynosM4 = Cpu{
-    .name = "exynos-m4",
+    .name = "exynosM4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_dotprod,
         &feature_fullfp16,
         &feature_expandFpMlx,
-        &feature_fuseLiterals,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_wideStrideVfp,
         &feature_profUnpr,
-        &feature_slowVdup32,
         &feature_slowfpvmlx,
-        &feature_dontWidenVmovs,
+        &feature_slowFpBrcc,
         &feature_useAa,
+        &feature_dontWidenVmovs,
         &feature_retAddrStack,
+        &feature_fuseLiterals,
+        &feature_wideStrideVfp,
         &feature_zcz,
-        &feature_slowFpBrcc,
+        &feature_fuseAes,
+        &feature_slowVdup32,
     },
 };
 
 pub const cpu_exynosM5 = Cpu{
-    .name = "exynos-m5",
+    .name = "exynosM5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_dotprod,
         &feature_fullfp16,
         &feature_expandFpMlx,
-        &feature_fuseLiterals,
-        &feature_fuseAes,
         &feature_slowVgetlni32,
-        &feature_wideStrideVfp,
         &feature_profUnpr,
-        &feature_slowVdup32,
         &feature_slowfpvmlx,
-        &feature_dontWidenVmovs,
+        &feature_slowFpBrcc,
         &feature_useAa,
+        &feature_dontWidenVmovs,
         &feature_retAddrStack,
+        &feature_fuseLiterals,
+        &feature_wideStrideVfp,
         &feature_zcz,
-        &feature_slowFpBrcc,
+        &feature_fuseAes,
+        &feature_slowVdup32,
     },
 };
 
@@ -2053,14 +2053,14 @@ pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_fp16,
@@ -2077,21 +2077,21 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
     },
 };
@@ -2114,25 +2114,25 @@ pub const cpu_mpcorenovfp = Cpu{
 };
 
 pub const cpu_neoverseN1 = Cpu{
-    .name = "neoverse-n1",
+    .name = "neoverseN1",
     .llvm_name = "neoverse-n1",
     .dependencies = &[_]*const Feature {
-        &feature_ras,
-        &feature_db,
         &feature_trustzone,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
+        &feature_dsp,
+        &feature_ras,
+        &feature_v7clrex,
+        &feature_hwdivArm,
         &feature_acquireRelease,
+        &feature_aclass,
+        &feature_perfmon,
+        &feature_crc,
         &feature_mp,
+        &feature_hwdiv,
         &feature_d32,
-        &feature_v7clrex,
-        &feature_dsp,
-        &feature_crc,
         &feature_fp16,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_thumb2,
-        &feature_aclass,
+        &feature_db,
         &feature_crypto,
         &feature_dotprod,
     },
@@ -2142,10 +2142,10 @@ pub const cpu_sc000 = Cpu{
     .name = "sc000",
     .llvm_name = "sc000",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_strictAlign,
         &feature_noarm,
+        &feature_strictAlign,
         &feature_mclass,
+        &feature_db,
     },
 };
 
@@ -2153,13 +2153,13 @@ pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
-        &feature_v7clrex,
+        &feature_thumb2,
         &feature_noarm,
+        &feature_v7clrex,
+        &feature_perfmon,
         &feature_mclass,
         &feature_hwdiv,
-        &feature_thumb2,
+        &feature_db,
         &feature_noBranchPredictor,
         &feature_useAa,
         &feature_useMisched,
@@ -2198,14 +2198,14 @@ pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
     .dependencies = &[_]*const Feature {
-        &feature_db,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_fpregs,
-        &feature_d32,
-        &feature_v7clrex,
         &feature_dsp,
-        &feature_thumb2,
+        &feature_v7clrex,
         &feature_aclass,
+        &feature_perfmon,
+        &feature_d32,
+        &feature_db,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index ac5c8f17111c23ac40c75d971f2ae8604070c984..2f5dc00c74aa93393e94af5285d218c4b2a6b653 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -170,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_elpm,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
+        &feature_elpm,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -183,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{
     .name = "at43usb355",
     .llvm_name = "at43usb355",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -195,11 +195,11 @@ pub const cpu_at76c711 = Cpu{
     .name = "at76c711",
     .llvm_name = "at76c711",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -207,8 +207,8 @@ pub const cpu_at86rf401 = Cpu{
     .name = "at86rf401",
     .llvm_name = "at86rf401",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
         &feature_lpmx,
@@ -220,8 +220,8 @@ pub const cpu_at90c8534 = Cpu{
     .name = "at90c8534",
     .llvm_name = "at90c8534",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -231,18 +231,18 @@ pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -250,16 +250,16 @@ pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -267,16 +267,16 @@ pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -284,15 +284,15 @@ pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -300,16 +300,16 @@ pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -317,15 +317,15 @@ pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -333,16 +333,16 @@ pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -350,15 +350,15 @@ pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -366,15 +366,15 @@ pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -382,16 +382,16 @@ pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -399,15 +399,15 @@ pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -415,15 +415,15 @@ pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -438,8 +438,8 @@ pub const cpu_at90s2313 = Cpu{
     .name = "at90s2313",
     .llvm_name = "at90s2313",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -449,8 +449,8 @@ pub const cpu_at90s2323 = Cpu{
     .name = "at90s2323",
     .llvm_name = "at90s2323",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -460,8 +460,8 @@ pub const cpu_at90s2333 = Cpu{
     .name = "at90s2333",
     .llvm_name = "at90s2333",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -471,8 +471,8 @@ pub const cpu_at90s2343 = Cpu{
     .name = "at90s2343",
     .llvm_name = "at90s2343",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -482,8 +482,8 @@ pub const cpu_at90s4414 = Cpu{
     .name = "at90s4414",
     .llvm_name = "at90s4414",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -493,8 +493,8 @@ pub const cpu_at90s4433 = Cpu{
     .name = "at90s4433",
     .llvm_name = "at90s4433",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -504,8 +504,8 @@ pub const cpu_at90s4434 = Cpu{
     .name = "at90s4434",
     .llvm_name = "at90s4434",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -515,8 +515,8 @@ pub const cpu_at90s8515 = Cpu{
     .name = "at90s8515",
     .llvm_name = "at90s8515",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -526,8 +526,8 @@ pub const cpu_at90s8535 = Cpu{
     .name = "at90s8535",
     .llvm_name = "at90s8535",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -537,16 +537,16 @@ pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -554,18 +554,18 @@ pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -573,18 +573,18 @@ pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -592,15 +592,15 @@ pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -608,16 +608,16 @@ pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -625,16 +625,16 @@ pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -642,15 +642,15 @@ pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -658,11 +658,11 @@ pub const cpu_at94k = Cpu{
     .name = "at94k",
     .llvm_name = "at94k",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -673,14 +673,14 @@ pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -688,15 +688,15 @@ pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -704,16 +704,16 @@ pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -721,16 +721,16 @@ pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -738,15 +738,15 @@ pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -754,15 +754,15 @@ pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -770,15 +770,15 @@ pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -786,12 +786,12 @@ pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_elpm,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
+        &feature_elpm,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -799,18 +799,18 @@ pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -818,18 +818,18 @@ pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -837,18 +837,18 @@ pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -856,18 +856,18 @@ pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -875,18 +875,18 @@ pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -894,18 +894,18 @@ pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -913,18 +913,18 @@ pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -932,18 +932,18 @@ pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -951,18 +951,18 @@ pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -970,16 +970,16 @@ pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -987,11 +987,11 @@ pub const cpu_atmega161 = Cpu{
     .name = "atmega161",
     .llvm_name = "atmega161",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1003,16 +1003,16 @@ pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1020,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{
     .name = "atmega163",
     .llvm_name = "atmega163",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1036,16 +1036,16 @@ pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1053,16 +1053,16 @@ pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1070,16 +1070,16 @@ pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1087,16 +1087,16 @@ pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1104,16 +1104,16 @@ pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1121,16 +1121,16 @@ pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1138,16 +1138,16 @@ pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1155,16 +1155,16 @@ pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1172,16 +1172,16 @@ pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1189,16 +1189,16 @@ pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1206,16 +1206,16 @@ pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1223,16 +1223,16 @@ pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1240,16 +1240,16 @@ pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1257,16 +1257,16 @@ pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1274,16 +1274,16 @@ pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1291,16 +1291,16 @@ pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1308,16 +1308,16 @@ pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1325,16 +1325,16 @@ pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1342,16 +1342,16 @@ pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1359,16 +1359,16 @@ pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1376,16 +1376,16 @@ pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1393,15 +1393,15 @@ pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -1409,16 +1409,16 @@ pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1426,18 +1426,18 @@ pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -1445,18 +1445,18 @@ pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -1464,18 +1464,18 @@ pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -1483,18 +1483,18 @@ pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -1502,16 +1502,16 @@ pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1519,16 +1519,16 @@ pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1536,16 +1536,16 @@ pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1553,16 +1553,16 @@ pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1570,16 +1570,16 @@ pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1587,16 +1587,16 @@ pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1604,16 +1604,16 @@ pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1621,16 +1621,16 @@ pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1638,16 +1638,16 @@ pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1655,16 +1655,16 @@ pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1672,16 +1672,16 @@ pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1689,16 +1689,16 @@ pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1706,16 +1706,16 @@ pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1723,16 +1723,16 @@ pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1740,16 +1740,16 @@ pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1757,16 +1757,16 @@ pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1774,16 +1774,16 @@ pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1791,16 +1791,16 @@ pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1808,16 +1808,16 @@ pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1825,16 +1825,16 @@ pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1842,16 +1842,16 @@ pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1859,16 +1859,16 @@ pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1876,16 +1876,16 @@ pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1893,16 +1893,16 @@ pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1910,16 +1910,16 @@ pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1927,16 +1927,16 @@ pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1944,16 +1944,16 @@ pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1961,16 +1961,16 @@ pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -1978,15 +1978,15 @@ pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -1994,16 +1994,16 @@ pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2011,16 +2011,16 @@ pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2028,16 +2028,16 @@ pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2045,15 +2045,15 @@ pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2061,15 +2061,15 @@ pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2077,15 +2077,15 @@ pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2093,15 +2093,15 @@ pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2109,16 +2109,16 @@ pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2126,16 +2126,16 @@ pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2143,16 +2143,16 @@ pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2160,16 +2160,16 @@ pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2177,16 +2177,16 @@ pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2194,16 +2194,16 @@ pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2211,16 +2211,16 @@ pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2228,16 +2228,16 @@ pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2245,16 +2245,16 @@ pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2262,16 +2262,16 @@ pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2279,16 +2279,16 @@ pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2296,16 +2296,16 @@ pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2313,16 +2313,16 @@ pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2330,16 +2330,16 @@ pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2347,16 +2347,16 @@ pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2364,16 +2364,16 @@ pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2381,16 +2381,16 @@ pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2398,16 +2398,16 @@ pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2415,16 +2415,16 @@ pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2432,16 +2432,16 @@ pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2449,16 +2449,16 @@ pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2466,16 +2466,16 @@ pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2483,16 +2483,16 @@ pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2500,16 +2500,16 @@ pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2517,15 +2517,15 @@ pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2533,8 +2533,8 @@ pub const cpu_atmega8515 = Cpu{
     .name = "atmega8515",
     .llvm_name = "atmega8515",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
         &feature_lpmx,
@@ -2548,8 +2548,8 @@ pub const cpu_atmega8535 = Cpu{
     .name = "atmega8535",
     .llvm_name = "atmega8535",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
         &feature_lpmx,
@@ -2563,15 +2563,15 @@ pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2579,15 +2579,15 @@ pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2595,15 +2595,15 @@ pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2611,15 +2611,15 @@ pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2627,15 +2627,15 @@ pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2643,15 +2643,15 @@ pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -2659,15 +2659,15 @@ pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -2676,8 +2676,8 @@ pub const cpu_attiny10 = Cpu{
     .llvm_name = "attiny10",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2686,8 +2686,8 @@ pub const cpu_attiny102 = Cpu{
     .llvm_name = "attiny102",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2696,8 +2696,8 @@ pub const cpu_attiny104 = Cpu{
     .llvm_name = "attiny104",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2721,14 +2721,14 @@ pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2736,14 +2736,14 @@ pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2759,15 +2759,15 @@ pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -2775,15 +2775,15 @@ pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -2792,8 +2792,8 @@ pub const cpu_attiny20 = Cpu{
     .llvm_name = "attiny20",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2801,8 +2801,8 @@ pub const cpu_attiny22 = Cpu{
     .name = "attiny22",
     .llvm_name = "attiny22",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -2812,14 +2812,14 @@ pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2827,14 +2827,14 @@ pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2842,14 +2842,14 @@ pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2857,14 +2857,14 @@ pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2872,14 +2872,14 @@ pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2887,8 +2887,8 @@ pub const cpu_attiny26 = Cpu{
     .name = "attiny26",
     .llvm_name = "attiny26",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
         &feature_lpmx,
@@ -2899,14 +2899,14 @@ pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2914,14 +2914,14 @@ pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2938,8 +2938,8 @@ pub const cpu_attiny4 = Cpu{
     .llvm_name = "attiny4",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2948,8 +2948,8 @@ pub const cpu_attiny40 = Cpu{
     .llvm_name = "attiny40",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -2957,14 +2957,14 @@ pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2972,14 +2972,14 @@ pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -2987,14 +2987,14 @@ pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3002,14 +3002,14 @@ pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3017,14 +3017,14 @@ pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3032,14 +3032,14 @@ pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3047,14 +3047,14 @@ pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3062,14 +3062,14 @@ pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3078,8 +3078,8 @@ pub const cpu_attiny5 = Cpu{
     .llvm_name = "attiny5",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -3087,14 +3087,14 @@ pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3102,14 +3102,14 @@ pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3117,14 +3117,14 @@ pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3132,14 +3132,14 @@ pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3147,14 +3147,14 @@ pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3162,14 +3162,14 @@ pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3177,14 +3177,14 @@ pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3192,14 +3192,14 @@ pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -3208,8 +3208,8 @@ pub const cpu_attiny9 = Cpu{
     .llvm_name = "attiny9",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -3217,21 +3217,21 @@ pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3239,22 +3239,22 @@ pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3262,21 +3262,21 @@ pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3284,22 +3284,22 @@ pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3307,22 +3307,22 @@ pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3330,22 +3330,22 @@ pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3353,22 +3353,22 @@ pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3376,22 +3376,22 @@ pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3399,21 +3399,21 @@ pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3421,21 +3421,21 @@ pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3443,21 +3443,21 @@ pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3465,22 +3465,22 @@ pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3488,22 +3488,22 @@ pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3511,21 +3511,21 @@ pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3533,21 +3533,21 @@ pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3555,21 +3555,21 @@ pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3577,22 +3577,22 @@ pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3600,22 +3600,22 @@ pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3623,21 +3623,21 @@ pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3645,21 +3645,21 @@ pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3667,21 +3667,21 @@ pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3689,22 +3689,22 @@ pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3712,22 +3712,22 @@ pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3735,22 +3735,22 @@ pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3758,21 +3758,21 @@ pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3780,21 +3780,21 @@ pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3802,22 +3802,22 @@ pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3825,22 +3825,22 @@ pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3848,21 +3848,21 @@ pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3870,21 +3870,21 @@ pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3892,21 +3892,21 @@ pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3914,22 +3914,22 @@ pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -3937,21 +3937,21 @@ pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3959,21 +3959,21 @@ pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -3981,22 +3981,22 @@ pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4004,21 +4004,21 @@ pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4026,22 +4026,22 @@ pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4049,22 +4049,22 @@ pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4072,22 +4072,22 @@ pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4095,22 +4095,22 @@ pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4118,22 +4118,22 @@ pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
+        &feature_eijmpcall,
+        &feature_lpm,
         &feature_sram,
         &feature_movw,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_rmw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_rmw,
-        &feature_ijmpcall,
-        &feature_eijmpcall,
-        &feature_break,
         &feature_elpmx,
+        &feature_mul,
     },
 };
 
@@ -4141,21 +4141,21 @@ pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4163,21 +4163,21 @@ pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4185,21 +4185,21 @@ pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4215,8 +4215,8 @@ pub const cpu_avr2 = Cpu{
     .name = "avr2",
     .llvm_name = "avr2",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
     },
@@ -4226,14 +4226,14 @@ pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
     },
 };
 
@@ -4241,11 +4241,11 @@ pub const cpu_avr3 = Cpu{
     .name = "avr3",
     .llvm_name = "avr3",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -4253,12 +4253,12 @@ pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_elpm,
         &feature_lpm,
+        &feature_sram,
         &feature_addsubiw,
+        &feature_elpm,
         &feature_ijmpcall,
+        &feature_jmpcall,
     },
 };
 
@@ -4266,15 +4266,15 @@ pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
     },
 };
 
@@ -4282,15 +4282,15 @@ pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -4298,16 +4298,16 @@ pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
@@ -4315,18 +4315,18 @@ pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4334,18 +4334,18 @@ pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
     .dependencies = &[_]*const Feature {
+        &feature_lpm,
         &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
-        &feature_lpm,
+        &feature_break,
+        &feature_ijmpcall,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4354,8 +4354,8 @@ pub const cpu_avrtiny = Cpu{
     .llvm_name = "avrtiny",
     .dependencies = &[_]*const Feature {
         &feature_sram,
-        &feature_tinyencoding,
         &feature_break,
+        &feature_tinyencoding,
     },
 };
 
@@ -4363,21 +4363,21 @@ pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4385,21 +4385,21 @@ pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4407,21 +4407,21 @@ pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4429,21 +4429,21 @@ pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4451,21 +4451,21 @@ pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4473,21 +4473,21 @@ pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4495,21 +4495,21 @@ pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
     .dependencies = &[_]*const Feature {
-        &feature_des,
-        &feature_sram,
         &feature_eijmpcall,
-        &feature_jmpcall,
-        &feature_mul,
+        &feature_lpm,
+        &feature_sram,
+        &feature_addsubiw,
+        &feature_movw,
         &feature_elpm,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_des,
         &feature_spmx,
-        &feature_lpm,
         &feature_lpmx,
+        &feature_jmpcall,
         &feature_spm,
-        &feature_addsubiw,
-        &feature_ijmpcall,
         &feature_elpmx,
-        &feature_break,
-        &feature_movw,
+        &feature_mul,
     },
 };
 
@@ -4517,16 +4517,16 @@ pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
     .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_jmpcall,
-        &feature_mul,
         &feature_lpm,
-        &feature_lpmx,
-        &feature_spm,
+        &feature_sram,
         &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_break,
         &feature_movw,
+        &feature_break,
+        &feature_ijmpcall,
+        &feature_lpmx,
+        &feature_jmpcall,
+        &feature_spm,
+        &feature_mul,
     },
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 7deecaa6c73a8f2b5159cdc687467943019292ac..54f59d651afd85dc633e507d461f43c63bbce46c 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -10,7 +10,7 @@ pub const feature_duplex = Feature{
 };
 
 pub const feature_longCalls = Feature{
-    .name = "long-calls",
+    .name = "longCalls",
     .llvm_name = "long-calls",
     .description = "Use constant-extended calls",
     .dependencies = &[_]*const Feature {
@@ -52,7 +52,7 @@ pub const feature_nvs = Feature{
 };
 
 pub const feature_noreturnStackElim = Feature{
-    .name = "noreturn-stack-elim",
+    .name = "noreturnStackElim",
     .llvm_name = "noreturn-stack-elim",
     .description = "Eliminate stack allocation in a noreturn function when possible",
     .dependencies = &[_]*const Feature {
@@ -68,7 +68,7 @@ pub const feature_packets = Feature{
 };
 
 pub const feature_reservedR19 = Feature{
-    .name = "reserved-r19",
+    .name = "reservedR19",
     .llvm_name = "reserved-r19",
     .description = "Reserve register R19",
     .dependencies = &[_]*const Feature {
@@ -76,7 +76,7 @@ pub const feature_reservedR19 = Feature{
 };
 
 pub const feature_smallData = Feature{
-    .name = "small-data",
+    .name = "smallData",
     .llvm_name = "small-data",
     .description = "Allow GP-relative addressing of global variables",
     .dependencies = &[_]*const Feature {
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 7b97a84f18d900ea206ec0aac64b0d7d37d1497d..6eab968c2300cf4bf264fafd9a067c5e4281137e 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -22,14 +22,14 @@ pub const feature_cnmips = Feature{
     .llvm_name = "cnmips",
     .description = "Octeon cnMIPS Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -100,7 +100,7 @@ pub const feature_gp64 = Feature{
 };
 
 pub const feature_longCalls = Feature{
-    .name = "long-calls",
+    .name = "longCalls",
     .llvm_name = "long-calls",
     .description = "Disable use of the jal instruction",
     .dependencies = &[_]*const Feature {
@@ -163,9 +163,9 @@ pub const feature_mips3 = Feature{
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_fp64,
-        &feature_gp64,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
     },
 };
 
@@ -192,11 +192,11 @@ pub const feature_mips4 = Feature{
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_fp64,
+        &feature_mips3_32,
         &feature_gp64,
         &feature_mips4_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
+        &feature_fp64,
     },
 };
 
@@ -221,14 +221,14 @@ pub const feature_mips5 = Feature{
     .llvm_name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -253,9 +253,9 @@ pub const feature_mips32 = Feature{
     .llvm_name = "mips32",
     .description = "Mips32 ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
-        &feature_mips4_32,
         &feature_mips3_32,
+        &feature_mips4_32,
+        &feature_mips1,
     },
 };
 
@@ -264,12 +264,12 @@ pub const feature_mips32r2 = Feature{
     .llvm_name = "mips32r2",
     .description = "Mips32r2 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
     },
 };
 
@@ -278,12 +278,12 @@ pub const feature_mips32r3 = Feature{
     .llvm_name = "mips32r3",
     .description = "Mips32r3 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
     },
 };
 
@@ -292,12 +292,12 @@ pub const feature_mips32r5 = Feature{
     .llvm_name = "mips32r5",
     .description = "Mips32r5 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
     },
 };
 
@@ -306,15 +306,15 @@ pub const feature_mips32r6 = Feature{
     .llvm_name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
         &feature_mips4_32,
-        &feature_nan2008,
-        &feature_mips5_32r2,
+        &feature_abs2008,
         &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -323,14 +323,14 @@ pub const feature_mips64 = Feature{
     .llvm_name = "mips64",
     .description = "Mips64 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -339,14 +339,14 @@ pub const feature_mips64r2 = Feature{
     .llvm_name = "mips64r2",
     .description = "Mips64r2 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -355,14 +355,14 @@ pub const feature_mips64r3 = Feature{
     .llvm_name = "mips64r3",
     .description = "Mips64r3 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -371,14 +371,14 @@ pub const feature_mips64r5 = Feature{
     .llvm_name = "mips64r5",
     .description = "Mips64r5 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -387,16 +387,16 @@ pub const feature_mips64r6 = Feature{
     .llvm_name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_nan2008,
-        &feature_mips5_32r2,
+        &feature_abs2008,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
     },
 };
 
@@ -433,7 +433,7 @@ pub const feature_ptr64 = Feature{
 };
 
 pub const feature_singleFloat = Feature{
-    .name = "single-float",
+    .name = "singleFloat",
     .llvm_name = "single-float",
     .description = "Only supports single precision float",
     .dependencies = &[_]*const Feature {
@@ -441,7 +441,7 @@ pub const feature_singleFloat = Feature{
 };
 
 pub const feature_softFloat = Feature{
-    .name = "soft-float",
+    .name = "softFloat",
     .llvm_name = "soft-float",
     .description = "Does not support floating point instructions",
     .dependencies = &[_]*const Feature {
@@ -457,7 +457,7 @@ pub const feature_sym32 = Feature{
 };
 
 pub const feature_useIndirectJumpHazard = Feature{
-    .name = "use-indirect-jump-hazard",
+    .name = "useIndirectJumpHazard",
     .llvm_name = "use-indirect-jump-hazard",
     .description = "Use indirect jump guards to prevent certain speculation based attacks",
     .dependencies = &[_]*const Feature {
@@ -465,7 +465,7 @@ pub const feature_useIndirectJumpHazard = Feature{
 };
 
 pub const feature_useTccInDiv = Feature{
-    .name = "use-tcc-in-div",
+    .name = "useTccInDiv",
     .llvm_name = "use-tcc-in-div",
     .description = "Force the assembler to use trapping",
     .dependencies = &[_]*const Feature {
@@ -501,12 +501,12 @@ pub const feature_p5600 = Feature{
     .llvm_name = "p5600",
     .description = "The P5600 Processor",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
     },
 };
 
@@ -586,9 +586,9 @@ pub const cpu_mips3 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_fp64,
-        &feature_gp64,
         &feature_mips3_32,
+        &feature_gp64,
+        &feature_fp64,
         &feature_mips3,
     },
 };
@@ -597,9 +597,9 @@ pub const cpu_mips32 = Cpu{
     .name = "mips32",
     .llvm_name = "mips32",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
-        &feature_mips4_32,
         &feature_mips3_32,
+        &feature_mips4_32,
+        &feature_mips1,
         &feature_mips32,
     },
 };
@@ -608,12 +608,12 @@ pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
         &feature_mips32r2,
     },
 };
@@ -622,12 +622,12 @@ pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
         &feature_mips32r3,
     },
 };
@@ -636,12 +636,12 @@ pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
         &feature_mips32r5,
     },
 };
@@ -650,15 +650,15 @@ pub const cpu_mips32r6 = Cpu{
     .name = "mips32r6",
     .llvm_name = "mips32r6",
     .dependencies = &[_]*const Feature {
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
         &feature_mips4_32,
-        &feature_nan2008,
-        &feature_mips5_32r2,
+        &feature_abs2008,
         &feature_fp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips32r6,
     },
 };
@@ -669,11 +669,11 @@ pub const cpu_mips4 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_fp64,
+        &feature_mips3_32,
         &feature_gp64,
         &feature_mips4_32r2,
-        &feature_mips3_32,
+        &feature_mips4_32,
+        &feature_fp64,
         &feature_mips4,
     },
 };
@@ -682,14 +682,14 @@ pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips5,
     },
 };
@@ -698,14 +698,14 @@ pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips64,
     },
 };
@@ -714,14 +714,14 @@ pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips64r2,
     },
 };
@@ -730,14 +730,14 @@ pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips64r3,
     },
 };
@@ -746,14 +746,14 @@ pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips64r5,
     },
 };
@@ -762,16 +762,16 @@ pub const cpu_mips64r6 = Cpu{
     .name = "mips64r6",
     .llvm_name = "mips64r6",
     .dependencies = &[_]*const Feature {
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_nan2008,
-        &feature_mips5_32r2,
+        &feature_abs2008,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_mips64r6,
     },
 };
@@ -780,14 +780,14 @@ pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
+        &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_gp64,
         &feature_mips4_32,
-        &feature_mips5_32r2,
         &feature_fp64,
-        &feature_gp64,
-        &feature_mips4_32r2,
-        &feature_mips3_32,
         &feature_cnmips,
         &feature_mips64r2,
     },
@@ -797,12 +797,12 @@ pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
     .dependencies = &[_]*const Feature {
+        &feature_mips5_32r2,
         &feature_mips1,
         &feature_mips3_32r2,
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips4_32r2,
         &feature_mips3_32,
+        &feature_mips4_32r2,
+        &feature_mips4_32,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 6ad23e946653cff7d1c81e16249351043a2b379d..bb68049ecad762a50ccd983727d80aef5f75ca6a 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_bit64 = Feature{
-    .name = "64bit",
+    .name = "bit64",
     .llvm_name = "64bit",
     .description = "Enable 64-bit instructions",
     .dependencies = &[_]*const Feature {
@@ -10,7 +10,7 @@ pub const feature_bit64 = Feature{
 };
 
 pub const feature_bitregs64 = Feature{
-    .name = "64bitregs",
+    .name = "bitregs64",
     .llvm_name = "64bitregs",
     .description = "Enable 64-bit registers usage for ppc32 [beta]",
     .dependencies = &[_]*const Feature {
@@ -60,7 +60,7 @@ pub const feature_crbits = Feature{
 };
 
 pub const feature_directMove = Feature{
-    .name = "direct-move",
+    .name = "directMove",
     .llvm_name = "direct-move",
     .description = "Enable Power8 direct move instructions",
     .dependencies = &[_]*const Feature {
@@ -183,7 +183,7 @@ pub const feature_htm = Feature{
 };
 
 pub const feature_hardFloat = Feature{
-    .name = "hard-float",
+    .name = "hardFloat",
     .llvm_name = "hard-float",
     .description = "Enable floating-point instructions",
     .dependencies = &[_]*const Feature {
@@ -199,7 +199,7 @@ pub const feature_icbt = Feature{
 };
 
 pub const feature_isaV30Instructions = Feature{
-    .name = "isa-v30-instructions",
+    .name = "isaV30Instructions",
     .llvm_name = "isa-v30-instructions",
     .description = "Enable instructions added in ISA 3.0.",
     .dependencies = &[_]*const Feature {
@@ -215,7 +215,7 @@ pub const feature_isel = Feature{
 };
 
 pub const feature_invariantFunctionDescriptors = Feature{
-    .name = "invariant-function-descriptors",
+    .name = "invariantFunctionDescriptors",
     .llvm_name = "invariant-function-descriptors",
     .description = "Assume function descriptors are invariant",
     .dependencies = &[_]*const Feature {
@@ -265,7 +265,7 @@ pub const feature_msync = Feature{
 };
 
 pub const feature_power8Altivec = Feature{
-    .name = "power8-altivec",
+    .name = "power8Altivec",
     .llvm_name = "power8-altivec",
     .description = "Enable POWER8 Altivec instructions",
     .dependencies = &[_]*const Feature {
@@ -283,7 +283,7 @@ pub const feature_crypto = Feature{
 };
 
 pub const feature_power8Vector = Feature{
-    .name = "power8-vector",
+    .name = "power8Vector",
     .llvm_name = "power8-vector",
     .description = "Enable POWER8 vector instructions",
     .dependencies = &[_]*const Feature {
@@ -292,7 +292,7 @@ pub const feature_power8Vector = Feature{
 };
 
 pub const feature_power9Altivec = Feature{
-    .name = "power9-altivec",
+    .name = "power9Altivec",
     .llvm_name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
     .dependencies = &[_]*const Feature {
@@ -302,7 +302,7 @@ pub const feature_power9Altivec = Feature{
 };
 
 pub const feature_power9Vector = Feature{
-    .name = "power9-vector",
+    .name = "power9Vector",
     .llvm_name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
     .dependencies = &[_]*const Feature {
@@ -336,7 +336,7 @@ pub const feature_ppc6xx = Feature{
 };
 
 pub const feature_ppcPostraSched = Feature{
-    .name = "ppc-postra-sched",
+    .name = "ppcPostraSched",
     .llvm_name = "ppc-postra-sched",
     .description = "Use PowerPC post-RA scheduling strategy",
     .dependencies = &[_]*const Feature {
@@ -344,7 +344,7 @@ pub const feature_ppcPostraSched = Feature{
 };
 
 pub const feature_ppcPreraSched = Feature{
-    .name = "ppc-prera-sched",
+    .name = "ppcPreraSched",
     .llvm_name = "ppc-prera-sched",
     .description = "Use PowerPC pre-RA scheduling strategy",
     .dependencies = &[_]*const Feature {
@@ -352,7 +352,7 @@ pub const feature_ppcPreraSched = Feature{
 };
 
 pub const feature_partwordAtomics = Feature{
-    .name = "partword-atomics",
+    .name = "partwordAtomics",
     .llvm_name = "partword-atomics",
     .description = "Enable l[bh]arx and st[bh]cx.",
     .dependencies = &[_]*const Feature {
@@ -395,7 +395,7 @@ pub const feature_stfiwx = Feature{
 };
 
 pub const feature_securePlt = Feature{
-    .name = "secure-plt",
+    .name = "securePlt",
     .llvm_name = "secure-plt",
     .description = "Enable secure plt mode",
     .dependencies = &[_]*const Feature {
@@ -403,7 +403,7 @@ pub const feature_securePlt = Feature{
 };
 
 pub const feature_slowPopcntd = Feature{
-    .name = "slow-popcntd",
+    .name = "slowPopcntd",
     .llvm_name = "slow-popcntd",
     .description = "Has slow popcnt[dw] instructions",
     .dependencies = &[_]*const Feature {
@@ -411,7 +411,7 @@ pub const feature_slowPopcntd = Feature{
 };
 
 pub const feature_twoConstNr = Feature{
-    .name = "two-const-nr",
+    .name = "twoConstNr",
     .llvm_name = "two-const-nr",
     .description = "Requires two constant Newton-Raphson computation",
     .dependencies = &[_]*const Feature {
@@ -428,7 +428,7 @@ pub const feature_vsx = Feature{
 };
 
 pub const feature_vectorsUseTwoUnits = Feature{
-    .name = "vectors-use-two-units",
+    .name = "vectorsUseTwoUnits",
     .llvm_name = "vectors-use-two-units",
     .description = "Vectors use two units",
     .dependencies = &[_]*const Feature {
@@ -546,7 +546,7 @@ pub const cpu_603 = Cpu{
 };
 
 pub const cpu_e603 = Cpu{
-    .name = "603e",
+    .name = "e603",
     .llvm_name = "603e",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -556,7 +556,7 @@ pub const cpu_e603 = Cpu{
 };
 
 pub const cpu_ev603 = Cpu{
-    .name = "603ev",
+    .name = "ev603",
     .llvm_name = "603ev",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -576,7 +576,7 @@ pub const cpu_604 = Cpu{
 };
 
 pub const cpu_e604 = Cpu{
-    .name = "604e",
+    .name = "e604",
     .llvm_name = "604e",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
@@ -755,7 +755,7 @@ pub const cpu_g4 = Cpu{
 };
 
 pub const cpu_g4Plus = Cpu{
-    .name = "g4+",
+    .name = "g4Plus",
     .llvm_name = "g4+",
     .dependencies = &[_]*const Feature {
         &feature_hardFloat,
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index e9b976b004aa78c152efe3751b7e95867e84da9c..a3f21adc0139c8c67fd1356615038296f9877399 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_bit64 = Feature{
-    .name = "64bit",
+    .name = "bit64",
     .llvm_name = "64bit",
     .description = "Implements RV64",
     .dependencies = &[_]*const Feature {
@@ -18,7 +18,7 @@ pub const feature_e = Feature{
 };
 
 pub const feature_rvcHints = Feature{
-    .name = "rvc-hints",
+    .name = "rvcHints",
     .llvm_name = "rvc-hints",
     .description = "Enable RVC Hint Instructions.",
     .dependencies = &[_]*const Feature {
@@ -87,7 +87,7 @@ pub const features = &[_]*const Feature {
 };
 
 pub const cpu_genericRv32 = Cpu{
-    .name = "generic-rv32",
+    .name = "genericRv32",
     .llvm_name = "generic-rv32",
     .dependencies = &[_]*const Feature {
         &feature_rvcHints,
@@ -95,7 +95,7 @@ pub const cpu_genericRv32 = Cpu{
 };
 
 pub const cpu_genericRv64 = Cpu{
-    .name = "generic-rv64",
+    .name = "genericRv64",
     .llvm_name = "generic-rv64",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 5bf844b8705d01d241bedbbb942974dbfb8551ba..7dfaa47df77b4e1baeb00826b6ebfc3c80ee2df7 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_hardQuadFloat = Feature{
-    .name = "hard-quad-float",
+    .name = "hardQuadFloat",
     .llvm_name = "hard-quad-float",
     .description = "Enable quad-word floating point instructions",
     .dependencies = &[_]*const Feature {
@@ -18,7 +18,7 @@ pub const feature_leon = Feature{
 };
 
 pub const feature_noFmuls = Feature{
-    .name = "no-fmuls",
+    .name = "noFmuls",
     .llvm_name = "no-fmuls",
     .description = "Disable the fmuls instruction.",
     .dependencies = &[_]*const Feature {
@@ -26,7 +26,7 @@ pub const feature_noFmuls = Feature{
 };
 
 pub const feature_noFsmuld = Feature{
-    .name = "no-fsmuld",
+    .name = "noFsmuld",
     .llvm_name = "no-fsmuld",
     .description = "Disable the fsmuld instruction.",
     .dependencies = &[_]*const Feature {
@@ -42,7 +42,7 @@ pub const feature_leonpwrpsr = Feature{
 };
 
 pub const feature_softFloat = Feature{
-    .name = "soft-float",
+    .name = "softFloat",
     .llvm_name = "soft-float",
     .description = "Use software emulation for floating point",
     .dependencies = &[_]*const Feature {
@@ -50,7 +50,7 @@ pub const feature_softFloat = Feature{
 };
 
 pub const feature_softMulDiv = Feature{
-    .name = "soft-mul-div",
+    .name = "softMulDiv",
     .llvm_name = "soft-mul-div",
     .description = "Use software emulation for integer multiply and divide",
     .dependencies = &[_]*const Feature {
@@ -58,7 +58,7 @@ pub const feature_softMulDiv = Feature{
 };
 
 pub const feature_deprecatedV8 = Feature{
-    .name = "deprecated-v8",
+    .name = "deprecatedV8",
     .llvm_name = "deprecated-v8",
     .description = "Enable deprecated V8 instructions in V9 mode",
     .dependencies = &[_]*const Feature {
@@ -287,7 +287,7 @@ pub const cpu_myriad2 = Cpu{
 };
 
 pub const cpu_myriad21 = Cpu{
-    .name = "myriad2.1",
+    .name = "myriad21",
     .llvm_name = "myriad2.1",
     .dependencies = &[_]*const Feature {
         &feature_leon,
@@ -295,7 +295,7 @@ pub const cpu_myriad21 = Cpu{
 };
 
 pub const cpu_myriad22 = Cpu{
-    .name = "myriad2.2",
+    .name = "myriad22",
     .llvm_name = "myriad2.2",
     .dependencies = &[_]*const Feature {
         &feature_leon,
@@ -303,7 +303,7 @@ pub const cpu_myriad22 = Cpu{
 };
 
 pub const cpu_myriad23 = Cpu{
-    .name = "myriad2.3",
+    .name = "myriad23",
     .llvm_name = "myriad2.3",
     .dependencies = &[_]*const Feature {
         &feature_leon,
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 56bd80efd1ae0ba9a7219c173283289d714ada76..7966f4191506720b3709a87f6531109f5add68f9 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_dfpPackedConversion = Feature{
-    .name = "dfp-packed-conversion",
+    .name = "dfpPackedConversion",
     .llvm_name = "dfp-packed-conversion",
     .description = "Assume that the DFP packed-conversion facility is installed",
     .dependencies = &[_]*const Feature {
@@ -10,7 +10,7 @@ pub const feature_dfpPackedConversion = Feature{
 };
 
 pub const feature_dfpZonedConversion = Feature{
-    .name = "dfp-zoned-conversion",
+    .name = "dfpZonedConversion",
     .llvm_name = "dfp-zoned-conversion",
     .description = "Assume that the DFP zoned-conversion facility is installed",
     .dependencies = &[_]*const Feature {
@@ -18,7 +18,7 @@ pub const feature_dfpZonedConversion = Feature{
 };
 
 pub const feature_deflateConversion = Feature{
-    .name = "deflate-conversion",
+    .name = "deflateConversion",
     .llvm_name = "deflate-conversion",
     .description = "Assume that the deflate-conversion facility is installed",
     .dependencies = &[_]*const Feature {
@@ -26,7 +26,7 @@ pub const feature_deflateConversion = Feature{
 };
 
 pub const feature_distinctOps = Feature{
-    .name = "distinct-ops",
+    .name = "distinctOps",
     .llvm_name = "distinct-ops",
     .description = "Assume that the distinct-operands facility is installed",
     .dependencies = &[_]*const Feature {
@@ -34,7 +34,7 @@ pub const feature_distinctOps = Feature{
 };
 
 pub const feature_enhancedDat2 = Feature{
-    .name = "enhanced-dat-2",
+    .name = "enhancedDat2",
     .llvm_name = "enhanced-dat-2",
     .description = "Assume that the enhanced-DAT facility 2 is installed",
     .dependencies = &[_]*const Feature {
@@ -42,7 +42,7 @@ pub const feature_enhancedDat2 = Feature{
 };
 
 pub const feature_enhancedSort = Feature{
-    .name = "enhanced-sort",
+    .name = "enhancedSort",
     .llvm_name = "enhanced-sort",
     .description = "Assume that the enhanced-sort facility is installed",
     .dependencies = &[_]*const Feature {
@@ -50,7 +50,7 @@ pub const feature_enhancedSort = Feature{
 };
 
 pub const feature_executionHint = Feature{
-    .name = "execution-hint",
+    .name = "executionHint",
     .llvm_name = "execution-hint",
     .description = "Assume that the execution-hint facility is installed",
     .dependencies = &[_]*const Feature {
@@ -58,7 +58,7 @@ pub const feature_executionHint = Feature{
 };
 
 pub const feature_fpExtension = Feature{
-    .name = "fp-extension",
+    .name = "fpExtension",
     .llvm_name = "fp-extension",
     .description = "Assume that the floating-point extension facility is installed",
     .dependencies = &[_]*const Feature {
@@ -66,7 +66,7 @@ pub const feature_fpExtension = Feature{
 };
 
 pub const feature_fastSerialization = Feature{
-    .name = "fast-serialization",
+    .name = "fastSerialization",
     .llvm_name = "fast-serialization",
     .description = "Assume that the fast-serialization facility is installed",
     .dependencies = &[_]*const Feature {
@@ -74,7 +74,7 @@ pub const feature_fastSerialization = Feature{
 };
 
 pub const feature_guardedStorage = Feature{
-    .name = "guarded-storage",
+    .name = "guardedStorage",
     .llvm_name = "guarded-storage",
     .description = "Assume that the guarded-storage facility is installed",
     .dependencies = &[_]*const Feature {
@@ -82,7 +82,7 @@ pub const feature_guardedStorage = Feature{
 };
 
 pub const feature_highWord = Feature{
-    .name = "high-word",
+    .name = "highWord",
     .llvm_name = "high-word",
     .description = "Assume that the high-word facility is installed",
     .dependencies = &[_]*const Feature {
@@ -90,7 +90,7 @@ pub const feature_highWord = Feature{
 };
 
 pub const feature_insertReferenceBitsMultiple = Feature{
-    .name = "insert-reference-bits-multiple",
+    .name = "insertReferenceBitsMultiple",
     .llvm_name = "insert-reference-bits-multiple",
     .description = "Assume that the insert-reference-bits-multiple facility is installed",
     .dependencies = &[_]*const Feature {
@@ -98,7 +98,7 @@ pub const feature_insertReferenceBitsMultiple = Feature{
 };
 
 pub const feature_interlockedAccess1 = Feature{
-    .name = "interlocked-access1",
+    .name = "interlockedAccess1",
     .llvm_name = "interlocked-access1",
     .description = "Assume that interlocked-access facility 1 is installed",
     .dependencies = &[_]*const Feature {
@@ -106,7 +106,7 @@ pub const feature_interlockedAccess1 = Feature{
 };
 
 pub const feature_loadAndTrap = Feature{
-    .name = "load-and-trap",
+    .name = "loadAndTrap",
     .llvm_name = "load-and-trap",
     .description = "Assume that the load-and-trap facility is installed",
     .dependencies = &[_]*const Feature {
@@ -114,7 +114,7 @@ pub const feature_loadAndTrap = Feature{
 };
 
 pub const feature_loadAndZeroRightmostByte = Feature{
-    .name = "load-and-zero-rightmost-byte",
+    .name = "loadAndZeroRightmostByte",
     .llvm_name = "load-and-zero-rightmost-byte",
     .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
     .dependencies = &[_]*const Feature {
@@ -122,7 +122,7 @@ pub const feature_loadAndZeroRightmostByte = Feature{
 };
 
 pub const feature_loadStoreOnCond = Feature{
-    .name = "load-store-on-cond",
+    .name = "loadStoreOnCond",
     .llvm_name = "load-store-on-cond",
     .description = "Assume that the load/store-on-condition facility is installed",
     .dependencies = &[_]*const Feature {
@@ -130,7 +130,7 @@ pub const feature_loadStoreOnCond = Feature{
 };
 
 pub const feature_loadStoreOnCond2 = Feature{
-    .name = "load-store-on-cond-2",
+    .name = "loadStoreOnCond2",
     .llvm_name = "load-store-on-cond-2",
     .description = "Assume that the load/store-on-condition facility 2 is installed",
     .dependencies = &[_]*const Feature {
@@ -138,7 +138,7 @@ pub const feature_loadStoreOnCond2 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension3 = Feature{
-    .name = "message-security-assist-extension3",
+    .name = "messageSecurityAssistExtension3",
     .llvm_name = "message-security-assist-extension3",
     .description = "Assume that the message-security-assist extension facility 3 is installed",
     .dependencies = &[_]*const Feature {
@@ -146,7 +146,7 @@ pub const feature_messageSecurityAssistExtension3 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension4 = Feature{
-    .name = "message-security-assist-extension4",
+    .name = "messageSecurityAssistExtension4",
     .llvm_name = "message-security-assist-extension4",
     .description = "Assume that the message-security-assist extension facility 4 is installed",
     .dependencies = &[_]*const Feature {
@@ -154,7 +154,7 @@ pub const feature_messageSecurityAssistExtension4 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension5 = Feature{
-    .name = "message-security-assist-extension5",
+    .name = "messageSecurityAssistExtension5",
     .llvm_name = "message-security-assist-extension5",
     .description = "Assume that the message-security-assist extension facility 5 is installed",
     .dependencies = &[_]*const Feature {
@@ -162,7 +162,7 @@ pub const feature_messageSecurityAssistExtension5 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension7 = Feature{
-    .name = "message-security-assist-extension7",
+    .name = "messageSecurityAssistExtension7",
     .llvm_name = "message-security-assist-extension7",
     .description = "Assume that the message-security-assist extension facility 7 is installed",
     .dependencies = &[_]*const Feature {
@@ -170,7 +170,7 @@ pub const feature_messageSecurityAssistExtension7 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension8 = Feature{
-    .name = "message-security-assist-extension8",
+    .name = "messageSecurityAssistExtension8",
     .llvm_name = "message-security-assist-extension8",
     .description = "Assume that the message-security-assist extension facility 8 is installed",
     .dependencies = &[_]*const Feature {
@@ -178,7 +178,7 @@ pub const feature_messageSecurityAssistExtension8 = Feature{
 };
 
 pub const feature_messageSecurityAssistExtension9 = Feature{
-    .name = "message-security-assist-extension9",
+    .name = "messageSecurityAssistExtension9",
     .llvm_name = "message-security-assist-extension9",
     .description = "Assume that the message-security-assist extension facility 9 is installed",
     .dependencies = &[_]*const Feature {
@@ -186,7 +186,7 @@ pub const feature_messageSecurityAssistExtension9 = Feature{
 };
 
 pub const feature_miscellaneousExtensions = Feature{
-    .name = "miscellaneous-extensions",
+    .name = "miscellaneousExtensions",
     .llvm_name = "miscellaneous-extensions",
     .description = "Assume that the miscellaneous-extensions facility is installed",
     .dependencies = &[_]*const Feature {
@@ -194,7 +194,7 @@ pub const feature_miscellaneousExtensions = Feature{
 };
 
 pub const feature_miscellaneousExtensions2 = Feature{
-    .name = "miscellaneous-extensions-2",
+    .name = "miscellaneousExtensions2",
     .llvm_name = "miscellaneous-extensions-2",
     .description = "Assume that the miscellaneous-extensions facility 2 is installed",
     .dependencies = &[_]*const Feature {
@@ -202,7 +202,7 @@ pub const feature_miscellaneousExtensions2 = Feature{
 };
 
 pub const feature_miscellaneousExtensions3 = Feature{
-    .name = "miscellaneous-extensions-3",
+    .name = "miscellaneousExtensions3",
     .llvm_name = "miscellaneous-extensions-3",
     .description = "Assume that the miscellaneous-extensions facility 3 is installed",
     .dependencies = &[_]*const Feature {
@@ -210,7 +210,7 @@ pub const feature_miscellaneousExtensions3 = Feature{
 };
 
 pub const feature_populationCount = Feature{
-    .name = "population-count",
+    .name = "populationCount",
     .llvm_name = "population-count",
     .description = "Assume that the population-count facility is installed",
     .dependencies = &[_]*const Feature {
@@ -218,7 +218,7 @@ pub const feature_populationCount = Feature{
 };
 
 pub const feature_processorAssist = Feature{
-    .name = "processor-assist",
+    .name = "processorAssist",
     .llvm_name = "processor-assist",
     .description = "Assume that the processor-assist facility is installed",
     .dependencies = &[_]*const Feature {
@@ -226,7 +226,7 @@ pub const feature_processorAssist = Feature{
 };
 
 pub const feature_resetReferenceBitsMultiple = Feature{
-    .name = "reset-reference-bits-multiple",
+    .name = "resetReferenceBitsMultiple",
     .llvm_name = "reset-reference-bits-multiple",
     .description = "Assume that the reset-reference-bits-multiple facility is installed",
     .dependencies = &[_]*const Feature {
@@ -234,7 +234,7 @@ pub const feature_resetReferenceBitsMultiple = Feature{
 };
 
 pub const feature_transactionalExecution = Feature{
-    .name = "transactional-execution",
+    .name = "transactionalExecution",
     .llvm_name = "transactional-execution",
     .description = "Assume that the transactional-execution facility is installed",
     .dependencies = &[_]*const Feature {
@@ -250,7 +250,7 @@ pub const feature_vector = Feature{
 };
 
 pub const feature_vectorEnhancements1 = Feature{
-    .name = "vector-enhancements-1",
+    .name = "vectorEnhancements1",
     .llvm_name = "vector-enhancements-1",
     .description = "Assume that the vector enhancements facility 1 is installed",
     .dependencies = &[_]*const Feature {
@@ -258,7 +258,7 @@ pub const feature_vectorEnhancements1 = Feature{
 };
 
 pub const feature_vectorEnhancements2 = Feature{
-    .name = "vector-enhancements-2",
+    .name = "vectorEnhancements2",
     .llvm_name = "vector-enhancements-2",
     .description = "Assume that the vector enhancements facility 2 is installed",
     .dependencies = &[_]*const Feature {
@@ -266,7 +266,7 @@ pub const feature_vectorEnhancements2 = Feature{
 };
 
 pub const feature_vectorPackedDecimal = Feature{
-    .name = "vector-packed-decimal",
+    .name = "vectorPackedDecimal",
     .llvm_name = "vector-packed-decimal",
     .description = "Assume that the vector packed decimal facility is installed",
     .dependencies = &[_]*const Feature {
@@ -274,7 +274,7 @@ pub const feature_vectorPackedDecimal = Feature{
 };
 
 pub const feature_vectorPackedDecimalEnhancement = Feature{
-    .name = "vector-packed-decimal-enhancement",
+    .name = "vectorPackedDecimalEnhancement",
     .llvm_name = "vector-packed-decimal-enhancement",
     .description = "Assume that the vector packed decimal enhancement facility is installed",
     .dependencies = &[_]*const Feature {
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index ae3bfe913800c2dc6beb10b4306c4dd9f556a3f5..61df1820b5d55d4a0c099d996febf759b82ca75e 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -10,7 +10,7 @@ pub const feature_atomics = Feature{
 };
 
 pub const feature_bulkMemory = Feature{
-    .name = "bulk-memory",
+    .name = "bulkMemory",
     .llvm_name = "bulk-memory",
     .description = "Enable bulk memory operations",
     .dependencies = &[_]*const Feature {
@@ -18,7 +18,7 @@ pub const feature_bulkMemory = Feature{
 };
 
 pub const feature_exceptionHandling = Feature{
-    .name = "exception-handling",
+    .name = "exceptionHandling",
     .llvm_name = "exception-handling",
     .description = "Enable Wasm exception handling",
     .dependencies = &[_]*const Feature {
@@ -34,7 +34,7 @@ pub const feature_multivalue = Feature{
 };
 
 pub const feature_mutableGlobals = Feature{
-    .name = "mutable-globals",
+    .name = "mutableGlobals",
     .llvm_name = "mutable-globals",
     .description = "Enable mutable globals",
     .dependencies = &[_]*const Feature {
@@ -42,7 +42,7 @@ pub const feature_mutableGlobals = Feature{
 };
 
 pub const feature_nontrappingFptoint = Feature{
-    .name = "nontrapping-fptoint",
+    .name = "nontrappingFptoint",
     .llvm_name = "nontrapping-fptoint",
     .description = "Enable non-trapping float-to-int conversion operators",
     .dependencies = &[_]*const Feature {
@@ -58,7 +58,7 @@ pub const feature_simd128 = Feature{
 };
 
 pub const feature_signExt = Feature{
-    .name = "sign-ext",
+    .name = "signExt",
     .llvm_name = "sign-ext",
     .description = "Enable sign extension operators",
     .dependencies = &[_]*const Feature {
@@ -66,7 +66,7 @@ pub const feature_signExt = Feature{
 };
 
 pub const feature_tailCall = Feature{
-    .name = "tail-call",
+    .name = "tailCall",
     .llvm_name = "tail-call",
     .description = "Enable tail call instructions",
     .dependencies = &[_]*const Feature {
@@ -74,7 +74,7 @@ pub const feature_tailCall = Feature{
 };
 
 pub const feature_unimplementedSimd128 = Feature{
-    .name = "unimplemented-simd128",
+    .name = "unimplementedSimd128",
     .llvm_name = "unimplemented-simd128",
     .description = "Enable 128-bit SIMD not yet implemented in engines",
     .dependencies = &[_]*const Feature {
@@ -96,7 +96,7 @@ pub const features = &[_]*const Feature {
 };
 
 pub const cpu_bleedingEdge = Cpu{
-    .name = "bleeding-edge",
+    .name = "bleedingEdge",
     .llvm_name = "bleeding-edge",
     .dependencies = &[_]*const Feature {
         &feature_atomics,
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 29062173ab2e2cb4158d450ae780e43c9e15afca..f7469ba47fee4fba216ac64112c5b6e4559c9192 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -2,7 +2,7 @@ const Feature = @import("std").target.Feature;
 const Cpu = @import("std").target.Cpu;
 
 pub const feature_dnow3 = Feature{
-    .name = "3dnow",
+    .name = "dnow3",
     .llvm_name = "3dnow",
     .description = "Enable 3DNow! instructions",
     .dependencies = &[_]*const Feature {
@@ -11,7 +11,7 @@ pub const feature_dnow3 = Feature{
 };
 
 pub const feature_dnowa3 = Feature{
-    .name = "3dnowa",
+    .name = "dnowa3",
     .llvm_name = "3dnowa",
     .description = "Enable 3DNow! Athlon instructions",
     .dependencies = &[_]*const Feature {
@@ -20,7 +20,7 @@ pub const feature_dnowa3 = Feature{
 };
 
 pub const feature_bit64 = Feature{
-    .name = "64bit",
+    .name = "bit64",
     .llvm_name = "64bit",
     .description = "Support 64-bit instructions",
     .dependencies = &[_]*const Feature {
@@ -274,7 +274,7 @@ pub const feature_fxsr = Feature{
 };
 
 pub const feature_fast11bytenop = Feature{
-    .name = "fast-11bytenop",
+    .name = "fast11bytenop",
     .llvm_name = "fast-11bytenop",
     .description = "Target can quickly decode up to 11 byte NOPs",
     .dependencies = &[_]*const Feature {
@@ -282,7 +282,7 @@ pub const feature_fast11bytenop = Feature{
 };
 
 pub const feature_fast15bytenop = Feature{
-    .name = "fast-15bytenop",
+    .name = "fast15bytenop",
     .llvm_name = "fast-15bytenop",
     .description = "Target can quickly decode up to 15 byte NOPs",
     .dependencies = &[_]*const Feature {
@@ -290,7 +290,7 @@ pub const feature_fast15bytenop = Feature{
 };
 
 pub const feature_fastBextr = Feature{
-    .name = "fast-bextr",
+    .name = "fastBextr",
     .llvm_name = "fast-bextr",
     .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
     .dependencies = &[_]*const Feature {
@@ -298,7 +298,7 @@ pub const feature_fastBextr = Feature{
 };
 
 pub const feature_fastHops = Feature{
-    .name = "fast-hops",
+    .name = "fastHops",
     .llvm_name = "fast-hops",
     .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
     .dependencies = &[_]*const Feature {
@@ -307,7 +307,7 @@ pub const feature_fastHops = Feature{
 };
 
 pub const feature_fastLzcnt = Feature{
-    .name = "fast-lzcnt",
+    .name = "fastLzcnt",
     .llvm_name = "fast-lzcnt",
     .description = "LZCNT instructions are as fast as most simple integer ops",
     .dependencies = &[_]*const Feature {
@@ -315,7 +315,7 @@ pub const feature_fastLzcnt = Feature{
 };
 
 pub const feature_fastPartialYmmOrZmmWrite = Feature{
-    .name = "fast-partial-ymm-or-zmm-write",
+    .name = "fastPartialYmmOrZmmWrite",
     .llvm_name = "fast-partial-ymm-or-zmm-write",
     .description = "Partial writes to YMM/ZMM registers are fast",
     .dependencies = &[_]*const Feature {
@@ -323,7 +323,7 @@ pub const feature_fastPartialYmmOrZmmWrite = Feature{
 };
 
 pub const feature_fastShldRotate = Feature{
-    .name = "fast-shld-rotate",
+    .name = "fastShldRotate",
     .llvm_name = "fast-shld-rotate",
     .description = "SHLD can be used as a faster rotate",
     .dependencies = &[_]*const Feature {
@@ -331,7 +331,7 @@ pub const feature_fastShldRotate = Feature{
 };
 
 pub const feature_fastScalarFsqrt = Feature{
-    .name = "fast-scalar-fsqrt",
+    .name = "fastScalarFsqrt",
     .llvm_name = "fast-scalar-fsqrt",
     .description = "Scalar SQRT is fast (disable Newton-Raphson)",
     .dependencies = &[_]*const Feature {
@@ -339,7 +339,7 @@ pub const feature_fastScalarFsqrt = Feature{
 };
 
 pub const feature_fastScalarShiftMasks = Feature{
-    .name = "fast-scalar-shift-masks",
+    .name = "fastScalarShiftMasks",
     .llvm_name = "fast-scalar-shift-masks",
     .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
     .dependencies = &[_]*const Feature {
@@ -347,7 +347,7 @@ pub const feature_fastScalarShiftMasks = Feature{
 };
 
 pub const feature_fastVariableShuffle = Feature{
-    .name = "fast-variable-shuffle",
+    .name = "fastVariableShuffle",
     .llvm_name = "fast-variable-shuffle",
     .description = "Shuffles with variable masks are fast",
     .dependencies = &[_]*const Feature {
@@ -355,7 +355,7 @@ pub const feature_fastVariableShuffle = Feature{
 };
 
 pub const feature_fastVectorFsqrt = Feature{
-    .name = "fast-vector-fsqrt",
+    .name = "fastVectorFsqrt",
     .llvm_name = "fast-vector-fsqrt",
     .description = "Vector SQRT is fast (disable Newton-Raphson)",
     .dependencies = &[_]*const Feature {
@@ -363,7 +363,7 @@ pub const feature_fastVectorFsqrt = Feature{
 };
 
 pub const feature_fastVectorShiftMasks = Feature{
-    .name = "fast-vector-shift-masks",
+    .name = "fastVectorShiftMasks",
     .llvm_name = "fast-vector-shift-masks",
     .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
     .dependencies = &[_]*const Feature {
@@ -380,7 +380,7 @@ pub const feature_gfni = Feature{
 };
 
 pub const feature_fastGather = Feature{
-    .name = "fast-gather",
+    .name = "fastGather",
     .llvm_name = "fast-gather",
     .description = "Indicates if gather is reasonably fast",
     .dependencies = &[_]*const Feature {
@@ -413,7 +413,7 @@ pub const feature_sahf = Feature{
 };
 
 pub const feature_leaSp = Feature{
-    .name = "lea-sp",
+    .name = "leaSp",
     .llvm_name = "lea-sp",
     .description = "Use LEA for adjusting the stack pointer",
     .dependencies = &[_]*const Feature {
@@ -421,7 +421,7 @@ pub const feature_leaSp = Feature{
 };
 
 pub const feature_leaUsesAg = Feature{
-    .name = "lea-uses-ag",
+    .name = "leaUsesAg",
     .llvm_name = "lea-uses-ag",
     .description = "LEA instruction needs inputs at AG stage",
     .dependencies = &[_]*const Feature {
@@ -445,7 +445,7 @@ pub const feature_lzcnt = Feature{
 };
 
 pub const feature_falseDepsLzcntTzcnt = Feature{
-    .name = "false-deps-lzcnt-tzcnt",
+    .name = "falseDepsLzcntTzcnt",
     .llvm_name = "false-deps-lzcnt-tzcnt",
     .description = "LZCNT/TZCNT have a false dependency on dest register",
     .dependencies = &[_]*const Feature {
@@ -501,7 +501,7 @@ pub const feature_macrofusion = Feature{
 };
 
 pub const feature_mergeToThreewayBranch = Feature{
-    .name = "merge-to-threeway-branch",
+    .name = "mergeToThreewayBranch",
     .llvm_name = "merge-to-threeway-branch",
     .description = "Merge branches to a three-way conditional branch",
     .dependencies = &[_]*const Feature {
@@ -559,7 +559,7 @@ pub const feature_popcnt = Feature{
 };
 
 pub const feature_falseDepsPopcnt = Feature{
-    .name = "false-deps-popcnt",
+    .name = "falseDepsPopcnt",
     .llvm_name = "false-deps-popcnt",
     .description = "POPCNT has a false dependency on dest register",
     .dependencies = &[_]*const Feature {
@@ -591,7 +591,7 @@ pub const feature_ptwrite = Feature{
 };
 
 pub const feature_padShortFunctions = Feature{
-    .name = "pad-short-functions",
+    .name = "padShortFunctions",
     .llvm_name = "pad-short-functions",
     .description = "Pad short functions",
     .dependencies = &[_]*const Feature {
@@ -599,7 +599,7 @@ pub const feature_padShortFunctions = Feature{
 };
 
 pub const feature_prefer128Bit = Feature{
-    .name = "prefer-128-bit",
+    .name = "prefer128Bit",
     .llvm_name = "prefer-128-bit",
     .description = "Prefer 128-bit AVX instructions",
     .dependencies = &[_]*const Feature {
@@ -607,7 +607,7 @@ pub const feature_prefer128Bit = Feature{
 };
 
 pub const feature_prefer256Bit = Feature{
-    .name = "prefer-256-bit",
+    .name = "prefer256Bit",
     .llvm_name = "prefer-256-bit",
     .description = "Prefer 256-bit AVX instructions",
     .dependencies = &[_]*const Feature {
@@ -657,7 +657,7 @@ pub const feature_retpoline = Feature{
 };
 
 pub const feature_retpolineExternalThunk = Feature{
-    .name = "retpoline-external-thunk",
+    .name = "retpolineExternalThunk",
     .llvm_name = "retpoline-external-thunk",
     .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
     .dependencies = &[_]*const Feature {
@@ -666,7 +666,7 @@ pub const feature_retpolineExternalThunk = Feature{
 };
 
 pub const feature_retpolineIndirectBranches = Feature{
-    .name = "retpoline-indirect-branches",
+    .name = "retpolineIndirectBranches",
     .llvm_name = "retpoline-indirect-branches",
     .description = "Remove speculation of indirect branches from the generated code",
     .dependencies = &[_]*const Feature {
@@ -674,7 +674,7 @@ pub const feature_retpolineIndirectBranches = Feature{
 };
 
 pub const feature_retpolineIndirectCalls = Feature{
-    .name = "retpoline-indirect-calls",
+    .name = "retpolineIndirectCalls",
     .llvm_name = "retpoline-indirect-calls",
     .description = "Remove speculation of indirect calls from the generated code",
     .dependencies = &[_]*const Feature {
@@ -742,7 +742,7 @@ pub const feature_sse4a = Feature{
 };
 
 pub const feature_sse41 = Feature{
-    .name = "sse4.1",
+    .name = "sse41",
     .llvm_name = "sse4.1",
     .description = "Enable SSE 4.1 instructions",
     .dependencies = &[_]*const Feature {
@@ -751,7 +751,7 @@ pub const feature_sse41 = Feature{
 };
 
 pub const feature_sse42 = Feature{
-    .name = "sse4.2",
+    .name = "sse42",
     .llvm_name = "sse4.2",
     .description = "Enable SSE 4.2 instructions",
     .dependencies = &[_]*const Feature {
@@ -760,7 +760,7 @@ pub const feature_sse42 = Feature{
 };
 
 pub const feature_sseUnalignedMem = Feature{
-    .name = "sse-unaligned-mem",
+    .name = "sseUnalignedMem",
     .llvm_name = "sse-unaligned-mem",
     .description = "Allow unaligned memory operands with SSE instructions",
     .dependencies = &[_]*const Feature {
@@ -777,7 +777,7 @@ pub const feature_ssse3 = Feature{
 };
 
 pub const feature_slow3opsLea = Feature{
-    .name = "slow-3ops-lea",
+    .name = "slow3opsLea",
     .llvm_name = "slow-3ops-lea",
     .description = "LEA instruction with 3 ops or certain registers is slow",
     .dependencies = &[_]*const Feature {
@@ -785,7 +785,7 @@ pub const feature_slow3opsLea = Feature{
 };
 
 pub const feature_idivlToDivb = Feature{
-    .name = "idivl-to-divb",
+    .name = "idivlToDivb",
     .llvm_name = "idivl-to-divb",
     .description = "Use 8-bit divide for positive values less than 256",
     .dependencies = &[_]*const Feature {
@@ -793,7 +793,7 @@ pub const feature_idivlToDivb = Feature{
 };
 
 pub const feature_idivqToDivl = Feature{
-    .name = "idivq-to-divl",
+    .name = "idivqToDivl",
     .llvm_name = "idivq-to-divl",
     .description = "Use 32-bit divide for positive values less than 2^32",
     .dependencies = &[_]*const Feature {
@@ -801,7 +801,7 @@ pub const feature_idivqToDivl = Feature{
 };
 
 pub const feature_slowIncdec = Feature{
-    .name = "slow-incdec",
+    .name = "slowIncdec",
     .llvm_name = "slow-incdec",
     .description = "INC and DEC instructions are slower than ADD and SUB",
     .dependencies = &[_]*const Feature {
@@ -809,7 +809,7 @@ pub const feature_slowIncdec = Feature{
 };
 
 pub const feature_slowLea = Feature{
-    .name = "slow-lea",
+    .name = "slowLea",
     .llvm_name = "slow-lea",
     .description = "LEA instruction with certain arguments is slow",
     .dependencies = &[_]*const Feature {
@@ -817,7 +817,7 @@ pub const feature_slowLea = Feature{
 };
 
 pub const feature_slowPmaddwd = Feature{
-    .name = "slow-pmaddwd",
+    .name = "slowPmaddwd",
     .llvm_name = "slow-pmaddwd",
     .description = "PMADDWD is slower than PMULLD",
     .dependencies = &[_]*const Feature {
@@ -825,7 +825,7 @@ pub const feature_slowPmaddwd = Feature{
 };
 
 pub const feature_slowPmulld = Feature{
-    .name = "slow-pmulld",
+    .name = "slowPmulld",
     .llvm_name = "slow-pmulld",
     .description = "PMULLD instruction is slow",
     .dependencies = &[_]*const Feature {
@@ -833,7 +833,7 @@ pub const feature_slowPmulld = Feature{
 };
 
 pub const feature_slowShld = Feature{
-    .name = "slow-shld",
+    .name = "slowShld",
     .llvm_name = "slow-shld",
     .description = "SHLD instruction is slow",
     .dependencies = &[_]*const Feature {
@@ -841,7 +841,7 @@ pub const feature_slowShld = Feature{
 };
 
 pub const feature_slowTwoMemOps = Feature{
-    .name = "slow-two-mem-ops",
+    .name = "slowTwoMemOps",
     .llvm_name = "slow-two-mem-ops",
     .description = "Two memory operand instructions are slow",
     .dependencies = &[_]*const Feature {
@@ -849,7 +849,7 @@ pub const feature_slowTwoMemOps = Feature{
 };
 
 pub const feature_slowUnalignedMem16 = Feature{
-    .name = "slow-unaligned-mem-16",
+    .name = "slowUnalignedMem16",
     .llvm_name = "slow-unaligned-mem-16",
     .description = "Slow unaligned 16-byte memory access",
     .dependencies = &[_]*const Feature {
@@ -857,7 +857,7 @@ pub const feature_slowUnalignedMem16 = Feature{
 };
 
 pub const feature_slowUnalignedMem32 = Feature{
-    .name = "slow-unaligned-mem-32",
+    .name = "slowUnalignedMem32",
     .llvm_name = "slow-unaligned-mem-32",
     .description = "Slow unaligned 32-byte memory access",
     .dependencies = &[_]*const Feature {
@@ -865,7 +865,7 @@ pub const feature_slowUnalignedMem32 = Feature{
 };
 
 pub const feature_softFloat = Feature{
-    .name = "soft-float",
+    .name = "softFloat",
     .llvm_name = "soft-float",
     .description = "Use software floating point features",
     .dependencies = &[_]*const Feature {
@@ -881,7 +881,7 @@ pub const feature_tbm = Feature{
 };
 
 pub const feature_useAa = Feature{
-    .name = "use-aa",
+    .name = "useAa",
     .llvm_name = "use-aa",
     .description = "Use alias analysis during codegen",
     .dependencies = &[_]*const Feature {
@@ -1026,7 +1026,7 @@ pub const feature_xsaves = Feature{
 };
 
 pub const feature_bitMode16 = Feature{
-    .name = "16bit-mode",
+    .name = "bitMode16",
     .llvm_name = "16bit-mode",
     .description = "16-bit mode (i8086)",
     .dependencies = &[_]*const Feature {
@@ -1034,7 +1034,7 @@ pub const feature_bitMode16 = Feature{
 };
 
 pub const feature_bitMode32 = Feature{
-    .name = "32bit-mode",
+    .name = "bitMode32",
     .llvm_name = "32bit-mode",
     .description = "32-bit mode (80386)",
     .dependencies = &[_]*const Feature {
@@ -1042,7 +1042,7 @@ pub const feature_bitMode32 = Feature{
 };
 
 pub const feature_bitMode64 = Feature{
-    .name = "64bit-mode",
+    .name = "bitMode64",
     .llvm_name = "64bit-mode",
     .description = "64-bit mode (x86_64)",
     .dependencies = &[_]*const Feature {
@@ -1217,7 +1217,7 @@ pub const cpu_athlon = Cpu{
 };
 
 pub const cpu_athlon4 = Cpu{
-    .name = "athlon-4",
+    .name = "athlon4",
     .llvm_name = "athlon-4",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1234,7 +1234,7 @@ pub const cpu_athlon4 = Cpu{
 };
 
 pub const cpu_athlonFx = Cpu{
-    .name = "athlon-fx",
+    .name = "athlonFx",
     .llvm_name = "athlon-fx",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1254,7 +1254,7 @@ pub const cpu_athlonFx = Cpu{
 };
 
 pub const cpu_athlonMp = Cpu{
-    .name = "athlon-mp",
+    .name = "athlonMp",
     .llvm_name = "athlon-mp",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1271,7 +1271,7 @@ pub const cpu_athlonMp = Cpu{
 };
 
 pub const cpu_athlonTbird = Cpu{
-    .name = "athlon-tbird",
+    .name = "athlonTbird",
     .llvm_name = "athlon-tbird",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1286,7 +1286,7 @@ pub const cpu_athlonTbird = Cpu{
 };
 
 pub const cpu_athlonXp = Cpu{
-    .name = "athlon-xp",
+    .name = "athlonXp",
     .llvm_name = "athlon-xp",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1323,7 +1323,7 @@ pub const cpu_athlon64 = Cpu{
 };
 
 pub const cpu_athlon64Sse3 = Cpu{
-    .name = "athlon64-sse3",
+    .name = "athlon64Sse3",
     .llvm_name = "athlon64-sse3",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -1678,7 +1678,7 @@ pub const cpu_c3 = Cpu{
 };
 
 pub const cpu_c32 = Cpu{
-    .name = "c3-2",
+    .name = "c32",
     .llvm_name = "c3-2",
     .dependencies = &[_]*const Feature {
         &feature_cmov,
@@ -1874,7 +1874,7 @@ pub const cpu_cooperlake = Cpu{
 };
 
 pub const cpu_coreAvxI = Cpu{
-    .name = "core-avx-i",
+    .name = "coreAvxI",
     .llvm_name = "core-avx-i",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -1908,7 +1908,7 @@ pub const cpu_coreAvxI = Cpu{
 };
 
 pub const cpu_coreAvx2 = Cpu{
-    .name = "core-avx2",
+    .name = "coreAvx2",
     .llvm_name = "core-avx2",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -1991,7 +1991,7 @@ pub const cpu_corei7 = Cpu{
 };
 
 pub const cpu_corei7Avx = Cpu{
-    .name = "corei7-avx",
+    .name = "corei7Avx",
     .llvm_name = "corei7-avx",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -2081,7 +2081,7 @@ pub const cpu_goldmont = Cpu{
 };
 
 pub const cpu_goldmontPlus = Cpu{
-    .name = "goldmont-plus",
+    .name = "goldmontPlus",
     .llvm_name = "goldmont-plus",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -2202,7 +2202,7 @@ pub const cpu_i686 = Cpu{
 };
 
 pub const cpu_icelakeClient = Cpu{
-    .name = "icelake-client",
+    .name = "icelakeClient",
     .llvm_name = "icelake-client",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -2272,7 +2272,7 @@ pub const cpu_icelakeClient = Cpu{
 };
 
 pub const cpu_icelakeServer = Cpu{
-    .name = "icelake-server",
+    .name = "icelakeServer",
     .llvm_name = "icelake-server",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -2389,7 +2389,7 @@ pub const cpu_k6 = Cpu{
 };
 
 pub const cpu_k62 = Cpu{
-    .name = "k6-2",
+    .name = "k62",
     .llvm_name = "k6-2",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -2401,7 +2401,7 @@ pub const cpu_k62 = Cpu{
 };
 
 pub const cpu_k63 = Cpu{
-    .name = "k6-3",
+    .name = "k63",
     .llvm_name = "k6-3",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -2433,7 +2433,7 @@ pub const cpu_k8 = Cpu{
 };
 
 pub const cpu_k8Sse3 = Cpu{
-    .name = "k8-sse3",
+    .name = "k8Sse3",
     .llvm_name = "k8-sse3",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -2610,7 +2610,7 @@ pub const cpu_opteron = Cpu{
 };
 
 pub const cpu_opteronSse3 = Cpu{
-    .name = "opteron-sse3",
+    .name = "opteronSse3",
     .llvm_name = "opteron-sse3",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -2661,7 +2661,7 @@ pub const cpu_pentium = Cpu{
 };
 
 pub const cpu_pentiumM = Cpu{
-    .name = "pentium-m",
+    .name = "pentiumM",
     .llvm_name = "pentium-m",
     .dependencies = &[_]*const Feature {
         &feature_cmov,
@@ -2677,7 +2677,7 @@ pub const cpu_pentiumM = Cpu{
 };
 
 pub const cpu_pentiumMmx = Cpu{
-    .name = "pentium-mmx",
+    .name = "pentiumMmx",
     .llvm_name = "pentium-mmx",
     .dependencies = &[_]*const Feature {
         &feature_cx8,
@@ -2964,7 +2964,7 @@ pub const cpu_skylake = Cpu{
 };
 
 pub const cpu_skylakeAvx512 = Cpu{
-    .name = "skylake-avx512",
+    .name = "skylakeAvx512",
     .llvm_name = "skylake-avx512",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
@@ -3192,7 +3192,7 @@ pub const cpu_westmere = Cpu{
 };
 
 pub const cpu_winchipC6 = Cpu{
-    .name = "winchip-c6",
+    .name = "winchipC6",
     .llvm_name = "winchip-c6",
     .dependencies = &[_]*const Feature {
         &feature_mmx,
@@ -3213,7 +3213,7 @@ pub const cpu_winchip2 = Cpu{
 };
 
 pub const cpu_x8664 = Cpu{
-    .name = "x86-64",
+    .name = "x8664",
     .llvm_name = "x86-64",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 4fdfb05df814b5ffdcf8cb57021d24fe7abe3c32..55313d16b285e0e7a74177744a7d5a877b722429 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -623,6 +623,8 @@ const Stage2TargetDetails = struct {
     
     llvm_cpu_str: [:0]const u8,
     llvm_features_str: [:0]const u8,
+
+    builtin_str: [:0]const u8,
 };
 
 // ABI warning
@@ -662,6 +664,16 @@ fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDeta
         if (std.mem.eql(u8, str, cpu.name)) {
             const allocator = std.heap.c_allocator;
 
+            var builtin_str_buffer = try std.Buffer.init(
+                allocator,
+                "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target.");
+            defer builtin_str_buffer.deinit();
+
+            try builtin_str_buffer.append(@tagName(arch));
+            try builtin_str_buffer.append(".cpu_");
+            try builtin_str_buffer.append(cpu.name);
+            try builtin_str_buffer.append("};");
+
             const ptr = try allocator.create(Stage2TargetDetails);
             ptr.* = .{
                 .allocator = allocator,
@@ -670,6 +682,7 @@ fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDeta
                 },
                 .llvm_cpu_str = cpu.name,
                 .llvm_features_str = "",
+                .builtin_str = builtin_str_buffer.toOwnedSlice(),
             };
 
             return ptr;
@@ -687,6 +700,11 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe
     var features = std.ArrayList(*const std.target.Feature).init(allocator);
     defer features.deinit();
 
+    var builtin_str_buffer = try std.Buffer.init(
+        allocator, 
+        "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n");
+    defer builtin_str_buffer.deinit();
+
     var start: usize = 0;
     while (start < str.len) {
         const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start;
@@ -706,10 +724,18 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe
 
         if (feature) |f| {
             features.append(f) catch @panic("out of memory");
+
+            try builtin_str_buffer.append("&@import(\"std\").target.");
+            try builtin_str_buffer.append(@tagName(arch));
+            try builtin_str_buffer.append(".feature_");
+            try builtin_str_buffer.append(f.name);
+            try builtin_str_buffer.append(",");
         } else {
             return error.InvalidFeature;
         }
     }
+
+    try builtin_str_buffer.append("}};");
     
     const features_slice = features.toOwnedSlice();
 
@@ -730,6 +756,7 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe
         },
         .llvm_cpu_str = "",
         .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+        .builtin_str = builtin_str_buffer.toOwnedSlice(),
     };
 
     return ptr;
@@ -764,3 +791,12 @@ export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2
 
     return @as([*:0]const u8, "");
 }
+
+// ABI warning
+export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
+    if (target_details) |td| {
+        return @as([*:0]const u8, td.builtin_str);
+    }
+
+    return @as([*:0]const u8, "");
+}
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 760284a2e27b0fe4a288a24cf8d58542a7b0f863..4aa71f32c796665940164d82f9ad5a4d1e541e21 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8607,6 +8607,14 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
             "pub var test_functions: []TestFn = undefined; // overwritten later\n"
         );
     }
+    
+    buf_appendf(contents, "pub const target_details: ?@import(\"std\").target.TargetDetails = ");
+    if (g->target_details) {
+        buf_appendf(contents, "%s", stage2_target_details_get_builtin_str(g->target_details));
+    } else {
+        buf_appendf(contents, "null;");
+    }
+    buf_appendf(contents, "\n");
 
     return contents;
 }
diff --git a/src/main.cpp b/src/main.cpp
index da8b354796ad445744346d12c6a8fc8ecf25532e..f40f62a653736c9ec03297d06176d04ded487c1f 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1074,6 +1074,24 @@ int main(int argc, char **argv) {
         }
     }
 
+    Stage2TargetDetails *target_details = nullptr;
+    if (cpu && features) {
+        fprintf(stderr, "--cpu and --features options not allowed together\n");
+        return main_exit(root_progress_node, EXIT_FAILURE);
+    } else if (cpu) {
+        target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu);
+        if (!target_details) {
+            fprintf(stderr, "invalid --cpu value\n");
+            return main_exit(root_progress_node, EXIT_FAILURE);
+        }
+    } else if (features) {
+        target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features);
+        if (!target_details) {
+            fprintf(stderr, "invalid --features value\n");
+            return main_exit(root_progress_node, EXIT_FAILURE);
+        }
+    }
+
     if (output_dir != nullptr && enable_cache == CacheOptOn) {
         fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");
         return print_error_usage(arg0);
@@ -1124,6 +1142,7 @@ int main(int argc, char **argv) {
         g->want_stack_check = want_stack_check;
         g->want_sanitize_c = want_sanitize_c;
         g->want_single_threaded = want_single_threaded;
+        g->target_details = target_details;
         Buf *builtin_source = codegen_generate_builtin_source(g);
         if (fwrite(buf_ptr(builtin_source), 1, buf_len(builtin_source), stdout) != buf_len(builtin_source)) {
             fprintf(stderr, "unable to write to stdout: %s\n", strerror(ferror(stdout)));
@@ -1278,24 +1297,6 @@ int main(int argc, char **argv) {
                 codegen_add_rpath(g, rpath_list.at(i));
             }
 
-            Stage2TargetDetails *target_details = nullptr;
-            if (cpu && features) {
-                fprintf(stderr, "--cpu and --features options not allowed together\n");
-                return main_exit(root_progress_node, EXIT_FAILURE);
-            } else if (cpu) {
-                target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu);
-                if (!target_details) {
-                    fprintf(stderr, "invalid --cpu value\n");
-                    return main_exit(root_progress_node, EXIT_FAILURE);
-                }
-            } else if (features) {
-                target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features);
-                if (!target_details) {
-                    fprintf(stderr, "invalid --features value\n");
-                    return main_exit(root_progress_node, EXIT_FAILURE);
-                }
-            }
-
             g->target_details = target_details;
 
             codegen_set_rdynamic(g, rdynamic);
diff --git a/src/userland.cpp b/src/userland.cpp
index 468017cb51a63b335558884dffdbc4b226d3c576..9481a3f0b3b2dee192cb1235bd66b19d31a80c6a 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -106,3 +106,6 @@ const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target
 const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) {
     return "";
 }
+const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) {
+    return "";
+}
diff --git a/src/userland.h b/src/userland.h
index 11801e10388a5071f593c17d68ed974bdc6e6c4f..0315ac11170c31368e455a3abec44b73da47ab06 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -198,4 +198,7 @@ ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDe
 // ABI warning
 ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details);
 
+// ABI warning
+ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details);
+
 #endif
-- 
2.54.0


From fd17a9962b07147a5b20487ab8e4d9bc0aa946cd Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 8 Jan 2020 22:29:12 -0500
Subject: [PATCH 048/116] Add defaut feature support

---
 src-self-hosted/stage1.zig | 177 ++++++++++++++++++++++++++-----------
 src/codegen.cpp            |  21 +----
 src/main.cpp               |   6 ++
 src/userland.cpp           |   3 +
 src/userland.h             |   3 +
 5 files changed, 141 insertions(+), 69 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 55313d16b285e0e7a74177744a7d5a877b722429..a1c1a2a5d3a716cb11d9ec16258e37338d9038cc 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -625,6 +625,63 @@ const Stage2TargetDetails = struct {
     llvm_features_str: [:0]const u8,
 
     builtin_str: [:0]const u8,
+
+    const Self = @This();
+
+    fn initCpu(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), cpu: *const std.target.Cpu) !Self {
+        var builtin_str_buffer = try std.Buffer.init(
+            allocator,
+            "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target.");
+        defer builtin_str_buffer.deinit();
+
+        try builtin_str_buffer.append(@tagName(arch));
+        try builtin_str_buffer.append(".cpu_");
+        try builtin_str_buffer.append(cpu.name);
+        try builtin_str_buffer.append("};");
+        return Self{
+            .allocator = allocator,
+            .target_details = .{
+                .cpu = cpu,
+            },
+            .llvm_cpu_str = cpu.name,
+            .llvm_features_str = "",
+            .builtin_str = builtin_str_buffer.toOwnedSlice(),
+        };
+    }
+
+    fn initFeatures(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), features: []*const std.target.Feature) !Self {
+        var builtin_str_buffer = try std.Buffer.init(
+            allocator, 
+            "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n");
+        defer builtin_str_buffer.deinit();
+
+        var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
+        defer llvm_features_buffer.deinit();
+
+        for (features) |feature| {
+            try llvm_features_buffer.append("+");
+            try llvm_features_buffer.append(feature.llvm_name);
+            try llvm_features_buffer.append(",");
+            
+            try builtin_str_buffer.append("&@import(\"std\").target.");
+            try builtin_str_buffer.append(@tagName(arch));
+            try builtin_str_buffer.append(".feature_");
+            try builtin_str_buffer.append(feature.name);
+            try builtin_str_buffer.append(",");
+        }
+
+        try builtin_str_buffer.append("}};");
+
+        return Self{
+            .allocator = allocator,
+            .target_details = std.target.TargetDetails{
+                .features = features,
+            },
+            .llvm_cpu_str = "",
+            .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+            .builtin_str = builtin_str_buffer.toOwnedSlice(),
+        };
+    }
 };
 
 // ABI warning
@@ -658,32 +715,14 @@ export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, feature
 }
 
 fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails {
+    const allocator = std.heap.c_allocator;
+
     const cpus = std.target.getCpusForArch(arch);
 
     for (cpus) |cpu| {
         if (std.mem.eql(u8, str, cpu.name)) {
-            const allocator = std.heap.c_allocator;
-
-            var builtin_str_buffer = try std.Buffer.init(
-                allocator,
-                "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target.");
-            defer builtin_str_buffer.deinit();
-
-            try builtin_str_buffer.append(@tagName(arch));
-            try builtin_str_buffer.append(".cpu_");
-            try builtin_str_buffer.append(cpu.name);
-            try builtin_str_buffer.append("};");
-
             const ptr = try allocator.create(Stage2TargetDetails);
-            ptr.* = .{
-                .allocator = allocator,
-                .target_details = .{
-                    .cpu = cpu,
-                },
-                .llvm_cpu_str = cpu.name,
-                .llvm_features_str = "",
-                .builtin_str = builtin_str_buffer.toOwnedSlice(),
-            };
+            ptr.* = try Stage2TargetDetails.initCpu(std.heap.c_allocator, arch, cpu);
 
             return ptr;
         }
@@ -700,11 +739,6 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe
     var features = std.ArrayList(*const std.target.Feature).init(allocator);
     defer features.deinit();
 
-    var builtin_str_buffer = try std.Buffer.init(
-        allocator, 
-        "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n");
-    defer builtin_str_buffer.deinit();
-
     var start: usize = 0;
     while (start < str.len) {
         const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start;
@@ -725,39 +759,15 @@ fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2Targe
         if (feature) |f| {
             features.append(f) catch @panic("out of memory");
 
-            try builtin_str_buffer.append("&@import(\"std\").target.");
-            try builtin_str_buffer.append(@tagName(arch));
-            try builtin_str_buffer.append(".feature_");
-            try builtin_str_buffer.append(f.name);
-            try builtin_str_buffer.append(",");
         } else {
             return error.InvalidFeature;
         }
     }
 
-    try builtin_str_buffer.append("}};");
-    
     const features_slice = features.toOwnedSlice();
 
-    var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
-    defer llvm_features_buffer.deinit();
-
-    for (features_slice) |feature| {
-        try llvm_features_buffer.append("+");
-        try llvm_features_buffer.append(feature.llvm_name);
-        try llvm_features_buffer.append(",");
-    }
-
     const ptr = try allocator.create(Stage2TargetDetails);
-    ptr.* = Stage2TargetDetails{
-        .allocator = allocator,
-        .target_details = std.target.TargetDetails{
-            .features = features_slice,
-        },
-        .llvm_cpu_str = "",
-        .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
-        .builtin_str = builtin_str_buffer.toOwnedSlice(),
-    };
+    ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features_slice);
 
     return ptr;
 }
@@ -800,3 +810,68 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta
 
     return @as([*:0]const u8, "");
 }
+
+const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
+    &std.target.riscv.feature_a,
+    &std.target.riscv.feature_c,
+    &std.target.riscv.feature_d,
+    &std.target.riscv.feature_f,
+    &std.target.riscv.feature_m,
+    &std.target.riscv.feature_relax,
+};
+
+const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
+    &std.target.x86.feature_cmov,
+    &std.target.x86.feature_cx8,
+    &std.target.x86.feature_fxsr,
+    &std.target.x86.feature_mmx,
+    &std.target.x86.feature_nopl,
+    &std.target.x86.feature_sse,
+    &std.target.x86.feature_sse2,
+    &std.target.x86.feature_slowUnalignedMem16,
+    &std.target.x86.feature_x87,
+};
+
+// Same as above but without sse.
+const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature {
+    &std.target.x86.feature_cmov,
+    &std.target.x86.feature_cx8,
+    &std.target.x86.feature_fxsr,
+    &std.target.x86.feature_mmx,
+    &std.target.x86.feature_nopl,
+    &std.target.x86.feature_slowUnalignedMem16,
+    &std.target.x86.feature_x87,
+};
+
+// ABI warning
+export fn stage2_target_details_get_default(arch_str: ?[*:0]const u8, os_str: ?[*:0]const u8) ?*Stage2TargetDetails {
+    if (arch_str == null) return null;
+    if (os_str == null) return null;
+    
+    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null;
+    const os = Target.parseOs(std.mem.toSliceConst(u8, os_str.?)) catch return null;
+
+    return createDefaultTargetDetails(arch, os) catch return null;
+}
+
+fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os) !?*Stage2TargetDetails {
+    const allocator = std.heap.c_allocator;
+
+    return switch (arch) {
+        .riscv32, .riscv64 => blk: {
+            const ptr = try allocator.create(Stage2TargetDetails);
+            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv_default_features);
+            break :blk ptr;
+        },
+        .i386 => blk: {
+            const ptr = try allocator.create(Stage2TargetDetails);
+            const features = switch (os) {
+                .freestanding => i386_default_features_freestanding,
+                else => i386_default_features,
+            };
+            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features);
+            break :blk ptr;
+        },
+        else => null,
+    };
+}
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 4aa71f32c796665940164d82f9ad5a4d1e541e21..d0749c9432e9e90b0a1302728e2945946a5885c2 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8781,8 +8781,9 @@ static void init(CodeGen *g) {
         reloc_mode = LLVMRelocStatic;
     }
 
-    const char *target_specific_cpu_args;
-    const char *target_specific_features;
+    const char *target_specific_cpu_args = "";
+    const char *target_specific_features = "";
+
     if (g->zig_target->is_native) {
         // LLVM creates invalid binaries on Windows sometimes.
         // See https://github.com/ziglang/zig/issues/508
@@ -8794,22 +8795,6 @@ static void init(CodeGen *g) {
             target_specific_cpu_args = ZigLLVMGetHostCPUName();
             target_specific_features = ZigLLVMGetNativeFeatures();
         }
-    } else if (target_is_riscv(g->zig_target)) {
-        // TODO https://github.com/ziglang/zig/issues/2883
-        // Be aware of https://github.com/ziglang/zig/issues/3275
-        target_specific_cpu_args = "";
-        target_specific_features = riscv_default_features;
-    } else if (g->zig_target->arch == ZigLLVM_x86) {
-        // This is because we're really targeting i686 rather than i386.
-        // It's pretty much impossible to use many of the language features
-        // such as fp16 if you stick use the x87 only. This is also what clang
-        // uses as base cpu.
-        // TODO https://github.com/ziglang/zig/issues/2883
-        target_specific_cpu_args = "pentium4";
-        target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": "";
-    } else {
-        target_specific_cpu_args = "";
-        target_specific_features = "";
     }
 
     // Override CPU and features if defined by user.
diff --git a/src/main.cpp b/src/main.cpp
index f40f62a653736c9ec03297d06176d04ded487c1f..441bc2afb0e2e85e31204133a4afa9f7d90467df 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1090,6 +1090,12 @@ int main(int argc, char **argv) {
             fprintf(stderr, "invalid --features value\n");
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
+    } else {
+        // If no details are specified and we are not native, load
+        // cross-compilation default features.
+        if (!target.is_native) {
+            target_details = stage2_target_details_get_default(target_arch_name(target.arch), target_os_name(target.os));
+        }
     }
 
     if (output_dir != nullptr && enable_cache == CacheOptOn) {
diff --git a/src/userland.cpp b/src/userland.cpp
index 9481a3f0b3b2dee192cb1235bd66b19d31a80c6a..0e173d7e76427ece75719341722d5acb2f892fa3 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -109,3 +109,6 @@ const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *t
 const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) {
     return "";
 }
+Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os) {
+    return nullptr;
+}
diff --git a/src/userland.h b/src/userland.h
index 0315ac11170c31368e455a3abec44b73da47ab06..f954efd3fe0db8a4f72843ff6122bccbfb3b1589 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -201,4 +201,7 @@ ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2Tar
 // ABI warning
 ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details);
 
+// ABI warning
+ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os);
+
 #endif
-- 
2.54.0


From ebb6f15bbad7d86c76bd1e8deb39553b5791a69e Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 8 Jan 2020 23:14:25 -0500
Subject: [PATCH 049/116] Make sure llvm strings are null-terminated

---
 src-self-hosted/stage1.zig | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index a1c1a2a5d3a716cb11d9ec16258e37338d9038cc..5d460f1f981f9abc7076f86e9df58ceddccd98d2 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -617,6 +617,15 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
     }
 }
 
+fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 {
+    var buffer = try std.Buffer.init(allocator, str);
+    
+    const len = buffer.len();
+
+    // Don't deinit since we steal all the buffer's memory here.
+    return buffer.list.toOwnedSlice()[0..len :0];
+}
+
 const Stage2TargetDetails = struct {
     allocator: *std.mem.Allocator,
     target_details: std.target.TargetDetails,
@@ -643,8 +652,8 @@ const Stage2TargetDetails = struct {
             .target_details = .{
                 .cpu = cpu,
             },
-            .llvm_cpu_str = cpu.name,
-            .llvm_features_str = "",
+            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name),
+            .llvm_features_str = try toNullTerminatedStringAlloc(allocator, ""),
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
         };
     }
@@ -672,13 +681,16 @@ const Stage2TargetDetails = struct {
 
         try builtin_str_buffer.append("}};");
 
+        // This is needed here because llvm_features_buffer.len() is no longer valid after toOwnedSlice().
+        const llvm_features_buffer_len = llvm_features_buffer.len();
+
         return Self{
             .allocator = allocator,
             .target_details = std.target.TargetDetails{
                 .features = features,
             },
-            .llvm_cpu_str = "",
-            .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, ""),
+            .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0],
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
         };
     }
-- 
2.54.0


From 40ff35948625e47964d2adbc3bdec8bd6a40d2db Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 15 Jan 2020 17:51:06 -0500
Subject: [PATCH 050/116] Only enable requested features

---
 src-self-hosted/stage1.zig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 5d460f1f981f9abc7076f86e9df58ceddccd98d2..1d08616ae28adf2fcbb9e71677c331ec9e216ef5 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -667,6 +667,14 @@ const Stage2TargetDetails = struct {
         var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
         defer llvm_features_buffer.deinit();
 
+        // First, disable all features.
+        // This way, we only get the ones the user requests.
+        for (std.target.getFeaturesForArch(arch)) |feature| {
+            try llvm_features_buffer.append("-");
+            try llvm_features_buffer.append(feature.llvm_name);
+            try llvm_features_buffer.append(",");
+        }
+
         for (features) |feature| {
             try llvm_features_buffer.append("+");
             try llvm_features_buffer.append(feature.llvm_name);
-- 
2.54.0


From a5c93975394af6638e04f6a8a8c4f060bc4887d1 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Wed, 15 Jan 2020 18:12:32 -0500
Subject: [PATCH 051/116] No allocations for n.t. empty strings

---
 src-self-hosted/stage1.zig | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 1d08616ae28adf2fcbb9e71677c331ec9e216ef5..db6d281fea1f8e9b3e6ed581b8660e6aea39180e 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -617,6 +617,8 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
     }
 }
 
+const null_terminated_empty_string = (&[_]u8 { 0 })[0..0 :0];
+
 fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 {
     var buffer = try std.Buffer.init(allocator, str);
     
@@ -653,7 +655,7 @@ const Stage2TargetDetails = struct {
                 .cpu = cpu,
             },
             .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name),
-            .llvm_features_str = try toNullTerminatedStringAlloc(allocator, ""),
+            .llvm_features_str = null_terminated_empty_string,
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
         };
     }
@@ -697,7 +699,7 @@ const Stage2TargetDetails = struct {
             .target_details = std.target.TargetDetails{
                 .features = features,
             },
-            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, ""),
+            .llvm_cpu_str = null_terminated_empty_string,
             .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0],
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
         };
@@ -801,7 +803,7 @@ export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2Targ
         });
     }
 
-    return @as([*:0]const u8, "");
+    return @as([*:0]const u8, null_terminated_empty_string);
 }
 
 // ABI warning
@@ -810,7 +812,7 @@ export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2Targe
         return @as([*:0]const u8, td.llvm_cpu_str);
     }
 
-    return @as([*:0]const u8, "");
+    return @as([*:0]const u8, null_terminated_empty_string);
 }
 
 // ABI warning
@@ -819,7 +821,7 @@ export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2
         return @as([*:0]const u8, td.llvm_features_str);
     }
 
-    return @as([*:0]const u8, "");
+    return @as([*:0]const u8, null_terminated_empty_string);
 }
 
 // ABI warning
@@ -828,7 +830,7 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta
         return @as([*:0]const u8, td.builtin_str);
     }
 
-    return @as([*:0]const u8, "");
+    return @as([*:0]const u8, null_terminated_empty_string);
 }
 
 const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
-- 
2.54.0


From de8a5cf5f54650a5d043c6ad2c41827037f7f75d Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Thu, 16 Jan 2020 14:24:55 -0500
Subject: [PATCH 052/116] Remove features/cpus not in LLVM v9

---
 lib/std/target/aarch64.zig |  514 ++++------
 lib/std/target/amdgpu.zig  |  870 +++++++++--------
 lib/std/target/arm.zig     |  783 ++++++++-------
 lib/std/target/avr.zig     | 1856 ++++++++++++++++++------------------
 lib/std/target/mips.zig    |  137 ++-
 lib/std/target/powerpc.zig |    4 +-
 lib/std/target/riscv.zig   |   11 -
 lib/std/target/systemz.zig |   43 -
 lib/std/target/x86.zig     |  129 +--
 9 files changed, 2017 insertions(+), 2330 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index c3c530fb6fd66839c2b6e443d6fa72a16186cb5a..56101f20e77204d7e5116215fbdd411d8603461a 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -228,15 +228,6 @@ pub const feature_dotprod = Feature{
     },
 };
 
-pub const feature_ete = Feature{
-    .name = "ete",
-    .llvm_name = "ete",
-    .description = "Enable Embedded Trace Extension",
-    .dependencies = &[_]*const Feature {
-        &feature_trbe,
-    },
-};
-
 pub const feature_exynosCheapAsMove = Feature{
     .name = "exynosCheapAsMove",
     .llvm_name = "exynos-cheap-as-move",
@@ -806,8 +797,8 @@ pub const feature_sve2Aes = Feature{
     .llvm_name = "sve2-aes",
     .description = "Enable AES SVE2 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
         &feature_sve,
+        &feature_fpArmv8,
     },
 };
 
@@ -825,8 +816,8 @@ pub const feature_sve2Sha3 = Feature{
     .llvm_name = "sve2-sha3",
     .description = "Enable SHA3 SVE2 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
         &feature_sve,
+        &feature_fpArmv8,
     },
 };
 
@@ -835,8 +826,8 @@ pub const feature_sve2Sm4 = Feature{
     .llvm_name = "sve2-sm4",
     .description = "Enable SM4 SVE2 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
         &feature_sve,
+        &feature_fpArmv8,
     },
 };
 
@@ -888,14 +879,6 @@ pub const feature_tlbRmi = Feature{
     },
 };
 
-pub const feature_tme = Feature{
-    .name = "tme",
-    .llvm_name = "tme",
-    .description = "Enable Transactional Memory Extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_tracev84 = Feature{
     .name = "tracev84",
     .llvm_name = "tracev8.4",
@@ -904,22 +887,6 @@ pub const feature_tracev84 = Feature{
     },
 };
 
-pub const feature_trbe = Feature{
-    .name = "trbe",
-    .llvm_name = "trbe",
-    .description = "Enable Trace Buffer Extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_taggedGlobals = Feature{
-    .name = "taggedGlobals",
-    .llvm_name = "tagged-globals",
-    .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_useAa = Feature{
     .name = "useAa",
     .llvm_name = "use-aa",
@@ -1039,7 +1006,6 @@ pub const features = &[_]*const Feature {
     &feature_dit,
     &feature_disableLatencySchedHeuristic,
     &feature_dotprod,
-    &feature_ete,
     &feature_exynosCheapAsMove,
     &feature_fmi,
     &feature_fp16fml,
@@ -1119,10 +1085,7 @@ pub const features = &[_]*const Feature {
     &feature_specrestrict,
     &feature_strictAlign,
     &feature_tlbRmi,
-    &feature_tme,
     &feature_tracev84,
-    &feature_trbe,
-    &feature_taggedGlobals,
     &feature_useAa,
     &feature_tpidrEl1,
     &feature_tpidrEl2,
@@ -1140,18 +1103,18 @@ pub const cpu_appleLatest = Cpu{
     .name = "appleLatest",
     .llvm_name = "apple-latest",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
+        &feature_arithCbzFusion,
+        &feature_zczFpWorkaround,
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_arithBccFusion,
-        &feature_zczFp,
-        &feature_zczGp,
-        &feature_zcm,
-        &feature_fuseAes,
-        &feature_disableLatencySchedHeuristic,
         &feature_fuseCryptoEor,
+        &feature_zcm,
+        &feature_zczGp,
         &feature_perfmon,
-        &feature_zczFpWorkaround,
-        &feature_arithCbzFusion,
+        &feature_disableLatencySchedHeuristic,
+        &feature_fpArmv8,
+        &feature_zczFp,
+        &feature_arithBccFusion,
+        &feature_fuseAes,
     },
 };
 
@@ -1159,9 +1122,9 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortexA35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
+        &feature_perfmon,
         &feature_fpArmv8,
         &feature_crc,
-        &feature_perfmon,
     },
 };
 
@@ -1169,14 +1132,14 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortexA53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_balanceFpOps,
-        &feature_usePostraScheduler,
-        &feature_crc,
         &feature_customCheapAsMove,
+        &feature_crc,
+        &feature_perfmon,
         &feature_useAa,
+        &feature_fpArmv8,
         &feature_fuseAes,
-        &feature_perfmon,
+        &feature_balanceFpOps,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1184,20 +1147,20 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortexA55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
+        &feature_ccpp,
         &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
         &feature_uaops,
         &feature_rdm,
-        &feature_lor,
-        &feature_fuseAes,
         &feature_ras,
+        &feature_lse,
+        &feature_crc,
         &feature_perfmon,
-        &feature_ccpp,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_fuseAes,
+        &feature_lor,
+        &feature_dotprod,
+        &feature_pan,
     },
 };
 
@@ -1205,55 +1168,15 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortexA57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_balanceFpOps,
         &feature_fuseLiterals,
-        &feature_usePostraScheduler,
-        &feature_crc,
+        &feature_predictableSelectExpensive,
         &feature_customCheapAsMove,
-        &feature_fuseAes,
+        &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
-    },
-};
-
-pub const cpu_cortexA65 = Cpu{
-    .name = "cortexA65",
-    .llvm_name = "cortex-a65",
-    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_lor,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_ccpp,
-    },
-};
-
-pub const cpu_cortexA65ae = Cpu{
-    .name = "cortexA65ae",
-    .llvm_name = "cortex-a65ae",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_lor,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_ccpp,
+        &feature_fuseAes,
+        &feature_balanceFpOps,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1261,10 +1184,10 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortexA72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
+        &feature_fuseAes,
         &feature_fpArmv8,
-        &feature_crc,
         &feature_perfmon,
-        &feature_fuseAes,
+        &feature_crc,
     },
 };
 
@@ -1272,10 +1195,10 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortexA73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
+        &feature_fuseAes,
         &feature_fpArmv8,
-        &feature_crc,
         &feature_perfmon,
-        &feature_fuseAes,
+        &feature_crc,
     },
 };
 
@@ -1283,20 +1206,20 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortexA75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
+        &feature_ccpp,
         &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
         &feature_uaops,
         &feature_rdm,
-        &feature_lor,
-        &feature_fuseAes,
         &feature_ras,
+        &feature_lse,
+        &feature_crc,
         &feature_perfmon,
-        &feature_ccpp,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_fuseAes,
+        &feature_lor,
+        &feature_dotprod,
+        &feature_pan,
     },
 };
 
@@ -1304,19 +1227,19 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortexA76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
+        &feature_ccpp,
         &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
         &feature_uaops,
         &feature_rdm,
-        &feature_lor,
         &feature_ras,
+        &feature_lse,
+        &feature_crc,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_lor,
         &feature_ssbs,
-        &feature_ccpp,
+        &feature_dotprod,
+        &feature_pan,
     },
 };
 
@@ -1324,19 +1247,19 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortexA76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
+        &feature_ccpp,
         &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
         &feature_uaops,
         &feature_rdm,
-        &feature_lor,
         &feature_ras,
+        &feature_lse,
+        &feature_crc,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_lor,
         &feature_ssbs,
-        &feature_ccpp,
+        &feature_dotprod,
+        &feature_pan,
     },
 };
 
@@ -1344,18 +1267,18 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
+        &feature_arithCbzFusion,
+        &feature_zczFpWorkaround,
         &feature_alternateSextloadCvtF32Pattern,
-        &feature_arithBccFusion,
-        &feature_zczFp,
-        &feature_zczGp,
-        &feature_zcm,
-        &feature_fuseAes,
-        &feature_disableLatencySchedHeuristic,
         &feature_fuseCryptoEor,
+        &feature_zcm,
+        &feature_zczGp,
         &feature_perfmon,
-        &feature_zczFpWorkaround,
-        &feature_arithCbzFusion,
+        &feature_disableLatencySchedHeuristic,
+        &feature_fpArmv8,
+        &feature_zczFp,
+        &feature_arithBccFusion,
+        &feature_fuseAes,
     },
 };
 
@@ -1363,17 +1286,17 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynosM1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
+        &feature_customCheapAsMove,
+        &feature_crc,
+        &feature_force32bitJumpTables,
+        &feature_perfmon,
         &feature_slowMisaligned128store,
-        &feature_usePostraScheduler,
         &feature_useReciprocalSquareRoot,
-        &feature_crc,
+        &feature_fpArmv8,
         &feature_zczFp,
-        &feature_customCheapAsMove,
-        &feature_force32bitJumpTables,
         &feature_fuseAes,
         &feature_slowPaired128,
-        &feature_perfmon,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1381,16 +1304,16 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynosM2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_slowMisaligned128store,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_zczFp,
         &feature_customCheapAsMove,
+        &feature_crc,
         &feature_force32bitJumpTables,
+        &feature_perfmon,
+        &feature_slowMisaligned128store,
+        &feature_fpArmv8,
+        &feature_zczFp,
         &feature_fuseAes,
         &feature_slowPaired128,
-        &feature_perfmon,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1398,19 +1321,19 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynosM3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_fuseAddress,
         &feature_fuseLiterals,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_lslFast,
+        &feature_predictableSelectExpensive,
         &feature_customCheapAsMove,
-        &feature_zczFp,
+        &feature_crc,
         &feature_force32bitJumpTables,
+        &feature_fuseAddress,
         &feature_fuseCsel,
-        &feature_fuseAes,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_zczFp,
+        &feature_fuseAes,
+        &feature_lslFast,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1418,31 +1341,31 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynosM4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
+        &feature_arithCbzFusion,
+        &feature_customCheapAsMove,
+        &feature_lse,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_lor,
+        &feature_fuseLiterals,
+        &feature_ccpp,
+        &feature_ras,
+        &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_pan,
-        &feature_fuseAddress,
-        &feature_usePostraScheduler,
+        &feature_fuseArithLogic,
         &feature_crc,
-        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
-        &feature_uaops,
-        &feature_lor,
+        &feature_fuseAddress,
+        &feature_fuseCsel,
         &feature_arithBccFusion,
-        &feature_arithCbzFusion,
-        &feature_dotprod,
-        &feature_fuseArithLogic,
-        &feature_zczGp,
+        &feature_uaops,
         &feature_rdm,
-        &feature_fuseCsel,
+        &feature_zczGp,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_vh,
-        &feature_fuseLiterals,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_fuseAes,
-        &feature_ras,
-        &feature_ccpp,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
     },
 };
 
@@ -1450,31 +1373,31 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynosM5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
+        &feature_arithCbzFusion,
+        &feature_customCheapAsMove,
+        &feature_lse,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_lor,
+        &feature_fuseLiterals,
+        &feature_ccpp,
+        &feature_ras,
+        &feature_fpArmv8,
+        &feature_fuseAes,
         &feature_pan,
-        &feature_fuseAddress,
-        &feature_usePostraScheduler,
+        &feature_fuseArithLogic,
         &feature_crc,
-        &feature_customCheapAsMove,
         &feature_force32bitJumpTables,
-        &feature_uaops,
-        &feature_lor,
+        &feature_fuseAddress,
+        &feature_fuseCsel,
         &feature_arithBccFusion,
-        &feature_arithCbzFusion,
-        &feature_dotprod,
-        &feature_fuseArithLogic,
-        &feature_zczGp,
+        &feature_uaops,
         &feature_rdm,
-        &feature_fuseCsel,
+        &feature_zczGp,
         &feature_perfmon,
-        &feature_fpArmv8,
         &feature_vh,
-        &feature_fuseLiterals,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_fuseAes,
-        &feature_ras,
-        &feature_ccpp,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
     },
 };
 
@@ -1482,17 +1405,17 @@ pub const cpu_falkor = Cpu{
     .name = "falkor",
     .llvm_name = "falkor",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_lslFast,
+        &feature_predictableSelectExpensive,
         &feature_customCheapAsMove,
+        &feature_rdm,
         &feature_slowStrqroStore,
-        &feature_zczFp,
-        &feature_rdm,
         &feature_zczGp,
+        &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1500,8 +1423,6 @@ pub const cpu_generic = Cpu{
     .name = "generic",
     .llvm_name = "generic",
     .dependencies = &[_]*const Feature {
-        &feature_trbe,
-        &feature_ete,
         &feature_fpArmv8,
         &feature_fuseAes,
         &feature_neon,
@@ -1514,56 +1435,15 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_lslFast,
+        &feature_predictableSelectExpensive,
         &feature_customCheapAsMove,
-        &feature_zczFp,
         &feature_zczGp,
+        &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
-    },
-};
-
-pub const cpu_neoverseE1 = Cpu{
-    .name = "neoverseE1",
-    .llvm_name = "neoverse-e1",
-    .dependencies = &[_]*const Feature {
         &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_lor,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_ccpp,
-    },
-};
-
-pub const cpu_neoverseN1 = Cpu{
-    .name = "neoverseN1",
-    .llvm_name = "neoverse-n1",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_dotprod,
-        &feature_rcpc,
-        &feature_lse,
-        &feature_crc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_spe,
-        &feature_lor,
-        &feature_ras,
-        &feature_ssbs,
-        &feature_ccpp,
+        &feature_zczFp,
+        &feature_lslFast,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1571,36 +1451,36 @@ pub const cpu_saphira = Cpu{
     .name = "saphira",
     .llvm_name = "saphira",
     .dependencies = &[_]*const Feature {
-        &feature_am,
-        &feature_pan,
-        &feature_usePostraScheduler,
-        &feature_tracev84,
-        &feature_rcpc,
-        &feature_sel2,
-        &feature_crc,
-        &feature_customCheapAsMove,
-        &feature_tlbRmi,
-        &feature_uaops,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_zczGp,
-        &feature_rdm,
-        &feature_pa,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_spe,
         &feature_predictableSelectExpensive,
+        &feature_customCheapAsMove,
         &feature_fmi,
+        &feature_lse,
+        &feature_zczFp,
         &feature_lslFast,
-        &feature_mpam,
+        &feature_lor,
         &feature_dit,
-        &feature_nv,
+        &feature_pa,
+        &feature_ccpp,
+        &feature_sel2,
+        &feature_ras,
+        &feature_fpArmv8,
         &feature_ccidx,
-        &feature_ras,
-        &feature_ccpp,
+        &feature_pan,
+        &feature_rcpc,
+        &feature_crc,
+        &feature_tracev84,
+        &feature_mpam,
+        &feature_am,
+        &feature_nv,
+        &feature_tlbRmi,
+        &feature_uaops,
+        &feature_rdm,
+        &feature_zczGp,
+        &feature_perfmon,
+        &feature_vh,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
+        &feature_spe,
     },
 };
 
@@ -1608,11 +1488,11 @@ pub const cpu_thunderx = Cpu{
     .name = "thunderx",
     .llvm_name = "thunderx",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
         &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1620,17 +1500,17 @@ pub const cpu_thunderx2t99 = Cpu{
     .name = "thunderx2t99",
     .llvm_name = "thunderx2t99",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_usePostraScheduler,
-        &feature_crc,
-        &feature_lse,
-        &feature_rdm,
-        &feature_lor,
-        &feature_arithBccFusion,
         &feature_predictableSelectExpensive,
         &feature_aggressiveFma,
+        &feature_rdm,
+        &feature_lse,
+        &feature_crc,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_arithBccFusion,
+        &feature_lor,
+        &feature_usePostraScheduler,
+        &feature_pan,
     },
 };
 
@@ -1638,11 +1518,11 @@ pub const cpu_thunderxt81 = Cpu{
     .name = "thunderxt81",
     .llvm_name = "thunderxt81",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
         &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1650,11 +1530,11 @@ pub const cpu_thunderxt83 = Cpu{
     .name = "thunderxt83",
     .llvm_name = "thunderxt83",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
         &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1662,11 +1542,11 @@ pub const cpu_thunderxt88 = Cpu{
     .name = "thunderxt88",
     .llvm_name = "thunderxt88",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
+        &feature_predictableSelectExpensive,
         &feature_crc,
         &feature_perfmon,
-        &feature_predictableSelectExpensive,
+        &feature_fpArmv8,
+        &feature_usePostraScheduler,
     },
 };
 
@@ -1674,22 +1554,22 @@ pub const cpu_tsv110 = Cpu{
     .name = "tsv110",
     .llvm_name = "tsv110",
     .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_pan,
-        &feature_vh,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-        &feature_lse,
-        &feature_crc,
+        &feature_ccpp,
         &feature_customCheapAsMove,
         &feature_uaops,
         &feature_rdm,
-        &feature_spe,
-        &feature_lor,
-        &feature_fuseAes,
         &feature_ras,
+        &feature_lse,
+        &feature_crc,
         &feature_perfmon,
-        &feature_ccpp,
+        &feature_fpArmv8,
+        &feature_vh,
+        &feature_fuseAes,
+        &feature_lor,
+        &feature_usePostraScheduler,
+        &feature_dotprod,
+        &feature_pan,
+        &feature_spe,
     },
 };
 
@@ -1699,8 +1579,6 @@ pub const cpus = &[_]*const Cpu {
     &cpu_cortexA53,
     &cpu_cortexA55,
     &cpu_cortexA57,
-    &cpu_cortexA65,
-    &cpu_cortexA65ae,
     &cpu_cortexA72,
     &cpu_cortexA73,
     &cpu_cortexA75,
@@ -1715,8 +1593,6 @@ pub const cpus = &[_]*const Cpu {
     &cpu_falkor,
     &cpu_generic,
     &cpu_kryo,
-    &cpu_neoverseE1,
-    &cpu_neoverseN1,
     &cpu_saphira,
     &cpu_thunderx,
     &cpu_thunderx2t99,
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index f1954628c5a268c9d95872e47fab44470ded3252..5efc6e177f5c29c084c113c1294e3129cfae9b09 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -460,14 +460,6 @@ pub const feature_maiInsts = Feature{
     },
 };
 
-pub const feature_mfmaInlineLiteralBug = Feature{
-    .name = "mfmaInlineLiteralBug",
-    .llvm_name = "mfma-inline-literal-bug",
-    .description = "MFMA cannot use inline literal as SrcC",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_mimgR128 = Feature{
     .name = "mimgR128",
     .llvm_name = "mimg-r128",
@@ -886,7 +878,6 @@ pub const features = &[_]*const Feature {
     &feature_localmemorysize32768,
     &feature_localmemorysize65536,
     &feature_maiInsts,
-    &feature_mfmaInlineLiteralBug,
     &feature_mimgR128,
     &feature_madMixInsts,
     &feature_maxPrivateElementSize4,
@@ -941,15 +932,15 @@ pub const cpu_bonaire = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -962,28 +953,28 @@ pub const cpu_carrizo = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -997,28 +988,28 @@ pub const cpu_fiji = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -1047,40 +1038,40 @@ pub const cpu_gfx1010 = Cpu{
         &feature_dlInsts,
         &feature_noXnackSupport,
         &feature_flatSegmentOffsetBug,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_fmaMixInsts,
+        &feature_movrel,
+        &feature_registerBanking,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_gfx10Insts,
-        &feature_BitInsts16,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
-        &feature_dpp8,
-        &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
         &feature_mimgR128,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
+        &feature_noSdstCmpx,
+        &feature_vop3p,
         &feature_sdwa,
-        &feature_fmaMixInsts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
+        &feature_noDataDepHazard,
+        &feature_flatScratchInsts,
+        &feature_ciInsts,
         &feature_sMemrealtime,
-        &feature_vscnt,
+        &feature_pkFmacF16Inst,
+        &feature_dpp8,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_noSdstCmpx,
-        &feature_fp64,
         &feature_noSramEccSupport,
-        &feature_gfx8Insts,
+        &feature_gfx10Insts,
         &feature_localmemorysize65536,
-        &feature_movrel,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_gfx9Insts,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
+        &feature_vop3Literal,
         &feature_sdwaOmod,
-        &feature_noDataDepHazard,
-        &feature_ciInsts,
-        &feature_addNoCarryInsts,
+        &feature_vscnt,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1111,40 +1102,40 @@ pub const cpu_gfx1011 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_fmaMixInsts,
+        &feature_movrel,
+        &feature_registerBanking,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_gfx10Insts,
-        &feature_BitInsts16,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
-        &feature_dpp8,
-        &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
         &feature_mimgR128,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
+        &feature_noSdstCmpx,
+        &feature_vop3p,
         &feature_sdwa,
-        &feature_fmaMixInsts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
+        &feature_noDataDepHazard,
+        &feature_flatScratchInsts,
+        &feature_ciInsts,
         &feature_sMemrealtime,
-        &feature_vscnt,
+        &feature_pkFmacF16Inst,
+        &feature_dpp8,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_noSdstCmpx,
-        &feature_fp64,
         &feature_noSramEccSupport,
-        &feature_gfx8Insts,
+        &feature_gfx10Insts,
         &feature_localmemorysize65536,
-        &feature_movrel,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_gfx9Insts,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
+        &feature_vop3Literal,
         &feature_sdwaOmod,
-        &feature_noDataDepHazard,
-        &feature_ciInsts,
-        &feature_addNoCarryInsts,
+        &feature_vscnt,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1174,40 +1165,40 @@ pub const cpu_gfx1012 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_flatSegmentOffsetBug,
-        &feature_vop3Literal,
-        &feature_apertureRegs,
+        &feature_fmaMixInsts,
+        &feature_movrel,
+        &feature_registerBanking,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_gfx10Insts,
-        &feature_BitInsts16,
-        &feature_pkFmacF16Inst,
-        &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
-        &feature_dpp8,
-        &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
         &feature_mimgR128,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
+        &feature_noSdstCmpx,
+        &feature_vop3p,
         &feature_sdwa,
-        &feature_fmaMixInsts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
+        &feature_noDataDepHazard,
+        &feature_flatScratchInsts,
+        &feature_ciInsts,
         &feature_sMemrealtime,
-        &feature_vscnt,
+        &feature_pkFmacF16Inst,
+        &feature_dpp8,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
-        &feature_registerBanking,
-        &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_noSdstCmpx,
-        &feature_fp64,
         &feature_noSramEccSupport,
-        &feature_gfx8Insts,
+        &feature_gfx10Insts,
         &feature_localmemorysize65536,
-        &feature_movrel,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_gfx9Insts,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
+        &feature_vop3Literal,
         &feature_sdwaOmod,
-        &feature_noDataDepHazard,
-        &feature_ciInsts,
-        &feature_addNoCarryInsts,
+        &feature_vscnt,
         &feature_instFwdPrefetchBug,
         &feature_ldsbankcount32,
         &feature_ldsBranchVmemWarHazard,
@@ -1234,13 +1225,13 @@ pub const cpu_gfx600 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_halfRate64Ops,
     },
 };
@@ -1252,13 +1243,13 @@ pub const cpu_gfx601 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
     },
 };
 
@@ -1269,15 +1260,15 @@ pub const cpu_gfx700 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1290,15 +1281,15 @@ pub const cpu_gfx701 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
         &feature_halfRate64Ops,
     },
@@ -1312,15 +1303,15 @@ pub const cpu_gfx702 = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount16,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1332,15 +1323,15 @@ pub const cpu_gfx703 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1352,15 +1343,15 @@ pub const cpu_gfx704 = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1373,28 +1364,28 @@ pub const cpu_gfx801 = Cpu{
         &feature_fastFmaf,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_xnack,
         &feature_halfRate64Ops,
     },
@@ -1409,28 +1400,28 @@ pub const cpu_gfx802 = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -1442,28 +1433,28 @@ pub const cpu_gfx803 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -1473,28 +1464,28 @@ pub const cpu_gfx810 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_xnack,
     },
 };
@@ -1506,36 +1497,36 @@ pub const cpu_gfx900 = Cpu{
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
     },
@@ -1547,36 +1538,36 @@ pub const cpu_gfx902 = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_noSramEccSupport,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1591,36 +1582,36 @@ pub const cpu_gfx904 = Cpu{
         &feature_noSramEccSupport,
         &feature_noXnackSupport,
         &feature_fmaMixInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
     },
 };
@@ -1635,36 +1626,36 @@ pub const cpu_gfx906 = Cpu{
         &feature_dot1Insts,
         &feature_dot2Insts,
         &feature_fmaMixInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_halfRate64Ops,
     },
@@ -1684,39 +1675,38 @@ pub const cpu_gfx908 = Cpu{
         &feature_dot5Insts,
         &feature_dot6Insts,
         &feature_fmaMixInsts,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_maiInsts,
-        &feature_mfmaInlineLiteralBug,
         &feature_pkFmacF16Inst,
         &feature_sramEcc,
         &feature_halfRate64Ops,
@@ -1728,36 +1718,36 @@ pub const cpu_gfx909 = Cpu{
     .llvm_name = "gfx909",
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
-        &feature_apertureRegs,
+        &feature_vgprIndexMode,
+        &feature_addNoCarryInsts,
+        &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_sdwaScalar,
         &feature_flatGlobalInsts,
-        &feature_BitInsts16,
+        &feature_scalarFlatScratchInsts,
+        &feature_flatInstOffsets,
+        &feature_apertureRegs,
         &feature_vop3p,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_inv2piInlineImm,
         &feature_sdwa,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_intClampInsts,
+        &feature_sdwaSdst,
         &feature_flatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_scalarFlatScratchInsts,
+        &feature_ciInsts,
+        &feature_r128A16,
         &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_scalarAtomics,
+        &feature_inv2piInlineImm,
         &feature_fastFmaf,
+        &feature_wavefrontsize64,
+        &feature_localmemorysize65536,
+        &feature_scalarStores,
         &feature_gfx9Insts,
-        &feature_sdwaSdst,
-        &feature_vgprIndexMode,
-        &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_intClampInsts,
-        &feature_sdwaScalar,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_sdwaOmod,
-        &feature_scalarAtomics,
-        &feature_r128A16,
-        &feature_wavefrontsize64,
-        &feature_ciInsts,
-        &feature_scalarStores,
-        &feature_gcn3Encoding,
-        &feature_addNoCarryInsts,
         &feature_ldsbankcount32,
         &feature_madMixInsts,
         &feature_xnack,
@@ -1771,13 +1761,13 @@ pub const cpu_hainan = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
     },
 };
 
@@ -1789,15 +1779,15 @@ pub const cpu_hawaii = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
         &feature_halfRate64Ops,
     },
@@ -1812,28 +1802,28 @@ pub const cpu_iceland = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -1844,15 +1834,15 @@ pub const cpu_kabini = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1864,15 +1854,15 @@ pub const cpu_kaveri = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1884,15 +1874,15 @@ pub const cpu_mullins = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount16,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_gfx7Gfx8Gfx9Insts,
+        &feature_movrel,
+        &feature_flatAddressSpace,
         &feature_wavefrontsize64,
-        &feature_ciInsts,
         &feature_fp64,
-        &feature_gfx7Gfx8Gfx9Insts,
         &feature_mimgR128,
         &feature_noSramEccSupport,
-        &feature_flatAddressSpace,
+        &feature_ciInsts,
         &feature_localmemorysize65536,
     },
 };
@@ -1904,13 +1894,13 @@ pub const cpu_oland = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
     },
 };
 
@@ -1921,13 +1911,13 @@ pub const cpu_pitcairn = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
     },
 };
 
@@ -1939,28 +1929,28 @@ pub const cpu_polaris10 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -1972,28 +1962,28 @@ pub const cpu_polaris11 = Cpu{
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -2003,28 +1993,28 @@ pub const cpu_stoney = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_codeObjectV3,
         &feature_ldsbankcount16,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
         &feature_xnack,
     },
 };
@@ -2037,13 +2027,13 @@ pub const cpu_tahiti = Cpu{
         &feature_noXnackSupport,
         &feature_fastFmaf,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
         &feature_halfRate64Ops,
     },
 };
@@ -2057,28 +2047,28 @@ pub const cpu_tonga = Cpu{
         &feature_ldsbankcount32,
         &feature_sgprInitBug,
         &feature_unpackedD16Vmem,
-        &feature_BitInsts16,
-        &feature_flatAddressSpace,
-        &feature_dpp,
-        &feature_sdwa,
-        &feature_mimgR128,
-        &feature_inv2piInlineImm,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
         &feature_trigReducedRange,
         &feature_vgprIndexMode,
+        &feature_movrel,
         &feature_fp64,
+        &feature_gcn3Encoding,
+        &feature_mimgR128,
+        &feature_sdwa,
         &feature_gfx7Gfx8Gfx9Insts,
-        &feature_noSramEccSupport,
-        &feature_gfx8Insts,
-        &feature_localmemorysize65536,
-        &feature_movrel,
         &feature_intClampInsts,
-        &feature_sdwaMav,
-        &feature_wavefrontsize64,
         &feature_ciInsts,
+        &feature_sdwaOutModsVopc,
+        &feature_sMemrealtime,
+        &feature_flatAddressSpace,
+        &feature_inv2piInlineImm,
+        &feature_wavefrontsize64,
+        &feature_noSramEccSupport,
+        &feature_sdwaMav,
+        &feature_localmemorysize65536,
         &feature_scalarStores,
-        &feature_gcn3Encoding,
+        &feature_gfx8Insts,
+        &feature_dpp,
+        &feature_BitInsts16,
     },
 };
 
@@ -2089,13 +2079,13 @@ pub const cpu_verde = Cpu{
         &feature_codeObjectV3,
         &feature_noXnackSupport,
         &feature_ldsbankcount32,
-        &feature_movrel,
         &feature_trigReducedRange,
+        &feature_movrel,
         &feature_wavefrontsize64,
-        &feature_localmemorysize32768,
         &feature_fp64,
-        &feature_noSramEccSupport,
         &feature_mimgR128,
+        &feature_noSramEccSupport,
+        &feature_localmemorysize32768,
     },
 };
 
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 9861a1ff56f7c9265e198f58eb0945057c26d434..d83be5cc48dbc0fa5e621ac65f2b086b72732685 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -22,8 +22,8 @@ pub const feature_aes = Feature{
     .llvm_name = "aes",
     .description = "Enable AES support",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -130,8 +130,8 @@ pub const feature_dotprod = Feature{
     .llvm_name = "dotprod",
     .description = "Enable support for dot product instructions",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -164,8 +164,8 @@ pub const feature_fp16fml = Feature{
     .llvm_name = "fp16fml",
     .description = "Enable full half-precision floating point fml instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -191,9 +191,9 @@ pub const feature_fpArmv8 = Feature{
     .llvm_name = "fp-armv8",
     .description = "Enable ARMv8 FP",
     .dependencies = &[_]*const Feature {
+        &feature_fp16,
         &feature_d32,
         &feature_fpregs,
-        &feature_fp16,
     },
 };
 
@@ -202,8 +202,8 @@ pub const feature_fpArmv8d16 = Feature{
     .llvm_name = "fp-armv8d16",
     .description = "Enable ARMv8 FP with only 16 d-registers",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -212,8 +212,8 @@ pub const feature_fpArmv8d16sp = Feature{
     .llvm_name = "fp-armv8d16sp",
     .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -222,9 +222,9 @@ pub const feature_fpArmv8sp = Feature{
     .llvm_name = "fp-armv8sp",
     .description = "Enable ARMv8 FP with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -259,8 +259,8 @@ pub const feature_fullfp16 = Feature{
     .llvm_name = "fullfp16",
     .description = "Enable full half-precision floating point",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -360,30 +360,6 @@ pub const feature_mp = Feature{
     },
 };
 
-pub const feature_mve1beat = Feature{
-    .name = "mve1beat",
-    .llvm_name = "mve1beat",
-    .description = "Model MVE instructions as a 1 beat per tick architecture",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mve2beat = Feature{
-    .name = "mve2beat",
-    .llvm_name = "mve2beat",
-    .description = "Model MVE instructions as a 2 beats per tick architecture",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mve4beat = Feature{
-    .name = "mve4beat",
-    .llvm_name = "mve4beat",
-    .description = "Model MVE instructions as a 4 beats per tick architecture",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_muxedUnits = Feature{
     .name = "muxedUnits",
     .llvm_name = "muxed-units",
@@ -559,8 +535,8 @@ pub const feature_sha2 = Feature{
     .llvm_name = "sha2",
     .description = "Enable SHA1 and SHA256 support",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -673,6 +649,25 @@ pub const feature_vfp2 = Feature{
     .name = "vfp2",
     .llvm_name = "vfp2",
     .description = "Enable VFP2 instructions",
+    .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp2d16 = Feature{
+    .name = "vfp2d16",
+    .llvm_name = "vfp2d16",
+    .description = "Enable VFP2 instructions with only 16 d-registers",
+    .dependencies = &[_]*const Feature {
+        &feature_fpregs,
+    },
+};
+
+pub const feature_vfp2d16sp = Feature{
+    .name = "vfp2d16sp",
+    .llvm_name = "vfp2d16sp",
+    .description = "Enable VFP2 instructions with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
     },
@@ -684,6 +679,7 @@ pub const feature_vfp2sp = Feature{
     .description = "Enable VFP2 instructions with no double precision",
     .dependencies = &[_]*const Feature {
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -692,8 +688,8 @@ pub const feature_vfp3 = Feature{
     .llvm_name = "vfp3",
     .description = "Enable VFP3 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -720,8 +716,8 @@ pub const feature_vfp3sp = Feature{
     .llvm_name = "vfp3sp",
     .description = "Enable VFP3 instructions with no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_d32,
         &feature_fpregs,
+        &feature_d32,
     },
 };
 
@@ -730,9 +726,9 @@ pub const feature_vfp4 = Feature{
     .llvm_name = "vfp4",
     .description = "Enable VFP4 instructions",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
         &feature_fp16,
+        &feature_d32,
+        &feature_fpregs,
     },
 };
 
@@ -741,8 +737,8 @@ pub const feature_vfp4d16 = Feature{
     .llvm_name = "vfp4d16",
     .description = "Enable VFP4 instructions with only 16 d-registers",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -751,8 +747,8 @@ pub const feature_vfp4d16sp = Feature{
     .llvm_name = "vfp4d16sp",
     .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
     .dependencies = &[_]*const Feature {
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
     },
 };
 
@@ -761,9 +757,9 @@ pub const feature_vfp4sp = Feature{
     .llvm_name = "vfp4sp",
     .description = "Enable VFP4 instructions with no double precision",
     .dependencies = &[_]*const Feature {
+        &feature_fp16,
         &feature_fpregs,
         &feature_d32,
-        &feature_fp16,
     },
 };
 
@@ -836,9 +832,6 @@ pub const features = &[_]*const Feature {
     &feature_longCalls,
     &feature_mclass,
     &feature_mp,
-    &feature_mve1beat,
-    &feature_mve2beat,
-    &feature_mve4beat,
     &feature_muxedUnits,
     &feature_neon,
     &feature_neonfp,
@@ -875,6 +868,8 @@ pub const features = &[_]*const Feature {
     &feature_wideStrideVfp,
     &feature_v7clrex,
     &feature_vfp2,
+    &feature_vfp2d16,
+    &feature_vfp2d16sp,
     &feature_vfp2sp,
     &feature_vfp3,
     &feature_vfp3d16,
@@ -938,6 +933,7 @@ pub const cpu_arm1136jfS = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_dsp,
         &feature_slowfpvmlx,
+        &feature_d32,
         &feature_fpregs,
         &feature_vfp2,
     },
@@ -947,8 +943,8 @@ pub const cpu_arm1156t2S = Cpu{
     .name = "arm1156t2S",
     .llvm_name = "arm1156t2-s",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
+        &feature_thumb2,
     },
 };
 
@@ -956,9 +952,10 @@ pub const cpu_arm1156t2fS = Cpu{
     .name = "arm1156t2fS",
     .llvm_name = "arm1156t2f-s",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
         &feature_dsp,
+        &feature_thumb2,
         &feature_slowfpvmlx,
+        &feature_d32,
         &feature_fpregs,
         &feature_vfp2,
     },
@@ -986,6 +983,7 @@ pub const cpu_arm1176jzfS = Cpu{
     .dependencies = &[_]*const Feature {
         &feature_trustzone,
         &feature_slowfpvmlx,
+        &feature_d32,
         &feature_fpregs,
         &feature_vfp2,
     },
@@ -1114,14 +1112,14 @@ pub const cpu_cortexA12 = Cpu{
     .name = "cortexA12",
     .llvm_name = "cortex-a12",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1139,14 +1137,14 @@ pub const cpu_cortexA15 = Cpu{
     .name = "cortexA15",
     .llvm_name = "cortex-a15",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_dontWidenVmovs,
@@ -1167,14 +1165,14 @@ pub const cpu_cortexA17 = Cpu{
     .name = "cortexA17",
     .llvm_name = "cortex-a17",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_mp,
@@ -1192,21 +1190,21 @@ pub const cpu_cortexA32 = Cpu{
     .name = "cortexA32",
     .llvm_name = "cortex-a32",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
     },
 };
@@ -1215,21 +1213,21 @@ pub const cpu_cortexA35 = Cpu{
     .name = "cortexA35",
     .llvm_name = "cortex-a35",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
     },
 };
@@ -1238,14 +1236,14 @@ pub const cpu_cortexA5 = Cpu{
     .name = "cortexA5",
     .llvm_name = "cortex-a5",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_mp,
@@ -1261,21 +1259,21 @@ pub const cpu_cortexA53 = Cpu{
     .name = "cortexA53",
     .llvm_name = "cortex-a53",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
         &feature_fpao,
     },
@@ -1285,22 +1283,22 @@ pub const cpu_cortexA55 = Cpu{
     .name = "cortexA55",
     .llvm_name = "cortex-a55",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_dotprod,
     },
 };
@@ -1309,21 +1307,21 @@ pub const cpu_cortexA57 = Cpu{
     .name = "cortexA57",
     .llvm_name = "cortex-a57",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_avoidPartialCpsr,
         &feature_cheapPredicableCpsr,
         &feature_crypto,
@@ -1335,14 +1333,14 @@ pub const cpu_cortexA7 = Cpu{
     .name = "cortexA7",
     .llvm_name = "cortex-a7",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1362,21 +1360,21 @@ pub const cpu_cortexA72 = Cpu{
     .name = "cortexA72",
     .llvm_name = "cortex-a72",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
     },
 };
@@ -1385,21 +1383,21 @@ pub const cpu_cortexA73 = Cpu{
     .name = "cortexA73",
     .llvm_name = "cortex-a73",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
     },
 };
@@ -1408,22 +1406,22 @@ pub const cpu_cortexA75 = Cpu{
     .name = "cortexA75",
     .llvm_name = "cortex-a75",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_dotprod,
     },
 };
@@ -1432,22 +1430,22 @@ pub const cpu_cortexA76 = Cpu{
     .name = "cortexA76",
     .llvm_name = "cortex-a76",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1458,22 +1456,22 @@ pub const cpu_cortexA76ae = Cpu{
     .name = "cortexA76ae",
     .llvm_name = "cortex-a76ae",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_crypto,
         &feature_dotprod,
         &feature_fullfp16,
@@ -1484,14 +1482,14 @@ pub const cpu_cortexA8 = Cpu{
     .name = "cortexA8",
     .llvm_name = "cortex-a8",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
         &feature_vmlxHazards,
@@ -1506,14 +1504,14 @@ pub const cpu_cortexA9 = Cpu{
     .name = "cortexA9",
     .llvm_name = "cortex-a9",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_expandFpMlx,
@@ -1533,10 +1531,10 @@ pub const cpu_cortexM0 = Cpu{
     .name = "cortexM0",
     .llvm_name = "cortex-m0",
     .dependencies = &[_]*const Feature {
-        &feature_noarm,
-        &feature_strictAlign,
         &feature_mclass,
         &feature_db,
+        &feature_noarm,
+        &feature_strictAlign,
     },
 };
 
@@ -1544,10 +1542,10 @@ pub const cpu_cortexM0plus = Cpu{
     .name = "cortexM0plus",
     .llvm_name = "cortex-m0plus",
     .dependencies = &[_]*const Feature {
-        &feature_noarm,
-        &feature_strictAlign,
         &feature_mclass,
         &feature_db,
+        &feature_noarm,
+        &feature_strictAlign,
     },
 };
 
@@ -1555,10 +1553,10 @@ pub const cpu_cortexM1 = Cpu{
     .name = "cortexM1",
     .llvm_name = "cortex-m1",
     .dependencies = &[_]*const Feature {
-        &feature_noarm,
-        &feature_strictAlign,
         &feature_mclass,
         &feature_db,
+        &feature_noarm,
+        &feature_strictAlign,
     },
 };
 
@@ -1566,14 +1564,14 @@ pub const cpu_cortexM23 = Cpu{
     .name = "cortexM23",
     .llvm_name = "cortex-m23",
     .dependencies = &[_]*const Feature {
-        &feature_noarm,
+        &feature_hwdiv,
+        &feature_mclass,
+        &feature_db,
         &feature_acquireRelease,
         &feature_v7clrex,
-        &feature_strictAlign,
-        &feature_mclass,
-        &feature_hwdiv,
+        &feature_noarm,
         &feature_msecext8,
-        &feature_db,
+        &feature_strictAlign,
         &feature_noMovt,
     },
 };
@@ -1582,13 +1580,13 @@ pub const cpu_cortexM3 = Cpu{
     .name = "cortexM3",
     .llvm_name = "cortex-m3",
     .dependencies = &[_]*const Feature {
+        &feature_hwdiv,
         &feature_thumb2,
-        &feature_noarm,
-        &feature_v7clrex,
-        &feature_perfmon,
         &feature_mclass,
-        &feature_hwdiv,
         &feature_db,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_loopAlign,
         &feature_useAa,
@@ -1600,18 +1598,18 @@ pub const cpu_cortexM33 = Cpu{
     .name = "cortexM33",
     .llvm_name = "cortex-m33",
     .dependencies = &[_]*const Feature {
+        &feature_hwdiv,
         &feature_thumb2,
-        &feature_noarm,
+        &feature_mclass,
+        &feature_db,
         &feature_acquireRelease,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_mclass,
-        &feature_hwdiv,
+        &feature_noarm,
         &feature_msecext8,
-        &feature_db,
         &feature_dsp,
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
         &feature_fpArmv8d16sp,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
@@ -1625,18 +1623,18 @@ pub const cpu_cortexM35p = Cpu{
     .name = "cortexM35p",
     .llvm_name = "cortex-m35p",
     .dependencies = &[_]*const Feature {
+        &feature_hwdiv,
         &feature_thumb2,
-        &feature_noarm,
+        &feature_mclass,
+        &feature_db,
         &feature_acquireRelease,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_mclass,
-        &feature_hwdiv,
+        &feature_noarm,
         &feature_msecext8,
-        &feature_db,
         &feature_dsp,
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
         &feature_fpArmv8d16sp,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
@@ -1650,21 +1648,21 @@ pub const cpu_cortexM4 = Cpu{
     .name = "cortexM4",
     .llvm_name = "cortex-m4",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
-        &feature_noarm,
-        &feature_v7clrex,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_mclass,
-        &feature_hwdiv,
         &feature_db,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_slowfpvmlx,
         &feature_loopAlign,
         &feature_useAa,
         &feature_useMisched,
-        &feature_fpregs,
         &feature_fp16,
+        &feature_fpregs,
         &feature_vfp4d16sp,
     },
 };
@@ -1673,16 +1671,16 @@ pub const cpu_cortexM7 = Cpu{
     .name = "cortexM7",
     .llvm_name = "cortex-m7",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
-        &feature_noarm,
-        &feature_v7clrex,
-        &feature_perfmon,
+        &feature_thumb2,
         &feature_mclass,
-        &feature_hwdiv,
         &feature_db,
-        &feature_fpregs,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_noarm,
         &feature_fp16,
+        &feature_fpregs,
         &feature_fpArmv8d16,
     },
 };
@@ -1691,13 +1689,13 @@ pub const cpu_cortexR4 = Cpu{
     .name = "cortexR4",
     .llvm_name = "cortex-r4",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_db,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_hwdiv,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
     },
@@ -1707,13 +1705,13 @@ pub const cpu_cortexR4f = Cpu{
     .name = "cortexR4f",
     .llvm_name = "cortex-r4f",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_db,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_hwdiv,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_retAddrStack,
         &feature_slowfpvmlx,
@@ -1727,13 +1725,13 @@ pub const cpu_cortexR5 = Cpu{
     .name = "cortexR5",
     .llvm_name = "cortex-r5",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_db,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_hwdiv,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
         &feature_retAddrStack,
@@ -1748,21 +1746,21 @@ pub const cpu_cortexR52 = Cpu{
     .name = "cortexR52",
     .llvm_name = "cortex-r52",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
-        &feature_fpregs,
-        &feature_dsp,
+        &feature_hwdiv,
         &feature_dfb,
-        &feature_rclass,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
-        &feature_perfmon,
-        &feature_crc,
         &feature_mp,
-        &feature_hwdiv,
         &feature_d32,
-        &feature_fp16,
+        &feature_dsp,
+        &feature_rclass,
+        &feature_thumb2,
         &feature_db,
+        &feature_fpregs,
+        &feature_crc,
+        &feature_fp16,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_fpao,
         &feature_useAa,
         &feature_useMisched,
@@ -1773,13 +1771,13 @@ pub const cpu_cortexR7 = Cpu{
     .name = "cortexR7",
     .llvm_name = "cortex-r7",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_db,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_hwdiv,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1796,13 +1794,13 @@ pub const cpu_cortexR8 = Cpu{
     .name = "cortexR8",
     .llvm_name = "cortex-r8",
     .dependencies = &[_]*const Feature {
-        &feature_thumb2,
+        &feature_hwdiv,
         &feature_dsp,
         &feature_rclass,
+        &feature_thumb2,
+        &feature_db,
         &feature_v7clrex,
         &feature_perfmon,
-        &feature_hwdiv,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_fp16,
         &feature_hwdivArm,
@@ -1819,21 +1817,21 @@ pub const cpu_cyclone = Cpu{
     .name = "cyclone",
     .llvm_name = "cyclone",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_crypto,
@@ -1858,34 +1856,34 @@ pub const cpu_exynosM1 = Cpu{
     .name = "exynosM1",
     .llvm_name = "exynos-m1",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
-        &feature_expandFpMlx,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_fuseLiterals,
+        &feature_useAa,
+        &feature_wideStrideVfp,
         &feature_slowVgetlni32,
+        &feature_slowVdup32,
         &feature_profUnpr,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
         &feature_retAddrStack,
-        &feature_fuseLiterals,
-        &feature_wideStrideVfp,
         &feature_zcz,
+        &feature_slowfpvmlx,
+        &feature_expandFpMlx,
         &feature_fuseAes,
-        &feature_slowVdup32,
+        &feature_dontWidenVmovs,
     },
 };
 
@@ -1893,34 +1891,34 @@ pub const cpu_exynosM2 = Cpu{
     .name = "exynosM2",
     .llvm_name = "exynos-m2",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
-        &feature_expandFpMlx,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_fuseLiterals,
+        &feature_useAa,
+        &feature_wideStrideVfp,
         &feature_slowVgetlni32,
+        &feature_slowVdup32,
         &feature_profUnpr,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
         &feature_retAddrStack,
-        &feature_fuseLiterals,
-        &feature_wideStrideVfp,
         &feature_zcz,
+        &feature_slowfpvmlx,
+        &feature_expandFpMlx,
         &feature_fuseAes,
-        &feature_slowVdup32,
+        &feature_dontWidenVmovs,
     },
 };
 
@@ -1928,34 +1926,34 @@ pub const cpu_exynosM3 = Cpu{
     .name = "exynosM3",
     .llvm_name = "exynos-m3",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
-        &feature_expandFpMlx,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_fuseLiterals,
+        &feature_useAa,
+        &feature_wideStrideVfp,
         &feature_slowVgetlni32,
+        &feature_slowVdup32,
         &feature_profUnpr,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
         &feature_retAddrStack,
-        &feature_fuseLiterals,
-        &feature_wideStrideVfp,
         &feature_zcz,
+        &feature_slowfpvmlx,
+        &feature_expandFpMlx,
         &feature_fuseAes,
-        &feature_slowVdup32,
+        &feature_dontWidenVmovs,
     },
 };
 
@@ -1963,37 +1961,37 @@ pub const cpu_exynosM4 = Cpu{
     .name = "exynosM4",
     .llvm_name = "exynos-m4",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_expandFpMlx,
+        &feature_fuseLiterals,
+        &feature_useAa,
+        &feature_wideStrideVfp,
         &feature_slowVgetlni32,
+        &feature_slowVdup32,
         &feature_profUnpr,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
         &feature_retAddrStack,
-        &feature_fuseLiterals,
-        &feature_wideStrideVfp,
         &feature_zcz,
+        &feature_slowfpvmlx,
+        &feature_expandFpMlx,
         &feature_fuseAes,
-        &feature_slowVdup32,
+        &feature_dontWidenVmovs,
     },
 };
 
@@ -2001,37 +1999,37 @@ pub const cpu_exynosM5 = Cpu{
     .name = "exynosM5",
     .llvm_name = "exynos-m5",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
+        &feature_ras,
         &feature_dotprod,
         &feature_fullfp16,
-        &feature_expandFpMlx,
+        &feature_fuseLiterals,
+        &feature_useAa,
+        &feature_wideStrideVfp,
         &feature_slowVgetlni32,
+        &feature_slowVdup32,
         &feature_profUnpr,
-        &feature_slowfpvmlx,
         &feature_slowFpBrcc,
-        &feature_useAa,
-        &feature_dontWidenVmovs,
         &feature_retAddrStack,
-        &feature_fuseLiterals,
-        &feature_wideStrideVfp,
         &feature_zcz,
+        &feature_slowfpvmlx,
+        &feature_expandFpMlx,
         &feature_fuseAes,
-        &feature_slowVdup32,
+        &feature_dontWidenVmovs,
     },
 };
 
@@ -2053,14 +2051,14 @@ pub const cpu_krait = Cpu{
     .name = "krait",
     .llvm_name = "krait",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidPartialCpsr,
         &feature_vldnAlign,
         &feature_fp16,
@@ -2077,21 +2075,21 @@ pub const cpu_kryo = Cpu{
     .name = "kryo",
     .llvm_name = "kryo",
     .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
+        &feature_hwdiv,
+        &feature_mp,
+        &feature_d32,
         &feature_dsp,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
+        &feature_thumb2,
+        &feature_db,
         &feature_aclass,
-        &feature_perfmon,
+        &feature_fpregs,
+        &feature_trustzone,
         &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
         &feature_fp16,
-        &feature_db,
+        &feature_acquireRelease,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_hwdivArm,
         &feature_crypto,
     },
 };
@@ -2101,6 +2099,7 @@ pub const cpu_mpcore = Cpu{
     .llvm_name = "mpcore",
     .dependencies = &[_]*const Feature {
         &feature_slowfpvmlx,
+        &feature_d32,
         &feature_fpregs,
         &feature_vfp2,
     },
@@ -2113,39 +2112,14 @@ pub const cpu_mpcorenovfp = Cpu{
     },
 };
 
-pub const cpu_neoverseN1 = Cpu{
-    .name = "neoverseN1",
-    .llvm_name = "neoverse-n1",
-    .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_thumb2,
-        &feature_fpregs,
-        &feature_dsp,
-        &feature_ras,
-        &feature_v7clrex,
-        &feature_hwdivArm,
-        &feature_acquireRelease,
-        &feature_aclass,
-        &feature_perfmon,
-        &feature_crc,
-        &feature_mp,
-        &feature_hwdiv,
-        &feature_d32,
-        &feature_fp16,
-        &feature_db,
-        &feature_crypto,
-        &feature_dotprod,
-    },
-};
-
 pub const cpu_sc000 = Cpu{
     .name = "sc000",
     .llvm_name = "sc000",
     .dependencies = &[_]*const Feature {
-        &feature_noarm,
-        &feature_strictAlign,
         &feature_mclass,
         &feature_db,
+        &feature_noarm,
+        &feature_strictAlign,
     },
 };
 
@@ -2153,13 +2127,13 @@ pub const cpu_sc300 = Cpu{
     .name = "sc300",
     .llvm_name = "sc300",
     .dependencies = &[_]*const Feature {
+        &feature_hwdiv,
         &feature_thumb2,
-        &feature_noarm,
-        &feature_v7clrex,
-        &feature_perfmon,
         &feature_mclass,
-        &feature_hwdiv,
         &feature_db,
+        &feature_v7clrex,
+        &feature_perfmon,
+        &feature_noarm,
         &feature_noBranchPredictor,
         &feature_useAa,
         &feature_useMisched,
@@ -2198,14 +2172,14 @@ pub const cpu_swift = Cpu{
     .name = "swift",
     .llvm_name = "swift",
     .dependencies = &[_]*const Feature {
+        &feature_d32,
+        &feature_dsp,
         &feature_thumb2,
+        &feature_db,
+        &feature_aclass,
         &feature_fpregs,
-        &feature_dsp,
         &feature_v7clrex,
-        &feature_aclass,
         &feature_perfmon,
-        &feature_d32,
-        &feature_db,
         &feature_avoidMovsShop,
         &feature_avoidPartialCpsr,
         &feature_hwdivArm,
@@ -2311,7 +2285,6 @@ pub const cpus = &[_]*const Cpu {
     &cpu_kryo,
     &cpu_mpcore,
     &cpu_mpcorenovfp,
-    &cpu_neoverseN1,
     &cpu_sc000,
     &cpu_sc300,
     &cpu_strongarm,
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 2f5dc00c74aa93393e94af5285d218c4b2a6b653..21b1591b7bdcb8876388bf284ca563bab4856909 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -170,12 +170,12 @@ pub const cpu_at43usb320 = Cpu{
     .name = "at43usb320",
     .llvm_name = "at43usb320",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -183,11 +183,11 @@ pub const cpu_at43usb355 = Cpu{
     .name = "at43usb355",
     .llvm_name = "at43usb355",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -195,11 +195,11 @@ pub const cpu_at76c711 = Cpu{
     .name = "at76c711",
     .llvm_name = "at76c711",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -231,17 +231,17 @@ pub const cpu_at90can128 = Cpu{
     .name = "at90can128",
     .llvm_name = "at90can128",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -250,14 +250,14 @@ pub const cpu_at90can32 = Cpu{
     .name = "at90can32",
     .llvm_name = "at90can32",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -267,14 +267,14 @@ pub const cpu_at90can64 = Cpu{
     .name = "at90can64",
     .llvm_name = "at90can64",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -284,13 +284,13 @@ pub const cpu_at90pwm1 = Cpu{
     .name = "at90pwm1",
     .llvm_name = "at90pwm1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -300,14 +300,14 @@ pub const cpu_at90pwm161 = Cpu{
     .name = "at90pwm161",
     .llvm_name = "at90pwm161",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -317,13 +317,13 @@ pub const cpu_at90pwm2 = Cpu{
     .name = "at90pwm2",
     .llvm_name = "at90pwm2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -333,14 +333,14 @@ pub const cpu_at90pwm216 = Cpu{
     .name = "at90pwm216",
     .llvm_name = "at90pwm216",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -350,13 +350,13 @@ pub const cpu_at90pwm2b = Cpu{
     .name = "at90pwm2b",
     .llvm_name = "at90pwm2b",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -366,13 +366,13 @@ pub const cpu_at90pwm3 = Cpu{
     .name = "at90pwm3",
     .llvm_name = "at90pwm3",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -382,14 +382,14 @@ pub const cpu_at90pwm316 = Cpu{
     .name = "at90pwm316",
     .llvm_name = "at90pwm316",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -399,13 +399,13 @@ pub const cpu_at90pwm3b = Cpu{
     .name = "at90pwm3b",
     .llvm_name = "at90pwm3b",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -415,13 +415,13 @@ pub const cpu_at90pwm81 = Cpu{
     .name = "at90pwm81",
     .llvm_name = "at90pwm81",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -537,14 +537,14 @@ pub const cpu_at90scr100 = Cpu{
     .name = "at90scr100",
     .llvm_name = "at90scr100",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -554,17 +554,17 @@ pub const cpu_at90usb1286 = Cpu{
     .name = "at90usb1286",
     .llvm_name = "at90usb1286",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -573,17 +573,17 @@ pub const cpu_at90usb1287 = Cpu{
     .name = "at90usb1287",
     .llvm_name = "at90usb1287",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -592,14 +592,14 @@ pub const cpu_at90usb162 = Cpu{
     .name = "at90usb162",
     .llvm_name = "at90usb162",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -608,14 +608,14 @@ pub const cpu_at90usb646 = Cpu{
     .name = "at90usb646",
     .llvm_name = "at90usb646",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -625,14 +625,14 @@ pub const cpu_at90usb647 = Cpu{
     .name = "at90usb647",
     .llvm_name = "at90usb647",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -642,14 +642,14 @@ pub const cpu_at90usb82 = Cpu{
     .name = "at90usb82",
     .llvm_name = "at90usb82",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -658,11 +658,11 @@ pub const cpu_at94k = Cpu{
     .name = "at94k",
     .llvm_name = "at94k",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -673,13 +673,13 @@ pub const cpu_ata5272 = Cpu{
     .name = "ata5272",
     .llvm_name = "ata5272",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -688,14 +688,14 @@ pub const cpu_ata5505 = Cpu{
     .name = "ata5505",
     .llvm_name = "ata5505",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -704,14 +704,14 @@ pub const cpu_ata5790 = Cpu{
     .name = "ata5790",
     .llvm_name = "ata5790",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -721,14 +721,14 @@ pub const cpu_ata5795 = Cpu{
     .name = "ata5795",
     .llvm_name = "ata5795",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -738,13 +738,13 @@ pub const cpu_ata6285 = Cpu{
     .name = "ata6285",
     .llvm_name = "ata6285",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -754,13 +754,13 @@ pub const cpu_ata6286 = Cpu{
     .name = "ata6286",
     .llvm_name = "ata6286",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -770,13 +770,13 @@ pub const cpu_ata6289 = Cpu{
     .name = "ata6289",
     .llvm_name = "ata6289",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -786,12 +786,12 @@ pub const cpu_atmega103 = Cpu{
     .name = "atmega103",
     .llvm_name = "atmega103",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -799,17 +799,17 @@ pub const cpu_atmega128 = Cpu{
     .name = "atmega128",
     .llvm_name = "atmega128",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -818,17 +818,17 @@ pub const cpu_atmega1280 = Cpu{
     .name = "atmega1280",
     .llvm_name = "atmega1280",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -837,17 +837,17 @@ pub const cpu_atmega1281 = Cpu{
     .name = "atmega1281",
     .llvm_name = "atmega1281",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -856,17 +856,17 @@ pub const cpu_atmega1284 = Cpu{
     .name = "atmega1284",
     .llvm_name = "atmega1284",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -875,17 +875,17 @@ pub const cpu_atmega1284p = Cpu{
     .name = "atmega1284p",
     .llvm_name = "atmega1284p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -894,17 +894,17 @@ pub const cpu_atmega1284rfr2 = Cpu{
     .name = "atmega1284rfr2",
     .llvm_name = "atmega1284rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -913,17 +913,17 @@ pub const cpu_atmega128a = Cpu{
     .name = "atmega128a",
     .llvm_name = "atmega128a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -932,17 +932,17 @@ pub const cpu_atmega128rfa1 = Cpu{
     .name = "atmega128rfa1",
     .llvm_name = "atmega128rfa1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -951,17 +951,17 @@ pub const cpu_atmega128rfr2 = Cpu{
     .name = "atmega128rfr2",
     .llvm_name = "atmega128rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -970,14 +970,14 @@ pub const cpu_atmega16 = Cpu{
     .name = "atmega16",
     .llvm_name = "atmega16",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -987,11 +987,11 @@ pub const cpu_atmega161 = Cpu{
     .name = "atmega161",
     .llvm_name = "atmega161",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1003,14 +1003,14 @@ pub const cpu_atmega162 = Cpu{
     .name = "atmega162",
     .llvm_name = "atmega162",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1020,11 +1020,11 @@ pub const cpu_atmega163 = Cpu{
     .name = "atmega163",
     .llvm_name = "atmega163",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
         &feature_lpmx,
         &feature_movw,
         &feature_mul,
@@ -1036,14 +1036,14 @@ pub const cpu_atmega164a = Cpu{
     .name = "atmega164a",
     .llvm_name = "atmega164a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1053,14 +1053,14 @@ pub const cpu_atmega164p = Cpu{
     .name = "atmega164p",
     .llvm_name = "atmega164p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1070,14 +1070,14 @@ pub const cpu_atmega164pa = Cpu{
     .name = "atmega164pa",
     .llvm_name = "atmega164pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1087,14 +1087,14 @@ pub const cpu_atmega165 = Cpu{
     .name = "atmega165",
     .llvm_name = "atmega165",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1104,14 +1104,14 @@ pub const cpu_atmega165a = Cpu{
     .name = "atmega165a",
     .llvm_name = "atmega165a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1121,14 +1121,14 @@ pub const cpu_atmega165p = Cpu{
     .name = "atmega165p",
     .llvm_name = "atmega165p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1138,14 +1138,14 @@ pub const cpu_atmega165pa = Cpu{
     .name = "atmega165pa",
     .llvm_name = "atmega165pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1155,14 +1155,14 @@ pub const cpu_atmega168 = Cpu{
     .name = "atmega168",
     .llvm_name = "atmega168",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1172,14 +1172,14 @@ pub const cpu_atmega168a = Cpu{
     .name = "atmega168a",
     .llvm_name = "atmega168a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1189,14 +1189,14 @@ pub const cpu_atmega168p = Cpu{
     .name = "atmega168p",
     .llvm_name = "atmega168p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1206,14 +1206,14 @@ pub const cpu_atmega168pa = Cpu{
     .name = "atmega168pa",
     .llvm_name = "atmega168pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1223,14 +1223,14 @@ pub const cpu_atmega169 = Cpu{
     .name = "atmega169",
     .llvm_name = "atmega169",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1240,14 +1240,14 @@ pub const cpu_atmega169a = Cpu{
     .name = "atmega169a",
     .llvm_name = "atmega169a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1257,14 +1257,14 @@ pub const cpu_atmega169p = Cpu{
     .name = "atmega169p",
     .llvm_name = "atmega169p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1274,14 +1274,14 @@ pub const cpu_atmega169pa = Cpu{
     .name = "atmega169pa",
     .llvm_name = "atmega169pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1291,14 +1291,14 @@ pub const cpu_atmega16a = Cpu{
     .name = "atmega16a",
     .llvm_name = "atmega16a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1308,14 +1308,14 @@ pub const cpu_atmega16hva = Cpu{
     .name = "atmega16hva",
     .llvm_name = "atmega16hva",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1325,14 +1325,14 @@ pub const cpu_atmega16hva2 = Cpu{
     .name = "atmega16hva2",
     .llvm_name = "atmega16hva2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1342,14 +1342,14 @@ pub const cpu_atmega16hvb = Cpu{
     .name = "atmega16hvb",
     .llvm_name = "atmega16hvb",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1359,14 +1359,14 @@ pub const cpu_atmega16hvbrevb = Cpu{
     .name = "atmega16hvbrevb",
     .llvm_name = "atmega16hvbrevb",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1376,14 +1376,14 @@ pub const cpu_atmega16m1 = Cpu{
     .name = "atmega16m1",
     .llvm_name = "atmega16m1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1393,14 +1393,14 @@ pub const cpu_atmega16u2 = Cpu{
     .name = "atmega16u2",
     .llvm_name = "atmega16u2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -1409,14 +1409,14 @@ pub const cpu_atmega16u4 = Cpu{
     .name = "atmega16u4",
     .llvm_name = "atmega16u4",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1426,17 +1426,17 @@ pub const cpu_atmega2560 = Cpu{
     .name = "atmega2560",
     .llvm_name = "atmega2560",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -1445,17 +1445,17 @@ pub const cpu_atmega2561 = Cpu{
     .name = "atmega2561",
     .llvm_name = "atmega2561",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -1464,17 +1464,17 @@ pub const cpu_atmega2564rfr2 = Cpu{
     .name = "atmega2564rfr2",
     .llvm_name = "atmega2564rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -1483,17 +1483,17 @@ pub const cpu_atmega256rfr2 = Cpu{
     .name = "atmega256rfr2",
     .llvm_name = "atmega256rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -1502,14 +1502,14 @@ pub const cpu_atmega32 = Cpu{
     .name = "atmega32",
     .llvm_name = "atmega32",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1519,14 +1519,14 @@ pub const cpu_atmega323 = Cpu{
     .name = "atmega323",
     .llvm_name = "atmega323",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1536,14 +1536,14 @@ pub const cpu_atmega324a = Cpu{
     .name = "atmega324a",
     .llvm_name = "atmega324a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1553,14 +1553,14 @@ pub const cpu_atmega324p = Cpu{
     .name = "atmega324p",
     .llvm_name = "atmega324p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1570,14 +1570,14 @@ pub const cpu_atmega324pa = Cpu{
     .name = "atmega324pa",
     .llvm_name = "atmega324pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1587,14 +1587,14 @@ pub const cpu_atmega325 = Cpu{
     .name = "atmega325",
     .llvm_name = "atmega325",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1604,14 +1604,14 @@ pub const cpu_atmega3250 = Cpu{
     .name = "atmega3250",
     .llvm_name = "atmega3250",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1621,14 +1621,14 @@ pub const cpu_atmega3250a = Cpu{
     .name = "atmega3250a",
     .llvm_name = "atmega3250a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1638,14 +1638,14 @@ pub const cpu_atmega3250p = Cpu{
     .name = "atmega3250p",
     .llvm_name = "atmega3250p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1655,14 +1655,14 @@ pub const cpu_atmega3250pa = Cpu{
     .name = "atmega3250pa",
     .llvm_name = "atmega3250pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1672,14 +1672,14 @@ pub const cpu_atmega325a = Cpu{
     .name = "atmega325a",
     .llvm_name = "atmega325a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1689,14 +1689,14 @@ pub const cpu_atmega325p = Cpu{
     .name = "atmega325p",
     .llvm_name = "atmega325p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1706,14 +1706,14 @@ pub const cpu_atmega325pa = Cpu{
     .name = "atmega325pa",
     .llvm_name = "atmega325pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1723,14 +1723,14 @@ pub const cpu_atmega328 = Cpu{
     .name = "atmega328",
     .llvm_name = "atmega328",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1740,14 +1740,14 @@ pub const cpu_atmega328p = Cpu{
     .name = "atmega328p",
     .llvm_name = "atmega328p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1757,14 +1757,14 @@ pub const cpu_atmega329 = Cpu{
     .name = "atmega329",
     .llvm_name = "atmega329",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1774,14 +1774,14 @@ pub const cpu_atmega3290 = Cpu{
     .name = "atmega3290",
     .llvm_name = "atmega3290",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1791,14 +1791,14 @@ pub const cpu_atmega3290a = Cpu{
     .name = "atmega3290a",
     .llvm_name = "atmega3290a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1808,14 +1808,14 @@ pub const cpu_atmega3290p = Cpu{
     .name = "atmega3290p",
     .llvm_name = "atmega3290p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1825,14 +1825,14 @@ pub const cpu_atmega3290pa = Cpu{
     .name = "atmega3290pa",
     .llvm_name = "atmega3290pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1842,14 +1842,14 @@ pub const cpu_atmega329a = Cpu{
     .name = "atmega329a",
     .llvm_name = "atmega329a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1859,14 +1859,14 @@ pub const cpu_atmega329p = Cpu{
     .name = "atmega329p",
     .llvm_name = "atmega329p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1876,14 +1876,14 @@ pub const cpu_atmega329pa = Cpu{
     .name = "atmega329pa",
     .llvm_name = "atmega329pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1893,14 +1893,14 @@ pub const cpu_atmega32a = Cpu{
     .name = "atmega32a",
     .llvm_name = "atmega32a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1910,14 +1910,14 @@ pub const cpu_atmega32c1 = Cpu{
     .name = "atmega32c1",
     .llvm_name = "atmega32c1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1927,14 +1927,14 @@ pub const cpu_atmega32hvb = Cpu{
     .name = "atmega32hvb",
     .llvm_name = "atmega32hvb",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1944,14 +1944,14 @@ pub const cpu_atmega32hvbrevb = Cpu{
     .name = "atmega32hvbrevb",
     .llvm_name = "atmega32hvbrevb",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1961,14 +1961,14 @@ pub const cpu_atmega32m1 = Cpu{
     .name = "atmega32m1",
     .llvm_name = "atmega32m1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -1978,14 +1978,14 @@ pub const cpu_atmega32u2 = Cpu{
     .name = "atmega32u2",
     .llvm_name = "atmega32u2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -1994,14 +1994,14 @@ pub const cpu_atmega32u4 = Cpu{
     .name = "atmega32u4",
     .llvm_name = "atmega32u4",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2011,14 +2011,14 @@ pub const cpu_atmega32u6 = Cpu{
     .name = "atmega32u6",
     .llvm_name = "atmega32u6",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2028,14 +2028,14 @@ pub const cpu_atmega406 = Cpu{
     .name = "atmega406",
     .llvm_name = "atmega406",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2045,13 +2045,13 @@ pub const cpu_atmega48 = Cpu{
     .name = "atmega48",
     .llvm_name = "atmega48",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2061,13 +2061,13 @@ pub const cpu_atmega48a = Cpu{
     .name = "atmega48a",
     .llvm_name = "atmega48a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2077,13 +2077,13 @@ pub const cpu_atmega48p = Cpu{
     .name = "atmega48p",
     .llvm_name = "atmega48p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2093,13 +2093,13 @@ pub const cpu_atmega48pa = Cpu{
     .name = "atmega48pa",
     .llvm_name = "atmega48pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2109,14 +2109,14 @@ pub const cpu_atmega64 = Cpu{
     .name = "atmega64",
     .llvm_name = "atmega64",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2126,14 +2126,14 @@ pub const cpu_atmega640 = Cpu{
     .name = "atmega640",
     .llvm_name = "atmega640",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2143,14 +2143,14 @@ pub const cpu_atmega644 = Cpu{
     .name = "atmega644",
     .llvm_name = "atmega644",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2160,14 +2160,14 @@ pub const cpu_atmega644a = Cpu{
     .name = "atmega644a",
     .llvm_name = "atmega644a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2177,14 +2177,14 @@ pub const cpu_atmega644p = Cpu{
     .name = "atmega644p",
     .llvm_name = "atmega644p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2194,14 +2194,14 @@ pub const cpu_atmega644pa = Cpu{
     .name = "atmega644pa",
     .llvm_name = "atmega644pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2211,14 +2211,14 @@ pub const cpu_atmega644rfr2 = Cpu{
     .name = "atmega644rfr2",
     .llvm_name = "atmega644rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2228,14 +2228,14 @@ pub const cpu_atmega645 = Cpu{
     .name = "atmega645",
     .llvm_name = "atmega645",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2245,14 +2245,14 @@ pub const cpu_atmega6450 = Cpu{
     .name = "atmega6450",
     .llvm_name = "atmega6450",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2262,14 +2262,14 @@ pub const cpu_atmega6450a = Cpu{
     .name = "atmega6450a",
     .llvm_name = "atmega6450a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2279,14 +2279,14 @@ pub const cpu_atmega6450p = Cpu{
     .name = "atmega6450p",
     .llvm_name = "atmega6450p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2296,14 +2296,14 @@ pub const cpu_atmega645a = Cpu{
     .name = "atmega645a",
     .llvm_name = "atmega645a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2313,14 +2313,14 @@ pub const cpu_atmega645p = Cpu{
     .name = "atmega645p",
     .llvm_name = "atmega645p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2330,14 +2330,14 @@ pub const cpu_atmega649 = Cpu{
     .name = "atmega649",
     .llvm_name = "atmega649",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2347,14 +2347,14 @@ pub const cpu_atmega6490 = Cpu{
     .name = "atmega6490",
     .llvm_name = "atmega6490",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2364,14 +2364,14 @@ pub const cpu_atmega6490a = Cpu{
     .name = "atmega6490a",
     .llvm_name = "atmega6490a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2381,14 +2381,14 @@ pub const cpu_atmega6490p = Cpu{
     .name = "atmega6490p",
     .llvm_name = "atmega6490p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2398,14 +2398,14 @@ pub const cpu_atmega649a = Cpu{
     .name = "atmega649a",
     .llvm_name = "atmega649a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2415,14 +2415,14 @@ pub const cpu_atmega649p = Cpu{
     .name = "atmega649p",
     .llvm_name = "atmega649p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2432,14 +2432,14 @@ pub const cpu_atmega64a = Cpu{
     .name = "atmega64a",
     .llvm_name = "atmega64a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2449,14 +2449,14 @@ pub const cpu_atmega64c1 = Cpu{
     .name = "atmega64c1",
     .llvm_name = "atmega64c1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2466,14 +2466,14 @@ pub const cpu_atmega64hve = Cpu{
     .name = "atmega64hve",
     .llvm_name = "atmega64hve",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2483,14 +2483,14 @@ pub const cpu_atmega64m1 = Cpu{
     .name = "atmega64m1",
     .llvm_name = "atmega64m1",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2500,14 +2500,14 @@ pub const cpu_atmega64rfr2 = Cpu{
     .name = "atmega64rfr2",
     .llvm_name = "atmega64rfr2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2517,13 +2517,13 @@ pub const cpu_atmega8 = Cpu{
     .name = "atmega8",
     .llvm_name = "atmega8",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2563,13 +2563,13 @@ pub const cpu_atmega88 = Cpu{
     .name = "atmega88",
     .llvm_name = "atmega88",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2579,13 +2579,13 @@ pub const cpu_atmega88a = Cpu{
     .name = "atmega88a",
     .llvm_name = "atmega88a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2595,13 +2595,13 @@ pub const cpu_atmega88p = Cpu{
     .name = "atmega88p",
     .llvm_name = "atmega88p",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2611,13 +2611,13 @@ pub const cpu_atmega88pa = Cpu{
     .name = "atmega88pa",
     .llvm_name = "atmega88pa",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2627,13 +2627,13 @@ pub const cpu_atmega8a = Cpu{
     .name = "atmega8a",
     .llvm_name = "atmega8a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2643,13 +2643,13 @@ pub const cpu_atmega8hva = Cpu{
     .name = "atmega8hva",
     .llvm_name = "atmega8hva",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -2659,14 +2659,14 @@ pub const cpu_atmega8u2 = Cpu{
     .name = "atmega8u2",
     .llvm_name = "atmega8u2",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2721,13 +2721,13 @@ pub const cpu_attiny13 = Cpu{
     .name = "attiny13",
     .llvm_name = "attiny13",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2736,13 +2736,13 @@ pub const cpu_attiny13a = Cpu{
     .name = "attiny13a",
     .llvm_name = "attiny13a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2759,14 +2759,14 @@ pub const cpu_attiny1634 = Cpu{
     .name = "attiny1634",
     .llvm_name = "attiny1634",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2775,14 +2775,14 @@ pub const cpu_attiny167 = Cpu{
     .name = "attiny167",
     .llvm_name = "attiny167",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2812,13 +2812,13 @@ pub const cpu_attiny2313 = Cpu{
     .name = "attiny2313",
     .llvm_name = "attiny2313",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2827,13 +2827,13 @@ pub const cpu_attiny2313a = Cpu{
     .name = "attiny2313a",
     .llvm_name = "attiny2313a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2842,13 +2842,13 @@ pub const cpu_attiny24 = Cpu{
     .name = "attiny24",
     .llvm_name = "attiny24",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2857,13 +2857,13 @@ pub const cpu_attiny24a = Cpu{
     .name = "attiny24a",
     .llvm_name = "attiny24a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2872,13 +2872,13 @@ pub const cpu_attiny25 = Cpu{
     .name = "attiny25",
     .llvm_name = "attiny25",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2899,13 +2899,13 @@ pub const cpu_attiny261 = Cpu{
     .name = "attiny261",
     .llvm_name = "attiny261",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2914,13 +2914,13 @@ pub const cpu_attiny261a = Cpu{
     .name = "attiny261a",
     .llvm_name = "attiny261a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2957,13 +2957,13 @@ pub const cpu_attiny4313 = Cpu{
     .name = "attiny4313",
     .llvm_name = "attiny4313",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2972,13 +2972,13 @@ pub const cpu_attiny43u = Cpu{
     .name = "attiny43u",
     .llvm_name = "attiny43u",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -2987,13 +2987,13 @@ pub const cpu_attiny44 = Cpu{
     .name = "attiny44",
     .llvm_name = "attiny44",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3002,13 +3002,13 @@ pub const cpu_attiny44a = Cpu{
     .name = "attiny44a",
     .llvm_name = "attiny44a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3017,13 +3017,13 @@ pub const cpu_attiny45 = Cpu{
     .name = "attiny45",
     .llvm_name = "attiny45",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3032,13 +3032,13 @@ pub const cpu_attiny461 = Cpu{
     .name = "attiny461",
     .llvm_name = "attiny461",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3047,13 +3047,13 @@ pub const cpu_attiny461a = Cpu{
     .name = "attiny461a",
     .llvm_name = "attiny461a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3062,13 +3062,13 @@ pub const cpu_attiny48 = Cpu{
     .name = "attiny48",
     .llvm_name = "attiny48",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3087,13 +3087,13 @@ pub const cpu_attiny828 = Cpu{
     .name = "attiny828",
     .llvm_name = "attiny828",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3102,13 +3102,13 @@ pub const cpu_attiny84 = Cpu{
     .name = "attiny84",
     .llvm_name = "attiny84",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3117,13 +3117,13 @@ pub const cpu_attiny84a = Cpu{
     .name = "attiny84a",
     .llvm_name = "attiny84a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3132,13 +3132,13 @@ pub const cpu_attiny85 = Cpu{
     .name = "attiny85",
     .llvm_name = "attiny85",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3147,13 +3147,13 @@ pub const cpu_attiny861 = Cpu{
     .name = "attiny861",
     .llvm_name = "attiny861",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3162,13 +3162,13 @@ pub const cpu_attiny861a = Cpu{
     .name = "attiny861a",
     .llvm_name = "attiny861a",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3177,13 +3177,13 @@ pub const cpu_attiny87 = Cpu{
     .name = "attiny87",
     .llvm_name = "attiny87",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3192,13 +3192,13 @@ pub const cpu_attiny88 = Cpu{
     .name = "attiny88",
     .llvm_name = "attiny88",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -3217,20 +3217,20 @@ pub const cpu_atxmega128a1 = Cpu{
     .name = "atxmega128a1",
     .llvm_name = "atxmega128a1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3239,21 +3239,21 @@ pub const cpu_atxmega128a1u = Cpu{
     .name = "atxmega128a1u",
     .llvm_name = "atxmega128a1u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3262,20 +3262,20 @@ pub const cpu_atxmega128a3 = Cpu{
     .name = "atxmega128a3",
     .llvm_name = "atxmega128a3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3284,21 +3284,21 @@ pub const cpu_atxmega128a3u = Cpu{
     .name = "atxmega128a3u",
     .llvm_name = "atxmega128a3u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3307,21 +3307,21 @@ pub const cpu_atxmega128a4u = Cpu{
     .name = "atxmega128a4u",
     .llvm_name = "atxmega128a4u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3330,21 +3330,21 @@ pub const cpu_atxmega128b1 = Cpu{
     .name = "atxmega128b1",
     .llvm_name = "atxmega128b1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3353,21 +3353,21 @@ pub const cpu_atxmega128b3 = Cpu{
     .name = "atxmega128b3",
     .llvm_name = "atxmega128b3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3376,21 +3376,21 @@ pub const cpu_atxmega128c3 = Cpu{
     .name = "atxmega128c3",
     .llvm_name = "atxmega128c3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3399,20 +3399,20 @@ pub const cpu_atxmega128d3 = Cpu{
     .name = "atxmega128d3",
     .llvm_name = "atxmega128d3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3421,20 +3421,20 @@ pub const cpu_atxmega128d4 = Cpu{
     .name = "atxmega128d4",
     .llvm_name = "atxmega128d4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3443,20 +3443,20 @@ pub const cpu_atxmega16a4 = Cpu{
     .name = "atxmega16a4",
     .llvm_name = "atxmega16a4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3465,21 +3465,21 @@ pub const cpu_atxmega16a4u = Cpu{
     .name = "atxmega16a4u",
     .llvm_name = "atxmega16a4u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3488,21 +3488,21 @@ pub const cpu_atxmega16c4 = Cpu{
     .name = "atxmega16c4",
     .llvm_name = "atxmega16c4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3511,20 +3511,20 @@ pub const cpu_atxmega16d4 = Cpu{
     .name = "atxmega16d4",
     .llvm_name = "atxmega16d4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3533,20 +3533,20 @@ pub const cpu_atxmega16e5 = Cpu{
     .name = "atxmega16e5",
     .llvm_name = "atxmega16e5",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3555,20 +3555,20 @@ pub const cpu_atxmega192a3 = Cpu{
     .name = "atxmega192a3",
     .llvm_name = "atxmega192a3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3577,21 +3577,21 @@ pub const cpu_atxmega192a3u = Cpu{
     .name = "atxmega192a3u",
     .llvm_name = "atxmega192a3u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3600,21 +3600,21 @@ pub const cpu_atxmega192c3 = Cpu{
     .name = "atxmega192c3",
     .llvm_name = "atxmega192c3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3623,20 +3623,20 @@ pub const cpu_atxmega192d3 = Cpu{
     .name = "atxmega192d3",
     .llvm_name = "atxmega192d3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3645,20 +3645,20 @@ pub const cpu_atxmega256a3 = Cpu{
     .name = "atxmega256a3",
     .llvm_name = "atxmega256a3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3667,20 +3667,20 @@ pub const cpu_atxmega256a3b = Cpu{
     .name = "atxmega256a3b",
     .llvm_name = "atxmega256a3b",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3689,21 +3689,21 @@ pub const cpu_atxmega256a3bu = Cpu{
     .name = "atxmega256a3bu",
     .llvm_name = "atxmega256a3bu",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3712,21 +3712,21 @@ pub const cpu_atxmega256a3u = Cpu{
     .name = "atxmega256a3u",
     .llvm_name = "atxmega256a3u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3735,21 +3735,21 @@ pub const cpu_atxmega256c3 = Cpu{
     .name = "atxmega256c3",
     .llvm_name = "atxmega256c3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3758,20 +3758,20 @@ pub const cpu_atxmega256d3 = Cpu{
     .name = "atxmega256d3",
     .llvm_name = "atxmega256d3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3780,20 +3780,20 @@ pub const cpu_atxmega32a4 = Cpu{
     .name = "atxmega32a4",
     .llvm_name = "atxmega32a4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3802,21 +3802,21 @@ pub const cpu_atxmega32a4u = Cpu{
     .name = "atxmega32a4u",
     .llvm_name = "atxmega32a4u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3825,21 +3825,21 @@ pub const cpu_atxmega32c4 = Cpu{
     .name = "atxmega32c4",
     .llvm_name = "atxmega32c4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3848,20 +3848,20 @@ pub const cpu_atxmega32d4 = Cpu{
     .name = "atxmega32d4",
     .llvm_name = "atxmega32d4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3870,20 +3870,20 @@ pub const cpu_atxmega32e5 = Cpu{
     .name = "atxmega32e5",
     .llvm_name = "atxmega32e5",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3892,20 +3892,20 @@ pub const cpu_atxmega32x1 = Cpu{
     .name = "atxmega32x1",
     .llvm_name = "atxmega32x1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3914,21 +3914,21 @@ pub const cpu_atxmega384c3 = Cpu{
     .name = "atxmega384c3",
     .llvm_name = "atxmega384c3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3937,20 +3937,20 @@ pub const cpu_atxmega384d3 = Cpu{
     .name = "atxmega384d3",
     .llvm_name = "atxmega384d3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3959,20 +3959,20 @@ pub const cpu_atxmega64a1 = Cpu{
     .name = "atxmega64a1",
     .llvm_name = "atxmega64a1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -3981,21 +3981,21 @@ pub const cpu_atxmega64a1u = Cpu{
     .name = "atxmega64a1u",
     .llvm_name = "atxmega64a1u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4004,20 +4004,20 @@ pub const cpu_atxmega64a3 = Cpu{
     .name = "atxmega64a3",
     .llvm_name = "atxmega64a3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4026,21 +4026,21 @@ pub const cpu_atxmega64a3u = Cpu{
     .name = "atxmega64a3u",
     .llvm_name = "atxmega64a3u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4049,21 +4049,21 @@ pub const cpu_atxmega64a4u = Cpu{
     .name = "atxmega64a4u",
     .llvm_name = "atxmega64a4u",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4072,21 +4072,21 @@ pub const cpu_atxmega64b1 = Cpu{
     .name = "atxmega64b1",
     .llvm_name = "atxmega64b1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4095,21 +4095,21 @@ pub const cpu_atxmega64b3 = Cpu{
     .name = "atxmega64b3",
     .llvm_name = "atxmega64b3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4118,21 +4118,21 @@ pub const cpu_atxmega64c3 = Cpu{
     .name = "atxmega64c3",
     .llvm_name = "atxmega64c3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
-        &feature_movw,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_rmw,
-        &feature_elpm,
-        &feature_break,
+        &feature_movw,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4141,20 +4141,20 @@ pub const cpu_atxmega64d3 = Cpu{
     .name = "atxmega64d3",
     .llvm_name = "atxmega64d3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4163,20 +4163,20 @@ pub const cpu_atxmega64d4 = Cpu{
     .name = "atxmega64d4",
     .llvm_name = "atxmega64d4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4185,20 +4185,20 @@ pub const cpu_atxmega8e5 = Cpu{
     .name = "atxmega8e5",
     .llvm_name = "atxmega8e5",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4226,13 +4226,13 @@ pub const cpu_avr25 = Cpu{
     .name = "avr25",
     .llvm_name = "avr25",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -4241,11 +4241,11 @@ pub const cpu_avr3 = Cpu{
     .name = "avr3",
     .llvm_name = "avr3",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -4253,12 +4253,12 @@ pub const cpu_avr31 = Cpu{
     .name = "avr31",
     .llvm_name = "avr31",
     .dependencies = &[_]*const Feature {
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
-        &feature_elpm,
         &feature_ijmpcall,
-        &feature_jmpcall,
     },
 };
 
@@ -4266,14 +4266,14 @@ pub const cpu_avr35 = Cpu{
     .name = "avr35",
     .llvm_name = "avr35",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
     },
 };
@@ -4282,13 +4282,13 @@ pub const cpu_avr4 = Cpu{
     .name = "avr4",
     .llvm_name = "avr4",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -4298,14 +4298,14 @@ pub const cpu_avr5 = Cpu{
     .name = "avr5",
     .llvm_name = "avr5",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
@@ -4315,17 +4315,17 @@ pub const cpu_avr51 = Cpu{
     .name = "avr51",
     .llvm_name = "avr51",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4334,17 +4334,17 @@ pub const cpu_avr6 = Cpu{
     .name = "avr6",
     .llvm_name = "avr6",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4363,20 +4363,20 @@ pub const cpu_avrxmega1 = Cpu{
     .name = "avrxmega1",
     .llvm_name = "avrxmega1",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4385,20 +4385,20 @@ pub const cpu_avrxmega2 = Cpu{
     .name = "avrxmega2",
     .llvm_name = "avrxmega2",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4407,20 +4407,20 @@ pub const cpu_avrxmega3 = Cpu{
     .name = "avrxmega3",
     .llvm_name = "avrxmega3",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4429,20 +4429,20 @@ pub const cpu_avrxmega4 = Cpu{
     .name = "avrxmega4",
     .llvm_name = "avrxmega4",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4451,20 +4451,20 @@ pub const cpu_avrxmega5 = Cpu{
     .name = "avrxmega5",
     .llvm_name = "avrxmega5",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4473,20 +4473,20 @@ pub const cpu_avrxmega6 = Cpu{
     .name = "avrxmega6",
     .llvm_name = "avrxmega6",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4495,20 +4495,20 @@ pub const cpu_avrxmega7 = Cpu{
     .name = "avrxmega7",
     .llvm_name = "avrxmega7",
     .dependencies = &[_]*const Feature {
-        &feature_eijmpcall,
+        &feature_spmx,
+        &feature_des,
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
+        &feature_elpm,
         &feature_sram,
         &feature_addsubiw,
+        &feature_elpmx,
         &feature_movw,
-        &feature_elpm,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_des,
-        &feature_spmx,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
+        &feature_eijmpcall,
         &feature_spm,
-        &feature_elpmx,
         &feature_mul,
     },
 };
@@ -4517,14 +4517,14 @@ pub const cpu_m3000 = Cpu{
     .name = "m3000",
     .llvm_name = "m3000",
     .dependencies = &[_]*const Feature {
+        &feature_lpmx,
+        &feature_jmpcall,
         &feature_lpm,
         &feature_sram,
         &feature_addsubiw,
         &feature_movw,
-        &feature_break,
         &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_jmpcall,
+        &feature_break,
         &feature_spm,
         &feature_mul,
     },
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 6eab968c2300cf4bf264fafd9a067c5e4281137e..7c7bb3bfbe2df1f3e67ff395d943505b0d5eb4f5 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -22,13 +22,13 @@ pub const feature_cnmips = Feature{
     .llvm_name = "cnmips",
     .description = "Octeon cnMIPS Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -161,10 +161,10 @@ pub const feature_mips3 = Feature{
     .llvm_name = "mips3",
     .description = "MIPS III ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_gp64,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -190,12 +190,12 @@ pub const feature_mips4 = Feature{
     .llvm_name = "mips4",
     .description = "MIPS IV ISA Support",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
+        &feature_mips4_32,
         &feature_mips3_32r2,
         &feature_mips3_32,
-        &feature_gp64,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_gp64,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -221,13 +221,13 @@ pub const feature_mips5 = Feature{
     .llvm_name = "mips5",
     .description = "MIPS V ISA Support [highly experimental]",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -264,12 +264,12 @@ pub const feature_mips32r2 = Feature{
     .llvm_name = "mips32r2",
     .description = "Mips32r2 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
     },
 };
 
@@ -278,12 +278,12 @@ pub const feature_mips32r3 = Feature{
     .llvm_name = "mips32r3",
     .description = "Mips32r3 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
     },
 };
 
@@ -292,12 +292,12 @@ pub const feature_mips32r5 = Feature{
     .llvm_name = "mips32r5",
     .description = "Mips32r5 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
     },
 };
 
@@ -306,15 +306,15 @@ pub const feature_mips32r6 = Feature{
     .llvm_name = "mips32r6",
     .description = "Mips32r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_nan2008,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips1,
         &feature_fp64,
+        &feature_abs2008,
     },
 };
 
@@ -323,13 +323,13 @@ pub const feature_mips64 = Feature{
     .llvm_name = "mips64",
     .description = "Mips64 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -339,13 +339,13 @@ pub const feature_mips64r2 = Feature{
     .llvm_name = "mips64r2",
     .description = "Mips64r2 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -355,13 +355,13 @@ pub const feature_mips64r3 = Feature{
     .llvm_name = "mips64r3",
     .description = "Mips64r3 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -371,13 +371,13 @@ pub const feature_mips64r5 = Feature{
     .llvm_name = "mips64r5",
     .description = "Mips64r5 ISA Support",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
     },
 };
@@ -387,16 +387,16 @@ pub const feature_mips64r6 = Feature{
     .llvm_name = "mips64r6",
     .description = "Mips64r6 ISA Support [experimental]",
     .dependencies = &[_]*const Feature {
-        &feature_nan2008,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_nan2008,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_abs2008,
+        &feature_mips1,
         &feature_fp64,
+        &feature_abs2008,
     },
 };
 
@@ -488,25 +488,17 @@ pub const feature_virt = Feature{
     },
 };
 
-pub const feature_xgot = Feature{
-    .name = "xgot",
-    .llvm_name = "xgot",
-    .description = "Assume 32-bit GOT",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_p5600 = Feature{
     .name = "p5600",
     .llvm_name = "p5600",
     .description = "The P5600 Processor",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
     },
 };
 
@@ -559,7 +551,6 @@ pub const features = &[_]*const Feature {
     &feature_useTccInDiv,
     &feature_vfpu,
     &feature_virt,
-    &feature_xgot,
     &feature_p5600,
 };
 
@@ -584,10 +575,10 @@ pub const cpu_mips3 = Cpu{
     .name = "mips3",
     .llvm_name = "mips3",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_gp64,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips3,
     },
@@ -608,12 +599,12 @@ pub const cpu_mips32r2 = Cpu{
     .name = "mips32r2",
     .llvm_name = "mips32r2",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_mips32r2,
     },
 };
@@ -622,12 +613,12 @@ pub const cpu_mips32r3 = Cpu{
     .name = "mips32r3",
     .llvm_name = "mips32r3",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_mips32r3,
     },
 };
@@ -636,12 +627,12 @@ pub const cpu_mips32r5 = Cpu{
     .name = "mips32r5",
     .llvm_name = "mips32r5",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_mips32r5,
     },
 };
@@ -650,15 +641,15 @@ pub const cpu_mips32r6 = Cpu{
     .name = "mips32r6",
     .llvm_name = "mips32r6",
     .dependencies = &[_]*const Feature {
-        &feature_nan2008,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
-        &feature_abs2008,
+        &feature_nan2008,
+        &feature_mips1,
         &feature_fp64,
+        &feature_abs2008,
         &feature_mips32r6,
     },
 };
@@ -667,12 +658,12 @@ pub const cpu_mips4 = Cpu{
     .name = "mips4",
     .llvm_name = "mips4",
     .dependencies = &[_]*const Feature {
-        &feature_mips1,
+        &feature_mips4_32,
         &feature_mips3_32r2,
         &feature_mips3_32,
-        &feature_gp64,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_gp64,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips4,
     },
@@ -682,13 +673,13 @@ pub const cpu_mips5 = Cpu{
     .name = "mips5",
     .llvm_name = "mips5",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips5,
     },
@@ -698,13 +689,13 @@ pub const cpu_mips64 = Cpu{
     .name = "mips64",
     .llvm_name = "mips64",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips64,
     },
@@ -714,13 +705,13 @@ pub const cpu_mips64r2 = Cpu{
     .name = "mips64r2",
     .llvm_name = "mips64r2",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips64r2,
     },
@@ -730,13 +721,13 @@ pub const cpu_mips64r3 = Cpu{
     .name = "mips64r3",
     .llvm_name = "mips64r3",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips64r3,
     },
@@ -746,13 +737,13 @@ pub const cpu_mips64r5 = Cpu{
     .name = "mips64r5",
     .llvm_name = "mips64r5",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_mips64r5,
     },
@@ -762,16 +753,16 @@ pub const cpu_mips64r6 = Cpu{
     .name = "mips64r6",
     .llvm_name = "mips64r6",
     .dependencies = &[_]*const Feature {
-        &feature_nan2008,
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
+        &feature_nan2008,
         &feature_gp64,
-        &feature_mips4_32,
-        &feature_abs2008,
+        &feature_mips1,
         &feature_fp64,
+        &feature_abs2008,
         &feature_mips64r6,
     },
 };
@@ -780,13 +771,13 @@ pub const cpu_octeon = Cpu{
     .name = "octeon",
     .llvm_name = "octeon",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
         &feature_gp64,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_fp64,
         &feature_cnmips,
         &feature_mips64r2,
@@ -797,12 +788,12 @@ pub const cpu_p5600 = Cpu{
     .name = "p5600",
     .llvm_name = "p5600",
     .dependencies = &[_]*const Feature {
+        &feature_mips4_32,
         &feature_mips5_32r2,
-        &feature_mips1,
         &feature_mips3_32r2,
         &feature_mips3_32,
         &feature_mips4_32r2,
-        &feature_mips4_32,
+        &feature_mips1,
         &feature_p5600,
     },
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index bb68049ecad762a50ccd983727d80aef5f75ca6a..f0d475a6e5999ae61069f1197b5924e993c1094e 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -296,8 +296,8 @@ pub const feature_power9Altivec = Feature{
     .llvm_name = "power9-altivec",
     .description = "Enable POWER9 Altivec instructions",
     .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
         &feature_isaV30Instructions,
+        &feature_hardFloat,
     },
 };
 
@@ -306,8 +306,8 @@ pub const feature_power9Vector = Feature{
     .llvm_name = "power9-vector",
     .description = "Enable POWER9 vector instructions",
     .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
         &feature_isaV30Instructions,
+        &feature_hardFloat,
     },
 };
 
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index a3f21adc0139c8c67fd1356615038296f9877399..bf82cc9f822cbbb623d4bd91b26f9efab22e09d8 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -17,14 +17,6 @@ pub const feature_e = Feature{
     },
 };
 
-pub const feature_rvcHints = Feature{
-    .name = "rvcHints",
-    .llvm_name = "rvc-hints",
-    .description = "Enable RVC Hint Instructions.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_relax = Feature{
     .name = "relax",
     .llvm_name = "relax",
@@ -77,7 +69,6 @@ pub const feature_m = Feature{
 pub const features = &[_]*const Feature {
     &feature_bit64,
     &feature_e,
-    &feature_rvcHints,
     &feature_relax,
     &feature_a,
     &feature_c,
@@ -90,7 +81,6 @@ pub const cpu_genericRv32 = Cpu{
     .name = "genericRv32",
     .llvm_name = "generic-rv32",
     .dependencies = &[_]*const Feature {
-        &feature_rvcHints,
     },
 };
 
@@ -99,7 +89,6 @@ pub const cpu_genericRv64 = Cpu{
     .llvm_name = "generic-rv64",
     .dependencies = &[_]*const Feature {
         &feature_bit64,
-        &feature_rvcHints,
     },
 };
 
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 7966f4191506720b3709a87f6531109f5add68f9..1a3f8ec9705a77ce58606c2388e1e1938483a3d7 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -553,48 +553,6 @@ pub const cpu_z14 = Cpu{
     },
 };
 
-pub const cpu_z15 = Cpu{
-    .name = "z15",
-    .llvm_name = "z15",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_deflateConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_enhancedSort,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_guardedStorage,
-        &feature_highWord,
-        &feature_insertReferenceBitsMultiple,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_messageSecurityAssistExtension7,
-        &feature_messageSecurityAssistExtension8,
-        &feature_messageSecurityAssistExtension9,
-        &feature_miscellaneousExtensions,
-        &feature_miscellaneousExtensions2,
-        &feature_miscellaneousExtensions3,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-        &feature_vectorEnhancements1,
-        &feature_vectorEnhancements2,
-        &feature_vectorPackedDecimal,
-        &feature_vectorPackedDecimalEnhancement,
-    },
-};
-
 pub const cpu_z196 = Cpu{
     .name = "z196",
     .llvm_name = "z196",
@@ -647,7 +605,6 @@ pub const cpus = &[_]*const Cpu {
     &cpu_z10,
     &cpu_z13,
     &cpu_z14,
-    &cpu_z15,
     &cpu_z196,
     &cpu_zEC12,
 };
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index f7469ba47fee4fba216ac64112c5b6e4559c9192..e755d2cd88bde7e4ffdc9adaf383bf8119034076 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -197,14 +197,6 @@ pub const feature_avx512dq = Feature{
     },
 };
 
-pub const feature_mpx = Feature{
-    .name = "mpx",
-    .llvm_name = "mpx",
-    .description = "Deprecated. Support MPX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_enqcmd = Feature{
     .name = "enqcmd",
     .llvm_name = "enqcmd",
@@ -484,6 +476,14 @@ pub const feature_movdiri = Feature{
     },
 };
 
+pub const feature_mpx = Feature{
+    .name = "mpx",
+    .llvm_name = "mpx",
+    .description = "Support MPX instructions",
+    .dependencies = &[_]*const Feature {
+    },
+};
+
 pub const feature_mwaitx = Feature{
     .name = "mwaitx",
     .llvm_name = "mwaitx",
@@ -598,14 +598,6 @@ pub const feature_padShortFunctions = Feature{
     },
 };
 
-pub const feature_prefer128Bit = Feature{
-    .name = "prefer128Bit",
-    .llvm_name = "prefer-128-bit",
-    .description = "Prefer 128-bit AVX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_prefer256Bit = Feature{
     .name = "prefer256Bit",
     .llvm_name = "prefer-256-bit",
@@ -880,14 +872,6 @@ pub const feature_tbm = Feature{
     },
 };
 
-pub const feature_useAa = Feature{
-    .name = "useAa",
-    .llvm_name = "use-aa",
-    .description = "Use alias analysis during codegen",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
 pub const feature_vaes = Feature{
     .name = "vaes",
     .llvm_name = "vaes",
@@ -1073,7 +1057,6 @@ pub const features = &[_]*const Feature {
     &feature_cx8,
     &feature_cx16,
     &feature_avx512dq,
-    &feature_mpx,
     &feature_enqcmd,
     &feature_avx512er,
     &feature_ermsb,
@@ -1108,6 +1091,7 @@ pub const features = &[_]*const Feature {
     &feature_movbe,
     &feature_movdir64b,
     &feature_movdiri,
+    &feature_mpx,
     &feature_mwaitx,
     &feature_macrofusion,
     &feature_mergeToThreewayBranch,
@@ -1122,7 +1106,6 @@ pub const features = &[_]*const Feature {
     &feature_prfchw,
     &feature_ptwrite,
     &feature_padShortFunctions,
-    &feature_prefer128Bit,
     &feature_prefer256Bit,
     &feature_rdpid,
     &feature_rdrnd,
@@ -1156,7 +1139,6 @@ pub const features = &[_]*const Feature {
     &feature_slowUnalignedMem32,
     &feature_softFloat,
     &feature_tbm,
-    &feature_useAa,
     &feature_vaes,
     &feature_avx512vbmi,
     &feature_avx512vbmi2,
@@ -1727,6 +1709,7 @@ pub const cpu_cannonlake = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -1734,7 +1717,6 @@ pub const cpu_cannonlake = Cpu{
         &feature_pku,
         &feature_popcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdrnd,
         &feature_rdseed,
         &feature_sgx,
@@ -1788,6 +1770,7 @@ pub const cpu_cascadelake = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -1796,7 +1779,6 @@ pub const cpu_cascadelake = Cpu{
         &feature_popcnt,
         &feature_falseDepsPopcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdrnd,
         &feature_rdseed,
         &feature_sse42,
@@ -1849,6 +1831,7 @@ pub const cpu_cooperlake = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -1857,7 +1840,6 @@ pub const cpu_cooperlake = Cpu{
         &feature_popcnt,
         &feature_falseDepsPopcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdrnd,
         &feature_rdseed,
         &feature_sse42,
@@ -2059,6 +2041,7 @@ pub const cpu_goldmont = Cpu{
         &feature_sahf,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_nopl,
         &feature_pclmul,
         &feature_popcnt,
@@ -2096,6 +2079,7 @@ pub const cpu_goldmontPlus = Cpu{
         &feature_sahf,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_nopl,
         &feature_pclmul,
         &feature_popcnt,
@@ -2240,6 +2224,7 @@ pub const cpu_icelakeClient = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -2247,7 +2232,6 @@ pub const cpu_icelakeClient = Cpu{
         &feature_pku,
         &feature_popcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdpid,
         &feature_rdrnd,
         &feature_rdseed,
@@ -2310,6 +2294,7 @@ pub const cpu_icelakeServer = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -2318,7 +2303,6 @@ pub const cpu_icelakeServer = Cpu{
         &feature_pku,
         &feature_popcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdpid,
         &feature_rdrnd,
         &feature_rdseed,
@@ -2888,6 +2872,7 @@ pub const cpu_skx = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -2896,7 +2881,6 @@ pub const cpu_skx = Cpu{
         &feature_popcnt,
         &feature_falseDepsPopcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdrnd,
         &feature_rdseed,
         &feature_sse42,
@@ -2942,6 +2926,7 @@ pub const cpu_skylake = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -2999,6 +2984,7 @@ pub const cpu_skylakeAvx512 = Cpu{
         &feature_lzcnt,
         &feature_mmx,
         &feature_movbe,
+        &feature_mpx,
         &feature_macrofusion,
         &feature_mergeToThreewayBranch,
         &feature_nopl,
@@ -3007,7 +2993,6 @@ pub const cpu_skylakeAvx512 = Cpu{
         &feature_popcnt,
         &feature_falseDepsPopcnt,
         &feature_prfchw,
-        &feature_prefer256Bit,
         &feature_rdrnd,
         &feature_rdseed,
         &feature_sse42,
@@ -3052,80 +3037,6 @@ pub const cpu_slm = Cpu{
     },
 };
 
-pub const cpu_tigerlake = Cpu{
-    .name = "tigerlake",
-    .llvm_name = "tigerlake",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_avx512bitalg,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_gfni,
-        &feature_fastGather,
-        &feature_avx512ifma,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_movdir64b,
-        &feature_movdiri,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_prefer256Bit,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_shstk,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_vaes,
-        &feature_avx512vbmi,
-        &feature_avx512vbmi2,
-        &feature_avx512vl,
-        &feature_avx512vnni,
-        &feature_avx512vp2intersect,
-        &feature_vpclmulqdq,
-        &feature_avx512vpopcntdq,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
 pub const cpu_tremont = Cpu{
     .name = "tremont",
     .llvm_name = "tremont",
@@ -3146,6 +3057,7 @@ pub const cpu_tremont = Cpu{
         &feature_movbe,
         &feature_movdir64b,
         &feature_movdiri,
+        &feature_mpx,
         &feature_nopl,
         &feature_pclmul,
         &feature_popcnt,
@@ -3415,7 +3327,6 @@ pub const cpus = &[_]*const Cpu {
     &cpu_skylake,
     &cpu_skylakeAvx512,
     &cpu_slm,
-    &cpu_tigerlake,
     &cpu_tremont,
     &cpu_westmere,
     &cpu_winchipC6,
-- 
2.54.0


From 8902f3ca32c22656e1f11b562dc3ad6030da14ac Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Thu, 16 Jan 2020 15:02:45 -0500
Subject: [PATCH 053/116] Enable 64bit feature for riscv64

---
 src-self-hosted/stage1.zig | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index db6d281fea1f8e9b3e6ed581b8660e6aea39180e..98bd677c27642233aab326dc1d560e801f84a41f 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -833,7 +833,17 @@ export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2Ta
     return @as([*:0]const u8, null_terminated_empty_string);
 }
 
-const riscv_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
+const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
+    &std.target.riscv.feature_a,
+    &std.target.riscv.feature_c,
+    &std.target.riscv.feature_d,
+    &std.target.riscv.feature_f,
+    &std.target.riscv.feature_m,
+    &std.target.riscv.feature_relax,
+};
+
+const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
+    &std.target.riscv.feature_bit64,
     &std.target.riscv.feature_a,
     &std.target.riscv.feature_c,
     &std.target.riscv.feature_d,
@@ -880,9 +890,14 @@ fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os
     const allocator = std.heap.c_allocator;
 
     return switch (arch) {
-        .riscv32, .riscv64 => blk: {
+        .riscv32 => blk: {
             const ptr = try allocator.create(Stage2TargetDetails);
-            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv_default_features);
+            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv32_default_features);
+            break :blk ptr;
+        },
+        .riscv64 => blk: {
+            const ptr = try allocator.create(Stage2TargetDetails);
+            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv64_default_features);
             break :blk ptr;
         },
         .i386 => blk: {
-- 
2.54.0


From 35c681b7b18df1f8679457975f9dcfc6a4a53468 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Thu, 16 Jan 2020 15:26:53 -0500
Subject: [PATCH 054/116] Fix sentinel mismatch in llvm strings

Previously, buffers were used with toOwnedSlice() to create c strings
for LLVM cpu/feature strings. However, toOwnedSlice() shrinks the
string memory to the buffer's length, which cuts off the null terminator.
Now toSliceConst() is used instead, and the buffer is not deinited
so that the string memory is not freed.
---
 src-self-hosted/stage1.zig | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 98bd677c27642233aab326dc1d560e801f84a41f..3e52a670a359c036a836a61a891fbd948165750a 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -643,20 +643,20 @@ const Stage2TargetDetails = struct {
         var builtin_str_buffer = try std.Buffer.init(
             allocator,
             "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target.");
-        defer builtin_str_buffer.deinit();
 
         try builtin_str_buffer.append(@tagName(arch));
         try builtin_str_buffer.append(".cpu_");
         try builtin_str_buffer.append(cpu.name);
         try builtin_str_buffer.append("};");
+
         return Self{
             .allocator = allocator,
             .target_details = .{
                 .cpu = cpu,
             },
-            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.name),
+            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.llvm_name),
             .llvm_features_str = null_terminated_empty_string,
-            .builtin_str = builtin_str_buffer.toOwnedSlice(),
+            .builtin_str = builtin_str_buffer.toSliceConst(),
         };
     }
 
@@ -664,10 +664,8 @@ const Stage2TargetDetails = struct {
         var builtin_str_buffer = try std.Buffer.init(
             allocator, 
             "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n");
-        defer builtin_str_buffer.deinit();
 
         var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
-        defer llvm_features_buffer.deinit();
 
         // First, disable all features.
         // This way, we only get the ones the user requests.
@@ -691,17 +689,14 @@ const Stage2TargetDetails = struct {
 
         try builtin_str_buffer.append("}};");
 
-        // This is needed here because llvm_features_buffer.len() is no longer valid after toOwnedSlice().
-        const llvm_features_buffer_len = llvm_features_buffer.len();
-
         return Self{
             .allocator = allocator,
             .target_details = std.target.TargetDetails{
                 .features = features,
             },
             .llvm_cpu_str = null_terminated_empty_string,
-            .llvm_features_str = llvm_features_buffer.toOwnedSlice()[0..llvm_features_buffer_len :0],
-            .builtin_str = builtin_str_buffer.toOwnedSlice(),
+            .llvm_features_str = llvm_features_buffer.toSliceConst(),
+            .builtin_str = builtin_str_buffer.toSliceConst(),
         };
     }
 };
-- 
2.54.0


From 62e4cc06feb704391abdd591c048c0678dedcf5e Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Thu, 16 Jan 2020 15:31:53 -0500
Subject: [PATCH 055/116] Pass target details to c compiler

---
 src/codegen.cpp | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/src/codegen.cpp b/src/codegen.cpp
index d0749c9432e9e90b0a1302728e2945946a5885c2..5852f3f0042ca0e1fa8a48b735f47fbb327ebbf0 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -30,11 +30,6 @@ enum ResumeId {
     ResumeIdCall,
 };
 
-// TODO https://github.com/ziglang/zig/issues/2883
-// Until then we have this same default as Clang.
-// This avoids https://github.com/ziglang/zig/issues/3275
-static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
-
 static void init_darwin_native(CodeGen *g) {
     char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
     char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
@@ -9128,21 +9123,18 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
         args.append("-target");
         args.append(buf_ptr(&g->llvm_triple_str));
 
-        if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) {
-            // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's
-            // cross compilation CPU info for RISCV.
-            // TODO: https://github.com/ziglang/zig/issues/2883
+        if (g->target_details) {
             args.append("-Xclang");
-            args.append("-target-feature");
+            args.append("-target-cpu");
             args.append("-Xclang");
-            args.append(riscv_default_features);
-        } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) {
+            args.append(stage2_target_details_get_llvm_cpu(g->target_details));
             args.append("-Xclang");
             args.append("-target-feature");
             args.append("-Xclang");
-            args.append("-sse");
+            args.append(stage2_target_details_get_llvm_features(g->target_details));
         }
     }
+
     if (g->zig_target->os == OsFreestanding) {
         args.append("-ffreestanding");
     }
-- 
2.54.0


From 430077df1b1a723fab281c1472773be2cc2106e8 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Thu, 16 Jan 2020 15:39:20 -0500
Subject: [PATCH 056/116] Allow target details with no LLVM support

---
 lib/std/target.zig         |  4 ++--
 src-self-hosted/stage1.zig | 32 +++++++++++++++++++-------------
 2 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 9bb4936f1116ffdfbf85e6f8e1dbff42c10a57a0..7069f9e833c9bdc33a1431f27d9ce3abb293d35f 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -860,7 +860,7 @@ pub const x86 = @import("target/x86.zig");
 
 pub const Feature = struct {
     name: []const u8,
-    llvm_name: []const u8,
+    llvm_name: ?[]const u8,
     description: []const u8,
 
     dependencies: []*const Feature,
@@ -868,7 +868,7 @@ pub const Feature = struct {
 
 pub const Cpu = struct {
     name: []const u8,
-    llvm_name: []const u8,
+    llvm_name: ?[]const u8,
 
     dependencies: []*const Feature,
 };
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 3e52a670a359c036a836a61a891fbd948165750a..9b6ae2548b0fb9c56fa903e9c1e971eb1e637cc7 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -649,12 +649,14 @@ const Stage2TargetDetails = struct {
         try builtin_str_buffer.append(cpu.name);
         try builtin_str_buffer.append("};");
 
+        const cpu_string = cpu.llvm_name orelse "";
+
         return Self{
             .allocator = allocator,
             .target_details = .{
                 .cpu = cpu,
             },
-            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu.llvm_name),
+            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu_string),
             .llvm_features_str = null_terminated_empty_string,
             .builtin_str = builtin_str_buffer.toSliceConst(),
         };
@@ -670,21 +672,25 @@ const Stage2TargetDetails = struct {
         // First, disable all features.
         // This way, we only get the ones the user requests.
         for (std.target.getFeaturesForArch(arch)) |feature| {
-            try llvm_features_buffer.append("-");
-            try llvm_features_buffer.append(feature.llvm_name);
-            try llvm_features_buffer.append(",");
+            if (feature.llvm_name) |llvm_name| {
+                try llvm_features_buffer.append("-");
+                try llvm_features_buffer.append(llvm_name);
+                try llvm_features_buffer.append(",");
+            }
         }
 
         for (features) |feature| {
-            try llvm_features_buffer.append("+");
-            try llvm_features_buffer.append(feature.llvm_name);
-            try llvm_features_buffer.append(",");
-            
-            try builtin_str_buffer.append("&@import(\"std\").target.");
-            try builtin_str_buffer.append(@tagName(arch));
-            try builtin_str_buffer.append(".feature_");
-            try builtin_str_buffer.append(feature.name);
-            try builtin_str_buffer.append(",");
+            if (feature.llvm_name) |llvm_name| {
+                try llvm_features_buffer.append("+");
+                try llvm_features_buffer.append(llvm_name);
+                try llvm_features_buffer.append(",");
+                
+                try builtin_str_buffer.append("&@import(\"std\").target.");
+                try builtin_str_buffer.append(@tagName(arch));
+                try builtin_str_buffer.append(".feature_");
+                try builtin_str_buffer.append(feature.name);
+                try builtin_str_buffer.append(",");
+            }
         }
 
         try builtin_str_buffer.append("}};");
-- 
2.54.0


From c15623428e83bd8baa1450678bf59beab2c2df99 Mon Sep 17 00:00:00 2001
From: Layne Gustafson <lgustaf1@binghamton.edu>
Date: Fri, 17 Jan 2020 08:30:42 -0500
Subject: [PATCH 057/116] Pass target_details to child CodeGens

---
 src/codegen.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/codegen.cpp b/src/codegen.cpp
index 5852f3f0042ca0e1fa8a48b735f47fbb327ebbf0..b2cae32fa602accc3d89285df5bb257d809d7b66 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -10661,6 +10661,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
 
     CodeGen *child_gen = codegen_create(nullptr, root_src_path, parent_gen->zig_target, out_type,
         parent_gen->build_mode, parent_gen->zig_lib_dir, libc, get_global_cache_dir(), false, child_progress_node);
+    child_gen->target_details = parent_gen->target_details;
     child_gen->root_out_name = buf_create_from_str(name);
     child_gen->disable_gen_h = true;
     child_gen->want_stack_check = WantStackCheckDisabled;
-- 
2.54.0


From a867b43366c7fb132ec44a03f9b40ead888900fb Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 19 Jan 2020 02:40:35 -0500
Subject: [PATCH 058/116] progress towards merging

see BRANCH_TODO file
---
 BRANCH_TODO                |   55 +
 lib/std/buffer.zig         |    4 +-
 lib/std/build.zig          |   51 +-
 lib/std/builtin.zig        |    6 +
 lib/std/fmt.zig            |    5 +
 lib/std/meta.zig           |   18 +
 lib/std/os/linux/tls.zig   |    2 +-
 lib/std/std.zig            |    1 -
 lib/std/target.zig         |  324 ++--
 lib/std/target/aarch64.zig | 3129 ++++++++++++++++++------------------
 src-self-hosted/stage1.zig |  387 ++---
 src/all_types.hpp          |    2 -
 src/codegen.cpp            |   56 +-
 src/main.cpp               |   24 +-
 src/target.hpp             |    1 +
 src/userland.cpp           |   50 +-
 src/userland.h             |   18 +-
 17 files changed, 2089 insertions(+), 2044 deletions(-)
 create mode 100644 BRANCH_TODO

diff --git a/BRANCH_TODO b/BRANCH_TODO
new file mode 100644
index 0000000000000000000000000000000000000000..ad1ad76d21d198554c0ef6e8ac445050f43530c7
--- /dev/null
+++ b/BRANCH_TODO
@@ -0,0 +1,55 @@
+Finish these thigns before merging teh branch
+
+ * need to populate builtin.zig cpu_features, undefined is incorrect. I guess for zig0 it will be always baseline
+ * need to populate std.Target.current.cpu_features even for native target
+
+ * finish refactoring target/arch/*
+ * `zig builtin` integration 
+ * move target details to better location
+ * +foo,-bar vs foo,bar
+ * baseline features
+
+
+const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
+    &std.target.riscv.feature_a,
+    &std.target.riscv.feature_c,
+    &std.target.riscv.feature_d,
+    &std.target.riscv.feature_f,
+    &std.target.riscv.feature_m,
+    &std.target.riscv.feature_relax,
+};
+
+const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
+    &std.target.riscv.feature_bit64,
+    &std.target.riscv.feature_a,
+    &std.target.riscv.feature_c,
+    &std.target.riscv.feature_d,
+    &std.target.riscv.feature_f,
+    &std.target.riscv.feature_m,
+    &std.target.riscv.feature_relax,
+};
+
+const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
+    &std.target.x86.feature_cmov,
+    &std.target.x86.feature_cx8,
+    &std.target.x86.feature_fxsr,
+    &std.target.x86.feature_mmx,
+    &std.target.x86.feature_nopl,
+    &std.target.x86.feature_sse,
+    &std.target.x86.feature_sse2,
+    &std.target.x86.feature_slowUnalignedMem16,
+    &std.target.x86.feature_x87,
+};
+
+// Same as above but without sse.
+const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{
+    &std.target.x86.feature_cmov,
+    &std.target.x86.feature_cx8,
+    &std.target.x86.feature_fxsr,
+    &std.target.x86.feature_mmx,
+    &std.target.x86.feature_nopl,
+    &std.target.x86.feature_slowUnalignedMem16,
+    &std.target.x86.feature_x87,
+};
+
+
diff --git a/lib/std/buffer.zig b/lib/std/buffer.zig
index 6313d693b71c9aeca1386512f6da83aed5e184c3..21f73112fa497f2d05e7651ac97739b806fe7297 100644
--- a/lib/std/buffer.zig
+++ b/lib/std/buffer.zig
@@ -57,11 +57,11 @@ pub const Buffer = struct {
 
     /// The caller owns the returned memory. The Buffer becomes null and
     /// is safe to `deinit`.
-    pub fn toOwnedSlice(self: *Buffer) []u8 {
+    pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
         const allocator = self.list.allocator;
         const result = allocator.shrink(self.list.items, self.len());
         self.* = initNull(allocator);
-        return result;
+        return result[0 .. result.len - 1 :0];
     }
 
     pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {
diff --git a/lib/std/build.zig b/lib/std/build.zig
index 72d26ff0475eff35e5a5da656bfe0c830e4b5cbc..1eabfb1559aaf9b6e63b9d0014328313d2e9d413 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1199,8 +1199,6 @@ pub const LibExeObjStep = struct {
 
     subsystem: ?builtin.SubSystem = null,
 
-    target_details: ?std.target.TargetDetails = null,
-
     const LinkObject = union(enum) {
         StaticPath: []const u8,
         OtherStep: *LibExeObjStep,
@@ -1386,10 +1384,6 @@ pub const LibExeObjStep = struct {
         self.computeOutFileNames();
     }
 
-    pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void {
-        self.target_details = target_details;
-    }
-
     pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void {
         self.target_glibc = Version{
             .major = major,
@@ -1974,34 +1968,33 @@ pub const LibExeObjStep = struct {
 
         switch (self.target) {
             .Native => {},
-            .Cross => {
+            .Cross => |cross| {
                 try zig_args.append("-target");
                 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
+
+                switch (cross.cpu_features) {
+                    .baseline => {},
+                    .cpu => |cpu| {
+                        try zig_args.append("-target-cpu");
+                        try zig_args.append(cpu.name);
+                    },
+                    .features => |features| {
+                        try zig_args.append("-target-cpu-features");
+
+                        var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
+                        for (self.target.getArch().allFeaturesList()) |feature, i| {
+                            if (Target.Cpu.Feature.isEnabled(features, @intCast(u7, i))) {
+                                try feature_str_buffer.append(feature.name);
+                                try feature_str_buffer.append(",");
+                            }
+                        }
+
+                        try zig_args.append(feature_str_buffer.toSlice());
+                    },
+                }
             },
         }
 
-        if (self.target_details) |td| {
-            switch (td) {
-                .cpu => |cpu| {
-                    try zig_args.append("--cpu");
-                    try zig_args.append(cpu.name);
-                },
-                .features => |features| {
-                    try zig_args.append("--features");
-                    
-                    var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
-                    defer feature_str_buffer.deinit();
-
-                    for (features) |feature| {
-                        try feature_str_buffer.append(feature.name);
-                        try feature_str_buffer.append(",");
-                    }
-
-                    try zig_args.append(feature_str_buffer.toOwnedSlice());
-                },
-            }
-        }
-
         if (self.target_glibc) |ver| {
             try zig_args.append("-target-glibc");
             try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch }));
diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index 55f044094e410df39d5a502d3b3c592b05765280..712d98b25cac3adabb0aeaa55dac864144a5c608 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -15,6 +15,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
 /// Deprecated: use `std.Target.SubSystem`.
 pub const SubSystem = std.Target.SubSystem;
 
+/// Deprecated: use `std.Target.Cross.CpuFeatures`.
+pub const CpuFeatures = std.Target.Cross.CpuFeatures;
+
+/// Deprecated: use `std.Target.Cpu`.
+pub const Cpu = std.Target.Cpu;
+
 /// `explicit_subsystem` is missing when the subsystem is automatically detected,
 /// so Zig standard library has the subsystem detection logic here. This should generally be
 /// used rather than `explicit_subsystem`.
diff --git a/lib/std/fmt.zig b/lib/std/fmt.zig
index 548ef8ccce4eb635af1204a590a6197951f429f2..adbf409baafd9cd471cc6d95a20ac255860c331b 100644
--- a/lib/std/fmt.zig
+++ b/lib/std/fmt.zig
@@ -1138,6 +1138,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {
     size.* += bytes.len;
 }
 
+pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 {
+    const result = try allocPrint(allocator, fmt ++ "\x00", args);
+    return result[0 .. result.len - 1 :0];
+}
+
 test "bufPrintInt" {
     var buffer: [100]u8 = undefined;
     const buf = buffer[0..];
diff --git a/lib/std/meta.zig b/lib/std/meta.zig
index 5e5850e393a7394d7f746387778600d4148a83fd..5cb9c6589ccb4b117f9cdd915060dc9a4963a2cf 100644
--- a/lib/std/meta.zig
+++ b/lib/std/meta.zig
@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {
     if (!builtin.is_test) return;
     _ = declarations(T);
 }
+
+/// Returns a slice of pointers to public declarations of a namespace.
+pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl {
+    const S = struct {
+        fn declNameLessThan(lhs: *const Decl, rhs: *const Decl) bool {
+            return mem.lessThan(u8, lhs.name, rhs.name);
+        }
+    };
+    comptime {
+        const decls = declarations(Namespace);
+        var array: [decls.len]*const Decl = undefined;
+        for (decls) |decl, i| {
+            array[i] = &@field(Namespace, decl.name);
+        }
+        std.sort.sort(*const Decl, &array, S.declNameLessThan);
+        return &array;
+    }
+}
diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig
index efb1e5fe0499f7e441e91fa0e0f3ddd9afbd62e3..5dbdafb60aa4a7210a9c63c65776bb356164451c 100644
--- a/lib/std/os/linux/tls.zig
+++ b/lib/std/os/linux/tls.zig
@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {
 
     if (tls_phdr) |phdr| {
         // If the cpu is arm-based, check if it supports the TLS register
-        if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
+        if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
             // If the CPU does not support TLS via a coprocessor register,
             // a kernel helper function can be used instead on certain linux kernels.
             // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
diff --git a/lib/std/std.zig b/lib/std/std.zig
index f268bfe848e6fcc4c943ddb6601b4e8aca5de8cc..dd4d968efbc9fa8fa81ffaf07245dc77d56a2896 100644
--- a/lib/std/std.zig
+++ b/lib/std/std.zig
@@ -60,7 +60,6 @@ pub const rand = @import("rand.zig");
 pub const rb = @import("rb.zig");
 pub const sort = @import("sort.zig");
 pub const ascii = @import("ascii.zig");
-pub const target = @import("target.zig");
 pub const testing = @import("testing.zig");
 pub const time = @import("time.zig");
 pub const unicode = @import("unicode.zig");
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 7069f9e833c9bdc33a1431f27d9ce3abb293d35f..263167d738c39e5eddd5a0df1af7db7243255ac4 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -101,6 +101,22 @@ pub const Target = union(enum) {
         renderscript32,
         renderscript64,
 
+        pub const aarch64 = @import("target/aarch64.zig");
+        pub const amdgpu = @import("target/amdgpu.zig");
+        pub const arm = @import("target/arm.zig");
+        pub const avr = @import("target/avr.zig");
+        pub const bpf = @import("target/bpf.zig");
+        pub const hexagon = @import("target/hexagon.zig");
+        pub const mips = @import("target/mips.zig");
+        pub const msp430 = @import("target/msp430.zig");
+        pub const nvptx = @import("target/nvptx.zig");
+        pub const powerpc = @import("target/powerpc.zig");
+        pub const riscv = @import("target/riscv.zig");
+        pub const sparc = @import("target/sparc.zig");
+        pub const systemz = @import("target/systemz.zig");
+        pub const wasm = @import("target/wasm.zig");
+        pub const x86 = @import("target/x86.zig");
+
         pub const Arm32 = enum {
             v8_5a,
             v8_4a,
@@ -184,6 +200,71 @@ pub const Target = union(enum) {
             };
         }
 
+        pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu {
+            for (arch.allCpus()) |cpu| {
+                if (mem.eql(u8, cpu_name, cpu.name)) {
+                    return cpu;
+                }
+            }
+            return error.UnknownCpu;
+        }
+
+        /// This parsing function supports 2 syntaxes.
+        /// * Comma-separated list of features, with + or - in front of each feature. This
+        ///   form represents a deviation from baseline.
+        /// * Comma-separated list of features, with no + or - in front of each feature. This
+        ///   form represents an exclusive list of enabled features; no other features besides
+        ///   the ones listed, and their dependencies, will be enabled.
+        /// Extra commas are ignored.
+        pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set {
+            // Here we compute both and choose the correct result at the end, based
+            // on whether or not we saw + and - signs.
+            var set: @Vector(2, Cpu.Feature.Set) = [2]Cpu.Feature.Set{ 0, arch.baselineFeatures() };
+            var mode: enum {
+                unknown,
+                baseline,
+                whitelist,
+            } = .unknown;
+
+            var it = mem.tokenize(features_text, ",");
+            while (it.next()) |item_text| {
+                const feature_name = blk: {
+                    if (mem.startsWith(u8, item_text, "+")) {
+                        switch (mode) {
+                            .unknown, .baseline => mode = .baseline,
+                            .whitelist => return error.InvalidCpuFeatures,
+                        }
+                        break :blk item_text[1..];
+                    } else if (mem.startsWith(u8, item_text, "-")) {
+                        switch (mode) {
+                            .unknown, .baseline => mode = .baseline,
+                            .whitelist => return error.InvalidCpuFeatures,
+                        }
+                        break :blk item_text[1..];
+                    } else {
+                        switch (mode) {
+                            .unknown, .whitelist => mode = .whitelist,
+                            .baseline => return error.InvalidCpuFeatures,
+                        }
+                        break :blk item_text;
+                    }
+                };
+                for (arch.allFeaturesList()) |feature, index| {
+                    if (mem.eql(u8, feature_name, feature.name)) {
+                        set |= @splat(2, 1 << index);
+                        break;
+                    }
+                } else {
+                    return error.UnknownCpuFeature;
+                }
+            }
+
+            return switch (mode) {
+                .unknown, .whitelist => set[0],
+                .baseline => set[1],
+            };
+        }
+
         pub fn toElfMachine(arch: Arch) std.elf.EM {
             return switch (arch) {
                 .avr => ._AVR,
@@ -296,6 +377,98 @@ pub const Target = union(enum) {
                 => .Big,
             };
         }
+
+        /// Returns a name that matches the lib/std/target/* directory name.
+        pub fn genericName(arch: Arch) []const u8 {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => "arm",
+                .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
+                .avr => "avr",
+                .bpfel, .bpfeb => "bpf",
+                .hexagon => "hexagon",
+                .mips, .mipsel, .mips64, .mips64el => "mips",
+                .msp430 => "msp430",
+                .powerpc, .powerpc64, .powerpc64le => "powerpc",
+                .amdgcn => "amdgpu",
+                .riscv32, .riscv64 => "riscv",
+                .sparc, .sparcv9, .sparcel => "sparc",
+                .s390x => "systemz",
+                .i386, .x86_64 => "x86",
+                .nvptx, .nvptx64 => "nvptx",
+                .wasm32, .wasm64 => "wasm",
+                else => @tagName(arch),
+            };
+        }
+
+        /// All CPU features Zig is aware of, sorted lexicographically by name.
+        pub fn allFeaturesList(arch: Arch) []const *const Cpu.Feature {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => arm.all_features,
+                .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_features,
+                .avr => avr.all_features,
+                .bpfel, .bpfeb => bpf.all_features,
+                .hexagon => hexagon.all_features,
+                .mips, .mipsel, .mips64, .mips64el => mips.all_features,
+                .msp430 => msp430.all_features,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
+                .amdgcn => amdgpu.all_features,
+                .riscv32, .riscv64 => riscv.all_features,
+                .sparc, .sparcv9, .sparcel => sparc.all_features,
+                .s390x => systemz.all_features,
+                .i386, .x86_64 => x86.all_features,
+                .nvptx, .nvptx64 => nvptx.all_features,
+                .wasm32, .wasm64 => wasm.all_features,
+
+                else => &[0]*const Cpu.Feature{},
+            };
+        }
+
+        /// The "default" set of CPU features for cross-compiling. A conservative set
+        /// of features that is expected to be supported on most available hardware.
+        pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => arm.baseline_features,
+                .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
+                .avr => avr.baseline_features,
+                .bpfel, .bpfeb => bpf.baseline_features,
+                .hexagon => hexagon.baseline_features,
+                .mips, .mipsel, .mips64, .mips64el => mips.baseline_features,
+                .msp430 => msp430.baseline_features,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,
+                .amdgcn => amdgpu.baseline_features,
+                .riscv32, .riscv64 => riscv.baseline_features,
+                .sparc, .sparcv9, .sparcel => sparc.baseline_features,
+                .s390x => systemz.baseline_features,
+                .i386, .x86_64 => x86.baseline_features,
+                .nvptx, .nvptx64 => nvptx.baseline_features,
+                .wasm32, .wasm64 => wasm.baseline_features,
+
+                else => &[0]*const Cpu.Feature{},
+            };
+        }
+
+        /// All CPUs Zig is aware of, sorted lexicographically by name.
+        pub fn allCpus(arch: Arch) []const *const Cpu {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
+                .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
+                .avr => avr.all_cpus,
+                .bpfel, .bpfeb => bpf.all_cpus,
+                .hexagon => hexagon.all_cpus,
+                .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
+                .msp430 => msp430.all_cpus,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
+                .amdgcn => amdgpu.all_cpus,
+                .riscv32, .riscv64 => riscv.all_cpus,
+                .sparc, .sparcv9, .sparcel => sparc.all_cpus,
+                .s390x => systemz.all_cpus,
+                .i386, .x86_64 => x86.all_cpus,
+                .nvptx, .nvptx64 => nvptx.all_cpus,
+                .wasm32, .wasm64 => wasm.all_cpus,
+
+                else => &[0]*const Cpu{},
+            };
+        }
     };
 
     pub const Abi = enum {
@@ -323,6 +496,28 @@ pub const Target = union(enum) {
         macabi,
     };
 
+    pub const Cpu = struct {
+        name: []const u8,
+        llvm_name: ?[:0]const u8,
+        features: Feature.Set,
+
+        pub const Feature = struct {
+            /// The bit index into `Set`.
+            index: u8,
+            name: []const u8,
+            llvm_name: ?[:0]const u8,
+            description: []const u8,
+            dependencies: Set,
+
+            /// A bit set of all the features.
+            pub const Set = u128;
+
+            pub fn isEnabled(set: Set, arch_feature_index: u7) bool {
+                return (set & (@as(Set, 1) << arch_feature_index)) != 0;
+            }
+        };
+    };
+
     pub const ObjectFormat = enum {
         unknown,
         coff,
@@ -346,6 +541,19 @@ pub const Target = union(enum) {
         arch: Arch,
         os: Os,
         abi: Abi,
+        cpu_features: CpuFeatures = .baseline,
+
+        pub const CpuFeatures = union(enum) {
+            /// The "default" set of CPU features for cross-compiling. A conservative set
+            /// of features that is expected to be supported on most available hardware.
+            baseline,
+
+            /// Target one specific CPU.
+            cpu: *const Cpu,
+
+            /// Explicitly provide the entire CPU feature set.
+            features: Cpu.Feature.Set,
+        };
     };
 
     pub const current = Target{
@@ -353,11 +561,20 @@ pub const Target = union(enum) {
             .arch = builtin.arch,
             .os = builtin.os,
             .abi = builtin.abi,
+            .cpu_features = builtin.cpu_features,
         },
     };
 
     pub const stack_align = 16;
 
+    pub fn cpuFeatures(self: Target) []const *const Cpu.Feature {
+        return switch (self.cpu_features) {
+            .baseline => self.arch.baselineFeatures(),
+            .cpu => |cpu| cpu.features,
+            .features => |features| features,
+        };
+    }
+
     pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
         return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
             @tagName(self.getArch()),
@@ -496,7 +713,7 @@ pub const Target = union(enum) {
     pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
         const info = @typeInfo(Arch);
         inline for (info.Union.fields) |field| {
-            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
+            if (mem.eql(u8, text, field.name)) {
                 if (field.field_type == void) {
                     return @as(Arch, @field(Arch, field.name));
                 } else {
@@ -514,31 +731,6 @@ pub const Target = union(enum) {
         return error.UnknownArchitecture;
     }
 
-    pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) {
-        const info = @typeInfo(Arch);
-        inline for (info.Union.fields) |field| {
-            if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) {
-                if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name));
-
-                if (field.field_type == void) {
-                    return error.UnknownArchitecture;
-                }
-
-                const sub_info = @typeInfo(field.field_type);
-                inline for (sub_info.Enum.fields) |sub_field| {
-                    const combined = field.name ++ sub_field.name;
-                    if (mem.eql(u8, text, combined)) {
-                        return @as(@TagType(Arch), @field(Arch, field.name));
-                    }
-                }
-
-                return error.UnknownSubArchitecture;
-            }
-        }
-
-        return error.UnknownArchitecture;
-    }
-
     pub fn parseOs(text: []const u8) !Os {
         const info = @typeInfo(Os);
         inline for (info.Enum.fields) |field| {
@@ -841,83 +1033,3 @@ pub const Target = union(enum) {
         return .unavailable;
     }
 };
-
-pub const aarch64 = @import("target/aarch64.zig");
-pub const amdgpu = @import("target/amdgpu.zig");
-pub const arm = @import("target/arm.zig");
-pub const avr = @import("target/avr.zig");
-pub const bpf = @import("target/bpf.zig");
-pub const hexagon = @import("target/hexagon.zig");
-pub const mips = @import("target/mips.zig");
-pub const msp430 = @import("target/msp430.zig");
-pub const nvptx = @import("target/nvptx.zig");
-pub const powerpc = @import("target/powerpc.zig");
-pub const riscv = @import("target/riscv.zig");
-pub const sparc = @import("target/sparc.zig");
-pub const systemz = @import("target/systemz.zig");
-pub const wasm = @import("target/wasm.zig");
-pub const x86 = @import("target/x86.zig");
-
-pub const Feature = struct {
-    name: []const u8,
-    llvm_name: ?[]const u8,
-    description: []const u8,
-
-    dependencies: []*const Feature,
-};
-
-pub const Cpu = struct {
-    name: []const u8,
-    llvm_name: ?[]const u8,
-
-    dependencies: []*const Feature,
-};
-
-pub const TargetDetails = union(enum) {
-    cpu: *const Cpu,
-    features: []*const Feature,
-};
-
-pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature {
-    return switch (arch) {
-        .arm, .armeb, .thumb, .thumbeb => arm.features,
-        .aarch64, .aarch64_be, .aarch64_32 => aarch64.features,
-        .avr => avr.features,
-        .bpfel, .bpfeb => bpf.features,
-        .hexagon => hexagon.features,
-        .mips, .mipsel, .mips64, .mips64el => mips.features,
-        .msp430 => msp430.features,
-        .powerpc, .powerpc64, .powerpc64le => powerpc.features,
-        .amdgcn => amdgpu.features,
-        .riscv32, .riscv64 => riscv.features,
-        .sparc, .sparcv9, .sparcel => sparc.features,
-        .s390x => systemz.features,
-        .i386, .x86_64 => x86.features,
-        .nvptx, .nvptx64 => nvptx.features,
-        .wasm32, .wasm64 => wasm.features,
-
-        else => &[_]*const Feature{},
-    };
-}
-
-pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu {
-    return switch (arch) {
-        .arm, .armeb, .thumb, .thumbeb => arm.cpus,
-        .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus,
-        .avr => avr.cpus,
-        .bpfel, .bpfeb => bpf.cpus,
-        .hexagon => hexagon.cpus,
-        .mips, .mipsel, .mips64, .mips64el => mips.cpus,
-        .msp430 => msp430.cpus,
-        .powerpc, .powerpc64, .powerpc64le => powerpc.cpus,
-        .amdgcn => amdgpu.cpus,
-        .riscv32, .riscv64 => riscv.cpus,
-        .sparc, .sparcv9, .sparcel => sparc.cpus,
-        .s390x => systemz.cpus,
-        .i386, .x86_64 => x86.cpus,
-        .nvptx, .nvptx64 => nvptx.cpus,
-        .wasm32, .wasm64 => wasm.cpus,
-
-        else => &[_]*const Cpu{},
-    };
-}
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 56101f20e77204d7e5116215fbdd411d8603461a..77d8c986c9cea7a0c32fc83be2a1464af34b265b 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -1,1603 +1,1528 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_aes = Feature{
-    .name = "aes",
-    .llvm_name = "aes",
-    .description = "Enable AES support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_am = Feature{
-    .name = "am",
-    .llvm_name = "am",
-    .description = "Enable v8.4-A Activity Monitors extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_aggressiveFma = Feature{
-    .name = "aggressiveFma",
-    .llvm_name = "aggressive-fma",
-    .description = "Enable Aggressive FMA for floating-point.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_altnzcv = Feature{
-    .name = "altnzcv",
-    .llvm_name = "altnzcv",
-    .description = "Enable alternative NZCV format for floating point comparisons",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_alternateSextloadCvtF32Pattern = Feature{
-    .name = "alternateSextloadCvtF32Pattern",
-    .llvm_name = "alternate-sextload-cvt-f32-pattern",
-    .description = "Use alternative pattern for sextload convert to f32",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_arithBccFusion = Feature{
-    .name = "arithBccFusion",
-    .llvm_name = "arith-bcc-fusion",
-    .description = "CPU fuses arithmetic+bcc operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_arithCbzFusion = Feature{
-    .name = "arithCbzFusion",
-    .llvm_name = "arith-cbz-fusion",
-    .description = "CPU fuses arithmetic + cbz/cbnz operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_balanceFpOps = Feature{
-    .name = "balanceFpOps",
-    .llvm_name = "balance-fp-ops",
-    .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bti = Feature{
-    .name = "bti",
-    .llvm_name = "bti",
-    .description = "Enable Branch Target Identification",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ccidx = Feature{
-    .name = "ccidx",
-    .llvm_name = "ccidx",
-    .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ccpp = Feature{
-    .name = "ccpp",
-    .llvm_name = "ccpp",
-    .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_crc = Feature{
-    .name = "crc",
-    .llvm_name = "crc",
-    .description = "Enable ARMv8 CRC-32 checksum instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ccdp = Feature{
-    .name = "ccdp",
-    .llvm_name = "ccdp",
-    .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX8 = Feature{
-    .name = "callSavedX8",
-    .llvm_name = "call-saved-x8",
-    .description = "Make X8 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX9 = Feature{
-    .name = "callSavedX9",
-    .llvm_name = "call-saved-x9",
-    .description = "Make X9 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX10 = Feature{
-    .name = "callSavedX10",
-    .llvm_name = "call-saved-x10",
-    .description = "Make X10 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX11 = Feature{
-    .name = "callSavedX11",
-    .llvm_name = "call-saved-x11",
-    .description = "Make X11 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX12 = Feature{
-    .name = "callSavedX12",
-    .llvm_name = "call-saved-x12",
-    .description = "Make X12 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX13 = Feature{
-    .name = "callSavedX13",
-    .llvm_name = "call-saved-x13",
-    .description = "Make X13 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX14 = Feature{
-    .name = "callSavedX14",
-    .llvm_name = "call-saved-x14",
-    .description = "Make X14 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX15 = Feature{
-    .name = "callSavedX15",
-    .llvm_name = "call-saved-x15",
-    .description = "Make X15 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_callSavedX18 = Feature{
-    .name = "callSavedX18",
-    .llvm_name = "call-saved-x18",
-    .description = "Make X18 callee saved.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_complxnum = Feature{
-    .name = "complxnum",
-    .llvm_name = "complxnum",
-    .description = "Enable v8.3-A Floating-point complex number support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_crypto = Feature{
-    .name = "crypto",
-    .llvm_name = "crypto",
-    .description = "Enable cryptographic instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_customCheapAsMove = Feature{
-    .name = "customCheapAsMove",
-    .llvm_name = "custom-cheap-as-move",
-    .description = "Use custom handling of cheap instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dit = Feature{
-    .name = "dit",
-    .llvm_name = "dit",
-    .description = "Enable v8.4-A Data Independent Timing instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_disableLatencySchedHeuristic = Feature{
-    .name = "disableLatencySchedHeuristic",
-    .llvm_name = "disable-latency-sched-heuristic",
-    .description = "Disable latency scheduling heuristic",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dotprod = Feature{
-    .name = "dotprod",
-    .llvm_name = "dotprod",
-    .description = "Enable dot product support",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_exynosCheapAsMove = Feature{
-    .name = "exynosCheapAsMove",
-    .llvm_name = "exynos-cheap-as-move",
-    .description = "Use Exynos specific handling of cheap instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-    },
-};
-
-pub const feature_fmi = Feature{
-    .name = "fmi",
-    .llvm_name = "fmi",
-    .description = "Enable v8.4-A Flag Manipulation Instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp16fml = Feature{
-    .name = "fp16fml",
-    .llvm_name = "fp16fml",
-    .description = "Enable FP16 FML instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_fpArmv8 = Feature{
-    .name = "fpArmv8",
-    .llvm_name = "fp-armv8",
-    .description = "Enable ARMv8 FP",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fptoint = Feature{
-    .name = "fptoint",
-    .llvm_name = "fptoint",
-    .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_force32bitJumpTables = Feature{
-    .name = "force32bitJumpTables",
-    .llvm_name = "force-32bit-jump-tables",
-    .description = "Force jump table entries to be 32-bits wide except at MinSize",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fullfp16 = Feature{
-    .name = "fullfp16",
-    .llvm_name = "fullfp16",
-    .description = "Full FP16",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_fuseAes = Feature{
-    .name = "fuseAes",
-    .llvm_name = "fuse-aes",
-    .description = "CPU fuses AES crypto operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseAddress = Feature{
-    .name = "fuseAddress",
-    .llvm_name = "fuse-address",
-    .description = "CPU fuses address generation and memory operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseArithLogic = Feature{
-    .name = "fuseArithLogic",
-    .llvm_name = "fuse-arith-logic",
-    .description = "CPU fuses arithmetic and logic operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseCsel = Feature{
-    .name = "fuseCsel",
-    .llvm_name = "fuse-csel",
-    .description = "CPU fuses conditional select operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseCryptoEor = Feature{
-    .name = "fuseCryptoEor",
-    .llvm_name = "fuse-crypto-eor",
-    .description = "CPU fuses AES/PMULL and EOR operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseLiterals = Feature{
-    .name = "fuseLiterals",
-    .llvm_name = "fuse-literals",
-    .description = "CPU fuses literal generation operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_jsconv = Feature{
-    .name = "jsconv",
-    .llvm_name = "jsconv",
-    .description = "Enable v8.3-A JavaScript FP conversion enchancement",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_lor = Feature{
-    .name = "lor",
-    .llvm_name = "lor",
-    .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lse = Feature{
-    .name = "lse",
-    .llvm_name = "lse",
-    .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lslFast = Feature{
-    .name = "lslFast",
-    .llvm_name = "lsl-fast",
-    .description = "CPU has a fastpath logical shift of up to 3 places",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mpam = Feature{
-    .name = "mpam",
-    .llvm_name = "mpam",
-    .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mte = Feature{
-    .name = "mte",
-    .llvm_name = "mte",
-    .description = "Enable Memory Tagging Extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_neon = Feature{
-    .name = "neon",
-    .llvm_name = "neon",
-    .description = "Enable Advanced SIMD instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_nv = Feature{
-    .name = "nv",
-    .llvm_name = "nv",
-    .description = "Enable v8.4-A Nested Virtualization Enchancement",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noNegImmediates = Feature{
-    .name = "noNegImmediates",
-    .llvm_name = "no-neg-immediates",
-    .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_pa = Feature{
-    .name = "pa",
-    .llvm_name = "pa",
-    .description = "Enable v8.3-A Pointer Authentication enchancement",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_pan = Feature{
-    .name = "pan",
-    .llvm_name = "pan",
-    .description = "Enables ARM v8.1 Privileged Access-Never extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_panRwv = Feature{
-    .name = "panRwv",
-    .llvm_name = "pan-rwv",
-    .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
-    .dependencies = &[_]*const Feature {
-        &feature_pan,
-    },
-};
-
-pub const feature_perfmon = Feature{
-    .name = "perfmon",
-    .llvm_name = "perfmon",
-    .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_usePostraScheduler = Feature{
-    .name = "usePostraScheduler",
-    .llvm_name = "use-postra-scheduler",
-    .description = "Schedule again after register allocation",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_predres = Feature{
-    .name = "predres",
-    .llvm_name = "predres",
-    .description = "Enable v8.5a execution and data prediction invalidation instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_predictableSelectExpensive = Feature{
-    .name = "predictableSelectExpensive",
-    .llvm_name = "predictable-select-expensive",
-    .description = "Prefer likely predicted branches over selects",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_uaops = Feature{
-    .name = "uaops",
-    .llvm_name = "uaops",
-    .description = "Enable v8.2 UAO PState",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ras = Feature{
-    .name = "ras",
-    .llvm_name = "ras",
-    .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rasv8_4 = Feature{
-    .name = "rasv8_4",
-    .llvm_name = "rasv8_4",
-    .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-    .dependencies = &[_]*const Feature {
-        &feature_ras,
-    },
-};
-
-pub const feature_rcpc = Feature{
-    .name = "rcpc",
-    .llvm_name = "rcpc",
-    .description = "Enable support for RCPC extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rcpcImmo = Feature{
-    .name = "rcpcImmo",
-    .llvm_name = "rcpc-immo",
-    .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
-    .dependencies = &[_]*const Feature {
-        &feature_rcpc,
-    },
-};
-
-pub const feature_rdm = Feature{
-    .name = "rdm",
-    .llvm_name = "rdm",
-    .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rand = Feature{
-    .name = "rand",
-    .llvm_name = "rand",
-    .description = "Enable Random Number generation instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX1 = Feature{
-    .name = "reserveX1",
-    .llvm_name = "reserve-x1",
-    .description = "Reserve X1, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX2 = Feature{
-    .name = "reserveX2",
-    .llvm_name = "reserve-x2",
-    .description = "Reserve X2, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX3 = Feature{
-    .name = "reserveX3",
-    .llvm_name = "reserve-x3",
-    .description = "Reserve X3, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX4 = Feature{
-    .name = "reserveX4",
-    .llvm_name = "reserve-x4",
-    .description = "Reserve X4, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX5 = Feature{
-    .name = "reserveX5",
-    .llvm_name = "reserve-x5",
-    .description = "Reserve X5, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX6 = Feature{
-    .name = "reserveX6",
-    .llvm_name = "reserve-x6",
-    .description = "Reserve X6, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX7 = Feature{
-    .name = "reserveX7",
-    .llvm_name = "reserve-x7",
-    .description = "Reserve X7, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX9 = Feature{
-    .name = "reserveX9",
-    .llvm_name = "reserve-x9",
-    .description = "Reserve X9, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX10 = Feature{
-    .name = "reserveX10",
-    .llvm_name = "reserve-x10",
-    .description = "Reserve X10, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX11 = Feature{
-    .name = "reserveX11",
-    .llvm_name = "reserve-x11",
-    .description = "Reserve X11, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX12 = Feature{
-    .name = "reserveX12",
-    .llvm_name = "reserve-x12",
-    .description = "Reserve X12, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX13 = Feature{
-    .name = "reserveX13",
-    .llvm_name = "reserve-x13",
-    .description = "Reserve X13, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX14 = Feature{
-    .name = "reserveX14",
-    .llvm_name = "reserve-x14",
-    .description = "Reserve X14, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX15 = Feature{
-    .name = "reserveX15",
-    .llvm_name = "reserve-x15",
-    .description = "Reserve X15, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX18 = Feature{
-    .name = "reserveX18",
-    .llvm_name = "reserve-x18",
-    .description = "Reserve X18, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX20 = Feature{
-    .name = "reserveX20",
-    .llvm_name = "reserve-x20",
-    .description = "Reserve X20, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX21 = Feature{
-    .name = "reserveX21",
-    .llvm_name = "reserve-x21",
-    .description = "Reserve X21, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX22 = Feature{
-    .name = "reserveX22",
-    .llvm_name = "reserve-x22",
-    .description = "Reserve X22, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX23 = Feature{
-    .name = "reserveX23",
-    .llvm_name = "reserve-x23",
-    .description = "Reserve X23, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX24 = Feature{
-    .name = "reserveX24",
-    .llvm_name = "reserve-x24",
-    .description = "Reserve X24, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX25 = Feature{
-    .name = "reserveX25",
-    .llvm_name = "reserve-x25",
-    .description = "Reserve X25, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX26 = Feature{
-    .name = "reserveX26",
-    .llvm_name = "reserve-x26",
-    .description = "Reserve X26, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX27 = Feature{
-    .name = "reserveX27",
-    .llvm_name = "reserve-x27",
-    .description = "Reserve X27, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveX28 = Feature{
-    .name = "reserveX28",
-    .llvm_name = "reserve-x28",
-    .description = "Reserve X28, making it unavailable as a GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sb = Feature{
-    .name = "sb",
-    .llvm_name = "sb",
-    .description = "Enable v8.5 Speculation Barrier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sel2 = Feature{
-    .name = "sel2",
-    .llvm_name = "sel2",
-    .description = "Enable v8.4-A Secure Exception Level 2 extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sha2 = Feature{
-    .name = "sha2",
-    .llvm_name = "sha2",
-    .description = "Enable SHA1 and SHA256 support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_sha3 = Feature{
-    .name = "sha3",
-    .llvm_name = "sha3",
-    .description = "Enable SHA512 and SHA3 support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_sm4 = Feature{
-    .name = "sm4",
-    .llvm_name = "sm4",
-    .description = "Enable SM3 and SM4 support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_spe = Feature{
-    .name = "spe",
-    .llvm_name = "spe",
-    .description = "Enable Statistical Profiling extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ssbs = Feature{
-    .name = "ssbs",
-    .llvm_name = "ssbs",
-    .description = "Enable Speculative Store Bypass Safe bit",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sve = Feature{
-    .name = "sve",
-    .llvm_name = "sve",
-    .description = "Enable Scalable Vector Extension (SVE) instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sve2 = Feature{
-    .name = "sve2",
-    .llvm_name = "sve2",
-    .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sve,
-    },
-};
-
-pub const feature_sve2Aes = Feature{
-    .name = "sve2Aes",
-    .llvm_name = "sve2-aes",
-    .description = "Enable AES SVE2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sve,
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_sve2Bitperm = Feature{
-    .name = "sve2Bitperm",
-    .llvm_name = "sve2-bitperm",
-    .description = "Enable bit permutation SVE2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sve,
-    },
-};
-
-pub const feature_sve2Sha3 = Feature{
-    .name = "sve2Sha3",
-    .llvm_name = "sve2-sha3",
-    .description = "Enable SHA3 SVE2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sve,
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_sve2Sm4 = Feature{
-    .name = "sve2Sm4",
-    .llvm_name = "sve2-sm4",
-    .description = "Enable SM4 SVE2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sve,
-        &feature_fpArmv8,
-    },
-};
-
-pub const feature_slowMisaligned128store = Feature{
-    .name = "slowMisaligned128store",
-    .llvm_name = "slow-misaligned-128store",
-    .description = "Misaligned 128 bit stores are slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowPaired128 = Feature{
-    .name = "slowPaired128",
-    .llvm_name = "slow-paired-128",
-    .description = "Paired 128 bit loads and stores are slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowStrqroStore = Feature{
-    .name = "slowStrqroStore",
-    .llvm_name = "slow-strqro-store",
-    .description = "STR of Q register with register offset is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_specrestrict = Feature{
-    .name = "specrestrict",
-    .llvm_name = "specrestrict",
-    .description = "Enable architectural speculation restriction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_strictAlign = Feature{
-    .name = "strictAlign",
-    .llvm_name = "strict-align",
-    .description = "Disallow all unaligned memory access",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tlbRmi = Feature{
-    .name = "tlbRmi",
-    .llvm_name = "tlb-rmi",
-    .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tracev84 = Feature{
-    .name = "tracev84",
-    .llvm_name = "tracev8.4",
-    .description = "Enable v8.4-A Trace extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useAa = Feature{
-    .name = "useAa",
-    .llvm_name = "use-aa",
-    .description = "Use alias analysis during codegen",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tpidrEl1 = Feature{
-    .name = "tpidrEl1",
-    .llvm_name = "tpidr-el1",
-    .description = "Permit use of TPIDR_EL1 for the TLS base",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tpidrEl2 = Feature{
-    .name = "tpidrEl2",
-    .llvm_name = "tpidr-el2",
-    .description = "Permit use of TPIDR_EL2 for the TLS base",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tpidrEl3 = Feature{
-    .name = "tpidrEl3",
-    .llvm_name = "tpidr-el3",
-    .description = "Permit use of TPIDR_EL3 for the TLS base",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useReciprocalSquareRoot = Feature{
-    .name = "useReciprocalSquareRoot",
-    .llvm_name = "use-reciprocal-square-root",
-    .description = "Use the reciprocal square root approximation",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vh = Feature{
-    .name = "vh",
-    .llvm_name = "vh",
-    .description = "Enables ARM v8.1 Virtual Host extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_zcm = Feature{
-    .name = "zcm",
-    .llvm_name = "zcm",
-    .description = "Has zero-cycle register moves",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_zcz = Feature{
-    .name = "zcz",
-    .llvm_name = "zcz",
-    .description = "Has zero-cycle zeroing instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_zczFp,
-        &feature_zczGp,
-    },
-};
-
-pub const feature_zczFp = Feature{
-    .name = "zczFp",
-    .llvm_name = "zcz-fp",
-    .description = "Has zero-cycle zeroing instructions for FP registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_zczFpWorkaround = Feature{
-    .name = "zczFpWorkaround",
-    .llvm_name = "zcz-fp-workaround",
-    .description = "The zero-cycle floating-point zeroing instruction has a bug",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_zczGp = Feature{
-    .name = "zczGp",
-    .llvm_name = "zcz-gp",
-    .description = "Has zero-cycle zeroing instructions for generic registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_aes,
-    &feature_am,
-    &feature_aggressiveFma,
-    &feature_altnzcv,
-    &feature_alternateSextloadCvtF32Pattern,
-    &feature_arithBccFusion,
-    &feature_arithCbzFusion,
-    &feature_balanceFpOps,
-    &feature_bti,
-    &feature_ccidx,
-    &feature_ccpp,
-    &feature_crc,
-    &feature_ccdp,
-    &feature_callSavedX8,
-    &feature_callSavedX9,
-    &feature_callSavedX10,
-    &feature_callSavedX11,
-    &feature_callSavedX12,
-    &feature_callSavedX13,
-    &feature_callSavedX14,
-    &feature_callSavedX15,
-    &feature_callSavedX18,
-    &feature_complxnum,
-    &feature_crypto,
-    &feature_customCheapAsMove,
-    &feature_dit,
-    &feature_disableLatencySchedHeuristic,
-    &feature_dotprod,
-    &feature_exynosCheapAsMove,
-    &feature_fmi,
-    &feature_fp16fml,
-    &feature_fpArmv8,
-    &feature_fptoint,
-    &feature_force32bitJumpTables,
-    &feature_fullfp16,
-    &feature_fuseAes,
-    &feature_fuseAddress,
-    &feature_fuseArithLogic,
-    &feature_fuseCsel,
-    &feature_fuseCryptoEor,
-    &feature_fuseLiterals,
-    &feature_jsconv,
-    &feature_lor,
-    &feature_lse,
-    &feature_lslFast,
-    &feature_mpam,
-    &feature_mte,
-    &feature_neon,
-    &feature_nv,
-    &feature_noNegImmediates,
-    &feature_pa,
-    &feature_pan,
-    &feature_panRwv,
-    &feature_perfmon,
-    &feature_usePostraScheduler,
-    &feature_predres,
-    &feature_predictableSelectExpensive,
-    &feature_uaops,
-    &feature_ras,
-    &feature_rasv8_4,
-    &feature_rcpc,
-    &feature_rcpcImmo,
-    &feature_rdm,
-    &feature_rand,
-    &feature_reserveX1,
-    &feature_reserveX2,
-    &feature_reserveX3,
-    &feature_reserveX4,
-    &feature_reserveX5,
-    &feature_reserveX6,
-    &feature_reserveX7,
-    &feature_reserveX9,
-    &feature_reserveX10,
-    &feature_reserveX11,
-    &feature_reserveX12,
-    &feature_reserveX13,
-    &feature_reserveX14,
-    &feature_reserveX15,
-    &feature_reserveX18,
-    &feature_reserveX20,
-    &feature_reserveX21,
-    &feature_reserveX22,
-    &feature_reserveX23,
-    &feature_reserveX24,
-    &feature_reserveX25,
-    &feature_reserveX26,
-    &feature_reserveX27,
-    &feature_reserveX28,
-    &feature_sb,
-    &feature_sel2,
-    &feature_sha2,
-    &feature_sha3,
-    &feature_sm4,
-    &feature_spe,
-    &feature_ssbs,
-    &feature_sve,
-    &feature_sve2,
-    &feature_sve2Aes,
-    &feature_sve2Bitperm,
-    &feature_sve2Sha3,
-    &feature_sve2Sm4,
-    &feature_slowMisaligned128store,
-    &feature_slowPaired128,
-    &feature_slowStrqroStore,
-    &feature_specrestrict,
-    &feature_strictAlign,
-    &feature_tlbRmi,
-    &feature_tracev84,
-    &feature_useAa,
-    &feature_tpidrEl1,
-    &feature_tpidrEl2,
-    &feature_tpidrEl3,
-    &feature_useReciprocalSquareRoot,
-    &feature_vh,
-    &feature_zcm,
-    &feature_zcz,
-    &feature_zczFp,
-    &feature_zczFpWorkaround,
-    &feature_zczGp,
-};
-
-pub const cpu_appleLatest = Cpu{
-    .name = "appleLatest",
-    .llvm_name = "apple-latest",
-    .dependencies = &[_]*const Feature {
-        &feature_arithCbzFusion,
-        &feature_zczFpWorkaround,
-        &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
-        &feature_zcm,
-        &feature_zczGp,
-        &feature_perfmon,
-        &feature_disableLatencySchedHeuristic,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_arithBccFusion,
-        &feature_fuseAes,
-    },
-};
-
-pub const cpu_cortexA35 = Cpu{
-    .name = "cortexA35",
-    .llvm_name = "cortex-a35",
-    .dependencies = &[_]*const Feature {
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_crc,
-    },
-};
-
-pub const cpu_cortexA53 = Cpu{
-    .name = "cortexA53",
-    .llvm_name = "cortex-a53",
-    .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_useAa,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_balanceFpOps,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_cortexA55 = Cpu{
-    .name = "cortexA55",
-    .llvm_name = "cortex-a55",
-    .dependencies = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_ras,
-        &feature_lse,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_fuseAes,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_pan,
-    },
-};
-
-pub const cpu_cortexA57 = Cpu{
-    .name = "cortexA57",
-    .llvm_name = "cortex-a57",
-    .dependencies = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_balanceFpOps,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_cortexA72 = Cpu{
-    .name = "cortexA72",
-    .llvm_name = "cortex-a72",
-    .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
-    },
-};
-
-pub const cpu_cortexA73 = Cpu{
-    .name = "cortexA73",
-    .llvm_name = "cortex-a73",
-    .dependencies = &[_]*const Feature {
-        &feature_fuseAes,
-        &feature_fpArmv8,
-        &feature_perfmon,
-        &feature_crc,
-    },
-};
-
-pub const cpu_cortexA75 = Cpu{
-    .name = "cortexA75",
-    .llvm_name = "cortex-a75",
-    .dependencies = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_ras,
-        &feature_lse,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_fuseAes,
-        &feature_lor,
-        &feature_dotprod,
-        &feature_pan,
-    },
-};
-
-pub const cpu_cortexA76 = Cpu{
-    .name = "cortexA76",
-    .llvm_name = "cortex-a76",
-    .dependencies = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_ras,
-        &feature_lse,
-        &feature_crc,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_lor,
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_pan,
-    },
-};
-
-pub const cpu_cortexA76ae = Cpu{
-    .name = "cortexA76ae",
-    .llvm_name = "cortex-a76ae",
-    .dependencies = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_rcpc,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_ras,
-        &feature_lse,
-        &feature_crc,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_lor,
-        &feature_ssbs,
-        &feature_dotprod,
-        &feature_pan,
-    },
-};
-
-pub const cpu_cyclone = Cpu{
-    .name = "cyclone",
-    .llvm_name = "cyclone",
-    .dependencies = &[_]*const Feature {
-        &feature_arithCbzFusion,
-        &feature_zczFpWorkaround,
-        &feature_alternateSextloadCvtF32Pattern,
-        &feature_fuseCryptoEor,
-        &feature_zcm,
-        &feature_zczGp,
-        &feature_perfmon,
-        &feature_disableLatencySchedHeuristic,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_arithBccFusion,
-        &feature_fuseAes,
-    },
-};
-
-pub const cpu_exynosM1 = Cpu{
-    .name = "exynosM1",
-    .llvm_name = "exynos-m1",
-    .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_force32bitJumpTables,
-        &feature_perfmon,
-        &feature_slowMisaligned128store,
-        &feature_useReciprocalSquareRoot,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_fuseAes,
-        &feature_slowPaired128,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_exynosM2 = Cpu{
-    .name = "exynosM2",
-    .llvm_name = "exynos-m2",
-    .dependencies = &[_]*const Feature {
-        &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_force32bitJumpTables,
-        &feature_perfmon,
-        &feature_slowMisaligned128store,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_fuseAes,
-        &feature_slowPaired128,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_exynosM3 = Cpu{
-    .name = "exynosM3",
-    .llvm_name = "exynos-m3",
-    .dependencies = &[_]*const Feature {
-        &feature_fuseLiterals,
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_crc,
-        &feature_force32bitJumpTables,
-        &feature_fuseAddress,
-        &feature_fuseCsel,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_fuseAes,
-        &feature_lslFast,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_exynosM4 = Cpu{
-    .name = "exynosM4",
-    .llvm_name = "exynos-m4",
-    .dependencies = &[_]*const Feature {
-        &feature_arithCbzFusion,
-        &feature_customCheapAsMove,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_lor,
-        &feature_fuseLiterals,
-        &feature_ccpp,
-        &feature_ras,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_pan,
-        &feature_fuseArithLogic,
-        &feature_crc,
-        &feature_force32bitJumpTables,
-        &feature_fuseAddress,
-        &feature_fuseCsel,
-        &feature_arithBccFusion,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_perfmon,
-        &feature_vh,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-    },
-};
-
-pub const cpu_exynosM5 = Cpu{
-    .name = "exynosM5",
-    .llvm_name = "exynos-m5",
-    .dependencies = &[_]*const Feature {
-        &feature_arithCbzFusion,
-        &feature_customCheapAsMove,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_lor,
-        &feature_fuseLiterals,
-        &feature_ccpp,
-        &feature_ras,
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_pan,
-        &feature_fuseArithLogic,
-        &feature_crc,
-        &feature_force32bitJumpTables,
-        &feature_fuseAddress,
-        &feature_fuseCsel,
-        &feature_arithBccFusion,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_perfmon,
-        &feature_vh,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-    },
-};
-
-pub const cpu_falkor = Cpu{
-    .name = "falkor",
-    .llvm_name = "falkor",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_rdm,
-        &feature_slowStrqroStore,
-        &feature_zczGp,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-        &feature_fpArmv8,
-        &feature_fuseAes,
-        &feature_neon,
-        &feature_perfmon,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_kryo = Cpu{
-    .name = "kryo",
-    .llvm_name = "kryo",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_zczGp,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_saphira = Cpu{
-    .name = "saphira",
-    .llvm_name = "saphira",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_customCheapAsMove,
-        &feature_fmi,
-        &feature_lse,
-        &feature_zczFp,
-        &feature_lslFast,
-        &feature_lor,
-        &feature_dit,
-        &feature_pa,
-        &feature_ccpp,
-        &feature_sel2,
-        &feature_ras,
-        &feature_fpArmv8,
-        &feature_ccidx,
-        &feature_pan,
-        &feature_rcpc,
-        &feature_crc,
-        &feature_tracev84,
-        &feature_mpam,
-        &feature_am,
-        &feature_nv,
-        &feature_tlbRmi,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_zczGp,
-        &feature_perfmon,
-        &feature_vh,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-        &feature_spe,
-    },
-};
-
-pub const cpu_thunderx = Cpu{
-    .name = "thunderx",
-    .llvm_name = "thunderx",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_thunderx2t99 = Cpu{
-    .name = "thunderx2t99",
-    .llvm_name = "thunderx2t99",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_aggressiveFma,
-        &feature_rdm,
-        &feature_lse,
-        &feature_crc,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_arithBccFusion,
-        &feature_lor,
-        &feature_usePostraScheduler,
-        &feature_pan,
-    },
-};
-
-pub const cpu_thunderxt81 = Cpu{
-    .name = "thunderxt81",
-    .llvm_name = "thunderxt81",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_thunderxt83 = Cpu{
-    .name = "thunderxt83",
-    .llvm_name = "thunderxt83",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_thunderxt88 = Cpu{
-    .name = "thunderxt88",
-    .llvm_name = "thunderxt88",
-    .dependencies = &[_]*const Feature {
-        &feature_predictableSelectExpensive,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_usePostraScheduler,
-    },
-};
-
-pub const cpu_tsv110 = Cpu{
-    .name = "tsv110",
-    .llvm_name = "tsv110",
-    .dependencies = &[_]*const Feature {
-        &feature_ccpp,
-        &feature_customCheapAsMove,
-        &feature_uaops,
-        &feature_rdm,
-        &feature_ras,
-        &feature_lse,
-        &feature_crc,
-        &feature_perfmon,
-        &feature_fpArmv8,
-        &feature_vh,
-        &feature_fuseAes,
-        &feature_lor,
-        &feature_usePostraScheduler,
-        &feature_dotprod,
-        &feature_pan,
-        &feature_spe,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_appleLatest,
-    &cpu_cortexA35,
-    &cpu_cortexA53,
-    &cpu_cortexA55,
-    &cpu_cortexA57,
-    &cpu_cortexA72,
-    &cpu_cortexA73,
-    &cpu_cortexA75,
-    &cpu_cortexA76,
-    &cpu_cortexA76ae,
-    &cpu_cyclone,
-    &cpu_exynosM1,
-    &cpu_exynosM2,
-    &cpu_exynosM3,
-    &cpu_exynosM4,
-    &cpu_exynosM5,
-    &cpu_falkor,
-    &cpu_generic,
-    &cpu_kryo,
-    &cpu_saphira,
-    &cpu_thunderx,
-    &cpu_thunderx2t99,
-    &cpu_thunderxt81,
-    &cpu_thunderxt83,
-    &cpu_thunderxt88,
-    &cpu_tsv110,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    aes,
+    am,
+    aggressive_fma,
+    altnzcv,
+    alternate_sextload_cvt_f32_pattern,
+    arith_bcc_fusion,
+    arith_cbz_fusion,
+    balance_fp_ops,
+    bti,
+    ccidx,
+    ccpp,
+    crc,
+    ccdp,
+    call_saved_x8,
+    call_saved_x9,
+    call_saved_x10,
+    call_saved_x11,
+    call_saved_x12,
+    call_saved_x13,
+    call_saved_x14,
+    call_saved_x15,
+    call_saved_x18,
+    complxnum,
+    crypto,
+    custom_cheap_as_move,
+    dit,
+    disable_latency_sched_heuristic,
+    dotprod,
+    exynos_cheap_as_move,
+    fmi,
+    fp16fml,
+    fp_armv8,
+    fptoint,
+    force_32bit_jump_tables,
+    fullfp16,
+    fuse_aes,
+    fuse_address,
+    fuse_arith_logic,
+    fuse_csel,
+    fuse_crypto_eor,
+    fuse_literals,
+    jsconv,
+    lor,
+    lse,
+    lsl_fast,
+    mpam,
+    mte,
+    neon,
+    nv,
+    no_neg_immediates,
+    pa,
+    pan,
+    pan_rwv,
+    perfmon,
+    use_postra_scheduler,
+    predres,
+    predictable_select_expensive,
+    uaops,
+    ras,
+    rasv8_4,
+    rcpc,
+    rcpc_immo,
+    rdm,
+    rand,
+    reserve_x1,
+    reserve_x2,
+    reserve_x3,
+    reserve_x4,
+    reserve_x5,
+    reserve_x6,
+    reserve_x7,
+    reserve_x9,
+    reserve_x10,
+    reserve_x11,
+    reserve_x12,
+    reserve_x13,
+    reserve_x14,
+    reserve_x15,
+    reserve_x18,
+    reserve_x20,
+    reserve_x21,
+    reserve_x22,
+    reserve_x23,
+    reserve_x24,
+    reserve_x25,
+    reserve_x26,
+    reserve_x27,
+    reserve_x28,
+    sb,
+    sel2,
+    sha2,
+    sha3,
+    sm4,
+    spe,
+    ssbs,
+    sve,
+    sve2,
+    sve2_aes,
+    sve2_bitperm,
+    sve2_sha3,
+    sve2_sm4,
+    slow_misaligned_128store,
+    slow_paired_128,
+    slow_strqro_store,
+    specrestrict,
+    strict_align,
+    tlb_rmi,
+    tracev84,
+    use_aa,
+    tpidr_el1,
+    tpidr_el2,
+    tpidr_el3,
+    use_reciprocal_square_root,
+    vh,
+    zcm,
+    zcz,
+    zcz_fp,
+    zcz_fp_workaround,
+    zcz_gp,
+};
+
+pub fn featureSet(features: []const Feature) Cpu.Feature.Set {
+    var x: Cpu.Feature.Set = 0;
+    for (features) |feature| {
+        x |= 1 << @enumToInt(feature);
+    }
+    return x;
+}
+
+pub fn featureSetHas(set: Feature.Set, feature: Feature) bool {
+    return (set & (1 << @enumToInt(feature))) != 0;
+}
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.aes)] = .{
+        .index = @enumToInt(Feature.aes),
+        .name = @tagName(Feature.aes),
+        .llvm_name = "aes",
+        .description = "Enable AES support",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.am)] = .{
+        .index = @enumToInt(Feature.am),
+        .name = @tagName(Feature.am),
+        .llvm_name = "am",
+        .description = "Enable v8.4-A Activity Monitors extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.aggressive_fma)] = .{
+        .index = @enumToInt(Feature.aggressive_fma),
+        .name = @tagName(Feature.aggressive_fma),
+        .llvm_name = "aggressive-fma",
+        .description = "Enable Aggressive FMA for floating-point.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.altnzcv)] = .{
+        .index = @enumToInt(Feature.altnzcv),
+        .name = @tagName(Feature.altnzcv),
+        .llvm_name = "altnzcv",
+        .description = "Enable alternative NZCV format for floating point comparisons",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
+        .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern),
+        .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern),
+        .llvm_name = "alternate-sextload-cvt-f32-pattern",
+        .description = "Use alternative pattern for sextload convert to f32",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.arith_bcc_fusion)] = .{
+        .index = @enumToInt(Feature.arith_bcc_fusion),
+        .name = @tagName(Feature.arith_bcc_fusion),
+        .llvm_name = "arith-bcc-fusion",
+        .description = "CPU fuses arithmetic+bcc operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.arith_cbz_fusion)] = .{
+        .index = @enumToInt(Feature.arith_cbz_fusion),
+        .name = @tagName(Feature.arith_cbz_fusion),
+        .llvm_name = "arith-cbz-fusion",
+        .description = "CPU fuses arithmetic + cbz/cbnz operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.balance_fp_ops)] = .{
+        .index = @enumToInt(Feature.balance_fp_ops),
+        .name = @tagName(Feature.balance_fp_ops),
+        .llvm_name = "balance-fp-ops",
+        .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.bti)] = .{
+        .index = @enumToInt(Feature.bti),
+        .name = @tagName(Feature.bti),
+        .llvm_name = "bti",
+        .description = "Enable Branch Target Identification",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccidx)] = .{
+        .index = @enumToInt(Feature.ccidx),
+        .name = @tagName(Feature.ccidx),
+        .llvm_name = "ccidx",
+        .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccpp)] = .{
+        .index = @enumToInt(Feature.ccpp),
+        .name = @tagName(Feature.ccpp),
+        .llvm_name = "ccpp",
+        .description = "Enable v8.2 data Cache Clean to Point of Persistence",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.crc)] = .{
+        .index = @enumToInt(Feature.crc),
+        .name = @tagName(Feature.crc),
+        .llvm_name = "crc",
+        .description = "Enable ARMv8 CRC-32 checksum instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccdp)] = .{
+        .index = @enumToInt(Feature.ccdp),
+        .name = @tagName(Feature.ccdp),
+        .llvm_name = "ccdp",
+        .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x8)] = .{
+        .index = @enumToInt(Feature.call_saved_x8),
+        .name = @tagName(Feature.call_saved_x8),
+        .llvm_name = "call-saved-x8",
+        .description = "Make X8 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x9)] = .{
+        .index = @enumToInt(Feature.call_saved_x9),
+        .name = @tagName(Feature.call_saved_x9),
+        .llvm_name = "call-saved-x9",
+        .description = "Make X9 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x10)] = .{
+        .index = @enumToInt(Feature.call_saved_x10),
+        .name = @tagName(Feature.call_saved_x10),
+        .llvm_name = "call-saved-x10",
+        .description = "Make X10 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x11)] = .{
+        .index = @enumToInt(Feature.call_saved_x11),
+        .name = @tagName(Feature.call_saved_x11),
+        .llvm_name = "call-saved-x11",
+        .description = "Make X11 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x12)] = .{
+        .index = @enumToInt(Feature.call_saved_x12),
+        .name = @tagName(Feature.call_saved_x12),
+        .llvm_name = "call-saved-x12",
+        .description = "Make X12 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x13)] = .{
+        .index = @enumToInt(Feature.call_saved_x13),
+        .name = @tagName(Feature.call_saved_x13),
+        .llvm_name = "call-saved-x13",
+        .description = "Make X13 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x14)] = .{
+        .index = @enumToInt(Feature.call_saved_x14),
+        .name = @tagName(Feature.call_saved_x14),
+        .llvm_name = "call-saved-x14",
+        .description = "Make X14 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x15)] = .{
+        .index = @enumToInt(Feature.call_saved_x15),
+        .name = @tagName(Feature.call_saved_x15),
+        .llvm_name = "call-saved-x15",
+        .description = "Make X15 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x18)] = .{
+        .index = @enumToInt(Feature.call_saved_x18),
+        .name = @tagName(Feature.call_saved_x18),
+        .llvm_name = "call-saved-x18",
+        .description = "Make X18 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.complxnum)] = .{
+        .index = @enumToInt(Feature.complxnum),
+        .name = @tagName(Feature.complxnum),
+        .llvm_name = "complxnum",
+        .description = "Enable v8.3-A Floating-point complex number support",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.crypto)] = .{
+        .index = @enumToInt(Feature.crypto),
+        .name = @tagName(Feature.crypto),
+        .llvm_name = "crypto",
+        .description = "Enable cryptographic instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.custom_cheap_as_move)] = .{
+        .index = @enumToInt(Feature.custom_cheap_as_move),
+        .name = @tagName(Feature.custom_cheap_as_move),
+        .llvm_name = "custom-cheap-as-move",
+        .description = "Use custom handling of cheap instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dit)] = .{
+        .index = @enumToInt(Feature.dit),
+        .name = @tagName(Feature.dit),
+        .llvm_name = "dit",
+        .description = "Enable v8.4-A Data Independent Timing instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
+        .index = @enumToInt(Feature.disable_latency_sched_heuristic),
+        .name = @tagName(Feature.disable_latency_sched_heuristic),
+        .llvm_name = "disable-latency-sched-heuristic",
+        .description = "Disable latency scheduling heuristic",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dotprod)] = .{
+        .index = @enumToInt(Feature.dotprod),
+        .name = @tagName(Feature.dotprod),
+        .llvm_name = "dotprod",
+        .description = "Enable dot product support",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
+        .index = @enumToInt(Feature.exynos_cheap_as_move),
+        .name = @tagName(Feature.exynos_cheap_as_move),
+        .llvm_name = "exynos-cheap-as-move",
+        .description = "Use Exynos specific handling of cheap instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .custom_cheap_as_move,
+        }),
+    };
+    result[@enumToInt(Feature.fmi)] = .{
+        .index = @enumToInt(Feature.fmi),
+        .name = @tagName(Feature.fmi),
+        .llvm_name = "fmi",
+        .description = "Enable v8.4-A Flag Manipulation Instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp16fml)] = .{
+        .index = @enumToInt(Feature.fp16fml),
+        .name = @tagName(Feature.fp16fml),
+        .llvm_name = "fp16fml",
+        .description = "Enable FP16 FML instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.fp_armv8)] = .{
+        .index = @enumToInt(Feature.fp_armv8),
+        .name = @tagName(Feature.fp_armv8),
+        .llvm_name = "fp-armv8",
+        .description = "Enable ARMv8 FP",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fptoint)] = .{
+        .index = @enumToInt(Feature.fptoint),
+        .name = @tagName(Feature.fptoint),
+        .llvm_name = "fptoint",
+        .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
+        .index = @enumToInt(Feature.force_32bit_jump_tables),
+        .name = @tagName(Feature.force_32bit_jump_tables),
+        .llvm_name = "force-32bit-jump-tables",
+        .description = "Force jump table entries to be 32-bits wide except at MinSize",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fullfp16)] = .{
+        .index = @enumToInt(Feature.fullfp16),
+        .name = @tagName(Feature.fullfp16),
+        .llvm_name = "fullfp16",
+        .description = "Full FP16",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.fuse_aes)] = .{
+        .index = @enumToInt(Feature.fuse_aes),
+        .name = @tagName(Feature.fuse_aes),
+        .llvm_name = "fuse-aes",
+        .description = "CPU fuses AES crypto operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_address)] = .{
+        .index = @enumToInt(Feature.fuse_address),
+        .name = @tagName(Feature.fuse_address),
+        .llvm_name = "fuse-address",
+        .description = "CPU fuses address generation and memory operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_arith_logic)] = .{
+        .index = @enumToInt(Feature.fuse_arith_logic),
+        .name = @tagName(Feature.fuse_arith_logic),
+        .llvm_name = "fuse-arith-logic",
+        .description = "CPU fuses arithmetic and logic operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_csel)] = .{
+        .index = @enumToInt(Feature.fuse_csel),
+        .name = @tagName(Feature.fuse_csel),
+        .llvm_name = "fuse-csel",
+        .description = "CPU fuses conditional select operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_crypto_eor)] = .{
+        .index = @enumToInt(Feature.fuse_crypto_eor),
+        .name = @tagName(Feature.fuse_crypto_eor),
+        .llvm_name = "fuse-crypto-eor",
+        .description = "CPU fuses AES/PMULL and EOR operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_literals)] = .{
+        .index = @enumToInt(Feature.fuse_literals),
+        .name = @tagName(Feature.fuse_literals),
+        .llvm_name = "fuse-literals",
+        .description = "CPU fuses literal generation operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.jsconv)] = .{
+        .index = @enumToInt(Feature.jsconv),
+        .name = @tagName(Feature.jsconv),
+        .llvm_name = "jsconv",
+        .description = "Enable v8.3-A JavaScript FP conversion enchancement",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.lor)] = .{
+        .index = @enumToInt(Feature.lor),
+        .name = @tagName(Feature.lor),
+        .llvm_name = "lor",
+        .description = "Enables ARM v8.1 Limited Ordering Regions extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lse)] = .{
+        .index = @enumToInt(Feature.lse),
+        .name = @tagName(Feature.lse),
+        .llvm_name = "lse",
+        .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lsl_fast)] = .{
+        .index = @enumToInt(Feature.lsl_fast),
+        .name = @tagName(Feature.lsl_fast),
+        .llvm_name = "lsl-fast",
+        .description = "CPU has a fastpath logical shift of up to 3 places",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mpam)] = .{
+        .index = @enumToInt(Feature.mpam),
+        .name = @tagName(Feature.mpam),
+        .llvm_name = "mpam",
+        .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mte)] = .{
+        .index = @enumToInt(Feature.mte),
+        .name = @tagName(Feature.mte),
+        .llvm_name = "mte",
+        .description = "Enable Memory Tagging Extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.neon)] = .{
+        .index = @enumToInt(Feature.neon),
+        .name = @tagName(Feature.neon),
+        .llvm_name = "neon",
+        .description = "Enable Advanced SIMD instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.nv)] = .{
+        .index = @enumToInt(Feature.nv),
+        .name = @tagName(Feature.nv),
+        .llvm_name = "nv",
+        .description = "Enable v8.4-A Nested Virtualization Enchancement",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_neg_immediates)] = .{
+        .index = @enumToInt(Feature.no_neg_immediates),
+        .name = @tagName(Feature.no_neg_immediates),
+        .llvm_name = "no-neg-immediates",
+        .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.pa)] = .{
+        .index = @enumToInt(Feature.pa),
+        .name = @tagName(Feature.pa),
+        .llvm_name = "pa",
+        .description = "Enable v8.3-A Pointer Authentication enchancement",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.pan)] = .{
+        .index = @enumToInt(Feature.pan),
+        .name = @tagName(Feature.pan),
+        .llvm_name = "pan",
+        .description = "Enables ARM v8.1 Privileged Access-Never extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.pan_rwv)] = .{
+        .index = @enumToInt(Feature.pan_rwv),
+        .name = @tagName(Feature.pan_rwv),
+        .llvm_name = "pan-rwv",
+        .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
+        .dependencies = featureSet(&[_]Feature{
+            .pan,
+        }),
+    };
+    result[@enumToInt(Feature.perfmon)] = .{
+        .index = @enumToInt(Feature.perfmon),
+        .name = @tagName(Feature.perfmon),
+        .llvm_name = "perfmon",
+        .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_postra_scheduler)] = .{
+        .index = @enumToInt(Feature.use_postra_scheduler),
+        .name = @tagName(Feature.use_postra_scheduler),
+        .llvm_name = "use-postra-scheduler",
+        .description = "Schedule again after register allocation",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.predres)] = .{
+        .index = @enumToInt(Feature.predres),
+        .name = @tagName(Feature.predres),
+        .llvm_name = "predres",
+        .description = "Enable v8.5a execution and data prediction invalidation instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.predictable_select_expensive)] = .{
+        .index = @enumToInt(Feature.predictable_select_expensive),
+        .name = @tagName(Feature.predictable_select_expensive),
+        .llvm_name = "predictable-select-expensive",
+        .description = "Prefer likely predicted branches over selects",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.uaops)] = .{
+        .index = @enumToInt(Feature.uaops),
+        .name = @tagName(Feature.uaops),
+        .llvm_name = "uaops",
+        .description = "Enable v8.2 UAO PState",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ras)] = .{
+        .index = @enumToInt(Feature.ras),
+        .name = @tagName(Feature.ras),
+        .llvm_name = "ras",
+        .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rasv8_4)] = .{
+        .index = @enumToInt(Feature.rasv8_4),
+        .name = @tagName(Feature.rasv8_4),
+        .llvm_name = "rasv8_4",
+        .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
+        .dependencies = featureSet(&[_]Feature{
+            .ras,
+        }),
+    };
+    result[@enumToInt(Feature.rcpc)] = .{
+        .index = @enumToInt(Feature.rcpc),
+        .name = @tagName(Feature.rcpc),
+        .llvm_name = "rcpc",
+        .description = "Enable support for RCPC extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rcpc_immo)] = .{
+        .index = @enumToInt(Feature.rcpc_immo),
+        .name = @tagName(Feature.rcpc_immo),
+        .llvm_name = "rcpc-immo",
+        .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
+        .dependencies = featureSet(&[_]Feature{
+            .rcpc,
+        }),
+    };
+    result[@enumToInt(Feature.rdm)] = .{
+        .index = @enumToInt(Feature.rdm),
+        .name = @tagName(Feature.rdm),
+        .llvm_name = "rdm",
+        .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rand)] = .{
+        .index = @enumToInt(Feature.rand),
+        .name = @tagName(Feature.rand),
+        .llvm_name = "rand",
+        .description = "Enable Random Number generation instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x1)] = .{
+        .index = @enumToInt(Feature.reserve_x1),
+        .name = @tagName(Feature.reserve_x1),
+        .llvm_name = "reserve-x1",
+        .description = "Reserve X1, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x2)] = .{
+        .index = @enumToInt(Feature.reserve_x2),
+        .name = @tagName(Feature.reserve_x2),
+        .llvm_name = "reserve-x2",
+        .description = "Reserve X2, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x3)] = .{
+        .index = @enumToInt(Feature.reserve_x3),
+        .name = @tagName(Feature.reserve_x3),
+        .llvm_name = "reserve-x3",
+        .description = "Reserve X3, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x4)] = .{
+        .index = @enumToInt(Feature.reserve_x4),
+        .name = @tagName(Feature.reserve_x4),
+        .llvm_name = "reserve-x4",
+        .description = "Reserve X4, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x5)] = .{
+        .index = @enumToInt(Feature.reserve_x5),
+        .name = @tagName(Feature.reserve_x5),
+        .llvm_name = "reserve-x5",
+        .description = "Reserve X5, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x6)] = .{
+        .index = @enumToInt(Feature.reserve_x6),
+        .name = @tagName(Feature.reserve_x6),
+        .llvm_name = "reserve-x6",
+        .description = "Reserve X6, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x7)] = .{
+        .index = @enumToInt(Feature.reserve_x7),
+        .name = @tagName(Feature.reserve_x7),
+        .llvm_name = "reserve-x7",
+        .description = "Reserve X7, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x9)] = .{
+        .index = @enumToInt(Feature.reserve_x9),
+        .name = @tagName(Feature.reserve_x9),
+        .llvm_name = "reserve-x9",
+        .description = "Reserve X9, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x10)] = .{
+        .index = @enumToInt(Feature.reserve_x10),
+        .name = @tagName(Feature.reserve_x10),
+        .llvm_name = "reserve-x10",
+        .description = "Reserve X10, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x11)] = .{
+        .index = @enumToInt(Feature.reserve_x11),
+        .name = @tagName(Feature.reserve_x11),
+        .llvm_name = "reserve-x11",
+        .description = "Reserve X11, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x12)] = .{
+        .index = @enumToInt(Feature.reserve_x12),
+        .name = @tagName(Feature.reserve_x12),
+        .llvm_name = "reserve-x12",
+        .description = "Reserve X12, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x13)] = .{
+        .index = @enumToInt(Feature.reserve_x13),
+        .name = @tagName(Feature.reserve_x13),
+        .llvm_name = "reserve-x13",
+        .description = "Reserve X13, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x14)] = .{
+        .index = @enumToInt(Feature.reserve_x14),
+        .name = @tagName(Feature.reserve_x14),
+        .llvm_name = "reserve-x14",
+        .description = "Reserve X14, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x15)] = .{
+        .index = @enumToInt(Feature.reserve_x15),
+        .name = @tagName(Feature.reserve_x15),
+        .llvm_name = "reserve-x15",
+        .description = "Reserve X15, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x18)] = .{
+        .index = @enumToInt(Feature.reserve_x18),
+        .name = @tagName(Feature.reserve_x18),
+        .llvm_name = "reserve-x18",
+        .description = "Reserve X18, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x20)] = .{
+        .index = @enumToInt(Feature.reserve_x20),
+        .name = @tagName(Feature.reserve_x20),
+        .llvm_name = "reserve-x20",
+        .description = "Reserve X20, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x21)] = .{
+        .index = @enumToInt(Feature.reserve_x21),
+        .name = @tagName(Feature.reserve_x21),
+        .llvm_name = "reserve-x21",
+        .description = "Reserve X21, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x22)] = .{
+        .index = @enumToInt(Feature.reserve_x22),
+        .name = @tagName(Feature.reserve_x22),
+        .llvm_name = "reserve-x22",
+        .description = "Reserve X22, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x23)] = .{
+        .index = @enumToInt(Feature.reserve_x23),
+        .name = @tagName(Feature.reserve_x23),
+        .llvm_name = "reserve-x23",
+        .description = "Reserve X23, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x24)] = .{
+        .index = @enumToInt(Feature.reserve_x24),
+        .name = @tagName(Feature.reserve_x24),
+        .llvm_name = "reserve-x24",
+        .description = "Reserve X24, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x25)] = .{
+        .index = @enumToInt(Feature.reserve_x25),
+        .name = @tagName(Feature.reserve_x25),
+        .llvm_name = "reserve-x25",
+        .description = "Reserve X25, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x26)] = .{
+        .index = @enumToInt(Feature.reserve_x26),
+        .name = @tagName(Feature.reserve_x26),
+        .llvm_name = "reserve-x26",
+        .description = "Reserve X26, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x27)] = .{
+        .index = @enumToInt(Feature.reserve_x27),
+        .name = @tagName(Feature.reserve_x27),
+        .llvm_name = "reserve-x27",
+        .description = "Reserve X27, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x28)] = .{
+        .index = @enumToInt(Feature.reserve_x28),
+        .name = @tagName(Feature.reserve_x28),
+        .llvm_name = "reserve-x28",
+        .description = "Reserve X28, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sb)] = .{
+        .index = @enumToInt(Feature.sb),
+        .name = @tagName(Feature.sb),
+        .llvm_name = "sb",
+        .description = "Enable v8.5 Speculation Barrier",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sel2)] = .{
+        .index = @enumToInt(Feature.sel2),
+        .name = @tagName(Feature.sel2),
+        .llvm_name = "sel2",
+        .description = "Enable v8.4-A Secure Exception Level 2 extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sha2)] = .{
+        .index = @enumToInt(Feature.sha2),
+        .name = @tagName(Feature.sha2),
+        .llvm_name = "sha2",
+        .description = "Enable SHA1 and SHA256 support",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.sha3)] = .{
+        .index = @enumToInt(Feature.sha3),
+        .name = @tagName(Feature.sha3),
+        .llvm_name = "sha3",
+        .description = "Enable SHA512 and SHA3 support",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.sm4)] = .{
+        .index = @enumToInt(Feature.sm4),
+        .name = @tagName(Feature.sm4),
+        .llvm_name = "sm4",
+        .description = "Enable SM3 and SM4 support",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.spe)] = .{
+        .index = @enumToInt(Feature.spe),
+        .name = @tagName(Feature.spe),
+        .llvm_name = "spe",
+        .description = "Enable Statistical Profiling extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ssbs)] = .{
+        .index = @enumToInt(Feature.ssbs),
+        .name = @tagName(Feature.ssbs),
+        .llvm_name = "ssbs",
+        .description = "Enable Speculative Store Bypass Safe bit",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sve)] = .{
+        .index = @enumToInt(Feature.sve),
+        .name = @tagName(Feature.sve),
+        .llvm_name = "sve",
+        .description = "Enable Scalable Vector Extension (SVE) instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sve2)] = .{
+        .index = @enumToInt(Feature.sve2),
+        .name = @tagName(Feature.sve2),
+        .llvm_name = "sve2",
+        .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sve,
+        }),
+    };
+    result[@enumToInt(Feature.sve2_aes)] = .{
+        .index = @enumToInt(Feature.sve2_aes),
+        .name = @tagName(Feature.sve2_aes),
+        .llvm_name = "sve2-aes",
+        .description = "Enable AES SVE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sve,
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.sve2_bitperm)] = .{
+        .index = @enumToInt(Feature.sve2_bitperm),
+        .name = @tagName(Feature.sve2_bitperm),
+        .llvm_name = "sve2-bitperm",
+        .description = "Enable bit permutation SVE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sve,
+        }),
+    };
+    result[@enumToInt(Feature.sve2_sha3)] = .{
+        .index = @enumToInt(Feature.sve2_sha3),
+        .name = @tagName(Feature.sve2_sha3),
+        .llvm_name = "sve2-sha3",
+        .description = "Enable SHA3 SVE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sve,
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.sve2_sm4)] = .{
+        .index = @enumToInt(Feature.sve2_sm4),
+        .name = @tagName(Feature.sve2_sm4),
+        .llvm_name = "sve2-sm4",
+        .description = "Enable SM4 SVE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sve,
+            .fp_armv8,
+        }),
+    };
+    result[@enumToInt(Feature.slow_misaligned_128store)] = .{
+        .index = @enumToInt(Feature.slow_misaligned_128store),
+        .name = @tagName(Feature.slow_misaligned_128store),
+        .llvm_name = "slow-misaligned-128store",
+        .description = "Misaligned 128 bit stores are slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_paired_128)] = .{
+        .index = @enumToInt(Feature.slow_paired_128),
+        .name = @tagName(Feature.slow_paired_128),
+        .llvm_name = "slow-paired-128",
+        .description = "Paired 128 bit loads and stores are slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_strqro_store)] = .{
+        .index = @enumToInt(Feature.slow_strqro_store),
+        .name = @tagName(Feature.slow_strqro_store),
+        .llvm_name = "slow-strqro-store",
+        .description = "STR of Q register with register offset is slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.specrestrict)] = .{
+        .index = @enumToInt(Feature.specrestrict),
+        .name = @tagName(Feature.specrestrict),
+        .llvm_name = "specrestrict",
+        .description = "Enable architectural speculation restriction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.strict_align)] = .{
+        .index = @enumToInt(Feature.strict_align),
+        .name = @tagName(Feature.strict_align),
+        .llvm_name = "strict-align",
+        .description = "Disallow all unaligned memory access",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tlb_rmi)] = .{
+        .index = @enumToInt(Feature.tlb_rmi),
+        .name = @tagName(Feature.tlb_rmi),
+        .llvm_name = "tlb-rmi",
+        .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tracev84)] = .{
+        .index = @enumToInt(Feature.tracev84),
+        .name = @tagName(Feature.tracev84),
+        .llvm_name = "tracev8.4",
+        .description = "Enable v8.4-A Trace extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_aa)] = .{
+        .index = @enumToInt(Feature.use_aa),
+        .name = @tagName(Feature.use_aa),
+        .llvm_name = "use-aa",
+        .description = "Use alias analysis during codegen",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tpidr_el1)] = .{
+        .index = @enumToInt(Feature.tpidr_el1),
+        .name = @tagName(Feature.tpidr_el1),
+        .llvm_name = "tpidr-el1",
+        .description = "Permit use of TPIDR_EL1 for the TLS base",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tpidr_el2)] = .{
+        .index = @enumToInt(Feature.tpidr_el2),
+        .name = @tagName(Feature.tpidr_el2),
+        .llvm_name = "tpidr-el2",
+        .description = "Permit use of TPIDR_EL2 for the TLS base",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tpidr_el3)] = .{
+        .index = @enumToInt(Feature.tpidr_el3),
+        .name = @tagName(Feature.tpidr_el3),
+        .llvm_name = "tpidr-el3",
+        .description = "Permit use of TPIDR_EL3 for the TLS base",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
+        .index = @enumToInt(Feature.use_reciprocal_square_root),
+        .name = @tagName(Feature.use_reciprocal_square_root),
+        .llvm_name = "use-reciprocal-square-root",
+        .description = "Use the reciprocal square root approximation",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vh)] = .{
+        .index = @enumToInt(Feature.vh),
+        .name = @tagName(Feature.vh),
+        .llvm_name = "vh",
+        .description = "Enables ARM v8.1 Virtual Host extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.zcm)] = .{
+        .index = @enumToInt(Feature.zcm),
+        .name = @tagName(Feature.zcm),
+        .llvm_name = "zcm",
+        .description = "Has zero-cycle register moves",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.zcz)] = .{
+        .index = @enumToInt(Feature.zcz),
+        .name = @tagName(Feature.zcz),
+        .llvm_name = "zcz",
+        .description = "Has zero-cycle zeroing instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .zcz_fp,
+            .zcz_gp,
+        }),
+    };
+    result[@enumToInt(Feature.zcz_fp)] = .{
+        .index = @enumToInt(Feature.zcz_fp),
+        .name = @tagName(Feature.zcz_fp),
+        .llvm_name = "zcz-fp",
+        .description = "Has zero-cycle zeroing instructions for FP registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.zcz_fp_workaround)] = .{
+        .index = @enumToInt(Feature.zcz_fp_workaround),
+        .name = @tagName(Feature.zcz_fp_workaround),
+        .llvm_name = "zcz-fp-workaround",
+        .description = "The zero-cycle floating-point zeroing instruction has a bug",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.zcz_gp)] = .{
+        .index = @enumToInt(Feature.zcz_gp),
+        .name = @tagName(Feature.zcz_gp),
+        .llvm_name = "zcz-gp",
+        .description = "Has zero-cycle zeroing instructions for generic registers",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const apple_latest = Cpu{
+        .name = "apple_latest",
+        .llvm_name = "apple-latest",
+        .features = featureSet(&[_]Feature{
+            .arith_cbz_fusion,
+            .zcz_fp_workaround,
+            .alternate_sextload_cvt_f32_pattern,
+            .fuse_crypto_eor,
+            .zcm,
+            .zcz_gp,
+            .perfmon,
+            .disable_latency_sched_heuristic,
+            .fp_armv8,
+            .zcz_fp,
+            .arith_bcc_fusion,
+            .fuse_aes,
+        }),
+    };
+
+    pub const cortex_a35 = Cpu{
+        .name = "cortex_a35",
+        .llvm_name = "cortex-a35",
+        .features = featureSet(&[_]Feature{
+            .perfmon,
+            .fp_armv8,
+            .crc,
+        }),
+    };
+
+    pub const cortex_a53 = Cpu{
+        .name = "cortex_a53",
+        .llvm_name = "cortex-a53",
+        .features = featureSet(&[_]Feature{
+            .custom_cheap_as_move,
+            .crc,
+            .perfmon,
+            .use_aa,
+            .fp_armv8,
+            .fuse_aes,
+            .balance_fp_ops,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const cortex_a55 = Cpu{
+        .name = "cortex_a55",
+        .llvm_name = "cortex-a55",
+        .features = featureSet(&[_]Feature{
+            .ccpp,
+            .rcpc,
+            .uaops,
+            .rdm,
+            .ras,
+            .lse,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .vh,
+            .fuse_aes,
+            .lor,
+            .dotprod,
+            .pan,
+        }),
+    };
+
+    pub const cortex_a57 = Cpu{
+        .name = "cortex_a57",
+        .llvm_name = "cortex-a57",
+        .features = featureSet(&[_]Feature{
+            .fuse_literals,
+            .predictable_select_expensive,
+            .custom_cheap_as_move,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .fuse_aes,
+            .balance_fp_ops,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const cortex_a72 = Cpu{
+        .name = "cortex_a72",
+        .llvm_name = "cortex-a72",
+        .features = featureSet(&[_]Feature{
+            .fuse_aes,
+            .fp_armv8,
+            .perfmon,
+            .crc,
+        }),
+    };
+
+    pub const cortex_a73 = Cpu{
+        .name = "cortex_a73",
+        .llvm_name = "cortex-a73",
+        .features = featureSet(&[_]Feature{
+            .fuse_aes,
+            .fp_armv8,
+            .perfmon,
+            .crc,
+        }),
+    };
+
+    pub const cortex_a75 = Cpu{
+        .name = "cortex_a75",
+        .llvm_name = "cortex-a75",
+        .features = featureSet(&[_]Feature{
+            .ccpp,
+            .rcpc,
+            .uaops,
+            .rdm,
+            .ras,
+            .lse,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .vh,
+            .fuse_aes,
+            .lor,
+            .dotprod,
+            .pan,
+        }),
+    };
+
+    pub const cortex_a76 = Cpu{
+        .name = "cortex_a76",
+        .llvm_name = "cortex-a76",
+        .features = featureSet(&[_]Feature{
+            .ccpp,
+            .rcpc,
+            .uaops,
+            .rdm,
+            .ras,
+            .lse,
+            .crc,
+            .fp_armv8,
+            .vh,
+            .lor,
+            .ssbs,
+            .dotprod,
+            .pan,
+        }),
+    };
+
+    pub const cortex_a76ae = Cpu{
+        .name = "cortex_a76ae",
+        .llvm_name = "cortex-a76ae",
+        .features = featureSet(&[_]Feature{
+            .ccpp,
+            .rcpc,
+            .uaops,
+            .rdm,
+            .ras,
+            .lse,
+            .crc,
+            .fp_armv8,
+            .vh,
+            .lor,
+            .ssbs,
+            .dotprod,
+            .pan,
+        }),
+    };
+
+    pub const cyclone = Cpu{
+        .name = "cyclone",
+        .llvm_name = "cyclone",
+        .features = featureSet(&[_]Feature{
+            .arith_cbz_fusion,
+            .zcz_fp_workaround,
+            .alternate_sextload_cvt_f32_pattern,
+            .fuse_crypto_eor,
+            .zcm,
+            .zcz_gp,
+            .perfmon,
+            .disable_latency_sched_heuristic,
+            .fp_armv8,
+            .zcz_fp,
+            .arith_bcc_fusion,
+            .fuse_aes,
+        }),
+    };
+
+    pub const exynos_m1 = Cpu{
+        .name = "exynos_m1",
+        .llvm_name = "exynos-m1",
+        .features = featureSet(&[_]Feature{
+            .custom_cheap_as_move,
+            .crc,
+            .force_32bit_jump_tables,
+            .perfmon,
+            .slow_misaligned_128store,
+            .use_reciprocal_square_root,
+            .fp_armv8,
+            .zcz_fp,
+            .fuse_aes,
+            .slow_paired_128,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const exynos_m2 = Cpu{
+        .name = "exynos_m2",
+        .llvm_name = "exynos-m2",
+        .features = featureSet(&[_]Feature{
+            .custom_cheap_as_move,
+            .crc,
+            .force_32bit_jump_tables,
+            .perfmon,
+            .slow_misaligned_128store,
+            .fp_armv8,
+            .zcz_fp,
+            .fuse_aes,
+            .slow_paired_128,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const exynos_m3 = Cpu{
+        .name = "exynos_m3",
+        .llvm_name = "exynos-m3",
+        .features = featureSet(&[_]Feature{
+            .fuse_literals,
+            .predictable_select_expensive,
+            .custom_cheap_as_move,
+            .crc,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_csel,
+            .perfmon,
+            .fp_armv8,
+            .zcz_fp,
+            .fuse_aes,
+            .lsl_fast,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const exynos_m4 = Cpu{
+        .name = "exynos_m4",
+        .llvm_name = "exynos-m4",
+        .features = featureSet(&[_]Feature{
+            .arith_cbz_fusion,
+            .custom_cheap_as_move,
+            .lse,
+            .zcz_fp,
+            .lsl_fast,
+            .lor,
+            .fuse_literals,
+            .ccpp,
+            .ras,
+            .fp_armv8,
+            .fuse_aes,
+            .pan,
+            .fuse_arith_logic,
+            .crc,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_csel,
+            .arith_bcc_fusion,
+            .uaops,
+            .rdm,
+            .zcz_gp,
+            .perfmon,
+            .vh,
+            .use_postra_scheduler,
+            .dotprod,
+        }),
+    };
+
+    pub const exynos_m5 = Cpu{
+        .name = "exynos_m5",
+        .llvm_name = "exynos-m5",
+        .features = featureSet(&[_]Feature{
+            .arith_cbz_fusion,
+            .custom_cheap_as_move,
+            .lse,
+            .zcz_fp,
+            .lsl_fast,
+            .lor,
+            .fuse_literals,
+            .ccpp,
+            .ras,
+            .fp_armv8,
+            .fuse_aes,
+            .pan,
+            .fuse_arith_logic,
+            .crc,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_csel,
+            .arith_bcc_fusion,
+            .uaops,
+            .rdm,
+            .zcz_gp,
+            .perfmon,
+            .vh,
+            .use_postra_scheduler,
+            .dotprod,
+        }),
+    };
+
+    pub const falkor = Cpu{
+        .name = "falkor",
+        .llvm_name = "falkor",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .custom_cheap_as_move,
+            .rdm,
+            .slow_strqro_store,
+            .zcz_gp,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .zcz_fp,
+            .lsl_fast,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const kryo = Cpu{
+        .name = "kryo",
+        .llvm_name = "kryo",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .custom_cheap_as_move,
+            .zcz_gp,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .zcz_fp,
+            .lsl_fast,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const saphira = Cpu{
+        .name = "saphira",
+        .llvm_name = "saphira",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .custom_cheap_as_move,
+            .fmi,
+            .lse,
+            .zcz_fp,
+            .lsl_fast,
+            .lor,
+            .dit,
+            .pa,
+            .ccpp,
+            .sel2,
+            .ras,
+            .fp_armv8,
+            .ccidx,
+            .pan,
+            .rcpc,
+            .crc,
+            .tracev84,
+            .mpam,
+            .am,
+            .nv,
+            .tlb_rmi,
+            .uaops,
+            .rdm,
+            .zcz_gp,
+            .perfmon,
+            .vh,
+            .use_postra_scheduler,
+            .dotprod,
+            .spe,
+        }),
+    };
+
+    pub const thunderx = Cpu{
+        .name = "thunderx",
+        .llvm_name = "thunderx",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const thunderx2t99 = Cpu{
+        .name = "thunderx2t99",
+        .llvm_name = "thunderx2t99",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .aggressive_fma,
+            .rdm,
+            .lse,
+            .crc,
+            .fp_armv8,
+            .vh,
+            .arith_bcc_fusion,
+            .lor,
+            .use_postra_scheduler,
+            .pan,
+        }),
+    };
+
+    pub const thunderxt81 = Cpu{
+        .name = "thunderxt81",
+        .llvm_name = "thunderxt81",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const thunderxt83 = Cpu{
+        .name = "thunderxt83",
+        .llvm_name = "thunderxt83",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const thunderxt88 = Cpu{
+        .name = "thunderxt88",
+        .llvm_name = "thunderxt88",
+        .features = featureSet(&[_]Feature{
+            .predictable_select_expensive,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .use_postra_scheduler,
+        }),
+    };
+
+    pub const tsv110 = Cpu{
+        .name = "tsv110",
+        .llvm_name = "tsv110",
+        .features = featureSet(&[_]Feature{
+            .ccpp,
+            .custom_cheap_as_move,
+            .uaops,
+            .rdm,
+            .ras,
+            .lse,
+            .crc,
+            .perfmon,
+            .fp_armv8,
+            .vh,
+            .fuse_aes,
+            .lor,
+            .use_postra_scheduler,
+            .dotprod,
+            .pan,
+            .spe,
+        }),
+    };
+};
+
+/// All aarch64 CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.apple_latest,
+    &cpu.cortex_a35,
+    &cpu.cortex_a53,
+    &cpu.cortex_a55,
+    &cpu.cortex_a57,
+    &cpu.cortex_a72,
+    &cpu.cortex_a73,
+    &cpu.cortex_a75,
+    &cpu.cortex_a76,
+    &cpu.cortex_a76ae,
+    &cpu.cyclone,
+    &cpu.exynos_m1,
+    &cpu.exynos_m2,
+    &cpu.exynos_m3,
+    &cpu.exynos_m4,
+    &cpu.exynos_m5,
+    &cpu.falkor,
+    &cpu.generic,
+    &cpu.kryo,
+    &cpu.saphira,
+    &cpu.thunderx,
+    &cpu.thunderx2t99,
+    &cpu.thunderxt81,
+    &cpu.thunderxt83,
+    &cpu.thunderxt88,
+    &cpu.tsv110,
 };
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 9b6ae2548b0fb9c56fa903e9c1e971eb1e637cc7..952c7525615f2c3e46abc486064173643b52985f 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -81,6 +81,9 @@ const Error = extern enum {
     OperationAborted,
     BrokenPipe,
     NoSpaceLeft,
+    NotLazy,
+    IsAsync,
+    ImportOutsidePkgPath,
 };
 
 const FILE = std.c.FILE;
@@ -150,7 +153,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void {
     const argc_usize = @intCast(usize, argc);
     var arg_i: usize = 0;
     while (arg_i < argc_usize) : (arg_i += 1) {
-        try args_list.append(std.mem.toSliceConst(u8, argv[arg_i]));
+        try args_list.append(mem.toSliceConst(u8, argv[arg_i]));
     }
 
     stdout = &std.io.getStdOut().outStream().stream;
@@ -532,7 +535,7 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
 // ABI warning
 export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
     printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
-        std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
+        std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
     };
 }
 
@@ -540,11 +543,11 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
-        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
+        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
         return;
     };
 
-    try stdout_stream.print("Available features for {}:\n", .{ @tagName(arch) });
+    try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)});
 
     const features = std.target.getFeaturesForArch(arch);
 
@@ -556,18 +559,18 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
     }
 
     for (features) |feature| {
-        try stdout_stream.print("  {}", .{ feature.name });
-        
+        try stdout_stream.print("  {}", .{feature.name});
+
         var i: usize = 0;
         while (i < longest_len - feature.name.len) : (i += 1) {
-            try stdout_stream.write(" ");    
+            try stdout_stream.write(" ");
         }
 
-        try stdout_stream.print(" - {}\n", .{ feature.description });
+        try stdout_stream.print(" - {}\n", .{feature.description});
 
         if (show_dependencies and feature.dependencies.len > 0) {
             for (feature.dependencies) |dependency| {
-                try stdout_stream.print("    {}\n", .{ dependency.name });
+                try stdout_stream.print("    {}\n", .{dependency.name});
             }
         }
     }
@@ -576,7 +579,7 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
 // ABI warning
 export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
     printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
-        std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) });
+        std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
     };
 }
 
@@ -584,13 +587,13 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
     const arch = Target.parseArchTag(arch_name) catch {
-        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name });
+        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
         return;
     };
 
     const cpus = std.target.getCpusForArch(arch);
 
-    try stdout_stream.print("Available cpus for {}:\n", .{ @tagName(arch) });
+    try stdout_stream.print("Available cpus for {}:\n", .{@tagName(arch)});
 
     var longest_len: usize = 0;
     for (cpus) |cpu| {
@@ -600,78 +603,97 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
     }
 
     for (cpus) |cpu| {
-        try stdout_stream.print("  {}", .{ cpu.name });
-        
+        try stdout_stream.print("  {}", .{cpu.name});
+
         var i: usize = 0;
         while (i < longest_len - cpu.name.len) : (i += 1) {
-            try stdout_stream.write(" ");    
+            try stdout_stream.write(" ");
         }
 
         try stdout_stream.write("\n");
 
         if (show_dependencies and cpu.dependencies.len > 0) {
             for (cpu.dependencies) |dependency| {
-                try stdout_stream.print("    {}\n", .{ dependency.name });
+                try stdout_stream.print("    {}\n", .{dependency.name});
             }
         }
     }
 }
 
-const null_terminated_empty_string = (&[_]u8 { 0 })[0..0 :0];
+const Stage2CpuFeatures = struct {
+    allocator: *mem.Allocator,
+    cpu_features: Target.CpuFeatures,
 
-fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 {
-    var buffer = try std.Buffer.init(allocator, str);
-    
-    const len = buffer.len();
-
-    // Don't deinit since we steal all the buffer's memory here.
-    return buffer.list.toOwnedSlice()[0..len :0];
-}
-
-const Stage2TargetDetails = struct {
-    allocator: *std.mem.Allocator,
-    target_details: std.target.TargetDetails,
-    
-    llvm_cpu_str: [:0]const u8,
-    llvm_features_str: [:0]const u8,
+    llvm_cpu_name: ?[:0]const u8,
+    llvm_features_str: ?[:0]const u8,
 
     builtin_str: [:0]const u8,
+    cache_hash: [:0]const u8,
 
     const Self = @This();
 
-    fn initCpu(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), cpu: *const std.target.Cpu) !Self {
-        var builtin_str_buffer = try std.Buffer.init(
-            allocator,
-            "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target.");
+    fn initBaseline(allocator: *mem.Allocator) !Self {
+        const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures.baseline;\n");
+        errdefer allocator.free(builtin_str);
+
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n");
+        errdefer allocator.free(cache_hash);
+
+        return Self{
+            .allocator = allocator,
+            .cpu_features = .{ .cpu = cpu },
+            .llvm_cpu_name = null,
+            .llvm_features_str = null,
+            .builtin_str = builtin_str,
+            .cache_hash = cache_hash,
+        };
+    }
 
-        try builtin_str_buffer.append(@tagName(arch));
-        try builtin_str_buffer.append(".cpu_");
-        try builtin_str_buffer.append(cpu.name);
-        try builtin_str_buffer.append("};");
+    fn initCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !Self {
+        const builtin_str = try std.fmt.allocPrint0(
+            allocator,
+            "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n",
+            arch.genericName(),
+            cpu.name,
+        );
+        errdefer allocator.free(builtin_str);
 
-        const cpu_string = cpu.llvm_name orelse "";
+        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features);
+        errdefer allocator.free(cache_hash);
 
         return Self{
             .allocator = allocator,
-            .target_details = .{
-                .cpu = cpu,
-            },
-            .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu_string),
-            .llvm_features_str = null_terminated_empty_string,
-            .builtin_str = builtin_str_buffer.toSliceConst(),
+            .cpu_features = .{ .cpu = cpu },
+            .llvm_cpu_name = cpu.llvm_name,
+            .llvm_features_str = null,
+            .builtin_str = builtin_str,
+            .cache_hash = cache_hash,
         };
     }
 
-    fn initFeatures(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), features: []*const std.target.Feature) !Self {
-        var builtin_str_buffer = try std.Buffer.init(
-            allocator, 
-            "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n");
+    fn initFeatures(
+        allocator: *mem.Allocator,
+        arch: Target.Arch,
+        features: Target.Cpu.Feature.Set,
+    ) !Self {
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features);
+        errdefer allocator.free(cache_hash);
+
+        const generic_arch_name = arch.genericName();
+        var builtin_str_buffer = try std.Buffer.allocPrint(
+            allocator,
+            "CpuFeatures{{ .features = Arch.{}.featureSet(&[_]Arch.{}.Feature{{\n",
+            generic_arch_name,
+            generic_arch_name,
+        );
+        defer builtin_str_buffer.deinit();
 
         var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
+        defer llvm_features_buffer.deinit();
 
         // First, disable all features.
         // This way, we only get the ones the user requests.
-        for (std.target.getFeaturesForArch(arch)) |feature| {
+        for (arch.allFeatures()) |feature| {
             if (feature.llvm_name) |llvm_name| {
                 try llvm_features_buffer.append("-");
                 try llvm_features_buffer.append(llvm_name);
@@ -684,232 +706,117 @@ const Stage2TargetDetails = struct {
                 try llvm_features_buffer.append("+");
                 try llvm_features_buffer.append(llvm_name);
                 try llvm_features_buffer.append(",");
-                
-                try builtin_str_buffer.append("&@import(\"std\").target.");
-                try builtin_str_buffer.append(@tagName(arch));
-                try builtin_str_buffer.append(".feature_");
-                try builtin_str_buffer.append(feature.name);
-                try builtin_str_buffer.append(",");
             }
+
+            try builtin_str_buffer.append("    .");
+            try builtin_str_buffer.append(feature.name);
+            try builtin_str_buffer.append(",\n");
+        }
+
+        if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) {
+            llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
         }
 
-        try builtin_str_buffer.append("}};");
+        try builtin_str_buffer.append("})};\n");
 
         return Self{
             .allocator = allocator,
-            .target_details = std.target.TargetDetails{
-                .features = features,
-            },
-            .llvm_cpu_str = null_terminated_empty_string,
-            .llvm_features_str = llvm_features_buffer.toSliceConst(),
-            .builtin_str = builtin_str_buffer.toSliceConst(),
+            .cpu_features = .{ .features = features },
+            .llvm_cpu_name = null,
+            .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+            .builtin_str = builtin_str_buffer.toOwnedSlice(),
+            .cache_hash = cache_hash,
         };
     }
-};
-
-// ABI warning
-export fn stage2_target_details_parse_cpu(arch_str: ?[*:0]const u8, cpu_str: ?[*:0]const u8) ?*Stage2TargetDetails {
-    if (cpu_str == null) return null;
-    if (arch_str == null) return null;
 
-    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch {
-        return null;
-    };
-    return parseCpu(arch, std.mem.toSliceConst(u8, cpu_str.?)) catch |err| {
-        switch (err) {
-            error.OutOfMemory => @panic("out of memory"),
-            else => return null,
-        }
-    };
-}
+    fn deinit(self: *Self) void {
+        self.allocator.free(self.cache_hash);
+        self.allocator.free(self.builtin_str);
+        if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
+        self.* = undefined;
+    }
+};
 
 // ABI warning
-export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, features_str: ?[*:0]const u8) ?*Stage2TargetDetails {
-    if (features_str == null) return null;
-    if (arch_str == null) return null;
-    
-    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null;
-    return parseFeatures(arch, std.mem.toSliceConst(u8, features_str.?)) catch |err| {
-        switch (err) {
-            error.OutOfMemory => @panic("out of memory"),
-            else => return null,
-        }
+export fn stage2_cpu_features_parse_cpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) *Stage2CpuFeatures {
+    return parseCpu(arch_name, cpu_name) catch |err| switch (err) {
+        error.OutOfMemory => @panic("out of memory"),
     };
 }
 
-fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails {
-    const allocator = std.heap.c_allocator;
+fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures {
+    const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
+    const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name));
 
-    const cpus = std.target.getCpusForArch(arch);
+    const ptr = try allocator.create(Stage2CpuFeatures);
+    errdefer std.heap.c_allocator.destroy(ptr);
 
-    for (cpus) |cpu| {
-        if (std.mem.eql(u8, str, cpu.name)) {
-            const ptr = try allocator.create(Stage2TargetDetails);
-            ptr.* = try Stage2TargetDetails.initCpu(std.heap.c_allocator, arch, cpu);
+    ptr.* = try Stage2CpuFeatures.initCpu(std.heap.c_allocator, arch, cpu);
+    errdefer ptr.deinit();
 
-            return ptr;
-        }
-    }
-
-    return error.InvalidCpu;
+    return ptr;
 }
 
-fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails {
-    const allocator = std.heap.c_allocator;
-
-    const known_features = std.target.getFeaturesForArch(arch);
-
-    var features = std.ArrayList(*const std.target.Feature).init(allocator);
-    defer features.deinit();
-
-    var start: usize = 0;
-    while (start < str.len) {
-        const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start;
-        const feature_str = std.mem.trim(u8, str[start..start+next_comma_pos], " ");
-
-        start += next_comma_pos + 1;
-
-        if (feature_str.len == 0) continue;
-
-        var feature: ?*const std.target.Feature = null;
-        for (known_features) |known_feature| {
-            if (std.mem.eql(u8, feature_str, known_feature.name)) {
-                feature = known_feature;
-                break;
-            }
-        }
-
-        if (feature) |f| {
-            features.append(f) catch @panic("out of memory");
+// ABI warning
+export fn stage2_cpu_features_parse_features(
+    arch_name: [*:0]const u8,
+    features_text: [*:0]const u8,
+) *Stage2CpuFeatures {
+    return parseFeatures(arch_name, features_text) catch |err| switch (err) {
+        error.OutOfMemory => @panic("out of memory"),
+    };
+}
 
-        } else {
-            return error.InvalidFeature;
-        }
-    }
+fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures {
+    const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
+    const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text));
 
-    const features_slice = features.toOwnedSlice();
+    const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures);
+    errdefer std.heap.c_allocator.destroy(ptr);
 
-    const ptr = try allocator.create(Stage2TargetDetails);
-    ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features_slice);
+    ptr.* = try Stage2CpuFeatures.initFeatures(std.heap.c_allocator, arch, set);
+    errdefer ptr.deinit();
 
     return ptr;
 }
 
 // ABI warning
-export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
-    if (target_details) |td| {
-        return @as([*:0]const u8, switch (td.target_details) {
-            .cpu => td.llvm_cpu_str,
-            .features => td.llvm_features_str,
-        });
-    }
-
-    return @as([*:0]const u8, null_terminated_empty_string);
-}
+export fn stage2_cpu_features_baseline() *Stage2CpuFeatures {
+    const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures);
+    errdefer std.heap.c_allocator.destroy(ptr);
 
-// ABI warning
-export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
-    if (target_details) |td| {
-        return @as([*:0]const u8, td.llvm_cpu_str);
-    }
+    ptr.* = try Stage2CpuFeatures.initBaseline(std.heap.c_allocator);
+    errdefer ptr.deinit();
 
-    return @as([*:0]const u8, null_terminated_empty_string);
+    return ptr;
 }
 
 // ABI warning
-export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
-    if (target_details) |td| {
-        return @as([*:0]const u8, td.llvm_features_str);
-    }
-
-    return @as([*:0]const u8, null_terminated_empty_string);
+export fn stage2_cpu_features_get_cache_hash(
+    cpu_features: *const Stage2CpuFeatures,
+    ptr: *[*:0]const u8,
+    len: *usize,
+) void {
+    ptr.* = cpu_features.cache_hash.ptr;
+    len.* = cpu_features.cache_hash.len;
 }
 
 // ABI warning
-export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 {
-    if (target_details) |td| {
-        return @as([*:0]const u8, td.builtin_str);
-    }
-
-    return @as([*:0]const u8, null_terminated_empty_string);
+export fn stage2_cpu_features_get_builtin_str(
+    cpu_features: *const Stage2CpuFeatures,
+    ptr: *[*:0]const u8,
+    len: *usize,
+) void {
+    ptr.* = cpu_features.builtin_str.ptr;
+    len.* = cpu_features.builtin_str.len;
 }
 
-const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
-    &std.target.riscv.feature_a,
-    &std.target.riscv.feature_c,
-    &std.target.riscv.feature_d,
-    &std.target.riscv.feature_f,
-    &std.target.riscv.feature_m,
-    &std.target.riscv.feature_relax,
-};
-
-const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
-    &std.target.riscv.feature_bit64,
-    &std.target.riscv.feature_a,
-    &std.target.riscv.feature_c,
-    &std.target.riscv.feature_d,
-    &std.target.riscv.feature_f,
-    &std.target.riscv.feature_m,
-    &std.target.riscv.feature_relax,
-};
-
-const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature {
-    &std.target.x86.feature_cmov,
-    &std.target.x86.feature_cx8,
-    &std.target.x86.feature_fxsr,
-    &std.target.x86.feature_mmx,
-    &std.target.x86.feature_nopl,
-    &std.target.x86.feature_sse,
-    &std.target.x86.feature_sse2,
-    &std.target.x86.feature_slowUnalignedMem16,
-    &std.target.x86.feature_x87,
-};
-
-// Same as above but without sse.
-const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature {
-    &std.target.x86.feature_cmov,
-    &std.target.x86.feature_cx8,
-    &std.target.x86.feature_fxsr,
-    &std.target.x86.feature_mmx,
-    &std.target.x86.feature_nopl,
-    &std.target.x86.feature_slowUnalignedMem16,
-    &std.target.x86.feature_x87,
-};
-
 // ABI warning
-export fn stage2_target_details_get_default(arch_str: ?[*:0]const u8, os_str: ?[*:0]const u8) ?*Stage2TargetDetails {
-    if (arch_str == null) return null;
-    if (os_str == null) return null;
-    
-    const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null;
-    const os = Target.parseOs(std.mem.toSliceConst(u8, os_str.?)) catch return null;
-
-    return createDefaultTargetDetails(arch, os) catch return null;
+export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
+    return cpu_features.llvm_cpu_name;
 }
 
-fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os) !?*Stage2TargetDetails {
-    const allocator = std.heap.c_allocator;
-
-    return switch (arch) {
-        .riscv32 => blk: {
-            const ptr = try allocator.create(Stage2TargetDetails);
-            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv32_default_features);
-            break :blk ptr;
-        },
-        .riscv64 => blk: {
-            const ptr = try allocator.create(Stage2TargetDetails);
-            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv64_default_features);
-            break :blk ptr;
-        },
-        .i386 => blk: {
-            const ptr = try allocator.create(Stage2TargetDetails);
-            const features = switch (os) {
-                .freestanding => i386_default_features_freestanding,
-                else => i386_default_features,
-            };
-            ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features);
-            break :blk ptr;
-        },
-        else => null,
-    };
+// ABI warning
+export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
+    return cpu_features.llvm_features_str;
 }
diff --git a/src/all_types.hpp b/src/all_types.hpp
index d81e401232e057cc5a2b5454ed61a0e74cd868df..df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -2215,8 +2215,6 @@ struct CodeGen {
 
     const char **clang_argv;
     size_t clang_argv_len;
-
-    Stage2TargetDetails *target_details;
 };
 
 struct ZigVar {
diff --git a/src/codegen.cpp b/src/codegen.cpp
index b2cae32fa602accc3d89285df5bb257d809d7b66..9cbd5fc6ab223eda23a0cea1d48e34772ec3b5aa 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8573,6 +8573,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
     buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
     buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
     buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
+    {
+        buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
+        if (g->zig_target->cpu_features != nullptr) {
+            const char *ptr;
+            size_t len;
+            stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
+            buf_append_mem(contents, ptr, len);
+        } else {
+            buf_append_str(contents, ".baseline;\n");
+        }
+    }
     if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
         buf_appendf(contents,
             "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",
@@ -8602,14 +8613,6 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
             "pub var test_functions: []TestFn = undefined; // overwritten later\n"
         );
     }
-    
-    buf_appendf(contents, "pub const target_details: ?@import(\"std\").target.TargetDetails = ");
-    if (g->target_details) {
-        buf_appendf(contents, "%s", stage2_target_details_get_builtin_str(g->target_details));
-    } else {
-        buf_appendf(contents, "null;");
-    }
-    buf_appendf(contents, "\n");
 
     return contents;
 }
@@ -8648,6 +8651,12 @@ static Error define_builtin_compile_vars(CodeGen *g) {
     cache_int(&cache_hash, g->zig_target->vendor);
     cache_int(&cache_hash, g->zig_target->os);
     cache_int(&cache_hash, g->zig_target->abi);
+    if (g->zig_target->cpu_features != nullptr) {
+        const char *ptr;
+        size_t len;
+        stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
+        cache_str(&cache_hash, ptr);
+    }
     if (g->zig_target->glibc_version != nullptr) {
         cache_int(&cache_hash, g->zig_target->glibc_version->major);
         cache_int(&cache_hash, g->zig_target->glibc_version->minor);
@@ -8659,10 +8668,6 @@ static Error define_builtin_compile_vars(CodeGen *g) {
     cache_bool(&cache_hash, g->link_eh_frame_hdr);
     cache_int(&cache_hash, detect_subsystem(g));
 
-    if (g->target_details) {
-        cache_str(&cache_hash, stage2_target_details_get_cache_str(g->target_details));
-    }
-
     Buf digest = BUF_INIT;
     buf_resize(&digest, 0);
     if ((err = cache_hit(&cache_hash, &digest))) {
@@ -8793,9 +8798,9 @@ static void init(CodeGen *g) {
     }
 
     // Override CPU and features if defined by user.
-    if (g->target_details) {
-        target_specific_cpu_args = stage2_target_details_get_llvm_cpu(g->target_details);
-        target_specific_features = stage2_target_details_get_llvm_features(g->target_details);
+    if (g->zig_target->cpu_features != nullptr) {
+        target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
+        target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
     }
     
     g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
@@ -9123,15 +9128,19 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
         args.append("-target");
         args.append(buf_ptr(&g->llvm_triple_str));
 
-        if (g->target_details) {
+        const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
+        if (llvm_cpu != nullptr) {
             args.append("-Xclang");
             args.append("-target-cpu");
             args.append("-Xclang");
-            args.append(stage2_target_details_get_llvm_cpu(g->target_details));
+            args.append(llvm_cpu);
+        }
+        const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
+        if (llvm_target_features != nullptr) {
             args.append("-Xclang");
             args.append("-target-feature");
             args.append("-Xclang");
-            args.append(stage2_target_details_get_llvm_features(g->target_details));
+            args.append(llvm_target_features);
         }
     }
 
@@ -10328,6 +10337,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
     cache_int(ch, g->zig_target->vendor);
     cache_int(ch, g->zig_target->os);
     cache_int(ch, g->zig_target->abi);
+    if (g->zig_target->cpu_features != nullptr) {
+        const char *ptr;
+        size_t len;
+        stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
+        cache_str(ch, ptr);
+    }
     if (g->zig_target->glibc_version != nullptr) {
         cache_int(ch, g->zig_target->glibc_version->major);
         cache_int(ch, g->zig_target->glibc_version->minor);
@@ -10375,10 +10390,6 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
     cache_buf_opt(ch, g->dynamic_linker_path);
     cache_buf_opt(ch, g->version_script_path);
 
-    if (g->target_details) {
-        cache_str(ch, stage2_target_details_get_cache_str(g->target_details));
-    }
-
     // gen_c_objects appends objects to g->link_objects which we want to include in the hash
     gen_c_objects(g);
     cache_list_of_file(ch, g->link_objects.items, g->link_objects.length);
@@ -10661,7 +10672,6 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
 
     CodeGen *child_gen = codegen_create(nullptr, root_src_path, parent_gen->zig_target, out_type,
         parent_gen->build_mode, parent_gen->zig_lib_dir, libc, get_global_cache_dir(), false, child_progress_node);
-    child_gen->target_details = parent_gen->target_details;
     child_gen->root_out_name = buf_create_from_str(name);
     child_gen->disable_gen_h = true;
     child_gen->want_stack_check = WantStackCheckDisabled;
diff --git a/src/main.cpp b/src/main.cpp
index 441bc2afb0e2e85e31204133a4afa9f7d90467df..42a3438def09a7d10986d911666bcd5f51850f3d 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -955,9 +955,9 @@ int main(int argc, char **argv) {
                     targets_list_features_arch = argv[i];
                 } else if (strcmp(arg, "--list-cpus") == 0) {
                     targets_list_cpus_arch = argv[i];
-                } else if (strcmp(arg, "--cpu") == 0) {
+                } else if (strcmp(arg, "-target-cpu") == 0) {
                     cpu = argv[i];
-                } else if (strcmp(arg, "--features") == 0) {
+                } else if (strcmp(arg, "-target-feature") == 0) {
                     features = argv[i];
                 }else {
                     fprintf(stderr, "Invalid argument: %s\n", arg);
@@ -1074,27 +1074,26 @@ int main(int argc, char **argv) {
         }
     }
 
-    Stage2TargetDetails *target_details = nullptr;
     if (cpu && features) {
-        fprintf(stderr, "--cpu and --features options not allowed together\n");
+        fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n");
         return main_exit(root_progress_node, EXIT_FAILURE);
     } else if (cpu) {
-        target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu);
-        if (!target_details) {
-            fprintf(stderr, "invalid --cpu value\n");
+        target.cpu_features = stage2_cpu_features_parse_cpu(target_arch_name(target.arch), cpu);
+        if (!target.cpu_features) {
+            fprintf(stderr, "invalid -target-cpu value\n");
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else if (features) {
-        target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features);
-        if (!target_details) {
-            fprintf(stderr, "invalid --features value\n");
+        target.cpu_features = stage2_cpu_features_parse_features(target_arch_name(target.arch), features);
+        if (!target.cpu_features) {
+            fprintf(stderr, "invalid -target-feature value\n");
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else {
         // If no details are specified and we are not native, load
         // cross-compilation default features.
         if (!target.is_native) {
-            target_details = stage2_target_details_get_default(target_arch_name(target.arch), target_os_name(target.os));
+            target.cpu_features = stage2_cpu_features_baseline();
         }
     }
 
@@ -1148,7 +1147,6 @@ int main(int argc, char **argv) {
         g->want_stack_check = want_stack_check;
         g->want_sanitize_c = want_sanitize_c;
         g->want_single_threaded = want_single_threaded;
-        g->target_details = target_details;
         Buf *builtin_source = codegen_generate_builtin_source(g);
         if (fwrite(buf_ptr(builtin_source), 1, buf_len(builtin_source), stdout) != buf_len(builtin_source)) {
             fprintf(stderr, "unable to write to stdout: %s\n", strerror(ferror(stdout)));
@@ -1303,8 +1301,6 @@ int main(int argc, char **argv) {
                 codegen_add_rpath(g, rpath_list.at(i));
             }
 
-            g->target_details = target_details;
-
             codegen_set_rdynamic(g, rdynamic);
             if (mmacosx_version_min && mios_version_min) {
                 fprintf(stderr, "-mmacosx-version-min and -mios-version-min options not allowed together\n");
diff --git a/src/target.hpp b/src/target.hpp
index 50611bc853b8ed3675cc5cc808281898f7d327aa..3e984e1269cb867773ff9125e28ebe05675a3294 100644
--- a/src/target.hpp
+++ b/src/target.hpp
@@ -91,6 +91,7 @@ struct ZigTarget {
     Os os;
     ZigLLVM_EnvironmentType abi;
     ZigGLibCVersion *glibc_version; // null means default
+    Stage2CpuFeatures *cpu_features;
     bool is_native;
 };
 
diff --git a/src/userland.cpp b/src/userland.cpp
index 0e173d7e76427ece75719341722d5acb2f892fa3..89ddecbedb1e12e7a81fadcc6da2d02d883e28cc 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -89,26 +89,44 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {}
 void stage2_progress_disable_tty(Stage2Progress *progress) {}
 void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
 
-void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
-void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {}
-Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str) {
-    return nullptr;
+void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
+    const char *msg = "stage0 called stage2_list_features_for_arch";
+    stage2_panic(msg, strlen(msg));
 }
-Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str) {
-    return nullptr;
+
+void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
+    const char *msg = "stage0 called stage2_list_cpus_for_arch";
+    stage2_panic(msg, strlen(msg));
 }
-const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details) {
-    return "";
+Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *str) {
+    const char *msg = "stage0 called stage2_cpu_features_parse_cpu";
+    stage2_panic(msg, strlen(msg));
 }
-const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details) {
-    return "";
+Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *str) {
+    const char *msg = "stage0 called stage2_cpu_features_parse_features";
+    stage2_panic(msg, strlen(msg));
 }
-const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) {
-    return "";
+Stage2CpuFeatures *stage2_cpu_features_baseline(void) {
+    const char *msg = "stage0 called stage2_cpu_features_baseline";
+    stage2_panic(msg, strlen(msg));
 }
-const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) {
-    return "";
+void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
+        const char **ptr, size_t *len)
+{
+    const char *msg = "stage0 called stage2_cpu_features_get_cache_hash";
+    stage2_panic(msg, strlen(msg));
 }
-Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os) {
-    return nullptr;
+const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
+    const char *msg = "stage0 called stage2_cpu_features_get_llvm_cpu";
+    stage2_panic(msg, strlen(msg));
+}
+const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
+    const char *msg = "stage0 called stage2_cpu_features_get_llvm_features";
+    stage2_panic(msg, strlen(msg));
+}
+void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, 
+        const char **ptr, size_t *len)
+{
+    const char *msg = "stage0 called stage2_cpu_features_get_builtin_str";
+    stage2_panic(msg, strlen(msg));
 }
diff --git a/src/userland.h b/src/userland.h
index f954efd3fe0db8a4f72843ff6122bccbfb3b1589..9afa04829918df95b87b061075ba42aa4d8b1315 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -181,27 +181,29 @@ ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_
 ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
 
 // ABI warning
-struct Stage2TargetDetails;
+struct Stage2CpuFeatures;
 
 // ABI warning
-ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str);
+ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *cpu_name);
 
 // ABI warning
-ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str);
+ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *features);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details);
+ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_baseline(void);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details);
+ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details);
+ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details);
+ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
+        const char **ptr, size_t *len);
 
 // ABI warning
-ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os);
+ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
+        const char **ptr, size_t *len);
 
 #endif
-- 
2.54.0


From a313f153841df8caa3af8fc80966c8f61a856f51 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 19 Jan 2020 13:52:29 -0500
Subject: [PATCH 059/116] figure out zig0/stage1 and scanning for native CPU

---
 src-self-hosted/stage1.zig | 146 +++++++++++++++++++++++++++----------
 src/main.cpp               |  32 +++++---
 src/userland.cpp           |  46 ++++++++----
 src/userland.h             |  20 +++--
 4 files changed, 172 insertions(+), 72 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 952c7525615f2c3e46abc486064173643b52985f..f0593f8fce67a5a236b3af2a7ec22ed108791300 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -632,24 +632,77 @@ const Stage2CpuFeatures = struct {
 
     const Self = @This();
 
-    fn initBaseline(allocator: *mem.Allocator) !Self {
-        const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures.baseline;\n");
+    fn createBaseline(allocator: *mem.Allocator) !*Self {
+        const self = try allocator.create(Self);
+        errdefer allocator.destroy(self);
+
+        const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n");
         errdefer allocator.free(builtin_str);
 
         const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n");
         errdefer allocator.free(cache_hash);
 
-        return Self{
+        self.* = Self{
             .allocator = allocator,
-            .cpu_features = .{ .cpu = cpu },
+            .cpu_features = .baseline,
             .llvm_cpu_name = null,
             .llvm_features_str = null,
             .builtin_str = builtin_str,
             .cache_hash = cache_hash,
         };
+        return self;
     }
 
-    fn initCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !Self {
+    fn createFromLLVM(
+        allocator: *mem.Allocator,
+        arch: [*:0]const u8,
+        llvm_cpu_name_z: [*:0]const u8,
+        llvm_cpu_features: [*:0]const u8,
+    ) !*Self {
+        const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
+        const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z);
+
+        for (arch.allCpus()) |cpu| {
+            const this_llvm_name = cpu.llvm_name orelse continue;
+            if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
+                return createFromCpu(allocator, arch, cpu);
+            }
+        }
+
+        var set = arch.baselineFeatures();
+        var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
+        while (it.next()) |decorated_llvm_feat| {
+            var op: enum {
+                add,
+                sub,
+            } = undefined;
+            var llvm_feat: []const u8 = undefined;
+            if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
+                op = .add;
+                llvm_feat = decorated_llvm_feat[1..];
+            } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
+                op = .sub;
+                llvm_feat = decorated_llvm_feat[1..];
+            } else {
+                return error.InvalidLlvmCpuFeaturesFormat;
+            }
+            for (arch.allFeaturesList()) |feature, index| {
+                if (mem.eql(u8, feature_name, feature.name)) {
+                    switch (op) {
+                        .add => set |= 1 << index,
+                        .sub => set &= ~@as(Target.Cpu.Feature.Set, 1 << index),
+                    }
+                    break;
+                }
+            }
+        }
+        return createFromCpuFeatures(allocator, arch, set);
+    }
+
+    fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self {
+        const self = try allocator.create(Self);
+        errdefer allocator.destroy(self);
+
         const builtin_str = try std.fmt.allocPrint0(
             allocator,
             "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n",
@@ -661,7 +714,7 @@ const Stage2CpuFeatures = struct {
         const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features);
         errdefer allocator.free(cache_hash);
 
-        return Self{
+        self.* = Self{
             .allocator = allocator,
             .cpu_features = .{ .cpu = cpu },
             .llvm_cpu_name = cpu.llvm_name,
@@ -669,13 +722,17 @@ const Stage2CpuFeatures = struct {
             .builtin_str = builtin_str,
             .cache_hash = cache_hash,
         };
+        return self;
     }
 
-    fn initFeatures(
+    fn createFromCpuFeatures(
         allocator: *mem.Allocator,
         arch: Target.Arch,
         features: Target.Cpu.Feature.Set,
-    ) !Self {
+    ) !*Self {
+        const self = try allocator.create(Self);
+        errdefer allocator.destroy(self);
+
         const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features);
         errdefer allocator.free(cache_hash);
 
@@ -719,7 +776,7 @@ const Stage2CpuFeatures = struct {
 
         try builtin_str_buffer.append("})};\n");
 
-        return Self{
+        self.* = Self{
             .allocator = allocator,
             .cpu_features = .{ .features = features },
             .llvm_cpu_name = null,
@@ -727,68 +784,77 @@ const Stage2CpuFeatures = struct {
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
             .cache_hash = cache_hash,
         };
+        return self;
     }
 
-    fn deinit(self: *Self) void {
+    fn destroy(self: *Self) void {
         self.allocator.free(self.cache_hash);
         self.allocator.free(self.builtin_str);
         if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
-        self.* = undefined;
+        self.allocator.destroy(self);
     }
 };
 
 // ABI warning
-export fn stage2_cpu_features_parse_cpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) *Stage2CpuFeatures {
-    return parseCpu(arch_name, cpu_name) catch |err| switch (err) {
-        error.OutOfMemory => @panic("out of memory"),
+export fn stage2_cpu_features_parse_cpu(
+    result: **Stage2CpuFeatures,
+    arch_name: [*:0]const u8,
+    cpu_name: [*:0]const u8,
+) Error {
+    result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) {
+        error.OutOfMemory => return .OutOfMemory,
     };
+    return .None;
 }
 
 fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures {
     const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
     const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name));
-
-    const ptr = try allocator.create(Stage2CpuFeatures);
-    errdefer std.heap.c_allocator.destroy(ptr);
-
-    ptr.* = try Stage2CpuFeatures.initCpu(std.heap.c_allocator, arch, cpu);
-    errdefer ptr.deinit();
-
-    return ptr;
+    return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu);
 }
 
 // ABI warning
 export fn stage2_cpu_features_parse_features(
+    result: **Stage2CpuFeatures,
     arch_name: [*:0]const u8,
     features_text: [*:0]const u8,
-) *Stage2CpuFeatures {
-    return parseFeatures(arch_name, features_text) catch |err| switch (err) {
-        error.OutOfMemory => @panic("out of memory"),
+) Error {
+    result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) {
+        error.OutOfMemory => return .OutOfMemory,
     };
+    return .None;
 }
 
 fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures {
     const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
     const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text));
-
-    const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures);
-    errdefer std.heap.c_allocator.destroy(ptr);
-
-    ptr.* = try Stage2CpuFeatures.initFeatures(std.heap.c_allocator, arch, set);
-    errdefer ptr.deinit();
-
-    return ptr;
+    return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set);
 }
 
 // ABI warning
-export fn stage2_cpu_features_baseline() *Stage2CpuFeatures {
-    const ptr = try std.heap.c_allocator.create(Stage2CpuFeatures);
-    errdefer std.heap.c_allocator.destroy(ptr);
-
-    ptr.* = try Stage2CpuFeatures.initBaseline(std.heap.c_allocator);
-    errdefer ptr.deinit();
+export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error {
+    result.* = Stage2CpuFeatures.createBaseline(std.heap.c_allocator) catch |err| switch (err) {
+        error.OutOfMemory => return .OutOfMemory,
+    };
+    return .None;
+}
 
-    return ptr;
+// ABI warning
+export fn stage2_cpu_features_llvm(
+    result: **Stage2CpuFeatures,
+    arch_name: [*:0]const u8,
+    llvm_cpu_name: [*:0]const u8,
+    llvm_cpu_features: [*:0]const u8,
+) Error {
+    result.* = Stage2CpuFeatures.createFromLLVM(
+        std.heap.c_allocator,
+        arch_name,
+        llvm_cpu_name,
+        llvm_cpu_features,
+    ) catch |err| switch (err) {
+        error.OutOfMemory => return .OutOfMemory,
+    };
+    return .None;
 }
 
 // ABI warning
diff --git a/src/main.cpp b/src/main.cpp
index 42a3438def09a7d10986d911666bcd5f51850f3d..d5804e795c18578714698e6a9005cb301fe7cbbe 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -100,8 +100,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "  --override-lib-dir [arg]     override path to Zig lib directory\n"
         "  -ffunction-sections          places each function in a separate section\n"
         "  -D[macro]=[value]            define C [macro] to [value] (1 if [value] omitted)\n"
-        "  --cpu [cpu]                  compile for [cpu] on the current target\n"
-        "  --features [feature_str]     compile with features in [feature_str] on the current target\n"
+        "  -target-cpu [cpu]            target one specific CPU by name\n"
+        "  -target-feature [features]   specify the set of CPU features to target\n"
         "\n"
         "Link Options:\n"
         "  --bundle-compiler-rt         for static libraries, include compiler-rt symbols\n"
@@ -1078,22 +1078,30 @@ int main(int argc, char **argv) {
         fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n");
         return main_exit(root_progress_node, EXIT_FAILURE);
     } else if (cpu) {
-        target.cpu_features = stage2_cpu_features_parse_cpu(target_arch_name(target.arch), cpu);
-        if (!target.cpu_features) {
-            fprintf(stderr, "invalid -target-cpu value\n");
+        if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, target_arch_name(target.arch), cpu))) {
+            fprintf(stderr, "-target-cpu error: %s\n", err_str(err));
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else if (features) {
-        target.cpu_features = stage2_cpu_features_parse_features(target_arch_name(target.arch), features);
-        if (!target.cpu_features) {
-            fprintf(stderr, "invalid -target-feature value\n");
+        if ((err = stage2_cpu_features_parse_features(&target.cpu_features, target_arch_name(target.arch),
+                        features)))
+        {
+            fprintf(stderr, "-target-feature error: %s\n", err_str(err));
+            return main_exit(root_progress_node, EXIT_FAILURE);
+        }
+    } else if (target.is_native) {
+        const char *cpu_name = ZigLLVMGetHostCPUName();
+        const char *cpu_features = ZigLLVMGetNativeFeatures();
+        if ((err = stage2_cpu_features_llvm(&target.cpu_features, target_arch_name(target.arch),
+                        cpu_name, cpu_features)))
+        {
+            fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err));
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else {
-        // If no details are specified and we are not native, load
-        // cross-compilation default features.
-        if (!target.is_native) {
-            target.cpu_features = stage2_cpu_features_baseline();
+        if ((err = stage2_cpu_features_baseline(&target.cpu_features))) {
+            fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err));
+            return main_exit(root_progress_node, EXIT_FAILURE);
         }
     }
 
diff --git a/src/userland.cpp b/src/userland.cpp
index 89ddecbedb1e12e7a81fadcc6da2d02d883e28cc..93944f0089c5d7f9c4d440b9183827b6a3325b97 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -98,35 +98,55 @@ void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len,
     const char *msg = "stage0 called stage2_list_cpus_for_arch";
     stage2_panic(msg, strlen(msg));
 }
-Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *str) {
+
+struct Stage2CpuFeatures {
+    const char *llvm_cpu_name;
+    const char *llvm_cpu_features;
+    const char *builtin_str;
+    const char *cache_hash;
+};
+
+Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *arch, const char *str) {
     const char *msg = "stage0 called stage2_cpu_features_parse_cpu";
     stage2_panic(msg, strlen(msg));
 }
-Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *str) {
+Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *arch, const char *str) {
     const char *msg = "stage0 called stage2_cpu_features_parse_features";
     stage2_panic(msg, strlen(msg));
 }
-Stage2CpuFeatures *stage2_cpu_features_baseline(void) {
-    const char *msg = "stage0 called stage2_cpu_features_baseline";
-    stage2_panic(msg, strlen(msg));
+Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) {
+    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+    result->builtin_str = ".baseline;\n";
+    result->cache_hash = "\n\n";
+    *out = result;
+    return ErrorNone;
+}
+Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *arch,
+        const char *llvm_cpu_name, const char *llvm_features)
+{
+    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+    result->llvm_cpu_name = llvm_cpu_name;
+    result->llvm_cpu_features = llvm_features;
+    result->builtin_str = ".baseline;\n";
+    result->cache_hash = "native\n\n";
+    *out = result;
+    return ErrorNone;
 }
 void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len)
 {
-    const char *msg = "stage0 called stage2_cpu_features_get_cache_hash";
-    stage2_panic(msg, strlen(msg));
+    *ptr = cpu_features->cache_hash;
+    *len = strlen(cpu_features->cache_hash);
 }
 const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
-    const char *msg = "stage0 called stage2_cpu_features_get_llvm_cpu";
-    stage2_panic(msg, strlen(msg));
+    return cpu_features->llvm_cpu_name;
 }
 const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
-    const char *msg = "stage0 called stage2_cpu_features_get_llvm_features";
-    stage2_panic(msg, strlen(msg));
+    return cpu_features->llvm_cpu_features;
 }
 void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features, 
         const char **ptr, size_t *len)
 {
-    const char *msg = "stage0 called stage2_cpu_features_get_builtin_str";
-    stage2_panic(msg, strlen(msg));
+    *ptr = cpu_features->builtin_str;
+    *len = strlen(cpu_features->builtin_str);
 }
diff --git a/src/userland.h b/src/userland.h
index 9afa04829918df95b87b061075ba42aa4d8b1315..1fd40039a658a3c751c96e008c605ffa288095dc 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -184,26 +184,32 @@ ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t ar
 struct Stage2CpuFeatures;
 
 // ABI warning
-ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_cpu(const char *arch, const char *cpu_name);
+ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result,
+        const char *arch, const char *cpu_name);
 
 // ABI warning
-ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_parse_features(const char *arch, const char *features);
+ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result,
+        const char *arch, const char *features);
 
 // ABI warning
-ZIG_EXTERN_C Stage2CpuFeatures *stage2_cpu_features_baseline(void);
+ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features);
+ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result,
+        const char *arch, const char *llvm_cpu_name, const char *llvm_features);
 
 // ABI warning
-ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features);
+ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
 
 // ABI warning
-ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
+ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features);
+
+// ABI warning
+ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len);
 
 // ABI warning
-ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
+ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len);
 
 #endif
-- 
2.54.0


From e3b5e9187811e23fbf1565a9c8a14996f1aad659 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 19 Jan 2020 20:22:31 -0500
Subject: [PATCH 060/116] do the x86 arch

---
 BRANCH_TODO                |   15 -
 lib/std/target.zig         |   81 +-
 lib/std/target/aarch64.zig |   14 +-
 lib/std/target/x86.zig     | 6724 ++++++++++++++++++------------------
 4 files changed, 3438 insertions(+), 3396 deletions(-)

diff --git a/BRANCH_TODO b/BRANCH_TODO
index ad1ad76d21d198554c0ef6e8ac445050f43530c7..50efbe89f6a632b8a411e78e713ca07a7a6d44fd 100644
--- a/BRANCH_TODO
+++ b/BRANCH_TODO
@@ -1,8 +1,5 @@
 Finish these thigns before merging teh branch
 
- * need to populate builtin.zig cpu_features, undefined is incorrect. I guess for zig0 it will be always baseline
- * need to populate std.Target.current.cpu_features even for native target
-
  * finish refactoring target/arch/*
  * `zig builtin` integration 
  * move target details to better location
@@ -29,18 +26,6 @@ const riscv64_default_features: []*const std.target.Feature = &[_]*const std.tar
     &std.target.riscv.feature_relax,
 };
 
-const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
-    &std.target.x86.feature_cmov,
-    &std.target.x86.feature_cx8,
-    &std.target.x86.feature_fxsr,
-    &std.target.x86.feature_mmx,
-    &std.target.x86.feature_nopl,
-    &std.target.x86.feature_sse,
-    &std.target.x86.feature_sse2,
-    &std.target.x86.feature_slowUnalignedMem16,
-    &std.target.x86.feature_x87,
-};
-
 // Same as above but without sse.
 const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{
     &std.target.x86.feature_cmov,
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 263167d738c39e5eddd5a0df1af7db7243255ac4..350387bd8a6524f0cf25fce3794d2a96bb46cf3b 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -401,25 +401,25 @@ pub const Target = union(enum) {
         }
 
         /// All CPU features Zig is aware of, sorted lexicographically by name.
-        pub fn allFeaturesList(arch: Arch) []const *const Cpu.Feature {
+        pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
             return switch (arch) {
-                .arm, .armeb, .thumb, .thumbeb => arm.all_features,
-                .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_features,
-                .avr => avr.all_features,
-                .bpfel, .bpfeb => bpf.all_features,
-                .hexagon => hexagon.all_features,
-                .mips, .mipsel, .mips64, .mips64el => mips.all_features,
-                .msp430 => msp430.all_features,
-                .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
-                .amdgcn => amdgpu.all_features,
-                .riscv32, .riscv64 => riscv.all_features,
-                .sparc, .sparcv9, .sparcel => sparc.all_features,
-                .s390x => systemz.all_features,
-                .i386, .x86_64 => x86.all_features,
-                .nvptx, .nvptx64 => nvptx.all_features,
-                .wasm32, .wasm64 => wasm.all_features,
+                // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_features,
+                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
+                // TODO .avr => avr.all_features,
+                // TODO .bpfel, .bpfeb => bpf.all_features,
+                // TODO .hexagon => hexagon.all_features,
+                // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_features,
+                // TODO .msp430 => msp430.all_features,
+                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
+                // TODO .amdgcn => amdgpu.all_features,
+                // TODO .riscv32, .riscv64 => riscv.all_features,
+                // TODO .sparc, .sparcv9, .sparcel => sparc.all_features,
+                // TODO .s390x => systemz.all_features,
+                .i386, .x86_64 => &x86.all_features,
+                // TODO .nvptx, .nvptx64 => nvptx.all_features,
+                // TODO .wasm32, .wasm64 => wasm.all_features,
 
-                else => &[0]*const Cpu.Feature{},
+                else => &[0]Cpu.Feature{},
             };
         }
 
@@ -427,23 +427,24 @@ pub const Target = union(enum) {
         /// of features that is expected to be supported on most available hardware.
         pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {
             return switch (arch) {
-                .arm, .armeb, .thumb, .thumbeb => arm.baseline_features,
+                // TODO .arm, .armeb, .thumb, .thumbeb => arm.baseline_features,
                 .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
-                .avr => avr.baseline_features,
-                .bpfel, .bpfeb => bpf.baseline_features,
-                .hexagon => hexagon.baseline_features,
-                .mips, .mipsel, .mips64, .mips64el => mips.baseline_features,
-                .msp430 => msp430.baseline_features,
-                .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,
-                .amdgcn => amdgpu.baseline_features,
-                .riscv32, .riscv64 => riscv.baseline_features,
-                .sparc, .sparcv9, .sparcel => sparc.baseline_features,
-                .s390x => systemz.baseline_features,
-                .i386, .x86_64 => x86.baseline_features,
-                .nvptx, .nvptx64 => nvptx.baseline_features,
-                .wasm32, .wasm64 => wasm.baseline_features,
+                // TODO .avr => avr.baseline_features,
+                // TODO .bpfel, .bpfeb => bpf.baseline_features,
+                // TODO .hexagon => hexagon.baseline_features,
+                // TODO .mips, .mipsel, .mips64, .mips64el => mips.baseline_features,
+                // TODO .msp430 => msp430.baseline_features,
+                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,
+                // TODO .amdgcn => amdgpu.baseline_features,
+                // TODO .riscv32, .riscv64 => riscv.baseline_features,
+                // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features,
+                // TODO .s390x => systemz.baseline_features,
+                .i386 => x86.cpu.pentium4.features,
+                .x86_64 => x86.cpu.x8664.features,
+                // TODO .nvptx, .nvptx64 => nvptx.baseline_features,
+                // TODO .wasm32, .wasm64 => wasm.baseline_features,
 
-                else => &[0]*const Cpu.Feature{},
+                else => 0,
             };
         }
 
@@ -515,6 +516,22 @@ pub const Target = union(enum) {
             pub fn isEnabled(set: Set, arch_feature_index: u7) bool {
                 return (set & (@as(Set, 1) << arch_feature_index)) != 0;
             }
+
+            pub fn feature_set_fns(comptime F: type) type {
+                return struct {
+                    pub fn featureSet(features: []const F) Set {
+                        var x: Set = 0;
+                        for (features) |feature| {
+                            x |= @as(Set, 1) << @enumToInt(feature);
+                        }
+                        return x;
+                    }
+
+                    pub fn featureSetHas(set: Set, feature: F) bool {
+                        return (set & (@as(Set, 1) << @enumToInt(feature))) != 0;
+                    }
+                };
+            }
         };
     };
 
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 77d8c986c9cea7a0c32fc83be2a1464af34b265b..f0238bf8f4a4eb6b87eedcc52176ac595e1114f6 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -123,21 +123,11 @@ pub const Feature = enum {
     zcz_gp,
 };
 
-pub fn featureSet(features: []const Feature) Cpu.Feature.Set {
-    var x: Cpu.Feature.Set = 0;
-    for (features) |feature| {
-        x |= 1 << @enumToInt(feature);
-    }
-    return x;
-}
-
-pub fn featureSetHas(set: Feature.Set, feature: Feature) bool {
-    return (set & (1 << @enumToInt(feature))) != 0;
-}
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Feature.Set).Int.bits);
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index e755d2cd88bde7e4ffdc9adaf383bf8119034076..021c940dbde4edac16b4d5bb8cda4117edc13ea2 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -1,3338 +1,3388 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_dnow3 = Feature{
-    .name = "dnow3",
-    .llvm_name = "3dnow",
-    .description = "Enable 3DNow! instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-    },
-};
-
-pub const feature_dnowa3 = Feature{
-    .name = "dnowa3",
-    .llvm_name = "3dnowa",
-    .description = "Enable 3DNow! Athlon instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-    },
-};
-
-pub const feature_bit64 = Feature{
-    .name = "bit64",
-    .llvm_name = "64bit",
-    .description = "Support 64-bit instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_adx = Feature{
-    .name = "adx",
-    .llvm_name = "adx",
-    .description = "Support ADX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_aes = Feature{
-    .name = "aes",
-    .llvm_name = "aes",
-    .description = "Enable AES instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx = Feature{
-    .name = "avx",
-    .llvm_name = "avx",
-    .description = "Enable AVX instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx2 = Feature{
-    .name = "avx2",
-    .llvm_name = "avx2",
-    .description = "Enable AVX2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512f = Feature{
-    .name = "avx512f",
-    .llvm_name = "avx512f",
-    .description = "Enable AVX-512 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512bf16 = Feature{
-    .name = "avx512bf16",
-    .llvm_name = "avx512bf16",
-    .description = "Support bfloat16 floating point",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512bitalg = Feature{
-    .name = "avx512bitalg",
-    .llvm_name = "avx512bitalg",
-    .description = "Enable AVX-512 Bit Algorithms",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_bmi = Feature{
-    .name = "bmi",
-    .llvm_name = "bmi",
-    .description = "Support BMI instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bmi2 = Feature{
-    .name = "bmi2",
-    .llvm_name = "bmi2",
-    .description = "Support BMI2 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avx512bw = Feature{
-    .name = "avx512bw",
-    .llvm_name = "avx512bw",
-    .description = "Enable AVX-512 Byte and Word Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_branchfusion = Feature{
-    .name = "branchfusion",
-    .llvm_name = "branchfusion",
-    .description = "CMP/TEST can be fused with conditional branches",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avx512cd = Feature{
-    .name = "avx512cd",
-    .llvm_name = "avx512cd",
-    .description = "Enable AVX-512 Conflict Detection Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_cldemote = Feature{
-    .name = "cldemote",
-    .llvm_name = "cldemote",
-    .description = "Enable Cache Demote",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_clflushopt = Feature{
-    .name = "clflushopt",
-    .llvm_name = "clflushopt",
-    .description = "Flush A Cache Line Optimized",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_clwb = Feature{
-    .name = "clwb",
-    .llvm_name = "clwb",
-    .description = "Cache Line Write Back",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_clzero = Feature{
-    .name = "clzero",
-    .llvm_name = "clzero",
-    .description = "Enable Cache Line Zero",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cmov = Feature{
-    .name = "cmov",
-    .llvm_name = "cmov",
-    .description = "Enable conditional move instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cx8 = Feature{
-    .name = "cx8",
-    .llvm_name = "cx8",
-    .description = "Support CMPXCHG8B instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cx16 = Feature{
-    .name = "cx16",
-    .llvm_name = "cx16",
-    .description = "64-bit with cmpxchg16b",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-    },
-};
-
-pub const feature_avx512dq = Feature{
-    .name = "avx512dq",
-    .llvm_name = "avx512dq",
-    .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_enqcmd = Feature{
-    .name = "enqcmd",
-    .llvm_name = "enqcmd",
-    .description = "Has ENQCMD instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avx512er = Feature{
-    .name = "avx512er",
-    .llvm_name = "avx512er",
-    .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_ermsb = Feature{
-    .name = "ermsb",
-    .llvm_name = "ermsb",
-    .description = "REP MOVS/STOS are fast",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_f16c = Feature{
-    .name = "f16c",
-    .llvm_name = "f16c",
-    .description = "Support 16-bit floating point conversion instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_fma = Feature{
-    .name = "fma",
-    .llvm_name = "fma",
-    .description = "Enable three-operand fused multiple-add",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_fma4 = Feature{
-    .name = "fma4",
-    .llvm_name = "fma4",
-    .description = "Enable four-operand fused multiple-add",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_fsgsbase = Feature{
-    .name = "fsgsbase",
-    .llvm_name = "fsgsbase",
-    .description = "Support FS/GS Base instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fxsr = Feature{
-    .name = "fxsr",
-    .llvm_name = "fxsr",
-    .description = "Support fxsave/fxrestore instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fast11bytenop = Feature{
-    .name = "fast11bytenop",
-    .llvm_name = "fast-11bytenop",
-    .description = "Target can quickly decode up to 11 byte NOPs",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fast15bytenop = Feature{
-    .name = "fast15bytenop",
-    .llvm_name = "fast-15bytenop",
-    .description = "Target can quickly decode up to 15 byte NOPs",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastBextr = Feature{
-    .name = "fastBextr",
-    .llvm_name = "fast-bextr",
-    .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastHops = Feature{
-    .name = "fastHops",
-    .llvm_name = "fast-hops",
-    .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_fastLzcnt = Feature{
-    .name = "fastLzcnt",
-    .llvm_name = "fast-lzcnt",
-    .description = "LZCNT instructions are as fast as most simple integer ops",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastPartialYmmOrZmmWrite = Feature{
-    .name = "fastPartialYmmOrZmmWrite",
-    .llvm_name = "fast-partial-ymm-or-zmm-write",
-    .description = "Partial writes to YMM/ZMM registers are fast",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastShldRotate = Feature{
-    .name = "fastShldRotate",
-    .llvm_name = "fast-shld-rotate",
-    .description = "SHLD can be used as a faster rotate",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastScalarFsqrt = Feature{
-    .name = "fastScalarFsqrt",
-    .llvm_name = "fast-scalar-fsqrt",
-    .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastScalarShiftMasks = Feature{
-    .name = "fastScalarShiftMasks",
-    .llvm_name = "fast-scalar-shift-masks",
-    .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastVariableShuffle = Feature{
-    .name = "fastVariableShuffle",
-    .llvm_name = "fast-variable-shuffle",
-    .description = "Shuffles with variable masks are fast",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastVectorFsqrt = Feature{
-    .name = "fastVectorFsqrt",
-    .llvm_name = "fast-vector-fsqrt",
-    .description = "Vector SQRT is fast (disable Newton-Raphson)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastVectorShiftMasks = Feature{
-    .name = "fastVectorShiftMasks",
-    .llvm_name = "fast-vector-shift-masks",
-    .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gfni = Feature{
-    .name = "gfni",
-    .llvm_name = "gfni",
-    .description = "Enable Galois Field Arithmetic Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_fastGather = Feature{
-    .name = "fastGather",
-    .llvm_name = "fast-gather",
-    .description = "Indicates if gather is reasonably fast",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avx512ifma = Feature{
-    .name = "avx512ifma",
-    .llvm_name = "avx512ifma",
-    .description = "Enable AVX-512 Integer Fused Multiple-Add",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_invpcid = Feature{
-    .name = "invpcid",
-    .llvm_name = "invpcid",
-    .description = "Invalidate Process-Context Identifier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sahf = Feature{
-    .name = "sahf",
-    .llvm_name = "sahf",
-    .description = "Support LAHF and SAHF instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_leaSp = Feature{
-    .name = "leaSp",
-    .llvm_name = "lea-sp",
-    .description = "Use LEA for adjusting the stack pointer",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_leaUsesAg = Feature{
-    .name = "leaUsesAg",
-    .llvm_name = "lea-uses-ag",
-    .description = "LEA instruction needs inputs at AG stage",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lwp = Feature{
-    .name = "lwp",
-    .llvm_name = "lwp",
-    .description = "Enable LWP instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lzcnt = Feature{
-    .name = "lzcnt",
-    .llvm_name = "lzcnt",
-    .description = "Support LZCNT instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_falseDepsLzcntTzcnt = Feature{
-    .name = "falseDepsLzcntTzcnt",
-    .llvm_name = "false-deps-lzcnt-tzcnt",
-    .description = "LZCNT/TZCNT have a false dependency on dest register",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mmx = Feature{
-    .name = "mmx",
-    .llvm_name = "mmx",
-    .description = "Enable MMX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_movbe = Feature{
-    .name = "movbe",
-    .llvm_name = "movbe",
-    .description = "Support MOVBE instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_movdir64b = Feature{
-    .name = "movdir64b",
-    .llvm_name = "movdir64b",
-    .description = "Support movdir64b instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_movdiri = Feature{
-    .name = "movdiri",
-    .llvm_name = "movdiri",
-    .description = "Support movdiri instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mpx = Feature{
-    .name = "mpx",
-    .llvm_name = "mpx",
-    .description = "Support MPX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mwaitx = Feature{
-    .name = "mwaitx",
-    .llvm_name = "mwaitx",
-    .description = "Enable MONITORX/MWAITX timer functionality",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_macrofusion = Feature{
-    .name = "macrofusion",
-    .llvm_name = "macrofusion",
-    .description = "Various instructions can be fused with conditional branches",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mergeToThreewayBranch = Feature{
-    .name = "mergeToThreewayBranch",
-    .llvm_name = "merge-to-threeway-branch",
-    .description = "Merge branches to a three-way conditional branch",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nopl = Feature{
-    .name = "nopl",
-    .llvm_name = "nopl",
-    .description = "Enable NOPL instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_pclmul = Feature{
-    .name = "pclmul",
-    .llvm_name = "pclmul",
-    .description = "Enable packed carry-less multiplication instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_pconfig = Feature{
-    .name = "pconfig",
-    .llvm_name = "pconfig",
-    .description = "platform configuration instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avx512pf = Feature{
-    .name = "avx512pf",
-    .llvm_name = "avx512pf",
-    .description = "Enable AVX-512 PreFetch Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_pku = Feature{
-    .name = "pku",
-    .llvm_name = "pku",
-    .description = "Enable protection keys",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_popcnt = Feature{
-    .name = "popcnt",
-    .llvm_name = "popcnt",
-    .description = "Support POPCNT instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_falseDepsPopcnt = Feature{
-    .name = "falseDepsPopcnt",
-    .llvm_name = "false-deps-popcnt",
-    .description = "POPCNT has a false dependency on dest register",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_prefetchwt1 = Feature{
-    .name = "prefetchwt1",
-    .llvm_name = "prefetchwt1",
-    .description = "Prefetch with Intent to Write and T1 Hint",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_prfchw = Feature{
-    .name = "prfchw",
-    .llvm_name = "prfchw",
-    .description = "Support PRFCHW instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptwrite = Feature{
-    .name = "ptwrite",
-    .llvm_name = "ptwrite",
-    .description = "Support ptwrite instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_padShortFunctions = Feature{
-    .name = "padShortFunctions",
-    .llvm_name = "pad-short-functions",
-    .description = "Pad short functions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_prefer256Bit = Feature{
-    .name = "prefer256Bit",
-    .llvm_name = "prefer-256-bit",
-    .description = "Prefer 256-bit AVX instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rdpid = Feature{
-    .name = "rdpid",
-    .llvm_name = "rdpid",
-    .description = "Support RDPID instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rdrnd = Feature{
-    .name = "rdrnd",
-    .llvm_name = "rdrnd",
-    .description = "Support RDRAND instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rdseed = Feature{
-    .name = "rdseed",
-    .llvm_name = "rdseed",
-    .description = "Support RDSEED instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rtm = Feature{
-    .name = "rtm",
-    .llvm_name = "rtm",
-    .description = "Support RTM instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_retpoline = Feature{
-    .name = "retpoline",
-    .llvm_name = "retpoline",
-    .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
-    .dependencies = &[_]*const Feature {
-        &feature_retpolineIndirectCalls,
-        &feature_retpolineIndirectBranches,
-    },
-};
-
-pub const feature_retpolineExternalThunk = Feature{
-    .name = "retpolineExternalThunk",
-    .llvm_name = "retpoline-external-thunk",
-    .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
-    .dependencies = &[_]*const Feature {
-        &feature_retpolineIndirectCalls,
-    },
-};
-
-pub const feature_retpolineIndirectBranches = Feature{
-    .name = "retpolineIndirectBranches",
-    .llvm_name = "retpoline-indirect-branches",
-    .description = "Remove speculation of indirect branches from the generated code",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_retpolineIndirectCalls = Feature{
-    .name = "retpolineIndirectCalls",
-    .llvm_name = "retpoline-indirect-calls",
-    .description = "Remove speculation of indirect calls from the generated code",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sgx = Feature{
-    .name = "sgx",
-    .llvm_name = "sgx",
-    .description = "Enable Software Guard Extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sha = Feature{
-    .name = "sha",
-    .llvm_name = "sha",
-    .description = "Enable SHA instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_shstk = Feature{
-    .name = "shstk",
-    .llvm_name = "shstk",
-    .description = "Support CET Shadow-Stack instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sse = Feature{
-    .name = "sse",
-    .llvm_name = "sse",
-    .description = "Enable SSE instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sse2 = Feature{
-    .name = "sse2",
-    .llvm_name = "sse2",
-    .description = "Enable SSE2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_sse3 = Feature{
-    .name = "sse3",
-    .llvm_name = "sse3",
-    .description = "Enable SSE3 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_sse4a = Feature{
-    .name = "sse4a",
-    .llvm_name = "sse4a",
-    .description = "Support SSE 4a instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_sse41 = Feature{
-    .name = "sse41",
-    .llvm_name = "sse4.1",
-    .description = "Enable SSE 4.1 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_sse42 = Feature{
-    .name = "sse42",
-    .llvm_name = "sse4.2",
-    .description = "Enable SSE 4.2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_sseUnalignedMem = Feature{
-    .name = "sseUnalignedMem",
-    .llvm_name = "sse-unaligned-mem",
-    .description = "Allow unaligned memory operands with SSE instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ssse3 = Feature{
-    .name = "ssse3",
-    .llvm_name = "ssse3",
-    .description = "Enable SSSE3 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_slow3opsLea = Feature{
-    .name = "slow3opsLea",
-    .llvm_name = "slow-3ops-lea",
-    .description = "LEA instruction with 3 ops or certain registers is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_idivlToDivb = Feature{
-    .name = "idivlToDivb",
-    .llvm_name = "idivl-to-divb",
-    .description = "Use 8-bit divide for positive values less than 256",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_idivqToDivl = Feature{
-    .name = "idivqToDivl",
-    .llvm_name = "idivq-to-divl",
-    .description = "Use 32-bit divide for positive values less than 2^32",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowIncdec = Feature{
-    .name = "slowIncdec",
-    .llvm_name = "slow-incdec",
-    .description = "INC and DEC instructions are slower than ADD and SUB",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowLea = Feature{
-    .name = "slowLea",
-    .llvm_name = "slow-lea",
-    .description = "LEA instruction with certain arguments is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowPmaddwd = Feature{
-    .name = "slowPmaddwd",
-    .llvm_name = "slow-pmaddwd",
-    .description = "PMADDWD is slower than PMULLD",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowPmulld = Feature{
-    .name = "slowPmulld",
-    .llvm_name = "slow-pmulld",
-    .description = "PMULLD instruction is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowShld = Feature{
-    .name = "slowShld",
-    .llvm_name = "slow-shld",
-    .description = "SHLD instruction is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowTwoMemOps = Feature{
-    .name = "slowTwoMemOps",
-    .llvm_name = "slow-two-mem-ops",
-    .description = "Two memory operand instructions are slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowUnalignedMem16 = Feature{
-    .name = "slowUnalignedMem16",
-    .llvm_name = "slow-unaligned-mem-16",
-    .description = "Slow unaligned 16-byte memory access",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowUnalignedMem32 = Feature{
-    .name = "slowUnalignedMem32",
-    .llvm_name = "slow-unaligned-mem-32",
-    .description = "Slow unaligned 32-byte memory access",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_softFloat = Feature{
-    .name = "softFloat",
-    .llvm_name = "soft-float",
-    .description = "Use software floating point features",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tbm = Feature{
-    .name = "tbm",
-    .llvm_name = "tbm",
-    .description = "Enable TBM instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vaes = Feature{
-    .name = "vaes",
-    .llvm_name = "vaes",
-    .description = "Promote selected AES instructions to AVX512/AVX registers",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vbmi = Feature{
-    .name = "avx512vbmi",
-    .llvm_name = "avx512vbmi",
-    .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vbmi2 = Feature{
-    .name = "avx512vbmi2",
-    .llvm_name = "avx512vbmi2",
-    .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vl = Feature{
-    .name = "avx512vl",
-    .llvm_name = "avx512vl",
-    .description = "Enable AVX-512 Vector Length eXtensions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vnni = Feature{
-    .name = "avx512vnni",
-    .llvm_name = "avx512vnni",
-    .description = "Enable AVX-512 Vector Neural Network Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vp2intersect = Feature{
-    .name = "avx512vp2intersect",
-    .llvm_name = "avx512vp2intersect",
-    .description = "Enable AVX-512 vp2intersect",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_vpclmulqdq = Feature{
-    .name = "vpclmulqdq",
-    .llvm_name = "vpclmulqdq",
-    .description = "Enable vpclmulqdq instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_avx512vpopcntdq = Feature{
-    .name = "avx512vpopcntdq",
-    .llvm_name = "avx512vpopcntdq",
-    .description = "Enable AVX-512 Population Count Instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_waitpkg = Feature{
-    .name = "waitpkg",
-    .llvm_name = "waitpkg",
-    .description = "Wait and pause enhancements",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_wbnoinvd = Feature{
-    .name = "wbnoinvd",
-    .llvm_name = "wbnoinvd",
-    .description = "Write Back No Invalidate",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_x87 = Feature{
-    .name = "x87",
-    .llvm_name = "x87",
-    .description = "Enable X87 float instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_xop = Feature{
-    .name = "xop",
-    .llvm_name = "xop",
-    .description = "Enable XOP instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_sse,
-    },
-};
-
-pub const feature_xsave = Feature{
-    .name = "xsave",
-    .llvm_name = "xsave",
-    .description = "Support xsave instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_xsavec = Feature{
-    .name = "xsavec",
-    .llvm_name = "xsavec",
-    .description = "Support xsavec instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_xsaveopt = Feature{
-    .name = "xsaveopt",
-    .llvm_name = "xsaveopt",
-    .description = "Support xsaveopt instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_xsaves = Feature{
-    .name = "xsaves",
-    .llvm_name = "xsaves",
-    .description = "Support xsaves instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bitMode16 = Feature{
-    .name = "bitMode16",
-    .llvm_name = "16bit-mode",
-    .description = "16-bit mode (i8086)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bitMode32 = Feature{
-    .name = "bitMode32",
-    .llvm_name = "32bit-mode",
-    .description = "32-bit mode (80386)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bitMode64 = Feature{
-    .name = "bitMode64",
-    .llvm_name = "64bit-mode",
-    .description = "64-bit mode (x86_64)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_dnow3,
-    &feature_dnowa3,
-    &feature_bit64,
-    &feature_adx,
-    &feature_aes,
-    &feature_avx,
-    &feature_avx2,
-    &feature_avx512f,
-    &feature_avx512bf16,
-    &feature_avx512bitalg,
-    &feature_bmi,
-    &feature_bmi2,
-    &feature_avx512bw,
-    &feature_branchfusion,
-    &feature_avx512cd,
-    &feature_cldemote,
-    &feature_clflushopt,
-    &feature_clwb,
-    &feature_clzero,
-    &feature_cmov,
-    &feature_cx8,
-    &feature_cx16,
-    &feature_avx512dq,
-    &feature_enqcmd,
-    &feature_avx512er,
-    &feature_ermsb,
-    &feature_f16c,
-    &feature_fma,
-    &feature_fma4,
-    &feature_fsgsbase,
-    &feature_fxsr,
-    &feature_fast11bytenop,
-    &feature_fast15bytenop,
-    &feature_fastBextr,
-    &feature_fastHops,
-    &feature_fastLzcnt,
-    &feature_fastPartialYmmOrZmmWrite,
-    &feature_fastShldRotate,
-    &feature_fastScalarFsqrt,
-    &feature_fastScalarShiftMasks,
-    &feature_fastVariableShuffle,
-    &feature_fastVectorFsqrt,
-    &feature_fastVectorShiftMasks,
-    &feature_gfni,
-    &feature_fastGather,
-    &feature_avx512ifma,
-    &feature_invpcid,
-    &feature_sahf,
-    &feature_leaSp,
-    &feature_leaUsesAg,
-    &feature_lwp,
-    &feature_lzcnt,
-    &feature_falseDepsLzcntTzcnt,
-    &feature_mmx,
-    &feature_movbe,
-    &feature_movdir64b,
-    &feature_movdiri,
-    &feature_mpx,
-    &feature_mwaitx,
-    &feature_macrofusion,
-    &feature_mergeToThreewayBranch,
-    &feature_nopl,
-    &feature_pclmul,
-    &feature_pconfig,
-    &feature_avx512pf,
-    &feature_pku,
-    &feature_popcnt,
-    &feature_falseDepsPopcnt,
-    &feature_prefetchwt1,
-    &feature_prfchw,
-    &feature_ptwrite,
-    &feature_padShortFunctions,
-    &feature_prefer256Bit,
-    &feature_rdpid,
-    &feature_rdrnd,
-    &feature_rdseed,
-    &feature_rtm,
-    &feature_retpoline,
-    &feature_retpolineExternalThunk,
-    &feature_retpolineIndirectBranches,
-    &feature_retpolineIndirectCalls,
-    &feature_sgx,
-    &feature_sha,
-    &feature_shstk,
-    &feature_sse,
-    &feature_sse2,
-    &feature_sse3,
-    &feature_sse4a,
-    &feature_sse41,
-    &feature_sse42,
-    &feature_sseUnalignedMem,
-    &feature_ssse3,
-    &feature_slow3opsLea,
-    &feature_idivlToDivb,
-    &feature_idivqToDivl,
-    &feature_slowIncdec,
-    &feature_slowLea,
-    &feature_slowPmaddwd,
-    &feature_slowPmulld,
-    &feature_slowShld,
-    &feature_slowTwoMemOps,
-    &feature_slowUnalignedMem16,
-    &feature_slowUnalignedMem32,
-    &feature_softFloat,
-    &feature_tbm,
-    &feature_vaes,
-    &feature_avx512vbmi,
-    &feature_avx512vbmi2,
-    &feature_avx512vl,
-    &feature_avx512vnni,
-    &feature_avx512vp2intersect,
-    &feature_vpclmulqdq,
-    &feature_avx512vpopcntdq,
-    &feature_waitpkg,
-    &feature_wbnoinvd,
-    &feature_x87,
-    &feature_xop,
-    &feature_xsave,
-    &feature_xsavec,
-    &feature_xsaveopt,
-    &feature_xsaves,
-    &feature_bitMode16,
-    &feature_bitMode32,
-    &feature_bitMode64,
-};
-
-pub const cpu_amdfam10 = Cpu{
-    .name = "amdfam10",
-    .llvm_name = "amdfam10",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_nopl,
-        &feature_popcnt,
-        &feature_sse,
-        &feature_sse4a,
-        &feature_slowShld,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlon = Cpu{
-    .name = "athlon",
-    .llvm_name = "athlon",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_nopl,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlon4 = Cpu{
-    .name = "athlon4",
-    .llvm_name = "athlon-4",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_nopl,
-        &feature_sse,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlonFx = Cpu{
-    .name = "athlonFx",
-    .llvm_name = "athlon-fx",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlonMp = Cpu{
-    .name = "athlonMp",
-    .llvm_name = "athlon-mp",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_nopl,
-        &feature_sse,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlonTbird = Cpu{
-    .name = "athlonTbird",
-    .llvm_name = "athlon-tbird",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_nopl,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlonXp = Cpu{
-    .name = "athlonXp",
-    .llvm_name = "athlon-xp",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_nopl,
-        &feature_sse,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlon64 = Cpu{
-    .name = "athlon64",
-    .llvm_name = "athlon64",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_athlon64Sse3 = Cpu{
-    .name = "athlon64Sse3",
-    .llvm_name = "athlon64-sse3",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_atom = Cpu{
-    .name = "atom",
-    .llvm_name = "atom",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_leaSp,
-        &feature_leaUsesAg,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_padShortFunctions,
-        &feature_sse,
-        &feature_ssse3,
-        &feature_idivlToDivb,
-        &feature_idivqToDivl,
-        &feature_slowTwoMemOps,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_barcelona = Cpu{
-    .name = "barcelona",
-    .llvm_name = "barcelona",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_nopl,
-        &feature_popcnt,
-        &feature_sse,
-        &feature_sse4a,
-        &feature_slowShld,
-        &feature_x87,
-    },
-};
-
-pub const cpu_bdver1 = Cpu{
-    .name = "bdver1",
-    .llvm_name = "bdver1",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_branchfusion,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fast11bytenop,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lwp,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_slowShld,
-        &feature_x87,
-        &feature_xop,
-        &feature_xsave,
-    },
-};
-
-pub const cpu_bdver2 = Cpu{
-    .name = "bdver2",
-    .llvm_name = "bdver2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_bmi,
-        &feature_branchfusion,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fxsr,
-        &feature_fast11bytenop,
-        &feature_fastBextr,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lwp,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_slowShld,
-        &feature_tbm,
-        &feature_x87,
-        &feature_xop,
-        &feature_xsave,
-    },
-};
-
-pub const cpu_bdver3 = Cpu{
-    .name = "bdver3",
-    .llvm_name = "bdver3",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_bmi,
-        &feature_branchfusion,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fast11bytenop,
-        &feature_fastBextr,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lwp,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_slowShld,
-        &feature_tbm,
-        &feature_x87,
-        &feature_xop,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_bdver4 = Cpu{
-    .name = "bdver4",
-    .llvm_name = "bdver4",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_branchfusion,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fast11bytenop,
-        &feature_fastBextr,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lwp,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_mwaitx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_slowShld,
-        &feature_tbm,
-        &feature_x87,
-        &feature_xop,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_bonnell = Cpu{
-    .name = "bonnell",
-    .llvm_name = "bonnell",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_leaSp,
-        &feature_leaUsesAg,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_padShortFunctions,
-        &feature_sse,
-        &feature_ssse3,
-        &feature_idivlToDivb,
-        &feature_idivqToDivl,
-        &feature_slowTwoMemOps,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_broadwell = Cpu{
-    .name = "broadwell",
-    .llvm_name = "broadwell",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_avx,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_falseDepsLzcntTzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_btver1 = Cpu{
-    .name = "btver1",
-    .llvm_name = "btver1",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fast15bytenop,
-        &feature_fastScalarShiftMasks,
-        &feature_fastVectorShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_sse,
-        &feature_sse4a,
-        &feature_ssse3,
-        &feature_slowShld,
-        &feature_x87,
-    },
-};
-
-pub const cpu_btver2 = Cpu{
-    .name = "btver2",
-    .llvm_name = "btver2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_bmi,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fxsr,
-        &feature_fast15bytenop,
-        &feature_fastBextr,
-        &feature_fastHops,
-        &feature_fastLzcnt,
-        &feature_fastPartialYmmOrZmmWrite,
-        &feature_fastScalarShiftMasks,
-        &feature_fastVectorShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_sse4a,
-        &feature_ssse3,
-        &feature_slowShld,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_c3 = Cpu{
-    .name = "c3",
-    .llvm_name = "c3",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnow3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_c32 = Cpu{
-    .name = "c32",
-    .llvm_name = "c3-2",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_sse,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_cannonlake = Cpu{
-    .name = "cannonlake",
-    .llvm_name = "cannonlake",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_avx512ifma,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_avx512vbmi,
-        &feature_avx512vl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_cascadelake = Cpu{
-    .name = "cascadelake",
-    .llvm_name = "cascadelake",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_avx512vl,
-        &feature_avx512vnni,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_cooperlake = Cpu{
-    .name = "cooperlake",
-    .llvm_name = "cooperlake",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_avx512bf16,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_avx512vl,
-        &feature_avx512vnni,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_coreAvxI = Cpu{
-    .name = "coreAvxI",
-    .llvm_name = "core-avx-i",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowUnalignedMem32,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_coreAvx2 = Cpu{
-    .name = "coreAvx2",
-    .llvm_name = "core-avx2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_falseDepsLzcntTzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_core2 = Cpu{
-    .name = "core2",
-    .llvm_name = "core2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_sse,
-        &feature_ssse3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_corei7 = Cpu{
-    .name = "corei7",
-    .llvm_name = "corei7",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_popcnt,
-        &feature_sse,
-        &feature_sse42,
-        &feature_x87,
-    },
-};
-
-pub const cpu_corei7Avx = Cpu{
-    .name = "corei7Avx",
-    .llvm_name = "corei7-avx",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowUnalignedMem32,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_geode = Cpu{
-    .name = "geode",
-    .llvm_name = "geode",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_goldmont = Cpu{
-    .name = "goldmont",
-    .llvm_name = "goldmont",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_clflushopt,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sha,
-        &feature_sse42,
-        &feature_ssse3,
-        &feature_slowIncdec,
-        &feature_slowLea,
-        &feature_slowTwoMemOps,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_goldmontPlus = Cpu{
-    .name = "goldmontPlus",
-    .llvm_name = "goldmont-plus",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_clflushopt,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_ptwrite,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_sse42,
-        &feature_ssse3,
-        &feature_slowIncdec,
-        &feature_slowLea,
-        &feature_slowTwoMemOps,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_haswell = Cpu{
-    .name = "haswell",
-    .llvm_name = "haswell",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_falseDepsLzcntTzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_i386 = Cpu{
-    .name = "i386",
-    .llvm_name = "i386",
-    .dependencies = &[_]*const Feature {
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_i486 = Cpu{
-    .name = "i486",
-    .llvm_name = "i486",
-    .dependencies = &[_]*const Feature {
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_i586 = Cpu{
-    .name = "i586",
-    .llvm_name = "i586",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_i686 = Cpu{
-    .name = "i686",
-    .llvm_name = "i686",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_icelakeClient = Cpu{
-    .name = "icelakeClient",
-    .llvm_name = "icelake-client",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_avx512bitalg,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_gfni,
-        &feature_fastGather,
-        &feature_avx512ifma,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_vaes,
-        &feature_avx512vbmi,
-        &feature_avx512vbmi2,
-        &feature_avx512vl,
-        &feature_avx512vnni,
-        &feature_vpclmulqdq,
-        &feature_avx512vpopcntdq,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_icelakeServer = Cpu{
-    .name = "icelakeServer",
-    .llvm_name = "icelake-server",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_avx512bitalg,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_gfni,
-        &feature_fastGather,
-        &feature_avx512ifma,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pconfig,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_vaes,
-        &feature_avx512vbmi,
-        &feature_avx512vbmi2,
-        &feature_avx512vl,
-        &feature_avx512vnni,
-        &feature_vpclmulqdq,
-        &feature_avx512vpopcntdq,
-        &feature_wbnoinvd,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_ivybridge = Cpu{
-    .name = "ivybridge",
-    .llvm_name = "ivybridge",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowUnalignedMem32,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_k6 = Cpu{
-    .name = "k6",
-    .llvm_name = "k6",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-        &feature_mmx,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_k62 = Cpu{
-    .name = "k62",
-    .llvm_name = "k6-2",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnow3,
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_k63 = Cpu{
-    .name = "k63",
-    .llvm_name = "k6-3",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnow3,
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_k8 = Cpu{
-    .name = "k8",
-    .llvm_name = "k8",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_k8Sse3 = Cpu{
-    .name = "k8Sse3",
-    .llvm_name = "k8-sse3",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_knl = Cpu{
-    .name = "knl",
-    .llvm_name = "knl",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512cd,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512er,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastPartialYmmOrZmmWrite,
-        &feature_fastGather,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_avx512pf,
-        &feature_popcnt,
-        &feature_prefetchwt1,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowIncdec,
-        &feature_slowPmaddwd,
-        &feature_slowTwoMemOps,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_knm = Cpu{
-    .name = "knm",
-    .llvm_name = "knm",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512cd,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512er,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastPartialYmmOrZmmWrite,
-        &feature_fastGather,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_avx512pf,
-        &feature_popcnt,
-        &feature_prefetchwt1,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowIncdec,
-        &feature_slowPmaddwd,
-        &feature_slowTwoMemOps,
-        &feature_avx512vpopcntdq,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_lakemont = Cpu{
-    .name = "lakemont",
-    .llvm_name = "lakemont",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_nehalem = Cpu{
-    .name = "nehalem",
-    .llvm_name = "nehalem",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_popcnt,
-        &feature_sse,
-        &feature_sse42,
-        &feature_x87,
-    },
-};
-
-pub const cpu_nocona = Cpu{
-    .name = "nocona",
-    .llvm_name = "nocona",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_opteron = Cpu{
-    .name = "opteron",
-    .llvm_name = "opteron",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_opteronSse3 = Cpu{
-    .name = "opteronSse3",
-    .llvm_name = "opteron-sse3",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnowa3,
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastScalarShiftMasks,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowShld,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_penryn = Cpu{
-    .name = "penryn",
-    .llvm_name = "penryn",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse41,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium = Cpu{
-    .name = "pentium",
-    .llvm_name = "pentium",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentiumM = Cpu{
-    .name = "pentiumM",
-    .llvm_name = "pentium-m",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentiumMmx = Cpu{
-    .name = "pentiumMmx",
-    .llvm_name = "pentium-mmx",
-    .dependencies = &[_]*const Feature {
-        &feature_cx8,
-        &feature_mmx,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium2 = Cpu{
-    .name = "pentium2",
-    .llvm_name = "pentium2",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium3 = Cpu{
-    .name = "pentium3",
-    .llvm_name = "pentium3",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium3m = Cpu{
-    .name = "pentium3m",
-    .llvm_name = "pentium3m",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium4 = Cpu{
-    .name = "pentium4",
-    .llvm_name = "pentium4",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentium4m = Cpu{
-    .name = "pentium4m",
-    .llvm_name = "pentium4m",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_pentiumpro = Cpu{
-    .name = "pentiumpro",
-    .llvm_name = "pentiumpro",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_nopl,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_prescott = Cpu{
-    .name = "prescott",
-    .llvm_name = "prescott",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_sandybridge = Cpu{
-    .name = "sandybridge",
-    .llvm_name = "sandybridge",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_avx,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_slowUnalignedMem32,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsaveopt,
-    },
-};
-
-pub const cpu_silvermont = Cpu{
-    .name = "silvermont",
-    .llvm_name = "silvermont",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_sse,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_ssse3,
-        &feature_idivqToDivl,
-        &feature_slowIncdec,
-        &feature_slowLea,
-        &feature_slowPmulld,
-        &feature_slowTwoMemOps,
-        &feature_x87,
-    },
-};
-
-pub const cpu_skx = Cpu{
-    .name = "skx",
-    .llvm_name = "skx",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_avx512vl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_skylake = Cpu{
-    .name = "skylake",
-    .llvm_name = "skylake",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_clflushopt,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_skylakeAvx512 = Cpu{
-    .name = "skylakeAvx512",
-    .llvm_name = "skylake-avx512",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx,
-        &feature_avx2,
-        &feature_avx512f,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_avx512bw,
-        &feature_avx512cd,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_avx512dq,
-        &feature_ermsb,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fastShldRotate,
-        &feature_fastScalarFsqrt,
-        &feature_fastVariableShuffle,
-        &feature_fastVectorFsqrt,
-        &feature_fastGather,
-        &feature_invpcid,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mpx,
-        &feature_macrofusion,
-        &feature_mergeToThreewayBranch,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_pku,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sse42,
-        &feature_slow3opsLea,
-        &feature_idivqToDivl,
-        &feature_avx512vl,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_slm = Cpu{
-    .name = "slm",
-    .llvm_name = "slm",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_nopl,
-        &feature_sse,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_falseDepsPopcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_sse42,
-        &feature_ssse3,
-        &feature_idivqToDivl,
-        &feature_slowIncdec,
-        &feature_slowLea,
-        &feature_slowPmulld,
-        &feature_slowTwoMemOps,
-        &feature_x87,
-    },
-};
-
-pub const cpu_tremont = Cpu{
-    .name = "tremont",
-    .llvm_name = "tremont",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_sse,
-        &feature_aes,
-        &feature_cldemote,
-        &feature_clflushopt,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_gfni,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_movdir64b,
-        &feature_movdiri,
-        &feature_mpx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_ptwrite,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sgx,
-        &feature_sha,
-        &feature_sse42,
-        &feature_ssse3,
-        &feature_slowIncdec,
-        &feature_slowLea,
-        &feature_slowTwoMemOps,
-        &feature_waitpkg,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_westmere = Cpu{
-    .name = "westmere",
-    .llvm_name = "westmere",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_fxsr,
-        &feature_sahf,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_sse,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_sse42,
-        &feature_x87,
-    },
-};
-
-pub const cpu_winchipC6 = Cpu{
-    .name = "winchipC6",
-    .llvm_name = "winchip-c6",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_winchip2 = Cpu{
-    .name = "winchip2",
-    .llvm_name = "winchip2",
-    .dependencies = &[_]*const Feature {
-        &feature_mmx,
-        &feature_dnow3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_x8664 = Cpu{
-    .name = "x8664",
-    .llvm_name = "x86-64",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_macrofusion,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse2,
-        &feature_slow3opsLea,
-        &feature_slowIncdec,
-        &feature_x87,
-    },
-};
-
-pub const cpu_yonah = Cpu{
-    .name = "yonah",
-    .llvm_name = "yonah",
-    .dependencies = &[_]*const Feature {
-        &feature_cmov,
-        &feature_cx8,
-        &feature_fxsr,
-        &feature_mmx,
-        &feature_nopl,
-        &feature_sse,
-        &feature_sse3,
-        &feature_slowUnalignedMem16,
-        &feature_x87,
-    },
-};
-
-pub const cpu_znver1 = Cpu{
-    .name = "znver1",
-    .llvm_name = "znver1",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_branchfusion,
-        &feature_clflushopt,
-        &feature_clzero,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fast15bytenop,
-        &feature_fastBextr,
-        &feature_fastLzcnt,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mwaitx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sha,
-        &feature_sse4a,
-        &feature_slowShld,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpu_znver2 = Cpu{
-    .name = "znver2",
-    .llvm_name = "znver2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_adx,
-        &feature_sse,
-        &feature_aes,
-        &feature_avx2,
-        &feature_bmi,
-        &feature_bmi2,
-        &feature_branchfusion,
-        &feature_clflushopt,
-        &feature_clwb,
-        &feature_clzero,
-        &feature_cmov,
-        &feature_cx8,
-        &feature_cx16,
-        &feature_f16c,
-        &feature_fma,
-        &feature_fsgsbase,
-        &feature_fxsr,
-        &feature_fast15bytenop,
-        &feature_fastBextr,
-        &feature_fastLzcnt,
-        &feature_fastScalarShiftMasks,
-        &feature_sahf,
-        &feature_lzcnt,
-        &feature_mmx,
-        &feature_movbe,
-        &feature_mwaitx,
-        &feature_nopl,
-        &feature_pclmul,
-        &feature_popcnt,
-        &feature_prfchw,
-        &feature_rdpid,
-        &feature_rdrnd,
-        &feature_rdseed,
-        &feature_sha,
-        &feature_sse4a,
-        &feature_slowShld,
-        &feature_wbnoinvd,
-        &feature_x87,
-        &feature_xsave,
-        &feature_xsavec,
-        &feature_xsaveopt,
-        &feature_xsaves,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_amdfam10,
-    &cpu_athlon,
-    &cpu_athlon4,
-    &cpu_athlonFx,
-    &cpu_athlonMp,
-    &cpu_athlonTbird,
-    &cpu_athlonXp,
-    &cpu_athlon64,
-    &cpu_athlon64Sse3,
-    &cpu_atom,
-    &cpu_barcelona,
-    &cpu_bdver1,
-    &cpu_bdver2,
-    &cpu_bdver3,
-    &cpu_bdver4,
-    &cpu_bonnell,
-    &cpu_broadwell,
-    &cpu_btver1,
-    &cpu_btver2,
-    &cpu_c3,
-    &cpu_c32,
-    &cpu_cannonlake,
-    &cpu_cascadelake,
-    &cpu_cooperlake,
-    &cpu_coreAvxI,
-    &cpu_coreAvx2,
-    &cpu_core2,
-    &cpu_corei7,
-    &cpu_corei7Avx,
-    &cpu_generic,
-    &cpu_geode,
-    &cpu_goldmont,
-    &cpu_goldmontPlus,
-    &cpu_haswell,
-    &cpu_i386,
-    &cpu_i486,
-    &cpu_i586,
-    &cpu_i686,
-    &cpu_icelakeClient,
-    &cpu_icelakeServer,
-    &cpu_ivybridge,
-    &cpu_k6,
-    &cpu_k62,
-    &cpu_k63,
-    &cpu_k8,
-    &cpu_k8Sse3,
-    &cpu_knl,
-    &cpu_knm,
-    &cpu_lakemont,
-    &cpu_nehalem,
-    &cpu_nocona,
-    &cpu_opteron,
-    &cpu_opteronSse3,
-    &cpu_penryn,
-    &cpu_pentium,
-    &cpu_pentiumM,
-    &cpu_pentiumMmx,
-    &cpu_pentium2,
-    &cpu_pentium3,
-    &cpu_pentium3m,
-    &cpu_pentium4,
-    &cpu_pentium4m,
-    &cpu_pentiumpro,
-    &cpu_prescott,
-    &cpu_sandybridge,
-    &cpu_silvermont,
-    &cpu_skx,
-    &cpu_skylake,
-    &cpu_skylakeAvx512,
-    &cpu_slm,
-    &cpu_tremont,
-    &cpu_westmere,
-    &cpu_winchipC6,
-    &cpu_winchip2,
-    &cpu_x8664,
-    &cpu_yonah,
-    &cpu_znver1,
-    &cpu_znver2,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    @"16bit_mode",
+    @"32bit_mode",
+    @"3dnow",
+    @"3dnowa",
+    @"64bit",
+    @"64bit_mode",
+    adx,
+    aes,
+    avx,
+    avx2,
+    avx512bf16,
+    avx512bitalg,
+    avx512bw,
+    avx512cd,
+    avx512dq,
+    avx512er,
+    avx512f,
+    avx512ifma,
+    avx512pf,
+    avx512vbmi,
+    avx512vbmi2,
+    avx512vl,
+    avx512vnni,
+    avx512vp2intersect,
+    avx512vpopcntdq,
+    bmi,
+    bmi2,
+    branchfusion,
+    cldemote,
+    clflushopt,
+    clwb,
+    clzero,
+    cmov,
+    cx16,
+    cx8,
+    enqcmd,
+    ermsb,
+    f16c,
+    false_deps_lzcnt_tzcnt,
+    false_deps_popcnt,
+    fast_11bytenop,
+    fast_15bytenop,
+    fast_bextr,
+    fast_gather,
+    fast_hops,
+    fast_lzcnt,
+    fast_partial_ymm_or_zmm_write,
+    fast_scalar_fsqrt,
+    fast_scalar_shift_masks,
+    fast_shld_rotate,
+    fast_variable_shuffle,
+    fast_vector_fsqrt,
+    fast_vector_shift_masks,
+    fma,
+    fma4,
+    fsgsbase,
+    fxsr,
+    gfni,
+    idivl_to_divb,
+    idivq_to_divl,
+    invpcid,
+    lea_sp,
+    lea_uses_ag,
+    lwp,
+    lzcnt,
+    macrofusion,
+    merge_to_threeway_branch,
+    mmx,
+    movbe,
+    movdir64b,
+    movdiri,
+    mpx,
+    mwaitx,
+    nopl,
+    pad_short_functions,
+    pclmul,
+    pconfig,
+    pku,
+    popcnt,
+    prefer_256_bit,
+    prefetchwt1,
+    prfchw,
+    ptwrite,
+    rdpid,
+    rdrnd,
+    rdseed,
+    retpoline,
+    retpoline_external_thunk,
+    retpoline_indirect_branches,
+    retpoline_indirect_calls,
+    rtm,
+    sahf,
+    sgx,
+    sha,
+    shstk,
+    slow_3ops_lea,
+    slow_incdec,
+    slow_lea,
+    slow_pmaddwd,
+    slow_pmulld,
+    slow_shld,
+    slow_two_mem_ops,
+    slow_unaligned_mem_16,
+    slow_unaligned_mem_32,
+    soft_float,
+    sse,
+    sse2,
+    sse3,
+    sse4_1,
+    sse4_2,
+    sse4a,
+    sse_unaligned_mem,
+    ssse3,
+    tbm,
+    vaes,
+    vpclmulqdq,
+    waitpkg,
+    wbnoinvd,
+    x87,
+    xop,
+    xsave,
+    xsavec,
+    xsaveopt,
+    xsaves,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+
+    result[@enumToInt(Feature.@"16bit_mode")] = .{
+        .index = @enumToInt(Feature.@"16bit_mode"),
+        .name = @tagName(Feature.@"16bit_mode"),
+        .llvm_name = "16bit-mode",
+        .description = "16-bit mode (i8086)",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.@"32bit_mode")] = .{
+        .index = @enumToInt(Feature.@"32bit_mode"),
+        .name = @tagName(Feature.@"32bit_mode"),
+        .llvm_name = "32bit-mode",
+        .description = "32-bit mode (80386)",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.@"3dnow")] = .{
+        .index = @enumToInt(Feature.@"3dnow"),
+        .name = @tagName(Feature.@"3dnow"),
+        .llvm_name = "3dnow",
+        .description = "Enable 3DNow! instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+        }),
+    };
+
+    result[@enumToInt(Feature.@"3dnowa")] = .{
+        .index = @enumToInt(Feature.@"3dnowa"),
+        .name = @tagName(Feature.@"3dnowa"),
+        .llvm_name = "3dnowa",
+        .description = "Enable 3DNow! Athlon instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+        }),
+    };
+
+    result[@enumToInt(Feature.@"64bit")] = .{
+        .index = @enumToInt(Feature.@"64bit"),
+        .name = @tagName(Feature.@"64bit"),
+        .llvm_name = "64bit",
+        .description = "Support 64-bit instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.@"64bit_mode")] = .{
+        .index = @enumToInt(Feature.@"64bit_mode"),
+        .name = @tagName(Feature.@"64bit_mode"),
+        .llvm_name = "64bit-mode",
+        .description = "64-bit mode (x86_64)",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.adx)] = .{
+        .index = @enumToInt(Feature.adx),
+        .name = @tagName(Feature.adx),
+        .llvm_name = "adx",
+        .description = "Support ADX instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.aes)] = .{
+        .index = @enumToInt(Feature.aes),
+        .name = @tagName(Feature.aes),
+        .llvm_name = "aes",
+        .description = "Enable AES instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx)] = .{
+        .index = @enumToInt(Feature.avx),
+        .name = @tagName(Feature.avx),
+        .llvm_name = "avx",
+        .description = "Enable AVX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx2)] = .{
+        .index = @enumToInt(Feature.avx2),
+        .name = @tagName(Feature.avx2),
+        .llvm_name = "avx2",
+        .description = "Enable AVX2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512f)] = .{
+        .index = @enumToInt(Feature.avx512f),
+        .name = @tagName(Feature.avx512f),
+        .llvm_name = "avx512f",
+        .description = "Enable AVX-512 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512bf16)] = .{
+        .index = @enumToInt(Feature.avx512bf16),
+        .name = @tagName(Feature.avx512bf16),
+        .llvm_name = "avx512bf16",
+        .description = "Support bfloat16 floating point",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512bitalg)] = .{
+        .index = @enumToInt(Feature.avx512bitalg),
+        .name = @tagName(Feature.avx512bitalg),
+        .llvm_name = "avx512bitalg",
+        .description = "Enable AVX-512 Bit Algorithms",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.bmi)] = .{
+        .index = @enumToInt(Feature.bmi),
+        .name = @tagName(Feature.bmi),
+        .llvm_name = "bmi",
+        .description = "Support BMI instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.bmi2)] = .{
+        .index = @enumToInt(Feature.bmi2),
+        .name = @tagName(Feature.bmi2),
+        .llvm_name = "bmi2",
+        .description = "Support BMI2 instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.avx512bw)] = .{
+        .index = @enumToInt(Feature.avx512bw),
+        .name = @tagName(Feature.avx512bw),
+        .llvm_name = "avx512bw",
+        .description = "Enable AVX-512 Byte and Word Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.branchfusion)] = .{
+        .index = @enumToInt(Feature.branchfusion),
+        .name = @tagName(Feature.branchfusion),
+        .llvm_name = "branchfusion",
+        .description = "CMP/TEST can be fused with conditional branches",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.avx512cd)] = .{
+        .index = @enumToInt(Feature.avx512cd),
+        .name = @tagName(Feature.avx512cd),
+        .llvm_name = "avx512cd",
+        .description = "Enable AVX-512 Conflict Detection Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.cldemote)] = .{
+        .index = @enumToInt(Feature.cldemote),
+        .name = @tagName(Feature.cldemote),
+        .llvm_name = "cldemote",
+        .description = "Enable Cache Demote",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.clflushopt)] = .{
+        .index = @enumToInt(Feature.clflushopt),
+        .name = @tagName(Feature.clflushopt),
+        .llvm_name = "clflushopt",
+        .description = "Flush A Cache Line Optimized",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.clwb)] = .{
+        .index = @enumToInt(Feature.clwb),
+        .name = @tagName(Feature.clwb),
+        .llvm_name = "clwb",
+        .description = "Cache Line Write Back",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.clzero)] = .{
+        .index = @enumToInt(Feature.clzero),
+        .name = @tagName(Feature.clzero),
+        .llvm_name = "clzero",
+        .description = "Enable Cache Line Zero",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.cmov)] = .{
+        .index = @enumToInt(Feature.cmov),
+        .name = @tagName(Feature.cmov),
+        .llvm_name = "cmov",
+        .description = "Enable conditional move instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.cx8)] = .{
+        .index = @enumToInt(Feature.cx8),
+        .name = @tagName(Feature.cx8),
+        .llvm_name = "cx8",
+        .description = "Support CMPXCHG8B instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+
+    result[@enumToInt(Feature.cx16)] = .{
+        .index = @enumToInt(Feature.cx16),
+        .name = @tagName(Feature.cx16),
+        .llvm_name = "cx16",
+        .description = "64-bit with cmpxchg16b",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512dq)] = .{
+        .index = @enumToInt(Feature.avx512dq),
+        .name = @tagName(Feature.avx512dq),
+        .llvm_name = "avx512dq",
+        .description = "Enable AVX-512 Doubleword and Quadword Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.enqcmd)] = .{
+        .index = @enumToInt(Feature.enqcmd),
+        .name = @tagName(Feature.enqcmd),
+        .llvm_name = "enqcmd",
+        .description = "Has ENQCMD instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.avx512er)] = .{
+        .index = @enumToInt(Feature.avx512er),
+        .name = @tagName(Feature.avx512er),
+        .llvm_name = "avx512er",
+        .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.ermsb)] = .{
+        .index = @enumToInt(Feature.ermsb),
+        .name = @tagName(Feature.ermsb),
+        .llvm_name = "ermsb",
+        .description = "REP MOVS/STOS are fast",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.f16c)] = .{
+        .index = @enumToInt(Feature.f16c),
+        .name = @tagName(Feature.f16c),
+        .llvm_name = "f16c",
+        .description = "Support 16-bit floating point conversion instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.fma)] = .{
+        .index = @enumToInt(Feature.fma),
+        .name = @tagName(Feature.fma),
+        .llvm_name = "fma",
+        .description = "Enable three-operand fused multiple-add",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.fma4)] = .{
+        .index = @enumToInt(Feature.fma4),
+        .name = @tagName(Feature.fma4),
+        .llvm_name = "fma4",
+        .description = "Enable four-operand fused multiple-add",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.fsgsbase)] = .{
+        .index = @enumToInt(Feature.fsgsbase),
+        .name = @tagName(Feature.fsgsbase),
+        .llvm_name = "fsgsbase",
+        .description = "Support FS/GS Base instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fxsr)] = .{
+        .index = @enumToInt(Feature.fxsr),
+        .name = @tagName(Feature.fxsr),
+        .llvm_name = "fxsr",
+        .description = "Support fxsave/fxrestore instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_11bytenop)] = .{
+        .index = @enumToInt(Feature.fast_11bytenop),
+        .name = @tagName(Feature.fast_11bytenop),
+        .llvm_name = "fast-11bytenop",
+        .description = "Target can quickly decode up to 11 byte NOPs",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_15bytenop)] = .{
+        .index = @enumToInt(Feature.fast_15bytenop),
+        .name = @tagName(Feature.fast_15bytenop),
+        .llvm_name = "fast-15bytenop",
+        .description = "Target can quickly decode up to 15 byte NOPs",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_bextr)] = .{
+        .index = @enumToInt(Feature.fast_bextr),
+        .name = @tagName(Feature.fast_bextr),
+        .llvm_name = "fast-bextr",
+        .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_hops)] = .{
+        .index = @enumToInt(Feature.fast_hops),
+        .name = @tagName(Feature.fast_hops),
+        .llvm_name = "fast-hops",
+        .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.fast_lzcnt)] = .{
+        .index = @enumToInt(Feature.fast_lzcnt),
+        .name = @tagName(Feature.fast_lzcnt),
+        .llvm_name = "fast-lzcnt",
+        .description = "LZCNT instructions are as fast as most simple integer ops",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
+        .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write),
+        .name = @tagName(Feature.fast_partial_ymm_or_zmm_write),
+        .llvm_name = "fast-partial-ymm-or-zmm-write",
+        .description = "Partial writes to YMM/ZMM registers are fast",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_shld_rotate)] = .{
+        .index = @enumToInt(Feature.fast_shld_rotate),
+        .name = @tagName(Feature.fast_shld_rotate),
+        .llvm_name = "fast-shld-rotate",
+        .description = "SHLD can be used as a faster rotate",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
+        .index = @enumToInt(Feature.fast_scalar_fsqrt),
+        .name = @tagName(Feature.fast_scalar_fsqrt),
+        .llvm_name = "fast-scalar-fsqrt",
+        .description = "Scalar SQRT is fast (disable Newton-Raphson)",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
+        .index = @enumToInt(Feature.fast_scalar_shift_masks),
+        .name = @tagName(Feature.fast_scalar_shift_masks),
+        .llvm_name = "fast-scalar-shift-masks",
+        .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_variable_shuffle)] = .{
+        .index = @enumToInt(Feature.fast_variable_shuffle),
+        .name = @tagName(Feature.fast_variable_shuffle),
+        .llvm_name = "fast-variable-shuffle",
+        .description = "Shuffles with variable masks are fast",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
+        .index = @enumToInt(Feature.fast_vector_fsqrt),
+        .name = @tagName(Feature.fast_vector_fsqrt),
+        .llvm_name = "fast-vector-fsqrt",
+        .description = "Vector SQRT is fast (disable Newton-Raphson)",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
+        .index = @enumToInt(Feature.fast_vector_shift_masks),
+        .name = @tagName(Feature.fast_vector_shift_masks),
+        .llvm_name = "fast-vector-shift-masks",
+        .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.gfni)] = .{
+        .index = @enumToInt(Feature.gfni),
+        .name = @tagName(Feature.gfni),
+        .llvm_name = "gfni",
+        .description = "Enable Galois Field Arithmetic Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.fast_gather)] = .{
+        .index = @enumToInt(Feature.fast_gather),
+        .name = @tagName(Feature.fast_gather),
+        .llvm_name = "fast-gather",
+        .description = "Indicates if gather is reasonably fast",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.avx512ifma)] = .{
+        .index = @enumToInt(Feature.avx512ifma),
+        .name = @tagName(Feature.avx512ifma),
+        .llvm_name = "avx512ifma",
+        .description = "Enable AVX-512 Integer Fused Multiple-Add",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.invpcid)] = .{
+        .index = @enumToInt(Feature.invpcid),
+        .name = @tagName(Feature.invpcid),
+        .llvm_name = "invpcid",
+        .description = "Invalidate Process-Context Identifier",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.sahf)] = .{
+        .index = @enumToInt(Feature.sahf),
+        .name = @tagName(Feature.sahf),
+        .llvm_name = "sahf",
+        .description = "Support LAHF and SAHF instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.lea_sp)] = .{
+        .index = @enumToInt(Feature.lea_sp),
+        .name = @tagName(Feature.lea_sp),
+        .llvm_name = "lea-sp",
+        .description = "Use LEA for adjusting the stack pointer",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.lea_uses_ag)] = .{
+        .index = @enumToInt(Feature.lea_uses_ag),
+        .name = @tagName(Feature.lea_uses_ag),
+        .llvm_name = "lea-uses-ag",
+        .description = "LEA instruction needs inputs at AG stage",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.lwp)] = .{
+        .index = @enumToInt(Feature.lwp),
+        .name = @tagName(Feature.lwp),
+        .llvm_name = "lwp",
+        .description = "Enable LWP instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.lzcnt)] = .{
+        .index = @enumToInt(Feature.lzcnt),
+        .name = @tagName(Feature.lzcnt),
+        .llvm_name = "lzcnt",
+        .description = "Support LZCNT instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
+        .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt),
+        .name = @tagName(Feature.false_deps_lzcnt_tzcnt),
+        .llvm_name = "false-deps-lzcnt-tzcnt",
+        .description = "LZCNT/TZCNT have a false dependency on dest register",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.mmx)] = .{
+        .index = @enumToInt(Feature.mmx),
+        .name = @tagName(Feature.mmx),
+        .llvm_name = "mmx",
+        .description = "Enable MMX instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.movbe)] = .{
+        .index = @enumToInt(Feature.movbe),
+        .name = @tagName(Feature.movbe),
+        .llvm_name = "movbe",
+        .description = "Support MOVBE instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.movdir64b)] = .{
+        .index = @enumToInt(Feature.movdir64b),
+        .name = @tagName(Feature.movdir64b),
+        .llvm_name = "movdir64b",
+        .description = "Support movdir64b instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.movdiri)] = .{
+        .index = @enumToInt(Feature.movdiri),
+        .name = @tagName(Feature.movdiri),
+        .llvm_name = "movdiri",
+        .description = "Support movdiri instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.mpx)] = .{
+        .index = @enumToInt(Feature.mpx),
+        .name = @tagName(Feature.mpx),
+        .llvm_name = "mpx",
+        .description = "Support MPX instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.mwaitx)] = .{
+        .index = @enumToInt(Feature.mwaitx),
+        .name = @tagName(Feature.mwaitx),
+        .llvm_name = "mwaitx",
+        .description = "Enable MONITORX/MWAITX timer functionality",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.macrofusion)] = .{
+        .index = @enumToInt(Feature.macrofusion),
+        .name = @tagName(Feature.macrofusion),
+        .llvm_name = "macrofusion",
+        .description = "Various instructions can be fused with conditional branches",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
+        .index = @enumToInt(Feature.merge_to_threeway_branch),
+        .name = @tagName(Feature.merge_to_threeway_branch),
+        .llvm_name = "merge-to-threeway-branch",
+        .description = "Merge branches to a three-way conditional branch",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.nopl)] = .{
+        .index = @enumToInt(Feature.nopl),
+        .name = @tagName(Feature.nopl),
+        .llvm_name = "nopl",
+        .description = "Enable NOPL instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.pclmul)] = .{
+        .index = @enumToInt(Feature.pclmul),
+        .name = @tagName(Feature.pclmul),
+        .llvm_name = "pclmul",
+        .description = "Enable packed carry-less multiplication instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.pconfig)] = .{
+        .index = @enumToInt(Feature.pconfig),
+        .name = @tagName(Feature.pconfig),
+        .llvm_name = "pconfig",
+        .description = "platform configuration instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.avx512pf)] = .{
+        .index = @enumToInt(Feature.avx512pf),
+        .name = @tagName(Feature.avx512pf),
+        .llvm_name = "avx512pf",
+        .description = "Enable AVX-512 PreFetch Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.pku)] = .{
+        .index = @enumToInt(Feature.pku),
+        .name = @tagName(Feature.pku),
+        .llvm_name = "pku",
+        .description = "Enable protection keys",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.popcnt)] = .{
+        .index = @enumToInt(Feature.popcnt),
+        .name = @tagName(Feature.popcnt),
+        .llvm_name = "popcnt",
+        .description = "Support POPCNT instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.false_deps_popcnt)] = .{
+        .index = @enumToInt(Feature.false_deps_popcnt),
+        .name = @tagName(Feature.false_deps_popcnt),
+        .llvm_name = "false-deps-popcnt",
+        .description = "POPCNT has a false dependency on dest register",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.prefetchwt1)] = .{
+        .index = @enumToInt(Feature.prefetchwt1),
+        .name = @tagName(Feature.prefetchwt1),
+        .llvm_name = "prefetchwt1",
+        .description = "Prefetch with Intent to Write and T1 Hint",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.prfchw)] = .{
+        .index = @enumToInt(Feature.prfchw),
+        .name = @tagName(Feature.prfchw),
+        .llvm_name = "prfchw",
+        .description = "Support PRFCHW instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.ptwrite)] = .{
+        .index = @enumToInt(Feature.ptwrite),
+        .name = @tagName(Feature.ptwrite),
+        .llvm_name = "ptwrite",
+        .description = "Support ptwrite instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.pad_short_functions)] = .{
+        .index = @enumToInt(Feature.pad_short_functions),
+        .name = @tagName(Feature.pad_short_functions),
+        .llvm_name = "pad-short-functions",
+        .description = "Pad short functions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.prefer_256_bit)] = .{
+        .index = @enumToInt(Feature.prefer_256_bit),
+        .name = @tagName(Feature.prefer_256_bit),
+        .llvm_name = "prefer-256-bit",
+        .description = "Prefer 256-bit AVX instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.rdpid)] = .{
+        .index = @enumToInt(Feature.rdpid),
+        .name = @tagName(Feature.rdpid),
+        .llvm_name = "rdpid",
+        .description = "Support RDPID instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.rdrnd)] = .{
+        .index = @enumToInt(Feature.rdrnd),
+        .name = @tagName(Feature.rdrnd),
+        .llvm_name = "rdrnd",
+        .description = "Support RDRAND instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.rdseed)] = .{
+        .index = @enumToInt(Feature.rdseed),
+        .name = @tagName(Feature.rdseed),
+        .llvm_name = "rdseed",
+        .description = "Support RDSEED instruction",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.rtm)] = .{
+        .index = @enumToInt(Feature.rtm),
+        .name = @tagName(Feature.rtm),
+        .llvm_name = "rtm",
+        .description = "Support RTM instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.retpoline)] = .{
+        .index = @enumToInt(Feature.retpoline),
+        .name = @tagName(Feature.retpoline),
+        .llvm_name = "retpoline",
+        .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
+        .dependencies = featureSet(&[_]Feature{
+            .retpoline_indirect_calls,
+            .retpoline_indirect_branches,
+        }),
+    };
+
+    result[@enumToInt(Feature.retpoline_external_thunk)] = .{
+        .index = @enumToInt(Feature.retpoline_external_thunk),
+        .name = @tagName(Feature.retpoline_external_thunk),
+        .llvm_name = "retpoline-external-thunk",
+        .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
+        .dependencies = featureSet(&[_]Feature{
+            .retpoline_indirect_calls,
+        }),
+    };
+
+    result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
+        .index = @enumToInt(Feature.retpoline_indirect_branches),
+        .name = @tagName(Feature.retpoline_indirect_branches),
+        .llvm_name = "retpoline-indirect-branches",
+        .description = "Remove speculation of indirect branches from the generated code",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
+        .index = @enumToInt(Feature.retpoline_indirect_calls),
+        .name = @tagName(Feature.retpoline_indirect_calls),
+        .llvm_name = "retpoline-indirect-calls",
+        .description = "Remove speculation of indirect calls from the generated code",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.sgx)] = .{
+        .index = @enumToInt(Feature.sgx),
+        .name = @tagName(Feature.sgx),
+        .llvm_name = "sgx",
+        .description = "Enable Software Guard Extensions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.sha)] = .{
+        .index = @enumToInt(Feature.sha),
+        .name = @tagName(Feature.sha),
+        .llvm_name = "sha",
+        .description = "Enable SHA instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.shstk)] = .{
+        .index = @enumToInt(Feature.shstk),
+        .name = @tagName(Feature.shstk),
+        .llvm_name = "shstk",
+        .description = "Support CET Shadow-Stack instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.sse)] = .{
+        .index = @enumToInt(Feature.sse),
+        .name = @tagName(Feature.sse),
+        .llvm_name = "sse",
+        .description = "Enable SSE instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.sse2)] = .{
+        .index = @enumToInt(Feature.sse2),
+        .name = @tagName(Feature.sse2),
+        .llvm_name = "sse2",
+        .description = "Enable SSE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.sse3)] = .{
+        .index = @enumToInt(Feature.sse3),
+        .name = @tagName(Feature.sse3),
+        .llvm_name = "sse3",
+        .description = "Enable SSE3 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.sse4a)] = .{
+        .index = @enumToInt(Feature.sse4a),
+        .name = @tagName(Feature.sse4a),
+        .llvm_name = "sse4a",
+        .description = "Support SSE 4a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.sse4_1)] = .{
+        .index = @enumToInt(Feature.sse4_1),
+        .name = @tagName(Feature.sse4_1),
+        .llvm_name = "sse4.1",
+        .description = "Enable SSE 4.1 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.sse4_2)] = .{
+        .index = @enumToInt(Feature.sse4_2),
+        .name = @tagName(Feature.sse4_2),
+        .llvm_name = "sse4.2",
+        .description = "Enable SSE 4.2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.sse_unaligned_mem)] = .{
+        .index = @enumToInt(Feature.sse_unaligned_mem),
+        .name = @tagName(Feature.sse_unaligned_mem),
+        .llvm_name = "sse-unaligned-mem",
+        .description = "Allow unaligned memory operands with SSE instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.ssse3)] = .{
+        .index = @enumToInt(Feature.ssse3),
+        .name = @tagName(Feature.ssse3),
+        .llvm_name = "ssse3",
+        .description = "Enable SSSE3 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.slow_3ops_lea)] = .{
+        .index = @enumToInt(Feature.slow_3ops_lea),
+        .name = @tagName(Feature.slow_3ops_lea),
+        .llvm_name = "slow-3ops-lea",
+        .description = "LEA instruction with 3 ops or certain registers is slow",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.idivl_to_divb)] = .{
+        .index = @enumToInt(Feature.idivl_to_divb),
+        .name = @tagName(Feature.idivl_to_divb),
+        .llvm_name = "idivl-to-divb",
+        .description = "Use 8-bit divide for positive values less than 256",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.idivq_to_divl)] = .{
+        .index = @enumToInt(Feature.idivq_to_divl),
+        .name = @tagName(Feature.idivq_to_divl),
+        .llvm_name = "idivq-to-divl",
+        .description = "Use 32-bit divide for positive values less than 2^32",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_incdec)] = .{
+        .index = @enumToInt(Feature.slow_incdec),
+        .name = @tagName(Feature.slow_incdec),
+        .llvm_name = "slow-incdec",
+        .description = "INC and DEC instructions are slower than ADD and SUB",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_lea)] = .{
+        .index = @enumToInt(Feature.slow_lea),
+        .name = @tagName(Feature.slow_lea),
+        .llvm_name = "slow-lea",
+        .description = "LEA instruction with certain arguments is slow",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_pmaddwd)] = .{
+        .index = @enumToInt(Feature.slow_pmaddwd),
+        .name = @tagName(Feature.slow_pmaddwd),
+        .llvm_name = "slow-pmaddwd",
+        .description = "PMADDWD is slower than PMULLD",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_pmulld)] = .{
+        .index = @enumToInt(Feature.slow_pmulld),
+        .name = @tagName(Feature.slow_pmulld),
+        .llvm_name = "slow-pmulld",
+        .description = "PMULLD instruction is slow",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_shld)] = .{
+        .index = @enumToInt(Feature.slow_shld),
+        .name = @tagName(Feature.slow_shld),
+        .llvm_name = "slow-shld",
+        .description = "SHLD instruction is slow",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_two_mem_ops)] = .{
+        .index = @enumToInt(Feature.slow_two_mem_ops),
+        .name = @tagName(Feature.slow_two_mem_ops),
+        .llvm_name = "slow-two-mem-ops",
+        .description = "Two memory operand instructions are slow",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
+        .index = @enumToInt(Feature.slow_unaligned_mem_16),
+        .name = @tagName(Feature.slow_unaligned_mem_16),
+        .llvm_name = "slow-unaligned-mem-16",
+        .description = "Slow unaligned 16-byte memory access",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
+        .index = @enumToInt(Feature.slow_unaligned_mem_32),
+        .name = @tagName(Feature.slow_unaligned_mem_32),
+        .llvm_name = "slow-unaligned-mem-32",
+        .description = "Slow unaligned 32-byte memory access",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.soft_float)] = .{
+        .index = @enumToInt(Feature.soft_float),
+        .name = @tagName(Feature.soft_float),
+        .llvm_name = "soft-float",
+        .description = "Use software floating point features",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.tbm)] = .{
+        .index = @enumToInt(Feature.tbm),
+        .name = @tagName(Feature.tbm),
+        .llvm_name = "tbm",
+        .description = "Enable TBM instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.vaes)] = .{
+        .index = @enumToInt(Feature.vaes),
+        .name = @tagName(Feature.vaes),
+        .llvm_name = "vaes",
+        .description = "Promote selected AES instructions to AVX512/AVX registers",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vbmi)] = .{
+        .index = @enumToInt(Feature.avx512vbmi),
+        .name = @tagName(Feature.avx512vbmi),
+        .llvm_name = "avx512vbmi",
+        .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vbmi2)] = .{
+        .index = @enumToInt(Feature.avx512vbmi2),
+        .name = @tagName(Feature.avx512vbmi2),
+        .llvm_name = "avx512vbmi2",
+        .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vl)] = .{
+        .index = @enumToInt(Feature.avx512vl),
+        .name = @tagName(Feature.avx512vl),
+        .llvm_name = "avx512vl",
+        .description = "Enable AVX-512 Vector Length eXtensions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vnni)] = .{
+        .index = @enumToInt(Feature.avx512vnni),
+        .name = @tagName(Feature.avx512vnni),
+        .llvm_name = "avx512vnni",
+        .description = "Enable AVX-512 Vector Neural Network Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vp2intersect)] = .{
+        .index = @enumToInt(Feature.avx512vp2intersect),
+        .name = @tagName(Feature.avx512vp2intersect),
+        .llvm_name = "avx512vp2intersect",
+        .description = "Enable AVX-512 vp2intersect",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.vpclmulqdq)] = .{
+        .index = @enumToInt(Feature.vpclmulqdq),
+        .name = @tagName(Feature.vpclmulqdq),
+        .llvm_name = "vpclmulqdq",
+        .description = "Enable vpclmulqdq instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.avx512vpopcntdq)] = .{
+        .index = @enumToInt(Feature.avx512vpopcntdq),
+        .name = @tagName(Feature.avx512vpopcntdq),
+        .llvm_name = "avx512vpopcntdq",
+        .description = "Enable AVX-512 Population Count Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.waitpkg)] = .{
+        .index = @enumToInt(Feature.waitpkg),
+        .name = @tagName(Feature.waitpkg),
+        .llvm_name = "waitpkg",
+        .description = "Wait and pause enhancements",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.wbnoinvd)] = .{
+        .index = @enumToInt(Feature.wbnoinvd),
+        .name = @tagName(Feature.wbnoinvd),
+        .llvm_name = "wbnoinvd",
+        .description = "Write Back No Invalidate",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.x87)] = .{
+        .index = @enumToInt(Feature.x87),
+        .name = @tagName(Feature.x87),
+        .llvm_name = "x87",
+        .description = "Enable X87 float instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.xop)] = .{
+        .index = @enumToInt(Feature.xop),
+        .name = @tagName(Feature.xop),
+        .llvm_name = "xop",
+        .description = "Enable XOP instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+
+    result[@enumToInt(Feature.xsave)] = .{
+        .index = @enumToInt(Feature.xsave),
+        .name = @tagName(Feature.xsave),
+        .llvm_name = "xsave",
+        .description = "Support xsave instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.xsavec)] = .{
+        .index = @enumToInt(Feature.xsavec),
+        .name = @tagName(Feature.xsavec),
+        .llvm_name = "xsavec",
+        .description = "Support xsavec instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.xsaveopt)] = .{
+        .index = @enumToInt(Feature.xsaveopt),
+        .name = @tagName(Feature.xsaveopt),
+        .llvm_name = "xsaveopt",
+        .description = "Support xsaveopt instructions",
+        .dependencies = 0,
+    };
+
+    result[@enumToInt(Feature.xsaves)] = .{
+        .index = @enumToInt(Feature.xsaves),
+        .name = @tagName(Feature.xsaves),
+        .llvm_name = "xsaves",
+        .description = "Support xsaves instructions",
+        .dependencies = 0,
+    };
+
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const amdfam10 = Cpu{
+        .name = "amdfam10",
+        .llvm_name = "amdfam10",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lzcnt,
+            .nopl,
+            .popcnt,
+            .sse,
+            .sse4a,
+            .slow_shld,
+            .x87,
+        }),
+    };
+
+    pub const athlon = Cpu{
+        .name = "athlon",
+        .llvm_name = "athlon",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cmov,
+            .cx8,
+            .nopl,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon4 = Cpu{
+        .name = "athlon_4",
+        .llvm_name = "athlon-4",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .nopl,
+            .sse,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon_fx = Cpu{
+        .name = "athlon_fx",
+        .llvm_name = "athlon-fx",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon_mp = Cpu{
+        .name = "athlon_mp",
+        .llvm_name = "athlon-mp",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .nopl,
+            .sse,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon_tbird = Cpu{
+        .name = "athlon_tbird",
+        .llvm_name = "athlon-tbird",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cmov,
+            .cx8,
+            .nopl,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon_xp = Cpu{
+        .name = "athlon_xp",
+        .llvm_name = "athlon-xp",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .nopl,
+            .sse,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon64 = Cpu{
+        .name = "athlon64",
+        .llvm_name = "athlon64",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const athlon64_sse3 = Cpu{
+        .name = "athlon64_sse3",
+        .llvm_name = "athlon64-sse3",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const atom = Cpu{
+        .name = "atom",
+        .llvm_name = "atom",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .lea_sp,
+            .lea_uses_ag,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pad_short_functions,
+            .sse,
+            .ssse3,
+            .idivl_to_divb,
+            .idivq_to_divl,
+            .slow_two_mem_ops,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const barcelona = Cpu{
+        .name = "barcelona",
+        .llvm_name = "barcelona",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lzcnt,
+            .nopl,
+            .popcnt,
+            .sse,
+            .sse4a,
+            .slow_shld,
+            .x87,
+        }),
+    };
+
+    pub const bdver1 = Cpu{
+        .name = "bdver1",
+        .llvm_name = "bdver1",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .branchfusion,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast11bytenop,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lwp,
+            .lzcnt,
+            .mmx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .slow_shld,
+            .x87,
+            .xop,
+            .xsave,
+        }),
+    };
+
+    pub const bdver2 = Cpu{
+        .name = "bdver2",
+        .llvm_name = "bdver2",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .bmi,
+            .branchfusion,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fma,
+            .fxsr,
+            .fast11bytenop,
+            .fast_bextr,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lwp,
+            .lzcnt,
+            .mmx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .slow_shld,
+            .tbm,
+            .x87,
+            .xop,
+            .xsave,
+        }),
+    };
+
+    pub const bdver3 = Cpu{
+        .name = "bdver3",
+        .llvm_name = "bdver3",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .bmi,
+            .branchfusion,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast11bytenop,
+            .fast_bextr,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lwp,
+            .lzcnt,
+            .mmx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .slow_shld,
+            .tbm,
+            .x87,
+            .xop,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const bdver4 = Cpu{
+        .name = "bdver4",
+        .llvm_name = "bdver4",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .branchfusion,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast11bytenop,
+            .fast_bextr,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lwp,
+            .lzcnt,
+            .mmx,
+            .mwaitx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .slow_shld,
+            .tbm,
+            .x87,
+            .xop,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const bonnell = Cpu{
+        .name = "bonnell",
+        .llvm_name = "bonnell",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .lea_sp,
+            .lea_uses_ag,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pad_short_functions,
+            .sse,
+            .ssse3,
+            .idivl_to_divb,
+            .idivq_to_divl,
+            .slow_two_mem_ops,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const broadwell = Cpu{
+        .name = "broadwell",
+        .llvm_name = "broadwell",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .avx,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .cmov,
+            .cx8,
+            .cx16,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .false_deps_lzcnt_tzcnt,
+            .mmx,
+            .movbe,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const btver1 = Cpu{
+        .name = "btver1",
+        .llvm_name = "btver1",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast15bytenop,
+            .fast_scalar_shift_masks,
+            .fast_vector_shift_masks,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .nopl,
+            .popcnt,
+            .prfchw,
+            .sse,
+            .sse4a,
+            .ssse3,
+            .slow_shld,
+            .x87,
+        }),
+    };
+
+    pub const btver2 = Cpu{
+        .name = "btver2",
+        .llvm_name = "btver2",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .avx,
+            .bmi,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fxsr,
+            .fast15bytenop,
+            .fast_bextr,
+            .fast_hops,
+            .fast_lzcnt,
+            .fast_partial_ymm_or_zmm_write,
+            .fast_scalar_shift_masks,
+            .fast_vector_shift_masks,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .sse4a,
+            .ssse3,
+            .slow_shld,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const c3 = Cpu{
+        .name = "c3",
+        .llvm_name = "c3",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnow3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const c32 = Cpu{
+        .name = "c3_2",
+        .llvm_name = "c3-2",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .sse,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const cannonlake = Cpu{
+        .name = "cannonlake",
+        .llvm_name = "cannonlake",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .avx512ifma,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sha,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .avx512vbmi,
+            .avx512vl,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const cascadelake = Cpu{
+        .name = "cascadelake",
+        .llvm_name = "cascadelake",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .avx512vl,
+            .avx512vnni,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const cooperlake = Cpu{
+        .name = "cooperlake",
+        .llvm_name = "cooperlake",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .avx512bf16,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .avx512vl,
+            .avx512vnni,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const core_avx_i = Cpu{
+        .name = "core_avx_i",
+        .llvm_name = "core-avx-i",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .rdrnd,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_unaligned_mem_32,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const core_avx2 = Cpu{
+        .name = "core_avx2",
+        .llvm_name = "core-avx2",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .cmov,
+            .cx8,
+            .cx16,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .false_deps_lzcnt_tzcnt,
+            .mmx,
+            .movbe,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .rdrnd,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const core2 = Cpu{
+        .name = "core2",
+        .llvm_name = "core2",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .sse,
+            .ssse3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const corei7 = Cpu{
+        .name = "corei7",
+        .llvm_name = "corei7",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .popcnt,
+            .sse,
+            .sse42,
+            .x87,
+        }),
+    };
+
+    pub const corei7_avx = Cpu{
+        .name = "corei7_avx",
+        .llvm_name = "corei7-avx",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_unaligned_mem_32,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const geode = Cpu{
+        .name = "geode",
+        .llvm_name = "geode",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const goldmont = Cpu{
+        .name = "goldmont",
+        .llvm_name = "goldmont",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .clflushopt,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fsgsbase,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .movbe,
+            .mpx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sha,
+            .sse42,
+            .ssse3,
+            .slow_incdec,
+            .slowLea,
+            .slow_two_mem_ops,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const goldmont_plus = Cpu{
+        .name = "goldmont_plus",
+        .llvm_name = "goldmont-plus",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .clflushopt,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fsgsbase,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .movbe,
+            .mpx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .ptwrite,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sha,
+            .sse42,
+            .ssse3,
+            .slow_incdec,
+            .slowLea,
+            .slow_two_mem_ops,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const haswell = Cpu{
+        .name = "haswell",
+        .llvm_name = "haswell",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .cmov,
+            .cx8,
+            .cx16,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .false_deps_lzcnt_tzcnt,
+            .mmx,
+            .movbe,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .rdrnd,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const i386 = Cpu{
+        .name = "i386",
+        .llvm_name = "i386",
+        .dependencies = featureSet(&[_]Feature{
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const i486 = Cpu{
+        .name = "i486",
+        .llvm_name = "i486",
+        .dependencies = featureSet(&[_]Feature{
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const i586 = Cpu{
+        .name = "i586",
+        .llvm_name = "i586",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const i686 = Cpu{
+        .name = "i686",
+        .llvm_name = "i686",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const icelake_client = Cpu{
+        .name = "icelake_client",
+        .llvm_name = "icelake-client",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .avx512bitalg,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .gfni,
+            .fast_gather,
+            .avx512ifma,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .prfchw,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sha,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .vaes,
+            .avx512vbmi,
+            .avx512vbmi2,
+            .avx512vl,
+            .avx512vnni,
+            .vpclmulqdq,
+            .avx512vpopcntdq,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const icelake_server = Cpu{
+        .name = "icelake_server",
+        .llvm_name = "icelake-server",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .avx512bitalg,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .gfni,
+            .fast_gather,
+            .avx512ifma,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pconfig,
+            .pku,
+            .popcnt,
+            .prfchw,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sha,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .vaes,
+            .avx512vbmi,
+            .avx512vbmi2,
+            .avx512vl,
+            .avx512vnni,
+            .vpclmulqdq,
+            .avx512vpopcntdq,
+            .wbnoinvd,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const ivybridge = Cpu{
+        .name = "ivybridge",
+        .llvm_name = "ivybridge",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .rdrnd,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_unaligned_mem_32,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const k6 = Cpu{
+        .name = "k6",
+        .llvm_name = "k6",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+            .mmx,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const k62 = Cpu{
+        .name = "k6_2",
+        .llvm_name = "k6-2",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnow3,
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const k63 = Cpu{
+        .name = "k6_3",
+        .llvm_name = "k6-3",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnow3,
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const k8 = Cpu{
+        .name = "k8",
+        .llvm_name = "k8",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const k8_sse3 = Cpu{
+        .name = "k8_sse3",
+        .llvm_name = "k8-sse3",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const knl = Cpu{
+        .name = "knl",
+        .llvm_name = "knl",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512cd,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512er,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_partial_ymm_or_zmm_write,
+            .fast_gather,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pclmul,
+            .avx512pf,
+            .popcnt,
+            .prefetchwt1,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_incdec,
+            .slow_pmaddwd,
+            .slow_two_mem_ops,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const knm = Cpu{
+        .name = "knm",
+        .llvm_name = "knm",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512cd,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512er,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_partial_ymm_or_zmm_write,
+            .fast_gather,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .nopl,
+            .pclmul,
+            .avx512pf,
+            .popcnt,
+            .prefetchwt1,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_incdec,
+            .slow_pmaddwd,
+            .slow_two_mem_ops,
+            .avx512vpopcntdq,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const lakemont = Cpu{
+        .name = "lakemont",
+        .llvm_name = "lakemont",
+        .dependencies = 0,
+    };
+
+    pub const nehalem = Cpu{
+        .name = "nehalem",
+        .llvm_name = "nehalem",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .popcnt,
+            .sse,
+            .sse42,
+            .x87,
+        }),
+    };
+
+    pub const nocona = Cpu{
+        .name = "nocona",
+        .llvm_name = "nocona",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const opteron = Cpu{
+        .name = "opteron",
+        .llvm_name = "opteron",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const opteron_sse3 = Cpu{
+        .name = "opteron_sse3",
+        .llvm_name = "opteron-sse3",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnowa3,
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_scalar_shift_masks,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_shld,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const penryn = Cpu{
+        .name = "penryn",
+        .llvm_name = "penryn",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .sse,
+            .sse41,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium = Cpu{
+        .name = "pentium",
+        .llvm_name = "pentium",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium_m = Cpu{
+        .name = "pentium_m",
+        .llvm_name = "pentium-m",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium_mmx = Cpu{
+        .name = "pentium_mmx",
+        .llvm_name = "pentium-mmx",
+        .dependencies = featureSet(&[_]Feature{
+            .cx8,
+            .mmx,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium2 = Cpu{
+        .name = "pentium2",
+        .llvm_name = "pentium2",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium3 = Cpu{
+        .name = "pentium3",
+        .llvm_name = "pentium3",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium3m = Cpu{
+        .name = "pentium3m",
+        .llvm_name = "pentium3m",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium4 = Cpu{
+        .name = "pentium4",
+        .llvm_name = "pentium4",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentium4m = Cpu{
+        .name = "pentium4m",
+        .llvm_name = "pentium4m",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const pentiumpro = Cpu{
+        .name = "pentiumpro",
+        .llvm_name = "pentiumpro",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .nopl,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const prescott = Cpu{
+        .name = "prescott",
+        .llvm_name = "prescott",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const sandybridge = Cpu{
+        .name = "sandybridge",
+        .llvm_name = "sandybridge",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .avx,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .slow_unaligned_mem_32,
+            .x87,
+            .xsave,
+            .xsaveopt,
+        }),
+    };
+
+    pub const silvermont = Cpu{
+        .name = "silvermont",
+        .llvm_name = "silvermont",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .movbe,
+            .nopl,
+            .sse,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .sse42,
+            .ssse3,
+            .idivq_to_divl,
+            .slow_incdec,
+            .slowLea,
+            .slowPmulld,
+            .slow_two_mem_ops,
+            .x87,
+        }),
+    };
+
+    pub const skx = Cpu{
+        .name = "skx",
+        .llvm_name = "skx",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .avx512vl,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const skylake = Cpu{
+        .name = "skylake",
+        .llvm_name = "skylake",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .clflushopt,
+            .cmov,
+            .cx8,
+            .cx16,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const skylake_avx512 = Cpu{
+        .name = "skylake_avx512",
+        .llvm_name = "skylake-avx512",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx,
+            .avx2,
+            .avx512f,
+            .bmi,
+            .bmi2,
+            .avx512bw,
+            .avx512cd,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cx8,
+            .cx16,
+            .avx512dq,
+            .ermsb,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast_shld_rotate,
+            .fast_scalar_fsqrt,
+            .fast_variable_shuffle,
+            .fast_vector_fsqrt,
+            .fast_gather,
+            .invpcid,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mpx,
+            .macrofusion,
+            .merge_to_threeway_branch,
+            .nopl,
+            .pclmul,
+            .pku,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sse42,
+            .slow_3ops_lea,
+            .idivq_to_divl,
+            .avx512vl,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const slm = Cpu{
+        .name = "slm",
+        .llvm_name = "slm",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .movbe,
+            .nopl,
+            .sse,
+            .pclmul,
+            .popcnt,
+            .false_deps_popcnt,
+            .prfchw,
+            .rdrnd,
+            .sse42,
+            .ssse3,
+            .idivq_to_divl,
+            .slow_incdec,
+            .slowLea,
+            .slowPmulld,
+            .slow_two_mem_ops,
+            .x87,
+        }),
+    };
+
+    pub const tremont = Cpu{
+        .name = "tremont",
+        .llvm_name = "tremont",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .sse,
+            .aes,
+            .cldemote,
+            .clflushopt,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fsgsbase,
+            .fxsr,
+            .gfni,
+            .sahf,
+            .mmx,
+            .movbe,
+            .movdir64b,
+            .movdiri,
+            .mpx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .ptwrite,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sgx,
+            .sha,
+            .sse42,
+            .ssse3,
+            .slow_incdec,
+            .slowLea,
+            .slow_two_mem_ops,
+            .waitpkg,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const westmere = Cpu{
+        .name = "westmere",
+        .llvm_name = "westmere",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .cx16,
+            .fxsr,
+            .sahf,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .sse,
+            .pclmul,
+            .popcnt,
+            .sse42,
+            .x87,
+        }),
+    };
+
+    pub const winchip_c6 = Cpu{
+        .name = "winchip_c6",
+        .llvm_name = "winchip-c6",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const winchip2 = Cpu{
+        .name = "winchip2",
+        .llvm_name = "winchip2",
+        .dependencies = featureSet(&[_]Feature{
+            .mmx,
+            .dnow3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const x86_64 = Cpu{
+        .name = "x86_64",
+        .llvm_name = "x86-64",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .macrofusion,
+            .nopl,
+            .sse,
+            .sse2,
+            .slow_3ops_lea,
+            .slow_incdec,
+            .x87,
+        }),
+    };
+
+    pub const yonah = Cpu{
+        .name = "yonah",
+        .llvm_name = "yonah",
+        .dependencies = featureSet(&[_]Feature{
+            .cmov,
+            .cx8,
+            .fxsr,
+            .mmx,
+            .nopl,
+            .sse,
+            .sse3,
+            .slow_unaligned_mem_16,
+            .x87,
+        }),
+    };
+
+    pub const znver1 = Cpu{
+        .name = "znver1",
+        .llvm_name = "znver1",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .branchfusion,
+            .clflushopt,
+            .clzero,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast15bytenop,
+            .fast_bextr,
+            .fast_lzcnt,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mwaitx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .rdrnd,
+            .rdseed,
+            .sha,
+            .sse4a,
+            .slow_shld,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+
+    pub const znver2 = Cpu{
+        .name = "znver2",
+        .llvm_name = "znver2",
+        .dependencies = featureSet(&[_]Feature{
+            .bit64,
+            .adx,
+            .sse,
+            .aes,
+            .avx2,
+            .bmi,
+            .bmi2,
+            .branchfusion,
+            .clflushopt,
+            .clwb,
+            .clzero,
+            .cmov,
+            .cx8,
+            .cx16,
+            .f16c,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .fast15bytenop,
+            .fast_bextr,
+            .fast_lzcnt,
+            .fast_scalar_shift_masks,
+            .sahf,
+            .lzcnt,
+            .mmx,
+            .movbe,
+            .mwaitx,
+            .nopl,
+            .pclmul,
+            .popcnt,
+            .prfchw,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sha,
+            .sse4a,
+            .slow_shld,
+            .wbnoinvd,
+            .x87,
+            .xsave,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
+};
+
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.amdfam10,
+    &cpu.athlon,
+    &cpu.athlon4,
+    &cpu.athlon_fx,
+    &cpu.athlon_mp,
+    &cpu.athlon_tbird,
+    &cpu.athlon_xp,
+    &cpu.athlon64,
+    &cpu.athlon64_sse3,
+    &cpu.atom,
+    &cpu.barcelona,
+    &cpu.bdver1,
+    &cpu.bdver2,
+    &cpu.bdver3,
+    &cpu.bdver4,
+    &cpu.bonnell,
+    &cpu.broadwell,
+    &cpu.btver1,
+    &cpu.btver2,
+    &cpu.c3,
+    &cpu.c32,
+    &cpu.cannonlake,
+    &cpu.cascadelake,
+    &cpu.cooperlake,
+    &cpu.core_avx_i,
+    &cpu.core_avx2,
+    &cpu.core2,
+    &cpu.corei7,
+    &cpu.corei7_avx,
+    &cpu.generic,
+    &cpu.geode,
+    &cpu.goldmont,
+    &cpu.goldmont_plus,
+    &cpu.haswell,
+    &cpu.i386,
+    &cpu.i486,
+    &cpu.i586,
+    &cpu.i686,
+    &cpu.icelake_client,
+    &cpu.icelake_server,
+    &cpu.ivybridge,
+    &cpu.k6,
+    &cpu.k62,
+    &cpu.k63,
+    &cpu.k8,
+    &cpu.k8_sse3,
+    &cpu.knl,
+    &cpu.knm,
+    &cpu.lakemont,
+    &cpu.nehalem,
+    &cpu.nocona,
+    &cpu.opteron,
+    &cpu.opteron_sse3,
+    &cpu.penryn,
+    &cpu.pentium,
+    &cpu.pentium_m,
+    &cpu.pentium_mmx,
+    &cpu.pentium2,
+    &cpu.pentium3,
+    &cpu.pentium3m,
+    &cpu.pentium4,
+    &cpu.pentium4m,
+    &cpu.pentiumpro,
+    &cpu.prescott,
+    &cpu.sandybridge,
+    &cpu.silvermont,
+    &cpu.skx,
+    &cpu.skylake,
+    &cpu.skylake_avx512,
+    &cpu.slm,
+    &cpu.tremont,
+    &cpu.westmere,
+    &cpu.winchip_c6,
+    &cpu.winchip2,
+    &cpu.x86_64,
+    &cpu.yonah,
+    &cpu.znver1,
+    &cpu.znver2,
 };
-- 
2.54.0


From 20af858601e015ba76f23033d0af1d672db097ac Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 19 Jan 2020 21:06:41 -0500
Subject: [PATCH 061/116] some fixes

---
 lib/std/buffer.zig         | 2 +-
 src-self-hosted/stage1.zig | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/std/buffer.zig b/lib/std/buffer.zig
index 21f73112fa497f2d05e7651ac97739b806fe7297..42bf8e8142e8b0055efe057489e15fd6b2d1a41d 100644
--- a/lib/std/buffer.zig
+++ b/lib/std/buffer.zig
@@ -59,7 +59,7 @@ pub const Buffer = struct {
     /// is safe to `deinit`.
     pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
         const allocator = self.list.allocator;
-        const result = allocator.shrink(self.list.items, self.len());
+        const result = self.list.toOwnedSlice();
         self.* = initNull(allocator);
         return result[0 .. result.len - 1 :0];
     }
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index f0593f8fce67a5a236b3af2a7ec22ed108791300..85a69518276274fb6b4af560802c5a81b561a68a 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -542,14 +542,14 @@ export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_le
 fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
     const stdout_stream = &std.io.getStdOut().outStream().stream;
 
-    const arch = Target.parseArchTag(arch_name) catch {
+    const arch = Target.parseArchSub(arch_name) catch {
         std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
         return;
     };
 
     try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)});
 
-    const features = std.target.getFeaturesForArch(arch);
+    const features = arch.allFeaturesList();
 
     var longest_len: usize = 0;
     for (features) |feature| {
@@ -568,7 +568,7 @@ fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
 
         try stdout_stream.print(" - {}\n", .{feature.description});
 
-        if (show_dependencies and feature.dependencies.len > 0) {
+        if (show_dependencies and feature.dependencies != 0) {
             for (feature.dependencies) |dependency| {
                 try stdout_stream.print("    {}\n", .{dependency.name});
             }
@@ -622,7 +622,7 @@ fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
 
 const Stage2CpuFeatures = struct {
     allocator: *mem.Allocator,
-    cpu_features: Target.CpuFeatures,
+    cpu_features: Target.Cross.CpuFeatures,
 
     llvm_cpu_name: ?[:0]const u8,
     llvm_features_str: ?[:0]const u8,
-- 
2.54.0


From 8f29d1407350190e1e641ca55f870f00b53d0246 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 01:42:31 -0500
Subject: [PATCH 062/116] stage1 is building. `zig targets` now self-hosted

---
 BRANCH_TODO                |   2 +
 lib/std/builtin.zig        |   3 +
 lib/std/target.zig         |  62 +++---
 lib/std/target/x86.zig     | 392 ++++++++++++++++++-------------------
 src-self-hosted/main.zig   |   2 +-
 src-self-hosted/stage1.zig | 164 +++++-----------
 src/error.cpp              |   5 +
 src/main.cpp               | 113 +----------
 src/userland.cpp           |  15 +-
 src/userland.h             |  15 +-
 10 files changed, 307 insertions(+), 466 deletions(-)

diff --git a/BRANCH_TODO b/BRANCH_TODO
index 50efbe89f6a632b8a411e78e713ca07a7a6d44fd..4dfc95f7067d35777a95737576eea7191e168570 100644
--- a/BRANCH_TODO
+++ b/BRANCH_TODO
@@ -1,5 +1,7 @@
 Finish these thigns before merging teh branch
 
+ * it gets the wrong answers with `-target-feature -sse,-avx`
+
  * finish refactoring target/arch/*
  * `zig builtin` integration 
  * move target details to better location
diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index 712d98b25cac3adabb0aeaa55dac864144a5c608..b5c137c2e18579ddac51435202fab889df783707 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -1,5 +1,8 @@
 pub usingnamespace @import("builtin");
 
+/// Deprecated: use `std.Target.Os`.
+pub const Target = std.Target;
+
 /// Deprecated: use `std.Target.Os`.
 pub const Os = std.Target.Os;
 
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 350387bd8a6524f0cf25fce3794d2a96bb46cf3b..2f3e740c9016d6054f8abd8e8229696556a43587 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -49,6 +49,22 @@ pub const Target = union(enum) {
         other,
     };
 
+    pub const aarch64 = @import("target/aarch64.zig");
+    pub const amdgpu = @import("target/amdgpu.zig");
+    pub const arm = @import("target/arm.zig");
+    pub const avr = @import("target/avr.zig");
+    pub const bpf = @import("target/bpf.zig");
+    pub const hexagon = @import("target/hexagon.zig");
+    pub const mips = @import("target/mips.zig");
+    pub const msp430 = @import("target/msp430.zig");
+    pub const nvptx = @import("target/nvptx.zig");
+    pub const powerpc = @import("target/powerpc.zig");
+    pub const riscv = @import("target/riscv.zig");
+    pub const sparc = @import("target/sparc.zig");
+    pub const systemz = @import("target/systemz.zig");
+    pub const wasm = @import("target/wasm.zig");
+    pub const x86 = @import("target/x86.zig");
+
     pub const Arch = union(enum) {
         arm: Arm32,
         armeb: Arm32,
@@ -101,22 +117,6 @@ pub const Target = union(enum) {
         renderscript32,
         renderscript64,
 
-        pub const aarch64 = @import("target/aarch64.zig");
-        pub const amdgpu = @import("target/amdgpu.zig");
-        pub const arm = @import("target/arm.zig");
-        pub const avr = @import("target/avr.zig");
-        pub const bpf = @import("target/bpf.zig");
-        pub const hexagon = @import("target/hexagon.zig");
-        pub const mips = @import("target/mips.zig");
-        pub const msp430 = @import("target/msp430.zig");
-        pub const nvptx = @import("target/nvptx.zig");
-        pub const powerpc = @import("target/powerpc.zig");
-        pub const riscv = @import("target/riscv.zig");
-        pub const sparc = @import("target/sparc.zig");
-        pub const systemz = @import("target/systemz.zig");
-        pub const wasm = @import("target/wasm.zig");
-        pub const x86 = @import("target/x86.zig");
-
         pub const Arm32 = enum {
             v8_5a,
             v8_4a,
@@ -251,7 +251,7 @@ pub const Target = union(enum) {
                 };
                 for (arch.allFeaturesList()) |feature, index| {
                     if (mem.eql(u8, feature_name, feature.name)) {
-                        set |= @splat(2, 1 << index);
+                        set |= @splat(2, @as(Cpu.Feature.Set, 1) << @intCast(u7, index));
                         break;
                     }
                 } else {
@@ -440,7 +440,7 @@ pub const Target = union(enum) {
                 // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features,
                 // TODO .s390x => systemz.baseline_features,
                 .i386 => x86.cpu.pentium4.features,
-                .x86_64 => x86.cpu.x8664.features,
+                .x86_64 => x86.cpu.x86_64.features,
                 // TODO .nvptx, .nvptx64 => nvptx.baseline_features,
                 // TODO .wasm32, .wasm64 => wasm.baseline_features,
 
@@ -451,21 +451,21 @@ pub const Target = union(enum) {
         /// All CPUs Zig is aware of, sorted lexicographically by name.
         pub fn allCpus(arch: Arch) []const *const Cpu {
             return switch (arch) {
-                .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
+                // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
                 .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
-                .avr => avr.all_cpus,
-                .bpfel, .bpfeb => bpf.all_cpus,
-                .hexagon => hexagon.all_cpus,
-                .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
-                .msp430 => msp430.all_cpus,
-                .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
-                .amdgcn => amdgpu.all_cpus,
-                .riscv32, .riscv64 => riscv.all_cpus,
-                .sparc, .sparcv9, .sparcel => sparc.all_cpus,
-                .s390x => systemz.all_cpus,
+                // TODO .avr => avr.all_cpus,
+                // TODO .bpfel, .bpfeb => bpf.all_cpus,
+                // TODO .hexagon => hexagon.all_cpus,
+                // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
+                // TODO .msp430 => msp430.all_cpus,
+                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
+                // TODO .amdgcn => amdgpu.all_cpus,
+                // TODO .riscv32, .riscv64 => riscv.all_cpus,
+                // TODO .sparc, .sparcv9, .sparcel => sparc.all_cpus,
+                // TODO .s390x => systemz.all_cpus,
                 .i386, .x86_64 => x86.all_cpus,
-                .nvptx, .nvptx64 => nvptx.all_cpus,
-                .wasm32, .wasm64 => wasm.all_cpus,
+                // TODO .nvptx, .nvptx64 => nvptx.all_cpus,
+                // TODO .wasm32, .wasm64 => wasm.all_cpus,
 
                 else => &[0]*const Cpu{},
             };
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 021c940dbde4edac16b4d5bb8cda4117edc13ea2..50b332f5e1d2e9afde13a3f98ef3df0e96cc16b9 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -1213,10 +1213,10 @@ pub const cpu = struct {
     pub const amdfam10 = Cpu{
         .name = "amdfam10",
         .llvm_name = "amdfam10",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -1236,9 +1236,9 @@ pub const cpu = struct {
     pub const athlon = Cpu{
         .name = "athlon",
         .llvm_name = "athlon",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cmov,
             .cx8,
             .nopl,
@@ -1251,9 +1251,9 @@ pub const cpu = struct {
     pub const athlon4 = Cpu{
         .name = "athlon_4",
         .llvm_name = "athlon-4",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
@@ -1268,10 +1268,10 @@ pub const cpu = struct {
     pub const athlon_fx = Cpu{
         .name = "athlon_fx",
         .llvm_name = "athlon-fx",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .fxsr,
@@ -1288,9 +1288,9 @@ pub const cpu = struct {
     pub const athlon_mp = Cpu{
         .name = "athlon_mp",
         .llvm_name = "athlon-mp",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
@@ -1305,9 +1305,9 @@ pub const cpu = struct {
     pub const athlon_tbird = Cpu{
         .name = "athlon_tbird",
         .llvm_name = "athlon-tbird",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cmov,
             .cx8,
             .nopl,
@@ -1320,9 +1320,9 @@ pub const cpu = struct {
     pub const athlon_xp = Cpu{
         .name = "athlon_xp",
         .llvm_name = "athlon-xp",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
@@ -1337,10 +1337,10 @@ pub const cpu = struct {
     pub const athlon64 = Cpu{
         .name = "athlon64",
         .llvm_name = "athlon64",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .fxsr,
@@ -1357,10 +1357,10 @@ pub const cpu = struct {
     pub const athlon64_sse3 = Cpu{
         .name = "athlon64_sse3",
         .llvm_name = "athlon64-sse3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -1378,8 +1378,8 @@ pub const cpu = struct {
     pub const atom = Cpu{
         .name = "atom",
         .llvm_name = "atom",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -1404,10 +1404,10 @@ pub const cpu = struct {
     pub const barcelona = Cpu{
         .name = "barcelona",
         .llvm_name = "barcelona",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -1427,8 +1427,8 @@ pub const cpu = struct {
     pub const bdver1 = Cpu{
         .name = "bdver1",
         .llvm_name = "bdver1",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .branchfusion,
@@ -1436,7 +1436,7 @@ pub const cpu = struct {
             .cx8,
             .cx16,
             .fxsr,
-            .fast11bytenop,
+            .fast_11bytenop,
             .fast_scalar_shift_masks,
             .sahf,
             .lwp,
@@ -1456,8 +1456,8 @@ pub const cpu = struct {
     pub const bdver2 = Cpu{
         .name = "bdver2",
         .llvm_name = "bdver2",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .bmi,
@@ -1468,7 +1468,7 @@ pub const cpu = struct {
             .f16c,
             .fma,
             .fxsr,
-            .fast11bytenop,
+            .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
             .sahf,
@@ -1490,8 +1490,8 @@ pub const cpu = struct {
     pub const bdver3 = Cpu{
         .name = "bdver3",
         .llvm_name = "bdver3",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .bmi,
@@ -1503,7 +1503,7 @@ pub const cpu = struct {
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast11bytenop,
+            .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
             .sahf,
@@ -1526,8 +1526,8 @@ pub const cpu = struct {
     pub const bdver4 = Cpu{
         .name = "bdver4",
         .llvm_name = "bdver4",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .avx2,
@@ -1541,7 +1541,7 @@ pub const cpu = struct {
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast11bytenop,
+            .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
             .sahf,
@@ -1565,8 +1565,8 @@ pub const cpu = struct {
     pub const bonnell = Cpu{
         .name = "bonnell",
         .llvm_name = "bonnell",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -1591,8 +1591,8 @@ pub const cpu = struct {
     pub const broadwell = Cpu{
         .name = "broadwell",
         .llvm_name = "broadwell",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .avx,
@@ -1625,7 +1625,7 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .x87,
@@ -1637,13 +1637,13 @@ pub const cpu = struct {
     pub const btver1 = Cpu{
         .name = "btver1",
         .llvm_name = "btver1",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
             .fxsr,
-            .fast15bytenop,
+            .fast_15bytenop,
             .fast_scalar_shift_masks,
             .fast_vector_shift_masks,
             .sahf,
@@ -1663,8 +1663,8 @@ pub const cpu = struct {
     pub const btver2 = Cpu{
         .name = "btver2",
         .llvm_name = "btver2",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .avx,
@@ -1674,7 +1674,7 @@ pub const cpu = struct {
             .cx16,
             .f16c,
             .fxsr,
-            .fast15bytenop,
+            .fast_15bytenop,
             .fast_bextr,
             .fast_hops,
             .fast_lzcnt,
@@ -1701,9 +1701,9 @@ pub const cpu = struct {
     pub const c3 = Cpu{
         .name = "c3",
         .llvm_name = "c3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnow3,
+            .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -1712,7 +1712,7 @@ pub const cpu = struct {
     pub const c32 = Cpu{
         .name = "c3_2",
         .llvm_name = "c3-2",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -1726,8 +1726,8 @@ pub const cpu = struct {
     pub const cannonlake = Cpu{
         .name = "cannonlake",
         .llvm_name = "cannonlake",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -1771,7 +1771,7 @@ pub const cpu = struct {
             .rdseed,
             .sgx,
             .sha,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .avx512vbmi,
@@ -1787,8 +1787,8 @@ pub const cpu = struct {
     pub const cascadelake = Cpu{
         .name = "cascadelake",
         .llvm_name = "cascadelake",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -1831,7 +1831,7 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .avx512vl,
@@ -1847,8 +1847,8 @@ pub const cpu = struct {
     pub const cooperlake = Cpu{
         .name = "cooperlake",
         .llvm_name = "cooperlake",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -1892,7 +1892,7 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .avx512vl,
@@ -1908,8 +1908,8 @@ pub const cpu = struct {
     pub const core_avx_i = Cpu{
         .name = "core_avx_i",
         .llvm_name = "core-avx-i",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .cmov,
@@ -1929,7 +1929,7 @@ pub const cpu = struct {
             .popcnt,
             .false_deps_popcnt,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .slow_unaligned_mem_32,
@@ -1942,8 +1942,8 @@ pub const cpu = struct {
     pub const core_avx2 = Cpu{
         .name = "core_avx2",
         .llvm_name = "core-avx2",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .avx2,
@@ -1973,7 +1973,7 @@ pub const cpu = struct {
             .popcnt,
             .false_deps_popcnt,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .x87,
@@ -1985,8 +1985,8 @@ pub const cpu = struct {
     pub const core2 = Cpu{
         .name = "core2",
         .llvm_name = "core2",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2005,8 +2005,8 @@ pub const cpu = struct {
     pub const corei7 = Cpu{
         .name = "corei7",
         .llvm_name = "corei7",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2017,7 +2017,7 @@ pub const cpu = struct {
             .nopl,
             .popcnt,
             .sse,
-            .sse42,
+            .sse4_2,
             .x87,
         }),
     };
@@ -2025,8 +2025,8 @@ pub const cpu = struct {
     pub const corei7_avx = Cpu{
         .name = "corei7_avx",
         .llvm_name = "corei7-avx",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .cmov,
@@ -2043,7 +2043,7 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .false_deps_popcnt,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .slow_unaligned_mem_32,
@@ -2056,7 +2056,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2066,9 +2066,9 @@ pub const cpu = struct {
     pub const geode = Cpu{
         .name = "geode",
         .llvm_name = "geode",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
+            .@"3dnowa",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2078,8 +2078,8 @@ pub const cpu = struct {
     pub const goldmont = Cpu{
         .name = "goldmont",
         .llvm_name = "goldmont",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .clflushopt,
@@ -2100,10 +2100,10 @@ pub const cpu = struct {
             .rdrnd,
             .rdseed,
             .sha,
-            .sse42,
+            .sse4_2,
             .ssse3,
             .slow_incdec,
-            .slowLea,
+            .slow_lea,
             .slow_two_mem_ops,
             .x87,
             .xsave,
@@ -2116,8 +2116,8 @@ pub const cpu = struct {
     pub const goldmont_plus = Cpu{
         .name = "goldmont_plus",
         .llvm_name = "goldmont-plus",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .clflushopt,
@@ -2140,10 +2140,10 @@ pub const cpu = struct {
             .rdseed,
             .sgx,
             .sha,
-            .sse42,
+            .sse4_2,
             .ssse3,
             .slow_incdec,
-            .slowLea,
+            .slow_lea,
             .slow_two_mem_ops,
             .x87,
             .xsave,
@@ -2156,8 +2156,8 @@ pub const cpu = struct {
     pub const haswell = Cpu{
         .name = "haswell",
         .llvm_name = "haswell",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .avx2,
@@ -2187,7 +2187,7 @@ pub const cpu = struct {
             .popcnt,
             .false_deps_popcnt,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .x87,
@@ -2196,38 +2196,38 @@ pub const cpu = struct {
         }),
     };
 
-    pub const i386 = Cpu{
-        .name = "i386",
+    pub const _i386 = Cpu{
+        .name = "_i386",
         .llvm_name = "i386",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
 
-    pub const i486 = Cpu{
-        .name = "i486",
+    pub const _i486 = Cpu{
+        .name = "_i486",
         .llvm_name = "i486",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
 
-    pub const i586 = Cpu{
-        .name = "i586",
+    pub const _i586 = Cpu{
+        .name = "_i586",
         .llvm_name = "i586",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
 
-    pub const i686 = Cpu{
-        .name = "i686",
+    pub const _i686 = Cpu{
+        .name = "_i686",
         .llvm_name = "i686",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .slow_unaligned_mem_16,
@@ -2238,8 +2238,8 @@ pub const cpu = struct {
     pub const icelake_client = Cpu{
         .name = "icelake_client",
         .llvm_name = "icelake-client",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2287,7 +2287,7 @@ pub const cpu = struct {
             .rdseed,
             .sgx,
             .sha,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .vaes,
@@ -2308,8 +2308,8 @@ pub const cpu = struct {
     pub const icelake_server = Cpu{
         .name = "icelake_server",
         .llvm_name = "icelake-server",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2358,7 +2358,7 @@ pub const cpu = struct {
             .rdseed,
             .sgx,
             .sha,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .vaes,
@@ -2380,8 +2380,8 @@ pub const cpu = struct {
     pub const ivybridge = Cpu{
         .name = "ivybridge",
         .llvm_name = "ivybridge",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .cmov,
@@ -2401,7 +2401,7 @@ pub const cpu = struct {
             .popcnt,
             .false_deps_popcnt,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .slow_unaligned_mem_32,
@@ -2414,7 +2414,7 @@ pub const cpu = struct {
     pub const k6 = Cpu{
         .name = "k6",
         .llvm_name = "k6",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -2425,9 +2425,9 @@ pub const cpu = struct {
     pub const k62 = Cpu{
         .name = "k6_2",
         .llvm_name = "k6-2",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnow3,
+            .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2437,9 +2437,9 @@ pub const cpu = struct {
     pub const k63 = Cpu{
         .name = "k6_3",
         .llvm_name = "k6-3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnow3,
+            .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2449,10 +2449,10 @@ pub const cpu = struct {
     pub const k8 = Cpu{
         .name = "k8",
         .llvm_name = "k8",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .fxsr,
@@ -2469,10 +2469,10 @@ pub const cpu = struct {
     pub const k8_sse3 = Cpu{
         .name = "k8_sse3",
         .llvm_name = "k8-sse3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2490,8 +2490,8 @@ pub const cpu = struct {
     pub const knl = Cpu{
         .name = "knl",
         .llvm_name = "knl",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2535,8 +2535,8 @@ pub const cpu = struct {
     pub const knm = Cpu{
         .name = "knm",
         .llvm_name = "knm",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2581,14 +2581,14 @@ pub const cpu = struct {
     pub const lakemont = Cpu{
         .name = "lakemont",
         .llvm_name = "lakemont",
-        .dependencies = 0,
+        .features = 0,
     };
 
     pub const nehalem = Cpu{
         .name = "nehalem",
         .llvm_name = "nehalem",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2599,7 +2599,7 @@ pub const cpu = struct {
             .nopl,
             .popcnt,
             .sse,
-            .sse42,
+            .sse4_2,
             .x87,
         }),
     };
@@ -2607,8 +2607,8 @@ pub const cpu = struct {
     pub const nocona = Cpu{
         .name = "nocona",
         .llvm_name = "nocona",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2625,10 +2625,10 @@ pub const cpu = struct {
     pub const opteron = Cpu{
         .name = "opteron",
         .llvm_name = "opteron",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .fxsr,
@@ -2645,10 +2645,10 @@ pub const cpu = struct {
     pub const opteron_sse3 = Cpu{
         .name = "opteron_sse3",
         .llvm_name = "opteron-sse3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnowa3,
-            .bit64,
+            .@"3dnowa",
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2666,8 +2666,8 @@ pub const cpu = struct {
     pub const penryn = Cpu{
         .name = "penryn",
         .llvm_name = "penryn",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2677,7 +2677,7 @@ pub const cpu = struct {
             .macrofusion,
             .nopl,
             .sse,
-            .sse41,
+            .sse4_1,
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -2686,7 +2686,7 @@ pub const cpu = struct {
     pub const pentium = Cpu{
         .name = "pentium",
         .llvm_name = "pentium",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2696,7 +2696,7 @@ pub const cpu = struct {
     pub const pentium_m = Cpu{
         .name = "pentium_m",
         .llvm_name = "pentium-m",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2712,7 +2712,7 @@ pub const cpu = struct {
     pub const pentium_mmx = Cpu{
         .name = "pentium_mmx",
         .llvm_name = "pentium-mmx",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -2723,7 +2723,7 @@ pub const cpu = struct {
     pub const pentium2 = Cpu{
         .name = "pentium2",
         .llvm_name = "pentium2",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2737,7 +2737,7 @@ pub const cpu = struct {
     pub const pentium3 = Cpu{
         .name = "pentium3",
         .llvm_name = "pentium3",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2752,7 +2752,7 @@ pub const cpu = struct {
     pub const pentium3m = Cpu{
         .name = "pentium3m",
         .llvm_name = "pentium3m",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2767,7 +2767,7 @@ pub const cpu = struct {
     pub const pentium4 = Cpu{
         .name = "pentium4",
         .llvm_name = "pentium4",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2783,7 +2783,7 @@ pub const cpu = struct {
     pub const pentium4m = Cpu{
         .name = "pentium4m",
         .llvm_name = "pentium4m",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2799,7 +2799,7 @@ pub const cpu = struct {
     pub const pentiumpro = Cpu{
         .name = "pentiumpro",
         .llvm_name = "pentiumpro",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .nopl,
@@ -2811,7 +2811,7 @@ pub const cpu = struct {
     pub const prescott = Cpu{
         .name = "prescott",
         .llvm_name = "prescott",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2827,8 +2827,8 @@ pub const cpu = struct {
     pub const sandybridge = Cpu{
         .name = "sandybridge",
         .llvm_name = "sandybridge",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .avx,
             .cmov,
@@ -2845,7 +2845,7 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .false_deps_popcnt,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .slow_unaligned_mem_32,
@@ -2858,8 +2858,8 @@ pub const cpu = struct {
     pub const silvermont = Cpu{
         .name = "silvermont",
         .llvm_name = "silvermont",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -2874,12 +2874,12 @@ pub const cpu = struct {
             .false_deps_popcnt,
             .prfchw,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .ssse3,
             .idivq_to_divl,
             .slow_incdec,
-            .slowLea,
-            .slowPmulld,
+            .slow_lea,
+            .slow_pmulld,
             .slow_two_mem_ops,
             .x87,
         }),
@@ -2888,8 +2888,8 @@ pub const cpu = struct {
     pub const skx = Cpu{
         .name = "skx",
         .llvm_name = "skx",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2932,7 +2932,7 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .avx512vl,
@@ -2947,8 +2947,8 @@ pub const cpu = struct {
     pub const skylake = Cpu{
         .name = "skylake",
         .llvm_name = "skylake",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -2986,7 +2986,7 @@ pub const cpu = struct {
             .rdrnd,
             .rdseed,
             .sgx,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .x87,
@@ -3000,8 +3000,8 @@ pub const cpu = struct {
     pub const skylake_avx512 = Cpu{
         .name = "skylake_avx512",
         .llvm_name = "skylake-avx512",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -3044,7 +3044,7 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse42,
+            .sse4_2,
             .slow_3ops_lea,
             .idivq_to_divl,
             .avx512vl,
@@ -3059,8 +3059,8 @@ pub const cpu = struct {
     pub const slm = Cpu{
         .name = "slm",
         .llvm_name = "slm",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -3075,12 +3075,12 @@ pub const cpu = struct {
             .false_deps_popcnt,
             .prfchw,
             .rdrnd,
-            .sse42,
+            .sse4_2,
             .ssse3,
             .idivq_to_divl,
             .slow_incdec,
-            .slowLea,
-            .slowPmulld,
+            .slow_lea,
+            .slow_pmulld,
             .slow_two_mem_ops,
             .x87,
         }),
@@ -3089,8 +3089,8 @@ pub const cpu = struct {
     pub const tremont = Cpu{
         .name = "tremont",
         .llvm_name = "tremont",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .sse,
             .aes,
             .cldemote,
@@ -3117,10 +3117,10 @@ pub const cpu = struct {
             .rdseed,
             .sgx,
             .sha,
-            .sse42,
+            .sse4_2,
             .ssse3,
             .slow_incdec,
-            .slowLea,
+            .slow_lea,
             .slow_two_mem_ops,
             .waitpkg,
             .x87,
@@ -3134,8 +3134,8 @@ pub const cpu = struct {
     pub const westmere = Cpu{
         .name = "westmere",
         .llvm_name = "westmere",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .cx16,
@@ -3147,7 +3147,7 @@ pub const cpu = struct {
             .sse,
             .pclmul,
             .popcnt,
-            .sse42,
+            .sse4_2,
             .x87,
         }),
     };
@@ -3155,7 +3155,7 @@ pub const cpu = struct {
     pub const winchip_c6 = Cpu{
         .name = "winchip_c6",
         .llvm_name = "winchip-c6",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
             .slow_unaligned_mem_16,
             .x87,
@@ -3165,9 +3165,9 @@ pub const cpu = struct {
     pub const winchip2 = Cpu{
         .name = "winchip2",
         .llvm_name = "winchip2",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
-            .dnow3,
+            .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -3176,8 +3176,8 @@ pub const cpu = struct {
     pub const x86_64 = Cpu{
         .name = "x86_64",
         .llvm_name = "x86-64",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .cmov,
             .cx8,
             .fxsr,
@@ -3195,7 +3195,7 @@ pub const cpu = struct {
     pub const yonah = Cpu{
         .name = "yonah",
         .llvm_name = "yonah",
-        .dependencies = featureSet(&[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -3211,8 +3211,8 @@ pub const cpu = struct {
     pub const znver1 = Cpu{
         .name = "znver1",
         .llvm_name = "znver1",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -3229,7 +3229,7 @@ pub const cpu = struct {
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast15bytenop,
+            .fast_15bytenop,
             .fast_bextr,
             .fast_lzcnt,
             .fast_scalar_shift_masks,
@@ -3258,8 +3258,8 @@ pub const cpu = struct {
     pub const znver2 = Cpu{
         .name = "znver2",
         .llvm_name = "znver2",
-        .dependencies = featureSet(&[_]Feature{
-            .bit64,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
             .adx,
             .sse,
             .aes,
@@ -3277,7 +3277,7 @@ pub const cpu = struct {
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast15bytenop,
+            .fast_15bytenop,
             .fast_bextr,
             .fast_lzcnt,
             .fast_scalar_shift_masks,
@@ -3341,10 +3341,10 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.goldmont,
     &cpu.goldmont_plus,
     &cpu.haswell,
-    &cpu.i386,
-    &cpu.i486,
-    &cpu.i586,
-    &cpu.i686,
+    &cpu._i386,
+    &cpu._i486,
+    &cpu._i586,
+    &cpu._i686,
     &cpu.icelake_client,
     &cpu.icelake_server,
     &cpu.ivybridge,
diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig
index af3fd3a0158607a7aebe25929a936b8de1d010a9..e3faf853ea6f5cd0105c1f78b06afc3fa633e57b 100644
--- a/src-self-hosted/main.zig
+++ b/src-self-hosted/main.zig
@@ -791,7 +791,7 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
 
 // cmd:targets /////////////////////////////////////////////////////////////////////////////////////
 
-fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
+pub fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
     try stdout.write("Architectures:\n");
     {
         comptime var i: usize = 0;
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 85a69518276274fb6b4af560802c5a81b561a68a..9ce4746950b25ebfb43367600372c37ed96b1f6b 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -84,6 +84,11 @@ const Error = extern enum {
     NotLazy,
     IsAsync,
     ImportOutsidePkgPath,
+    UnknownCpu,
+    UnknownSubArchitecture,
+    UnknownCpuFeature,
+    InvalidCpuFeatures,
+    InvalidLlvmCpuFeaturesFormat,
 };
 
 const FILE = std.c.FILE;
@@ -533,99 +538,20 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
 }
 
 // ABI warning
-export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
-    printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
-        std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
+export fn stage2_cmd_targets() c_int {
+    self_hosted_main.cmdTargets(std.heap.c_allocator, &[0][]u8{}) catch |err| {
+        std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
+        return -1;
     };
-}
-
-fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void {
-    const stdout_stream = &std.io.getStdOut().outStream().stream;
-
-    const arch = Target.parseArchSub(arch_name) catch {
-        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
-        return;
-    };
-
-    try stdout_stream.print("Available features for {}:\n", .{@tagName(arch)});
-
-    const features = arch.allFeaturesList();
-
-    var longest_len: usize = 0;
-    for (features) |feature| {
-        if (feature.name.len > longest_len) {
-            longest_len = feature.name.len;
-        }
-    }
-
-    for (features) |feature| {
-        try stdout_stream.print("  {}", .{feature.name});
-
-        var i: usize = 0;
-        while (i < longest_len - feature.name.len) : (i += 1) {
-            try stdout_stream.write(" ");
-        }
-
-        try stdout_stream.print(" - {}\n", .{feature.description});
-
-        if (show_dependencies and feature.dependencies != 0) {
-            for (feature.dependencies) |dependency| {
-                try stdout_stream.print("    {}\n", .{dependency.name});
-            }
-        }
-    }
-}
-
-// ABI warning
-export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void {
-    printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| {
-        std.debug.warn("Failed to list features: {}\n", .{@errorName(err)});
-    };
-}
-
-fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void {
-    const stdout_stream = &std.io.getStdOut().outStream().stream;
-
-    const arch = Target.parseArchTag(arch_name) catch {
-        std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{arch_name});
-        return;
-    };
-
-    const cpus = std.target.getCpusForArch(arch);
-
-    try stdout_stream.print("Available cpus for {}:\n", .{@tagName(arch)});
-
-    var longest_len: usize = 0;
-    for (cpus) |cpu| {
-        if (cpu.name.len > longest_len) {
-            longest_len = cpu.name.len;
-        }
-    }
-
-    for (cpus) |cpu| {
-        try stdout_stream.print("  {}", .{cpu.name});
-
-        var i: usize = 0;
-        while (i < longest_len - cpu.name.len) : (i += 1) {
-            try stdout_stream.write(" ");
-        }
-
-        try stdout_stream.write("\n");
-
-        if (show_dependencies and cpu.dependencies.len > 0) {
-            for (cpu.dependencies) |dependency| {
-                try stdout_stream.print("    {}\n", .{dependency.name});
-            }
-        }
-    }
+    return 0;
 }
 
 const Stage2CpuFeatures = struct {
     allocator: *mem.Allocator,
     cpu_features: Target.Cross.CpuFeatures,
 
-    llvm_cpu_name: ?[:0]const u8,
-    llvm_features_str: ?[:0]const u8,
+    llvm_cpu_name: ?[*:0]const u8,
+    llvm_features_str: ?[*:0]const u8,
 
     builtin_str: [:0]const u8,
     cache_hash: [:0]const u8,
@@ -636,10 +562,10 @@ const Stage2CpuFeatures = struct {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n");
+        const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n", .{});
         errdefer allocator.free(builtin_str);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n");
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n", .{});
         errdefer allocator.free(cache_hash);
 
         self.* = Self{
@@ -655,7 +581,7 @@ const Stage2CpuFeatures = struct {
 
     fn createFromLLVM(
         allocator: *mem.Allocator,
-        arch: [*:0]const u8,
+        arch_name: [*:0]const u8,
         llvm_cpu_name_z: [*:0]const u8,
         llvm_cpu_features: [*:0]const u8,
     ) !*Self {
@@ -687,10 +613,11 @@ const Stage2CpuFeatures = struct {
                 return error.InvalidLlvmCpuFeaturesFormat;
             }
             for (arch.allFeaturesList()) |feature, index| {
-                if (mem.eql(u8, feature_name, feature.name)) {
+                const this_llvm_name = feature.llvm_name orelse continue;
+                if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                     switch (op) {
-                        .add => set |= 1 << index,
-                        .sub => set &= ~@as(Target.Cpu.Feature.Set, 1 << index),
+                        .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
+                        .sub => set &= ~@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
                     }
                     break;
                 }
@@ -703,21 +630,19 @@ const Stage2CpuFeatures = struct {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const builtin_str = try std.fmt.allocPrint0(
-            allocator,
-            "CpuFeatures{{ .cpu = &Arch.{}.cpu.{} }};\n",
+        const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures{{ .cpu = &Target.{}.cpu.{} }};\n", .{
             arch.genericName(),
             cpu.name,
-        );
+        });
         errdefer allocator.free(builtin_str);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", cpu.name, cpu.features);
+        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features });
         errdefer allocator.free(cache_hash);
 
         self.* = Self{
             .allocator = allocator,
             .cpu_features = .{ .cpu = cpu },
-            .llvm_cpu_name = cpu.llvm_name,
+            .llvm_cpu_name = if (cpu.llvm_name) |n| n.ptr else null,
             .llvm_features_str = null,
             .builtin_str = builtin_str,
             .cache_hash = cache_hash,
@@ -728,20 +653,22 @@ const Stage2CpuFeatures = struct {
     fn createFromCpuFeatures(
         allocator: *mem.Allocator,
         arch: Target.Arch,
-        features: Target.Cpu.Feature.Set,
+        feature_set: Target.Cpu.Feature.Set,
     ) !*Self {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", features);
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", .{feature_set});
         errdefer allocator.free(cache_hash);
 
         const generic_arch_name = arch.genericName();
         var builtin_str_buffer = try std.Buffer.allocPrint(
             allocator,
-            "CpuFeatures{{ .features = Arch.{}.featureSet(&[_]Arch.{}.Feature{{\n",
-            generic_arch_name,
-            generic_arch_name,
+            \\CpuFeatures{{
+            \\    .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
+            \\
+        ,
+            .{ generic_arch_name, generic_arch_name },
         );
         defer builtin_str_buffer.deinit();
 
@@ -750,7 +677,8 @@ const Stage2CpuFeatures = struct {
 
         // First, disable all features.
         // This way, we only get the ones the user requests.
-        for (arch.allFeatures()) |feature| {
+        const all_features = arch.allFeaturesList();
+        for (all_features) |feature| {
             if (feature.llvm_name) |llvm_name| {
                 try llvm_features_buffer.append("-");
                 try llvm_features_buffer.append(llvm_name);
@@ -758,14 +686,16 @@ const Stage2CpuFeatures = struct {
             }
         }
 
-        for (features) |feature| {
+        for (all_features) |feature, index| {
+            if (!Target.Cpu.Feature.isEnabled(feature_set, @intCast(u7, index))) continue;
+
             if (feature.llvm_name) |llvm_name| {
                 try llvm_features_buffer.append("+");
                 try llvm_features_buffer.append(llvm_name);
                 try llvm_features_buffer.append(",");
             }
 
-            try builtin_str_buffer.append("    .");
+            try builtin_str_buffer.append("        .");
             try builtin_str_buffer.append(feature.name);
             try builtin_str_buffer.append(",\n");
         }
@@ -774,13 +704,17 @@ const Stage2CpuFeatures = struct {
             llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
         }
 
-        try builtin_str_buffer.append("})};\n");
+        try builtin_str_buffer.append(
+            \\    }),
+            \\};
+            \\
+        );
 
         self.* = Self{
             .allocator = allocator,
-            .cpu_features = .{ .features = features },
+            .cpu_features = .{ .features = feature_set },
             .llvm_cpu_name = null,
-            .llvm_features_str = llvm_features_buffer.toOwnedSlice(),
+            .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
             .cache_hash = cache_hash,
         };
@@ -790,7 +724,7 @@ const Stage2CpuFeatures = struct {
     fn destroy(self: *Self) void {
         self.allocator.free(self.cache_hash);
         self.allocator.free(self.builtin_str);
-        if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
+        // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
         self.allocator.destroy(self);
     }
 };
@@ -803,6 +737,9 @@ export fn stage2_cpu_features_parse_cpu(
 ) Error {
     result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
+        error.UnknownCpu => return .UnknownCpu,
+        error.UnknownArchitecture => return .UnknownArchitecture,
+        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
     };
     return .None;
 }
@@ -821,6 +758,10 @@ export fn stage2_cpu_features_parse_features(
 ) Error {
     result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
+        error.UnknownCpuFeature => return .UnknownCpuFeature,
+        error.InvalidCpuFeatures => return .InvalidCpuFeatures,
+        error.UnknownArchitecture => return .UnknownArchitecture,
+        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
     };
     return .None;
 }
@@ -853,6 +794,9 @@ export fn stage2_cpu_features_llvm(
         llvm_cpu_features,
     ) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
+        error.UnknownArchitecture => return .UnknownArchitecture,
+        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
+        error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
     };
     return .None;
 }
diff --git a/src/error.cpp b/src/error.cpp
index 9fc0383b1b5334be37b7df974b9acbd8c5def38c..6c6abfcd22e42a5f7a1a02fd5c596161d07bf463 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -58,6 +58,11 @@ const char *err_str(Error err) {
         case ErrorNotLazy: return "not lazy";
         case ErrorIsAsync: return "is async";
         case ErrorImportOutsidePkgPath: return "import of file outside package path";
+        case ErrorUnknownCpu: return "unknown CPU";
+        case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
+        case ErrorUnknownCpuFeature: return "unknown CPU feature";
+        case ErrorInvalidCpuFeatures: return "invalid CPU features";
+        case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
     }
     return "(invalid error)";
 }
diff --git a/src/main.cpp b/src/main.cpp
index d5804e795c18578714698e6a9005cb301fe7cbbe..8e331461f8c5d01584b514fdfe53caebe8472e62 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -131,11 +131,6 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "  --test-name-prefix [text]    add prefix to all tests\n"
         "  --test-cmd [arg]             specify test execution command one arg at a time\n"
         "  --test-cmd-bin               appends test binary path to test cmd args\n"
-        "\n"
-        "Targets Options:\n"
-        "  --list-features [arch]       list available features for the given architecture\n"
-        "  --list-cpus [arch]           list available cpus for the given architecture\n"
-        "  --show-dependencies          list feature dependencies for each entry from --list-{features,cpus}\n"
     , arg0);
     return return_code;
 }
@@ -160,88 +155,6 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
     return return_code;
 }
 
-static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
-    LLVMTargetRef target_ref;
-    char *err_msg = nullptr;
-    char triple_string[128];
-    sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
-    return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
-}
-
-static int print_target_list(FILE *f) {
-    ZigTarget native;
-    get_native_target(&native);
-
-    fprintf(f, "Architectures:\n");
-    size_t arch_count = target_arch_count();
-    for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
-        ZigLLVM_ArchType arch = target_arch_enum(arch_i);
-        if (!arch_available_in_llvm(arch))
-            continue;
-        const char *arch_name = target_arch_name(arch);
-        SubArchList sub_arch_list = target_subarch_list(arch);
-        size_t sub_count = target_subarch_count(sub_arch_list);
-        const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
-        fprintf(f, "  %s%s\n", arch_name, arch_native_str);
-        for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
-            ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
-            const char *sub_name = target_subarch_name(sub);
-            const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
-            fprintf(f, "    %s%s\n", sub_name, sub_native_str);
-        }
-    }
-
-    fprintf(f, "\nOperating Systems:\n");
-    size_t os_count = target_os_count();
-    for (size_t i = 0; i < os_count; i += 1) {
-        Os os_type = target_os_enum(i);
-        const char *native_str = (native.os == os_type) ? " (native)" : "";
-        fprintf(f, "  %s%s\n", target_os_name(os_type), native_str);
-    }
-
-    fprintf(f, "\nC ABIs:\n");
-    size_t abi_count = target_abi_count();
-    for (size_t i = 0; i < abi_count; i += 1) {
-        ZigLLVM_EnvironmentType abi = target_abi_enum(i);
-        const char *native_str = (native.abi == abi) ? " (native)" : "";
-        fprintf(f, "  %s%s\n", target_abi_name(abi), native_str);
-    }
-
-    fprintf(f, "\nAvailable libcs:\n");
-    size_t libc_count = target_libc_count();
-    for (size_t i = 0; i < libc_count; i += 1) {
-        ZigTarget libc_target;
-        target_libc_enum(i, &libc_target);
-        bool is_native = native.arch == libc_target.arch &&
-            native.os == libc_target.os &&
-            native.abi == libc_target.abi;
-        const char *native_str = is_native ? " (native)" : "";
-        fprintf(f, "  %s-%s-%s%s\n", target_arch_name(libc_target.arch),
-                target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
-    }
-
-    fprintf(f, "\nAvailable glibc versions:\n");
-    ZigGLibCAbi *glibc_abi;
-    Error err;
-    if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
-        return EXIT_FAILURE;
-    }
-    for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
-        ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
-        bool is_native = native.glibc_version != nullptr &&
-            native.glibc_version->major == this_ver->major &&
-            native.glibc_version->minor == this_ver->minor &&
-            native.glibc_version->patch == this_ver->patch;
-        const char *native_str = is_native ? " (native)" : "";
-        if (this_ver->patch == 0) {
-            fprintf(f, "  %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
-        } else {
-            fprintf(f, "  %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
-        }
-    }
-    return EXIT_SUCCESS;
-}
-
 enum Cmd {
     CmdNone,
     CmdBuild,
@@ -538,10 +451,6 @@ int main(int argc, char **argv) {
     const char *cpu = nullptr;
     const char *features = nullptr;
 
-    const char *targets_list_features_arch = nullptr;
-    const char *targets_list_cpus_arch = nullptr;
-    bool targets_show_dependencies = false;
-
     ZigList<const char *> llvm_argv = {0};
     llvm_argv.append("zig (LLVM option parsing)");
 
@@ -792,8 +701,6 @@ int main(int argc, char **argv) {
                 cur_pkg = cur_pkg->parent;
             } else if (strcmp(arg, "-ffunction-sections") == 0) {
                 function_sections = true;
-            } else if (strcmp(arg, "--show-dependencies") == 0) {
-                targets_show_dependencies = true;
             } else if (i + 1 >= argc) {
                 fprintf(stderr, "Expected another argument after %s\n", arg);
                 return print_error_usage(arg0);
@@ -951,10 +858,6 @@ int main(int argc, char **argv) {
                             , argv[i]);
                         return EXIT_FAILURE;
                     }
-                } else if (strcmp(arg, "--list-features") == 0) {
-                    targets_list_features_arch = argv[i];
-                } else if (strcmp(arg, "--list-cpus") == 0) {
-                    targets_list_cpus_arch = argv[i];
                 } else if (strcmp(arg, "-target-cpu") == 0) {
                     cpu = argv[i];
                 } else if (strcmp(arg, "-target-feature") == 0) {
@@ -1468,21 +1371,7 @@ int main(int argc, char **argv) {
         return main_exit(root_progress_node, EXIT_SUCCESS);
     }
     case CmdTargets:
-        if (targets_list_features_arch != nullptr) {
-            stage2_list_features_for_arch(
-                targets_list_features_arch,
-                strlen(targets_list_features_arch),
-                targets_show_dependencies);
-            return 0;
-        } else if (targets_list_cpus_arch != nullptr) {
-            stage2_list_cpus_for_arch(
-                targets_list_cpus_arch,
-                strlen(targets_list_cpus_arch),
-                targets_show_dependencies);
-            return 0;
-        } else {
-            return print_target_list(stdout);
-        }
+        return stage2_cmd_targets();
     case CmdNone:
         return print_full_usage(arg0, stderr, EXIT_FAILURE);
     }
diff --git a/src/userland.cpp b/src/userland.cpp
index 93944f0089c5d7f9c4d440b9183827b6a3325b97..22d2daa8e43512c955e015f16cd8926601d23a68 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -89,16 +89,6 @@ void stage2_progress_complete_one(Stage2ProgressNode *node) {}
 void stage2_progress_disable_tty(Stage2Progress *progress) {}
 void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
 
-void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
-    const char *msg = "stage0 called stage2_list_features_for_arch";
-    stage2_panic(msg, strlen(msg));
-}
-
-void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {
-    const char *msg = "stage0 called stage2_list_cpus_for_arch";
-    stage2_panic(msg, strlen(msg));
-}
-
 struct Stage2CpuFeatures {
     const char *llvm_cpu_name;
     const char *llvm_cpu_features;
@@ -150,3 +140,8 @@ void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
     *ptr = cpu_features->builtin_str;
     *len = strlen(cpu_features->builtin_str);
 }
+
+int stage2_cmd_targets(void) {
+    const char *msg = "stage0 called stage2_cmd_targets";
+    stage2_panic(msg, strlen(msg));
+}
diff --git a/src/userland.h b/src/userland.h
index 1fd40039a658a3c751c96e008c605ffa288095dc..052321a718f8c9d8e8c8ffe669c7662551f34ba1 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -78,6 +78,11 @@ enum Error {
     ErrorNotLazy,
     ErrorIsAsync,
     ErrorImportOutsidePkgPath,
+    ErrorUnknownCpu,
+    ErrorUnknownSubArchitecture,
+    ErrorUnknownCpuFeature,
+    ErrorInvalidCpuFeatures,
+    ErrorInvalidLlvmCpuFeaturesFormat,
 };
 
 // ABI warning
@@ -174,12 +179,6 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
 ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
         size_t completed_count, size_t estimated_total_items);
 
-// ABI warning
-ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
-
-// ABI warning
-ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures);
-
 // ABI warning
 struct Stage2CpuFeatures;
 
@@ -212,4 +211,8 @@ ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeat
 ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len);
 
+// ABI warning
+ZIG_EXTERN_C int stage2_cmd_targets(void);
+
+
 #endif
-- 
2.54.0


From 65013d8599abdcec5344cd918f5a1c0e5a9ca136 Mon Sep 17 00:00:00 2001
From: daurnimator <quae@daurnimator.com>
Date: Sat, 11 Jan 2020 00:08:54 +1100
Subject: [PATCH 063/116] std: fix bug in http.headers where .put captures
 user-held variable

---
 lib/std/http/headers.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/std/http/headers.zig b/lib/std/http/headers.zig
index b1d047aeecf491a13715eb160786cba024bd7476..dfe53fe7501a9e0f7e203bb1594e8cd3eeb25aeb 100644
--- a/lib/std/http/headers.zig
+++ b/lib/std/http/headers.zig
@@ -172,7 +172,7 @@ pub const Headers = struct {
             var dex = HeaderIndexList.init(self.allocator);
             try dex.append(n - 1);
             errdefer dex.deinit();
-            _ = try self.index.put(name, dex);
+            _ = try self.index.put(name_dup, dex);
         }
         self.data.appendAssumeCapacity(entry);
     }
-- 
2.54.0


From 5cc49324611a78b9fad5376bae39aa2e38f98ea8 Mon Sep 17 00:00:00 2001
From: daurnimator <quae@daurnimator.com>
Date: Sat, 11 Jan 2020 00:09:29 +1100
Subject: [PATCH 064/116] std: allocator interface sets freed memory to
 undefined

---
 lib/std/mem.zig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/std/mem.zig b/lib/std/mem.zig
index f7b2bf261d1d52b31b2068ce4d366ca832f438b0..46f23c84fe802d7c81f9791884a0f7ee722bea2b 100644
--- a/lib/std/mem.zig
+++ b/lib/std/mem.zig
@@ -175,6 +175,7 @@ pub const Allocator = struct {
 
         const old_byte_slice = @sliceToBytes(old_mem);
         const byte_count = math.mul(usize, @sizeOf(T), new_n) catch return Error.OutOfMemory;
+        // Note: can't set shrunk memory to undefined as memory shouldn't be modified on realloc failure
         const byte_slice = try self.reallocFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
         assert(byte_slice.len == byte_count);
         if (new_n > old_mem.len) {
@@ -221,6 +222,7 @@ pub const Allocator = struct {
         const byte_count = @sizeOf(T) * new_n;
 
         const old_byte_slice = @sliceToBytes(old_mem);
+        @memset(old_byte_slice.ptr + byte_count, undefined, old_byte_slice.len - byte_count);
         const byte_slice = self.shrinkFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
         assert(byte_slice.len == byte_count);
         return @bytesToSlice(T, @alignCast(new_alignment, byte_slice));
@@ -234,6 +236,7 @@ pub const Allocator = struct {
         const bytes_len = bytes.len + @boolToInt(Slice.sentinel != null);
         if (bytes_len == 0) return;
         const non_const_ptr = @intToPtr([*]u8, @ptrToInt(bytes.ptr));
+        @memset(non_const_ptr, undefined, bytes_len);
         const shrink_result = self.shrinkFn(self, non_const_ptr[0..bytes_len], Slice.alignment, 0, 1);
         assert(shrink_result.len == 0);
     }
-- 
2.54.0


From 0000de4fee601047f662dc33fe890eb8831d9787 Mon Sep 17 00:00:00 2001
From: Nathan Michaels <nathan@nmichaels.org>
Date: Mon, 20 Jan 2020 12:23:43 -0500
Subject: [PATCH 065/116] Handle {s} format for C strings. (#4219)

* Handle {s} format for C strings.

* Fix "cstr" test to actually use c strings.
---
 lib/std/fmt.zig | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/lib/std/fmt.zig b/lib/std/fmt.zig
index 548ef8ccce4eb635af1204a590a6197951f429f2..5a650c3b10cb147d352f6c820938cefceff02936 100644
--- a/lib/std/fmt.zig
+++ b/lib/std/fmt.zig
@@ -431,7 +431,7 @@ pub fn formatType(
                 },
                 else => return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) }),
             },
-            .Many => {
+            .Many, .C => {
                 if (ptr_info.child == u8) {
                     if (fmt.len > 0 and fmt[0] == 's') {
                         const len = mem.len(u8, value);
@@ -449,9 +449,6 @@ pub fn formatType(
                 }
                 return format(context, Errors, output, "{}@{x}", .{ @typeName(ptr_info.child), @ptrToInt(value.ptr) });
             },
-            .C => {
-                return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) });
-            },
         },
         .Array => |info| {
             const Slice = @Type(builtin.TypeInfo{
@@ -1285,8 +1282,16 @@ test "pointer" {
 }
 
 test "cstr" {
-    try testFmt("cstr: Test C\n", "cstr: {s}\n", .{"Test C"});
-    try testFmt("cstr: Test C    \n", "cstr: {s:10}\n", .{"Test C"});
+    try testFmt(
+        "cstr: Test C\n",
+        "cstr: {s}\n",
+        .{@ptrCast([*c]const u8, "Test C")},
+    );
+    try testFmt(
+        "cstr: Test C    \n",
+        "cstr: {s:10}\n",
+        .{@ptrCast([*c]const u8, "Test C")},
+    );
 }
 
 test "filesize" {
-- 
2.54.0


From c522699f28c1df806865c527a7a68a875e606527 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Mon, 20 Jan 2020 16:27:18 +0100
Subject: [PATCH 066/116] Fix ICE in build addAssemblyFile

---
 lib/std/build.zig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index ad4be9e4ca3c252424b4257cd46aaa80ea476a27..53f8f19df5e52b0eaff2bc421fc11cb622cb9be1 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1687,7 +1687,9 @@ pub const LibExeObjStep = struct {
     }
 
     pub fn addAssemblyFile(self: *LibExeObjStep, path: []const u8) void {
-        self.link_objects.append(LinkObject{ .AssemblyFile = self.builder.dupe(path) }) catch unreachable;
+        self.link_objects.append(LinkObject{
+            .AssemblyFile = .{ .path = self.builder.dupe(path) },
+        }) catch unreachable;
     }
 
     pub fn addAssemblyFileFromWriteFileStep(self: *LibExeObjStep, wfs: *WriteFileStep, basename: []const u8) void {
-- 
2.54.0


From bf82929557f0b116979261c522c62cf6393a08f2 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 12:41:18 -0500
Subject: [PATCH 067/116] fix std.Target.Arch.parseCpuFeatureSet

---
 lib/std/target.zig         | 62 +++++++++++++++++++++++++-------------
 src-self-hosted/stage1.zig |  2 +-
 2 files changed, 42 insertions(+), 22 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 2f3e740c9016d6054f8abd8e8229696556a43587..8d809b1ce8c2a97e3418313a7d18bdf716018199 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -228,30 +228,40 @@ pub const Target = union(enum) {
 
             var it = mem.tokenize(features_text, ",");
             while (it.next()) |item_text| {
-                const feature_name = blk: {
-                    if (mem.startsWith(u8, item_text, "+")) {
-                        switch (mode) {
-                            .unknown, .baseline => mode = .baseline,
-                            .whitelist => return error.InvalidCpuFeatures,
-                        }
-                        break :blk item_text[1..];
-                    } else if (mem.startsWith(u8, item_text, "-")) {
-                        switch (mode) {
-                            .unknown, .baseline => mode = .baseline,
-                            .whitelist => return error.InvalidCpuFeatures,
-                        }
-                        break :blk item_text[1..];
-                    } else {
-                        switch (mode) {
-                            .unknown, .whitelist => mode = .whitelist,
-                            .baseline => return error.InvalidCpuFeatures,
-                        }
-                        break :blk item_text;
+                var feature_name: []const u8 = undefined;
+                var op: enum {
+                    add,
+                    sub,
+                } = undefined;
+                if (mem.startsWith(u8, item_text, "+")) {
+                    switch (mode) {
+                        .unknown, .baseline => mode = .baseline,
+                        .whitelist => return error.InvalidCpuFeatures,
                     }
-                };
+                    op = .add;
+                    feature_name = item_text[1..];
+                } else if (mem.startsWith(u8, item_text, "-")) {
+                    switch (mode) {
+                        .unknown, .baseline => mode = .baseline,
+                        .whitelist => return error.InvalidCpuFeatures,
+                    }
+                    op = .sub;
+                    feature_name = item_text[1..];
+                } else {
+                    switch (mode) {
+                        .unknown, .whitelist => mode = .whitelist,
+                        .baseline => return error.InvalidCpuFeatures,
+                    }
+                    op = .add;
+                    feature_name = item_text;
+                }
                 for (arch.allFeaturesList()) |feature, index| {
                     if (mem.eql(u8, feature_name, feature.name)) {
-                        set |= @splat(2, @as(Cpu.Feature.Set, 1) << @intCast(u7, index));
+                        const one_bit = @as(Cpu.Feature.Set, 1) << @intCast(u7, index);
+                        switch (op) {
+                            .add => set |= @splat(2, one_bit),
+                            .sub => set &= @splat(2, ~one_bit),
+                        }
                         break;
                     }
                 } else {
@@ -1050,3 +1060,13 @@ pub const Target = union(enum) {
         return .unavailable;
     }
 };
+
+test "parseCpuFeatureSet" {
+    const set = try @as(Target.Arch, .x86_64).parseCpuFeatureSet("-sse,-avx,-cx8");
+    std.testing.expect(!Target.x86.featureSetHas(set, .sse));
+    std.testing.expect(!Target.x86.featureSetHas(set, .avx));
+    std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
+    // These are expected because they are part of the baseline
+    std.testing.expect(Target.x86.featureSetHas(set, .cmov));
+    std.testing.expect(Target.x86.featureSetHas(set, .fxsr));
+}
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 9ce4746950b25ebfb43367600372c37ed96b1f6b..a640bfb2deb6c6d3067a638ce5124a1ac53bfe1a 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -617,7 +617,7 @@ const Stage2CpuFeatures = struct {
                 if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                     switch (op) {
                         .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
-                        .sub => set &= ~@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
+                        .sub => set &= ~(@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index)),
                     }
                     break;
                 }
-- 
2.54.0


From f3dd9bbdaca5ba3735feb405a890a4646905533a Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 13:40:25 -0500
Subject: [PATCH 068/116] improve `zig targets`

---
 BRANCH_TODO                       |  10 +--
 lib/std/builtin.zig               |   4 +-
 lib/std/target.zig                |  29 +++++----
 src-self-hosted/main.zig          |  44 +------------
 src-self-hosted/print_targets.zig | 101 ++++++++++++++++++++++++++++++
 src-self-hosted/stage1.zig        |   8 ++-
 src/ir.cpp                        |   6 +-
 7 files changed, 135 insertions(+), 67 deletions(-)
 create mode 100644 src-self-hosted/print_targets.zig

diff --git a/BRANCH_TODO b/BRANCH_TODO
index 4dfc95f7067d35777a95737576eea7191e168570..2e92089e3a5df81634e89eef7b9a45175421d923 100644
--- a/BRANCH_TODO
+++ b/BRANCH_TODO
@@ -1,12 +1,8 @@
 Finish these thigns before merging teh branch
 
- * it gets the wrong answers with `-target-feature -sse,-avx`
-
+ * zig targets
+   - use non-reflection based cpu detection?
  * finish refactoring target/arch/*
- * `zig builtin` integration 
- * move target details to better location
- * +foo,-bar vs foo,bar
- * baseline features
 
 
 const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
@@ -38,5 +34,3 @@ const i386_default_features_freestanding: []*const std.target.Feature = &[_]*con
     &std.target.x86.feature_slowUnalignedMem16,
     &std.target.x86.feature_x87,
 };
-
-
diff --git a/lib/std/builtin.zig b/lib/std/builtin.zig
index b5c137c2e18579ddac51435202fab889df783707..17918f3f73fee7a12b9abee4ad4073cb563f2a2e 100644
--- a/lib/std/builtin.zig
+++ b/lib/std/builtin.zig
@@ -18,8 +18,8 @@ pub const ObjectFormat = std.Target.ObjectFormat;
 /// Deprecated: use `std.Target.SubSystem`.
 pub const SubSystem = std.Target.SubSystem;
 
-/// Deprecated: use `std.Target.Cross.CpuFeatures`.
-pub const CpuFeatures = std.Target.Cross.CpuFeatures;
+/// Deprecated: use `std.Target.CpuFeatures`.
+pub const CpuFeatures = std.Target.CpuFeatures;
 
 /// Deprecated: use `std.Target.Cpu`.
 pub const Cpu = std.Target.Cpu;
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 8d809b1ce8c2a97e3418313a7d18bdf716018199..d49d395dda5186cd9f33264a96cd18182f603154 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -569,18 +569,18 @@ pub const Target = union(enum) {
         os: Os,
         abi: Abi,
         cpu_features: CpuFeatures = .baseline,
+    };
 
-        pub const CpuFeatures = union(enum) {
-            /// The "default" set of CPU features for cross-compiling. A conservative set
-            /// of features that is expected to be supported on most available hardware.
-            baseline,
+    pub const CpuFeatures = union(enum) {
+        /// The "default" set of CPU features for cross-compiling. A conservative set
+        /// of features that is expected to be supported on most available hardware.
+        baseline,
 
-            /// Target one specific CPU.
-            cpu: *const Cpu,
+        /// Target one specific CPU.
+        cpu: *const Cpu,
 
-            /// Explicitly provide the entire CPU feature set.
-            features: Cpu.Feature.Set,
-        };
+        /// Explicitly provide the entire CPU feature set.
+        features: Cpu.Feature.Set,
     };
 
     pub const current = Target{
@@ -594,8 +594,15 @@ pub const Target = union(enum) {
 
     pub const stack_align = 16;
 
-    pub fn cpuFeatures(self: Target) []const *const Cpu.Feature {
-        return switch (self.cpu_features) {
+    pub fn getCpuFeatures(self: Target) CpuFeatures {
+        return switch (self) {
+            .Native => builtin.cpu_features,
+            .Cross => |cross| cross.cpu_features,
+        };
+    }
+
+    pub fn cpuFeaturesList(self: Target) []const *const Cpu.Feature {
+        return switch (self.getCpuFeatures()) {
             .baseline => self.arch.baselineFeatures(),
             .cpu => |cpu| cpu.features,
             .features => |features| features,
diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig
index e3faf853ea6f5cd0105c1f78b06afc3fa633e57b..5751b7983de020d3c83e04ab7345172f5f920fe6 100644
--- a/src-self-hosted/main.zig
+++ b/src-self-hosted/main.zig
@@ -79,7 +79,7 @@ pub fn main() !void {
     } else if (mem.eql(u8, cmd, "libc")) {
         return cmdLibC(allocator, cmd_args);
     } else if (mem.eql(u8, cmd, "targets")) {
-        return cmdTargets(allocator, cmd_args);
+        return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout);
     } else if (mem.eql(u8, cmd, "version")) {
         return cmdVersion(allocator, cmd_args);
     } else if (mem.eql(u8, cmd, "zen")) {
@@ -789,48 +789,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
     }
 }
 
-// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
-
-pub fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
-    try stdout.write("Architectures:\n");
-    {
-        comptime var i: usize = 0;
-        inline while (i < @memberCount(builtin.Arch)) : (i += 1) {
-            comptime const arch_tag = @memberName(builtin.Arch, i);
-            // NOTE: Cannot use empty string, see #918.
-            comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n";
-
-            try stdout.print("  {}{}", .{ arch_tag, native_str });
-        }
-    }
-    try stdout.write("\n");
-
-    try stdout.write("Operating Systems:\n");
-    {
-        comptime var i: usize = 0;
-        inline while (i < @memberCount(Target.Os)) : (i += 1) {
-            comptime const os_tag = @memberName(Target.Os, i);
-            // NOTE: Cannot use empty string, see #918.
-            comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n";
-
-            try stdout.print("  {}{}", .{ os_tag, native_str });
-        }
-    }
-    try stdout.write("\n");
-
-    try stdout.write("C ABIs:\n");
-    {
-        comptime var i: usize = 0;
-        inline while (i < @memberCount(Target.Abi)) : (i += 1) {
-            comptime const abi_tag = @memberName(Target.Abi, i);
-            // NOTE: Cannot use empty string, see #918.
-            comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n";
-
-            try stdout.print("  {}{}", .{ abi_tag, native_str });
-        }
-    }
-}
-
 fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {
     try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});
 }
diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig
new file mode 100644
index 0000000000000000000000000000000000000000..233b6c106d9a8b15b2ea810de93acaef2efb2f55
--- /dev/null
+++ b/src-self-hosted/print_targets.zig
@@ -0,0 +1,101 @@
+const std = @import("std");
+const fs = std.fs;
+const io = std.io;
+const mem = std.mem;
+const Allocator = mem.Allocator;
+const Target = std.Target;
+
+pub fn cmdTargets(
+    allocator: *Allocator,
+    args: []const []const u8,
+    stdout: *io.OutStream(fs.File.WriteError),
+) !void {
+    const BOS = io.BufferedOutStream(fs.File.WriteError);
+    var bos = BOS.init(stdout);
+    var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream);
+
+    try jws.beginObject();
+
+    try jws.objectField("arch");
+    try jws.beginObject();
+    {
+        inline for (@typeInfo(Target.Arch).Union.fields) |field| {
+            try jws.objectField(field.name);
+            if (field.field_type == void) {
+                try jws.emitNull();
+            } else {
+                try jws.emitString(@typeName(field.field_type));
+            }
+        }
+    }
+    try jws.endObject();
+
+    try jws.objectField("subArch");
+    try jws.beginObject();
+    const sub_arch_list = [_]type{
+        Target.Arch.Arm32,
+        Target.Arch.Arm64,
+        Target.Arch.Kalimba,
+        Target.Arch.Mips,
+    };
+    inline for (sub_arch_list) |SubArch| {
+        try jws.objectField(@typeName(SubArch));
+        try jws.beginArray();
+        inline for (@typeInfo(SubArch).Enum.fields) |field| {
+            try jws.arrayElem();
+            try jws.emitString(field.name);
+        }
+        try jws.endArray();
+    }
+    try jws.endObject();
+
+    try jws.objectField("os");
+    try jws.beginArray();
+    {
+        comptime var i: usize = 0;
+        inline while (i < @memberCount(Target.Os)) : (i += 1) {
+            const os_tag = @memberName(Target.Os, i);
+            try jws.arrayElem();
+            try jws.emitString(os_tag);
+        }
+    }
+    try jws.endArray();
+
+    try jws.objectField("abi");
+    try jws.beginArray();
+    {
+        comptime var i: usize = 0;
+        inline while (i < @memberCount(Target.Abi)) : (i += 1) {
+            const abi_tag = @memberName(Target.Abi, i);
+            try jws.arrayElem();
+            try jws.emitString(abi_tag);
+        }
+    }
+    try jws.endArray();
+
+    try jws.objectField("native");
+    try jws.beginObject();
+    {
+        const triple = try Target.current.zigTriple(allocator);
+        defer allocator.free(triple);
+        try jws.objectField("triple");
+        try jws.emitString(triple);
+    }
+    try jws.objectField("arch");
+    try jws.emitString(@tagName(Target.current.getArch()));
+    try jws.objectField("os");
+    try jws.emitString(@tagName(Target.current.getOs()));
+    try jws.objectField("abi");
+    try jws.emitString(@tagName(Target.current.getAbi()));
+    try jws.objectField("cpuName");
+    switch (Target.current.getCpuFeatures()) {
+        .baseline, .features => try jws.emitNull(),
+        .cpu => |cpu| try jws.emitString(cpu.name),
+    }
+    try jws.endObject();
+
+    try jws.endObject();
+
+    try bos.stream.writeByte('\n');
+    return bos.flush();
+}
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index a640bfb2deb6c6d3067a638ce5124a1ac53bfe1a..307e95332136d22201ab8c409133a091cfe90784 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -539,7 +539,11 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
 
 // ABI warning
 export fn stage2_cmd_targets() c_int {
-    self_hosted_main.cmdTargets(std.heap.c_allocator, &[0][]u8{}) catch |err| {
+    @import("print_targets.zig").cmdTargets(
+        std.heap.c_allocator,
+        &[0][]u8{},
+        &std.io.getStdOut().outStream().stream,
+    ) catch |err| {
         std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
         return -1;
     };
@@ -548,7 +552,7 @@ export fn stage2_cmd_targets() c_int {
 
 const Stage2CpuFeatures = struct {
     allocator: *mem.Allocator,
-    cpu_features: Target.Cross.CpuFeatures,
+    cpu_features: Target.CpuFeatures,
 
     llvm_cpu_name: ?[*:0]const u8,
     llvm_features_str: ?[*:0]const u8,
diff --git a/src/ir.cpp b/src/ir.cpp
index db1faac37c7eefa266b46819e231a0280ecf98ce..f983ce4bae3f8dd005d31e1fdfbf66f054c71818 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -22349,7 +22349,11 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
             return ira->codegen->invalid_instruction;
     }
 
-    assert(target->value->type->id == ZigTypeIdEnum);
+    if (target->value->type->id != ZigTypeIdEnum) {
+        ir_add_error(ira, target,
+            buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
+        return ira->codegen->invalid_instruction;
+    }
 
     if (target->value->type->data.enumeration.src_field_count == 1 &&
         !target->value->type->data.enumeration.non_exhaustive) {
-- 
2.54.0


From 6e88883edf8400b835f5d792b8aba54c8d4490f2 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 22:21:45 -0500
Subject: [PATCH 069/116] import data from llvm 9

---
 lib/std/target/aarch64.zig | 1356 ++++---
 lib/std/target/amdgpu.zig  | 3654 ++++++++----------
 lib/std/target/arm.zig     | 4969 +++++++++++++------------
 lib/std/target/avr.zig     | 7230 ++++++++++++------------------------
 lib/std/target/bpf.zig     |  134 +-
 lib/std/target/hexagon.zig |  537 ++-
 lib/std/target/mips.zig    | 1428 +++----
 lib/std/target/msp430.zig  |  126 +-
 lib/std/target/nvptx.zig   |  731 ++--
 lib/std/target/powerpc.zig | 2148 ++++++-----
 lib/std/target/riscv.zig   |  183 +-
 lib/std/target/sparc.zig   | 1015 ++---
 lib/std/target/systemz.zig | 1183 +++---
 lib/std/target/wasm.zig    |  239 +-
 lib/std/target/x86.zig     | 1636 ++++----
 15 files changed, 11895 insertions(+), 14674 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index f0238bf8f4a4eb6b87eedcc52176ac595e1114f6..4d547b74c11fdb03620454940ab431a4ec369455 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -2,21 +2,23 @@ const std = @import("../std.zig");
 const Cpu = std.Target.Cpu;
 
 pub const Feature = enum {
+    a35,
+    a53,
+    a55,
+    a57,
+    a72,
+    a73,
+    a75,
+    a76,
     aes,
-    am,
     aggressive_fma,
-    altnzcv,
     alternate_sextload_cvt_f32_pattern,
+    altnzcv,
+    am,
     arith_bcc_fusion,
     arith_cbz_fusion,
     balance_fp_ops,
     bti,
-    ccidx,
-    ccpp,
-    crc,
-    ccdp,
-    call_saved_x8,
-    call_saved_x9,
     call_saved_x10,
     call_saved_x11,
     call_saved_x12,
@@ -24,56 +26,60 @@ pub const Feature = enum {
     call_saved_x14,
     call_saved_x15,
     call_saved_x18,
+    call_saved_x8,
+    call_saved_x9,
+    ccdp,
+    ccidx,
+    ccpp,
     complxnum,
+    crc,
     crypto,
     custom_cheap_as_move,
-    dit,
+    cyclone,
     disable_latency_sched_heuristic,
+    dit,
     dotprod,
     exynos_cheap_as_move,
+    exynosm1,
+    exynosm2,
+    exynosm3,
+    exynosm4,
+    falkor,
     fmi,
-    fp16fml,
+    force_32bit_jump_tables,
     fp_armv8,
+    fp16fml,
     fptoint,
-    force_32bit_jump_tables,
     fullfp16,
-    fuse_aes,
     fuse_address,
+    fuse_aes,
     fuse_arith_logic,
-    fuse_csel,
     fuse_crypto_eor,
+    fuse_csel,
     fuse_literals,
     jsconv,
+    kryo,
     lor,
     lse,
     lsl_fast,
     mpam,
     mte,
     neon,
-    nv,
     no_neg_immediates,
+    nv,
     pa,
     pan,
     pan_rwv,
     perfmon,
-    use_postra_scheduler,
-    predres,
     predictable_select_expensive,
-    uaops,
+    predres,
+    rand,
     ras,
     rasv8_4,
     rcpc,
     rcpc_immo,
     rdm,
-    rand,
     reserve_x1,
-    reserve_x2,
-    reserve_x3,
-    reserve_x4,
-    reserve_x5,
-    reserve_x6,
-    reserve_x7,
-    reserve_x9,
     reserve_x10,
     reserve_x11,
     reserve_x12,
@@ -81,6 +87,7 @@ pub const Feature = enum {
     reserve_x14,
     reserve_x15,
     reserve_x18,
+    reserve_x2,
     reserve_x20,
     reserve_x21,
     reserve_x22,
@@ -90,31 +97,51 @@ pub const Feature = enum {
     reserve_x26,
     reserve_x27,
     reserve_x28,
+    reserve_x3,
+    reserve_x4,
+    reserve_x5,
+    reserve_x6,
+    reserve_x7,
+    reserve_x9,
+    saphira,
     sb,
     sel2,
     sha2,
     sha3,
+    slow_misaligned_128store,
+    slow_paired_128,
+    slow_strqro_store,
     sm4,
     spe,
+    specrestrict,
     ssbs,
+    strict_align,
     sve,
     sve2,
     sve2_aes,
     sve2_bitperm,
     sve2_sha3,
     sve2_sm4,
-    slow_misaligned_128store,
-    slow_paired_128,
-    slow_strqro_store,
-    specrestrict,
-    strict_align,
+    thunderx,
+    thunderx2t99,
+    thunderxt81,
+    thunderxt83,
+    thunderxt88,
     tlb_rmi,
-    tracev84,
-    use_aa,
     tpidr_el1,
     tpidr_el2,
     tpidr_el3,
+    tracev8_4,
+    tsv110,
+    uaops,
+    use_aa,
+    use_postra_scheduler,
     use_reciprocal_square_root,
+    v8_1a,
+    v8_2a,
+    v8_3a,
+    v8_4a,
+    v8_5a,
     vh,
     zcm,
     zcz,
@@ -129,22 +156,143 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.a35)] = .{
+        .index = @enumToInt(Feature.a35),
+        .name = @tagName(Feature.a35),
+        .llvm_name = "a35",
+        .description = "Cortex-A35 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a53)] = .{
+        .index = @enumToInt(Feature.a53),
+        .name = @tagName(Feature.a53),
+        .llvm_name = "a53",
+        .description = "Cortex-A53 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .use_aa,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.a55)] = .{
+        .index = @enumToInt(Feature.a55),
+        .name = @tagName(Feature.a55),
+        .llvm_name = "a55",
+        .description = "Cortex-A55 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.a57)] = .{
+        .index = @enumToInt(Feature.a57),
+        .name = @tagName(Feature.a57),
+        .llvm_name = "a57",
+        .description = "Cortex-A57 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_literals,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.a72)] = .{
+        .index = @enumToInt(Feature.a72),
+        .name = @tagName(Feature.a72),
+        .llvm_name = "a72",
+        .description = "Cortex-A72 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a73)] = .{
+        .index = @enumToInt(Feature.a73),
+        .name = @tagName(Feature.a73),
+        .llvm_name = "a73",
+        .description = "Cortex-A73 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a75)] = .{
+        .index = @enumToInt(Feature.a75),
+        .name = @tagName(Feature.a75),
+        .llvm_name = "a75",
+        .description = "Cortex-A75 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.a76)] = .{
+        .index = @enumToInt(Feature.a76),
+        .name = @tagName(Feature.a76),
+        .llvm_name = "a76",
+        .description = "Cortex-A76 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .neon,
+            .rcpc,
+            .ssbs,
+            .v8_2a,
+        }),
+    };
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
         .name = @tagName(Feature.aes),
         .llvm_name = "aes",
         .description = "Enable AES support",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .neon,
         }),
     };
-    result[@enumToInt(Feature.am)] = .{
-        .index = @enumToInt(Feature.am),
-        .name = @tagName(Feature.am),
-        .llvm_name = "am",
-        .description = "Enable v8.4-A Activity Monitors extension",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.aggressive_fma)] = .{
         .index = @enumToInt(Feature.aggressive_fma),
         .name = @tagName(Feature.aggressive_fma),
@@ -152,13 +300,6 @@ pub const all_features = blk: {
         .description = "Enable Aggressive FMA for floating-point.",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.altnzcv)] = .{
-        .index = @enumToInt(Feature.altnzcv),
-        .name = @tagName(Feature.altnzcv),
-        .llvm_name = "altnzcv",
-        .description = "Enable alternative NZCV format for floating point comparisons",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
         .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern),
         .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern),
@@ -166,6 +307,20 @@ pub const all_features = blk: {
         .description = "Use alternative pattern for sextload convert to f32",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.altnzcv)] = .{
+        .index = @enumToInt(Feature.altnzcv),
+        .name = @tagName(Feature.altnzcv),
+        .llvm_name = "altnzcv",
+        .description = "Enable alternative NZCV format for floating point comparisons",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.am)] = .{
+        .index = @enumToInt(Feature.am),
+        .name = @tagName(Feature.am),
+        .llvm_name = "am",
+        .description = "Enable v8.4-A Activity Monitors extension",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.arith_bcc_fusion)] = .{
         .index = @enumToInt(Feature.arith_bcc_fusion),
         .name = @tagName(Feature.arith_bcc_fusion),
@@ -194,48 +349,6 @@ pub const all_features = blk: {
         .description = "Enable Branch Target Identification",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.ccidx)] = .{
-        .index = @enumToInt(Feature.ccidx),
-        .name = @tagName(Feature.ccidx),
-        .llvm_name = "ccidx",
-        .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.ccpp)] = .{
-        .index = @enumToInt(Feature.ccpp),
-        .name = @tagName(Feature.ccpp),
-        .llvm_name = "ccpp",
-        .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.crc)] = .{
-        .index = @enumToInt(Feature.crc),
-        .name = @tagName(Feature.crc),
-        .llvm_name = "crc",
-        .description = "Enable ARMv8 CRC-32 checksum instructions",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.ccdp)] = .{
-        .index = @enumToInt(Feature.ccdp),
-        .name = @tagName(Feature.ccdp),
-        .llvm_name = "ccdp",
-        .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.call_saved_x8)] = .{
-        .index = @enumToInt(Feature.call_saved_x8),
-        .name = @tagName(Feature.call_saved_x8),
-        .llvm_name = "call-saved-x8",
-        .description = "Make X8 callee saved.",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.call_saved_x9)] = .{
-        .index = @enumToInt(Feature.call_saved_x9),
-        .name = @tagName(Feature.call_saved_x9),
-        .llvm_name = "call-saved-x9",
-        .description = "Make X9 callee saved.",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.call_saved_x10)] = .{
         .index = @enumToInt(Feature.call_saved_x10),
         .name = @tagName(Feature.call_saved_x10),
@@ -285,22 +398,66 @@ pub const all_features = blk: {
         .description = "Make X18 callee saved.",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.call_saved_x8)] = .{
+        .index = @enumToInt(Feature.call_saved_x8),
+        .name = @tagName(Feature.call_saved_x8),
+        .llvm_name = "call-saved-x8",
+        .description = "Make X8 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.call_saved_x9)] = .{
+        .index = @enumToInt(Feature.call_saved_x9),
+        .name = @tagName(Feature.call_saved_x9),
+        .llvm_name = "call-saved-x9",
+        .description = "Make X9 callee saved.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccdp)] = .{
+        .index = @enumToInt(Feature.ccdp),
+        .name = @tagName(Feature.ccdp),
+        .llvm_name = "ccdp",
+        .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccidx)] = .{
+        .index = @enumToInt(Feature.ccidx),
+        .name = @tagName(Feature.ccidx),
+        .llvm_name = "ccidx",
+        .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ccpp)] = .{
+        .index = @enumToInt(Feature.ccpp),
+        .name = @tagName(Feature.ccpp),
+        .llvm_name = "ccpp",
+        .description = "Enable v8.2 data Cache Clean to Point of Persistence",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.complxnum)] = .{
         .index = @enumToInt(Feature.complxnum),
         .name = @tagName(Feature.complxnum),
         .llvm_name = "complxnum",
         .description = "Enable v8.3-A Floating-point complex number support",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .neon,
         }),
     };
+    result[@enumToInt(Feature.crc)] = .{
+        .index = @enumToInt(Feature.crc),
+        .name = @tagName(Feature.crc),
+        .llvm_name = "crc",
+        .description = "Enable ARMv8 CRC-32 checksum instructions",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.crypto)] = .{
         .index = @enumToInt(Feature.crypto),
         .name = @tagName(Feature.crypto),
         .llvm_name = "crypto",
         .description = "Enable cryptographic instructions",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .aes,
+            .neon,
+            .sha2,
         }),
     };
     result[@enumToInt(Feature.custom_cheap_as_move)] = .{
@@ -310,12 +467,26 @@ pub const all_features = blk: {
         .description = "Use custom handling of cheap instructions",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.dit)] = .{
-        .index = @enumToInt(Feature.dit),
-        .name = @tagName(Feature.dit),
-        .llvm_name = "dit",
-        .description = "Enable v8.4-A Data Independent Timing instructions",
-        .dependencies = 0,
+    result[@enumToInt(Feature.cyclone)] = .{
+        .index = @enumToInt(Feature.cyclone),
+        .name = @tagName(Feature.cyclone),
+        .llvm_name = "cyclone",
+        .description = "Cyclone",
+        .dependencies = featureSet(&[_]Feature{
+            .alternate_sextload_cvt_f32_pattern,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_crypto_eor,
+            .neon,
+            .perfmon,
+            .zcm,
+            .zcz,
+            .zcz_fp_workaround,
+        }),
     };
     result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
         .index = @enumToInt(Feature.disable_latency_sched_heuristic),
@@ -324,6 +495,13 @@ pub const all_features = blk: {
         .description = "Disable latency scheduling heuristic",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.dit)] = .{
+        .index = @enumToInt(Feature.dit),
+        .name = @tagName(Feature.dit),
+        .llvm_name = "dit",
+        .description = "Enable v8.4-A Data Independent Timing instructions",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.dotprod)] = .{
         .index = @enumToInt(Feature.dotprod),
         .name = @tagName(Feature.dotprod),
@@ -340,6 +518,109 @@ pub const all_features = blk: {
             .custom_cheap_as_move,
         }),
     };
+    result[@enumToInt(Feature.exynosm1)] = .{
+        .index = @enumToInt(Feature.exynosm1),
+        .name = @tagName(Feature.exynosm1),
+        .llvm_name = "exynosm1",
+        .description = "Samsung Exynos-M1 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .use_reciprocal_square_root,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm2)] = .{
+        .index = @enumToInt(Feature.exynosm2),
+        .name = @tagName(Feature.exynosm2),
+        .llvm_name = "exynosm2",
+        .description = "Samsung Exynos-M2 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm3)] = .{
+        .index = @enumToInt(Feature.exynosm3),
+        .name = @tagName(Feature.exynosm3),
+        .llvm_name = "exynosm3",
+        .description = "Samsung Exynos-M3 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm4)] = .{
+        .index = @enumToInt(Feature.exynosm4),
+        .name = @tagName(Feature.exynosm4),
+        .llvm_name = "exynosm4",
+        .description = "Samsung Exynos-M4 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .dotprod,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fullfp16,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_arith_logic,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .use_postra_scheduler,
+            .v8_2a,
+            .zcz,
+        }),
+    };
+    result[@enumToInt(Feature.falkor)] = .{
+        .index = @enumToInt(Feature.falkor),
+        .name = @tagName(Feature.falkor),
+        .llvm_name = "falkor",
+        .description = "Qualcomm Falkor processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .rdm,
+            .slow_strqro_store,
+            .use_postra_scheduler,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.fmi)] = .{
         .index = @enumToInt(Feature.fmi),
         .name = @tagName(Feature.fmi),
@@ -347,14 +628,12 @@ pub const all_features = blk: {
         .description = "Enable v8.4-A Flag Manipulation Instructions",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.fp16fml)] = .{
-        .index = @enumToInt(Feature.fp16fml),
-        .name = @tagName(Feature.fp16fml),
-        .llvm_name = "fp16fml",
-        .description = "Enable FP16 FML instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
-        }),
+    result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
+        .index = @enumToInt(Feature.force_32bit_jump_tables),
+        .name = @tagName(Feature.force_32bit_jump_tables),
+        .llvm_name = "force-32bit-jump-tables",
+        .description = "Force jump table entries to be 32-bits wide except at MinSize",
+        .dependencies = 0,
     };
     result[@enumToInt(Feature.fp_armv8)] = .{
         .index = @enumToInt(Feature.fp_armv8),
@@ -363,6 +642,15 @@ pub const all_features = blk: {
         .description = "Enable ARMv8 FP",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.fp16fml)] = .{
+        .index = @enumToInt(Feature.fp16fml),
+        .name = @tagName(Feature.fp16fml),
+        .llvm_name = "fp16fml",
+        .description = "Enable FP16 FML instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fullfp16,
+        }),
+    };
     result[@enumToInt(Feature.fptoint)] = .{
         .index = @enumToInt(Feature.fptoint),
         .name = @tagName(Feature.fptoint),
@@ -370,13 +658,6 @@ pub const all_features = blk: {
         .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
-        .index = @enumToInt(Feature.force_32bit_jump_tables),
-        .name = @tagName(Feature.force_32bit_jump_tables),
-        .llvm_name = "force-32bit-jump-tables",
-        .description = "Force jump table entries to be 32-bits wide except at MinSize",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.fullfp16)] = .{
         .index = @enumToInt(Feature.fullfp16),
         .name = @tagName(Feature.fullfp16),
@@ -386,13 +667,6 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
-    result[@enumToInt(Feature.fuse_aes)] = .{
-        .index = @enumToInt(Feature.fuse_aes),
-        .name = @tagName(Feature.fuse_aes),
-        .llvm_name = "fuse-aes",
-        .description = "CPU fuses AES crypto operations",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.fuse_address)] = .{
         .index = @enumToInt(Feature.fuse_address),
         .name = @tagName(Feature.fuse_address),
@@ -400,6 +674,13 @@ pub const all_features = blk: {
         .description = "CPU fuses address generation and memory operations",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.fuse_aes)] = .{
+        .index = @enumToInt(Feature.fuse_aes),
+        .name = @tagName(Feature.fuse_aes),
+        .llvm_name = "fuse-aes",
+        .description = "CPU fuses AES crypto operations",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.fuse_arith_logic)] = .{
         .index = @enumToInt(Feature.fuse_arith_logic),
         .name = @tagName(Feature.fuse_arith_logic),
@@ -407,13 +688,6 @@ pub const all_features = blk: {
         .description = "CPU fuses arithmetic and logic operations",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.fuse_csel)] = .{
-        .index = @enumToInt(Feature.fuse_csel),
-        .name = @tagName(Feature.fuse_csel),
-        .llvm_name = "fuse-csel",
-        .description = "CPU fuses conditional select operations",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.fuse_crypto_eor)] = .{
         .index = @enumToInt(Feature.fuse_crypto_eor),
         .name = @tagName(Feature.fuse_crypto_eor),
@@ -421,6 +695,13 @@ pub const all_features = blk: {
         .description = "CPU fuses AES/PMULL and EOR operations",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.fuse_csel)] = .{
+        .index = @enumToInt(Feature.fuse_csel),
+        .name = @tagName(Feature.fuse_csel),
+        .llvm_name = "fuse-csel",
+        .description = "CPU fuses conditional select operations",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.fuse_literals)] = .{
         .index = @enumToInt(Feature.fuse_literals),
         .name = @tagName(Feature.fuse_literals),
@@ -437,6 +718,24 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
+    result[@enumToInt(Feature.kryo)] = .{
+        .index = @enumToInt(Feature.kryo),
+        .name = @tagName(Feature.kryo),
+        .llvm_name = "kryo",
+        .description = "Qualcomm Kryo processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.lor)] = .{
         .index = @enumToInt(Feature.lor),
         .name = @tagName(Feature.lor),
@@ -481,13 +780,6 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
-    result[@enumToInt(Feature.nv)] = .{
-        .index = @enumToInt(Feature.nv),
-        .name = @tagName(Feature.nv),
-        .llvm_name = "nv",
-        .description = "Enable v8.4-A Nested Virtualization Enchancement",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
         .index = @enumToInt(Feature.no_neg_immediates),
         .name = @tagName(Feature.no_neg_immediates),
@@ -495,6 +787,13 @@ pub const all_features = blk: {
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.nv)] = .{
+        .index = @enumToInt(Feature.nv),
+        .name = @tagName(Feature.nv),
+        .llvm_name = "nv",
+        .description = "Enable v8.4-A Nested Virtualization Enchancement",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.pa)] = .{
         .index = @enumToInt(Feature.pa),
         .name = @tagName(Feature.pa),
@@ -525,20 +824,6 @@ pub const all_features = blk: {
         .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.use_postra_scheduler)] = .{
-        .index = @enumToInt(Feature.use_postra_scheduler),
-        .name = @tagName(Feature.use_postra_scheduler),
-        .llvm_name = "use-postra-scheduler",
-        .description = "Schedule again after register allocation",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.predres)] = .{
-        .index = @enumToInt(Feature.predres),
-        .name = @tagName(Feature.predres),
-        .llvm_name = "predres",
-        .description = "Enable v8.5a execution and data prediction invalidation instructions",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.predictable_select_expensive)] = .{
         .index = @enumToInt(Feature.predictable_select_expensive),
         .name = @tagName(Feature.predictable_select_expensive),
@@ -546,11 +831,18 @@ pub const all_features = blk: {
         .description = "Prefer likely predicted branches over selects",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.uaops)] = .{
-        .index = @enumToInt(Feature.uaops),
-        .name = @tagName(Feature.uaops),
-        .llvm_name = "uaops",
-        .description = "Enable v8.2 UAO PState",
+    result[@enumToInt(Feature.predres)] = .{
+        .index = @enumToInt(Feature.predres),
+        .name = @tagName(Feature.predres),
+        .llvm_name = "predres",
+        .description = "Enable v8.5a execution and data prediction invalidation instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rand)] = .{
+        .index = @enumToInt(Feature.rand),
+        .name = @tagName(Feature.rand),
+        .llvm_name = "rand",
+        .description = "Enable Random Number generation instructions",
         .dependencies = 0,
     };
     result[@enumToInt(Feature.ras)] = .{
@@ -592,13 +884,6 @@ pub const all_features = blk: {
         .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.rand)] = .{
-        .index = @enumToInt(Feature.rand),
-        .name = @tagName(Feature.rand),
-        .llvm_name = "rand",
-        .description = "Enable Random Number generation instructions",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.reserve_x1)] = .{
         .index = @enumToInt(Feature.reserve_x1),
         .name = @tagName(Feature.reserve_x1),
@@ -606,55 +891,6 @@ pub const all_features = blk: {
         .description = "Reserve X1, making it unavailable as a GPR",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.reserve_x2)] = .{
-        .index = @enumToInt(Feature.reserve_x2),
-        .name = @tagName(Feature.reserve_x2),
-        .llvm_name = "reserve-x2",
-        .description = "Reserve X2, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x3)] = .{
-        .index = @enumToInt(Feature.reserve_x3),
-        .name = @tagName(Feature.reserve_x3),
-        .llvm_name = "reserve-x3",
-        .description = "Reserve X3, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x4)] = .{
-        .index = @enumToInt(Feature.reserve_x4),
-        .name = @tagName(Feature.reserve_x4),
-        .llvm_name = "reserve-x4",
-        .description = "Reserve X4, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x5)] = .{
-        .index = @enumToInt(Feature.reserve_x5),
-        .name = @tagName(Feature.reserve_x5),
-        .llvm_name = "reserve-x5",
-        .description = "Reserve X5, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x6)] = .{
-        .index = @enumToInt(Feature.reserve_x6),
-        .name = @tagName(Feature.reserve_x6),
-        .llvm_name = "reserve-x6",
-        .description = "Reserve X6, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x7)] = .{
-        .index = @enumToInt(Feature.reserve_x7),
-        .name = @tagName(Feature.reserve_x7),
-        .llvm_name = "reserve-x7",
-        .description = "Reserve X7, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.reserve_x9)] = .{
-        .index = @enumToInt(Feature.reserve_x9),
-        .name = @tagName(Feature.reserve_x9),
-        .llvm_name = "reserve-x9",
-        .description = "Reserve X9, making it unavailable as a GPR",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.reserve_x10)] = .{
         .index = @enumToInt(Feature.reserve_x10),
         .name = @tagName(Feature.reserve_x10),
@@ -704,6 +940,13 @@ pub const all_features = blk: {
         .description = "Reserve X18, making it unavailable as a GPR",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.reserve_x2)] = .{
+        .index = @enumToInt(Feature.reserve_x2),
+        .name = @tagName(Feature.reserve_x2),
+        .llvm_name = "reserve-x2",
+        .description = "Reserve X2, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.reserve_x20)] = .{
         .index = @enumToInt(Feature.reserve_x20),
         .name = @tagName(Feature.reserve_x20),
@@ -767,6 +1010,67 @@ pub const all_features = blk: {
         .description = "Reserve X28, making it unavailable as a GPR",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.reserve_x3)] = .{
+        .index = @enumToInt(Feature.reserve_x3),
+        .name = @tagName(Feature.reserve_x3),
+        .llvm_name = "reserve-x3",
+        .description = "Reserve X3, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x4)] = .{
+        .index = @enumToInt(Feature.reserve_x4),
+        .name = @tagName(Feature.reserve_x4),
+        .llvm_name = "reserve-x4",
+        .description = "Reserve X4, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x5)] = .{
+        .index = @enumToInt(Feature.reserve_x5),
+        .name = @tagName(Feature.reserve_x5),
+        .llvm_name = "reserve-x5",
+        .description = "Reserve X5, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x6)] = .{
+        .index = @enumToInt(Feature.reserve_x6),
+        .name = @tagName(Feature.reserve_x6),
+        .llvm_name = "reserve-x6",
+        .description = "Reserve X6, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x7)] = .{
+        .index = @enumToInt(Feature.reserve_x7),
+        .name = @tagName(Feature.reserve_x7),
+        .llvm_name = "reserve-x7",
+        .description = "Reserve X7, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_x9)] = .{
+        .index = @enumToInt(Feature.reserve_x9),
+        .name = @tagName(Feature.reserve_x9),
+        .llvm_name = "reserve-x9",
+        .description = "Reserve X9, making it unavailable as a GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.saphira)] = .{
+        .index = @enumToInt(Feature.saphira),
+        .name = @tagName(Feature.saphira),
+        .llvm_name = "saphira",
+        .description = "Qualcomm Saphira processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .spe,
+            .use_postra_scheduler,
+            .v8_4a,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.sb)] = .{
         .index = @enumToInt(Feature.sb),
         .name = @tagName(Feature.sb),
@@ -787,7 +1091,7 @@ pub const all_features = blk: {
         .llvm_name = "sha2",
         .description = "Enable SHA1 and SHA256 support",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .neon,
         }),
     };
     result[@enumToInt(Feature.sha3)] = .{
@@ -796,16 +1100,38 @@ pub const all_features = blk: {
         .llvm_name = "sha3",
         .description = "Enable SHA512 and SHA3 support",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .neon,
+            .sha2,
         }),
     };
+    result[@enumToInt(Feature.slow_misaligned_128store)] = .{
+        .index = @enumToInt(Feature.slow_misaligned_128store),
+        .name = @tagName(Feature.slow_misaligned_128store),
+        .llvm_name = "slow-misaligned-128store",
+        .description = "Misaligned 128 bit stores are slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_paired_128)] = .{
+        .index = @enumToInt(Feature.slow_paired_128),
+        .name = @tagName(Feature.slow_paired_128),
+        .llvm_name = "slow-paired-128",
+        .description = "Paired 128 bit loads and stores are slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_strqro_store)] = .{
+        .index = @enumToInt(Feature.slow_strqro_store),
+        .name = @tagName(Feature.slow_strqro_store),
+        .llvm_name = "slow-strqro-store",
+        .description = "STR of Q register with register offset is slow",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.sm4)] = .{
         .index = @enumToInt(Feature.sm4),
         .name = @tagName(Feature.sm4),
         .llvm_name = "sm4",
         .description = "Enable SM3 and SM4 support",
         .dependencies = featureSet(&[_]Feature{
-            .fp_armv8,
+            .neon,
         }),
     };
     result[@enumToInt(Feature.spe)] = .{
@@ -815,6 +1141,13 @@ pub const all_features = blk: {
         .description = "Enable Statistical Profiling extension",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.specrestrict)] = .{
+        .index = @enumToInt(Feature.specrestrict),
+        .name = @tagName(Feature.specrestrict),
+        .llvm_name = "specrestrict",
+        .description = "Enable architectural speculation restriction",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.ssbs)] = .{
         .index = @enumToInt(Feature.ssbs),
         .name = @tagName(Feature.ssbs),
@@ -822,6 +1155,13 @@ pub const all_features = blk: {
         .description = "Enable Speculative Store Bypass Safe bit",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.strict_align)] = .{
+        .index = @enumToInt(Feature.strict_align),
+        .name = @tagName(Feature.strict_align),
+        .llvm_name = "strict-align",
+        .description = "Disallow all unaligned memory access",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.sve)] = .{
         .index = @enumToInt(Feature.sve),
         .name = @tagName(Feature.sve),
@@ -844,8 +1184,8 @@ pub const all_features = blk: {
         .llvm_name = "sve2-aes",
         .description = "Enable AES SVE2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sve,
-            .fp_armv8,
+            .aes,
+            .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_bitperm)] = .{
@@ -854,7 +1194,7 @@ pub const all_features = blk: {
         .llvm_name = "sve2-bitperm",
         .description = "Enable bit permutation SVE2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sve,
+            .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_sha3)] = .{
@@ -863,8 +1203,8 @@ pub const all_features = blk: {
         .llvm_name = "sve2-sha3",
         .description = "Enable SHA3 SVE2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sve,
-            .fp_armv8,
+            .sha3,
+            .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_sm4)] = .{
@@ -873,44 +1213,87 @@ pub const all_features = blk: {
         .llvm_name = "sve2-sm4",
         .description = "Enable SM4 SVE2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sve,
-            .fp_armv8,
+            .sm4,
+            .sve2,
         }),
     };
-    result[@enumToInt(Feature.slow_misaligned_128store)] = .{
-        .index = @enumToInt(Feature.slow_misaligned_128store),
-        .name = @tagName(Feature.slow_misaligned_128store),
-        .llvm_name = "slow-misaligned-128store",
-        .description = "Misaligned 128 bit stores are slow",
-        .dependencies = 0,
+    result[@enumToInt(Feature.thunderx)] = .{
+        .index = @enumToInt(Feature.thunderx),
+        .name = @tagName(Feature.thunderx),
+        .llvm_name = "thunderx",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
     };
-    result[@enumToInt(Feature.slow_paired_128)] = .{
-        .index = @enumToInt(Feature.slow_paired_128),
-        .name = @tagName(Feature.slow_paired_128),
-        .llvm_name = "slow-paired-128",
-        .description = "Paired 128 bit loads and stores are slow",
-        .dependencies = 0,
+    result[@enumToInt(Feature.thunderx2t99)] = .{
+        .index = @enumToInt(Feature.thunderx2t99),
+        .name = @tagName(Feature.thunderx2t99),
+        .llvm_name = "thunderx2t99",
+        .description = "Cavium ThunderX2 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .aggressive_fma,
+            .arith_bcc_fusion,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .lse,
+            .neon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .v8_1a,
+        }),
     };
-    result[@enumToInt(Feature.slow_strqro_store)] = .{
-        .index = @enumToInt(Feature.slow_strqro_store),
-        .name = @tagName(Feature.slow_strqro_store),
-        .llvm_name = "slow-strqro-store",
-        .description = "STR of Q register with register offset is slow",
-        .dependencies = 0,
+    result[@enumToInt(Feature.thunderxt81)] = .{
+        .index = @enumToInt(Feature.thunderxt81),
+        .name = @tagName(Feature.thunderxt81),
+        .llvm_name = "thunderxt81",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
     };
-    result[@enumToInt(Feature.specrestrict)] = .{
-        .index = @enumToInt(Feature.specrestrict),
-        .name = @tagName(Feature.specrestrict),
-        .llvm_name = "specrestrict",
-        .description = "Enable architectural speculation restriction",
-        .dependencies = 0,
+    result[@enumToInt(Feature.thunderxt83)] = .{
+        .index = @enumToInt(Feature.thunderxt83),
+        .name = @tagName(Feature.thunderxt83),
+        .llvm_name = "thunderxt83",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
     };
-    result[@enumToInt(Feature.strict_align)] = .{
-        .index = @enumToInt(Feature.strict_align),
-        .name = @tagName(Feature.strict_align),
-        .llvm_name = "strict-align",
-        .description = "Disallow all unaligned memory access",
-        .dependencies = 0,
+    result[@enumToInt(Feature.thunderxt88)] = .{
+        .index = @enumToInt(Feature.thunderxt88),
+        .name = @tagName(Feature.thunderxt88),
+        .llvm_name = "thunderxt88",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
     };
     result[@enumToInt(Feature.tlb_rmi)] = .{
         .index = @enumToInt(Feature.tlb_rmi),
@@ -919,20 +1302,6 @@ pub const all_features = blk: {
         .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.tracev84)] = .{
-        .index = @enumToInt(Feature.tracev84),
-        .name = @tagName(Feature.tracev84),
-        .llvm_name = "tracev8.4",
-        .description = "Enable v8.4-A Trace extension",
-        .dependencies = 0,
-    };
-    result[@enumToInt(Feature.use_aa)] = .{
-        .index = @enumToInt(Feature.use_aa),
-        .name = @tagName(Feature.use_aa),
-        .llvm_name = "use-aa",
-        .description = "Use alias analysis during codegen",
-        .dependencies = 0,
-    };
     result[@enumToInt(Feature.tpidr_el1)] = .{
         .index = @enumToInt(Feature.tpidr_el1),
         .name = @tagName(Feature.tpidr_el1),
@@ -954,6 +1323,54 @@ pub const all_features = blk: {
         .description = "Permit use of TPIDR_EL3 for the TLS base",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.tracev8_4)] = .{
+        .index = @enumToInt(Feature.tracev8_4),
+        .name = @tagName(Feature.tracev8_4),
+        .llvm_name = "tracev8.4",
+        .description = "Enable v8.4-A Trace extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tsv110)] = .{
+        .index = @enumToInt(Feature.tsv110),
+        .name = @tagName(Feature.tsv110),
+        .llvm_name = "tsv110",
+        .description = "HiSilicon TS-V110 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .custom_cheap_as_move,
+            .dotprod,
+            .fp_armv8,
+            .fp16fml,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .spe,
+            .use_postra_scheduler,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.uaops)] = .{
+        .index = @enumToInt(Feature.uaops),
+        .name = @tagName(Feature.uaops),
+        .llvm_name = "uaops",
+        .description = "Enable v8.2 UAO PState",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_aa)] = .{
+        .index = @enumToInt(Feature.use_aa),
+        .name = @tagName(Feature.use_aa),
+        .llvm_name = "use-aa",
+        .description = "Use alias analysis during codegen",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_postra_scheduler)] = .{
+        .index = @enumToInt(Feature.use_postra_scheduler),
+        .name = @tagName(Feature.use_postra_scheduler),
+        .llvm_name = "use-postra-scheduler",
+        .description = "Schedule again after register allocation",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
         .index = @enumToInt(Feature.use_reciprocal_square_root),
         .name = @tagName(Feature.use_reciprocal_square_root),
@@ -961,6 +1378,84 @@ pub const all_features = blk: {
         .description = "Use the reciprocal square root approximation",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.v8_1a)] = .{
+        .index = @enumToInt(Feature.v8_1a),
+        .name = @tagName(Feature.v8_1a),
+        .llvm_name = "v8.1a",
+        .description = "Support ARM v8.1a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .lor,
+            .lse,
+            .pan,
+            .rdm,
+            .vh,
+        }),
+    };
+    result[@enumToInt(Feature.v8_2a)] = .{
+        .index = @enumToInt(Feature.v8_2a),
+        .name = @tagName(Feature.v8_2a),
+        .llvm_name = "v8.2a",
+        .description = "Support ARM v8.2a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .ccpp,
+            .pan_rwv,
+            .ras,
+            .uaops,
+            .v8_1a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_3a)] = .{
+        .index = @enumToInt(Feature.v8_3a),
+        .name = @tagName(Feature.v8_3a),
+        .llvm_name = "v8.3a",
+        .description = "Support ARM v8.3a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .ccidx,
+            .complxnum,
+            .jsconv,
+            .pa,
+            .rcpc,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_4a)] = .{
+        .index = @enumToInt(Feature.v8_4a),
+        .name = @tagName(Feature.v8_4a),
+        .llvm_name = "v8.4a",
+        .description = "Support ARM v8.4a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .am,
+            .dit,
+            .dotprod,
+            .fmi,
+            .mpam,
+            .nv,
+            .rasv8_4,
+            .rcpc_immo,
+            .sel2,
+            .tlb_rmi,
+            .tracev8_4,
+            .v8_3a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_5a)] = .{
+        .index = @enumToInt(Feature.v8_5a),
+        .name = @tagName(Feature.v8_5a),
+        .llvm_name = "v8.5a",
+        .description = "Support ARM v8.5a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .altnzcv,
+            .bti,
+            .ccdp,
+            .fptoint,
+            .predres,
+            .sb,
+            .specrestrict,
+            .ssbs,
+            .v8_4a,
+        }),
+    };
     result[@enumToInt(Feature.vh)] = .{
         .index = @enumToInt(Feature.vh),
         .name = @tagName(Feature.vh),
@@ -1014,322 +1509,121 @@ pub const cpu = struct {
         .name = "apple_latest",
         .llvm_name = "apple-latest",
         .features = featureSet(&[_]Feature{
-            .arith_cbz_fusion,
-            .zcz_fp_workaround,
-            .alternate_sextload_cvt_f32_pattern,
-            .fuse_crypto_eor,
-            .zcm,
-            .zcz_gp,
-            .perfmon,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .zcz_fp,
-            .arith_bcc_fusion,
-            .fuse_aes,
+            .cyclone,
         }),
     };
-
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
         .features = featureSet(&[_]Feature{
-            .perfmon,
-            .fp_armv8,
-            .crc,
+            .a35,
         }),
     };
-
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
         .features = featureSet(&[_]Feature{
-            .custom_cheap_as_move,
-            .crc,
-            .perfmon,
-            .use_aa,
-            .fp_armv8,
-            .fuse_aes,
-            .balance_fp_ops,
-            .use_postra_scheduler,
+            .a53,
         }),
     };
-
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
         .features = featureSet(&[_]Feature{
-            .ccpp,
-            .rcpc,
-            .uaops,
-            .rdm,
-            .ras,
-            .lse,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .vh,
-            .fuse_aes,
-            .lor,
-            .dotprod,
-            .pan,
+            .a55,
         }),
     };
-
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
         .features = featureSet(&[_]Feature{
-            .fuse_literals,
-            .predictable_select_expensive,
-            .custom_cheap_as_move,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .fuse_aes,
-            .balance_fp_ops,
-            .use_postra_scheduler,
+            .a57,
         }),
     };
-
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
         .features = featureSet(&[_]Feature{
-            .fuse_aes,
-            .fp_armv8,
-            .perfmon,
-            .crc,
+            .a72,
         }),
     };
-
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
         .features = featureSet(&[_]Feature{
-            .fuse_aes,
-            .fp_armv8,
-            .perfmon,
-            .crc,
+            .a73,
         }),
     };
-
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
         .features = featureSet(&[_]Feature{
-            .ccpp,
-            .rcpc,
-            .uaops,
-            .rdm,
-            .ras,
-            .lse,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .vh,
-            .fuse_aes,
-            .lor,
-            .dotprod,
-            .pan,
+            .a75,
         }),
     };
-
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
         .features = featureSet(&[_]Feature{
-            .ccpp,
-            .rcpc,
-            .uaops,
-            .rdm,
-            .ras,
-            .lse,
-            .crc,
-            .fp_armv8,
-            .vh,
-            .lor,
-            .ssbs,
-            .dotprod,
-            .pan,
+            .a76,
         }),
     };
-
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
         .features = featureSet(&[_]Feature{
-            .ccpp,
-            .rcpc,
-            .uaops,
-            .rdm,
-            .ras,
-            .lse,
-            .crc,
-            .fp_armv8,
-            .vh,
-            .lor,
-            .ssbs,
-            .dotprod,
-            .pan,
+            .a76,
         }),
     };
-
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
         .features = featureSet(&[_]Feature{
-            .arith_cbz_fusion,
-            .zcz_fp_workaround,
-            .alternate_sextload_cvt_f32_pattern,
-            .fuse_crypto_eor,
-            .zcm,
-            .zcz_gp,
-            .perfmon,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .zcz_fp,
-            .arith_bcc_fusion,
-            .fuse_aes,
+            .cyclone,
         }),
     };
-
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
         .features = featureSet(&[_]Feature{
-            .custom_cheap_as_move,
-            .crc,
-            .force_32bit_jump_tables,
-            .perfmon,
-            .slow_misaligned_128store,
-            .use_reciprocal_square_root,
-            .fp_armv8,
-            .zcz_fp,
-            .fuse_aes,
-            .slow_paired_128,
-            .use_postra_scheduler,
+            .exynosm1,
         }),
     };
-
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
         .features = featureSet(&[_]Feature{
-            .custom_cheap_as_move,
-            .crc,
-            .force_32bit_jump_tables,
-            .perfmon,
-            .slow_misaligned_128store,
-            .fp_armv8,
-            .zcz_fp,
-            .fuse_aes,
-            .slow_paired_128,
-            .use_postra_scheduler,
+            .exynosm2,
         }),
     };
-
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
         .features = featureSet(&[_]Feature{
-            .fuse_literals,
-            .predictable_select_expensive,
-            .custom_cheap_as_move,
-            .crc,
-            .force_32bit_jump_tables,
-            .fuse_address,
-            .fuse_csel,
-            .perfmon,
-            .fp_armv8,
-            .zcz_fp,
-            .fuse_aes,
-            .lsl_fast,
-            .use_postra_scheduler,
+            .exynosm3,
         }),
     };
-
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
         .features = featureSet(&[_]Feature{
-            .arith_cbz_fusion,
-            .custom_cheap_as_move,
-            .lse,
-            .zcz_fp,
-            .lsl_fast,
-            .lor,
-            .fuse_literals,
-            .ccpp,
-            .ras,
-            .fp_armv8,
-            .fuse_aes,
-            .pan,
-            .fuse_arith_logic,
-            .crc,
-            .force_32bit_jump_tables,
-            .fuse_address,
-            .fuse_csel,
-            .arith_bcc_fusion,
-            .uaops,
-            .rdm,
-            .zcz_gp,
-            .perfmon,
-            .vh,
-            .use_postra_scheduler,
-            .dotprod,
+            .exynosm4,
         }),
     };
-
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
         .features = featureSet(&[_]Feature{
-            .arith_cbz_fusion,
-            .custom_cheap_as_move,
-            .lse,
-            .zcz_fp,
-            .lsl_fast,
-            .lor,
-            .fuse_literals,
-            .ccpp,
-            .ras,
-            .fp_armv8,
-            .fuse_aes,
-            .pan,
-            .fuse_arith_logic,
-            .crc,
-            .force_32bit_jump_tables,
-            .fuse_address,
-            .fuse_csel,
-            .arith_bcc_fusion,
-            .uaops,
-            .rdm,
-            .zcz_gp,
-            .perfmon,
-            .vh,
-            .use_postra_scheduler,
-            .dotprod,
+            .exynosm4,
         }),
     };
-
     pub const falkor = Cpu{
         .name = "falkor",
         .llvm_name = "falkor",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .custom_cheap_as_move,
-            .rdm,
-            .slow_strqro_store,
-            .zcz_gp,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .zcz_fp,
-            .lsl_fast,
-            .use_postra_scheduler,
+            .falkor,
         }),
     };
-
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
@@ -1341,146 +1635,60 @@ pub const cpu = struct {
             .use_postra_scheduler,
         }),
     };
-
     pub const kryo = Cpu{
         .name = "kryo",
         .llvm_name = "kryo",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .custom_cheap_as_move,
-            .zcz_gp,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .zcz_fp,
-            .lsl_fast,
-            .use_postra_scheduler,
+            .kryo,
         }),
     };
-
     pub const saphira = Cpu{
         .name = "saphira",
         .llvm_name = "saphira",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .custom_cheap_as_move,
-            .fmi,
-            .lse,
-            .zcz_fp,
-            .lsl_fast,
-            .lor,
-            .dit,
-            .pa,
-            .ccpp,
-            .sel2,
-            .ras,
-            .fp_armv8,
-            .ccidx,
-            .pan,
-            .rcpc,
-            .crc,
-            .tracev84,
-            .mpam,
-            .am,
-            .nv,
-            .tlb_rmi,
-            .uaops,
-            .rdm,
-            .zcz_gp,
-            .perfmon,
-            .vh,
-            .use_postra_scheduler,
-            .dotprod,
-            .spe,
+            .saphira,
         }),
     };
-
     pub const thunderx = Cpu{
         .name = "thunderx",
         .llvm_name = "thunderx",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .use_postra_scheduler,
+            .thunderx,
         }),
     };
-
     pub const thunderx2t99 = Cpu{
         .name = "thunderx2t99",
         .llvm_name = "thunderx2t99",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .aggressive_fma,
-            .rdm,
-            .lse,
-            .crc,
-            .fp_armv8,
-            .vh,
-            .arith_bcc_fusion,
-            .lor,
-            .use_postra_scheduler,
-            .pan,
+            .thunderx2t99,
         }),
     };
-
     pub const thunderxt81 = Cpu{
         .name = "thunderxt81",
         .llvm_name = "thunderxt81",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .use_postra_scheduler,
+            .thunderxt81,
         }),
     };
-
     pub const thunderxt83 = Cpu{
         .name = "thunderxt83",
         .llvm_name = "thunderxt83",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .use_postra_scheduler,
+            .thunderxt83,
         }),
     };
-
     pub const thunderxt88 = Cpu{
         .name = "thunderxt88",
         .llvm_name = "thunderxt88",
         .features = featureSet(&[_]Feature{
-            .predictable_select_expensive,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .use_postra_scheduler,
+            .thunderxt88,
         }),
     };
-
     pub const tsv110 = Cpu{
         .name = "tsv110",
         .llvm_name = "tsv110",
         .features = featureSet(&[_]Feature{
-            .ccpp,
-            .custom_cheap_as_move,
-            .uaops,
-            .rdm,
-            .ras,
-            .lse,
-            .crc,
-            .perfmon,
-            .fp_armv8,
-            .vh,
-            .fuse_aes,
-            .lor,
-            .use_postra_scheduler,
-            .dotprod,
-            .pan,
-            .spe,
+            .tsv110,
         }),
     };
 };
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 5efc6e177f5c29c084c113c1294e3129cfae9b09..6175456a17ea2b4f8ffa0e21b06c49402196c908 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -1,2132 +1,1524 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_BitInsts16 = Feature{
-    .name = "BitInsts16",
-    .llvm_name = "16-bit-insts",
-    .description = "Has i16/f16 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_addNoCarryInsts = Feature{
-    .name = "addNoCarryInsts",
-    .llvm_name = "add-no-carry-insts",
-    .description = "Have VALU add/sub instructions without carry out",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_apertureRegs = Feature{
-    .name = "apertureRegs",
-    .llvm_name = "aperture-regs",
-    .description = "Has Memory Aperture Base and Size Registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_atomicFaddInsts = Feature{
-    .name = "atomicFaddInsts",
-    .llvm_name = "atomic-fadd-insts",
-    .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_autoWaitcntBeforeBarrier = Feature{
-    .name = "autoWaitcntBeforeBarrier",
-    .llvm_name = "auto-waitcnt-before-barrier",
-    .description = "Hardware automatically inserts waitcnt before barrier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ciInsts = Feature{
-    .name = "ciInsts",
-    .llvm_name = "ci-insts",
-    .description = "Additional instructions for CI+",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_codeObjectV3 = Feature{
-    .name = "codeObjectV3",
-    .llvm_name = "code-object-v3",
-    .description = "Generate code object version 3",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cumode = Feature{
-    .name = "cumode",
-    .llvm_name = "cumode",
-    .description = "Enable CU wavefront execution mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dlInsts = Feature{
-    .name = "dlInsts",
-    .llvm_name = "dl-insts",
-    .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dpp = Feature{
-    .name = "dpp",
-    .llvm_name = "dpp",
-    .description = "Support DPP (Data Parallel Primitives) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dpp8 = Feature{
-    .name = "dpp8",
-    .llvm_name = "dpp8",
-    .description = "Support DPP8 (Data Parallel Primitives) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noSramEccSupport = Feature{
-    .name = "noSramEccSupport",
-    .llvm_name = "no-sram-ecc-support",
-    .description = "Hardware does not support SRAM ECC",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noXnackSupport = Feature{
-    .name = "noXnackSupport",
-    .llvm_name = "no-xnack-support",
-    .description = "Hardware does not support XNACK",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot1Insts = Feature{
-    .name = "dot1Insts",
-    .llvm_name = "dot1-insts",
-    .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot2Insts = Feature{
-    .name = "dot2Insts",
-    .llvm_name = "dot2-insts",
-    .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot3Insts = Feature{
-    .name = "dot3Insts",
-    .llvm_name = "dot3-insts",
-    .description = "Has v_dot8c_i32_i4 instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot4Insts = Feature{
-    .name = "dot4Insts",
-    .llvm_name = "dot4-insts",
-    .description = "Has v_dot2c_i32_i16 instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot5Insts = Feature{
-    .name = "dot5Insts",
-    .llvm_name = "dot5-insts",
-    .description = "Has v_dot2c_f32_f16 instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dot6Insts = Feature{
-    .name = "dot6Insts",
-    .llvm_name = "dot6-insts",
-    .description = "Has v_dot4c_i32_i8 instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_DumpCode = Feature{
-    .name = "DumpCode",
-    .llvm_name = "DumpCode",
-    .description = "Dump MachineInstrs in the CodeEmitter",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dumpcode = Feature{
-    .name = "dumpcode",
-    .llvm_name = "dumpcode",
-    .description = "Dump MachineInstrs in the CodeEmitter",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_enableDs128 = Feature{
-    .name = "enableDs128",
-    .llvm_name = "enable-ds128",
-    .description = "Use ds_{read|write}_b128",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loadStoreOpt = Feature{
-    .name = "loadStoreOpt",
-    .llvm_name = "load-store-opt",
-    .description = "Enable SI load/store optimizer pass",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_enablePrtStrictNull = Feature{
-    .name = "enablePrtStrictNull",
-    .llvm_name = "enable-prt-strict-null",
-    .description = "Enable zeroing of result registers for sparse texture fetches",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_siScheduler = Feature{
-    .name = "siScheduler",
-    .llvm_name = "si-scheduler",
-    .description = "Enable SI Machine Scheduler",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_unsafeDsOffsetFolding = Feature{
-    .name = "unsafeDsOffsetFolding",
-    .llvm_name = "unsafe-ds-offset-folding",
-    .description = "Force using DS instruction immediate offsets on SI",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fmaf = Feature{
-    .name = "fmaf",
-    .llvm_name = "fmaf",
-    .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp16Denormals = Feature{
-    .name = "fp16Denormals",
-    .llvm_name = "fp16-denormals",
-    .description = "Enable half precision denormal handling",
-    .dependencies = &[_]*const Feature {
-        &feature_fp64,
-    },
-};
-
-pub const feature_fp32Denormals = Feature{
-    .name = "fp32Denormals",
-    .llvm_name = "fp32-denormals",
-    .description = "Enable single precision denormal handling",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp64 = Feature{
-    .name = "fp64",
-    .llvm_name = "fp64",
-    .description = "Enable double precision operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp64Denormals = Feature{
-    .name = "fp64Denormals",
-    .llvm_name = "fp64-denormals",
-    .description = "Enable double and half precision denormal handling",
-    .dependencies = &[_]*const Feature {
-        &feature_fp64,
-    },
-};
-
-pub const feature_fp64Fp16Denormals = Feature{
-    .name = "fp64Fp16Denormals",
-    .llvm_name = "fp64-fp16-denormals",
-    .description = "Enable double and half precision denormal handling",
-    .dependencies = &[_]*const Feature {
-        &feature_fp64,
-    },
-};
-
-pub const feature_fpExceptions = Feature{
-    .name = "fpExceptions",
-    .llvm_name = "fp-exceptions",
-    .description = "Enable floating point exceptions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastFmaf = Feature{
-    .name = "fastFmaf",
-    .llvm_name = "fast-fmaf",
-    .description = "Assuming f32 fma is at least as fast as mul + add",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatAddressSpace = Feature{
-    .name = "flatAddressSpace",
-    .llvm_name = "flat-address-space",
-    .description = "Support flat address space",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatForGlobal = Feature{
-    .name = "flatForGlobal",
-    .llvm_name = "flat-for-global",
-    .description = "Force to generate flat instruction for global",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatGlobalInsts = Feature{
-    .name = "flatGlobalInsts",
-    .llvm_name = "flat-global-insts",
-    .description = "Have global_* flat memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatInstOffsets = Feature{
-    .name = "flatInstOffsets",
-    .llvm_name = "flat-inst-offsets",
-    .description = "Flat instructions have immediate offset addressing mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatScratchInsts = Feature{
-    .name = "flatScratchInsts",
-    .llvm_name = "flat-scratch-insts",
-    .description = "Have scratch_* flat memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_flatSegmentOffsetBug = Feature{
-    .name = "flatSegmentOffsetBug",
-    .llvm_name = "flat-segment-offset-bug",
-    .description = "GFX10 bug, inst_offset ignored in flat segment",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fmaMixInsts = Feature{
-    .name = "fmaMixInsts",
-    .llvm_name = "fma-mix-insts",
-    .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gcn3Encoding = Feature{
-    .name = "gcn3Encoding",
-    .llvm_name = "gcn3-encoding",
-    .description = "Encoding format for VI",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gfx7Gfx8Gfx9Insts = Feature{
-    .name = "gfx7Gfx8Gfx9Insts",
-    .llvm_name = "gfx7-gfx8-gfx9-insts",
-    .description = "Instructions shared in GFX7, GFX8, GFX9",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gfx8Insts = Feature{
-    .name = "gfx8Insts",
-    .llvm_name = "gfx8-insts",
-    .description = "Additional instructions for GFX8+",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gfx9Insts = Feature{
-    .name = "gfx9Insts",
-    .llvm_name = "gfx9-insts",
-    .description = "Additional instructions for GFX9+",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gfx10Insts = Feature{
-    .name = "gfx10Insts",
-    .llvm_name = "gfx10-insts",
-    .description = "Additional instructions for GFX10+",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_instFwdPrefetchBug = Feature{
-    .name = "instFwdPrefetchBug",
-    .llvm_name = "inst-fwd-prefetch-bug",
-    .description = "S_INST_PREFETCH instruction causes shader to hang",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_intClampInsts = Feature{
-    .name = "intClampInsts",
-    .llvm_name = "int-clamp-insts",
-    .description = "Support clamp for integer destination",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_inv2piInlineImm = Feature{
-    .name = "inv2piInlineImm",
-    .llvm_name = "inv-2pi-inline-imm",
-    .description = "Has 1 / (2 * pi) as inline immediate",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ldsbankcount16 = Feature{
-    .name = "ldsbankcount16",
-    .llvm_name = "ldsbankcount16",
-    .description = "The number of LDS banks per compute unit.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ldsbankcount32 = Feature{
-    .name = "ldsbankcount32",
-    .llvm_name = "ldsbankcount32",
-    .description = "The number of LDS banks per compute unit.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ldsBranchVmemWarHazard = Feature{
-    .name = "ldsBranchVmemWarHazard",
-    .llvm_name = "lds-branch-vmem-war-hazard",
-    .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ldsMisalignedBug = Feature{
-    .name = "ldsMisalignedBug",
-    .llvm_name = "lds-misaligned-bug",
-    .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_localmemorysize0 = Feature{
-    .name = "localmemorysize0",
-    .llvm_name = "localmemorysize0",
-    .description = "The size of local memory in bytes",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_localmemorysize32768 = Feature{
-    .name = "localmemorysize32768",
-    .llvm_name = "localmemorysize32768",
-    .description = "The size of local memory in bytes",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_localmemorysize65536 = Feature{
-    .name = "localmemorysize65536",
-    .llvm_name = "localmemorysize65536",
-    .description = "The size of local memory in bytes",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_maiInsts = Feature{
-    .name = "maiInsts",
-    .llvm_name = "mai-insts",
-    .description = "Has mAI instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mimgR128 = Feature{
-    .name = "mimgR128",
-    .llvm_name = "mimg-r128",
-    .description = "Support 128-bit texture resources",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_madMixInsts = Feature{
-    .name = "madMixInsts",
-    .llvm_name = "mad-mix-insts",
-    .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_maxPrivateElementSize4 = Feature{
-    .name = "maxPrivateElementSize4",
-    .llvm_name = "max-private-element-size-4",
-    .description = "Maximum private access size may be 4",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_maxPrivateElementSize8 = Feature{
-    .name = "maxPrivateElementSize8",
-    .llvm_name = "max-private-element-size-8",
-    .description = "Maximum private access size may be 8",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_maxPrivateElementSize16 = Feature{
-    .name = "maxPrivateElementSize16",
-    .llvm_name = "max-private-element-size-16",
-    .description = "Maximum private access size may be 16",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_movrel = Feature{
-    .name = "movrel",
-    .llvm_name = "movrel",
-    .description = "Has v_movrel*_b32 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nsaEncoding = Feature{
-    .name = "nsaEncoding",
-    .llvm_name = "nsa-encoding",
-    .description = "Support NSA encoding for image instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nsaToVmemBug = Feature{
-    .name = "nsaToVmemBug",
-    .llvm_name = "nsa-to-vmem-bug",
-    .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noDataDepHazard = Feature{
-    .name = "noDataDepHazard",
-    .llvm_name = "no-data-dep-hazard",
-    .description = "Does not need SW waitstates",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noSdstCmpx = Feature{
-    .name = "noSdstCmpx",
-    .llvm_name = "no-sdst-cmpx",
-    .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_offset3fBug = Feature{
-    .name = "offset3fBug",
-    .llvm_name = "offset-3f-bug",
-    .description = "Branch offset of 3f hardware bug",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_pkFmacF16Inst = Feature{
-    .name = "pkFmacF16Inst",
-    .llvm_name = "pk-fmac-f16-inst",
-    .description = "Has v_pk_fmac_f16 instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_promoteAlloca = Feature{
-    .name = "promoteAlloca",
-    .llvm_name = "promote-alloca",
-    .description = "Enable promote alloca pass",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_r128A16 = Feature{
-    .name = "r128A16",
-    .llvm_name = "r128-a16",
-    .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_registerBanking = Feature{
-    .name = "registerBanking",
-    .llvm_name = "register-banking",
-    .description = "Has register banking",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwa = Feature{
-    .name = "sdwa",
-    .llvm_name = "sdwa",
-    .description = "Support SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwaMav = Feature{
-    .name = "sdwaMav",
-    .llvm_name = "sdwa-mav",
-    .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwaOmod = Feature{
-    .name = "sdwaOmod",
-    .llvm_name = "sdwa-omod",
-    .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwaOutModsVopc = Feature{
-    .name = "sdwaOutModsVopc",
-    .llvm_name = "sdwa-out-mods-vopc",
-    .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwaScalar = Feature{
-    .name = "sdwaScalar",
-    .llvm_name = "sdwa-scalar",
-    .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sdwaSdst = Feature{
-    .name = "sdwaSdst",
-    .llvm_name = "sdwa-sdst",
-    .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sgprInitBug = Feature{
-    .name = "sgprInitBug",
-    .llvm_name = "sgpr-init-bug",
-    .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_smemToVectorWriteHazard = Feature{
-    .name = "smemToVectorWriteHazard",
-    .llvm_name = "smem-to-vector-write-hazard",
-    .description = "s_load_dword followed by v_cmp page faults",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sMemrealtime = Feature{
-    .name = "sMemrealtime",
-    .llvm_name = "s-memrealtime",
-    .description = "Has s_memrealtime instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sramEcc = Feature{
-    .name = "sramEcc",
-    .llvm_name = "sram-ecc",
-    .description = "Enable SRAM ECC",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_scalarAtomics = Feature{
-    .name = "scalarAtomics",
-    .llvm_name = "scalar-atomics",
-    .description = "Has atomic scalar memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_scalarFlatScratchInsts = Feature{
-    .name = "scalarFlatScratchInsts",
-    .llvm_name = "scalar-flat-scratch-insts",
-    .description = "Have s_scratch_* flat memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_scalarStores = Feature{
-    .name = "scalarStores",
-    .llvm_name = "scalar-stores",
-    .description = "Has store scalar memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_trapHandler = Feature{
-    .name = "trapHandler",
-    .llvm_name = "trap-handler",
-    .description = "Trap handler support",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_trigReducedRange = Feature{
-    .name = "trigReducedRange",
-    .llvm_name = "trig-reduced-range",
-    .description = "Requires use of fract on arguments to trig instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_unalignedBufferAccess = Feature{
-    .name = "unalignedBufferAccess",
-    .llvm_name = "unaligned-buffer-access",
-    .description = "Support unaligned global loads and stores",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_unalignedScratchAccess = Feature{
-    .name = "unalignedScratchAccess",
-    .llvm_name = "unaligned-scratch-access",
-    .description = "Support unaligned scratch loads and stores",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_unpackedD16Vmem = Feature{
-    .name = "unpackedD16Vmem",
-    .llvm_name = "unpacked-d16-vmem",
-    .description = "Has unpacked d16 vmem instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vgprIndexMode = Feature{
-    .name = "vgprIndexMode",
-    .llvm_name = "vgpr-index-mode",
-    .description = "Has VGPR mode register indexing",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vmemToScalarWriteHazard = Feature{
-    .name = "vmemToScalarWriteHazard",
-    .llvm_name = "vmem-to-scalar-write-hazard",
-    .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vop3Literal = Feature{
-    .name = "vop3Literal",
-    .llvm_name = "vop3-literal",
-    .description = "Can use one literal in VOP3",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vop3p = Feature{
-    .name = "vop3p",
-    .llvm_name = "vop3p",
-    .description = "Has VOP3P packed instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vcmpxExecWarHazard = Feature{
-    .name = "vcmpxExecWarHazard",
-    .llvm_name = "vcmpx-exec-war-hazard",
-    .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vcmpxPermlaneHazard = Feature{
-    .name = "vcmpxPermlaneHazard",
-    .llvm_name = "vcmpx-permlane-hazard",
-    .description = "TODO: describe me",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vscnt = Feature{
-    .name = "vscnt",
-    .llvm_name = "vscnt",
-    .description = "Has separate store vscnt counter",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_wavefrontsize16 = Feature{
-    .name = "wavefrontsize16",
-    .llvm_name = "wavefrontsize16",
-    .description = "The number of threads per wavefront",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_wavefrontsize32 = Feature{
-    .name = "wavefrontsize32",
-    .llvm_name = "wavefrontsize32",
-    .description = "The number of threads per wavefront",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_wavefrontsize64 = Feature{
-    .name = "wavefrontsize64",
-    .llvm_name = "wavefrontsize64",
-    .description = "The number of threads per wavefront",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_xnack = Feature{
-    .name = "xnack",
-    .llvm_name = "xnack",
-    .description = "Enable XNACK support",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_halfRate64Ops = Feature{
-    .name = "halfRate64Ops",
-    .llvm_name = "half-rate-64-ops",
-    .description = "Most fp64 instructions are half rate instead of quarter",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_BitInsts16,
-    &feature_addNoCarryInsts,
-    &feature_apertureRegs,
-    &feature_atomicFaddInsts,
-    &feature_autoWaitcntBeforeBarrier,
-    &feature_ciInsts,
-    &feature_codeObjectV3,
-    &feature_cumode,
-    &feature_dlInsts,
-    &feature_dpp,
-    &feature_dpp8,
-    &feature_noSramEccSupport,
-    &feature_noXnackSupport,
-    &feature_dot1Insts,
-    &feature_dot2Insts,
-    &feature_dot3Insts,
-    &feature_dot4Insts,
-    &feature_dot5Insts,
-    &feature_dot6Insts,
-    &feature_DumpCode,
-    &feature_dumpcode,
-    &feature_enableDs128,
-    &feature_loadStoreOpt,
-    &feature_enablePrtStrictNull,
-    &feature_siScheduler,
-    &feature_unsafeDsOffsetFolding,
-    &feature_fmaf,
-    &feature_fp16Denormals,
-    &feature_fp32Denormals,
-    &feature_fp64,
-    &feature_fp64Denormals,
-    &feature_fp64Fp16Denormals,
-    &feature_fpExceptions,
-    &feature_fastFmaf,
-    &feature_flatAddressSpace,
-    &feature_flatForGlobal,
-    &feature_flatGlobalInsts,
-    &feature_flatInstOffsets,
-    &feature_flatScratchInsts,
-    &feature_flatSegmentOffsetBug,
-    &feature_fmaMixInsts,
-    &feature_gcn3Encoding,
-    &feature_gfx7Gfx8Gfx9Insts,
-    &feature_gfx8Insts,
-    &feature_gfx9Insts,
-    &feature_gfx10Insts,
-    &feature_instFwdPrefetchBug,
-    &feature_intClampInsts,
-    &feature_inv2piInlineImm,
-    &feature_ldsbankcount16,
-    &feature_ldsbankcount32,
-    &feature_ldsBranchVmemWarHazard,
-    &feature_ldsMisalignedBug,
-    &feature_localmemorysize0,
-    &feature_localmemorysize32768,
-    &feature_localmemorysize65536,
-    &feature_maiInsts,
-    &feature_mimgR128,
-    &feature_madMixInsts,
-    &feature_maxPrivateElementSize4,
-    &feature_maxPrivateElementSize8,
-    &feature_maxPrivateElementSize16,
-    &feature_movrel,
-    &feature_nsaEncoding,
-    &feature_nsaToVmemBug,
-    &feature_noDataDepHazard,
-    &feature_noSdstCmpx,
-    &feature_offset3fBug,
-    &feature_pkFmacF16Inst,
-    &feature_promoteAlloca,
-    &feature_r128A16,
-    &feature_registerBanking,
-    &feature_sdwa,
-    &feature_sdwaMav,
-    &feature_sdwaOmod,
-    &feature_sdwaOutModsVopc,
-    &feature_sdwaScalar,
-    &feature_sdwaSdst,
-    &feature_sgprInitBug,
-    &feature_smemToVectorWriteHazard,
-    &feature_sMemrealtime,
-    &feature_sramEcc,
-    &feature_scalarAtomics,
-    &feature_scalarFlatScratchInsts,
-    &feature_scalarStores,
-    &feature_trapHandler,
-    &feature_trigReducedRange,
-    &feature_unalignedBufferAccess,
-    &feature_unalignedScratchAccess,
-    &feature_unpackedD16Vmem,
-    &feature_vgprIndexMode,
-    &feature_vmemToScalarWriteHazard,
-    &feature_vop3Literal,
-    &feature_vop3p,
-    &feature_vcmpxExecWarHazard,
-    &feature_vcmpxPermlaneHazard,
-    &feature_vscnt,
-    &feature_wavefrontsize16,
-    &feature_wavefrontsize32,
-    &feature_wavefrontsize64,
-    &feature_xnack,
-    &feature_halfRate64Ops,
-};
-
-pub const cpu_bonaire = Cpu{
-    .name = "bonaire",
-    .llvm_name = "bonaire",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_carrizo = Cpu{
-    .name = "carrizo",
-    .llvm_name = "carrizo",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_xnack,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_fiji = Cpu{
-    .name = "fiji",
-    .llvm_name = "fiji",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-        &feature_wavefrontsize64,
-    },
-};
-
-pub const cpu_genericHsa = Cpu{
-    .name = "genericHsa",
-    .llvm_name = "generic-hsa",
-    .dependencies = &[_]*const Feature {
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-    },
-};
-
-pub const cpu_gfx1010 = Cpu{
-    .name = "gfx1010",
-    .llvm_name = "gfx1010",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_dlInsts,
-        &feature_noXnackSupport,
-        &feature_flatSegmentOffsetBug,
-        &feature_fmaMixInsts,
-        &feature_movrel,
-        &feature_registerBanking,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_mimgR128,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_noSdstCmpx,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_noDataDepHazard,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_sMemrealtime,
-        &feature_pkFmacF16Inst,
-        &feature_dpp8,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_noSramEccSupport,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_vscnt,
-        &feature_instFwdPrefetchBug,
-        &feature_ldsbankcount32,
-        &feature_ldsBranchVmemWarHazard,
-        &feature_ldsMisalignedBug,
-        &feature_nsaEncoding,
-        &feature_nsaToVmemBug,
-        &feature_offset3fBug,
-        &feature_smemToVectorWriteHazard,
-        &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_scalarStores,
-        &feature_vmemToScalarWriteHazard,
-        &feature_vcmpxExecWarHazard,
-        &feature_vcmpxPermlaneHazard,
-        &feature_wavefrontsize32,
-    },
-};
-
-pub const cpu_gfx1011 = Cpu{
-    .name = "gfx1011",
-    .llvm_name = "gfx1011",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_dlInsts,
-        &feature_noXnackSupport,
-        &feature_dot1Insts,
-        &feature_dot2Insts,
-        &feature_dot5Insts,
-        &feature_dot6Insts,
-        &feature_flatSegmentOffsetBug,
-        &feature_fmaMixInsts,
-        &feature_movrel,
-        &feature_registerBanking,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_mimgR128,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_noSdstCmpx,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_noDataDepHazard,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_sMemrealtime,
-        &feature_pkFmacF16Inst,
-        &feature_dpp8,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_noSramEccSupport,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_vscnt,
-        &feature_instFwdPrefetchBug,
-        &feature_ldsbankcount32,
-        &feature_ldsBranchVmemWarHazard,
-        &feature_nsaEncoding,
-        &feature_nsaToVmemBug,
-        &feature_offset3fBug,
-        &feature_smemToVectorWriteHazard,
-        &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_scalarStores,
-        &feature_vmemToScalarWriteHazard,
-        &feature_vcmpxExecWarHazard,
-        &feature_vcmpxPermlaneHazard,
-        &feature_wavefrontsize32,
-    },
-};
-
-pub const cpu_gfx1012 = Cpu{
-    .name = "gfx1012",
-    .llvm_name = "gfx1012",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_dlInsts,
-        &feature_noXnackSupport,
-        &feature_dot1Insts,
-        &feature_dot2Insts,
-        &feature_dot5Insts,
-        &feature_dot6Insts,
-        &feature_flatSegmentOffsetBug,
-        &feature_fmaMixInsts,
-        &feature_movrel,
-        &feature_registerBanking,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_mimgR128,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_noSdstCmpx,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_noDataDepHazard,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_sMemrealtime,
-        &feature_pkFmacF16Inst,
-        &feature_dpp8,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_noSramEccSupport,
-        &feature_gfx10Insts,
-        &feature_localmemorysize65536,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_vop3Literal,
-        &feature_sdwaOmod,
-        &feature_vscnt,
-        &feature_instFwdPrefetchBug,
-        &feature_ldsbankcount32,
-        &feature_ldsBranchVmemWarHazard,
-        &feature_ldsMisalignedBug,
-        &feature_nsaEncoding,
-        &feature_nsaToVmemBug,
-        &feature_offset3fBug,
-        &feature_smemToVectorWriteHazard,
-        &feature_scalarAtomics,
-        &feature_scalarFlatScratchInsts,
-        &feature_scalarStores,
-        &feature_vmemToScalarWriteHazard,
-        &feature_vcmpxExecWarHazard,
-        &feature_vcmpxPermlaneHazard,
-        &feature_wavefrontsize32,
-    },
-};
-
-pub const cpu_gfx600 = Cpu{
-    .name = "gfx600",
-    .llvm_name = "gfx600",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_gfx601 = Cpu{
-    .name = "gfx601",
-    .llvm_name = "gfx601",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-    },
-};
-
-pub const cpu_gfx700 = Cpu{
-    .name = "gfx700",
-    .llvm_name = "gfx700",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_gfx701 = Cpu{
-    .name = "gfx701",
-    .llvm_name = "gfx701",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_gfx702 = Cpu{
-    .name = "gfx702",
-    .llvm_name = "gfx702",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_fastFmaf,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_gfx703 = Cpu{
-    .name = "gfx703",
-    .llvm_name = "gfx703",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_gfx704 = Cpu{
-    .name = "gfx704",
-    .llvm_name = "gfx704",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_gfx801 = Cpu{
-    .name = "gfx801",
-    .llvm_name = "gfx801",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_xnack,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_gfx802 = Cpu{
-    .name = "gfx802",
-    .llvm_name = "gfx802",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_sgprInitBug,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_gfx803 = Cpu{
-    .name = "gfx803",
-    .llvm_name = "gfx803",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_gfx810 = Cpu{
-    .name = "gfx810",
-    .llvm_name = "gfx810",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_xnack,
-    },
-};
-
-pub const cpu_gfx900 = Cpu{
-    .name = "gfx900",
-    .llvm_name = "gfx900",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noSramEccSupport,
-        &feature_noXnackSupport,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-        &feature_madMixInsts,
-    },
-};
-
-pub const cpu_gfx902 = Cpu{
-    .name = "gfx902",
-    .llvm_name = "gfx902",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noSramEccSupport,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-        &feature_madMixInsts,
-        &feature_xnack,
-    },
-};
-
-pub const cpu_gfx904 = Cpu{
-    .name = "gfx904",
-    .llvm_name = "gfx904",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noSramEccSupport,
-        &feature_noXnackSupport,
-        &feature_fmaMixInsts,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-    },
-};
-
-pub const cpu_gfx906 = Cpu{
-    .name = "gfx906",
-    .llvm_name = "gfx906",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_dlInsts,
-        &feature_noXnackSupport,
-        &feature_dot1Insts,
-        &feature_dot2Insts,
-        &feature_fmaMixInsts,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_gfx908 = Cpu{
-    .name = "gfx908",
-    .llvm_name = "gfx908",
-    .dependencies = &[_]*const Feature {
-        &feature_atomicFaddInsts,
-        &feature_codeObjectV3,
-        &feature_dlInsts,
-        &feature_dot1Insts,
-        &feature_dot2Insts,
-        &feature_dot3Insts,
-        &feature_dot4Insts,
-        &feature_dot5Insts,
-        &feature_dot6Insts,
-        &feature_fmaMixInsts,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-        &feature_maiInsts,
-        &feature_pkFmacF16Inst,
-        &feature_sramEcc,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_gfx909 = Cpu{
-    .name = "gfx909",
-    .llvm_name = "gfx909",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_vgprIndexMode,
-        &feature_addNoCarryInsts,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_sdwaScalar,
-        &feature_flatGlobalInsts,
-        &feature_scalarFlatScratchInsts,
-        &feature_flatInstOffsets,
-        &feature_apertureRegs,
-        &feature_vop3p,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_sdwaSdst,
-        &feature_flatScratchInsts,
-        &feature_ciInsts,
-        &feature_r128A16,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_scalarAtomics,
-        &feature_inv2piInlineImm,
-        &feature_fastFmaf,
-        &feature_wavefrontsize64,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx9Insts,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_sdwaOmod,
-        &feature_ldsbankcount32,
-        &feature_madMixInsts,
-        &feature_xnack,
-    },
-};
-
-pub const cpu_hainan = Cpu{
-    .name = "hainan",
-    .llvm_name = "hainan",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-    },
-};
-
-pub const cpu_hawaii = Cpu{
-    .name = "hawaii",
-    .llvm_name = "hawaii",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_iceland = Cpu{
-    .name = "iceland",
-    .llvm_name = "iceland",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_sgprInitBug,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_kabini = Cpu{
-    .name = "kabini",
-    .llvm_name = "kabini",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_kaveri = Cpu{
-    .name = "kaveri",
-    .llvm_name = "kaveri",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_mullins = Cpu{
-    .name = "mullins",
-    .llvm_name = "mullins",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_movrel,
-        &feature_flatAddressSpace,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_ciInsts,
-        &feature_localmemorysize65536,
-    },
-};
-
-pub const cpu_oland = Cpu{
-    .name = "oland",
-    .llvm_name = "oland",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-    },
-};
-
-pub const cpu_pitcairn = Cpu{
-    .name = "pitcairn",
-    .llvm_name = "pitcairn",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-    },
-};
-
-pub const cpu_polaris10 = Cpu{
-    .name = "polaris10",
-    .llvm_name = "polaris10",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_polaris11 = Cpu{
-    .name = "polaris11",
-    .llvm_name = "polaris11",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_stoney = Cpu{
-    .name = "stoney",
-    .llvm_name = "stoney",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_ldsbankcount16,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-        &feature_xnack,
-    },
-};
-
-pub const cpu_tahiti = Cpu{
-    .name = "tahiti",
-    .llvm_name = "tahiti",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_fastFmaf,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-        &feature_halfRate64Ops,
-    },
-};
-
-pub const cpu_tonga = Cpu{
-    .name = "tonga",
-    .llvm_name = "tonga",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_sgprInitBug,
-        &feature_unpackedD16Vmem,
-        &feature_trigReducedRange,
-        &feature_vgprIndexMode,
-        &feature_movrel,
-        &feature_fp64,
-        &feature_gcn3Encoding,
-        &feature_mimgR128,
-        &feature_sdwa,
-        &feature_gfx7Gfx8Gfx9Insts,
-        &feature_intClampInsts,
-        &feature_ciInsts,
-        &feature_sdwaOutModsVopc,
-        &feature_sMemrealtime,
-        &feature_flatAddressSpace,
-        &feature_inv2piInlineImm,
-        &feature_wavefrontsize64,
-        &feature_noSramEccSupport,
-        &feature_sdwaMav,
-        &feature_localmemorysize65536,
-        &feature_scalarStores,
-        &feature_gfx8Insts,
-        &feature_dpp,
-        &feature_BitInsts16,
-    },
-};
-
-pub const cpu_verde = Cpu{
-    .name = "verde",
-    .llvm_name = "verde",
-    .dependencies = &[_]*const Feature {
-        &feature_codeObjectV3,
-        &feature_noXnackSupport,
-        &feature_ldsbankcount32,
-        &feature_trigReducedRange,
-        &feature_movrel,
-        &feature_wavefrontsize64,
-        &feature_fp64,
-        &feature_mimgR128,
-        &feature_noSramEccSupport,
-        &feature_localmemorysize32768,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_bonaire,
-    &cpu_carrizo,
-    &cpu_fiji,
-    &cpu_generic,
-    &cpu_genericHsa,
-    &cpu_gfx1010,
-    &cpu_gfx1011,
-    &cpu_gfx1012,
-    &cpu_gfx600,
-    &cpu_gfx601,
-    &cpu_gfx700,
-    &cpu_gfx701,
-    &cpu_gfx702,
-    &cpu_gfx703,
-    &cpu_gfx704,
-    &cpu_gfx801,
-    &cpu_gfx802,
-    &cpu_gfx803,
-    &cpu_gfx810,
-    &cpu_gfx900,
-    &cpu_gfx902,
-    &cpu_gfx904,
-    &cpu_gfx906,
-    &cpu_gfx908,
-    &cpu_gfx909,
-    &cpu_hainan,
-    &cpu_hawaii,
-    &cpu_iceland,
-    &cpu_kabini,
-    &cpu_kaveri,
-    &cpu_mullins,
-    &cpu_oland,
-    &cpu_pitcairn,
-    &cpu_polaris10,
-    &cpu_polaris11,
-    &cpu_stoney,
-    &cpu_tahiti,
-    &cpu_tonga,
-    &cpu_verde,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    @"16_bit_insts",
+    DumpCode,
+    add_no_carry_insts,
+    aperture_regs,
+    atomic_fadd_insts,
+    auto_waitcnt_before_barrier,
+    ci_insts,
+    code_object_v3,
+    cumode,
+    dl_insts,
+    dot1_insts,
+    dot2_insts,
+    dot3_insts,
+    dot4_insts,
+    dot5_insts,
+    dot6_insts,
+    dpp,
+    dpp8,
+    dumpcode,
+    enable_ds128,
+    enable_prt_strict_null,
+    fast_fmaf,
+    flat_address_space,
+    flat_for_global,
+    flat_global_insts,
+    flat_inst_offsets,
+    flat_scratch_insts,
+    flat_segment_offset_bug,
+    fma_mix_insts,
+    fmaf,
+    fp_exceptions,
+    fp16_denormals,
+    fp32_denormals,
+    fp64,
+    fp64_denormals,
+    fp64_fp16_denormals,
+    gcn3_encoding,
+    gfx10,
+    gfx10_insts,
+    gfx7_gfx8_gfx9_insts,
+    gfx8_insts,
+    gfx9,
+    gfx9_insts,
+    half_rate_64_ops,
+    inst_fwd_prefetch_bug,
+    int_clamp_insts,
+    inv_2pi_inline_imm,
+    lds_branch_vmem_war_hazard,
+    lds_misaligned_bug,
+    ldsbankcount16,
+    ldsbankcount32,
+    load_store_opt,
+    localmemorysize0,
+    localmemorysize32768,
+    localmemorysize65536,
+    mad_mix_insts,
+    mai_insts,
+    max_private_element_size_16,
+    max_private_element_size_4,
+    max_private_element_size_8,
+    mimg_r128,
+    movrel,
+    no_data_dep_hazard,
+    no_sdst_cmpx,
+    no_sram_ecc_support,
+    no_xnack_support,
+    nsa_encoding,
+    nsa_to_vmem_bug,
+    offset_3f_bug,
+    pk_fmac_f16_inst,
+    promote_alloca,
+    r128_a16,
+    register_banking,
+    s_memrealtime,
+    scalar_atomics,
+    scalar_flat_scratch_insts,
+    scalar_stores,
+    sdwa,
+    sdwa_mav,
+    sdwa_omod,
+    sdwa_out_mods_vopc,
+    sdwa_scalar,
+    sdwa_sdst,
+    sea_islands,
+    sgpr_init_bug,
+    si_scheduler,
+    smem_to_vector_write_hazard,
+    southern_islands,
+    sram_ecc,
+    trap_handler,
+    trig_reduced_range,
+    unaligned_buffer_access,
+    unaligned_scratch_access,
+    unpacked_d16_vmem,
+    unsafe_ds_offset_folding,
+    vcmpx_exec_war_hazard,
+    vcmpx_permlane_hazard,
+    vgpr_index_mode,
+    vmem_to_scalar_write_hazard,
+    volcanic_islands,
+    vop3_literal,
+    vop3p,
+    vscnt,
+    wavefrontsize16,
+    wavefrontsize32,
+    wavefrontsize64,
+    xnack,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.@"16_bit_insts")] = .{
+        .index = @enumToInt(Feature.@"16_bit_insts"),
+        .name = @tagName(Feature.@"16_bit_insts"),
+        .llvm_name = "16-bit-insts",
+        .description = "Has i16/f16 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.DumpCode)] = .{
+        .index = @enumToInt(Feature.DumpCode),
+        .name = @tagName(Feature.DumpCode),
+        .llvm_name = "DumpCode",
+        .description = "Dump MachineInstrs in the CodeEmitter",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.add_no_carry_insts)] = .{
+        .index = @enumToInt(Feature.add_no_carry_insts),
+        .name = @tagName(Feature.add_no_carry_insts),
+        .llvm_name = "add-no-carry-insts",
+        .description = "Have VALU add/sub instructions without carry out",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.aperture_regs)] = .{
+        .index = @enumToInt(Feature.aperture_regs),
+        .name = @tagName(Feature.aperture_regs),
+        .llvm_name = "aperture-regs",
+        .description = "Has Memory Aperture Base and Size Registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.atomic_fadd_insts)] = .{
+        .index = @enumToInt(Feature.atomic_fadd_insts),
+        .name = @tagName(Feature.atomic_fadd_insts),
+        .llvm_name = "atomic-fadd-insts",
+        .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
+        .index = @enumToInt(Feature.auto_waitcnt_before_barrier),
+        .name = @tagName(Feature.auto_waitcnt_before_barrier),
+        .llvm_name = "auto-waitcnt-before-barrier",
+        .description = "Hardware automatically inserts waitcnt before barrier",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ci_insts)] = .{
+        .index = @enumToInt(Feature.ci_insts),
+        .name = @tagName(Feature.ci_insts),
+        .llvm_name = "ci-insts",
+        .description = "Additional instructions for CI+",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.code_object_v3)] = .{
+        .index = @enumToInt(Feature.code_object_v3),
+        .name = @tagName(Feature.code_object_v3),
+        .llvm_name = "code-object-v3",
+        .description = "Generate code object version 3",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.cumode)] = .{
+        .index = @enumToInt(Feature.cumode),
+        .name = @tagName(Feature.cumode),
+        .llvm_name = "cumode",
+        .description = "Enable CU wavefront execution mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dl_insts)] = .{
+        .index = @enumToInt(Feature.dl_insts),
+        .name = @tagName(Feature.dl_insts),
+        .llvm_name = "dl-insts",
+        .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot1_insts)] = .{
+        .index = @enumToInt(Feature.dot1_insts),
+        .name = @tagName(Feature.dot1_insts),
+        .llvm_name = "dot1-insts",
+        .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot2_insts)] = .{
+        .index = @enumToInt(Feature.dot2_insts),
+        .name = @tagName(Feature.dot2_insts),
+        .llvm_name = "dot2-insts",
+        .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot3_insts)] = .{
+        .index = @enumToInt(Feature.dot3_insts),
+        .name = @tagName(Feature.dot3_insts),
+        .llvm_name = "dot3-insts",
+        .description = "Has v_dot8c_i32_i4 instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot4_insts)] = .{
+        .index = @enumToInt(Feature.dot4_insts),
+        .name = @tagName(Feature.dot4_insts),
+        .llvm_name = "dot4-insts",
+        .description = "Has v_dot2c_i32_i16 instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot5_insts)] = .{
+        .index = @enumToInt(Feature.dot5_insts),
+        .name = @tagName(Feature.dot5_insts),
+        .llvm_name = "dot5-insts",
+        .description = "Has v_dot2c_f32_f16 instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dot6_insts)] = .{
+        .index = @enumToInt(Feature.dot6_insts),
+        .name = @tagName(Feature.dot6_insts),
+        .llvm_name = "dot6-insts",
+        .description = "Has v_dot4c_i32_i8 instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dpp)] = .{
+        .index = @enumToInt(Feature.dpp),
+        .name = @tagName(Feature.dpp),
+        .llvm_name = "dpp",
+        .description = "Support DPP (Data Parallel Primitives) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dpp8)] = .{
+        .index = @enumToInt(Feature.dpp8),
+        .name = @tagName(Feature.dpp8),
+        .llvm_name = "dpp8",
+        .description = "Support DPP8 (Data Parallel Primitives) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dumpcode)] = .{
+        .index = @enumToInt(Feature.dumpcode),
+        .name = @tagName(Feature.dumpcode),
+        .llvm_name = "dumpcode",
+        .description = "Dump MachineInstrs in the CodeEmitter",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.enable_ds128)] = .{
+        .index = @enumToInt(Feature.enable_ds128),
+        .name = @tagName(Feature.enable_ds128),
+        .llvm_name = "enable-ds128",
+        .description = "Use ds_read|write_b128",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.enable_prt_strict_null)] = .{
+        .index = @enumToInt(Feature.enable_prt_strict_null),
+        .name = @tagName(Feature.enable_prt_strict_null),
+        .llvm_name = "enable-prt-strict-null",
+        .description = "Enable zeroing of result registers for sparse texture fetches",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fast_fmaf)] = .{
+        .index = @enumToInt(Feature.fast_fmaf),
+        .name = @tagName(Feature.fast_fmaf),
+        .llvm_name = "fast-fmaf",
+        .description = "Assuming f32 fma is at least as fast as mul + add",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_address_space)] = .{
+        .index = @enumToInt(Feature.flat_address_space),
+        .name = @tagName(Feature.flat_address_space),
+        .llvm_name = "flat-address-space",
+        .description = "Support flat address space",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_for_global)] = .{
+        .index = @enumToInt(Feature.flat_for_global),
+        .name = @tagName(Feature.flat_for_global),
+        .llvm_name = "flat-for-global",
+        .description = "Force to generate flat instruction for global",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_global_insts)] = .{
+        .index = @enumToInt(Feature.flat_global_insts),
+        .name = @tagName(Feature.flat_global_insts),
+        .llvm_name = "flat-global-insts",
+        .description = "Have global_* flat memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_inst_offsets)] = .{
+        .index = @enumToInt(Feature.flat_inst_offsets),
+        .name = @tagName(Feature.flat_inst_offsets),
+        .llvm_name = "flat-inst-offsets",
+        .description = "Flat instructions have immediate offset addressing mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_scratch_insts)] = .{
+        .index = @enumToInt(Feature.flat_scratch_insts),
+        .name = @tagName(Feature.flat_scratch_insts),
+        .llvm_name = "flat-scratch-insts",
+        .description = "Have scratch_* flat memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
+        .index = @enumToInt(Feature.flat_segment_offset_bug),
+        .name = @tagName(Feature.flat_segment_offset_bug),
+        .llvm_name = "flat-segment-offset-bug",
+        .description = "GFX10 bug, inst_offset ignored in flat segment",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fma_mix_insts)] = .{
+        .index = @enumToInt(Feature.fma_mix_insts),
+        .name = @tagName(Feature.fma_mix_insts),
+        .llvm_name = "fma-mix-insts",
+        .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fmaf)] = .{
+        .index = @enumToInt(Feature.fmaf),
+        .name = @tagName(Feature.fmaf),
+        .llvm_name = "fmaf",
+        .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp_exceptions)] = .{
+        .index = @enumToInt(Feature.fp_exceptions),
+        .name = @tagName(Feature.fp_exceptions),
+        .llvm_name = "fp-exceptions",
+        .description = "Enable floating point exceptions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp16_denormals)] = .{
+        .index = @enumToInt(Feature.fp16_denormals),
+        .name = @tagName(Feature.fp16_denormals),
+        .llvm_name = "fp16-denormals",
+        .description = "Enable half precision denormal handling",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64_fp16_denormals,
+        }),
+    };
+    result[@enumToInt(Feature.fp32_denormals)] = .{
+        .index = @enumToInt(Feature.fp32_denormals),
+        .name = @tagName(Feature.fp32_denormals),
+        .llvm_name = "fp32-denormals",
+        .description = "Enable single precision denormal handling",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp64)] = .{
+        .index = @enumToInt(Feature.fp64),
+        .name = @tagName(Feature.fp64),
+        .llvm_name = "fp64",
+        .description = "Enable double precision operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp64_denormals)] = .{
+        .index = @enumToInt(Feature.fp64_denormals),
+        .name = @tagName(Feature.fp64_denormals),
+        .llvm_name = "fp64-denormals",
+        .description = "Enable double and half precision denormal handling",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+            .fp64_fp16_denormals,
+        }),
+    };
+    result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
+        .index = @enumToInt(Feature.fp64_fp16_denormals),
+        .name = @tagName(Feature.fp64_fp16_denormals),
+        .llvm_name = "fp64-fp16-denormals",
+        .description = "Enable double and half precision denormal handling",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+        }),
+    };
+    result[@enumToInt(Feature.gcn3_encoding)] = .{
+        .index = @enumToInt(Feature.gcn3_encoding),
+        .name = @tagName(Feature.gcn3_encoding),
+        .llvm_name = "gcn3-encoding",
+        .description = "Encoding format for VI",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.gfx10)] = .{
+        .index = @enumToInt(Feature.gfx10),
+        .name = @tagName(Feature.gfx10),
+        .llvm_name = "gfx10",
+        .description = "GFX10 GPU generation",
+        .dependencies = featureSet(&[_]Feature{
+            .@"16_bit_insts",
+            .add_no_carry_insts,
+            .aperture_regs,
+            .ci_insts,
+            .dpp,
+            .dpp8,
+            .fast_fmaf,
+            .flat_address_space,
+            .flat_global_insts,
+            .flat_inst_offsets,
+            .flat_scratch_insts,
+            .fma_mix_insts,
+            .fp64,
+            .gfx10_insts,
+            .gfx8_insts,
+            .gfx9_insts,
+            .int_clamp_insts,
+            .inv_2pi_inline_imm,
+            .localmemorysize65536,
+            .mimg_r128,
+            .movrel,
+            .no_data_dep_hazard,
+            .no_sdst_cmpx,
+            .no_sram_ecc_support,
+            .pk_fmac_f16_inst,
+            .register_banking,
+            .s_memrealtime,
+            .sdwa,
+            .sdwa_omod,
+            .sdwa_scalar,
+            .sdwa_sdst,
+            .vop3_literal,
+            .vop3p,
+            .vscnt,
+        }),
+    };
+    result[@enumToInt(Feature.gfx10_insts)] = .{
+        .index = @enumToInt(Feature.gfx10_insts),
+        .name = @tagName(Feature.gfx10_insts),
+        .llvm_name = "gfx10-insts",
+        .description = "Additional instructions for GFX10+",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
+        .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts),
+        .name = @tagName(Feature.gfx7_gfx8_gfx9_insts),
+        .llvm_name = "gfx7-gfx8-gfx9-insts",
+        .description = "Instructions shared in GFX7, GFX8, GFX9",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.gfx8_insts)] = .{
+        .index = @enumToInt(Feature.gfx8_insts),
+        .name = @tagName(Feature.gfx8_insts),
+        .llvm_name = "gfx8-insts",
+        .description = "Additional instructions for GFX8+",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.gfx9)] = .{
+        .index = @enumToInt(Feature.gfx9),
+        .name = @tagName(Feature.gfx9),
+        .llvm_name = "gfx9",
+        .description = "GFX9 GPU generation",
+        .dependencies = featureSet(&[_]Feature{
+            .@"16_bit_insts",
+            .add_no_carry_insts,
+            .aperture_regs,
+            .ci_insts,
+            .dpp,
+            .fast_fmaf,
+            .flat_address_space,
+            .flat_global_insts,
+            .flat_inst_offsets,
+            .flat_scratch_insts,
+            .fp64,
+            .gcn3_encoding,
+            .gfx7_gfx8_gfx9_insts,
+            .gfx8_insts,
+            .gfx9_insts,
+            .int_clamp_insts,
+            .inv_2pi_inline_imm,
+            .localmemorysize65536,
+            .r128_a16,
+            .s_memrealtime,
+            .scalar_atomics,
+            .scalar_flat_scratch_insts,
+            .scalar_stores,
+            .sdwa,
+            .sdwa_omod,
+            .sdwa_scalar,
+            .sdwa_sdst,
+            .vgpr_index_mode,
+            .vop3p,
+            .wavefrontsize64,
+        }),
+    };
+    result[@enumToInt(Feature.gfx9_insts)] = .{
+        .index = @enumToInt(Feature.gfx9_insts),
+        .name = @tagName(Feature.gfx9_insts),
+        .llvm_name = "gfx9-insts",
+        .description = "Additional instructions for GFX9+",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.half_rate_64_ops)] = .{
+        .index = @enumToInt(Feature.half_rate_64_ops),
+        .name = @tagName(Feature.half_rate_64_ops),
+        .llvm_name = "half-rate-64-ops",
+        .description = "Most fp64 instructions are half rate instead of quarter",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
+        .index = @enumToInt(Feature.inst_fwd_prefetch_bug),
+        .name = @tagName(Feature.inst_fwd_prefetch_bug),
+        .llvm_name = "inst-fwd-prefetch-bug",
+        .description = "S_INST_PREFETCH instruction causes shader to hang",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.int_clamp_insts)] = .{
+        .index = @enumToInt(Feature.int_clamp_insts),
+        .name = @tagName(Feature.int_clamp_insts),
+        .llvm_name = "int-clamp-insts",
+        .description = "Support clamp for integer destination",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
+        .index = @enumToInt(Feature.inv_2pi_inline_imm),
+        .name = @tagName(Feature.inv_2pi_inline_imm),
+        .llvm_name = "inv-2pi-inline-imm",
+        .description = "Has 1 / (2 * pi) as inline immediate",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
+        .index = @enumToInt(Feature.lds_branch_vmem_war_hazard),
+        .name = @tagName(Feature.lds_branch_vmem_war_hazard),
+        .llvm_name = "lds-branch-vmem-war-hazard",
+        .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lds_misaligned_bug)] = .{
+        .index = @enumToInt(Feature.lds_misaligned_bug),
+        .name = @tagName(Feature.lds_misaligned_bug),
+        .llvm_name = "lds-misaligned-bug",
+        .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ldsbankcount16)] = .{
+        .index = @enumToInt(Feature.ldsbankcount16),
+        .name = @tagName(Feature.ldsbankcount16),
+        .llvm_name = "ldsbankcount16",
+        .description = "The number of LDS banks per compute unit.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ldsbankcount32)] = .{
+        .index = @enumToInt(Feature.ldsbankcount32),
+        .name = @tagName(Feature.ldsbankcount32),
+        .llvm_name = "ldsbankcount32",
+        .description = "The number of LDS banks per compute unit.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.load_store_opt)] = .{
+        .index = @enumToInt(Feature.load_store_opt),
+        .name = @tagName(Feature.load_store_opt),
+        .llvm_name = "load-store-opt",
+        .description = "Enable SI load/store optimizer pass",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.localmemorysize0)] = .{
+        .index = @enumToInt(Feature.localmemorysize0),
+        .name = @tagName(Feature.localmemorysize0),
+        .llvm_name = "localmemorysize0",
+        .description = "The size of local memory in bytes",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.localmemorysize32768)] = .{
+        .index = @enumToInt(Feature.localmemorysize32768),
+        .name = @tagName(Feature.localmemorysize32768),
+        .llvm_name = "localmemorysize32768",
+        .description = "The size of local memory in bytes",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.localmemorysize65536)] = .{
+        .index = @enumToInt(Feature.localmemorysize65536),
+        .name = @tagName(Feature.localmemorysize65536),
+        .llvm_name = "localmemorysize65536",
+        .description = "The size of local memory in bytes",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mad_mix_insts)] = .{
+        .index = @enumToInt(Feature.mad_mix_insts),
+        .name = @tagName(Feature.mad_mix_insts),
+        .llvm_name = "mad-mix-insts",
+        .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mai_insts)] = .{
+        .index = @enumToInt(Feature.mai_insts),
+        .name = @tagName(Feature.mai_insts),
+        .llvm_name = "mai-insts",
+        .description = "Has mAI instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.max_private_element_size_16)] = .{
+        .index = @enumToInt(Feature.max_private_element_size_16),
+        .name = @tagName(Feature.max_private_element_size_16),
+        .llvm_name = "max-private-element-size-16",
+        .description = "Maximum private access size may be 16",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.max_private_element_size_4)] = .{
+        .index = @enumToInt(Feature.max_private_element_size_4),
+        .name = @tagName(Feature.max_private_element_size_4),
+        .llvm_name = "max-private-element-size-4",
+        .description = "Maximum private access size may be 4",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.max_private_element_size_8)] = .{
+        .index = @enumToInt(Feature.max_private_element_size_8),
+        .name = @tagName(Feature.max_private_element_size_8),
+        .llvm_name = "max-private-element-size-8",
+        .description = "Maximum private access size may be 8",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mimg_r128)] = .{
+        .index = @enumToInt(Feature.mimg_r128),
+        .name = @tagName(Feature.mimg_r128),
+        .llvm_name = "mimg-r128",
+        .description = "Support 128-bit texture resources",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.movrel)] = .{
+        .index = @enumToInt(Feature.movrel),
+        .name = @tagName(Feature.movrel),
+        .llvm_name = "movrel",
+        .description = "Has v_movrel*_b32 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_data_dep_hazard)] = .{
+        .index = @enumToInt(Feature.no_data_dep_hazard),
+        .name = @tagName(Feature.no_data_dep_hazard),
+        .llvm_name = "no-data-dep-hazard",
+        .description = "Does not need SW waitstates",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_sdst_cmpx)] = .{
+        .index = @enumToInt(Feature.no_sdst_cmpx),
+        .name = @tagName(Feature.no_sdst_cmpx),
+        .llvm_name = "no-sdst-cmpx",
+        .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_sram_ecc_support)] = .{
+        .index = @enumToInt(Feature.no_sram_ecc_support),
+        .name = @tagName(Feature.no_sram_ecc_support),
+        .llvm_name = "no-sram-ecc-support",
+        .description = "Hardware does not support SRAM ECC",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_xnack_support)] = .{
+        .index = @enumToInt(Feature.no_xnack_support),
+        .name = @tagName(Feature.no_xnack_support),
+        .llvm_name = "no-xnack-support",
+        .description = "Hardware does not support XNACK",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nsa_encoding)] = .{
+        .index = @enumToInt(Feature.nsa_encoding),
+        .name = @tagName(Feature.nsa_encoding),
+        .llvm_name = "nsa-encoding",
+        .description = "Support NSA encoding for image instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
+        .index = @enumToInt(Feature.nsa_to_vmem_bug),
+        .name = @tagName(Feature.nsa_to_vmem_bug),
+        .llvm_name = "nsa-to-vmem-bug",
+        .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.offset_3f_bug)] = .{
+        .index = @enumToInt(Feature.offset_3f_bug),
+        .name = @tagName(Feature.offset_3f_bug),
+        .llvm_name = "offset-3f-bug",
+        .description = "Branch offset of 3f hardware bug",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
+        .index = @enumToInt(Feature.pk_fmac_f16_inst),
+        .name = @tagName(Feature.pk_fmac_f16_inst),
+        .llvm_name = "pk-fmac-f16-inst",
+        .description = "Has v_pk_fmac_f16 instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.promote_alloca)] = .{
+        .index = @enumToInt(Feature.promote_alloca),
+        .name = @tagName(Feature.promote_alloca),
+        .llvm_name = "promote-alloca",
+        .description = "Enable promote alloca pass",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.r128_a16)] = .{
+        .index = @enumToInt(Feature.r128_a16),
+        .name = @tagName(Feature.r128_a16),
+        .llvm_name = "r128-a16",
+        .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.register_banking)] = .{
+        .index = @enumToInt(Feature.register_banking),
+        .name = @tagName(Feature.register_banking),
+        .llvm_name = "register-banking",
+        .description = "Has register banking",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.s_memrealtime)] = .{
+        .index = @enumToInt(Feature.s_memrealtime),
+        .name = @tagName(Feature.s_memrealtime),
+        .llvm_name = "s-memrealtime",
+        .description = "Has s_memrealtime instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.scalar_atomics)] = .{
+        .index = @enumToInt(Feature.scalar_atomics),
+        .name = @tagName(Feature.scalar_atomics),
+        .llvm_name = "scalar-atomics",
+        .description = "Has atomic scalar memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
+        .index = @enumToInt(Feature.scalar_flat_scratch_insts),
+        .name = @tagName(Feature.scalar_flat_scratch_insts),
+        .llvm_name = "scalar-flat-scratch-insts",
+        .description = "Have s_scratch_* flat memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.scalar_stores)] = .{
+        .index = @enumToInt(Feature.scalar_stores),
+        .name = @tagName(Feature.scalar_stores),
+        .llvm_name = "scalar-stores",
+        .description = "Has store scalar memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa)] = .{
+        .index = @enumToInt(Feature.sdwa),
+        .name = @tagName(Feature.sdwa),
+        .llvm_name = "sdwa",
+        .description = "Support SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa_mav)] = .{
+        .index = @enumToInt(Feature.sdwa_mav),
+        .name = @tagName(Feature.sdwa_mav),
+        .llvm_name = "sdwa-mav",
+        .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa_omod)] = .{
+        .index = @enumToInt(Feature.sdwa_omod),
+        .name = @tagName(Feature.sdwa_omod),
+        .llvm_name = "sdwa-omod",
+        .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
+        .index = @enumToInt(Feature.sdwa_out_mods_vopc),
+        .name = @tagName(Feature.sdwa_out_mods_vopc),
+        .llvm_name = "sdwa-out-mods-vopc",
+        .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa_scalar)] = .{
+        .index = @enumToInt(Feature.sdwa_scalar),
+        .name = @tagName(Feature.sdwa_scalar),
+        .llvm_name = "sdwa-scalar",
+        .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sdwa_sdst)] = .{
+        .index = @enumToInt(Feature.sdwa_sdst),
+        .name = @tagName(Feature.sdwa_sdst),
+        .llvm_name = "sdwa-sdst",
+        .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sea_islands)] = .{
+        .index = @enumToInt(Feature.sea_islands),
+        .name = @tagName(Feature.sea_islands),
+        .llvm_name = "sea-islands",
+        .description = "SEA_ISLANDS GPU generation",
+        .dependencies = featureSet(&[_]Feature{
+            .ci_insts,
+            .flat_address_space,
+            .fp64,
+            .gfx7_gfx8_gfx9_insts,
+            .localmemorysize65536,
+            .mimg_r128,
+            .movrel,
+            .no_sram_ecc_support,
+            .trig_reduced_range,
+            .wavefrontsize64,
+        }),
+    };
+    result[@enumToInt(Feature.sgpr_init_bug)] = .{
+        .index = @enumToInt(Feature.sgpr_init_bug),
+        .name = @tagName(Feature.sgpr_init_bug),
+        .llvm_name = "sgpr-init-bug",
+        .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.si_scheduler)] = .{
+        .index = @enumToInt(Feature.si_scheduler),
+        .name = @tagName(Feature.si_scheduler),
+        .llvm_name = "si-scheduler",
+        .description = "Enable SI Machine Scheduler",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
+        .index = @enumToInt(Feature.smem_to_vector_write_hazard),
+        .name = @tagName(Feature.smem_to_vector_write_hazard),
+        .llvm_name = "smem-to-vector-write-hazard",
+        .description = "s_load_dword followed by v_cmp page faults",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.southern_islands)] = .{
+        .index = @enumToInt(Feature.southern_islands),
+        .name = @tagName(Feature.southern_islands),
+        .llvm_name = "southern-islands",
+        .description = "SOUTHERN_ISLANDS GPU generation",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+            .ldsbankcount32,
+            .localmemorysize32768,
+            .mimg_r128,
+            .movrel,
+            .no_sram_ecc_support,
+            .no_xnack_support,
+            .trig_reduced_range,
+            .wavefrontsize64,
+        }),
+    };
+    result[@enumToInt(Feature.sram_ecc)] = .{
+        .index = @enumToInt(Feature.sram_ecc),
+        .name = @tagName(Feature.sram_ecc),
+        .llvm_name = "sram-ecc",
+        .description = "Enable SRAM ECC",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.trap_handler)] = .{
+        .index = @enumToInt(Feature.trap_handler),
+        .name = @tagName(Feature.trap_handler),
+        .llvm_name = "trap-handler",
+        .description = "Trap handler support",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.trig_reduced_range)] = .{
+        .index = @enumToInt(Feature.trig_reduced_range),
+        .name = @tagName(Feature.trig_reduced_range),
+        .llvm_name = "trig-reduced-range",
+        .description = "Requires use of fract on arguments to trig instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.unaligned_buffer_access)] = .{
+        .index = @enumToInt(Feature.unaligned_buffer_access),
+        .name = @tagName(Feature.unaligned_buffer_access),
+        .llvm_name = "unaligned-buffer-access",
+        .description = "Support unaligned global loads and stores",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.unaligned_scratch_access)] = .{
+        .index = @enumToInt(Feature.unaligned_scratch_access),
+        .name = @tagName(Feature.unaligned_scratch_access),
+        .llvm_name = "unaligned-scratch-access",
+        .description = "Support unaligned scratch loads and stores",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
+        .index = @enumToInt(Feature.unpacked_d16_vmem),
+        .name = @tagName(Feature.unpacked_d16_vmem),
+        .llvm_name = "unpacked-d16-vmem",
+        .description = "Has unpacked d16 vmem instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
+        .index = @enumToInt(Feature.unsafe_ds_offset_folding),
+        .name = @tagName(Feature.unsafe_ds_offset_folding),
+        .llvm_name = "unsafe-ds-offset-folding",
+        .description = "Force using DS instruction immediate offsets on SI",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
+        .index = @enumToInt(Feature.vcmpx_exec_war_hazard),
+        .name = @tagName(Feature.vcmpx_exec_war_hazard),
+        .llvm_name = "vcmpx-exec-war-hazard",
+        .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
+        .index = @enumToInt(Feature.vcmpx_permlane_hazard),
+        .name = @tagName(Feature.vcmpx_permlane_hazard),
+        .llvm_name = "vcmpx-permlane-hazard",
+        .description = "TODO: describe me",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vgpr_index_mode)] = .{
+        .index = @enumToInt(Feature.vgpr_index_mode),
+        .name = @tagName(Feature.vgpr_index_mode),
+        .llvm_name = "vgpr-index-mode",
+        .description = "Has VGPR mode register indexing",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
+        .index = @enumToInt(Feature.vmem_to_scalar_write_hazard),
+        .name = @tagName(Feature.vmem_to_scalar_write_hazard),
+        .llvm_name = "vmem-to-scalar-write-hazard",
+        .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.volcanic_islands)] = .{
+        .index = @enumToInt(Feature.volcanic_islands),
+        .name = @tagName(Feature.volcanic_islands),
+        .llvm_name = "volcanic-islands",
+        .description = "VOLCANIC_ISLANDS GPU generation",
+        .dependencies = featureSet(&[_]Feature{
+            .@"16_bit_insts",
+            .ci_insts,
+            .dpp,
+            .flat_address_space,
+            .fp64,
+            .gcn3_encoding,
+            .gfx7_gfx8_gfx9_insts,
+            .gfx8_insts,
+            .int_clamp_insts,
+            .inv_2pi_inline_imm,
+            .localmemorysize65536,
+            .mimg_r128,
+            .movrel,
+            .no_sram_ecc_support,
+            .s_memrealtime,
+            .scalar_stores,
+            .sdwa,
+            .sdwa_mav,
+            .sdwa_out_mods_vopc,
+            .trig_reduced_range,
+            .vgpr_index_mode,
+            .wavefrontsize64,
+        }),
+    };
+    result[@enumToInt(Feature.vop3_literal)] = .{
+        .index = @enumToInt(Feature.vop3_literal),
+        .name = @tagName(Feature.vop3_literal),
+        .llvm_name = "vop3-literal",
+        .description = "Can use one literal in VOP3",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vop3p)] = .{
+        .index = @enumToInt(Feature.vop3p),
+        .name = @tagName(Feature.vop3p),
+        .llvm_name = "vop3p",
+        .description = "Has VOP3P packed instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vscnt)] = .{
+        .index = @enumToInt(Feature.vscnt),
+        .name = @tagName(Feature.vscnt),
+        .llvm_name = "vscnt",
+        .description = "Has separate store vscnt counter",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.wavefrontsize16)] = .{
+        .index = @enumToInt(Feature.wavefrontsize16),
+        .name = @tagName(Feature.wavefrontsize16),
+        .llvm_name = "wavefrontsize16",
+        .description = "The number of threads per wavefront",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.wavefrontsize32)] = .{
+        .index = @enumToInt(Feature.wavefrontsize32),
+        .name = @tagName(Feature.wavefrontsize32),
+        .llvm_name = "wavefrontsize32",
+        .description = "The number of threads per wavefront",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.wavefrontsize64)] = .{
+        .index = @enumToInt(Feature.wavefrontsize64),
+        .name = @tagName(Feature.wavefrontsize64),
+        .llvm_name = "wavefrontsize64",
+        .description = "The number of threads per wavefront",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.xnack)] = .{
+        .index = @enumToInt(Feature.xnack),
+        .name = @tagName(Feature.xnack),
+        .llvm_name = "xnack",
+        .description = "Enable XNACK support",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const bonaire = Cpu{
+        .name = "bonaire",
+        .llvm_name = "bonaire",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const carrizo = Cpu{
+        .name = "carrizo",
+        .llvm_name = "carrizo",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+            .xnack,
+        }),
+    };
+    pub const fiji = Cpu{
+        .name = "fiji",
+        .llvm_name = "fiji",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{
+            .wavefrontsize64,
+        }),
+    };
+    pub const generic_hsa = Cpu{
+        .name = "generic_hsa",
+        .llvm_name = "generic-hsa",
+        .features = featureSet(&[_]Feature{
+            .flat_address_space,
+            .wavefrontsize64,
+        }),
+    };
+    pub const gfx1010 = Cpu{
+        .name = "gfx1010",
+        .llvm_name = "gfx1010",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .dl_insts,
+            .flat_segment_offset_bug,
+            .gfx10,
+            .inst_fwd_prefetch_bug,
+            .lds_branch_vmem_war_hazard,
+            .lds_misaligned_bug,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .nsa_encoding,
+            .nsa_to_vmem_bug,
+            .offset_3f_bug,
+            .scalar_atomics,
+            .scalar_flat_scratch_insts,
+            .scalar_stores,
+            .smem_to_vector_write_hazard,
+            .vcmpx_exec_war_hazard,
+            .vcmpx_permlane_hazard,
+            .vmem_to_scalar_write_hazard,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx1011 = Cpu{
+        .name = "gfx1011",
+        .llvm_name = "gfx1011",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .flat_segment_offset_bug,
+            .gfx10,
+            .inst_fwd_prefetch_bug,
+            .lds_branch_vmem_war_hazard,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .nsa_encoding,
+            .nsa_to_vmem_bug,
+            .offset_3f_bug,
+            .scalar_atomics,
+            .scalar_flat_scratch_insts,
+            .scalar_stores,
+            .smem_to_vector_write_hazard,
+            .vcmpx_exec_war_hazard,
+            .vcmpx_permlane_hazard,
+            .vmem_to_scalar_write_hazard,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx1012 = Cpu{
+        .name = "gfx1012",
+        .llvm_name = "gfx1012",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .flat_segment_offset_bug,
+            .gfx10,
+            .inst_fwd_prefetch_bug,
+            .lds_branch_vmem_war_hazard,
+            .lds_misaligned_bug,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .nsa_encoding,
+            .nsa_to_vmem_bug,
+            .offset_3f_bug,
+            .scalar_atomics,
+            .scalar_flat_scratch_insts,
+            .scalar_stores,
+            .smem_to_vector_write_hazard,
+            .vcmpx_exec_war_hazard,
+            .vcmpx_permlane_hazard,
+            .vmem_to_scalar_write_hazard,
+            .wavefrontsize32,
+        }),
+    };
+    pub const gfx600 = Cpu{
+        .name = "gfx600",
+        .llvm_name = "gfx600",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const gfx601 = Cpu{
+        .name = "gfx601",
+        .llvm_name = "gfx601",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const gfx700 = Cpu{
+        .name = "gfx700",
+        .llvm_name = "gfx700",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx701 = Cpu{
+        .name = "gfx701",
+        .llvm_name = "gfx701",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx702 = Cpu{
+        .name = "gfx702",
+        .llvm_name = "gfx702",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .ldsbankcount16,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx703 = Cpu{
+        .name = "gfx703",
+        .llvm_name = "gfx703",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount16,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx704 = Cpu{
+        .name = "gfx704",
+        .llvm_name = "gfx704",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const gfx801 = Cpu{
+        .name = "gfx801",
+        .llvm_name = "gfx801",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+            .xnack,
+        }),
+    };
+    pub const gfx802 = Cpu{
+        .name = "gfx802",
+        .llvm_name = "gfx802",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sgpr_init_bug,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const gfx803 = Cpu{
+        .name = "gfx803",
+        .llvm_name = "gfx803",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const gfx810 = Cpu{
+        .name = "gfx810",
+        .llvm_name = "gfx810",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount16,
+            .volcanic_islands,
+            .xnack,
+        }),
+    };
+    pub const gfx900 = Cpu{
+        .name = "gfx900",
+        .llvm_name = "gfx900",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .gfx9,
+            .ldsbankcount32,
+            .mad_mix_insts,
+            .no_sram_ecc_support,
+            .no_xnack_support,
+        }),
+    };
+    pub const gfx902 = Cpu{
+        .name = "gfx902",
+        .llvm_name = "gfx902",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .gfx9,
+            .ldsbankcount32,
+            .mad_mix_insts,
+            .no_sram_ecc_support,
+            .xnack,
+        }),
+    };
+    pub const gfx904 = Cpu{
+        .name = "gfx904",
+        .llvm_name = "gfx904",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fma_mix_insts,
+            .gfx9,
+            .ldsbankcount32,
+            .no_sram_ecc_support,
+            .no_xnack_support,
+        }),
+    };
+    pub const gfx906 = Cpu{
+        .name = "gfx906",
+        .llvm_name = "gfx906",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .fma_mix_insts,
+            .gfx9,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .no_xnack_support,
+        }),
+    };
+    pub const gfx908 = Cpu{
+        .name = "gfx908",
+        .llvm_name = "gfx908",
+        .features = featureSet(&[_]Feature{
+            .atomic_fadd_insts,
+            .code_object_v3,
+            .dl_insts,
+            .dot1_insts,
+            .dot2_insts,
+            .dot3_insts,
+            .dot4_insts,
+            .dot5_insts,
+            .dot6_insts,
+            .fma_mix_insts,
+            .gfx9,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .mai_insts,
+            .pk_fmac_f16_inst,
+            .sram_ecc,
+        }),
+    };
+    pub const gfx909 = Cpu{
+        .name = "gfx909",
+        .llvm_name = "gfx909",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .gfx9,
+            .ldsbankcount32,
+            .mad_mix_insts,
+            .xnack,
+        }),
+    };
+    pub const hainan = Cpu{
+        .name = "hainan",
+        .llvm_name = "hainan",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const hawaii = Cpu{
+        .name = "hawaii",
+        .llvm_name = "hawaii",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const iceland = Cpu{
+        .name = "iceland",
+        .llvm_name = "iceland",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sgpr_init_bug,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const kabini = Cpu{
+        .name = "kabini",
+        .llvm_name = "kabini",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount16,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const kaveri = Cpu{
+        .name = "kaveri",
+        .llvm_name = "kaveri",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const mullins = Cpu{
+        .name = "mullins",
+        .llvm_name = "mullins",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount16,
+            .no_xnack_support,
+            .sea_islands,
+        }),
+    };
+    pub const oland = Cpu{
+        .name = "oland",
+        .llvm_name = "oland",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const pitcairn = Cpu{
+        .name = "pitcairn",
+        .llvm_name = "pitcairn",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const polaris10 = Cpu{
+        .name = "polaris10",
+        .llvm_name = "polaris10",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const polaris11 = Cpu{
+        .name = "polaris11",
+        .llvm_name = "polaris11",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const stoney = Cpu{
+        .name = "stoney",
+        .llvm_name = "stoney",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount16,
+            .volcanic_islands,
+            .xnack,
+        }),
+    };
+    pub const tahiti = Cpu{
+        .name = "tahiti",
+        .llvm_name = "tahiti",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .fast_fmaf,
+            .half_rate_64_ops,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+    pub const tonga = Cpu{
+        .name = "tonga",
+        .llvm_name = "tonga",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .sgpr_init_bug,
+            .unpacked_d16_vmem,
+            .volcanic_islands,
+        }),
+    };
+    pub const verde = Cpu{
+        .name = "verde",
+        .llvm_name = "verde",
+        .features = featureSet(&[_]Feature{
+            .code_object_v3,
+            .ldsbankcount32,
+            .no_xnack_support,
+            .southern_islands,
+        }),
+    };
+};
+
+/// All amdgpu CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.bonaire,
+    &cpu.carrizo,
+    &cpu.fiji,
+    &cpu.generic,
+    &cpu.generic_hsa,
+    &cpu.gfx1010,
+    &cpu.gfx1011,
+    &cpu.gfx1012,
+    &cpu.gfx600,
+    &cpu.gfx601,
+    &cpu.gfx700,
+    &cpu.gfx701,
+    &cpu.gfx702,
+    &cpu.gfx703,
+    &cpu.gfx704,
+    &cpu.gfx801,
+    &cpu.gfx802,
+    &cpu.gfx803,
+    &cpu.gfx810,
+    &cpu.gfx900,
+    &cpu.gfx902,
+    &cpu.gfx904,
+    &cpu.gfx906,
+    &cpu.gfx908,
+    &cpu.gfx909,
+    &cpu.hainan,
+    &cpu.hawaii,
+    &cpu.iceland,
+    &cpu.kabini,
+    &cpu.kaveri,
+    &cpu.mullins,
+    &cpu.oland,
+    &cpu.pitcairn,
+    &cpu.polaris10,
+    &cpu.polaris11,
+    &cpu.stoney,
+    &cpu.tahiti,
+    &cpu.tonga,
+    &cpu.verde,
 };
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index d83be5cc48dbc0fa5e621ac65f2b086b72732685..de4bd0ed78de86953aff941b7c99425de8026e05 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -1,2296 +1,2675 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_msecext8 = Feature{
-    .name = "msecext8",
-    .llvm_name = "8msecext",
-    .description = "Enable support for ARMv8-M Security Extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_aclass = Feature{
-    .name = "aclass",
-    .llvm_name = "aclass",
-    .description = "Is application profile ('A' series)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_aes = Feature{
-    .name = "aes",
-    .llvm_name = "aes",
-    .description = "Enable AES support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_acquireRelease = Feature{
-    .name = "acquireRelease",
-    .llvm_name = "acquire-release",
-    .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avoidMovsShop = Feature{
-    .name = "avoidMovsShop",
-    .llvm_name = "avoid-movs-shop",
-    .description = "Avoid movs instructions with shifter operand",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_avoidPartialCpsr = Feature{
-    .name = "avoidPartialCpsr",
-    .llvm_name = "avoid-partial-cpsr",
-    .description = "Avoid CPSR partial update for OOO execution",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_crc = Feature{
-    .name = "crc",
-    .llvm_name = "crc",
-    .description = "Enable support for CRC instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cheapPredicableCpsr = Feature{
-    .name = "cheapPredicableCpsr",
-    .llvm_name = "cheap-predicable-cpsr",
-    .description = "Disable +1 predication cost for instructions updating CPSR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vldnAlign = Feature{
-    .name = "vldnAlign",
-    .llvm_name = "vldn-align",
-    .description = "Check for VLDn unaligned access",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_crypto = Feature{
-    .name = "crypto",
-    .llvm_name = "crypto",
-    .description = "Enable support for Cryptography extensions",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_d32 = Feature{
-    .name = "d32",
-    .llvm_name = "d32",
-    .description = "Extend FP to 32 double registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_db = Feature{
-    .name = "db",
-    .llvm_name = "db",
-    .description = "Has data barrier (dmb/dsb) instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dfb = Feature{
-    .name = "dfb",
-    .llvm_name = "dfb",
-    .description = "Has full data barrier (dfb) instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dsp = Feature{
-    .name = "dsp",
-    .llvm_name = "dsp",
-    .description = "Supports DSP instructions in ARM and/or Thumb2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dontWidenVmovs = Feature{
-    .name = "dontWidenVmovs",
-    .llvm_name = "dont-widen-vmovs",
-    .description = "Don't widen VMOVS to VMOVD",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dotprod = Feature{
-    .name = "dotprod",
-    .llvm_name = "dotprod",
-    .description = "Enable support for dot product instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_executeOnly = Feature{
-    .name = "executeOnly",
-    .llvm_name = "execute-only",
-    .description = "Enable the generation of execute only code.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_expandFpMlx = Feature{
-    .name = "expandFpMlx",
-    .llvm_name = "expand-fp-mlx",
-    .description = "Expand VFP/NEON MLA/MLS instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp16 = Feature{
-    .name = "fp16",
-    .llvm_name = "fp16",
-    .description = "Enable half-precision floating point",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp16fml = Feature{
-    .name = "fp16fml",
-    .llvm_name = "fp16fml",
-    .description = "Enable full half-precision floating point fml instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fp64 = Feature{
-    .name = "fp64",
-    .llvm_name = "fp64",
-    .description = "Floating point unit supports double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fpao = Feature{
-    .name = "fpao",
-    .llvm_name = "fpao",
-    .description = "Enable fast computation of positive address offsets",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fpArmv8 = Feature{
-    .name = "fpArmv8",
-    .llvm_name = "fp-armv8",
-    .description = "Enable ARMv8 FP",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_d32,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fpArmv8d16 = Feature{
-    .name = "fpArmv8d16",
-    .llvm_name = "fp-armv8d16",
-    .description = "Enable ARMv8 FP with only 16 d-registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fpArmv8d16sp = Feature{
-    .name = "fpArmv8d16sp",
-    .llvm_name = "fp-armv8d16sp",
-    .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fpArmv8sp = Feature{
-    .name = "fpArmv8sp",
-    .llvm_name = "fp-armv8sp",
-    .description = "Enable ARMv8 FP with no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_fpregs = Feature{
-    .name = "fpregs",
-    .llvm_name = "fpregs",
-    .description = "Enable FP registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fpregs16 = Feature{
-    .name = "fpregs16",
-    .llvm_name = "fpregs16",
-    .description = "Enable 16-bit FP registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fpregs64 = Feature{
-    .name = "fpregs64",
-    .llvm_name = "fpregs64",
-    .description = "Enable 64-bit FP registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fullfp16 = Feature{
-    .name = "fullfp16",
-    .llvm_name = "fullfp16",
-    .description = "Enable full half-precision floating point",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_fuseAes = Feature{
-    .name = "fuseAes",
-    .llvm_name = "fuse-aes",
-    .description = "CPU fuses AES crypto operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fuseLiterals = Feature{
-    .name = "fuseLiterals",
-    .llvm_name = "fuse-literals",
-    .description = "CPU fuses literal generation operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_hwdivArm = Feature{
-    .name = "hwdivArm",
-    .llvm_name = "hwdiv-arm",
-    .description = "Enable divide instructions in ARM mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_hwdiv = Feature{
-    .name = "hwdiv",
-    .llvm_name = "hwdiv",
-    .description = "Enable divide instructions in Thumb",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noBranchPredictor = Feature{
-    .name = "noBranchPredictor",
-    .llvm_name = "no-branch-predictor",
-    .description = "Has no branch predictor",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_retAddrStack = Feature{
-    .name = "retAddrStack",
-    .llvm_name = "ret-addr-stack",
-    .description = "Has return address stack",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowfpvmlx = Feature{
-    .name = "slowfpvmlx",
-    .llvm_name = "slowfpvmlx",
-    .description = "Disable VFP / NEON MAC instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vmlxHazards = Feature{
-    .name = "vmlxHazards",
-    .llvm_name = "vmlx-hazards",
-    .description = "Has VMLx hazards",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lob = Feature{
-    .name = "lob",
-    .llvm_name = "lob",
-    .description = "Enable Low Overhead Branch extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_longCalls = Feature{
-    .name = "longCalls",
-    .llvm_name = "long-calls",
-    .description = "Generate calls via indirect call instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mclass = Feature{
-    .name = "mclass",
-    .llvm_name = "mclass",
-    .description = "Is microcontroller profile ('M' series)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mp = Feature{
-    .name = "mp",
-    .llvm_name = "mp",
-    .description = "Supports Multiprocessing extension",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_muxedUnits = Feature{
-    .name = "muxedUnits",
-    .llvm_name = "muxed-units",
-    .description = "Has muxed AGU and NEON/FPU",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_neon = Feature{
-    .name = "neon",
-    .llvm_name = "neon",
-    .description = "Enable NEON instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_neonfp = Feature{
-    .name = "neonfp",
-    .llvm_name = "neonfp",
-    .description = "Use NEON for single precision FP",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_neonFpmovs = Feature{
-    .name = "neonFpmovs",
-    .llvm_name = "neon-fpmovs",
-    .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_naclTrap = Feature{
-    .name = "naclTrap",
-    .llvm_name = "nacl-trap",
-    .description = "NaCl trap",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noarm = Feature{
-    .name = "noarm",
-    .llvm_name = "noarm",
-    .description = "Does not support ARM mode execution",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noMovt = Feature{
-    .name = "noMovt",
-    .llvm_name = "no-movt",
-    .description = "Don't use movt/movw pairs for 32-bit imms",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noNegImmediates = Feature{
-    .name = "noNegImmediates",
-    .llvm_name = "no-neg-immediates",
-    .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_disablePostraScheduler = Feature{
-    .name = "disablePostraScheduler",
-    .llvm_name = "disable-postra-scheduler",
-    .description = "Don't schedule again after register allocation",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nonpipelinedVfp = Feature{
-    .name = "nonpipelinedVfp",
-    .llvm_name = "nonpipelined-vfp",
-    .description = "VFP instructions are not pipelined",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_perfmon = Feature{
-    .name = "perfmon",
-    .llvm_name = "perfmon",
-    .description = "Enable support for Performance Monitor extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bit32 = Feature{
-    .name = "bit32",
-    .llvm_name = "32bit",
-    .description = "Prefer 32-bit Thumb instrs",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_preferIshst = Feature{
-    .name = "preferIshst",
-    .llvm_name = "prefer-ishst",
-    .description = "Prefer ISHST barriers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loopAlign = Feature{
-    .name = "loopAlign",
-    .llvm_name = "loop-align",
-    .description = "Prefer 32-bit alignment for loops",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_preferVmovsr = Feature{
-    .name = "preferVmovsr",
-    .llvm_name = "prefer-vmovsr",
-    .description = "Prefer VMOVSR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_profUnpr = Feature{
-    .name = "profUnpr",
-    .llvm_name = "prof-unpr",
-    .description = "Is profitable to unpredicate",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ras = Feature{
-    .name = "ras",
-    .llvm_name = "ras",
-    .description = "Enable Reliability, Availability and Serviceability extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rclass = Feature{
-    .name = "rclass",
-    .llvm_name = "rclass",
-    .description = "Is realtime profile ('R' series)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_readTpHard = Feature{
-    .name = "readTpHard",
-    .llvm_name = "read-tp-hard",
-    .description = "Reading thread pointer from register",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reserveR9 = Feature{
-    .name = "reserveR9",
-    .llvm_name = "reserve-r9",
-    .description = "Reserve R9, making it unavailable as GPR",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sb = Feature{
-    .name = "sb",
-    .llvm_name = "sb",
-    .description = "Enable v8.5a Speculation Barrier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sha2 = Feature{
-    .name = "sha2",
-    .llvm_name = "sha2",
-    .description = "Enable SHA1 and SHA256 support",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_slowFpBrcc = Feature{
-    .name = "slowFpBrcc",
-    .llvm_name = "slow-fp-brcc",
-    .description = "FP compare + branch is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowLoadDSubreg = Feature{
-    .name = "slowLoadDSubreg",
-    .llvm_name = "slow-load-D-subreg",
-    .description = "Loading into D subregs is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowOddReg = Feature{
-    .name = "slowOddReg",
-    .llvm_name = "slow-odd-reg",
-    .description = "VLDM/VSTM starting with an odd register is slow",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowVdup32 = Feature{
-    .name = "slowVdup32",
-    .llvm_name = "slow-vdup32",
-    .description = "Has slow VDUP32 - prefer VMOV",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowVgetlni32 = Feature{
-    .name = "slowVgetlni32",
-    .llvm_name = "slow-vgetlni32",
-    .description = "Has slow VGETLNi32 - prefer VMOV",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_splatVfpNeon = Feature{
-    .name = "splatVfpNeon",
-    .llvm_name = "splat-vfp-neon",
-    .description = "Splat register from VFP to NEON",
-    .dependencies = &[_]*const Feature {
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const feature_strictAlign = Feature{
-    .name = "strictAlign",
-    .llvm_name = "strict-align",
-    .description = "Disallow all unaligned memory access",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_thumb2 = Feature{
-    .name = "thumb2",
-    .llvm_name = "thumb2",
-    .description = "Enable Thumb2 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_trustzone = Feature{
-    .name = "trustzone",
-    .llvm_name = "trustzone",
-    .description = "Enable support for TrustZone security extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useAa = Feature{
-    .name = "useAa",
-    .llvm_name = "use-aa",
-    .description = "Use alias analysis during codegen",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useMisched = Feature{
-    .name = "useMisched",
-    .llvm_name = "use-misched",
-    .description = "Use the MachineScheduler",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_wideStrideVfp = Feature{
-    .name = "wideStrideVfp",
-    .llvm_name = "wide-stride-vfp",
-    .description = "Use a wide stride when allocating VFP registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_v7clrex = Feature{
-    .name = "v7clrex",
-    .llvm_name = "v7clrex",
-    .description = "Has v7 clrex instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vfp2 = Feature{
-    .name = "vfp2",
-    .llvm_name = "vfp2",
-    .description = "Enable VFP2 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp2d16 = Feature{
-    .name = "vfp2d16",
-    .llvm_name = "vfp2d16",
-    .description = "Enable VFP2 instructions with only 16 d-registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp2d16sp = Feature{
-    .name = "vfp2d16sp",
-    .llvm_name = "vfp2d16sp",
-    .description = "Enable VFP2 instructions with only 16 d-registers and no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp2sp = Feature{
-    .name = "vfp2sp",
-    .llvm_name = "vfp2sp",
-    .description = "Enable VFP2 instructions with no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_vfp3 = Feature{
-    .name = "vfp3",
-    .llvm_name = "vfp3",
-    .description = "Enable VFP3 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_vfp3d16 = Feature{
-    .name = "vfp3d16",
-    .llvm_name = "vfp3d16",
-    .description = "Enable VFP3 instructions with only 16 d-registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp3d16sp = Feature{
-    .name = "vfp3d16sp",
-    .llvm_name = "vfp3d16sp",
-    .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp3sp = Feature{
-    .name = "vfp3sp",
-    .llvm_name = "vfp3sp",
-    .description = "Enable VFP3 instructions with no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_vfp4 = Feature{
-    .name = "vfp4",
-    .llvm_name = "vfp4",
-    .description = "Enable VFP4 instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_d32,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp4d16 = Feature{
-    .name = "vfp4d16",
-    .llvm_name = "vfp4d16",
-    .description = "Enable VFP4 instructions with only 16 d-registers",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp4d16sp = Feature{
-    .name = "vfp4d16sp",
-    .llvm_name = "vfp4d16sp",
-    .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-    },
-};
-
-pub const feature_vfp4sp = Feature{
-    .name = "vfp4sp",
-    .llvm_name = "vfp4sp",
-    .description = "Enable VFP4 instructions with no double precision",
-    .dependencies = &[_]*const Feature {
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_d32,
-    },
-};
-
-pub const feature_vmlxForwarding = Feature{
-    .name = "vmlxForwarding",
-    .llvm_name = "vmlx-forwarding",
-    .description = "Has multiplier accumulator forwarding",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_virtualization = Feature{
-    .name = "virtualization",
-    .llvm_name = "virtualization",
-    .description = "Supports Virtualization extension",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_hwdivArm,
-    },
-};
-
-pub const feature_zcz = Feature{
-    .name = "zcz",
-    .llvm_name = "zcz",
-    .description = "Has zero-cycle zeroing instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_msecext8,
-    &feature_aclass,
-    &feature_aes,
-    &feature_acquireRelease,
-    &feature_avoidMovsShop,
-    &feature_avoidPartialCpsr,
-    &feature_crc,
-    &feature_cheapPredicableCpsr,
-    &feature_vldnAlign,
-    &feature_crypto,
-    &feature_d32,
-    &feature_db,
-    &feature_dfb,
-    &feature_dsp,
-    &feature_dontWidenVmovs,
-    &feature_dotprod,
-    &feature_executeOnly,
-    &feature_expandFpMlx,
-    &feature_fp16,
-    &feature_fp16fml,
-    &feature_fp64,
-    &feature_fpao,
-    &feature_fpArmv8,
-    &feature_fpArmv8d16,
-    &feature_fpArmv8d16sp,
-    &feature_fpArmv8sp,
-    &feature_fpregs,
-    &feature_fpregs16,
-    &feature_fpregs64,
-    &feature_fullfp16,
-    &feature_fuseAes,
-    &feature_fuseLiterals,
-    &feature_hwdivArm,
-    &feature_hwdiv,
-    &feature_noBranchPredictor,
-    &feature_retAddrStack,
-    &feature_slowfpvmlx,
-    &feature_vmlxHazards,
-    &feature_lob,
-    &feature_longCalls,
-    &feature_mclass,
-    &feature_mp,
-    &feature_muxedUnits,
-    &feature_neon,
-    &feature_neonfp,
-    &feature_neonFpmovs,
-    &feature_naclTrap,
-    &feature_noarm,
-    &feature_noMovt,
-    &feature_noNegImmediates,
-    &feature_disablePostraScheduler,
-    &feature_nonpipelinedVfp,
-    &feature_perfmon,
-    &feature_bit32,
-    &feature_preferIshst,
-    &feature_loopAlign,
-    &feature_preferVmovsr,
-    &feature_profUnpr,
-    &feature_ras,
-    &feature_rclass,
-    &feature_readTpHard,
-    &feature_reserveR9,
-    &feature_sb,
-    &feature_sha2,
-    &feature_slowFpBrcc,
-    &feature_slowLoadDSubreg,
-    &feature_slowOddReg,
-    &feature_slowVdup32,
-    &feature_slowVgetlni32,
-    &feature_splatVfpNeon,
-    &feature_strictAlign,
-    &feature_thumb2,
-    &feature_trustzone,
-    &feature_useAa,
-    &feature_useMisched,
-    &feature_wideStrideVfp,
-    &feature_v7clrex,
-    &feature_vfp2,
-    &feature_vfp2d16,
-    &feature_vfp2d16sp,
-    &feature_vfp2sp,
-    &feature_vfp3,
-    &feature_vfp3d16,
-    &feature_vfp3d16sp,
-    &feature_vfp3sp,
-    &feature_vfp4,
-    &feature_vfp4d16,
-    &feature_vfp4d16sp,
-    &feature_vfp4sp,
-    &feature_vmlxForwarding,
-    &feature_virtualization,
-    &feature_zcz,
-};
-
-pub const cpu_arm1020e = Cpu{
-    .name = "arm1020e",
-    .llvm_name = "arm1020e",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm1020t = Cpu{
-    .name = "arm1020t",
-    .llvm_name = "arm1020t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm1022e = Cpu{
-    .name = "arm1022e",
-    .llvm_name = "arm1022e",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm10e = Cpu{
-    .name = "arm10e",
-    .llvm_name = "arm10e",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm10tdmi = Cpu{
-    .name = "arm10tdmi",
-    .llvm_name = "arm10tdmi",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm1136jS = Cpu{
-    .name = "arm1136jS",
-    .llvm_name = "arm1136j-s",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-    },
-};
-
-pub const cpu_arm1136jfS = Cpu{
-    .name = "arm1136jfS",
-    .llvm_name = "arm1136jf-s",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-        &feature_slowfpvmlx,
-        &feature_d32,
-        &feature_fpregs,
-        &feature_vfp2,
-    },
-};
-
-pub const cpu_arm1156t2S = Cpu{
-    .name = "arm1156t2S",
-    .llvm_name = "arm1156t2-s",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-        &feature_thumb2,
-    },
-};
-
-pub const cpu_arm1156t2fS = Cpu{
-    .name = "arm1156t2fS",
-    .llvm_name = "arm1156t2f-s",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_slowfpvmlx,
-        &feature_d32,
-        &feature_fpregs,
-        &feature_vfp2,
-    },
-};
-
-pub const cpu_arm1176jS = Cpu{
-    .name = "arm1176jS",
-    .llvm_name = "arm1176j-s",
-    .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-    },
-};
-
-pub const cpu_arm1176jzS = Cpu{
-    .name = "arm1176jzS",
-    .llvm_name = "arm1176jz-s",
-    .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-    },
-};
-
-pub const cpu_arm1176jzfS = Cpu{
-    .name = "arm1176jzfS",
-    .llvm_name = "arm1176jzf-s",
-    .dependencies = &[_]*const Feature {
-        &feature_trustzone,
-        &feature_slowfpvmlx,
-        &feature_d32,
-        &feature_fpregs,
-        &feature_vfp2,
-    },
-};
-
-pub const cpu_arm710t = Cpu{
-    .name = "arm710t",
-    .llvm_name = "arm710t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm720t = Cpu{
-    .name = "arm720t",
-    .llvm_name = "arm720t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm7tdmi = Cpu{
-    .name = "arm7tdmi",
-    .llvm_name = "arm7tdmi",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm7tdmiS = Cpu{
-    .name = "arm7tdmiS",
-    .llvm_name = "arm7tdmi-s",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm8 = Cpu{
-    .name = "arm8",
-    .llvm_name = "arm8",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm810 = Cpu{
-    .name = "arm810",
-    .llvm_name = "arm810",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm9 = Cpu{
-    .name = "arm9",
-    .llvm_name = "arm9",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm920 = Cpu{
-    .name = "arm920",
-    .llvm_name = "arm920",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm920t = Cpu{
-    .name = "arm920t",
-    .llvm_name = "arm920t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm922t = Cpu{
-    .name = "arm922t",
-    .llvm_name = "arm922t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm926ejS = Cpu{
-    .name = "arm926ejS",
-    .llvm_name = "arm926ej-s",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm940t = Cpu{
-    .name = "arm940t",
-    .llvm_name = "arm940t",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm946eS = Cpu{
-    .name = "arm946eS",
-    .llvm_name = "arm946e-s",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm966eS = Cpu{
-    .name = "arm966eS",
-    .llvm_name = "arm966e-s",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm968eS = Cpu{
-    .name = "arm968eS",
-    .llvm_name = "arm968e-s",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm9e = Cpu{
-    .name = "arm9e",
-    .llvm_name = "arm9e",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arm9tdmi = Cpu{
-    .name = "arm9tdmi",
-    .llvm_name = "arm9tdmi",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_cortexA12 = Cpu{
-    .name = "cortexA12",
-    .llvm_name = "cortex-a12",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_retAddrStack,
-        &feature_mp,
-        &feature_trustzone,
-        &feature_fp16,
-        &feature_vfp4,
-        &feature_vmlxForwarding,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_virtualization,
-    },
-};
-
-pub const cpu_cortexA15 = Cpu{
-    .name = "cortexA15",
-    .llvm_name = "cortex-a15",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_vldnAlign,
-        &feature_dontWidenVmovs,
-        &feature_retAddrStack,
-        &feature_mp,
-        &feature_muxedUnits,
-        &feature_splatVfpNeon,
-        &feature_trustzone,
-        &feature_fp16,
-        &feature_vfp4,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_virtualization,
-    },
-};
-
-pub const cpu_cortexA17 = Cpu{
-    .name = "cortexA17",
-    .llvm_name = "cortex-a17",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_retAddrStack,
-        &feature_mp,
-        &feature_trustzone,
-        &feature_fp16,
-        &feature_vfp4,
-        &feature_vmlxForwarding,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_virtualization,
-    },
-};
-
-pub const cpu_cortexA32 = Cpu{
-    .name = "cortexA32",
-    .llvm_name = "cortex-a32",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-    },
-};
-
-pub const cpu_cortexA35 = Cpu{
-    .name = "cortexA35",
-    .llvm_name = "cortex-a35",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-    },
-};
-
-pub const cpu_cortexA5 = Cpu{
-    .name = "cortexA5",
-    .llvm_name = "cortex-a5",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_mp,
-        &feature_slowFpBrcc,
-        &feature_trustzone,
-        &feature_fp16,
-        &feature_vfp4,
-        &feature_vmlxForwarding,
-    },
-};
-
-pub const cpu_cortexA53 = Cpu{
-    .name = "cortexA53",
-    .llvm_name = "cortex-a53",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-        &feature_fpao,
-    },
-};
-
-pub const cpu_cortexA55 = Cpu{
-    .name = "cortexA55",
-    .llvm_name = "cortex-a55",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_dotprod,
-    },
-};
-
-pub const cpu_cortexA57 = Cpu{
-    .name = "cortexA57",
-    .llvm_name = "cortex-a57",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_avoidPartialCpsr,
-        &feature_cheapPredicableCpsr,
-        &feature_crypto,
-        &feature_fpao,
-    },
-};
-
-pub const cpu_cortexA7 = Cpu{
-    .name = "cortexA7",
-    .llvm_name = "cortex-a7",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_vmlxHazards,
-        &feature_mp,
-        &feature_slowFpBrcc,
-        &feature_trustzone,
-        &feature_fp16,
-        &feature_vfp4,
-        &feature_vmlxForwarding,
-        &feature_hwdiv,
-        &feature_hwdivArm,
-        &feature_virtualization,
-    },
-};
-
-pub const cpu_cortexA72 = Cpu{
-    .name = "cortexA72",
-    .llvm_name = "cortex-a72",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-    },
-};
-
-pub const cpu_cortexA73 = Cpu{
-    .name = "cortexA73",
-    .llvm_name = "cortex-a73",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-    },
-};
-
-pub const cpu_cortexA75 = Cpu{
-    .name = "cortexA75",
-    .llvm_name = "cortex-a75",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_dotprod,
-    },
-};
-
-pub const cpu_cortexA76 = Cpu{
-    .name = "cortexA76",
-    .llvm_name = "cortex-a76",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_crypto,
-        &feature_dotprod,
-        &feature_fullfp16,
-    },
-};
-
-pub const cpu_cortexA76ae = Cpu{
-    .name = "cortexA76ae",
-    .llvm_name = "cortex-a76ae",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_crypto,
-        &feature_dotprod,
-        &feature_fullfp16,
-    },
-};
-
-pub const cpu_cortexA8 = Cpu{
-    .name = "cortexA8",
-    .llvm_name = "cortex-a8",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_vmlxHazards,
-        &feature_nonpipelinedVfp,
-        &feature_slowFpBrcc,
-        &feature_trustzone,
-        &feature_vmlxForwarding,
-    },
-};
-
-pub const cpu_cortexA9 = Cpu{
-    .name = "cortexA9",
-    .llvm_name = "cortex-a9",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_vldnAlign,
-        &feature_expandFpMlx,
-        &feature_fp16,
-        &feature_retAddrStack,
-        &feature_vmlxHazards,
-        &feature_mp,
-        &feature_muxedUnits,
-        &feature_neonFpmovs,
-        &feature_preferVmovsr,
-        &feature_trustzone,
-        &feature_vmlxForwarding,
-    },
-};
-
-pub const cpu_cortexM0 = Cpu{
-    .name = "cortexM0",
-    .llvm_name = "cortex-m0",
-    .dependencies = &[_]*const Feature {
-        &feature_mclass,
-        &feature_db,
-        &feature_noarm,
-        &feature_strictAlign,
-    },
-};
-
-pub const cpu_cortexM0plus = Cpu{
-    .name = "cortexM0plus",
-    .llvm_name = "cortex-m0plus",
-    .dependencies = &[_]*const Feature {
-        &feature_mclass,
-        &feature_db,
-        &feature_noarm,
-        &feature_strictAlign,
-    },
-};
-
-pub const cpu_cortexM1 = Cpu{
-    .name = "cortexM1",
-    .llvm_name = "cortex-m1",
-    .dependencies = &[_]*const Feature {
-        &feature_mclass,
-        &feature_db,
-        &feature_noarm,
-        &feature_strictAlign,
-    },
-};
-
-pub const cpu_cortexM23 = Cpu{
-    .name = "cortexM23",
-    .llvm_name = "cortex-m23",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mclass,
-        &feature_db,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_noarm,
-        &feature_msecext8,
-        &feature_strictAlign,
-        &feature_noMovt,
-    },
-};
-
-pub const cpu_cortexM3 = Cpu{
-    .name = "cortexM3",
-    .llvm_name = "cortex-m3",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_noBranchPredictor,
-        &feature_loopAlign,
-        &feature_useAa,
-        &feature_useMisched,
-    },
-};
-
-pub const cpu_cortexM33 = Cpu{
-    .name = "cortexM33",
-    .llvm_name = "cortex-m33",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_msecext8,
-        &feature_dsp,
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_fpArmv8d16sp,
-        &feature_noBranchPredictor,
-        &feature_slowfpvmlx,
-        &feature_loopAlign,
-        &feature_useAa,
-        &feature_useMisched,
-    },
-};
-
-pub const cpu_cortexM35p = Cpu{
-    .name = "cortexM35p",
-    .llvm_name = "cortex-m35p",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_msecext8,
-        &feature_dsp,
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_fpArmv8d16sp,
-        &feature_noBranchPredictor,
-        &feature_slowfpvmlx,
-        &feature_loopAlign,
-        &feature_useAa,
-        &feature_useMisched,
-    },
-};
-
-pub const cpu_cortexM4 = Cpu{
-    .name = "cortexM4",
-    .llvm_name = "cortex-m4",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_noBranchPredictor,
-        &feature_slowfpvmlx,
-        &feature_loopAlign,
-        &feature_useAa,
-        &feature_useMisched,
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_vfp4d16sp,
-    },
-};
-
-pub const cpu_cortexM7 = Cpu{
-    .name = "cortexM7",
-    .llvm_name = "cortex-m7",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_fp16,
-        &feature_fpregs,
-        &feature_fpArmv8d16,
-    },
-};
-
-pub const cpu_cortexR4 = Cpu{
-    .name = "cortexR4",
-    .llvm_name = "cortex-r4",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_retAddrStack,
-    },
-};
-
-pub const cpu_cortexR4f = Cpu{
-    .name = "cortexR4f",
-    .llvm_name = "cortex-r4f",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_fpregs,
-        &feature_vfp3d16,
-    },
-};
-
-pub const cpu_cortexR5 = Cpu{
-    .name = "cortexR5",
-    .llvm_name = "cortex-r5",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_hwdivArm,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_slowFpBrcc,
-        &feature_fpregs,
-        &feature_vfp3d16,
-    },
-};
-
-pub const cpu_cortexR52 = Cpu{
-    .name = "cortexR52",
-    .llvm_name = "cortex-r52",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dfb,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_fpregs,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_fpao,
-        &feature_useAa,
-        &feature_useMisched,
-    },
-};
-
-pub const cpu_cortexR7 = Cpu{
-    .name = "cortexR7",
-    .llvm_name = "cortex-r7",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_fp16,
-        &feature_hwdivArm,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_mp,
-        &feature_slowFpBrcc,
-        &feature_fpregs,
-        &feature_vfp3d16,
-    },
-};
-
-pub const cpu_cortexR8 = Cpu{
-    .name = "cortexR8",
-    .llvm_name = "cortex-r8",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_dsp,
-        &feature_rclass,
-        &feature_thumb2,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_fp16,
-        &feature_hwdivArm,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_mp,
-        &feature_slowFpBrcc,
-        &feature_fpregs,
-        &feature_vfp3d16,
-    },
-};
-
-pub const cpu_cyclone = Cpu{
-    .name = "cyclone",
-    .llvm_name = "cyclone",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_avoidMovsShop,
-        &feature_avoidPartialCpsr,
-        &feature_crypto,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_neonfp,
-        &feature_disablePostraScheduler,
-        &feature_useMisched,
-        &feature_vfp4,
-        &feature_zcz,
-    },
-};
-
-pub const cpu_ep9312 = Cpu{
-    .name = "ep9312",
-    .llvm_name = "ep9312",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_exynosM1 = Cpu{
-    .name = "exynosM1",
-    .llvm_name = "exynos-m1",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_fuseLiterals,
-        &feature_useAa,
-        &feature_wideStrideVfp,
-        &feature_slowVgetlni32,
-        &feature_slowVdup32,
-        &feature_profUnpr,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
-        &feature_zcz,
-        &feature_slowfpvmlx,
-        &feature_expandFpMlx,
-        &feature_fuseAes,
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const cpu_exynosM2 = Cpu{
-    .name = "exynosM2",
-    .llvm_name = "exynos-m2",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_fuseLiterals,
-        &feature_useAa,
-        &feature_wideStrideVfp,
-        &feature_slowVgetlni32,
-        &feature_slowVdup32,
-        &feature_profUnpr,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
-        &feature_zcz,
-        &feature_slowfpvmlx,
-        &feature_expandFpMlx,
-        &feature_fuseAes,
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const cpu_exynosM3 = Cpu{
-    .name = "exynosM3",
-    .llvm_name = "exynos-m3",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_fuseLiterals,
-        &feature_useAa,
-        &feature_wideStrideVfp,
-        &feature_slowVgetlni32,
-        &feature_slowVdup32,
-        &feature_profUnpr,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
-        &feature_zcz,
-        &feature_slowfpvmlx,
-        &feature_expandFpMlx,
-        &feature_fuseAes,
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const cpu_exynosM4 = Cpu{
-    .name = "exynosM4",
-    .llvm_name = "exynos-m4",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_dotprod,
-        &feature_fullfp16,
-        &feature_fuseLiterals,
-        &feature_useAa,
-        &feature_wideStrideVfp,
-        &feature_slowVgetlni32,
-        &feature_slowVdup32,
-        &feature_profUnpr,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
-        &feature_zcz,
-        &feature_slowfpvmlx,
-        &feature_expandFpMlx,
-        &feature_fuseAes,
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const cpu_exynosM5 = Cpu{
-    .name = "exynosM5",
-    .llvm_name = "exynos-m5",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_ras,
-        &feature_dotprod,
-        &feature_fullfp16,
-        &feature_fuseLiterals,
-        &feature_useAa,
-        &feature_wideStrideVfp,
-        &feature_slowVgetlni32,
-        &feature_slowVdup32,
-        &feature_profUnpr,
-        &feature_slowFpBrcc,
-        &feature_retAddrStack,
-        &feature_zcz,
-        &feature_slowfpvmlx,
-        &feature_expandFpMlx,
-        &feature_fuseAes,
-        &feature_dontWidenVmovs,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_iwmmxt = Cpu{
-    .name = "iwmmxt",
-    .llvm_name = "iwmmxt",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_krait = Cpu{
-    .name = "krait",
-    .llvm_name = "krait",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidPartialCpsr,
-        &feature_vldnAlign,
-        &feature_fp16,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_retAddrStack,
-        &feature_muxedUnits,
-        &feature_vfp4,
-        &feature_vmlxForwarding,
-    },
-};
-
-pub const cpu_kryo = Cpu{
-    .name = "kryo",
-    .llvm_name = "kryo",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_mp,
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_trustzone,
-        &feature_crc,
-        &feature_fp16,
-        &feature_acquireRelease,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_hwdivArm,
-        &feature_crypto,
-    },
-};
-
-pub const cpu_mpcore = Cpu{
-    .name = "mpcore",
-    .llvm_name = "mpcore",
-    .dependencies = &[_]*const Feature {
-        &feature_slowfpvmlx,
-        &feature_d32,
-        &feature_fpregs,
-        &feature_vfp2,
-    },
-};
-
-pub const cpu_mpcorenovfp = Cpu{
-    .name = "mpcorenovfp",
-    .llvm_name = "mpcorenovfp",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_sc000 = Cpu{
-    .name = "sc000",
-    .llvm_name = "sc000",
-    .dependencies = &[_]*const Feature {
-        &feature_mclass,
-        &feature_db,
-        &feature_noarm,
-        &feature_strictAlign,
-    },
-};
-
-pub const cpu_sc300 = Cpu{
-    .name = "sc300",
-    .llvm_name = "sc300",
-    .dependencies = &[_]*const Feature {
-        &feature_hwdiv,
-        &feature_thumb2,
-        &feature_mclass,
-        &feature_db,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_noarm,
-        &feature_noBranchPredictor,
-        &feature_useAa,
-        &feature_useMisched,
-    },
-};
-
-pub const cpu_strongarm = Cpu{
-    .name = "strongarm",
-    .llvm_name = "strongarm",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_strongarm110 = Cpu{
-    .name = "strongarm110",
-    .llvm_name = "strongarm110",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_strongarm1100 = Cpu{
-    .name = "strongarm1100",
-    .llvm_name = "strongarm1100",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_strongarm1110 = Cpu{
-    .name = "strongarm1110",
-    .llvm_name = "strongarm1110",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_swift = Cpu{
-    .name = "swift",
-    .llvm_name = "swift",
-    .dependencies = &[_]*const Feature {
-        &feature_d32,
-        &feature_dsp,
-        &feature_thumb2,
-        &feature_db,
-        &feature_aclass,
-        &feature_fpregs,
-        &feature_v7clrex,
-        &feature_perfmon,
-        &feature_avoidMovsShop,
-        &feature_avoidPartialCpsr,
-        &feature_hwdivArm,
-        &feature_hwdiv,
-        &feature_retAddrStack,
-        &feature_slowfpvmlx,
-        &feature_vmlxHazards,
-        &feature_mp,
-        &feature_neonfp,
-        &feature_disablePostraScheduler,
-        &feature_preferIshst,
-        &feature_profUnpr,
-        &feature_slowLoadDSubreg,
-        &feature_slowOddReg,
-        &feature_slowVdup32,
-        &feature_slowVgetlni32,
-        &feature_useMisched,
-        &feature_wideStrideVfp,
-        &feature_fp16,
-        &feature_vfp4,
-    },
-};
-
-pub const cpu_xscale = Cpu{
-    .name = "xscale",
-    .llvm_name = "xscale",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_arm1020e,
-    &cpu_arm1020t,
-    &cpu_arm1022e,
-    &cpu_arm10e,
-    &cpu_arm10tdmi,
-    &cpu_arm1136jS,
-    &cpu_arm1136jfS,
-    &cpu_arm1156t2S,
-    &cpu_arm1156t2fS,
-    &cpu_arm1176jS,
-    &cpu_arm1176jzS,
-    &cpu_arm1176jzfS,
-    &cpu_arm710t,
-    &cpu_arm720t,
-    &cpu_arm7tdmi,
-    &cpu_arm7tdmiS,
-    &cpu_arm8,
-    &cpu_arm810,
-    &cpu_arm9,
-    &cpu_arm920,
-    &cpu_arm920t,
-    &cpu_arm922t,
-    &cpu_arm926ejS,
-    &cpu_arm940t,
-    &cpu_arm946eS,
-    &cpu_arm966eS,
-    &cpu_arm968eS,
-    &cpu_arm9e,
-    &cpu_arm9tdmi,
-    &cpu_cortexA12,
-    &cpu_cortexA15,
-    &cpu_cortexA17,
-    &cpu_cortexA32,
-    &cpu_cortexA35,
-    &cpu_cortexA5,
-    &cpu_cortexA53,
-    &cpu_cortexA55,
-    &cpu_cortexA57,
-    &cpu_cortexA7,
-    &cpu_cortexA72,
-    &cpu_cortexA73,
-    &cpu_cortexA75,
-    &cpu_cortexA76,
-    &cpu_cortexA76ae,
-    &cpu_cortexA8,
-    &cpu_cortexA9,
-    &cpu_cortexM0,
-    &cpu_cortexM0plus,
-    &cpu_cortexM1,
-    &cpu_cortexM23,
-    &cpu_cortexM3,
-    &cpu_cortexM33,
-    &cpu_cortexM35p,
-    &cpu_cortexM4,
-    &cpu_cortexM7,
-    &cpu_cortexR4,
-    &cpu_cortexR4f,
-    &cpu_cortexR5,
-    &cpu_cortexR52,
-    &cpu_cortexR7,
-    &cpu_cortexR8,
-    &cpu_cyclone,
-    &cpu_ep9312,
-    &cpu_exynosM1,
-    &cpu_exynosM2,
-    &cpu_exynosM3,
-    &cpu_exynosM4,
-    &cpu_exynosM5,
-    &cpu_generic,
-    &cpu_iwmmxt,
-    &cpu_krait,
-    &cpu_kryo,
-    &cpu_mpcore,
-    &cpu_mpcorenovfp,
-    &cpu_sc000,
-    &cpu_sc300,
-    &cpu_strongarm,
-    &cpu_strongarm110,
-    &cpu_strongarm1100,
-    &cpu_strongarm1110,
-    &cpu_swift,
-    &cpu_xscale,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    @"32bit",
+    @"8msecext",
+    a12,
+    a15,
+    a17,
+    a32,
+    a35,
+    a5,
+    a53,
+    a55,
+    a57,
+    a7,
+    a72,
+    a73,
+    a75,
+    a76,
+    a8,
+    a9,
+    aclass,
+    acquire_release,
+    aes,
+    armv2,
+    armv2a,
+    armv3,
+    armv3m,
+    armv4,
+    armv4t,
+    armv5t,
+    armv5te,
+    armv5tej,
+    armv6,
+    armv6_m,
+    armv6j,
+    armv6k,
+    armv6kz,
+    armv6s_m,
+    armv6t2,
+    armv7_a,
+    armv7_m,
+    armv7_r,
+    armv7e_m,
+    armv7k,
+    armv7s,
+    armv7ve,
+    armv8_a,
+    armv8_m_base,
+    armv8_m_main,
+    armv8_r,
+    armv8_1_a,
+    armv8_1_m_main,
+    armv8_2_a,
+    armv8_3_a,
+    armv8_4_a,
+    armv8_5_a,
+    avoid_movs_shop,
+    avoid_partial_cpsr,
+    cheap_predicable_cpsr,
+    crc,
+    crypto,
+    d32,
+    db,
+    dfb,
+    disable_postra_scheduler,
+    dont_widen_vmovs,
+    dotprod,
+    dsp,
+    execute_only,
+    expand_fp_mlx,
+    exynos,
+    fp_armv8,
+    fp_armv8d16,
+    fp_armv8d16sp,
+    fp_armv8sp,
+    fp16,
+    fp16fml,
+    fp64,
+    fpao,
+    fpregs,
+    fpregs16,
+    fpregs64,
+    fullfp16,
+    fuse_aes,
+    fuse_literals,
+    hwdiv,
+    hwdiv_arm,
+    iwmmxt,
+    iwmmxt2,
+    krait,
+    kryo,
+    lob,
+    long_calls,
+    loop_align,
+    m3,
+    mclass,
+    mp,
+    muxed_units,
+    mve,
+    mve_fp,
+    nacl_trap,
+    neon,
+    neon_fpmovs,
+    neonfp,
+    no_branch_predictor,
+    no_movt,
+    no_neg_immediates,
+    noarm,
+    nonpipelined_vfp,
+    perfmon,
+    prefer_ishst,
+    prefer_vmovsr,
+    prof_unpr,
+    r4,
+    r5,
+    r52,
+    r7,
+    ras,
+    rclass,
+    read_tp_hard,
+    reserve_r9,
+    ret_addr_stack,
+    sb,
+    sha2,
+    slow_fp_brcc,
+    slow_load_D_subreg,
+    slow_odd_reg,
+    slow_vdup32,
+    slow_vgetlni32,
+    slowfpvmlx,
+    soft_float,
+    splat_vfp_neon,
+    strict_align,
+    swift,
+    thumb_mode,
+    thumb2,
+    trustzone,
+    use_aa,
+    use_misched,
+    v4t,
+    v5t,
+    v5te,
+    v6,
+    v6k,
+    v6m,
+    v6t2,
+    v7,
+    v7clrex,
+    v8,
+    v8_1a,
+    v8_1m_main,
+    v8_2a,
+    v8_3a,
+    v8_4a,
+    v8_5a,
+    v8m,
+    v8m_main,
+    vfp2,
+    vfp2d16,
+    vfp2d16sp,
+    vfp2sp,
+    vfp3,
+    vfp3d16,
+    vfp3d16sp,
+    vfp3sp,
+    vfp4,
+    vfp4d16,
+    vfp4d16sp,
+    vfp4sp,
+    virtualization,
+    vldn_align,
+    vmlx_forwarding,
+    vmlx_hazards,
+    wide_stride_vfp,
+    xscale,
+    zcz,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.@"32bit")] = .{
+        .index = @enumToInt(Feature.@"32bit"),
+        .name = @tagName(Feature.@"32bit"),
+        .llvm_name = "32bit",
+        .description = "Prefer 32-bit Thumb instrs",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.@"8msecext")] = .{
+        .index = @enumToInt(Feature.@"8msecext"),
+        .name = @tagName(Feature.@"8msecext"),
+        .llvm_name = "8msecext",
+        .description = "Enable support for ARMv8-M Security Extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a12)] = .{
+        .index = @enumToInt(Feature.a12),
+        .name = @tagName(Feature.a12),
+        .llvm_name = "a12",
+        .description = "Cortex-A12 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a15)] = .{
+        .index = @enumToInt(Feature.a15),
+        .name = @tagName(Feature.a15),
+        .llvm_name = "a15",
+        .description = "Cortex-A15 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a17)] = .{
+        .index = @enumToInt(Feature.a17),
+        .name = @tagName(Feature.a17),
+        .llvm_name = "a17",
+        .description = "Cortex-A17 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a32)] = .{
+        .index = @enumToInt(Feature.a32),
+        .name = @tagName(Feature.a32),
+        .llvm_name = "a32",
+        .description = "Cortex-A32 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a35)] = .{
+        .index = @enumToInt(Feature.a35),
+        .name = @tagName(Feature.a35),
+        .llvm_name = "a35",
+        .description = "Cortex-A35 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a5)] = .{
+        .index = @enumToInt(Feature.a5),
+        .name = @tagName(Feature.a5),
+        .llvm_name = "a5",
+        .description = "Cortex-A5 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a53)] = .{
+        .index = @enumToInt(Feature.a53),
+        .name = @tagName(Feature.a53),
+        .llvm_name = "a53",
+        .description = "Cortex-A53 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a55)] = .{
+        .index = @enumToInt(Feature.a55),
+        .name = @tagName(Feature.a55),
+        .llvm_name = "a55",
+        .description = "Cortex-A55 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a57)] = .{
+        .index = @enumToInt(Feature.a57),
+        .name = @tagName(Feature.a57),
+        .llvm_name = "a57",
+        .description = "Cortex-A57 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a7)] = .{
+        .index = @enumToInt(Feature.a7),
+        .name = @tagName(Feature.a7),
+        .llvm_name = "a7",
+        .description = "Cortex-A7 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a72)] = .{
+        .index = @enumToInt(Feature.a72),
+        .name = @tagName(Feature.a72),
+        .llvm_name = "a72",
+        .description = "Cortex-A72 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a73)] = .{
+        .index = @enumToInt(Feature.a73),
+        .name = @tagName(Feature.a73),
+        .llvm_name = "a73",
+        .description = "Cortex-A73 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a75)] = .{
+        .index = @enumToInt(Feature.a75),
+        .name = @tagName(Feature.a75),
+        .llvm_name = "a75",
+        .description = "Cortex-A75 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a76)] = .{
+        .index = @enumToInt(Feature.a76),
+        .name = @tagName(Feature.a76),
+        .llvm_name = "a76",
+        .description = "Cortex-A76 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a8)] = .{
+        .index = @enumToInt(Feature.a8),
+        .name = @tagName(Feature.a8),
+        .llvm_name = "a8",
+        .description = "Cortex-A8 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a9)] = .{
+        .index = @enumToInt(Feature.a9),
+        .name = @tagName(Feature.a9),
+        .llvm_name = "a9",
+        .description = "Cortex-A9 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.aclass)] = .{
+        .index = @enumToInt(Feature.aclass),
+        .name = @tagName(Feature.aclass),
+        .llvm_name = "aclass",
+        .description = "Is application profile ('A' series)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.acquire_release)] = .{
+        .index = @enumToInt(Feature.acquire_release),
+        .name = @tagName(Feature.acquire_release),
+        .llvm_name = "acquire-release",
+        .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.aes)] = .{
+        .index = @enumToInt(Feature.aes),
+        .name = @tagName(Feature.aes),
+        .llvm_name = "aes",
+        .description = "Enable AES support",
+        .dependencies = featureSet(&[_]Feature{
+            .neon,
+        }),
+    };
+    result[@enumToInt(Feature.armv2)] = .{
+        .index = @enumToInt(Feature.armv2),
+        .name = @tagName(Feature.armv2),
+        .llvm_name = "armv2",
+        .description = "ARMv2 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.armv2a)] = .{
+        .index = @enumToInt(Feature.armv2a),
+        .name = @tagName(Feature.armv2a),
+        .llvm_name = "armv2a",
+        .description = "ARMv2a architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.armv3)] = .{
+        .index = @enumToInt(Feature.armv3),
+        .name = @tagName(Feature.armv3),
+        .llvm_name = "armv3",
+        .description = "ARMv3 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.armv3m)] = .{
+        .index = @enumToInt(Feature.armv3m),
+        .name = @tagName(Feature.armv3m),
+        .llvm_name = "armv3m",
+        .description = "ARMv3m architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.armv4)] = .{
+        .index = @enumToInt(Feature.armv4),
+        .name = @tagName(Feature.armv4),
+        .llvm_name = "armv4",
+        .description = "ARMv4 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.armv4t)] = .{
+        .index = @enumToInt(Feature.armv4t),
+        .name = @tagName(Feature.armv4t),
+        .llvm_name = "armv4t",
+        .description = "ARMv4t architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .v4t,
+        }),
+    };
+    result[@enumToInt(Feature.armv5t)] = .{
+        .index = @enumToInt(Feature.armv5t),
+        .name = @tagName(Feature.armv5t),
+        .llvm_name = "armv5t",
+        .description = "ARMv5t architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .v5t,
+        }),
+    };
+    result[@enumToInt(Feature.armv5te)] = .{
+        .index = @enumToInt(Feature.armv5te),
+        .name = @tagName(Feature.armv5te),
+        .llvm_name = "armv5te",
+        .description = "ARMv5te architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .v5te,
+        }),
+    };
+    result[@enumToInt(Feature.armv5tej)] = .{
+        .index = @enumToInt(Feature.armv5tej),
+        .name = @tagName(Feature.armv5tej),
+        .llvm_name = "armv5tej",
+        .description = "ARMv5tej architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .v5te,
+        }),
+    };
+    result[@enumToInt(Feature.armv6)] = .{
+        .index = @enumToInt(Feature.armv6),
+        .name = @tagName(Feature.armv6),
+        .llvm_name = "armv6",
+        .description = "ARMv6 architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .dsp,
+            .v6,
+        }),
+    };
+    result[@enumToInt(Feature.armv6_m)] = .{
+        .index = @enumToInt(Feature.armv6_m),
+        .name = @tagName(Feature.armv6_m),
+        .llvm_name = "armv6-m",
+        .description = "ARMv6m architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .mclass,
+            .noarm,
+            .strict_align,
+            .thumb_mode,
+            .v6m,
+        }),
+    };
+    result[@enumToInt(Feature.armv6j)] = .{
+        .index = @enumToInt(Feature.armv6j),
+        .name = @tagName(Feature.armv6j),
+        .llvm_name = "armv6j",
+        .description = "ARMv7a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv6,
+        }),
+    };
+    result[@enumToInt(Feature.armv6k)] = .{
+        .index = @enumToInt(Feature.armv6k),
+        .name = @tagName(Feature.armv6k),
+        .llvm_name = "armv6k",
+        .description = "ARMv6k architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .v6k,
+        }),
+    };
+    result[@enumToInt(Feature.armv6kz)] = .{
+        .index = @enumToInt(Feature.armv6kz),
+        .name = @tagName(Feature.armv6kz),
+        .llvm_name = "armv6kz",
+        .description = "ARMv6kz architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .trustzone,
+            .v6k,
+        }),
+    };
+    result[@enumToInt(Feature.armv6s_m)] = .{
+        .index = @enumToInt(Feature.armv6s_m),
+        .name = @tagName(Feature.armv6s_m),
+        .llvm_name = "armv6s-m",
+        .description = "ARMv6sm architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .mclass,
+            .noarm,
+            .strict_align,
+            .thumb_mode,
+            .v6m,
+        }),
+    };
+    result[@enumToInt(Feature.armv6t2)] = .{
+        .index = @enumToInt(Feature.armv6t2),
+        .name = @tagName(Feature.armv6t2),
+        .llvm_name = "armv6t2",
+        .description = "ARMv6t2 architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .dsp,
+            .v6t2,
+        }),
+    };
+    result[@enumToInt(Feature.armv7_a)] = .{
+        .index = @enumToInt(Feature.armv7_a),
+        .name = @tagName(Feature.armv7_a),
+        .llvm_name = "armv7-a",
+        .description = "ARMv7a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .db,
+            .dsp,
+            .neon,
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.armv7_m)] = .{
+        .index = @enumToInt(Feature.armv7_m),
+        .name = @tagName(Feature.armv7_m),
+        .llvm_name = "armv7-m",
+        .description = "ARMv7m architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .thumb_mode,
+            .thumb2,
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.armv7_r)] = .{
+        .index = @enumToInt(Feature.armv7_r),
+        .name = @tagName(Feature.armv7_r),
+        .llvm_name = "armv7-r",
+        .description = "ARMv7r architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .dsp,
+            .hwdiv,
+            .rclass,
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.armv7e_m)] = .{
+        .index = @enumToInt(Feature.armv7e_m),
+        .name = @tagName(Feature.armv7e_m),
+        .llvm_name = "armv7e-m",
+        .description = "ARMv7em architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .db,
+            .dsp,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .thumb_mode,
+            .thumb2,
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.armv7k)] = .{
+        .index = @enumToInt(Feature.armv7k),
+        .name = @tagName(Feature.armv7k),
+        .llvm_name = "armv7k",
+        .description = "ARMv7a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv7_a,
+        }),
+    };
+    result[@enumToInt(Feature.armv7s)] = .{
+        .index = @enumToInt(Feature.armv7s),
+        .name = @tagName(Feature.armv7s),
+        .llvm_name = "armv7s",
+        .description = "ARMv7a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv7_a,
+        }),
+    };
+    result[@enumToInt(Feature.armv7ve)] = .{
+        .index = @enumToInt(Feature.armv7ve),
+        .name = @tagName(Feature.armv7ve),
+        .llvm_name = "armv7ve",
+        .description = "ARMv7ve architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .db,
+            .dsp,
+            .mp,
+            .neon,
+            .trustzone,
+            .v7,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_a)] = .{
+        .index = @enumToInt(Feature.armv8_a),
+        .name = @tagName(Feature.armv8_a),
+        .llvm_name = "armv8-a",
+        .description = "ARMv8a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .trustzone,
+            .v8,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_m_base)] = .{
+        .index = @enumToInt(Feature.armv8_m_base),
+        .name = @tagName(Feature.armv8_m_base),
+        .llvm_name = "armv8-m.base",
+        .description = "ARMv8mBaseline architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .@"8msecext",
+            .acquire_release,
+            .db,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .strict_align,
+            .thumb_mode,
+            .v7clrex,
+            .v8m,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_m_main)] = .{
+        .index = @enumToInt(Feature.armv8_m_main),
+        .name = @tagName(Feature.armv8_m_main),
+        .llvm_name = "armv8-m.main",
+        .description = "ARMv8mMainline architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .@"8msecext",
+            .acquire_release,
+            .db,
+            .hwdiv,
+            .mclass,
+            .noarm,
+            .thumb_mode,
+            .v8m_main,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_r)] = .{
+        .index = @enumToInt(Feature.armv8_r),
+        .name = @tagName(Feature.armv8_r),
+        .llvm_name = "armv8-r",
+        .description = "ARMv8r architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .db,
+            .dfb,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .rclass,
+            .v8,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_1_a)] = .{
+        .index = @enumToInt(Feature.armv8_1_a),
+        .name = @tagName(Feature.armv8_1_a),
+        .llvm_name = "armv8.1-a",
+        .description = "ARMv81a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .trustzone,
+            .v8_1a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_1_m_main)] = .{
+        .index = @enumToInt(Feature.armv8_1_m_main),
+        .name = @tagName(Feature.armv8_1_m_main),
+        .llvm_name = "armv8.1-m.main",
+        .description = "ARMv81mMainline architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .@"8msecext",
+            .acquire_release,
+            .db,
+            .hwdiv,
+            .lob,
+            .mclass,
+            .noarm,
+            .ras,
+            .thumb_mode,
+            .v8_1m_main,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_2_a)] = .{
+        .index = @enumToInt(Feature.armv8_2_a),
+        .name = @tagName(Feature.armv8_2_a),
+        .llvm_name = "armv8.2-a",
+        .description = "ARMv82a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .ras,
+            .trustzone,
+            .v8_2a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_3_a)] = .{
+        .index = @enumToInt(Feature.armv8_3_a),
+        .name = @tagName(Feature.armv8_3_a),
+        .llvm_name = "armv8.3-a",
+        .description = "ARMv83a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .ras,
+            .trustzone,
+            .v8_3a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_4_a)] = .{
+        .index = @enumToInt(Feature.armv8_4_a),
+        .name = @tagName(Feature.armv8_4_a),
+        .llvm_name = "armv8.4-a",
+        .description = "ARMv84a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dotprod,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .ras,
+            .trustzone,
+            .v8_4a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.armv8_5_a)] = .{
+        .index = @enumToInt(Feature.armv8_5_a),
+        .name = @tagName(Feature.armv8_5_a),
+        .llvm_name = "armv8.5-a",
+        .description = "ARMv85a architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .aclass,
+            .crc,
+            .crypto,
+            .db,
+            .dotprod,
+            .dsp,
+            .fp_armv8,
+            .mp,
+            .neon,
+            .ras,
+            .trustzone,
+            .v8_5a,
+            .virtualization,
+        }),
+    };
+    result[@enumToInt(Feature.avoid_movs_shop)] = .{
+        .index = @enumToInt(Feature.avoid_movs_shop),
+        .name = @tagName(Feature.avoid_movs_shop),
+        .llvm_name = "avoid-movs-shop",
+        .description = "Avoid movs instructions with shifter operand",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
+        .index = @enumToInt(Feature.avoid_partial_cpsr),
+        .name = @tagName(Feature.avoid_partial_cpsr),
+        .llvm_name = "avoid-partial-cpsr",
+        .description = "Avoid CPSR partial update for OOO execution",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
+        .index = @enumToInt(Feature.cheap_predicable_cpsr),
+        .name = @tagName(Feature.cheap_predicable_cpsr),
+        .llvm_name = "cheap-predicable-cpsr",
+        .description = "Disable +1 predication cost for instructions updating CPSR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.crc)] = .{
+        .index = @enumToInt(Feature.crc),
+        .name = @tagName(Feature.crc),
+        .llvm_name = "crc",
+        .description = "Enable support for CRC instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.crypto)] = .{
+        .index = @enumToInt(Feature.crypto),
+        .name = @tagName(Feature.crypto),
+        .llvm_name = "crypto",
+        .description = "Enable support for Cryptography extensions",
+        .dependencies = featureSet(&[_]Feature{
+            .aes,
+            .neon,
+            .sha2,
+        }),
+    };
+    result[@enumToInt(Feature.d32)] = .{
+        .index = @enumToInt(Feature.d32),
+        .name = @tagName(Feature.d32),
+        .llvm_name = "d32",
+        .description = "Extend FP to 32 double registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.db)] = .{
+        .index = @enumToInt(Feature.db),
+        .name = @tagName(Feature.db),
+        .llvm_name = "db",
+        .description = "Has data barrier (dmb/dsb) instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dfb)] = .{
+        .index = @enumToInt(Feature.dfb),
+        .name = @tagName(Feature.dfb),
+        .llvm_name = "dfb",
+        .description = "Has full data barrier (dfb) instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.disable_postra_scheduler)] = .{
+        .index = @enumToInt(Feature.disable_postra_scheduler),
+        .name = @tagName(Feature.disable_postra_scheduler),
+        .llvm_name = "disable-postra-scheduler",
+        .description = "Don't schedule again after register allocation",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dont_widen_vmovs)] = .{
+        .index = @enumToInt(Feature.dont_widen_vmovs),
+        .name = @tagName(Feature.dont_widen_vmovs),
+        .llvm_name = "dont-widen-vmovs",
+        .description = "Don't widen VMOVS to VMOVD",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dotprod)] = .{
+        .index = @enumToInt(Feature.dotprod),
+        .name = @tagName(Feature.dotprod),
+        .llvm_name = "dotprod",
+        .description = "Enable support for dot product instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .neon,
+        }),
+    };
+    result[@enumToInt(Feature.dsp)] = .{
+        .index = @enumToInt(Feature.dsp),
+        .name = @tagName(Feature.dsp),
+        .llvm_name = "dsp",
+        .description = "Supports DSP instructions in ARM and/or Thumb2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.execute_only)] = .{
+        .index = @enumToInt(Feature.execute_only),
+        .name = @tagName(Feature.execute_only),
+        .llvm_name = "execute-only",
+        .description = "Enable the generation of execute only code.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.expand_fp_mlx)] = .{
+        .index = @enumToInt(Feature.expand_fp_mlx),
+        .name = @tagName(Feature.expand_fp_mlx),
+        .llvm_name = "expand-fp-mlx",
+        .description = "Expand VFP/NEON MLA/MLS instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.exynos)] = .{
+        .index = @enumToInt(Feature.exynos),
+        .name = @tagName(Feature.exynos),
+        .llvm_name = "exynos",
+        .description = "Samsung Exynos processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .expand_fp_mlx,
+            .fuse_aes,
+            .fuse_literals,
+            .hwdiv,
+            .hwdiv_arm,
+            .prof_unpr,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slow_vdup32,
+            .slow_vgetlni32,
+            .slowfpvmlx,
+            .splat_vfp_neon,
+            .use_aa,
+            .wide_stride_vfp,
+            .zcz,
+        }),
+    };
+    result[@enumToInt(Feature.fp_armv8)] = .{
+        .index = @enumToInt(Feature.fp_armv8),
+        .name = @tagName(Feature.fp_armv8),
+        .llvm_name = "fp-armv8",
+        .description = "Enable ARMv8 FP",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8d16,
+            .fp_armv8sp,
+            .vfp4,
+        }),
+    };
+    result[@enumToInt(Feature.fp_armv8d16)] = .{
+        .index = @enumToInt(Feature.fp_armv8d16),
+        .name = @tagName(Feature.fp_armv8d16),
+        .llvm_name = "fp-armv8d16",
+        .description = "Enable ARMv8 FP with only 16 d-registers",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8d16sp,
+            .fp64,
+            .vfp4d16,
+        }),
+    };
+    result[@enumToInt(Feature.fp_armv8d16sp)] = .{
+        .index = @enumToInt(Feature.fp_armv8d16sp),
+        .name = @tagName(Feature.fp_armv8d16sp),
+        .llvm_name = "fp-armv8d16sp",
+        .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp4d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.fp_armv8sp)] = .{
+        .index = @enumToInt(Feature.fp_armv8sp),
+        .name = @tagName(Feature.fp_armv8sp),
+        .llvm_name = "fp-armv8sp",
+        .description = "Enable ARMv8 FP with no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .d32,
+            .fp_armv8d16sp,
+            .vfp4sp,
+        }),
+    };
+    result[@enumToInt(Feature.fp16)] = .{
+        .index = @enumToInt(Feature.fp16),
+        .name = @tagName(Feature.fp16),
+        .llvm_name = "fp16",
+        .description = "Enable half-precision floating point",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp16fml)] = .{
+        .index = @enumToInt(Feature.fp16fml),
+        .name = @tagName(Feature.fp16fml),
+        .llvm_name = "fp16fml",
+        .description = "Enable full half-precision floating point fml instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fullfp16,
+        }),
+    };
+    result[@enumToInt(Feature.fp64)] = .{
+        .index = @enumToInt(Feature.fp64),
+        .name = @tagName(Feature.fp64),
+        .llvm_name = "fp64",
+        .description = "Floating point unit supports double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .fpregs64,
+        }),
+    };
+    result[@enumToInt(Feature.fpao)] = .{
+        .index = @enumToInt(Feature.fpao),
+        .name = @tagName(Feature.fpao),
+        .llvm_name = "fpao",
+        .description = "Enable fast computation of positive address offsets",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fpregs)] = .{
+        .index = @enumToInt(Feature.fpregs),
+        .name = @tagName(Feature.fpregs),
+        .llvm_name = "fpregs",
+        .description = "Enable FP registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fpregs16)] = .{
+        .index = @enumToInt(Feature.fpregs16),
+        .name = @tagName(Feature.fpregs16),
+        .llvm_name = "fpregs16",
+        .description = "Enable 16-bit FP registers",
+        .dependencies = featureSet(&[_]Feature{
+            .fpregs,
+        }),
+    };
+    result[@enumToInt(Feature.fpregs64)] = .{
+        .index = @enumToInt(Feature.fpregs64),
+        .name = @tagName(Feature.fpregs64),
+        .llvm_name = "fpregs64",
+        .description = "Enable 64-bit FP registers",
+        .dependencies = featureSet(&[_]Feature{
+            .fpregs,
+        }),
+    };
+    result[@enumToInt(Feature.fullfp16)] = .{
+        .index = @enumToInt(Feature.fullfp16),
+        .name = @tagName(Feature.fullfp16),
+        .llvm_name = "fullfp16",
+        .description = "Enable full half-precision floating point",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8d16sp,
+            .fpregs16,
+        }),
+    };
+    result[@enumToInt(Feature.fuse_aes)] = .{
+        .index = @enumToInt(Feature.fuse_aes),
+        .name = @tagName(Feature.fuse_aes),
+        .llvm_name = "fuse-aes",
+        .description = "CPU fuses AES crypto operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fuse_literals)] = .{
+        .index = @enumToInt(Feature.fuse_literals),
+        .name = @tagName(Feature.fuse_literals),
+        .llvm_name = "fuse-literals",
+        .description = "CPU fuses literal generation operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hwdiv)] = .{
+        .index = @enumToInt(Feature.hwdiv),
+        .name = @tagName(Feature.hwdiv),
+        .llvm_name = "hwdiv",
+        .description = "Enable divide instructions in Thumb",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hwdiv_arm)] = .{
+        .index = @enumToInt(Feature.hwdiv_arm),
+        .name = @tagName(Feature.hwdiv_arm),
+        .llvm_name = "hwdiv-arm",
+        .description = "Enable divide instructions in ARM mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.iwmmxt)] = .{
+        .index = @enumToInt(Feature.iwmmxt),
+        .name = @tagName(Feature.iwmmxt),
+        .llvm_name = "iwmmxt",
+        .description = "ARMv5te architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    result[@enumToInt(Feature.iwmmxt2)] = .{
+        .index = @enumToInt(Feature.iwmmxt2),
+        .name = @tagName(Feature.iwmmxt2),
+        .llvm_name = "iwmmxt2",
+        .description = "ARMv5te architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    result[@enumToInt(Feature.krait)] = .{
+        .index = @enumToInt(Feature.krait),
+        .name = @tagName(Feature.krait),
+        .llvm_name = "krait",
+        .description = "Qualcomm Krait processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.kryo)] = .{
+        .index = @enumToInt(Feature.kryo),
+        .name = @tagName(Feature.kryo),
+        .llvm_name = "kryo",
+        .description = "Qualcomm Kryo processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lob)] = .{
+        .index = @enumToInt(Feature.lob),
+        .name = @tagName(Feature.lob),
+        .llvm_name = "lob",
+        .description = "Enable Low Overhead Branch extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.long_calls)] = .{
+        .index = @enumToInt(Feature.long_calls),
+        .name = @tagName(Feature.long_calls),
+        .llvm_name = "long-calls",
+        .description = "Generate calls via indirect call instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.loop_align)] = .{
+        .index = @enumToInt(Feature.loop_align),
+        .name = @tagName(Feature.loop_align),
+        .llvm_name = "loop-align",
+        .description = "Prefer 32-bit alignment for loops",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.m3)] = .{
+        .index = @enumToInt(Feature.m3),
+        .name = @tagName(Feature.m3),
+        .llvm_name = "m3",
+        .description = "Cortex-M3 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mclass)] = .{
+        .index = @enumToInt(Feature.mclass),
+        .name = @tagName(Feature.mclass),
+        .llvm_name = "mclass",
+        .description = "Is microcontroller profile ('M' series)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mp)] = .{
+        .index = @enumToInt(Feature.mp),
+        .name = @tagName(Feature.mp),
+        .llvm_name = "mp",
+        .description = "Supports Multiprocessing extension",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.muxed_units)] = .{
+        .index = @enumToInt(Feature.muxed_units),
+        .name = @tagName(Feature.muxed_units),
+        .llvm_name = "muxed-units",
+        .description = "Has muxed AGU and NEON/FPU",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mve)] = .{
+        .index = @enumToInt(Feature.mve),
+        .name = @tagName(Feature.mve),
+        .llvm_name = "mve",
+        .description = "Support M-Class Vector Extension with integer ops",
+        .dependencies = featureSet(&[_]Feature{
+            .dsp,
+            .fpregs16,
+            .fpregs64,
+            .v8_1m_main,
+        }),
+    };
+    result[@enumToInt(Feature.mve_fp)] = .{
+        .index = @enumToInt(Feature.mve_fp),
+        .name = @tagName(Feature.mve_fp),
+        .llvm_name = "mve.fp",
+        .description = "Support M-Class Vector Extension with integer and floating ops",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8d16sp,
+            .fullfp16,
+            .mve,
+        }),
+    };
+    result[@enumToInt(Feature.nacl_trap)] = .{
+        .index = @enumToInt(Feature.nacl_trap),
+        .name = @tagName(Feature.nacl_trap),
+        .llvm_name = "nacl-trap",
+        .description = "NaCl trap",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.neon)] = .{
+        .index = @enumToInt(Feature.neon),
+        .name = @tagName(Feature.neon),
+        .llvm_name = "neon",
+        .description = "Enable NEON instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp3,
+        }),
+    };
+    result[@enumToInt(Feature.neon_fpmovs)] = .{
+        .index = @enumToInt(Feature.neon_fpmovs),
+        .name = @tagName(Feature.neon_fpmovs),
+        .llvm_name = "neon-fpmovs",
+        .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.neonfp)] = .{
+        .index = @enumToInt(Feature.neonfp),
+        .name = @tagName(Feature.neonfp),
+        .llvm_name = "neonfp",
+        .description = "Use NEON for single precision FP",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_branch_predictor)] = .{
+        .index = @enumToInt(Feature.no_branch_predictor),
+        .name = @tagName(Feature.no_branch_predictor),
+        .llvm_name = "no-branch-predictor",
+        .description = "Has no branch predictor",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_movt)] = .{
+        .index = @enumToInt(Feature.no_movt),
+        .name = @tagName(Feature.no_movt),
+        .llvm_name = "no-movt",
+        .description = "Don't use movt/movw pairs for 32-bit imms",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_neg_immediates)] = .{
+        .index = @enumToInt(Feature.no_neg_immediates),
+        .name = @tagName(Feature.no_neg_immediates),
+        .llvm_name = "no-neg-immediates",
+        .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.noarm)] = .{
+        .index = @enumToInt(Feature.noarm),
+        .name = @tagName(Feature.noarm),
+        .llvm_name = "noarm",
+        .description = "Does not support ARM mode execution",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nonpipelined_vfp)] = .{
+        .index = @enumToInt(Feature.nonpipelined_vfp),
+        .name = @tagName(Feature.nonpipelined_vfp),
+        .llvm_name = "nonpipelined-vfp",
+        .description = "VFP instructions are not pipelined",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.perfmon)] = .{
+        .index = @enumToInt(Feature.perfmon),
+        .name = @tagName(Feature.perfmon),
+        .llvm_name = "perfmon",
+        .description = "Enable support for Performance Monitor extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.prefer_ishst)] = .{
+        .index = @enumToInt(Feature.prefer_ishst),
+        .name = @tagName(Feature.prefer_ishst),
+        .llvm_name = "prefer-ishst",
+        .description = "Prefer ISHST barriers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.prefer_vmovsr)] = .{
+        .index = @enumToInt(Feature.prefer_vmovsr),
+        .name = @tagName(Feature.prefer_vmovsr),
+        .llvm_name = "prefer-vmovsr",
+        .description = "Prefer VMOVSR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.prof_unpr)] = .{
+        .index = @enumToInt(Feature.prof_unpr),
+        .name = @tagName(Feature.prof_unpr),
+        .llvm_name = "prof-unpr",
+        .description = "Is profitable to unpredicate",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.r4)] = .{
+        .index = @enumToInt(Feature.r4),
+        .name = @tagName(Feature.r4),
+        .llvm_name = "r4",
+        .description = "Cortex-R4 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.r5)] = .{
+        .index = @enumToInt(Feature.r5),
+        .name = @tagName(Feature.r5),
+        .llvm_name = "r5",
+        .description = "Cortex-R5 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.r52)] = .{
+        .index = @enumToInt(Feature.r52),
+        .name = @tagName(Feature.r52),
+        .llvm_name = "r52",
+        .description = "Cortex-R52 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.r7)] = .{
+        .index = @enumToInt(Feature.r7),
+        .name = @tagName(Feature.r7),
+        .llvm_name = "r7",
+        .description = "Cortex-R7 ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ras)] = .{
+        .index = @enumToInt(Feature.ras),
+        .name = @tagName(Feature.ras),
+        .llvm_name = "ras",
+        .description = "Enable Reliability, Availability and Serviceability extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rclass)] = .{
+        .index = @enumToInt(Feature.rclass),
+        .name = @tagName(Feature.rclass),
+        .llvm_name = "rclass",
+        .description = "Is realtime profile ('R' series)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.read_tp_hard)] = .{
+        .index = @enumToInt(Feature.read_tp_hard),
+        .name = @tagName(Feature.read_tp_hard),
+        .llvm_name = "read-tp-hard",
+        .description = "Reading thread pointer from register",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserve_r9)] = .{
+        .index = @enumToInt(Feature.reserve_r9),
+        .name = @tagName(Feature.reserve_r9),
+        .llvm_name = "reserve-r9",
+        .description = "Reserve R9, making it unavailable as GPR",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ret_addr_stack)] = .{
+        .index = @enumToInt(Feature.ret_addr_stack),
+        .name = @tagName(Feature.ret_addr_stack),
+        .llvm_name = "ret-addr-stack",
+        .description = "Has return address stack",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sb)] = .{
+        .index = @enumToInt(Feature.sb),
+        .name = @tagName(Feature.sb),
+        .llvm_name = "sb",
+        .description = "Enable v8.5a Speculation Barrier",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sha2)] = .{
+        .index = @enumToInt(Feature.sha2),
+        .name = @tagName(Feature.sha2),
+        .llvm_name = "sha2",
+        .description = "Enable SHA1 and SHA256 support",
+        .dependencies = featureSet(&[_]Feature{
+            .neon,
+        }),
+    };
+    result[@enumToInt(Feature.slow_fp_brcc)] = .{
+        .index = @enumToInt(Feature.slow_fp_brcc),
+        .name = @tagName(Feature.slow_fp_brcc),
+        .llvm_name = "slow-fp-brcc",
+        .description = "FP compare + branch is slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_load_D_subreg)] = .{
+        .index = @enumToInt(Feature.slow_load_D_subreg),
+        .name = @tagName(Feature.slow_load_D_subreg),
+        .llvm_name = "slow-load-D-subreg",
+        .description = "Loading into D subregs is slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_odd_reg)] = .{
+        .index = @enumToInt(Feature.slow_odd_reg),
+        .name = @tagName(Feature.slow_odd_reg),
+        .llvm_name = "slow-odd-reg",
+        .description = "VLDM/VSTM starting with an odd register is slow",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_vdup32)] = .{
+        .index = @enumToInt(Feature.slow_vdup32),
+        .name = @tagName(Feature.slow_vdup32),
+        .llvm_name = "slow-vdup32",
+        .description = "Has slow VDUP32 - prefer VMOV",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_vgetlni32)] = .{
+        .index = @enumToInt(Feature.slow_vgetlni32),
+        .name = @tagName(Feature.slow_vgetlni32),
+        .llvm_name = "slow-vgetlni32",
+        .description = "Has slow VGETLNi32 - prefer VMOV",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slowfpvmlx)] = .{
+        .index = @enumToInt(Feature.slowfpvmlx),
+        .name = @tagName(Feature.slowfpvmlx),
+        .llvm_name = "slowfpvmlx",
+        .description = "Disable VFP / NEON MAC instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.soft_float)] = .{
+        .index = @enumToInt(Feature.soft_float),
+        .name = @tagName(Feature.soft_float),
+        .llvm_name = "soft-float",
+        .description = "Use software floating point features.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.splat_vfp_neon)] = .{
+        .index = @enumToInt(Feature.splat_vfp_neon),
+        .name = @tagName(Feature.splat_vfp_neon),
+        .llvm_name = "splat-vfp-neon",
+        .description = "Splat register from VFP to NEON",
+        .dependencies = featureSet(&[_]Feature{
+            .dont_widen_vmovs,
+        }),
+    };
+    result[@enumToInt(Feature.strict_align)] = .{
+        .index = @enumToInt(Feature.strict_align),
+        .name = @tagName(Feature.strict_align),
+        .llvm_name = "strict-align",
+        .description = "Disallow all unaligned memory access",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.swift)] = .{
+        .index = @enumToInt(Feature.swift),
+        .name = @tagName(Feature.swift),
+        .llvm_name = "swift",
+        .description = "Swift ARM processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.thumb_mode)] = .{
+        .index = @enumToInt(Feature.thumb_mode),
+        .name = @tagName(Feature.thumb_mode),
+        .llvm_name = "thumb-mode",
+        .description = "Thumb mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.thumb2)] = .{
+        .index = @enumToInt(Feature.thumb2),
+        .name = @tagName(Feature.thumb2),
+        .llvm_name = "thumb2",
+        .description = "Enable Thumb2 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.trustzone)] = .{
+        .index = @enumToInt(Feature.trustzone),
+        .name = @tagName(Feature.trustzone),
+        .llvm_name = "trustzone",
+        .description = "Enable support for TrustZone security extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_aa)] = .{
+        .index = @enumToInt(Feature.use_aa),
+        .name = @tagName(Feature.use_aa),
+        .llvm_name = "use-aa",
+        .description = "Use alias analysis during codegen",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_misched)] = .{
+        .index = @enumToInt(Feature.use_misched),
+        .name = @tagName(Feature.use_misched),
+        .llvm_name = "use-misched",
+        .description = "Use the MachineScheduler",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v4t)] = .{
+        .index = @enumToInt(Feature.v4t),
+        .name = @tagName(Feature.v4t),
+        .llvm_name = "v4t",
+        .description = "Support ARM v4T instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v5t)] = .{
+        .index = @enumToInt(Feature.v5t),
+        .name = @tagName(Feature.v5t),
+        .llvm_name = "v5t",
+        .description = "Support ARM v5T instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v4t,
+        }),
+    };
+    result[@enumToInt(Feature.v5te)] = .{
+        .index = @enumToInt(Feature.v5te),
+        .name = @tagName(Feature.v5te),
+        .llvm_name = "v5te",
+        .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v5t,
+        }),
+    };
+    result[@enumToInt(Feature.v6)] = .{
+        .index = @enumToInt(Feature.v6),
+        .name = @tagName(Feature.v6),
+        .llvm_name = "v6",
+        .description = "Support ARM v6 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v5te,
+        }),
+    };
+    result[@enumToInt(Feature.v6k)] = .{
+        .index = @enumToInt(Feature.v6k),
+        .name = @tagName(Feature.v6k),
+        .llvm_name = "v6k",
+        .description = "Support ARM v6k instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v6,
+        }),
+    };
+    result[@enumToInt(Feature.v6m)] = .{
+        .index = @enumToInt(Feature.v6m),
+        .name = @tagName(Feature.v6m),
+        .llvm_name = "v6m",
+        .description = "Support ARM v6M instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v6,
+        }),
+    };
+    result[@enumToInt(Feature.v6t2)] = .{
+        .index = @enumToInt(Feature.v6t2),
+        .name = @tagName(Feature.v6t2),
+        .llvm_name = "v6t2",
+        .description = "Support ARM v6t2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .thumb2,
+            .v6k,
+            .v8m,
+        }),
+    };
+    result[@enumToInt(Feature.v7)] = .{
+        .index = @enumToInt(Feature.v7),
+        .name = @tagName(Feature.v7),
+        .llvm_name = "v7",
+        .description = "Support ARM v7 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .perfmon,
+            .v6t2,
+            .v7clrex,
+        }),
+    };
+    result[@enumToInt(Feature.v7clrex)] = .{
+        .index = @enumToInt(Feature.v7clrex),
+        .name = @tagName(Feature.v7clrex),
+        .llvm_name = "v7clrex",
+        .description = "Has v7 clrex instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v8)] = .{
+        .index = @enumToInt(Feature.v8),
+        .name = @tagName(Feature.v8),
+        .llvm_name = "v8",
+        .description = "Support ARM v8 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .acquire_release,
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.v8_1a)] = .{
+        .index = @enumToInt(Feature.v8_1a),
+        .name = @tagName(Feature.v8_1a),
+        .llvm_name = "v8.1a",
+        .description = "Support ARM v8.1a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v8,
+        }),
+    };
+    result[@enumToInt(Feature.v8_1m_main)] = .{
+        .index = @enumToInt(Feature.v8_1m_main),
+        .name = @tagName(Feature.v8_1m_main),
+        .llvm_name = "v8.1m.main",
+        .description = "Support ARM v8-1M Mainline instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v8m_main,
+        }),
+    };
+    result[@enumToInt(Feature.v8_2a)] = .{
+        .index = @enumToInt(Feature.v8_2a),
+        .name = @tagName(Feature.v8_2a),
+        .llvm_name = "v8.2a",
+        .description = "Support ARM v8.2a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v8_1a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_3a)] = .{
+        .index = @enumToInt(Feature.v8_3a),
+        .name = @tagName(Feature.v8_3a),
+        .llvm_name = "v8.3a",
+        .description = "Support ARM v8.3a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_4a)] = .{
+        .index = @enumToInt(Feature.v8_4a),
+        .name = @tagName(Feature.v8_4a),
+        .llvm_name = "v8.4a",
+        .description = "Support ARM v8.4a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .dotprod,
+            .v8_3a,
+        }),
+    };
+    result[@enumToInt(Feature.v8_5a)] = .{
+        .index = @enumToInt(Feature.v8_5a),
+        .name = @tagName(Feature.v8_5a),
+        .llvm_name = "v8.5a",
+        .description = "Support ARM v8.5a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sb,
+            .v8_4a,
+        }),
+    };
+    result[@enumToInt(Feature.v8m)] = .{
+        .index = @enumToInt(Feature.v8m),
+        .name = @tagName(Feature.v8m),
+        .llvm_name = "v8m",
+        .description = "Support ARM v8M Baseline instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v6m,
+        }),
+    };
+    result[@enumToInt(Feature.v8m_main)] = .{
+        .index = @enumToInt(Feature.v8m_main),
+        .name = @tagName(Feature.v8m_main),
+        .llvm_name = "v8m.main",
+        .description = "Support ARM v8M Mainline instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .v7,
+        }),
+    };
+    result[@enumToInt(Feature.vfp2)] = .{
+        .index = @enumToInt(Feature.vfp2),
+        .name = @tagName(Feature.vfp2),
+        .llvm_name = "vfp2",
+        .description = "Enable VFP2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp2d16,
+            .vfp2sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp2d16)] = .{
+        .index = @enumToInt(Feature.vfp2d16),
+        .name = @tagName(Feature.vfp2d16),
+        .llvm_name = "vfp2d16",
+        .description = "Enable VFP2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+            .vfp2d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp2d16sp)] = .{
+        .index = @enumToInt(Feature.vfp2d16sp),
+        .name = @tagName(Feature.vfp2d16sp),
+        .llvm_name = "vfp2d16sp",
+        .description = "Enable VFP2 instructions with no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .fpregs,
+        }),
+    };
+    result[@enumToInt(Feature.vfp2sp)] = .{
+        .index = @enumToInt(Feature.vfp2sp),
+        .name = @tagName(Feature.vfp2sp),
+        .llvm_name = "vfp2sp",
+        .description = "Enable VFP2 instructions with no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp2d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp3)] = .{
+        .index = @enumToInt(Feature.vfp3),
+        .name = @tagName(Feature.vfp3),
+        .llvm_name = "vfp3",
+        .description = "Enable VFP3 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp3d16,
+            .vfp3sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp3d16)] = .{
+        .index = @enumToInt(Feature.vfp3d16),
+        .name = @tagName(Feature.vfp3d16),
+        .llvm_name = "vfp3d16",
+        .description = "Enable VFP3 instructions with only 16 d-registers",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+            .vfp2,
+            .vfp3d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp3d16sp)] = .{
+        .index = @enumToInt(Feature.vfp3d16sp),
+        .name = @tagName(Feature.vfp3d16sp),
+        .llvm_name = "vfp3d16sp",
+        .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .vfp2sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp3sp)] = .{
+        .index = @enumToInt(Feature.vfp3sp),
+        .name = @tagName(Feature.vfp3sp),
+        .llvm_name = "vfp3sp",
+        .description = "Enable VFP3 instructions with no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .d32,
+            .vfp3d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp4)] = .{
+        .index = @enumToInt(Feature.vfp4),
+        .name = @tagName(Feature.vfp4),
+        .llvm_name = "vfp4",
+        .description = "Enable VFP4 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp16,
+            .vfp3,
+            .vfp4d16,
+            .vfp4sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp4d16)] = .{
+        .index = @enumToInt(Feature.vfp4d16),
+        .name = @tagName(Feature.vfp4d16),
+        .llvm_name = "vfp4d16",
+        .description = "Enable VFP4 instructions with only 16 d-registers",
+        .dependencies = featureSet(&[_]Feature{
+            .fp16,
+            .fp64,
+            .vfp3d16,
+            .vfp4d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp4d16sp)] = .{
+        .index = @enumToInt(Feature.vfp4d16sp),
+        .name = @tagName(Feature.vfp4d16sp),
+        .llvm_name = "vfp4d16sp",
+        .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .fp16,
+            .vfp3d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.vfp4sp)] = .{
+        .index = @enumToInt(Feature.vfp4sp),
+        .name = @tagName(Feature.vfp4sp),
+        .llvm_name = "vfp4sp",
+        .description = "Enable VFP4 instructions with no double precision",
+        .dependencies = featureSet(&[_]Feature{
+            .d32,
+            .fp16,
+            .vfp3sp,
+            .vfp4d16sp,
+        }),
+    };
+    result[@enumToInt(Feature.virtualization)] = .{
+        .index = @enumToInt(Feature.virtualization),
+        .name = @tagName(Feature.virtualization),
+        .llvm_name = "virtualization",
+        .description = "Supports Virtualization extension",
+        .dependencies = featureSet(&[_]Feature{
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    result[@enumToInt(Feature.vldn_align)] = .{
+        .index = @enumToInt(Feature.vldn_align),
+        .name = @tagName(Feature.vldn_align),
+        .llvm_name = "vldn-align",
+        .description = "Check for VLDn unaligned access",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vmlx_forwarding)] = .{
+        .index = @enumToInt(Feature.vmlx_forwarding),
+        .name = @tagName(Feature.vmlx_forwarding),
+        .llvm_name = "vmlx-forwarding",
+        .description = "Has multiplier accumulator forwarding",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vmlx_hazards)] = .{
+        .index = @enumToInt(Feature.vmlx_hazards),
+        .name = @tagName(Feature.vmlx_hazards),
+        .llvm_name = "vmlx-hazards",
+        .description = "Has VMLx hazards",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.wide_stride_vfp)] = .{
+        .index = @enumToInt(Feature.wide_stride_vfp),
+        .name = @tagName(Feature.wide_stride_vfp),
+        .llvm_name = "wide-stride-vfp",
+        .description = "Use a wide stride when allocating VFP registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.xscale)] = .{
+        .index = @enumToInt(Feature.xscale),
+        .name = @tagName(Feature.xscale),
+        .llvm_name = "xscale",
+        .description = "ARMv5te architecture",
+        .dependencies = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    result[@enumToInt(Feature.zcz)] = .{
+        .index = @enumToInt(Feature.zcz),
+        .name = @tagName(Feature.zcz),
+        .llvm_name = "zcz",
+        .description = "Has zero-cycle zeroing instructions",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const arm1020e = Cpu{
+        .name = "arm1020e",
+        .llvm_name = "arm1020e",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm1020t = Cpu{
+        .name = "arm1020t",
+        .llvm_name = "arm1020t",
+        .features = featureSet(&[_]Feature{
+            .armv5t,
+        }),
+    };
+    pub const arm1022e = Cpu{
+        .name = "arm1022e",
+        .llvm_name = "arm1022e",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm10e = Cpu{
+        .name = "arm10e",
+        .llvm_name = "arm10e",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm10tdmi = Cpu{
+        .name = "arm10tdmi",
+        .llvm_name = "arm10tdmi",
+        .features = featureSet(&[_]Feature{
+            .armv5t,
+        }),
+    };
+    pub const arm1136j_s = Cpu{
+        .name = "arm1136j_s",
+        .llvm_name = "arm1136j-s",
+        .features = featureSet(&[_]Feature{
+            .armv6,
+        }),
+    };
+    pub const arm1136jf_s = Cpu{
+        .name = "arm1136jf_s",
+        .llvm_name = "arm1136jf-s",
+        .features = featureSet(&[_]Feature{
+            .armv6,
+            .slowfpvmlx,
+            .vfp2,
+        }),
+    };
+    pub const arm1156t2_s = Cpu{
+        .name = "arm1156t2_s",
+        .llvm_name = "arm1156t2-s",
+        .features = featureSet(&[_]Feature{
+            .armv6t2,
+        }),
+    };
+    pub const arm1156t2f_s = Cpu{
+        .name = "arm1156t2f_s",
+        .llvm_name = "arm1156t2f-s",
+        .features = featureSet(&[_]Feature{
+            .armv6t2,
+            .slowfpvmlx,
+            .vfp2,
+        }),
+    };
+    pub const arm1176j_s = Cpu{
+        .name = "arm1176j_s",
+        .llvm_name = "arm1176j-s",
+        .features = featureSet(&[_]Feature{
+            .armv6kz,
+        }),
+    };
+    pub const arm1176jz_s = Cpu{
+        .name = "arm1176jz_s",
+        .llvm_name = "arm1176jz-s",
+        .features = featureSet(&[_]Feature{
+            .armv6kz,
+        }),
+    };
+    pub const arm1176jzf_s = Cpu{
+        .name = "arm1176jzf_s",
+        .llvm_name = "arm1176jzf-s",
+        .features = featureSet(&[_]Feature{
+            .armv6kz,
+            .slowfpvmlx,
+            .vfp2,
+        }),
+    };
+    pub const arm710t = Cpu{
+        .name = "arm710t",
+        .llvm_name = "arm710t",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm720t = Cpu{
+        .name = "arm720t",
+        .llvm_name = "arm720t",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm7tdmi = Cpu{
+        .name = "arm7tdmi",
+        .llvm_name = "arm7tdmi",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm7tdmi_s = Cpu{
+        .name = "arm7tdmi_s",
+        .llvm_name = "arm7tdmi-s",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm8 = Cpu{
+        .name = "arm8",
+        .llvm_name = "arm8",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const arm810 = Cpu{
+        .name = "arm810",
+        .llvm_name = "arm810",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const arm9 = Cpu{
+        .name = "arm9",
+        .llvm_name = "arm9",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm920 = Cpu{
+        .name = "arm920",
+        .llvm_name = "arm920",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm920t = Cpu{
+        .name = "arm920t",
+        .llvm_name = "arm920t",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm922t = Cpu{
+        .name = "arm922t",
+        .llvm_name = "arm922t",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm926ej_s = Cpu{
+        .name = "arm926ej_s",
+        .llvm_name = "arm926ej-s",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm940t = Cpu{
+        .name = "arm940t",
+        .llvm_name = "arm940t",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const arm946e_s = Cpu{
+        .name = "arm946e_s",
+        .llvm_name = "arm946e-s",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm966e_s = Cpu{
+        .name = "arm966e_s",
+        .llvm_name = "arm966e-s",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm968e_s = Cpu{
+        .name = "arm968e_s",
+        .llvm_name = "arm968e-s",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm9e = Cpu{
+        .name = "arm9e",
+        .llvm_name = "arm9e",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const arm9tdmi = Cpu{
+        .name = "arm9tdmi",
+        .llvm_name = "arm9tdmi",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const cortex_a12 = Cpu{
+        .name = "cortex_a12",
+        .llvm_name = "cortex-a12",
+        .features = featureSet(&[_]Feature{
+            .a12,
+            .armv7_a,
+            .avoid_partial_cpsr,
+            .mp,
+            .ret_addr_stack,
+            .trustzone,
+            .vfp4,
+            .virtualization,
+            .vmlx_forwarding,
+        }),
+    };
+    pub const cortex_a15 = Cpu{
+        .name = "cortex_a15",
+        .llvm_name = "cortex-a15",
+        .features = featureSet(&[_]Feature{
+            .a15,
+            .armv7_a,
+            .avoid_partial_cpsr,
+            .dont_widen_vmovs,
+            .mp,
+            .muxed_units,
+            .ret_addr_stack,
+            .splat_vfp_neon,
+            .trustzone,
+            .vfp4,
+            .virtualization,
+            .vldn_align,
+        }),
+    };
+    pub const cortex_a17 = Cpu{
+        .name = "cortex_a17",
+        .llvm_name = "cortex-a17",
+        .features = featureSet(&[_]Feature{
+            .a17,
+            .armv7_a,
+            .avoid_partial_cpsr,
+            .mp,
+            .ret_addr_stack,
+            .trustzone,
+            .vfp4,
+            .virtualization,
+            .vmlx_forwarding,
+        }),
+    };
+    pub const cortex_a32 = Cpu{
+        .name = "cortex_a32",
+        .llvm_name = "cortex-a32",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .crc,
+            .crypto,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a35 = Cpu{
+        .name = "cortex_a35",
+        .llvm_name = "cortex-a35",
+        .features = featureSet(&[_]Feature{
+            .a35,
+            .armv8_a,
+            .crc,
+            .crypto,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a5 = Cpu{
+        .name = "cortex_a5",
+        .llvm_name = "cortex-a5",
+        .features = featureSet(&[_]Feature{
+            .a5,
+            .armv7_a,
+            .mp,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .trustzone,
+            .vfp4,
+            .vmlx_forwarding,
+        }),
+    };
+    pub const cortex_a53 = Cpu{
+        .name = "cortex_a53",
+        .llvm_name = "cortex-a53",
+        .features = featureSet(&[_]Feature{
+            .a53,
+            .armv8_a,
+            .crc,
+            .crypto,
+            .fpao,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a55 = Cpu{
+        .name = "cortex_a55",
+        .llvm_name = "cortex-a55",
+        .features = featureSet(&[_]Feature{
+            .a55,
+            .armv8_2_a,
+            .dotprod,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a57 = Cpu{
+        .name = "cortex_a57",
+        .llvm_name = "cortex-a57",
+        .features = featureSet(&[_]Feature{
+            .a57,
+            .armv8_a,
+            .avoid_partial_cpsr,
+            .cheap_predicable_cpsr,
+            .crc,
+            .crypto,
+            .fpao,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a7 = Cpu{
+        .name = "cortex_a7",
+        .llvm_name = "cortex-a7",
+        .features = featureSet(&[_]Feature{
+            .a7,
+            .armv7_a,
+            .mp,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .trustzone,
+            .vfp4,
+            .virtualization,
+            .vmlx_forwarding,
+            .vmlx_hazards,
+        }),
+    };
+    pub const cortex_a72 = Cpu{
+        .name = "cortex_a72",
+        .llvm_name = "cortex-a72",
+        .features = featureSet(&[_]Feature{
+            .a72,
+            .armv8_a,
+            .crc,
+            .crypto,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a73 = Cpu{
+        .name = "cortex_a73",
+        .llvm_name = "cortex-a73",
+        .features = featureSet(&[_]Feature{
+            .a73,
+            .armv8_a,
+            .crc,
+            .crypto,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a75 = Cpu{
+        .name = "cortex_a75",
+        .llvm_name = "cortex-a75",
+        .features = featureSet(&[_]Feature{
+            .a75,
+            .armv8_2_a,
+            .dotprod,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a76 = Cpu{
+        .name = "cortex_a76",
+        .llvm_name = "cortex-a76",
+        .features = featureSet(&[_]Feature{
+            .a76,
+            .armv8_2_a,
+            .crc,
+            .crypto,
+            .dotprod,
+            .fullfp16,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a76ae = Cpu{
+        .name = "cortex_a76ae",
+        .llvm_name = "cortex-a76ae",
+        .features = featureSet(&[_]Feature{
+            .a76,
+            .armv8_2_a,
+            .crc,
+            .crypto,
+            .dotprod,
+            .fullfp16,
+            .hwdiv,
+            .hwdiv_arm,
+        }),
+    };
+    pub const cortex_a8 = Cpu{
+        .name = "cortex_a8",
+        .llvm_name = "cortex-a8",
+        .features = featureSet(&[_]Feature{
+            .a8,
+            .armv7_a,
+            .nonpipelined_vfp,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .trustzone,
+            .vmlx_forwarding,
+            .vmlx_hazards,
+        }),
+    };
+    pub const cortex_a9 = Cpu{
+        .name = "cortex_a9",
+        .llvm_name = "cortex-a9",
+        .features = featureSet(&[_]Feature{
+            .a9,
+            .armv7_a,
+            .avoid_partial_cpsr,
+            .expand_fp_mlx,
+            .fp16,
+            .mp,
+            .muxed_units,
+            .neon_fpmovs,
+            .prefer_vmovsr,
+            .ret_addr_stack,
+            .trustzone,
+            .vldn_align,
+            .vmlx_forwarding,
+            .vmlx_hazards,
+        }),
+    };
+    pub const cortex_m0 = Cpu{
+        .name = "cortex_m0",
+        .llvm_name = "cortex-m0",
+        .features = featureSet(&[_]Feature{
+            .armv6_m,
+        }),
+    };
+    pub const cortex_m0plus = Cpu{
+        .name = "cortex_m0plus",
+        .llvm_name = "cortex-m0plus",
+        .features = featureSet(&[_]Feature{
+            .armv6_m,
+        }),
+    };
+    pub const cortex_m1 = Cpu{
+        .name = "cortex_m1",
+        .llvm_name = "cortex-m1",
+        .features = featureSet(&[_]Feature{
+            .armv6_m,
+        }),
+    };
+    pub const cortex_m23 = Cpu{
+        .name = "cortex_m23",
+        .llvm_name = "cortex-m23",
+        .features = featureSet(&[_]Feature{
+            .armv8_m_base,
+            .no_movt,
+        }),
+    };
+    pub const cortex_m3 = Cpu{
+        .name = "cortex_m3",
+        .llvm_name = "cortex-m3",
+        .features = featureSet(&[_]Feature{
+            .armv7_m,
+            .loop_align,
+            .m3,
+            .no_branch_predictor,
+            .use_aa,
+            .use_misched,
+        }),
+    };
+    pub const cortex_m33 = Cpu{
+        .name = "cortex_m33",
+        .llvm_name = "cortex-m33",
+        .features = featureSet(&[_]Feature{
+            .armv8_m_main,
+            .dsp,
+            .fp_armv8d16sp,
+            .loop_align,
+            .no_branch_predictor,
+            .slowfpvmlx,
+            .use_aa,
+            .use_misched,
+        }),
+    };
+    pub const cortex_m35p = Cpu{
+        .name = "cortex_m35p",
+        .llvm_name = "cortex-m35p",
+        .features = featureSet(&[_]Feature{
+            .armv8_m_main,
+            .dsp,
+            .fp_armv8d16sp,
+            .loop_align,
+            .no_branch_predictor,
+            .slowfpvmlx,
+            .use_aa,
+            .use_misched,
+        }),
+    };
+    pub const cortex_m4 = Cpu{
+        .name = "cortex_m4",
+        .llvm_name = "cortex-m4",
+        .features = featureSet(&[_]Feature{
+            .armv7e_m,
+            .loop_align,
+            .no_branch_predictor,
+            .slowfpvmlx,
+            .use_aa,
+            .use_misched,
+            .vfp4d16sp,
+        }),
+    };
+    pub const cortex_m7 = Cpu{
+        .name = "cortex_m7",
+        .llvm_name = "cortex-m7",
+        .features = featureSet(&[_]Feature{
+            .armv7e_m,
+            .fp_armv8d16,
+        }),
+    };
+    pub const cortex_r4 = Cpu{
+        .name = "cortex_r4",
+        .llvm_name = "cortex-r4",
+        .features = featureSet(&[_]Feature{
+            .armv7_r,
+            .avoid_partial_cpsr,
+            .r4,
+            .ret_addr_stack,
+        }),
+    };
+    pub const cortex_r4f = Cpu{
+        .name = "cortex_r4f",
+        .llvm_name = "cortex-r4f",
+        .features = featureSet(&[_]Feature{
+            .armv7_r,
+            .avoid_partial_cpsr,
+            .r4,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .vfp3d16,
+        }),
+    };
+    pub const cortex_r5 = Cpu{
+        .name = "cortex_r5",
+        .llvm_name = "cortex-r5",
+        .features = featureSet(&[_]Feature{
+            .armv7_r,
+            .avoid_partial_cpsr,
+            .hwdiv_arm,
+            .r5,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .vfp3d16,
+        }),
+    };
+    pub const cortex_r52 = Cpu{
+        .name = "cortex_r52",
+        .llvm_name = "cortex-r52",
+        .features = featureSet(&[_]Feature{
+            .armv8_r,
+            .fpao,
+            .r52,
+            .use_aa,
+            .use_misched,
+        }),
+    };
+    pub const cortex_r7 = Cpu{
+        .name = "cortex_r7",
+        .llvm_name = "cortex-r7",
+        .features = featureSet(&[_]Feature{
+            .armv7_r,
+            .avoid_partial_cpsr,
+            .fp16,
+            .hwdiv_arm,
+            .mp,
+            .r7,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .vfp3d16,
+        }),
+    };
+    pub const cortex_r8 = Cpu{
+        .name = "cortex_r8",
+        .llvm_name = "cortex-r8",
+        .features = featureSet(&[_]Feature{
+            .armv7_r,
+            .avoid_partial_cpsr,
+            .fp16,
+            .hwdiv_arm,
+            .mp,
+            .ret_addr_stack,
+            .slow_fp_brcc,
+            .slowfpvmlx,
+            .vfp3d16,
+        }),
+    };
+    pub const cyclone = Cpu{
+        .name = "cyclone",
+        .llvm_name = "cyclone",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .avoid_movs_shop,
+            .avoid_partial_cpsr,
+            .crypto,
+            .disable_postra_scheduler,
+            .hwdiv,
+            .hwdiv_arm,
+            .mp,
+            .neonfp,
+            .ret_addr_stack,
+            .slowfpvmlx,
+            .swift,
+            .use_misched,
+            .vfp4,
+            .zcz,
+        }),
+    };
+    pub const ep9312 = Cpu{
+        .name = "ep9312",
+        .llvm_name = "ep9312",
+        .features = featureSet(&[_]Feature{
+            .armv4t,
+        }),
+    };
+    pub const exynos_m1 = Cpu{
+        .name = "exynos_m1",
+        .llvm_name = "exynos-m1",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .exynos,
+        }),
+    };
+    pub const exynos_m2 = Cpu{
+        .name = "exynos_m2",
+        .llvm_name = "exynos-m2",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .exynos,
+        }),
+    };
+    pub const exynos_m3 = Cpu{
+        .name = "exynos_m3",
+        .llvm_name = "exynos-m3",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .exynos,
+        }),
+    };
+    pub const exynos_m4 = Cpu{
+        .name = "exynos_m4",
+        .llvm_name = "exynos-m4",
+        .features = featureSet(&[_]Feature{
+            .armv8_2_a,
+            .dotprod,
+            .exynos,
+            .fullfp16,
+        }),
+    };
+    pub const exynos_m5 = Cpu{
+        .name = "exynos_m5",
+        .llvm_name = "exynos-m5",
+        .features = featureSet(&[_]Feature{
+            .armv8_2_a,
+            .dotprod,
+            .exynos,
+            .fullfp16,
+        }),
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const iwmmxt = Cpu{
+        .name = "iwmmxt",
+        .llvm_name = "iwmmxt",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+    pub const krait = Cpu{
+        .name = "krait",
+        .llvm_name = "krait",
+        .features = featureSet(&[_]Feature{
+            .armv7_a,
+            .avoid_partial_cpsr,
+            .fp16,
+            .hwdiv,
+            .hwdiv_arm,
+            .krait,
+            .muxed_units,
+            .ret_addr_stack,
+            .vfp4,
+            .vldn_align,
+            .vmlx_forwarding,
+        }),
+    };
+    pub const kryo = Cpu{
+        .name = "kryo",
+        .llvm_name = "kryo",
+        .features = featureSet(&[_]Feature{
+            .armv8_a,
+            .crc,
+            .crypto,
+            .hwdiv,
+            .hwdiv_arm,
+            .kryo,
+        }),
+    };
+    pub const mpcore = Cpu{
+        .name = "mpcore",
+        .llvm_name = "mpcore",
+        .features = featureSet(&[_]Feature{
+            .armv6k,
+            .slowfpvmlx,
+            .vfp2,
+        }),
+    };
+    pub const mpcorenovfp = Cpu{
+        .name = "mpcorenovfp",
+        .llvm_name = "mpcorenovfp",
+        .features = featureSet(&[_]Feature{
+            .armv6k,
+        }),
+    };
+    pub const sc000 = Cpu{
+        .name = "sc000",
+        .llvm_name = "sc000",
+        .features = featureSet(&[_]Feature{
+            .armv6_m,
+        }),
+    };
+    pub const sc300 = Cpu{
+        .name = "sc300",
+        .llvm_name = "sc300",
+        .features = featureSet(&[_]Feature{
+            .armv7_m,
+            .m3,
+            .no_branch_predictor,
+            .use_aa,
+            .use_misched,
+        }),
+    };
+    pub const strongarm = Cpu{
+        .name = "strongarm",
+        .llvm_name = "strongarm",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const strongarm110 = Cpu{
+        .name = "strongarm110",
+        .llvm_name = "strongarm110",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const strongarm1100 = Cpu{
+        .name = "strongarm1100",
+        .llvm_name = "strongarm1100",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const strongarm1110 = Cpu{
+        .name = "strongarm1110",
+        .llvm_name = "strongarm1110",
+        .features = featureSet(&[_]Feature{
+            .armv4,
+        }),
+    };
+    pub const swift = Cpu{
+        .name = "swift",
+        .llvm_name = "swift",
+        .features = featureSet(&[_]Feature{
+            .armv7_a,
+            .avoid_movs_shop,
+            .avoid_partial_cpsr,
+            .disable_postra_scheduler,
+            .hwdiv,
+            .hwdiv_arm,
+            .mp,
+            .neonfp,
+            .prefer_ishst,
+            .prof_unpr,
+            .ret_addr_stack,
+            .slow_load_D_subreg,
+            .slow_odd_reg,
+            .slow_vdup32,
+            .slow_vgetlni32,
+            .slowfpvmlx,
+            .swift,
+            .use_misched,
+            .vfp4,
+            .vmlx_hazards,
+            .wide_stride_vfp,
+        }),
+    };
+    pub const xscale = Cpu{
+        .name = "xscale",
+        .llvm_name = "xscale",
+        .features = featureSet(&[_]Feature{
+            .armv5te,
+        }),
+    };
+};
+
+/// All arm CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.arm1020e,
+    &cpu.arm1020t,
+    &cpu.arm1022e,
+    &cpu.arm10e,
+    &cpu.arm10tdmi,
+    &cpu.arm1136j_s,
+    &cpu.arm1136jf_s,
+    &cpu.arm1156t2_s,
+    &cpu.arm1156t2f_s,
+    &cpu.arm1176j_s,
+    &cpu.arm1176jz_s,
+    &cpu.arm1176jzf_s,
+    &cpu.arm710t,
+    &cpu.arm720t,
+    &cpu.arm7tdmi,
+    &cpu.arm7tdmi_s,
+    &cpu.arm8,
+    &cpu.arm810,
+    &cpu.arm9,
+    &cpu.arm920,
+    &cpu.arm920t,
+    &cpu.arm922t,
+    &cpu.arm926ej_s,
+    &cpu.arm940t,
+    &cpu.arm946e_s,
+    &cpu.arm966e_s,
+    &cpu.arm968e_s,
+    &cpu.arm9e,
+    &cpu.arm9tdmi,
+    &cpu.cortex_a12,
+    &cpu.cortex_a15,
+    &cpu.cortex_a17,
+    &cpu.cortex_a32,
+    &cpu.cortex_a35,
+    &cpu.cortex_a5,
+    &cpu.cortex_a53,
+    &cpu.cortex_a55,
+    &cpu.cortex_a57,
+    &cpu.cortex_a7,
+    &cpu.cortex_a72,
+    &cpu.cortex_a73,
+    &cpu.cortex_a75,
+    &cpu.cortex_a76,
+    &cpu.cortex_a76ae,
+    &cpu.cortex_a8,
+    &cpu.cortex_a9,
+    &cpu.cortex_m0,
+    &cpu.cortex_m0plus,
+    &cpu.cortex_m1,
+    &cpu.cortex_m23,
+    &cpu.cortex_m3,
+    &cpu.cortex_m33,
+    &cpu.cortex_m35p,
+    &cpu.cortex_m4,
+    &cpu.cortex_m7,
+    &cpu.cortex_r4,
+    &cpu.cortex_r4f,
+    &cpu.cortex_r5,
+    &cpu.cortex_r52,
+    &cpu.cortex_r7,
+    &cpu.cortex_r8,
+    &cpu.cyclone,
+    &cpu.ep9312,
+    &cpu.exynos_m1,
+    &cpu.exynos_m2,
+    &cpu.exynos_m3,
+    &cpu.exynos_m4,
+    &cpu.exynos_m5,
+    &cpu.generic,
+    &cpu.iwmmxt,
+    &cpu.krait,
+    &cpu.kryo,
+    &cpu.mpcore,
+    &cpu.mpcorenovfp,
+    &cpu.sc000,
+    &cpu.sc300,
+    &cpu.strongarm,
+    &cpu.strongarm110,
+    &cpu.strongarm1100,
+    &cpu.strongarm1110,
+    &cpu.swift,
+    &cpu.xscale,
 };
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 21b1591b7bdcb8876388bf284ca563bab4856909..fecb45b69ee7d71532a0643cfc2439f162e6bbee 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -1,4791 +1,2441 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_addsubiw = Feature{
-    .name = "addsubiw",
-    .llvm_name = "addsubiw",
-    .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_break = Feature{
-    .name = "break",
-    .llvm_name = "break",
-    .description = "The device supports the `BREAK` debugging instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_des = Feature{
-    .name = "des",
-    .llvm_name = "des",
-    .description = "The device supports the `DES k` encryption instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_eijmpcall = Feature{
-    .name = "eijmpcall",
-    .llvm_name = "eijmpcall",
-    .description = "The device supports the `EIJMP`/`EICALL` instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_elpm = Feature{
-    .name = "elpm",
-    .llvm_name = "elpm",
-    .description = "The device supports the ELPM instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_elpmx = Feature{
-    .name = "elpmx",
-    .llvm_name = "elpmx",
-    .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ijmpcall = Feature{
-    .name = "ijmpcall",
-    .llvm_name = "ijmpcall",
-    .description = "The device supports `IJMP`/`ICALL`instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_jmpcall = Feature{
-    .name = "jmpcall",
-    .llvm_name = "jmpcall",
-    .description = "The device supports the `JMP` and `CALL` instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lpm = Feature{
-    .name = "lpm",
-    .llvm_name = "lpm",
-    .description = "The device supports the `LPM` instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lpmx = Feature{
-    .name = "lpmx",
-    .llvm_name = "lpmx",
-    .description = "The device supports the `LPM Rd, Z[+]` instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_movw = Feature{
-    .name = "movw",
-    .llvm_name = "movw",
-    .description = "The device supports the 16-bit MOVW instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mul = Feature{
-    .name = "mul",
-    .llvm_name = "mul",
-    .description = "The device supports the multiplication instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_rmw = Feature{
-    .name = "rmw",
-    .llvm_name = "rmw",
-    .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_spm = Feature{
-    .name = "spm",
-    .llvm_name = "spm",
-    .description = "The device supports the `SPM` instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_spmx = Feature{
-    .name = "spmx",
-    .llvm_name = "spmx",
-    .description = "The device supports the `SPM Z+` instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sram = Feature{
-    .name = "sram",
-    .llvm_name = "sram",
-    .description = "The device has random access memory",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_smallstack = Feature{
-    .name = "smallstack",
-    .llvm_name = "smallstack",
-    .description = "The device has an 8-bit stack pointer",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tinyencoding = Feature{
-    .name = "tinyencoding",
-    .llvm_name = "tinyencoding",
-    .description = "The device has Tiny core specific instruction encodings",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_addsubiw,
-    &feature_break,
-    &feature_des,
-    &feature_eijmpcall,
-    &feature_elpm,
-    &feature_elpmx,
-    &feature_ijmpcall,
-    &feature_jmpcall,
-    &feature_lpm,
-    &feature_lpmx,
-    &feature_movw,
-    &feature_mul,
-    &feature_rmw,
-    &feature_spm,
-    &feature_spmx,
-    &feature_sram,
-    &feature_smallstack,
-    &feature_tinyencoding,
-};
-
-pub const cpu_at43usb320 = Cpu{
-    .name = "at43usb320",
-    .llvm_name = "at43usb320",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at43usb355 = Cpu{
-    .name = "at43usb355",
-    .llvm_name = "at43usb355",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at76c711 = Cpu{
-    .name = "at76c711",
-    .llvm_name = "at76c711",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at86rf401 = Cpu{
-    .name = "at86rf401",
-    .llvm_name = "at86rf401",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-    },
-};
-
-pub const cpu_at90c8534 = Cpu{
-    .name = "at90c8534",
-    .llvm_name = "at90c8534",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90can128 = Cpu{
-    .name = "at90can128",
-    .llvm_name = "at90can128",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90can32 = Cpu{
-    .name = "at90can32",
-    .llvm_name = "at90can32",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90can64 = Cpu{
-    .name = "at90can64",
-    .llvm_name = "at90can64",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm1 = Cpu{
-    .name = "at90pwm1",
-    .llvm_name = "at90pwm1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm161 = Cpu{
-    .name = "at90pwm161",
-    .llvm_name = "at90pwm161",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm2 = Cpu{
-    .name = "at90pwm2",
-    .llvm_name = "at90pwm2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm216 = Cpu{
-    .name = "at90pwm216",
-    .llvm_name = "at90pwm216",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm2b = Cpu{
-    .name = "at90pwm2b",
-    .llvm_name = "at90pwm2b",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm3 = Cpu{
-    .name = "at90pwm3",
-    .llvm_name = "at90pwm3",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm316 = Cpu{
-    .name = "at90pwm316",
-    .llvm_name = "at90pwm316",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm3b = Cpu{
-    .name = "at90pwm3b",
-    .llvm_name = "at90pwm3b",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90pwm81 = Cpu{
-    .name = "at90pwm81",
-    .llvm_name = "at90pwm81",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90s1200 = Cpu{
-    .name = "at90s1200",
-    .llvm_name = "at90s1200",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_at90s2313 = Cpu{
-    .name = "at90s2313",
-    .llvm_name = "at90s2313",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s2323 = Cpu{
-    .name = "at90s2323",
-    .llvm_name = "at90s2323",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s2333 = Cpu{
-    .name = "at90s2333",
-    .llvm_name = "at90s2333",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s2343 = Cpu{
-    .name = "at90s2343",
-    .llvm_name = "at90s2343",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s4414 = Cpu{
-    .name = "at90s4414",
-    .llvm_name = "at90s4414",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s4433 = Cpu{
-    .name = "at90s4433",
-    .llvm_name = "at90s4433",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s4434 = Cpu{
-    .name = "at90s4434",
-    .llvm_name = "at90s4434",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s8515 = Cpu{
-    .name = "at90s8515",
-    .llvm_name = "at90s8515",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90s8535 = Cpu{
-    .name = "at90s8535",
-    .llvm_name = "at90s8535",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_at90scr100 = Cpu{
-    .name = "at90scr100",
-    .llvm_name = "at90scr100",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90usb1286 = Cpu{
-    .name = "at90usb1286",
-    .llvm_name = "at90usb1286",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90usb1287 = Cpu{
-    .name = "at90usb1287",
-    .llvm_name = "at90usb1287",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90usb162 = Cpu{
-    .name = "at90usb162",
-    .llvm_name = "at90usb162",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_at90usb646 = Cpu{
-    .name = "at90usb646",
-    .llvm_name = "at90usb646",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90usb647 = Cpu{
-    .name = "at90usb647",
-    .llvm_name = "at90usb647",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_at90usb82 = Cpu{
-    .name = "at90usb82",
-    .llvm_name = "at90usb82",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_at94k = Cpu{
-    .name = "at94k",
-    .llvm_name = "at94k",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-        &feature_mul,
-    },
-};
-
-pub const cpu_ata5272 = Cpu{
-    .name = "ata5272",
-    .llvm_name = "ata5272",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_ata5505 = Cpu{
-    .name = "ata5505",
-    .llvm_name = "ata5505",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_ata5790 = Cpu{
-    .name = "ata5790",
-    .llvm_name = "ata5790",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_ata5795 = Cpu{
-    .name = "ata5795",
-    .llvm_name = "ata5795",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_ata6285 = Cpu{
-    .name = "ata6285",
-    .llvm_name = "ata6285",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_ata6286 = Cpu{
-    .name = "ata6286",
-    .llvm_name = "ata6286",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_ata6289 = Cpu{
-    .name = "ata6289",
-    .llvm_name = "ata6289",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega103 = Cpu{
-    .name = "atmega103",
-    .llvm_name = "atmega103",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_atmega128 = Cpu{
-    .name = "atmega128",
-    .llvm_name = "atmega128",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega1280 = Cpu{
-    .name = "atmega1280",
-    .llvm_name = "atmega1280",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega1281 = Cpu{
-    .name = "atmega1281",
-    .llvm_name = "atmega1281",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega1284 = Cpu{
-    .name = "atmega1284",
-    .llvm_name = "atmega1284",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega1284p = Cpu{
-    .name = "atmega1284p",
-    .llvm_name = "atmega1284p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega1284rfr2 = Cpu{
-    .name = "atmega1284rfr2",
-    .llvm_name = "atmega1284rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega128a = Cpu{
-    .name = "atmega128a",
-    .llvm_name = "atmega128a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega128rfa1 = Cpu{
-    .name = "atmega128rfa1",
-    .llvm_name = "atmega128rfa1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega128rfr2 = Cpu{
-    .name = "atmega128rfr2",
-    .llvm_name = "atmega128rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16 = Cpu{
-    .name = "atmega16",
-    .llvm_name = "atmega16",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega161 = Cpu{
-    .name = "atmega161",
-    .llvm_name = "atmega161",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-        &feature_mul,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega162 = Cpu{
-    .name = "atmega162",
-    .llvm_name = "atmega162",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega163 = Cpu{
-    .name = "atmega163",
-    .llvm_name = "atmega163",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-        &feature_mul,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega164a = Cpu{
-    .name = "atmega164a",
-    .llvm_name = "atmega164a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega164p = Cpu{
-    .name = "atmega164p",
-    .llvm_name = "atmega164p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega164pa = Cpu{
-    .name = "atmega164pa",
-    .llvm_name = "atmega164pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega165 = Cpu{
-    .name = "atmega165",
-    .llvm_name = "atmega165",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega165a = Cpu{
-    .name = "atmega165a",
-    .llvm_name = "atmega165a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega165p = Cpu{
-    .name = "atmega165p",
-    .llvm_name = "atmega165p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega165pa = Cpu{
-    .name = "atmega165pa",
-    .llvm_name = "atmega165pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega168 = Cpu{
-    .name = "atmega168",
-    .llvm_name = "atmega168",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega168a = Cpu{
-    .name = "atmega168a",
-    .llvm_name = "atmega168a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega168p = Cpu{
-    .name = "atmega168p",
-    .llvm_name = "atmega168p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega168pa = Cpu{
-    .name = "atmega168pa",
-    .llvm_name = "atmega168pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega169 = Cpu{
-    .name = "atmega169",
-    .llvm_name = "atmega169",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega169a = Cpu{
-    .name = "atmega169a",
-    .llvm_name = "atmega169a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega169p = Cpu{
-    .name = "atmega169p",
-    .llvm_name = "atmega169p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega169pa = Cpu{
-    .name = "atmega169pa",
-    .llvm_name = "atmega169pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16a = Cpu{
-    .name = "atmega16a",
-    .llvm_name = "atmega16a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16hva = Cpu{
-    .name = "atmega16hva",
-    .llvm_name = "atmega16hva",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16hva2 = Cpu{
-    .name = "atmega16hva2",
-    .llvm_name = "atmega16hva2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16hvb = Cpu{
-    .name = "atmega16hvb",
-    .llvm_name = "atmega16hvb",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16hvbrevb = Cpu{
-    .name = "atmega16hvbrevb",
-    .llvm_name = "atmega16hvbrevb",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16m1 = Cpu{
-    .name = "atmega16m1",
-    .llvm_name = "atmega16m1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega16u2 = Cpu{
-    .name = "atmega16u2",
-    .llvm_name = "atmega16u2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega16u4 = Cpu{
-    .name = "atmega16u4",
-    .llvm_name = "atmega16u4",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega2560 = Cpu{
-    .name = "atmega2560",
-    .llvm_name = "atmega2560",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega2561 = Cpu{
-    .name = "atmega2561",
-    .llvm_name = "atmega2561",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega2564rfr2 = Cpu{
-    .name = "atmega2564rfr2",
-    .llvm_name = "atmega2564rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega256rfr2 = Cpu{
-    .name = "atmega256rfr2",
-    .llvm_name = "atmega256rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32 = Cpu{
-    .name = "atmega32",
-    .llvm_name = "atmega32",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega323 = Cpu{
-    .name = "atmega323",
-    .llvm_name = "atmega323",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega324a = Cpu{
-    .name = "atmega324a",
-    .llvm_name = "atmega324a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega324p = Cpu{
-    .name = "atmega324p",
-    .llvm_name = "atmega324p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega324pa = Cpu{
-    .name = "atmega324pa",
-    .llvm_name = "atmega324pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega325 = Cpu{
-    .name = "atmega325",
-    .llvm_name = "atmega325",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3250 = Cpu{
-    .name = "atmega3250",
-    .llvm_name = "atmega3250",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3250a = Cpu{
-    .name = "atmega3250a",
-    .llvm_name = "atmega3250a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3250p = Cpu{
-    .name = "atmega3250p",
-    .llvm_name = "atmega3250p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3250pa = Cpu{
-    .name = "atmega3250pa",
-    .llvm_name = "atmega3250pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega325a = Cpu{
-    .name = "atmega325a",
-    .llvm_name = "atmega325a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega325p = Cpu{
-    .name = "atmega325p",
-    .llvm_name = "atmega325p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega325pa = Cpu{
-    .name = "atmega325pa",
-    .llvm_name = "atmega325pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega328 = Cpu{
-    .name = "atmega328",
-    .llvm_name = "atmega328",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega328p = Cpu{
-    .name = "atmega328p",
-    .llvm_name = "atmega328p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega329 = Cpu{
-    .name = "atmega329",
-    .llvm_name = "atmega329",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3290 = Cpu{
-    .name = "atmega3290",
-    .llvm_name = "atmega3290",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3290a = Cpu{
-    .name = "atmega3290a",
-    .llvm_name = "atmega3290a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3290p = Cpu{
-    .name = "atmega3290p",
-    .llvm_name = "atmega3290p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega3290pa = Cpu{
-    .name = "atmega3290pa",
-    .llvm_name = "atmega3290pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega329a = Cpu{
-    .name = "atmega329a",
-    .llvm_name = "atmega329a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega329p = Cpu{
-    .name = "atmega329p",
-    .llvm_name = "atmega329p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega329pa = Cpu{
-    .name = "atmega329pa",
-    .llvm_name = "atmega329pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32a = Cpu{
-    .name = "atmega32a",
-    .llvm_name = "atmega32a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32c1 = Cpu{
-    .name = "atmega32c1",
-    .llvm_name = "atmega32c1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32hvb = Cpu{
-    .name = "atmega32hvb",
-    .llvm_name = "atmega32hvb",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32hvbrevb = Cpu{
-    .name = "atmega32hvbrevb",
-    .llvm_name = "atmega32hvbrevb",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32m1 = Cpu{
-    .name = "atmega32m1",
-    .llvm_name = "atmega32m1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32u2 = Cpu{
-    .name = "atmega32u2",
-    .llvm_name = "atmega32u2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega32u4 = Cpu{
-    .name = "atmega32u4",
-    .llvm_name = "atmega32u4",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega32u6 = Cpu{
-    .name = "atmega32u6",
-    .llvm_name = "atmega32u6",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega406 = Cpu{
-    .name = "atmega406",
-    .llvm_name = "atmega406",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega48 = Cpu{
-    .name = "atmega48",
-    .llvm_name = "atmega48",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega48a = Cpu{
-    .name = "atmega48a",
-    .llvm_name = "atmega48a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega48p = Cpu{
-    .name = "atmega48p",
-    .llvm_name = "atmega48p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega48pa = Cpu{
-    .name = "atmega48pa",
-    .llvm_name = "atmega48pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64 = Cpu{
-    .name = "atmega64",
-    .llvm_name = "atmega64",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega640 = Cpu{
-    .name = "atmega640",
-    .llvm_name = "atmega640",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega644 = Cpu{
-    .name = "atmega644",
-    .llvm_name = "atmega644",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega644a = Cpu{
-    .name = "atmega644a",
-    .llvm_name = "atmega644a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega644p = Cpu{
-    .name = "atmega644p",
-    .llvm_name = "atmega644p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega644pa = Cpu{
-    .name = "atmega644pa",
-    .llvm_name = "atmega644pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega644rfr2 = Cpu{
-    .name = "atmega644rfr2",
-    .llvm_name = "atmega644rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega645 = Cpu{
-    .name = "atmega645",
-    .llvm_name = "atmega645",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6450 = Cpu{
-    .name = "atmega6450",
-    .llvm_name = "atmega6450",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6450a = Cpu{
-    .name = "atmega6450a",
-    .llvm_name = "atmega6450a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6450p = Cpu{
-    .name = "atmega6450p",
-    .llvm_name = "atmega6450p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega645a = Cpu{
-    .name = "atmega645a",
-    .llvm_name = "atmega645a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega645p = Cpu{
-    .name = "atmega645p",
-    .llvm_name = "atmega645p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega649 = Cpu{
-    .name = "atmega649",
-    .llvm_name = "atmega649",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6490 = Cpu{
-    .name = "atmega6490",
-    .llvm_name = "atmega6490",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6490a = Cpu{
-    .name = "atmega6490a",
-    .llvm_name = "atmega6490a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega6490p = Cpu{
-    .name = "atmega6490p",
-    .llvm_name = "atmega6490p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega649a = Cpu{
-    .name = "atmega649a",
-    .llvm_name = "atmega649a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega649p = Cpu{
-    .name = "atmega649p",
-    .llvm_name = "atmega649p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64a = Cpu{
-    .name = "atmega64a",
-    .llvm_name = "atmega64a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64c1 = Cpu{
-    .name = "atmega64c1",
-    .llvm_name = "atmega64c1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64hve = Cpu{
-    .name = "atmega64hve",
-    .llvm_name = "atmega64hve",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64m1 = Cpu{
-    .name = "atmega64m1",
-    .llvm_name = "atmega64m1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega64rfr2 = Cpu{
-    .name = "atmega64rfr2",
-    .llvm_name = "atmega64rfr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega8 = Cpu{
-    .name = "atmega8",
-    .llvm_name = "atmega8",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega8515 = Cpu{
-    .name = "atmega8515",
-    .llvm_name = "atmega8515",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-        &feature_mul,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega8535 = Cpu{
-    .name = "atmega8535",
-    .llvm_name = "atmega8535",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-        &feature_movw,
-        &feature_mul,
-        &feature_spm,
-    },
-};
-
-pub const cpu_atmega88 = Cpu{
-    .name = "atmega88",
-    .llvm_name = "atmega88",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega88a = Cpu{
-    .name = "atmega88a",
-    .llvm_name = "atmega88a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega88p = Cpu{
-    .name = "atmega88p",
-    .llvm_name = "atmega88p",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega88pa = Cpu{
-    .name = "atmega88pa",
-    .llvm_name = "atmega88pa",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega8a = Cpu{
-    .name = "atmega8a",
-    .llvm_name = "atmega8a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega8hva = Cpu{
-    .name = "atmega8hva",
-    .llvm_name = "atmega8hva",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atmega8u2 = Cpu{
-    .name = "atmega8u2",
-    .llvm_name = "atmega8u2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny10 = Cpu{
-    .name = "attiny10",
-    .llvm_name = "attiny10",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny102 = Cpu{
-    .name = "attiny102",
-    .llvm_name = "attiny102",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny104 = Cpu{
-    .name = "attiny104",
-    .llvm_name = "attiny104",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny11 = Cpu{
-    .name = "attiny11",
-    .llvm_name = "attiny11",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-    },
-};
-
-pub const cpu_attiny12 = Cpu{
-    .name = "attiny12",
-    .llvm_name = "attiny12",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-    },
-};
-
-pub const cpu_attiny13 = Cpu{
-    .name = "attiny13",
-    .llvm_name = "attiny13",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny13a = Cpu{
-    .name = "attiny13a",
-    .llvm_name = "attiny13a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny15 = Cpu{
-    .name = "attiny15",
-    .llvm_name = "attiny15",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-    },
-};
-
-pub const cpu_attiny1634 = Cpu{
-    .name = "attiny1634",
-    .llvm_name = "attiny1634",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny167 = Cpu{
-    .name = "attiny167",
-    .llvm_name = "attiny167",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny20 = Cpu{
-    .name = "attiny20",
-    .llvm_name = "attiny20",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny22 = Cpu{
-    .name = "attiny22",
-    .llvm_name = "attiny22",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_attiny2313 = Cpu{
-    .name = "attiny2313",
-    .llvm_name = "attiny2313",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny2313a = Cpu{
-    .name = "attiny2313a",
-    .llvm_name = "attiny2313a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny24 = Cpu{
-    .name = "attiny24",
-    .llvm_name = "attiny24",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny24a = Cpu{
-    .name = "attiny24a",
-    .llvm_name = "attiny24a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny25 = Cpu{
-    .name = "attiny25",
-    .llvm_name = "attiny25",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny26 = Cpu{
-    .name = "attiny26",
-    .llvm_name = "attiny26",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-        &feature_lpmx,
-    },
-};
-
-pub const cpu_attiny261 = Cpu{
-    .name = "attiny261",
-    .llvm_name = "attiny261",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny261a = Cpu{
-    .name = "attiny261a",
-    .llvm_name = "attiny261a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny28 = Cpu{
-    .name = "attiny28",
-    .llvm_name = "attiny28",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-    },
-};
-
-pub const cpu_attiny4 = Cpu{
-    .name = "attiny4",
-    .llvm_name = "attiny4",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny40 = Cpu{
-    .name = "attiny40",
-    .llvm_name = "attiny40",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny4313 = Cpu{
-    .name = "attiny4313",
-    .llvm_name = "attiny4313",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny43u = Cpu{
-    .name = "attiny43u",
-    .llvm_name = "attiny43u",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny44 = Cpu{
-    .name = "attiny44",
-    .llvm_name = "attiny44",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny44a = Cpu{
-    .name = "attiny44a",
-    .llvm_name = "attiny44a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny45 = Cpu{
-    .name = "attiny45",
-    .llvm_name = "attiny45",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny461 = Cpu{
-    .name = "attiny461",
-    .llvm_name = "attiny461",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny461a = Cpu{
-    .name = "attiny461a",
-    .llvm_name = "attiny461a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny48 = Cpu{
-    .name = "attiny48",
-    .llvm_name = "attiny48",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny5 = Cpu{
-    .name = "attiny5",
-    .llvm_name = "attiny5",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_attiny828 = Cpu{
-    .name = "attiny828",
-    .llvm_name = "attiny828",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny84 = Cpu{
-    .name = "attiny84",
-    .llvm_name = "attiny84",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny84a = Cpu{
-    .name = "attiny84a",
-    .llvm_name = "attiny84a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny85 = Cpu{
-    .name = "attiny85",
-    .llvm_name = "attiny85",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny861 = Cpu{
-    .name = "attiny861",
-    .llvm_name = "attiny861",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny861a = Cpu{
-    .name = "attiny861a",
-    .llvm_name = "attiny861a",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny87 = Cpu{
-    .name = "attiny87",
-    .llvm_name = "attiny87",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny88 = Cpu{
-    .name = "attiny88",
-    .llvm_name = "attiny88",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_attiny9 = Cpu{
-    .name = "attiny9",
-    .llvm_name = "attiny9",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_atxmega128a1 = Cpu{
-    .name = "atxmega128a1",
-    .llvm_name = "atxmega128a1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128a1u = Cpu{
-    .name = "atxmega128a1u",
-    .llvm_name = "atxmega128a1u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128a3 = Cpu{
-    .name = "atxmega128a3",
-    .llvm_name = "atxmega128a3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128a3u = Cpu{
-    .name = "atxmega128a3u",
-    .llvm_name = "atxmega128a3u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128a4u = Cpu{
-    .name = "atxmega128a4u",
-    .llvm_name = "atxmega128a4u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128b1 = Cpu{
-    .name = "atxmega128b1",
-    .llvm_name = "atxmega128b1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128b3 = Cpu{
-    .name = "atxmega128b3",
-    .llvm_name = "atxmega128b3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128c3 = Cpu{
-    .name = "atxmega128c3",
-    .llvm_name = "atxmega128c3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128d3 = Cpu{
-    .name = "atxmega128d3",
-    .llvm_name = "atxmega128d3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega128d4 = Cpu{
-    .name = "atxmega128d4",
-    .llvm_name = "atxmega128d4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega16a4 = Cpu{
-    .name = "atxmega16a4",
-    .llvm_name = "atxmega16a4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega16a4u = Cpu{
-    .name = "atxmega16a4u",
-    .llvm_name = "atxmega16a4u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega16c4 = Cpu{
-    .name = "atxmega16c4",
-    .llvm_name = "atxmega16c4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega16d4 = Cpu{
-    .name = "atxmega16d4",
-    .llvm_name = "atxmega16d4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega16e5 = Cpu{
-    .name = "atxmega16e5",
-    .llvm_name = "atxmega16e5",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega192a3 = Cpu{
-    .name = "atxmega192a3",
-    .llvm_name = "atxmega192a3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega192a3u = Cpu{
-    .name = "atxmega192a3u",
-    .llvm_name = "atxmega192a3u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega192c3 = Cpu{
-    .name = "atxmega192c3",
-    .llvm_name = "atxmega192c3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega192d3 = Cpu{
-    .name = "atxmega192d3",
-    .llvm_name = "atxmega192d3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256a3 = Cpu{
-    .name = "atxmega256a3",
-    .llvm_name = "atxmega256a3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256a3b = Cpu{
-    .name = "atxmega256a3b",
-    .llvm_name = "atxmega256a3b",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256a3bu = Cpu{
-    .name = "atxmega256a3bu",
-    .llvm_name = "atxmega256a3bu",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256a3u = Cpu{
-    .name = "atxmega256a3u",
-    .llvm_name = "atxmega256a3u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256c3 = Cpu{
-    .name = "atxmega256c3",
-    .llvm_name = "atxmega256c3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega256d3 = Cpu{
-    .name = "atxmega256d3",
-    .llvm_name = "atxmega256d3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32a4 = Cpu{
-    .name = "atxmega32a4",
-    .llvm_name = "atxmega32a4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32a4u = Cpu{
-    .name = "atxmega32a4u",
-    .llvm_name = "atxmega32a4u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32c4 = Cpu{
-    .name = "atxmega32c4",
-    .llvm_name = "atxmega32c4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32d4 = Cpu{
-    .name = "atxmega32d4",
-    .llvm_name = "atxmega32d4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32e5 = Cpu{
-    .name = "atxmega32e5",
-    .llvm_name = "atxmega32e5",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega32x1 = Cpu{
-    .name = "atxmega32x1",
-    .llvm_name = "atxmega32x1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega384c3 = Cpu{
-    .name = "atxmega384c3",
-    .llvm_name = "atxmega384c3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega384d3 = Cpu{
-    .name = "atxmega384d3",
-    .llvm_name = "atxmega384d3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64a1 = Cpu{
-    .name = "atxmega64a1",
-    .llvm_name = "atxmega64a1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64a1u = Cpu{
-    .name = "atxmega64a1u",
-    .llvm_name = "atxmega64a1u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64a3 = Cpu{
-    .name = "atxmega64a3",
-    .llvm_name = "atxmega64a3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64a3u = Cpu{
-    .name = "atxmega64a3u",
-    .llvm_name = "atxmega64a3u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64a4u = Cpu{
-    .name = "atxmega64a4u",
-    .llvm_name = "atxmega64a4u",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64b1 = Cpu{
-    .name = "atxmega64b1",
-    .llvm_name = "atxmega64b1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64b3 = Cpu{
-    .name = "atxmega64b3",
-    .llvm_name = "atxmega64b3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64c3 = Cpu{
-    .name = "atxmega64c3",
-    .llvm_name = "atxmega64c3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_rmw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64d3 = Cpu{
-    .name = "atxmega64d3",
-    .llvm_name = "atxmega64d3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega64d4 = Cpu{
-    .name = "atxmega64d4",
-    .llvm_name = "atxmega64d4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_atxmega8e5 = Cpu{
-    .name = "atxmega8e5",
-    .llvm_name = "atxmega8e5",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avr1 = Cpu{
-    .name = "avr1",
-    .llvm_name = "avr1",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-    },
-};
-
-pub const cpu_avr2 = Cpu{
-    .name = "avr2",
-    .llvm_name = "avr2",
-    .dependencies = &[_]*const Feature {
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_avr25 = Cpu{
-    .name = "avr25",
-    .llvm_name = "avr25",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_avr3 = Cpu{
-    .name = "avr3",
-    .llvm_name = "avr3",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_avr31 = Cpu{
-    .name = "avr31",
-    .llvm_name = "avr31",
-    .dependencies = &[_]*const Feature {
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_ijmpcall,
-    },
-};
-
-pub const cpu_avr35 = Cpu{
-    .name = "avr35",
-    .llvm_name = "avr35",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-    },
-};
-
-pub const cpu_avr4 = Cpu{
-    .name = "avr4",
-    .llvm_name = "avr4",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avr5 = Cpu{
-    .name = "avr5",
-    .llvm_name = "avr5",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avr51 = Cpu{
-    .name = "avr51",
-    .llvm_name = "avr51",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avr6 = Cpu{
-    .name = "avr6",
-    .llvm_name = "avr6",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrtiny = Cpu{
-    .name = "avrtiny",
-    .llvm_name = "avrtiny",
-    .dependencies = &[_]*const Feature {
-        &feature_sram,
-        &feature_break,
-        &feature_tinyencoding,
-    },
-};
-
-pub const cpu_avrxmega1 = Cpu{
-    .name = "avrxmega1",
-    .llvm_name = "avrxmega1",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega2 = Cpu{
-    .name = "avrxmega2",
-    .llvm_name = "avrxmega2",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega3 = Cpu{
-    .name = "avrxmega3",
-    .llvm_name = "avrxmega3",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega4 = Cpu{
-    .name = "avrxmega4",
-    .llvm_name = "avrxmega4",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega5 = Cpu{
-    .name = "avrxmega5",
-    .llvm_name = "avrxmega5",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega6 = Cpu{
-    .name = "avrxmega6",
-    .llvm_name = "avrxmega6",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_avrxmega7 = Cpu{
-    .name = "avrxmega7",
-    .llvm_name = "avrxmega7",
-    .dependencies = &[_]*const Feature {
-        &feature_spmx,
-        &feature_des,
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_elpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_elpmx,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_eijmpcall,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpu_m3000 = Cpu{
-    .name = "m3000",
-    .llvm_name = "m3000",
-    .dependencies = &[_]*const Feature {
-        &feature_lpmx,
-        &feature_jmpcall,
-        &feature_lpm,
-        &feature_sram,
-        &feature_addsubiw,
-        &feature_movw,
-        &feature_ijmpcall,
-        &feature_break,
-        &feature_spm,
-        &feature_mul,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_at43usb320,
-    &cpu_at43usb355,
-    &cpu_at76c711,
-    &cpu_at86rf401,
-    &cpu_at90c8534,
-    &cpu_at90can128,
-    &cpu_at90can32,
-    &cpu_at90can64,
-    &cpu_at90pwm1,
-    &cpu_at90pwm161,
-    &cpu_at90pwm2,
-    &cpu_at90pwm216,
-    &cpu_at90pwm2b,
-    &cpu_at90pwm3,
-    &cpu_at90pwm316,
-    &cpu_at90pwm3b,
-    &cpu_at90pwm81,
-    &cpu_at90s1200,
-    &cpu_at90s2313,
-    &cpu_at90s2323,
-    &cpu_at90s2333,
-    &cpu_at90s2343,
-    &cpu_at90s4414,
-    &cpu_at90s4433,
-    &cpu_at90s4434,
-    &cpu_at90s8515,
-    &cpu_at90s8535,
-    &cpu_at90scr100,
-    &cpu_at90usb1286,
-    &cpu_at90usb1287,
-    &cpu_at90usb162,
-    &cpu_at90usb646,
-    &cpu_at90usb647,
-    &cpu_at90usb82,
-    &cpu_at94k,
-    &cpu_ata5272,
-    &cpu_ata5505,
-    &cpu_ata5790,
-    &cpu_ata5795,
-    &cpu_ata6285,
-    &cpu_ata6286,
-    &cpu_ata6289,
-    &cpu_atmega103,
-    &cpu_atmega128,
-    &cpu_atmega1280,
-    &cpu_atmega1281,
-    &cpu_atmega1284,
-    &cpu_atmega1284p,
-    &cpu_atmega1284rfr2,
-    &cpu_atmega128a,
-    &cpu_atmega128rfa1,
-    &cpu_atmega128rfr2,
-    &cpu_atmega16,
-    &cpu_atmega161,
-    &cpu_atmega162,
-    &cpu_atmega163,
-    &cpu_atmega164a,
-    &cpu_atmega164p,
-    &cpu_atmega164pa,
-    &cpu_atmega165,
-    &cpu_atmega165a,
-    &cpu_atmega165p,
-    &cpu_atmega165pa,
-    &cpu_atmega168,
-    &cpu_atmega168a,
-    &cpu_atmega168p,
-    &cpu_atmega168pa,
-    &cpu_atmega169,
-    &cpu_atmega169a,
-    &cpu_atmega169p,
-    &cpu_atmega169pa,
-    &cpu_atmega16a,
-    &cpu_atmega16hva,
-    &cpu_atmega16hva2,
-    &cpu_atmega16hvb,
-    &cpu_atmega16hvbrevb,
-    &cpu_atmega16m1,
-    &cpu_atmega16u2,
-    &cpu_atmega16u4,
-    &cpu_atmega2560,
-    &cpu_atmega2561,
-    &cpu_atmega2564rfr2,
-    &cpu_atmega256rfr2,
-    &cpu_atmega32,
-    &cpu_atmega323,
-    &cpu_atmega324a,
-    &cpu_atmega324p,
-    &cpu_atmega324pa,
-    &cpu_atmega325,
-    &cpu_atmega3250,
-    &cpu_atmega3250a,
-    &cpu_atmega3250p,
-    &cpu_atmega3250pa,
-    &cpu_atmega325a,
-    &cpu_atmega325p,
-    &cpu_atmega325pa,
-    &cpu_atmega328,
-    &cpu_atmega328p,
-    &cpu_atmega329,
-    &cpu_atmega3290,
-    &cpu_atmega3290a,
-    &cpu_atmega3290p,
-    &cpu_atmega3290pa,
-    &cpu_atmega329a,
-    &cpu_atmega329p,
-    &cpu_atmega329pa,
-    &cpu_atmega32a,
-    &cpu_atmega32c1,
-    &cpu_atmega32hvb,
-    &cpu_atmega32hvbrevb,
-    &cpu_atmega32m1,
-    &cpu_atmega32u2,
-    &cpu_atmega32u4,
-    &cpu_atmega32u6,
-    &cpu_atmega406,
-    &cpu_atmega48,
-    &cpu_atmega48a,
-    &cpu_atmega48p,
-    &cpu_atmega48pa,
-    &cpu_atmega64,
-    &cpu_atmega640,
-    &cpu_atmega644,
-    &cpu_atmega644a,
-    &cpu_atmega644p,
-    &cpu_atmega644pa,
-    &cpu_atmega644rfr2,
-    &cpu_atmega645,
-    &cpu_atmega6450,
-    &cpu_atmega6450a,
-    &cpu_atmega6450p,
-    &cpu_atmega645a,
-    &cpu_atmega645p,
-    &cpu_atmega649,
-    &cpu_atmega6490,
-    &cpu_atmega6490a,
-    &cpu_atmega6490p,
-    &cpu_atmega649a,
-    &cpu_atmega649p,
-    &cpu_atmega64a,
-    &cpu_atmega64c1,
-    &cpu_atmega64hve,
-    &cpu_atmega64m1,
-    &cpu_atmega64rfr2,
-    &cpu_atmega8,
-    &cpu_atmega8515,
-    &cpu_atmega8535,
-    &cpu_atmega88,
-    &cpu_atmega88a,
-    &cpu_atmega88p,
-    &cpu_atmega88pa,
-    &cpu_atmega8a,
-    &cpu_atmega8hva,
-    &cpu_atmega8u2,
-    &cpu_attiny10,
-    &cpu_attiny102,
-    &cpu_attiny104,
-    &cpu_attiny11,
-    &cpu_attiny12,
-    &cpu_attiny13,
-    &cpu_attiny13a,
-    &cpu_attiny15,
-    &cpu_attiny1634,
-    &cpu_attiny167,
-    &cpu_attiny20,
-    &cpu_attiny22,
-    &cpu_attiny2313,
-    &cpu_attiny2313a,
-    &cpu_attiny24,
-    &cpu_attiny24a,
-    &cpu_attiny25,
-    &cpu_attiny26,
-    &cpu_attiny261,
-    &cpu_attiny261a,
-    &cpu_attiny28,
-    &cpu_attiny4,
-    &cpu_attiny40,
-    &cpu_attiny4313,
-    &cpu_attiny43u,
-    &cpu_attiny44,
-    &cpu_attiny44a,
-    &cpu_attiny45,
-    &cpu_attiny461,
-    &cpu_attiny461a,
-    &cpu_attiny48,
-    &cpu_attiny5,
-    &cpu_attiny828,
-    &cpu_attiny84,
-    &cpu_attiny84a,
-    &cpu_attiny85,
-    &cpu_attiny861,
-    &cpu_attiny861a,
-    &cpu_attiny87,
-    &cpu_attiny88,
-    &cpu_attiny9,
-    &cpu_atxmega128a1,
-    &cpu_atxmega128a1u,
-    &cpu_atxmega128a3,
-    &cpu_atxmega128a3u,
-    &cpu_atxmega128a4u,
-    &cpu_atxmega128b1,
-    &cpu_atxmega128b3,
-    &cpu_atxmega128c3,
-    &cpu_atxmega128d3,
-    &cpu_atxmega128d4,
-    &cpu_atxmega16a4,
-    &cpu_atxmega16a4u,
-    &cpu_atxmega16c4,
-    &cpu_atxmega16d4,
-    &cpu_atxmega16e5,
-    &cpu_atxmega192a3,
-    &cpu_atxmega192a3u,
-    &cpu_atxmega192c3,
-    &cpu_atxmega192d3,
-    &cpu_atxmega256a3,
-    &cpu_atxmega256a3b,
-    &cpu_atxmega256a3bu,
-    &cpu_atxmega256a3u,
-    &cpu_atxmega256c3,
-    &cpu_atxmega256d3,
-    &cpu_atxmega32a4,
-    &cpu_atxmega32a4u,
-    &cpu_atxmega32c4,
-    &cpu_atxmega32d4,
-    &cpu_atxmega32e5,
-    &cpu_atxmega32x1,
-    &cpu_atxmega384c3,
-    &cpu_atxmega384d3,
-    &cpu_atxmega64a1,
-    &cpu_atxmega64a1u,
-    &cpu_atxmega64a3,
-    &cpu_atxmega64a3u,
-    &cpu_atxmega64a4u,
-    &cpu_atxmega64b1,
-    &cpu_atxmega64b3,
-    &cpu_atxmega64c3,
-    &cpu_atxmega64d3,
-    &cpu_atxmega64d4,
-    &cpu_atxmega8e5,
-    &cpu_avr1,
-    &cpu_avr2,
-    &cpu_avr25,
-    &cpu_avr3,
-    &cpu_avr31,
-    &cpu_avr35,
-    &cpu_avr4,
-    &cpu_avr5,
-    &cpu_avr51,
-    &cpu_avr6,
-    &cpu_avrtiny,
-    &cpu_avrxmega1,
-    &cpu_avrxmega2,
-    &cpu_avrxmega3,
-    &cpu_avrxmega4,
-    &cpu_avrxmega5,
-    &cpu_avrxmega6,
-    &cpu_avrxmega7,
-    &cpu_m3000,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    addsubiw,
+    avr0,
+    avr1,
+    avr2,
+    avr25,
+    avr3,
+    avr31,
+    avr35,
+    avr4,
+    avr5,
+    avr51,
+    avr6,
+    avrtiny,
+    break,
+    des,
+    eijmpcall,
+    elpm,
+    elpmx,
+    ijmpcall,
+    jmpcall,
+    lpm,
+    lpmx,
+    movw,
+    mul,
+    rmw,
+    smallstack,
+    special,
+    spm,
+    spmx,
+    sram,
+    tinyencoding,
+    xmega,
+    xmegau,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.addsubiw)] = .{
+        .index = @enumToInt(Feature.addsubiw),
+        .name = @tagName(Feature.addsubiw),
+        .llvm_name = "addsubiw",
+        .description = "Enable 16-bit register-immediate addition and subtraction instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.avr0)] = .{
+        .index = @enumToInt(Feature.avr0),
+        .name = @tagName(Feature.avr0),
+        .llvm_name = "avr0",
+        .description = "The device is a part of the avr0 family",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.avr1)] = .{
+        .index = @enumToInt(Feature.avr1),
+        .name = @tagName(Feature.avr1),
+        .llvm_name = "avr1",
+        .description = "The device is a part of the avr1 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr0,
+            .lpm,
+        }),
+    };
+    result[@enumToInt(Feature.avr2)] = .{
+        .index = @enumToInt(Feature.avr2),
+        .name = @tagName(Feature.avr2),
+        .llvm_name = "avr2",
+        .description = "The device is a part of the avr2 family",
+        .dependencies = featureSet(&[_]Feature{
+            .addsubiw,
+            .avr1,
+            .ijmpcall,
+            .sram,
+        }),
+    };
+    result[@enumToInt(Feature.avr25)] = .{
+        .index = @enumToInt(Feature.avr25),
+        .name = @tagName(Feature.avr25),
+        .llvm_name = "avr25",
+        .description = "The device is a part of the avr25 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr2,
+            .break,
+            .lpmx,
+            .movw,
+            .spm,
+        }),
+    };
+    result[@enumToInt(Feature.avr3)] = .{
+        .index = @enumToInt(Feature.avr3),
+        .name = @tagName(Feature.avr3),
+        .llvm_name = "avr3",
+        .description = "The device is a part of the avr3 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr2,
+            .jmpcall,
+        }),
+    };
+    result[@enumToInt(Feature.avr31)] = .{
+        .index = @enumToInt(Feature.avr31),
+        .name = @tagName(Feature.avr31),
+        .llvm_name = "avr31",
+        .description = "The device is a part of the avr31 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr3,
+            .elpm,
+        }),
+    };
+    result[@enumToInt(Feature.avr35)] = .{
+        .index = @enumToInt(Feature.avr35),
+        .name = @tagName(Feature.avr35),
+        .llvm_name = "avr35",
+        .description = "The device is a part of the avr35 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr3,
+            .break,
+            .lpmx,
+            .movw,
+            .spm,
+        }),
+    };
+    result[@enumToInt(Feature.avr4)] = .{
+        .index = @enumToInt(Feature.avr4),
+        .name = @tagName(Feature.avr4),
+        .llvm_name = "avr4",
+        .description = "The device is a part of the avr4 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr2,
+            .break,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    result[@enumToInt(Feature.avr5)] = .{
+        .index = @enumToInt(Feature.avr5),
+        .name = @tagName(Feature.avr5),
+        .llvm_name = "avr5",
+        .description = "The device is a part of the avr5 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr3,
+            .break,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    result[@enumToInt(Feature.avr51)] = .{
+        .index = @enumToInt(Feature.avr51),
+        .name = @tagName(Feature.avr51),
+        .llvm_name = "avr51",
+        .description = "The device is a part of the avr51 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr5,
+            .elpm,
+            .elpmx,
+        }),
+    };
+    result[@enumToInt(Feature.avr6)] = .{
+        .index = @enumToInt(Feature.avr6),
+        .name = @tagName(Feature.avr6),
+        .llvm_name = "avr6",
+        .description = "The device is a part of the avr6 family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    result[@enumToInt(Feature.avrtiny)] = .{
+        .index = @enumToInt(Feature.avrtiny),
+        .name = @tagName(Feature.avrtiny),
+        .llvm_name = "avrtiny",
+        .description = "The device is a part of the avrtiny family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr0,
+            .break,
+            .sram,
+            .tinyencoding,
+        }),
+    };
+    result[@enumToInt(Feature.break)] = .{
+        .index = @enumToInt(Feature.break),
+        .name = @tagName(Feature.break),
+        .llvm_name = "break",
+        .description = "The device supports the `BREAK` debugging instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.des)] = .{
+        .index = @enumToInt(Feature.des),
+        .name = @tagName(Feature.des),
+        .llvm_name = "des",
+        .description = "The device supports the `DES k` encryption instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.eijmpcall)] = .{
+        .index = @enumToInt(Feature.eijmpcall),
+        .name = @tagName(Feature.eijmpcall),
+        .llvm_name = "eijmpcall",
+        .description = "The device supports the `EIJMP`/`EICALL` instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.elpm)] = .{
+        .index = @enumToInt(Feature.elpm),
+        .name = @tagName(Feature.elpm),
+        .llvm_name = "elpm",
+        .description = "The device supports the ELPM instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.elpmx)] = .{
+        .index = @enumToInt(Feature.elpmx),
+        .name = @tagName(Feature.elpmx),
+        .llvm_name = "elpmx",
+        .description = "The device supports the `ELPM Rd, Z[+]` instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ijmpcall)] = .{
+        .index = @enumToInt(Feature.ijmpcall),
+        .name = @tagName(Feature.ijmpcall),
+        .llvm_name = "ijmpcall",
+        .description = "The device supports `IJMP`/`ICALL`instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.jmpcall)] = .{
+        .index = @enumToInt(Feature.jmpcall),
+        .name = @tagName(Feature.jmpcall),
+        .llvm_name = "jmpcall",
+        .description = "The device supports the `JMP` and `CALL` instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lpm)] = .{
+        .index = @enumToInt(Feature.lpm),
+        .name = @tagName(Feature.lpm),
+        .llvm_name = "lpm",
+        .description = "The device supports the `LPM` instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lpmx)] = .{
+        .index = @enumToInt(Feature.lpmx),
+        .name = @tagName(Feature.lpmx),
+        .llvm_name = "lpmx",
+        .description = "The device supports the `LPM Rd, Z[+]` instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.movw)] = .{
+        .index = @enumToInt(Feature.movw),
+        .name = @tagName(Feature.movw),
+        .llvm_name = "movw",
+        .description = "The device supports the 16-bit MOVW instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mul)] = .{
+        .index = @enumToInt(Feature.mul),
+        .name = @tagName(Feature.mul),
+        .llvm_name = "mul",
+        .description = "The device supports the multiplication instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.rmw)] = .{
+        .index = @enumToInt(Feature.rmw),
+        .name = @tagName(Feature.rmw),
+        .llvm_name = "rmw",
+        .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.smallstack)] = .{
+        .index = @enumToInt(Feature.smallstack),
+        .name = @tagName(Feature.smallstack),
+        .llvm_name = "smallstack",
+        .description = "The device has an 8-bit stack pointer",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.special)] = .{
+        .index = @enumToInt(Feature.special),
+        .name = @tagName(Feature.special),
+        .llvm_name = "special",
+        .description = "Enable use of the entire instruction set - used for debugging",
+        .dependencies = featureSet(&[_]Feature{
+            .addsubiw,
+            .break,
+            .des,
+            .eijmpcall,
+            .elpm,
+            .elpmx,
+            .ijmpcall,
+            .jmpcall,
+            .lpm,
+            .lpmx,
+            .movw,
+            .mul,
+            .rmw,
+            .spm,
+            .spmx,
+            .sram,
+        }),
+    };
+    result[@enumToInt(Feature.spm)] = .{
+        .index = @enumToInt(Feature.spm),
+        .name = @tagName(Feature.spm),
+        .llvm_name = "spm",
+        .description = "The device supports the `SPM` instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.spmx)] = .{
+        .index = @enumToInt(Feature.spmx),
+        .name = @tagName(Feature.spmx),
+        .llvm_name = "spmx",
+        .description = "The device supports the `SPM Z+` instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sram)] = .{
+        .index = @enumToInt(Feature.sram),
+        .name = @tagName(Feature.sram),
+        .llvm_name = "sram",
+        .description = "The device has random access memory",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tinyencoding)] = .{
+        .index = @enumToInt(Feature.tinyencoding),
+        .name = @tagName(Feature.tinyencoding),
+        .llvm_name = "tinyencoding",
+        .description = "The device has Tiny core specific instruction encodings",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.xmega)] = .{
+        .index = @enumToInt(Feature.xmega),
+        .name = @tagName(Feature.xmega),
+        .llvm_name = "xmega",
+        .description = "The device is a part of the xmega family",
+        .dependencies = featureSet(&[_]Feature{
+            .avr51,
+            .des,
+            .eijmpcall,
+            .spmx,
+        }),
+    };
+    result[@enumToInt(Feature.xmegau)] = .{
+        .index = @enumToInt(Feature.xmegau),
+        .name = @tagName(Feature.xmegau),
+        .llvm_name = "xmegau",
+        .description = "The device is a part of the xmegau family",
+        .dependencies = featureSet(&[_]Feature{
+            .rmw,
+            .xmega,
+        }),
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const at43usb320 = Cpu{
+        .name = "at43usb320",
+        .llvm_name = "at43usb320",
+        .features = featureSet(&[_]Feature{
+            .avr31,
+        }),
+    };
+    pub const at43usb355 = Cpu{
+        .name = "at43usb355",
+        .llvm_name = "at43usb355",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+        }),
+    };
+    pub const at76c711 = Cpu{
+        .name = "at76c711",
+        .llvm_name = "at76c711",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+        }),
+    };
+    pub const at86rf401 = Cpu{
+        .name = "at86rf401",
+        .llvm_name = "at86rf401",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+            .lpmx,
+            .movw,
+        }),
+    };
+    pub const at90c8534 = Cpu{
+        .name = "at90c8534",
+        .llvm_name = "at90c8534",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90can128 = Cpu{
+        .name = "at90can128",
+        .llvm_name = "at90can128",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const at90can32 = Cpu{
+        .name = "at90can32",
+        .llvm_name = "at90can32",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90can64 = Cpu{
+        .name = "at90can64",
+        .llvm_name = "at90can64",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90pwm1 = Cpu{
+        .name = "at90pwm1",
+        .llvm_name = "at90pwm1",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90pwm161 = Cpu{
+        .name = "at90pwm161",
+        .llvm_name = "at90pwm161",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90pwm2 = Cpu{
+        .name = "at90pwm2",
+        .llvm_name = "at90pwm2",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90pwm216 = Cpu{
+        .name = "at90pwm216",
+        .llvm_name = "at90pwm216",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90pwm2b = Cpu{
+        .name = "at90pwm2b",
+        .llvm_name = "at90pwm2b",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90pwm3 = Cpu{
+        .name = "at90pwm3",
+        .llvm_name = "at90pwm3",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90pwm316 = Cpu{
+        .name = "at90pwm316",
+        .llvm_name = "at90pwm316",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90pwm3b = Cpu{
+        .name = "at90pwm3b",
+        .llvm_name = "at90pwm3b",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90pwm81 = Cpu{
+        .name = "at90pwm81",
+        .llvm_name = "at90pwm81",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const at90s1200 = Cpu{
+        .name = "at90s1200",
+        .llvm_name = "at90s1200",
+        .features = featureSet(&[_]Feature{
+            .avr0,
+        }),
+    };
+    pub const at90s2313 = Cpu{
+        .name = "at90s2313",
+        .llvm_name = "at90s2313",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s2323 = Cpu{
+        .name = "at90s2323",
+        .llvm_name = "at90s2323",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s2333 = Cpu{
+        .name = "at90s2333",
+        .llvm_name = "at90s2333",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s2343 = Cpu{
+        .name = "at90s2343",
+        .llvm_name = "at90s2343",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s4414 = Cpu{
+        .name = "at90s4414",
+        .llvm_name = "at90s4414",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s4433 = Cpu{
+        .name = "at90s4433",
+        .llvm_name = "at90s4433",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s4434 = Cpu{
+        .name = "at90s4434",
+        .llvm_name = "at90s4434",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s8515 = Cpu{
+        .name = "at90s8515",
+        .llvm_name = "at90s8515",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90s8535 = Cpu{
+        .name = "at90s8535",
+        .llvm_name = "at90s8535",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const at90scr100 = Cpu{
+        .name = "at90scr100",
+        .llvm_name = "at90scr100",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90usb1286 = Cpu{
+        .name = "at90usb1286",
+        .llvm_name = "at90usb1286",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const at90usb1287 = Cpu{
+        .name = "at90usb1287",
+        .llvm_name = "at90usb1287",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const at90usb162 = Cpu{
+        .name = "at90usb162",
+        .llvm_name = "at90usb162",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const at90usb646 = Cpu{
+        .name = "at90usb646",
+        .llvm_name = "at90usb646",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90usb647 = Cpu{
+        .name = "at90usb647",
+        .llvm_name = "at90usb647",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const at90usb82 = Cpu{
+        .name = "at90usb82",
+        .llvm_name = "at90usb82",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const at94k = Cpu{
+        .name = "at94k",
+        .llvm_name = "at94k",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+            .lpmx,
+            .movw,
+            .mul,
+        }),
+    };
+    pub const ata5272 = Cpu{
+        .name = "ata5272",
+        .llvm_name = "ata5272",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const ata5505 = Cpu{
+        .name = "ata5505",
+        .llvm_name = "ata5505",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const ata5790 = Cpu{
+        .name = "ata5790",
+        .llvm_name = "ata5790",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const ata5795 = Cpu{
+        .name = "ata5795",
+        .llvm_name = "ata5795",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const ata6285 = Cpu{
+        .name = "ata6285",
+        .llvm_name = "ata6285",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const ata6286 = Cpu{
+        .name = "ata6286",
+        .llvm_name = "ata6286",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const ata6289 = Cpu{
+        .name = "ata6289",
+        .llvm_name = "ata6289",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega103 = Cpu{
+        .name = "atmega103",
+        .llvm_name = "atmega103",
+        .features = featureSet(&[_]Feature{
+            .avr31,
+        }),
+    };
+    pub const atmega128 = Cpu{
+        .name = "atmega128",
+        .llvm_name = "atmega128",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega1280 = Cpu{
+        .name = "atmega1280",
+        .llvm_name = "atmega1280",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega1281 = Cpu{
+        .name = "atmega1281",
+        .llvm_name = "atmega1281",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega1284 = Cpu{
+        .name = "atmega1284",
+        .llvm_name = "atmega1284",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega1284p = Cpu{
+        .name = "atmega1284p",
+        .llvm_name = "atmega1284p",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega1284rfr2 = Cpu{
+        .name = "atmega1284rfr2",
+        .llvm_name = "atmega1284rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega128a = Cpu{
+        .name = "atmega128a",
+        .llvm_name = "atmega128a",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega128rfa1 = Cpu{
+        .name = "atmega128rfa1",
+        .llvm_name = "atmega128rfa1",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega128rfr2 = Cpu{
+        .name = "atmega128rfr2",
+        .llvm_name = "atmega128rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const atmega16 = Cpu{
+        .name = "atmega16",
+        .llvm_name = "atmega16",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega161 = Cpu{
+        .name = "atmega161",
+        .llvm_name = "atmega161",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    pub const atmega162 = Cpu{
+        .name = "atmega162",
+        .llvm_name = "atmega162",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega163 = Cpu{
+        .name = "atmega163",
+        .llvm_name = "atmega163",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    pub const atmega164a = Cpu{
+        .name = "atmega164a",
+        .llvm_name = "atmega164a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega164p = Cpu{
+        .name = "atmega164p",
+        .llvm_name = "atmega164p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega164pa = Cpu{
+        .name = "atmega164pa",
+        .llvm_name = "atmega164pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega165 = Cpu{
+        .name = "atmega165",
+        .llvm_name = "atmega165",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega165a = Cpu{
+        .name = "atmega165a",
+        .llvm_name = "atmega165a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega165p = Cpu{
+        .name = "atmega165p",
+        .llvm_name = "atmega165p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega165pa = Cpu{
+        .name = "atmega165pa",
+        .llvm_name = "atmega165pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega168 = Cpu{
+        .name = "atmega168",
+        .llvm_name = "atmega168",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega168a = Cpu{
+        .name = "atmega168a",
+        .llvm_name = "atmega168a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega168p = Cpu{
+        .name = "atmega168p",
+        .llvm_name = "atmega168p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega168pa = Cpu{
+        .name = "atmega168pa",
+        .llvm_name = "atmega168pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega169 = Cpu{
+        .name = "atmega169",
+        .llvm_name = "atmega169",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega169a = Cpu{
+        .name = "atmega169a",
+        .llvm_name = "atmega169a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega169p = Cpu{
+        .name = "atmega169p",
+        .llvm_name = "atmega169p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega169pa = Cpu{
+        .name = "atmega169pa",
+        .llvm_name = "atmega169pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16a = Cpu{
+        .name = "atmega16a",
+        .llvm_name = "atmega16a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16hva = Cpu{
+        .name = "atmega16hva",
+        .llvm_name = "atmega16hva",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16hva2 = Cpu{
+        .name = "atmega16hva2",
+        .llvm_name = "atmega16hva2",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16hvb = Cpu{
+        .name = "atmega16hvb",
+        .llvm_name = "atmega16hvb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16hvbrevb = Cpu{
+        .name = "atmega16hvbrevb",
+        .llvm_name = "atmega16hvbrevb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16m1 = Cpu{
+        .name = "atmega16m1",
+        .llvm_name = "atmega16m1",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega16u2 = Cpu{
+        .name = "atmega16u2",
+        .llvm_name = "atmega16u2",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const atmega16u4 = Cpu{
+        .name = "atmega16u4",
+        .llvm_name = "atmega16u4",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega2560 = Cpu{
+        .name = "atmega2560",
+        .llvm_name = "atmega2560",
+        .features = featureSet(&[_]Feature{
+            .avr6,
+        }),
+    };
+    pub const atmega2561 = Cpu{
+        .name = "atmega2561",
+        .llvm_name = "atmega2561",
+        .features = featureSet(&[_]Feature{
+            .avr6,
+        }),
+    };
+    pub const atmega2564rfr2 = Cpu{
+        .name = "atmega2564rfr2",
+        .llvm_name = "atmega2564rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr6,
+        }),
+    };
+    pub const atmega256rfr2 = Cpu{
+        .name = "atmega256rfr2",
+        .llvm_name = "atmega256rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr6,
+        }),
+    };
+    pub const atmega32 = Cpu{
+        .name = "atmega32",
+        .llvm_name = "atmega32",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega323 = Cpu{
+        .name = "atmega323",
+        .llvm_name = "atmega323",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega324a = Cpu{
+        .name = "atmega324a",
+        .llvm_name = "atmega324a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega324p = Cpu{
+        .name = "atmega324p",
+        .llvm_name = "atmega324p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega324pa = Cpu{
+        .name = "atmega324pa",
+        .llvm_name = "atmega324pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega325 = Cpu{
+        .name = "atmega325",
+        .llvm_name = "atmega325",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3250 = Cpu{
+        .name = "atmega3250",
+        .llvm_name = "atmega3250",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3250a = Cpu{
+        .name = "atmega3250a",
+        .llvm_name = "atmega3250a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3250p = Cpu{
+        .name = "atmega3250p",
+        .llvm_name = "atmega3250p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3250pa = Cpu{
+        .name = "atmega3250pa",
+        .llvm_name = "atmega3250pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega325a = Cpu{
+        .name = "atmega325a",
+        .llvm_name = "atmega325a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega325p = Cpu{
+        .name = "atmega325p",
+        .llvm_name = "atmega325p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega325pa = Cpu{
+        .name = "atmega325pa",
+        .llvm_name = "atmega325pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega328 = Cpu{
+        .name = "atmega328",
+        .llvm_name = "atmega328",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega328p = Cpu{
+        .name = "atmega328p",
+        .llvm_name = "atmega328p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega329 = Cpu{
+        .name = "atmega329",
+        .llvm_name = "atmega329",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3290 = Cpu{
+        .name = "atmega3290",
+        .llvm_name = "atmega3290",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3290a = Cpu{
+        .name = "atmega3290a",
+        .llvm_name = "atmega3290a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3290p = Cpu{
+        .name = "atmega3290p",
+        .llvm_name = "atmega3290p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega3290pa = Cpu{
+        .name = "atmega3290pa",
+        .llvm_name = "atmega3290pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega329a = Cpu{
+        .name = "atmega329a",
+        .llvm_name = "atmega329a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega329p = Cpu{
+        .name = "atmega329p",
+        .llvm_name = "atmega329p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega329pa = Cpu{
+        .name = "atmega329pa",
+        .llvm_name = "atmega329pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32a = Cpu{
+        .name = "atmega32a",
+        .llvm_name = "atmega32a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32c1 = Cpu{
+        .name = "atmega32c1",
+        .llvm_name = "atmega32c1",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32hvb = Cpu{
+        .name = "atmega32hvb",
+        .llvm_name = "atmega32hvb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32hvbrevb = Cpu{
+        .name = "atmega32hvbrevb",
+        .llvm_name = "atmega32hvbrevb",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32m1 = Cpu{
+        .name = "atmega32m1",
+        .llvm_name = "atmega32m1",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32u2 = Cpu{
+        .name = "atmega32u2",
+        .llvm_name = "atmega32u2",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const atmega32u4 = Cpu{
+        .name = "atmega32u4",
+        .llvm_name = "atmega32u4",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega32u6 = Cpu{
+        .name = "atmega32u6",
+        .llvm_name = "atmega32u6",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega406 = Cpu{
+        .name = "atmega406",
+        .llvm_name = "atmega406",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega48 = Cpu{
+        .name = "atmega48",
+        .llvm_name = "atmega48",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega48a = Cpu{
+        .name = "atmega48a",
+        .llvm_name = "atmega48a",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega48p = Cpu{
+        .name = "atmega48p",
+        .llvm_name = "atmega48p",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega48pa = Cpu{
+        .name = "atmega48pa",
+        .llvm_name = "atmega48pa",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega64 = Cpu{
+        .name = "atmega64",
+        .llvm_name = "atmega64",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega640 = Cpu{
+        .name = "atmega640",
+        .llvm_name = "atmega640",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega644 = Cpu{
+        .name = "atmega644",
+        .llvm_name = "atmega644",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega644a = Cpu{
+        .name = "atmega644a",
+        .llvm_name = "atmega644a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega644p = Cpu{
+        .name = "atmega644p",
+        .llvm_name = "atmega644p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega644pa = Cpu{
+        .name = "atmega644pa",
+        .llvm_name = "atmega644pa",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega644rfr2 = Cpu{
+        .name = "atmega644rfr2",
+        .llvm_name = "atmega644rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega645 = Cpu{
+        .name = "atmega645",
+        .llvm_name = "atmega645",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6450 = Cpu{
+        .name = "atmega6450",
+        .llvm_name = "atmega6450",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6450a = Cpu{
+        .name = "atmega6450a",
+        .llvm_name = "atmega6450a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6450p = Cpu{
+        .name = "atmega6450p",
+        .llvm_name = "atmega6450p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega645a = Cpu{
+        .name = "atmega645a",
+        .llvm_name = "atmega645a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega645p = Cpu{
+        .name = "atmega645p",
+        .llvm_name = "atmega645p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega649 = Cpu{
+        .name = "atmega649",
+        .llvm_name = "atmega649",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6490 = Cpu{
+        .name = "atmega6490",
+        .llvm_name = "atmega6490",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6490a = Cpu{
+        .name = "atmega6490a",
+        .llvm_name = "atmega6490a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega6490p = Cpu{
+        .name = "atmega6490p",
+        .llvm_name = "atmega6490p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega649a = Cpu{
+        .name = "atmega649a",
+        .llvm_name = "atmega649a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega649p = Cpu{
+        .name = "atmega649p",
+        .llvm_name = "atmega649p",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega64a = Cpu{
+        .name = "atmega64a",
+        .llvm_name = "atmega64a",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega64c1 = Cpu{
+        .name = "atmega64c1",
+        .llvm_name = "atmega64c1",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega64hve = Cpu{
+        .name = "atmega64hve",
+        .llvm_name = "atmega64hve",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega64m1 = Cpu{
+        .name = "atmega64m1",
+        .llvm_name = "atmega64m1",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega64rfr2 = Cpu{
+        .name = "atmega64rfr2",
+        .llvm_name = "atmega64rfr2",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const atmega8 = Cpu{
+        .name = "atmega8",
+        .llvm_name = "atmega8",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega8515 = Cpu{
+        .name = "atmega8515",
+        .llvm_name = "atmega8515",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    pub const atmega8535 = Cpu{
+        .name = "atmega8535",
+        .llvm_name = "atmega8535",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+            .lpmx,
+            .movw,
+            .mul,
+            .spm,
+        }),
+    };
+    pub const atmega88 = Cpu{
+        .name = "atmega88",
+        .llvm_name = "atmega88",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega88a = Cpu{
+        .name = "atmega88a",
+        .llvm_name = "atmega88a",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega88p = Cpu{
+        .name = "atmega88p",
+        .llvm_name = "atmega88p",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega88pa = Cpu{
+        .name = "atmega88pa",
+        .llvm_name = "atmega88pa",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega8a = Cpu{
+        .name = "atmega8a",
+        .llvm_name = "atmega8a",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega8hva = Cpu{
+        .name = "atmega8hva",
+        .llvm_name = "atmega8hva",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const atmega8u2 = Cpu{
+        .name = "atmega8u2",
+        .llvm_name = "atmega8u2",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const attiny10 = Cpu{
+        .name = "attiny10",
+        .llvm_name = "attiny10",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny102 = Cpu{
+        .name = "attiny102",
+        .llvm_name = "attiny102",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny104 = Cpu{
+        .name = "attiny104",
+        .llvm_name = "attiny104",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny11 = Cpu{
+        .name = "attiny11",
+        .llvm_name = "attiny11",
+        .features = featureSet(&[_]Feature{
+            .avr1,
+        }),
+    };
+    pub const attiny12 = Cpu{
+        .name = "attiny12",
+        .llvm_name = "attiny12",
+        .features = featureSet(&[_]Feature{
+            .avr1,
+        }),
+    };
+    pub const attiny13 = Cpu{
+        .name = "attiny13",
+        .llvm_name = "attiny13",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny13a = Cpu{
+        .name = "attiny13a",
+        .llvm_name = "attiny13a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny15 = Cpu{
+        .name = "attiny15",
+        .llvm_name = "attiny15",
+        .features = featureSet(&[_]Feature{
+            .avr1,
+        }),
+    };
+    pub const attiny1634 = Cpu{
+        .name = "attiny1634",
+        .llvm_name = "attiny1634",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const attiny167 = Cpu{
+        .name = "attiny167",
+        .llvm_name = "attiny167",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const attiny20 = Cpu{
+        .name = "attiny20",
+        .llvm_name = "attiny20",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny22 = Cpu{
+        .name = "attiny22",
+        .llvm_name = "attiny22",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const attiny2313 = Cpu{
+        .name = "attiny2313",
+        .llvm_name = "attiny2313",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny2313a = Cpu{
+        .name = "attiny2313a",
+        .llvm_name = "attiny2313a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny24 = Cpu{
+        .name = "attiny24",
+        .llvm_name = "attiny24",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny24a = Cpu{
+        .name = "attiny24a",
+        .llvm_name = "attiny24a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny25 = Cpu{
+        .name = "attiny25",
+        .llvm_name = "attiny25",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny26 = Cpu{
+        .name = "attiny26",
+        .llvm_name = "attiny26",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+            .lpmx,
+        }),
+    };
+    pub const attiny261 = Cpu{
+        .name = "attiny261",
+        .llvm_name = "attiny261",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny261a = Cpu{
+        .name = "attiny261a",
+        .llvm_name = "attiny261a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny28 = Cpu{
+        .name = "attiny28",
+        .llvm_name = "attiny28",
+        .features = featureSet(&[_]Feature{
+            .avr1,
+        }),
+    };
+    pub const attiny4 = Cpu{
+        .name = "attiny4",
+        .llvm_name = "attiny4",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny40 = Cpu{
+        .name = "attiny40",
+        .llvm_name = "attiny40",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny4313 = Cpu{
+        .name = "attiny4313",
+        .llvm_name = "attiny4313",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny43u = Cpu{
+        .name = "attiny43u",
+        .llvm_name = "attiny43u",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny44 = Cpu{
+        .name = "attiny44",
+        .llvm_name = "attiny44",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny44a = Cpu{
+        .name = "attiny44a",
+        .llvm_name = "attiny44a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny45 = Cpu{
+        .name = "attiny45",
+        .llvm_name = "attiny45",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny461 = Cpu{
+        .name = "attiny461",
+        .llvm_name = "attiny461",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny461a = Cpu{
+        .name = "attiny461a",
+        .llvm_name = "attiny461a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny48 = Cpu{
+        .name = "attiny48",
+        .llvm_name = "attiny48",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny5 = Cpu{
+        .name = "attiny5",
+        .llvm_name = "attiny5",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const attiny828 = Cpu{
+        .name = "attiny828",
+        .llvm_name = "attiny828",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny84 = Cpu{
+        .name = "attiny84",
+        .llvm_name = "attiny84",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny84a = Cpu{
+        .name = "attiny84a",
+        .llvm_name = "attiny84a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny85 = Cpu{
+        .name = "attiny85",
+        .llvm_name = "attiny85",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny861 = Cpu{
+        .name = "attiny861",
+        .llvm_name = "attiny861",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny861a = Cpu{
+        .name = "attiny861a",
+        .llvm_name = "attiny861a",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny87 = Cpu{
+        .name = "attiny87",
+        .llvm_name = "attiny87",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny88 = Cpu{
+        .name = "attiny88",
+        .llvm_name = "attiny88",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const attiny9 = Cpu{
+        .name = "attiny9",
+        .llvm_name = "attiny9",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const atxmega128a1 = Cpu{
+        .name = "atxmega128a1",
+        .llvm_name = "atxmega128a1",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega128a1u = Cpu{
+        .name = "atxmega128a1u",
+        .llvm_name = "atxmega128a1u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128a3 = Cpu{
+        .name = "atxmega128a3",
+        .llvm_name = "atxmega128a3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega128a3u = Cpu{
+        .name = "atxmega128a3u",
+        .llvm_name = "atxmega128a3u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128a4u = Cpu{
+        .name = "atxmega128a4u",
+        .llvm_name = "atxmega128a4u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128b1 = Cpu{
+        .name = "atxmega128b1",
+        .llvm_name = "atxmega128b1",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128b3 = Cpu{
+        .name = "atxmega128b3",
+        .llvm_name = "atxmega128b3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128c3 = Cpu{
+        .name = "atxmega128c3",
+        .llvm_name = "atxmega128c3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega128d3 = Cpu{
+        .name = "atxmega128d3",
+        .llvm_name = "atxmega128d3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega128d4 = Cpu{
+        .name = "atxmega128d4",
+        .llvm_name = "atxmega128d4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega16a4 = Cpu{
+        .name = "atxmega16a4",
+        .llvm_name = "atxmega16a4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega16a4u = Cpu{
+        .name = "atxmega16a4u",
+        .llvm_name = "atxmega16a4u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega16c4 = Cpu{
+        .name = "atxmega16c4",
+        .llvm_name = "atxmega16c4",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega16d4 = Cpu{
+        .name = "atxmega16d4",
+        .llvm_name = "atxmega16d4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega16e5 = Cpu{
+        .name = "atxmega16e5",
+        .llvm_name = "atxmega16e5",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega192a3 = Cpu{
+        .name = "atxmega192a3",
+        .llvm_name = "atxmega192a3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega192a3u = Cpu{
+        .name = "atxmega192a3u",
+        .llvm_name = "atxmega192a3u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega192c3 = Cpu{
+        .name = "atxmega192c3",
+        .llvm_name = "atxmega192c3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega192d3 = Cpu{
+        .name = "atxmega192d3",
+        .llvm_name = "atxmega192d3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega256a3 = Cpu{
+        .name = "atxmega256a3",
+        .llvm_name = "atxmega256a3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega256a3b = Cpu{
+        .name = "atxmega256a3b",
+        .llvm_name = "atxmega256a3b",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega256a3bu = Cpu{
+        .name = "atxmega256a3bu",
+        .llvm_name = "atxmega256a3bu",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega256a3u = Cpu{
+        .name = "atxmega256a3u",
+        .llvm_name = "atxmega256a3u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega256c3 = Cpu{
+        .name = "atxmega256c3",
+        .llvm_name = "atxmega256c3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega256d3 = Cpu{
+        .name = "atxmega256d3",
+        .llvm_name = "atxmega256d3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega32a4 = Cpu{
+        .name = "atxmega32a4",
+        .llvm_name = "atxmega32a4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega32a4u = Cpu{
+        .name = "atxmega32a4u",
+        .llvm_name = "atxmega32a4u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega32c4 = Cpu{
+        .name = "atxmega32c4",
+        .llvm_name = "atxmega32c4",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega32d4 = Cpu{
+        .name = "atxmega32d4",
+        .llvm_name = "atxmega32d4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega32e5 = Cpu{
+        .name = "atxmega32e5",
+        .llvm_name = "atxmega32e5",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega32x1 = Cpu{
+        .name = "atxmega32x1",
+        .llvm_name = "atxmega32x1",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega384c3 = Cpu{
+        .name = "atxmega384c3",
+        .llvm_name = "atxmega384c3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega384d3 = Cpu{
+        .name = "atxmega384d3",
+        .llvm_name = "atxmega384d3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega64a1 = Cpu{
+        .name = "atxmega64a1",
+        .llvm_name = "atxmega64a1",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega64a1u = Cpu{
+        .name = "atxmega64a1u",
+        .llvm_name = "atxmega64a1u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64a3 = Cpu{
+        .name = "atxmega64a3",
+        .llvm_name = "atxmega64a3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega64a3u = Cpu{
+        .name = "atxmega64a3u",
+        .llvm_name = "atxmega64a3u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64a4u = Cpu{
+        .name = "atxmega64a4u",
+        .llvm_name = "atxmega64a4u",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64b1 = Cpu{
+        .name = "atxmega64b1",
+        .llvm_name = "atxmega64b1",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64b3 = Cpu{
+        .name = "atxmega64b3",
+        .llvm_name = "atxmega64b3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64c3 = Cpu{
+        .name = "atxmega64c3",
+        .llvm_name = "atxmega64c3",
+        .features = featureSet(&[_]Feature{
+            .xmegau,
+        }),
+    };
+    pub const atxmega64d3 = Cpu{
+        .name = "atxmega64d3",
+        .llvm_name = "atxmega64d3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega64d4 = Cpu{
+        .name = "atxmega64d4",
+        .llvm_name = "atxmega64d4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const atxmega8e5 = Cpu{
+        .name = "atxmega8e5",
+        .llvm_name = "atxmega8e5",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avr1 = Cpu{
+        .name = "avr1",
+        .llvm_name = "avr1",
+        .features = featureSet(&[_]Feature{
+            .avr1,
+        }),
+    };
+    pub const avr2 = Cpu{
+        .name = "avr2",
+        .llvm_name = "avr2",
+        .features = featureSet(&[_]Feature{
+            .avr2,
+        }),
+    };
+    pub const avr25 = Cpu{
+        .name = "avr25",
+        .llvm_name = "avr25",
+        .features = featureSet(&[_]Feature{
+            .avr25,
+        }),
+    };
+    pub const avr3 = Cpu{
+        .name = "avr3",
+        .llvm_name = "avr3",
+        .features = featureSet(&[_]Feature{
+            .avr3,
+        }),
+    };
+    pub const avr31 = Cpu{
+        .name = "avr31",
+        .llvm_name = "avr31",
+        .features = featureSet(&[_]Feature{
+            .avr31,
+        }),
+    };
+    pub const avr35 = Cpu{
+        .name = "avr35",
+        .llvm_name = "avr35",
+        .features = featureSet(&[_]Feature{
+            .avr35,
+        }),
+    };
+    pub const avr4 = Cpu{
+        .name = "avr4",
+        .llvm_name = "avr4",
+        .features = featureSet(&[_]Feature{
+            .avr4,
+        }),
+    };
+    pub const avr5 = Cpu{
+        .name = "avr5",
+        .llvm_name = "avr5",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+    pub const avr51 = Cpu{
+        .name = "avr51",
+        .llvm_name = "avr51",
+        .features = featureSet(&[_]Feature{
+            .avr51,
+        }),
+    };
+    pub const avr6 = Cpu{
+        .name = "avr6",
+        .llvm_name = "avr6",
+        .features = featureSet(&[_]Feature{
+            .avr6,
+        }),
+    };
+    pub const avrtiny = Cpu{
+        .name = "avrtiny",
+        .llvm_name = "avrtiny",
+        .features = featureSet(&[_]Feature{
+            .avrtiny,
+        }),
+    };
+    pub const avrxmega1 = Cpu{
+        .name = "avrxmega1",
+        .llvm_name = "avrxmega1",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega2 = Cpu{
+        .name = "avrxmega2",
+        .llvm_name = "avrxmega2",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega3 = Cpu{
+        .name = "avrxmega3",
+        .llvm_name = "avrxmega3",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega4 = Cpu{
+        .name = "avrxmega4",
+        .llvm_name = "avrxmega4",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega5 = Cpu{
+        .name = "avrxmega5",
+        .llvm_name = "avrxmega5",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega6 = Cpu{
+        .name = "avrxmega6",
+        .llvm_name = "avrxmega6",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const avrxmega7 = Cpu{
+        .name = "avrxmega7",
+        .llvm_name = "avrxmega7",
+        .features = featureSet(&[_]Feature{
+            .xmega,
+        }),
+    };
+    pub const m3000 = Cpu{
+        .name = "m3000",
+        .llvm_name = "m3000",
+        .features = featureSet(&[_]Feature{
+            .avr5,
+        }),
+    };
+};
+
+/// All avr CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.at43usb320,
+    &cpu.at43usb355,
+    &cpu.at76c711,
+    &cpu.at86rf401,
+    &cpu.at90c8534,
+    &cpu.at90can128,
+    &cpu.at90can32,
+    &cpu.at90can64,
+    &cpu.at90pwm1,
+    &cpu.at90pwm161,
+    &cpu.at90pwm2,
+    &cpu.at90pwm216,
+    &cpu.at90pwm2b,
+    &cpu.at90pwm3,
+    &cpu.at90pwm316,
+    &cpu.at90pwm3b,
+    &cpu.at90pwm81,
+    &cpu.at90s1200,
+    &cpu.at90s2313,
+    &cpu.at90s2323,
+    &cpu.at90s2333,
+    &cpu.at90s2343,
+    &cpu.at90s4414,
+    &cpu.at90s4433,
+    &cpu.at90s4434,
+    &cpu.at90s8515,
+    &cpu.at90s8535,
+    &cpu.at90scr100,
+    &cpu.at90usb1286,
+    &cpu.at90usb1287,
+    &cpu.at90usb162,
+    &cpu.at90usb646,
+    &cpu.at90usb647,
+    &cpu.at90usb82,
+    &cpu.at94k,
+    &cpu.ata5272,
+    &cpu.ata5505,
+    &cpu.ata5790,
+    &cpu.ata5795,
+    &cpu.ata6285,
+    &cpu.ata6286,
+    &cpu.ata6289,
+    &cpu.atmega103,
+    &cpu.atmega128,
+    &cpu.atmega1280,
+    &cpu.atmega1281,
+    &cpu.atmega1284,
+    &cpu.atmega1284p,
+    &cpu.atmega1284rfr2,
+    &cpu.atmega128a,
+    &cpu.atmega128rfa1,
+    &cpu.atmega128rfr2,
+    &cpu.atmega16,
+    &cpu.atmega161,
+    &cpu.atmega162,
+    &cpu.atmega163,
+    &cpu.atmega164a,
+    &cpu.atmega164p,
+    &cpu.atmega164pa,
+    &cpu.atmega165,
+    &cpu.atmega165a,
+    &cpu.atmega165p,
+    &cpu.atmega165pa,
+    &cpu.atmega168,
+    &cpu.atmega168a,
+    &cpu.atmega168p,
+    &cpu.atmega168pa,
+    &cpu.atmega169,
+    &cpu.atmega169a,
+    &cpu.atmega169p,
+    &cpu.atmega169pa,
+    &cpu.atmega16a,
+    &cpu.atmega16hva,
+    &cpu.atmega16hva2,
+    &cpu.atmega16hvb,
+    &cpu.atmega16hvbrevb,
+    &cpu.atmega16m1,
+    &cpu.atmega16u2,
+    &cpu.atmega16u4,
+    &cpu.atmega2560,
+    &cpu.atmega2561,
+    &cpu.atmega2564rfr2,
+    &cpu.atmega256rfr2,
+    &cpu.atmega32,
+    &cpu.atmega323,
+    &cpu.atmega324a,
+    &cpu.atmega324p,
+    &cpu.atmega324pa,
+    &cpu.atmega325,
+    &cpu.atmega3250,
+    &cpu.atmega3250a,
+    &cpu.atmega3250p,
+    &cpu.atmega3250pa,
+    &cpu.atmega325a,
+    &cpu.atmega325p,
+    &cpu.atmega325pa,
+    &cpu.atmega328,
+    &cpu.atmega328p,
+    &cpu.atmega329,
+    &cpu.atmega3290,
+    &cpu.atmega3290a,
+    &cpu.atmega3290p,
+    &cpu.atmega3290pa,
+    &cpu.atmega329a,
+    &cpu.atmega329p,
+    &cpu.atmega329pa,
+    &cpu.atmega32a,
+    &cpu.atmega32c1,
+    &cpu.atmega32hvb,
+    &cpu.atmega32hvbrevb,
+    &cpu.atmega32m1,
+    &cpu.atmega32u2,
+    &cpu.atmega32u4,
+    &cpu.atmega32u6,
+    &cpu.atmega406,
+    &cpu.atmega48,
+    &cpu.atmega48a,
+    &cpu.atmega48p,
+    &cpu.atmega48pa,
+    &cpu.atmega64,
+    &cpu.atmega640,
+    &cpu.atmega644,
+    &cpu.atmega644a,
+    &cpu.atmega644p,
+    &cpu.atmega644pa,
+    &cpu.atmega644rfr2,
+    &cpu.atmega645,
+    &cpu.atmega6450,
+    &cpu.atmega6450a,
+    &cpu.atmega6450p,
+    &cpu.atmega645a,
+    &cpu.atmega645p,
+    &cpu.atmega649,
+    &cpu.atmega6490,
+    &cpu.atmega6490a,
+    &cpu.atmega6490p,
+    &cpu.atmega649a,
+    &cpu.atmega649p,
+    &cpu.atmega64a,
+    &cpu.atmega64c1,
+    &cpu.atmega64hve,
+    &cpu.atmega64m1,
+    &cpu.atmega64rfr2,
+    &cpu.atmega8,
+    &cpu.atmega8515,
+    &cpu.atmega8535,
+    &cpu.atmega88,
+    &cpu.atmega88a,
+    &cpu.atmega88p,
+    &cpu.atmega88pa,
+    &cpu.atmega8a,
+    &cpu.atmega8hva,
+    &cpu.atmega8u2,
+    &cpu.attiny10,
+    &cpu.attiny102,
+    &cpu.attiny104,
+    &cpu.attiny11,
+    &cpu.attiny12,
+    &cpu.attiny13,
+    &cpu.attiny13a,
+    &cpu.attiny15,
+    &cpu.attiny1634,
+    &cpu.attiny167,
+    &cpu.attiny20,
+    &cpu.attiny22,
+    &cpu.attiny2313,
+    &cpu.attiny2313a,
+    &cpu.attiny24,
+    &cpu.attiny24a,
+    &cpu.attiny25,
+    &cpu.attiny26,
+    &cpu.attiny261,
+    &cpu.attiny261a,
+    &cpu.attiny28,
+    &cpu.attiny4,
+    &cpu.attiny40,
+    &cpu.attiny4313,
+    &cpu.attiny43u,
+    &cpu.attiny44,
+    &cpu.attiny44a,
+    &cpu.attiny45,
+    &cpu.attiny461,
+    &cpu.attiny461a,
+    &cpu.attiny48,
+    &cpu.attiny5,
+    &cpu.attiny828,
+    &cpu.attiny84,
+    &cpu.attiny84a,
+    &cpu.attiny85,
+    &cpu.attiny861,
+    &cpu.attiny861a,
+    &cpu.attiny87,
+    &cpu.attiny88,
+    &cpu.attiny9,
+    &cpu.atxmega128a1,
+    &cpu.atxmega128a1u,
+    &cpu.atxmega128a3,
+    &cpu.atxmega128a3u,
+    &cpu.atxmega128a4u,
+    &cpu.atxmega128b1,
+    &cpu.atxmega128b3,
+    &cpu.atxmega128c3,
+    &cpu.atxmega128d3,
+    &cpu.atxmega128d4,
+    &cpu.atxmega16a4,
+    &cpu.atxmega16a4u,
+    &cpu.atxmega16c4,
+    &cpu.atxmega16d4,
+    &cpu.atxmega16e5,
+    &cpu.atxmega192a3,
+    &cpu.atxmega192a3u,
+    &cpu.atxmega192c3,
+    &cpu.atxmega192d3,
+    &cpu.atxmega256a3,
+    &cpu.atxmega256a3b,
+    &cpu.atxmega256a3bu,
+    &cpu.atxmega256a3u,
+    &cpu.atxmega256c3,
+    &cpu.atxmega256d3,
+    &cpu.atxmega32a4,
+    &cpu.atxmega32a4u,
+    &cpu.atxmega32c4,
+    &cpu.atxmega32d4,
+    &cpu.atxmega32e5,
+    &cpu.atxmega32x1,
+    &cpu.atxmega384c3,
+    &cpu.atxmega384d3,
+    &cpu.atxmega64a1,
+    &cpu.atxmega64a1u,
+    &cpu.atxmega64a3,
+    &cpu.atxmega64a3u,
+    &cpu.atxmega64a4u,
+    &cpu.atxmega64b1,
+    &cpu.atxmega64b3,
+    &cpu.atxmega64c3,
+    &cpu.atxmega64d3,
+    &cpu.atxmega64d4,
+    &cpu.atxmega8e5,
+    &cpu.avr1,
+    &cpu.avr2,
+    &cpu.avr25,
+    &cpu.avr3,
+    &cpu.avr31,
+    &cpu.avr35,
+    &cpu.avr4,
+    &cpu.avr5,
+    &cpu.avr51,
+    &cpu.avr6,
+    &cpu.avrtiny,
+    &cpu.avrxmega1,
+    &cpu.avrxmega2,
+    &cpu.avrxmega3,
+    &cpu.avrxmega4,
+    &cpu.avrxmega5,
+    &cpu.avrxmega6,
+    &cpu.avrxmega7,
+    &cpu.m3000,
 };
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 62c69746f8e9a0171d75050e9efa3d102876cac0..bb10a84ff8d36d7c2773a9c6155e1f6c9bcbea76 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -1,75 +1,77 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
 
-pub const feature_alu32 = Feature{
-    .name = "alu32",
-    .llvm_name = "alu32",
-    .description = "Enable ALU32 instructions",
-    .dependencies = &[_]*const Feature {
-    },
+pub const Feature = enum {
+    alu32,
+    dummy,
+    dwarfris,
 };
 
-pub const feature_dummy = Feature{
-    .name = "dummy",
-    .llvm_name = "dummy",
-    .description = "unused feature",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dwarfris = Feature{
-    .name = "dwarfris",
-    .llvm_name = "dwarfris",
-    .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_alu32,
-    &feature_dummy,
-    &feature_dwarfris,
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_probe = Cpu{
-    .name = "probe",
-    .llvm_name = "probe",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_v1 = Cpu{
-    .name = "v1",
-    .llvm_name = "v1",
-    .dependencies = &[_]*const Feature {
-    },
-};
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
-pub const cpu_v2 = Cpu{
-    .name = "v2",
-    .llvm_name = "v2",
-    .dependencies = &[_]*const Feature {
-    },
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.alu32)] = .{
+        .index = @enumToInt(Feature.alu32),
+        .name = @tagName(Feature.alu32),
+        .llvm_name = "alu32",
+        .description = "Enable ALU32 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dummy)] = .{
+        .index = @enumToInt(Feature.dummy),
+        .name = @tagName(Feature.dummy),
+        .llvm_name = "dummy",
+        .description = "unused feature",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dwarfris)] = .{
+        .index = @enumToInt(Feature.dwarfris),
+        .name = @tagName(Feature.dwarfris),
+        .llvm_name = "dwarfris",
+        .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
+        .dependencies = 0,
+    };
+    break :blk result;
 };
 
-pub const cpu_v3 = Cpu{
-    .name = "v3",
-    .llvm_name = "v3",
-    .dependencies = &[_]*const Feature {
-    },
+pub const cpu = struct {
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const probe = Cpu{
+        .name = "probe",
+        .llvm_name = "probe",
+        .features = 0,
+    };
+    pub const v1 = Cpu{
+        .name = "v1",
+        .llvm_name = "v1",
+        .features = 0,
+    };
+    pub const v2 = Cpu{
+        .name = "v2",
+        .llvm_name = "v2",
+        .features = 0,
+    };
+    pub const v3 = Cpu{
+        .name = "v3",
+        .llvm_name = "v3",
+        .features = 0,
+    };
 };
 
-pub const cpus = &[_]*const Cpu {
-    &cpu_generic,
-    &cpu_probe,
-    &cpu_v1,
-    &cpu_v2,
-    &cpu_v3,
+/// All bpf CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.generic,
+    &cpu.probe,
+    &cpu.v1,
+    &cpu.v2,
+    &cpu.v3,
 };
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 54f59d651afd85dc633e507d461f43c63bbce46c..441abb9cbd1eb4ff26589c49fdcde83e5a0a91eb 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -1,200 +1,355 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
 
-pub const feature_duplex = Feature{
-    .name = "duplex",
-    .llvm_name = "duplex",
-    .description = "Enable generation of duplex instruction",
-    .dependencies = &[_]*const Feature {
-    },
+pub const Feature = enum {
+    duplex,
+    hvx,
+    hvx_length128b,
+    hvx_length64b,
+    hvxv60,
+    hvxv62,
+    hvxv65,
+    hvxv66,
+    long_calls,
+    mem_noshuf,
+    memops,
+    noreturn_stack_elim,
+    nvj,
+    nvs,
+    packets,
+    reserved_r19,
+    small_data,
+    v5,
+    v55,
+    v60,
+    v62,
+    v65,
+    v66,
+    zreg,
 };
 
-pub const feature_longCalls = Feature{
-    .name = "longCalls",
-    .llvm_name = "long-calls",
-    .description = "Use constant-extended calls",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mem_noshuf = Feature{
-    .name = "mem_noshuf",
-    .llvm_name = "mem_noshuf",
-    .description = "Supports mem_noshuf feature",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_memops = Feature{
-    .name = "memops",
-    .llvm_name = "memops",
-    .description = "Use memop instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nvj = Feature{
-    .name = "nvj",
-    .llvm_name = "nvj",
-    .description = "Support for new-value jumps",
-    .dependencies = &[_]*const Feature {
-        &feature_packets,
-    },
-};
-
-pub const feature_nvs = Feature{
-    .name = "nvs",
-    .llvm_name = "nvs",
-    .description = "Support for new-value stores",
-    .dependencies = &[_]*const Feature {
-        &feature_packets,
-    },
-};
-
-pub const feature_noreturnStackElim = Feature{
-    .name = "noreturnStackElim",
-    .llvm_name = "noreturn-stack-elim",
-    .description = "Eliminate stack allocation in a noreturn function when possible",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_packets = Feature{
-    .name = "packets",
-    .llvm_name = "packets",
-    .description = "Support for instruction packets",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_reservedR19 = Feature{
-    .name = "reservedR19",
-    .llvm_name = "reserved-r19",
-    .description = "Reserve register R19",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_smallData = Feature{
-    .name = "smallData",
-    .llvm_name = "small-data",
-    .description = "Allow GP-relative addressing of global variables",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_duplex,
-    &feature_longCalls,
-    &feature_mem_noshuf,
-    &feature_memops,
-    &feature_nvj,
-    &feature_nvs,
-    &feature_noreturnStackElim,
-    &feature_packets,
-    &feature_reservedR19,
-    &feature_smallData,
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
-};
-
-pub const cpu_hexagonv5 = Cpu{
-    .name = "hexagonv5",
-    .llvm_name = "hexagonv5",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
-};
-
-pub const cpu_hexagonv55 = Cpu{
-    .name = "hexagonv55",
-    .llvm_name = "hexagonv55",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
-};
-
-pub const cpu_hexagonv60 = Cpu{
-    .name = "hexagonv60",
-    .llvm_name = "hexagonv60",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
-};
-
-pub const cpu_hexagonv62 = Cpu{
-    .name = "hexagonv62",
-    .llvm_name = "hexagonv62",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
-};
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
-pub const cpu_hexagonv65 = Cpu{
-    .name = "hexagonv65",
-    .llvm_name = "hexagonv65",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_mem_noshuf,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.duplex)] = .{
+        .index = @enumToInt(Feature.duplex),
+        .name = @tagName(Feature.duplex),
+        .llvm_name = "duplex",
+        .description = "Enable generation of duplex instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hvx)] = .{
+        .index = @enumToInt(Feature.hvx),
+        .name = @tagName(Feature.hvx),
+        .llvm_name = "hvx",
+        .description = "Hexagon HVX instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hvx_length128b)] = .{
+        .index = @enumToInt(Feature.hvx_length128b),
+        .name = @tagName(Feature.hvx_length128b),
+        .llvm_name = "hvx-length128b",
+        .description = "Hexagon HVX 128B instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+        }),
+    };
+    result[@enumToInt(Feature.hvx_length64b)] = .{
+        .index = @enumToInt(Feature.hvx_length64b),
+        .name = @tagName(Feature.hvx_length64b),
+        .llvm_name = "hvx-length64b",
+        .description = "Hexagon HVX 64B instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+        }),
+    };
+    result[@enumToInt(Feature.hvxv60)] = .{
+        .index = @enumToInt(Feature.hvxv60),
+        .name = @tagName(Feature.hvxv60),
+        .llvm_name = "hvxv60",
+        .description = "Hexagon HVX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+        }),
+    };
+    result[@enumToInt(Feature.hvxv62)] = .{
+        .index = @enumToInt(Feature.hvxv62),
+        .name = @tagName(Feature.hvxv62),
+        .llvm_name = "hvxv62",
+        .description = "Hexagon HVX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+            .hvxv60,
+        }),
+    };
+    result[@enumToInt(Feature.hvxv65)] = .{
+        .index = @enumToInt(Feature.hvxv65),
+        .name = @tagName(Feature.hvxv65),
+        .llvm_name = "hvxv65",
+        .description = "Hexagon HVX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+            .hvxv60,
+            .hvxv62,
+        }),
+    };
+    result[@enumToInt(Feature.hvxv66)] = .{
+        .index = @enumToInt(Feature.hvxv66),
+        .name = @tagName(Feature.hvxv66),
+        .llvm_name = "hvxv66",
+        .description = "Hexagon HVX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hvx,
+            .hvxv60,
+            .hvxv62,
+            .hvxv65,
+            .zreg,
+        }),
+    };
+    result[@enumToInt(Feature.long_calls)] = .{
+        .index = @enumToInt(Feature.long_calls),
+        .name = @tagName(Feature.long_calls),
+        .llvm_name = "long-calls",
+        .description = "Use constant-extended calls",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mem_noshuf)] = .{
+        .index = @enumToInt(Feature.mem_noshuf),
+        .name = @tagName(Feature.mem_noshuf),
+        .llvm_name = "mem_noshuf",
+        .description = "Supports mem_noshuf feature",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.memops)] = .{
+        .index = @enumToInt(Feature.memops),
+        .name = @tagName(Feature.memops),
+        .llvm_name = "memops",
+        .description = "Use memop instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.noreturn_stack_elim)] = .{
+        .index = @enumToInt(Feature.noreturn_stack_elim),
+        .name = @tagName(Feature.noreturn_stack_elim),
+        .llvm_name = "noreturn-stack-elim",
+        .description = "Eliminate stack allocation in a noreturn function when possible",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nvj)] = .{
+        .index = @enumToInt(Feature.nvj),
+        .name = @tagName(Feature.nvj),
+        .llvm_name = "nvj",
+        .description = "Support for new-value jumps",
+        .dependencies = featureSet(&[_]Feature{
+            .packets,
+        }),
+    };
+    result[@enumToInt(Feature.nvs)] = .{
+        .index = @enumToInt(Feature.nvs),
+        .name = @tagName(Feature.nvs),
+        .llvm_name = "nvs",
+        .description = "Support for new-value stores",
+        .dependencies = featureSet(&[_]Feature{
+            .packets,
+        }),
+    };
+    result[@enumToInt(Feature.packets)] = .{
+        .index = @enumToInt(Feature.packets),
+        .name = @tagName(Feature.packets),
+        .llvm_name = "packets",
+        .description = "Support for instruction packets",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reserved_r19)] = .{
+        .index = @enumToInt(Feature.reserved_r19),
+        .name = @tagName(Feature.reserved_r19),
+        .llvm_name = "reserved-r19",
+        .description = "Reserve register R19",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.small_data)] = .{
+        .index = @enumToInt(Feature.small_data),
+        .name = @tagName(Feature.small_data),
+        .llvm_name = "small-data",
+        .description = "Allow GP-relative addressing of global variables",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v5)] = .{
+        .index = @enumToInt(Feature.v5),
+        .name = @tagName(Feature.v5),
+        .llvm_name = "v5",
+        .description = "Enable Hexagon V5 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v55)] = .{
+        .index = @enumToInt(Feature.v55),
+        .name = @tagName(Feature.v55),
+        .llvm_name = "v55",
+        .description = "Enable Hexagon V55 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v60)] = .{
+        .index = @enumToInt(Feature.v60),
+        .name = @tagName(Feature.v60),
+        .llvm_name = "v60",
+        .description = "Enable Hexagon V60 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v62)] = .{
+        .index = @enumToInt(Feature.v62),
+        .name = @tagName(Feature.v62),
+        .llvm_name = "v62",
+        .description = "Enable Hexagon V62 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v65)] = .{
+        .index = @enumToInt(Feature.v65),
+        .name = @tagName(Feature.v65),
+        .llvm_name = "v65",
+        .description = "Enable Hexagon V65 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v66)] = .{
+        .index = @enumToInt(Feature.v66),
+        .name = @tagName(Feature.v66),
+        .llvm_name = "v66",
+        .description = "Enable Hexagon V66 architecture",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.zreg)] = .{
+        .index = @enumToInt(Feature.zreg),
+        .name = @tagName(Feature.zreg),
+        .llvm_name = "zreg",
+        .description = "Hexagon ZReg extension instructions",
+        .dependencies = 0,
+    };
+    break :blk result;
 };
 
-pub const cpu_hexagonv66 = Cpu{
-    .name = "hexagonv66",
-    .llvm_name = "hexagonv66",
-    .dependencies = &[_]*const Feature {
-        &feature_duplex,
-        &feature_mem_noshuf,
-        &feature_memops,
-        &feature_packets,
-        &feature_nvj,
-        &feature_nvs,
-        &feature_smallData,
-    },
+pub const cpu = struct {
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+            .v60,
+        }),
+    };
+    pub const hexagonv5 = Cpu{
+        .name = "hexagonv5",
+        .llvm_name = "hexagonv5",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+        }),
+    };
+    pub const hexagonv55 = Cpu{
+        .name = "hexagonv55",
+        .llvm_name = "hexagonv55",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+        }),
+    };
+    pub const hexagonv60 = Cpu{
+        .name = "hexagonv60",
+        .llvm_name = "hexagonv60",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+            .v60,
+        }),
+    };
+    pub const hexagonv62 = Cpu{
+        .name = "hexagonv62",
+        .llvm_name = "hexagonv62",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+            .v60,
+            .v62,
+        }),
+    };
+    pub const hexagonv65 = Cpu{
+        .name = "hexagonv65",
+        .llvm_name = "hexagonv65",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .mem_noshuf,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+            .v60,
+            .v62,
+            .v65,
+        }),
+    };
+    pub const hexagonv66 = Cpu{
+        .name = "hexagonv66",
+        .llvm_name = "hexagonv66",
+        .features = featureSet(&[_]Feature{
+            .duplex,
+            .mem_noshuf,
+            .memops,
+            .nvj,
+            .nvs,
+            .packets,
+            .small_data,
+            .v5,
+            .v55,
+            .v60,
+            .v62,
+            .v65,
+            .v66,
+        }),
+    };
 };
 
-pub const cpus = &[_]*const Cpu {
-    &cpu_generic,
-    &cpu_hexagonv5,
-    &cpu_hexagonv55,
-    &cpu_hexagonv60,
-    &cpu_hexagonv62,
-    &cpu_hexagonv65,
-    &cpu_hexagonv66,
+/// All hexagon CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.generic,
+    &cpu.hexagonv5,
+    &cpu.hexagonv55,
+    &cpu.hexagonv60,
+    &cpu.hexagonv62,
+    &cpu.hexagonv65,
+    &cpu.hexagonv66,
 };
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 7c7bb3bfbe2df1f3e67ff395d943505b0d5eb4f5..d4f9df4fbbbad855eb2521839e89f61c4214346a 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -1,819 +1,611 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_abs2008 = Feature{
-    .name = "abs2008",
-    .llvm_name = "abs2008",
-    .description = "Disable IEEE 754-2008 abs.fmt mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_crc = Feature{
-    .name = "crc",
-    .llvm_name = "crc",
-    .description = "Mips R6 CRC ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_cnmips = Feature{
-    .name = "cnmips",
-    .llvm_name = "cnmips",
-    .description = "Octeon cnMIPS Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_dsp = Feature{
-    .name = "dsp",
-    .llvm_name = "dsp",
-    .description = "Mips DSP ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dspr2 = Feature{
-    .name = "dspr2",
-    .llvm_name = "dspr2",
-    .description = "Mips DSP-R2 ASE",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-    },
-};
-
-pub const feature_dspr3 = Feature{
-    .name = "dspr3",
-    .llvm_name = "dspr3",
-    .description = "Mips DSP-R3 ASE",
-    .dependencies = &[_]*const Feature {
-        &feature_dsp,
-    },
-};
-
-pub const feature_eva = Feature{
-    .name = "eva",
-    .llvm_name = "eva",
-    .description = "Mips EVA ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fp64 = Feature{
-    .name = "fp64",
-    .llvm_name = "fp64",
-    .description = "Support 64-bit FP registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fpxx = Feature{
-    .name = "fpxx",
-    .llvm_name = "fpxx",
-    .description = "Support for FPXX",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ginv = Feature{
-    .name = "ginv",
-    .llvm_name = "ginv",
-    .description = "Mips Global Invalidate ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_gp64 = Feature{
-    .name = "gp64",
-    .llvm_name = "gp64",
-    .description = "General Purpose Registers are 64-bit wide",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_longCalls = Feature{
-    .name = "longCalls",
-    .llvm_name = "long-calls",
-    .description = "Disable use of the jal instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_msa = Feature{
-    .name = "msa",
-    .llvm_name = "msa",
-    .description = "Mips MSA ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mt = Feature{
-    .name = "mt",
-    .llvm_name = "mt",
-    .description = "Mips MT ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nomadd4 = Feature{
-    .name = "nomadd4",
-    .llvm_name = "nomadd4",
-    .description = "Disable 4-operand madd.fmt and related instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_micromips = Feature{
-    .name = "micromips",
-    .llvm_name = "micromips",
-    .description = "microMips mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips1 = Feature{
-    .name = "mips1",
-    .llvm_name = "mips1",
-    .description = "Mips I ISA Support [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips2 = Feature{
-    .name = "mips2",
-    .llvm_name = "mips2",
-    .description = "Mips II ISA Support [highly experimental]",
-    .dependencies = &[_]*const Feature {
-        &feature_mips1,
-    },
-};
-
-pub const feature_mips3 = Feature{
-    .name = "mips3",
-    .llvm_name = "mips3",
-    .description = "MIPS III ISA Support [highly experimental]",
-    .dependencies = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips3_32 = Feature{
-    .name = "mips3_32",
-    .llvm_name = "mips3_32",
-    .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips3_32r2 = Feature{
-    .name = "mips3_32r2",
-    .llvm_name = "mips3_32r2",
-    .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips4 = Feature{
-    .name = "mips4",
-    .llvm_name = "mips4",
-    .description = "MIPS IV ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips4_32 = Feature{
-    .name = "mips4_32",
-    .llvm_name = "mips4_32",
-    .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips4_32r2 = Feature{
-    .name = "mips4_32r2",
-    .llvm_name = "mips4_32r2",
-    .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips5 = Feature{
-    .name = "mips5",
-    .llvm_name = "mips5",
-    .description = "MIPS V ISA Support [highly experimental]",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips5_32r2 = Feature{
-    .name = "mips5_32r2",
-    .llvm_name = "mips5_32r2",
-    .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips16 = Feature{
-    .name = "mips16",
-    .llvm_name = "mips16",
-    .description = "Mips16 mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mips32 = Feature{
-    .name = "mips32",
-    .llvm_name = "mips32",
-    .description = "Mips32 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_mips4_32,
-        &feature_mips1,
-    },
-};
-
-pub const feature_mips32r2 = Feature{
-    .name = "mips32r2",
-    .llvm_name = "mips32r2",
-    .description = "Mips32r2 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-    },
-};
-
-pub const feature_mips32r3 = Feature{
-    .name = "mips32r3",
-    .llvm_name = "mips32r3",
-    .description = "Mips32r3 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-    },
-};
-
-pub const feature_mips32r5 = Feature{
-    .name = "mips32r5",
-    .llvm_name = "mips32r5",
-    .description = "Mips32r5 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-    },
-};
-
-pub const feature_mips32r6 = Feature{
-    .name = "mips32r6",
-    .llvm_name = "mips32r6",
-    .description = "Mips32r6 ISA Support [experimental]",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_nan2008,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_abs2008,
-    },
-};
-
-pub const feature_mips64 = Feature{
-    .name = "mips64",
-    .llvm_name = "mips64",
-    .description = "Mips64 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips64r2 = Feature{
-    .name = "mips64r2",
-    .llvm_name = "mips64r2",
-    .description = "Mips64r2 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips64r3 = Feature{
-    .name = "mips64r3",
-    .llvm_name = "mips64r3",
-    .description = "Mips64r3 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips64r5 = Feature{
-    .name = "mips64r5",
-    .llvm_name = "mips64r5",
-    .description = "Mips64r5 ISA Support",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-    },
-};
-
-pub const feature_mips64r6 = Feature{
-    .name = "mips64r6",
-    .llvm_name = "mips64r6",
-    .description = "Mips64r6 ISA Support [experimental]",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_nan2008,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_abs2008,
-    },
-};
-
-pub const feature_nan2008 = Feature{
-    .name = "nan2008",
-    .llvm_name = "nan2008",
-    .description = "IEEE 754-2008 NaN encoding",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noabicalls = Feature{
-    .name = "noabicalls",
-    .llvm_name = "noabicalls",
-    .description = "Disable SVR4-style position-independent code",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nooddspreg = Feature{
-    .name = "nooddspreg",
-    .llvm_name = "nooddspreg",
-    .description = "Disable odd numbered single-precision registers",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptr64 = Feature{
-    .name = "ptr64",
-    .llvm_name = "ptr64",
-    .description = "Pointers are 64-bit wide",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_singleFloat = Feature{
-    .name = "singleFloat",
-    .llvm_name = "single-float",
-    .description = "Only supports single precision float",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_softFloat = Feature{
-    .name = "softFloat",
-    .llvm_name = "soft-float",
-    .description = "Does not support floating point instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sym32 = Feature{
-    .name = "sym32",
-    .llvm_name = "sym32",
-    .description = "Symbols are 32 bit on Mips64",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useIndirectJumpHazard = Feature{
-    .name = "useIndirectJumpHazard",
-    .llvm_name = "use-indirect-jump-hazard",
-    .description = "Use indirect jump guards to prevent certain speculation based attacks",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_useTccInDiv = Feature{
-    .name = "useTccInDiv",
-    .llvm_name = "use-tcc-in-div",
-    .description = "Force the assembler to use trapping",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vfpu = Feature{
-    .name = "vfpu",
-    .llvm_name = "vfpu",
-    .description = "Enable vector FPU instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_virt = Feature{
-    .name = "virt",
-    .llvm_name = "virt",
-    .description = "Mips Virtualization ASE",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_p5600 = Feature{
-    .name = "p5600",
-    .llvm_name = "p5600",
-    .description = "The P5600 Processor",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_abs2008,
-    &feature_crc,
-    &feature_cnmips,
-    &feature_dsp,
-    &feature_dspr2,
-    &feature_dspr3,
-    &feature_eva,
-    &feature_fp64,
-    &feature_fpxx,
-    &feature_ginv,
-    &feature_gp64,
-    &feature_longCalls,
-    &feature_msa,
-    &feature_mt,
-    &feature_nomadd4,
-    &feature_micromips,
-    &feature_mips1,
-    &feature_mips2,
-    &feature_mips3,
-    &feature_mips3_32,
-    &feature_mips3_32r2,
-    &feature_mips4,
-    &feature_mips4_32,
-    &feature_mips4_32r2,
-    &feature_mips5,
-    &feature_mips5_32r2,
-    &feature_mips16,
-    &feature_mips32,
-    &feature_mips32r2,
-    &feature_mips32r3,
-    &feature_mips32r5,
-    &feature_mips32r6,
-    &feature_mips64,
-    &feature_mips64r2,
-    &feature_mips64r3,
-    &feature_mips64r5,
-    &feature_mips64r6,
-    &feature_nan2008,
-    &feature_noabicalls,
-    &feature_nooddspreg,
-    &feature_ptr64,
-    &feature_singleFloat,
-    &feature_softFloat,
-    &feature_sym32,
-    &feature_useIndirectJumpHazard,
-    &feature_useTccInDiv,
-    &feature_vfpu,
-    &feature_virt,
-    &feature_p5600,
-};
-
-pub const cpu_mips1 = Cpu{
-    .name = "mips1",
-    .llvm_name = "mips1",
-    .dependencies = &[_]*const Feature {
-        &feature_mips1,
-    },
-};
-
-pub const cpu_mips2 = Cpu{
-    .name = "mips2",
-    .llvm_name = "mips2",
-    .dependencies = &[_]*const Feature {
-        &feature_mips1,
-        &feature_mips2,
-    },
-};
-
-pub const cpu_mips3 = Cpu{
-    .name = "mips3",
-    .llvm_name = "mips3",
-    .dependencies = &[_]*const Feature {
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips3,
-    },
-};
-
-pub const cpu_mips32 = Cpu{
-    .name = "mips32",
-    .llvm_name = "mips32",
-    .dependencies = &[_]*const Feature {
-        &feature_mips3_32,
-        &feature_mips4_32,
-        &feature_mips1,
-        &feature_mips32,
-    },
-};
-
-pub const cpu_mips32r2 = Cpu{
-    .name = "mips32r2",
-    .llvm_name = "mips32r2",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_mips32r2,
-    },
-};
-
-pub const cpu_mips32r3 = Cpu{
-    .name = "mips32r3",
-    .llvm_name = "mips32r3",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_mips32r3,
-    },
-};
-
-pub const cpu_mips32r5 = Cpu{
-    .name = "mips32r5",
-    .llvm_name = "mips32r5",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_mips32r5,
-    },
-};
-
-pub const cpu_mips32r6 = Cpu{
-    .name = "mips32r6",
-    .llvm_name = "mips32r6",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_nan2008,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_abs2008,
-        &feature_mips32r6,
-    },
-};
-
-pub const cpu_mips4 = Cpu{
-    .name = "mips4",
-    .llvm_name = "mips4",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips4,
-    },
-};
-
-pub const cpu_mips5 = Cpu{
-    .name = "mips5",
-    .llvm_name = "mips5",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips5,
-    },
-};
-
-pub const cpu_mips64 = Cpu{
-    .name = "mips64",
-    .llvm_name = "mips64",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips64,
-    },
-};
-
-pub const cpu_mips64r2 = Cpu{
-    .name = "mips64r2",
-    .llvm_name = "mips64r2",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips64r2,
-    },
-};
-
-pub const cpu_mips64r3 = Cpu{
-    .name = "mips64r3",
-    .llvm_name = "mips64r3",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips64r3,
-    },
-};
-
-pub const cpu_mips64r5 = Cpu{
-    .name = "mips64r5",
-    .llvm_name = "mips64r5",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_mips64r5,
-    },
-};
-
-pub const cpu_mips64r6 = Cpu{
-    .name = "mips64r6",
-    .llvm_name = "mips64r6",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_nan2008,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_abs2008,
-        &feature_mips64r6,
-    },
-};
-
-pub const cpu_octeon = Cpu{
-    .name = "octeon",
-    .llvm_name = "octeon",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_gp64,
-        &feature_mips1,
-        &feature_fp64,
-        &feature_cnmips,
-        &feature_mips64r2,
-    },
-};
-
-pub const cpu_p5600 = Cpu{
-    .name = "p5600",
-    .llvm_name = "p5600",
-    .dependencies = &[_]*const Feature {
-        &feature_mips4_32,
-        &feature_mips5_32r2,
-        &feature_mips3_32r2,
-        &feature_mips3_32,
-        &feature_mips4_32r2,
-        &feature_mips1,
-        &feature_p5600,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_mips1,
-    &cpu_mips2,
-    &cpu_mips3,
-    &cpu_mips32,
-    &cpu_mips32r2,
-    &cpu_mips32r3,
-    &cpu_mips32r5,
-    &cpu_mips32r6,
-    &cpu_mips4,
-    &cpu_mips5,
-    &cpu_mips64,
-    &cpu_mips64r2,
-    &cpu_mips64r3,
-    &cpu_mips64r5,
-    &cpu_mips64r6,
-    &cpu_octeon,
-    &cpu_p5600,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    abs2008,
+    cnmips,
+    crc,
+    dsp,
+    dspr2,
+    dspr3,
+    eva,
+    fp64,
+    fpxx,
+    ginv,
+    gp64,
+    long_calls,
+    micromips,
+    mips1,
+    mips16,
+    mips2,
+    mips3,
+    mips32,
+    mips32r2,
+    mips32r3,
+    mips32r5,
+    mips32r6,
+    mips3_32,
+    mips3_32r2,
+    mips4,
+    mips4_32,
+    mips4_32r2,
+    mips5,
+    mips5_32r2,
+    mips64,
+    mips64r2,
+    mips64r3,
+    mips64r5,
+    mips64r6,
+    msa,
+    mt,
+    nan2008,
+    noabicalls,
+    nomadd4,
+    nooddspreg,
+    p5600,
+    ptr64,
+    single_float,
+    soft_float,
+    sym32,
+    use_indirect_jump_hazard,
+    use_tcc_in_div,
+    vfpu,
+    virt,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.abs2008)] = .{
+        .index = @enumToInt(Feature.abs2008),
+        .name = @tagName(Feature.abs2008),
+        .llvm_name = "abs2008",
+        .description = "Disable IEEE 754-2008 abs.fmt mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.cnmips)] = .{
+        .index = @enumToInt(Feature.cnmips),
+        .name = @tagName(Feature.cnmips),
+        .llvm_name = "cnmips",
+        .description = "Octeon cnMIPS Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips64r2,
+        }),
+    };
+    result[@enumToInt(Feature.crc)] = .{
+        .index = @enumToInt(Feature.crc),
+        .name = @tagName(Feature.crc),
+        .llvm_name = "crc",
+        .description = "Mips R6 CRC ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dsp)] = .{
+        .index = @enumToInt(Feature.dsp),
+        .name = @tagName(Feature.dsp),
+        .llvm_name = "dsp",
+        .description = "Mips DSP ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dspr2)] = .{
+        .index = @enumToInt(Feature.dspr2),
+        .name = @tagName(Feature.dspr2),
+        .llvm_name = "dspr2",
+        .description = "Mips DSP-R2 ASE",
+        .dependencies = featureSet(&[_]Feature{
+            .dsp,
+        }),
+    };
+    result[@enumToInt(Feature.dspr3)] = .{
+        .index = @enumToInt(Feature.dspr3),
+        .name = @tagName(Feature.dspr3),
+        .llvm_name = "dspr3",
+        .description = "Mips DSP-R3 ASE",
+        .dependencies = featureSet(&[_]Feature{
+            .dsp,
+            .dspr2,
+        }),
+    };
+    result[@enumToInt(Feature.eva)] = .{
+        .index = @enumToInt(Feature.eva),
+        .name = @tagName(Feature.eva),
+        .llvm_name = "eva",
+        .description = "Mips EVA ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp64)] = .{
+        .index = @enumToInt(Feature.fp64),
+        .name = @tagName(Feature.fp64),
+        .llvm_name = "fp64",
+        .description = "Support 64-bit FP registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fpxx)] = .{
+        .index = @enumToInt(Feature.fpxx),
+        .name = @tagName(Feature.fpxx),
+        .llvm_name = "fpxx",
+        .description = "Support for FPXX",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ginv)] = .{
+        .index = @enumToInt(Feature.ginv),
+        .name = @tagName(Feature.ginv),
+        .llvm_name = "ginv",
+        .description = "Mips Global Invalidate ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.gp64)] = .{
+        .index = @enumToInt(Feature.gp64),
+        .name = @tagName(Feature.gp64),
+        .llvm_name = "gp64",
+        .description = "General Purpose Registers are 64-bit wide",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.long_calls)] = .{
+        .index = @enumToInt(Feature.long_calls),
+        .name = @tagName(Feature.long_calls),
+        .llvm_name = "long-calls",
+        .description = "Disable use of the jal instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.micromips)] = .{
+        .index = @enumToInt(Feature.micromips),
+        .name = @tagName(Feature.micromips),
+        .llvm_name = "micromips",
+        .description = "microMips mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips1)] = .{
+        .index = @enumToInt(Feature.mips1),
+        .name = @tagName(Feature.mips1),
+        .llvm_name = "mips1",
+        .description = "Mips I ISA Support [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips16)] = .{
+        .index = @enumToInt(Feature.mips16),
+        .name = @tagName(Feature.mips16),
+        .llvm_name = "mips16",
+        .description = "Mips16 mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips2)] = .{
+        .index = @enumToInt(Feature.mips2),
+        .name = @tagName(Feature.mips2),
+        .llvm_name = "mips2",
+        .description = "Mips II ISA Support [highly experimental]",
+        .dependencies = featureSet(&[_]Feature{
+            .mips1,
+        }),
+    };
+    result[@enumToInt(Feature.mips3)] = .{
+        .index = @enumToInt(Feature.mips3),
+        .name = @tagName(Feature.mips3),
+        .llvm_name = "mips3",
+        .description = "MIPS III ISA Support [highly experimental]",
+        .dependencies = featureSet(&[_]Feature{
+            .fp64,
+            .gp64,
+            .mips2,
+            .mips3_32,
+            .mips3_32r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips32)] = .{
+        .index = @enumToInt(Feature.mips32),
+        .name = @tagName(Feature.mips32),
+        .llvm_name = "mips32",
+        .description = "Mips32 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips2,
+            .mips3_32,
+            .mips4_32,
+        }),
+    };
+    result[@enumToInt(Feature.mips32r2)] = .{
+        .index = @enumToInt(Feature.mips32r2),
+        .name = @tagName(Feature.mips32r2),
+        .llvm_name = "mips32r2",
+        .description = "Mips32r2 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32,
+            .mips3_32r2,
+            .mips4_32r2,
+            .mips5_32r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips32r3)] = .{
+        .index = @enumToInt(Feature.mips32r3),
+        .name = @tagName(Feature.mips32r3),
+        .llvm_name = "mips32r3",
+        .description = "Mips32r3 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips32r5)] = .{
+        .index = @enumToInt(Feature.mips32r5),
+        .name = @tagName(Feature.mips32r5),
+        .llvm_name = "mips32r5",
+        .description = "Mips32r5 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r3,
+        }),
+    };
+    result[@enumToInt(Feature.mips32r6)] = .{
+        .index = @enumToInt(Feature.mips32r6),
+        .name = @tagName(Feature.mips32r6),
+        .llvm_name = "mips32r6",
+        .description = "Mips32r6 ISA Support [experimental]",
+        .dependencies = featureSet(&[_]Feature{
+            .abs2008,
+            .fp64,
+            .mips32r5,
+            .nan2008,
+        }),
+    };
+    result[@enumToInt(Feature.mips3_32)] = .{
+        .index = @enumToInt(Feature.mips3_32),
+        .name = @tagName(Feature.mips3_32),
+        .llvm_name = "mips3_32",
+        .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips3_32r2)] = .{
+        .index = @enumToInt(Feature.mips3_32r2),
+        .name = @tagName(Feature.mips3_32r2),
+        .llvm_name = "mips3_32r2",
+        .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips4)] = .{
+        .index = @enumToInt(Feature.mips4),
+        .name = @tagName(Feature.mips4),
+        .llvm_name = "mips4",
+        .description = "MIPS IV ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips3,
+            .mips4_32,
+            .mips4_32r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips4_32)] = .{
+        .index = @enumToInt(Feature.mips4_32),
+        .name = @tagName(Feature.mips4_32),
+        .llvm_name = "mips4_32",
+        .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips4_32r2)] = .{
+        .index = @enumToInt(Feature.mips4_32r2),
+        .name = @tagName(Feature.mips4_32r2),
+        .llvm_name = "mips4_32r2",
+        .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips5)] = .{
+        .index = @enumToInt(Feature.mips5),
+        .name = @tagName(Feature.mips5),
+        .llvm_name = "mips5",
+        .description = "MIPS V ISA Support [highly experimental]",
+        .dependencies = featureSet(&[_]Feature{
+            .mips4,
+            .mips5_32r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips5_32r2)] = .{
+        .index = @enumToInt(Feature.mips5_32r2),
+        .name = @tagName(Feature.mips5_32r2),
+        .llvm_name = "mips5_32r2",
+        .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mips64)] = .{
+        .index = @enumToInt(Feature.mips64),
+        .name = @tagName(Feature.mips64),
+        .llvm_name = "mips64",
+        .description = "Mips64 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32,
+            .mips5,
+        }),
+    };
+    result[@enumToInt(Feature.mips64r2)] = .{
+        .index = @enumToInt(Feature.mips64r2),
+        .name = @tagName(Feature.mips64r2),
+        .llvm_name = "mips64r2",
+        .description = "Mips64r2 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r2,
+            .mips64,
+        }),
+    };
+    result[@enumToInt(Feature.mips64r3)] = .{
+        .index = @enumToInt(Feature.mips64r3),
+        .name = @tagName(Feature.mips64r3),
+        .llvm_name = "mips64r3",
+        .description = "Mips64r3 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r3,
+            .mips64r2,
+        }),
+    };
+    result[@enumToInt(Feature.mips64r5)] = .{
+        .index = @enumToInt(Feature.mips64r5),
+        .name = @tagName(Feature.mips64r5),
+        .llvm_name = "mips64r5",
+        .description = "Mips64r5 ISA Support",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r5,
+            .mips64r3,
+        }),
+    };
+    result[@enumToInt(Feature.mips64r6)] = .{
+        .index = @enumToInt(Feature.mips64r6),
+        .name = @tagName(Feature.mips64r6),
+        .llvm_name = "mips64r6",
+        .description = "Mips64r6 ISA Support [experimental]",
+        .dependencies = featureSet(&[_]Feature{
+            .abs2008,
+            .mips32r6,
+            .mips64r5,
+            .nan2008,
+        }),
+    };
+    result[@enumToInt(Feature.msa)] = .{
+        .index = @enumToInt(Feature.msa),
+        .name = @tagName(Feature.msa),
+        .llvm_name = "msa",
+        .description = "Mips MSA ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mt)] = .{
+        .index = @enumToInt(Feature.mt),
+        .name = @tagName(Feature.mt),
+        .llvm_name = "mt",
+        .description = "Mips MT ASE",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nan2008)] = .{
+        .index = @enumToInt(Feature.nan2008),
+        .name = @tagName(Feature.nan2008),
+        .llvm_name = "nan2008",
+        .description = "IEEE 754-2008 NaN encoding",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.noabicalls)] = .{
+        .index = @enumToInt(Feature.noabicalls),
+        .name = @tagName(Feature.noabicalls),
+        .llvm_name = "noabicalls",
+        .description = "Disable SVR4-style position-independent code",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nomadd4)] = .{
+        .index = @enumToInt(Feature.nomadd4),
+        .name = @tagName(Feature.nomadd4),
+        .llvm_name = "nomadd4",
+        .description = "Disable 4-operand madd.fmt and related instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nooddspreg)] = .{
+        .index = @enumToInt(Feature.nooddspreg),
+        .name = @tagName(Feature.nooddspreg),
+        .llvm_name = "nooddspreg",
+        .description = "Disable odd numbered single-precision registers",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.p5600)] = .{
+        .index = @enumToInt(Feature.p5600),
+        .name = @tagName(Feature.p5600),
+        .llvm_name = "p5600",
+        .description = "The P5600 Processor",
+        .dependencies = featureSet(&[_]Feature{
+            .mips32r5,
+        }),
+    };
+    result[@enumToInt(Feature.ptr64)] = .{
+        .index = @enumToInt(Feature.ptr64),
+        .name = @tagName(Feature.ptr64),
+        .llvm_name = "ptr64",
+        .description = "Pointers are 64-bit wide",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.single_float)] = .{
+        .index = @enumToInt(Feature.single_float),
+        .name = @tagName(Feature.single_float),
+        .llvm_name = "single-float",
+        .description = "Only supports single precision float",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.soft_float)] = .{
+        .index = @enumToInt(Feature.soft_float),
+        .name = @tagName(Feature.soft_float),
+        .llvm_name = "soft-float",
+        .description = "Does not support floating point instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sym32)] = .{
+        .index = @enumToInt(Feature.sym32),
+        .name = @tagName(Feature.sym32),
+        .llvm_name = "sym32",
+        .description = "Symbols are 32 bit on Mips64",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
+        .index = @enumToInt(Feature.use_indirect_jump_hazard),
+        .name = @tagName(Feature.use_indirect_jump_hazard),
+        .llvm_name = "use-indirect-jump-hazard",
+        .description = "Use indirect jump guards to prevent certain speculation based attacks",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.use_tcc_in_div)] = .{
+        .index = @enumToInt(Feature.use_tcc_in_div),
+        .name = @tagName(Feature.use_tcc_in_div),
+        .llvm_name = "use-tcc-in-div",
+        .description = "Force the assembler to use trapping",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vfpu)] = .{
+        .index = @enumToInt(Feature.vfpu),
+        .name = @tagName(Feature.vfpu),
+        .llvm_name = "vfpu",
+        .description = "Enable vector FPU instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.virt)] = .{
+        .index = @enumToInt(Feature.virt),
+        .name = @tagName(Feature.virt),
+        .llvm_name = "virt",
+        .description = "Mips Virtualization ASE",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const mips1 = Cpu{
+        .name = "mips1",
+        .llvm_name = "mips1",
+        .features = featureSet(&[_]Feature{
+            .mips1,
+        }),
+    };
+    pub const mips2 = Cpu{
+        .name = "mips2",
+        .llvm_name = "mips2",
+        .features = featureSet(&[_]Feature{
+            .mips2,
+        }),
+    };
+    pub const mips3 = Cpu{
+        .name = "mips3",
+        .llvm_name = "mips3",
+        .features = featureSet(&[_]Feature{
+            .mips3,
+        }),
+    };
+    pub const mips32 = Cpu{
+        .name = "mips32",
+        .llvm_name = "mips32",
+        .features = featureSet(&[_]Feature{
+            .mips32,
+        }),
+    };
+    pub const mips32r2 = Cpu{
+        .name = "mips32r2",
+        .llvm_name = "mips32r2",
+        .features = featureSet(&[_]Feature{
+            .mips32r2,
+        }),
+    };
+    pub const mips32r3 = Cpu{
+        .name = "mips32r3",
+        .llvm_name = "mips32r3",
+        .features = featureSet(&[_]Feature{
+            .mips32r3,
+        }),
+    };
+    pub const mips32r5 = Cpu{
+        .name = "mips32r5",
+        .llvm_name = "mips32r5",
+        .features = featureSet(&[_]Feature{
+            .mips32r5,
+        }),
+    };
+    pub const mips32r6 = Cpu{
+        .name = "mips32r6",
+        .llvm_name = "mips32r6",
+        .features = featureSet(&[_]Feature{
+            .mips32r6,
+        }),
+    };
+    pub const mips4 = Cpu{
+        .name = "mips4",
+        .llvm_name = "mips4",
+        .features = featureSet(&[_]Feature{
+            .mips4,
+        }),
+    };
+    pub const mips5 = Cpu{
+        .name = "mips5",
+        .llvm_name = "mips5",
+        .features = featureSet(&[_]Feature{
+            .mips5,
+        }),
+    };
+    pub const mips64 = Cpu{
+        .name = "mips64",
+        .llvm_name = "mips64",
+        .features = featureSet(&[_]Feature{
+            .mips64,
+        }),
+    };
+    pub const mips64r2 = Cpu{
+        .name = "mips64r2",
+        .llvm_name = "mips64r2",
+        .features = featureSet(&[_]Feature{
+            .mips64r2,
+        }),
+    };
+    pub const mips64r3 = Cpu{
+        .name = "mips64r3",
+        .llvm_name = "mips64r3",
+        .features = featureSet(&[_]Feature{
+            .mips64r3,
+        }),
+    };
+    pub const mips64r5 = Cpu{
+        .name = "mips64r5",
+        .llvm_name = "mips64r5",
+        .features = featureSet(&[_]Feature{
+            .mips64r5,
+        }),
+    };
+    pub const mips64r6 = Cpu{
+        .name = "mips64r6",
+        .llvm_name = "mips64r6",
+        .features = featureSet(&[_]Feature{
+            .mips64r6,
+        }),
+    };
+    pub const octeon = Cpu{
+        .name = "octeon",
+        .llvm_name = "octeon",
+        .features = featureSet(&[_]Feature{
+            .cnmips,
+            .mips64r2,
+        }),
+    };
+    pub const p5600 = Cpu{
+        .name = "p5600",
+        .llvm_name = "p5600",
+        .features = featureSet(&[_]Feature{
+            .p5600,
+        }),
+    };
+};
+
+/// All mips CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.mips1,
+    &cpu.mips2,
+    &cpu.mips3,
+    &cpu.mips32,
+    &cpu.mips32r2,
+    &cpu.mips32r3,
+    &cpu.mips32r5,
+    &cpu.mips32r6,
+    &cpu.mips4,
+    &cpu.mips5,
+    &cpu.mips64,
+    &cpu.mips64r2,
+    &cpu.mips64r3,
+    &cpu.mips64r5,
+    &cpu.mips64r6,
+    &cpu.octeon,
+    &cpu.p5600,
 };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 75e641f0dc3edc64760fea53ce59e1ded8fb2841..21d6a8211d0ac5051bb79c3725ed8e949b867069 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -1,69 +1,75 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
 
-pub const feature_hwmult16 = Feature{
-    .name = "hwmult16",
-    .llvm_name = "hwmult16",
-    .description = "Enable 16-bit hardware multiplier",
-    .dependencies = &[_]*const Feature {
-    },
+pub const Feature = enum {
+    ext,
+    hwmult16,
+    hwmult32,
+    hwmultf5,
 };
 
-pub const feature_hwmult32 = Feature{
-    .name = "hwmult32",
-    .llvm_name = "hwmult32",
-    .description = "Enable 32-bit hardware multiplier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_hwmultf5 = Feature{
-    .name = "hwmultf5",
-    .llvm_name = "hwmultf5",
-    .description = "Enable F5 series hardware multiplier",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ext = Feature{
-    .name = "ext",
-    .llvm_name = "ext",
-    .description = "Enable MSP430-X extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_hwmult16,
-    &feature_hwmult32,
-    &feature_hwmultf5,
-    &feature_ext,
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
-};
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
-pub const cpu_msp430 = Cpu{
-    .name = "msp430",
-    .llvm_name = "msp430",
-    .dependencies = &[_]*const Feature {
-    },
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.ext)] = .{
+        .index = @enumToInt(Feature.ext),
+        .name = @tagName(Feature.ext),
+        .llvm_name = "ext",
+        .description = "Enable MSP430-X extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hwmult16)] = .{
+        .index = @enumToInt(Feature.hwmult16),
+        .name = @tagName(Feature.hwmult16),
+        .llvm_name = "hwmult16",
+        .description = "Enable 16-bit hardware multiplier",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hwmult32)] = .{
+        .index = @enumToInt(Feature.hwmult32),
+        .name = @tagName(Feature.hwmult32),
+        .llvm_name = "hwmult32",
+        .description = "Enable 32-bit hardware multiplier",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hwmultf5)] = .{
+        .index = @enumToInt(Feature.hwmultf5),
+        .name = @tagName(Feature.hwmultf5),
+        .llvm_name = "hwmultf5",
+        .description = "Enable F5 series hardware multiplier",
+        .dependencies = 0,
+    };
+    break :blk result;
 };
 
-pub const cpu_msp430x = Cpu{
-    .name = "msp430x",
-    .llvm_name = "msp430x",
-    .dependencies = &[_]*const Feature {
-        &feature_ext,
-    },
+pub const cpu = struct {
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const msp430 = Cpu{
+        .name = "msp430",
+        .llvm_name = "msp430",
+        .features = 0,
+    };
+    pub const msp430x = Cpu{
+        .name = "msp430x",
+        .llvm_name = "msp430x",
+        .features = featureSet(&[_]Feature{
+            .ext,
+        }),
+    };
 };
 
-pub const cpus = &[_]*const Cpu {
-    &cpu_generic,
-    &cpu_msp430,
-    &cpu_msp430x,
+/// All msp430 CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.generic,
+    &cpu.msp430,
+    &cpu.msp430x,
 };
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index cddd800f30f4333aa4e2d651266d61d8b400de03..d277785aff9f49930d146c6918a0a2e899973ad3 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -1,379 +1,354 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_ptx32 = Feature{
-    .name = "ptx32",
-    .llvm_name = "ptx32",
-    .description = "Use PTX version 3.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx40 = Feature{
-    .name = "ptx40",
-    .llvm_name = "ptx40",
-    .description = "Use PTX version 4.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx41 = Feature{
-    .name = "ptx41",
-    .llvm_name = "ptx41",
-    .description = "Use PTX version 4.1",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx42 = Feature{
-    .name = "ptx42",
-    .llvm_name = "ptx42",
-    .description = "Use PTX version 4.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx43 = Feature{
-    .name = "ptx43",
-    .llvm_name = "ptx43",
-    .description = "Use PTX version 4.3",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx50 = Feature{
-    .name = "ptx50",
-    .llvm_name = "ptx50",
-    .description = "Use PTX version 5.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx60 = Feature{
-    .name = "ptx60",
-    .llvm_name = "ptx60",
-    .description = "Use PTX version 6.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx61 = Feature{
-    .name = "ptx61",
-    .llvm_name = "ptx61",
-    .description = "Use PTX version 6.1",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx63 = Feature{
-    .name = "ptx63",
-    .llvm_name = "ptx63",
-    .description = "Use PTX version 6.3",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ptx64 = Feature{
-    .name = "ptx64",
-    .llvm_name = "ptx64",
-    .description = "Use PTX version 6.4",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_20 = Feature{
-    .name = "sm_20",
-    .llvm_name = "sm_20",
-    .description = "Target SM 2.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_21 = Feature{
-    .name = "sm_21",
-    .llvm_name = "sm_21",
-    .description = "Target SM 2.1",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_30 = Feature{
-    .name = "sm_30",
-    .llvm_name = "sm_30",
-    .description = "Target SM 3.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_32 = Feature{
-    .name = "sm_32",
-    .llvm_name = "sm_32",
-    .description = "Target SM 3.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_35 = Feature{
-    .name = "sm_35",
-    .llvm_name = "sm_35",
-    .description = "Target SM 3.5",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_37 = Feature{
-    .name = "sm_37",
-    .llvm_name = "sm_37",
-    .description = "Target SM 3.7",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_50 = Feature{
-    .name = "sm_50",
-    .llvm_name = "sm_50",
-    .description = "Target SM 5.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_52 = Feature{
-    .name = "sm_52",
-    .llvm_name = "sm_52",
-    .description = "Target SM 5.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_53 = Feature{
-    .name = "sm_53",
-    .llvm_name = "sm_53",
-    .description = "Target SM 5.3",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_60 = Feature{
-    .name = "sm_60",
-    .llvm_name = "sm_60",
-    .description = "Target SM 6.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_61 = Feature{
-    .name = "sm_61",
-    .llvm_name = "sm_61",
-    .description = "Target SM 6.1",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_62 = Feature{
-    .name = "sm_62",
-    .llvm_name = "sm_62",
-    .description = "Target SM 6.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_70 = Feature{
-    .name = "sm_70",
-    .llvm_name = "sm_70",
-    .description = "Target SM 7.0",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_72 = Feature{
-    .name = "sm_72",
-    .llvm_name = "sm_72",
-    .description = "Target SM 7.2",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_sm_75 = Feature{
-    .name = "sm_75",
-    .llvm_name = "sm_75",
-    .description = "Target SM 7.5",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_ptx32,
-    &feature_ptx40,
-    &feature_ptx41,
-    &feature_ptx42,
-    &feature_ptx43,
-    &feature_ptx50,
-    &feature_ptx60,
-    &feature_ptx61,
-    &feature_ptx63,
-    &feature_ptx64,
-    &feature_sm_20,
-    &feature_sm_21,
-    &feature_sm_30,
-    &feature_sm_32,
-    &feature_sm_35,
-    &feature_sm_37,
-    &feature_sm_50,
-    &feature_sm_52,
-    &feature_sm_53,
-    &feature_sm_60,
-    &feature_sm_61,
-    &feature_sm_62,
-    &feature_sm_70,
-    &feature_sm_72,
-    &feature_sm_75,
-};
-
-pub const cpu_sm_20 = Cpu{
-    .name = "sm_20",
-    .llvm_name = "sm_20",
-    .dependencies = &[_]*const Feature {
-        &feature_sm_20,
-    },
-};
-
-pub const cpu_sm_21 = Cpu{
-    .name = "sm_21",
-    .llvm_name = "sm_21",
-    .dependencies = &[_]*const Feature {
-        &feature_sm_21,
-    },
-};
-
-pub const cpu_sm_30 = Cpu{
-    .name = "sm_30",
-    .llvm_name = "sm_30",
-    .dependencies = &[_]*const Feature {
-        &feature_sm_30,
-    },
-};
-
-pub const cpu_sm_32 = Cpu{
-    .name = "sm_32",
-    .llvm_name = "sm_32",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx40,
-        &feature_sm_32,
-    },
-};
-
-pub const cpu_sm_35 = Cpu{
-    .name = "sm_35",
-    .llvm_name = "sm_35",
-    .dependencies = &[_]*const Feature {
-        &feature_sm_35,
-    },
-};
-
-pub const cpu_sm_37 = Cpu{
-    .name = "sm_37",
-    .llvm_name = "sm_37",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx41,
-        &feature_sm_37,
-    },
-};
-
-pub const cpu_sm_50 = Cpu{
-    .name = "sm_50",
-    .llvm_name = "sm_50",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx40,
-        &feature_sm_50,
-    },
-};
-
-pub const cpu_sm_52 = Cpu{
-    .name = "sm_52",
-    .llvm_name = "sm_52",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx41,
-        &feature_sm_52,
-    },
-};
-
-pub const cpu_sm_53 = Cpu{
-    .name = "sm_53",
-    .llvm_name = "sm_53",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx42,
-        &feature_sm_53,
-    },
-};
-
-pub const cpu_sm_60 = Cpu{
-    .name = "sm_60",
-    .llvm_name = "sm_60",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx50,
-        &feature_sm_60,
-    },
-};
-
-pub const cpu_sm_61 = Cpu{
-    .name = "sm_61",
-    .llvm_name = "sm_61",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx50,
-        &feature_sm_61,
-    },
-};
-
-pub const cpu_sm_62 = Cpu{
-    .name = "sm_62",
-    .llvm_name = "sm_62",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx50,
-        &feature_sm_62,
-    },
-};
-
-pub const cpu_sm_70 = Cpu{
-    .name = "sm_70",
-    .llvm_name = "sm_70",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx60,
-        &feature_sm_70,
-    },
-};
-
-pub const cpu_sm_72 = Cpu{
-    .name = "sm_72",
-    .llvm_name = "sm_72",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx61,
-        &feature_sm_72,
-    },
-};
-
-pub const cpu_sm_75 = Cpu{
-    .name = "sm_75",
-    .llvm_name = "sm_75",
-    .dependencies = &[_]*const Feature {
-        &feature_ptx63,
-        &feature_sm_75,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_sm_20,
-    &cpu_sm_21,
-    &cpu_sm_30,
-    &cpu_sm_32,
-    &cpu_sm_35,
-    &cpu_sm_37,
-    &cpu_sm_50,
-    &cpu_sm_52,
-    &cpu_sm_53,
-    &cpu_sm_60,
-    &cpu_sm_61,
-    &cpu_sm_62,
-    &cpu_sm_70,
-    &cpu_sm_72,
-    &cpu_sm_75,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    ptx32,
+    ptx40,
+    ptx41,
+    ptx42,
+    ptx43,
+    ptx50,
+    ptx60,
+    ptx61,
+    ptx63,
+    ptx64,
+    sm_20,
+    sm_21,
+    sm_30,
+    sm_32,
+    sm_35,
+    sm_37,
+    sm_50,
+    sm_52,
+    sm_53,
+    sm_60,
+    sm_61,
+    sm_62,
+    sm_70,
+    sm_72,
+    sm_75,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.ptx32)] = .{
+        .index = @enumToInt(Feature.ptx32),
+        .name = @tagName(Feature.ptx32),
+        .llvm_name = "ptx32",
+        .description = "Use PTX version 3.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx40)] = .{
+        .index = @enumToInt(Feature.ptx40),
+        .name = @tagName(Feature.ptx40),
+        .llvm_name = "ptx40",
+        .description = "Use PTX version 4.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx41)] = .{
+        .index = @enumToInt(Feature.ptx41),
+        .name = @tagName(Feature.ptx41),
+        .llvm_name = "ptx41",
+        .description = "Use PTX version 4.1",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx42)] = .{
+        .index = @enumToInt(Feature.ptx42),
+        .name = @tagName(Feature.ptx42),
+        .llvm_name = "ptx42",
+        .description = "Use PTX version 4.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx43)] = .{
+        .index = @enumToInt(Feature.ptx43),
+        .name = @tagName(Feature.ptx43),
+        .llvm_name = "ptx43",
+        .description = "Use PTX version 4.3",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx50)] = .{
+        .index = @enumToInt(Feature.ptx50),
+        .name = @tagName(Feature.ptx50),
+        .llvm_name = "ptx50",
+        .description = "Use PTX version 5.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx60)] = .{
+        .index = @enumToInt(Feature.ptx60),
+        .name = @tagName(Feature.ptx60),
+        .llvm_name = "ptx60",
+        .description = "Use PTX version 6.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx61)] = .{
+        .index = @enumToInt(Feature.ptx61),
+        .name = @tagName(Feature.ptx61),
+        .llvm_name = "ptx61",
+        .description = "Use PTX version 6.1",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx63)] = .{
+        .index = @enumToInt(Feature.ptx63),
+        .name = @tagName(Feature.ptx63),
+        .llvm_name = "ptx63",
+        .description = "Use PTX version 6.3",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ptx64)] = .{
+        .index = @enumToInt(Feature.ptx64),
+        .name = @tagName(Feature.ptx64),
+        .llvm_name = "ptx64",
+        .description = "Use PTX version 6.4",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_20)] = .{
+        .index = @enumToInt(Feature.sm_20),
+        .name = @tagName(Feature.sm_20),
+        .llvm_name = "sm_20",
+        .description = "Target SM 2.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_21)] = .{
+        .index = @enumToInt(Feature.sm_21),
+        .name = @tagName(Feature.sm_21),
+        .llvm_name = "sm_21",
+        .description = "Target SM 2.1",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_30)] = .{
+        .index = @enumToInt(Feature.sm_30),
+        .name = @tagName(Feature.sm_30),
+        .llvm_name = "sm_30",
+        .description = "Target SM 3.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_32)] = .{
+        .index = @enumToInt(Feature.sm_32),
+        .name = @tagName(Feature.sm_32),
+        .llvm_name = "sm_32",
+        .description = "Target SM 3.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_35)] = .{
+        .index = @enumToInt(Feature.sm_35),
+        .name = @tagName(Feature.sm_35),
+        .llvm_name = "sm_35",
+        .description = "Target SM 3.5",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_37)] = .{
+        .index = @enumToInt(Feature.sm_37),
+        .name = @tagName(Feature.sm_37),
+        .llvm_name = "sm_37",
+        .description = "Target SM 3.7",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_50)] = .{
+        .index = @enumToInt(Feature.sm_50),
+        .name = @tagName(Feature.sm_50),
+        .llvm_name = "sm_50",
+        .description = "Target SM 5.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_52)] = .{
+        .index = @enumToInt(Feature.sm_52),
+        .name = @tagName(Feature.sm_52),
+        .llvm_name = "sm_52",
+        .description = "Target SM 5.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_53)] = .{
+        .index = @enumToInt(Feature.sm_53),
+        .name = @tagName(Feature.sm_53),
+        .llvm_name = "sm_53",
+        .description = "Target SM 5.3",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_60)] = .{
+        .index = @enumToInt(Feature.sm_60),
+        .name = @tagName(Feature.sm_60),
+        .llvm_name = "sm_60",
+        .description = "Target SM 6.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_61)] = .{
+        .index = @enumToInt(Feature.sm_61),
+        .name = @tagName(Feature.sm_61),
+        .llvm_name = "sm_61",
+        .description = "Target SM 6.1",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_62)] = .{
+        .index = @enumToInt(Feature.sm_62),
+        .name = @tagName(Feature.sm_62),
+        .llvm_name = "sm_62",
+        .description = "Target SM 6.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_70)] = .{
+        .index = @enumToInt(Feature.sm_70),
+        .name = @tagName(Feature.sm_70),
+        .llvm_name = "sm_70",
+        .description = "Target SM 7.0",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_72)] = .{
+        .index = @enumToInt(Feature.sm_72),
+        .name = @tagName(Feature.sm_72),
+        .llvm_name = "sm_72",
+        .description = "Target SM 7.2",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sm_75)] = .{
+        .index = @enumToInt(Feature.sm_75),
+        .name = @tagName(Feature.sm_75),
+        .llvm_name = "sm_75",
+        .description = "Target SM 7.5",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const sm_20 = Cpu{
+        .name = "sm_20",
+        .llvm_name = "sm_20",
+        .features = featureSet(&[_]Feature{
+            .sm_20,
+        }),
+    };
+    pub const sm_21 = Cpu{
+        .name = "sm_21",
+        .llvm_name = "sm_21",
+        .features = featureSet(&[_]Feature{
+            .sm_21,
+        }),
+    };
+    pub const sm_30 = Cpu{
+        .name = "sm_30",
+        .llvm_name = "sm_30",
+        .features = featureSet(&[_]Feature{
+            .sm_30,
+        }),
+    };
+    pub const sm_32 = Cpu{
+        .name = "sm_32",
+        .llvm_name = "sm_32",
+        .features = featureSet(&[_]Feature{
+            .ptx40,
+            .sm_32,
+        }),
+    };
+    pub const sm_35 = Cpu{
+        .name = "sm_35",
+        .llvm_name = "sm_35",
+        .features = featureSet(&[_]Feature{
+            .sm_35,
+        }),
+    };
+    pub const sm_37 = Cpu{
+        .name = "sm_37",
+        .llvm_name = "sm_37",
+        .features = featureSet(&[_]Feature{
+            .ptx41,
+            .sm_37,
+        }),
+    };
+    pub const sm_50 = Cpu{
+        .name = "sm_50",
+        .llvm_name = "sm_50",
+        .features = featureSet(&[_]Feature{
+            .ptx40,
+            .sm_50,
+        }),
+    };
+    pub const sm_52 = Cpu{
+        .name = "sm_52",
+        .llvm_name = "sm_52",
+        .features = featureSet(&[_]Feature{
+            .ptx41,
+            .sm_52,
+        }),
+    };
+    pub const sm_53 = Cpu{
+        .name = "sm_53",
+        .llvm_name = "sm_53",
+        .features = featureSet(&[_]Feature{
+            .ptx42,
+            .sm_53,
+        }),
+    };
+    pub const sm_60 = Cpu{
+        .name = "sm_60",
+        .llvm_name = "sm_60",
+        .features = featureSet(&[_]Feature{
+            .ptx50,
+            .sm_60,
+        }),
+    };
+    pub const sm_61 = Cpu{
+        .name = "sm_61",
+        .llvm_name = "sm_61",
+        .features = featureSet(&[_]Feature{
+            .ptx50,
+            .sm_61,
+        }),
+    };
+    pub const sm_62 = Cpu{
+        .name = "sm_62",
+        .llvm_name = "sm_62",
+        .features = featureSet(&[_]Feature{
+            .ptx50,
+            .sm_62,
+        }),
+    };
+    pub const sm_70 = Cpu{
+        .name = "sm_70",
+        .llvm_name = "sm_70",
+        .features = featureSet(&[_]Feature{
+            .ptx60,
+            .sm_70,
+        }),
+    };
+    pub const sm_72 = Cpu{
+        .name = "sm_72",
+        .llvm_name = "sm_72",
+        .features = featureSet(&[_]Feature{
+            .ptx61,
+            .sm_72,
+        }),
+    };
+    pub const sm_75 = Cpu{
+        .name = "sm_75",
+        .llvm_name = "sm_75",
+        .features = featureSet(&[_]Feature{
+            .ptx63,
+            .sm_75,
+        }),
+    };
+};
+
+/// All nvptx CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.sm_20,
+    &cpu.sm_21,
+    &cpu.sm_30,
+    &cpu.sm_32,
+    &cpu.sm_35,
+    &cpu.sm_37,
+    &cpu.sm_50,
+    &cpu.sm_52,
+    &cpu.sm_53,
+    &cpu.sm_60,
+    &cpu.sm_61,
+    &cpu.sm_62,
+    &cpu.sm_70,
+    &cpu.sm_72,
+    &cpu.sm_75,
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index f0d475a6e5999ae61069f1197b5924e993c1094e..bac15f231af1a9fe8f6bb761566c380ad62e3d2a 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -1,1115 +1,1035 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_bit64 = Feature{
-    .name = "bit64",
-    .llvm_name = "64bit",
-    .description = "Enable 64-bit instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_bitregs64 = Feature{
-    .name = "bitregs64",
-    .llvm_name = "64bitregs",
-    .description = "Enable 64-bit registers usage for ppc32 [beta]",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_altivec = Feature{
-    .name = "altivec",
-    .llvm_name = "altivec",
-    .description = "Enable Altivec instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_bpermd = Feature{
-    .name = "bpermd",
-    .llvm_name = "bpermd",
-    .description = "Enable the bpermd instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_booke = Feature{
-    .name = "booke",
-    .llvm_name = "booke",
-    .description = "Enable Book E instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-    },
-};
-
-pub const feature_cmpb = Feature{
-    .name = "cmpb",
-    .llvm_name = "cmpb",
-    .description = "Enable the cmpb instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_crbits = Feature{
-    .name = "crbits",
-    .llvm_name = "crbits",
-    .description = "Use condition-register bits individually",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_directMove = Feature{
-    .name = "directMove",
-    .llvm_name = "direct-move",
-    .description = "Enable Power8 direct move instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_e500 = Feature{
-    .name = "e500",
-    .llvm_name = "e500",
-    .description = "Enable E500/E500mc instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_extdiv = Feature{
-    .name = "extdiv",
-    .llvm_name = "extdiv",
-    .description = "Enable extended divide instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fcpsgn = Feature{
-    .name = "fcpsgn",
-    .llvm_name = "fcpsgn",
-    .description = "Enable the fcpsgn instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fpcvt = Feature{
-    .name = "fpcvt",
-    .llvm_name = "fpcvt",
-    .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fprnd = Feature{
-    .name = "fprnd",
-    .llvm_name = "fprnd",
-    .description = "Enable the fri[mnpz] instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fpu = Feature{
-    .name = "fpu",
-    .llvm_name = "fpu",
-    .description = "Enable classic FPU instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fre = Feature{
-    .name = "fre",
-    .llvm_name = "fre",
-    .description = "Enable the fre instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fres = Feature{
-    .name = "fres",
-    .llvm_name = "fres",
-    .description = "Enable the fres instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_frsqrte = Feature{
-    .name = "frsqrte",
-    .llvm_name = "frsqrte",
-    .description = "Enable the frsqrte instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_frsqrtes = Feature{
-    .name = "frsqrtes",
-    .llvm_name = "frsqrtes",
-    .description = "Enable the frsqrtes instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_fsqrt = Feature{
-    .name = "fsqrt",
-    .llvm_name = "fsqrt",
-    .description = "Enable the fsqrt instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_float128 = Feature{
-    .name = "float128",
-    .llvm_name = "float128",
-    .description = "Enable the __float128 data type for IEEE-754R Binary128.",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_htm = Feature{
-    .name = "htm",
-    .llvm_name = "htm",
-    .description = "Enable Hardware Transactional Memory instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_hardFloat = Feature{
-    .name = "hardFloat",
-    .llvm_name = "hard-float",
-    .description = "Enable floating-point instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_icbt = Feature{
-    .name = "icbt",
-    .llvm_name = "icbt",
-    .description = "Enable icbt instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_isaV30Instructions = Feature{
-    .name = "isaV30Instructions",
-    .llvm_name = "isa-v30-instructions",
-    .description = "Enable instructions added in ISA 3.0.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_isel = Feature{
-    .name = "isel",
-    .llvm_name = "isel",
-    .description = "Enable the isel instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_invariantFunctionDescriptors = Feature{
-    .name = "invariantFunctionDescriptors",
-    .llvm_name = "invariant-function-descriptors",
-    .description = "Assume function descriptors are invariant",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ldbrx = Feature{
-    .name = "ldbrx",
-    .llvm_name = "ldbrx",
-    .description = "Enable the ldbrx instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_lfiwax = Feature{
-    .name = "lfiwax",
-    .llvm_name = "lfiwax",
-    .description = "Enable the lfiwax instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_longcall = Feature{
-    .name = "longcall",
-    .llvm_name = "longcall",
-    .description = "Always use indirect calls",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mfocrf = Feature{
-    .name = "mfocrf",
-    .llvm_name = "mfocrf",
-    .description = "Enable the MFOCRF instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_msync = Feature{
-    .name = "msync",
-    .llvm_name = "msync",
-    .description = "Has only the msync instruction instead of sync",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-    },
-};
-
-pub const feature_power8Altivec = Feature{
-    .name = "power8Altivec",
-    .llvm_name = "power8-altivec",
-    .description = "Enable POWER8 Altivec instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_crypto = Feature{
-    .name = "crypto",
-    .llvm_name = "crypto",
-    .description = "Enable POWER8 Crypto instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_power8Vector = Feature{
-    .name = "power8Vector",
-    .llvm_name = "power8-vector",
-    .description = "Enable POWER8 vector instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_power9Altivec = Feature{
-    .name = "power9Altivec",
-    .llvm_name = "power9-altivec",
-    .description = "Enable POWER9 Altivec instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_isaV30Instructions,
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_power9Vector = Feature{
-    .name = "power9Vector",
-    .llvm_name = "power9-vector",
-    .description = "Enable POWER9 vector instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_isaV30Instructions,
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_popcntd = Feature{
-    .name = "popcntd",
-    .llvm_name = "popcntd",
-    .description = "Enable the popcnt[dw] instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ppc4xx = Feature{
-    .name = "ppc4xx",
-    .llvm_name = "ppc4xx",
-    .description = "Enable PPC 4xx instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ppc6xx = Feature{
-    .name = "ppc6xx",
-    .llvm_name = "ppc6xx",
-    .description = "Enable PPC 6xx instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ppcPostraSched = Feature{
-    .name = "ppcPostraSched",
-    .llvm_name = "ppc-postra-sched",
-    .description = "Use PowerPC post-RA scheduling strategy",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_ppcPreraSched = Feature{
-    .name = "ppcPreraSched",
-    .llvm_name = "ppc-prera-sched",
-    .description = "Use PowerPC pre-RA scheduling strategy",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_partwordAtomics = Feature{
-    .name = "partwordAtomics",
-    .llvm_name = "partword-atomics",
-    .description = "Enable l[bh]arx and st[bh]cx.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_qpx = Feature{
-    .name = "qpx",
-    .llvm_name = "qpx",
-    .description = "Enable QPX instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_recipprec = Feature{
-    .name = "recipprec",
-    .llvm_name = "recipprec",
-    .description = "Assume higher precision reciprocal estimates",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_spe = Feature{
-    .name = "spe",
-    .llvm_name = "spe",
-    .description = "Enable SPE instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_stfiwx = Feature{
-    .name = "stfiwx",
-    .llvm_name = "stfiwx",
-    .description = "Enable the stfiwx instruction",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_securePlt = Feature{
-    .name = "securePlt",
-    .llvm_name = "secure-plt",
-    .description = "Enable secure plt mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_slowPopcntd = Feature{
-    .name = "slowPopcntd",
-    .llvm_name = "slow-popcntd",
-    .description = "Has slow popcnt[dw] instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_twoConstNr = Feature{
-    .name = "twoConstNr",
-    .llvm_name = "two-const-nr",
-    .description = "Requires two constant Newton-Raphson computation",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vsx = Feature{
-    .name = "vsx",
-    .llvm_name = "vsx",
-    .description = "Enable VSX instructions",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const feature_vectorsUseTwoUnits = Feature{
-    .name = "vectorsUseTwoUnits",
-    .llvm_name = "vectors-use-two-units",
-    .description = "Vectors use two units",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_bit64,
-    &feature_bitregs64,
-    &feature_altivec,
-    &feature_bpermd,
-    &feature_booke,
-    &feature_cmpb,
-    &feature_crbits,
-    &feature_directMove,
-    &feature_e500,
-    &feature_extdiv,
-    &feature_fcpsgn,
-    &feature_fpcvt,
-    &feature_fprnd,
-    &feature_fpu,
-    &feature_fre,
-    &feature_fres,
-    &feature_frsqrte,
-    &feature_frsqrtes,
-    &feature_fsqrt,
-    &feature_float128,
-    &feature_htm,
-    &feature_hardFloat,
-    &feature_icbt,
-    &feature_isaV30Instructions,
-    &feature_isel,
-    &feature_invariantFunctionDescriptors,
-    &feature_ldbrx,
-    &feature_lfiwax,
-    &feature_longcall,
-    &feature_mfocrf,
-    &feature_msync,
-    &feature_power8Altivec,
-    &feature_crypto,
-    &feature_power8Vector,
-    &feature_power9Altivec,
-    &feature_power9Vector,
-    &feature_popcntd,
-    &feature_ppc4xx,
-    &feature_ppc6xx,
-    &feature_ppcPostraSched,
-    &feature_ppcPreraSched,
-    &feature_partwordAtomics,
-    &feature_qpx,
-    &feature_recipprec,
-    &feature_spe,
-    &feature_stfiwx,
-    &feature_securePlt,
-    &feature_slowPopcntd,
-    &feature_twoConstNr,
-    &feature_vsx,
-    &feature_vectorsUseTwoUnits,
-};
-
-pub const cpu_440 = Cpu{
-    .name = "440",
-    .llvm_name = "440",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-        &feature_booke,
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_isel,
-        &feature_msync,
-    },
-};
-
-pub const cpu_450 = Cpu{
-    .name = "450",
-    .llvm_name = "450",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-        &feature_booke,
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_isel,
-        &feature_msync,
-    },
-};
-
-pub const cpu_601 = Cpu{
-    .name = "601",
-    .llvm_name = "601",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fpu,
-    },
-};
-
-pub const cpu_602 = Cpu{
-    .name = "602",
-    .llvm_name = "602",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fpu,
-    },
-};
-
-pub const cpu_603 = Cpu{
-    .name = "603",
-    .llvm_name = "603",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_e603 = Cpu{
-    .name = "e603",
-    .llvm_name = "603e",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_ev603 = Cpu{
-    .name = "ev603",
-    .llvm_name = "603ev",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_604 = Cpu{
-    .name = "604",
-    .llvm_name = "604",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_e604 = Cpu{
-    .name = "e604",
-    .llvm_name = "604e",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_620 = Cpu{
-    .name = "620",
-    .llvm_name = "620",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_7400 = Cpu{
-    .name = "7400",
-    .llvm_name = "7400",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_7450 = Cpu{
-    .name = "7450",
-    .llvm_name = "7450",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_750 = Cpu{
-    .name = "750",
-    .llvm_name = "750",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_970 = Cpu{
-    .name = "970",
-    .llvm_name = "970",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_a2 = Cpu{
-    .name = "a2",
-    .llvm_name = "a2",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_icbt,
-        &feature_booke,
-        &feature_cmpb,
-        &feature_hardFloat,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_slowPopcntd,
-    },
-};
-
-pub const cpu_a2q = Cpu{
-    .name = "a2q",
-    .llvm_name = "a2q",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_icbt,
-        &feature_booke,
-        &feature_cmpb,
-        &feature_hardFloat,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_qpx,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_slowPopcntd,
-    },
-};
-
-pub const cpu_e500 = Cpu{
-    .name = "e500",
-    .llvm_name = "e500",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-        &feature_booke,
-        &feature_isel,
-    },
-};
-
-pub const cpu_e500mc = Cpu{
-    .name = "e500mc",
-    .llvm_name = "e500mc",
-    .dependencies = &[_]*const Feature {
-        &feature_icbt,
-        &feature_booke,
-        &feature_isel,
-        &feature_hardFloat,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_e5500 = Cpu{
-    .name = "e5500",
-    .llvm_name = "e5500",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_icbt,
-        &feature_booke,
-        &feature_isel,
-        &feature_mfocrf,
-        &feature_hardFloat,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_g3 = Cpu{
-    .name = "g3",
-    .llvm_name = "g3",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_g4 = Cpu{
-    .name = "g4",
-    .llvm_name = "g4",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_g4Plus = Cpu{
-    .name = "g4Plus",
-    .llvm_name = "g4+",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-    },
-};
-
-pub const cpu_g5 = Cpu{
-    .name = "g5",
-    .llvm_name = "g5",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const cpu_ppc = Cpu{
-    .name = "ppc",
-    .llvm_name = "ppc",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const cpu_ppc32 = Cpu{
-    .name = "ppc32",
-    .llvm_name = "ppc32",
-    .dependencies = &[_]*const Feature {
-        &feature_hardFloat,
-    },
-};
-
-pub const cpu_ppc64 = Cpu{
-    .name = "ppc64",
-    .llvm_name = "ppc64",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_ppc64le = Cpu{
-    .name = "ppc64le",
-    .llvm_name = "ppc64le",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_bpermd,
-        &feature_cmpb,
-        &feature_directMove,
-        &feature_extdiv,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_htm,
-        &feature_icbt,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_power8Altivec,
-        &feature_crypto,
-        &feature_power8Vector,
-        &feature_popcntd,
-        &feature_partwordAtomics,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_twoConstNr,
-        &feature_vsx,
-    },
-};
-
-pub const cpu_pwr3 = Cpu{
-    .name = "pwr3",
-    .llvm_name = "pwr3",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr4 = Cpu{
-    .name = "pwr4",
-    .llvm_name = "pwr4",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr5 = Cpu{
-    .name = "pwr5",
-    .llvm_name = "pwr5",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr5x = Cpu{
-    .name = "pwr5x",
-    .llvm_name = "pwr5x",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_mfocrf,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr6 = Cpu{
-    .name = "pwr6",
-    .llvm_name = "pwr6",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_cmpb,
-        &feature_fcpsgn,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_recipprec,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr6x = Cpu{
-    .name = "pwr6x",
-    .llvm_name = "pwr6x",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_cmpb,
-        &feature_fcpsgn,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_recipprec,
-        &feature_stfiwx,
-    },
-};
-
-pub const cpu_pwr7 = Cpu{
-    .name = "pwr7",
-    .llvm_name = "pwr7",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_bpermd,
-        &feature_cmpb,
-        &feature_extdiv,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_popcntd,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_twoConstNr,
-        &feature_vsx,
-    },
-};
-
-pub const cpu_pwr8 = Cpu{
-    .name = "pwr8",
-    .llvm_name = "pwr8",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_bpermd,
-        &feature_cmpb,
-        &feature_directMove,
-        &feature_extdiv,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_htm,
-        &feature_icbt,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_power8Altivec,
-        &feature_crypto,
-        &feature_power8Vector,
-        &feature_popcntd,
-        &feature_partwordAtomics,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_twoConstNr,
-        &feature_vsx,
-    },
-};
-
-pub const cpu_pwr9 = Cpu{
-    .name = "pwr9",
-    .llvm_name = "pwr9",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-        &feature_hardFloat,
-        &feature_altivec,
-        &feature_bpermd,
-        &feature_cmpb,
-        &feature_directMove,
-        &feature_extdiv,
-        &feature_fcpsgn,
-        &feature_fpcvt,
-        &feature_fprnd,
-        &feature_fre,
-        &feature_fres,
-        &feature_frsqrte,
-        &feature_frsqrtes,
-        &feature_fsqrt,
-        &feature_htm,
-        &feature_icbt,
-        &feature_isaV30Instructions,
-        &feature_isel,
-        &feature_ldbrx,
-        &feature_lfiwax,
-        &feature_mfocrf,
-        &feature_power8Altivec,
-        &feature_crypto,
-        &feature_power8Vector,
-        &feature_power9Altivec,
-        &feature_power9Vector,
-        &feature_popcntd,
-        &feature_ppcPostraSched,
-        &feature_ppcPreraSched,
-        &feature_partwordAtomics,
-        &feature_recipprec,
-        &feature_stfiwx,
-        &feature_twoConstNr,
-        &feature_vsx,
-        &feature_vectorsUseTwoUnits,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_440,
-    &cpu_450,
-    &cpu_601,
-    &cpu_602,
-    &cpu_603,
-    &cpu_e603,
-    &cpu_ev603,
-    &cpu_604,
-    &cpu_e604,
-    &cpu_620,
-    &cpu_7400,
-    &cpu_7450,
-    &cpu_750,
-    &cpu_970,
-    &cpu_a2,
-    &cpu_a2q,
-    &cpu_e500,
-    &cpu_e500mc,
-    &cpu_e5500,
-    &cpu_g3,
-    &cpu_g4,
-    &cpu_g4Plus,
-    &cpu_g5,
-    &cpu_generic,
-    &cpu_ppc,
-    &cpu_ppc32,
-    &cpu_ppc64,
-    &cpu_ppc64le,
-    &cpu_pwr3,
-    &cpu_pwr4,
-    &cpu_pwr5,
-    &cpu_pwr5x,
-    &cpu_pwr6,
-    &cpu_pwr6x,
-    &cpu_pwr7,
-    &cpu_pwr8,
-    &cpu_pwr9,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    @"64bit",
+    @"64bitregs",
+    altivec,
+    booke,
+    bpermd,
+    cmpb,
+    crbits,
+    crypto,
+    direct_move,
+    e500,
+    extdiv,
+    fcpsgn,
+    float128,
+    fpcvt,
+    fprnd,
+    fpu,
+    fre,
+    fres,
+    frsqrte,
+    frsqrtes,
+    fsqrt,
+    hard_float,
+    htm,
+    icbt,
+    invariant_function_descriptors,
+    isa_v30_instructions,
+    isel,
+    ldbrx,
+    lfiwax,
+    longcall,
+    mfocrf,
+    msync,
+    partword_atomics,
+    popcntd,
+    power8_altivec,
+    power8_vector,
+    power9_altivec,
+    power9_vector,
+    ppc_postra_sched,
+    ppc_prera_sched,
+    ppc4xx,
+    ppc6xx,
+    qpx,
+    recipprec,
+    secure_plt,
+    slow_popcntd,
+    spe,
+    stfiwx,
+    two_const_nr,
+    vectors_use_two_units,
+    vsx,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.@"64bit")] = .{
+        .index = @enumToInt(Feature.@"64bit"),
+        .name = @tagName(Feature.@"64bit"),
+        .llvm_name = "64bit",
+        .description = "Enable 64-bit instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.@"64bitregs")] = .{
+        .index = @enumToInt(Feature.@"64bitregs"),
+        .name = @tagName(Feature.@"64bitregs"),
+        .llvm_name = "64bitregs",
+        .description = "Enable 64-bit registers usage for ppc32 [beta]",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.altivec)] = .{
+        .index = @enumToInt(Feature.altivec),
+        .name = @tagName(Feature.altivec),
+        .llvm_name = "altivec",
+        .description = "Enable Altivec instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.booke)] = .{
+        .index = @enumToInt(Feature.booke),
+        .name = @tagName(Feature.booke),
+        .llvm_name = "booke",
+        .description = "Enable Book E instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .icbt,
+        }),
+    };
+    result[@enumToInt(Feature.bpermd)] = .{
+        .index = @enumToInt(Feature.bpermd),
+        .name = @tagName(Feature.bpermd),
+        .llvm_name = "bpermd",
+        .description = "Enable the bpermd instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.cmpb)] = .{
+        .index = @enumToInt(Feature.cmpb),
+        .name = @tagName(Feature.cmpb),
+        .llvm_name = "cmpb",
+        .description = "Enable the cmpb instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.crbits)] = .{
+        .index = @enumToInt(Feature.crbits),
+        .name = @tagName(Feature.crbits),
+        .llvm_name = "crbits",
+        .description = "Use condition-register bits individually",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.crypto)] = .{
+        .index = @enumToInt(Feature.crypto),
+        .name = @tagName(Feature.crypto),
+        .llvm_name = "crypto",
+        .description = "Enable POWER8 Crypto instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .power8_altivec,
+        }),
+    };
+    result[@enumToInt(Feature.direct_move)] = .{
+        .index = @enumToInt(Feature.direct_move),
+        .name = @tagName(Feature.direct_move),
+        .llvm_name = "direct-move",
+        .description = "Enable Power8 direct move instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .vsx,
+        }),
+    };
+    result[@enumToInt(Feature.e500)] = .{
+        .index = @enumToInt(Feature.e500),
+        .name = @tagName(Feature.e500),
+        .llvm_name = "e500",
+        .description = "Enable E500/E500mc instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.extdiv)] = .{
+        .index = @enumToInt(Feature.extdiv),
+        .name = @tagName(Feature.extdiv),
+        .llvm_name = "extdiv",
+        .description = "Enable extended divide instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fcpsgn)] = .{
+        .index = @enumToInt(Feature.fcpsgn),
+        .name = @tagName(Feature.fcpsgn),
+        .llvm_name = "fcpsgn",
+        .description = "Enable the fcpsgn instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.float128)] = .{
+        .index = @enumToInt(Feature.float128),
+        .name = @tagName(Feature.float128),
+        .llvm_name = "float128",
+        .description = "Enable the __float128 data type for IEEE-754R Binary128.",
+        .dependencies = featureSet(&[_]Feature{
+            .vsx,
+        }),
+    };
+    result[@enumToInt(Feature.fpcvt)] = .{
+        .index = @enumToInt(Feature.fpcvt),
+        .name = @tagName(Feature.fpcvt),
+        .llvm_name = "fpcvt",
+        .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.fprnd)] = .{
+        .index = @enumToInt(Feature.fprnd),
+        .name = @tagName(Feature.fprnd),
+        .llvm_name = "fprnd",
+        .description = "Enable the fri[mnpz] instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.fpu)] = .{
+        .index = @enumToInt(Feature.fpu),
+        .name = @tagName(Feature.fpu),
+        .llvm_name = "fpu",
+        .description = "Enable classic FPU instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hard_float,
+        }),
+    };
+    result[@enumToInt(Feature.fre)] = .{
+        .index = @enumToInt(Feature.fre),
+        .name = @tagName(Feature.fre),
+        .llvm_name = "fre",
+        .description = "Enable the fre instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.fres)] = .{
+        .index = @enumToInt(Feature.fres),
+        .name = @tagName(Feature.fres),
+        .llvm_name = "fres",
+        .description = "Enable the fres instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.frsqrte)] = .{
+        .index = @enumToInt(Feature.frsqrte),
+        .name = @tagName(Feature.frsqrte),
+        .llvm_name = "frsqrte",
+        .description = "Enable the frsqrte instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.frsqrtes)] = .{
+        .index = @enumToInt(Feature.frsqrtes),
+        .name = @tagName(Feature.frsqrtes),
+        .llvm_name = "frsqrtes",
+        .description = "Enable the frsqrtes instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.fsqrt)] = .{
+        .index = @enumToInt(Feature.fsqrt),
+        .name = @tagName(Feature.fsqrt),
+        .llvm_name = "fsqrt",
+        .description = "Enable the fsqrt instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.hard_float)] = .{
+        .index = @enumToInt(Feature.hard_float),
+        .name = @tagName(Feature.hard_float),
+        .llvm_name = "hard-float",
+        .description = "Enable floating-point instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.htm)] = .{
+        .index = @enumToInt(Feature.htm),
+        .name = @tagName(Feature.htm),
+        .llvm_name = "htm",
+        .description = "Enable Hardware Transactional Memory instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.icbt)] = .{
+        .index = @enumToInt(Feature.icbt),
+        .name = @tagName(Feature.icbt),
+        .llvm_name = "icbt",
+        .description = "Enable icbt instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.invariant_function_descriptors)] = .{
+        .index = @enumToInt(Feature.invariant_function_descriptors),
+        .name = @tagName(Feature.invariant_function_descriptors),
+        .llvm_name = "invariant-function-descriptors",
+        .description = "Assume function descriptors are invariant",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.isa_v30_instructions)] = .{
+        .index = @enumToInt(Feature.isa_v30_instructions),
+        .name = @tagName(Feature.isa_v30_instructions),
+        .llvm_name = "isa-v30-instructions",
+        .description = "Enable instructions added in ISA 3.0.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.isel)] = .{
+        .index = @enumToInt(Feature.isel),
+        .name = @tagName(Feature.isel),
+        .llvm_name = "isel",
+        .description = "Enable the isel instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ldbrx)] = .{
+        .index = @enumToInt(Feature.ldbrx),
+        .name = @tagName(Feature.ldbrx),
+        .llvm_name = "ldbrx",
+        .description = "Enable the ldbrx instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.lfiwax)] = .{
+        .index = @enumToInt(Feature.lfiwax),
+        .name = @tagName(Feature.lfiwax),
+        .llvm_name = "lfiwax",
+        .description = "Enable the lfiwax instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.longcall)] = .{
+        .index = @enumToInt(Feature.longcall),
+        .name = @tagName(Feature.longcall),
+        .llvm_name = "longcall",
+        .description = "Always use indirect calls",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mfocrf)] = .{
+        .index = @enumToInt(Feature.mfocrf),
+        .name = @tagName(Feature.mfocrf),
+        .llvm_name = "mfocrf",
+        .description = "Enable the MFOCRF instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.msync)] = .{
+        .index = @enumToInt(Feature.msync),
+        .name = @tagName(Feature.msync),
+        .llvm_name = "msync",
+        .description = "Has only the msync instruction instead of sync",
+        .dependencies = featureSet(&[_]Feature{
+            .booke,
+        }),
+    };
+    result[@enumToInt(Feature.partword_atomics)] = .{
+        .index = @enumToInt(Feature.partword_atomics),
+        .name = @tagName(Feature.partword_atomics),
+        .llvm_name = "partword-atomics",
+        .description = "Enable l[bh]arx and st[bh]cx.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.popcntd)] = .{
+        .index = @enumToInt(Feature.popcntd),
+        .name = @tagName(Feature.popcntd),
+        .llvm_name = "popcntd",
+        .description = "Enable the popcnt[dw] instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.power8_altivec)] = .{
+        .index = @enumToInt(Feature.power8_altivec),
+        .name = @tagName(Feature.power8_altivec),
+        .llvm_name = "power8-altivec",
+        .description = "Enable POWER8 Altivec instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .altivec,
+        }),
+    };
+    result[@enumToInt(Feature.power8_vector)] = .{
+        .index = @enumToInt(Feature.power8_vector),
+        .name = @tagName(Feature.power8_vector),
+        .llvm_name = "power8-vector",
+        .description = "Enable POWER8 vector instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .power8_altivec,
+            .vsx,
+        }),
+    };
+    result[@enumToInt(Feature.power9_altivec)] = .{
+        .index = @enumToInt(Feature.power9_altivec),
+        .name = @tagName(Feature.power9_altivec),
+        .llvm_name = "power9-altivec",
+        .description = "Enable POWER9 Altivec instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .isa_v30_instructions,
+            .power8_altivec,
+        }),
+    };
+    result[@enumToInt(Feature.power9_vector)] = .{
+        .index = @enumToInt(Feature.power9_vector),
+        .name = @tagName(Feature.power9_vector),
+        .llvm_name = "power9-vector",
+        .description = "Enable POWER9 vector instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .isa_v30_instructions,
+            .power8_vector,
+            .power9_altivec,
+        }),
+    };
+    result[@enumToInt(Feature.ppc_postra_sched)] = .{
+        .index = @enumToInt(Feature.ppc_postra_sched),
+        .name = @tagName(Feature.ppc_postra_sched),
+        .llvm_name = "ppc-postra-sched",
+        .description = "Use PowerPC post-RA scheduling strategy",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ppc_prera_sched)] = .{
+        .index = @enumToInt(Feature.ppc_prera_sched),
+        .name = @tagName(Feature.ppc_prera_sched),
+        .llvm_name = "ppc-prera-sched",
+        .description = "Use PowerPC pre-RA scheduling strategy",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ppc4xx)] = .{
+        .index = @enumToInt(Feature.ppc4xx),
+        .name = @tagName(Feature.ppc4xx),
+        .llvm_name = "ppc4xx",
+        .description = "Enable PPC 4xx instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.ppc6xx)] = .{
+        .index = @enumToInt(Feature.ppc6xx),
+        .name = @tagName(Feature.ppc6xx),
+        .llvm_name = "ppc6xx",
+        .description = "Enable PPC 6xx instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.qpx)] = .{
+        .index = @enumToInt(Feature.qpx),
+        .name = @tagName(Feature.qpx),
+        .llvm_name = "qpx",
+        .description = "Enable QPX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.recipprec)] = .{
+        .index = @enumToInt(Feature.recipprec),
+        .name = @tagName(Feature.recipprec),
+        .llvm_name = "recipprec",
+        .description = "Assume higher precision reciprocal estimates",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.secure_plt)] = .{
+        .index = @enumToInt(Feature.secure_plt),
+        .name = @tagName(Feature.secure_plt),
+        .llvm_name = "secure-plt",
+        .description = "Enable secure plt mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.slow_popcntd)] = .{
+        .index = @enumToInt(Feature.slow_popcntd),
+        .name = @tagName(Feature.slow_popcntd),
+        .llvm_name = "slow-popcntd",
+        .description = "Has slow popcnt[dw] instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.spe)] = .{
+        .index = @enumToInt(Feature.spe),
+        .name = @tagName(Feature.spe),
+        .llvm_name = "spe",
+        .description = "Enable SPE instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .hard_float,
+        }),
+    };
+    result[@enumToInt(Feature.stfiwx)] = .{
+        .index = @enumToInt(Feature.stfiwx),
+        .name = @tagName(Feature.stfiwx),
+        .llvm_name = "stfiwx",
+        .description = "Enable the stfiwx instruction",
+        .dependencies = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    result[@enumToInt(Feature.two_const_nr)] = .{
+        .index = @enumToInt(Feature.two_const_nr),
+        .name = @tagName(Feature.two_const_nr),
+        .llvm_name = "two-const-nr",
+        .description = "Requires two constant Newton-Raphson computation",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vectors_use_two_units)] = .{
+        .index = @enumToInt(Feature.vectors_use_two_units),
+        .name = @tagName(Feature.vectors_use_two_units),
+        .llvm_name = "vectors-use-two-units",
+        .description = "Vectors use two units",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vsx)] = .{
+        .index = @enumToInt(Feature.vsx),
+        .name = @tagName(Feature.vsx),
+        .llvm_name = "vsx",
+        .description = "Enable VSX instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .altivec,
+        }),
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const @"440" = Cpu{
+        .name = "@"440"",
+        .llvm_name = "440",
+        .features = featureSet(&[_]Feature{
+            .booke,
+            .fres,
+            .frsqrte,
+            .icbt,
+            .isel,
+            .msync,
+        }),
+    };
+    pub const @"450" = Cpu{
+        .name = "@"450"",
+        .llvm_name = "450",
+        .features = featureSet(&[_]Feature{
+            .booke,
+            .fres,
+            .frsqrte,
+            .icbt,
+            .isel,
+            .msync,
+        }),
+    };
+    pub const @"601" = Cpu{
+        .name = "@"601"",
+        .llvm_name = "601",
+        .features = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    pub const @"602" = Cpu{
+        .name = "@"602"",
+        .llvm_name = "602",
+        .features = featureSet(&[_]Feature{
+            .fpu,
+        }),
+    };
+    pub const @"603" = Cpu{
+        .name = "@"603"",
+        .llvm_name = "603",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"603e" = Cpu{
+        .name = "@"603e"",
+        .llvm_name = "603e",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"603ev" = Cpu{
+        .name = "@"603ev"",
+        .llvm_name = "603ev",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"604" = Cpu{
+        .name = "@"604"",
+        .llvm_name = "604",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"604e" = Cpu{
+        .name = "@"604e"",
+        .llvm_name = "604e",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"620" = Cpu{
+        .name = "@"620"",
+        .llvm_name = "620",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"7400" = Cpu{
+        .name = "@"7400"",
+        .llvm_name = "7400",
+        .features = featureSet(&[_]Feature{
+            .altivec,
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"7450" = Cpu{
+        .name = "@"7450"",
+        .llvm_name = "7450",
+        .features = featureSet(&[_]Feature{
+            .altivec,
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"750" = Cpu{
+        .name = "@"750"",
+        .llvm_name = "750",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const @"970" = Cpu{
+        .name = "@"970"",
+        .llvm_name = "970",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fres,
+            .frsqrte,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const a2 = Cpu{
+        .name = "a2",
+        .llvm_name = "a2",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .booke,
+            .cmpb,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .icbt,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .recipprec,
+            .slow_popcntd,
+            .stfiwx,
+        }),
+    };
+    pub const a2q = Cpu{
+        .name = "a2q",
+        .llvm_name = "a2q",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .booke,
+            .cmpb,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .icbt,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .qpx,
+            .recipprec,
+            .slow_popcntd,
+            .stfiwx,
+        }),
+    };
+    pub const e500 = Cpu{
+        .name = "e500",
+        .llvm_name = "e500",
+        .features = featureSet(&[_]Feature{
+            .booke,
+            .icbt,
+            .isel,
+        }),
+    };
+    pub const e500mc = Cpu{
+        .name = "e500mc",
+        .llvm_name = "e500mc",
+        .features = featureSet(&[_]Feature{
+            .booke,
+            .icbt,
+            .isel,
+            .stfiwx,
+        }),
+    };
+    pub const e5500 = Cpu{
+        .name = "e5500",
+        .llvm_name = "e5500",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .booke,
+            .icbt,
+            .isel,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const g3 = Cpu{
+        .name = "g3",
+        .llvm_name = "g3",
+        .features = featureSet(&[_]Feature{
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const g4 = Cpu{
+        .name = "g4",
+        .llvm_name = "g4",
+        .features = featureSet(&[_]Feature{
+            .altivec,
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const g4+ = Cpu{
+        .name = "g4+",
+        .llvm_name = "g4+",
+        .features = featureSet(&[_]Feature{
+            .altivec,
+            .fres,
+            .frsqrte,
+        }),
+    };
+    pub const g5 = Cpu{
+        .name = "g5",
+        .llvm_name = "g5",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fres,
+            .frsqrte,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = featureSet(&[_]Feature{
+            .hard_float,
+        }),
+    };
+    pub const ppc = Cpu{
+        .name = "ppc",
+        .llvm_name = "ppc",
+        .features = featureSet(&[_]Feature{
+            .hard_float,
+        }),
+    };
+    pub const ppc32 = Cpu{
+        .name = "ppc32",
+        .llvm_name = "ppc32",
+        .features = featureSet(&[_]Feature{
+            .hard_float,
+        }),
+    };
+    pub const ppc64 = Cpu{
+        .name = "ppc64",
+        .llvm_name = "ppc64",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fres,
+            .frsqrte,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const ppc64le = Cpu{
+        .name = "ppc64le",
+        .llvm_name = "ppc64le",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .bpermd,
+            .cmpb,
+            .crypto,
+            .direct_move,
+            .extdiv,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .htm,
+            .icbt,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .partword_atomics,
+            .popcntd,
+            .power8_altivec,
+            .power8_vector,
+            .recipprec,
+            .stfiwx,
+            .two_const_nr,
+            .vsx,
+        }),
+    };
+    pub const pwr3 = Cpu{
+        .name = "pwr3",
+        .llvm_name = "pwr3",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fres,
+            .frsqrte,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const pwr4 = Cpu{
+        .name = "pwr4",
+        .llvm_name = "pwr4",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fres,
+            .frsqrte,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const pwr5 = Cpu{
+        .name = "pwr5",
+        .llvm_name = "pwr5",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const pwr5x = Cpu{
+        .name = "pwr5x",
+        .llvm_name = "pwr5x",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .mfocrf,
+            .stfiwx,
+        }),
+    };
+    pub const pwr6 = Cpu{
+        .name = "pwr6",
+        .llvm_name = "pwr6",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .cmpb,
+            .fcpsgn,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .lfiwax,
+            .mfocrf,
+            .recipprec,
+            .stfiwx,
+        }),
+    };
+    pub const pwr6x = Cpu{
+        .name = "pwr6x",
+        .llvm_name = "pwr6x",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .cmpb,
+            .fcpsgn,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .lfiwax,
+            .mfocrf,
+            .recipprec,
+            .stfiwx,
+        }),
+    };
+    pub const pwr7 = Cpu{
+        .name = "pwr7",
+        .llvm_name = "pwr7",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .bpermd,
+            .cmpb,
+            .extdiv,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .popcntd,
+            .recipprec,
+            .stfiwx,
+            .two_const_nr,
+            .vsx,
+        }),
+    };
+    pub const pwr8 = Cpu{
+        .name = "pwr8",
+        .llvm_name = "pwr8",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .bpermd,
+            .cmpb,
+            .crypto,
+            .direct_move,
+            .extdiv,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .htm,
+            .icbt,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .partword_atomics,
+            .popcntd,
+            .power8_altivec,
+            .power8_vector,
+            .recipprec,
+            .stfiwx,
+            .two_const_nr,
+            .vsx,
+        }),
+    };
+    pub const pwr9 = Cpu{
+        .name = "pwr9",
+        .llvm_name = "pwr9",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .altivec,
+            .bpermd,
+            .cmpb,
+            .crypto,
+            .direct_move,
+            .extdiv,
+            .fcpsgn,
+            .fpcvt,
+            .fprnd,
+            .fre,
+            .fres,
+            .frsqrte,
+            .frsqrtes,
+            .fsqrt,
+            .htm,
+            .icbt,
+            .isa_v30_instructions,
+            .isel,
+            .ldbrx,
+            .lfiwax,
+            .mfocrf,
+            .partword_atomics,
+            .popcntd,
+            .power8_altivec,
+            .power8_vector,
+            .power9_altivec,
+            .power9_vector,
+            .ppc_postra_sched,
+            .ppc_prera_sched,
+            .recipprec,
+            .stfiwx,
+            .two_const_nr,
+            .vectors_use_two_units,
+            .vsx,
+        }),
+    };
+};
+
+/// All powerpc CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.@"440",
+    &cpu.@"450",
+    &cpu.@"601",
+    &cpu.@"602",
+    &cpu.@"603",
+    &cpu.@"603e",
+    &cpu.@"603ev",
+    &cpu.@"604",
+    &cpu.@"604e",
+    &cpu.@"620",
+    &cpu.@"7400",
+    &cpu.@"7450",
+    &cpu.@"750",
+    &cpu.@"970",
+    &cpu.a2,
+    &cpu.a2q,
+    &cpu.e500,
+    &cpu.e500mc,
+    &cpu.e5500,
+    &cpu.g3,
+    &cpu.g4,
+    &cpu.g4+,
+    &cpu.g5,
+    &cpu.generic,
+    &cpu.ppc,
+    &cpu.ppc32,
+    &cpu.ppc64,
+    &cpu.ppc64le,
+    &cpu.pwr3,
+    &cpu.pwr4,
+    &cpu.pwr5,
+    &cpu.pwr5x,
+    &cpu.pwr6,
+    &cpu.pwr6x,
+    &cpu.pwr7,
+    &cpu.pwr8,
+    &cpu.pwr9,
 };
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index bf82cc9f822cbbb623d4bd91b26f9efab22e09d8..7181028cc27f80f6fa22e020abf74a7a284e34eb 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -1,98 +1,103 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
 
-pub const feature_bit64 = Feature{
-    .name = "bit64",
-    .llvm_name = "64bit",
-    .description = "Implements RV64",
-    .dependencies = &[_]*const Feature {
-    },
+pub const Feature = enum {
+    @"64bit",
+    a,
+    c,
+    d,
+    e,
+    f,
+    m,
+    relax,
 };
 
-pub const feature_e = Feature{
-    .name = "e",
-    .llvm_name = "e",
-    .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_relax = Feature{
-    .name = "relax",
-    .llvm_name = "relax",
-    .description = "Enable Linker relaxation.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_a = Feature{
-    .name = "a",
-    .llvm_name = "a",
-    .description = "'A' (Atomic Instructions)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_c = Feature{
-    .name = "c",
-    .llvm_name = "c",
-    .description = "'C' (Compressed Instructions)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_d = Feature{
-    .name = "d",
-    .llvm_name = "d",
-    .description = "'D' (Double-Precision Floating-Point)",
-    .dependencies = &[_]*const Feature {
-        &feature_f,
-    },
-};
-
-pub const feature_f = Feature{
-    .name = "f",
-    .llvm_name = "f",
-    .description = "'F' (Single-Precision Floating-Point)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_m = Feature{
-    .name = "m",
-    .llvm_name = "m",
-    .description = "'M' (Integer Multiplication and Division)",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_bit64,
-    &feature_e,
-    &feature_relax,
-    &feature_a,
-    &feature_c,
-    &feature_d,
-    &feature_f,
-    &feature_m,
-};
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
-pub const cpu_genericRv32 = Cpu{
-    .name = "genericRv32",
-    .llvm_name = "generic-rv32",
-    .dependencies = &[_]*const Feature {
-    },
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.@"64bit")] = .{
+        .index = @enumToInt(Feature.@"64bit"),
+        .name = @tagName(Feature.@"64bit"),
+        .llvm_name = "64bit",
+        .description = "Implements RV64",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.a)] = .{
+        .index = @enumToInt(Feature.a),
+        .name = @tagName(Feature.a),
+        .llvm_name = "a",
+        .description = "'A' (Atomic Instructions)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.c)] = .{
+        .index = @enumToInt(Feature.c),
+        .name = @tagName(Feature.c),
+        .llvm_name = "c",
+        .description = "'C' (Compressed Instructions)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.d)] = .{
+        .index = @enumToInt(Feature.d),
+        .name = @tagName(Feature.d),
+        .llvm_name = "d",
+        .description = "'D' (Double-Precision Floating-Point)",
+        .dependencies = featureSet(&[_]Feature{
+            .f,
+        }),
+    };
+    result[@enumToInt(Feature.e)] = .{
+        .index = @enumToInt(Feature.e),
+        .name = @tagName(Feature.e),
+        .llvm_name = "e",
+        .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.f)] = .{
+        .index = @enumToInt(Feature.f),
+        .name = @tagName(Feature.f),
+        .llvm_name = "f",
+        .description = "'F' (Single-Precision Floating-Point)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.m)] = .{
+        .index = @enumToInt(Feature.m),
+        .name = @tagName(Feature.m),
+        .llvm_name = "m",
+        .description = "'M' (Integer Multiplication and Division)",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.relax)] = .{
+        .index = @enumToInt(Feature.relax),
+        .name = @tagName(Feature.relax),
+        .llvm_name = "relax",
+        .description = "Enable Linker relaxation.",
+        .dependencies = 0,
+    };
+    break :blk result;
 };
 
-pub const cpu_genericRv64 = Cpu{
-    .name = "genericRv64",
-    .llvm_name = "generic-rv64",
-    .dependencies = &[_]*const Feature {
-        &feature_bit64,
-    },
+pub const cpu = struct {
+    pub const generic_rv32 = Cpu{
+        .name = "generic_rv32",
+        .llvm_name = "generic-rv32",
+        .features = 0,
+    };
+    pub const generic_rv64 = Cpu{
+        .name = "generic_rv64",
+        .llvm_name = "generic-rv64",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
 };
 
-pub const cpus = &[_]*const Cpu {
-    &cpu_genericRv32,
-    &cpu_genericRv64,
+/// All riscv CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.generic_rv32,
+    &cpu.generic_rv64,
 };
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 7dfaa47df77b4e1baeb00826b6ebfc3c80ee2df7..6b1787f31f8b2e82137e42d9f14a5f5183d070fc 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -1,489 +1,528 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_hardQuadFloat = Feature{
-    .name = "hardQuadFloat",
-    .llvm_name = "hard-quad-float",
-    .description = "Enable quad-word floating point instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_leon = Feature{
-    .name = "leon",
-    .llvm_name = "leon",
-    .description = "Enable LEON extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noFmuls = Feature{
-    .name = "noFmuls",
-    .llvm_name = "no-fmuls",
-    .description = "Disable the fmuls instruction.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_noFsmuld = Feature{
-    .name = "noFsmuld",
-    .llvm_name = "no-fsmuld",
-    .description = "Disable the fsmuld instruction.",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_leonpwrpsr = Feature{
-    .name = "leonpwrpsr",
-    .llvm_name = "leonpwrpsr",
-    .description = "Enable the PWRPSR instruction",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_softFloat = Feature{
-    .name = "softFloat",
-    .llvm_name = "soft-float",
-    .description = "Use software emulation for floating point",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_softMulDiv = Feature{
-    .name = "softMulDiv",
-    .llvm_name = "soft-mul-div",
-    .description = "Use software emulation for integer multiply and divide",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_deprecatedV8 = Feature{
-    .name = "deprecatedV8",
-    .llvm_name = "deprecated-v8",
-    .description = "Enable deprecated V8 instructions in V9 mode",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_v9 = Feature{
-    .name = "v9",
-    .llvm_name = "v9",
-    .description = "Enable SPARC-V9 instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vis = Feature{
-    .name = "vis",
-    .llvm_name = "vis",
-    .description = "Enable UltraSPARC Visual Instruction Set extensions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vis2 = Feature{
-    .name = "vis2",
-    .llvm_name = "vis2",
-    .description = "Enable Visual Instruction Set extensions II",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vis3 = Feature{
-    .name = "vis3",
-    .llvm_name = "vis3",
-    .description = "Enable Visual Instruction Set extensions III",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_hardQuadFloat,
-    &feature_leon,
-    &feature_noFmuls,
-    &feature_noFsmuld,
-    &feature_leonpwrpsr,
-    &feature_softFloat,
-    &feature_softMulDiv,
-    &feature_deprecatedV8,
-    &feature_v9,
-    &feature_vis,
-    &feature_vis2,
-    &feature_vis3,
-};
-
-pub const cpu_at697e = Cpu{
-    .name = "at697e",
-    .llvm_name = "at697e",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_at697f = Cpu{
-    .name = "at697f",
-    .llvm_name = "at697f",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_f934 = Cpu{
-    .name = "f934",
-    .llvm_name = "f934",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_gr712rc = Cpu{
-    .name = "gr712rc",
-    .llvm_name = "gr712rc",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_gr740 = Cpu{
-    .name = "gr740",
-    .llvm_name = "gr740",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-        &feature_leonpwrpsr,
-    },
-};
-
-pub const cpu_hypersparc = Cpu{
-    .name = "hypersparc",
-    .llvm_name = "hypersparc",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_leon2 = Cpu{
-    .name = "leon2",
-    .llvm_name = "leon2",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_leon3 = Cpu{
-    .name = "leon3",
-    .llvm_name = "leon3",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_leon4 = Cpu{
-    .name = "leon4",
-    .llvm_name = "leon4",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2080 = Cpu{
-    .name = "ma2080",
-    .llvm_name = "ma2080",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2085 = Cpu{
-    .name = "ma2085",
-    .llvm_name = "ma2085",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2100 = Cpu{
-    .name = "ma2100",
-    .llvm_name = "ma2100",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2150 = Cpu{
-    .name = "ma2150",
-    .llvm_name = "ma2150",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2155 = Cpu{
-    .name = "ma2155",
-    .llvm_name = "ma2155",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2450 = Cpu{
-    .name = "ma2450",
-    .llvm_name = "ma2450",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2455 = Cpu{
-    .name = "ma2455",
-    .llvm_name = "ma2455",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2480 = Cpu{
-    .name = "ma2480",
-    .llvm_name = "ma2480",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2485 = Cpu{
-    .name = "ma2485",
-    .llvm_name = "ma2485",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2x5x = Cpu{
-    .name = "ma2x5x",
-    .llvm_name = "ma2x5x",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_ma2x8x = Cpu{
-    .name = "ma2x8x",
-    .llvm_name = "ma2x8x",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_myriad2 = Cpu{
-    .name = "myriad2",
-    .llvm_name = "myriad2",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_myriad21 = Cpu{
-    .name = "myriad21",
-    .llvm_name = "myriad2.1",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_myriad22 = Cpu{
-    .name = "myriad22",
-    .llvm_name = "myriad2.2",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_myriad23 = Cpu{
-    .name = "myriad23",
-    .llvm_name = "myriad2.3",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-    },
-};
-
-pub const cpu_niagara = Cpu{
-    .name = "niagara",
-    .llvm_name = "niagara",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-        &feature_vis2,
-    },
-};
-
-pub const cpu_niagara2 = Cpu{
-    .name = "niagara2",
-    .llvm_name = "niagara2",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-        &feature_vis2,
-    },
-};
-
-pub const cpu_niagara3 = Cpu{
-    .name = "niagara3",
-    .llvm_name = "niagara3",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-        &feature_vis2,
-    },
-};
-
-pub const cpu_niagara4 = Cpu{
-    .name = "niagara4",
-    .llvm_name = "niagara4",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-        &feature_vis2,
-        &feature_vis3,
-    },
-};
-
-pub const cpu_sparclet = Cpu{
-    .name = "sparclet",
-    .llvm_name = "sparclet",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_sparclite = Cpu{
-    .name = "sparclite",
-    .llvm_name = "sparclite",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_sparclite86x = Cpu{
-    .name = "sparclite86x",
-    .llvm_name = "sparclite86x",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_supersparc = Cpu{
-    .name = "supersparc",
-    .llvm_name = "supersparc",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_tsc701 = Cpu{
-    .name = "tsc701",
-    .llvm_name = "tsc701",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_ultrasparc = Cpu{
-    .name = "ultrasparc",
-    .llvm_name = "ultrasparc",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-    },
-};
-
-pub const cpu_ultrasparc3 = Cpu{
-    .name = "ultrasparc3",
-    .llvm_name = "ultrasparc3",
-    .dependencies = &[_]*const Feature {
-        &feature_deprecatedV8,
-        &feature_v9,
-        &feature_vis,
-        &feature_vis2,
-    },
-};
-
-pub const cpu_ut699 = Cpu{
-    .name = "ut699",
-    .llvm_name = "ut699",
-    .dependencies = &[_]*const Feature {
-        &feature_leon,
-        &feature_noFmuls,
-        &feature_noFsmuld,
-    },
-};
-
-pub const cpu_v7 = Cpu{
-    .name = "v7",
-    .llvm_name = "v7",
-    .dependencies = &[_]*const Feature {
-        &feature_noFsmuld,
-        &feature_softMulDiv,
-    },
-};
-
-pub const cpu_v8 = Cpu{
-    .name = "v8",
-    .llvm_name = "v8",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_v9 = Cpu{
-    .name = "v9",
-    .llvm_name = "v9",
-    .dependencies = &[_]*const Feature {
-        &feature_v9,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_at697e,
-    &cpu_at697f,
-    &cpu_f934,
-    &cpu_generic,
-    &cpu_gr712rc,
-    &cpu_gr740,
-    &cpu_hypersparc,
-    &cpu_leon2,
-    &cpu_leon3,
-    &cpu_leon4,
-    &cpu_ma2080,
-    &cpu_ma2085,
-    &cpu_ma2100,
-    &cpu_ma2150,
-    &cpu_ma2155,
-    &cpu_ma2450,
-    &cpu_ma2455,
-    &cpu_ma2480,
-    &cpu_ma2485,
-    &cpu_ma2x5x,
-    &cpu_ma2x8x,
-    &cpu_myriad2,
-    &cpu_myriad21,
-    &cpu_myriad22,
-    &cpu_myriad23,
-    &cpu_niagara,
-    &cpu_niagara2,
-    &cpu_niagara3,
-    &cpu_niagara4,
-    &cpu_sparclet,
-    &cpu_sparclite,
-    &cpu_sparclite86x,
-    &cpu_supersparc,
-    &cpu_tsc701,
-    &cpu_ultrasparc,
-    &cpu_ultrasparc3,
-    &cpu_ut699,
-    &cpu_v7,
-    &cpu_v8,
-    &cpu_v9,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    deprecated_v8,
+    detectroundchange,
+    fixallfdivsqrt,
+    hard_quad_float,
+    hasleoncasa,
+    hasumacsmac,
+    insertnopload,
+    leon,
+    leoncyclecounter,
+    leonpwrpsr,
+    no_fmuls,
+    no_fsmuld,
+    popc,
+    soft_float,
+    soft_mul_div,
+    v9,
+    vis,
+    vis2,
+    vis3,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.deprecated_v8)] = .{
+        .index = @enumToInt(Feature.deprecated_v8),
+        .name = @tagName(Feature.deprecated_v8),
+        .llvm_name = "deprecated-v8",
+        .description = "Enable deprecated V8 instructions in V9 mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.detectroundchange)] = .{
+        .index = @enumToInt(Feature.detectroundchange),
+        .name = @tagName(Feature.detectroundchange),
+        .llvm_name = "detectroundchange",
+        .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fixallfdivsqrt)] = .{
+        .index = @enumToInt(Feature.fixallfdivsqrt),
+        .name = @tagName(Feature.fixallfdivsqrt),
+        .llvm_name = "fixallfdivsqrt",
+        .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hard_quad_float)] = .{
+        .index = @enumToInt(Feature.hard_quad_float),
+        .name = @tagName(Feature.hard_quad_float),
+        .llvm_name = "hard-quad-float",
+        .description = "Enable quad-word floating point instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hasleoncasa)] = .{
+        .index = @enumToInt(Feature.hasleoncasa),
+        .name = @tagName(Feature.hasleoncasa),
+        .llvm_name = "hasleoncasa",
+        .description = "Enable CASA instruction for LEON3 and LEON4 processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.hasumacsmac)] = .{
+        .index = @enumToInt(Feature.hasumacsmac),
+        .name = @tagName(Feature.hasumacsmac),
+        .llvm_name = "hasumacsmac",
+        .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.insertnopload)] = .{
+        .index = @enumToInt(Feature.insertnopload),
+        .name = @tagName(Feature.insertnopload),
+        .llvm_name = "insertnopload",
+        .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.leon)] = .{
+        .index = @enumToInt(Feature.leon),
+        .name = @tagName(Feature.leon),
+        .llvm_name = "leon",
+        .description = "Enable LEON extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.leoncyclecounter)] = .{
+        .index = @enumToInt(Feature.leoncyclecounter),
+        .name = @tagName(Feature.leoncyclecounter),
+        .llvm_name = "leoncyclecounter",
+        .description = "Use the Leon cycle counter register",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.leonpwrpsr)] = .{
+        .index = @enumToInt(Feature.leonpwrpsr),
+        .name = @tagName(Feature.leonpwrpsr),
+        .llvm_name = "leonpwrpsr",
+        .description = "Enable the PWRPSR instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_fmuls)] = .{
+        .index = @enumToInt(Feature.no_fmuls),
+        .name = @tagName(Feature.no_fmuls),
+        .llvm_name = "no-fmuls",
+        .description = "Disable the fmuls instruction.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.no_fsmuld)] = .{
+        .index = @enumToInt(Feature.no_fsmuld),
+        .name = @tagName(Feature.no_fsmuld),
+        .llvm_name = "no-fsmuld",
+        .description = "Disable the fsmuld instruction.",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.popc)] = .{
+        .index = @enumToInt(Feature.popc),
+        .name = @tagName(Feature.popc),
+        .llvm_name = "popc",
+        .description = "Use the popc (population count) instruction",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.soft_float)] = .{
+        .index = @enumToInt(Feature.soft_float),
+        .name = @tagName(Feature.soft_float),
+        .llvm_name = "soft-float",
+        .description = "Use software emulation for floating point",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.soft_mul_div)] = .{
+        .index = @enumToInt(Feature.soft_mul_div),
+        .name = @tagName(Feature.soft_mul_div),
+        .llvm_name = "soft-mul-div",
+        .description = "Use software emulation for integer multiply and divide",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.v9)] = .{
+        .index = @enumToInt(Feature.v9),
+        .name = @tagName(Feature.v9),
+        .llvm_name = "v9",
+        .description = "Enable SPARC-V9 instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vis)] = .{
+        .index = @enumToInt(Feature.vis),
+        .name = @tagName(Feature.vis),
+        .llvm_name = "vis",
+        .description = "Enable UltraSPARC Visual Instruction Set extensions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vis2)] = .{
+        .index = @enumToInt(Feature.vis2),
+        .name = @tagName(Feature.vis2),
+        .llvm_name = "vis2",
+        .description = "Enable Visual Instruction Set extensions II",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vis3)] = .{
+        .index = @enumToInt(Feature.vis3),
+        .name = @tagName(Feature.vis3),
+        .llvm_name = "vis3",
+        .description = "Enable Visual Instruction Set extensions III",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const at697e = Cpu{
+        .name = "at697e",
+        .llvm_name = "at697e",
+        .features = featureSet(&[_]Feature{
+            .insertnopload,
+            .leon,
+        }),
+    };
+    pub const at697f = Cpu{
+        .name = "at697f",
+        .llvm_name = "at697f",
+        .features = featureSet(&[_]Feature{
+            .insertnopload,
+            .leon,
+        }),
+    };
+    pub const f934 = Cpu{
+        .name = "f934",
+        .llvm_name = "f934",
+        .features = 0,
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const gr712rc = Cpu{
+        .name = "gr712rc",
+        .llvm_name = "gr712rc",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const gr740 = Cpu{
+        .name = "gr740",
+        .llvm_name = "gr740",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .hasumacsmac,
+            .leon,
+            .leoncyclecounter,
+            .leonpwrpsr,
+        }),
+    };
+    pub const hypersparc = Cpu{
+        .name = "hypersparc",
+        .llvm_name = "hypersparc",
+        .features = 0,
+    };
+    pub const leon2 = Cpu{
+        .name = "leon2",
+        .llvm_name = "leon2",
+        .features = featureSet(&[_]Feature{
+            .leon,
+        }),
+    };
+    pub const leon3 = Cpu{
+        .name = "leon3",
+        .llvm_name = "leon3",
+        .features = featureSet(&[_]Feature{
+            .hasumacsmac,
+            .leon,
+        }),
+    };
+    pub const leon4 = Cpu{
+        .name = "leon4",
+        .llvm_name = "leon4",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .hasumacsmac,
+            .leon,
+        }),
+    };
+    pub const ma2080 = Cpu{
+        .name = "ma2080",
+        .llvm_name = "ma2080",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2085 = Cpu{
+        .name = "ma2085",
+        .llvm_name = "ma2085",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2100 = Cpu{
+        .name = "ma2100",
+        .llvm_name = "ma2100",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2150 = Cpu{
+        .name = "ma2150",
+        .llvm_name = "ma2150",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2155 = Cpu{
+        .name = "ma2155",
+        .llvm_name = "ma2155",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2450 = Cpu{
+        .name = "ma2450",
+        .llvm_name = "ma2450",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2455 = Cpu{
+        .name = "ma2455",
+        .llvm_name = "ma2455",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2480 = Cpu{
+        .name = "ma2480",
+        .llvm_name = "ma2480",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2485 = Cpu{
+        .name = "ma2485",
+        .llvm_name = "ma2485",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2x5x = Cpu{
+        .name = "ma2x5x",
+        .llvm_name = "ma2x5x",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const ma2x8x = Cpu{
+        .name = "ma2x8x",
+        .llvm_name = "ma2x8x",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const myriad2 = Cpu{
+        .name = "myriad2",
+        .llvm_name = "myriad2",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const myriad2_1 = Cpu{
+        .name = "myriad2_1",
+        .llvm_name = "myriad2.1",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const myriad2_2 = Cpu{
+        .name = "myriad2_2",
+        .llvm_name = "myriad2.2",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const myriad2_3 = Cpu{
+        .name = "myriad2_3",
+        .llvm_name = "myriad2.3",
+        .features = featureSet(&[_]Feature{
+            .hasleoncasa,
+            .leon,
+        }),
+    };
+    pub const niagara = Cpu{
+        .name = "niagara",
+        .llvm_name = "niagara",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .v9,
+            .vis,
+            .vis2,
+        }),
+    };
+    pub const niagara2 = Cpu{
+        .name = "niagara2",
+        .llvm_name = "niagara2",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .popc,
+            .v9,
+            .vis,
+            .vis2,
+        }),
+    };
+    pub const niagara3 = Cpu{
+        .name = "niagara3",
+        .llvm_name = "niagara3",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .popc,
+            .v9,
+            .vis,
+            .vis2,
+        }),
+    };
+    pub const niagara4 = Cpu{
+        .name = "niagara4",
+        .llvm_name = "niagara4",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .popc,
+            .v9,
+            .vis,
+            .vis2,
+            .vis3,
+        }),
+    };
+    pub const sparclet = Cpu{
+        .name = "sparclet",
+        .llvm_name = "sparclet",
+        .features = 0,
+    };
+    pub const sparclite = Cpu{
+        .name = "sparclite",
+        .llvm_name = "sparclite",
+        .features = 0,
+    };
+    pub const sparclite86x = Cpu{
+        .name = "sparclite86x",
+        .llvm_name = "sparclite86x",
+        .features = 0,
+    };
+    pub const supersparc = Cpu{
+        .name = "supersparc",
+        .llvm_name = "supersparc",
+        .features = 0,
+    };
+    pub const tsc701 = Cpu{
+        .name = "tsc701",
+        .llvm_name = "tsc701",
+        .features = 0,
+    };
+    pub const ultrasparc = Cpu{
+        .name = "ultrasparc",
+        .llvm_name = "ultrasparc",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .v9,
+            .vis,
+        }),
+    };
+    pub const ultrasparc3 = Cpu{
+        .name = "ultrasparc3",
+        .llvm_name = "ultrasparc3",
+        .features = featureSet(&[_]Feature{
+            .deprecated_v8,
+            .v9,
+            .vis,
+            .vis2,
+        }),
+    };
+    pub const ut699 = Cpu{
+        .name = "ut699",
+        .llvm_name = "ut699",
+        .features = featureSet(&[_]Feature{
+            .fixallfdivsqrt,
+            .insertnopload,
+            .leon,
+            .no_fmuls,
+            .no_fsmuld,
+        }),
+    };
+    pub const v7 = Cpu{
+        .name = "v7",
+        .llvm_name = "v7",
+        .features = featureSet(&[_]Feature{
+            .no_fsmuld,
+            .soft_mul_div,
+        }),
+    };
+    pub const v8 = Cpu{
+        .name = "v8",
+        .llvm_name = "v8",
+        .features = 0,
+    };
+    pub const v9 = Cpu{
+        .name = "v9",
+        .llvm_name = "v9",
+        .features = featureSet(&[_]Feature{
+            .v9,
+        }),
+    };
+};
+
+/// All sparc CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.at697e,
+    &cpu.at697f,
+    &cpu.f934,
+    &cpu.generic,
+    &cpu.gr712rc,
+    &cpu.gr740,
+    &cpu.hypersparc,
+    &cpu.leon2,
+    &cpu.leon3,
+    &cpu.leon4,
+    &cpu.ma2080,
+    &cpu.ma2085,
+    &cpu.ma2100,
+    &cpu.ma2150,
+    &cpu.ma2155,
+    &cpu.ma2450,
+    &cpu.ma2455,
+    &cpu.ma2480,
+    &cpu.ma2485,
+    &cpu.ma2x5x,
+    &cpu.ma2x8x,
+    &cpu.myriad2,
+    &cpu.myriad2_1,
+    &cpu.myriad2_2,
+    &cpu.myriad2_3,
+    &cpu.niagara,
+    &cpu.niagara2,
+    &cpu.niagara3,
+    &cpu.niagara4,
+    &cpu.sparclet,
+    &cpu.sparclite,
+    &cpu.sparclite86x,
+    &cpu.supersparc,
+    &cpu.tsc701,
+    &cpu.ultrasparc,
+    &cpu.ultrasparc3,
+    &cpu.ut699,
+    &cpu.v7,
+    &cpu.v8,
+    &cpu.v9,
 };
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 1a3f8ec9705a77ce58606c2388e1e1938483a3d7..3479ebf7b4fa1fe1f0cc2e8343f67bfb1f9e7e82 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -1,610 +1,575 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
-
-pub const feature_dfpPackedConversion = Feature{
-    .name = "dfpPackedConversion",
-    .llvm_name = "dfp-packed-conversion",
-    .description = "Assume that the DFP packed-conversion facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_dfpZonedConversion = Feature{
-    .name = "dfpZonedConversion",
-    .llvm_name = "dfp-zoned-conversion",
-    .description = "Assume that the DFP zoned-conversion facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_deflateConversion = Feature{
-    .name = "deflateConversion",
-    .llvm_name = "deflate-conversion",
-    .description = "Assume that the deflate-conversion facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_distinctOps = Feature{
-    .name = "distinctOps",
-    .llvm_name = "distinct-ops",
-    .description = "Assume that the distinct-operands facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_enhancedDat2 = Feature{
-    .name = "enhancedDat2",
-    .llvm_name = "enhanced-dat-2",
-    .description = "Assume that the enhanced-DAT facility 2 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_enhancedSort = Feature{
-    .name = "enhancedSort",
-    .llvm_name = "enhanced-sort",
-    .description = "Assume that the enhanced-sort facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_executionHint = Feature{
-    .name = "executionHint",
-    .llvm_name = "execution-hint",
-    .description = "Assume that the execution-hint facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fpExtension = Feature{
-    .name = "fpExtension",
-    .llvm_name = "fp-extension",
-    .description = "Assume that the floating-point extension facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_fastSerialization = Feature{
-    .name = "fastSerialization",
-    .llvm_name = "fast-serialization",
-    .description = "Assume that the fast-serialization facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_guardedStorage = Feature{
-    .name = "guardedStorage",
-    .llvm_name = "guarded-storage",
-    .description = "Assume that the guarded-storage facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_highWord = Feature{
-    .name = "highWord",
-    .llvm_name = "high-word",
-    .description = "Assume that the high-word facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_insertReferenceBitsMultiple = Feature{
-    .name = "insertReferenceBitsMultiple",
-    .llvm_name = "insert-reference-bits-multiple",
-    .description = "Assume that the insert-reference-bits-multiple facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_interlockedAccess1 = Feature{
-    .name = "interlockedAccess1",
-    .llvm_name = "interlocked-access1",
-    .description = "Assume that interlocked-access facility 1 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loadAndTrap = Feature{
-    .name = "loadAndTrap",
-    .llvm_name = "load-and-trap",
-    .description = "Assume that the load-and-trap facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loadAndZeroRightmostByte = Feature{
-    .name = "loadAndZeroRightmostByte",
-    .llvm_name = "load-and-zero-rightmost-byte",
-    .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loadStoreOnCond = Feature{
-    .name = "loadStoreOnCond",
-    .llvm_name = "load-store-on-cond",
-    .description = "Assume that the load/store-on-condition facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_loadStoreOnCond2 = Feature{
-    .name = "loadStoreOnCond2",
-    .llvm_name = "load-store-on-cond-2",
-    .description = "Assume that the load/store-on-condition facility 2 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension3 = Feature{
-    .name = "messageSecurityAssistExtension3",
-    .llvm_name = "message-security-assist-extension3",
-    .description = "Assume that the message-security-assist extension facility 3 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension4 = Feature{
-    .name = "messageSecurityAssistExtension4",
-    .llvm_name = "message-security-assist-extension4",
-    .description = "Assume that the message-security-assist extension facility 4 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension5 = Feature{
-    .name = "messageSecurityAssistExtension5",
-    .llvm_name = "message-security-assist-extension5",
-    .description = "Assume that the message-security-assist extension facility 5 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension7 = Feature{
-    .name = "messageSecurityAssistExtension7",
-    .llvm_name = "message-security-assist-extension7",
-    .description = "Assume that the message-security-assist extension facility 7 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension8 = Feature{
-    .name = "messageSecurityAssistExtension8",
-    .llvm_name = "message-security-assist-extension8",
-    .description = "Assume that the message-security-assist extension facility 8 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_messageSecurityAssistExtension9 = Feature{
-    .name = "messageSecurityAssistExtension9",
-    .llvm_name = "message-security-assist-extension9",
-    .description = "Assume that the message-security-assist extension facility 9 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_miscellaneousExtensions = Feature{
-    .name = "miscellaneousExtensions",
-    .llvm_name = "miscellaneous-extensions",
-    .description = "Assume that the miscellaneous-extensions facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_miscellaneousExtensions2 = Feature{
-    .name = "miscellaneousExtensions2",
-    .llvm_name = "miscellaneous-extensions-2",
-    .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_miscellaneousExtensions3 = Feature{
-    .name = "miscellaneousExtensions3",
-    .llvm_name = "miscellaneous-extensions-3",
-    .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_populationCount = Feature{
-    .name = "populationCount",
-    .llvm_name = "population-count",
-    .description = "Assume that the population-count facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_processorAssist = Feature{
-    .name = "processorAssist",
-    .llvm_name = "processor-assist",
-    .description = "Assume that the processor-assist facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_resetReferenceBitsMultiple = Feature{
-    .name = "resetReferenceBitsMultiple",
-    .llvm_name = "reset-reference-bits-multiple",
-    .description = "Assume that the reset-reference-bits-multiple facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_transactionalExecution = Feature{
-    .name = "transactionalExecution",
-    .llvm_name = "transactional-execution",
-    .description = "Assume that the transactional-execution facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vector = Feature{
-    .name = "vector",
-    .llvm_name = "vector",
-    .description = "Assume that the vectory facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vectorEnhancements1 = Feature{
-    .name = "vectorEnhancements1",
-    .llvm_name = "vector-enhancements-1",
-    .description = "Assume that the vector enhancements facility 1 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vectorEnhancements2 = Feature{
-    .name = "vectorEnhancements2",
-    .llvm_name = "vector-enhancements-2",
-    .description = "Assume that the vector enhancements facility 2 is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vectorPackedDecimal = Feature{
-    .name = "vectorPackedDecimal",
-    .llvm_name = "vector-packed-decimal",
-    .description = "Assume that the vector packed decimal facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_vectorPackedDecimalEnhancement = Feature{
-    .name = "vectorPackedDecimalEnhancement",
-    .llvm_name = "vector-packed-decimal-enhancement",
-    .description = "Assume that the vector packed decimal enhancement facility is installed",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_dfpPackedConversion,
-    &feature_dfpZonedConversion,
-    &feature_deflateConversion,
-    &feature_distinctOps,
-    &feature_enhancedDat2,
-    &feature_enhancedSort,
-    &feature_executionHint,
-    &feature_fpExtension,
-    &feature_fastSerialization,
-    &feature_guardedStorage,
-    &feature_highWord,
-    &feature_insertReferenceBitsMultiple,
-    &feature_interlockedAccess1,
-    &feature_loadAndTrap,
-    &feature_loadAndZeroRightmostByte,
-    &feature_loadStoreOnCond,
-    &feature_loadStoreOnCond2,
-    &feature_messageSecurityAssistExtension3,
-    &feature_messageSecurityAssistExtension4,
-    &feature_messageSecurityAssistExtension5,
-    &feature_messageSecurityAssistExtension7,
-    &feature_messageSecurityAssistExtension8,
-    &feature_messageSecurityAssistExtension9,
-    &feature_miscellaneousExtensions,
-    &feature_miscellaneousExtensions2,
-    &feature_miscellaneousExtensions3,
-    &feature_populationCount,
-    &feature_processorAssist,
-    &feature_resetReferenceBitsMultiple,
-    &feature_transactionalExecution,
-    &feature_vector,
-    &feature_vectorEnhancements1,
-    &feature_vectorEnhancements2,
-    &feature_vectorPackedDecimal,
-    &feature_vectorPackedDecimalEnhancement,
-};
-
-pub const cpu_arch10 = Cpu{
-    .name = "arch10",
-    .llvm_name = "arch10",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadStoreOnCond,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_miscellaneousExtensions,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-    },
-};
-
-pub const cpu_arch11 = Cpu{
-    .name = "arch11",
-    .llvm_name = "arch11",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_miscellaneousExtensions,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-    },
-};
-
-pub const cpu_arch12 = Cpu{
-    .name = "arch12",
-    .llvm_name = "arch12",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_guardedStorage,
-        &feature_highWord,
-        &feature_insertReferenceBitsMultiple,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_messageSecurityAssistExtension7,
-        &feature_messageSecurityAssistExtension8,
-        &feature_miscellaneousExtensions,
-        &feature_miscellaneousExtensions2,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-        &feature_vectorEnhancements1,
-        &feature_vectorPackedDecimal,
-    },
-};
-
-pub const cpu_arch13 = Cpu{
-    .name = "arch13",
-    .llvm_name = "arch13",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_deflateConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_enhancedSort,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_guardedStorage,
-        &feature_highWord,
-        &feature_insertReferenceBitsMultiple,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_messageSecurityAssistExtension7,
-        &feature_messageSecurityAssistExtension8,
-        &feature_messageSecurityAssistExtension9,
-        &feature_miscellaneousExtensions,
-        &feature_miscellaneousExtensions2,
-        &feature_miscellaneousExtensions3,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-        &feature_vectorEnhancements1,
-        &feature_vectorEnhancements2,
-        &feature_vectorPackedDecimal,
-        &feature_vectorPackedDecimalEnhancement,
-    },
-};
-
-pub const cpu_arch8 = Cpu{
-    .name = "arch8",
-    .llvm_name = "arch8",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_arch9 = Cpu{
-    .name = "arch9",
-    .llvm_name = "arch9",
-    .dependencies = &[_]*const Feature {
-        &feature_distinctOps,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadStoreOnCond,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_populationCount,
-        &feature_resetReferenceBitsMultiple,
-    },
-};
-
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_z10 = Cpu{
-    .name = "z10",
-    .llvm_name = "z10",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const cpu_z13 = Cpu{
-    .name = "z13",
-    .llvm_name = "z13",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_miscellaneousExtensions,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-    },
-};
-
-pub const cpu_z14 = Cpu{
-    .name = "z14",
-    .llvm_name = "z14",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpPackedConversion,
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_guardedStorage,
-        &feature_highWord,
-        &feature_insertReferenceBitsMultiple,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadAndZeroRightmostByte,
-        &feature_loadStoreOnCond,
-        &feature_loadStoreOnCond2,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_messageSecurityAssistExtension5,
-        &feature_messageSecurityAssistExtension7,
-        &feature_messageSecurityAssistExtension8,
-        &feature_miscellaneousExtensions,
-        &feature_miscellaneousExtensions2,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-        &feature_vector,
-        &feature_vectorEnhancements1,
-        &feature_vectorPackedDecimal,
-    },
-};
-
-pub const cpu_z196 = Cpu{
-    .name = "z196",
-    .llvm_name = "z196",
-    .dependencies = &[_]*const Feature {
-        &feature_distinctOps,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadStoreOnCond,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_populationCount,
-        &feature_resetReferenceBitsMultiple,
-    },
-};
-
-pub const cpu_zEC12 = Cpu{
-    .name = "zEC12",
-    .llvm_name = "zEC12",
-    .dependencies = &[_]*const Feature {
-        &feature_dfpZonedConversion,
-        &feature_distinctOps,
-        &feature_enhancedDat2,
-        &feature_executionHint,
-        &feature_fpExtension,
-        &feature_fastSerialization,
-        &feature_highWord,
-        &feature_interlockedAccess1,
-        &feature_loadAndTrap,
-        &feature_loadStoreOnCond,
-        &feature_messageSecurityAssistExtension3,
-        &feature_messageSecurityAssistExtension4,
-        &feature_miscellaneousExtensions,
-        &feature_populationCount,
-        &feature_processorAssist,
-        &feature_resetReferenceBitsMultiple,
-        &feature_transactionalExecution,
-    },
-};
-
-pub const cpus = &[_]*const Cpu {
-    &cpu_arch10,
-    &cpu_arch11,
-    &cpu_arch12,
-    &cpu_arch13,
-    &cpu_arch8,
-    &cpu_arch9,
-    &cpu_generic,
-    &cpu_z10,
-    &cpu_z13,
-    &cpu_z14,
-    &cpu_z196,
-    &cpu_zEC12,
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
+
+pub const Feature = enum {
+    deflate_conversion,
+    dfp_packed_conversion,
+    dfp_zoned_conversion,
+    distinct_ops,
+    enhanced_dat_2,
+    enhanced_sort,
+    execution_hint,
+    fast_serialization,
+    fp_extension,
+    guarded_storage,
+    high_word,
+    insert_reference_bits_multiple,
+    interlocked_access1,
+    load_and_trap,
+    load_and_zero_rightmost_byte,
+    load_store_on_cond,
+    load_store_on_cond_2,
+    message_security_assist_extension3,
+    message_security_assist_extension4,
+    message_security_assist_extension5,
+    message_security_assist_extension7,
+    message_security_assist_extension8,
+    message_security_assist_extension9,
+    miscellaneous_extensions,
+    miscellaneous_extensions_2,
+    miscellaneous_extensions_3,
+    population_count,
+    processor_assist,
+    reset_reference_bits_multiple,
+    transactional_execution,
+    vector,
+    vector_enhancements_1,
+    vector_enhancements_2,
+    vector_packed_decimal,
+    vector_packed_decimal_enhancement,
+};
+
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.deflate_conversion)] = .{
+        .index = @enumToInt(Feature.deflate_conversion),
+        .name = @tagName(Feature.deflate_conversion),
+        .llvm_name = "deflate-conversion",
+        .description = "Assume that the deflate-conversion facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dfp_packed_conversion)] = .{
+        .index = @enumToInt(Feature.dfp_packed_conversion),
+        .name = @tagName(Feature.dfp_packed_conversion),
+        .llvm_name = "dfp-packed-conversion",
+        .description = "Assume that the DFP packed-conversion facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
+        .index = @enumToInt(Feature.dfp_zoned_conversion),
+        .name = @tagName(Feature.dfp_zoned_conversion),
+        .llvm_name = "dfp-zoned-conversion",
+        .description = "Assume that the DFP zoned-conversion facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.distinct_ops)] = .{
+        .index = @enumToInt(Feature.distinct_ops),
+        .name = @tagName(Feature.distinct_ops),
+        .llvm_name = "distinct-ops",
+        .description = "Assume that the distinct-operands facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.enhanced_dat_2)] = .{
+        .index = @enumToInt(Feature.enhanced_dat_2),
+        .name = @tagName(Feature.enhanced_dat_2),
+        .llvm_name = "enhanced-dat-2",
+        .description = "Assume that the enhanced-DAT facility 2 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.enhanced_sort)] = .{
+        .index = @enumToInt(Feature.enhanced_sort),
+        .name = @tagName(Feature.enhanced_sort),
+        .llvm_name = "enhanced-sort",
+        .description = "Assume that the enhanced-sort facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.execution_hint)] = .{
+        .index = @enumToInt(Feature.execution_hint),
+        .name = @tagName(Feature.execution_hint),
+        .llvm_name = "execution-hint",
+        .description = "Assume that the execution-hint facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fast_serialization)] = .{
+        .index = @enumToInt(Feature.fast_serialization),
+        .name = @tagName(Feature.fast_serialization),
+        .llvm_name = "fast-serialization",
+        .description = "Assume that the fast-serialization facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fp_extension)] = .{
+        .index = @enumToInt(Feature.fp_extension),
+        .name = @tagName(Feature.fp_extension),
+        .llvm_name = "fp-extension",
+        .description = "Assume that the floating-point extension facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.guarded_storage)] = .{
+        .index = @enumToInt(Feature.guarded_storage),
+        .name = @tagName(Feature.guarded_storage),
+        .llvm_name = "guarded-storage",
+        .description = "Assume that the guarded-storage facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.high_word)] = .{
+        .index = @enumToInt(Feature.high_word),
+        .name = @tagName(Feature.high_word),
+        .llvm_name = "high-word",
+        .description = "Assume that the high-word facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
+        .index = @enumToInt(Feature.insert_reference_bits_multiple),
+        .name = @tagName(Feature.insert_reference_bits_multiple),
+        .llvm_name = "insert-reference-bits-multiple",
+        .description = "Assume that the insert-reference-bits-multiple facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.interlocked_access1)] = .{
+        .index = @enumToInt(Feature.interlocked_access1),
+        .name = @tagName(Feature.interlocked_access1),
+        .llvm_name = "interlocked-access1",
+        .description = "Assume that interlocked-access facility 1 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.load_and_trap)] = .{
+        .index = @enumToInt(Feature.load_and_trap),
+        .name = @tagName(Feature.load_and_trap),
+        .llvm_name = "load-and-trap",
+        .description = "Assume that the load-and-trap facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
+        .index = @enumToInt(Feature.load_and_zero_rightmost_byte),
+        .name = @tagName(Feature.load_and_zero_rightmost_byte),
+        .llvm_name = "load-and-zero-rightmost-byte",
+        .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.load_store_on_cond)] = .{
+        .index = @enumToInt(Feature.load_store_on_cond),
+        .name = @tagName(Feature.load_store_on_cond),
+        .llvm_name = "load-store-on-cond",
+        .description = "Assume that the load/store-on-condition facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.load_store_on_cond_2)] = .{
+        .index = @enumToInt(Feature.load_store_on_cond_2),
+        .name = @tagName(Feature.load_store_on_cond_2),
+        .llvm_name = "load-store-on-cond-2",
+        .description = "Assume that the load/store-on-condition facility 2 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension3)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension3),
+        .name = @tagName(Feature.message_security_assist_extension3),
+        .llvm_name = "message-security-assist-extension3",
+        .description = "Assume that the message-security-assist extension facility 3 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension4)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension4),
+        .name = @tagName(Feature.message_security_assist_extension4),
+        .llvm_name = "message-security-assist-extension4",
+        .description = "Assume that the message-security-assist extension facility 4 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension5)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension5),
+        .name = @tagName(Feature.message_security_assist_extension5),
+        .llvm_name = "message-security-assist-extension5",
+        .description = "Assume that the message-security-assist extension facility 5 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension7)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension7),
+        .name = @tagName(Feature.message_security_assist_extension7),
+        .llvm_name = "message-security-assist-extension7",
+        .description = "Assume that the message-security-assist extension facility 7 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension8)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension8),
+        .name = @tagName(Feature.message_security_assist_extension8),
+        .llvm_name = "message-security-assist-extension8",
+        .description = "Assume that the message-security-assist extension facility 8 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.message_security_assist_extension9)] = .{
+        .index = @enumToInt(Feature.message_security_assist_extension9),
+        .name = @tagName(Feature.message_security_assist_extension9),
+        .llvm_name = "message-security-assist-extension9",
+        .description = "Assume that the message-security-assist extension facility 9 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.miscellaneous_extensions)] = .{
+        .index = @enumToInt(Feature.miscellaneous_extensions),
+        .name = @tagName(Feature.miscellaneous_extensions),
+        .llvm_name = "miscellaneous-extensions",
+        .description = "Assume that the miscellaneous-extensions facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
+        .index = @enumToInt(Feature.miscellaneous_extensions_2),
+        .name = @tagName(Feature.miscellaneous_extensions_2),
+        .llvm_name = "miscellaneous-extensions-2",
+        .description = "Assume that the miscellaneous-extensions facility 2 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
+        .index = @enumToInt(Feature.miscellaneous_extensions_3),
+        .name = @tagName(Feature.miscellaneous_extensions_3),
+        .llvm_name = "miscellaneous-extensions-3",
+        .description = "Assume that the miscellaneous-extensions facility 3 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.population_count)] = .{
+        .index = @enumToInt(Feature.population_count),
+        .name = @tagName(Feature.population_count),
+        .llvm_name = "population-count",
+        .description = "Assume that the population-count facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.processor_assist)] = .{
+        .index = @enumToInt(Feature.processor_assist),
+        .name = @tagName(Feature.processor_assist),
+        .llvm_name = "processor-assist",
+        .description = "Assume that the processor-assist facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
+        .index = @enumToInt(Feature.reset_reference_bits_multiple),
+        .name = @tagName(Feature.reset_reference_bits_multiple),
+        .llvm_name = "reset-reference-bits-multiple",
+        .description = "Assume that the reset-reference-bits-multiple facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.transactional_execution)] = .{
+        .index = @enumToInt(Feature.transactional_execution),
+        .name = @tagName(Feature.transactional_execution),
+        .llvm_name = "transactional-execution",
+        .description = "Assume that the transactional-execution facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vector)] = .{
+        .index = @enumToInt(Feature.vector),
+        .name = @tagName(Feature.vector),
+        .llvm_name = "vector",
+        .description = "Assume that the vectory facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vector_enhancements_1)] = .{
+        .index = @enumToInt(Feature.vector_enhancements_1),
+        .name = @tagName(Feature.vector_enhancements_1),
+        .llvm_name = "vector-enhancements-1",
+        .description = "Assume that the vector enhancements facility 1 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vector_enhancements_2)] = .{
+        .index = @enumToInt(Feature.vector_enhancements_2),
+        .name = @tagName(Feature.vector_enhancements_2),
+        .llvm_name = "vector-enhancements-2",
+        .description = "Assume that the vector enhancements facility 2 is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vector_packed_decimal)] = .{
+        .index = @enumToInt(Feature.vector_packed_decimal),
+        .name = @tagName(Feature.vector_packed_decimal),
+        .llvm_name = "vector-packed-decimal",
+        .description = "Assume that the vector packed decimal facility is installed",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
+        .index = @enumToInt(Feature.vector_packed_decimal_enhancement),
+        .name = @tagName(Feature.vector_packed_decimal_enhancement),
+        .llvm_name = "vector-packed-decimal-enhancement",
+        .description = "Assume that the vector packed decimal enhancement facility is installed",
+        .dependencies = 0,
+    };
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const arch10 = Cpu{
+        .name = "arch10",
+        .llvm_name = "arch10",
+        .features = featureSet(&[_]Feature{
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_store_on_cond,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .miscellaneous_extensions,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+        }),
+    };
+    pub const arch11 = Cpu{
+        .name = "arch11",
+        .llvm_name = "arch11",
+        .features = featureSet(&[_]Feature{
+            .dfp_packed_conversion,
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_and_zero_rightmost_byte,
+            .load_store_on_cond,
+            .load_store_on_cond_2,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .message_security_assist_extension5,
+            .miscellaneous_extensions,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+            .vector,
+        }),
+    };
+    pub const arch12 = Cpu{
+        .name = "arch12",
+        .llvm_name = "arch12",
+        .features = featureSet(&[_]Feature{
+            .dfp_packed_conversion,
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .guarded_storage,
+            .high_word,
+            .insert_reference_bits_multiple,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_and_zero_rightmost_byte,
+            .load_store_on_cond,
+            .load_store_on_cond_2,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .message_security_assist_extension5,
+            .message_security_assist_extension7,
+            .message_security_assist_extension8,
+            .miscellaneous_extensions,
+            .miscellaneous_extensions_2,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+            .vector,
+            .vector_enhancements_1,
+            .vector_packed_decimal,
+        }),
+    };
+    pub const arch13 = Cpu{
+        .name = "arch13",
+        .llvm_name = "arch13",
+        .features = featureSet(&[_]Feature{
+            .deflate_conversion,
+            .dfp_packed_conversion,
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .enhanced_sort,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .guarded_storage,
+            .high_word,
+            .insert_reference_bits_multiple,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_and_zero_rightmost_byte,
+            .load_store_on_cond,
+            .load_store_on_cond_2,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .message_security_assist_extension5,
+            .message_security_assist_extension7,
+            .message_security_assist_extension8,
+            .message_security_assist_extension9,
+            .miscellaneous_extensions,
+            .miscellaneous_extensions_2,
+            .miscellaneous_extensions_3,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+            .vector,
+            .vector_enhancements_1,
+            .vector_enhancements_2,
+            .vector_packed_decimal,
+            .vector_packed_decimal_enhancement,
+        }),
+    };
+    pub const arch8 = Cpu{
+        .name = "arch8",
+        .llvm_name = "arch8",
+        .features = 0,
+    };
+    pub const arch9 = Cpu{
+        .name = "arch9",
+        .llvm_name = "arch9",
+        .features = featureSet(&[_]Feature{
+            .distinct_ops,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_store_on_cond,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .population_count,
+            .reset_reference_bits_multiple,
+        }),
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const z10 = Cpu{
+        .name = "z10",
+        .llvm_name = "z10",
+        .features = 0,
+    };
+    pub const z13 = Cpu{
+        .name = "z13",
+        .llvm_name = "z13",
+        .features = featureSet(&[_]Feature{
+            .dfp_packed_conversion,
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_and_zero_rightmost_byte,
+            .load_store_on_cond,
+            .load_store_on_cond_2,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .message_security_assist_extension5,
+            .miscellaneous_extensions,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+            .vector,
+        }),
+    };
+    pub const z14 = Cpu{
+        .name = "z14",
+        .llvm_name = "z14",
+        .features = featureSet(&[_]Feature{
+            .dfp_packed_conversion,
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .guarded_storage,
+            .high_word,
+            .insert_reference_bits_multiple,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_and_zero_rightmost_byte,
+            .load_store_on_cond,
+            .load_store_on_cond_2,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .message_security_assist_extension5,
+            .message_security_assist_extension7,
+            .message_security_assist_extension8,
+            .miscellaneous_extensions,
+            .miscellaneous_extensions_2,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+            .vector,
+            .vector_enhancements_1,
+            .vector_packed_decimal,
+        }),
+    };
+    pub const z196 = Cpu{
+        .name = "z196",
+        .llvm_name = "z196",
+        .features = featureSet(&[_]Feature{
+            .distinct_ops,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_store_on_cond,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .population_count,
+            .reset_reference_bits_multiple,
+        }),
+    };
+    pub const zEC12 = Cpu{
+        .name = "zEC12",
+        .llvm_name = "zEC12",
+        .features = featureSet(&[_]Feature{
+            .dfp_zoned_conversion,
+            .distinct_ops,
+            .enhanced_dat_2,
+            .execution_hint,
+            .fast_serialization,
+            .fp_extension,
+            .high_word,
+            .interlocked_access1,
+            .load_and_trap,
+            .load_store_on_cond,
+            .message_security_assist_extension3,
+            .message_security_assist_extension4,
+            .miscellaneous_extensions,
+            .population_count,
+            .processor_assist,
+            .reset_reference_bits_multiple,
+            .transactional_execution,
+        }),
+    };
+};
+
+/// All systemz CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.arch10,
+    &cpu.arch11,
+    &cpu.arch12,
+    &cpu.arch13,
+    &cpu.arch8,
+    &cpu.arch9,
+    &cpu.generic,
+    &cpu.z10,
+    &cpu.z13,
+    &cpu.z14,
+    &cpu.z196,
+    &cpu.zEC12,
 };
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 61df1820b5d55d4a0c099d996febf759b82ca75e..8546b067dd2dcd2adff538b18402fd20656e3b70 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -1,128 +1,129 @@
-const Feature = @import("std").target.Feature;
-const Cpu = @import("std").target.Cpu;
+const std = @import("../std.zig");
+const Cpu = std.Target.Cpu;
 
-pub const feature_atomics = Feature{
-    .name = "atomics",
-    .llvm_name = "atomics",
-    .description = "Enable Atomics",
-    .dependencies = &[_]*const Feature {
-    },
+pub const Feature = enum {
+    atomics,
+    bulk_memory,
+    exception_handling,
+    multivalue,
+    mutable_globals,
+    nontrapping_fptoint,
+    sign_ext,
+    simd128,
+    tail_call,
+    unimplemented_simd128,
 };
 
-pub const feature_bulkMemory = Feature{
-    .name = "bulkMemory",
-    .llvm_name = "bulk-memory",
-    .description = "Enable bulk memory operations",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_exceptionHandling = Feature{
-    .name = "exceptionHandling",
-    .llvm_name = "exception-handling",
-    .description = "Enable Wasm exception handling",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_multivalue = Feature{
-    .name = "multivalue",
-    .llvm_name = "multivalue",
-    .description = "Enable multivalue blocks, instructions, and functions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_mutableGlobals = Feature{
-    .name = "mutableGlobals",
-    .llvm_name = "mutable-globals",
-    .description = "Enable mutable globals",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_nontrappingFptoint = Feature{
-    .name = "nontrappingFptoint",
-    .llvm_name = "nontrapping-fptoint",
-    .description = "Enable non-trapping float-to-int conversion operators",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_simd128 = Feature{
-    .name = "simd128",
-    .llvm_name = "simd128",
-    .description = "Enable 128-bit SIMD",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_signExt = Feature{
-    .name = "signExt",
-    .llvm_name = "sign-ext",
-    .description = "Enable sign extension operators",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_tailCall = Feature{
-    .name = "tailCall",
-    .llvm_name = "tail-call",
-    .description = "Enable tail call instructions",
-    .dependencies = &[_]*const Feature {
-    },
-};
-
-pub const feature_unimplementedSimd128 = Feature{
-    .name = "unimplementedSimd128",
-    .llvm_name = "unimplemented-simd128",
-    .description = "Enable 128-bit SIMD not yet implemented in engines",
-    .dependencies = &[_]*const Feature {
-        &feature_simd128,
-    },
-};
-
-pub const features = &[_]*const Feature {
-    &feature_atomics,
-    &feature_bulkMemory,
-    &feature_exceptionHandling,
-    &feature_multivalue,
-    &feature_mutableGlobals,
-    &feature_nontrappingFptoint,
-    &feature_simd128,
-    &feature_signExt,
-    &feature_tailCall,
-    &feature_unimplementedSimd128,
-};
-
-pub const cpu_bleedingEdge = Cpu{
-    .name = "bleedingEdge",
-    .llvm_name = "bleeding-edge",
-    .dependencies = &[_]*const Feature {
-        &feature_atomics,
-        &feature_mutableGlobals,
-        &feature_nontrappingFptoint,
-        &feature_simd128,
-        &feature_signExt,
-    },
-};
+pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
-pub const cpu_generic = Cpu{
-    .name = "generic",
-    .llvm_name = "generic",
-    .dependencies = &[_]*const Feature {
-    },
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).Enum.fields.len;
+    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.atomics)] = .{
+        .index = @enumToInt(Feature.atomics),
+        .name = @tagName(Feature.atomics),
+        .llvm_name = "atomics",
+        .description = "Enable Atomics",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.bulk_memory)] = .{
+        .index = @enumToInt(Feature.bulk_memory),
+        .name = @tagName(Feature.bulk_memory),
+        .llvm_name = "bulk-memory",
+        .description = "Enable bulk memory operations",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.exception_handling)] = .{
+        .index = @enumToInt(Feature.exception_handling),
+        .name = @tagName(Feature.exception_handling),
+        .llvm_name = "exception-handling",
+        .description = "Enable Wasm exception handling",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.multivalue)] = .{
+        .index = @enumToInt(Feature.multivalue),
+        .name = @tagName(Feature.multivalue),
+        .llvm_name = "multivalue",
+        .description = "Enable multivalue blocks, instructions, and functions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.mutable_globals)] = .{
+        .index = @enumToInt(Feature.mutable_globals),
+        .name = @tagName(Feature.mutable_globals),
+        .llvm_name = "mutable-globals",
+        .description = "Enable mutable globals",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.nontrapping_fptoint)] = .{
+        .index = @enumToInt(Feature.nontrapping_fptoint),
+        .name = @tagName(Feature.nontrapping_fptoint),
+        .llvm_name = "nontrapping-fptoint",
+        .description = "Enable non-trapping float-to-int conversion operators",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sign_ext)] = .{
+        .index = @enumToInt(Feature.sign_ext),
+        .name = @tagName(Feature.sign_ext),
+        .llvm_name = "sign-ext",
+        .description = "Enable sign extension operators",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.simd128)] = .{
+        .index = @enumToInt(Feature.simd128),
+        .name = @tagName(Feature.simd128),
+        .llvm_name = "simd128",
+        .description = "Enable 128-bit SIMD",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.tail_call)] = .{
+        .index = @enumToInt(Feature.tail_call),
+        .name = @tagName(Feature.tail_call),
+        .llvm_name = "tail-call",
+        .description = "Enable tail call instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.unimplemented_simd128)] = .{
+        .index = @enumToInt(Feature.unimplemented_simd128),
+        .name = @tagName(Feature.unimplemented_simd128),
+        .llvm_name = "unimplemented-simd128",
+        .description = "Enable 128-bit SIMD not yet implemented in engines",
+        .dependencies = featureSet(&[_]Feature{
+            .simd128,
+        }),
+    };
+    break :blk result;
 };
 
-pub const cpu_mvp = Cpu{
-    .name = "mvp",
-    .llvm_name = "mvp",
-    .dependencies = &[_]*const Feature {
-    },
+pub const cpu = struct {
+    pub const bleeding_edge = Cpu{
+        .name = "bleeding_edge",
+        .llvm_name = "bleeding-edge",
+        .features = featureSet(&[_]Feature{
+            .atomics,
+            .mutable_globals,
+            .nontrapping_fptoint,
+            .sign_ext,
+            .simd128,
+        }),
+    };
+    pub const generic = Cpu{
+        .name = "generic",
+        .llvm_name = "generic",
+        .features = 0,
+    };
+    pub const mvp = Cpu{
+        .name = "mvp",
+        .llvm_name = "mvp",
+        .features = 0,
+    };
 };
 
-pub const cpus = &[_]*const Cpu {
-    &cpu_bleedingEdge,
-    &cpu_generic,
-    &cpu_mvp,
+/// All wasm CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
+pub const all_cpus = &[_]*const Cpu{
+    &cpu.bleeding_edge,
+    &cpu.generic,
+    &cpu.mvp,
 };
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 50b332f5e1d2e9afde13a3f98ef3df0e96cc16b9..9d3b57440125b4b76f0cb992363134f619805d51 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -108,12 +108,12 @@ pub const Feature = enum {
     slow_unaligned_mem_32,
     soft_float,
     sse,
+    sse_unaligned_mem,
     sse2,
     sse3,
     sse4_1,
     sse4_2,
     sse4a,
-    sse_unaligned_mem,
     ssse3,
     tbm,
     vaes,
@@ -134,7 +134,6 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
-
     result[@enumToInt(Feature.@"16bit_mode")] = .{
         .index = @enumToInt(Feature.@"16bit_mode"),
         .name = @tagName(Feature.@"16bit_mode"),
@@ -142,7 +141,6 @@ pub const all_features = blk: {
         .description = "16-bit mode (i8086)",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.@"32bit_mode")] = .{
         .index = @enumToInt(Feature.@"32bit_mode"),
         .name = @tagName(Feature.@"32bit_mode"),
@@ -150,7 +148,6 @@ pub const all_features = blk: {
         .description = "32-bit mode (80386)",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.@"3dnow")] = .{
         .index = @enumToInt(Feature.@"3dnow"),
         .name = @tagName(Feature.@"3dnow"),
@@ -160,17 +157,15 @@ pub const all_features = blk: {
             .mmx,
         }),
     };
-
     result[@enumToInt(Feature.@"3dnowa")] = .{
         .index = @enumToInt(Feature.@"3dnowa"),
         .name = @tagName(Feature.@"3dnowa"),
         .llvm_name = "3dnowa",
         .description = "Enable 3DNow! Athlon instructions",
         .dependencies = featureSet(&[_]Feature{
-            .mmx,
+            .@"3dnow",
         }),
     };
-
     result[@enumToInt(Feature.@"64bit")] = .{
         .index = @enumToInt(Feature.@"64bit"),
         .name = @tagName(Feature.@"64bit"),
@@ -178,7 +173,6 @@ pub const all_features = blk: {
         .description = "Support 64-bit instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.@"64bit_mode")] = .{
         .index = @enumToInt(Feature.@"64bit_mode"),
         .name = @tagName(Feature.@"64bit_mode"),
@@ -186,167 +180,233 @@ pub const all_features = blk: {
         .description = "64-bit mode (x86_64)",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.adx)] = .{
         .index = @enumToInt(Feature.adx),
         .name = @tagName(Feature.adx),
         .llvm_name = "adx",
         .description = "Support ADX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
         .name = @tagName(Feature.aes),
         .llvm_name = "aes",
         .description = "Enable AES instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse2,
         }),
     };
-
     result[@enumToInt(Feature.avx)] = .{
         .index = @enumToInt(Feature.avx),
         .name = @tagName(Feature.avx),
         .llvm_name = "avx",
         .description = "Enable AVX instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse4_2,
         }),
     };
-
     result[@enumToInt(Feature.avx2)] = .{
         .index = @enumToInt(Feature.avx2),
         .name = @tagName(Feature.avx2),
         .llvm_name = "avx2",
         .description = "Enable AVX2 instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .avx,
         }),
     };
-
-    result[@enumToInt(Feature.avx512f)] = .{
-        .index = @enumToInt(Feature.avx512f),
-        .name = @tagName(Feature.avx512f),
-        .llvm_name = "avx512f",
-        .description = "Enable AVX-512 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.avx512bf16)] = .{
         .index = @enumToInt(Feature.avx512bf16),
         .name = @tagName(Feature.avx512bf16),
         .llvm_name = "avx512bf16",
         .description = "Support bfloat16 floating point",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .avx512bw,
         }),
     };
-
     result[@enumToInt(Feature.avx512bitalg)] = .{
         .index = @enumToInt(Feature.avx512bitalg),
         .name = @tagName(Feature.avx512bitalg),
         .llvm_name = "avx512bitalg",
         .description = "Enable AVX-512 Bit Algorithms",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .avx512bw,
+        }),
+    };
+    result[@enumToInt(Feature.avx512bw)] = .{
+        .index = @enumToInt(Feature.avx512bw),
+        .name = @tagName(Feature.avx512bw),
+        .llvm_name = "avx512bw",
+        .description = "Enable AVX-512 Byte and Word Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512cd)] = .{
+        .index = @enumToInt(Feature.avx512cd),
+        .name = @tagName(Feature.avx512cd),
+        .llvm_name = "avx512cd",
+        .description = "Enable AVX-512 Conflict Detection Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512dq)] = .{
+        .index = @enumToInt(Feature.avx512dq),
+        .name = @tagName(Feature.avx512dq),
+        .llvm_name = "avx512dq",
+        .description = "Enable AVX-512 Doubleword and Quadword Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512er)] = .{
+        .index = @enumToInt(Feature.avx512er),
+        .name = @tagName(Feature.avx512er),
+        .llvm_name = "avx512er",
+        .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512f)] = .{
+        .index = @enumToInt(Feature.avx512f),
+        .name = @tagName(Feature.avx512f),
+        .llvm_name = "avx512f",
+        .description = "Enable AVX-512 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx2,
+            .f16c,
+            .fma,
+        }),
+    };
+    result[@enumToInt(Feature.avx512ifma)] = .{
+        .index = @enumToInt(Feature.avx512ifma),
+        .name = @tagName(Feature.avx512ifma),
+        .llvm_name = "avx512ifma",
+        .description = "Enable AVX-512 Integer Fused Multiple-Add",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512pf)] = .{
+        .index = @enumToInt(Feature.avx512pf),
+        .name = @tagName(Feature.avx512pf),
+        .llvm_name = "avx512pf",
+        .description = "Enable AVX-512 PreFetch Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vbmi)] = .{
+        .index = @enumToInt(Feature.avx512vbmi),
+        .name = @tagName(Feature.avx512vbmi),
+        .llvm_name = "avx512vbmi",
+        .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512bw,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vbmi2)] = .{
+        .index = @enumToInt(Feature.avx512vbmi2),
+        .name = @tagName(Feature.avx512vbmi2),
+        .llvm_name = "avx512vbmi2",
+        .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512bw,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vl)] = .{
+        .index = @enumToInt(Feature.avx512vl),
+        .name = @tagName(Feature.avx512vl),
+        .llvm_name = "avx512vl",
+        .description = "Enable AVX-512 Vector Length eXtensions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vnni)] = .{
+        .index = @enumToInt(Feature.avx512vnni),
+        .name = @tagName(Feature.avx512vnni),
+        .llvm_name = "avx512vnni",
+        .description = "Enable AVX-512 Vector Neural Network Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vp2intersect)] = .{
+        .index = @enumToInt(Feature.avx512vp2intersect),
+        .name = @tagName(Feature.avx512vp2intersect),
+        .llvm_name = "avx512vp2intersect",
+        .description = "Enable AVX-512 vp2intersect",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
+        }),
+    };
+    result[@enumToInt(Feature.avx512vpopcntdq)] = .{
+        .index = @enumToInt(Feature.avx512vpopcntdq),
+        .name = @tagName(Feature.avx512vpopcntdq),
+        .llvm_name = "avx512vpopcntdq",
+        .description = "Enable AVX-512 Population Count Instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .avx512f,
         }),
     };
-
     result[@enumToInt(Feature.bmi)] = .{
         .index = @enumToInt(Feature.bmi),
         .name = @tagName(Feature.bmi),
         .llvm_name = "bmi",
         .description = "Support BMI instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.bmi2)] = .{
         .index = @enumToInt(Feature.bmi2),
         .name = @tagName(Feature.bmi2),
         .llvm_name = "bmi2",
         .description = "Support BMI2 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.avx512bw)] = .{
-        .index = @enumToInt(Feature.avx512bw),
-        .name = @tagName(Feature.avx512bw),
-        .llvm_name = "avx512bw",
-        .description = "Enable AVX-512 Byte and Word Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.branchfusion)] = .{
         .index = @enumToInt(Feature.branchfusion),
         .name = @tagName(Feature.branchfusion),
         .llvm_name = "branchfusion",
         .description = "CMP/TEST can be fused with conditional branches",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.avx512cd)] = .{
-        .index = @enumToInt(Feature.avx512cd),
-        .name = @tagName(Feature.avx512cd),
-        .llvm_name = "avx512cd",
-        .description = "Enable AVX-512 Conflict Detection Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.cldemote)] = .{
         .index = @enumToInt(Feature.cldemote),
         .name = @tagName(Feature.cldemote),
         .llvm_name = "cldemote",
         .description = "Enable Cache Demote",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.clflushopt)] = .{
         .index = @enumToInt(Feature.clflushopt),
         .name = @tagName(Feature.clflushopt),
         .llvm_name = "clflushopt",
         .description = "Flush A Cache Line Optimized",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.clwb)] = .{
         .index = @enumToInt(Feature.clwb),
         .name = @tagName(Feature.clwb),
         .llvm_name = "clwb",
         .description = "Cache Line Write Back",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.clzero)] = .{
         .index = @enumToInt(Feature.clzero),
         .name = @tagName(Feature.clzero),
         .llvm_name = "clzero",
         .description = "Enable Cache Line Zero",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.cmov)] = .{
         .index = @enumToInt(Feature.cmov),
         .name = @tagName(Feature.cmov),
         .llvm_name = "cmov",
         .description = "Enable conditional move instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.cx8)] = .{
-        .index = @enumToInt(Feature.cx8),
-        .name = @tagName(Feature.cx8),
-        .llvm_name = "cx8",
-        .description = "Support CMPXCHG8B instructions",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
-
     result[@enumToInt(Feature.cx16)] = .{
         .index = @enumToInt(Feature.cx16),
         .name = @tagName(Feature.cx16),
@@ -356,17 +416,13 @@ pub const all_features = blk: {
             .cx8,
         }),
     };
-
-    result[@enumToInt(Feature.avx512dq)] = .{
-        .index = @enumToInt(Feature.avx512dq),
-        .name = @tagName(Feature.avx512dq),
-        .llvm_name = "avx512dq",
-        .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
+    result[@enumToInt(Feature.cx8)] = .{
+        .index = @enumToInt(Feature.cx8),
+        .name = @tagName(Feature.cx8),
+        .llvm_name = "cx8",
+        .description = "Support CMPXCHG8B instructions",
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.enqcmd)] = .{
         .index = @enumToInt(Feature.enqcmd),
         .name = @tagName(Feature.enqcmd),
@@ -374,17 +430,6 @@ pub const all_features = blk: {
         .description = "Has ENQCMD instructions",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.avx512er)] = .{
-        .index = @enumToInt(Feature.avx512er),
-        .name = @tagName(Feature.avx512er),
-        .llvm_name = "avx512er",
-        .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.ermsb)] = .{
         .index = @enumToInt(Feature.ermsb),
         .name = @tagName(Feature.ermsb),
@@ -392,53 +437,29 @@ pub const all_features = blk: {
         .description = "REP MOVS/STOS are fast",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.f16c)] = .{
         .index = @enumToInt(Feature.f16c),
         .name = @tagName(Feature.f16c),
         .llvm_name = "f16c",
         .description = "Support 16-bit floating point conversion instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .avx,
         }),
     };
-
-    result[@enumToInt(Feature.fma)] = .{
-        .index = @enumToInt(Feature.fma),
-        .name = @tagName(Feature.fma),
-        .llvm_name = "fma",
-        .description = "Enable three-operand fused multiple-add",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.fma4)] = .{
-        .index = @enumToInt(Feature.fma4),
-        .name = @tagName(Feature.fma4),
-        .llvm_name = "fma4",
-        .description = "Enable four-operand fused multiple-add",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.fsgsbase)] = .{
-        .index = @enumToInt(Feature.fsgsbase),
-        .name = @tagName(Feature.fsgsbase),
-        .llvm_name = "fsgsbase",
-        .description = "Support FS/GS Base instructions",
+    result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
+        .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt),
+        .name = @tagName(Feature.false_deps_lzcnt_tzcnt),
+        .llvm_name = "false-deps-lzcnt-tzcnt",
+        .description = "LZCNT/TZCNT have a false dependency on dest register",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.fxsr)] = .{
-        .index = @enumToInt(Feature.fxsr),
-        .name = @tagName(Feature.fxsr),
-        .llvm_name = "fxsr",
-        .description = "Support fxsave/fxrestore instructions",
+    result[@enumToInt(Feature.false_deps_popcnt)] = .{
+        .index = @enumToInt(Feature.false_deps_popcnt),
+        .name = @tagName(Feature.false_deps_popcnt),
+        .llvm_name = "false-deps-popcnt",
+        .description = "POPCNT has a false dependency on dest register",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_11bytenop)] = .{
         .index = @enumToInt(Feature.fast_11bytenop),
         .name = @tagName(Feature.fast_11bytenop),
@@ -446,7 +467,6 @@ pub const all_features = blk: {
         .description = "Target can quickly decode up to 11 byte NOPs",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_15bytenop)] = .{
         .index = @enumToInt(Feature.fast_15bytenop),
         .name = @tagName(Feature.fast_15bytenop),
@@ -454,7 +474,6 @@ pub const all_features = blk: {
         .description = "Target can quickly decode up to 15 byte NOPs",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_bextr)] = .{
         .index = @enumToInt(Feature.fast_bextr),
         .name = @tagName(Feature.fast_bextr),
@@ -462,17 +481,22 @@ pub const all_features = blk: {
         .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.fast_gather)] = .{
+        .index = @enumToInt(Feature.fast_gather),
+        .name = @tagName(Feature.fast_gather),
+        .llvm_name = "fast-gather",
+        .description = "Indicates if gather is reasonably fast",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.fast_hops)] = .{
         .index = @enumToInt(Feature.fast_hops),
         .name = @tagName(Feature.fast_hops),
         .llvm_name = "fast-hops",
         .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse3,
         }),
     };
-
     result[@enumToInt(Feature.fast_lzcnt)] = .{
         .index = @enumToInt(Feature.fast_lzcnt),
         .name = @tagName(Feature.fast_lzcnt),
@@ -480,7 +504,6 @@ pub const all_features = blk: {
         .description = "LZCNT instructions are as fast as most simple integer ops",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
         .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write),
         .name = @tagName(Feature.fast_partial_ymm_or_zmm_write),
@@ -488,15 +511,6 @@ pub const all_features = blk: {
         .description = "Partial writes to YMM/ZMM registers are fast",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.fast_shld_rotate)] = .{
-        .index = @enumToInt(Feature.fast_shld_rotate),
-        .name = @tagName(Feature.fast_shld_rotate),
-        .llvm_name = "fast-shld-rotate",
-        .description = "SHLD can be used as a faster rotate",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
         .index = @enumToInt(Feature.fast_scalar_fsqrt),
         .name = @tagName(Feature.fast_scalar_fsqrt),
@@ -504,7 +518,6 @@ pub const all_features = blk: {
         .description = "Scalar SQRT is fast (disable Newton-Raphson)",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
         .index = @enumToInt(Feature.fast_scalar_shift_masks),
         .name = @tagName(Feature.fast_scalar_shift_masks),
@@ -512,7 +525,13 @@ pub const all_features = blk: {
         .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.fast_shld_rotate)] = .{
+        .index = @enumToInt(Feature.fast_shld_rotate),
+        .name = @tagName(Feature.fast_shld_rotate),
+        .llvm_name = "fast-shld-rotate",
+        .description = "SHLD can be used as a faster rotate",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.fast_variable_shuffle)] = .{
         .index = @enumToInt(Feature.fast_variable_shuffle),
         .name = @tagName(Feature.fast_variable_shuffle),
@@ -520,7 +539,6 @@ pub const all_features = blk: {
         .description = "Shuffles with variable masks are fast",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
         .index = @enumToInt(Feature.fast_vector_fsqrt),
         .name = @tagName(Feature.fast_vector_fsqrt),
@@ -528,7 +546,6 @@ pub const all_features = blk: {
         .description = "Vector SQRT is fast (disable Newton-Raphson)",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
         .index = @enumToInt(Feature.fast_vector_shift_masks),
         .name = @tagName(Feature.fast_vector_shift_masks),
@@ -536,35 +553,62 @@ pub const all_features = blk: {
         .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.fma)] = .{
+        .index = @enumToInt(Feature.fma),
+        .name = @tagName(Feature.fma),
+        .llvm_name = "fma",
+        .description = "Enable three-operand fused multiple-add",
+        .dependencies = featureSet(&[_]Feature{
+            .avx,
+        }),
+    };
+    result[@enumToInt(Feature.fma4)] = .{
+        .index = @enumToInt(Feature.fma4),
+        .name = @tagName(Feature.fma4),
+        .llvm_name = "fma4",
+        .description = "Enable four-operand fused multiple-add",
+        .dependencies = featureSet(&[_]Feature{
+            .avx,
+            .sse4a,
+        }),
+    };
+    result[@enumToInt(Feature.fsgsbase)] = .{
+        .index = @enumToInt(Feature.fsgsbase),
+        .name = @tagName(Feature.fsgsbase),
+        .llvm_name = "fsgsbase",
+        .description = "Support FS/GS Base instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.fxsr)] = .{
+        .index = @enumToInt(Feature.fxsr),
+        .name = @tagName(Feature.fxsr),
+        .llvm_name = "fxsr",
+        .description = "Support fxsave/fxrestore instructions",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.gfni)] = .{
         .index = @enumToInt(Feature.gfni),
         .name = @tagName(Feature.gfni),
         .llvm_name = "gfni",
         .description = "Enable Galois Field Arithmetic Instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse2,
         }),
     };
-
-    result[@enumToInt(Feature.fast_gather)] = .{
-        .index = @enumToInt(Feature.fast_gather),
-        .name = @tagName(Feature.fast_gather),
-        .llvm_name = "fast-gather",
-        .description = "Indicates if gather is reasonably fast",
+    result[@enumToInt(Feature.idivl_to_divb)] = .{
+        .index = @enumToInt(Feature.idivl_to_divb),
+        .name = @tagName(Feature.idivl_to_divb),
+        .llvm_name = "idivl-to-divb",
+        .description = "Use 8-bit divide for positive values less than 256",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.avx512ifma)] = .{
-        .index = @enumToInt(Feature.avx512ifma),
-        .name = @tagName(Feature.avx512ifma),
-        .llvm_name = "avx512ifma",
-        .description = "Enable AVX-512 Integer Fused Multiple-Add",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
+    result[@enumToInt(Feature.idivq_to_divl)] = .{
+        .index = @enumToInt(Feature.idivq_to_divl),
+        .name = @tagName(Feature.idivq_to_divl),
+        .llvm_name = "idivq-to-divl",
+        .description = "Use 32-bit divide for positive values less than 2^32",
+        .dependencies = 0,
     };
-
     result[@enumToInt(Feature.invpcid)] = .{
         .index = @enumToInt(Feature.invpcid),
         .name = @tagName(Feature.invpcid),
@@ -572,15 +616,6 @@ pub const all_features = blk: {
         .description = "Invalidate Process-Context Identifier",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.sahf)] = .{
-        .index = @enumToInt(Feature.sahf),
-        .name = @tagName(Feature.sahf),
-        .llvm_name = "sahf",
-        .description = "Support LAHF and SAHF instructions",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.lea_sp)] = .{
         .index = @enumToInt(Feature.lea_sp),
         .name = @tagName(Feature.lea_sp),
@@ -588,7 +623,6 @@ pub const all_features = blk: {
         .description = "Use LEA for adjusting the stack pointer",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.lea_uses_ag)] = .{
         .index = @enumToInt(Feature.lea_uses_ag),
         .name = @tagName(Feature.lea_uses_ag),
@@ -596,7 +630,6 @@ pub const all_features = blk: {
         .description = "LEA instruction needs inputs at AG stage",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.lwp)] = .{
         .index = @enumToInt(Feature.lwp),
         .name = @tagName(Feature.lwp),
@@ -604,7 +637,6 @@ pub const all_features = blk: {
         .description = "Enable LWP instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.lzcnt)] = .{
         .index = @enumToInt(Feature.lzcnt),
         .name = @tagName(Feature.lzcnt),
@@ -612,15 +644,20 @@ pub const all_features = blk: {
         .description = "Support LZCNT instruction",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
-        .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt),
-        .name = @tagName(Feature.false_deps_lzcnt_tzcnt),
-        .llvm_name = "false-deps-lzcnt-tzcnt",
-        .description = "LZCNT/TZCNT have a false dependency on dest register",
+    result[@enumToInt(Feature.macrofusion)] = .{
+        .index = @enumToInt(Feature.macrofusion),
+        .name = @tagName(Feature.macrofusion),
+        .llvm_name = "macrofusion",
+        .description = "Various instructions can be fused with conditional branches",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
+        .index = @enumToInt(Feature.merge_to_threeway_branch),
+        .name = @tagName(Feature.merge_to_threeway_branch),
+        .llvm_name = "merge-to-threeway-branch",
+        .description = "Merge branches to a three-way conditional branch",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.mmx)] = .{
         .index = @enumToInt(Feature.mmx),
         .name = @tagName(Feature.mmx),
@@ -628,7 +665,6 @@ pub const all_features = blk: {
         .description = "Enable MMX instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.movbe)] = .{
         .index = @enumToInt(Feature.movbe),
         .name = @tagName(Feature.movbe),
@@ -636,7 +672,6 @@ pub const all_features = blk: {
         .description = "Support MOVBE instruction",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.movdir64b)] = .{
         .index = @enumToInt(Feature.movdir64b),
         .name = @tagName(Feature.movdir64b),
@@ -644,7 +679,6 @@ pub const all_features = blk: {
         .description = "Support movdir64b instruction",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.movdiri)] = .{
         .index = @enumToInt(Feature.movdiri),
         .name = @tagName(Feature.movdiri),
@@ -652,7 +686,6 @@ pub const all_features = blk: {
         .description = "Support movdiri instruction",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.mpx)] = .{
         .index = @enumToInt(Feature.mpx),
         .name = @tagName(Feature.mpx),
@@ -660,7 +693,6 @@ pub const all_features = blk: {
         .description = "Support MPX instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.mwaitx)] = .{
         .index = @enumToInt(Feature.mwaitx),
         .name = @tagName(Feature.mwaitx),
@@ -668,23 +700,6 @@ pub const all_features = blk: {
         .description = "Enable MONITORX/MWAITX timer functionality",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.macrofusion)] = .{
-        .index = @enumToInt(Feature.macrofusion),
-        .name = @tagName(Feature.macrofusion),
-        .llvm_name = "macrofusion",
-        .description = "Various instructions can be fused with conditional branches",
-        .dependencies = 0,
-    };
-
-    result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
-        .index = @enumToInt(Feature.merge_to_threeway_branch),
-        .name = @tagName(Feature.merge_to_threeway_branch),
-        .llvm_name = "merge-to-threeway-branch",
-        .description = "Merge branches to a three-way conditional branch",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.nopl)] = .{
         .index = @enumToInt(Feature.nopl),
         .name = @tagName(Feature.nopl),
@@ -692,17 +707,22 @@ pub const all_features = blk: {
         .description = "Enable NOPL instruction",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.pad_short_functions)] = .{
+        .index = @enumToInt(Feature.pad_short_functions),
+        .name = @tagName(Feature.pad_short_functions),
+        .llvm_name = "pad-short-functions",
+        .description = "Pad short functions",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.pclmul)] = .{
         .index = @enumToInt(Feature.pclmul),
         .name = @tagName(Feature.pclmul),
         .llvm_name = "pclmul",
         .description = "Enable packed carry-less multiplication instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse2,
         }),
     };
-
     result[@enumToInt(Feature.pconfig)] = .{
         .index = @enumToInt(Feature.pconfig),
         .name = @tagName(Feature.pconfig),
@@ -710,17 +730,6 @@ pub const all_features = blk: {
         .description = "platform configuration instruction",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.avx512pf)] = .{
-        .index = @enumToInt(Feature.avx512pf),
-        .name = @tagName(Feature.avx512pf),
-        .llvm_name = "avx512pf",
-        .description = "Enable AVX-512 PreFetch Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.pku)] = .{
         .index = @enumToInt(Feature.pku),
         .name = @tagName(Feature.pku),
@@ -728,7 +737,6 @@ pub const all_features = blk: {
         .description = "Enable protection keys",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.popcnt)] = .{
         .index = @enumToInt(Feature.popcnt),
         .name = @tagName(Feature.popcnt),
@@ -736,15 +744,13 @@ pub const all_features = blk: {
         .description = "Support POPCNT instruction",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.false_deps_popcnt)] = .{
-        .index = @enumToInt(Feature.false_deps_popcnt),
-        .name = @tagName(Feature.false_deps_popcnt),
-        .llvm_name = "false-deps-popcnt",
-        .description = "POPCNT has a false dependency on dest register",
+    result[@enumToInt(Feature.prefer_256_bit)] = .{
+        .index = @enumToInt(Feature.prefer_256_bit),
+        .name = @tagName(Feature.prefer_256_bit),
+        .llvm_name = "prefer-256-bit",
+        .description = "Prefer 256-bit AVX instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.prefetchwt1)] = .{
         .index = @enumToInt(Feature.prefetchwt1),
         .name = @tagName(Feature.prefetchwt1),
@@ -752,7 +758,6 @@ pub const all_features = blk: {
         .description = "Prefetch with Intent to Write and T1 Hint",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.prfchw)] = .{
         .index = @enumToInt(Feature.prfchw),
         .name = @tagName(Feature.prfchw),
@@ -760,7 +765,6 @@ pub const all_features = blk: {
         .description = "Support PRFCHW instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.ptwrite)] = .{
         .index = @enumToInt(Feature.ptwrite),
         .name = @tagName(Feature.ptwrite),
@@ -768,23 +772,6 @@ pub const all_features = blk: {
         .description = "Support ptwrite instruction",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.pad_short_functions)] = .{
-        .index = @enumToInt(Feature.pad_short_functions),
-        .name = @tagName(Feature.pad_short_functions),
-        .llvm_name = "pad-short-functions",
-        .description = "Pad short functions",
-        .dependencies = 0,
-    };
-
-    result[@enumToInt(Feature.prefer_256_bit)] = .{
-        .index = @enumToInt(Feature.prefer_256_bit),
-        .name = @tagName(Feature.prefer_256_bit),
-        .llvm_name = "prefer-256-bit",
-        .description = "Prefer 256-bit AVX instructions",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.rdpid)] = .{
         .index = @enumToInt(Feature.rdpid),
         .name = @tagName(Feature.rdpid),
@@ -792,7 +779,6 @@ pub const all_features = blk: {
         .description = "Support RDPID instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.rdrnd)] = .{
         .index = @enumToInt(Feature.rdrnd),
         .name = @tagName(Feature.rdrnd),
@@ -800,7 +786,6 @@ pub const all_features = blk: {
         .description = "Support RDRAND instruction",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.rdseed)] = .{
         .index = @enumToInt(Feature.rdseed),
         .name = @tagName(Feature.rdseed),
@@ -808,26 +793,16 @@ pub const all_features = blk: {
         .description = "Support RDSEED instruction",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.rtm)] = .{
-        .index = @enumToInt(Feature.rtm),
-        .name = @tagName(Feature.rtm),
-        .llvm_name = "rtm",
-        .description = "Support RTM instructions",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.retpoline)] = .{
         .index = @enumToInt(Feature.retpoline),
         .name = @tagName(Feature.retpoline),
         .llvm_name = "retpoline",
         .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
         .dependencies = featureSet(&[_]Feature{
-            .retpoline_indirect_calls,
             .retpoline_indirect_branches,
+            .retpoline_indirect_calls,
         }),
     };
-
     result[@enumToInt(Feature.retpoline_external_thunk)] = .{
         .index = @enumToInt(Feature.retpoline_external_thunk),
         .name = @tagName(Feature.retpoline_external_thunk),
@@ -837,7 +812,6 @@ pub const all_features = blk: {
             .retpoline_indirect_calls,
         }),
     };
-
     result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
         .index = @enumToInt(Feature.retpoline_indirect_branches),
         .name = @tagName(Feature.retpoline_indirect_branches),
@@ -845,7 +819,6 @@ pub const all_features = blk: {
         .description = "Remove speculation of indirect branches from the generated code",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
         .index = @enumToInt(Feature.retpoline_indirect_calls),
         .name = @tagName(Feature.retpoline_indirect_calls),
@@ -853,7 +826,20 @@ pub const all_features = blk: {
         .description = "Remove speculation of indirect calls from the generated code",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.rtm)] = .{
+        .index = @enumToInt(Feature.rtm),
+        .name = @tagName(Feature.rtm),
+        .llvm_name = "rtm",
+        .description = "Support RTM instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sahf)] = .{
+        .index = @enumToInt(Feature.sahf),
+        .name = @tagName(Feature.sahf),
+        .llvm_name = "sahf",
+        .description = "Support LAHF and SAHF instructions",
+        .dependencies = 0,
+    };
     result[@enumToInt(Feature.sgx)] = .{
         .index = @enumToInt(Feature.sgx),
         .name = @tagName(Feature.sgx),
@@ -861,17 +847,15 @@ pub const all_features = blk: {
         .description = "Enable Software Guard Extensions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.sha)] = .{
         .index = @enumToInt(Feature.sha),
         .name = @tagName(Feature.sha),
         .llvm_name = "sha",
         .description = "Enable SHA instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .sse2,
         }),
     };
-
     result[@enumToInt(Feature.shstk)] = .{
         .index = @enumToInt(Feature.shstk),
         .name = @tagName(Feature.shstk),
@@ -879,83 +863,6 @@ pub const all_features = blk: {
         .description = "Support CET Shadow-Stack instructions",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.sse)] = .{
-        .index = @enumToInt(Feature.sse),
-        .name = @tagName(Feature.sse),
-        .llvm_name = "sse",
-        .description = "Enable SSE instructions",
-        .dependencies = 0,
-    };
-
-    result[@enumToInt(Feature.sse2)] = .{
-        .index = @enumToInt(Feature.sse2),
-        .name = @tagName(Feature.sse2),
-        .llvm_name = "sse2",
-        .description = "Enable SSE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.sse3)] = .{
-        .index = @enumToInt(Feature.sse3),
-        .name = @tagName(Feature.sse3),
-        .llvm_name = "sse3",
-        .description = "Enable SSE3 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.sse4a)] = .{
-        .index = @enumToInt(Feature.sse4a),
-        .name = @tagName(Feature.sse4a),
-        .llvm_name = "sse4a",
-        .description = "Support SSE 4a instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.sse4_1)] = .{
-        .index = @enumToInt(Feature.sse4_1),
-        .name = @tagName(Feature.sse4_1),
-        .llvm_name = "sse4.1",
-        .description = "Enable SSE 4.1 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.sse4_2)] = .{
-        .index = @enumToInt(Feature.sse4_2),
-        .name = @tagName(Feature.sse4_2),
-        .llvm_name = "sse4.2",
-        .description = "Enable SSE 4.2 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.sse_unaligned_mem)] = .{
-        .index = @enumToInt(Feature.sse_unaligned_mem),
-        .name = @tagName(Feature.sse_unaligned_mem),
-        .llvm_name = "sse-unaligned-mem",
-        .description = "Allow unaligned memory operands with SSE instructions",
-        .dependencies = 0,
-    };
-
-    result[@enumToInt(Feature.ssse3)] = .{
-        .index = @enumToInt(Feature.ssse3),
-        .name = @tagName(Feature.ssse3),
-        .llvm_name = "ssse3",
-        .description = "Enable SSSE3 instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.slow_3ops_lea)] = .{
         .index = @enumToInt(Feature.slow_3ops_lea),
         .name = @tagName(Feature.slow_3ops_lea),
@@ -963,23 +870,6 @@ pub const all_features = blk: {
         .description = "LEA instruction with 3 ops or certain registers is slow",
         .dependencies = 0,
     };
-
-    result[@enumToInt(Feature.idivl_to_divb)] = .{
-        .index = @enumToInt(Feature.idivl_to_divb),
-        .name = @tagName(Feature.idivl_to_divb),
-        .llvm_name = "idivl-to-divb",
-        .description = "Use 8-bit divide for positive values less than 256",
-        .dependencies = 0,
-    };
-
-    result[@enumToInt(Feature.idivq_to_divl)] = .{
-        .index = @enumToInt(Feature.idivq_to_divl),
-        .name = @tagName(Feature.idivq_to_divl),
-        .llvm_name = "idivq-to-divl",
-        .description = "Use 32-bit divide for positive values less than 2^32",
-        .dependencies = 0,
-    };
-
     result[@enumToInt(Feature.slow_incdec)] = .{
         .index = @enumToInt(Feature.slow_incdec),
         .name = @tagName(Feature.slow_incdec),
@@ -987,7 +877,6 @@ pub const all_features = blk: {
         .description = "INC and DEC instructions are slower than ADD and SUB",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_lea)] = .{
         .index = @enumToInt(Feature.slow_lea),
         .name = @tagName(Feature.slow_lea),
@@ -995,7 +884,6 @@ pub const all_features = blk: {
         .description = "LEA instruction with certain arguments is slow",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_pmaddwd)] = .{
         .index = @enumToInt(Feature.slow_pmaddwd),
         .name = @tagName(Feature.slow_pmaddwd),
@@ -1003,7 +891,6 @@ pub const all_features = blk: {
         .description = "PMADDWD is slower than PMULLD",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_pmulld)] = .{
         .index = @enumToInt(Feature.slow_pmulld),
         .name = @tagName(Feature.slow_pmulld),
@@ -1011,7 +898,6 @@ pub const all_features = blk: {
         .description = "PMULLD instruction is slow",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_shld)] = .{
         .index = @enumToInt(Feature.slow_shld),
         .name = @tagName(Feature.slow_shld),
@@ -1019,7 +905,6 @@ pub const all_features = blk: {
         .description = "SHLD instruction is slow",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_two_mem_ops)] = .{
         .index = @enumToInt(Feature.slow_two_mem_ops),
         .name = @tagName(Feature.slow_two_mem_ops),
@@ -1027,7 +912,6 @@ pub const all_features = blk: {
         .description = "Two memory operand instructions are slow",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
         .index = @enumToInt(Feature.slow_unaligned_mem_16),
         .name = @tagName(Feature.slow_unaligned_mem_16),
@@ -1035,7 +919,6 @@ pub const all_features = blk: {
         .description = "Slow unaligned 16-byte memory access",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
         .index = @enumToInt(Feature.slow_unaligned_mem_32),
         .name = @tagName(Feature.slow_unaligned_mem_32),
@@ -1043,7 +926,6 @@ pub const all_features = blk: {
         .description = "Slow unaligned 32-byte memory access",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.soft_float)] = .{
         .index = @enumToInt(Feature.soft_float),
         .name = @tagName(Feature.soft_float),
@@ -1051,7 +933,74 @@ pub const all_features = blk: {
         .description = "Use software floating point features",
         .dependencies = 0,
     };
-
+    result[@enumToInt(Feature.sse)] = .{
+        .index = @enumToInt(Feature.sse),
+        .name = @tagName(Feature.sse),
+        .llvm_name = "sse",
+        .description = "Enable SSE instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sse_unaligned_mem)] = .{
+        .index = @enumToInt(Feature.sse_unaligned_mem),
+        .name = @tagName(Feature.sse_unaligned_mem),
+        .llvm_name = "sse-unaligned-mem",
+        .description = "Allow unaligned memory operands with SSE instructions",
+        .dependencies = 0,
+    };
+    result[@enumToInt(Feature.sse2)] = .{
+        .index = @enumToInt(Feature.sse2),
+        .name = @tagName(Feature.sse2),
+        .llvm_name = "sse2",
+        .description = "Enable SSE2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse,
+        }),
+    };
+    result[@enumToInt(Feature.sse3)] = .{
+        .index = @enumToInt(Feature.sse3),
+        .name = @tagName(Feature.sse3),
+        .llvm_name = "sse3",
+        .description = "Enable SSE3 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse2,
+        }),
+    };
+    result[@enumToInt(Feature.sse4_1)] = .{
+        .index = @enumToInt(Feature.sse4_1),
+        .name = @tagName(Feature.sse4_1),
+        .llvm_name = "sse4.1",
+        .description = "Enable SSE 4.1 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .ssse3,
+        }),
+    };
+    result[@enumToInt(Feature.sse4_2)] = .{
+        .index = @enumToInt(Feature.sse4_2),
+        .name = @tagName(Feature.sse4_2),
+        .llvm_name = "sse4.2",
+        .description = "Enable SSE 4.2 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse4_1,
+        }),
+    };
+    result[@enumToInt(Feature.sse4a)] = .{
+        .index = @enumToInt(Feature.sse4a),
+        .name = @tagName(Feature.sse4a),
+        .llvm_name = "sse4a",
+        .description = "Support SSE 4a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse3,
+        }),
+    };
+    result[@enumToInt(Feature.ssse3)] = .{
+        .index = @enumToInt(Feature.ssse3),
+        .name = @tagName(Feature.ssse3),
+        .llvm_name = "ssse3",
+        .description = "Enable SSSE3 instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .sse3,
+        }),
+    };
     result[@enumToInt(Feature.tbm)] = .{
         .index = @enumToInt(Feature.tbm),
         .name = @tagName(Feature.tbm),
@@ -1059,87 +1008,26 @@ pub const all_features = blk: {
         .description = "Enable TBM instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.vaes)] = .{
         .index = @enumToInt(Feature.vaes),
         .name = @tagName(Feature.vaes),
         .llvm_name = "vaes",
         .description = "Promote selected AES instructions to AVX512/AVX registers",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .aes,
+            .avx,
         }),
     };
-
-    result[@enumToInt(Feature.avx512vbmi)] = .{
-        .index = @enumToInt(Feature.avx512vbmi),
-        .name = @tagName(Feature.avx512vbmi),
-        .llvm_name = "avx512vbmi",
-        .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.avx512vbmi2)] = .{
-        .index = @enumToInt(Feature.avx512vbmi2),
-        .name = @tagName(Feature.avx512vbmi2),
-        .llvm_name = "avx512vbmi2",
-        .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.avx512vl)] = .{
-        .index = @enumToInt(Feature.avx512vl),
-        .name = @tagName(Feature.avx512vl),
-        .llvm_name = "avx512vl",
-        .description = "Enable AVX-512 Vector Length eXtensions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.avx512vnni)] = .{
-        .index = @enumToInt(Feature.avx512vnni),
-        .name = @tagName(Feature.avx512vnni),
-        .llvm_name = "avx512vnni",
-        .description = "Enable AVX-512 Vector Neural Network Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
-    result[@enumToInt(Feature.avx512vp2intersect)] = .{
-        .index = @enumToInt(Feature.avx512vp2intersect),
-        .name = @tagName(Feature.avx512vp2intersect),
-        .llvm_name = "avx512vp2intersect",
-        .description = "Enable AVX-512 vp2intersect",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.vpclmulqdq)] = .{
         .index = @enumToInt(Feature.vpclmulqdq),
         .name = @tagName(Feature.vpclmulqdq),
         .llvm_name = "vpclmulqdq",
         .description = "Enable vpclmulqdq instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .avx,
+            .pclmul,
         }),
     };
-
-    result[@enumToInt(Feature.avx512vpopcntdq)] = .{
-        .index = @enumToInt(Feature.avx512vpopcntdq),
-        .name = @tagName(Feature.avx512vpopcntdq),
-        .llvm_name = "avx512vpopcntdq",
-        .description = "Enable AVX-512 Population Count Instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .sse,
-        }),
-    };
-
     result[@enumToInt(Feature.waitpkg)] = .{
         .index = @enumToInt(Feature.waitpkg),
         .name = @tagName(Feature.waitpkg),
@@ -1147,7 +1035,6 @@ pub const all_features = blk: {
         .description = "Wait and pause enhancements",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.wbnoinvd)] = .{
         .index = @enumToInt(Feature.wbnoinvd),
         .name = @tagName(Feature.wbnoinvd),
@@ -1155,7 +1042,6 @@ pub const all_features = blk: {
         .description = "Write Back No Invalidate",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.x87)] = .{
         .index = @enumToInt(Feature.x87),
         .name = @tagName(Feature.x87),
@@ -1163,17 +1049,15 @@ pub const all_features = blk: {
         .description = "Enable X87 float instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.xop)] = .{
         .index = @enumToInt(Feature.xop),
         .name = @tagName(Feature.xop),
         .llvm_name = "xop",
         .description = "Enable XOP instructions",
         .dependencies = featureSet(&[_]Feature{
-            .sse,
+            .fma4,
         }),
     };
-
     result[@enumToInt(Feature.xsave)] = .{
         .index = @enumToInt(Feature.xsave),
         .name = @tagName(Feature.xsave),
@@ -1181,7 +1065,6 @@ pub const all_features = blk: {
         .description = "Support xsave instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.xsavec)] = .{
         .index = @enumToInt(Feature.xsavec),
         .name = @tagName(Feature.xsavec),
@@ -1189,7 +1072,6 @@ pub const all_features = blk: {
         .description = "Support xsavec instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.xsaveopt)] = .{
         .index = @enumToInt(Feature.xsaveopt),
         .name = @tagName(Feature.xsaveopt),
@@ -1197,7 +1079,6 @@ pub const all_features = blk: {
         .description = "Support xsaveopt instructions",
         .dependencies = 0,
     };
-
     result[@enumToInt(Feature.xsaves)] = .{
         .index = @enumToInt(Feature.xsaves),
         .name = @tagName(Feature.xsaves),
@@ -1205,7 +1086,6 @@ pub const all_features = blk: {
         .description = "Support xsaves instructions",
         .dependencies = 0,
     };
-
     break :blk result;
 };
 
@@ -1214,30 +1094,26 @@ pub const cpu = struct {
         .name = "amdfam10",
         .llvm_name = "amdfam10",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fxsr,
             .lzcnt,
             .nopl,
             .popcnt,
-            .sse,
-            .sse4a,
+            .sahf,
             .slow_shld,
+            .sse4a,
             .x87,
         }),
     };
-
     pub const athlon = Cpu{
         .name = "athlon",
         .llvm_name = "athlon",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1247,66 +1123,57 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
-    pub const athlon4 = Cpu{
+    pub const athlon_4 = Cpu{
         .name = "athlon_4",
         .llvm_name = "athlon-4",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
             .nopl,
-            .sse,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const athlon_fx = Cpu{
         .name = "athlon_fx",
         .llvm_name = "athlon-fx",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
             .cx8,
-            .fxsr,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse2,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const athlon_mp = Cpu{
         .name = "athlon_mp",
         .llvm_name = "athlon-mp",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
             .nopl,
-            .sse,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const athlon_tbird = Cpu{
         .name = "athlon_tbird",
         .llvm_name = "athlon-tbird",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1316,129 +1183,113 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const athlon_xp = Cpu{
         .name = "athlon_xp",
         .llvm_name = "athlon-xp",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cmov,
             .cx8,
             .fxsr,
             .nopl,
-            .sse,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const athlon64 = Cpu{
         .name = "athlon64",
         .llvm_name = "athlon64",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
             .cx8,
-            .fxsr,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse2,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const athlon64_sse3 = Cpu{
         .name = "athlon64_sse3",
         .llvm_name = "athlon64-sse3",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse3,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const atom = Cpu{
         .name = "atom",
         .llvm_name = "atom",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
+            .idivl_to_divb,
+            .idivq_to_divl,
             .lea_sp,
             .lea_uses_ag,
             .mmx,
             .movbe,
             .nopl,
             .pad_short_functions,
-            .sse,
-            .ssse3,
-            .idivl_to_divb,
-            .idivq_to_divl,
+            .sahf,
             .slow_two_mem_ops,
             .slow_unaligned_mem_16,
+            .ssse3,
             .x87,
         }),
     };
-
     pub const barcelona = Cpu{
         .name = "barcelona",
         .llvm_name = "barcelona",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fxsr,
             .lzcnt,
             .nopl,
             .popcnt,
-            .sse,
-            .sse4a,
+            .sahf,
             .slow_shld,
+            .sse4a,
             .x87,
         }),
     };
-
     pub const bdver1 = Cpu{
         .name = "bdver1",
         .llvm_name = "bdver1",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .branchfusion,
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_11bytenop,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fxsr,
             .lwp,
             .lzcnt,
             .mmx,
@@ -1446,32 +1297,30 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .prfchw,
+            .sahf,
             .slow_shld,
             .x87,
             .xop,
             .xsave,
         }),
     };
-
     pub const bdver2 = Cpu{
         .name = "bdver2",
         .llvm_name = "bdver2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .bmi,
             .branchfusion,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
-            .fma,
-            .fxsr,
             .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fma,
+            .fxsr,
             .lwp,
             .lzcnt,
             .mmx,
@@ -1479,6 +1328,7 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .prfchw,
+            .sahf,
             .slow_shld,
             .tbm,
             .x87,
@@ -1486,27 +1336,24 @@ pub const cpu = struct {
             .xsave,
         }),
     };
-
     pub const bdver3 = Cpu{
         .name = "bdver3",
         .llvm_name = "bdver3",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .bmi,
             .branchfusion,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
             .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .lwp,
             .lzcnt,
             .mmx,
@@ -1514,6 +1361,7 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .prfchw,
+            .sahf,
             .slow_shld,
             .tbm,
             .x87,
@@ -1522,29 +1370,26 @@ pub const cpu = struct {
             .xsaveopt,
         }),
     };
-
     pub const bdver4 = Cpu{
         .name = "bdver4",
         .llvm_name = "bdver4",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .avx2,
             .bmi,
             .bmi2,
             .branchfusion,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
             .fast_11bytenop,
             .fast_bextr,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .lwp,
             .lzcnt,
             .mmx,
@@ -1553,6 +1398,7 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .prfchw,
+            .sahf,
             .slow_shld,
             .tbm,
             .x87,
@@ -1561,119 +1407,110 @@ pub const cpu = struct {
             .xsaveopt,
         }),
     };
-
     pub const bonnell = Cpu{
         .name = "bonnell",
         .llvm_name = "bonnell",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
+            .idivl_to_divb,
+            .idivq_to_divl,
             .lea_sp,
             .lea_uses_ag,
             .mmx,
             .movbe,
             .nopl,
             .pad_short_functions,
-            .sse,
-            .ssse3,
-            .idivl_to_divb,
-            .idivq_to_divl,
+            .sahf,
             .slow_two_mem_ops,
             .slow_unaligned_mem_16,
+            .ssse3,
             .x87,
         }),
     };
-
     pub const broadwell = Cpu{
         .name = "broadwell",
         .llvm_name = "broadwell",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .ermsb,
             .f16c,
+            .false_deps_lzcnt_tzcnt,
+            .false_deps_popcnt,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast_shld_rotate,
-            .fast_scalar_fsqrt,
-            .fast_variable_shuffle,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
-            .false_deps_lzcnt_tzcnt,
-            .mmx,
-            .movbe,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
+            .movbe,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const btver1 = Cpu{
         .name = "btver1",
         .llvm_name = "btver1",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_15bytenop,
             .fast_scalar_shift_masks,
             .fast_vector_shift_masks,
-            .sahf,
+            .fxsr,
             .lzcnt,
             .mmx,
             .nopl,
             .popcnt,
             .prfchw,
-            .sse,
+            .sahf,
+            .slow_shld,
             .sse4a,
             .ssse3,
-            .slow_shld,
             .x87,
         }),
     };
-
     pub const btver2 = Cpu{
         .name = "btver2",
         .llvm_name = "btver2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .avx,
             .bmi,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
-            .fxsr,
             .fast_15bytenop,
             .fast_bextr,
             .fast_hops,
@@ -1681,7 +1518,7 @@ pub const cpu = struct {
             .fast_partial_ymm_or_zmm_write,
             .fast_scalar_shift_masks,
             .fast_vector_shift_masks,
-            .sahf,
+            .fxsr,
             .lzcnt,
             .mmx,
             .movbe,
@@ -1689,27 +1526,25 @@ pub const cpu = struct {
             .pclmul,
             .popcnt,
             .prfchw,
+            .sahf,
+            .slow_shld,
             .sse4a,
             .ssse3,
-            .slow_shld,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const c3 = Cpu{
         .name = "c3",
         .llvm_name = "c3",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
-
-    pub const c32 = Cpu{
+    pub const c3_2 = Cpu{
         .name = "c3_2",
         .llvm_name = "c3-2",
         .features = featureSet(&[_]Feature{
@@ -1717,51 +1552,51 @@ pub const cpu = struct {
             .cx8,
             .fxsr,
             .mmx,
-            .sse,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const cannonlake = Cpu{
         .name = "cannonlake",
         .llvm_name = "cannonlake",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
+            .avx512bw,
+            .avx512cd,
+            .avx512dq,
             .avx512f,
+            .avx512ifma,
+            .avx512vbmi,
+            .avx512vl,
             .bmi,
             .bmi2,
-            .avx512bw,
-            .avx512cd,
             .clflushopt,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
-            .avx512ifma,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
@@ -1769,13 +1604,11 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
             .sha,
-            .sse4_2,
             .slow_3ops_lea,
-            .idivq_to_divl,
-            .avx512vbmi,
-            .avx512vl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -1783,59 +1616,57 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const cascadelake = Cpu{
         .name = "cascadelake",
         .llvm_name = "cascadelake",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
+            .avx512bw,
+            .avx512cd,
+            .avx512dq,
             .avx512f,
+            .avx512vl,
+            .avx512vnni,
             .bmi,
             .bmi2,
-            .avx512bw,
-            .avx512cd,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .false_deps_popcnt,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
-            .avx512vl,
-            .avx512vnni,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -1843,60 +1674,58 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const cooperlake = Cpu{
         .name = "cooperlake",
         .llvm_name = "cooperlake",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
-            .avx512f,
             .avx512bf16,
-            .bmi,
-            .bmi2,
             .avx512bw,
             .avx512cd,
+            .avx512dq,
+            .avx512f,
+            .avx512vl,
+            .avx512vnni,
+            .bmi,
+            .bmi2,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .false_deps_popcnt,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
-            .avx512vl,
-            .avx512vnni,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -1904,155 +1733,144 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const core_avx_i = Cpu{
         .name = "core_avx_i",
         .llvm_name = "core-avx-i",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
+            .false_deps_popcnt,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fsgsbase,
             .fxsr,
-            .fast_shld_rotate,
-            .fast_scalar_fsqrt,
-            .sahf,
-            .mmx,
+            .idivq_to_divl,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .rdrnd,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_unaligned_mem_32,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const core_avx2 = Cpu{
         .name = "core_avx2",
         .llvm_name = "core-avx2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .ermsb,
             .f16c,
+            .false_deps_lzcnt_tzcnt,
+            .false_deps_popcnt,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast_shld_rotate,
-            .fast_scalar_fsqrt,
-            .fast_variable_shuffle,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
-            .false_deps_lzcnt_tzcnt,
-            .mmx,
-            .movbe,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
+            .movbe,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .rdrnd,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const core2 = Cpu{
         .name = "core2",
         .llvm_name = "core2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
-            .sse,
-            .ssse3,
+            .sahf,
             .slow_unaligned_mem_16,
+            .ssse3,
             .x87,
         }),
     };
-
     pub const corei7 = Cpu{
         .name = "corei7",
         .llvm_name = "corei7",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
             .popcnt,
-            .sse,
+            .sahf,
             .sse4_2,
             .x87,
         }),
     };
-
     pub const corei7_avx = Cpu{
         .name = "corei7_avx",
         .llvm_name = "corei7-avx",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
-            .fast_shld_rotate,
+            .cx8,
+            .false_deps_popcnt,
             .fast_scalar_fsqrt,
-            .sahf,
-            .mmx,
+            .fast_shld_rotate,
+            .fxsr,
+            .idivq_to_divl,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_unaligned_mem_32,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
@@ -2062,49 +1880,45 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const geode = Cpu{
         .name = "geode",
         .llvm_name = "geode",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
-
     pub const goldmont = Cpu{
         .name = "goldmont",
         .llvm_name = "goldmont",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .clflushopt,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
+            .false_deps_popcnt,
             .fsgsbase,
             .fxsr,
-            .sahf,
             .mmx,
             .movbe,
             .mpx,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sha,
-            .sse4_2,
-            .ssse3,
             .slow_incdec,
             .slow_lea,
             .slow_two_mem_ops,
+            .sse4_2,
+            .ssse3,
             .x87,
             .xsave,
             .xsavec,
@@ -2112,21 +1926,18 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const goldmont_plus = Cpu{
         .name = "goldmont_plus",
         .llvm_name = "goldmont-plus",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .clflushopt,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fsgsbase,
             .fxsr,
-            .sahf,
             .mmx,
             .movbe,
             .mpx,
@@ -2138,13 +1949,14 @@ pub const cpu = struct {
             .rdpid,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
             .sha,
-            .sse4_2,
-            .ssse3,
             .slow_incdec,
             .slow_lea,
             .slow_two_mem_ops,
+            .sse4_2,
+            .ssse3,
             .x87,
             .xsave,
             .xsavec,
@@ -2152,50 +1964,47 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const haswell = Cpu{
         .name = "haswell",
         .llvm_name = "haswell",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .avx2,
             .bmi,
             .bmi2,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .ermsb,
             .f16c,
+            .false_deps_lzcnt_tzcnt,
+            .false_deps_popcnt,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_shuffle,
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast_shld_rotate,
-            .fast_scalar_fsqrt,
-            .fast_variable_shuffle,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
-            .false_deps_lzcnt_tzcnt,
-            .mmx,
-            .movbe,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
+            .movbe,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .rdrnd,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const _i386 = Cpu{
         .name = "_i386",
         .llvm_name = "i386",
@@ -2204,7 +2013,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const _i486 = Cpu{
         .name = "_i486",
         .llvm_name = "i486",
@@ -2213,7 +2021,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const _i586 = Cpu{
         .name = "_i586",
         .llvm_name = "i586",
@@ -2223,7 +2030,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const _i686 = Cpu{
         .name = "_i686",
         .llvm_name = "i686",
@@ -2234,49 +2040,52 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const icelake_client = Cpu{
         .name = "icelake_client",
         .llvm_name = "icelake-client",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
-            .avx512f,
             .avx512bitalg,
-            .bmi,
-            .bmi2,
             .avx512bw,
             .avx512cd,
+            .avx512dq,
+            .avx512f,
+            .avx512ifma,
+            .avx512vbmi,
+            .avx512vbmi2,
+            .avx512vl,
+            .avx512vnni,
+            .avx512vpopcntdq,
+            .bmi,
+            .bmi2,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .gfni,
-            .fast_gather,
-            .avx512ifma,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
@@ -2285,18 +2094,13 @@ pub const cpu = struct {
             .rdpid,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
             .sha,
-            .sse4_2,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .vaes,
-            .avx512vbmi,
-            .avx512vbmi2,
-            .avx512vl,
-            .avx512vnni,
             .vpclmulqdq,
-            .avx512vpopcntdq,
             .x87,
             .xsave,
             .xsavec,
@@ -2304,49 +2108,52 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const icelake_server = Cpu{
         .name = "icelake_server",
         .llvm_name = "icelake-server",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
-            .avx512f,
             .avx512bitalg,
-            .bmi,
-            .bmi2,
             .avx512bw,
             .avx512cd,
+            .avx512dq,
+            .avx512f,
+            .avx512ifma,
+            .avx512vbmi,
+            .avx512vbmi2,
+            .avx512vl,
+            .avx512vnni,
+            .avx512vpopcntdq,
+            .bmi,
+            .bmi2,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .gfni,
-            .fast_gather,
-            .avx512ifma,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pconfig,
@@ -2356,18 +2163,13 @@ pub const cpu = struct {
             .rdpid,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
             .sha,
-            .sse4_2,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .vaes,
-            .avx512vbmi,
-            .avx512vbmi2,
-            .avx512vl,
-            .avx512vnni,
             .vpclmulqdq,
-            .avx512vpopcntdq,
             .wbnoinvd,
             .x87,
             .xsave,
@@ -2376,41 +2178,38 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const ivybridge = Cpu{
         .name = "ivybridge",
         .llvm_name = "ivybridge",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .f16c,
+            .false_deps_popcnt,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fsgsbase,
             .fxsr,
-            .fast_shld_rotate,
-            .fast_scalar_fsqrt,
-            .sahf,
-            .mmx,
+            .idivq_to_divl,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .rdrnd,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_unaligned_mem_32,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const k6 = Cpu{
         .name = "k6",
         .llvm_name = "k6",
@@ -2421,108 +2220,96 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
-    pub const k62 = Cpu{
+    pub const k6_2 = Cpu{
         .name = "k6_2",
         .llvm_name = "k6-2",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
-
-    pub const k63 = Cpu{
+    pub const k6_3 = Cpu{
         .name = "k6_3",
         .llvm_name = "k6-3",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
-
     pub const k8 = Cpu{
         .name = "k8",
         .llvm_name = "k8",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
             .cx8,
-            .fxsr,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse2,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const k8_sse3 = Cpu{
         .name = "k8_sse3",
         .llvm_name = "k8-sse3",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse3,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const knl = Cpu{
         .name = "knl",
         .llvm_name = "knl",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
+            .avx512cd,
+            .avx512er,
             .avx512f,
+            .avx512pf,
             .bmi,
             .bmi2,
-            .avx512cd,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512er,
+            .cx8,
             .f16c,
+            .fast_gather,
+            .fast_partial_ymm_or_zmm_write,
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast_partial_ymm_or_zmm_write,
-            .fast_gather,
-            .sahf,
+            .idivq_to_divl,
             .lzcnt,
             .mmx,
             .movbe,
             .nopl,
             .pclmul,
-            .avx512pf,
             .popcnt,
             .prefetchwt1,
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_incdec,
             .slow_pmaddwd,
             .slow_two_mem_ops,
@@ -2531,158 +2318,142 @@ pub const cpu = struct {
             .xsaveopt,
         }),
     };
-
     pub const knm = Cpu{
         .name = "knm",
         .llvm_name = "knm",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
+            .avx512cd,
+            .avx512er,
             .avx512f,
+            .avx512pf,
+            .avx512vpopcntdq,
             .bmi,
             .bmi2,
-            .avx512cd,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512er,
+            .cx8,
             .f16c,
+            .fast_gather,
+            .fast_partial_ymm_or_zmm_write,
             .fma,
             .fsgsbase,
             .fxsr,
-            .fast_partial_ymm_or_zmm_write,
-            .fast_gather,
-            .sahf,
+            .idivq_to_divl,
             .lzcnt,
             .mmx,
             .movbe,
             .nopl,
             .pclmul,
-            .avx512pf,
             .popcnt,
             .prefetchwt1,
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_incdec,
             .slow_pmaddwd,
             .slow_two_mem_ops,
-            .avx512vpopcntdq,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const lakemont = Cpu{
         .name = "lakemont",
         .llvm_name = "lakemont",
         .features = 0,
     };
-
     pub const nehalem = Cpu{
         .name = "nehalem",
         .llvm_name = "nehalem",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
             .popcnt,
-            .sse,
+            .sahf,
             .sse4_2,
             .x87,
         }),
     };
-
     pub const nocona = Cpu{
         .name = "nocona",
         .llvm_name = "nocona",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse3,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const opteron = Cpu{
         .name = "opteron",
         .llvm_name = "opteron",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
             .cx8,
-            .fxsr,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse2,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const opteron_sse3 = Cpu{
         .name = "opteron_sse3",
         .llvm_name = "opteron-sse3",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnowa",
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
+            .cx8,
             .fast_scalar_shift_masks,
+            .fxsr,
             .nopl,
-            .sse,
-            .sse3,
             .slow_shld,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const penryn = Cpu{
         .name = "penryn",
         .llvm_name = "penryn",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
-            .sse,
-            .sse4_1,
+            .sahf,
             .slow_unaligned_mem_16,
+            .sse4_1,
             .x87,
         }),
     };
-
     pub const pentium = Cpu{
         .name = "pentium",
         .llvm_name = "pentium",
@@ -2692,7 +2463,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const pentium_m = Cpu{
         .name = "pentium_m",
         .llvm_name = "pentium-m",
@@ -2702,13 +2472,11 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse2,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const pentium_mmx = Cpu{
         .name = "pentium_mmx",
         .llvm_name = "pentium-mmx",
@@ -2719,7 +2487,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const pentium2 = Cpu{
         .name = "pentium2",
         .llvm_name = "pentium2",
@@ -2733,7 +2500,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const pentium3 = Cpu{
         .name = "pentium3",
         .llvm_name = "pentium3",
@@ -2743,12 +2509,11 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const pentium3m = Cpu{
         .name = "pentium3m",
         .llvm_name = "pentium3m",
@@ -2758,12 +2523,11 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
             .slow_unaligned_mem_16,
+            .sse,
             .x87,
         }),
     };
-
     pub const pentium4 = Cpu{
         .name = "pentium4",
         .llvm_name = "pentium4",
@@ -2773,13 +2537,11 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse2,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const pentium4m = Cpu{
         .name = "pentium4m",
         .llvm_name = "pentium4m",
@@ -2789,13 +2551,11 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse2,
             .slow_unaligned_mem_16,
+            .sse2,
             .x87,
         }),
     };
-
     pub const pentiumpro = Cpu{
         .name = "pentiumpro",
         .llvm_name = "pentiumpro",
@@ -2807,7 +2567,6 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const prescott = Cpu{
         .name = "prescott",
         .llvm_name = "prescott",
@@ -2817,125 +2576,118 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse3,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const sandybridge = Cpu{
         .name = "sandybridge",
         .llvm_name = "sandybridge",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .avx,
             .cmov,
-            .cx8,
             .cx16,
-            .fxsr,
-            .fast_shld_rotate,
+            .cx8,
+            .false_deps_popcnt,
             .fast_scalar_fsqrt,
-            .sahf,
-            .mmx,
+            .fast_shld_rotate,
+            .fxsr,
+            .idivq_to_divl,
             .macrofusion,
             .merge_to_threeway_branch,
+            .mmx,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
             .slow_unaligned_mem_32,
+            .sse4_2,
             .x87,
             .xsave,
             .xsaveopt,
         }),
     };
-
     pub const silvermont = Cpu{
         .name = "silvermont",
         .llvm_name = "silvermont",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
+            .false_deps_popcnt,
             .fxsr,
-            .sahf,
+            .idivq_to_divl,
             .mmx,
             .movbe,
             .nopl,
-            .sse,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
-            .sse4_2,
-            .ssse3,
-            .idivq_to_divl,
+            .sahf,
             .slow_incdec,
             .slow_lea,
             .slow_pmulld,
             .slow_two_mem_ops,
+            .sse4_2,
+            .ssse3,
             .x87,
         }),
     };
-
     pub const skx = Cpu{
         .name = "skx",
         .llvm_name = "skx",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
+            .avx512bw,
+            .avx512cd,
+            .avx512dq,
             .avx512f,
+            .avx512vl,
             .bmi,
             .bmi2,
-            .avx512bw,
-            .avx512cd,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .false_deps_popcnt,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
-            .avx512vl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -2943,14 +2695,12 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const skylake = Cpu{
         .name = "skylake",
         .llvm_name = "skylake",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
@@ -2958,37 +2708,37 @@ pub const cpu = struct {
             .bmi2,
             .clflushopt,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .false_deps_popcnt,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
-            .sse4_2,
             .slow_3ops_lea,
-            .idivq_to_divl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -2996,58 +2746,56 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const skylake_avx512 = Cpu{
         .name = "skylake_avx512",
         .llvm_name = "skylake-avx512",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx,
             .avx2,
+            .avx512bw,
+            .avx512cd,
+            .avx512dq,
             .avx512f,
+            .avx512vl,
             .bmi,
             .bmi2,
-            .avx512bw,
-            .avx512cd,
             .clflushopt,
             .clwb,
             .cmov,
-            .cx8,
             .cx16,
-            .avx512dq,
+            .cx8,
             .ermsb,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
-            .fast_shld_rotate,
+            .false_deps_popcnt,
+            .fast_gather,
             .fast_scalar_fsqrt,
+            .fast_shld_rotate,
             .fast_variable_shuffle,
             .fast_vector_fsqrt,
-            .fast_gather,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .idivq_to_divl,
             .invpcid,
-            .sahf,
             .lzcnt,
+            .macrofusion,
+            .merge_to_threeway_branch,
             .mmx,
             .movbe,
             .mpx,
-            .macrofusion,
-            .merge_to_threeway_branch,
             .nopl,
             .pclmul,
             .pku,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
             .rdseed,
-            .sse4_2,
+            .sahf,
             .slow_3ops_lea,
-            .idivq_to_divl,
-            .avx512vl,
+            .sse4_2,
             .x87,
             .xsave,
             .xsavec,
@@ -3055,53 +2803,48 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const slm = Cpu{
         .name = "slm",
         .llvm_name = "slm",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
+            .false_deps_popcnt,
             .fxsr,
-            .sahf,
+            .idivq_to_divl,
             .mmx,
             .movbe,
             .nopl,
-            .sse,
             .pclmul,
             .popcnt,
-            .false_deps_popcnt,
             .prfchw,
             .rdrnd,
-            .sse4_2,
-            .ssse3,
-            .idivq_to_divl,
+            .sahf,
             .slow_incdec,
             .slow_lea,
             .slow_pmulld,
             .slow_two_mem_ops,
+            .sse4_2,
+            .ssse3,
             .x87,
         }),
     };
-
     pub const tremont = Cpu{
         .name = "tremont",
         .llvm_name = "tremont",
         .features = featureSet(&[_]Feature{
             .@"64bit",
-            .sse,
             .aes,
             .cldemote,
             .clflushopt,
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fsgsbase,
             .fxsr,
             .gfni,
-            .sahf,
             .mmx,
             .movbe,
             .movdir64b,
@@ -3115,13 +2858,14 @@ pub const cpu = struct {
             .rdpid,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sgx,
             .sha,
-            .sse4_2,
-            .ssse3,
             .slow_incdec,
             .slow_lea,
             .slow_two_mem_ops,
+            .sse4_2,
+            .ssse3,
             .waitpkg,
             .x87,
             .xsave,
@@ -3130,28 +2874,25 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const westmere = Cpu{
         .name = "westmere",
         .llvm_name = "westmere",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
-            .cx8,
             .cx16,
+            .cx8,
             .fxsr,
-            .sahf,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
-            .sse,
             .pclmul,
             .popcnt,
+            .sahf,
             .sse4_2,
             .x87,
         }),
     };
-
     pub const winchip_c6 = Cpu{
         .name = "winchip_c6",
         .llvm_name = "winchip-c6",
@@ -3161,18 +2902,15 @@ pub const cpu = struct {
             .x87,
         }),
     };
-
     pub const winchip2 = Cpu{
         .name = "winchip2",
         .llvm_name = "winchip2",
         .features = featureSet(&[_]Feature{
-            .mmx,
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
         }),
     };
-
     pub const x86_64 = Cpu{
         .name = "x86_64",
         .llvm_name = "x86-64",
@@ -3181,17 +2919,15 @@ pub const cpu = struct {
             .cmov,
             .cx8,
             .fxsr,
-            .mmx,
             .macrofusion,
+            .mmx,
             .nopl,
-            .sse,
-            .sse2,
             .slow_3ops_lea,
             .slow_incdec,
+            .sse2,
             .x87,
         }),
     };
-
     pub const yonah = Cpu{
         .name = "yonah",
         .llvm_name = "yonah",
@@ -3201,20 +2937,17 @@ pub const cpu = struct {
             .fxsr,
             .mmx,
             .nopl,
-            .sse,
-            .sse3,
             .slow_unaligned_mem_16,
+            .sse3,
             .x87,
         }),
     };
-
     pub const znver1 = Cpu{
         .name = "znver1",
         .llvm_name = "znver1",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx2,
             .bmi,
@@ -3223,17 +2956,15 @@ pub const cpu = struct {
             .clflushopt,
             .clzero,
             .cmov,
-            .cx8,
             .cx16,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
             .fast_15bytenop,
             .fast_bextr,
             .fast_lzcnt,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .lzcnt,
             .mmx,
             .movbe,
@@ -3244,9 +2975,10 @@ pub const cpu = struct {
             .prfchw,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sha,
-            .sse4a,
             .slow_shld,
+            .sse4a,
             .x87,
             .xsave,
             .xsavec,
@@ -3254,14 +2986,12 @@ pub const cpu = struct {
             .xsaves,
         }),
     };
-
     pub const znver2 = Cpu{
         .name = "znver2",
         .llvm_name = "znver2",
         .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
-            .sse,
             .aes,
             .avx2,
             .bmi,
@@ -3271,17 +3001,15 @@ pub const cpu = struct {
             .clwb,
             .clzero,
             .cmov,
-            .cx8,
             .cx16,
             .f16c,
-            .fma,
-            .fsgsbase,
-            .fxsr,
             .fast_15bytenop,
             .fast_bextr,
             .fast_lzcnt,
             .fast_scalar_shift_masks,
-            .sahf,
+            .fma,
+            .fsgsbase,
+            .fxsr,
             .lzcnt,
             .mmx,
             .movbe,
@@ -3293,9 +3021,10 @@ pub const cpu = struct {
             .rdpid,
             .rdrnd,
             .rdseed,
+            .sahf,
             .sha,
-            .sse4a,
             .slow_shld,
+            .sse4a,
             .wbnoinvd,
             .x87,
             .xsave,
@@ -3306,10 +3035,13 @@ pub const cpu = struct {
     };
 };
 
+/// All x86 CPUs, sorted alphabetically by name.
+/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
+/// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
     &cpu.amdfam10,
     &cpu.athlon,
-    &cpu.athlon4,
+    &cpu.athlon_4,
     &cpu.athlon_fx,
     &cpu.athlon_mp,
     &cpu.athlon_tbird,
@@ -3327,7 +3059,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.btver1,
     &cpu.btver2,
     &cpu.c3,
-    &cpu.c32,
+    &cpu.c3_2,
     &cpu.cannonlake,
     &cpu.cascadelake,
     &cpu.cooperlake,
@@ -3349,8 +3081,8 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.icelake_server,
     &cpu.ivybridge,
     &cpu.k6,
-    &cpu.k62,
-    &cpu.k63,
+    &cpu.k6_2,
+    &cpu.k6_3,
     &cpu.k8,
     &cpu.k8_sse3,
     &cpu.knl,
-- 
2.54.0


From 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 22:49:26 -0500
Subject: [PATCH 070/116] aarch64: remove CPU features that are actually just
 CPUs

---
 lib/std/target/aarch64.zig | 678 +++++++++++++------------------------
 1 file changed, 236 insertions(+), 442 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 4d547b74c11fdb03620454940ab431a4ec369455..df062ffaa2cee1e55676d8b0533f56932bc1ca25 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -2,14 +2,6 @@ const std = @import("../std.zig");
 const Cpu = std.Target.Cpu;
 
 pub const Feature = enum {
-    a35,
-    a53,
-    a55,
-    a57,
-    a72,
-    a73,
-    a75,
-    a76,
     aes,
     aggressive_fma,
     alternate_sextload_cvt_f32_pattern,
@@ -35,16 +27,10 @@ pub const Feature = enum {
     crc,
     crypto,
     custom_cheap_as_move,
-    cyclone,
     disable_latency_sched_heuristic,
     dit,
     dotprod,
     exynos_cheap_as_move,
-    exynosm1,
-    exynosm2,
-    exynosm3,
-    exynosm4,
-    falkor,
     fmi,
     force_32bit_jump_tables,
     fp_armv8,
@@ -58,7 +44,6 @@ pub const Feature = enum {
     fuse_csel,
     fuse_literals,
     jsconv,
-    kryo,
     lor,
     lse,
     lsl_fast,
@@ -103,7 +88,6 @@ pub const Feature = enum {
     reserve_x6,
     reserve_x7,
     reserve_x9,
-    saphira,
     sb,
     sel2,
     sha2,
@@ -122,17 +106,11 @@ pub const Feature = enum {
     sve2_bitperm,
     sve2_sha3,
     sve2_sm4,
-    thunderx,
-    thunderx2t99,
-    thunderxt81,
-    thunderxt83,
-    thunderxt88,
     tlb_rmi,
     tpidr_el1,
     tpidr_el2,
     tpidr_el3,
     tracev8_4,
-    tsv110,
     uaops,
     use_aa,
     use_postra_scheduler,
@@ -156,134 +134,6 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
-    result[@enumToInt(Feature.a35)] = .{
-        .index = @enumToInt(Feature.a35),
-        .name = @tagName(Feature.a35),
-        .llvm_name = "a35",
-        .description = "Cortex-A35 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-        }),
-    };
-    result[@enumToInt(Feature.a53)] = .{
-        .index = @enumToInt(Feature.a53),
-        .name = @tagName(Feature.a53),
-        .llvm_name = "a53",
-        .description = "Cortex-A53 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .balance_fp_ops,
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .use_aa,
-            .use_postra_scheduler,
-        }),
-    };
-    result[@enumToInt(Feature.a55)] = .{
-        .index = @enumToInt(Feature.a55),
-        .name = @tagName(Feature.a55),
-        .llvm_name = "a55",
-        .description = "Cortex-A55 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .rcpc,
-            .v8_2a,
-        }),
-    };
-    result[@enumToInt(Feature.a57)] = .{
-        .index = @enumToInt(Feature.a57),
-        .name = @tagName(Feature.a57),
-        .llvm_name = "a57",
-        .description = "Cortex-A57 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .balance_fp_ops,
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .fuse_aes,
-            .fuse_literals,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-        }),
-    };
-    result[@enumToInt(Feature.a72)] = .{
-        .index = @enumToInt(Feature.a72),
-        .name = @tagName(Feature.a72),
-        .llvm_name = "a72",
-        .description = "Cortex-A72 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-        }),
-    };
-    result[@enumToInt(Feature.a73)] = .{
-        .index = @enumToInt(Feature.a73),
-        .name = @tagName(Feature.a73),
-        .llvm_name = "a73",
-        .description = "Cortex-A73 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-        }),
-    };
-    result[@enumToInt(Feature.a75)] = .{
-        .index = @enumToInt(Feature.a75),
-        .name = @tagName(Feature.a75),
-        .llvm_name = "a75",
-        .description = "Cortex-A75 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .rcpc,
-            .v8_2a,
-        }),
-    };
-    result[@enumToInt(Feature.a76)] = .{
-        .index = @enumToInt(Feature.a76),
-        .name = @tagName(Feature.a76),
-        .llvm_name = "a76",
-        .description = "Cortex-A76 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .neon,
-            .rcpc,
-            .ssbs,
-            .v8_2a,
-        }),
-    };
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
         .name = @tagName(Feature.aes),
@@ -467,27 +317,6 @@ pub const all_features = blk: {
         .description = "Use custom handling of cheap instructions",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.cyclone)] = .{
-        .index = @enumToInt(Feature.cyclone),
-        .name = @tagName(Feature.cyclone),
-        .llvm_name = "cyclone",
-        .description = "Cyclone",
-        .dependencies = featureSet(&[_]Feature{
-            .alternate_sextload_cvt_f32_pattern,
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .fuse_aes,
-            .fuse_crypto_eor,
-            .neon,
-            .perfmon,
-            .zcm,
-            .zcz,
-            .zcz_fp_workaround,
-        }),
-    };
     result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
         .index = @enumToInt(Feature.disable_latency_sched_heuristic),
         .name = @tagName(Feature.disable_latency_sched_heuristic),
@@ -518,109 +347,6 @@ pub const all_features = blk: {
             .custom_cheap_as_move,
         }),
     };
-    result[@enumToInt(Feature.exynosm1)] = .{
-        .index = @enumToInt(Feature.exynosm1),
-        .name = @tagName(Feature.exynosm1),
-        .llvm_name = "exynosm1",
-        .description = "Samsung Exynos-M1 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_aes,
-            .perfmon,
-            .slow_misaligned_128store,
-            .slow_paired_128,
-            .use_postra_scheduler,
-            .use_reciprocal_square_root,
-            .zcz_fp,
-        }),
-    };
-    result[@enumToInt(Feature.exynosm2)] = .{
-        .index = @enumToInt(Feature.exynosm2),
-        .name = @tagName(Feature.exynosm2),
-        .llvm_name = "exynosm2",
-        .description = "Samsung Exynos-M2 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_aes,
-            .perfmon,
-            .slow_misaligned_128store,
-            .slow_paired_128,
-            .use_postra_scheduler,
-            .zcz_fp,
-        }),
-    };
-    result[@enumToInt(Feature.exynosm3)] = .{
-        .index = @enumToInt(Feature.exynosm3),
-        .name = @tagName(Feature.exynosm3),
-        .llvm_name = "exynosm3",
-        .description = "Samsung Exynos-M3 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_address,
-            .fuse_aes,
-            .fuse_csel,
-            .fuse_literals,
-            .lsl_fast,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .zcz_fp,
-        }),
-    };
-    result[@enumToInt(Feature.exynosm4)] = .{
-        .index = @enumToInt(Feature.exynosm4),
-        .name = @tagName(Feature.exynosm4),
-        .llvm_name = "exynosm4",
-        .description = "Samsung Exynos-M4 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .dotprod,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fullfp16,
-            .fuse_address,
-            .fuse_aes,
-            .fuse_arith_logic,
-            .fuse_csel,
-            .fuse_literals,
-            .lsl_fast,
-            .perfmon,
-            .use_postra_scheduler,
-            .v8_2a,
-            .zcz,
-        }),
-    };
-    result[@enumToInt(Feature.falkor)] = .{
-        .index = @enumToInt(Feature.falkor),
-        .name = @tagName(Feature.falkor),
-        .llvm_name = "falkor",
-        .description = "Qualcomm Falkor processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .rdm,
-            .slow_strqro_store,
-            .use_postra_scheduler,
-            .zcz,
-        }),
-    };
     result[@enumToInt(Feature.fmi)] = .{
         .index = @enumToInt(Feature.fmi),
         .name = @tagName(Feature.fmi),
@@ -718,24 +444,6 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
-    result[@enumToInt(Feature.kryo)] = .{
-        .index = @enumToInt(Feature.kryo),
-        .name = @tagName(Feature.kryo),
-        .llvm_name = "kryo",
-        .description = "Qualcomm Kryo processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .zcz,
-        }),
-    };
     result[@enumToInt(Feature.lor)] = .{
         .index = @enumToInt(Feature.lor),
         .name = @tagName(Feature.lor),
@@ -1052,25 +760,6 @@ pub const all_features = blk: {
         .description = "Reserve X9, making it unavailable as a GPR",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.saphira)] = .{
-        .index = @enumToInt(Feature.saphira),
-        .name = @tagName(Feature.saphira),
-        .llvm_name = "saphira",
-        .description = "Qualcomm Saphira processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .spe,
-            .use_postra_scheduler,
-            .v8_4a,
-            .zcz,
-        }),
-    };
     result[@enumToInt(Feature.sb)] = .{
         .index = @enumToInt(Feature.sb),
         .name = @tagName(Feature.sb),
@@ -1217,84 +906,6 @@ pub const all_features = blk: {
             .sve2,
         }),
     };
-    result[@enumToInt(Feature.thunderx)] = .{
-        .index = @enumToInt(Feature.thunderx),
-        .name = @tagName(Feature.thunderx),
-        .llvm_name = "thunderx",
-        .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-        }),
-    };
-    result[@enumToInt(Feature.thunderx2t99)] = .{
-        .index = @enumToInt(Feature.thunderx2t99),
-        .name = @tagName(Feature.thunderx2t99),
-        .llvm_name = "thunderx2t99",
-        .description = "Cavium ThunderX2 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .aggressive_fma,
-            .arith_bcc_fusion,
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .lse,
-            .neon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .v8_1a,
-        }),
-    };
-    result[@enumToInt(Feature.thunderxt81)] = .{
-        .index = @enumToInt(Feature.thunderxt81),
-        .name = @tagName(Feature.thunderxt81),
-        .llvm_name = "thunderxt81",
-        .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-        }),
-    };
-    result[@enumToInt(Feature.thunderxt83)] = .{
-        .index = @enumToInt(Feature.thunderxt83),
-        .name = @tagName(Feature.thunderxt83),
-        .llvm_name = "thunderxt83",
-        .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-        }),
-    };
-    result[@enumToInt(Feature.thunderxt88)] = .{
-        .index = @enumToInt(Feature.thunderxt88),
-        .name = @tagName(Feature.thunderxt88),
-        .llvm_name = "thunderxt88",
-        .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-        }),
-    };
     result[@enumToInt(Feature.tlb_rmi)] = .{
         .index = @enumToInt(Feature.tlb_rmi),
         .name = @tagName(Feature.tlb_rmi),
@@ -1330,26 +941,6 @@ pub const all_features = blk: {
         .description = "Enable v8.4-A Trace extension",
         .dependencies = 0,
     };
-    result[@enumToInt(Feature.tsv110)] = .{
-        .index = @enumToInt(Feature.tsv110),
-        .name = @tagName(Feature.tsv110),
-        .llvm_name = "tsv110",
-        .description = "HiSilicon TS-V110 processors",
-        .dependencies = featureSet(&[_]Feature{
-            .crypto,
-            .custom_cheap_as_move,
-            .dotprod,
-            .fp_armv8,
-            .fp16fml,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .spe,
-            .use_postra_scheduler,
-            .v8_2a,
-        }),
-    };
     result[@enumToInt(Feature.uaops)] = .{
         .index = @enumToInt(Feature.uaops),
         .name = @tagName(Feature.uaops),
@@ -1505,123 +1096,265 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
-    pub const apple_latest = Cpu{
-        .name = "apple_latest",
-        .llvm_name = "apple-latest",
-        .features = featureSet(&[_]Feature{
-            .cyclone,
-        }),
-    };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
         .features = featureSet(&[_]Feature{
-            .a35,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
         }),
     };
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
         .features = featureSet(&[_]Feature{
-            .a53,
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .use_aa,
+            .use_postra_scheduler,
         }),
     };
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
         .features = featureSet(&[_]Feature{
-            .a55,
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
         }),
     };
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
         .features = featureSet(&[_]Feature{
-            .a57,
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_literals,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
         }),
     };
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
         .features = featureSet(&[_]Feature{
-            .a72,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
         }),
     };
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
         .features = featureSet(&[_]Feature{
-            .a73,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
         }),
     };
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
         .features = featureSet(&[_]Feature{
-            .a75,
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
         }),
     };
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
         .features = featureSet(&[_]Feature{
-            .a76,
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .neon,
+            .rcpc,
+            .ssbs,
+            .v8_2a,
         }),
     };
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
         .features = featureSet(&[_]Feature{
-            .a76,
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .neon,
+            .rcpc,
+            .ssbs,
+            .v8_2a,
         }),
     };
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
         .features = featureSet(&[_]Feature{
-            .cyclone,
+            .alternate_sextload_cvt_f32_pattern,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_crypto_eor,
+            .neon,
+            .perfmon,
+            .zcm,
+            .zcz,
+            .zcz_fp_workaround,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
         .features = featureSet(&[_]Feature{
-            .exynosm1,
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .use_reciprocal_square_root,
+            .zcz_fp,
         }),
     };
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
         .features = featureSet(&[_]Feature{
-            .exynosm2,
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .zcz_fp,
         }),
     };
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
         .features = featureSet(&[_]Feature{
-            .exynosm3,
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz_fp,
         }),
     };
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
         .features = featureSet(&[_]Feature{
-            .exynosm4,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .dotprod,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fullfp16,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_arith_logic,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .use_postra_scheduler,
+            .v8_2a,
+            .zcz,
         }),
     };
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
         .features = featureSet(&[_]Feature{
-            .exynosm4,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .dotprod,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fullfp16,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_arith_logic,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .use_postra_scheduler,
+            .v8_2a,
+            .zcz,
         }),
     };
     pub const falkor = Cpu{
         .name = "falkor",
         .llvm_name = "falkor",
         .features = featureSet(&[_]Feature{
-            .falkor,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .rdm,
+            .slow_strqro_store,
+            .use_postra_scheduler,
+            .zcz,
         }),
     };
     pub const generic = Cpu{
@@ -1639,56 +1372,119 @@ pub const cpu = struct {
         .name = "kryo",
         .llvm_name = "kryo",
         .features = featureSet(&[_]Feature{
-            .kryo,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz,
         }),
     };
     pub const saphira = Cpu{
         .name = "saphira",
         .llvm_name = "saphira",
         .features = featureSet(&[_]Feature{
-            .saphira,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .spe,
+            .use_postra_scheduler,
+            .v8_4a,
+            .zcz,
         }),
     };
     pub const thunderx = Cpu{
         .name = "thunderx",
         .llvm_name = "thunderx",
         .features = featureSet(&[_]Feature{
-            .thunderx,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
         }),
     };
     pub const thunderx2t99 = Cpu{
         .name = "thunderx2t99",
         .llvm_name = "thunderx2t99",
         .features = featureSet(&[_]Feature{
-            .thunderx2t99,
+            .aggressive_fma,
+            .arith_bcc_fusion,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .lse,
+            .neon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .v8_1a,
         }),
     };
     pub const thunderxt81 = Cpu{
         .name = "thunderxt81",
         .llvm_name = "thunderxt81",
         .features = featureSet(&[_]Feature{
-            .thunderxt81,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
         }),
     };
     pub const thunderxt83 = Cpu{
         .name = "thunderxt83",
         .llvm_name = "thunderxt83",
         .features = featureSet(&[_]Feature{
-            .thunderxt83,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
         }),
     };
     pub const thunderxt88 = Cpu{
         .name = "thunderxt88",
         .llvm_name = "thunderxt88",
         .features = featureSet(&[_]Feature{
-            .thunderxt88,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
         }),
     };
     pub const tsv110 = Cpu{
         .name = "tsv110",
         .llvm_name = "tsv110",
         .features = featureSet(&[_]Feature{
-            .tsv110,
+            .crypto,
+            .custom_cheap_as_move,
+            .dotprod,
+            .fp_armv8,
+            .fp16fml,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .spe,
+            .use_postra_scheduler,
+            .v8_2a,
         }),
     };
 };
@@ -1697,7 +1493,6 @@ pub const cpu = struct {
 /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
 /// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
-    &cpu.apple_latest,
     &cpu.cortex_a35,
     &cpu.cortex_a53,
     &cpu.cortex_a55,
@@ -1718,7 +1513,6 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.kryo,
     &cpu.saphira,
     &cpu.thunderx,
-    &cpu.thunderx2t99,
     &cpu.thunderxt81,
     &cpu.thunderxt83,
     &cpu.thunderxt88,
-- 
2.54.0


From 89e107ee4ecdc888007958bd353e293856f0766f Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 23:14:35 -0500
Subject: [PATCH 071/116] uncomment all the archs in target.zig

---
 BRANCH_TODO              | 31 ----------------
 lib/std/target.zig       | 79 ++++++++++++++++++++--------------------
 lib/std/target/riscv.zig | 19 ++++++++++
 3 files changed, 59 insertions(+), 70 deletions(-)

diff --git a/BRANCH_TODO b/BRANCH_TODO
index 2e92089e3a5df81634e89eef7b9a45175421d923..5b5cf506f4e0809be5568c7e646e7c73b7fa77aa 100644
--- a/BRANCH_TODO
+++ b/BRANCH_TODO
@@ -2,35 +2,4 @@ Finish these thigns before merging teh branch
 
  * zig targets
    - use non-reflection based cpu detection?
- * finish refactoring target/arch/*
 
-
-const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
-    &std.target.riscv.feature_a,
-    &std.target.riscv.feature_c,
-    &std.target.riscv.feature_d,
-    &std.target.riscv.feature_f,
-    &std.target.riscv.feature_m,
-    &std.target.riscv.feature_relax,
-};
-
-const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature{
-    &std.target.riscv.feature_bit64,
-    &std.target.riscv.feature_a,
-    &std.target.riscv.feature_c,
-    &std.target.riscv.feature_d,
-    &std.target.riscv.feature_f,
-    &std.target.riscv.feature_m,
-    &std.target.riscv.feature_relax,
-};
-
-// Same as above but without sse.
-const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature{
-    &std.target.x86.feature_cmov,
-    &std.target.x86.feature_cx8,
-    &std.target.x86.feature_fxsr,
-    &std.target.x86.feature_mmx,
-    &std.target.x86.feature_nopl,
-    &std.target.x86.feature_slowUnalignedMem16,
-    &std.target.x86.feature_x87,
-};
diff --git a/lib/std/target.zig b/lib/std/target.zig
index d49d395dda5186cd9f33264a96cd18182f603154..9b83384723e6b0be404d4e405cf65028a8fd81e8 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -413,21 +413,21 @@ pub const Target = union(enum) {
         /// All CPU features Zig is aware of, sorted lexicographically by name.
         pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
             return switch (arch) {
-                // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_features,
+                .arm, .armeb, .thumb, .thumbeb => arm.all_features,
                 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
-                // TODO .avr => avr.all_features,
-                // TODO .bpfel, .bpfeb => bpf.all_features,
-                // TODO .hexagon => hexagon.all_features,
-                // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_features,
-                // TODO .msp430 => msp430.all_features,
-                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
-                // TODO .amdgcn => amdgpu.all_features,
-                // TODO .riscv32, .riscv64 => riscv.all_features,
-                // TODO .sparc, .sparcv9, .sparcel => sparc.all_features,
-                // TODO .s390x => systemz.all_features,
+                .avr => avr.all_features,
+                .bpfel, .bpfeb => bpf.all_features,
+                .hexagon => hexagon.all_features,
+                .mips, .mipsel, .mips64, .mips64el => mips.all_features,
+                .msp430 => msp430.all_features,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
+                .amdgcn => amdgpu.all_features,
+                .riscv32, .riscv64 => riscv.all_features,
+                .sparc, .sparcv9, .sparcel => sparc.all_features,
+                .s390x => systemz.all_features,
                 .i386, .x86_64 => &x86.all_features,
-                // TODO .nvptx, .nvptx64 => nvptx.all_features,
-                // TODO .wasm32, .wasm64 => wasm.all_features,
+                .nvptx, .nvptx64 => nvptx.all_features,
+                .wasm32, .wasm64 => wasm.all_features,
 
                 else => &[0]Cpu.Feature{},
             };
@@ -437,22 +437,23 @@ pub const Target = union(enum) {
         /// of features that is expected to be supported on most available hardware.
         pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {
             return switch (arch) {
-                // TODO .arm, .armeb, .thumb, .thumbeb => arm.baseline_features,
+                .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features,
                 .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
-                // TODO .avr => avr.baseline_features,
-                // TODO .bpfel, .bpfeb => bpf.baseline_features,
-                // TODO .hexagon => hexagon.baseline_features,
-                // TODO .mips, .mipsel, .mips64, .mips64el => mips.baseline_features,
-                // TODO .msp430 => msp430.baseline_features,
-                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.baseline_features,
-                // TODO .amdgcn => amdgpu.baseline_features,
-                // TODO .riscv32, .riscv64 => riscv.baseline_features,
-                // TODO .sparc, .sparcv9, .sparcel => sparc.baseline_features,
-                // TODO .s390x => systemz.baseline_features,
+                .avr => avr.cpu.generic.features,
+                .bpfel, .bpfeb => bpf.cpu.generic.features,
+                .hexagon => hexagon.cpu.generic.features,
+                .mips, .mipsel, .mips64, .mips64el => mips.cpu.generic.features,
+                .msp430 => msp430.cpu.generic.features,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features,
+                .amdgcn => amdgpu.cpu.generic.features,
+                .riscv32 => riscv.baseline_32_features,
+                .riscv64 => riscv.baseline_64_features,
+                .sparc, .sparcv9, .sparcel => sparc.cpu.generic.features,
+                .s390x => systemz.cpu.generic.features,
                 .i386 => x86.cpu.pentium4.features,
                 .x86_64 => x86.cpu.x86_64.features,
-                // TODO .nvptx, .nvptx64 => nvptx.baseline_features,
-                // TODO .wasm32, .wasm64 => wasm.baseline_features,
+                .nvptx, .nvptx64 => nvptx.cpu.generic.features,
+                .wasm32, .wasm64 => wasm.cpu.generic.features,
 
                 else => 0,
             };
@@ -461,21 +462,21 @@ pub const Target = union(enum) {
         /// All CPUs Zig is aware of, sorted lexicographically by name.
         pub fn allCpus(arch: Arch) []const *const Cpu {
             return switch (arch) {
-                // TODO .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
+                .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
                 .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
-                // TODO .avr => avr.all_cpus,
-                // TODO .bpfel, .bpfeb => bpf.all_cpus,
-                // TODO .hexagon => hexagon.all_cpus,
-                // TODO .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
-                // TODO .msp430 => msp430.all_cpus,
-                // TODO .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
-                // TODO .amdgcn => amdgpu.all_cpus,
-                // TODO .riscv32, .riscv64 => riscv.all_cpus,
-                // TODO .sparc, .sparcv9, .sparcel => sparc.all_cpus,
-                // TODO .s390x => systemz.all_cpus,
+                .avr => avr.all_cpus,
+                .bpfel, .bpfeb => bpf.all_cpus,
+                .hexagon => hexagon.all_cpus,
+                .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
+                .msp430 => msp430.all_cpus,
+                .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
+                .amdgcn => amdgpu.all_cpus,
+                .riscv32, .riscv64 => riscv.all_cpus,
+                .sparc, .sparcv9, .sparcel => sparc.all_cpus,
+                .s390x => systemz.all_cpus,
                 .i386, .x86_64 => x86.all_cpus,
-                // TODO .nvptx, .nvptx64 => nvptx.all_cpus,
-                // TODO .wasm32, .wasm64 => wasm.all_cpus,
+                .nvptx, .nvptx64 => nvptx.all_cpus,
+                .wasm32, .wasm64 => wasm.all_cpus,
 
                 else => &[0]*const Cpu{},
             };
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index 7181028cc27f80f6fa22e020abf74a7a284e34eb..dbe36e0fa1d53a060e7195b5fd1eb4d138c428e9 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -101,3 +101,22 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.generic_rv32,
     &cpu.generic_rv64,
 };
+
+pub const baseline_32_features = featureSet(&[_]Feature{
+    .a,
+    .c,
+    .d,
+    .f,
+    .m,
+    .relax,
+});
+
+pub const baseline_64_features = featureSet(&[_]Feature{
+    .@"64bit",
+    .a,
+    .c,
+    .d,
+    .f,
+    .m,
+    .relax,
+});
-- 
2.54.0


From 6118b11afa1bbceab6ab4681f1f79e68aa131b65 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Mon, 20 Jan 2020 23:15:07 -0500
Subject: [PATCH 072/116] Revert "aarch64: remove CPU features that are
 actually just CPUs"

This reverts commit 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9.

This strategy won't work for arm 32-bit; instead need to try to figure
out how to get more bits into the bit set.
---
 lib/std/target/aarch64.zig | 678 ++++++++++++++++++++++++-------------
 1 file changed, 442 insertions(+), 236 deletions(-)

diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index df062ffaa2cee1e55676d8b0533f56932bc1ca25..4d547b74c11fdb03620454940ab431a4ec369455 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -2,6 +2,14 @@ const std = @import("../std.zig");
 const Cpu = std.Target.Cpu;
 
 pub const Feature = enum {
+    a35,
+    a53,
+    a55,
+    a57,
+    a72,
+    a73,
+    a75,
+    a76,
     aes,
     aggressive_fma,
     alternate_sextload_cvt_f32_pattern,
@@ -27,10 +35,16 @@ pub const Feature = enum {
     crc,
     crypto,
     custom_cheap_as_move,
+    cyclone,
     disable_latency_sched_heuristic,
     dit,
     dotprod,
     exynos_cheap_as_move,
+    exynosm1,
+    exynosm2,
+    exynosm3,
+    exynosm4,
+    falkor,
     fmi,
     force_32bit_jump_tables,
     fp_armv8,
@@ -44,6 +58,7 @@ pub const Feature = enum {
     fuse_csel,
     fuse_literals,
     jsconv,
+    kryo,
     lor,
     lse,
     lsl_fast,
@@ -88,6 +103,7 @@ pub const Feature = enum {
     reserve_x6,
     reserve_x7,
     reserve_x9,
+    saphira,
     sb,
     sel2,
     sha2,
@@ -106,11 +122,17 @@ pub const Feature = enum {
     sve2_bitperm,
     sve2_sha3,
     sve2_sm4,
+    thunderx,
+    thunderx2t99,
+    thunderxt81,
+    thunderxt83,
+    thunderxt88,
     tlb_rmi,
     tpidr_el1,
     tpidr_el2,
     tpidr_el3,
     tracev8_4,
+    tsv110,
     uaops,
     use_aa,
     use_postra_scheduler,
@@ -134,6 +156,134 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
     var result: [len]Cpu.Feature = undefined;
+    result[@enumToInt(Feature.a35)] = .{
+        .index = @enumToInt(Feature.a35),
+        .name = @tagName(Feature.a35),
+        .llvm_name = "a35",
+        .description = "Cortex-A35 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a53)] = .{
+        .index = @enumToInt(Feature.a53),
+        .name = @tagName(Feature.a53),
+        .llvm_name = "a53",
+        .description = "Cortex-A53 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .use_aa,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.a55)] = .{
+        .index = @enumToInt(Feature.a55),
+        .name = @tagName(Feature.a55),
+        .llvm_name = "a55",
+        .description = "Cortex-A55 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.a57)] = .{
+        .index = @enumToInt(Feature.a57),
+        .name = @tagName(Feature.a57),
+        .llvm_name = "a57",
+        .description = "Cortex-A57 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .balance_fp_ops,
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_literals,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.a72)] = .{
+        .index = @enumToInt(Feature.a72),
+        .name = @tagName(Feature.a72),
+        .llvm_name = "a72",
+        .description = "Cortex-A72 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a73)] = .{
+        .index = @enumToInt(Feature.a73),
+        .name = @tagName(Feature.a73),
+        .llvm_name = "a73",
+        .description = "Cortex-A73 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+        }),
+    };
+    result[@enumToInt(Feature.a75)] = .{
+        .index = @enumToInt(Feature.a75),
+        .name = @tagName(Feature.a75),
+        .llvm_name = "a75",
+        .description = "Cortex-A75 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .rcpc,
+            .v8_2a,
+        }),
+    };
+    result[@enumToInt(Feature.a76)] = .{
+        .index = @enumToInt(Feature.a76),
+        .name = @tagName(Feature.a76),
+        .llvm_name = "a76",
+        .description = "Cortex-A76 ARM processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .dotprod,
+            .fp_armv8,
+            .fullfp16,
+            .neon,
+            .rcpc,
+            .ssbs,
+            .v8_2a,
+        }),
+    };
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
         .name = @tagName(Feature.aes),
@@ -317,6 +467,27 @@ pub const all_features = blk: {
         .description = "Use custom handling of cheap instructions",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.cyclone)] = .{
+        .index = @enumToInt(Feature.cyclone),
+        .name = @tagName(Feature.cyclone),
+        .llvm_name = "cyclone",
+        .description = "Cyclone",
+        .dependencies = featureSet(&[_]Feature{
+            .alternate_sextload_cvt_f32_pattern,
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .disable_latency_sched_heuristic,
+            .fp_armv8,
+            .fuse_aes,
+            .fuse_crypto_eor,
+            .neon,
+            .perfmon,
+            .zcm,
+            .zcz,
+            .zcz_fp_workaround,
+        }),
+    };
     result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
         .index = @enumToInt(Feature.disable_latency_sched_heuristic),
         .name = @tagName(Feature.disable_latency_sched_heuristic),
@@ -347,6 +518,109 @@ pub const all_features = blk: {
             .custom_cheap_as_move,
         }),
     };
+    result[@enumToInt(Feature.exynosm1)] = .{
+        .index = @enumToInt(Feature.exynosm1),
+        .name = @tagName(Feature.exynosm1),
+        .llvm_name = "exynosm1",
+        .description = "Samsung Exynos-M1 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .use_reciprocal_square_root,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm2)] = .{
+        .index = @enumToInt(Feature.exynosm2),
+        .name = @tagName(Feature.exynosm2),
+        .llvm_name = "exynosm2",
+        .description = "Samsung Exynos-M2 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_aes,
+            .perfmon,
+            .slow_misaligned_128store,
+            .slow_paired_128,
+            .use_postra_scheduler,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm3)] = .{
+        .index = @enumToInt(Feature.exynosm3),
+        .name = @tagName(Feature.exynosm3),
+        .llvm_name = "exynosm3",
+        .description = "Samsung Exynos-M3 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz_fp,
+        }),
+    };
+    result[@enumToInt(Feature.exynosm4)] = .{
+        .index = @enumToInt(Feature.exynosm4),
+        .name = @tagName(Feature.exynosm4),
+        .llvm_name = "exynosm4",
+        .description = "Samsung Exynos-M4 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .arith_bcc_fusion,
+            .arith_cbz_fusion,
+            .crypto,
+            .dotprod,
+            .exynos_cheap_as_move,
+            .force_32bit_jump_tables,
+            .fullfp16,
+            .fuse_address,
+            .fuse_aes,
+            .fuse_arith_logic,
+            .fuse_csel,
+            .fuse_literals,
+            .lsl_fast,
+            .perfmon,
+            .use_postra_scheduler,
+            .v8_2a,
+            .zcz,
+        }),
+    };
+    result[@enumToInt(Feature.falkor)] = .{
+        .index = @enumToInt(Feature.falkor),
+        .name = @tagName(Feature.falkor),
+        .llvm_name = "falkor",
+        .description = "Qualcomm Falkor processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .rdm,
+            .slow_strqro_store,
+            .use_postra_scheduler,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.fmi)] = .{
         .index = @enumToInt(Feature.fmi),
         .name = @tagName(Feature.fmi),
@@ -444,6 +718,24 @@ pub const all_features = blk: {
             .fp_armv8,
         }),
     };
+    result[@enumToInt(Feature.kryo)] = .{
+        .index = @enumToInt(Feature.kryo),
+        .name = @tagName(Feature.kryo),
+        .llvm_name = "kryo",
+        .description = "Qualcomm Kryo processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.lor)] = .{
         .index = @enumToInt(Feature.lor),
         .name = @tagName(Feature.lor),
@@ -760,6 +1052,25 @@ pub const all_features = blk: {
         .description = "Reserve X9, making it unavailable as a GPR",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.saphira)] = .{
+        .index = @enumToInt(Feature.saphira),
+        .name = @tagName(Feature.saphira),
+        .llvm_name = "saphira",
+        .description = "Qualcomm Saphira processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .custom_cheap_as_move,
+            .fp_armv8,
+            .lsl_fast,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .spe,
+            .use_postra_scheduler,
+            .v8_4a,
+            .zcz,
+        }),
+    };
     result[@enumToInt(Feature.sb)] = .{
         .index = @enumToInt(Feature.sb),
         .name = @tagName(Feature.sb),
@@ -906,6 +1217,84 @@ pub const all_features = blk: {
             .sve2,
         }),
     };
+    result[@enumToInt(Feature.thunderx)] = .{
+        .index = @enumToInt(Feature.thunderx),
+        .name = @tagName(Feature.thunderx),
+        .llvm_name = "thunderx",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.thunderx2t99)] = .{
+        .index = @enumToInt(Feature.thunderx2t99),
+        .name = @tagName(Feature.thunderx2t99),
+        .llvm_name = "thunderx2t99",
+        .description = "Cavium ThunderX2 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .aggressive_fma,
+            .arith_bcc_fusion,
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .lse,
+            .neon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+            .v8_1a,
+        }),
+    };
+    result[@enumToInt(Feature.thunderxt81)] = .{
+        .index = @enumToInt(Feature.thunderxt81),
+        .name = @tagName(Feature.thunderxt81),
+        .llvm_name = "thunderxt81",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.thunderxt83)] = .{
+        .index = @enumToInt(Feature.thunderxt83),
+        .name = @tagName(Feature.thunderxt83),
+        .llvm_name = "thunderxt83",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
+    result[@enumToInt(Feature.thunderxt88)] = .{
+        .index = @enumToInt(Feature.thunderxt88),
+        .name = @tagName(Feature.thunderxt88),
+        .llvm_name = "thunderxt88",
+        .description = "Cavium ThunderX processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crc,
+            .crypto,
+            .fp_armv8,
+            .neon,
+            .perfmon,
+            .predictable_select_expensive,
+            .use_postra_scheduler,
+        }),
+    };
     result[@enumToInt(Feature.tlb_rmi)] = .{
         .index = @enumToInt(Feature.tlb_rmi),
         .name = @tagName(Feature.tlb_rmi),
@@ -941,6 +1330,26 @@ pub const all_features = blk: {
         .description = "Enable v8.4-A Trace extension",
         .dependencies = 0,
     };
+    result[@enumToInt(Feature.tsv110)] = .{
+        .index = @enumToInt(Feature.tsv110),
+        .name = @tagName(Feature.tsv110),
+        .llvm_name = "tsv110",
+        .description = "HiSilicon TS-V110 processors",
+        .dependencies = featureSet(&[_]Feature{
+            .crypto,
+            .custom_cheap_as_move,
+            .dotprod,
+            .fp_armv8,
+            .fp16fml,
+            .fullfp16,
+            .fuse_aes,
+            .neon,
+            .perfmon,
+            .spe,
+            .use_postra_scheduler,
+            .v8_2a,
+        }),
+    };
     result[@enumToInt(Feature.uaops)] = .{
         .index = @enumToInt(Feature.uaops),
         .name = @tagName(Feature.uaops),
@@ -1096,265 +1505,123 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
+    pub const apple_latest = Cpu{
+        .name = "apple_latest",
+        .llvm_name = "apple-latest",
+        .features = featureSet(&[_]Feature{
+            .cyclone,
+        }),
+    };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
+            .a35,
         }),
     };
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
         .features = featureSet(&[_]Feature{
-            .balance_fp_ops,
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .use_aa,
-            .use_postra_scheduler,
+            .a53,
         }),
     };
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .rcpc,
-            .v8_2a,
+            .a55,
         }),
     };
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
         .features = featureSet(&[_]Feature{
-            .balance_fp_ops,
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .fuse_aes,
-            .fuse_literals,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
+            .a57,
         }),
     };
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
+            .a72,
         }),
     };
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .fuse_aes,
-            .neon,
-            .perfmon,
+            .a73,
         }),
     };
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .rcpc,
-            .v8_2a,
+            .a75,
         }),
     };
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .neon,
-            .rcpc,
-            .ssbs,
-            .v8_2a,
+            .a76,
         }),
     };
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .dotprod,
-            .fp_armv8,
-            .fullfp16,
-            .neon,
-            .rcpc,
-            .ssbs,
-            .v8_2a,
+            .a76,
         }),
     };
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
         .features = featureSet(&[_]Feature{
-            .alternate_sextload_cvt_f32_pattern,
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .disable_latency_sched_heuristic,
-            .fp_armv8,
-            .fuse_aes,
-            .fuse_crypto_eor,
-            .neon,
-            .perfmon,
-            .zcm,
-            .zcz,
-            .zcz_fp_workaround,
+            .cyclone,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_aes,
-            .perfmon,
-            .slow_misaligned_128store,
-            .slow_paired_128,
-            .use_postra_scheduler,
-            .use_reciprocal_square_root,
-            .zcz_fp,
+            .exynosm1,
         }),
     };
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_aes,
-            .perfmon,
-            .slow_misaligned_128store,
-            .slow_paired_128,
-            .use_postra_scheduler,
-            .zcz_fp,
+            .exynosm2,
         }),
     };
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fuse_address,
-            .fuse_aes,
-            .fuse_csel,
-            .fuse_literals,
-            .lsl_fast,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .zcz_fp,
+            .exynosm3,
         }),
     };
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
         .features = featureSet(&[_]Feature{
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .dotprod,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fullfp16,
-            .fuse_address,
-            .fuse_aes,
-            .fuse_arith_logic,
-            .fuse_csel,
-            .fuse_literals,
-            .lsl_fast,
-            .perfmon,
-            .use_postra_scheduler,
-            .v8_2a,
-            .zcz,
+            .exynosm4,
         }),
     };
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
         .features = featureSet(&[_]Feature{
-            .arith_bcc_fusion,
-            .arith_cbz_fusion,
-            .crypto,
-            .dotprod,
-            .exynos_cheap_as_move,
-            .force_32bit_jump_tables,
-            .fullfp16,
-            .fuse_address,
-            .fuse_aes,
-            .fuse_arith_logic,
-            .fuse_csel,
-            .fuse_literals,
-            .lsl_fast,
-            .perfmon,
-            .use_postra_scheduler,
-            .v8_2a,
-            .zcz,
+            .exynosm4,
         }),
     };
     pub const falkor = Cpu{
         .name = "falkor",
         .llvm_name = "falkor",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .rdm,
-            .slow_strqro_store,
-            .use_postra_scheduler,
-            .zcz,
+            .falkor,
         }),
     };
     pub const generic = Cpu{
@@ -1372,119 +1639,56 @@ pub const cpu = struct {
         .name = "kryo",
         .llvm_name = "kryo",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .zcz,
+            .kryo,
         }),
     };
     pub const saphira = Cpu{
         .name = "saphira",
         .llvm_name = "saphira",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .custom_cheap_as_move,
-            .fp_armv8,
-            .lsl_fast,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .spe,
-            .use_postra_scheduler,
-            .v8_4a,
-            .zcz,
+            .saphira,
         }),
     };
     pub const thunderx = Cpu{
         .name = "thunderx",
         .llvm_name = "thunderx",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
+            .thunderx,
         }),
     };
     pub const thunderx2t99 = Cpu{
         .name = "thunderx2t99",
         .llvm_name = "thunderx2t99",
         .features = featureSet(&[_]Feature{
-            .aggressive_fma,
-            .arith_bcc_fusion,
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .lse,
-            .neon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
-            .v8_1a,
+            .thunderx2t99,
         }),
     };
     pub const thunderxt81 = Cpu{
         .name = "thunderxt81",
         .llvm_name = "thunderxt81",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
+            .thunderxt81,
         }),
     };
     pub const thunderxt83 = Cpu{
         .name = "thunderxt83",
         .llvm_name = "thunderxt83",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
+            .thunderxt83,
         }),
     };
     pub const thunderxt88 = Cpu{
         .name = "thunderxt88",
         .llvm_name = "thunderxt88",
         .features = featureSet(&[_]Feature{
-            .crc,
-            .crypto,
-            .fp_armv8,
-            .neon,
-            .perfmon,
-            .predictable_select_expensive,
-            .use_postra_scheduler,
+            .thunderxt88,
         }),
     };
     pub const tsv110 = Cpu{
         .name = "tsv110",
         .llvm_name = "tsv110",
         .features = featureSet(&[_]Feature{
-            .crypto,
-            .custom_cheap_as_move,
-            .dotprod,
-            .fp_armv8,
-            .fp16fml,
-            .fullfp16,
-            .fuse_aes,
-            .neon,
-            .perfmon,
-            .spe,
-            .use_postra_scheduler,
-            .v8_2a,
+            .tsv110,
         }),
     };
 };
@@ -1493,6 +1697,7 @@ pub const cpu = struct {
 /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
 /// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
+    &cpu.apple_latest,
     &cpu.cortex_a35,
     &cpu.cortex_a53,
     &cpu.cortex_a55,
@@ -1513,6 +1718,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.kryo,
     &cpu.saphira,
     &cpu.thunderx,
+    &cpu.thunderx2t99,
     &cpu.thunderxt81,
     &cpu.thunderxt83,
     &cpu.thunderxt88,
-- 
2.54.0


From e640d015351c3d3bf7c41020ff2a87f38f853140 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 00:34:54 -0500
Subject: [PATCH 073/116] fixups to arch data, support any number of cpu
 features

---
 lib/std/build.zig          |   2 +-
 lib/std/target.zig         |  91 +++++++++++------
 lib/std/target/aarch64.zig | 200 ++++++++++++++++++-------------------
 lib/std/target/amdgpu.zig  | 200 ++++++++++++++++++-------------------
 lib/std/target/arm.zig     | 196 ++++++++++++++++++------------------
 lib/std/target/avr.zig     |  64 ++++++------
 lib/std/target/bpf.zig     |  18 ++--
 lib/std/target/hexagon.zig |  34 +++----
 lib/std/target/mips.zig    |  64 ++++++------
 lib/std/target/msp430.zig  |  14 +--
 lib/std/target/nvptx.zig   |  52 +++++-----
 lib/std/target/powerpc.zig |  88 ++++++++--------
 lib/std/target/riscv.zig   |  18 ++--
 lib/std/target/sparc.zig   |  58 +++++------
 lib/std/target/systemz.zig |  78 +++++++--------
 lib/std/target/wasm.zig    |  24 ++---
 lib/std/target/x86.zig     | 174 ++++++++++++++++----------------
 src-self-hosted/stage1.zig |  77 ++++++++++----
 src/error.cpp              |   1 +
 src/main.cpp               |  13 +--
 src/userland.cpp           |   6 +-
 src/userland.h             |   7 +-
 22 files changed, 777 insertions(+), 702 deletions(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index 1eabfb1559aaf9b6e63b9d0014328313d2e9d413..32a9e549ded7e82a8afad46874c0228321e2eb7b 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1983,7 +1983,7 @@ pub const LibExeObjStep = struct {
 
                         var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
                         for (self.target.getArch().allFeaturesList()) |feature, i| {
-                            if (Target.Cpu.Feature.isEnabled(features, @intCast(u7, i))) {
+                            if (features.isEnabled(@intCast(u8, i))) {
                                 try feature_str_buffer.append(feature.name);
                                 try feature_str_buffer.append(",");
                             }
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 9b83384723e6b0be404d4e405cf65028a8fd81e8..716be8905c86b4be9e1551ad3db847cc11042a9d 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -219,7 +219,8 @@ pub const Target = union(enum) {
         pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set {
             // Here we compute both and choose the correct result at the end, based
             // on whether or not we saw + and - signs.
-            var set: @Vector(2, Cpu.Feature.Set) = [2]Cpu.Feature.Set{ 0, arch.baselineFeatures() };
+            var whitelist_set = Cpu.Feature.Set.empty();
+            var baseline_set = arch.baselineFeatures();
             var mode: enum {
                 unknown,
                 baseline,
@@ -257,10 +258,15 @@ pub const Target = union(enum) {
                 }
                 for (arch.allFeaturesList()) |feature, index| {
                     if (mem.eql(u8, feature_name, feature.name)) {
-                        const one_bit = @as(Cpu.Feature.Set, 1) << @intCast(u7, index);
                         switch (op) {
-                            .add => set |= @splat(2, one_bit),
-                            .sub => set &= @splat(2, ~one_bit),
+                            .add => {
+                                baseline_set.addFeature(@intCast(u8, index));
+                                whitelist_set.addFeature(@intCast(u8, index));
+                            },
+                            .sub => {
+                                baseline_set.removeFeature(@intCast(u8, index));
+                                whitelist_set.removeFeature(@intCast(u8, index));
+                            },
                         }
                         break;
                     }
@@ -270,8 +276,8 @@ pub const Target = union(enum) {
             }
 
             return switch (mode) {
-                .unknown, .whitelist => set[0],
-                .baseline => set[1],
+                .unknown, .whitelist => whitelist_set,
+                .baseline => baseline_set,
             };
         }
 
@@ -413,21 +419,21 @@ pub const Target = union(enum) {
         /// All CPU features Zig is aware of, sorted lexicographically by name.
         pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
             return switch (arch) {
-                .arm, .armeb, .thumb, .thumbeb => arm.all_features,
+                .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
                 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
-                .avr => avr.all_features,
-                .bpfel, .bpfeb => bpf.all_features,
-                .hexagon => hexagon.all_features,
-                .mips, .mipsel, .mips64, .mips64el => mips.all_features,
-                .msp430 => msp430.all_features,
-                .powerpc, .powerpc64, .powerpc64le => powerpc.all_features,
-                .amdgcn => amdgpu.all_features,
-                .riscv32, .riscv64 => riscv.all_features,
-                .sparc, .sparcv9, .sparcel => sparc.all_features,
-                .s390x => systemz.all_features,
+                .avr => &avr.all_features,
+                .bpfel, .bpfeb => &bpf.all_features,
+                .hexagon => &hexagon.all_features,
+                .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
+                .msp430 => &msp430.all_features,
+                .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
+                .amdgcn => &amdgpu.all_features,
+                .riscv32, .riscv64 => &riscv.all_features,
+                .sparc, .sparcv9, .sparcel => &sparc.all_features,
+                .s390x => &systemz.all_features,
                 .i386, .x86_64 => &x86.all_features,
-                .nvptx, .nvptx64 => nvptx.all_features,
-                .wasm32, .wasm64 => wasm.all_features,
+                .nvptx, .nvptx64 => &nvptx.all_features,
+                .wasm32, .wasm64 => &wasm.all_features,
 
                 else => &[0]Cpu.Feature{},
             };
@@ -439,10 +445,11 @@ pub const Target = union(enum) {
             return switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features,
                 .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
-                .avr => avr.cpu.generic.features,
+                .avr => avr.baseline_features,
                 .bpfel, .bpfeb => bpf.cpu.generic.features,
                 .hexagon => hexagon.cpu.generic.features,
-                .mips, .mipsel, .mips64, .mips64el => mips.cpu.generic.features,
+                .mips, .mipsel => mips.cpu.mips32.features,
+                .mips64, .mips64el => mips.cpu.mips64.features,
                 .msp430 => msp430.cpu.generic.features,
                 .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features,
                 .amdgcn => amdgpu.cpu.generic.features,
@@ -452,10 +459,10 @@ pub const Target = union(enum) {
                 .s390x => systemz.cpu.generic.features,
                 .i386 => x86.cpu.pentium4.features,
                 .x86_64 => x86.cpu.x86_64.features,
-                .nvptx, .nvptx64 => nvptx.cpu.generic.features,
+                .nvptx, .nvptx64 => nvptx.cpu.sm_20.features,
                 .wasm32, .wasm64 => wasm.cpu.generic.features,
 
-                else => 0,
+                else => Cpu.Feature.Set.empty(),
             };
         }
 
@@ -522,24 +529,46 @@ pub const Target = union(enum) {
             dependencies: Set,
 
             /// A bit set of all the features.
-            pub const Set = u128;
+            pub const Set = struct {
+                bytes: [bit_count / 8]u8,
 
-            pub fn isEnabled(set: Set, arch_feature_index: u7) bool {
-                return (set & (@as(Set, 1) << arch_feature_index)) != 0;
-            }
+                pub const bit_count = 22 * 8;
+
+                pub fn empty() Set {
+                    return .{ .bytes = [1]u8{0} ** 22 };
+                }
+
+                pub fn isEnabled(set: Set, arch_feature_index: u8) bool {
+                    const byte_index = arch_feature_index / 8;
+                    const bit_index = @intCast(u3, arch_feature_index % 8);
+                    return (set.bytes[byte_index] & (@as(u8, 1) << bit_index)) != 0;
+                }
+
+                pub fn addFeature(set: *Set, arch_feature_index: u8) void {
+                    const byte_index = arch_feature_index / 8;
+                    const bit_index = @intCast(u3, arch_feature_index % 8);
+                    set.bytes[byte_index] |= @as(u8, 1) << bit_index;
+                }
+
+                pub fn removeFeature(set: *Set, arch_feature_index: u8) void {
+                    const byte_index = arch_feature_index / 8;
+                    const bit_index = @intCast(u3, arch_feature_index % 8);
+                    set.bytes[byte_index] &= ~(@as(u8, 1) << bit_index);
+                }
+            };
 
             pub fn feature_set_fns(comptime F: type) type {
                 return struct {
                     pub fn featureSet(features: []const F) Set {
-                        var x: Set = 0;
+                        var x = Set.empty();
                         for (features) |feature| {
-                            x |= @as(Set, 1) << @enumToInt(feature);
+                            x.addFeature(@enumToInt(feature));
                         }
                         return x;
                     }
 
                     pub fn featureSetHas(set: Set, feature: F) bool {
-                        return (set & (@as(Set, 1) << @enumToInt(feature))) != 0;
+                        return set.isEnabled(@enumToInt(feature));
                     }
                 };
             }
@@ -748,7 +777,7 @@ pub const Target = union(enum) {
     pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
         const info = @typeInfo(Arch);
         inline for (info.Union.fields) |field| {
-            if (mem.eql(u8, text, field.name)) {
+            if (mem.startsWith(u8, text, field.name)) {
                 if (field.field_type == void) {
                     return @as(Arch, @field(Arch, field.name));
                 } else {
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 4d547b74c11fdb03620454940ab431a4ec369455..980465bb20831596ff72d24913194ba257e3abb2 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -154,7 +154,7 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.a35)] = .{
         .index = @enumToInt(Feature.a35),
@@ -298,140 +298,140 @@ pub const all_features = blk: {
         .name = @tagName(Feature.aggressive_fma),
         .llvm_name = "aggressive-fma",
         .description = "Enable Aggressive FMA for floating-point.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
         .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern),
         .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern),
         .llvm_name = "alternate-sextload-cvt-f32-pattern",
         .description = "Use alternative pattern for sextload convert to f32",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altnzcv)] = .{
         .index = @enumToInt(Feature.altnzcv),
         .name = @tagName(Feature.altnzcv),
         .llvm_name = "altnzcv",
         .description = "Enable alternative NZCV format for floating point comparisons",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.am)] = .{
         .index = @enumToInt(Feature.am),
         .name = @tagName(Feature.am),
         .llvm_name = "am",
         .description = "Enable v8.4-A Activity Monitors extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_bcc_fusion)] = .{
         .index = @enumToInt(Feature.arith_bcc_fusion),
         .name = @tagName(Feature.arith_bcc_fusion),
         .llvm_name = "arith-bcc-fusion",
         .description = "CPU fuses arithmetic+bcc operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_cbz_fusion)] = .{
         .index = @enumToInt(Feature.arith_cbz_fusion),
         .name = @tagName(Feature.arith_cbz_fusion),
         .llvm_name = "arith-cbz-fusion",
         .description = "CPU fuses arithmetic + cbz/cbnz operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.balance_fp_ops)] = .{
         .index = @enumToInt(Feature.balance_fp_ops),
         .name = @tagName(Feature.balance_fp_ops),
         .llvm_name = "balance-fp-ops",
         .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bti)] = .{
         .index = @enumToInt(Feature.bti),
         .name = @tagName(Feature.bti),
         .llvm_name = "bti",
         .description = "Enable Branch Target Identification",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x10)] = .{
         .index = @enumToInt(Feature.call_saved_x10),
         .name = @tagName(Feature.call_saved_x10),
         .llvm_name = "call-saved-x10",
         .description = "Make X10 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x11)] = .{
         .index = @enumToInt(Feature.call_saved_x11),
         .name = @tagName(Feature.call_saved_x11),
         .llvm_name = "call-saved-x11",
         .description = "Make X11 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x12)] = .{
         .index = @enumToInt(Feature.call_saved_x12),
         .name = @tagName(Feature.call_saved_x12),
         .llvm_name = "call-saved-x12",
         .description = "Make X12 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x13)] = .{
         .index = @enumToInt(Feature.call_saved_x13),
         .name = @tagName(Feature.call_saved_x13),
         .llvm_name = "call-saved-x13",
         .description = "Make X13 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x14)] = .{
         .index = @enumToInt(Feature.call_saved_x14),
         .name = @tagName(Feature.call_saved_x14),
         .llvm_name = "call-saved-x14",
         .description = "Make X14 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x15)] = .{
         .index = @enumToInt(Feature.call_saved_x15),
         .name = @tagName(Feature.call_saved_x15),
         .llvm_name = "call-saved-x15",
         .description = "Make X15 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x18)] = .{
         .index = @enumToInt(Feature.call_saved_x18),
         .name = @tagName(Feature.call_saved_x18),
         .llvm_name = "call-saved-x18",
         .description = "Make X18 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x8)] = .{
         .index = @enumToInt(Feature.call_saved_x8),
         .name = @tagName(Feature.call_saved_x8),
         .llvm_name = "call-saved-x8",
         .description = "Make X8 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x9)] = .{
         .index = @enumToInt(Feature.call_saved_x9),
         .name = @tagName(Feature.call_saved_x9),
         .llvm_name = "call-saved-x9",
         .description = "Make X9 callee saved.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccdp)] = .{
         .index = @enumToInt(Feature.ccdp),
         .name = @tagName(Feature.ccdp),
         .llvm_name = "ccdp",
         .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccidx)] = .{
         .index = @enumToInt(Feature.ccidx),
         .name = @tagName(Feature.ccidx),
         .llvm_name = "ccidx",
         .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccpp)] = .{
         .index = @enumToInt(Feature.ccpp),
         .name = @tagName(Feature.ccpp),
         .llvm_name = "ccpp",
         .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.complxnum)] = .{
         .index = @enumToInt(Feature.complxnum),
@@ -447,7 +447,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Enable ARMv8 CRC-32 checksum instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .index = @enumToInt(Feature.crypto),
@@ -465,7 +465,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.custom_cheap_as_move),
         .llvm_name = "custom-cheap-as-move",
         .description = "Use custom handling of cheap instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cyclone)] = .{
         .index = @enumToInt(Feature.cyclone),
@@ -493,21 +493,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.disable_latency_sched_heuristic),
         .llvm_name = "disable-latency-sched-heuristic",
         .description = "Disable latency scheduling heuristic",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dit)] = .{
         .index = @enumToInt(Feature.dit),
         .name = @tagName(Feature.dit),
         .llvm_name = "dit",
         .description = "Enable v8.4-A Data Independent Timing instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
         .index = @enumToInt(Feature.dotprod),
         .name = @tagName(Feature.dotprod),
         .llvm_name = "dotprod",
         .description = "Enable dot product support",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
         .index = @enumToInt(Feature.exynos_cheap_as_move),
@@ -626,21 +626,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fmi),
         .llvm_name = "fmi",
         .description = "Enable v8.4-A Flag Manipulation Instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
         .index = @enumToInt(Feature.force_32bit_jump_tables),
         .name = @tagName(Feature.force_32bit_jump_tables),
         .llvm_name = "force-32bit-jump-tables",
         .description = "Force jump table entries to be 32-bits wide except at MinSize",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_armv8)] = .{
         .index = @enumToInt(Feature.fp_armv8),
         .name = @tagName(Feature.fp_armv8),
         .llvm_name = "fp-armv8",
         .description = "Enable ARMv8 FP",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
         .index = @enumToInt(Feature.fp16fml),
@@ -656,7 +656,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fptoint),
         .llvm_name = "fptoint",
         .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fullfp16)] = .{
         .index = @enumToInt(Feature.fullfp16),
@@ -672,42 +672,42 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fuse_address),
         .llvm_name = "fuse-address",
         .description = "CPU fuses address generation and memory operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_aes)] = .{
         .index = @enumToInt(Feature.fuse_aes),
         .name = @tagName(Feature.fuse_aes),
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_arith_logic)] = .{
         .index = @enumToInt(Feature.fuse_arith_logic),
         .name = @tagName(Feature.fuse_arith_logic),
         .llvm_name = "fuse-arith-logic",
         .description = "CPU fuses arithmetic and logic operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_crypto_eor)] = .{
         .index = @enumToInt(Feature.fuse_crypto_eor),
         .name = @tagName(Feature.fuse_crypto_eor),
         .llvm_name = "fuse-crypto-eor",
         .description = "CPU fuses AES/PMULL and EOR operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_csel)] = .{
         .index = @enumToInt(Feature.fuse_csel),
         .name = @tagName(Feature.fuse_csel),
         .llvm_name = "fuse-csel",
         .description = "CPU fuses conditional select operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
         .index = @enumToInt(Feature.fuse_literals),
         .name = @tagName(Feature.fuse_literals),
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jsconv)] = .{
         .index = @enumToInt(Feature.jsconv),
@@ -741,35 +741,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.lor),
         .llvm_name = "lor",
         .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lse)] = .{
         .index = @enumToInt(Feature.lse),
         .name = @tagName(Feature.lse),
         .llvm_name = "lse",
         .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lsl_fast)] = .{
         .index = @enumToInt(Feature.lsl_fast),
         .name = @tagName(Feature.lsl_fast),
         .llvm_name = "lsl-fast",
         .description = "CPU has a fastpath logical shift of up to 3 places",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpam)] = .{
         .index = @enumToInt(Feature.mpam),
         .name = @tagName(Feature.mpam),
         .llvm_name = "mpam",
         .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mte)] = .{
         .index = @enumToInt(Feature.mte),
         .name = @tagName(Feature.mte),
         .llvm_name = "mte",
         .description = "Enable Memory Tagging Extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
         .index = @enumToInt(Feature.neon),
@@ -785,28 +785,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.no_neg_immediates),
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nv)] = .{
         .index = @enumToInt(Feature.nv),
         .name = @tagName(Feature.nv),
         .llvm_name = "nv",
         .description = "Enable v8.4-A Nested Virtualization Enchancement",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pa)] = .{
         .index = @enumToInt(Feature.pa),
         .name = @tagName(Feature.pa),
         .llvm_name = "pa",
         .description = "Enable v8.3-A Pointer Authentication enchancement",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan)] = .{
         .index = @enumToInt(Feature.pan),
         .name = @tagName(Feature.pan),
         .llvm_name = "pan",
         .description = "Enables ARM v8.1 Privileged Access-Never extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan_rwv)] = .{
         .index = @enumToInt(Feature.pan_rwv),
@@ -822,35 +822,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.perfmon),
         .llvm_name = "perfmon",
         .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predictable_select_expensive)] = .{
         .index = @enumToInt(Feature.predictable_select_expensive),
         .name = @tagName(Feature.predictable_select_expensive),
         .llvm_name = "predictable-select-expensive",
         .description = "Prefer likely predicted branches over selects",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predres)] = .{
         .index = @enumToInt(Feature.predres),
         .name = @tagName(Feature.predres),
         .llvm_name = "predres",
         .description = "Enable v8.5a execution and data prediction invalidation instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rand)] = .{
         .index = @enumToInt(Feature.rand),
         .name = @tagName(Feature.rand),
         .llvm_name = "rand",
         .description = "Enable Random Number generation instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
         .index = @enumToInt(Feature.ras),
         .name = @tagName(Feature.ras),
         .llvm_name = "ras",
         .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rasv8_4)] = .{
         .index = @enumToInt(Feature.rasv8_4),
@@ -866,7 +866,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.rcpc),
         .llvm_name = "rcpc",
         .description = "Enable support for RCPC extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rcpc_immo)] = .{
         .index = @enumToInt(Feature.rcpc_immo),
@@ -882,175 +882,175 @@ pub const all_features = blk: {
         .name = @tagName(Feature.rdm),
         .llvm_name = "rdm",
         .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x1)] = .{
         .index = @enumToInt(Feature.reserve_x1),
         .name = @tagName(Feature.reserve_x1),
         .llvm_name = "reserve-x1",
         .description = "Reserve X1, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x10)] = .{
         .index = @enumToInt(Feature.reserve_x10),
         .name = @tagName(Feature.reserve_x10),
         .llvm_name = "reserve-x10",
         .description = "Reserve X10, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x11)] = .{
         .index = @enumToInt(Feature.reserve_x11),
         .name = @tagName(Feature.reserve_x11),
         .llvm_name = "reserve-x11",
         .description = "Reserve X11, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x12)] = .{
         .index = @enumToInt(Feature.reserve_x12),
         .name = @tagName(Feature.reserve_x12),
         .llvm_name = "reserve-x12",
         .description = "Reserve X12, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x13)] = .{
         .index = @enumToInt(Feature.reserve_x13),
         .name = @tagName(Feature.reserve_x13),
         .llvm_name = "reserve-x13",
         .description = "Reserve X13, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x14)] = .{
         .index = @enumToInt(Feature.reserve_x14),
         .name = @tagName(Feature.reserve_x14),
         .llvm_name = "reserve-x14",
         .description = "Reserve X14, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x15)] = .{
         .index = @enumToInt(Feature.reserve_x15),
         .name = @tagName(Feature.reserve_x15),
         .llvm_name = "reserve-x15",
         .description = "Reserve X15, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x18)] = .{
         .index = @enumToInt(Feature.reserve_x18),
         .name = @tagName(Feature.reserve_x18),
         .llvm_name = "reserve-x18",
         .description = "Reserve X18, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x2)] = .{
         .index = @enumToInt(Feature.reserve_x2),
         .name = @tagName(Feature.reserve_x2),
         .llvm_name = "reserve-x2",
         .description = "Reserve X2, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x20)] = .{
         .index = @enumToInt(Feature.reserve_x20),
         .name = @tagName(Feature.reserve_x20),
         .llvm_name = "reserve-x20",
         .description = "Reserve X20, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x21)] = .{
         .index = @enumToInt(Feature.reserve_x21),
         .name = @tagName(Feature.reserve_x21),
         .llvm_name = "reserve-x21",
         .description = "Reserve X21, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x22)] = .{
         .index = @enumToInt(Feature.reserve_x22),
         .name = @tagName(Feature.reserve_x22),
         .llvm_name = "reserve-x22",
         .description = "Reserve X22, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x23)] = .{
         .index = @enumToInt(Feature.reserve_x23),
         .name = @tagName(Feature.reserve_x23),
         .llvm_name = "reserve-x23",
         .description = "Reserve X23, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x24)] = .{
         .index = @enumToInt(Feature.reserve_x24),
         .name = @tagName(Feature.reserve_x24),
         .llvm_name = "reserve-x24",
         .description = "Reserve X24, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x25)] = .{
         .index = @enumToInt(Feature.reserve_x25),
         .name = @tagName(Feature.reserve_x25),
         .llvm_name = "reserve-x25",
         .description = "Reserve X25, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x26)] = .{
         .index = @enumToInt(Feature.reserve_x26),
         .name = @tagName(Feature.reserve_x26),
         .llvm_name = "reserve-x26",
         .description = "Reserve X26, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x27)] = .{
         .index = @enumToInt(Feature.reserve_x27),
         .name = @tagName(Feature.reserve_x27),
         .llvm_name = "reserve-x27",
         .description = "Reserve X27, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x28)] = .{
         .index = @enumToInt(Feature.reserve_x28),
         .name = @tagName(Feature.reserve_x28),
         .llvm_name = "reserve-x28",
         .description = "Reserve X28, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x3)] = .{
         .index = @enumToInt(Feature.reserve_x3),
         .name = @tagName(Feature.reserve_x3),
         .llvm_name = "reserve-x3",
         .description = "Reserve X3, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x4)] = .{
         .index = @enumToInt(Feature.reserve_x4),
         .name = @tagName(Feature.reserve_x4),
         .llvm_name = "reserve-x4",
         .description = "Reserve X4, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x5)] = .{
         .index = @enumToInt(Feature.reserve_x5),
         .name = @tagName(Feature.reserve_x5),
         .llvm_name = "reserve-x5",
         .description = "Reserve X5, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x6)] = .{
         .index = @enumToInt(Feature.reserve_x6),
         .name = @tagName(Feature.reserve_x6),
         .llvm_name = "reserve-x6",
         .description = "Reserve X6, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x7)] = .{
         .index = @enumToInt(Feature.reserve_x7),
         .name = @tagName(Feature.reserve_x7),
         .llvm_name = "reserve-x7",
         .description = "Reserve X7, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x9)] = .{
         .index = @enumToInt(Feature.reserve_x9),
         .name = @tagName(Feature.reserve_x9),
         .llvm_name = "reserve-x9",
         .description = "Reserve X9, making it unavailable as a GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.saphira)] = .{
         .index = @enumToInt(Feature.saphira),
@@ -1076,14 +1076,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.sb),
         .llvm_name = "sb",
         .description = "Enable v8.5 Speculation Barrier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sel2)] = .{
         .index = @enumToInt(Feature.sel2),
         .name = @tagName(Feature.sel2),
         .llvm_name = "sel2",
         .description = "Enable v8.4-A Secure Exception Level 2 extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
         .index = @enumToInt(Feature.sha2),
@@ -1109,21 +1109,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.slow_misaligned_128store),
         .llvm_name = "slow-misaligned-128store",
         .description = "Misaligned 128 bit stores are slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_paired_128)] = .{
         .index = @enumToInt(Feature.slow_paired_128),
         .name = @tagName(Feature.slow_paired_128),
         .llvm_name = "slow-paired-128",
         .description = "Paired 128 bit loads and stores are slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_strqro_store)] = .{
         .index = @enumToInt(Feature.slow_strqro_store),
         .name = @tagName(Feature.slow_strqro_store),
         .llvm_name = "slow-strqro-store",
         .description = "STR of Q register with register offset is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm4)] = .{
         .index = @enumToInt(Feature.sm4),
@@ -1139,35 +1139,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.spe),
         .llvm_name = "spe",
         .description = "Enable Statistical Profiling extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.specrestrict)] = .{
         .index = @enumToInt(Feature.specrestrict),
         .name = @tagName(Feature.specrestrict),
         .llvm_name = "specrestrict",
         .description = "Enable architectural speculation restriction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ssbs)] = .{
         .index = @enumToInt(Feature.ssbs),
         .name = @tagName(Feature.ssbs),
         .llvm_name = "ssbs",
         .description = "Enable Speculative Store Bypass Safe bit",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.strict_align)] = .{
         .index = @enumToInt(Feature.strict_align),
         .name = @tagName(Feature.strict_align),
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve)] = .{
         .index = @enumToInt(Feature.sve),
         .name = @tagName(Feature.sve),
         .llvm_name = "sve",
         .description = "Enable Scalable Vector Extension (SVE) instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve2)] = .{
         .index = @enumToInt(Feature.sve2),
@@ -1300,35 +1300,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.tlb_rmi),
         .llvm_name = "tlb-rmi",
         .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el1)] = .{
         .index = @enumToInt(Feature.tpidr_el1),
         .name = @tagName(Feature.tpidr_el1),
         .llvm_name = "tpidr-el1",
         .description = "Permit use of TPIDR_EL1 for the TLS base",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el2)] = .{
         .index = @enumToInt(Feature.tpidr_el2),
         .name = @tagName(Feature.tpidr_el2),
         .llvm_name = "tpidr-el2",
         .description = "Permit use of TPIDR_EL2 for the TLS base",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el3)] = .{
         .index = @enumToInt(Feature.tpidr_el3),
         .name = @tagName(Feature.tpidr_el3),
         .llvm_name = "tpidr-el3",
         .description = "Permit use of TPIDR_EL3 for the TLS base",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tracev8_4)] = .{
         .index = @enumToInt(Feature.tracev8_4),
         .name = @tagName(Feature.tracev8_4),
         .llvm_name = "tracev8.4",
         .description = "Enable v8.4-A Trace extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tsv110)] = .{
         .index = @enumToInt(Feature.tsv110),
@@ -1355,28 +1355,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.uaops),
         .llvm_name = "uaops",
         .description = "Enable v8.2 UAO PState",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
         .index = @enumToInt(Feature.use_aa),
         .name = @tagName(Feature.use_aa),
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_postra_scheduler)] = .{
         .index = @enumToInt(Feature.use_postra_scheduler),
         .name = @tagName(Feature.use_postra_scheduler),
         .llvm_name = "use-postra-scheduler",
         .description = "Schedule again after register allocation",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
         .index = @enumToInt(Feature.use_reciprocal_square_root),
         .name = @tagName(Feature.use_reciprocal_square_root),
         .llvm_name = "use-reciprocal-square-root",
         .description = "Use the reciprocal square root approximation",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8_1a)] = .{
         .index = @enumToInt(Feature.v8_1a),
@@ -1461,14 +1461,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.vh),
         .llvm_name = "vh",
         .description = "Enables ARM v8.1 Virtual Host extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcm)] = .{
         .index = @enumToInt(Feature.zcm),
         .name = @tagName(Feature.zcm),
         .llvm_name = "zcm",
         .description = "Has zero-cycle register moves",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz)] = .{
         .index = @enumToInt(Feature.zcz),
@@ -1485,21 +1485,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.zcz_fp),
         .llvm_name = "zcz-fp",
         .description = "Has zero-cycle zeroing instructions for FP registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_fp_workaround)] = .{
         .index = @enumToInt(Feature.zcz_fp_workaround),
         .name = @tagName(Feature.zcz_fp_workaround),
         .llvm_name = "zcz-fp-workaround",
         .description = "The zero-cycle floating-point zeroing instruction has a bug",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_gp)] = .{
         .index = @enumToInt(Feature.zcz_gp),
         .name = @tagName(Feature.zcz_gp),
         .llvm_name = "zcz-gp",
         .description = "Has zero-cycle zeroing instructions for generic registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 6175456a17ea2b4f8ffa0e21b06c49402196c908..b1953ca83e5fdc7bcff570f0b152bfed3e3993ea 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -115,224 +115,224 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"16_bit_insts")] = .{
         .index = @enumToInt(Feature.@"16_bit_insts"),
         .name = @tagName(Feature.@"16_bit_insts"),
         .llvm_name = "16-bit-insts",
         .description = "Has i16/f16 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.DumpCode)] = .{
         .index = @enumToInt(Feature.DumpCode),
         .name = @tagName(Feature.DumpCode),
         .llvm_name = "DumpCode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.add_no_carry_insts)] = .{
         .index = @enumToInt(Feature.add_no_carry_insts),
         .name = @tagName(Feature.add_no_carry_insts),
         .llvm_name = "add-no-carry-insts",
         .description = "Have VALU add/sub instructions without carry out",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aperture_regs)] = .{
         .index = @enumToInt(Feature.aperture_regs),
         .name = @tagName(Feature.aperture_regs),
         .llvm_name = "aperture-regs",
         .description = "Has Memory Aperture Base and Size Registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.atomic_fadd_insts)] = .{
         .index = @enumToInt(Feature.atomic_fadd_insts),
         .name = @tagName(Feature.atomic_fadd_insts),
         .llvm_name = "atomic-fadd-insts",
         .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
         .index = @enumToInt(Feature.auto_waitcnt_before_barrier),
         .name = @tagName(Feature.auto_waitcnt_before_barrier),
         .llvm_name = "auto-waitcnt-before-barrier",
         .description = "Hardware automatically inserts waitcnt before barrier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ci_insts)] = .{
         .index = @enumToInt(Feature.ci_insts),
         .name = @tagName(Feature.ci_insts),
         .llvm_name = "ci-insts",
         .description = "Additional instructions for CI+",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.code_object_v3)] = .{
         .index = @enumToInt(Feature.code_object_v3),
         .name = @tagName(Feature.code_object_v3),
         .llvm_name = "code-object-v3",
         .description = "Generate code object version 3",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cumode)] = .{
         .index = @enumToInt(Feature.cumode),
         .name = @tagName(Feature.cumode),
         .llvm_name = "cumode",
         .description = "Enable CU wavefront execution mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dl_insts)] = .{
         .index = @enumToInt(Feature.dl_insts),
         .name = @tagName(Feature.dl_insts),
         .llvm_name = "dl-insts",
         .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot1_insts)] = .{
         .index = @enumToInt(Feature.dot1_insts),
         .name = @tagName(Feature.dot1_insts),
         .llvm_name = "dot1-insts",
         .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot2_insts)] = .{
         .index = @enumToInt(Feature.dot2_insts),
         .name = @tagName(Feature.dot2_insts),
         .llvm_name = "dot2-insts",
         .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot3_insts)] = .{
         .index = @enumToInt(Feature.dot3_insts),
         .name = @tagName(Feature.dot3_insts),
         .llvm_name = "dot3-insts",
         .description = "Has v_dot8c_i32_i4 instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot4_insts)] = .{
         .index = @enumToInt(Feature.dot4_insts),
         .name = @tagName(Feature.dot4_insts),
         .llvm_name = "dot4-insts",
         .description = "Has v_dot2c_i32_i16 instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot5_insts)] = .{
         .index = @enumToInt(Feature.dot5_insts),
         .name = @tagName(Feature.dot5_insts),
         .llvm_name = "dot5-insts",
         .description = "Has v_dot2c_f32_f16 instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot6_insts)] = .{
         .index = @enumToInt(Feature.dot6_insts),
         .name = @tagName(Feature.dot6_insts),
         .llvm_name = "dot6-insts",
         .description = "Has v_dot4c_i32_i8 instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp)] = .{
         .index = @enumToInt(Feature.dpp),
         .name = @tagName(Feature.dpp),
         .llvm_name = "dpp",
         .description = "Support DPP (Data Parallel Primitives) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp8)] = .{
         .index = @enumToInt(Feature.dpp8),
         .name = @tagName(Feature.dpp8),
         .llvm_name = "dpp8",
         .description = "Support DPP8 (Data Parallel Primitives) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dumpcode)] = .{
         .index = @enumToInt(Feature.dumpcode),
         .name = @tagName(Feature.dumpcode),
         .llvm_name = "dumpcode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_ds128)] = .{
         .index = @enumToInt(Feature.enable_ds128),
         .name = @tagName(Feature.enable_ds128),
         .llvm_name = "enable-ds128",
         .description = "Use ds_read|write_b128",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_prt_strict_null)] = .{
         .index = @enumToInt(Feature.enable_prt_strict_null),
         .name = @tagName(Feature.enable_prt_strict_null),
         .llvm_name = "enable-prt-strict-null",
         .description = "Enable zeroing of result registers for sparse texture fetches",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_fmaf)] = .{
         .index = @enumToInt(Feature.fast_fmaf),
         .name = @tagName(Feature.fast_fmaf),
         .llvm_name = "fast-fmaf",
         .description = "Assuming f32 fma is at least as fast as mul + add",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_address_space)] = .{
         .index = @enumToInt(Feature.flat_address_space),
         .name = @tagName(Feature.flat_address_space),
         .llvm_name = "flat-address-space",
         .description = "Support flat address space",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_for_global)] = .{
         .index = @enumToInt(Feature.flat_for_global),
         .name = @tagName(Feature.flat_for_global),
         .llvm_name = "flat-for-global",
         .description = "Force to generate flat instruction for global",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_global_insts)] = .{
         .index = @enumToInt(Feature.flat_global_insts),
         .name = @tagName(Feature.flat_global_insts),
         .llvm_name = "flat-global-insts",
         .description = "Have global_* flat memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_inst_offsets)] = .{
         .index = @enumToInt(Feature.flat_inst_offsets),
         .name = @tagName(Feature.flat_inst_offsets),
         .llvm_name = "flat-inst-offsets",
         .description = "Flat instructions have immediate offset addressing mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_scratch_insts)] = .{
         .index = @enumToInt(Feature.flat_scratch_insts),
         .name = @tagName(Feature.flat_scratch_insts),
         .llvm_name = "flat-scratch-insts",
         .description = "Have scratch_* flat memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
         .index = @enumToInt(Feature.flat_segment_offset_bug),
         .name = @tagName(Feature.flat_segment_offset_bug),
         .llvm_name = "flat-segment-offset-bug",
         .description = "GFX10 bug, inst_offset ignored in flat segment",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma_mix_insts)] = .{
         .index = @enumToInt(Feature.fma_mix_insts),
         .name = @tagName(Feature.fma_mix_insts),
         .llvm_name = "fma-mix-insts",
         .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fmaf)] = .{
         .index = @enumToInt(Feature.fmaf),
         .name = @tagName(Feature.fmaf),
         .llvm_name = "fmaf",
         .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_exceptions)] = .{
         .index = @enumToInt(Feature.fp_exceptions),
         .name = @tagName(Feature.fp_exceptions),
         .llvm_name = "fp-exceptions",
         .description = "Enable floating point exceptions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16_denormals)] = .{
         .index = @enumToInt(Feature.fp16_denormals),
@@ -348,14 +348,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fp32_denormals),
         .llvm_name = "fp32-denormals",
         .description = "Enable single precision denormal handling",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
         .index = @enumToInt(Feature.fp64),
         .name = @tagName(Feature.fp64),
         .llvm_name = "fp64",
         .description = "Enable double precision operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64_denormals)] = .{
         .index = @enumToInt(Feature.fp64_denormals),
@@ -381,7 +381,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.gcn3_encoding),
         .llvm_name = "gcn3-encoding",
         .description = "Encoding format for VI",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx10)] = .{
         .index = @enumToInt(Feature.gfx10),
@@ -430,21 +430,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.gfx10_insts),
         .llvm_name = "gfx10-insts",
         .description = "Additional instructions for GFX10+",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
         .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts),
         .name = @tagName(Feature.gfx7_gfx8_gfx9_insts),
         .llvm_name = "gfx7-gfx8-gfx9-insts",
         .description = "Instructions shared in GFX7, GFX8, GFX9",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx8_insts)] = .{
         .index = @enumToInt(Feature.gfx8_insts),
         .name = @tagName(Feature.gfx8_insts),
         .llvm_name = "gfx8-insts",
         .description = "Additional instructions for GFX8+",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx9)] = .{
         .index = @enumToInt(Feature.gfx9),
@@ -489,287 +489,287 @@ pub const all_features = blk: {
         .name = @tagName(Feature.gfx9_insts),
         .llvm_name = "gfx9-insts",
         .description = "Additional instructions for GFX9+",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.half_rate_64_ops)] = .{
         .index = @enumToInt(Feature.half_rate_64_ops),
         .name = @tagName(Feature.half_rate_64_ops),
         .llvm_name = "half-rate-64-ops",
         .description = "Most fp64 instructions are half rate instead of quarter",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
         .index = @enumToInt(Feature.inst_fwd_prefetch_bug),
         .name = @tagName(Feature.inst_fwd_prefetch_bug),
         .llvm_name = "inst-fwd-prefetch-bug",
         .description = "S_INST_PREFETCH instruction causes shader to hang",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.int_clamp_insts)] = .{
         .index = @enumToInt(Feature.int_clamp_insts),
         .name = @tagName(Feature.int_clamp_insts),
         .llvm_name = "int-clamp-insts",
         .description = "Support clamp for integer destination",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
         .index = @enumToInt(Feature.inv_2pi_inline_imm),
         .name = @tagName(Feature.inv_2pi_inline_imm),
         .llvm_name = "inv-2pi-inline-imm",
         .description = "Has 1 / (2 * pi) as inline immediate",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
         .index = @enumToInt(Feature.lds_branch_vmem_war_hazard),
         .name = @tagName(Feature.lds_branch_vmem_war_hazard),
         .llvm_name = "lds-branch-vmem-war-hazard",
         .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_misaligned_bug)] = .{
         .index = @enumToInt(Feature.lds_misaligned_bug),
         .name = @tagName(Feature.lds_misaligned_bug),
         .llvm_name = "lds-misaligned-bug",
         .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount16)] = .{
         .index = @enumToInt(Feature.ldsbankcount16),
         .name = @tagName(Feature.ldsbankcount16),
         .llvm_name = "ldsbankcount16",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount32)] = .{
         .index = @enumToInt(Feature.ldsbankcount32),
         .name = @tagName(Feature.ldsbankcount32),
         .llvm_name = "ldsbankcount32",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_opt)] = .{
         .index = @enumToInt(Feature.load_store_opt),
         .name = @tagName(Feature.load_store_opt),
         .llvm_name = "load-store-opt",
         .description = "Enable SI load/store optimizer pass",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize0)] = .{
         .index = @enumToInt(Feature.localmemorysize0),
         .name = @tagName(Feature.localmemorysize0),
         .llvm_name = "localmemorysize0",
         .description = "The size of local memory in bytes",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize32768)] = .{
         .index = @enumToInt(Feature.localmemorysize32768),
         .name = @tagName(Feature.localmemorysize32768),
         .llvm_name = "localmemorysize32768",
         .description = "The size of local memory in bytes",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize65536)] = .{
         .index = @enumToInt(Feature.localmemorysize65536),
         .name = @tagName(Feature.localmemorysize65536),
         .llvm_name = "localmemorysize65536",
         .description = "The size of local memory in bytes",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mad_mix_insts)] = .{
         .index = @enumToInt(Feature.mad_mix_insts),
         .name = @tagName(Feature.mad_mix_insts),
         .llvm_name = "mad-mix-insts",
         .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mai_insts)] = .{
         .index = @enumToInt(Feature.mai_insts),
         .name = @tagName(Feature.mai_insts),
         .llvm_name = "mai-insts",
         .description = "Has mAI instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_16)] = .{
         .index = @enumToInt(Feature.max_private_element_size_16),
         .name = @tagName(Feature.max_private_element_size_16),
         .llvm_name = "max-private-element-size-16",
         .description = "Maximum private access size may be 16",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_4)] = .{
         .index = @enumToInt(Feature.max_private_element_size_4),
         .name = @tagName(Feature.max_private_element_size_4),
         .llvm_name = "max-private-element-size-4",
         .description = "Maximum private access size may be 4",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_8)] = .{
         .index = @enumToInt(Feature.max_private_element_size_8),
         .name = @tagName(Feature.max_private_element_size_8),
         .llvm_name = "max-private-element-size-8",
         .description = "Maximum private access size may be 8",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mimg_r128)] = .{
         .index = @enumToInt(Feature.mimg_r128),
         .name = @tagName(Feature.mimg_r128),
         .llvm_name = "mimg-r128",
         .description = "Support 128-bit texture resources",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movrel)] = .{
         .index = @enumToInt(Feature.movrel),
         .name = @tagName(Feature.movrel),
         .llvm_name = "movrel",
         .description = "Has v_movrel*_b32 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_data_dep_hazard)] = .{
         .index = @enumToInt(Feature.no_data_dep_hazard),
         .name = @tagName(Feature.no_data_dep_hazard),
         .llvm_name = "no-data-dep-hazard",
         .description = "Does not need SW waitstates",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sdst_cmpx)] = .{
         .index = @enumToInt(Feature.no_sdst_cmpx),
         .name = @tagName(Feature.no_sdst_cmpx),
         .llvm_name = "no-sdst-cmpx",
         .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sram_ecc_support)] = .{
         .index = @enumToInt(Feature.no_sram_ecc_support),
         .name = @tagName(Feature.no_sram_ecc_support),
         .llvm_name = "no-sram-ecc-support",
         .description = "Hardware does not support SRAM ECC",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_xnack_support)] = .{
         .index = @enumToInt(Feature.no_xnack_support),
         .name = @tagName(Feature.no_xnack_support),
         .llvm_name = "no-xnack-support",
         .description = "Hardware does not support XNACK",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_encoding)] = .{
         .index = @enumToInt(Feature.nsa_encoding),
         .name = @tagName(Feature.nsa_encoding),
         .llvm_name = "nsa-encoding",
         .description = "Support NSA encoding for image instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
         .index = @enumToInt(Feature.nsa_to_vmem_bug),
         .name = @tagName(Feature.nsa_to_vmem_bug),
         .llvm_name = "nsa-to-vmem-bug",
         .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.offset_3f_bug)] = .{
         .index = @enumToInt(Feature.offset_3f_bug),
         .name = @tagName(Feature.offset_3f_bug),
         .llvm_name = "offset-3f-bug",
         .description = "Branch offset of 3f hardware bug",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
         .index = @enumToInt(Feature.pk_fmac_f16_inst),
         .name = @tagName(Feature.pk_fmac_f16_inst),
         .llvm_name = "pk-fmac-f16-inst",
         .description = "Has v_pk_fmac_f16 instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.promote_alloca)] = .{
         .index = @enumToInt(Feature.promote_alloca),
         .name = @tagName(Feature.promote_alloca),
         .llvm_name = "promote-alloca",
         .description = "Enable promote alloca pass",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r128_a16)] = .{
         .index = @enumToInt(Feature.r128_a16),
         .name = @tagName(Feature.r128_a16),
         .llvm_name = "r128-a16",
         .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.register_banking)] = .{
         .index = @enumToInt(Feature.register_banking),
         .name = @tagName(Feature.register_banking),
         .llvm_name = "register-banking",
         .description = "Has register banking",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.s_memrealtime)] = .{
         .index = @enumToInt(Feature.s_memrealtime),
         .name = @tagName(Feature.s_memrealtime),
         .llvm_name = "s-memrealtime",
         .description = "Has s_memrealtime instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_atomics)] = .{
         .index = @enumToInt(Feature.scalar_atomics),
         .name = @tagName(Feature.scalar_atomics),
         .llvm_name = "scalar-atomics",
         .description = "Has atomic scalar memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
         .index = @enumToInt(Feature.scalar_flat_scratch_insts),
         .name = @tagName(Feature.scalar_flat_scratch_insts),
         .llvm_name = "scalar-flat-scratch-insts",
         .description = "Have s_scratch_* flat memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_stores)] = .{
         .index = @enumToInt(Feature.scalar_stores),
         .name = @tagName(Feature.scalar_stores),
         .llvm_name = "scalar-stores",
         .description = "Has store scalar memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa)] = .{
         .index = @enumToInt(Feature.sdwa),
         .name = @tagName(Feature.sdwa),
         .llvm_name = "sdwa",
         .description = "Support SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_mav)] = .{
         .index = @enumToInt(Feature.sdwa_mav),
         .name = @tagName(Feature.sdwa_mav),
         .llvm_name = "sdwa-mav",
         .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_omod)] = .{
         .index = @enumToInt(Feature.sdwa_omod),
         .name = @tagName(Feature.sdwa_omod),
         .llvm_name = "sdwa-omod",
         .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
         .index = @enumToInt(Feature.sdwa_out_mods_vopc),
         .name = @tagName(Feature.sdwa_out_mods_vopc),
         .llvm_name = "sdwa-out-mods-vopc",
         .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_scalar)] = .{
         .index = @enumToInt(Feature.sdwa_scalar),
         .name = @tagName(Feature.sdwa_scalar),
         .llvm_name = "sdwa-scalar",
         .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_sdst)] = .{
         .index = @enumToInt(Feature.sdwa_sdst),
         .name = @tagName(Feature.sdwa_sdst),
         .llvm_name = "sdwa-sdst",
         .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sea_islands)] = .{
         .index = @enumToInt(Feature.sea_islands),
@@ -794,21 +794,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.sgpr_init_bug),
         .llvm_name = "sgpr-init-bug",
         .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.si_scheduler)] = .{
         .index = @enumToInt(Feature.si_scheduler),
         .name = @tagName(Feature.si_scheduler),
         .llvm_name = "si-scheduler",
         .description = "Enable SI Machine Scheduler",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
         .index = @enumToInt(Feature.smem_to_vector_write_hazard),
         .name = @tagName(Feature.smem_to_vector_write_hazard),
         .llvm_name = "smem-to-vector-write-hazard",
         .description = "s_load_dword followed by v_cmp page faults",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.southern_islands)] = .{
         .index = @enumToInt(Feature.southern_islands),
@@ -832,77 +832,77 @@ pub const all_features = blk: {
         .name = @tagName(Feature.sram_ecc),
         .llvm_name = "sram-ecc",
         .description = "Enable SRAM ECC",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trap_handler)] = .{
         .index = @enumToInt(Feature.trap_handler),
         .name = @tagName(Feature.trap_handler),
         .llvm_name = "trap-handler",
         .description = "Trap handler support",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trig_reduced_range)] = .{
         .index = @enumToInt(Feature.trig_reduced_range),
         .name = @tagName(Feature.trig_reduced_range),
         .llvm_name = "trig-reduced-range",
         .description = "Requires use of fract on arguments to trig instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_buffer_access)] = .{
         .index = @enumToInt(Feature.unaligned_buffer_access),
         .name = @tagName(Feature.unaligned_buffer_access),
         .llvm_name = "unaligned-buffer-access",
         .description = "Support unaligned global loads and stores",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_scratch_access)] = .{
         .index = @enumToInt(Feature.unaligned_scratch_access),
         .name = @tagName(Feature.unaligned_scratch_access),
         .llvm_name = "unaligned-scratch-access",
         .description = "Support unaligned scratch loads and stores",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
         .index = @enumToInt(Feature.unpacked_d16_vmem),
         .name = @tagName(Feature.unpacked_d16_vmem),
         .llvm_name = "unpacked-d16-vmem",
         .description = "Has unpacked d16 vmem instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
         .index = @enumToInt(Feature.unsafe_ds_offset_folding),
         .name = @tagName(Feature.unsafe_ds_offset_folding),
         .llvm_name = "unsafe-ds-offset-folding",
         .description = "Force using DS instruction immediate offsets on SI",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
         .index = @enumToInt(Feature.vcmpx_exec_war_hazard),
         .name = @tagName(Feature.vcmpx_exec_war_hazard),
         .llvm_name = "vcmpx-exec-war-hazard",
         .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
         .index = @enumToInt(Feature.vcmpx_permlane_hazard),
         .name = @tagName(Feature.vcmpx_permlane_hazard),
         .llvm_name = "vcmpx-permlane-hazard",
         .description = "TODO: describe me",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vgpr_index_mode)] = .{
         .index = @enumToInt(Feature.vgpr_index_mode),
         .name = @tagName(Feature.vgpr_index_mode),
         .llvm_name = "vgpr-index-mode",
         .description = "Has VGPR mode register indexing",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
         .index = @enumToInt(Feature.vmem_to_scalar_write_hazard),
         .name = @tagName(Feature.vmem_to_scalar_write_hazard),
         .llvm_name = "vmem-to-scalar-write-hazard",
         .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.volcanic_islands)] = .{
         .index = @enumToInt(Feature.volcanic_islands),
@@ -939,49 +939,49 @@ pub const all_features = blk: {
         .name = @tagName(Feature.vop3_literal),
         .llvm_name = "vop3-literal",
         .description = "Can use one literal in VOP3",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vop3p)] = .{
         .index = @enumToInt(Feature.vop3p),
         .name = @tagName(Feature.vop3p),
         .llvm_name = "vop3p",
         .description = "Has VOP3P packed instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vscnt)] = .{
         .index = @enumToInt(Feature.vscnt),
         .name = @tagName(Feature.vscnt),
         .llvm_name = "vscnt",
         .description = "Has separate store vscnt counter",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize16)] = .{
         .index = @enumToInt(Feature.wavefrontsize16),
         .name = @tagName(Feature.wavefrontsize16),
         .llvm_name = "wavefrontsize16",
         .description = "The number of threads per wavefront",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize32)] = .{
         .index = @enumToInt(Feature.wavefrontsize32),
         .name = @tagName(Feature.wavefrontsize32),
         .llvm_name = "wavefrontsize32",
         .description = "The number of threads per wavefront",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize64)] = .{
         .index = @enumToInt(Feature.wavefrontsize64),
         .name = @tagName(Feature.wavefrontsize64),
         .llvm_name = "wavefrontsize64",
         .description = "The number of threads per wavefront",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xnack)] = .{
         .index = @enumToInt(Feature.xnack),
         .name = @tagName(Feature.xnack),
         .llvm_name = "xnack",
         .description = "Enable XNACK support",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index de4bd0ed78de86953aff941b7c99425de8026e05..744d418d03ed705601aac988abc8ade1d61dc644 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -182,147 +182,147 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"32bit")] = .{
         .index = @enumToInt(Feature.@"32bit"),
         .name = @tagName(Feature.@"32bit"),
         .llvm_name = "32bit",
         .description = "Prefer 32-bit Thumb instrs",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"8msecext")] = .{
         .index = @enumToInt(Feature.@"8msecext"),
         .name = @tagName(Feature.@"8msecext"),
         .llvm_name = "8msecext",
         .description = "Enable support for ARMv8-M Security Extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a12)] = .{
         .index = @enumToInt(Feature.a12),
         .name = @tagName(Feature.a12),
         .llvm_name = "a12",
         .description = "Cortex-A12 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a15)] = .{
         .index = @enumToInt(Feature.a15),
         .name = @tagName(Feature.a15),
         .llvm_name = "a15",
         .description = "Cortex-A15 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a17)] = .{
         .index = @enumToInt(Feature.a17),
         .name = @tagName(Feature.a17),
         .llvm_name = "a17",
         .description = "Cortex-A17 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a32)] = .{
         .index = @enumToInt(Feature.a32),
         .name = @tagName(Feature.a32),
         .llvm_name = "a32",
         .description = "Cortex-A32 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a35)] = .{
         .index = @enumToInt(Feature.a35),
         .name = @tagName(Feature.a35),
         .llvm_name = "a35",
         .description = "Cortex-A35 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a5)] = .{
         .index = @enumToInt(Feature.a5),
         .name = @tagName(Feature.a5),
         .llvm_name = "a5",
         .description = "Cortex-A5 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a53)] = .{
         .index = @enumToInt(Feature.a53),
         .name = @tagName(Feature.a53),
         .llvm_name = "a53",
         .description = "Cortex-A53 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a55)] = .{
         .index = @enumToInt(Feature.a55),
         .name = @tagName(Feature.a55),
         .llvm_name = "a55",
         .description = "Cortex-A55 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a57)] = .{
         .index = @enumToInt(Feature.a57),
         .name = @tagName(Feature.a57),
         .llvm_name = "a57",
         .description = "Cortex-A57 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a7)] = .{
         .index = @enumToInt(Feature.a7),
         .name = @tagName(Feature.a7),
         .llvm_name = "a7",
         .description = "Cortex-A7 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a72)] = .{
         .index = @enumToInt(Feature.a72),
         .name = @tagName(Feature.a72),
         .llvm_name = "a72",
         .description = "Cortex-A72 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a73)] = .{
         .index = @enumToInt(Feature.a73),
         .name = @tagName(Feature.a73),
         .llvm_name = "a73",
         .description = "Cortex-A73 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a75)] = .{
         .index = @enumToInt(Feature.a75),
         .name = @tagName(Feature.a75),
         .llvm_name = "a75",
         .description = "Cortex-A75 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a76)] = .{
         .index = @enumToInt(Feature.a76),
         .name = @tagName(Feature.a76),
         .llvm_name = "a76",
         .description = "Cortex-A76 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a8)] = .{
         .index = @enumToInt(Feature.a8),
         .name = @tagName(Feature.a8),
         .llvm_name = "a8",
         .description = "Cortex-A8 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a9)] = .{
         .index = @enumToInt(Feature.a9),
         .name = @tagName(Feature.a9),
         .llvm_name = "a9",
         .description = "Cortex-A9 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aclass)] = .{
         .index = @enumToInt(Feature.aclass),
         .name = @tagName(Feature.aclass),
         .llvm_name = "aclass",
         .description = "Is application profile ('A' series)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.acquire_release)] = .{
         .index = @enumToInt(Feature.acquire_release),
         .name = @tagName(Feature.acquire_release),
         .llvm_name = "acquire-release",
         .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
@@ -338,35 +338,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.armv2),
         .llvm_name = "armv2",
         .description = "ARMv2 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv2a)] = .{
         .index = @enumToInt(Feature.armv2a),
         .name = @tagName(Feature.armv2a),
         .llvm_name = "armv2a",
         .description = "ARMv2a architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3)] = .{
         .index = @enumToInt(Feature.armv3),
         .name = @tagName(Feature.armv3),
         .llvm_name = "armv3",
         .description = "ARMv3 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3m)] = .{
         .index = @enumToInt(Feature.armv3m),
         .name = @tagName(Feature.armv3m),
         .llvm_name = "armv3m",
         .description = "ARMv3m architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4)] = .{
         .index = @enumToInt(Feature.armv4),
         .name = @tagName(Feature.armv4),
         .llvm_name = "armv4",
         .description = "ARMv4 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4t)] = .{
         .index = @enumToInt(Feature.armv4t),
@@ -766,28 +766,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.avoid_movs_shop),
         .llvm_name = "avoid-movs-shop",
         .description = "Avoid movs instructions with shifter operand",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
         .index = @enumToInt(Feature.avoid_partial_cpsr),
         .name = @tagName(Feature.avoid_partial_cpsr),
         .llvm_name = "avoid-partial-cpsr",
         .description = "Avoid CPSR partial update for OOO execution",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
         .index = @enumToInt(Feature.cheap_predicable_cpsr),
         .name = @tagName(Feature.cheap_predicable_cpsr),
         .llvm_name = "cheap-predicable-cpsr",
         .description = "Disable +1 predication cost for instructions updating CPSR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crc)] = .{
         .index = @enumToInt(Feature.crc),
         .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Enable support for CRC instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .index = @enumToInt(Feature.crypto),
@@ -805,35 +805,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.d32),
         .llvm_name = "d32",
         .description = "Extend FP to 32 double registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.db)] = .{
         .index = @enumToInt(Feature.db),
         .name = @tagName(Feature.db),
         .llvm_name = "db",
         .description = "Has data barrier (dmb/dsb) instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfb)] = .{
         .index = @enumToInt(Feature.dfb),
         .name = @tagName(Feature.dfb),
         .llvm_name = "dfb",
         .description = "Has full data barrier (dfb) instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.disable_postra_scheduler)] = .{
         .index = @enumToInt(Feature.disable_postra_scheduler),
         .name = @tagName(Feature.disable_postra_scheduler),
         .llvm_name = "disable-postra-scheduler",
         .description = "Don't schedule again after register allocation",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dont_widen_vmovs)] = .{
         .index = @enumToInt(Feature.dont_widen_vmovs),
         .name = @tagName(Feature.dont_widen_vmovs),
         .llvm_name = "dont-widen-vmovs",
         .description = "Don't widen VMOVS to VMOVD",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
         .index = @enumToInt(Feature.dotprod),
@@ -849,21 +849,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.dsp),
         .llvm_name = "dsp",
         .description = "Supports DSP instructions in ARM and/or Thumb2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execute_only)] = .{
         .index = @enumToInt(Feature.execute_only),
         .name = @tagName(Feature.execute_only),
         .llvm_name = "execute-only",
         .description = "Enable the generation of execute only code.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.expand_fp_mlx)] = .{
         .index = @enumToInt(Feature.expand_fp_mlx),
         .name = @tagName(Feature.expand_fp_mlx),
         .llvm_name = "expand-fp-mlx",
         .description = "Expand VFP/NEON MLA/MLS instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos)] = .{
         .index = @enumToInt(Feature.exynos),
@@ -937,7 +937,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fp16),
         .llvm_name = "fp16",
         .description = "Enable half-precision floating point",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
         .index = @enumToInt(Feature.fp16fml),
@@ -962,14 +962,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fpao),
         .llvm_name = "fpao",
         .description = "Enable fast computation of positive address offsets",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs)] = .{
         .index = @enumToInt(Feature.fpregs),
         .name = @tagName(Feature.fpregs),
         .llvm_name = "fpregs",
         .description = "Enable FP registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs16)] = .{
         .index = @enumToInt(Feature.fpregs16),
@@ -1004,28 +1004,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fuse_aes),
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
         .index = @enumToInt(Feature.fuse_literals),
         .name = @tagName(Feature.fuse_literals),
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv)] = .{
         .index = @enumToInt(Feature.hwdiv),
         .name = @tagName(Feature.hwdiv),
         .llvm_name = "hwdiv",
         .description = "Enable divide instructions in Thumb",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv_arm)] = .{
         .index = @enumToInt(Feature.hwdiv_arm),
         .name = @tagName(Feature.hwdiv_arm),
         .llvm_name = "hwdiv-arm",
         .description = "Enable divide instructions in ARM mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.iwmmxt)] = .{
         .index = @enumToInt(Feature.iwmmxt),
@@ -1050,63 +1050,63 @@ pub const all_features = blk: {
         .name = @tagName(Feature.krait),
         .llvm_name = "krait",
         .description = "Qualcomm Krait processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.kryo)] = .{
         .index = @enumToInt(Feature.kryo),
         .name = @tagName(Feature.kryo),
         .llvm_name = "kryo",
         .description = "Qualcomm Kryo processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lob)] = .{
         .index = @enumToInt(Feature.lob),
         .name = @tagName(Feature.lob),
         .llvm_name = "lob",
         .description = "Enable Low Overhead Branch extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
         .index = @enumToInt(Feature.long_calls),
         .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Generate calls via indirect call instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.loop_align)] = .{
         .index = @enumToInt(Feature.loop_align),
         .name = @tagName(Feature.loop_align),
         .llvm_name = "loop-align",
         .description = "Prefer 32-bit alignment for loops",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m3)] = .{
         .index = @enumToInt(Feature.m3),
         .name = @tagName(Feature.m3),
         .llvm_name = "m3",
         .description = "Cortex-M3 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mclass)] = .{
         .index = @enumToInt(Feature.mclass),
         .name = @tagName(Feature.mclass),
         .llvm_name = "mclass",
         .description = "Is microcontroller profile ('M' series)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mp)] = .{
         .index = @enumToInt(Feature.mp),
         .name = @tagName(Feature.mp),
         .llvm_name = "mp",
         .description = "Supports Multiprocessing extension",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.muxed_units)] = .{
         .index = @enumToInt(Feature.muxed_units),
         .name = @tagName(Feature.muxed_units),
         .llvm_name = "muxed-units",
         .description = "Has muxed AGU and NEON/FPU",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mve)] = .{
         .index = @enumToInt(Feature.mve),
@@ -1136,7 +1136,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.nacl_trap),
         .llvm_name = "nacl-trap",
         .description = "NaCl trap",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
         .index = @enumToInt(Feature.neon),
@@ -1152,147 +1152,147 @@ pub const all_features = blk: {
         .name = @tagName(Feature.neon_fpmovs),
         .llvm_name = "neon-fpmovs",
         .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neonfp)] = .{
         .index = @enumToInt(Feature.neonfp),
         .name = @tagName(Feature.neonfp),
         .llvm_name = "neonfp",
         .description = "Use NEON for single precision FP",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_branch_predictor)] = .{
         .index = @enumToInt(Feature.no_branch_predictor),
         .name = @tagName(Feature.no_branch_predictor),
         .llvm_name = "no-branch-predictor",
         .description = "Has no branch predictor",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_movt)] = .{
         .index = @enumToInt(Feature.no_movt),
         .name = @tagName(Feature.no_movt),
         .llvm_name = "no-movt",
         .description = "Don't use movt/movw pairs for 32-bit imms",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
         .index = @enumToInt(Feature.no_neg_immediates),
         .name = @tagName(Feature.no_neg_immediates),
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noarm)] = .{
         .index = @enumToInt(Feature.noarm),
         .name = @tagName(Feature.noarm),
         .llvm_name = "noarm",
         .description = "Does not support ARM mode execution",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nonpipelined_vfp)] = .{
         .index = @enumToInt(Feature.nonpipelined_vfp),
         .name = @tagName(Feature.nonpipelined_vfp),
         .llvm_name = "nonpipelined-vfp",
         .description = "VFP instructions are not pipelined",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.perfmon)] = .{
         .index = @enumToInt(Feature.perfmon),
         .name = @tagName(Feature.perfmon),
         .llvm_name = "perfmon",
         .description = "Enable support for Performance Monitor extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_ishst)] = .{
         .index = @enumToInt(Feature.prefer_ishst),
         .name = @tagName(Feature.prefer_ishst),
         .llvm_name = "prefer-ishst",
         .description = "Prefer ISHST barriers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_vmovsr)] = .{
         .index = @enumToInt(Feature.prefer_vmovsr),
         .name = @tagName(Feature.prefer_vmovsr),
         .llvm_name = "prefer-vmovsr",
         .description = "Prefer VMOVSR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prof_unpr)] = .{
         .index = @enumToInt(Feature.prof_unpr),
         .name = @tagName(Feature.prof_unpr),
         .llvm_name = "prof-unpr",
         .description = "Is profitable to unpredicate",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r4)] = .{
         .index = @enumToInt(Feature.r4),
         .name = @tagName(Feature.r4),
         .llvm_name = "r4",
         .description = "Cortex-R4 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r5)] = .{
         .index = @enumToInt(Feature.r5),
         .name = @tagName(Feature.r5),
         .llvm_name = "r5",
         .description = "Cortex-R5 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r52)] = .{
         .index = @enumToInt(Feature.r52),
         .name = @tagName(Feature.r52),
         .llvm_name = "r52",
         .description = "Cortex-R52 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r7)] = .{
         .index = @enumToInt(Feature.r7),
         .name = @tagName(Feature.r7),
         .llvm_name = "r7",
         .description = "Cortex-R7 ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
         .index = @enumToInt(Feature.ras),
         .name = @tagName(Feature.ras),
         .llvm_name = "ras",
         .description = "Enable Reliability, Availability and Serviceability extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rclass)] = .{
         .index = @enumToInt(Feature.rclass),
         .name = @tagName(Feature.rclass),
         .llvm_name = "rclass",
         .description = "Is realtime profile ('R' series)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.read_tp_hard)] = .{
         .index = @enumToInt(Feature.read_tp_hard),
         .name = @tagName(Feature.read_tp_hard),
         .llvm_name = "read-tp-hard",
         .description = "Reading thread pointer from register",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_r9)] = .{
         .index = @enumToInt(Feature.reserve_r9),
         .name = @tagName(Feature.reserve_r9),
         .llvm_name = "reserve-r9",
         .description = "Reserve R9, making it unavailable as GPR",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ret_addr_stack)] = .{
         .index = @enumToInt(Feature.ret_addr_stack),
         .name = @tagName(Feature.ret_addr_stack),
         .llvm_name = "ret-addr-stack",
         .description = "Has return address stack",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sb)] = .{
         .index = @enumToInt(Feature.sb),
         .name = @tagName(Feature.sb),
         .llvm_name = "sb",
         .description = "Enable v8.5a Speculation Barrier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
         .index = @enumToInt(Feature.sha2),
@@ -1308,49 +1308,49 @@ pub const all_features = blk: {
         .name = @tagName(Feature.slow_fp_brcc),
         .llvm_name = "slow-fp-brcc",
         .description = "FP compare + branch is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_load_D_subreg)] = .{
         .index = @enumToInt(Feature.slow_load_D_subreg),
         .name = @tagName(Feature.slow_load_D_subreg),
         .llvm_name = "slow-load-D-subreg",
         .description = "Loading into D subregs is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_odd_reg)] = .{
         .index = @enumToInt(Feature.slow_odd_reg),
         .name = @tagName(Feature.slow_odd_reg),
         .llvm_name = "slow-odd-reg",
         .description = "VLDM/VSTM starting with an odd register is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vdup32)] = .{
         .index = @enumToInt(Feature.slow_vdup32),
         .name = @tagName(Feature.slow_vdup32),
         .llvm_name = "slow-vdup32",
         .description = "Has slow VDUP32 - prefer VMOV",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vgetlni32)] = .{
         .index = @enumToInt(Feature.slow_vgetlni32),
         .name = @tagName(Feature.slow_vgetlni32),
         .llvm_name = "slow-vgetlni32",
         .description = "Has slow VGETLNi32 - prefer VMOV",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slowfpvmlx)] = .{
         .index = @enumToInt(Feature.slowfpvmlx),
         .name = @tagName(Feature.slowfpvmlx),
         .llvm_name = "slowfpvmlx",
         .description = "Disable VFP / NEON MAC instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .index = @enumToInt(Feature.soft_float),
         .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software floating point features.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.splat_vfp_neon)] = .{
         .index = @enumToInt(Feature.splat_vfp_neon),
@@ -1366,56 +1366,56 @@ pub const all_features = blk: {
         .name = @tagName(Feature.strict_align),
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.swift)] = .{
         .index = @enumToInt(Feature.swift),
         .name = @tagName(Feature.swift),
         .llvm_name = "swift",
         .description = "Swift ARM processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb_mode)] = .{
         .index = @enumToInt(Feature.thumb_mode),
         .name = @tagName(Feature.thumb_mode),
         .llvm_name = "thumb-mode",
         .description = "Thumb mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb2)] = .{
         .index = @enumToInt(Feature.thumb2),
         .name = @tagName(Feature.thumb2),
         .llvm_name = "thumb2",
         .description = "Enable Thumb2 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trustzone)] = .{
         .index = @enumToInt(Feature.trustzone),
         .name = @tagName(Feature.trustzone),
         .llvm_name = "trustzone",
         .description = "Enable support for TrustZone security extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
         .index = @enumToInt(Feature.use_aa),
         .name = @tagName(Feature.use_aa),
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_misched)] = .{
         .index = @enumToInt(Feature.use_misched),
         .name = @tagName(Feature.use_misched),
         .llvm_name = "use-misched",
         .description = "Use the MachineScheduler",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v4t)] = .{
         .index = @enumToInt(Feature.v4t),
         .name = @tagName(Feature.v4t),
         .llvm_name = "v4t",
         .description = "Support ARM v4T instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5t)] = .{
         .index = @enumToInt(Feature.v5t),
@@ -1489,7 +1489,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.v7clrex),
         .llvm_name = "v7clrex",
         .description = "Has v7 clrex instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8)] = .{
         .index = @enumToInt(Feature.v8),
@@ -1714,28 +1714,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.vldn_align),
         .llvm_name = "vldn-align",
         .description = "Check for VLDn unaligned access",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_forwarding)] = .{
         .index = @enumToInt(Feature.vmlx_forwarding),
         .name = @tagName(Feature.vmlx_forwarding),
         .llvm_name = "vmlx-forwarding",
         .description = "Has multiplier accumulator forwarding",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_hazards)] = .{
         .index = @enumToInt(Feature.vmlx_hazards),
         .name = @tagName(Feature.vmlx_hazards),
         .llvm_name = "vmlx-hazards",
         .description = "Has VMLx hazards",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wide_stride_vfp)] = .{
         .index = @enumToInt(Feature.wide_stride_vfp),
         .name = @tagName(Feature.wide_stride_vfp),
         .llvm_name = "wide-stride-vfp",
         .description = "Use a wide stride when allocating VFP registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xscale)] = .{
         .index = @enumToInt(Feature.xscale),
@@ -1751,7 +1751,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.zcz),
         .llvm_name = "zcz",
         .description = "Has zero-cycle zeroing instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -2450,7 +2450,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const iwmmxt = Cpu{
         .name = "iwmmxt",
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index fecb45b69ee7d71532a0643cfc2439f162e6bbee..ac739edc081d1d6c05d34b9bac5b5982829f20b2 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -15,7 +15,7 @@ pub const Feature = enum {
     avr51,
     avr6,
     avrtiny,
-    break,
+    @"break",
     des,
     eijmpcall,
     elpm,
@@ -41,21 +41,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.addsubiw)] = .{
         .index = @enumToInt(Feature.addsubiw),
         .name = @tagName(Feature.addsubiw),
         .llvm_name = "addsubiw",
         .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr0)] = .{
         .index = @enumToInt(Feature.avr0),
         .name = @tagName(Feature.avr0),
         .llvm_name = "avr0",
         .description = "The device is a part of the avr0 family",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr1)] = .{
         .index = @enumToInt(Feature.avr1),
@@ -86,7 +86,7 @@ pub const all_features = blk: {
         .description = "The device is a part of the avr25 family",
         .dependencies = featureSet(&[_]Feature{
             .avr2,
-            .break,
+            .@"break",
             .lpmx,
             .movw,
             .spm,
@@ -119,7 +119,7 @@ pub const all_features = blk: {
         .description = "The device is a part of the avr35 family",
         .dependencies = featureSet(&[_]Feature{
             .avr3,
-            .break,
+            .@"break",
             .lpmx,
             .movw,
             .spm,
@@ -132,7 +132,7 @@ pub const all_features = blk: {
         .description = "The device is a part of the avr4 family",
         .dependencies = featureSet(&[_]Feature{
             .avr2,
-            .break,
+            .@"break",
             .lpmx,
             .movw,
             .mul,
@@ -146,7 +146,7 @@ pub const all_features = blk: {
         .description = "The device is a part of the avr5 family",
         .dependencies = featureSet(&[_]Feature{
             .avr3,
-            .break,
+            .@"break",
             .lpmx,
             .movw,
             .mul,
@@ -180,101 +180,101 @@ pub const all_features = blk: {
         .description = "The device is a part of the avrtiny family",
         .dependencies = featureSet(&[_]Feature{
             .avr0,
-            .break,
+            .@"break",
             .sram,
             .tinyencoding,
         }),
     };
-    result[@enumToInt(Feature.break)] = .{
-        .index = @enumToInt(Feature.break),
-        .name = @tagName(Feature.break),
+    result[@enumToInt(Feature.@"break")] = .{
+        .index = @enumToInt(Feature.@"break"),
+        .name = @tagName(Feature.@"break"),
         .llvm_name = "break",
         .description = "The device supports the `BREAK` debugging instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.des)] = .{
         .index = @enumToInt(Feature.des),
         .name = @tagName(Feature.des),
         .llvm_name = "des",
         .description = "The device supports the `DES k` encryption instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.eijmpcall)] = .{
         .index = @enumToInt(Feature.eijmpcall),
         .name = @tagName(Feature.eijmpcall),
         .llvm_name = "eijmpcall",
         .description = "The device supports the `EIJMP`/`EICALL` instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpm)] = .{
         .index = @enumToInt(Feature.elpm),
         .name = @tagName(Feature.elpm),
         .llvm_name = "elpm",
         .description = "The device supports the ELPM instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpmx)] = .{
         .index = @enumToInt(Feature.elpmx),
         .name = @tagName(Feature.elpmx),
         .llvm_name = "elpmx",
         .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ijmpcall)] = .{
         .index = @enumToInt(Feature.ijmpcall),
         .name = @tagName(Feature.ijmpcall),
         .llvm_name = "ijmpcall",
         .description = "The device supports `IJMP`/`ICALL`instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jmpcall)] = .{
         .index = @enumToInt(Feature.jmpcall),
         .name = @tagName(Feature.jmpcall),
         .llvm_name = "jmpcall",
         .description = "The device supports the `JMP` and `CALL` instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpm)] = .{
         .index = @enumToInt(Feature.lpm),
         .name = @tagName(Feature.lpm),
         .llvm_name = "lpm",
         .description = "The device supports the `LPM` instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpmx)] = .{
         .index = @enumToInt(Feature.lpmx),
         .name = @tagName(Feature.lpmx),
         .llvm_name = "lpmx",
         .description = "The device supports the `LPM Rd, Z[+]` instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movw)] = .{
         .index = @enumToInt(Feature.movw),
         .name = @tagName(Feature.movw),
         .llvm_name = "movw",
         .description = "The device supports the 16-bit MOVW instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mul)] = .{
         .index = @enumToInt(Feature.mul),
         .name = @tagName(Feature.mul),
         .llvm_name = "mul",
         .description = "The device supports the multiplication instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rmw)] = .{
         .index = @enumToInt(Feature.rmw),
         .name = @tagName(Feature.rmw),
         .llvm_name = "rmw",
         .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smallstack)] = .{
         .index = @enumToInt(Feature.smallstack),
         .name = @tagName(Feature.smallstack),
         .llvm_name = "smallstack",
         .description = "The device has an 8-bit stack pointer",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.special)] = .{
         .index = @enumToInt(Feature.special),
@@ -283,7 +283,7 @@ pub const all_features = blk: {
         .description = "Enable use of the entire instruction set - used for debugging",
         .dependencies = featureSet(&[_]Feature{
             .addsubiw,
-            .break,
+            .@"break",
             .des,
             .eijmpcall,
             .elpm,
@@ -305,28 +305,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.spm),
         .llvm_name = "spm",
         .description = "The device supports the `SPM` instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spmx)] = .{
         .index = @enumToInt(Feature.spmx),
         .name = @tagName(Feature.spmx),
         .llvm_name = "spmx",
         .description = "The device supports the `SPM Z+` instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sram)] = .{
         .index = @enumToInt(Feature.sram),
         .name = @tagName(Feature.sram),
         .llvm_name = "sram",
         .description = "The device has random access memory",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tinyencoding)] = .{
         .index = @enumToInt(Feature.tinyencoding),
         .name = @tagName(Feature.tinyencoding),
         .llvm_name = "tinyencoding",
         .description = "The device has Tiny core specific instruction encodings",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xmega)] = .{
         .index = @enumToInt(Feature.xmega),
@@ -2439,3 +2439,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.avrxmega7,
     &cpu.m3000,
 };
+
+pub const baseline_features = featureSet(&[_]Feature{
+    .avr0,
+});
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index bb10a84ff8d36d7c2773a9c6155e1f6c9bcbea76..73ed463bc5d82ffd656f318e33258ab87a8513b2 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -11,28 +11,28 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.alu32)] = .{
         .index = @enumToInt(Feature.alu32),
         .name = @tagName(Feature.alu32),
         .llvm_name = "alu32",
         .description = "Enable ALU32 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dummy)] = .{
         .index = @enumToInt(Feature.dummy),
         .name = @tagName(Feature.dummy),
         .llvm_name = "dummy",
         .description = "unused feature",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dwarfris)] = .{
         .index = @enumToInt(Feature.dwarfris),
         .name = @tagName(Feature.dwarfris),
         .llvm_name = "dwarfris",
         .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -41,27 +41,27 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const probe = Cpu{
         .name = "probe",
         .llvm_name = "probe",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v1 = Cpu{
         .name = "v1",
         .llvm_name = "v1",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v2 = Cpu{
         .name = "v2",
         .llvm_name = "v2",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v3 = Cpu{
         .name = "v3",
         .llvm_name = "v3",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index 441abb9cbd1eb4ff26589c49fdcde83e5a0a91eb..bea73eb7941010e1ad34836ab70a6e2c713dd673 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -32,21 +32,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.duplex)] = .{
         .index = @enumToInt(Feature.duplex),
         .name = @tagName(Feature.duplex),
         .llvm_name = "duplex",
         .description = "Enable generation of duplex instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx)] = .{
         .index = @enumToInt(Feature.hvx),
         .name = @tagName(Feature.hvx),
         .llvm_name = "hvx",
         .description = "Hexagon HVX instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx_length128b)] = .{
         .index = @enumToInt(Feature.hvx_length128b),
@@ -114,28 +114,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Use constant-extended calls",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mem_noshuf)] = .{
         .index = @enumToInt(Feature.mem_noshuf),
         .name = @tagName(Feature.mem_noshuf),
         .llvm_name = "mem_noshuf",
         .description = "Supports mem_noshuf feature",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.memops)] = .{
         .index = @enumToInt(Feature.memops),
         .name = @tagName(Feature.memops),
         .llvm_name = "memops",
         .description = "Use memop instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noreturn_stack_elim)] = .{
         .index = @enumToInt(Feature.noreturn_stack_elim),
         .name = @tagName(Feature.noreturn_stack_elim),
         .llvm_name = "noreturn-stack-elim",
         .description = "Eliminate stack allocation in a noreturn function when possible",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nvj)] = .{
         .index = @enumToInt(Feature.nvj),
@@ -160,70 +160,70 @@ pub const all_features = blk: {
         .name = @tagName(Feature.packets),
         .llvm_name = "packets",
         .description = "Support for instruction packets",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserved_r19)] = .{
         .index = @enumToInt(Feature.reserved_r19),
         .name = @tagName(Feature.reserved_r19),
         .llvm_name = "reserved-r19",
         .description = "Reserve register R19",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.small_data)] = .{
         .index = @enumToInt(Feature.small_data),
         .name = @tagName(Feature.small_data),
         .llvm_name = "small-data",
         .description = "Allow GP-relative addressing of global variables",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5)] = .{
         .index = @enumToInt(Feature.v5),
         .name = @tagName(Feature.v5),
         .llvm_name = "v5",
         .description = "Enable Hexagon V5 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v55)] = .{
         .index = @enumToInt(Feature.v55),
         .name = @tagName(Feature.v55),
         .llvm_name = "v55",
         .description = "Enable Hexagon V55 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v60)] = .{
         .index = @enumToInt(Feature.v60),
         .name = @tagName(Feature.v60),
         .llvm_name = "v60",
         .description = "Enable Hexagon V60 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v62)] = .{
         .index = @enumToInt(Feature.v62),
         .name = @tagName(Feature.v62),
         .llvm_name = "v62",
         .description = "Enable Hexagon V62 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v65)] = .{
         .index = @enumToInt(Feature.v65),
         .name = @tagName(Feature.v65),
         .llvm_name = "v65",
         .description = "Enable Hexagon V65 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v66)] = .{
         .index = @enumToInt(Feature.v66),
         .name = @tagName(Feature.v66),
         .llvm_name = "v66",
         .description = "Enable Hexagon V66 architecture",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zreg)] = .{
         .index = @enumToInt(Feature.zreg),
         .name = @tagName(Feature.zreg),
         .llvm_name = "zreg",
         .description = "Hexagon ZReg extension instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index d4f9df4fbbbad855eb2521839e89f61c4214346a..19ea4d70091fa6c6f809abc362f2cf2f25a57a47 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -57,14 +57,14 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.abs2008)] = .{
         .index = @enumToInt(Feature.abs2008),
         .name = @tagName(Feature.abs2008),
         .llvm_name = "abs2008",
         .description = "Disable IEEE 754-2008 abs.fmt mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cnmips)] = .{
         .index = @enumToInt(Feature.cnmips),
@@ -80,14 +80,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Mips R6 CRC ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dsp)] = .{
         .index = @enumToInt(Feature.dsp),
         .name = @tagName(Feature.dsp),
         .llvm_name = "dsp",
         .description = "Mips DSP ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dspr2)] = .{
         .index = @enumToInt(Feature.dspr2),
@@ -113,63 +113,63 @@ pub const all_features = blk: {
         .name = @tagName(Feature.eva),
         .llvm_name = "eva",
         .description = "Mips EVA ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
         .index = @enumToInt(Feature.fp64),
         .name = @tagName(Feature.fp64),
         .llvm_name = "fp64",
         .description = "Support 64-bit FP registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpxx)] = .{
         .index = @enumToInt(Feature.fpxx),
         .name = @tagName(Feature.fpxx),
         .llvm_name = "fpxx",
         .description = "Support for FPXX",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ginv)] = .{
         .index = @enumToInt(Feature.ginv),
         .name = @tagName(Feature.ginv),
         .llvm_name = "ginv",
         .description = "Mips Global Invalidate ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gp64)] = .{
         .index = @enumToInt(Feature.gp64),
         .name = @tagName(Feature.gp64),
         .llvm_name = "gp64",
         .description = "General Purpose Registers are 64-bit wide",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
         .index = @enumToInt(Feature.long_calls),
         .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Disable use of the jal instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.micromips)] = .{
         .index = @enumToInt(Feature.micromips),
         .name = @tagName(Feature.micromips),
         .llvm_name = "micromips",
         .description = "microMips mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips1)] = .{
         .index = @enumToInt(Feature.mips1),
         .name = @tagName(Feature.mips1),
         .llvm_name = "mips1",
         .description = "Mips I ISA Support [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips16)] = .{
         .index = @enumToInt(Feature.mips16),
         .name = @tagName(Feature.mips16),
         .llvm_name = "mips16",
         .description = "Mips16 mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips2)] = .{
         .index = @enumToInt(Feature.mips2),
@@ -251,14 +251,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.mips3_32),
         .llvm_name = "mips3_32",
         .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips3_32r2)] = .{
         .index = @enumToInt(Feature.mips3_32r2),
         .name = @tagName(Feature.mips3_32r2),
         .llvm_name = "mips3_32r2",
         .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4)] = .{
         .index = @enumToInt(Feature.mips4),
@@ -276,14 +276,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.mips4_32),
         .llvm_name = "mips4_32",
         .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4_32r2)] = .{
         .index = @enumToInt(Feature.mips4_32r2),
         .name = @tagName(Feature.mips4_32r2),
         .llvm_name = "mips4_32r2",
         .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips5)] = .{
         .index = @enumToInt(Feature.mips5),
@@ -300,7 +300,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.mips5_32r2),
         .llvm_name = "mips5_32r2",
         .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips64)] = .{
         .index = @enumToInt(Feature.mips64),
@@ -359,42 +359,42 @@ pub const all_features = blk: {
         .name = @tagName(Feature.msa),
         .llvm_name = "msa",
         .description = "Mips MSA ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mt)] = .{
         .index = @enumToInt(Feature.mt),
         .name = @tagName(Feature.mt),
         .llvm_name = "mt",
         .description = "Mips MT ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nan2008)] = .{
         .index = @enumToInt(Feature.nan2008),
         .name = @tagName(Feature.nan2008),
         .llvm_name = "nan2008",
         .description = "IEEE 754-2008 NaN encoding",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noabicalls)] = .{
         .index = @enumToInt(Feature.noabicalls),
         .name = @tagName(Feature.noabicalls),
         .llvm_name = "noabicalls",
         .description = "Disable SVR4-style position-independent code",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nomadd4)] = .{
         .index = @enumToInt(Feature.nomadd4),
         .name = @tagName(Feature.nomadd4),
         .llvm_name = "nomadd4",
         .description = "Disable 4-operand madd.fmt and related instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nooddspreg)] = .{
         .index = @enumToInt(Feature.nooddspreg),
         .name = @tagName(Feature.nooddspreg),
         .llvm_name = "nooddspreg",
         .description = "Disable odd numbered single-precision registers",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.p5600)] = .{
         .index = @enumToInt(Feature.p5600),
@@ -410,56 +410,56 @@ pub const all_features = blk: {
         .name = @tagName(Feature.ptr64),
         .llvm_name = "ptr64",
         .description = "Pointers are 64-bit wide",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.single_float)] = .{
         .index = @enumToInt(Feature.single_float),
         .name = @tagName(Feature.single_float),
         .llvm_name = "single-float",
         .description = "Only supports single precision float",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .index = @enumToInt(Feature.soft_float),
         .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Does not support floating point instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sym32)] = .{
         .index = @enumToInt(Feature.sym32),
         .name = @tagName(Feature.sym32),
         .llvm_name = "sym32",
         .description = "Symbols are 32 bit on Mips64",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
         .index = @enumToInt(Feature.use_indirect_jump_hazard),
         .name = @tagName(Feature.use_indirect_jump_hazard),
         .llvm_name = "use-indirect-jump-hazard",
         .description = "Use indirect jump guards to prevent certain speculation based attacks",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_tcc_in_div)] = .{
         .index = @enumToInt(Feature.use_tcc_in_div),
         .name = @tagName(Feature.use_tcc_in_div),
         .llvm_name = "use-tcc-in-div",
         .description = "Force the assembler to use trapping",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vfpu)] = .{
         .index = @enumToInt(Feature.vfpu),
         .name = @tagName(Feature.vfpu),
         .llvm_name = "vfpu",
         .description = "Enable vector FPU instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.virt)] = .{
         .index = @enumToInt(Feature.virt),
         .name = @tagName(Feature.virt),
         .llvm_name = "virt",
         .description = "Mips Virtualization ASE",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 21d6a8211d0ac5051bb79c3725ed8e949b867069..9bc184d4da59c7237f624e8afc0a4b9edab87b3d 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -12,35 +12,35 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.ext)] = .{
         .index = @enumToInt(Feature.ext),
         .name = @tagName(Feature.ext),
         .llvm_name = "ext",
         .description = "Enable MSP430-X extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult16)] = .{
         .index = @enumToInt(Feature.hwmult16),
         .name = @tagName(Feature.hwmult16),
         .llvm_name = "hwmult16",
         .description = "Enable 16-bit hardware multiplier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult32)] = .{
         .index = @enumToInt(Feature.hwmult32),
         .name = @tagName(Feature.hwmult32),
         .llvm_name = "hwmult32",
         .description = "Enable 32-bit hardware multiplier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmultf5)] = .{
         .index = @enumToInt(Feature.hwmultf5),
         .name = @tagName(Feature.hwmultf5),
         .llvm_name = "hwmultf5",
         .description = "Enable F5 series hardware multiplier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -49,12 +49,12 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const msp430 = Cpu{
         .name = "msp430",
         .llvm_name = "msp430",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const msp430x = Cpu{
         .name = "msp430x",
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index d277785aff9f49930d146c6918a0a2e899973ad3..3cc4f18a14ec823db6beda228ae04ac97c649d7c 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -33,182 +33,182 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.ptx32)] = .{
         .index = @enumToInt(Feature.ptx32),
         .name = @tagName(Feature.ptx32),
         .llvm_name = "ptx32",
         .description = "Use PTX version 3.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx40)] = .{
         .index = @enumToInt(Feature.ptx40),
         .name = @tagName(Feature.ptx40),
         .llvm_name = "ptx40",
         .description = "Use PTX version 4.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx41)] = .{
         .index = @enumToInt(Feature.ptx41),
         .name = @tagName(Feature.ptx41),
         .llvm_name = "ptx41",
         .description = "Use PTX version 4.1",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx42)] = .{
         .index = @enumToInt(Feature.ptx42),
         .name = @tagName(Feature.ptx42),
         .llvm_name = "ptx42",
         .description = "Use PTX version 4.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx43)] = .{
         .index = @enumToInt(Feature.ptx43),
         .name = @tagName(Feature.ptx43),
         .llvm_name = "ptx43",
         .description = "Use PTX version 4.3",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx50)] = .{
         .index = @enumToInt(Feature.ptx50),
         .name = @tagName(Feature.ptx50),
         .llvm_name = "ptx50",
         .description = "Use PTX version 5.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx60)] = .{
         .index = @enumToInt(Feature.ptx60),
         .name = @tagName(Feature.ptx60),
         .llvm_name = "ptx60",
         .description = "Use PTX version 6.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx61)] = .{
         .index = @enumToInt(Feature.ptx61),
         .name = @tagName(Feature.ptx61),
         .llvm_name = "ptx61",
         .description = "Use PTX version 6.1",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx63)] = .{
         .index = @enumToInt(Feature.ptx63),
         .name = @tagName(Feature.ptx63),
         .llvm_name = "ptx63",
         .description = "Use PTX version 6.3",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx64)] = .{
         .index = @enumToInt(Feature.ptx64),
         .name = @tagName(Feature.ptx64),
         .llvm_name = "ptx64",
         .description = "Use PTX version 6.4",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_20)] = .{
         .index = @enumToInt(Feature.sm_20),
         .name = @tagName(Feature.sm_20),
         .llvm_name = "sm_20",
         .description = "Target SM 2.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_21)] = .{
         .index = @enumToInt(Feature.sm_21),
         .name = @tagName(Feature.sm_21),
         .llvm_name = "sm_21",
         .description = "Target SM 2.1",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_30)] = .{
         .index = @enumToInt(Feature.sm_30),
         .name = @tagName(Feature.sm_30),
         .llvm_name = "sm_30",
         .description = "Target SM 3.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_32)] = .{
         .index = @enumToInt(Feature.sm_32),
         .name = @tagName(Feature.sm_32),
         .llvm_name = "sm_32",
         .description = "Target SM 3.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_35)] = .{
         .index = @enumToInt(Feature.sm_35),
         .name = @tagName(Feature.sm_35),
         .llvm_name = "sm_35",
         .description = "Target SM 3.5",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_37)] = .{
         .index = @enumToInt(Feature.sm_37),
         .name = @tagName(Feature.sm_37),
         .llvm_name = "sm_37",
         .description = "Target SM 3.7",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_50)] = .{
         .index = @enumToInt(Feature.sm_50),
         .name = @tagName(Feature.sm_50),
         .llvm_name = "sm_50",
         .description = "Target SM 5.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_52)] = .{
         .index = @enumToInt(Feature.sm_52),
         .name = @tagName(Feature.sm_52),
         .llvm_name = "sm_52",
         .description = "Target SM 5.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_53)] = .{
         .index = @enumToInt(Feature.sm_53),
         .name = @tagName(Feature.sm_53),
         .llvm_name = "sm_53",
         .description = "Target SM 5.3",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_60)] = .{
         .index = @enumToInt(Feature.sm_60),
         .name = @tagName(Feature.sm_60),
         .llvm_name = "sm_60",
         .description = "Target SM 6.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_61)] = .{
         .index = @enumToInt(Feature.sm_61),
         .name = @tagName(Feature.sm_61),
         .llvm_name = "sm_61",
         .description = "Target SM 6.1",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_62)] = .{
         .index = @enumToInt(Feature.sm_62),
         .name = @tagName(Feature.sm_62),
         .llvm_name = "sm_62",
         .description = "Target SM 6.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_70)] = .{
         .index = @enumToInt(Feature.sm_70),
         .name = @tagName(Feature.sm_70),
         .llvm_name = "sm_70",
         .description = "Target SM 7.0",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_72)] = .{
         .index = @enumToInt(Feature.sm_72),
         .name = @tagName(Feature.sm_72),
         .llvm_name = "sm_72",
         .description = "Target SM 7.2",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_75)] = .{
         .index = @enumToInt(Feature.sm_75),
         .name = @tagName(Feature.sm_75),
         .llvm_name = "sm_75",
         .description = "Target SM 7.5",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index bac15f231af1a9fe8f6bb761566c380ad62e3d2a..3dfc2d7beabab54681eba11d24e09434d655ce45 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -59,21 +59,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"64bit")] = .{
         .index = @enumToInt(Feature.@"64bit"),
         .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Enable 64-bit instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"64bitregs")] = .{
         .index = @enumToInt(Feature.@"64bitregs"),
         .name = @tagName(Feature.@"64bitregs"),
         .llvm_name = "64bitregs",
         .description = "Enable 64-bit registers usage for ppc32 [beta]",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altivec)] = .{
         .index = @enumToInt(Feature.altivec),
@@ -98,21 +98,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.bpermd),
         .llvm_name = "bpermd",
         .description = "Enable the bpermd instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmpb)] = .{
         .index = @enumToInt(Feature.cmpb),
         .name = @tagName(Feature.cmpb),
         .llvm_name = "cmpb",
         .description = "Enable the cmpb instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crbits)] = .{
         .index = @enumToInt(Feature.crbits),
         .name = @tagName(Feature.crbits),
         .llvm_name = "crbits",
         .description = "Use condition-register bits individually",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .index = @enumToInt(Feature.crypto),
@@ -137,14 +137,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.e500),
         .llvm_name = "e500",
         .description = "Enable E500/E500mc instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.extdiv)] = .{
         .index = @enumToInt(Feature.extdiv),
         .name = @tagName(Feature.extdiv),
         .llvm_name = "extdiv",
         .description = "Enable extended divide instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fcpsgn)] = .{
         .index = @enumToInt(Feature.fcpsgn),
@@ -241,49 +241,49 @@ pub const all_features = blk: {
         .name = @tagName(Feature.hard_float),
         .llvm_name = "hard-float",
         .description = "Enable floating-point instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.htm)] = .{
         .index = @enumToInt(Feature.htm),
         .name = @tagName(Feature.htm),
         .llvm_name = "htm",
         .description = "Enable Hardware Transactional Memory instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.icbt)] = .{
         .index = @enumToInt(Feature.icbt),
         .name = @tagName(Feature.icbt),
         .llvm_name = "icbt",
         .description = "Enable icbt instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invariant_function_descriptors)] = .{
         .index = @enumToInt(Feature.invariant_function_descriptors),
         .name = @tagName(Feature.invariant_function_descriptors),
         .llvm_name = "invariant-function-descriptors",
         .description = "Assume function descriptors are invariant",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isa_v30_instructions)] = .{
         .index = @enumToInt(Feature.isa_v30_instructions),
         .name = @tagName(Feature.isa_v30_instructions),
         .llvm_name = "isa-v30-instructions",
         .description = "Enable instructions added in ISA 3.0.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isel)] = .{
         .index = @enumToInt(Feature.isel),
         .name = @tagName(Feature.isel),
         .llvm_name = "isel",
         .description = "Enable the isel instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldbrx)] = .{
         .index = @enumToInt(Feature.ldbrx),
         .name = @tagName(Feature.ldbrx),
         .llvm_name = "ldbrx",
         .description = "Enable the ldbrx instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lfiwax)] = .{
         .index = @enumToInt(Feature.lfiwax),
@@ -299,14 +299,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.longcall),
         .llvm_name = "longcall",
         .description = "Always use indirect calls",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mfocrf)] = .{
         .index = @enumToInt(Feature.mfocrf),
         .name = @tagName(Feature.mfocrf),
         .llvm_name = "mfocrf",
         .description = "Enable the MFOCRF instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.msync)] = .{
         .index = @enumToInt(Feature.msync),
@@ -322,14 +322,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.partword_atomics),
         .llvm_name = "partword-atomics",
         .description = "Enable l[bh]arx and st[bh]cx.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcntd)] = .{
         .index = @enumToInt(Feature.popcntd),
         .name = @tagName(Feature.popcntd),
         .llvm_name = "popcntd",
         .description = "Enable the popcnt[dw] instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.power8_altivec)] = .{
         .index = @enumToInt(Feature.power8_altivec),
@@ -376,28 +376,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.ppc_postra_sched),
         .llvm_name = "ppc-postra-sched",
         .description = "Use PowerPC post-RA scheduling strategy",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc_prera_sched)] = .{
         .index = @enumToInt(Feature.ppc_prera_sched),
         .name = @tagName(Feature.ppc_prera_sched),
         .llvm_name = "ppc-prera-sched",
         .description = "Use PowerPC pre-RA scheduling strategy",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc4xx)] = .{
         .index = @enumToInt(Feature.ppc4xx),
         .name = @tagName(Feature.ppc4xx),
         .llvm_name = "ppc4xx",
         .description = "Enable PPC 4xx instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc6xx)] = .{
         .index = @enumToInt(Feature.ppc6xx),
         .name = @tagName(Feature.ppc6xx),
         .llvm_name = "ppc6xx",
         .description = "Enable PPC 6xx instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.qpx)] = .{
         .index = @enumToInt(Feature.qpx),
@@ -413,21 +413,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.recipprec),
         .llvm_name = "recipprec",
         .description = "Assume higher precision reciprocal estimates",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.secure_plt)] = .{
         .index = @enumToInt(Feature.secure_plt),
         .name = @tagName(Feature.secure_plt),
         .llvm_name = "secure-plt",
         .description = "Enable secure plt mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_popcntd)] = .{
         .index = @enumToInt(Feature.slow_popcntd),
         .name = @tagName(Feature.slow_popcntd),
         .llvm_name = "slow-popcntd",
         .description = "Has slow popcnt[dw] instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spe)] = .{
         .index = @enumToInt(Feature.spe),
@@ -452,14 +452,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.two_const_nr),
         .llvm_name = "two-const-nr",
         .description = "Requires two constant Newton-Raphson computation",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vectors_use_two_units)] = .{
         .index = @enumToInt(Feature.vectors_use_two_units),
         .name = @tagName(Feature.vectors_use_two_units),
         .llvm_name = "vectors-use-two-units",
         .description = "Vectors use two units",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vsx)] = .{
         .index = @enumToInt(Feature.vsx),
@@ -475,7 +475,7 @@ pub const all_features = blk: {
 
 pub const cpu = struct {
     pub const @"440" = Cpu{
-        .name = "@"440"",
+        .name = "440",
         .llvm_name = "440",
         .features = featureSet(&[_]Feature{
             .booke,
@@ -487,7 +487,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"450" = Cpu{
-        .name = "@"450"",
+        .name = "450",
         .llvm_name = "450",
         .features = featureSet(&[_]Feature{
             .booke,
@@ -499,21 +499,21 @@ pub const cpu = struct {
         }),
     };
     pub const @"601" = Cpu{
-        .name = "@"601"",
+        .name = "601",
         .llvm_name = "601",
         .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     pub const @"602" = Cpu{
-        .name = "@"602"",
+        .name = "602",
         .llvm_name = "602",
         .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     pub const @"603" = Cpu{
-        .name = "@"603"",
+        .name = "603",
         .llvm_name = "603",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -521,7 +521,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"603e" = Cpu{
-        .name = "@"603e"",
+        .name = "603e",
         .llvm_name = "603e",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -529,7 +529,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"603ev" = Cpu{
-        .name = "@"603ev"",
+        .name = "603ev",
         .llvm_name = "603ev",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -537,7 +537,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"604" = Cpu{
-        .name = "@"604"",
+        .name = "604",
         .llvm_name = "604",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -545,7 +545,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"604e" = Cpu{
-        .name = "@"604e"",
+        .name = "604e",
         .llvm_name = "604e",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -553,7 +553,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"620" = Cpu{
-        .name = "@"620"",
+        .name = "620",
         .llvm_name = "620",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -561,7 +561,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"7400" = Cpu{
-        .name = "@"7400"",
+        .name = "7400",
         .llvm_name = "7400",
         .features = featureSet(&[_]Feature{
             .altivec,
@@ -570,7 +570,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"7450" = Cpu{
-        .name = "@"7450"",
+        .name = "7450",
         .llvm_name = "7450",
         .features = featureSet(&[_]Feature{
             .altivec,
@@ -579,7 +579,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"750" = Cpu{
-        .name = "@"750"",
+        .name = "750",
         .llvm_name = "750",
         .features = featureSet(&[_]Feature{
             .fres,
@@ -587,7 +587,7 @@ pub const cpu = struct {
         }),
     };
     pub const @"970" = Cpu{
-        .name = "@"970"",
+        .name = "970",
         .llvm_name = "970",
         .features = featureSet(&[_]Feature{
             .@"64bit",
@@ -698,7 +698,7 @@ pub const cpu = struct {
             .frsqrte,
         }),
     };
-    pub const g4+ = Cpu{
+    pub const @"g4+" = Cpu{
         .name = "g4+",
         .llvm_name = "g4+",
         .features = featureSet(&[_]Feature{
@@ -1016,7 +1016,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.e5500,
     &cpu.g3,
     &cpu.g4,
-    &cpu.g4+,
+    &cpu.@"g4+",
     &cpu.g5,
     &cpu.generic,
     &cpu.ppc,
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index dbe36e0fa1d53a060e7195b5fd1eb4d138c428e9..ee0d6509df370baf3a10dfcb11c0519a92eceb21 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -16,28 +16,28 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"64bit")] = .{
         .index = @enumToInt(Feature.@"64bit"),
         .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Implements RV64",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a)] = .{
         .index = @enumToInt(Feature.a),
         .name = @tagName(Feature.a),
         .llvm_name = "a",
         .description = "'A' (Atomic Instructions)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.c)] = .{
         .index = @enumToInt(Feature.c),
         .name = @tagName(Feature.c),
         .llvm_name = "c",
         .description = "'C' (Compressed Instructions)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.d)] = .{
         .index = @enumToInt(Feature.d),
@@ -53,28 +53,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.e),
         .llvm_name = "e",
         .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f)] = .{
         .index = @enumToInt(Feature.f),
         .name = @tagName(Feature.f),
         .llvm_name = "f",
         .description = "'F' (Single-Precision Floating-Point)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m)] = .{
         .index = @enumToInt(Feature.m),
         .name = @tagName(Feature.m),
         .llvm_name = "m",
         .description = "'M' (Integer Multiplication and Division)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.relax)] = .{
         .index = @enumToInt(Feature.relax),
         .name = @tagName(Feature.relax),
         .llvm_name = "relax",
         .description = "Enable Linker relaxation.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -83,7 +83,7 @@ pub const cpu = struct {
     pub const generic_rv32 = Cpu{
         .name = "generic_rv32",
         .llvm_name = "generic-rv32",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const generic_rv64 = Cpu{
         .name = "generic_rv64",
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index 6b1787f31f8b2e82137e42d9f14a5f5183d070fc..da7649e8316bd6458d342b4f9a6631affc7ab62b 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -27,140 +27,140 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.deprecated_v8)] = .{
         .index = @enumToInt(Feature.deprecated_v8),
         .name = @tagName(Feature.deprecated_v8),
         .llvm_name = "deprecated-v8",
         .description = "Enable deprecated V8 instructions in V9 mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.detectroundchange)] = .{
         .index = @enumToInt(Feature.detectroundchange),
         .name = @tagName(Feature.detectroundchange),
         .llvm_name = "detectroundchange",
         .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fixallfdivsqrt)] = .{
         .index = @enumToInt(Feature.fixallfdivsqrt),
         .name = @tagName(Feature.fixallfdivsqrt),
         .llvm_name = "fixallfdivsqrt",
         .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hard_quad_float)] = .{
         .index = @enumToInt(Feature.hard_quad_float),
         .name = @tagName(Feature.hard_quad_float),
         .llvm_name = "hard-quad-float",
         .description = "Enable quad-word floating point instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasleoncasa)] = .{
         .index = @enumToInt(Feature.hasleoncasa),
         .name = @tagName(Feature.hasleoncasa),
         .llvm_name = "hasleoncasa",
         .description = "Enable CASA instruction for LEON3 and LEON4 processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasumacsmac)] = .{
         .index = @enumToInt(Feature.hasumacsmac),
         .name = @tagName(Feature.hasumacsmac),
         .llvm_name = "hasumacsmac",
         .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insertnopload)] = .{
         .index = @enumToInt(Feature.insertnopload),
         .name = @tagName(Feature.insertnopload),
         .llvm_name = "insertnopload",
         .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leon)] = .{
         .index = @enumToInt(Feature.leon),
         .name = @tagName(Feature.leon),
         .llvm_name = "leon",
         .description = "Enable LEON extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leoncyclecounter)] = .{
         .index = @enumToInt(Feature.leoncyclecounter),
         .name = @tagName(Feature.leoncyclecounter),
         .llvm_name = "leoncyclecounter",
         .description = "Use the Leon cycle counter register",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leonpwrpsr)] = .{
         .index = @enumToInt(Feature.leonpwrpsr),
         .name = @tagName(Feature.leonpwrpsr),
         .llvm_name = "leonpwrpsr",
         .description = "Enable the PWRPSR instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fmuls)] = .{
         .index = @enumToInt(Feature.no_fmuls),
         .name = @tagName(Feature.no_fmuls),
         .llvm_name = "no-fmuls",
         .description = "Disable the fmuls instruction.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fsmuld)] = .{
         .index = @enumToInt(Feature.no_fsmuld),
         .name = @tagName(Feature.no_fsmuld),
         .llvm_name = "no-fsmuld",
         .description = "Disable the fsmuld instruction.",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popc)] = .{
         .index = @enumToInt(Feature.popc),
         .name = @tagName(Feature.popc),
         .llvm_name = "popc",
         .description = "Use the popc (population count) instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .index = @enumToInt(Feature.soft_float),
         .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software emulation for floating point",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_mul_div)] = .{
         .index = @enumToInt(Feature.soft_mul_div),
         .name = @tagName(Feature.soft_mul_div),
         .llvm_name = "soft-mul-div",
         .description = "Use software emulation for integer multiply and divide",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v9)] = .{
         .index = @enumToInt(Feature.v9),
         .name = @tagName(Feature.v9),
         .llvm_name = "v9",
         .description = "Enable SPARC-V9 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis)] = .{
         .index = @enumToInt(Feature.vis),
         .name = @tagName(Feature.vis),
         .llvm_name = "vis",
         .description = "Enable UltraSPARC Visual Instruction Set extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis2)] = .{
         .index = @enumToInt(Feature.vis2),
         .name = @tagName(Feature.vis2),
         .llvm_name = "vis2",
         .description = "Enable Visual Instruction Set extensions II",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis3)] = .{
         .index = @enumToInt(Feature.vis3),
         .name = @tagName(Feature.vis3),
         .llvm_name = "vis3",
         .description = "Enable Visual Instruction Set extensions III",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -185,12 +185,12 @@ pub const cpu = struct {
     pub const f934 = Cpu{
         .name = "f934",
         .llvm_name = "f934",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const gr712rc = Cpu{
         .name = "gr712rc",
@@ -214,7 +214,7 @@ pub const cpu = struct {
     pub const hypersparc = Cpu{
         .name = "hypersparc",
         .llvm_name = "hypersparc",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const leon2 = Cpu{
         .name = "leon2",
@@ -407,27 +407,27 @@ pub const cpu = struct {
     pub const sparclet = Cpu{
         .name = "sparclet",
         .llvm_name = "sparclet",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const sparclite = Cpu{
         .name = "sparclite",
         .llvm_name = "sparclite",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const sparclite86x = Cpu{
         .name = "sparclite86x",
         .llvm_name = "sparclite86x",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const supersparc = Cpu{
         .name = "supersparc",
         .llvm_name = "supersparc",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const tsc701 = Cpu{
         .name = "tsc701",
         .llvm_name = "tsc701",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const ultrasparc = Cpu{
         .name = "ultrasparc",
@@ -470,7 +470,7 @@ pub const cpu = struct {
     pub const v8 = Cpu{
         .name = "v8",
         .llvm_name = "v8",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v9 = Cpu{
         .name = "v9",
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 3479ebf7b4fa1fe1f0cc2e8343f67bfb1f9e7e82..aaee832c28a8b7db4be08b822970f081e0e9cad1 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -43,252 +43,252 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.deflate_conversion)] = .{
         .index = @enumToInt(Feature.deflate_conversion),
         .name = @tagName(Feature.deflate_conversion),
         .llvm_name = "deflate-conversion",
         .description = "Assume that the deflate-conversion facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_packed_conversion)] = .{
         .index = @enumToInt(Feature.dfp_packed_conversion),
         .name = @tagName(Feature.dfp_packed_conversion),
         .llvm_name = "dfp-packed-conversion",
         .description = "Assume that the DFP packed-conversion facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
         .index = @enumToInt(Feature.dfp_zoned_conversion),
         .name = @tagName(Feature.dfp_zoned_conversion),
         .llvm_name = "dfp-zoned-conversion",
         .description = "Assume that the DFP zoned-conversion facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.distinct_ops)] = .{
         .index = @enumToInt(Feature.distinct_ops),
         .name = @tagName(Feature.distinct_ops),
         .llvm_name = "distinct-ops",
         .description = "Assume that the distinct-operands facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_dat_2)] = .{
         .index = @enumToInt(Feature.enhanced_dat_2),
         .name = @tagName(Feature.enhanced_dat_2),
         .llvm_name = "enhanced-dat-2",
         .description = "Assume that the enhanced-DAT facility 2 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_sort)] = .{
         .index = @enumToInt(Feature.enhanced_sort),
         .name = @tagName(Feature.enhanced_sort),
         .llvm_name = "enhanced-sort",
         .description = "Assume that the enhanced-sort facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execution_hint)] = .{
         .index = @enumToInt(Feature.execution_hint),
         .name = @tagName(Feature.execution_hint),
         .llvm_name = "execution-hint",
         .description = "Assume that the execution-hint facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_serialization)] = .{
         .index = @enumToInt(Feature.fast_serialization),
         .name = @tagName(Feature.fast_serialization),
         .llvm_name = "fast-serialization",
         .description = "Assume that the fast-serialization facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_extension)] = .{
         .index = @enumToInt(Feature.fp_extension),
         .name = @tagName(Feature.fp_extension),
         .llvm_name = "fp-extension",
         .description = "Assume that the floating-point extension facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.guarded_storage)] = .{
         .index = @enumToInt(Feature.guarded_storage),
         .name = @tagName(Feature.guarded_storage),
         .llvm_name = "guarded-storage",
         .description = "Assume that the guarded-storage facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.high_word)] = .{
         .index = @enumToInt(Feature.high_word),
         .name = @tagName(Feature.high_word),
         .llvm_name = "high-word",
         .description = "Assume that the high-word facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
         .index = @enumToInt(Feature.insert_reference_bits_multiple),
         .name = @tagName(Feature.insert_reference_bits_multiple),
         .llvm_name = "insert-reference-bits-multiple",
         .description = "Assume that the insert-reference-bits-multiple facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.interlocked_access1)] = .{
         .index = @enumToInt(Feature.interlocked_access1),
         .name = @tagName(Feature.interlocked_access1),
         .llvm_name = "interlocked-access1",
         .description = "Assume that interlocked-access facility 1 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_trap)] = .{
         .index = @enumToInt(Feature.load_and_trap),
         .name = @tagName(Feature.load_and_trap),
         .llvm_name = "load-and-trap",
         .description = "Assume that the load-and-trap facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
         .index = @enumToInt(Feature.load_and_zero_rightmost_byte),
         .name = @tagName(Feature.load_and_zero_rightmost_byte),
         .llvm_name = "load-and-zero-rightmost-byte",
         .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond)] = .{
         .index = @enumToInt(Feature.load_store_on_cond),
         .name = @tagName(Feature.load_store_on_cond),
         .llvm_name = "load-store-on-cond",
         .description = "Assume that the load/store-on-condition facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond_2)] = .{
         .index = @enumToInt(Feature.load_store_on_cond_2),
         .name = @tagName(Feature.load_store_on_cond_2),
         .llvm_name = "load-store-on-cond-2",
         .description = "Assume that the load/store-on-condition facility 2 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension3)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension3),
         .name = @tagName(Feature.message_security_assist_extension3),
         .llvm_name = "message-security-assist-extension3",
         .description = "Assume that the message-security-assist extension facility 3 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension4)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension4),
         .name = @tagName(Feature.message_security_assist_extension4),
         .llvm_name = "message-security-assist-extension4",
         .description = "Assume that the message-security-assist extension facility 4 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension5)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension5),
         .name = @tagName(Feature.message_security_assist_extension5),
         .llvm_name = "message-security-assist-extension5",
         .description = "Assume that the message-security-assist extension facility 5 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension7)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension7),
         .name = @tagName(Feature.message_security_assist_extension7),
         .llvm_name = "message-security-assist-extension7",
         .description = "Assume that the message-security-assist extension facility 7 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension8)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension8),
         .name = @tagName(Feature.message_security_assist_extension8),
         .llvm_name = "message-security-assist-extension8",
         .description = "Assume that the message-security-assist extension facility 8 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension9)] = .{
         .index = @enumToInt(Feature.message_security_assist_extension9),
         .name = @tagName(Feature.message_security_assist_extension9),
         .llvm_name = "message-security-assist-extension9",
         .description = "Assume that the message-security-assist extension facility 9 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions)] = .{
         .index = @enumToInt(Feature.miscellaneous_extensions),
         .name = @tagName(Feature.miscellaneous_extensions),
         .llvm_name = "miscellaneous-extensions",
         .description = "Assume that the miscellaneous-extensions facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
         .index = @enumToInt(Feature.miscellaneous_extensions_2),
         .name = @tagName(Feature.miscellaneous_extensions_2),
         .llvm_name = "miscellaneous-extensions-2",
         .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
         .index = @enumToInt(Feature.miscellaneous_extensions_3),
         .name = @tagName(Feature.miscellaneous_extensions_3),
         .llvm_name = "miscellaneous-extensions-3",
         .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.population_count)] = .{
         .index = @enumToInt(Feature.population_count),
         .name = @tagName(Feature.population_count),
         .llvm_name = "population-count",
         .description = "Assume that the population-count facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.processor_assist)] = .{
         .index = @enumToInt(Feature.processor_assist),
         .name = @tagName(Feature.processor_assist),
         .llvm_name = "processor-assist",
         .description = "Assume that the processor-assist facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
         .index = @enumToInt(Feature.reset_reference_bits_multiple),
         .name = @tagName(Feature.reset_reference_bits_multiple),
         .llvm_name = "reset-reference-bits-multiple",
         .description = "Assume that the reset-reference-bits-multiple facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.transactional_execution)] = .{
         .index = @enumToInt(Feature.transactional_execution),
         .name = @tagName(Feature.transactional_execution),
         .llvm_name = "transactional-execution",
         .description = "Assume that the transactional-execution facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector)] = .{
         .index = @enumToInt(Feature.vector),
         .name = @tagName(Feature.vector),
         .llvm_name = "vector",
         .description = "Assume that the vectory facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_1)] = .{
         .index = @enumToInt(Feature.vector_enhancements_1),
         .name = @tagName(Feature.vector_enhancements_1),
         .llvm_name = "vector-enhancements-1",
         .description = "Assume that the vector enhancements facility 1 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_2)] = .{
         .index = @enumToInt(Feature.vector_enhancements_2),
         .name = @tagName(Feature.vector_enhancements_2),
         .llvm_name = "vector-enhancements-2",
         .description = "Assume that the vector enhancements facility 2 is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal)] = .{
         .index = @enumToInt(Feature.vector_packed_decimal),
         .name = @tagName(Feature.vector_packed_decimal),
         .llvm_name = "vector-packed-decimal",
         .description = "Assume that the vector packed decimal facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
         .index = @enumToInt(Feature.vector_packed_decimal_enhancement),
         .name = @tagName(Feature.vector_packed_decimal_enhancement),
         .llvm_name = "vector-packed-decimal-enhancement",
         .description = "Assume that the vector packed decimal enhancement facility is installed",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -424,7 +424,7 @@ pub const cpu = struct {
     pub const arch8 = Cpu{
         .name = "arch8",
         .llvm_name = "arch8",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const arch9 = Cpu{
         .name = "arch9",
@@ -445,12 +445,12 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const z10 = Cpu{
         .name = "z10",
         .llvm_name = "z10",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const z13 = Cpu{
         .name = "z13",
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 8546b067dd2dcd2adff538b18402fd20656e3b70..3df17d503b4a38d896f29a0d49baade17fd9bad2 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -18,70 +18,70 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.atomics)] = .{
         .index = @enumToInt(Feature.atomics),
         .name = @tagName(Feature.atomics),
         .llvm_name = "atomics",
         .description = "Enable Atomics",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bulk_memory)] = .{
         .index = @enumToInt(Feature.bulk_memory),
         .name = @tagName(Feature.bulk_memory),
         .llvm_name = "bulk-memory",
         .description = "Enable bulk memory operations",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exception_handling)] = .{
         .index = @enumToInt(Feature.exception_handling),
         .name = @tagName(Feature.exception_handling),
         .llvm_name = "exception-handling",
         .description = "Enable Wasm exception handling",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.multivalue)] = .{
         .index = @enumToInt(Feature.multivalue),
         .name = @tagName(Feature.multivalue),
         .llvm_name = "multivalue",
         .description = "Enable multivalue blocks, instructions, and functions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mutable_globals)] = .{
         .index = @enumToInt(Feature.mutable_globals),
         .name = @tagName(Feature.mutable_globals),
         .llvm_name = "mutable-globals",
         .description = "Enable mutable globals",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nontrapping_fptoint)] = .{
         .index = @enumToInt(Feature.nontrapping_fptoint),
         .name = @tagName(Feature.nontrapping_fptoint),
         .llvm_name = "nontrapping-fptoint",
         .description = "Enable non-trapping float-to-int conversion operators",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sign_ext)] = .{
         .index = @enumToInt(Feature.sign_ext),
         .name = @tagName(Feature.sign_ext),
         .llvm_name = "sign-ext",
         .description = "Enable sign extension operators",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.simd128)] = .{
         .index = @enumToInt(Feature.simd128),
         .name = @tagName(Feature.simd128),
         .llvm_name = "simd128",
         .description = "Enable 128-bit SIMD",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tail_call)] = .{
         .index = @enumToInt(Feature.tail_call),
         .name = @tagName(Feature.tail_call),
         .llvm_name = "tail-call",
         .description = "Enable tail call instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unimplemented_simd128)] = .{
         .index = @enumToInt(Feature.unimplemented_simd128),
@@ -110,12 +110,12 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const mvp = Cpu{
         .name = "mvp",
         .llvm_name = "mvp",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 9d3b57440125b4b76f0cb992363134f619805d51..7f1ec42dab0e5581243687cfce5e75751d1243b5 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -132,21 +132,21 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= @typeInfo(Cpu.Feature.Set).Int.bits);
+    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"16bit_mode")] = .{
         .index = @enumToInt(Feature.@"16bit_mode"),
         .name = @tagName(Feature.@"16bit_mode"),
         .llvm_name = "16bit-mode",
         .description = "16-bit mode (i8086)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"32bit_mode")] = .{
         .index = @enumToInt(Feature.@"32bit_mode"),
         .name = @tagName(Feature.@"32bit_mode"),
         .llvm_name = "32bit-mode",
         .description = "32-bit mode (80386)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"3dnow")] = .{
         .index = @enumToInt(Feature.@"3dnow"),
@@ -171,21 +171,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Support 64-bit instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"64bit_mode")] = .{
         .index = @enumToInt(Feature.@"64bit_mode"),
         .name = @tagName(Feature.@"64bit_mode"),
         .llvm_name = "64bit-mode",
         .description = "64-bit mode (x86_64)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.adx)] = .{
         .index = @enumToInt(Feature.adx),
         .name = @tagName(Feature.adx),
         .llvm_name = "adx",
         .description = "Support ADX instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
         .index = @enumToInt(Feature.aes),
@@ -356,56 +356,56 @@ pub const all_features = blk: {
         .name = @tagName(Feature.bmi),
         .llvm_name = "bmi",
         .description = "Support BMI instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bmi2)] = .{
         .index = @enumToInt(Feature.bmi2),
         .name = @tagName(Feature.bmi2),
         .llvm_name = "bmi2",
         .description = "Support BMI2 instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.branchfusion)] = .{
         .index = @enumToInt(Feature.branchfusion),
         .name = @tagName(Feature.branchfusion),
         .llvm_name = "branchfusion",
         .description = "CMP/TEST can be fused with conditional branches",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cldemote)] = .{
         .index = @enumToInt(Feature.cldemote),
         .name = @tagName(Feature.cldemote),
         .llvm_name = "cldemote",
         .description = "Enable Cache Demote",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clflushopt)] = .{
         .index = @enumToInt(Feature.clflushopt),
         .name = @tagName(Feature.clflushopt),
         .llvm_name = "clflushopt",
         .description = "Flush A Cache Line Optimized",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clwb)] = .{
         .index = @enumToInt(Feature.clwb),
         .name = @tagName(Feature.clwb),
         .llvm_name = "clwb",
         .description = "Cache Line Write Back",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clzero)] = .{
         .index = @enumToInt(Feature.clzero),
         .name = @tagName(Feature.clzero),
         .llvm_name = "clzero",
         .description = "Enable Cache Line Zero",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmov)] = .{
         .index = @enumToInt(Feature.cmov),
         .name = @tagName(Feature.cmov),
         .llvm_name = "cmov",
         .description = "Enable conditional move instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cx16)] = .{
         .index = @enumToInt(Feature.cx16),
@@ -421,21 +421,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.cx8),
         .llvm_name = "cx8",
         .description = "Support CMPXCHG8B instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enqcmd)] = .{
         .index = @enumToInt(Feature.enqcmd),
         .name = @tagName(Feature.enqcmd),
         .llvm_name = "enqcmd",
         .description = "Has ENQCMD instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ermsb)] = .{
         .index = @enumToInt(Feature.ermsb),
         .name = @tagName(Feature.ermsb),
         .llvm_name = "ermsb",
         .description = "REP MOVS/STOS are fast",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f16c)] = .{
         .index = @enumToInt(Feature.f16c),
@@ -451,42 +451,42 @@ pub const all_features = blk: {
         .name = @tagName(Feature.false_deps_lzcnt_tzcnt),
         .llvm_name = "false-deps-lzcnt-tzcnt",
         .description = "LZCNT/TZCNT have a false dependency on dest register",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.false_deps_popcnt)] = .{
         .index = @enumToInt(Feature.false_deps_popcnt),
         .name = @tagName(Feature.false_deps_popcnt),
         .llvm_name = "false-deps-popcnt",
         .description = "POPCNT has a false dependency on dest register",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_11bytenop)] = .{
         .index = @enumToInt(Feature.fast_11bytenop),
         .name = @tagName(Feature.fast_11bytenop),
         .llvm_name = "fast-11bytenop",
         .description = "Target can quickly decode up to 11 byte NOPs",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_15bytenop)] = .{
         .index = @enumToInt(Feature.fast_15bytenop),
         .name = @tagName(Feature.fast_15bytenop),
         .llvm_name = "fast-15bytenop",
         .description = "Target can quickly decode up to 15 byte NOPs",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_bextr)] = .{
         .index = @enumToInt(Feature.fast_bextr),
         .name = @tagName(Feature.fast_bextr),
         .llvm_name = "fast-bextr",
         .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_gather)] = .{
         .index = @enumToInt(Feature.fast_gather),
         .name = @tagName(Feature.fast_gather),
         .llvm_name = "fast-gather",
         .description = "Indicates if gather is reasonably fast",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_hops)] = .{
         .index = @enumToInt(Feature.fast_hops),
@@ -502,56 +502,56 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fast_lzcnt),
         .llvm_name = "fast-lzcnt",
         .description = "LZCNT instructions are as fast as most simple integer ops",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
         .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write),
         .name = @tagName(Feature.fast_partial_ymm_or_zmm_write),
         .llvm_name = "fast-partial-ymm-or-zmm-write",
         .description = "Partial writes to YMM/ZMM registers are fast",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
         .index = @enumToInt(Feature.fast_scalar_fsqrt),
         .name = @tagName(Feature.fast_scalar_fsqrt),
         .llvm_name = "fast-scalar-fsqrt",
         .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
         .index = @enumToInt(Feature.fast_scalar_shift_masks),
         .name = @tagName(Feature.fast_scalar_shift_masks),
         .llvm_name = "fast-scalar-shift-masks",
         .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_shld_rotate)] = .{
         .index = @enumToInt(Feature.fast_shld_rotate),
         .name = @tagName(Feature.fast_shld_rotate),
         .llvm_name = "fast-shld-rotate",
         .description = "SHLD can be used as a faster rotate",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_variable_shuffle)] = .{
         .index = @enumToInt(Feature.fast_variable_shuffle),
         .name = @tagName(Feature.fast_variable_shuffle),
         .llvm_name = "fast-variable-shuffle",
         .description = "Shuffles with variable masks are fast",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
         .index = @enumToInt(Feature.fast_vector_fsqrt),
         .name = @tagName(Feature.fast_vector_fsqrt),
         .llvm_name = "fast-vector-fsqrt",
         .description = "Vector SQRT is fast (disable Newton-Raphson)",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
         .index = @enumToInt(Feature.fast_vector_shift_masks),
         .name = @tagName(Feature.fast_vector_shift_masks),
         .llvm_name = "fast-vector-shift-masks",
         .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma)] = .{
         .index = @enumToInt(Feature.fma),
@@ -577,14 +577,14 @@ pub const all_features = blk: {
         .name = @tagName(Feature.fsgsbase),
         .llvm_name = "fsgsbase",
         .description = "Support FS/GS Base instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fxsr)] = .{
         .index = @enumToInt(Feature.fxsr),
         .name = @tagName(Feature.fxsr),
         .llvm_name = "fxsr",
         .description = "Support fxsave/fxrestore instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfni)] = .{
         .index = @enumToInt(Feature.gfni),
@@ -600,119 +600,119 @@ pub const all_features = blk: {
         .name = @tagName(Feature.idivl_to_divb),
         .llvm_name = "idivl-to-divb",
         .description = "Use 8-bit divide for positive values less than 256",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.idivq_to_divl)] = .{
         .index = @enumToInt(Feature.idivq_to_divl),
         .name = @tagName(Feature.idivq_to_divl),
         .llvm_name = "idivq-to-divl",
         .description = "Use 32-bit divide for positive values less than 2^32",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invpcid)] = .{
         .index = @enumToInt(Feature.invpcid),
         .name = @tagName(Feature.invpcid),
         .llvm_name = "invpcid",
         .description = "Invalidate Process-Context Identifier",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_sp)] = .{
         .index = @enumToInt(Feature.lea_sp),
         .name = @tagName(Feature.lea_sp),
         .llvm_name = "lea-sp",
         .description = "Use LEA for adjusting the stack pointer",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_uses_ag)] = .{
         .index = @enumToInt(Feature.lea_uses_ag),
         .name = @tagName(Feature.lea_uses_ag),
         .llvm_name = "lea-uses-ag",
         .description = "LEA instruction needs inputs at AG stage",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lwp)] = .{
         .index = @enumToInt(Feature.lwp),
         .name = @tagName(Feature.lwp),
         .llvm_name = "lwp",
         .description = "Enable LWP instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lzcnt)] = .{
         .index = @enumToInt(Feature.lzcnt),
         .name = @tagName(Feature.lzcnt),
         .llvm_name = "lzcnt",
         .description = "Support LZCNT instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.macrofusion)] = .{
         .index = @enumToInt(Feature.macrofusion),
         .name = @tagName(Feature.macrofusion),
         .llvm_name = "macrofusion",
         .description = "Various instructions can be fused with conditional branches",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
         .index = @enumToInt(Feature.merge_to_threeway_branch),
         .name = @tagName(Feature.merge_to_threeway_branch),
         .llvm_name = "merge-to-threeway-branch",
         .description = "Merge branches to a three-way conditional branch",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mmx)] = .{
         .index = @enumToInt(Feature.mmx),
         .name = @tagName(Feature.mmx),
         .llvm_name = "mmx",
         .description = "Enable MMX instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movbe)] = .{
         .index = @enumToInt(Feature.movbe),
         .name = @tagName(Feature.movbe),
         .llvm_name = "movbe",
         .description = "Support MOVBE instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdir64b)] = .{
         .index = @enumToInt(Feature.movdir64b),
         .name = @tagName(Feature.movdir64b),
         .llvm_name = "movdir64b",
         .description = "Support movdir64b instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdiri)] = .{
         .index = @enumToInt(Feature.movdiri),
         .name = @tagName(Feature.movdiri),
         .llvm_name = "movdiri",
         .description = "Support movdiri instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpx)] = .{
         .index = @enumToInt(Feature.mpx),
         .name = @tagName(Feature.mpx),
         .llvm_name = "mpx",
         .description = "Support MPX instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mwaitx)] = .{
         .index = @enumToInt(Feature.mwaitx),
         .name = @tagName(Feature.mwaitx),
         .llvm_name = "mwaitx",
         .description = "Enable MONITORX/MWAITX timer functionality",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nopl)] = .{
         .index = @enumToInt(Feature.nopl),
         .name = @tagName(Feature.nopl),
         .llvm_name = "nopl",
         .description = "Enable NOPL instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pad_short_functions)] = .{
         .index = @enumToInt(Feature.pad_short_functions),
         .name = @tagName(Feature.pad_short_functions),
         .llvm_name = "pad-short-functions",
         .description = "Pad short functions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pclmul)] = .{
         .index = @enumToInt(Feature.pclmul),
@@ -728,70 +728,70 @@ pub const all_features = blk: {
         .name = @tagName(Feature.pconfig),
         .llvm_name = "pconfig",
         .description = "platform configuration instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pku)] = .{
         .index = @enumToInt(Feature.pku),
         .name = @tagName(Feature.pku),
         .llvm_name = "pku",
         .description = "Enable protection keys",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcnt)] = .{
         .index = @enumToInt(Feature.popcnt),
         .name = @tagName(Feature.popcnt),
         .llvm_name = "popcnt",
         .description = "Support POPCNT instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_256_bit)] = .{
         .index = @enumToInt(Feature.prefer_256_bit),
         .name = @tagName(Feature.prefer_256_bit),
         .llvm_name = "prefer-256-bit",
         .description = "Prefer 256-bit AVX instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefetchwt1)] = .{
         .index = @enumToInt(Feature.prefetchwt1),
         .name = @tagName(Feature.prefetchwt1),
         .llvm_name = "prefetchwt1",
         .description = "Prefetch with Intent to Write and T1 Hint",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prfchw)] = .{
         .index = @enumToInt(Feature.prfchw),
         .name = @tagName(Feature.prfchw),
         .llvm_name = "prfchw",
         .description = "Support PRFCHW instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptwrite)] = .{
         .index = @enumToInt(Feature.ptwrite),
         .name = @tagName(Feature.ptwrite),
         .llvm_name = "ptwrite",
         .description = "Support ptwrite instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdpid)] = .{
         .index = @enumToInt(Feature.rdpid),
         .name = @tagName(Feature.rdpid),
         .llvm_name = "rdpid",
         .description = "Support RDPID instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdrnd)] = .{
         .index = @enumToInt(Feature.rdrnd),
         .name = @tagName(Feature.rdrnd),
         .llvm_name = "rdrnd",
         .description = "Support RDRAND instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdseed)] = .{
         .index = @enumToInt(Feature.rdseed),
         .name = @tagName(Feature.rdseed),
         .llvm_name = "rdseed",
         .description = "Support RDSEED instruction",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline)] = .{
         .index = @enumToInt(Feature.retpoline),
@@ -817,35 +817,35 @@ pub const all_features = blk: {
         .name = @tagName(Feature.retpoline_indirect_branches),
         .llvm_name = "retpoline-indirect-branches",
         .description = "Remove speculation of indirect branches from the generated code",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
         .index = @enumToInt(Feature.retpoline_indirect_calls),
         .name = @tagName(Feature.retpoline_indirect_calls),
         .llvm_name = "retpoline-indirect-calls",
         .description = "Remove speculation of indirect calls from the generated code",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rtm)] = .{
         .index = @enumToInt(Feature.rtm),
         .name = @tagName(Feature.rtm),
         .llvm_name = "rtm",
         .description = "Support RTM instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sahf)] = .{
         .index = @enumToInt(Feature.sahf),
         .name = @tagName(Feature.sahf),
         .llvm_name = "sahf",
         .description = "Support LAHF and SAHF instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sgx)] = .{
         .index = @enumToInt(Feature.sgx),
         .name = @tagName(Feature.sgx),
         .llvm_name = "sgx",
         .description = "Enable Software Guard Extensions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha)] = .{
         .index = @enumToInt(Feature.sha),
@@ -861,91 +861,91 @@ pub const all_features = blk: {
         .name = @tagName(Feature.shstk),
         .llvm_name = "shstk",
         .description = "Support CET Shadow-Stack instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_3ops_lea)] = .{
         .index = @enumToInt(Feature.slow_3ops_lea),
         .name = @tagName(Feature.slow_3ops_lea),
         .llvm_name = "slow-3ops-lea",
         .description = "LEA instruction with 3 ops or certain registers is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_incdec)] = .{
         .index = @enumToInt(Feature.slow_incdec),
         .name = @tagName(Feature.slow_incdec),
         .llvm_name = "slow-incdec",
         .description = "INC and DEC instructions are slower than ADD and SUB",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_lea)] = .{
         .index = @enumToInt(Feature.slow_lea),
         .name = @tagName(Feature.slow_lea),
         .llvm_name = "slow-lea",
         .description = "LEA instruction with certain arguments is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmaddwd)] = .{
         .index = @enumToInt(Feature.slow_pmaddwd),
         .name = @tagName(Feature.slow_pmaddwd),
         .llvm_name = "slow-pmaddwd",
         .description = "PMADDWD is slower than PMULLD",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmulld)] = .{
         .index = @enumToInt(Feature.slow_pmulld),
         .name = @tagName(Feature.slow_pmulld),
         .llvm_name = "slow-pmulld",
         .description = "PMULLD instruction is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_shld)] = .{
         .index = @enumToInt(Feature.slow_shld),
         .name = @tagName(Feature.slow_shld),
         .llvm_name = "slow-shld",
         .description = "SHLD instruction is slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_two_mem_ops)] = .{
         .index = @enumToInt(Feature.slow_two_mem_ops),
         .name = @tagName(Feature.slow_two_mem_ops),
         .llvm_name = "slow-two-mem-ops",
         .description = "Two memory operand instructions are slow",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
         .index = @enumToInt(Feature.slow_unaligned_mem_16),
         .name = @tagName(Feature.slow_unaligned_mem_16),
         .llvm_name = "slow-unaligned-mem-16",
         .description = "Slow unaligned 16-byte memory access",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
         .index = @enumToInt(Feature.slow_unaligned_mem_32),
         .name = @tagName(Feature.slow_unaligned_mem_32),
         .llvm_name = "slow-unaligned-mem-32",
         .description = "Slow unaligned 32-byte memory access",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .index = @enumToInt(Feature.soft_float),
         .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software floating point features",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse)] = .{
         .index = @enumToInt(Feature.sse),
         .name = @tagName(Feature.sse),
         .llvm_name = "sse",
         .description = "Enable SSE instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse_unaligned_mem)] = .{
         .index = @enumToInt(Feature.sse_unaligned_mem),
         .name = @tagName(Feature.sse_unaligned_mem),
         .llvm_name = "sse-unaligned-mem",
         .description = "Allow unaligned memory operands with SSE instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse2)] = .{
         .index = @enumToInt(Feature.sse2),
@@ -1006,7 +1006,7 @@ pub const all_features = blk: {
         .name = @tagName(Feature.tbm),
         .llvm_name = "tbm",
         .description = "Enable TBM instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vaes)] = .{
         .index = @enumToInt(Feature.vaes),
@@ -1033,21 +1033,21 @@ pub const all_features = blk: {
         .name = @tagName(Feature.waitpkg),
         .llvm_name = "waitpkg",
         .description = "Wait and pause enhancements",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wbnoinvd)] = .{
         .index = @enumToInt(Feature.wbnoinvd),
         .name = @tagName(Feature.wbnoinvd),
         .llvm_name = "wbnoinvd",
         .description = "Write Back No Invalidate",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.x87)] = .{
         .index = @enumToInt(Feature.x87),
         .name = @tagName(Feature.x87),
         .llvm_name = "x87",
         .description = "Enable X87 float instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xop)] = .{
         .index = @enumToInt(Feature.xop),
@@ -1063,28 +1063,28 @@ pub const all_features = blk: {
         .name = @tagName(Feature.xsave),
         .llvm_name = "xsave",
         .description = "Support xsave instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsavec)] = .{
         .index = @enumToInt(Feature.xsavec),
         .name = @tagName(Feature.xsavec),
         .llvm_name = "xsavec",
         .description = "Support xsavec instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaveopt)] = .{
         .index = @enumToInt(Feature.xsaveopt),
         .name = @tagName(Feature.xsaveopt),
         .llvm_name = "xsaveopt",
         .description = "Support xsaveopt instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaves)] = .{
         .index = @enumToInt(Feature.xsaves),
         .name = @tagName(Feature.xsaves),
         .llvm_name = "xsaves",
         .description = "Support xsaves instructions",
-        .dependencies = 0,
+        .dependencies = featureSet(&[_]Feature{}),
     };
     break :blk result;
 };
@@ -2365,7 +2365,7 @@ pub const cpu = struct {
     pub const lakemont = Cpu{
         .name = "lakemont",
         .llvm_name = "lakemont",
-        .features = 0,
+        .features = featureSet(&[_]Feature{}),
     };
     pub const nehalem = Cpu{
         .name = "nehalem",
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 307e95332136d22201ab8c409133a091cfe90784..f533d9b34e0c11d56cd6ec8911aafa2078639779 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -64,6 +64,7 @@ const Error = extern enum {
     CacheUnavailable,
     PathTooLong,
     CCompilerCannotFindFile,
+    NoCCompilerInstalled,
     ReadingDepFile,
     InvalidDepFile,
     MissingArchitecture,
@@ -89,6 +90,7 @@ const Error = extern enum {
     UnknownCpuFeature,
     InvalidCpuFeatures,
     InvalidLlvmCpuFeaturesFormat,
+    UnknownApplicationBinaryInterface,
 };
 
 const FILE = std.c.FILE;
@@ -585,11 +587,12 @@ const Stage2CpuFeatures = struct {
 
     fn createFromLLVM(
         allocator: *mem.Allocator,
-        arch_name: [*:0]const u8,
+        zig_triple: [*:0]const u8,
         llvm_cpu_name_z: [*:0]const u8,
         llvm_cpu_features: [*:0]const u8,
     ) !*Self {
-        const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
+        const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
+        const arch = target.Cross.arch;
         const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z);
 
         for (arch.allCpus()) |cpu| {
@@ -620,8 +623,8 @@ const Stage2CpuFeatures = struct {
                 const this_llvm_name = feature.llvm_name orelse continue;
                 if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                     switch (op) {
-                        .add => set |= @as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index),
-                        .sub => set &= ~(@as(Target.Cpu.Feature.Set, 1) << @intCast(u7, index)),
+                        .add => set.addFeature(@intCast(u8, index)),
+                        .sub => set.removeFeature(@intCast(u8, index)),
                     }
                     break;
                 }
@@ -691,7 +694,7 @@ const Stage2CpuFeatures = struct {
         }
 
         for (all_features) |feature, index| {
-            if (!Target.Cpu.Feature.isEnabled(feature_set, @intCast(u7, index))) continue;
+            if (!feature_set.isEnabled(@intCast(u8, index))) continue;
 
             if (feature.llvm_name) |llvm_name| {
                 try llvm_features_buffer.append("+");
@@ -736,43 +739,75 @@ const Stage2CpuFeatures = struct {
 // ABI warning
 export fn stage2_cpu_features_parse_cpu(
     result: **Stage2CpuFeatures,
-    arch_name: [*:0]const u8,
+    zig_triple: [*:0]const u8,
     cpu_name: [*:0]const u8,
 ) Error {
-    result.* = parseCpu(arch_name, cpu_name) catch |err| switch (err) {
+    result.* = parseCpu(zig_triple, cpu_name) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
-        error.UnknownCpu => return .UnknownCpu,
         error.UnknownArchitecture => return .UnknownArchitecture,
         error.UnknownSubArchitecture => return .UnknownSubArchitecture,
+        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
+        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
+        error.MissingOperatingSystem => return .MissingOperatingSystem,
+        error.MissingArchitecture => return .MissingArchitecture,
     };
     return .None;
 }
 
-fn parseCpu(arch_name: [*:0]const u8, cpu_name: [*:0]const u8) !*Stage2CpuFeatures {
-    const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
-    const cpu = try arch.parseCpu(mem.toSliceConst(u8, cpu_name));
+fn parseCpu(zig_triple: [*:0]const u8, cpu_name_z: [*:0]const u8) !*Stage2CpuFeatures {
+    const cpu_name = mem.toSliceConst(u8, cpu_name_z);
+    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
+    const arch = target.Cross.arch;
+    const cpu = arch.parseCpu(cpu_name) catch |err| switch (err) {
+        error.UnknownCpu => {
+            std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
+                cpu_name,
+                @tagName(arch),
+            });
+            for (arch.allCpus()) |cpu| {
+                std.debug.warn(" {}\n", .{cpu.name});
+            }
+            process.exit(1);
+        },
+        else => |e| return e,
+    };
     return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu);
 }
 
 // ABI warning
 export fn stage2_cpu_features_parse_features(
     result: **Stage2CpuFeatures,
-    arch_name: [*:0]const u8,
+    zig_triple: [*:0]const u8,
     features_text: [*:0]const u8,
 ) Error {
-    result.* = parseFeatures(arch_name, features_text) catch |err| switch (err) {
+    result.* = parseFeatures(zig_triple, features_text) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
-        error.UnknownCpuFeature => return .UnknownCpuFeature,
         error.InvalidCpuFeatures => return .InvalidCpuFeatures,
         error.UnknownArchitecture => return .UnknownArchitecture,
         error.UnknownSubArchitecture => return .UnknownSubArchitecture,
+        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
+        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
+        error.MissingOperatingSystem => return .MissingOperatingSystem,
+        error.MissingArchitecture => return .MissingArchitecture,
     };
     return .None;
 }
 
-fn parseFeatures(arch_name: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures {
-    const arch = try Target.parseArchSub(mem.toSliceConst(u8, arch_name));
-    const set = try arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text));
+fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures {
+    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
+    const arch = target.Cross.arch;
+    const set = arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)) catch |err| switch (err) {
+        error.UnknownCpuFeature => {
+            std.debug.warn("Unknown CPU features specified.\nAvailable CPU features for architecture '{}':\n", .{
+                @tagName(arch),
+            });
+            for (arch.allFeaturesList()) |feature| {
+                std.debug.warn(" {}\n", .{feature.name});
+            }
+            process.exit(1);
+        },
+        else => |e| return e,
+    };
     return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set);
 }
 
@@ -787,13 +822,13 @@ export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error {
 // ABI warning
 export fn stage2_cpu_features_llvm(
     result: **Stage2CpuFeatures,
-    arch_name: [*:0]const u8,
+    zig_triple: [*:0]const u8,
     llvm_cpu_name: [*:0]const u8,
     llvm_cpu_features: [*:0]const u8,
 ) Error {
     result.* = Stage2CpuFeatures.createFromLLVM(
         std.heap.c_allocator,
-        arch_name,
+        zig_triple,
         llvm_cpu_name,
         llvm_cpu_features,
     ) catch |err| switch (err) {
@@ -801,6 +836,10 @@ export fn stage2_cpu_features_llvm(
         error.UnknownArchitecture => return .UnknownArchitecture,
         error.UnknownSubArchitecture => return .UnknownSubArchitecture,
         error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
+        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
+        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
+        error.MissingOperatingSystem => return .MissingOperatingSystem,
+        error.MissingArchitecture => return .MissingArchitecture,
     };
     return .None;
 }
diff --git a/src/error.cpp b/src/error.cpp
index 6c6abfcd22e42a5f7a1a02fd5c596161d07bf463..5bf1667db9c99b0a5e73cbcc9c7f25dad115a30e 100644
--- a/src/error.cpp
+++ b/src/error.cpp
@@ -63,6 +63,7 @@ const char *err_str(Error err) {
         case ErrorUnknownCpuFeature: return "unknown CPU feature";
         case ErrorInvalidCpuFeatures: return "invalid CPU features";
         case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
+        case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface";
     }
     return "(invalid error)";
 }
diff --git a/src/main.cpp b/src/main.cpp
index 8e331461f8c5d01584b514fdfe53caebe8472e62..878c15e17c4830a86853fc622a68c314a7a23a82 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -977,16 +977,19 @@ int main(int argc, char **argv) {
         }
     }
 
+    Buf zig_triple_buf = BUF_INIT;
+    target_triple_zig(&zig_triple_buf, &target);
+
     if (cpu && features) {
         fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n");
         return main_exit(root_progress_node, EXIT_FAILURE);
     } else if (cpu) {
-        if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, target_arch_name(target.arch), cpu))) {
+        if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, buf_ptr(&zig_triple_buf), cpu))) {
             fprintf(stderr, "-target-cpu error: %s\n", err_str(err));
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else if (features) {
-        if ((err = stage2_cpu_features_parse_features(&target.cpu_features, target_arch_name(target.arch),
+        if ((err = stage2_cpu_features_parse_features(&target.cpu_features, buf_ptr(&zig_triple_buf),
                         features)))
         {
             fprintf(stderr, "-target-feature error: %s\n", err_str(err));
@@ -995,7 +998,7 @@ int main(int argc, char **argv) {
     } else if (target.is_native) {
         const char *cpu_name = ZigLLVMGetHostCPUName();
         const char *cpu_features = ZigLLVMGetNativeFeatures();
-        if ((err = stage2_cpu_features_llvm(&target.cpu_features, target_arch_name(target.arch),
+        if ((err = stage2_cpu_features_llvm(&target.cpu_features, buf_ptr(&zig_triple_buf),
                         cpu_name, cpu_features)))
         {
             fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err));
@@ -1014,9 +1017,7 @@ int main(int argc, char **argv) {
     }
 
     if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {
-        Buf triple_buf = BUF_INIT;
-        target_triple_zig(&triple_buf, &target);
-        fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf));
+        fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf));
         return print_error_usage(arg0);
     }
 
diff --git a/src/userland.cpp b/src/userland.cpp
index 22d2daa8e43512c955e015f16cd8926601d23a68..4a658d76c528a38dfeb3616dbf6e389e1824158a 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -96,11 +96,11 @@ struct Stage2CpuFeatures {
     const char *cache_hash;
 };
 
-Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *arch, const char *str) {
+Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
     const char *msg = "stage0 called stage2_cpu_features_parse_cpu";
     stage2_panic(msg, strlen(msg));
 }
-Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *arch, const char *str) {
+Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
     const char *msg = "stage0 called stage2_cpu_features_parse_features";
     stage2_panic(msg, strlen(msg));
 }
@@ -111,7 +111,7 @@ Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) {
     *out = result;
     return ErrorNone;
 }
-Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *arch,
+Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *zig_triple,
         const char *llvm_cpu_name, const char *llvm_features)
 {
     Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
diff --git a/src/userland.h b/src/userland.h
index 052321a718f8c9d8e8c8ffe669c7662551f34ba1..e84b62aecb75b053cb8798df61384ad0f88dd593 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -83,6 +83,7 @@ enum Error {
     ErrorUnknownCpuFeature,
     ErrorInvalidCpuFeatures,
     ErrorInvalidLlvmCpuFeaturesFormat,
+    ErrorUnknownApplicationBinaryInterface,
 };
 
 // ABI warning
@@ -184,18 +185,18 @@ struct Stage2CpuFeatures;
 
 // ABI warning
 ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result,
-        const char *arch, const char *cpu_name);
+        const char *zig_triple, const char *cpu_name);
 
 // ABI warning
 ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result,
-        const char *arch, const char *features);
+        const char *zig_triple, const char *features);
 
 // ABI warning
 ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result);
 
 // ABI warning
 ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result,
-        const char *arch, const char *llvm_cpu_name, const char *llvm_features);
+        const char *zig_triple, const char *llvm_cpu_name, const char *llvm_features);
 
 // ABI warning
 ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
-- 
2.54.0


From 39759b90fce2fa114f59793958390778275c0477 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 01:22:37 -0500
Subject: [PATCH 074/116] make zig targets show native cpu name and features

---
 lib/std/target.zig                |   4 +-
 src-self-hosted/print_targets.zig |  23 ++++--
 src-self-hosted/stage1.zig        | 125 +++++++++++++++++++-----------
 src/main.cpp                      |   2 +-
 src/userland.cpp                  |   2 +-
 src/userland.h                    |   2 +-
 6 files changed, 101 insertions(+), 57 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 716be8905c86b4be9e1551ad3db847cc11042a9d..2566a9be372c6099dad62ede9d0eb6fcc2c5cf1d 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -631,9 +631,9 @@ pub const Target = union(enum) {
         };
     }
 
-    pub fn cpuFeaturesList(self: Target) []const *const Cpu.Feature {
+    pub fn cpuFeatureSet(self: Target) Cpu.Feature.Set {
         return switch (self.getCpuFeatures()) {
-            .baseline => self.arch.baselineFeatures(),
+            .baseline => self.getArch().baselineFeatures(),
             .cpu => |cpu| cpu.features,
             .features => |features| features,
         };
diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig
index 233b6c106d9a8b15b2ea810de93acaef2efb2f55..f2bab3568530f88ff982e463f1820647e84a4314 100644
--- a/src-self-hosted/print_targets.zig
+++ b/src-self-hosted/print_targets.zig
@@ -9,6 +9,7 @@ pub fn cmdTargets(
     allocator: *Allocator,
     args: []const []const u8,
     stdout: *io.OutStream(fs.File.WriteError),
+    native_target: Target,
 ) !void {
     const BOS = io.BufferedOutStream(fs.File.WriteError);
     var bos = BOS.init(stdout);
@@ -76,22 +77,34 @@ pub fn cmdTargets(
     try jws.objectField("native");
     try jws.beginObject();
     {
-        const triple = try Target.current.zigTriple(allocator);
+        const triple = try native_target.zigTriple(allocator);
         defer allocator.free(triple);
         try jws.objectField("triple");
         try jws.emitString(triple);
     }
     try jws.objectField("arch");
-    try jws.emitString(@tagName(Target.current.getArch()));
+    try jws.emitString(@tagName(native_target.getArch()));
     try jws.objectField("os");
-    try jws.emitString(@tagName(Target.current.getOs()));
+    try jws.emitString(@tagName(native_target.getOs()));
     try jws.objectField("abi");
-    try jws.emitString(@tagName(Target.current.getAbi()));
+    try jws.emitString(@tagName(native_target.getAbi()));
     try jws.objectField("cpuName");
-    switch (Target.current.getCpuFeatures()) {
+    switch (native_target.getCpuFeatures()) {
         .baseline, .features => try jws.emitNull(),
         .cpu => |cpu| try jws.emitString(cpu.name),
     }
+    {
+        try jws.objectField("cpuFeatures");
+        try jws.beginArray();
+        const feature_set = native_target.cpuFeatureSet();
+        for (native_target.getArch().allFeaturesList()) |feature, i| {
+            if (feature_set.isEnabled(@intCast(u8, i))) {
+                try jws.arrayElem();
+                try jws.emitString(feature.name);
+            }
+        }
+        try jws.endArray();
+    }
     try jws.endObject();
 
     try jws.endObject();
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index f533d9b34e0c11d56cd6ec8911aafa2078639779..eed5804c0d449331c917102d860a6101d4fa7751 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -539,19 +539,82 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
     node.context.maybeRefresh();
 }
 
+fn cpuFeaturesFromLLVM(
+    arch: Target.Arch,
+    llvm_cpu_name_z: ?[*:0]const u8,
+    llvm_cpu_features_opt: ?[*:0]const u8,
+) !Target.CpuFeatures {
+    if (llvm_cpu_name_z) |cpu_name_z| {
+        const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
+
+        for (arch.allCpus()) |cpu| {
+            const this_llvm_name = cpu.llvm_name orelse continue;
+            if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
+                return Target.CpuFeatures{ .cpu = cpu };
+            }
+        }
+    }
+
+    var set = arch.baselineFeatures();
+    const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{
+        .features = set,
+    };
+
+    var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
+    while (it.next()) |decorated_llvm_feat| {
+        var op: enum {
+            add,
+            sub,
+        } = undefined;
+        var llvm_feat: []const u8 = undefined;
+        if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
+            op = .add;
+            llvm_feat = decorated_llvm_feat[1..];
+        } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
+            op = .sub;
+            llvm_feat = decorated_llvm_feat[1..];
+        } else {
+            return error.InvalidLlvmCpuFeaturesFormat;
+        }
+        for (arch.allFeaturesList()) |feature, index| {
+            const this_llvm_name = feature.llvm_name orelse continue;
+            if (mem.eql(u8, llvm_feat, this_llvm_name)) {
+                switch (op) {
+                    .add => set.addFeature(@intCast(u8, index)),
+                    .sub => set.removeFeature(@intCast(u8, index)),
+                }
+                break;
+            }
+        }
+    }
+    return Target.CpuFeatures{ .features = set };
+}
+
 // ABI warning
-export fn stage2_cmd_targets() c_int {
-    @import("print_targets.zig").cmdTargets(
-        std.heap.c_allocator,
-        &[0][]u8{},
-        &std.io.getStdOut().outStream().stream,
-    ) catch |err| {
+export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
+    cmdTargets(zig_triple) catch |err| {
         std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
         return -1;
     };
     return 0;
 }
 
+fn cmdTargets(zig_triple: [*:0]const u8) !void {
+    var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
+    target.Cross.cpu_features = blk: {
+        const llvm = @import("llvm.zig");
+        const llvm_cpu_name = llvm.GetHostCPUName();
+        const llvm_cpu_features = llvm.GetNativeFeatures();
+        break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
+    };
+    return @import("print_targets.zig").cmdTargets(
+        std.heap.c_allocator,
+        &[0][]u8{},
+        &std.io.getStdOut().outStream().stream,
+        target,
+    );
+}
+
 const Stage2CpuFeatures = struct {
     allocator: *mem.Allocator,
     cpu_features: Target.CpuFeatures,
@@ -588,49 +651,17 @@ const Stage2CpuFeatures = struct {
     fn createFromLLVM(
         allocator: *mem.Allocator,
         zig_triple: [*:0]const u8,
-        llvm_cpu_name_z: [*:0]const u8,
-        llvm_cpu_features: [*:0]const u8,
+        llvm_cpu_name_z: ?[*:0]const u8,
+        llvm_cpu_features: ?[*:0]const u8,
     ) !*Self {
         const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
         const arch = target.Cross.arch;
-        const llvm_cpu_name = mem.toSliceConst(u8, llvm_cpu_name_z);
-
-        for (arch.allCpus()) |cpu| {
-            const this_llvm_name = cpu.llvm_name orelse continue;
-            if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
-                return createFromCpu(allocator, arch, cpu);
-            }
+        const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features);
+        switch (cpu_features) {
+            .baseline => return createBaseline(allocator),
+            .cpu => |cpu| return createFromCpu(allocator, arch, cpu),
+            .features => |features| return createFromCpuFeatures(allocator, arch, features),
         }
-
-        var set = arch.baselineFeatures();
-        var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
-        while (it.next()) |decorated_llvm_feat| {
-            var op: enum {
-                add,
-                sub,
-            } = undefined;
-            var llvm_feat: []const u8 = undefined;
-            if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
-                op = .add;
-                llvm_feat = decorated_llvm_feat[1..];
-            } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
-                op = .sub;
-                llvm_feat = decorated_llvm_feat[1..];
-            } else {
-                return error.InvalidLlvmCpuFeaturesFormat;
-            }
-            for (arch.allFeaturesList()) |feature, index| {
-                const this_llvm_name = feature.llvm_name orelse continue;
-                if (mem.eql(u8, llvm_feat, this_llvm_name)) {
-                    switch (op) {
-                        .add => set.addFeature(@intCast(u8, index)),
-                        .sub => set.removeFeature(@intCast(u8, index)),
-                    }
-                    break;
-                }
-            }
-        }
-        return createFromCpuFeatures(allocator, arch, set);
     }
 
     fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self {
@@ -823,8 +854,8 @@ export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error {
 export fn stage2_cpu_features_llvm(
     result: **Stage2CpuFeatures,
     zig_triple: [*:0]const u8,
-    llvm_cpu_name: [*:0]const u8,
-    llvm_cpu_features: [*:0]const u8,
+    llvm_cpu_name: ?[*:0]const u8,
+    llvm_cpu_features: ?[*:0]const u8,
 ) Error {
     result.* = Stage2CpuFeatures.createFromLLVM(
         std.heap.c_allocator,
diff --git a/src/main.cpp b/src/main.cpp
index 878c15e17c4830a86853fc622a68c314a7a23a82..813eada2611ed0c1c638869894b99e39c4b2c27f 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1372,7 +1372,7 @@ int main(int argc, char **argv) {
         return main_exit(root_progress_node, EXIT_SUCCESS);
     }
     case CmdTargets:
-        return stage2_cmd_targets();
+        return stage2_cmd_targets(buf_ptr(&zig_triple_buf));
     case CmdNone:
         return print_full_usage(arg0, stderr, EXIT_FAILURE);
     }
diff --git a/src/userland.cpp b/src/userland.cpp
index 4a658d76c528a38dfeb3616dbf6e389e1824158a..9a923e1b8634488f1be87f9f67ce5836da6b0142 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -141,7 +141,7 @@ void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
     *len = strlen(cpu_features->builtin_str);
 }
 
-int stage2_cmd_targets(void) {
+int stage2_cmd_targets(const char *zig_triple) {
     const char *msg = "stage0 called stage2_cmd_targets";
     stage2_panic(msg, strlen(msg));
 }
diff --git a/src/userland.h b/src/userland.h
index e84b62aecb75b053cb8798df61384ad0f88dd593..1a07b605e52ed99022a1c2362667b8687167552a 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -213,7 +213,7 @@ ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatu
         const char **ptr, size_t *len);
 
 // ABI warning
-ZIG_EXTERN_C int stage2_cmd_targets(void);
+ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
 
 
 #endif
-- 
2.54.0


From 0c2dde2fda29e84be25296d0b65bcb92dc9d4946 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 01:31:27 -0500
Subject: [PATCH 075/116] add libc and glibcs to self-hosted zig targets

---
 src-self-hosted/print_targets.zig | 132 ++++++++++++++++++++++++++----
 1 file changed, 118 insertions(+), 14 deletions(-)

diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig
index f2bab3568530f88ff982e463f1820647e84a4314..0e0844d7c487c5d9ef02474972b9dbb127927df9 100644
--- a/src-self-hosted/print_targets.zig
+++ b/src-self-hosted/print_targets.zig
@@ -5,6 +5,101 @@ const mem = std.mem;
 const Allocator = mem.Allocator;
 const Target = std.Target;
 
+// TODO this is hard-coded until self-hosted gains this information canonically
+const available_libcs = [_][]const u8{
+    "aarch64_be-linux-gnu",
+    "aarch64_be-linux-musl",
+    "aarch64_be-windows-gnu",
+    "aarch64-linux-gnu",
+    "aarch64-linux-musl",
+    "aarch64-windows-gnu",
+    "armeb-linux-gnueabi",
+    "armeb-linux-gnueabihf",
+    "armeb-linux-musleabi",
+    "armeb-linux-musleabihf",
+    "armeb-windows-gnu",
+    "arm-linux-gnueabi",
+    "arm-linux-gnueabihf",
+    "arm-linux-musleabi",
+    "arm-linux-musleabihf",
+    "arm-windows-gnu",
+    "i386-linux-gnu",
+    "i386-linux-musl",
+    "i386-windows-gnu",
+    "mips64el-linux-gnuabi64",
+    "mips64el-linux-gnuabin32",
+    "mips64el-linux-musl",
+    "mips64-linux-gnuabi64",
+    "mips64-linux-gnuabin32",
+    "mips64-linux-musl",
+    "mipsel-linux-gnu",
+    "mipsel-linux-musl",
+    "mips-linux-gnu",
+    "mips-linux-musl",
+    "powerpc64le-linux-gnu",
+    "powerpc64le-linux-musl",
+    "powerpc64-linux-gnu",
+    "powerpc64-linux-musl",
+    "powerpc-linux-gnu",
+    "powerpc-linux-musl",
+    "riscv64-linux-gnu",
+    "riscv64-linux-musl",
+    "s390x-linux-gnu",
+    "s390x-linux-musl",
+    "sparc-linux-gnu",
+    "sparcv9-linux-gnu",
+    "wasm32-freestanding-musl",
+    "x86_64-linux-gnu (native)",
+    "x86_64-linux-gnux32",
+    "x86_64-linux-musl",
+    "x86_64-windows-gnu",
+};
+
+// TODO this is hard-coded until self-hosted gains this information canonically
+const available_glibcs = [_][]const u8{
+    "2.0",
+    "2.1",
+    "2.1.1",
+    "2.1.2",
+    "2.1.3",
+    "2.2",
+    "2.2.1",
+    "2.2.2",
+    "2.2.3",
+    "2.2.4",
+    "2.2.5",
+    "2.2.6",
+    "2.3",
+    "2.3.2",
+    "2.3.3",
+    "2.3.4",
+    "2.4",
+    "2.5",
+    "2.6",
+    "2.7",
+    "2.8",
+    "2.9",
+    "2.10",
+    "2.11",
+    "2.12",
+    "2.13",
+    "2.14",
+    "2.15",
+    "2.16",
+    "2.17",
+    "2.18",
+    "2.19",
+    "2.22",
+    "2.23",
+    "2.24",
+    "2.25",
+    "2.26",
+    "2.27",
+    "2.28",
+    "2.29",
+    "2.30",
+};
+
 pub fn cmdTargets(
     allocator: *Allocator,
     args: []const []const u8,
@@ -52,25 +147,33 @@ pub fn cmdTargets(
 
     try jws.objectField("os");
     try jws.beginArray();
-    {
-        comptime var i: usize = 0;
-        inline while (i < @memberCount(Target.Os)) : (i += 1) {
-            const os_tag = @memberName(Target.Os, i);
-            try jws.arrayElem();
-            try jws.emitString(os_tag);
-        }
+    inline for (@typeInfo(Target.Os).Enum.fields) |field| {
+        try jws.arrayElem();
+        try jws.emitString(field.name);
     }
     try jws.endArray();
 
     try jws.objectField("abi");
     try jws.beginArray();
-    {
-        comptime var i: usize = 0;
-        inline while (i < @memberCount(Target.Abi)) : (i += 1) {
-            const abi_tag = @memberName(Target.Abi, i);
-            try jws.arrayElem();
-            try jws.emitString(abi_tag);
-        }
+    inline for (@typeInfo(Target.Abi).Enum.fields) |field| {
+        try jws.arrayElem();
+        try jws.emitString(field.name);
+    }
+    try jws.endArray();
+
+    try jws.objectField("libc");
+    try jws.beginArray();
+    for (available_libcs) |libc| {
+        try jws.arrayElem();
+        try jws.emitString(libc);
+    }
+    try jws.endArray();
+
+    try jws.objectField("glibc");
+    try jws.beginArray();
+    for (available_glibcs) |glibc| {
+        try jws.arrayElem();
+        try jws.emitString(glibc);
     }
     try jws.endArray();
 
@@ -105,6 +208,7 @@ pub fn cmdTargets(
         }
         try jws.endArray();
     }
+    // TODO implement native glibc version detection in self-hosted
     try jws.endObject();
 
     try jws.endObject();
-- 
2.54.0


From 5974f95cb75921d973caa38e049deaebc7a7b628 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 01:48:25 -0500
Subject: [PATCH 076/116] add cpus and cpu features to zig targets

---
 BRANCH_TODO                       |  5 -----
 src-self-hosted/print_targets.zig | 35 +++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+), 5 deletions(-)
 delete mode 100644 BRANCH_TODO

diff --git a/BRANCH_TODO b/BRANCH_TODO
deleted file mode 100644
index 5b5cf506f4e0809be5568c7e646e7c73b7fa77aa..0000000000000000000000000000000000000000
--- a/BRANCH_TODO
+++ /dev/null
@@ -1,5 +0,0 @@
-Finish these thigns before merging teh branch
-
- * zig targets
-   - use non-reflection based cpu detection?
-
diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig
index 0e0844d7c487c5d9ef02474972b9dbb127927df9..a7013e8cd9e91463cdc03aa611e07e4acfb10032 100644
--- a/src-self-hosted/print_targets.zig
+++ b/src-self-hosted/print_targets.zig
@@ -177,6 +177,41 @@ pub fn cmdTargets(
     }
     try jws.endArray();
 
+    try jws.objectField("cpus");
+    try jws.beginObject();
+    inline for (@typeInfo(Target.Arch).Union.fields) |field| {
+        try jws.objectField(field.name);
+        try jws.beginObject();
+        const arch = @unionInit(Target.Arch, field.name, undefined);
+        for (arch.allCpus()) |cpu| {
+            try jws.objectField(cpu.name);
+            try jws.beginArray();
+            for (arch.allFeaturesList()) |feature, i| {
+                if (cpu.features.isEnabled(@intCast(u8, i))) {
+                    try jws.arrayElem();
+                    try jws.emitString(feature.name);
+                }
+            }
+            try jws.endArray();
+        }
+        try jws.endObject();
+    }
+    try jws.endObject();
+
+    try jws.objectField("cpuFeatures");
+    try jws.beginObject();
+    inline for (@typeInfo(Target.Arch).Union.fields) |field| {
+        try jws.objectField(field.name);
+        try jws.beginArray();
+        const arch = @unionInit(Target.Arch, field.name, undefined);
+        for (arch.allFeaturesList()) |feature| {
+            try jws.arrayElem();
+            try jws.emitString(feature.name);
+        }
+        try jws.endArray();
+    }
+    try jws.endObject();
+
     try jws.objectField("native");
     try jws.beginObject();
     {
-- 
2.54.0


From 0abaee79af462f4264717f88af052fb00eefde7c Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 01:50:44 -0500
Subject: [PATCH 077/116] fix self-hosted compiler regression

---
 src-self-hosted/main.zig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src-self-hosted/main.zig b/src-self-hosted/main.zig
index 5751b7983de020d3c83e04ab7345172f5f920fe6..fc0825f3dbcc24368ccde7676638bc7c00935659 100644
--- a/src-self-hosted/main.zig
+++ b/src-self-hosted/main.zig
@@ -79,7 +79,9 @@ pub fn main() !void {
     } else if (mem.eql(u8, cmd, "libc")) {
         return cmdLibC(allocator, cmd_args);
     } else if (mem.eql(u8, cmd, "targets")) {
-        return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout);
+        // TODO figure out the current target rather than using the target that was specified when
+        // compiling the compiler
+        return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current);
     } else if (mem.eql(u8, cmd, "version")) {
         return cmdVersion(allocator, cmd_args);
     } else if (mem.eql(u8, cmd, "zen")) {
-- 
2.54.0


From 1f7babbc80211e12c9a38ff2196d6ff8c5a19302 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 03:01:20 -0500
Subject: [PATCH 078/116] properly forward baseline target cpu features to llvm

---
 src-self-hosted/stage1.zig | 84 ++++++++++++++++++++++++--------------
 src/codegen.cpp            |  2 +
 src/main.cpp               |  2 +-
 src/userland.cpp           |  2 +-
 src/userland.h             |  3 +-
 5 files changed, 59 insertions(+), 34 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index eed5804c0d449331c917102d860a6101d4fa7751..9cbbf75d84715061d36787f2cd653db99fbae37d 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -627,7 +627,7 @@ const Stage2CpuFeatures = struct {
 
     const Self = @This();
 
-    fn createBaseline(allocator: *mem.Allocator) !*Self {
+    fn createBaseline(allocator: *mem.Allocator, arch: Target.Arch) !*Self {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
@@ -641,10 +641,11 @@ const Stage2CpuFeatures = struct {
             .allocator = allocator,
             .cpu_features = .baseline,
             .llvm_cpu_name = null,
-            .llvm_features_str = null,
+            .llvm_features_str = try initLLVMFeatures(allocator, arch, arch.baselineFeatures()),
             .builtin_str = builtin_str,
             .cache_hash = cache_hash,
         };
+
         return self;
     }
 
@@ -658,7 +659,7 @@ const Stage2CpuFeatures = struct {
         const arch = target.Cross.arch;
         const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features);
         switch (cpu_features) {
-            .baseline => return createBaseline(allocator),
+            .baseline => return createBaseline(allocator, arch),
             .cpu => |cpu| return createFromCpu(allocator, arch, cpu),
             .features => |features| return createFromCpuFeatures(allocator, arch, features),
         }
@@ -688,6 +689,39 @@ const Stage2CpuFeatures = struct {
         return self;
     }
 
+    fn initLLVMFeatures(
+        allocator: *mem.Allocator,
+        arch: Target.Arch,
+        feature_set: Target.Cpu.Feature.Set,
+    ) ![*:0]const u8 {
+        var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
+        defer llvm_features_buffer.deinit();
+        // First, disable all features.
+        // This way, we only get the ones the user requests.
+        const all_features = arch.allFeaturesList();
+        for (all_features) |feature| {
+            if (feature.llvm_name) |llvm_name| {
+                try llvm_features_buffer.append("-");
+                try llvm_features_buffer.append(llvm_name);
+                try llvm_features_buffer.append(",");
+            }
+        }
+        for (all_features) |feature, index| {
+            if (!feature_set.isEnabled(@intCast(u8, index))) continue;
+
+            if (feature.llvm_name) |llvm_name| {
+                try llvm_features_buffer.append("+");
+                try llvm_features_buffer.append(llvm_name);
+                try llvm_features_buffer.append(",");
+            }
+        }
+
+        if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) {
+            llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
+        }
+        return llvm_features_buffer.toOwnedSlice().ptr;
+    }
+
     fn createFromCpuFeatures(
         allocator: *mem.Allocator,
         arch: Target.Arch,
@@ -710,38 +744,14 @@ const Stage2CpuFeatures = struct {
         );
         defer builtin_str_buffer.deinit();
 
-        var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
-        defer llvm_features_buffer.deinit();
-
-        // First, disable all features.
-        // This way, we only get the ones the user requests.
-        const all_features = arch.allFeaturesList();
-        for (all_features) |feature| {
-            if (feature.llvm_name) |llvm_name| {
-                try llvm_features_buffer.append("-");
-                try llvm_features_buffer.append(llvm_name);
-                try llvm_features_buffer.append(",");
-            }
-        }
-
-        for (all_features) |feature, index| {
+        for (arch.allFeaturesList()) |feature, index| {
             if (!feature_set.isEnabled(@intCast(u8, index))) continue;
 
-            if (feature.llvm_name) |llvm_name| {
-                try llvm_features_buffer.append("+");
-                try llvm_features_buffer.append(llvm_name);
-                try llvm_features_buffer.append(",");
-            }
-
             try builtin_str_buffer.append("        .");
             try builtin_str_buffer.append(feature.name);
             try builtin_str_buffer.append(",\n");
         }
 
-        if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) {
-            llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
-        }
-
         try builtin_str_buffer.append(
             \\    }),
             \\};
@@ -752,7 +762,7 @@ const Stage2CpuFeatures = struct {
             .allocator = allocator,
             .cpu_features = .{ .features = feature_set },
             .llvm_cpu_name = null,
-            .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
+            .llvm_features_str = try initLLVMFeatures(allocator, arch, feature_set),
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
             .cache_hash = cache_hash,
         };
@@ -843,13 +853,25 @@ fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stag
 }
 
 // ABI warning
-export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures) Error {
-    result.* = Stage2CpuFeatures.createBaseline(std.heap.c_allocator) catch |err| switch (err) {
+export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures, zig_triple: [*:0]const u8) Error {
+    result.* = cpuFeaturesBaseline(zig_triple) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
+        error.UnknownArchitecture => return .UnknownArchitecture,
+        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
+        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
+        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
+        error.MissingOperatingSystem => return .MissingOperatingSystem,
+        error.MissingArchitecture => return .MissingArchitecture,
     };
     return .None;
 }
 
+fn cpuFeaturesBaseline(zig_triple: [*:0]const u8) !*Stage2CpuFeatures {
+    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
+    const arch = target.Cross.arch;
+    return Stage2CpuFeatures.createBaseline(std.heap.c_allocator, arch);
+}
+
 // ABI warning
 export fn stage2_cpu_features_llvm(
     result: **Stage2CpuFeatures,
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 9cbd5fc6ab223eda23a0cea1d48e34772ec3b5aa..ffdf0e5bb07d1f5d460257057e6d50d1110369d3 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8802,6 +8802,8 @@ static void init(CodeGen *g) {
         target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
         target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
     }
+    //fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
+    //fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
     
     g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
             target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
diff --git a/src/main.cpp b/src/main.cpp
index 813eada2611ed0c1c638869894b99e39c4b2c27f..d12ae850fa48cf18482c013d0f5650d7ed0f1a4e 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1005,7 +1005,7 @@ int main(int argc, char **argv) {
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
     } else {
-        if ((err = stage2_cpu_features_baseline(&target.cpu_features))) {
+        if ((err = stage2_cpu_features_baseline(&target.cpu_features, buf_ptr(&zig_triple_buf)))) {
             fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err));
             return main_exit(root_progress_node, EXIT_FAILURE);
         }
diff --git a/src/userland.cpp b/src/userland.cpp
index 9a923e1b8634488f1be87f9f67ce5836da6b0142..64849b65ed99af8db60d565101554bc3334b4991 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -104,7 +104,7 @@ Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zi
     const char *msg = "stage0 called stage2_cpu_features_parse_features";
     stage2_panic(msg, strlen(msg));
 }
-Error stage2_cpu_features_baseline(Stage2CpuFeatures **out) {
+Error stage2_cpu_features_baseline(Stage2CpuFeatures **out, const char *zig_triple) {
     Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
     result->builtin_str = ".baseline;\n";
     result->cache_hash = "\n\n";
diff --git a/src/userland.h b/src/userland.h
index 1a07b605e52ed99022a1c2362667b8687167552a..01faf0b532f32fb1987b07db9fe1e2e091e58aa5 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -192,7 +192,8 @@ ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures *
         const char *zig_triple, const char *features);
 
 // ABI warning
-ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result);
+ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result,
+        const char *zig_triple);
 
 // ABI warning
 ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result,
-- 
2.54.0


From 327ad0ae89c168a5e035f92f86617a29697bf6d8 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 03:05:56 -0500
Subject: [PATCH 079/116] target_triple_llvm: emit none instead of unknown

---
 src/target.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/target.cpp b/src/target.cpp
index 82d5467e267a7ae0157e133d28b43b3e7a43b833..e0b29ef1b1c040661cdba6788dd4914114903235 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -831,11 +831,14 @@ void init_all_targets(void) {
 
 void target_triple_zig(Buf *triple, const ZigTarget *target) {
     buf_resize(triple, 0);
+    const char *abi_name = target->abi == ZigLLVM_UnknownEnvironment ?
+        "none" : ZigLLVMGetEnvironmentTypeName(target->abi);
+
     buf_appendf(triple, "%s%s-%s-%s",
             ZigLLVMGetArchTypeName(target->arch),
             ZigLLVMGetSubArchTypeName(target->sub_arch),
             ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
-            ZigLLVMGetEnvironmentTypeName(target->abi));
+            abi_name);
 }
 
 void target_triple_llvm(Buf *triple, const ZigTarget *target) {
-- 
2.54.0


From 6793af8d8b370cefc0a1fccbcf1c9fd1a24c7378 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 12:14:36 -0500
Subject: [PATCH 080/116] these are not real cpu features

---
 lib/std/target/x86.zig | 24 ------------------------
 1 file changed, 24 deletions(-)

diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index 7f1ec42dab0e5581243687cfce5e75751d1243b5..ce9830f1fa94ab568ca08786c07fab1f31aa539e 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -2,12 +2,9 @@ const std = @import("../std.zig");
 const Cpu = std.Target.Cpu;
 
 pub const Feature = enum {
-    @"16bit_mode",
-    @"32bit_mode",
     @"3dnow",
     @"3dnowa",
     @"64bit",
-    @"64bit_mode",
     adx,
     aes,
     avx,
@@ -134,20 +131,6 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= Cpu.Feature.Set.bit_count);
     var result: [len]Cpu.Feature = undefined;
-    result[@enumToInt(Feature.@"16bit_mode")] = .{
-        .index = @enumToInt(Feature.@"16bit_mode"),
-        .name = @tagName(Feature.@"16bit_mode"),
-        .llvm_name = "16bit-mode",
-        .description = "16-bit mode (i8086)",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
-    result[@enumToInt(Feature.@"32bit_mode")] = .{
-        .index = @enumToInt(Feature.@"32bit_mode"),
-        .name = @tagName(Feature.@"32bit_mode"),
-        .llvm_name = "32bit-mode",
-        .description = "32-bit mode (80386)",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.@"3dnow")] = .{
         .index = @enumToInt(Feature.@"3dnow"),
         .name = @tagName(Feature.@"3dnow"),
@@ -173,13 +156,6 @@ pub const all_features = blk: {
         .description = "Support 64-bit instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@enumToInt(Feature.@"64bit_mode")] = .{
-        .index = @enumToInt(Feature.@"64bit_mode"),
-        .name = @tagName(Feature.@"64bit_mode"),
-        .llvm_name = "64bit-mode",
-        .description = "64-bit mode (x86_64)",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@enumToInt(Feature.adx)] = .{
         .index = @enumToInt(Feature.adx),
         .name = @tagName(Feature.adx),
-- 
2.54.0


From 91ecce3bc05abb6677b389cbc7af403584d9cc7d Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 12:14:43 -0500
Subject: [PATCH 081/116] fix cache of cpu features

---
 src-self-hosted/stage1.zig | 31 +++++++++++--------------------
 1 file changed, 11 insertions(+), 20 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index 9cbbf75d84715061d36787f2cd653db99fbae37d..a11d3aae88946c4f35db073183bb31e5e51c2efc 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -13,6 +13,7 @@ const Target = std.Target;
 const self_hosted_main = @import("main.zig");
 const errmsg = @import("errmsg.zig");
 const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
+const assert = std.debug.assert;
 
 var stderr_file: fs.File = undefined;
 var stderr: *io.OutStream(fs.File.WriteError) = undefined;
@@ -675,7 +676,7 @@ const Stage2CpuFeatures = struct {
         });
         errdefer allocator.free(builtin_str);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features });
+        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features.bytes });
         errdefer allocator.free(cache_hash);
 
         self.* = Self{
@@ -696,29 +697,19 @@ const Stage2CpuFeatures = struct {
     ) ![*:0]const u8 {
         var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
         defer llvm_features_buffer.deinit();
-        // First, disable all features.
-        // This way, we only get the ones the user requests.
+
         const all_features = arch.allFeaturesList();
-        for (all_features) |feature| {
-            if (feature.llvm_name) |llvm_name| {
-                try llvm_features_buffer.append("-");
-                try llvm_features_buffer.append(llvm_name);
-                try llvm_features_buffer.append(",");
-            }
-        }
         for (all_features) |feature, index| {
-            if (!feature_set.isEnabled(@intCast(u8, index))) continue;
+            const llvm_name = feature.llvm_name orelse continue;
 
-            if (feature.llvm_name) |llvm_name| {
-                try llvm_features_buffer.append("+");
-                try llvm_features_buffer.append(llvm_name);
-                try llvm_features_buffer.append(",");
-            }
+            const plus_or_minus = "-+"[@boolToInt(feature_set.isEnabled(@intCast(u8, index)))];
+            try llvm_features_buffer.appendByte(plus_or_minus);
+            try llvm_features_buffer.append(llvm_name);
+            try llvm_features_buffer.append(",");
         }
+        assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
+        llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
 
-        if (mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ",")) {
-            llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
-        }
         return llvm_features_buffer.toOwnedSlice().ptr;
     }
 
@@ -730,7 +721,7 @@ const Stage2CpuFeatures = struct {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{x}", .{feature_set});
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.bytes});
         errdefer allocator.free(cache_hash);
 
         const generic_arch_name = arch.genericName();
-- 
2.54.0


From 15d5cab569a5ffc6495d606f460264429043aabf Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 12:25:22 -0500
Subject: [PATCH 082/116] fix target_triple_zig to emit zig-compatible triples

---
 src/target.cpp | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/src/target.cpp b/src/target.cpp
index e0b29ef1b1c040661cdba6788dd4914114903235..7542ff7c95752b3f8cd453360cd8150a5b0b51fc 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -831,14 +831,11 @@ void init_all_targets(void) {
 
 void target_triple_zig(Buf *triple, const ZigTarget *target) {
     buf_resize(triple, 0);
-    const char *abi_name = target->abi == ZigLLVM_UnknownEnvironment ?
-        "none" : ZigLLVMGetEnvironmentTypeName(target->abi);
-
     buf_appendf(triple, "%s%s-%s-%s",
-            ZigLLVMGetArchTypeName(target->arch),
-            ZigLLVMGetSubArchTypeName(target->sub_arch),
-            ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
-            abi_name);
+            target_arch_name(target->arch),
+            target_subarch_name(target->sub_arch),
+            target_os_name(target->os),
+            target_abi_name(target->abi));
 }
 
 void target_triple_llvm(Buf *triple, const ZigTarget *target) {
-- 
2.54.0


From bc82e0f3d3aed55165902c37271af120fcd4f858 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Tue, 21 Jan 2020 20:51:57 +0100
Subject: [PATCH 083/116] Refactor some code in the debug output

---
 lib/std/debug.zig | 235 +++++++++++++++-------------------------------
 1 file changed, 77 insertions(+), 158 deletions(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index dfdaca6d3ffe3fcb318cc7f46825e9b3d2fed2a2..51fb384d75f58700d5f5b31094a31de357ae9262 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -379,16 +379,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
         }
     } else {
         // we have no information to add to the address
-        if (tty_color) {
-            try out_stream.print("???:?:?: ", .{});
-            setTtyColor(TtyColor.Dim);
-            try out_stream.print("0x{x} in ??? (???)", .{relocated_address});
-            setTtyColor(TtyColor.Reset);
-            try out_stream.print("\n\n\n", .{});
-        } else {
-            try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{relocated_address});
-        }
-        return;
+        return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_color, printLineFromFileAnyOs);
     };
 
     const mod = &di.modules[mod_index];
@@ -510,66 +501,15 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
         }
     };
 
-    if (tty_color) {
-        setTtyColor(TtyColor.White);
-        if (opt_line_info) |li| {
-            try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
-        } else {
-            try out_stream.print("???:?:?", .{});
-        }
-        setTtyColor(TtyColor.Reset);
-        try out_stream.print(": ", .{});
-        setTtyColor(TtyColor.Dim);
-        try out_stream.print("0x{x} in {} ({})", .{ relocated_address, symbol_name, obj_basename });
-        setTtyColor(TtyColor.Reset);
-
-        if (opt_line_info) |line_info| {
-            try out_stream.print("\n", .{});
-            if (printLineFromFileAnyOs(out_stream, line_info)) {
-                if (line_info.column == 0) {
-                    try out_stream.write("\n");
-                } else {
-                    {
-                        var col_i: usize = 1;
-                        while (col_i < line_info.column) : (col_i += 1) {
-                            try out_stream.writeByte(' ');
-                        }
-                    }
-                    setTtyColor(TtyColor.Green);
-                    try out_stream.write("^");
-                    setTtyColor(TtyColor.Reset);
-                    try out_stream.write("\n");
-                }
-            } else |err| switch (err) {
-                error.EndOfFile => {},
-                error.FileNotFound => {
-                    setTtyColor(TtyColor.Dim);
-                    try out_stream.write("file not found\n\n");
-                    setTtyColor(TtyColor.White);
-                },
-                else => return err,
-            }
-        } else {
-            try out_stream.print("\n\n\n", .{});
-        }
-    } else {
-        if (opt_line_info) |li| {
-            try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n\n\n", .{
-                li.file_name,
-                li.line,
-                li.column,
-                relocated_address,
-                symbol_name,
-                obj_basename,
-            });
-        } else {
-            try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{
-                relocated_address,
-                symbol_name,
-                obj_basename,
-            });
-        }
-    }
+    try printLineInfo(
+        out_stream,
+        opt_line_info,
+        relocated_address,
+        symbol_name,
+        obj_basename,
+        tty_color,
+        printLineFromFileAnyOs,
+    );
 }
 
 const TtyColor = enum {
@@ -605,7 +545,11 @@ fn setTtyColor(tty_color: TtyColor) void {
                 stderr_file.write(RESET) catch return;
             },
         }
-    } else {
+
+        return;
+    }
+
+    if (builtin.os == .windows) {
         const S = struct {
             var attrs: windows.WORD = undefined;
             var init_attrs = false;
@@ -711,12 +655,7 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
     const adjusted_addr = 0x100000000 + (address - base_addr);
 
     const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
-        if (tty_color) {
-            try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
-        } else {
-            try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
-        }
-        return;
+        return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFileAnyOs);
     };
 
     const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
@@ -724,29 +663,22 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
         const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
         break :blk fs.path.basename(ofile_path);
     } else "???";
-    if (getLineNumberInfoMacOs(di, symbol.*, adjusted_addr)) |line_info| {
-        defer line_info.deinit();
-        try printLineInfo(
-            out_stream,
-            line_info,
-            address,
-            symbol_name,
-            compile_unit_name,
-            tty_color,
-            printLineFromFileAnyOs,
-        );
-    } else |err| switch (err) {
-        error.MissingDebugInfo, error.InvalidDebugInfo => {
-            if (tty_color) {
-                try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n\n\n", .{
-                    address, symbol_name, compile_unit_name,
-                });
-            } else {
-                try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{ address, symbol_name, compile_unit_name });
-            }
-        },
+
+    const line_info = getLineNumberInfoMacOs(di, symbol.*, adjusted_addr) catch |err| switch (err) {
+        error.MissingDebugInfo, error.InvalidDebugInfo => null,
         else => return err,
-    }
+    };
+    defer if (line_info) |li| li.deinit();
+
+    try printLineInfo(
+        out_stream,
+        line_info,
+        address,
+        symbol_name,
+        compile_unit_name,
+        tty_color,
+        printLineFromFileAnyOs,
+    );
 }
 
 pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
@@ -755,47 +687,46 @@ pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, addres
 
 fn printLineInfo(
     out_stream: var,
-    line_info: LineInfo,
+    line_info: ?LineInfo,
     address: usize,
     symbol_name: []const u8,
     compile_unit_name: []const u8,
     tty_color: bool,
     comptime printLineFromFile: var,
 ) !void {
-    if (tty_color) {
-        try out_stream.print(WHITE ++ "{}:{}:{}" ++ RESET ++ ": " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n", .{
-            line_info.file_name,
-            line_info.line,
-            line_info.column,
-            address,
-            symbol_name,
-            compile_unit_name,
-        });
-        if (printLineFromFile(out_stream, line_info)) {
-            if (line_info.column == 0) {
-                try out_stream.write("\n");
-            } else {
-                {
-                    var col_i: usize = 1;
-                    while (col_i < line_info.column) : (col_i += 1) {
-                        try out_stream.writeByte(' ');
-                    }
-                }
-                try out_stream.write(GREEN ++ "^" ++ RESET ++ "\n");
+    if (tty_color) setTtyColor(.White);
+
+    if (line_info) |*li| {
+        try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
+    } else {
+        try out_stream.print("???:?:?", .{});
+    }
+
+    if (tty_color) setTtyColor(.Reset);
+    try out_stream.write(": ");
+    if (tty_color) setTtyColor(.Dim);
+    try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
+    if (tty_color) setTtyColor(.Reset);
+    try out_stream.write("\n");
+
+    // Show the matching source code line if possible
+    if (line_info) |li| {
+        if (printLineFromFile(out_stream, li)) {
+            if (li.column > 0) {
+                // The caret already takes one char
+                const space_needed = @intCast(usize, li.column - 1);
+
+                try out_stream.writeByteNTimes(' ', space_needed);
+                if (tty_color) setTtyColor(.Green);
+                try out_stream.write("^");
+                if (tty_color) setTtyColor(.Reset);
             }
+            try out_stream.write("\n");
         } else |err| switch (err) {
             error.EndOfFile, error.FileNotFound => {},
+            error.BadPathName => {},
             else => return err,
         }
-    } else {
-        try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n", .{
-            line_info.file_name,
-            line_info.line,
-            line_info.column,
-            address,
-            symbol_name,
-            compile_unit_name,
-        });
     }
 }
 
@@ -1240,38 +1171,26 @@ pub const DwarfInfo = struct {
         comptime printLineFromFile: var,
     ) !void {
         const compile_unit = self.findCompileUnit(address) catch {
-            if (tty_color) {
-                try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
-            } else {
-                try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
-            }
-            return;
+            return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFile);
         };
+
         const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
-        if (self.getLineNumberInfo(compile_unit.*, address)) |line_info| {
-            defer line_info.deinit();
-            const symbol_name = self.getSymbolName(address) orelse "???";
-            try printLineInfo(
-                out_stream,
-                line_info,
-                address,
-                symbol_name,
-                compile_unit_name,
-                tty_color,
-                printLineFromFile,
-            );
-        } else |err| switch (err) {
-            error.MissingDebugInfo, error.InvalidDebugInfo => {
-                if (tty_color) {
-                    try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? ({})" ++ RESET ++ "\n\n\n", .{
-                        address, compile_unit_name,
-                    });
-                } else {
-                    try out_stream.print("???:?:?: 0x{x} in ??? ({})\n\n\n", .{ address, compile_unit_name });
-                }
-            },
+        const symbol_name = self.getSymbolName(address) orelse "???";
+        const line_info = self.getLineNumberInfo(compile_unit.*, address) catch |err| switch (err) {
+            error.MissingDebugInfo, error.InvalidDebugInfo => null,
             else => return err,
-        }
+        };
+        defer if (line_info) |li| li.deinit();
+
+        try printLineInfo(
+            out_stream,
+            line_info,
+            address,
+            symbol_name,
+            compile_unit_name,
+            tty_color,
+            printLineFromFile,
+        );
     }
 
     fn getSymbolName(di: *DwarfInfo, address: u64) ?[]const u8 {
-- 
2.54.0


From 59d0dda0803d8edd26d099025e0c0bcff5632e74 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Tue, 21 Jan 2020 20:58:02 +0100
Subject: [PATCH 084/116] Make writeByteNTimes faster and leaner

---
 lib/std/io/out_stream.zig | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/std/io/out_stream.zig b/lib/std/io/out_stream.zig
index b8f5db6fff7242aff7a49645297cb7564b261a71..265be066a17e7937fbf8e47f6c3a651e957c0e72 100644
--- a/lib/std/io/out_stream.zig
+++ b/lib/std/io/out_stream.zig
@@ -45,10 +45,14 @@ pub fn OutStream(comptime WriteError: type) type {
         }
 
         pub fn writeByteNTimes(self: *Self, byte: u8, n: usize) Error!void {
-            const slice = @as(*const [1]u8, &byte)[0..];
-            var i: usize = 0;
-            while (i < n) : (i += 1) {
-                try self.writeFn(self, slice);
+            var bytes: [256]u8 = undefined;
+            mem.set(u8, bytes[0..], byte);
+
+            var remaining: usize = n;
+            while (remaining > 0) {
+                const to_write = std.math.min(remaining, bytes.len);
+                try self.writeFn(self, bytes[0..to_write]);
+                remaining -= to_write;
             }
         }
 
-- 
2.54.0


From b8601e92524b9ea2e51b5dc8d816085b7399a08c Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Tue, 21 Jan 2020 22:58:51 +0100
Subject: [PATCH 085/116] Adjust tests & work around a nasty ICE

---
 lib/std/debug.zig     |  2 +-
 test/stack_traces.zig | 98 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 51fb384d75f58700d5f5b31094a31de357ae9262..dd162487b80912344ef67428b530c1fe84dc47ed 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -711,7 +711,7 @@ fn printLineInfo(
 
     // Show the matching source code line if possible
     if (line_info) |li| {
-        if (printLineFromFile(out_stream, li)) {
+        if (noasync printLineFromFile(out_stream, li)) {
             if (li.column > 0) {
                 // The caret already takes one char
                 const space_needed = @intCast(usize, li.column - 1);
diff --git a/test/stack_traces.zig b/test/stack_traces.zig
index ad4a34fe4e52b6c45cb74235f4563cd9b1a223b6..81e074f01e19aed38aace4ceaa87fe21f4434337 100644
--- a/test/stack_traces.zig
+++ b/test/stack_traces.zig
@@ -51,11 +51,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in main (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in std.start.main (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -74,13 +78,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in foo (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in std.start.main (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in std.start.main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -99,17 +111,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in make_error (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in bar (test)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in foo (test)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in std.start.main (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in std.start.main (test)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in std.start.main (test)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in std.start.main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -130,11 +158,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in main (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -153,13 +185,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in foo (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -178,17 +218,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in make_error (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in bar (test)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in foo (test)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in main (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in std.start.posixCallMainAndExit (test)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -209,11 +265,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in _main.0 (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in _main (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -232,13 +292,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in _foo (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in _main.0 (test.o)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in _main (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in _main (test.o)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -257,17 +325,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in _make_error (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in _bar (test.o)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in _foo (test.o)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in _main.0 (test.o)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
                     \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in _main (test.o)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in _main (test.o)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in _main (test.o)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in _main (test.o)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-fast
@@ -288,6 +372,8 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                     \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in main (test.obj)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\
                 ,
                 // release-safe
@@ -309,7 +395,11 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                 \\error: TheSkyIsFalling
                     \\source.zig:4:5: [address] in foo (test.obj)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in main (test.obj)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
@@ -331,9 +421,17 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
                 // debug
                 \\error: TheSkyIsFalling
                     \\source.zig:12:5: [address] in make_error (test.obj)
+                    \\    return error.TheSkyIsFalling;
+                    \\    ^
                     \\source.zig:8:5: [address] in bar (test.obj)
+                    \\    return make_error();
+                    \\    ^
                     \\source.zig:4:5: [address] in foo (test.obj)
+                    \\    try bar();
+                    \\    ^
                     \\source.zig:16:5: [address] in main (test.obj)
+                    \\    try foo();
+                    \\    ^
                     \\
                 ,
                 // release-safe
-- 
2.54.0


From 92559cd02cbf6497b99eb5193c9094e6d92c214e Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 19:40:44 -0500
Subject: [PATCH 086/116] hit a comptime limitation with computing dense sets

---
 lib/std/build.zig          |   2 +-
 lib/std/target.zig         | 186 ++++++--
 lib/std/target/aarch64.zig | 645 ++++++++-------------------
 lib/std/target/amdgpu.zig  | 515 +++++++---------------
 lib/std/target/arm.zig     | 869 +++++++++++--------------------------
 lib/std/target/avr.zig     | 656 +++++++++++++---------------
 lib/std/target/bpf.zig     |  30 +-
 lib/std/target/hexagon.zig | 118 ++---
 lib/std/target/mips.zig    | 238 ++++------
 lib/std/target/msp430.zig  |  30 +-
 lib/std/target/nvptx.zig   | 138 ++----
 lib/std/target/powerpc.zig | 286 ++++--------
 lib/std/target/riscv.zig   |  48 +-
 lib/std/target/sparc.zig   | 164 +++----
 lib/std/target/systemz.zig | 172 +++-----
 lib/std/target/wasm.zig    |  54 +--
 lib/std/target/x86.zig     | 649 +++++++++------------------
 src-self-hosted/stage1.zig |  15 +-
 src/all_types.hpp          |   1 +
 src/codegen.cpp            |   6 +-
 src/main.cpp               |   5 +
 21 files changed, 1720 insertions(+), 3107 deletions(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index 32a9e549ded7e82a8afad46874c0228321e2eb7b..a36818fb2908cca2f81fcf74f3b881d5d6584e65 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -1983,7 +1983,7 @@ pub const LibExeObjStep = struct {
 
                         var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
                         for (self.target.getArch().allFeaturesList()) |feature, i| {
-                            if (features.isEnabled(@intCast(u8, i))) {
+                            if (features.isEnabled(@intCast(Target.Cpu.Feature.Set.Index, i))) {
                                 try feature_str_buffer.append(feature.name);
                                 try feature_str_buffer.append(",");
                             }
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 2566a9be372c6099dad62ede9d0eb6fcc2c5cf1d..f5ef5802d653eecc3d35861b4c6099ddee24bd0d 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -172,6 +172,48 @@ pub const Target = union(enum) {
             r6,
         };
 
+        pub fn subArchFeature(arch: Arch) ?u8 {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
+                    .v8_5a => @enumToInt(arm.Feature.armv8_5_a),
+                    .v8_4a => @enumToInt(arm.Feature.armv8_4_a),
+                    .v8_3a => @enumToInt(arm.Feature.armv8_3_a),
+                    .v8_2a => @enumToInt(arm.Feature.armv8_2_a),
+                    .v8_1a => @enumToInt(arm.Feature.armv8_1_a),
+                    .v8 => @enumToInt(arm.Feature.armv8_a),
+                    .v8r => @enumToInt(arm.Feature.armv8_r),
+                    .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
+                    .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
+                    .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
+                    .v7 => @enumToInt(arm.Feature.armv7_a),
+                    .v7em => @enumToInt(arm.Feature.armv7e_m),
+                    .v7m => @enumToInt(arm.Feature.armv7_m),
+                    .v7s => @enumToInt(arm.Feature.armv7s),
+                    .v7k => @enumToInt(arm.Feature.armv7k),
+                    .v7ve => @enumToInt(arm.Feature.armv7ve),
+                    .v6 => @enumToInt(arm.Feature.armv6),
+                    .v6m => @enumToInt(arm.Feature.armv6_m),
+                    .v6k => @enumToInt(arm.Feature.armv6k),
+                    .v6t2 => @enumToInt(arm.Feature.armv6t2),
+                    .v5 => @enumToInt(arm.Feature.armv5t),
+                    .v5te => @enumToInt(arm.Feature.armv5te),
+                    .v4t => @enumToInt(arm.Feature.armv4t),
+                },
+                .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) {
+                    .v8_5a => @enumToInt(aarch64.Feature.v8_5a),
+                    .v8_4a => @enumToInt(aarch64.Feature.v8_4a),
+                    .v8_3a => @enumToInt(aarch64.Feature.v8_3a),
+                    .v8_2a => @enumToInt(aarch64.Feature.v8_2a),
+                    .v8_1a => @enumToInt(aarch64.Feature.v8_1a),
+                    .v8 => @enumToInt(aarch64.Feature.v8_1a),
+                    .v8r => @enumToInt(aarch64.Feature.v8_1a),
+                    .v8m_baseline => @enumToInt(aarch64.Feature.v8_1a),
+                    .v8m_mainline => @enumToInt(aarch64.Feature.v8_1a),
+                },
+                else => return null,
+            };
+        }
+
         pub fn isARM(arch: Arch) bool {
             return switch (arch) {
                 .arm, .armeb => true,
@@ -219,7 +261,7 @@ pub const Target = union(enum) {
         pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set {
             // Here we compute both and choose the correct result at the end, based
             // on whether or not we saw + and - signs.
-            var whitelist_set = Cpu.Feature.Set.empty();
+            var whitelist_set = Cpu.Feature.Set.empty;
             var baseline_set = arch.baselineFeatures();
             var mode: enum {
                 unknown,
@@ -256,16 +298,18 @@ pub const Target = union(enum) {
                     op = .add;
                     feature_name = item_text;
                 }
-                for (arch.allFeaturesList()) |feature, index| {
+                const all_features = arch.allFeaturesList();
+                for (all_features) |feature, index_usize| {
+                    const index = @intCast(Cpu.Feature.Set.Index, index_usize);
                     if (mem.eql(u8, feature_name, feature.name)) {
                         switch (op) {
                             .add => {
-                                baseline_set.addFeature(@intCast(u8, index));
-                                whitelist_set.addFeature(@intCast(u8, index));
+                                baseline_set.addFeature(index, all_features);
+                                whitelist_set.addFeature(index, all_features);
                             },
                             .sub => {
-                                baseline_set.removeFeature(@intCast(u8, index));
-                                whitelist_set.removeFeature(@intCast(u8, index));
+                                baseline_set.removeFeature(index, all_features);
+                                whitelist_set.removeFeature(index, all_features);
                             },
                         }
                         break;
@@ -462,7 +506,7 @@ pub const Target = union(enum) {
                 .nvptx, .nvptx64 => nvptx.cpu.sm_20.features,
                 .wasm32, .wasm64 => wasm.cpu.generic.features,
 
-                else => Cpu.Feature.Set.empty(),
+                else => Cpu.Feature.Set.empty,
             };
         }
 
@@ -521,48 +565,130 @@ pub const Target = union(enum) {
         features: Feature.Set,
 
         pub const Feature = struct {
-            /// The bit index into `Set`.
-            index: u8,
-            name: []const u8,
+            /// The bit index into `Set`. Has a default value of `undefined` because the canonical
+            /// structures are populated via comptime logic.
+            index: Set.Index = undefined,
+
+            /// Has a default value of `undefined` because the canonical
+            /// structures are populated via comptime logic.
+            name: []const u8 = undefined,
+
+            /// If this corresponds to an LLVM-recognized feature, this will be populated;
+            /// otherwise null.
             llvm_name: ?[:0]const u8,
+
+            /// Human-friendly UTF-8 text.
             description: []const u8,
-            dependencies: Set,
+
+            /// `Set` of all features this depends on, and this feature itself.
+            /// Can be "or"ed with another set to remove this feature and all
+            /// its dependencies.
+            /// Has a default value of `undefined` because the canonical
+            /// structures are populated via comptime logic.
+            dependencies: Set = undefined,
 
             /// A bit set of all the features.
             pub const Set = struct {
-                bytes: [bit_count / 8]u8,
+                ints: [usize_count]usize,
 
-                pub const bit_count = 22 * 8;
+                pub const needed_bit_count = 174;
+                pub const byte_count = (needed_bit_count + 7) / 8;
+                pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
+                pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
+                pub const ShiftInt = std.math.Log2Int(usize);
 
-                pub fn empty() Set {
-                    return .{ .bytes = [1]u8{0} ** 22 };
+                pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
+
+                pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
+                    const usize_index = arch_feature_index / @bitSizeOf(usize);
+                    const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
+                    return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
+                }
+
+                /// Adds the specified feature and all its dependencies to the set. O(1).
+                pub fn addFeature(
+                    set: *Set,
+                    arch_feature_index: Index,
+                    all_features_list: []const Cpu.Feature,
+                ) void {
+                    set.ints = @as(@Vector(usize_count, usize), set.ints) |
+                        @as(@Vector(usize_count, usize), all_features_list[arch_feature_index].dependencies.ints);
+                }
+
+                /// Removes the specified feature (TODO and all its dependents) from the set. O(1).
+                /// TODO improve this function to actually handle dependants rather than just calling
+                /// `removeSparseFeature`.
+                pub fn removeFeature(
+                    set: *Set,
+                    arch_feature_index: Index,
+                    all_features_list: []const Cpu.Feature,
+                ) void {
+                    set.removeSparseFeature(arch_feature_index);
+                }
+
+                /// Adds the specified feature but not its dependencies.
+                pub fn addSparseFeature(set: *Set, arch_feature_index: Index) void {
+                    const usize_index = arch_feature_index / @bitSizeOf(usize);
+                    const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
+                    set.ints[usize_index] |= @as(usize, 1) << bit_index;
                 }
 
-                pub fn isEnabled(set: Set, arch_feature_index: u8) bool {
-                    const byte_index = arch_feature_index / 8;
-                    const bit_index = @intCast(u3, arch_feature_index % 8);
-                    return (set.bytes[byte_index] & (@as(u8, 1) << bit_index)) != 0;
+                /// Removes the specified feature but not its dependents.
+                pub fn removeSparseFeature(set: *Set, arch_feature_index: Index) void {
+                    const usize_index = arch_feature_index / @bitSizeOf(usize);
+                    const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
+                    set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
                 }
 
-                pub fn addFeature(set: *Set, arch_feature_index: u8) void {
-                    const byte_index = arch_feature_index / 8;
-                    const bit_index = @intCast(u3, arch_feature_index % 8);
-                    set.bytes[byte_index] |= @as(u8, 1) << bit_index;
+                pub fn initAsDependencies(
+                    set: *Set,
+                    arch_feature_index: Index,
+                    all_features_list: []const Cpu.Feature,
+                ) void {
+                    // fast-case to help reduce how much comptime code must execute
+                    const no_deps = for (set.ints) |elem| {
+                        if (elem != 0) break false;
+                    } else true;
+                    // add itself to its own dependencies for easy "or"ing later
+                    set.addSparseFeature(arch_feature_index);
+                    if (no_deps) return;
+
+                    var old = set.ints;
+                    while (true) {
+                        for (all_features_list) |feature, index| {
+                            const casted_index = @intCast(Index, index);
+                            if (set.isEnabled(casted_index)) {
+                                set.addFeature(casted_index, all_features_list);
+                            }
+                        }
+                        const nothing_changed = mem.eql(usize, &old, &set.ints);
+                        if (nothing_changed) return;
+                        old = set.ints;
+                    }
                 }
 
-                pub fn removeFeature(set: *Set, arch_feature_index: u8) void {
-                    const byte_index = arch_feature_index / 8;
-                    const bit_index = @intCast(u3, arch_feature_index % 8);
-                    set.bytes[byte_index] &= ~(@as(u8, 1) << bit_index);
+                pub fn asBytes(set: *const Set) *const [byte_count]u8 {
+                    return @ptrCast(*const [byte_count]u8, &set.ints);
                 }
             };
 
             pub fn feature_set_fns(comptime F: type) type {
                 return struct {
-                    pub fn featureSet(features: []const F) Set {
-                        var x = Set.empty();
+                    /// Populates a set with the list of features and all their dependencies included.
+                    pub fn featureSet(all_features_list: []const Feature, features: []const F) Set {
+                        var x: Set = Set.empty;
                         for (features) |feature| {
-                            x.addFeature(@enumToInt(feature));
+                            x.addFeature(@enumToInt(feature), all_features_list);
+                        }
+                        @compileLog(Set.empty);
+                        return x;
+                    }
+
+                    /// Populates only the feature bits specified.
+                    pub fn sparseFeatureSet(features: []const F) Set {
+                        var x = Set.empty;
+                        for (features) |feature| {
+                            x.addSparseFeature(@enumToInt(feature));
                         }
                         return x;
                     }
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 980465bb20831596ff72d24913194ba257e3abb2..3ddec8229855af6b0b0dc3a6f9a5ba3ceb2bf9e3 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -153,15 +153,14 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
+    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.a35)] = .{
-        .index = @enumToInt(Feature.a35),
-        .name = @tagName(Feature.a35),
         .llvm_name = "a35",
         .description = "Cortex-A35 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -170,11 +169,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a53)] = .{
-        .index = @enumToInt(Feature.a53),
-        .name = @tagName(Feature.a53),
         .llvm_name = "a53",
         .description = "Cortex-A53 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .balance_fp_ops,
             .crc,
             .crypto,
@@ -188,11 +185,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a55)] = .{
-        .index = @enumToInt(Feature.a55),
-        .name = @tagName(Feature.a55),
         .llvm_name = "a55",
         .description = "Cortex-A55 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -205,11 +200,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a57)] = .{
-        .index = @enumToInt(Feature.a57),
-        .name = @tagName(Feature.a57),
         .llvm_name = "a57",
         .description = "Cortex-A57 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .balance_fp_ops,
             .crc,
             .crypto,
@@ -224,11 +217,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a72)] = .{
-        .index = @enumToInt(Feature.a72),
-        .name = @tagName(Feature.a72),
         .llvm_name = "a72",
         .description = "Cortex-A72 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -238,11 +229,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a73)] = .{
-        .index = @enumToInt(Feature.a73),
-        .name = @tagName(Feature.a73),
         .llvm_name = "a73",
         .description = "Cortex-A73 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -252,11 +241,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a75)] = .{
-        .index = @enumToInt(Feature.a75),
-        .name = @tagName(Feature.a75),
         .llvm_name = "a75",
         .description = "Cortex-A75 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -269,11 +256,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.a76)] = .{
-        .index = @enumToInt(Feature.a76),
-        .name = @tagName(Feature.a76),
         .llvm_name = "a76",
         .description = "Cortex-A76 ARM processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -285,194 +270,142 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.aes)] = .{
-        .index = @enumToInt(Feature.aes),
-        .name = @tagName(Feature.aes),
         .llvm_name = "aes",
         .description = "Enable AES support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.aggressive_fma)] = .{
-        .index = @enumToInt(Feature.aggressive_fma),
-        .name = @tagName(Feature.aggressive_fma),
         .llvm_name = "aggressive-fma",
         .description = "Enable Aggressive FMA for floating-point.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
-        .index = @enumToInt(Feature.alternate_sextload_cvt_f32_pattern),
-        .name = @tagName(Feature.alternate_sextload_cvt_f32_pattern),
         .llvm_name = "alternate-sextload-cvt-f32-pattern",
         .description = "Use alternative pattern for sextload convert to f32",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altnzcv)] = .{
-        .index = @enumToInt(Feature.altnzcv),
-        .name = @tagName(Feature.altnzcv),
         .llvm_name = "altnzcv",
         .description = "Enable alternative NZCV format for floating point comparisons",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.am)] = .{
-        .index = @enumToInt(Feature.am),
-        .name = @tagName(Feature.am),
         .llvm_name = "am",
         .description = "Enable v8.4-A Activity Monitors extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_bcc_fusion)] = .{
-        .index = @enumToInt(Feature.arith_bcc_fusion),
-        .name = @tagName(Feature.arith_bcc_fusion),
         .llvm_name = "arith-bcc-fusion",
         .description = "CPU fuses arithmetic+bcc operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_cbz_fusion)] = .{
-        .index = @enumToInt(Feature.arith_cbz_fusion),
-        .name = @tagName(Feature.arith_cbz_fusion),
         .llvm_name = "arith-cbz-fusion",
         .description = "CPU fuses arithmetic + cbz/cbnz operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.balance_fp_ops)] = .{
-        .index = @enumToInt(Feature.balance_fp_ops),
-        .name = @tagName(Feature.balance_fp_ops),
         .llvm_name = "balance-fp-ops",
         .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bti)] = .{
-        .index = @enumToInt(Feature.bti),
-        .name = @tagName(Feature.bti),
         .llvm_name = "bti",
         .description = "Enable Branch Target Identification",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x10)] = .{
-        .index = @enumToInt(Feature.call_saved_x10),
-        .name = @tagName(Feature.call_saved_x10),
         .llvm_name = "call-saved-x10",
         .description = "Make X10 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x11)] = .{
-        .index = @enumToInt(Feature.call_saved_x11),
-        .name = @tagName(Feature.call_saved_x11),
         .llvm_name = "call-saved-x11",
         .description = "Make X11 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x12)] = .{
-        .index = @enumToInt(Feature.call_saved_x12),
-        .name = @tagName(Feature.call_saved_x12),
         .llvm_name = "call-saved-x12",
         .description = "Make X12 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x13)] = .{
-        .index = @enumToInt(Feature.call_saved_x13),
-        .name = @tagName(Feature.call_saved_x13),
         .llvm_name = "call-saved-x13",
         .description = "Make X13 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x14)] = .{
-        .index = @enumToInt(Feature.call_saved_x14),
-        .name = @tagName(Feature.call_saved_x14),
         .llvm_name = "call-saved-x14",
         .description = "Make X14 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x15)] = .{
-        .index = @enumToInt(Feature.call_saved_x15),
-        .name = @tagName(Feature.call_saved_x15),
         .llvm_name = "call-saved-x15",
         .description = "Make X15 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x18)] = .{
-        .index = @enumToInt(Feature.call_saved_x18),
-        .name = @tagName(Feature.call_saved_x18),
         .llvm_name = "call-saved-x18",
         .description = "Make X18 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x8)] = .{
-        .index = @enumToInt(Feature.call_saved_x8),
-        .name = @tagName(Feature.call_saved_x8),
         .llvm_name = "call-saved-x8",
         .description = "Make X8 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x9)] = .{
-        .index = @enumToInt(Feature.call_saved_x9),
-        .name = @tagName(Feature.call_saved_x9),
         .llvm_name = "call-saved-x9",
         .description = "Make X9 callee saved.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccdp)] = .{
-        .index = @enumToInt(Feature.ccdp),
-        .name = @tagName(Feature.ccdp),
         .llvm_name = "ccdp",
         .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccidx)] = .{
-        .index = @enumToInt(Feature.ccidx),
-        .name = @tagName(Feature.ccidx),
         .llvm_name = "ccidx",
         .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccpp)] = .{
-        .index = @enumToInt(Feature.ccpp),
-        .name = @tagName(Feature.ccpp),
         .llvm_name = "ccpp",
         .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.complxnum)] = .{
-        .index = @enumToInt(Feature.complxnum),
-        .name = @tagName(Feature.complxnum),
         .llvm_name = "complxnum",
         .description = "Enable v8.3-A Floating-point complex number support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.crc)] = .{
-        .index = @enumToInt(Feature.crc),
-        .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Enable ARMv8 CRC-32 checksum instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
-        .index = @enumToInt(Feature.crypto),
-        .name = @tagName(Feature.crypto),
         .llvm_name = "crypto",
         .description = "Enable cryptographic instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aes,
             .neon,
             .sha2,
         }),
     };
     result[@enumToInt(Feature.custom_cheap_as_move)] = .{
-        .index = @enumToInt(Feature.custom_cheap_as_move),
-        .name = @tagName(Feature.custom_cheap_as_move),
         .llvm_name = "custom-cheap-as-move",
         .description = "Use custom handling of cheap instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cyclone)] = .{
-        .index = @enumToInt(Feature.cyclone),
-        .name = @tagName(Feature.cyclone),
         .llvm_name = "cyclone",
         .description = "Cyclone",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .alternate_sextload_cvt_f32_pattern,
             .arith_bcc_fusion,
             .arith_cbz_fusion,
@@ -489,41 +422,31 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
-        .index = @enumToInt(Feature.disable_latency_sched_heuristic),
-        .name = @tagName(Feature.disable_latency_sched_heuristic),
         .llvm_name = "disable-latency-sched-heuristic",
         .description = "Disable latency scheduling heuristic",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dit)] = .{
-        .index = @enumToInt(Feature.dit),
-        .name = @tagName(Feature.dit),
         .llvm_name = "dit",
         .description = "Enable v8.4-A Data Independent Timing instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
-        .index = @enumToInt(Feature.dotprod),
-        .name = @tagName(Feature.dotprod),
         .llvm_name = "dotprod",
         .description = "Enable dot product support",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
-        .index = @enumToInt(Feature.exynos_cheap_as_move),
-        .name = @tagName(Feature.exynos_cheap_as_move),
         .llvm_name = "exynos-cheap-as-move",
         .description = "Use Exynos specific handling of cheap instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .custom_cheap_as_move,
         }),
     };
     result[@enumToInt(Feature.exynosm1)] = .{
-        .index = @enumToInt(Feature.exynosm1),
-        .name = @tagName(Feature.exynosm1),
         .llvm_name = "exynosm1",
         .description = "Samsung Exynos-M1 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -538,11 +461,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.exynosm2)] = .{
-        .index = @enumToInt(Feature.exynosm2),
-        .name = @tagName(Feature.exynosm2),
         .llvm_name = "exynosm2",
         .description = "Samsung Exynos-M2 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -556,11 +477,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.exynosm3)] = .{
-        .index = @enumToInt(Feature.exynosm3),
-        .name = @tagName(Feature.exynosm3),
         .llvm_name = "exynosm3",
         .description = "Samsung Exynos-M3 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -577,11 +496,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.exynosm4)] = .{
-        .index = @enumToInt(Feature.exynosm4),
-        .name = @tagName(Feature.exynosm4),
         .llvm_name = "exynosm4",
         .description = "Samsung Exynos-M4 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .arith_bcc_fusion,
             .arith_cbz_fusion,
             .crypto,
@@ -602,11 +519,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.falkor)] = .{
-        .index = @enumToInt(Feature.falkor),
-        .name = @tagName(Feature.falkor),
         .llvm_name = "falkor",
         .description = "Qualcomm Falkor processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .custom_cheap_as_move,
@@ -622,108 +537,80 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.fmi)] = .{
-        .index = @enumToInt(Feature.fmi),
-        .name = @tagName(Feature.fmi),
         .llvm_name = "fmi",
         .description = "Enable v8.4-A Flag Manipulation Instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
-        .index = @enumToInt(Feature.force_32bit_jump_tables),
-        .name = @tagName(Feature.force_32bit_jump_tables),
         .llvm_name = "force-32bit-jump-tables",
         .description = "Force jump table entries to be 32-bits wide except at MinSize",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_armv8)] = .{
-        .index = @enumToInt(Feature.fp_armv8),
-        .name = @tagName(Feature.fp_armv8),
         .llvm_name = "fp-armv8",
         .description = "Enable ARMv8 FP",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
-        .index = @enumToInt(Feature.fp16fml),
-        .name = @tagName(Feature.fp16fml),
         .llvm_name = "fp16fml",
         .description = "Enable FP16 FML instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fullfp16,
         }),
     };
     result[@enumToInt(Feature.fptoint)] = .{
-        .index = @enumToInt(Feature.fptoint),
-        .name = @tagName(Feature.fptoint),
         .llvm_name = "fptoint",
         .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fullfp16)] = .{
-        .index = @enumToInt(Feature.fullfp16),
-        .name = @tagName(Feature.fullfp16),
         .llvm_name = "fullfp16",
         .description = "Full FP16",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.fuse_address)] = .{
-        .index = @enumToInt(Feature.fuse_address),
-        .name = @tagName(Feature.fuse_address),
         .llvm_name = "fuse-address",
         .description = "CPU fuses address generation and memory operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_aes)] = .{
-        .index = @enumToInt(Feature.fuse_aes),
-        .name = @tagName(Feature.fuse_aes),
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_arith_logic)] = .{
-        .index = @enumToInt(Feature.fuse_arith_logic),
-        .name = @tagName(Feature.fuse_arith_logic),
         .llvm_name = "fuse-arith-logic",
         .description = "CPU fuses arithmetic and logic operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_crypto_eor)] = .{
-        .index = @enumToInt(Feature.fuse_crypto_eor),
-        .name = @tagName(Feature.fuse_crypto_eor),
         .llvm_name = "fuse-crypto-eor",
         .description = "CPU fuses AES/PMULL and EOR operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_csel)] = .{
-        .index = @enumToInt(Feature.fuse_csel),
-        .name = @tagName(Feature.fuse_csel),
         .llvm_name = "fuse-csel",
         .description = "CPU fuses conditional select operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
-        .index = @enumToInt(Feature.fuse_literals),
-        .name = @tagName(Feature.fuse_literals),
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jsconv)] = .{
-        .index = @enumToInt(Feature.jsconv),
-        .name = @tagName(Feature.jsconv),
         .llvm_name = "jsconv",
         .description = "Enable v8.3-A JavaScript FP conversion enchancement",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.kryo)] = .{
-        .index = @enumToInt(Feature.kryo),
-        .name = @tagName(Feature.kryo),
         .llvm_name = "kryo",
         .description = "Qualcomm Kryo processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .custom_cheap_as_move,
@@ -737,327 +624,237 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.lor)] = .{
-        .index = @enumToInt(Feature.lor),
-        .name = @tagName(Feature.lor),
         .llvm_name = "lor",
         .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lse)] = .{
-        .index = @enumToInt(Feature.lse),
-        .name = @tagName(Feature.lse),
         .llvm_name = "lse",
         .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lsl_fast)] = .{
-        .index = @enumToInt(Feature.lsl_fast),
-        .name = @tagName(Feature.lsl_fast),
         .llvm_name = "lsl-fast",
         .description = "CPU has a fastpath logical shift of up to 3 places",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpam)] = .{
-        .index = @enumToInt(Feature.mpam),
-        .name = @tagName(Feature.mpam),
         .llvm_name = "mpam",
         .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mte)] = .{
-        .index = @enumToInt(Feature.mte),
-        .name = @tagName(Feature.mte),
         .llvm_name = "mte",
         .description = "Enable Memory Tagging Extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
-        .index = @enumToInt(Feature.neon),
-        .name = @tagName(Feature.neon),
         .llvm_name = "neon",
         .description = "Enable Advanced SIMD instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
-        .index = @enumToInt(Feature.no_neg_immediates),
-        .name = @tagName(Feature.no_neg_immediates),
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nv)] = .{
-        .index = @enumToInt(Feature.nv),
-        .name = @tagName(Feature.nv),
         .llvm_name = "nv",
         .description = "Enable v8.4-A Nested Virtualization Enchancement",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pa)] = .{
-        .index = @enumToInt(Feature.pa),
-        .name = @tagName(Feature.pa),
         .llvm_name = "pa",
         .description = "Enable v8.3-A Pointer Authentication enchancement",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan)] = .{
-        .index = @enumToInt(Feature.pan),
-        .name = @tagName(Feature.pan),
         .llvm_name = "pan",
         .description = "Enables ARM v8.1 Privileged Access-Never extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan_rwv)] = .{
-        .index = @enumToInt(Feature.pan_rwv),
-        .name = @tagName(Feature.pan_rwv),
         .llvm_name = "pan-rwv",
         .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .pan,
         }),
     };
     result[@enumToInt(Feature.perfmon)] = .{
-        .index = @enumToInt(Feature.perfmon),
-        .name = @tagName(Feature.perfmon),
         .llvm_name = "perfmon",
         .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predictable_select_expensive)] = .{
-        .index = @enumToInt(Feature.predictable_select_expensive),
-        .name = @tagName(Feature.predictable_select_expensive),
         .llvm_name = "predictable-select-expensive",
         .description = "Prefer likely predicted branches over selects",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predres)] = .{
-        .index = @enumToInt(Feature.predres),
-        .name = @tagName(Feature.predres),
         .llvm_name = "predres",
         .description = "Enable v8.5a execution and data prediction invalidation instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rand)] = .{
-        .index = @enumToInt(Feature.rand),
-        .name = @tagName(Feature.rand),
         .llvm_name = "rand",
         .description = "Enable Random Number generation instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
-        .index = @enumToInt(Feature.ras),
-        .name = @tagName(Feature.ras),
         .llvm_name = "ras",
         .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rasv8_4)] = .{
-        .index = @enumToInt(Feature.rasv8_4),
-        .name = @tagName(Feature.rasv8_4),
         .llvm_name = "rasv8_4",
         .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .ras,
         }),
     };
     result[@enumToInt(Feature.rcpc)] = .{
-        .index = @enumToInt(Feature.rcpc),
-        .name = @tagName(Feature.rcpc),
         .llvm_name = "rcpc",
         .description = "Enable support for RCPC extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rcpc_immo)] = .{
-        .index = @enumToInt(Feature.rcpc_immo),
-        .name = @tagName(Feature.rcpc_immo),
         .llvm_name = "rcpc-immo",
         .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .rcpc,
         }),
     };
     result[@enumToInt(Feature.rdm)] = .{
-        .index = @enumToInt(Feature.rdm),
-        .name = @tagName(Feature.rdm),
         .llvm_name = "rdm",
         .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x1)] = .{
-        .index = @enumToInt(Feature.reserve_x1),
-        .name = @tagName(Feature.reserve_x1),
         .llvm_name = "reserve-x1",
         .description = "Reserve X1, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x10)] = .{
-        .index = @enumToInt(Feature.reserve_x10),
-        .name = @tagName(Feature.reserve_x10),
         .llvm_name = "reserve-x10",
         .description = "Reserve X10, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x11)] = .{
-        .index = @enumToInt(Feature.reserve_x11),
-        .name = @tagName(Feature.reserve_x11),
         .llvm_name = "reserve-x11",
         .description = "Reserve X11, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x12)] = .{
-        .index = @enumToInt(Feature.reserve_x12),
-        .name = @tagName(Feature.reserve_x12),
         .llvm_name = "reserve-x12",
         .description = "Reserve X12, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x13)] = .{
-        .index = @enumToInt(Feature.reserve_x13),
-        .name = @tagName(Feature.reserve_x13),
         .llvm_name = "reserve-x13",
         .description = "Reserve X13, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x14)] = .{
-        .index = @enumToInt(Feature.reserve_x14),
-        .name = @tagName(Feature.reserve_x14),
         .llvm_name = "reserve-x14",
         .description = "Reserve X14, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x15)] = .{
-        .index = @enumToInt(Feature.reserve_x15),
-        .name = @tagName(Feature.reserve_x15),
         .llvm_name = "reserve-x15",
         .description = "Reserve X15, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x18)] = .{
-        .index = @enumToInt(Feature.reserve_x18),
-        .name = @tagName(Feature.reserve_x18),
         .llvm_name = "reserve-x18",
         .description = "Reserve X18, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x2)] = .{
-        .index = @enumToInt(Feature.reserve_x2),
-        .name = @tagName(Feature.reserve_x2),
         .llvm_name = "reserve-x2",
         .description = "Reserve X2, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x20)] = .{
-        .index = @enumToInt(Feature.reserve_x20),
-        .name = @tagName(Feature.reserve_x20),
         .llvm_name = "reserve-x20",
         .description = "Reserve X20, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x21)] = .{
-        .index = @enumToInt(Feature.reserve_x21),
-        .name = @tagName(Feature.reserve_x21),
         .llvm_name = "reserve-x21",
         .description = "Reserve X21, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x22)] = .{
-        .index = @enumToInt(Feature.reserve_x22),
-        .name = @tagName(Feature.reserve_x22),
         .llvm_name = "reserve-x22",
         .description = "Reserve X22, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x23)] = .{
-        .index = @enumToInt(Feature.reserve_x23),
-        .name = @tagName(Feature.reserve_x23),
         .llvm_name = "reserve-x23",
         .description = "Reserve X23, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x24)] = .{
-        .index = @enumToInt(Feature.reserve_x24),
-        .name = @tagName(Feature.reserve_x24),
         .llvm_name = "reserve-x24",
         .description = "Reserve X24, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x25)] = .{
-        .index = @enumToInt(Feature.reserve_x25),
-        .name = @tagName(Feature.reserve_x25),
         .llvm_name = "reserve-x25",
         .description = "Reserve X25, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x26)] = .{
-        .index = @enumToInt(Feature.reserve_x26),
-        .name = @tagName(Feature.reserve_x26),
         .llvm_name = "reserve-x26",
         .description = "Reserve X26, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x27)] = .{
-        .index = @enumToInt(Feature.reserve_x27),
-        .name = @tagName(Feature.reserve_x27),
         .llvm_name = "reserve-x27",
         .description = "Reserve X27, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x28)] = .{
-        .index = @enumToInt(Feature.reserve_x28),
-        .name = @tagName(Feature.reserve_x28),
         .llvm_name = "reserve-x28",
         .description = "Reserve X28, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x3)] = .{
-        .index = @enumToInt(Feature.reserve_x3),
-        .name = @tagName(Feature.reserve_x3),
         .llvm_name = "reserve-x3",
         .description = "Reserve X3, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x4)] = .{
-        .index = @enumToInt(Feature.reserve_x4),
-        .name = @tagName(Feature.reserve_x4),
         .llvm_name = "reserve-x4",
         .description = "Reserve X4, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x5)] = .{
-        .index = @enumToInt(Feature.reserve_x5),
-        .name = @tagName(Feature.reserve_x5),
         .llvm_name = "reserve-x5",
         .description = "Reserve X5, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x6)] = .{
-        .index = @enumToInt(Feature.reserve_x6),
-        .name = @tagName(Feature.reserve_x6),
         .llvm_name = "reserve-x6",
         .description = "Reserve X6, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x7)] = .{
-        .index = @enumToInt(Feature.reserve_x7),
-        .name = @tagName(Feature.reserve_x7),
         .llvm_name = "reserve-x7",
         .description = "Reserve X7, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x9)] = .{
-        .index = @enumToInt(Feature.reserve_x9),
-        .name = @tagName(Feature.reserve_x9),
         .llvm_name = "reserve-x9",
         .description = "Reserve X9, making it unavailable as a GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.saphira)] = .{
-        .index = @enumToInt(Feature.saphira),
-        .name = @tagName(Feature.saphira),
         .llvm_name = "saphira",
         .description = "Qualcomm Saphira processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crypto,
             .custom_cheap_as_move,
             .fp_armv8,
@@ -1072,157 +869,119 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.sb)] = .{
-        .index = @enumToInt(Feature.sb),
-        .name = @tagName(Feature.sb),
         .llvm_name = "sb",
         .description = "Enable v8.5 Speculation Barrier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sel2)] = .{
-        .index = @enumToInt(Feature.sel2),
-        .name = @tagName(Feature.sel2),
         .llvm_name = "sel2",
         .description = "Enable v8.4-A Secure Exception Level 2 extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
-        .index = @enumToInt(Feature.sha2),
-        .name = @tagName(Feature.sha2),
         .llvm_name = "sha2",
         .description = "Enable SHA1 and SHA256 support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.sha3)] = .{
-        .index = @enumToInt(Feature.sha3),
-        .name = @tagName(Feature.sha3),
         .llvm_name = "sha3",
         .description = "Enable SHA512 and SHA3 support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
             .sha2,
         }),
     };
     result[@enumToInt(Feature.slow_misaligned_128store)] = .{
-        .index = @enumToInt(Feature.slow_misaligned_128store),
-        .name = @tagName(Feature.slow_misaligned_128store),
         .llvm_name = "slow-misaligned-128store",
         .description = "Misaligned 128 bit stores are slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_paired_128)] = .{
-        .index = @enumToInt(Feature.slow_paired_128),
-        .name = @tagName(Feature.slow_paired_128),
         .llvm_name = "slow-paired-128",
         .description = "Paired 128 bit loads and stores are slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_strqro_store)] = .{
-        .index = @enumToInt(Feature.slow_strqro_store),
-        .name = @tagName(Feature.slow_strqro_store),
         .llvm_name = "slow-strqro-store",
         .description = "STR of Q register with register offset is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm4)] = .{
-        .index = @enumToInt(Feature.sm4),
-        .name = @tagName(Feature.sm4),
         .llvm_name = "sm4",
         .description = "Enable SM3 and SM4 support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.spe)] = .{
-        .index = @enumToInt(Feature.spe),
-        .name = @tagName(Feature.spe),
         .llvm_name = "spe",
         .description = "Enable Statistical Profiling extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.specrestrict)] = .{
-        .index = @enumToInt(Feature.specrestrict),
-        .name = @tagName(Feature.specrestrict),
         .llvm_name = "specrestrict",
         .description = "Enable architectural speculation restriction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ssbs)] = .{
-        .index = @enumToInt(Feature.ssbs),
-        .name = @tagName(Feature.ssbs),
         .llvm_name = "ssbs",
         .description = "Enable Speculative Store Bypass Safe bit",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.strict_align)] = .{
-        .index = @enumToInt(Feature.strict_align),
-        .name = @tagName(Feature.strict_align),
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve)] = .{
-        .index = @enumToInt(Feature.sve),
-        .name = @tagName(Feature.sve),
         .llvm_name = "sve",
         .description = "Enable Scalable Vector Extension (SVE) instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve2)] = .{
-        .index = @enumToInt(Feature.sve2),
-        .name = @tagName(Feature.sve2),
         .llvm_name = "sve2",
         .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sve,
         }),
     };
     result[@enumToInt(Feature.sve2_aes)] = .{
-        .index = @enumToInt(Feature.sve2_aes),
-        .name = @tagName(Feature.sve2_aes),
         .llvm_name = "sve2-aes",
         .description = "Enable AES SVE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aes,
             .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_bitperm)] = .{
-        .index = @enumToInt(Feature.sve2_bitperm),
-        .name = @tagName(Feature.sve2_bitperm),
         .llvm_name = "sve2-bitperm",
         .description = "Enable bit permutation SVE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_sha3)] = .{
-        .index = @enumToInt(Feature.sve2_sha3),
-        .name = @tagName(Feature.sve2_sha3),
         .llvm_name = "sve2-sha3",
         .description = "Enable SHA3 SVE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sha3,
             .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_sm4)] = .{
-        .index = @enumToInt(Feature.sve2_sm4),
-        .name = @tagName(Feature.sve2_sm4),
         .llvm_name = "sve2-sm4",
         .description = "Enable SM4 SVE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sm4,
             .sve2,
         }),
     };
     result[@enumToInt(Feature.thunderx)] = .{
-        .index = @enumToInt(Feature.thunderx),
-        .name = @tagName(Feature.thunderx),
         .llvm_name = "thunderx",
         .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1233,11 +992,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.thunderx2t99)] = .{
-        .index = @enumToInt(Feature.thunderx2t99),
-        .name = @tagName(Feature.thunderx2t99),
         .llvm_name = "thunderx2t99",
         .description = "Cavium ThunderX2 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aggressive_fma,
             .arith_bcc_fusion,
             .crc,
@@ -1251,11 +1008,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.thunderxt81)] = .{
-        .index = @enumToInt(Feature.thunderxt81),
-        .name = @tagName(Feature.thunderxt81),
         .llvm_name = "thunderxt81",
         .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1266,11 +1021,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.thunderxt83)] = .{
-        .index = @enumToInt(Feature.thunderxt83),
-        .name = @tagName(Feature.thunderxt83),
         .llvm_name = "thunderxt83",
         .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1281,11 +1034,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.thunderxt88)] = .{
-        .index = @enumToInt(Feature.thunderxt88),
-        .name = @tagName(Feature.thunderxt88),
         .llvm_name = "thunderxt88",
         .description = "Cavium ThunderX processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1296,46 +1047,34 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.tlb_rmi)] = .{
-        .index = @enumToInt(Feature.tlb_rmi),
-        .name = @tagName(Feature.tlb_rmi),
         .llvm_name = "tlb-rmi",
         .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el1)] = .{
-        .index = @enumToInt(Feature.tpidr_el1),
-        .name = @tagName(Feature.tpidr_el1),
         .llvm_name = "tpidr-el1",
         .description = "Permit use of TPIDR_EL1 for the TLS base",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el2)] = .{
-        .index = @enumToInt(Feature.tpidr_el2),
-        .name = @tagName(Feature.tpidr_el2),
         .llvm_name = "tpidr-el2",
         .description = "Permit use of TPIDR_EL2 for the TLS base",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el3)] = .{
-        .index = @enumToInt(Feature.tpidr_el3),
-        .name = @tagName(Feature.tpidr_el3),
         .llvm_name = "tpidr-el3",
         .description = "Permit use of TPIDR_EL3 for the TLS base",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tracev8_4)] = .{
-        .index = @enumToInt(Feature.tracev8_4),
-        .name = @tagName(Feature.tracev8_4),
         .llvm_name = "tracev8.4",
         .description = "Enable v8.4-A Trace extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tsv110)] = .{
-        .index = @enumToInt(Feature.tsv110),
-        .name = @tagName(Feature.tsv110),
         .llvm_name = "tsv110",
         .description = "HiSilicon TS-V110 processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crypto,
             .custom_cheap_as_move,
             .dotprod,
@@ -1351,39 +1090,29 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.uaops)] = .{
-        .index = @enumToInt(Feature.uaops),
-        .name = @tagName(Feature.uaops),
         .llvm_name = "uaops",
         .description = "Enable v8.2 UAO PState",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
-        .index = @enumToInt(Feature.use_aa),
-        .name = @tagName(Feature.use_aa),
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_postra_scheduler)] = .{
-        .index = @enumToInt(Feature.use_postra_scheduler),
-        .name = @tagName(Feature.use_postra_scheduler),
         .llvm_name = "use-postra-scheduler",
         .description = "Schedule again after register allocation",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
-        .index = @enumToInt(Feature.use_reciprocal_square_root),
-        .name = @tagName(Feature.use_reciprocal_square_root),
         .llvm_name = "use-reciprocal-square-root",
         .description = "Use the reciprocal square root approximation",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8_1a)] = .{
-        .index = @enumToInt(Feature.v8_1a),
-        .name = @tagName(Feature.v8_1a),
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .lor,
             .lse,
@@ -1393,11 +1122,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
-        .index = @enumToInt(Feature.v8_2a),
-        .name = @tagName(Feature.v8_2a),
         .llvm_name = "v8.2a",
         .description = "Support ARM v8.2a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .ccpp,
             .pan_rwv,
             .ras,
@@ -1406,11 +1133,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.v8_3a)] = .{
-        .index = @enumToInt(Feature.v8_3a),
-        .name = @tagName(Feature.v8_3a),
         .llvm_name = "v8.3a",
         .description = "Support ARM v8.3a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .ccidx,
             .complxnum,
             .jsconv,
@@ -1420,11 +1145,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.v8_4a)] = .{
-        .index = @enumToInt(Feature.v8_4a),
-        .name = @tagName(Feature.v8_4a),
         .llvm_name = "v8.4a",
         .description = "Support ARM v8.4a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .am,
             .dit,
             .dotprod,
@@ -1440,11 +1163,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.v8_5a)] = .{
-        .index = @enumToInt(Feature.v8_5a),
-        .name = @tagName(Feature.v8_5a),
         .llvm_name = "v8.5a",
         .description = "Support ARM v8.5a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .altnzcv,
             .bti,
             .ccdp,
@@ -1457,50 +1178,44 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.vh)] = .{
-        .index = @enumToInt(Feature.vh),
-        .name = @tagName(Feature.vh),
         .llvm_name = "vh",
         .description = "Enables ARM v8.1 Virtual Host extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcm)] = .{
-        .index = @enumToInt(Feature.zcm),
-        .name = @tagName(Feature.zcm),
         .llvm_name = "zcm",
         .description = "Has zero-cycle register moves",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz)] = .{
-        .index = @enumToInt(Feature.zcz),
-        .name = @tagName(Feature.zcz),
         .llvm_name = "zcz",
         .description = "Has zero-cycle zeroing instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .zcz_fp,
             .zcz_gp,
         }),
     };
     result[@enumToInt(Feature.zcz_fp)] = .{
-        .index = @enumToInt(Feature.zcz_fp),
-        .name = @tagName(Feature.zcz_fp),
         .llvm_name = "zcz-fp",
         .description = "Has zero-cycle zeroing instructions for FP registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_fp_workaround)] = .{
-        .index = @enumToInt(Feature.zcz_fp_workaround),
-        .name = @tagName(Feature.zcz_fp_workaround),
         .llvm_name = "zcz-fp-workaround",
         .description = "The zero-cycle floating-point zeroing instruction has a bug",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_gp)] = .{
-        .index = @enumToInt(Feature.zcz_gp),
-        .name = @tagName(Feature.zcz_gp),
         .llvm_name = "zcz-gp",
         .description = "Has zero-cycle zeroing instructions for generic registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -1508,126 +1223,126 @@ pub const cpu = struct {
     pub const apple_latest = Cpu{
         .name = "apple_latest",
         .llvm_name = "apple-latest",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cyclone,
         }),
     };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a35,
         }),
     };
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a53,
         }),
     };
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a55,
         }),
     };
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a57,
         }),
     };
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a72,
         }),
     };
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a73,
         }),
     };
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a75,
         }),
     };
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a76,
         }),
     };
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a76,
         }),
     };
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cyclone,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .exynosm1,
         }),
     };
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .exynosm2,
         }),
     };
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .exynosm3,
         }),
     };
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .exynosm4,
         }),
     };
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .exynosm4,
         }),
     };
     pub const falkor = Cpu{
         .name = "falkor",
         .llvm_name = "falkor",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .falkor,
         }),
     };
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fp_armv8,
             .fuse_aes,
             .neon,
@@ -1638,56 +1353,56 @@ pub const cpu = struct {
     pub const kryo = Cpu{
         .name = "kryo",
         .llvm_name = "kryo",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .kryo,
         }),
     };
     pub const saphira = Cpu{
         .name = "saphira",
         .llvm_name = "saphira",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .saphira,
         }),
     };
     pub const thunderx = Cpu{
         .name = "thunderx",
         .llvm_name = "thunderx",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .thunderx,
         }),
     };
     pub const thunderx2t99 = Cpu{
         .name = "thunderx2t99",
         .llvm_name = "thunderx2t99",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .thunderx2t99,
         }),
     };
     pub const thunderxt81 = Cpu{
         .name = "thunderxt81",
         .llvm_name = "thunderxt81",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .thunderxt81,
         }),
     };
     pub const thunderxt83 = Cpu{
         .name = "thunderxt83",
         .llvm_name = "thunderxt83",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .thunderxt83,
         }),
     };
     pub const thunderxt88 = Cpu{
         .name = "thunderxt88",
         .llvm_name = "thunderxt88",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .thunderxt88,
         }),
     };
     pub const tsv110 = Cpu{
         .name = "tsv110",
         .llvm_name = "tsv110",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .tsv110,
         }),
     };
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index b1953ca83e5fdc7bcff570f0b152bfed3e3993ea..54bd073c2c0a4551596f259371b58d03f5423a52 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -114,281 +114,206 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
+    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"16_bit_insts")] = .{
-        .index = @enumToInt(Feature.@"16_bit_insts"),
-        .name = @tagName(Feature.@"16_bit_insts"),
         .llvm_name = "16-bit-insts",
         .description = "Has i16/f16 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.DumpCode)] = .{
-        .index = @enumToInt(Feature.DumpCode),
-        .name = @tagName(Feature.DumpCode),
         .llvm_name = "DumpCode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.add_no_carry_insts)] = .{
-        .index = @enumToInt(Feature.add_no_carry_insts),
-        .name = @tagName(Feature.add_no_carry_insts),
         .llvm_name = "add-no-carry-insts",
         .description = "Have VALU add/sub instructions without carry out",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aperture_regs)] = .{
-        .index = @enumToInt(Feature.aperture_regs),
-        .name = @tagName(Feature.aperture_regs),
         .llvm_name = "aperture-regs",
         .description = "Has Memory Aperture Base and Size Registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.atomic_fadd_insts)] = .{
-        .index = @enumToInt(Feature.atomic_fadd_insts),
-        .name = @tagName(Feature.atomic_fadd_insts),
         .llvm_name = "atomic-fadd-insts",
         .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
-        .index = @enumToInt(Feature.auto_waitcnt_before_barrier),
-        .name = @tagName(Feature.auto_waitcnt_before_barrier),
         .llvm_name = "auto-waitcnt-before-barrier",
         .description = "Hardware automatically inserts waitcnt before barrier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ci_insts)] = .{
-        .index = @enumToInt(Feature.ci_insts),
-        .name = @tagName(Feature.ci_insts),
         .llvm_name = "ci-insts",
         .description = "Additional instructions for CI+",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.code_object_v3)] = .{
-        .index = @enumToInt(Feature.code_object_v3),
-        .name = @tagName(Feature.code_object_v3),
         .llvm_name = "code-object-v3",
         .description = "Generate code object version 3",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cumode)] = .{
-        .index = @enumToInt(Feature.cumode),
-        .name = @tagName(Feature.cumode),
         .llvm_name = "cumode",
         .description = "Enable CU wavefront execution mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dl_insts)] = .{
-        .index = @enumToInt(Feature.dl_insts),
-        .name = @tagName(Feature.dl_insts),
         .llvm_name = "dl-insts",
         .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot1_insts)] = .{
-        .index = @enumToInt(Feature.dot1_insts),
-        .name = @tagName(Feature.dot1_insts),
         .llvm_name = "dot1-insts",
         .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot2_insts)] = .{
-        .index = @enumToInt(Feature.dot2_insts),
-        .name = @tagName(Feature.dot2_insts),
         .llvm_name = "dot2-insts",
         .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot3_insts)] = .{
-        .index = @enumToInt(Feature.dot3_insts),
-        .name = @tagName(Feature.dot3_insts),
         .llvm_name = "dot3-insts",
         .description = "Has v_dot8c_i32_i4 instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot4_insts)] = .{
-        .index = @enumToInt(Feature.dot4_insts),
-        .name = @tagName(Feature.dot4_insts),
         .llvm_name = "dot4-insts",
         .description = "Has v_dot2c_i32_i16 instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot5_insts)] = .{
-        .index = @enumToInt(Feature.dot5_insts),
-        .name = @tagName(Feature.dot5_insts),
         .llvm_name = "dot5-insts",
         .description = "Has v_dot2c_f32_f16 instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot6_insts)] = .{
-        .index = @enumToInt(Feature.dot6_insts),
-        .name = @tagName(Feature.dot6_insts),
         .llvm_name = "dot6-insts",
         .description = "Has v_dot4c_i32_i8 instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp)] = .{
-        .index = @enumToInt(Feature.dpp),
-        .name = @tagName(Feature.dpp),
         .llvm_name = "dpp",
         .description = "Support DPP (Data Parallel Primitives) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp8)] = .{
-        .index = @enumToInt(Feature.dpp8),
-        .name = @tagName(Feature.dpp8),
         .llvm_name = "dpp8",
         .description = "Support DPP8 (Data Parallel Primitives) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dumpcode)] = .{
-        .index = @enumToInt(Feature.dumpcode),
-        .name = @tagName(Feature.dumpcode),
         .llvm_name = "dumpcode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_ds128)] = .{
-        .index = @enumToInt(Feature.enable_ds128),
-        .name = @tagName(Feature.enable_ds128),
         .llvm_name = "enable-ds128",
         .description = "Use ds_read|write_b128",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_prt_strict_null)] = .{
-        .index = @enumToInt(Feature.enable_prt_strict_null),
-        .name = @tagName(Feature.enable_prt_strict_null),
         .llvm_name = "enable-prt-strict-null",
         .description = "Enable zeroing of result registers for sparse texture fetches",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_fmaf)] = .{
-        .index = @enumToInt(Feature.fast_fmaf),
-        .name = @tagName(Feature.fast_fmaf),
         .llvm_name = "fast-fmaf",
         .description = "Assuming f32 fma is at least as fast as mul + add",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_address_space)] = .{
-        .index = @enumToInt(Feature.flat_address_space),
-        .name = @tagName(Feature.flat_address_space),
         .llvm_name = "flat-address-space",
         .description = "Support flat address space",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_for_global)] = .{
-        .index = @enumToInt(Feature.flat_for_global),
-        .name = @tagName(Feature.flat_for_global),
         .llvm_name = "flat-for-global",
         .description = "Force to generate flat instruction for global",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_global_insts)] = .{
-        .index = @enumToInt(Feature.flat_global_insts),
-        .name = @tagName(Feature.flat_global_insts),
         .llvm_name = "flat-global-insts",
         .description = "Have global_* flat memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_inst_offsets)] = .{
-        .index = @enumToInt(Feature.flat_inst_offsets),
-        .name = @tagName(Feature.flat_inst_offsets),
         .llvm_name = "flat-inst-offsets",
         .description = "Flat instructions have immediate offset addressing mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_scratch_insts)] = .{
-        .index = @enumToInt(Feature.flat_scratch_insts),
-        .name = @tagName(Feature.flat_scratch_insts),
         .llvm_name = "flat-scratch-insts",
         .description = "Have scratch_* flat memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
-        .index = @enumToInt(Feature.flat_segment_offset_bug),
-        .name = @tagName(Feature.flat_segment_offset_bug),
         .llvm_name = "flat-segment-offset-bug",
         .description = "GFX10 bug, inst_offset ignored in flat segment",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma_mix_insts)] = .{
-        .index = @enumToInt(Feature.fma_mix_insts),
-        .name = @tagName(Feature.fma_mix_insts),
         .llvm_name = "fma-mix-insts",
         .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fmaf)] = .{
-        .index = @enumToInt(Feature.fmaf),
-        .name = @tagName(Feature.fmaf),
         .llvm_name = "fmaf",
         .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_exceptions)] = .{
-        .index = @enumToInt(Feature.fp_exceptions),
-        .name = @tagName(Feature.fp_exceptions),
         .llvm_name = "fp-exceptions",
         .description = "Enable floating point exceptions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16_denormals)] = .{
-        .index = @enumToInt(Feature.fp16_denormals),
-        .name = @tagName(Feature.fp16_denormals),
         .llvm_name = "fp16-denormals",
         .description = "Enable half precision denormal handling",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64_fp16_denormals,
         }),
     };
     result[@enumToInt(Feature.fp32_denormals)] = .{
-        .index = @enumToInt(Feature.fp32_denormals),
-        .name = @tagName(Feature.fp32_denormals),
         .llvm_name = "fp32-denormals",
         .description = "Enable single precision denormal handling",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
-        .index = @enumToInt(Feature.fp64),
-        .name = @tagName(Feature.fp64),
         .llvm_name = "fp64",
         .description = "Enable double precision operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64_denormals)] = .{
-        .index = @enumToInt(Feature.fp64_denormals),
-        .name = @tagName(Feature.fp64_denormals),
         .llvm_name = "fp64-denormals",
         .description = "Enable double and half precision denormal handling",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
             .fp64_fp16_denormals,
         }),
     };
     result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
-        .index = @enumToInt(Feature.fp64_fp16_denormals),
-        .name = @tagName(Feature.fp64_fp16_denormals),
         .llvm_name = "fp64-fp16-denormals",
         .description = "Enable double and half precision denormal handling",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
         }),
     };
     result[@enumToInt(Feature.gcn3_encoding)] = .{
-        .index = @enumToInt(Feature.gcn3_encoding),
-        .name = @tagName(Feature.gcn3_encoding),
         .llvm_name = "gcn3-encoding",
         .description = "Encoding format for VI",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx10)] = .{
-        .index = @enumToInt(Feature.gfx10),
-        .name = @tagName(Feature.gfx10),
         .llvm_name = "gfx10",
         .description = "GFX10 GPU generation",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"16_bit_insts",
             .add_no_carry_insts,
             .aperture_regs,
@@ -426,32 +351,24 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.gfx10_insts)] = .{
-        .index = @enumToInt(Feature.gfx10_insts),
-        .name = @tagName(Feature.gfx10_insts),
         .llvm_name = "gfx10-insts",
         .description = "Additional instructions for GFX10+",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
-        .index = @enumToInt(Feature.gfx7_gfx8_gfx9_insts),
-        .name = @tagName(Feature.gfx7_gfx8_gfx9_insts),
         .llvm_name = "gfx7-gfx8-gfx9-insts",
         .description = "Instructions shared in GFX7, GFX8, GFX9",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx8_insts)] = .{
-        .index = @enumToInt(Feature.gfx8_insts),
-        .name = @tagName(Feature.gfx8_insts),
         .llvm_name = "gfx8-insts",
         .description = "Additional instructions for GFX8+",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx9)] = .{
-        .index = @enumToInt(Feature.gfx9),
-        .name = @tagName(Feature.gfx9),
         .llvm_name = "gfx9",
         .description = "GFX9 GPU generation",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"16_bit_insts",
             .add_no_carry_insts,
             .aperture_regs,
@@ -485,298 +402,214 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.gfx9_insts)] = .{
-        .index = @enumToInt(Feature.gfx9_insts),
-        .name = @tagName(Feature.gfx9_insts),
         .llvm_name = "gfx9-insts",
         .description = "Additional instructions for GFX9+",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.half_rate_64_ops)] = .{
-        .index = @enumToInt(Feature.half_rate_64_ops),
-        .name = @tagName(Feature.half_rate_64_ops),
         .llvm_name = "half-rate-64-ops",
         .description = "Most fp64 instructions are half rate instead of quarter",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
-        .index = @enumToInt(Feature.inst_fwd_prefetch_bug),
-        .name = @tagName(Feature.inst_fwd_prefetch_bug),
         .llvm_name = "inst-fwd-prefetch-bug",
         .description = "S_INST_PREFETCH instruction causes shader to hang",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.int_clamp_insts)] = .{
-        .index = @enumToInt(Feature.int_clamp_insts),
-        .name = @tagName(Feature.int_clamp_insts),
         .llvm_name = "int-clamp-insts",
         .description = "Support clamp for integer destination",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
-        .index = @enumToInt(Feature.inv_2pi_inline_imm),
-        .name = @tagName(Feature.inv_2pi_inline_imm),
         .llvm_name = "inv-2pi-inline-imm",
         .description = "Has 1 / (2 * pi) as inline immediate",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
-        .index = @enumToInt(Feature.lds_branch_vmem_war_hazard),
-        .name = @tagName(Feature.lds_branch_vmem_war_hazard),
         .llvm_name = "lds-branch-vmem-war-hazard",
         .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_misaligned_bug)] = .{
-        .index = @enumToInt(Feature.lds_misaligned_bug),
-        .name = @tagName(Feature.lds_misaligned_bug),
         .llvm_name = "lds-misaligned-bug",
         .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount16)] = .{
-        .index = @enumToInt(Feature.ldsbankcount16),
-        .name = @tagName(Feature.ldsbankcount16),
         .llvm_name = "ldsbankcount16",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount32)] = .{
-        .index = @enumToInt(Feature.ldsbankcount32),
-        .name = @tagName(Feature.ldsbankcount32),
         .llvm_name = "ldsbankcount32",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_opt)] = .{
-        .index = @enumToInt(Feature.load_store_opt),
-        .name = @tagName(Feature.load_store_opt),
         .llvm_name = "load-store-opt",
         .description = "Enable SI load/store optimizer pass",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize0)] = .{
-        .index = @enumToInt(Feature.localmemorysize0),
-        .name = @tagName(Feature.localmemorysize0),
         .llvm_name = "localmemorysize0",
         .description = "The size of local memory in bytes",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize32768)] = .{
-        .index = @enumToInt(Feature.localmemorysize32768),
-        .name = @tagName(Feature.localmemorysize32768),
         .llvm_name = "localmemorysize32768",
         .description = "The size of local memory in bytes",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize65536)] = .{
-        .index = @enumToInt(Feature.localmemorysize65536),
-        .name = @tagName(Feature.localmemorysize65536),
         .llvm_name = "localmemorysize65536",
         .description = "The size of local memory in bytes",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mad_mix_insts)] = .{
-        .index = @enumToInt(Feature.mad_mix_insts),
-        .name = @tagName(Feature.mad_mix_insts),
         .llvm_name = "mad-mix-insts",
         .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mai_insts)] = .{
-        .index = @enumToInt(Feature.mai_insts),
-        .name = @tagName(Feature.mai_insts),
         .llvm_name = "mai-insts",
         .description = "Has mAI instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_16)] = .{
-        .index = @enumToInt(Feature.max_private_element_size_16),
-        .name = @tagName(Feature.max_private_element_size_16),
         .llvm_name = "max-private-element-size-16",
         .description = "Maximum private access size may be 16",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_4)] = .{
-        .index = @enumToInt(Feature.max_private_element_size_4),
-        .name = @tagName(Feature.max_private_element_size_4),
         .llvm_name = "max-private-element-size-4",
         .description = "Maximum private access size may be 4",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_8)] = .{
-        .index = @enumToInt(Feature.max_private_element_size_8),
-        .name = @tagName(Feature.max_private_element_size_8),
         .llvm_name = "max-private-element-size-8",
         .description = "Maximum private access size may be 8",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mimg_r128)] = .{
-        .index = @enumToInt(Feature.mimg_r128),
-        .name = @tagName(Feature.mimg_r128),
         .llvm_name = "mimg-r128",
         .description = "Support 128-bit texture resources",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movrel)] = .{
-        .index = @enumToInt(Feature.movrel),
-        .name = @tagName(Feature.movrel),
         .llvm_name = "movrel",
         .description = "Has v_movrel*_b32 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_data_dep_hazard)] = .{
-        .index = @enumToInt(Feature.no_data_dep_hazard),
-        .name = @tagName(Feature.no_data_dep_hazard),
         .llvm_name = "no-data-dep-hazard",
         .description = "Does not need SW waitstates",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sdst_cmpx)] = .{
-        .index = @enumToInt(Feature.no_sdst_cmpx),
-        .name = @tagName(Feature.no_sdst_cmpx),
         .llvm_name = "no-sdst-cmpx",
         .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sram_ecc_support)] = .{
-        .index = @enumToInt(Feature.no_sram_ecc_support),
-        .name = @tagName(Feature.no_sram_ecc_support),
         .llvm_name = "no-sram-ecc-support",
         .description = "Hardware does not support SRAM ECC",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_xnack_support)] = .{
-        .index = @enumToInt(Feature.no_xnack_support),
-        .name = @tagName(Feature.no_xnack_support),
         .llvm_name = "no-xnack-support",
         .description = "Hardware does not support XNACK",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_encoding)] = .{
-        .index = @enumToInt(Feature.nsa_encoding),
-        .name = @tagName(Feature.nsa_encoding),
         .llvm_name = "nsa-encoding",
         .description = "Support NSA encoding for image instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
-        .index = @enumToInt(Feature.nsa_to_vmem_bug),
-        .name = @tagName(Feature.nsa_to_vmem_bug),
         .llvm_name = "nsa-to-vmem-bug",
         .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.offset_3f_bug)] = .{
-        .index = @enumToInt(Feature.offset_3f_bug),
-        .name = @tagName(Feature.offset_3f_bug),
         .llvm_name = "offset-3f-bug",
         .description = "Branch offset of 3f hardware bug",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
-        .index = @enumToInt(Feature.pk_fmac_f16_inst),
-        .name = @tagName(Feature.pk_fmac_f16_inst),
         .llvm_name = "pk-fmac-f16-inst",
         .description = "Has v_pk_fmac_f16 instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.promote_alloca)] = .{
-        .index = @enumToInt(Feature.promote_alloca),
-        .name = @tagName(Feature.promote_alloca),
         .llvm_name = "promote-alloca",
         .description = "Enable promote alloca pass",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r128_a16)] = .{
-        .index = @enumToInt(Feature.r128_a16),
-        .name = @tagName(Feature.r128_a16),
         .llvm_name = "r128-a16",
         .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.register_banking)] = .{
-        .index = @enumToInt(Feature.register_banking),
-        .name = @tagName(Feature.register_banking),
         .llvm_name = "register-banking",
         .description = "Has register banking",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.s_memrealtime)] = .{
-        .index = @enumToInt(Feature.s_memrealtime),
-        .name = @tagName(Feature.s_memrealtime),
         .llvm_name = "s-memrealtime",
         .description = "Has s_memrealtime instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_atomics)] = .{
-        .index = @enumToInt(Feature.scalar_atomics),
-        .name = @tagName(Feature.scalar_atomics),
         .llvm_name = "scalar-atomics",
         .description = "Has atomic scalar memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
-        .index = @enumToInt(Feature.scalar_flat_scratch_insts),
-        .name = @tagName(Feature.scalar_flat_scratch_insts),
         .llvm_name = "scalar-flat-scratch-insts",
         .description = "Have s_scratch_* flat memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_stores)] = .{
-        .index = @enumToInt(Feature.scalar_stores),
-        .name = @tagName(Feature.scalar_stores),
         .llvm_name = "scalar-stores",
         .description = "Has store scalar memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa)] = .{
-        .index = @enumToInt(Feature.sdwa),
-        .name = @tagName(Feature.sdwa),
         .llvm_name = "sdwa",
         .description = "Support SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_mav)] = .{
-        .index = @enumToInt(Feature.sdwa_mav),
-        .name = @tagName(Feature.sdwa_mav),
         .llvm_name = "sdwa-mav",
         .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_omod)] = .{
-        .index = @enumToInt(Feature.sdwa_omod),
-        .name = @tagName(Feature.sdwa_omod),
         .llvm_name = "sdwa-omod",
         .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
-        .index = @enumToInt(Feature.sdwa_out_mods_vopc),
-        .name = @tagName(Feature.sdwa_out_mods_vopc),
         .llvm_name = "sdwa-out-mods-vopc",
         .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_scalar)] = .{
-        .index = @enumToInt(Feature.sdwa_scalar),
-        .name = @tagName(Feature.sdwa_scalar),
         .llvm_name = "sdwa-scalar",
         .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_sdst)] = .{
-        .index = @enumToInt(Feature.sdwa_sdst),
-        .name = @tagName(Feature.sdwa_sdst),
         .llvm_name = "sdwa-sdst",
         .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sea_islands)] = .{
-        .index = @enumToInt(Feature.sea_islands),
-        .name = @tagName(Feature.sea_islands),
         .llvm_name = "sea-islands",
         .description = "SEA_ISLANDS GPU generation",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .ci_insts,
             .flat_address_space,
             .fp64,
@@ -790,32 +623,24 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.sgpr_init_bug)] = .{
-        .index = @enumToInt(Feature.sgpr_init_bug),
-        .name = @tagName(Feature.sgpr_init_bug),
         .llvm_name = "sgpr-init-bug",
         .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.si_scheduler)] = .{
-        .index = @enumToInt(Feature.si_scheduler),
-        .name = @tagName(Feature.si_scheduler),
         .llvm_name = "si-scheduler",
         .description = "Enable SI Machine Scheduler",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
-        .index = @enumToInt(Feature.smem_to_vector_write_hazard),
-        .name = @tagName(Feature.smem_to_vector_write_hazard),
         .llvm_name = "smem-to-vector-write-hazard",
         .description = "s_load_dword followed by v_cmp page faults",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.southern_islands)] = .{
-        .index = @enumToInt(Feature.southern_islands),
-        .name = @tagName(Feature.southern_islands),
         .llvm_name = "southern-islands",
         .description = "SOUTHERN_ISLANDS GPU generation",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
             .ldsbankcount32,
             .localmemorysize32768,
@@ -828,88 +653,64 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.sram_ecc)] = .{
-        .index = @enumToInt(Feature.sram_ecc),
-        .name = @tagName(Feature.sram_ecc),
         .llvm_name = "sram-ecc",
         .description = "Enable SRAM ECC",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trap_handler)] = .{
-        .index = @enumToInt(Feature.trap_handler),
-        .name = @tagName(Feature.trap_handler),
         .llvm_name = "trap-handler",
         .description = "Trap handler support",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trig_reduced_range)] = .{
-        .index = @enumToInt(Feature.trig_reduced_range),
-        .name = @tagName(Feature.trig_reduced_range),
         .llvm_name = "trig-reduced-range",
         .description = "Requires use of fract on arguments to trig instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_buffer_access)] = .{
-        .index = @enumToInt(Feature.unaligned_buffer_access),
-        .name = @tagName(Feature.unaligned_buffer_access),
         .llvm_name = "unaligned-buffer-access",
         .description = "Support unaligned global loads and stores",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_scratch_access)] = .{
-        .index = @enumToInt(Feature.unaligned_scratch_access),
-        .name = @tagName(Feature.unaligned_scratch_access),
         .llvm_name = "unaligned-scratch-access",
         .description = "Support unaligned scratch loads and stores",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
-        .index = @enumToInt(Feature.unpacked_d16_vmem),
-        .name = @tagName(Feature.unpacked_d16_vmem),
         .llvm_name = "unpacked-d16-vmem",
         .description = "Has unpacked d16 vmem instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
-        .index = @enumToInt(Feature.unsafe_ds_offset_folding),
-        .name = @tagName(Feature.unsafe_ds_offset_folding),
         .llvm_name = "unsafe-ds-offset-folding",
         .description = "Force using DS instruction immediate offsets on SI",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
-        .index = @enumToInt(Feature.vcmpx_exec_war_hazard),
-        .name = @tagName(Feature.vcmpx_exec_war_hazard),
         .llvm_name = "vcmpx-exec-war-hazard",
         .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
-        .index = @enumToInt(Feature.vcmpx_permlane_hazard),
-        .name = @tagName(Feature.vcmpx_permlane_hazard),
         .llvm_name = "vcmpx-permlane-hazard",
         .description = "TODO: describe me",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vgpr_index_mode)] = .{
-        .index = @enumToInt(Feature.vgpr_index_mode),
-        .name = @tagName(Feature.vgpr_index_mode),
         .llvm_name = "vgpr-index-mode",
         .description = "Has VGPR mode register indexing",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
-        .index = @enumToInt(Feature.vmem_to_scalar_write_hazard),
-        .name = @tagName(Feature.vmem_to_scalar_write_hazard),
         .llvm_name = "vmem-to-scalar-write-hazard",
         .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.volcanic_islands)] = .{
-        .index = @enumToInt(Feature.volcanic_islands),
-        .name = @tagName(Feature.volcanic_islands),
         .llvm_name = "volcanic-islands",
         .description = "VOLCANIC_ISLANDS GPU generation",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"16_bit_insts",
             .ci_insts,
             .dpp,
@@ -935,54 +736,46 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.vop3_literal)] = .{
-        .index = @enumToInt(Feature.vop3_literal),
-        .name = @tagName(Feature.vop3_literal),
         .llvm_name = "vop3-literal",
         .description = "Can use one literal in VOP3",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vop3p)] = .{
-        .index = @enumToInt(Feature.vop3p),
-        .name = @tagName(Feature.vop3p),
         .llvm_name = "vop3p",
         .description = "Has VOP3P packed instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vscnt)] = .{
-        .index = @enumToInt(Feature.vscnt),
-        .name = @tagName(Feature.vscnt),
         .llvm_name = "vscnt",
         .description = "Has separate store vscnt counter",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize16)] = .{
-        .index = @enumToInt(Feature.wavefrontsize16),
-        .name = @tagName(Feature.wavefrontsize16),
         .llvm_name = "wavefrontsize16",
         .description = "The number of threads per wavefront",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize32)] = .{
-        .index = @enumToInt(Feature.wavefrontsize32),
-        .name = @tagName(Feature.wavefrontsize32),
         .llvm_name = "wavefrontsize32",
         .description = "The number of threads per wavefront",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize64)] = .{
-        .index = @enumToInt(Feature.wavefrontsize64),
-        .name = @tagName(Feature.wavefrontsize64),
         .llvm_name = "wavefrontsize64",
         .description = "The number of threads per wavefront",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xnack)] = .{
-        .index = @enumToInt(Feature.xnack),
-        .name = @tagName(Feature.xnack),
         .llvm_name = "xnack",
         .description = "Enable XNACK support",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -990,7 +783,7 @@ pub const cpu = struct {
     pub const bonaire = Cpu{
         .name = "bonaire",
         .llvm_name = "bonaire",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1000,7 +793,7 @@ pub const cpu = struct {
     pub const carrizo = Cpu{
         .name = "carrizo",
         .llvm_name = "carrizo",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1013,7 +806,7 @@ pub const cpu = struct {
     pub const fiji = Cpu{
         .name = "fiji",
         .llvm_name = "fiji",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1024,14 +817,14 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .wavefrontsize64,
         }),
     };
     pub const generic_hsa = Cpu{
         .name = "generic_hsa",
         .llvm_name = "generic-hsa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .flat_address_space,
             .wavefrontsize64,
         }),
@@ -1039,7 +832,7 @@ pub const cpu = struct {
     pub const gfx1010 = Cpu{
         .name = "gfx1010",
         .llvm_name = "gfx1010",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .dl_insts,
             .flat_segment_offset_bug,
@@ -1065,7 +858,7 @@ pub const cpu = struct {
     pub const gfx1011 = Cpu{
         .name = "gfx1011",
         .llvm_name = "gfx1011",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -1094,7 +887,7 @@ pub const cpu = struct {
     pub const gfx1012 = Cpu{
         .name = "gfx1012",
         .llvm_name = "gfx1012",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -1124,7 +917,7 @@ pub const cpu = struct {
     pub const gfx600 = Cpu{
         .name = "gfx600",
         .llvm_name = "gfx600",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1136,7 +929,7 @@ pub const cpu = struct {
     pub const gfx601 = Cpu{
         .name = "gfx601",
         .llvm_name = "gfx601",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1146,7 +939,7 @@ pub const cpu = struct {
     pub const gfx700 = Cpu{
         .name = "gfx700",
         .llvm_name = "gfx700",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1156,7 +949,7 @@ pub const cpu = struct {
     pub const gfx701 = Cpu{
         .name = "gfx701",
         .llvm_name = "gfx701",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1168,7 +961,7 @@ pub const cpu = struct {
     pub const gfx702 = Cpu{
         .name = "gfx702",
         .llvm_name = "gfx702",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .ldsbankcount16,
@@ -1179,7 +972,7 @@ pub const cpu = struct {
     pub const gfx703 = Cpu{
         .name = "gfx703",
         .llvm_name = "gfx703",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -1189,7 +982,7 @@ pub const cpu = struct {
     pub const gfx704 = Cpu{
         .name = "gfx704",
         .llvm_name = "gfx704",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1199,7 +992,7 @@ pub const cpu = struct {
     pub const gfx801 = Cpu{
         .name = "gfx801",
         .llvm_name = "gfx801",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1212,7 +1005,7 @@ pub const cpu = struct {
     pub const gfx802 = Cpu{
         .name = "gfx802",
         .llvm_name = "gfx802",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1224,7 +1017,7 @@ pub const cpu = struct {
     pub const gfx803 = Cpu{
         .name = "gfx803",
         .llvm_name = "gfx803",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1235,7 +1028,7 @@ pub const cpu = struct {
     pub const gfx810 = Cpu{
         .name = "gfx810",
         .llvm_name = "gfx810",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .volcanic_islands,
@@ -1245,7 +1038,7 @@ pub const cpu = struct {
     pub const gfx900 = Cpu{
         .name = "gfx900",
         .llvm_name = "gfx900",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1257,7 +1050,7 @@ pub const cpu = struct {
     pub const gfx902 = Cpu{
         .name = "gfx902",
         .llvm_name = "gfx902",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1269,7 +1062,7 @@ pub const cpu = struct {
     pub const gfx904 = Cpu{
         .name = "gfx904",
         .llvm_name = "gfx904",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fma_mix_insts,
             .gfx9,
@@ -1281,7 +1074,7 @@ pub const cpu = struct {
     pub const gfx906 = Cpu{
         .name = "gfx906",
         .llvm_name = "gfx906",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -1296,7 +1089,7 @@ pub const cpu = struct {
     pub const gfx908 = Cpu{
         .name = "gfx908",
         .llvm_name = "gfx908",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .atomic_fadd_insts,
             .code_object_v3,
             .dl_insts,
@@ -1318,7 +1111,7 @@ pub const cpu = struct {
     pub const gfx909 = Cpu{
         .name = "gfx909",
         .llvm_name = "gfx909",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1329,7 +1122,7 @@ pub const cpu = struct {
     pub const hainan = Cpu{
         .name = "hainan",
         .llvm_name = "hainan",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1339,7 +1132,7 @@ pub const cpu = struct {
     pub const hawaii = Cpu{
         .name = "hawaii",
         .llvm_name = "hawaii",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1351,7 +1144,7 @@ pub const cpu = struct {
     pub const iceland = Cpu{
         .name = "iceland",
         .llvm_name = "iceland",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1363,7 +1156,7 @@ pub const cpu = struct {
     pub const kabini = Cpu{
         .name = "kabini",
         .llvm_name = "kabini",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -1373,7 +1166,7 @@ pub const cpu = struct {
     pub const kaveri = Cpu{
         .name = "kaveri",
         .llvm_name = "kaveri",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1383,7 +1176,7 @@ pub const cpu = struct {
     pub const mullins = Cpu{
         .name = "mullins",
         .llvm_name = "mullins",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -1393,7 +1186,7 @@ pub const cpu = struct {
     pub const oland = Cpu{
         .name = "oland",
         .llvm_name = "oland",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1403,7 +1196,7 @@ pub const cpu = struct {
     pub const pitcairn = Cpu{
         .name = "pitcairn",
         .llvm_name = "pitcairn",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1413,7 +1206,7 @@ pub const cpu = struct {
     pub const polaris10 = Cpu{
         .name = "polaris10",
         .llvm_name = "polaris10",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1424,7 +1217,7 @@ pub const cpu = struct {
     pub const polaris11 = Cpu{
         .name = "polaris11",
         .llvm_name = "polaris11",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1435,7 +1228,7 @@ pub const cpu = struct {
     pub const stoney = Cpu{
         .name = "stoney",
         .llvm_name = "stoney",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .volcanic_islands,
@@ -1445,7 +1238,7 @@ pub const cpu = struct {
     pub const tahiti = Cpu{
         .name = "tahiti",
         .llvm_name = "tahiti",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1457,7 +1250,7 @@ pub const cpu = struct {
     pub const tonga = Cpu{
         .name = "tonga",
         .llvm_name = "tonga",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1469,7 +1262,7 @@ pub const cpu = struct {
     pub const verde = Cpu{
         .name = "verde",
         .llvm_name = "verde",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index 744d418d03ed705601aac988abc8ade1d61dc644..bcc04ae88427810492e2cc99f4691ae37cab3b24 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -181,245 +181,182 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
+    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"32bit")] = .{
-        .index = @enumToInt(Feature.@"32bit"),
-        .name = @tagName(Feature.@"32bit"),
         .llvm_name = "32bit",
         .description = "Prefer 32-bit Thumb instrs",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"8msecext")] = .{
-        .index = @enumToInt(Feature.@"8msecext"),
-        .name = @tagName(Feature.@"8msecext"),
         .llvm_name = "8msecext",
         .description = "Enable support for ARMv8-M Security Extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a12)] = .{
-        .index = @enumToInt(Feature.a12),
-        .name = @tagName(Feature.a12),
         .llvm_name = "a12",
         .description = "Cortex-A12 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a15)] = .{
-        .index = @enumToInt(Feature.a15),
-        .name = @tagName(Feature.a15),
         .llvm_name = "a15",
         .description = "Cortex-A15 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a17)] = .{
-        .index = @enumToInt(Feature.a17),
-        .name = @tagName(Feature.a17),
         .llvm_name = "a17",
         .description = "Cortex-A17 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a32)] = .{
-        .index = @enumToInt(Feature.a32),
-        .name = @tagName(Feature.a32),
         .llvm_name = "a32",
         .description = "Cortex-A32 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a35)] = .{
-        .index = @enumToInt(Feature.a35),
-        .name = @tagName(Feature.a35),
         .llvm_name = "a35",
         .description = "Cortex-A35 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a5)] = .{
-        .index = @enumToInt(Feature.a5),
-        .name = @tagName(Feature.a5),
         .llvm_name = "a5",
         .description = "Cortex-A5 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a53)] = .{
-        .index = @enumToInt(Feature.a53),
-        .name = @tagName(Feature.a53),
         .llvm_name = "a53",
         .description = "Cortex-A53 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a55)] = .{
-        .index = @enumToInt(Feature.a55),
-        .name = @tagName(Feature.a55),
         .llvm_name = "a55",
         .description = "Cortex-A55 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a57)] = .{
-        .index = @enumToInt(Feature.a57),
-        .name = @tagName(Feature.a57),
         .llvm_name = "a57",
         .description = "Cortex-A57 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a7)] = .{
-        .index = @enumToInt(Feature.a7),
-        .name = @tagName(Feature.a7),
         .llvm_name = "a7",
         .description = "Cortex-A7 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a72)] = .{
-        .index = @enumToInt(Feature.a72),
-        .name = @tagName(Feature.a72),
         .llvm_name = "a72",
         .description = "Cortex-A72 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a73)] = .{
-        .index = @enumToInt(Feature.a73),
-        .name = @tagName(Feature.a73),
         .llvm_name = "a73",
         .description = "Cortex-A73 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a75)] = .{
-        .index = @enumToInt(Feature.a75),
-        .name = @tagName(Feature.a75),
         .llvm_name = "a75",
         .description = "Cortex-A75 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a76)] = .{
-        .index = @enumToInt(Feature.a76),
-        .name = @tagName(Feature.a76),
         .llvm_name = "a76",
         .description = "Cortex-A76 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a8)] = .{
-        .index = @enumToInt(Feature.a8),
-        .name = @tagName(Feature.a8),
         .llvm_name = "a8",
         .description = "Cortex-A8 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a9)] = .{
-        .index = @enumToInt(Feature.a9),
-        .name = @tagName(Feature.a9),
         .llvm_name = "a9",
         .description = "Cortex-A9 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aclass)] = .{
-        .index = @enumToInt(Feature.aclass),
-        .name = @tagName(Feature.aclass),
         .llvm_name = "aclass",
         .description = "Is application profile ('A' series)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.acquire_release)] = .{
-        .index = @enumToInt(Feature.acquire_release),
-        .name = @tagName(Feature.acquire_release),
         .llvm_name = "acquire-release",
         .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
-        .index = @enumToInt(Feature.aes),
-        .name = @tagName(Feature.aes),
         .llvm_name = "aes",
         .description = "Enable AES support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.armv2)] = .{
-        .index = @enumToInt(Feature.armv2),
-        .name = @tagName(Feature.armv2),
         .llvm_name = "armv2",
         .description = "ARMv2 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv2a)] = .{
-        .index = @enumToInt(Feature.armv2a),
-        .name = @tagName(Feature.armv2a),
         .llvm_name = "armv2a",
         .description = "ARMv2a architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3)] = .{
-        .index = @enumToInt(Feature.armv3),
-        .name = @tagName(Feature.armv3),
         .llvm_name = "armv3",
         .description = "ARMv3 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3m)] = .{
-        .index = @enumToInt(Feature.armv3m),
-        .name = @tagName(Feature.armv3m),
         .llvm_name = "armv3m",
         .description = "ARMv3m architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4)] = .{
-        .index = @enumToInt(Feature.armv4),
-        .name = @tagName(Feature.armv4),
         .llvm_name = "armv4",
         .description = "ARMv4 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4t)] = .{
-        .index = @enumToInt(Feature.armv4t),
-        .name = @tagName(Feature.armv4t),
         .llvm_name = "armv4t",
         .description = "ARMv4t architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v4t,
         }),
     };
     result[@enumToInt(Feature.armv5t)] = .{
-        .index = @enumToInt(Feature.armv5t),
-        .name = @tagName(Feature.armv5t),
         .llvm_name = "armv5t",
         .description = "ARMv5t architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v5t,
         }),
     };
     result[@enumToInt(Feature.armv5te)] = .{
-        .index = @enumToInt(Feature.armv5te),
-        .name = @tagName(Feature.armv5te),
         .llvm_name = "armv5te",
         .description = "ARMv5te architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.armv5tej)] = .{
-        .index = @enumToInt(Feature.armv5tej),
-        .name = @tagName(Feature.armv5tej),
         .llvm_name = "armv5tej",
         .description = "ARMv5tej architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.armv6)] = .{
-        .index = @enumToInt(Feature.armv6),
-        .name = @tagName(Feature.armv6),
         .llvm_name = "armv6",
         .description = "ARMv6 architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dsp,
             .v6,
         }),
     };
     result[@enumToInt(Feature.armv6_m)] = .{
-        .index = @enumToInt(Feature.armv6_m),
-        .name = @tagName(Feature.armv6_m),
         .llvm_name = "armv6-m",
         .description = "ARMv6m architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .db,
             .mclass,
             .noarm,
@@ -429,39 +366,31 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv6j)] = .{
-        .index = @enumToInt(Feature.armv6j),
-        .name = @tagName(Feature.armv6j),
         .llvm_name = "armv6j",
         .description = "ARMv7a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv6,
         }),
     };
     result[@enumToInt(Feature.armv6k)] = .{
-        .index = @enumToInt(Feature.armv6k),
-        .name = @tagName(Feature.armv6k),
         .llvm_name = "armv6k",
         .description = "ARMv6k architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v6k,
         }),
     };
     result[@enumToInt(Feature.armv6kz)] = .{
-        .index = @enumToInt(Feature.armv6kz),
-        .name = @tagName(Feature.armv6kz),
         .llvm_name = "armv6kz",
         .description = "ARMv6kz architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .trustzone,
             .v6k,
         }),
     };
     result[@enumToInt(Feature.armv6s_m)] = .{
-        .index = @enumToInt(Feature.armv6s_m),
-        .name = @tagName(Feature.armv6s_m),
         .llvm_name = "armv6s-m",
         .description = "ARMv6sm architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .db,
             .mclass,
             .noarm,
@@ -471,21 +400,17 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv6t2)] = .{
-        .index = @enumToInt(Feature.armv6t2),
-        .name = @tagName(Feature.armv6t2),
         .llvm_name = "armv6t2",
         .description = "ARMv6t2 architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dsp,
             .v6t2,
         }),
     };
     result[@enumToInt(Feature.armv7_a)] = .{
-        .index = @enumToInt(Feature.armv7_a),
-        .name = @tagName(Feature.armv7_a),
         .llvm_name = "armv7-a",
         .description = "ARMv7a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .db,
             .dsp,
@@ -494,11 +419,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv7_m)] = .{
-        .index = @enumToInt(Feature.armv7_m),
-        .name = @tagName(Feature.armv7_m),
         .llvm_name = "armv7-m",
         .description = "ARMv7m architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .db,
             .hwdiv,
             .mclass,
@@ -509,11 +432,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv7_r)] = .{
-        .index = @enumToInt(Feature.armv7_r),
-        .name = @tagName(Feature.armv7_r),
         .llvm_name = "armv7-r",
         .description = "ARMv7r architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .db,
             .dsp,
             .hwdiv,
@@ -522,11 +443,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv7e_m)] = .{
-        .index = @enumToInt(Feature.armv7e_m),
-        .name = @tagName(Feature.armv7e_m),
         .llvm_name = "armv7e-m",
         .description = "ARMv7em architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .db,
             .dsp,
             .hwdiv,
@@ -538,29 +457,23 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv7k)] = .{
-        .index = @enumToInt(Feature.armv7k),
-        .name = @tagName(Feature.armv7k),
         .llvm_name = "armv7k",
         .description = "ARMv7a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv7_a,
         }),
     };
     result[@enumToInt(Feature.armv7s)] = .{
-        .index = @enumToInt(Feature.armv7s),
-        .name = @tagName(Feature.armv7s),
         .llvm_name = "armv7s",
         .description = "ARMv7a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv7_a,
         }),
     };
     result[@enumToInt(Feature.armv7ve)] = .{
-        .index = @enumToInt(Feature.armv7ve),
-        .name = @tagName(Feature.armv7ve),
         .llvm_name = "armv7ve",
         .description = "ARMv7ve architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .db,
             .dsp,
@@ -572,11 +485,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_a)] = .{
-        .index = @enumToInt(Feature.armv8_a),
-        .name = @tagName(Feature.armv8_a),
         .llvm_name = "armv8-a",
         .description = "ARMv8a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -591,11 +502,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_m_base)] = .{
-        .index = @enumToInt(Feature.armv8_m_base),
-        .name = @tagName(Feature.armv8_m_base),
         .llvm_name = "armv8-m.base",
         .description = "ARMv8mBaseline architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -609,11 +518,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_m_main)] = .{
-        .index = @enumToInt(Feature.armv8_m_main),
-        .name = @tagName(Feature.armv8_m_main),
         .llvm_name = "armv8-m.main",
         .description = "ARMv8mMainline architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -625,11 +532,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_r)] = .{
-        .index = @enumToInt(Feature.armv8_r),
-        .name = @tagName(Feature.armv8_r),
         .llvm_name = "armv8-r",
         .description = "ARMv8r architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .db,
             .dfb,
@@ -643,11 +548,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_1_a)] = .{
-        .index = @enumToInt(Feature.armv8_1_a),
-        .name = @tagName(Feature.armv8_1_a),
         .llvm_name = "armv8.1-a",
         .description = "ARMv81a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -662,11 +565,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_1_m_main)] = .{
-        .index = @enumToInt(Feature.armv8_1_m_main),
-        .name = @tagName(Feature.armv8_1_m_main),
         .llvm_name = "armv8.1-m.main",
         .description = "ARMv81mMainline architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -680,11 +581,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_2_a)] = .{
-        .index = @enumToInt(Feature.armv8_2_a),
-        .name = @tagName(Feature.armv8_2_a),
         .llvm_name = "armv8.2-a",
         .description = "ARMv82a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -700,11 +599,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_3_a)] = .{
-        .index = @enumToInt(Feature.armv8_3_a),
-        .name = @tagName(Feature.armv8_3_a),
         .llvm_name = "armv8.3-a",
         .description = "ARMv83a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -720,11 +617,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_4_a)] = .{
-        .index = @enumToInt(Feature.armv8_4_a),
-        .name = @tagName(Feature.armv8_4_a),
         .llvm_name = "armv8.4-a",
         .description = "ARMv84a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -741,11 +636,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.armv8_5_a)] = .{
-        .index = @enumToInt(Feature.armv8_5_a),
-        .name = @tagName(Feature.armv8_5_a),
         .llvm_name = "armv8.5-a",
         .description = "ARMv85a architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -762,115 +655,85 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avoid_movs_shop)] = .{
-        .index = @enumToInt(Feature.avoid_movs_shop),
-        .name = @tagName(Feature.avoid_movs_shop),
         .llvm_name = "avoid-movs-shop",
         .description = "Avoid movs instructions with shifter operand",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
-        .index = @enumToInt(Feature.avoid_partial_cpsr),
-        .name = @tagName(Feature.avoid_partial_cpsr),
         .llvm_name = "avoid-partial-cpsr",
         .description = "Avoid CPSR partial update for OOO execution",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
-        .index = @enumToInt(Feature.cheap_predicable_cpsr),
-        .name = @tagName(Feature.cheap_predicable_cpsr),
         .llvm_name = "cheap-predicable-cpsr",
         .description = "Disable +1 predication cost for instructions updating CPSR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crc)] = .{
-        .index = @enumToInt(Feature.crc),
-        .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Enable support for CRC instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
-        .index = @enumToInt(Feature.crypto),
-        .name = @tagName(Feature.crypto),
         .llvm_name = "crypto",
         .description = "Enable support for Cryptography extensions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aes,
             .neon,
             .sha2,
         }),
     };
     result[@enumToInt(Feature.d32)] = .{
-        .index = @enumToInt(Feature.d32),
-        .name = @tagName(Feature.d32),
         .llvm_name = "d32",
         .description = "Extend FP to 32 double registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.db)] = .{
-        .index = @enumToInt(Feature.db),
-        .name = @tagName(Feature.db),
         .llvm_name = "db",
         .description = "Has data barrier (dmb/dsb) instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfb)] = .{
-        .index = @enumToInt(Feature.dfb),
-        .name = @tagName(Feature.dfb),
         .llvm_name = "dfb",
         .description = "Has full data barrier (dfb) instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.disable_postra_scheduler)] = .{
-        .index = @enumToInt(Feature.disable_postra_scheduler),
-        .name = @tagName(Feature.disable_postra_scheduler),
         .llvm_name = "disable-postra-scheduler",
         .description = "Don't schedule again after register allocation",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dont_widen_vmovs)] = .{
-        .index = @enumToInt(Feature.dont_widen_vmovs),
-        .name = @tagName(Feature.dont_widen_vmovs),
         .llvm_name = "dont-widen-vmovs",
         .description = "Don't widen VMOVS to VMOVD",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
-        .index = @enumToInt(Feature.dotprod),
-        .name = @tagName(Feature.dotprod),
         .llvm_name = "dotprod",
         .description = "Enable support for dot product instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.dsp)] = .{
-        .index = @enumToInt(Feature.dsp),
-        .name = @tagName(Feature.dsp),
         .llvm_name = "dsp",
         .description = "Supports DSP instructions in ARM and/or Thumb2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execute_only)] = .{
-        .index = @enumToInt(Feature.execute_only),
-        .name = @tagName(Feature.execute_only),
         .llvm_name = "execute-only",
         .description = "Enable the generation of execute only code.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.expand_fp_mlx)] = .{
-        .index = @enumToInt(Feature.expand_fp_mlx),
-        .name = @tagName(Feature.expand_fp_mlx),
         .llvm_name = "expand-fp-mlx",
         .description = "Expand VFP/NEON MLA/MLS instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos)] = .{
-        .index = @enumToInt(Feature.exynos),
-        .name = @tagName(Feature.exynos),
         .llvm_name = "exynos",
         .description = "Samsung Exynos processors",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .crc,
             .crypto,
             .expand_fp_mlx,
@@ -891,229 +754,173 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.fp_armv8)] = .{
-        .index = @enumToInt(Feature.fp_armv8),
-        .name = @tagName(Feature.fp_armv8),
         .llvm_name = "fp-armv8",
         .description = "Enable ARMv8 FP",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8d16,
             .fp_armv8sp,
             .vfp4,
         }),
     };
     result[@enumToInt(Feature.fp_armv8d16)] = .{
-        .index = @enumToInt(Feature.fp_armv8d16),
-        .name = @tagName(Feature.fp_armv8d16),
         .llvm_name = "fp-armv8d16",
         .description = "Enable ARMv8 FP with only 16 d-registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fp64,
             .vfp4d16,
         }),
     };
     result[@enumToInt(Feature.fp_armv8d16sp)] = .{
-        .index = @enumToInt(Feature.fp_armv8d16sp),
-        .name = @tagName(Feature.fp_armv8d16sp),
         .llvm_name = "fp-armv8d16sp",
         .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp4d16sp,
         }),
     };
     result[@enumToInt(Feature.fp_armv8sp)] = .{
-        .index = @enumToInt(Feature.fp_armv8sp),
-        .name = @tagName(Feature.fp_armv8sp),
         .llvm_name = "fp-armv8sp",
         .description = "Enable ARMv8 FP with no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .d32,
             .fp_armv8d16sp,
             .vfp4sp,
         }),
     };
     result[@enumToInt(Feature.fp16)] = .{
-        .index = @enumToInt(Feature.fp16),
-        .name = @tagName(Feature.fp16),
         .llvm_name = "fp16",
         .description = "Enable half-precision floating point",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
-        .index = @enumToInt(Feature.fp16fml),
-        .name = @tagName(Feature.fp16fml),
         .llvm_name = "fp16fml",
         .description = "Enable full half-precision floating point fml instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fullfp16,
         }),
     };
     result[@enumToInt(Feature.fp64)] = .{
-        .index = @enumToInt(Feature.fp64),
-        .name = @tagName(Feature.fp64),
         .llvm_name = "fp64",
         .description = "Floating point unit supports double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpregs64,
         }),
     };
     result[@enumToInt(Feature.fpao)] = .{
-        .index = @enumToInt(Feature.fpao),
-        .name = @tagName(Feature.fpao),
         .llvm_name = "fpao",
         .description = "Enable fast computation of positive address offsets",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs)] = .{
-        .index = @enumToInt(Feature.fpregs),
-        .name = @tagName(Feature.fpregs),
         .llvm_name = "fpregs",
         .description = "Enable FP registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs16)] = .{
-        .index = @enumToInt(Feature.fpregs16),
-        .name = @tagName(Feature.fpregs16),
         .llvm_name = "fpregs16",
         .description = "Enable 16-bit FP registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.fpregs64)] = .{
-        .index = @enumToInt(Feature.fpregs64),
-        .name = @tagName(Feature.fpregs64),
         .llvm_name = "fpregs64",
         .description = "Enable 64-bit FP registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.fullfp16)] = .{
-        .index = @enumToInt(Feature.fullfp16),
-        .name = @tagName(Feature.fullfp16),
         .llvm_name = "fullfp16",
         .description = "Enable full half-precision floating point",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fpregs16,
         }),
     };
     result[@enumToInt(Feature.fuse_aes)] = .{
-        .index = @enumToInt(Feature.fuse_aes),
-        .name = @tagName(Feature.fuse_aes),
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
-        .index = @enumToInt(Feature.fuse_literals),
-        .name = @tagName(Feature.fuse_literals),
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv)] = .{
-        .index = @enumToInt(Feature.hwdiv),
-        .name = @tagName(Feature.hwdiv),
         .llvm_name = "hwdiv",
         .description = "Enable divide instructions in Thumb",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv_arm)] = .{
-        .index = @enumToInt(Feature.hwdiv_arm),
-        .name = @tagName(Feature.hwdiv_arm),
         .llvm_name = "hwdiv-arm",
         .description = "Enable divide instructions in ARM mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.iwmmxt)] = .{
-        .index = @enumToInt(Feature.iwmmxt),
-        .name = @tagName(Feature.iwmmxt),
         .llvm_name = "iwmmxt",
         .description = "ARMv5te architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.iwmmxt2)] = .{
-        .index = @enumToInt(Feature.iwmmxt2),
-        .name = @tagName(Feature.iwmmxt2),
         .llvm_name = "iwmmxt2",
         .description = "ARMv5te architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.krait)] = .{
-        .index = @enumToInt(Feature.krait),
-        .name = @tagName(Feature.krait),
         .llvm_name = "krait",
         .description = "Qualcomm Krait processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.kryo)] = .{
-        .index = @enumToInt(Feature.kryo),
-        .name = @tagName(Feature.kryo),
         .llvm_name = "kryo",
         .description = "Qualcomm Kryo processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lob)] = .{
-        .index = @enumToInt(Feature.lob),
-        .name = @tagName(Feature.lob),
         .llvm_name = "lob",
         .description = "Enable Low Overhead Branch extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
-        .index = @enumToInt(Feature.long_calls),
-        .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Generate calls via indirect call instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.loop_align)] = .{
-        .index = @enumToInt(Feature.loop_align),
-        .name = @tagName(Feature.loop_align),
         .llvm_name = "loop-align",
         .description = "Prefer 32-bit alignment for loops",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m3)] = .{
-        .index = @enumToInt(Feature.m3),
-        .name = @tagName(Feature.m3),
         .llvm_name = "m3",
         .description = "Cortex-M3 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mclass)] = .{
-        .index = @enumToInt(Feature.mclass),
-        .name = @tagName(Feature.mclass),
         .llvm_name = "mclass",
         .description = "Is microcontroller profile ('M' series)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mp)] = .{
-        .index = @enumToInt(Feature.mp),
-        .name = @tagName(Feature.mp),
         .llvm_name = "mp",
         .description = "Supports Multiprocessing extension",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.muxed_units)] = .{
-        .index = @enumToInt(Feature.muxed_units),
-        .name = @tagName(Feature.muxed_units),
         .llvm_name = "muxed-units",
         .description = "Has muxed AGU and NEON/FPU",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mve)] = .{
-        .index = @enumToInt(Feature.mve),
-        .name = @tagName(Feature.mve),
         .llvm_name = "mve",
         .description = "Support M-Class Vector Extension with integer ops",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dsp,
             .fpregs16,
             .fpregs64,
@@ -1121,544 +928,410 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.mve_fp)] = .{
-        .index = @enumToInt(Feature.mve_fp),
-        .name = @tagName(Feature.mve_fp),
         .llvm_name = "mve.fp",
         .description = "Support M-Class Vector Extension with integer and floating ops",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fullfp16,
             .mve,
         }),
     };
     result[@enumToInt(Feature.nacl_trap)] = .{
-        .index = @enumToInt(Feature.nacl_trap),
-        .name = @tagName(Feature.nacl_trap),
         .llvm_name = "nacl-trap",
         .description = "NaCl trap",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
-        .index = @enumToInt(Feature.neon),
-        .name = @tagName(Feature.neon),
         .llvm_name = "neon",
         .description = "Enable NEON instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp3,
         }),
     };
     result[@enumToInt(Feature.neon_fpmovs)] = .{
-        .index = @enumToInt(Feature.neon_fpmovs),
-        .name = @tagName(Feature.neon_fpmovs),
         .llvm_name = "neon-fpmovs",
         .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neonfp)] = .{
-        .index = @enumToInt(Feature.neonfp),
-        .name = @tagName(Feature.neonfp),
         .llvm_name = "neonfp",
         .description = "Use NEON for single precision FP",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_branch_predictor)] = .{
-        .index = @enumToInt(Feature.no_branch_predictor),
-        .name = @tagName(Feature.no_branch_predictor),
         .llvm_name = "no-branch-predictor",
         .description = "Has no branch predictor",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_movt)] = .{
-        .index = @enumToInt(Feature.no_movt),
-        .name = @tagName(Feature.no_movt),
         .llvm_name = "no-movt",
         .description = "Don't use movt/movw pairs for 32-bit imms",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
-        .index = @enumToInt(Feature.no_neg_immediates),
-        .name = @tagName(Feature.no_neg_immediates),
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noarm)] = .{
-        .index = @enumToInt(Feature.noarm),
-        .name = @tagName(Feature.noarm),
         .llvm_name = "noarm",
         .description = "Does not support ARM mode execution",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nonpipelined_vfp)] = .{
-        .index = @enumToInt(Feature.nonpipelined_vfp),
-        .name = @tagName(Feature.nonpipelined_vfp),
         .llvm_name = "nonpipelined-vfp",
         .description = "VFP instructions are not pipelined",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.perfmon)] = .{
-        .index = @enumToInt(Feature.perfmon),
-        .name = @tagName(Feature.perfmon),
         .llvm_name = "perfmon",
         .description = "Enable support for Performance Monitor extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_ishst)] = .{
-        .index = @enumToInt(Feature.prefer_ishst),
-        .name = @tagName(Feature.prefer_ishst),
         .llvm_name = "prefer-ishst",
         .description = "Prefer ISHST barriers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_vmovsr)] = .{
-        .index = @enumToInt(Feature.prefer_vmovsr),
-        .name = @tagName(Feature.prefer_vmovsr),
         .llvm_name = "prefer-vmovsr",
         .description = "Prefer VMOVSR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prof_unpr)] = .{
-        .index = @enumToInt(Feature.prof_unpr),
-        .name = @tagName(Feature.prof_unpr),
         .llvm_name = "prof-unpr",
         .description = "Is profitable to unpredicate",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r4)] = .{
-        .index = @enumToInt(Feature.r4),
-        .name = @tagName(Feature.r4),
         .llvm_name = "r4",
         .description = "Cortex-R4 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r5)] = .{
-        .index = @enumToInt(Feature.r5),
-        .name = @tagName(Feature.r5),
         .llvm_name = "r5",
         .description = "Cortex-R5 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r52)] = .{
-        .index = @enumToInt(Feature.r52),
-        .name = @tagName(Feature.r52),
         .llvm_name = "r52",
         .description = "Cortex-R52 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r7)] = .{
-        .index = @enumToInt(Feature.r7),
-        .name = @tagName(Feature.r7),
         .llvm_name = "r7",
         .description = "Cortex-R7 ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
-        .index = @enumToInt(Feature.ras),
-        .name = @tagName(Feature.ras),
         .llvm_name = "ras",
         .description = "Enable Reliability, Availability and Serviceability extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rclass)] = .{
-        .index = @enumToInt(Feature.rclass),
-        .name = @tagName(Feature.rclass),
         .llvm_name = "rclass",
         .description = "Is realtime profile ('R' series)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.read_tp_hard)] = .{
-        .index = @enumToInt(Feature.read_tp_hard),
-        .name = @tagName(Feature.read_tp_hard),
         .llvm_name = "read-tp-hard",
         .description = "Reading thread pointer from register",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_r9)] = .{
-        .index = @enumToInt(Feature.reserve_r9),
-        .name = @tagName(Feature.reserve_r9),
         .llvm_name = "reserve-r9",
         .description = "Reserve R9, making it unavailable as GPR",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ret_addr_stack)] = .{
-        .index = @enumToInt(Feature.ret_addr_stack),
-        .name = @tagName(Feature.ret_addr_stack),
         .llvm_name = "ret-addr-stack",
         .description = "Has return address stack",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sb)] = .{
-        .index = @enumToInt(Feature.sb),
-        .name = @tagName(Feature.sb),
         .llvm_name = "sb",
         .description = "Enable v8.5a Speculation Barrier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
-        .index = @enumToInt(Feature.sha2),
-        .name = @tagName(Feature.sha2),
         .llvm_name = "sha2",
         .description = "Enable SHA1 and SHA256 support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.slow_fp_brcc)] = .{
-        .index = @enumToInt(Feature.slow_fp_brcc),
-        .name = @tagName(Feature.slow_fp_brcc),
         .llvm_name = "slow-fp-brcc",
         .description = "FP compare + branch is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_load_D_subreg)] = .{
-        .index = @enumToInt(Feature.slow_load_D_subreg),
-        .name = @tagName(Feature.slow_load_D_subreg),
         .llvm_name = "slow-load-D-subreg",
         .description = "Loading into D subregs is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_odd_reg)] = .{
-        .index = @enumToInt(Feature.slow_odd_reg),
-        .name = @tagName(Feature.slow_odd_reg),
         .llvm_name = "slow-odd-reg",
         .description = "VLDM/VSTM starting with an odd register is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vdup32)] = .{
-        .index = @enumToInt(Feature.slow_vdup32),
-        .name = @tagName(Feature.slow_vdup32),
         .llvm_name = "slow-vdup32",
         .description = "Has slow VDUP32 - prefer VMOV",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vgetlni32)] = .{
-        .index = @enumToInt(Feature.slow_vgetlni32),
-        .name = @tagName(Feature.slow_vgetlni32),
         .llvm_name = "slow-vgetlni32",
         .description = "Has slow VGETLNi32 - prefer VMOV",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slowfpvmlx)] = .{
-        .index = @enumToInt(Feature.slowfpvmlx),
-        .name = @tagName(Feature.slowfpvmlx),
         .llvm_name = "slowfpvmlx",
         .description = "Disable VFP / NEON MAC instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
-        .index = @enumToInt(Feature.soft_float),
-        .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software floating point features.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.splat_vfp_neon)] = .{
-        .index = @enumToInt(Feature.splat_vfp_neon),
-        .name = @tagName(Feature.splat_vfp_neon),
         .llvm_name = "splat-vfp-neon",
         .description = "Splat register from VFP to NEON",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dont_widen_vmovs,
         }),
     };
     result[@enumToInt(Feature.strict_align)] = .{
-        .index = @enumToInt(Feature.strict_align),
-        .name = @tagName(Feature.strict_align),
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.swift)] = .{
-        .index = @enumToInt(Feature.swift),
-        .name = @tagName(Feature.swift),
         .llvm_name = "swift",
         .description = "Swift ARM processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb_mode)] = .{
-        .index = @enumToInt(Feature.thumb_mode),
-        .name = @tagName(Feature.thumb_mode),
         .llvm_name = "thumb-mode",
         .description = "Thumb mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb2)] = .{
-        .index = @enumToInt(Feature.thumb2),
-        .name = @tagName(Feature.thumb2),
         .llvm_name = "thumb2",
         .description = "Enable Thumb2 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trustzone)] = .{
-        .index = @enumToInt(Feature.trustzone),
-        .name = @tagName(Feature.trustzone),
         .llvm_name = "trustzone",
         .description = "Enable support for TrustZone security extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
-        .index = @enumToInt(Feature.use_aa),
-        .name = @tagName(Feature.use_aa),
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_misched)] = .{
-        .index = @enumToInt(Feature.use_misched),
-        .name = @tagName(Feature.use_misched),
         .llvm_name = "use-misched",
         .description = "Use the MachineScheduler",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v4t)] = .{
-        .index = @enumToInt(Feature.v4t),
-        .name = @tagName(Feature.v4t),
         .llvm_name = "v4t",
         .description = "Support ARM v4T instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5t)] = .{
-        .index = @enumToInt(Feature.v5t),
-        .name = @tagName(Feature.v5t),
         .llvm_name = "v5t",
         .description = "Support ARM v5T instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v4t,
         }),
     };
     result[@enumToInt(Feature.v5te)] = .{
-        .index = @enumToInt(Feature.v5te),
-        .name = @tagName(Feature.v5te),
         .llvm_name = "v5te",
         .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v5t,
         }),
     };
     result[@enumToInt(Feature.v6)] = .{
-        .index = @enumToInt(Feature.v6),
-        .name = @tagName(Feature.v6),
         .llvm_name = "v6",
         .description = "Support ARM v6 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.v6k)] = .{
-        .index = @enumToInt(Feature.v6k),
-        .name = @tagName(Feature.v6k),
         .llvm_name = "v6k",
         .description = "Support ARM v6k instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v6,
         }),
     };
     result[@enumToInt(Feature.v6m)] = .{
-        .index = @enumToInt(Feature.v6m),
-        .name = @tagName(Feature.v6m),
         .llvm_name = "v6m",
         .description = "Support ARM v6M instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v6,
         }),
     };
     result[@enumToInt(Feature.v6t2)] = .{
-        .index = @enumToInt(Feature.v6t2),
-        .name = @tagName(Feature.v6t2),
         .llvm_name = "v6t2",
         .description = "Support ARM v6t2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .thumb2,
             .v6k,
             .v8m,
         }),
     };
     result[@enumToInt(Feature.v7)] = .{
-        .index = @enumToInt(Feature.v7),
-        .name = @tagName(Feature.v7),
         .llvm_name = "v7",
         .description = "Support ARM v7 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .perfmon,
             .v6t2,
             .v7clrex,
         }),
     };
     result[@enumToInt(Feature.v7clrex)] = .{
-        .index = @enumToInt(Feature.v7clrex),
-        .name = @tagName(Feature.v7clrex),
         .llvm_name = "v7clrex",
         .description = "Has v7 clrex instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8)] = .{
-        .index = @enumToInt(Feature.v8),
-        .name = @tagName(Feature.v8),
         .llvm_name = "v8",
         .description = "Support ARM v8 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .acquire_release,
             .v7,
         }),
     };
     result[@enumToInt(Feature.v8_1a)] = .{
-        .index = @enumToInt(Feature.v8_1a),
-        .name = @tagName(Feature.v8_1a),
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v8,
         }),
     };
     result[@enumToInt(Feature.v8_1m_main)] = .{
-        .index = @enumToInt(Feature.v8_1m_main),
-        .name = @tagName(Feature.v8_1m_main),
         .llvm_name = "v8.1m.main",
         .description = "Support ARM v8-1M Mainline instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v8m_main,
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
-        .index = @enumToInt(Feature.v8_2a),
-        .name = @tagName(Feature.v8_2a),
         .llvm_name = "v8.2a",
         .description = "Support ARM v8.2a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v8_1a,
         }),
     };
     result[@enumToInt(Feature.v8_3a)] = .{
-        .index = @enumToInt(Feature.v8_3a),
-        .name = @tagName(Feature.v8_3a),
         .llvm_name = "v8.3a",
         .description = "Support ARM v8.3a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v8_2a,
         }),
     };
     result[@enumToInt(Feature.v8_4a)] = .{
-        .index = @enumToInt(Feature.v8_4a),
-        .name = @tagName(Feature.v8_4a),
         .llvm_name = "v8.4a",
         .description = "Support ARM v8.4a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dotprod,
             .v8_3a,
         }),
     };
     result[@enumToInt(Feature.v8_5a)] = .{
-        .index = @enumToInt(Feature.v8_5a),
-        .name = @tagName(Feature.v8_5a),
         .llvm_name = "v8.5a",
         .description = "Support ARM v8.5a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sb,
             .v8_4a,
         }),
     };
     result[@enumToInt(Feature.v8m)] = .{
-        .index = @enumToInt(Feature.v8m),
-        .name = @tagName(Feature.v8m),
         .llvm_name = "v8m",
         .description = "Support ARM v8M Baseline instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v6m,
         }),
     };
     result[@enumToInt(Feature.v8m_main)] = .{
-        .index = @enumToInt(Feature.v8m_main),
-        .name = @tagName(Feature.v8m_main),
         .llvm_name = "v8m.main",
         .description = "Support ARM v8M Mainline instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .v7,
         }),
     };
     result[@enumToInt(Feature.vfp2)] = .{
-        .index = @enumToInt(Feature.vfp2),
-        .name = @tagName(Feature.vfp2),
         .llvm_name = "vfp2",
         .description = "Enable VFP2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp2d16,
             .vfp2sp,
         }),
     };
     result[@enumToInt(Feature.vfp2d16)] = .{
-        .index = @enumToInt(Feature.vfp2d16),
-        .name = @tagName(Feature.vfp2d16),
         .llvm_name = "vfp2d16",
         .description = "Enable VFP2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
             .vfp2d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp2d16sp)] = .{
-        .index = @enumToInt(Feature.vfp2d16sp),
-        .name = @tagName(Feature.vfp2d16sp),
         .llvm_name = "vfp2d16sp",
         .description = "Enable VFP2 instructions with no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.vfp2sp)] = .{
-        .index = @enumToInt(Feature.vfp2sp),
-        .name = @tagName(Feature.vfp2sp),
         .llvm_name = "vfp2sp",
         .description = "Enable VFP2 instructions with no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp2d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp3)] = .{
-        .index = @enumToInt(Feature.vfp3),
-        .name = @tagName(Feature.vfp3),
         .llvm_name = "vfp3",
         .description = "Enable VFP3 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp3d16,
             .vfp3sp,
         }),
     };
     result[@enumToInt(Feature.vfp3d16)] = .{
-        .index = @enumToInt(Feature.vfp3d16),
-        .name = @tagName(Feature.vfp3d16),
         .llvm_name = "vfp3d16",
         .description = "Enable VFP3 instructions with only 16 d-registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
             .vfp2,
             .vfp3d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp3d16sp)] = .{
-        .index = @enumToInt(Feature.vfp3d16sp),
-        .name = @tagName(Feature.vfp3d16sp),
         .llvm_name = "vfp3d16sp",
         .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vfp2sp,
         }),
     };
     result[@enumToInt(Feature.vfp3sp)] = .{
-        .index = @enumToInt(Feature.vfp3sp),
-        .name = @tagName(Feature.vfp3sp),
         .llvm_name = "vfp3sp",
         .description = "Enable VFP3 instructions with no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .d32,
             .vfp3d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp4)] = .{
-        .index = @enumToInt(Feature.vfp4),
-        .name = @tagName(Feature.vfp4),
         .llvm_name = "vfp4",
         .description = "Enable VFP4 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp16,
             .vfp3,
             .vfp4d16,
@@ -1666,11 +1339,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.vfp4d16)] = .{
-        .index = @enumToInt(Feature.vfp4d16),
-        .name = @tagName(Feature.vfp4d16),
         .llvm_name = "vfp4d16",
         .description = "Enable VFP4 instructions with only 16 d-registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp16,
             .fp64,
             .vfp3d16,
@@ -1678,21 +1349,17 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.vfp4d16sp)] = .{
-        .index = @enumToInt(Feature.vfp4d16sp),
-        .name = @tagName(Feature.vfp4d16sp),
         .llvm_name = "vfp4d16sp",
         .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp16,
             .vfp3d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp4sp)] = .{
-        .index = @enumToInt(Feature.vfp4sp),
-        .name = @tagName(Feature.vfp4sp),
         .llvm_name = "vfp4sp",
         .description = "Enable VFP4 instructions with no double precision",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .d32,
             .fp16,
             .vfp3sp,
@@ -1700,59 +1367,51 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.virtualization)] = .{
-        .index = @enumToInt(Feature.virtualization),
-        .name = @tagName(Feature.virtualization),
         .llvm_name = "virtualization",
         .description = "Supports Virtualization extension",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hwdiv,
             .hwdiv_arm,
         }),
     };
     result[@enumToInt(Feature.vldn_align)] = .{
-        .index = @enumToInt(Feature.vldn_align),
-        .name = @tagName(Feature.vldn_align),
         .llvm_name = "vldn-align",
         .description = "Check for VLDn unaligned access",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_forwarding)] = .{
-        .index = @enumToInt(Feature.vmlx_forwarding),
-        .name = @tagName(Feature.vmlx_forwarding),
         .llvm_name = "vmlx-forwarding",
         .description = "Has multiplier accumulator forwarding",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_hazards)] = .{
-        .index = @enumToInt(Feature.vmlx_hazards),
-        .name = @tagName(Feature.vmlx_hazards),
         .llvm_name = "vmlx-hazards",
         .description = "Has VMLx hazards",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wide_stride_vfp)] = .{
-        .index = @enumToInt(Feature.wide_stride_vfp),
-        .name = @tagName(Feature.wide_stride_vfp),
         .llvm_name = "wide-stride-vfp",
         .description = "Use a wide stride when allocating VFP registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xscale)] = .{
-        .index = @enumToInt(Feature.xscale),
-        .name = @tagName(Feature.xscale),
         .llvm_name = "xscale",
         .description = "ARMv5te architecture",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.zcz)] = .{
-        .index = @enumToInt(Feature.zcz),
-        .name = @tagName(Feature.zcz),
         .llvm_name = "zcz",
         .description = "Has zero-cycle zeroing instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -1760,49 +1419,49 @@ pub const cpu = struct {
     pub const arm1020e = Cpu{
         .name = "arm1020e",
         .llvm_name = "arm1020e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm1020t = Cpu{
         .name = "arm1020t",
         .llvm_name = "arm1020t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5t,
         }),
     };
     pub const arm1022e = Cpu{
         .name = "arm1022e",
         .llvm_name = "arm1022e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm10e = Cpu{
         .name = "arm10e",
         .llvm_name = "arm10e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm10tdmi = Cpu{
         .name = "arm10tdmi",
         .llvm_name = "arm10tdmi",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5t,
         }),
     };
     pub const arm1136j_s = Cpu{
         .name = "arm1136j_s",
         .llvm_name = "arm1136j-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6,
         }),
     };
     pub const arm1136jf_s = Cpu{
         .name = "arm1136jf_s",
         .llvm_name = "arm1136jf-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6,
             .slowfpvmlx,
             .vfp2,
@@ -1811,14 +1470,14 @@ pub const cpu = struct {
     pub const arm1156t2_s = Cpu{
         .name = "arm1156t2_s",
         .llvm_name = "arm1156t2-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6t2,
         }),
     };
     pub const arm1156t2f_s = Cpu{
         .name = "arm1156t2f_s",
         .llvm_name = "arm1156t2f-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6t2,
             .slowfpvmlx,
             .vfp2,
@@ -1827,21 +1486,21 @@ pub const cpu = struct {
     pub const arm1176j_s = Cpu{
         .name = "arm1176j_s",
         .llvm_name = "arm1176j-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6kz,
         }),
     };
     pub const arm1176jz_s = Cpu{
         .name = "arm1176jz_s",
         .llvm_name = "arm1176jz-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6kz,
         }),
     };
     pub const arm1176jzf_s = Cpu{
         .name = "arm1176jzf_s",
         .llvm_name = "arm1176jzf-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6kz,
             .slowfpvmlx,
             .vfp2,
@@ -1850,126 +1509,126 @@ pub const cpu = struct {
     pub const arm710t = Cpu{
         .name = "arm710t",
         .llvm_name = "arm710t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm720t = Cpu{
         .name = "arm720t",
         .llvm_name = "arm720t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm7tdmi = Cpu{
         .name = "arm7tdmi",
         .llvm_name = "arm7tdmi",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm7tdmi_s = Cpu{
         .name = "arm7tdmi_s",
         .llvm_name = "arm7tdmi-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm8 = Cpu{
         .name = "arm8",
         .llvm_name = "arm8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const arm810 = Cpu{
         .name = "arm810",
         .llvm_name = "arm810",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const arm9 = Cpu{
         .name = "arm9",
         .llvm_name = "arm9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm920 = Cpu{
         .name = "arm920",
         .llvm_name = "arm920",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm920t = Cpu{
         .name = "arm920t",
         .llvm_name = "arm920t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm922t = Cpu{
         .name = "arm922t",
         .llvm_name = "arm922t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm926ej_s = Cpu{
         .name = "arm926ej_s",
         .llvm_name = "arm926ej-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm940t = Cpu{
         .name = "arm940t",
         .llvm_name = "arm940t",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const arm946e_s = Cpu{
         .name = "arm946e_s",
         .llvm_name = "arm946e-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm966e_s = Cpu{
         .name = "arm966e_s",
         .llvm_name = "arm966e-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm968e_s = Cpu{
         .name = "arm968e_s",
         .llvm_name = "arm968e-s",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm9e = Cpu{
         .name = "arm9e",
         .llvm_name = "arm9e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const arm9tdmi = Cpu{
         .name = "arm9tdmi",
         .llvm_name = "arm9tdmi",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const cortex_a12 = Cpu{
         .name = "cortex_a12",
         .llvm_name = "cortex-a12",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a12,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -1984,7 +1643,7 @@ pub const cpu = struct {
     pub const cortex_a15 = Cpu{
         .name = "cortex_a15",
         .llvm_name = "cortex-a15",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a15,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -2002,7 +1661,7 @@ pub const cpu = struct {
     pub const cortex_a17 = Cpu{
         .name = "cortex_a17",
         .llvm_name = "cortex-a17",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a17,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -2017,7 +1676,7 @@ pub const cpu = struct {
     pub const cortex_a32 = Cpu{
         .name = "cortex_a32",
         .llvm_name = "cortex-a32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .crc,
             .crypto,
@@ -2028,7 +1687,7 @@ pub const cpu = struct {
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a35,
             .armv8_a,
             .crc,
@@ -2040,7 +1699,7 @@ pub const cpu = struct {
     pub const cortex_a5 = Cpu{
         .name = "cortex_a5",
         .llvm_name = "cortex-a5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a5,
             .armv7_a,
             .mp,
@@ -2055,7 +1714,7 @@ pub const cpu = struct {
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a53,
             .armv8_a,
             .crc,
@@ -2068,7 +1727,7 @@ pub const cpu = struct {
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a55,
             .armv8_2_a,
             .dotprod,
@@ -2079,7 +1738,7 @@ pub const cpu = struct {
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a57,
             .armv8_a,
             .avoid_partial_cpsr,
@@ -2094,7 +1753,7 @@ pub const cpu = struct {
     pub const cortex_a7 = Cpu{
         .name = "cortex_a7",
         .llvm_name = "cortex-a7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a7,
             .armv7_a,
             .mp,
@@ -2111,7 +1770,7 @@ pub const cpu = struct {
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a72,
             .armv8_a,
             .crc,
@@ -2123,7 +1782,7 @@ pub const cpu = struct {
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a73,
             .armv8_a,
             .crc,
@@ -2135,7 +1794,7 @@ pub const cpu = struct {
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a75,
             .armv8_2_a,
             .dotprod,
@@ -2146,7 +1805,7 @@ pub const cpu = struct {
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a76,
             .armv8_2_a,
             .crc,
@@ -2160,7 +1819,7 @@ pub const cpu = struct {
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a76,
             .armv8_2_a,
             .crc,
@@ -2174,7 +1833,7 @@ pub const cpu = struct {
     pub const cortex_a8 = Cpu{
         .name = "cortex_a8",
         .llvm_name = "cortex-a8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a8,
             .armv7_a,
             .nonpipelined_vfp,
@@ -2189,7 +1848,7 @@ pub const cpu = struct {
     pub const cortex_a9 = Cpu{
         .name = "cortex_a9",
         .llvm_name = "cortex-a9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .a9,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -2209,28 +1868,28 @@ pub const cpu = struct {
     pub const cortex_m0 = Cpu{
         .name = "cortex_m0",
         .llvm_name = "cortex-m0",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m0plus = Cpu{
         .name = "cortex_m0plus",
         .llvm_name = "cortex-m0plus",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m1 = Cpu{
         .name = "cortex_m1",
         .llvm_name = "cortex-m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m23 = Cpu{
         .name = "cortex_m23",
         .llvm_name = "cortex-m23",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_m_base,
             .no_movt,
         }),
@@ -2238,7 +1897,7 @@ pub const cpu = struct {
     pub const cortex_m3 = Cpu{
         .name = "cortex_m3",
         .llvm_name = "cortex-m3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_m,
             .loop_align,
             .m3,
@@ -2250,7 +1909,7 @@ pub const cpu = struct {
     pub const cortex_m33 = Cpu{
         .name = "cortex_m33",
         .llvm_name = "cortex-m33",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_m_main,
             .dsp,
             .fp_armv8d16sp,
@@ -2264,7 +1923,7 @@ pub const cpu = struct {
     pub const cortex_m35p = Cpu{
         .name = "cortex_m35p",
         .llvm_name = "cortex-m35p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_m_main,
             .dsp,
             .fp_armv8d16sp,
@@ -2278,7 +1937,7 @@ pub const cpu = struct {
     pub const cortex_m4 = Cpu{
         .name = "cortex_m4",
         .llvm_name = "cortex-m4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7e_m,
             .loop_align,
             .no_branch_predictor,
@@ -2291,7 +1950,7 @@ pub const cpu = struct {
     pub const cortex_m7 = Cpu{
         .name = "cortex_m7",
         .llvm_name = "cortex-m7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7e_m,
             .fp_armv8d16,
         }),
@@ -2299,7 +1958,7 @@ pub const cpu = struct {
     pub const cortex_r4 = Cpu{
         .name = "cortex_r4",
         .llvm_name = "cortex-r4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .r4,
@@ -2309,7 +1968,7 @@ pub const cpu = struct {
     pub const cortex_r4f = Cpu{
         .name = "cortex_r4f",
         .llvm_name = "cortex-r4f",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .r4,
@@ -2322,7 +1981,7 @@ pub const cpu = struct {
     pub const cortex_r5 = Cpu{
         .name = "cortex_r5",
         .llvm_name = "cortex-r5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .hwdiv_arm,
@@ -2336,7 +1995,7 @@ pub const cpu = struct {
     pub const cortex_r52 = Cpu{
         .name = "cortex_r52",
         .llvm_name = "cortex-r52",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_r,
             .fpao,
             .r52,
@@ -2347,7 +2006,7 @@ pub const cpu = struct {
     pub const cortex_r7 = Cpu{
         .name = "cortex_r7",
         .llvm_name = "cortex-r7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .fp16,
@@ -2363,7 +2022,7 @@ pub const cpu = struct {
     pub const cortex_r8 = Cpu{
         .name = "cortex_r8",
         .llvm_name = "cortex-r8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .fp16,
@@ -2378,7 +2037,7 @@ pub const cpu = struct {
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
@@ -2399,14 +2058,14 @@ pub const cpu = struct {
     pub const ep9312 = Cpu{
         .name = "ep9312",
         .llvm_name = "ep9312",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4t,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2414,7 +2073,7 @@ pub const cpu = struct {
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2422,7 +2081,7 @@ pub const cpu = struct {
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2430,7 +2089,7 @@ pub const cpu = struct {
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_2_a,
             .dotprod,
             .exynos,
@@ -2440,7 +2099,7 @@ pub const cpu = struct {
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_2_a,
             .dotprod,
             .exynos,
@@ -2450,19 +2109,19 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const iwmmxt = Cpu{
         .name = "iwmmxt",
         .llvm_name = "iwmmxt",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
     pub const krait = Cpu{
         .name = "krait",
         .llvm_name = "krait",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_a,
             .avoid_partial_cpsr,
             .fp16,
@@ -2479,7 +2138,7 @@ pub const cpu = struct {
     pub const kryo = Cpu{
         .name = "kryo",
         .llvm_name = "kryo",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv8_a,
             .crc,
             .crypto,
@@ -2491,7 +2150,7 @@ pub const cpu = struct {
     pub const mpcore = Cpu{
         .name = "mpcore",
         .llvm_name = "mpcore",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6k,
             .slowfpvmlx,
             .vfp2,
@@ -2500,21 +2159,21 @@ pub const cpu = struct {
     pub const mpcorenovfp = Cpu{
         .name = "mpcorenovfp",
         .llvm_name = "mpcorenovfp",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6k,
         }),
     };
     pub const sc000 = Cpu{
         .name = "sc000",
         .llvm_name = "sc000",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv6_m,
         }),
     };
     pub const sc300 = Cpu{
         .name = "sc300",
         .llvm_name = "sc300",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_m,
             .m3,
             .no_branch_predictor,
@@ -2525,35 +2184,35 @@ pub const cpu = struct {
     pub const strongarm = Cpu{
         .name = "strongarm",
         .llvm_name = "strongarm",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm110 = Cpu{
         .name = "strongarm110",
         .llvm_name = "strongarm110",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm1100 = Cpu{
         .name = "strongarm1100",
         .llvm_name = "strongarm1100",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm1110 = Cpu{
         .name = "strongarm1110",
         .llvm_name = "strongarm1110",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv4,
         }),
     };
     pub const swift = Cpu{
         .name = "swift",
         .llvm_name = "swift",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv7_a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
@@ -2580,7 +2239,7 @@ pub const cpu = struct {
     pub const xscale = Cpu{
         .name = "xscale",
         .llvm_name = "xscale",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .armv5te,
         }),
     };
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index ac739edc081d1d6c05d34b9bac5b5982829f20b2..687a8122fee8fe26abeb5476406506b8bd60d475 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -41,38 +41,30 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.addsubiw)] = .{
-        .index = @enumToInt(Feature.addsubiw),
-        .name = @tagName(Feature.addsubiw),
         .llvm_name = "addsubiw",
         .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr0)] = .{
-        .index = @enumToInt(Feature.avr0),
-        .name = @tagName(Feature.avr0),
         .llvm_name = "avr0",
         .description = "The device is a part of the avr0 family",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr1)] = .{
-        .index = @enumToInt(Feature.avr1),
-        .name = @tagName(Feature.avr1),
         .llvm_name = "avr1",
         .description = "The device is a part of the avr1 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr0,
             .lpm,
         }),
     };
     result[@enumToInt(Feature.avr2)] = .{
-        .index = @enumToInt(Feature.avr2),
-        .name = @tagName(Feature.avr2),
         .llvm_name = "avr2",
         .description = "The device is a part of the avr2 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .addsubiw,
             .avr1,
             .ijmpcall,
@@ -80,11 +72,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avr25)] = .{
-        .index = @enumToInt(Feature.avr25),
-        .name = @tagName(Feature.avr25),
         .llvm_name = "avr25",
         .description = "The device is a part of the avr25 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr2,
             .@"break",
             .lpmx,
@@ -93,31 +83,25 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avr3)] = .{
-        .index = @enumToInt(Feature.avr3),
-        .name = @tagName(Feature.avr3),
         .llvm_name = "avr3",
         .description = "The device is a part of the avr3 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr2,
             .jmpcall,
         }),
     };
     result[@enumToInt(Feature.avr31)] = .{
-        .index = @enumToInt(Feature.avr31),
-        .name = @tagName(Feature.avr31),
         .llvm_name = "avr31",
         .description = "The device is a part of the avr31 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr3,
             .elpm,
         }),
     };
     result[@enumToInt(Feature.avr35)] = .{
-        .index = @enumToInt(Feature.avr35),
-        .name = @tagName(Feature.avr35),
         .llvm_name = "avr35",
         .description = "The device is a part of the avr35 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr3,
             .@"break",
             .lpmx,
@@ -126,11 +110,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avr4)] = .{
-        .index = @enumToInt(Feature.avr4),
-        .name = @tagName(Feature.avr4),
         .llvm_name = "avr4",
         .description = "The device is a part of the avr4 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr2,
             .@"break",
             .lpmx,
@@ -140,11 +122,9 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avr5)] = .{
-        .index = @enumToInt(Feature.avr5),
-        .name = @tagName(Feature.avr5),
         .llvm_name = "avr5",
         .description = "The device is a part of the avr5 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr3,
             .@"break",
             .lpmx,
@@ -154,31 +134,25 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.avr51)] = .{
-        .index = @enumToInt(Feature.avr51),
-        .name = @tagName(Feature.avr51),
         .llvm_name = "avr51",
         .description = "The device is a part of the avr51 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr5,
             .elpm,
             .elpmx,
         }),
     };
     result[@enumToInt(Feature.avr6)] = .{
-        .index = @enumToInt(Feature.avr6),
-        .name = @tagName(Feature.avr6),
         .llvm_name = "avr6",
         .description = "The device is a part of the avr6 family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr51,
         }),
     };
     result[@enumToInt(Feature.avrtiny)] = .{
-        .index = @enumToInt(Feature.avrtiny),
-        .name = @tagName(Feature.avrtiny),
         .llvm_name = "avrtiny",
         .description = "The device is a part of the avrtiny family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr0,
             .@"break",
             .sram,
@@ -186,102 +160,74 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.@"break")] = .{
-        .index = @enumToInt(Feature.@"break"),
-        .name = @tagName(Feature.@"break"),
         .llvm_name = "break",
         .description = "The device supports the `BREAK` debugging instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.des)] = .{
-        .index = @enumToInt(Feature.des),
-        .name = @tagName(Feature.des),
         .llvm_name = "des",
         .description = "The device supports the `DES k` encryption instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.eijmpcall)] = .{
-        .index = @enumToInt(Feature.eijmpcall),
-        .name = @tagName(Feature.eijmpcall),
         .llvm_name = "eijmpcall",
         .description = "The device supports the `EIJMP`/`EICALL` instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpm)] = .{
-        .index = @enumToInt(Feature.elpm),
-        .name = @tagName(Feature.elpm),
         .llvm_name = "elpm",
         .description = "The device supports the ELPM instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpmx)] = .{
-        .index = @enumToInt(Feature.elpmx),
-        .name = @tagName(Feature.elpmx),
         .llvm_name = "elpmx",
         .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ijmpcall)] = .{
-        .index = @enumToInt(Feature.ijmpcall),
-        .name = @tagName(Feature.ijmpcall),
         .llvm_name = "ijmpcall",
         .description = "The device supports `IJMP`/`ICALL`instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jmpcall)] = .{
-        .index = @enumToInt(Feature.jmpcall),
-        .name = @tagName(Feature.jmpcall),
         .llvm_name = "jmpcall",
         .description = "The device supports the `JMP` and `CALL` instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpm)] = .{
-        .index = @enumToInt(Feature.lpm),
-        .name = @tagName(Feature.lpm),
         .llvm_name = "lpm",
         .description = "The device supports the `LPM` instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpmx)] = .{
-        .index = @enumToInt(Feature.lpmx),
-        .name = @tagName(Feature.lpmx),
         .llvm_name = "lpmx",
         .description = "The device supports the `LPM Rd, Z[+]` instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movw)] = .{
-        .index = @enumToInt(Feature.movw),
-        .name = @tagName(Feature.movw),
         .llvm_name = "movw",
         .description = "The device supports the 16-bit MOVW instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mul)] = .{
-        .index = @enumToInt(Feature.mul),
-        .name = @tagName(Feature.mul),
         .llvm_name = "mul",
         .description = "The device supports the multiplication instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rmw)] = .{
-        .index = @enumToInt(Feature.rmw),
-        .name = @tagName(Feature.rmw),
         .llvm_name = "rmw",
         .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smallstack)] = .{
-        .index = @enumToInt(Feature.smallstack),
-        .name = @tagName(Feature.smallstack),
         .llvm_name = "smallstack",
         .description = "The device has an 8-bit stack pointer",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.special)] = .{
-        .index = @enumToInt(Feature.special),
-        .name = @tagName(Feature.special),
         .llvm_name = "special",
         .description = "Enable use of the entire instruction set - used for debugging",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .addsubiw,
             .@"break",
             .des,
@@ -301,39 +247,29 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.spm)] = .{
-        .index = @enumToInt(Feature.spm),
-        .name = @tagName(Feature.spm),
         .llvm_name = "spm",
         .description = "The device supports the `SPM` instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spmx)] = .{
-        .index = @enumToInt(Feature.spmx),
-        .name = @tagName(Feature.spmx),
         .llvm_name = "spmx",
         .description = "The device supports the `SPM Z+` instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sram)] = .{
-        .index = @enumToInt(Feature.sram),
-        .name = @tagName(Feature.sram),
         .llvm_name = "sram",
         .description = "The device has random access memory",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tinyencoding)] = .{
-        .index = @enumToInt(Feature.tinyencoding),
-        .name = @tagName(Feature.tinyencoding),
         .llvm_name = "tinyencoding",
         .description = "The device has Tiny core specific instruction encodings",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xmega)] = .{
-        .index = @enumToInt(Feature.xmega),
-        .name = @tagName(Feature.xmega),
         .llvm_name = "xmega",
         .description = "The device is a part of the xmega family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avr51,
             .des,
             .eijmpcall,
@@ -341,15 +277,19 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.xmegau)] = .{
-        .index = @enumToInt(Feature.xmegau),
-        .name = @tagName(Feature.xmegau),
         .llvm_name = "xmegau",
         .description = "The device is a part of the xmegau family",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .rmw,
             .xmega,
         }),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -357,28 +297,28 @@ pub const cpu = struct {
     pub const at43usb320 = Cpu{
         .name = "at43usb320",
         .llvm_name = "at43usb320",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr31,
         }),
     };
     pub const at43usb355 = Cpu{
         .name = "at43usb355",
         .llvm_name = "at43usb355",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
         }),
     };
     pub const at76c711 = Cpu{
         .name = "at76c711",
         .llvm_name = "at76c711",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
         }),
     };
     pub const at86rf401 = Cpu{
         .name = "at86rf401",
         .llvm_name = "at86rf401",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -387,217 +327,217 @@ pub const cpu = struct {
     pub const at90c8534 = Cpu{
         .name = "at90c8534",
         .llvm_name = "at90c8534",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90can128 = Cpu{
         .name = "at90can128",
         .llvm_name = "at90can128",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const at90can32 = Cpu{
         .name = "at90can32",
         .llvm_name = "at90can32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90can64 = Cpu{
         .name = "at90can64",
         .llvm_name = "at90can64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm1 = Cpu{
         .name = "at90pwm1",
         .llvm_name = "at90pwm1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm161 = Cpu{
         .name = "at90pwm161",
         .llvm_name = "at90pwm161",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm2 = Cpu{
         .name = "at90pwm2",
         .llvm_name = "at90pwm2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm216 = Cpu{
         .name = "at90pwm216",
         .llvm_name = "at90pwm216",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm2b = Cpu{
         .name = "at90pwm2b",
         .llvm_name = "at90pwm2b",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm3 = Cpu{
         .name = "at90pwm3",
         .llvm_name = "at90pwm3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm316 = Cpu{
         .name = "at90pwm316",
         .llvm_name = "at90pwm316",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm3b = Cpu{
         .name = "at90pwm3b",
         .llvm_name = "at90pwm3b",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm81 = Cpu{
         .name = "at90pwm81",
         .llvm_name = "at90pwm81",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const at90s1200 = Cpu{
         .name = "at90s1200",
         .llvm_name = "at90s1200",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr0,
         }),
     };
     pub const at90s2313 = Cpu{
         .name = "at90s2313",
         .llvm_name = "at90s2313",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2323 = Cpu{
         .name = "at90s2323",
         .llvm_name = "at90s2323",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2333 = Cpu{
         .name = "at90s2333",
         .llvm_name = "at90s2333",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2343 = Cpu{
         .name = "at90s2343",
         .llvm_name = "at90s2343",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4414 = Cpu{
         .name = "at90s4414",
         .llvm_name = "at90s4414",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4433 = Cpu{
         .name = "at90s4433",
         .llvm_name = "at90s4433",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4434 = Cpu{
         .name = "at90s4434",
         .llvm_name = "at90s4434",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s8515 = Cpu{
         .name = "at90s8515",
         .llvm_name = "at90s8515",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90s8535 = Cpu{
         .name = "at90s8535",
         .llvm_name = "at90s8535",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const at90scr100 = Cpu{
         .name = "at90scr100",
         .llvm_name = "at90scr100",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb1286 = Cpu{
         .name = "at90usb1286",
         .llvm_name = "at90usb1286",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const at90usb1287 = Cpu{
         .name = "at90usb1287",
         .llvm_name = "at90usb1287",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const at90usb162 = Cpu{
         .name = "at90usb162",
         .llvm_name = "at90usb162",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const at90usb646 = Cpu{
         .name = "at90usb646",
         .llvm_name = "at90usb646",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb647 = Cpu{
         .name = "at90usb647",
         .llvm_name = "at90usb647",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb82 = Cpu{
         .name = "at90usb82",
         .llvm_name = "at90usb82",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const at94k = Cpu{
         .name = "at94k",
         .llvm_name = "at94k",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -607,133 +547,133 @@ pub const cpu = struct {
     pub const ata5272 = Cpu{
         .name = "ata5272",
         .llvm_name = "ata5272",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const ata5505 = Cpu{
         .name = "ata5505",
         .llvm_name = "ata5505",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const ata5790 = Cpu{
         .name = "ata5790",
         .llvm_name = "ata5790",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const ata5795 = Cpu{
         .name = "ata5795",
         .llvm_name = "ata5795",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const ata6285 = Cpu{
         .name = "ata6285",
         .llvm_name = "ata6285",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const ata6286 = Cpu{
         .name = "ata6286",
         .llvm_name = "ata6286",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const ata6289 = Cpu{
         .name = "ata6289",
         .llvm_name = "ata6289",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega103 = Cpu{
         .name = "atmega103",
         .llvm_name = "atmega103",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr31,
         }),
     };
     pub const atmega128 = Cpu{
         .name = "atmega128",
         .llvm_name = "atmega128",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1280 = Cpu{
         .name = "atmega1280",
         .llvm_name = "atmega1280",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1281 = Cpu{
         .name = "atmega1281",
         .llvm_name = "atmega1281",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284 = Cpu{
         .name = "atmega1284",
         .llvm_name = "atmega1284",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284p = Cpu{
         .name = "atmega1284p",
         .llvm_name = "atmega1284p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284rfr2 = Cpu{
         .name = "atmega1284rfr2",
         .llvm_name = "atmega1284rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128a = Cpu{
         .name = "atmega128a",
         .llvm_name = "atmega128a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128rfa1 = Cpu{
         .name = "atmega128rfa1",
         .llvm_name = "atmega128rfa1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128rfr2 = Cpu{
         .name = "atmega128rfr2",
         .llvm_name = "atmega128rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const atmega16 = Cpu{
         .name = "atmega16",
         .llvm_name = "atmega16",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega161 = Cpu{
         .name = "atmega161",
         .llvm_name = "atmega161",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -744,14 +684,14 @@ pub const cpu = struct {
     pub const atmega162 = Cpu{
         .name = "atmega162",
         .llvm_name = "atmega162",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega163 = Cpu{
         .name = "atmega163",
         .llvm_name = "atmega163",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -762,623 +702,623 @@ pub const cpu = struct {
     pub const atmega164a = Cpu{
         .name = "atmega164a",
         .llvm_name = "atmega164a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega164p = Cpu{
         .name = "atmega164p",
         .llvm_name = "atmega164p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega164pa = Cpu{
         .name = "atmega164pa",
         .llvm_name = "atmega164pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165 = Cpu{
         .name = "atmega165",
         .llvm_name = "atmega165",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165a = Cpu{
         .name = "atmega165a",
         .llvm_name = "atmega165a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165p = Cpu{
         .name = "atmega165p",
         .llvm_name = "atmega165p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165pa = Cpu{
         .name = "atmega165pa",
         .llvm_name = "atmega165pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168 = Cpu{
         .name = "atmega168",
         .llvm_name = "atmega168",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168a = Cpu{
         .name = "atmega168a",
         .llvm_name = "atmega168a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168p = Cpu{
         .name = "atmega168p",
         .llvm_name = "atmega168p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168pa = Cpu{
         .name = "atmega168pa",
         .llvm_name = "atmega168pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169 = Cpu{
         .name = "atmega169",
         .llvm_name = "atmega169",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169a = Cpu{
         .name = "atmega169a",
         .llvm_name = "atmega169a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169p = Cpu{
         .name = "atmega169p",
         .llvm_name = "atmega169p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169pa = Cpu{
         .name = "atmega169pa",
         .llvm_name = "atmega169pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16a = Cpu{
         .name = "atmega16a",
         .llvm_name = "atmega16a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hva = Cpu{
         .name = "atmega16hva",
         .llvm_name = "atmega16hva",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hva2 = Cpu{
         .name = "atmega16hva2",
         .llvm_name = "atmega16hva2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hvb = Cpu{
         .name = "atmega16hvb",
         .llvm_name = "atmega16hvb",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hvbrevb = Cpu{
         .name = "atmega16hvbrevb",
         .llvm_name = "atmega16hvbrevb",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16m1 = Cpu{
         .name = "atmega16m1",
         .llvm_name = "atmega16m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16u2 = Cpu{
         .name = "atmega16u2",
         .llvm_name = "atmega16u2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const atmega16u4 = Cpu{
         .name = "atmega16u4",
         .llvm_name = "atmega16u4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega2560 = Cpu{
         .name = "atmega2560",
         .llvm_name = "atmega2560",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr6,
         }),
     };
     pub const atmega2561 = Cpu{
         .name = "atmega2561",
         .llvm_name = "atmega2561",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr6,
         }),
     };
     pub const atmega2564rfr2 = Cpu{
         .name = "atmega2564rfr2",
         .llvm_name = "atmega2564rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr6,
         }),
     };
     pub const atmega256rfr2 = Cpu{
         .name = "atmega256rfr2",
         .llvm_name = "atmega256rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr6,
         }),
     };
     pub const atmega32 = Cpu{
         .name = "atmega32",
         .llvm_name = "atmega32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega323 = Cpu{
         .name = "atmega323",
         .llvm_name = "atmega323",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324a = Cpu{
         .name = "atmega324a",
         .llvm_name = "atmega324a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324p = Cpu{
         .name = "atmega324p",
         .llvm_name = "atmega324p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324pa = Cpu{
         .name = "atmega324pa",
         .llvm_name = "atmega324pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325 = Cpu{
         .name = "atmega325",
         .llvm_name = "atmega325",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250 = Cpu{
         .name = "atmega3250",
         .llvm_name = "atmega3250",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250a = Cpu{
         .name = "atmega3250a",
         .llvm_name = "atmega3250a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250p = Cpu{
         .name = "atmega3250p",
         .llvm_name = "atmega3250p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250pa = Cpu{
         .name = "atmega3250pa",
         .llvm_name = "atmega3250pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325a = Cpu{
         .name = "atmega325a",
         .llvm_name = "atmega325a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325p = Cpu{
         .name = "atmega325p",
         .llvm_name = "atmega325p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325pa = Cpu{
         .name = "atmega325pa",
         .llvm_name = "atmega325pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega328 = Cpu{
         .name = "atmega328",
         .llvm_name = "atmega328",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega328p = Cpu{
         .name = "atmega328p",
         .llvm_name = "atmega328p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329 = Cpu{
         .name = "atmega329",
         .llvm_name = "atmega329",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290 = Cpu{
         .name = "atmega3290",
         .llvm_name = "atmega3290",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290a = Cpu{
         .name = "atmega3290a",
         .llvm_name = "atmega3290a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290p = Cpu{
         .name = "atmega3290p",
         .llvm_name = "atmega3290p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290pa = Cpu{
         .name = "atmega3290pa",
         .llvm_name = "atmega3290pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329a = Cpu{
         .name = "atmega329a",
         .llvm_name = "atmega329a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329p = Cpu{
         .name = "atmega329p",
         .llvm_name = "atmega329p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329pa = Cpu{
         .name = "atmega329pa",
         .llvm_name = "atmega329pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32a = Cpu{
         .name = "atmega32a",
         .llvm_name = "atmega32a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32c1 = Cpu{
         .name = "atmega32c1",
         .llvm_name = "atmega32c1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32hvb = Cpu{
         .name = "atmega32hvb",
         .llvm_name = "atmega32hvb",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32hvbrevb = Cpu{
         .name = "atmega32hvbrevb",
         .llvm_name = "atmega32hvbrevb",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32m1 = Cpu{
         .name = "atmega32m1",
         .llvm_name = "atmega32m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32u2 = Cpu{
         .name = "atmega32u2",
         .llvm_name = "atmega32u2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const atmega32u4 = Cpu{
         .name = "atmega32u4",
         .llvm_name = "atmega32u4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32u6 = Cpu{
         .name = "atmega32u6",
         .llvm_name = "atmega32u6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega406 = Cpu{
         .name = "atmega406",
         .llvm_name = "atmega406",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega48 = Cpu{
         .name = "atmega48",
         .llvm_name = "atmega48",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48a = Cpu{
         .name = "atmega48a",
         .llvm_name = "atmega48a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48p = Cpu{
         .name = "atmega48p",
         .llvm_name = "atmega48p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48pa = Cpu{
         .name = "atmega48pa",
         .llvm_name = "atmega48pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega64 = Cpu{
         .name = "atmega64",
         .llvm_name = "atmega64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega640 = Cpu{
         .name = "atmega640",
         .llvm_name = "atmega640",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644 = Cpu{
         .name = "atmega644",
         .llvm_name = "atmega644",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644a = Cpu{
         .name = "atmega644a",
         .llvm_name = "atmega644a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644p = Cpu{
         .name = "atmega644p",
         .llvm_name = "atmega644p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644pa = Cpu{
         .name = "atmega644pa",
         .llvm_name = "atmega644pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644rfr2 = Cpu{
         .name = "atmega644rfr2",
         .llvm_name = "atmega644rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645 = Cpu{
         .name = "atmega645",
         .llvm_name = "atmega645",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450 = Cpu{
         .name = "atmega6450",
         .llvm_name = "atmega6450",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450a = Cpu{
         .name = "atmega6450a",
         .llvm_name = "atmega6450a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450p = Cpu{
         .name = "atmega6450p",
         .llvm_name = "atmega6450p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645a = Cpu{
         .name = "atmega645a",
         .llvm_name = "atmega645a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645p = Cpu{
         .name = "atmega645p",
         .llvm_name = "atmega645p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649 = Cpu{
         .name = "atmega649",
         .llvm_name = "atmega649",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490 = Cpu{
         .name = "atmega6490",
         .llvm_name = "atmega6490",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490a = Cpu{
         .name = "atmega6490a",
         .llvm_name = "atmega6490a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490p = Cpu{
         .name = "atmega6490p",
         .llvm_name = "atmega6490p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649a = Cpu{
         .name = "atmega649a",
         .llvm_name = "atmega649a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649p = Cpu{
         .name = "atmega649p",
         .llvm_name = "atmega649p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64a = Cpu{
         .name = "atmega64a",
         .llvm_name = "atmega64a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64c1 = Cpu{
         .name = "atmega64c1",
         .llvm_name = "atmega64c1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64hve = Cpu{
         .name = "atmega64hve",
         .llvm_name = "atmega64hve",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64m1 = Cpu{
         .name = "atmega64m1",
         .llvm_name = "atmega64m1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64rfr2 = Cpu{
         .name = "atmega64rfr2",
         .llvm_name = "atmega64rfr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const atmega8 = Cpu{
         .name = "atmega8",
         .llvm_name = "atmega8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8515 = Cpu{
         .name = "atmega8515",
         .llvm_name = "atmega8515",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -1389,7 +1329,7 @@ pub const cpu = struct {
     pub const atmega8535 = Cpu{
         .name = "atmega8535",
         .llvm_name = "atmega8535",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -1400,175 +1340,175 @@ pub const cpu = struct {
     pub const atmega88 = Cpu{
         .name = "atmega88",
         .llvm_name = "atmega88",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88a = Cpu{
         .name = "atmega88a",
         .llvm_name = "atmega88a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88p = Cpu{
         .name = "atmega88p",
         .llvm_name = "atmega88p",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88pa = Cpu{
         .name = "atmega88pa",
         .llvm_name = "atmega88pa",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8a = Cpu{
         .name = "atmega8a",
         .llvm_name = "atmega8a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8hva = Cpu{
         .name = "atmega8hva",
         .llvm_name = "atmega8hva",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8u2 = Cpu{
         .name = "atmega8u2",
         .llvm_name = "atmega8u2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const attiny10 = Cpu{
         .name = "attiny10",
         .llvm_name = "attiny10",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny102 = Cpu{
         .name = "attiny102",
         .llvm_name = "attiny102",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny104 = Cpu{
         .name = "attiny104",
         .llvm_name = "attiny104",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny11 = Cpu{
         .name = "attiny11",
         .llvm_name = "attiny11",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr1,
         }),
     };
     pub const attiny12 = Cpu{
         .name = "attiny12",
         .llvm_name = "attiny12",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr1,
         }),
     };
     pub const attiny13 = Cpu{
         .name = "attiny13",
         .llvm_name = "attiny13",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny13a = Cpu{
         .name = "attiny13a",
         .llvm_name = "attiny13a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny15 = Cpu{
         .name = "attiny15",
         .llvm_name = "attiny15",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr1,
         }),
     };
     pub const attiny1634 = Cpu{
         .name = "attiny1634",
         .llvm_name = "attiny1634",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const attiny167 = Cpu{
         .name = "attiny167",
         .llvm_name = "attiny167",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const attiny20 = Cpu{
         .name = "attiny20",
         .llvm_name = "attiny20",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny22 = Cpu{
         .name = "attiny22",
         .llvm_name = "attiny22",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const attiny2313 = Cpu{
         .name = "attiny2313",
         .llvm_name = "attiny2313",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny2313a = Cpu{
         .name = "attiny2313a",
         .llvm_name = "attiny2313a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny24 = Cpu{
         .name = "attiny24",
         .llvm_name = "attiny24",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny24a = Cpu{
         .name = "attiny24a",
         .llvm_name = "attiny24a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny25 = Cpu{
         .name = "attiny25",
         .llvm_name = "attiny25",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny26 = Cpu{
         .name = "attiny26",
         .llvm_name = "attiny26",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
             .lpmx,
         }),
@@ -1576,602 +1516,602 @@ pub const cpu = struct {
     pub const attiny261 = Cpu{
         .name = "attiny261",
         .llvm_name = "attiny261",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny261a = Cpu{
         .name = "attiny261a",
         .llvm_name = "attiny261a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny28 = Cpu{
         .name = "attiny28",
         .llvm_name = "attiny28",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr1,
         }),
     };
     pub const attiny4 = Cpu{
         .name = "attiny4",
         .llvm_name = "attiny4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny40 = Cpu{
         .name = "attiny40",
         .llvm_name = "attiny40",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny4313 = Cpu{
         .name = "attiny4313",
         .llvm_name = "attiny4313",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny43u = Cpu{
         .name = "attiny43u",
         .llvm_name = "attiny43u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny44 = Cpu{
         .name = "attiny44",
         .llvm_name = "attiny44",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny44a = Cpu{
         .name = "attiny44a",
         .llvm_name = "attiny44a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny45 = Cpu{
         .name = "attiny45",
         .llvm_name = "attiny45",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny461 = Cpu{
         .name = "attiny461",
         .llvm_name = "attiny461",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny461a = Cpu{
         .name = "attiny461a",
         .llvm_name = "attiny461a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny48 = Cpu{
         .name = "attiny48",
         .llvm_name = "attiny48",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny5 = Cpu{
         .name = "attiny5",
         .llvm_name = "attiny5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny828 = Cpu{
         .name = "attiny828",
         .llvm_name = "attiny828",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny84 = Cpu{
         .name = "attiny84",
         .llvm_name = "attiny84",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny84a = Cpu{
         .name = "attiny84a",
         .llvm_name = "attiny84a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny85 = Cpu{
         .name = "attiny85",
         .llvm_name = "attiny85",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny861 = Cpu{
         .name = "attiny861",
         .llvm_name = "attiny861",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny861a = Cpu{
         .name = "attiny861a",
         .llvm_name = "attiny861a",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny87 = Cpu{
         .name = "attiny87",
         .llvm_name = "attiny87",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny88 = Cpu{
         .name = "attiny88",
         .llvm_name = "attiny88",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const attiny9 = Cpu{
         .name = "attiny9",
         .llvm_name = "attiny9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const atxmega128a1 = Cpu{
         .name = "atxmega128a1",
         .llvm_name = "atxmega128a1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128a1u = Cpu{
         .name = "atxmega128a1u",
         .llvm_name = "atxmega128a1u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128a3 = Cpu{
         .name = "atxmega128a3",
         .llvm_name = "atxmega128a3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128a3u = Cpu{
         .name = "atxmega128a3u",
         .llvm_name = "atxmega128a3u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128a4u = Cpu{
         .name = "atxmega128a4u",
         .llvm_name = "atxmega128a4u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128b1 = Cpu{
         .name = "atxmega128b1",
         .llvm_name = "atxmega128b1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128b3 = Cpu{
         .name = "atxmega128b3",
         .llvm_name = "atxmega128b3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128c3 = Cpu{
         .name = "atxmega128c3",
         .llvm_name = "atxmega128c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128d3 = Cpu{
         .name = "atxmega128d3",
         .llvm_name = "atxmega128d3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128d4 = Cpu{
         .name = "atxmega128d4",
         .llvm_name = "atxmega128d4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16a4 = Cpu{
         .name = "atxmega16a4",
         .llvm_name = "atxmega16a4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16a4u = Cpu{
         .name = "atxmega16a4u",
         .llvm_name = "atxmega16a4u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega16c4 = Cpu{
         .name = "atxmega16c4",
         .llvm_name = "atxmega16c4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega16d4 = Cpu{
         .name = "atxmega16d4",
         .llvm_name = "atxmega16d4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16e5 = Cpu{
         .name = "atxmega16e5",
         .llvm_name = "atxmega16e5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega192a3 = Cpu{
         .name = "atxmega192a3",
         .llvm_name = "atxmega192a3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega192a3u = Cpu{
         .name = "atxmega192a3u",
         .llvm_name = "atxmega192a3u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega192c3 = Cpu{
         .name = "atxmega192c3",
         .llvm_name = "atxmega192c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega192d3 = Cpu{
         .name = "atxmega192d3",
         .llvm_name = "atxmega192d3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3 = Cpu{
         .name = "atxmega256a3",
         .llvm_name = "atxmega256a3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3b = Cpu{
         .name = "atxmega256a3b",
         .llvm_name = "atxmega256a3b",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3bu = Cpu{
         .name = "atxmega256a3bu",
         .llvm_name = "atxmega256a3bu",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256a3u = Cpu{
         .name = "atxmega256a3u",
         .llvm_name = "atxmega256a3u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256c3 = Cpu{
         .name = "atxmega256c3",
         .llvm_name = "atxmega256c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256d3 = Cpu{
         .name = "atxmega256d3",
         .llvm_name = "atxmega256d3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32a4 = Cpu{
         .name = "atxmega32a4",
         .llvm_name = "atxmega32a4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32a4u = Cpu{
         .name = "atxmega32a4u",
         .llvm_name = "atxmega32a4u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega32c4 = Cpu{
         .name = "atxmega32c4",
         .llvm_name = "atxmega32c4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega32d4 = Cpu{
         .name = "atxmega32d4",
         .llvm_name = "atxmega32d4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32e5 = Cpu{
         .name = "atxmega32e5",
         .llvm_name = "atxmega32e5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32x1 = Cpu{
         .name = "atxmega32x1",
         .llvm_name = "atxmega32x1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega384c3 = Cpu{
         .name = "atxmega384c3",
         .llvm_name = "atxmega384c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega384d3 = Cpu{
         .name = "atxmega384d3",
         .llvm_name = "atxmega384d3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a1 = Cpu{
         .name = "atxmega64a1",
         .llvm_name = "atxmega64a1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a1u = Cpu{
         .name = "atxmega64a1u",
         .llvm_name = "atxmega64a1u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64a3 = Cpu{
         .name = "atxmega64a3",
         .llvm_name = "atxmega64a3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a3u = Cpu{
         .name = "atxmega64a3u",
         .llvm_name = "atxmega64a3u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64a4u = Cpu{
         .name = "atxmega64a4u",
         .llvm_name = "atxmega64a4u",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64b1 = Cpu{
         .name = "atxmega64b1",
         .llvm_name = "atxmega64b1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64b3 = Cpu{
         .name = "atxmega64b3",
         .llvm_name = "atxmega64b3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64c3 = Cpu{
         .name = "atxmega64c3",
         .llvm_name = "atxmega64c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64d3 = Cpu{
         .name = "atxmega64d3",
         .llvm_name = "atxmega64d3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64d4 = Cpu{
         .name = "atxmega64d4",
         .llvm_name = "atxmega64d4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega8e5 = Cpu{
         .name = "atxmega8e5",
         .llvm_name = "atxmega8e5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avr1 = Cpu{
         .name = "avr1",
         .llvm_name = "avr1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr1,
         }),
     };
     pub const avr2 = Cpu{
         .name = "avr2",
         .llvm_name = "avr2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr2,
         }),
     };
     pub const avr25 = Cpu{
         .name = "avr25",
         .llvm_name = "avr25",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr25,
         }),
     };
     pub const avr3 = Cpu{
         .name = "avr3",
         .llvm_name = "avr3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr3,
         }),
     };
     pub const avr31 = Cpu{
         .name = "avr31",
         .llvm_name = "avr31",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr31,
         }),
     };
     pub const avr35 = Cpu{
         .name = "avr35",
         .llvm_name = "avr35",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr35,
         }),
     };
     pub const avr4 = Cpu{
         .name = "avr4",
         .llvm_name = "avr4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr4,
         }),
     };
     pub const avr5 = Cpu{
         .name = "avr5",
         .llvm_name = "avr5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
     pub const avr51 = Cpu{
         .name = "avr51",
         .llvm_name = "avr51",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr51,
         }),
     };
     pub const avr6 = Cpu{
         .name = "avr6",
         .llvm_name = "avr6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr6,
         }),
     };
     pub const avrtiny = Cpu{
         .name = "avrtiny",
         .llvm_name = "avrtiny",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avrtiny,
         }),
     };
     pub const avrxmega1 = Cpu{
         .name = "avrxmega1",
         .llvm_name = "avrxmega1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega2 = Cpu{
         .name = "avrxmega2",
         .llvm_name = "avrxmega2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega3 = Cpu{
         .name = "avrxmega3",
         .llvm_name = "avrxmega3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega4 = Cpu{
         .name = "avrxmega4",
         .llvm_name = "avrxmega4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega5 = Cpu{
         .name = "avrxmega5",
         .llvm_name = "avrxmega5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega6 = Cpu{
         .name = "avrxmega6",
         .llvm_name = "avrxmega6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega7 = Cpu{
         .name = "avrxmega7",
         .llvm_name = "avrxmega7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .xmega,
         }),
     };
     pub const m3000 = Cpu{
         .name = "m3000",
         .llvm_name = "m3000",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .avr5,
         }),
     };
@@ -2440,6 +2380,6 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.m3000,
 };
 
-pub const baseline_features = featureSet(&[_]Feature{
+pub const baseline_features = featureSet(&all_features, &[_]Feature{
     .avr0,
 });
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 73ed463bc5d82ffd656f318e33258ab87a8513b2..350d434a6c5da066057dc8984dec96927531adea 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -11,29 +11,29 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.alu32)] = .{
-        .index = @enumToInt(Feature.alu32),
-        .name = @tagName(Feature.alu32),
         .llvm_name = "alu32",
         .description = "Enable ALU32 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dummy)] = .{
-        .index = @enumToInt(Feature.dummy),
-        .name = @tagName(Feature.dummy),
         .llvm_name = "dummy",
         .description = "unused feature",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dwarfris)] = .{
-        .index = @enumToInt(Feature.dwarfris),
-        .name = @tagName(Feature.dwarfris),
         .llvm_name = "dwarfris",
         .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -41,27 +41,27 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const probe = Cpu{
         .name = "probe",
         .llvm_name = "probe",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const v1 = Cpu{
         .name = "v1",
         .llvm_name = "v1",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const v2 = Cpu{
         .name = "v2",
         .llvm_name = "v2",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const v3 = Cpu{
         .name = "v3",
         .llvm_name = "v3",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index bea73eb7941010e1ad34836ab70a6e2c713dd673..cdb44ec889800119207477350a28b4c2d4940926 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -32,76 +32,60 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.duplex)] = .{
-        .index = @enumToInt(Feature.duplex),
-        .name = @tagName(Feature.duplex),
         .llvm_name = "duplex",
         .description = "Enable generation of duplex instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx)] = .{
-        .index = @enumToInt(Feature.hvx),
-        .name = @tagName(Feature.hvx),
         .llvm_name = "hvx",
         .description = "Hexagon HVX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx_length128b)] = .{
-        .index = @enumToInt(Feature.hvx_length128b),
-        .name = @tagName(Feature.hvx_length128b),
         .llvm_name = "hvx-length128b",
         .description = "Hexagon HVX 128B instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvx_length64b)] = .{
-        .index = @enumToInt(Feature.hvx_length64b),
-        .name = @tagName(Feature.hvx_length64b),
         .llvm_name = "hvx-length64b",
         .description = "Hexagon HVX 64B instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvxv60)] = .{
-        .index = @enumToInt(Feature.hvxv60),
-        .name = @tagName(Feature.hvxv60),
         .llvm_name = "hvxv60",
         .description = "Hexagon HVX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvxv62)] = .{
-        .index = @enumToInt(Feature.hvxv62),
-        .name = @tagName(Feature.hvxv62),
         .llvm_name = "hvxv62",
         .description = "Hexagon HVX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
             .hvxv60,
         }),
     };
     result[@enumToInt(Feature.hvxv65)] = .{
-        .index = @enumToInt(Feature.hvxv65),
-        .name = @tagName(Feature.hvxv65),
         .llvm_name = "hvxv65",
         .description = "Hexagon HVX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
             .hvxv60,
             .hvxv62,
         }),
     };
     result[@enumToInt(Feature.hvxv66)] = .{
-        .index = @enumToInt(Feature.hvxv66),
-        .name = @tagName(Feature.hvxv66),
         .llvm_name = "hvxv66",
         .description = "Hexagon HVX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hvx,
             .hvxv60,
             .hvxv62,
@@ -110,121 +94,95 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.long_calls)] = .{
-        .index = @enumToInt(Feature.long_calls),
-        .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Use constant-extended calls",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mem_noshuf)] = .{
-        .index = @enumToInt(Feature.mem_noshuf),
-        .name = @tagName(Feature.mem_noshuf),
         .llvm_name = "mem_noshuf",
         .description = "Supports mem_noshuf feature",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.memops)] = .{
-        .index = @enumToInt(Feature.memops),
-        .name = @tagName(Feature.memops),
         .llvm_name = "memops",
         .description = "Use memop instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noreturn_stack_elim)] = .{
-        .index = @enumToInt(Feature.noreturn_stack_elim),
-        .name = @tagName(Feature.noreturn_stack_elim),
         .llvm_name = "noreturn-stack-elim",
         .description = "Eliminate stack allocation in a noreturn function when possible",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nvj)] = .{
-        .index = @enumToInt(Feature.nvj),
-        .name = @tagName(Feature.nvj),
         .llvm_name = "nvj",
         .description = "Support for new-value jumps",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .packets,
         }),
     };
     result[@enumToInt(Feature.nvs)] = .{
-        .index = @enumToInt(Feature.nvs),
-        .name = @tagName(Feature.nvs),
         .llvm_name = "nvs",
         .description = "Support for new-value stores",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .packets,
         }),
     };
     result[@enumToInt(Feature.packets)] = .{
-        .index = @enumToInt(Feature.packets),
-        .name = @tagName(Feature.packets),
         .llvm_name = "packets",
         .description = "Support for instruction packets",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserved_r19)] = .{
-        .index = @enumToInt(Feature.reserved_r19),
-        .name = @tagName(Feature.reserved_r19),
         .llvm_name = "reserved-r19",
         .description = "Reserve register R19",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.small_data)] = .{
-        .index = @enumToInt(Feature.small_data),
-        .name = @tagName(Feature.small_data),
         .llvm_name = "small-data",
         .description = "Allow GP-relative addressing of global variables",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5)] = .{
-        .index = @enumToInt(Feature.v5),
-        .name = @tagName(Feature.v5),
         .llvm_name = "v5",
         .description = "Enable Hexagon V5 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v55)] = .{
-        .index = @enumToInt(Feature.v55),
-        .name = @tagName(Feature.v55),
         .llvm_name = "v55",
         .description = "Enable Hexagon V55 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v60)] = .{
-        .index = @enumToInt(Feature.v60),
-        .name = @tagName(Feature.v60),
         .llvm_name = "v60",
         .description = "Enable Hexagon V60 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v62)] = .{
-        .index = @enumToInt(Feature.v62),
-        .name = @tagName(Feature.v62),
         .llvm_name = "v62",
         .description = "Enable Hexagon V62 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v65)] = .{
-        .index = @enumToInt(Feature.v65),
-        .name = @tagName(Feature.v65),
         .llvm_name = "v65",
         .description = "Enable Hexagon V65 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v66)] = .{
-        .index = @enumToInt(Feature.v66),
-        .name = @tagName(Feature.v66),
         .llvm_name = "v66",
         .description = "Enable Hexagon V66 architecture",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zreg)] = .{
-        .index = @enumToInt(Feature.zreg),
-        .name = @tagName(Feature.zreg),
         .llvm_name = "zreg",
         .description = "Hexagon ZReg extension instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -232,7 +190,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -247,7 +205,7 @@ pub const cpu = struct {
     pub const hexagonv5 = Cpu{
         .name = "hexagonv5",
         .llvm_name = "hexagonv5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -260,7 +218,7 @@ pub const cpu = struct {
     pub const hexagonv55 = Cpu{
         .name = "hexagonv55",
         .llvm_name = "hexagonv55",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -274,7 +232,7 @@ pub const cpu = struct {
     pub const hexagonv60 = Cpu{
         .name = "hexagonv60",
         .llvm_name = "hexagonv60",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -289,7 +247,7 @@ pub const cpu = struct {
     pub const hexagonv62 = Cpu{
         .name = "hexagonv62",
         .llvm_name = "hexagonv62",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -305,7 +263,7 @@ pub const cpu = struct {
     pub const hexagonv65 = Cpu{
         .name = "hexagonv65",
         .llvm_name = "hexagonv65",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .mem_noshuf,
             .memops,
@@ -323,7 +281,7 @@ pub const cpu = struct {
     pub const hexagonv66 = Cpu{
         .name = "hexagonv66",
         .llvm_name = "hexagonv66",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .duplex,
             .mem_noshuf,
             .memops,
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 19ea4d70091fa6c6f809abc362f2cf2f25a57a47..51835f29808e2bb32f4b65426bb0e33266d92ae4 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -57,135 +57,101 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.abs2008)] = .{
-        .index = @enumToInt(Feature.abs2008),
-        .name = @tagName(Feature.abs2008),
         .llvm_name = "abs2008",
         .description = "Disable IEEE 754-2008 abs.fmt mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cnmips)] = .{
-        .index = @enumToInt(Feature.cnmips),
-        .name = @tagName(Feature.cnmips),
         .llvm_name = "cnmips",
         .description = "Octeon cnMIPS Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips64r2,
         }),
     };
     result[@enumToInt(Feature.crc)] = .{
-        .index = @enumToInt(Feature.crc),
-        .name = @tagName(Feature.crc),
         .llvm_name = "crc",
         .description = "Mips R6 CRC ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dsp)] = .{
-        .index = @enumToInt(Feature.dsp),
-        .name = @tagName(Feature.dsp),
         .llvm_name = "dsp",
         .description = "Mips DSP ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dspr2)] = .{
-        .index = @enumToInt(Feature.dspr2),
-        .name = @tagName(Feature.dspr2),
         .llvm_name = "dspr2",
         .description = "Mips DSP-R2 ASE",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dsp,
         }),
     };
     result[@enumToInt(Feature.dspr3)] = .{
-        .index = @enumToInt(Feature.dspr3),
-        .name = @tagName(Feature.dspr3),
         .llvm_name = "dspr3",
         .description = "Mips DSP-R3 ASE",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .dsp,
             .dspr2,
         }),
     };
     result[@enumToInt(Feature.eva)] = .{
-        .index = @enumToInt(Feature.eva),
-        .name = @tagName(Feature.eva),
         .llvm_name = "eva",
         .description = "Mips EVA ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
-        .index = @enumToInt(Feature.fp64),
-        .name = @tagName(Feature.fp64),
         .llvm_name = "fp64",
         .description = "Support 64-bit FP registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpxx)] = .{
-        .index = @enumToInt(Feature.fpxx),
-        .name = @tagName(Feature.fpxx),
         .llvm_name = "fpxx",
         .description = "Support for FPXX",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ginv)] = .{
-        .index = @enumToInt(Feature.ginv),
-        .name = @tagName(Feature.ginv),
         .llvm_name = "ginv",
         .description = "Mips Global Invalidate ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gp64)] = .{
-        .index = @enumToInt(Feature.gp64),
-        .name = @tagName(Feature.gp64),
         .llvm_name = "gp64",
         .description = "General Purpose Registers are 64-bit wide",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
-        .index = @enumToInt(Feature.long_calls),
-        .name = @tagName(Feature.long_calls),
         .llvm_name = "long-calls",
         .description = "Disable use of the jal instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.micromips)] = .{
-        .index = @enumToInt(Feature.micromips),
-        .name = @tagName(Feature.micromips),
         .llvm_name = "micromips",
         .description = "microMips mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips1)] = .{
-        .index = @enumToInt(Feature.mips1),
-        .name = @tagName(Feature.mips1),
         .llvm_name = "mips1",
         .description = "Mips I ISA Support [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips16)] = .{
-        .index = @enumToInt(Feature.mips16),
-        .name = @tagName(Feature.mips16),
         .llvm_name = "mips16",
         .description = "Mips16 mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips2)] = .{
-        .index = @enumToInt(Feature.mips2),
-        .name = @tagName(Feature.mips2),
         .llvm_name = "mips2",
         .description = "Mips II ISA Support [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips1,
         }),
     };
     result[@enumToInt(Feature.mips3)] = .{
-        .index = @enumToInt(Feature.mips3),
-        .name = @tagName(Feature.mips3),
         .llvm_name = "mips3",
         .description = "MIPS III ISA Support [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fp64,
             .gp64,
             .mips2,
@@ -194,22 +160,18 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.mips32)] = .{
-        .index = @enumToInt(Feature.mips32),
-        .name = @tagName(Feature.mips32),
         .llvm_name = "mips32",
         .description = "Mips32 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips2,
             .mips3_32,
             .mips4_32,
         }),
     };
     result[@enumToInt(Feature.mips32r2)] = .{
-        .index = @enumToInt(Feature.mips32r2),
-        .name = @tagName(Feature.mips32r2),
         .llvm_name = "mips32r2",
         .description = "Mips32r2 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32,
             .mips3_32r2,
             .mips4_32r2,
@@ -217,29 +179,23 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.mips32r3)] = .{
-        .index = @enumToInt(Feature.mips32r3),
-        .name = @tagName(Feature.mips32r3),
         .llvm_name = "mips32r3",
         .description = "Mips32r3 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r2,
         }),
     };
     result[@enumToInt(Feature.mips32r5)] = .{
-        .index = @enumToInt(Feature.mips32r5),
-        .name = @tagName(Feature.mips32r5),
         .llvm_name = "mips32r5",
         .description = "Mips32r5 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r3,
         }),
     };
     result[@enumToInt(Feature.mips32r6)] = .{
-        .index = @enumToInt(Feature.mips32r6),
-        .name = @tagName(Feature.mips32r6),
         .llvm_name = "mips32r6",
         .description = "Mips32r6 ISA Support [experimental]",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .abs2008,
             .fp64,
             .mips32r5,
@@ -247,107 +203,83 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.mips3_32)] = .{
-        .index = @enumToInt(Feature.mips3_32),
-        .name = @tagName(Feature.mips3_32),
         .llvm_name = "mips3_32",
         .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips3_32r2)] = .{
-        .index = @enumToInt(Feature.mips3_32r2),
-        .name = @tagName(Feature.mips3_32r2),
         .llvm_name = "mips3_32r2",
         .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4)] = .{
-        .index = @enumToInt(Feature.mips4),
-        .name = @tagName(Feature.mips4),
         .llvm_name = "mips4",
         .description = "MIPS IV ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips3,
             .mips4_32,
             .mips4_32r2,
         }),
     };
     result[@enumToInt(Feature.mips4_32)] = .{
-        .index = @enumToInt(Feature.mips4_32),
-        .name = @tagName(Feature.mips4_32),
         .llvm_name = "mips4_32",
         .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4_32r2)] = .{
-        .index = @enumToInt(Feature.mips4_32r2),
-        .name = @tagName(Feature.mips4_32r2),
         .llvm_name = "mips4_32r2",
         .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips5)] = .{
-        .index = @enumToInt(Feature.mips5),
-        .name = @tagName(Feature.mips5),
         .llvm_name = "mips5",
         .description = "MIPS V ISA Support [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips4,
             .mips5_32r2,
         }),
     };
     result[@enumToInt(Feature.mips5_32r2)] = .{
-        .index = @enumToInt(Feature.mips5_32r2),
-        .name = @tagName(Feature.mips5_32r2),
         .llvm_name = "mips5_32r2",
         .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips64)] = .{
-        .index = @enumToInt(Feature.mips64),
-        .name = @tagName(Feature.mips64),
         .llvm_name = "mips64",
         .description = "Mips64 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32,
             .mips5,
         }),
     };
     result[@enumToInt(Feature.mips64r2)] = .{
-        .index = @enumToInt(Feature.mips64r2),
-        .name = @tagName(Feature.mips64r2),
         .llvm_name = "mips64r2",
         .description = "Mips64r2 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r2,
             .mips64,
         }),
     };
     result[@enumToInt(Feature.mips64r3)] = .{
-        .index = @enumToInt(Feature.mips64r3),
-        .name = @tagName(Feature.mips64r3),
         .llvm_name = "mips64r3",
         .description = "Mips64r3 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r3,
             .mips64r2,
         }),
     };
     result[@enumToInt(Feature.mips64r5)] = .{
-        .index = @enumToInt(Feature.mips64r5),
-        .name = @tagName(Feature.mips64r5),
         .llvm_name = "mips64r5",
         .description = "Mips64r5 ISA Support",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r5,
             .mips64r3,
         }),
     };
     result[@enumToInt(Feature.mips64r6)] = .{
-        .index = @enumToInt(Feature.mips64r6),
-        .name = @tagName(Feature.mips64r6),
         .llvm_name = "mips64r6",
         .description = "Mips64r6 ISA Support [experimental]",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .abs2008,
             .mips32r6,
             .mips64r5,
@@ -355,112 +287,88 @@ pub const all_features = blk: {
         }),
     };
     result[@enumToInt(Feature.msa)] = .{
-        .index = @enumToInt(Feature.msa),
-        .name = @tagName(Feature.msa),
         .llvm_name = "msa",
         .description = "Mips MSA ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mt)] = .{
-        .index = @enumToInt(Feature.mt),
-        .name = @tagName(Feature.mt),
         .llvm_name = "mt",
         .description = "Mips MT ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nan2008)] = .{
-        .index = @enumToInt(Feature.nan2008),
-        .name = @tagName(Feature.nan2008),
         .llvm_name = "nan2008",
         .description = "IEEE 754-2008 NaN encoding",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noabicalls)] = .{
-        .index = @enumToInt(Feature.noabicalls),
-        .name = @tagName(Feature.noabicalls),
         .llvm_name = "noabicalls",
         .description = "Disable SVR4-style position-independent code",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nomadd4)] = .{
-        .index = @enumToInt(Feature.nomadd4),
-        .name = @tagName(Feature.nomadd4),
         .llvm_name = "nomadd4",
         .description = "Disable 4-operand madd.fmt and related instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nooddspreg)] = .{
-        .index = @enumToInt(Feature.nooddspreg),
-        .name = @tagName(Feature.nooddspreg),
         .llvm_name = "nooddspreg",
         .description = "Disable odd numbered single-precision registers",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.p5600)] = .{
-        .index = @enumToInt(Feature.p5600),
-        .name = @tagName(Feature.p5600),
         .llvm_name = "p5600",
         .description = "The P5600 Processor",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mips32r5,
         }),
     };
     result[@enumToInt(Feature.ptr64)] = .{
-        .index = @enumToInt(Feature.ptr64),
-        .name = @tagName(Feature.ptr64),
         .llvm_name = "ptr64",
         .description = "Pointers are 64-bit wide",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.single_float)] = .{
-        .index = @enumToInt(Feature.single_float),
-        .name = @tagName(Feature.single_float),
         .llvm_name = "single-float",
         .description = "Only supports single precision float",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
-        .index = @enumToInt(Feature.soft_float),
-        .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Does not support floating point instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sym32)] = .{
-        .index = @enumToInt(Feature.sym32),
-        .name = @tagName(Feature.sym32),
         .llvm_name = "sym32",
         .description = "Symbols are 32 bit on Mips64",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
-        .index = @enumToInt(Feature.use_indirect_jump_hazard),
-        .name = @tagName(Feature.use_indirect_jump_hazard),
         .llvm_name = "use-indirect-jump-hazard",
         .description = "Use indirect jump guards to prevent certain speculation based attacks",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_tcc_in_div)] = .{
-        .index = @enumToInt(Feature.use_tcc_in_div),
-        .name = @tagName(Feature.use_tcc_in_div),
         .llvm_name = "use-tcc-in-div",
         .description = "Force the assembler to use trapping",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vfpu)] = .{
-        .index = @enumToInt(Feature.vfpu),
-        .name = @tagName(Feature.vfpu),
         .llvm_name = "vfpu",
         .description = "Enable vector FPU instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.virt)] = .{
-        .index = @enumToInt(Feature.virt),
-        .name = @tagName(Feature.virt),
         .llvm_name = "virt",
         .description = "Mips Virtualization ASE",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -468,112 +376,112 @@ pub const cpu = struct {
     pub const mips1 = Cpu{
         .name = "mips1",
         .llvm_name = "mips1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips1,
         }),
     };
     pub const mips2 = Cpu{
         .name = "mips2",
         .llvm_name = "mips2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips2,
         }),
     };
     pub const mips3 = Cpu{
         .name = "mips3",
         .llvm_name = "mips3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips3,
         }),
     };
     pub const mips32 = Cpu{
         .name = "mips32",
         .llvm_name = "mips32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips32,
         }),
     };
     pub const mips32r2 = Cpu{
         .name = "mips32r2",
         .llvm_name = "mips32r2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips32r2,
         }),
     };
     pub const mips32r3 = Cpu{
         .name = "mips32r3",
         .llvm_name = "mips32r3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips32r3,
         }),
     };
     pub const mips32r5 = Cpu{
         .name = "mips32r5",
         .llvm_name = "mips32r5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips32r5,
         }),
     };
     pub const mips32r6 = Cpu{
         .name = "mips32r6",
         .llvm_name = "mips32r6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips32r6,
         }),
     };
     pub const mips4 = Cpu{
         .name = "mips4",
         .llvm_name = "mips4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips4,
         }),
     };
     pub const mips5 = Cpu{
         .name = "mips5",
         .llvm_name = "mips5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips5,
         }),
     };
     pub const mips64 = Cpu{
         .name = "mips64",
         .llvm_name = "mips64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips64,
         }),
     };
     pub const mips64r2 = Cpu{
         .name = "mips64r2",
         .llvm_name = "mips64r2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips64r2,
         }),
     };
     pub const mips64r3 = Cpu{
         .name = "mips64r3",
         .llvm_name = "mips64r3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips64r3,
         }),
     };
     pub const mips64r5 = Cpu{
         .name = "mips64r5",
         .llvm_name = "mips64r5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips64r5,
         }),
     };
     pub const mips64r6 = Cpu{
         .name = "mips64r6",
         .llvm_name = "mips64r6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mips64r6,
         }),
     };
     pub const octeon = Cpu{
         .name = "octeon",
         .llvm_name = "octeon",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cnmips,
             .mips64r2,
         }),
@@ -581,7 +489,7 @@ pub const cpu = struct {
     pub const p5600 = Cpu{
         .name = "p5600",
         .llvm_name = "p5600",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .p5600,
         }),
     };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index 9bc184d4da59c7237f624e8afc0a4b9edab87b3d..ecbc362b1afd4f9142ae19f37faa89cb2fd5998d 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -12,36 +12,34 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.ext)] = .{
-        .index = @enumToInt(Feature.ext),
-        .name = @tagName(Feature.ext),
         .llvm_name = "ext",
         .description = "Enable MSP430-X extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult16)] = .{
-        .index = @enumToInt(Feature.hwmult16),
-        .name = @tagName(Feature.hwmult16),
         .llvm_name = "hwmult16",
         .description = "Enable 16-bit hardware multiplier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult32)] = .{
-        .index = @enumToInt(Feature.hwmult32),
-        .name = @tagName(Feature.hwmult32),
         .llvm_name = "hwmult32",
         .description = "Enable 32-bit hardware multiplier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmultf5)] = .{
-        .index = @enumToInt(Feature.hwmultf5),
-        .name = @tagName(Feature.hwmultf5),
         .llvm_name = "hwmultf5",
         .description = "Enable F5 series hardware multiplier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -49,17 +47,17 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const msp430 = Cpu{
         .name = "msp430",
         .llvm_name = "msp430",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const msp430x = Cpu{
         .name = "msp430x",
         .llvm_name = "msp430x",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ext,
         }),
     };
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index 3cc4f18a14ec823db6beda228ae04ac97c649d7c..58babffd86d7ae6eb8240837ee5f500c99ebae94 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -33,183 +33,139 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.ptx32)] = .{
-        .index = @enumToInt(Feature.ptx32),
-        .name = @tagName(Feature.ptx32),
         .llvm_name = "ptx32",
         .description = "Use PTX version 3.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx40)] = .{
-        .index = @enumToInt(Feature.ptx40),
-        .name = @tagName(Feature.ptx40),
         .llvm_name = "ptx40",
         .description = "Use PTX version 4.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx41)] = .{
-        .index = @enumToInt(Feature.ptx41),
-        .name = @tagName(Feature.ptx41),
         .llvm_name = "ptx41",
         .description = "Use PTX version 4.1",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx42)] = .{
-        .index = @enumToInt(Feature.ptx42),
-        .name = @tagName(Feature.ptx42),
         .llvm_name = "ptx42",
         .description = "Use PTX version 4.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx43)] = .{
-        .index = @enumToInt(Feature.ptx43),
-        .name = @tagName(Feature.ptx43),
         .llvm_name = "ptx43",
         .description = "Use PTX version 4.3",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx50)] = .{
-        .index = @enumToInt(Feature.ptx50),
-        .name = @tagName(Feature.ptx50),
         .llvm_name = "ptx50",
         .description = "Use PTX version 5.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx60)] = .{
-        .index = @enumToInt(Feature.ptx60),
-        .name = @tagName(Feature.ptx60),
         .llvm_name = "ptx60",
         .description = "Use PTX version 6.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx61)] = .{
-        .index = @enumToInt(Feature.ptx61),
-        .name = @tagName(Feature.ptx61),
         .llvm_name = "ptx61",
         .description = "Use PTX version 6.1",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx63)] = .{
-        .index = @enumToInt(Feature.ptx63),
-        .name = @tagName(Feature.ptx63),
         .llvm_name = "ptx63",
         .description = "Use PTX version 6.3",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx64)] = .{
-        .index = @enumToInt(Feature.ptx64),
-        .name = @tagName(Feature.ptx64),
         .llvm_name = "ptx64",
         .description = "Use PTX version 6.4",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_20)] = .{
-        .index = @enumToInt(Feature.sm_20),
-        .name = @tagName(Feature.sm_20),
         .llvm_name = "sm_20",
         .description = "Target SM 2.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_21)] = .{
-        .index = @enumToInt(Feature.sm_21),
-        .name = @tagName(Feature.sm_21),
         .llvm_name = "sm_21",
         .description = "Target SM 2.1",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_30)] = .{
-        .index = @enumToInt(Feature.sm_30),
-        .name = @tagName(Feature.sm_30),
         .llvm_name = "sm_30",
         .description = "Target SM 3.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_32)] = .{
-        .index = @enumToInt(Feature.sm_32),
-        .name = @tagName(Feature.sm_32),
         .llvm_name = "sm_32",
         .description = "Target SM 3.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_35)] = .{
-        .index = @enumToInt(Feature.sm_35),
-        .name = @tagName(Feature.sm_35),
         .llvm_name = "sm_35",
         .description = "Target SM 3.5",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_37)] = .{
-        .index = @enumToInt(Feature.sm_37),
-        .name = @tagName(Feature.sm_37),
         .llvm_name = "sm_37",
         .description = "Target SM 3.7",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_50)] = .{
-        .index = @enumToInt(Feature.sm_50),
-        .name = @tagName(Feature.sm_50),
         .llvm_name = "sm_50",
         .description = "Target SM 5.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_52)] = .{
-        .index = @enumToInt(Feature.sm_52),
-        .name = @tagName(Feature.sm_52),
         .llvm_name = "sm_52",
         .description = "Target SM 5.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_53)] = .{
-        .index = @enumToInt(Feature.sm_53),
-        .name = @tagName(Feature.sm_53),
         .llvm_name = "sm_53",
         .description = "Target SM 5.3",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_60)] = .{
-        .index = @enumToInt(Feature.sm_60),
-        .name = @tagName(Feature.sm_60),
         .llvm_name = "sm_60",
         .description = "Target SM 6.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_61)] = .{
-        .index = @enumToInt(Feature.sm_61),
-        .name = @tagName(Feature.sm_61),
         .llvm_name = "sm_61",
         .description = "Target SM 6.1",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_62)] = .{
-        .index = @enumToInt(Feature.sm_62),
-        .name = @tagName(Feature.sm_62),
         .llvm_name = "sm_62",
         .description = "Target SM 6.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_70)] = .{
-        .index = @enumToInt(Feature.sm_70),
-        .name = @tagName(Feature.sm_70),
         .llvm_name = "sm_70",
         .description = "Target SM 7.0",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_72)] = .{
-        .index = @enumToInt(Feature.sm_72),
-        .name = @tagName(Feature.sm_72),
         .llvm_name = "sm_72",
         .description = "Target SM 7.2",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_75)] = .{
-        .index = @enumToInt(Feature.sm_75),
-        .name = @tagName(Feature.sm_75),
         .llvm_name = "sm_75",
         .description = "Target SM 7.5",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -217,28 +173,28 @@ pub const cpu = struct {
     pub const sm_20 = Cpu{
         .name = "sm_20",
         .llvm_name = "sm_20",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .sm_20,
         }),
     };
     pub const sm_21 = Cpu{
         .name = "sm_21",
         .llvm_name = "sm_21",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .sm_21,
         }),
     };
     pub const sm_30 = Cpu{
         .name = "sm_30",
         .llvm_name = "sm_30",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .sm_30,
         }),
     };
     pub const sm_32 = Cpu{
         .name = "sm_32",
         .llvm_name = "sm_32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx40,
             .sm_32,
         }),
@@ -246,14 +202,14 @@ pub const cpu = struct {
     pub const sm_35 = Cpu{
         .name = "sm_35",
         .llvm_name = "sm_35",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .sm_35,
         }),
     };
     pub const sm_37 = Cpu{
         .name = "sm_37",
         .llvm_name = "sm_37",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx41,
             .sm_37,
         }),
@@ -261,7 +217,7 @@ pub const cpu = struct {
     pub const sm_50 = Cpu{
         .name = "sm_50",
         .llvm_name = "sm_50",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx40,
             .sm_50,
         }),
@@ -269,7 +225,7 @@ pub const cpu = struct {
     pub const sm_52 = Cpu{
         .name = "sm_52",
         .llvm_name = "sm_52",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx41,
             .sm_52,
         }),
@@ -277,7 +233,7 @@ pub const cpu = struct {
     pub const sm_53 = Cpu{
         .name = "sm_53",
         .llvm_name = "sm_53",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx42,
             .sm_53,
         }),
@@ -285,7 +241,7 @@ pub const cpu = struct {
     pub const sm_60 = Cpu{
         .name = "sm_60",
         .llvm_name = "sm_60",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx50,
             .sm_60,
         }),
@@ -293,7 +249,7 @@ pub const cpu = struct {
     pub const sm_61 = Cpu{
         .name = "sm_61",
         .llvm_name = "sm_61",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx50,
             .sm_61,
         }),
@@ -301,7 +257,7 @@ pub const cpu = struct {
     pub const sm_62 = Cpu{
         .name = "sm_62",
         .llvm_name = "sm_62",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx50,
             .sm_62,
         }),
@@ -309,7 +265,7 @@ pub const cpu = struct {
     pub const sm_70 = Cpu{
         .name = "sm_70",
         .llvm_name = "sm_70",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx60,
             .sm_70,
         }),
@@ -317,7 +273,7 @@ pub const cpu = struct {
     pub const sm_72 = Cpu{
         .name = "sm_72",
         .llvm_name = "sm_72",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx61,
             .sm_72,
         }),
@@ -325,7 +281,7 @@ pub const cpu = struct {
     pub const sm_75 = Cpu{
         .name = "sm_75",
         .llvm_name = "sm_75",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .ptx63,
             .sm_75,
         }),
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 3dfc2d7beabab54681eba11d24e09434d655ce45..981c595c93eedba66c7804523a961d1d397e348e 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -59,417 +59,321 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"64bit")] = .{
-        .index = @enumToInt(Feature.@"64bit"),
-        .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Enable 64-bit instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"64bitregs")] = .{
-        .index = @enumToInt(Feature.@"64bitregs"),
-        .name = @tagName(Feature.@"64bitregs"),
         .llvm_name = "64bitregs",
         .description = "Enable 64-bit registers usage for ppc32 [beta]",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altivec)] = .{
-        .index = @enumToInt(Feature.altivec),
-        .name = @tagName(Feature.altivec),
         .llvm_name = "altivec",
         .description = "Enable Altivec instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.booke)] = .{
-        .index = @enumToInt(Feature.booke),
-        .name = @tagName(Feature.booke),
         .llvm_name = "booke",
         .description = "Enable Book E instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .icbt,
         }),
     };
     result[@enumToInt(Feature.bpermd)] = .{
-        .index = @enumToInt(Feature.bpermd),
-        .name = @tagName(Feature.bpermd),
         .llvm_name = "bpermd",
         .description = "Enable the bpermd instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmpb)] = .{
-        .index = @enumToInt(Feature.cmpb),
-        .name = @tagName(Feature.cmpb),
         .llvm_name = "cmpb",
         .description = "Enable the cmpb instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crbits)] = .{
-        .index = @enumToInt(Feature.crbits),
-        .name = @tagName(Feature.crbits),
         .llvm_name = "crbits",
         .description = "Use condition-register bits individually",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
-        .index = @enumToInt(Feature.crypto),
-        .name = @tagName(Feature.crypto),
         .llvm_name = "crypto",
         .description = "Enable POWER8 Crypto instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .power8_altivec,
         }),
     };
     result[@enumToInt(Feature.direct_move)] = .{
-        .index = @enumToInt(Feature.direct_move),
-        .name = @tagName(Feature.direct_move),
         .llvm_name = "direct-move",
         .description = "Enable Power8 direct move instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vsx,
         }),
     };
     result[@enumToInt(Feature.e500)] = .{
-        .index = @enumToInt(Feature.e500),
-        .name = @tagName(Feature.e500),
         .llvm_name = "e500",
         .description = "Enable E500/E500mc instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.extdiv)] = .{
-        .index = @enumToInt(Feature.extdiv),
-        .name = @tagName(Feature.extdiv),
         .llvm_name = "extdiv",
         .description = "Enable extended divide instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fcpsgn)] = .{
-        .index = @enumToInt(Feature.fcpsgn),
-        .name = @tagName(Feature.fcpsgn),
         .llvm_name = "fcpsgn",
         .description = "Enable the fcpsgn instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.float128)] = .{
-        .index = @enumToInt(Feature.float128),
-        .name = @tagName(Feature.float128),
         .llvm_name = "float128",
         .description = "Enable the __float128 data type for IEEE-754R Binary128.",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .vsx,
         }),
     };
     result[@enumToInt(Feature.fpcvt)] = .{
-        .index = @enumToInt(Feature.fpcvt),
-        .name = @tagName(Feature.fpcvt),
         .llvm_name = "fpcvt",
         .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fprnd)] = .{
-        .index = @enumToInt(Feature.fprnd),
-        .name = @tagName(Feature.fprnd),
         .llvm_name = "fprnd",
         .description = "Enable the fri[mnpz] instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fpu)] = .{
-        .index = @enumToInt(Feature.fpu),
-        .name = @tagName(Feature.fpu),
         .llvm_name = "fpu",
         .description = "Enable classic FPU instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hard_float,
         }),
     };
     result[@enumToInt(Feature.fre)] = .{
-        .index = @enumToInt(Feature.fre),
-        .name = @tagName(Feature.fre),
         .llvm_name = "fre",
         .description = "Enable the fre instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fres)] = .{
-        .index = @enumToInt(Feature.fres),
-        .name = @tagName(Feature.fres),
         .llvm_name = "fres",
         .description = "Enable the fres instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.frsqrte)] = .{
-        .index = @enumToInt(Feature.frsqrte),
-        .name = @tagName(Feature.frsqrte),
         .llvm_name = "frsqrte",
         .description = "Enable the frsqrte instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.frsqrtes)] = .{
-        .index = @enumToInt(Feature.frsqrtes),
-        .name = @tagName(Feature.frsqrtes),
         .llvm_name = "frsqrtes",
         .description = "Enable the frsqrtes instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fsqrt)] = .{
-        .index = @enumToInt(Feature.fsqrt),
-        .name = @tagName(Feature.fsqrt),
         .llvm_name = "fsqrt",
         .description = "Enable the fsqrt instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.hard_float)] = .{
-        .index = @enumToInt(Feature.hard_float),
-        .name = @tagName(Feature.hard_float),
         .llvm_name = "hard-float",
         .description = "Enable floating-point instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.htm)] = .{
-        .index = @enumToInt(Feature.htm),
-        .name = @tagName(Feature.htm),
         .llvm_name = "htm",
         .description = "Enable Hardware Transactional Memory instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.icbt)] = .{
-        .index = @enumToInt(Feature.icbt),
-        .name = @tagName(Feature.icbt),
         .llvm_name = "icbt",
         .description = "Enable icbt instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invariant_function_descriptors)] = .{
-        .index = @enumToInt(Feature.invariant_function_descriptors),
-        .name = @tagName(Feature.invariant_function_descriptors),
         .llvm_name = "invariant-function-descriptors",
         .description = "Assume function descriptors are invariant",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isa_v30_instructions)] = .{
-        .index = @enumToInt(Feature.isa_v30_instructions),
-        .name = @tagName(Feature.isa_v30_instructions),
         .llvm_name = "isa-v30-instructions",
         .description = "Enable instructions added in ISA 3.0.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isel)] = .{
-        .index = @enumToInt(Feature.isel),
-        .name = @tagName(Feature.isel),
         .llvm_name = "isel",
         .description = "Enable the isel instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldbrx)] = .{
-        .index = @enumToInt(Feature.ldbrx),
-        .name = @tagName(Feature.ldbrx),
         .llvm_name = "ldbrx",
         .description = "Enable the ldbrx instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lfiwax)] = .{
-        .index = @enumToInt(Feature.lfiwax),
-        .name = @tagName(Feature.lfiwax),
         .llvm_name = "lfiwax",
         .description = "Enable the lfiwax instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.longcall)] = .{
-        .index = @enumToInt(Feature.longcall),
-        .name = @tagName(Feature.longcall),
         .llvm_name = "longcall",
         .description = "Always use indirect calls",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mfocrf)] = .{
-        .index = @enumToInt(Feature.mfocrf),
-        .name = @tagName(Feature.mfocrf),
         .llvm_name = "mfocrf",
         .description = "Enable the MFOCRF instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.msync)] = .{
-        .index = @enumToInt(Feature.msync),
-        .name = @tagName(Feature.msync),
         .llvm_name = "msync",
         .description = "Has only the msync instruction instead of sync",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .booke,
         }),
     };
     result[@enumToInt(Feature.partword_atomics)] = .{
-        .index = @enumToInt(Feature.partword_atomics),
-        .name = @tagName(Feature.partword_atomics),
         .llvm_name = "partword-atomics",
         .description = "Enable l[bh]arx and st[bh]cx.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcntd)] = .{
-        .index = @enumToInt(Feature.popcntd),
-        .name = @tagName(Feature.popcntd),
         .llvm_name = "popcntd",
         .description = "Enable the popcnt[dw] instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.power8_altivec)] = .{
-        .index = @enumToInt(Feature.power8_altivec),
-        .name = @tagName(Feature.power8_altivec),
         .llvm_name = "power8-altivec",
         .description = "Enable POWER8 Altivec instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .altivec,
         }),
     };
     result[@enumToInt(Feature.power8_vector)] = .{
-        .index = @enumToInt(Feature.power8_vector),
-        .name = @tagName(Feature.power8_vector),
         .llvm_name = "power8-vector",
         .description = "Enable POWER8 vector instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .power8_altivec,
             .vsx,
         }),
     };
     result[@enumToInt(Feature.power9_altivec)] = .{
-        .index = @enumToInt(Feature.power9_altivec),
-        .name = @tagName(Feature.power9_altivec),
         .llvm_name = "power9-altivec",
         .description = "Enable POWER9 Altivec instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .isa_v30_instructions,
             .power8_altivec,
         }),
     };
     result[@enumToInt(Feature.power9_vector)] = .{
-        .index = @enumToInt(Feature.power9_vector),
-        .name = @tagName(Feature.power9_vector),
         .llvm_name = "power9-vector",
         .description = "Enable POWER9 vector instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .isa_v30_instructions,
             .power8_vector,
             .power9_altivec,
         }),
     };
     result[@enumToInt(Feature.ppc_postra_sched)] = .{
-        .index = @enumToInt(Feature.ppc_postra_sched),
-        .name = @tagName(Feature.ppc_postra_sched),
         .llvm_name = "ppc-postra-sched",
         .description = "Use PowerPC post-RA scheduling strategy",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc_prera_sched)] = .{
-        .index = @enumToInt(Feature.ppc_prera_sched),
-        .name = @tagName(Feature.ppc_prera_sched),
         .llvm_name = "ppc-prera-sched",
         .description = "Use PowerPC pre-RA scheduling strategy",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc4xx)] = .{
-        .index = @enumToInt(Feature.ppc4xx),
-        .name = @tagName(Feature.ppc4xx),
         .llvm_name = "ppc4xx",
         .description = "Enable PPC 4xx instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc6xx)] = .{
-        .index = @enumToInt(Feature.ppc6xx),
-        .name = @tagName(Feature.ppc6xx),
         .llvm_name = "ppc6xx",
         .description = "Enable PPC 6xx instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.qpx)] = .{
-        .index = @enumToInt(Feature.qpx),
-        .name = @tagName(Feature.qpx),
         .llvm_name = "qpx",
         .description = "Enable QPX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.recipprec)] = .{
-        .index = @enumToInt(Feature.recipprec),
-        .name = @tagName(Feature.recipprec),
         .llvm_name = "recipprec",
         .description = "Assume higher precision reciprocal estimates",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.secure_plt)] = .{
-        .index = @enumToInt(Feature.secure_plt),
-        .name = @tagName(Feature.secure_plt),
         .llvm_name = "secure-plt",
         .description = "Enable secure plt mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_popcntd)] = .{
-        .index = @enumToInt(Feature.slow_popcntd),
-        .name = @tagName(Feature.slow_popcntd),
         .llvm_name = "slow-popcntd",
         .description = "Has slow popcnt[dw] instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spe)] = .{
-        .index = @enumToInt(Feature.spe),
-        .name = @tagName(Feature.spe),
         .llvm_name = "spe",
         .description = "Enable SPE instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .hard_float,
         }),
     };
     result[@enumToInt(Feature.stfiwx)] = .{
-        .index = @enumToInt(Feature.stfiwx),
-        .name = @tagName(Feature.stfiwx),
         .llvm_name = "stfiwx",
         .description = "Enable the stfiwx instruction",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.two_const_nr)] = .{
-        .index = @enumToInt(Feature.two_const_nr),
-        .name = @tagName(Feature.two_const_nr),
         .llvm_name = "two-const-nr",
         .description = "Requires two constant Newton-Raphson computation",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vectors_use_two_units)] = .{
-        .index = @enumToInt(Feature.vectors_use_two_units),
-        .name = @tagName(Feature.vectors_use_two_units),
         .llvm_name = "vectors-use-two-units",
         .description = "Vectors use two units",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vsx)] = .{
-        .index = @enumToInt(Feature.vsx),
-        .name = @tagName(Feature.vsx),
         .llvm_name = "vsx",
         .description = "Enable VSX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .altivec,
         }),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -477,7 +381,7 @@ pub const cpu = struct {
     pub const @"440" = Cpu{
         .name = "440",
         .llvm_name = "440",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .booke,
             .fres,
             .frsqrte,
@@ -489,7 +393,7 @@ pub const cpu = struct {
     pub const @"450" = Cpu{
         .name = "450",
         .llvm_name = "450",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .booke,
             .fres,
             .frsqrte,
@@ -501,21 +405,21 @@ pub const cpu = struct {
     pub const @"601" = Cpu{
         .name = "601",
         .llvm_name = "601",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fpu,
         }),
     };
     pub const @"602" = Cpu{
         .name = "602",
         .llvm_name = "602",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fpu,
         }),
     };
     pub const @"603" = Cpu{
         .name = "603",
         .llvm_name = "603",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -523,7 +427,7 @@ pub const cpu = struct {
     pub const @"603e" = Cpu{
         .name = "603e",
         .llvm_name = "603e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -531,7 +435,7 @@ pub const cpu = struct {
     pub const @"603ev" = Cpu{
         .name = "603ev",
         .llvm_name = "603ev",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -539,7 +443,7 @@ pub const cpu = struct {
     pub const @"604" = Cpu{
         .name = "604",
         .llvm_name = "604",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -547,7 +451,7 @@ pub const cpu = struct {
     pub const @"604e" = Cpu{
         .name = "604e",
         .llvm_name = "604e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -555,7 +459,7 @@ pub const cpu = struct {
     pub const @"620" = Cpu{
         .name = "620",
         .llvm_name = "620",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -563,7 +467,7 @@ pub const cpu = struct {
     pub const @"7400" = Cpu{
         .name = "7400",
         .llvm_name = "7400",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -572,7 +476,7 @@ pub const cpu = struct {
     pub const @"7450" = Cpu{
         .name = "7450",
         .llvm_name = "7450",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -581,7 +485,7 @@ pub const cpu = struct {
     pub const @"750" = Cpu{
         .name = "750",
         .llvm_name = "750",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -589,7 +493,7 @@ pub const cpu = struct {
     pub const @"970" = Cpu{
         .name = "970",
         .llvm_name = "970",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -602,7 +506,7 @@ pub const cpu = struct {
     pub const a2 = Cpu{
         .name = "a2",
         .llvm_name = "a2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .booke,
             .cmpb,
@@ -627,7 +531,7 @@ pub const cpu = struct {
     pub const a2q = Cpu{
         .name = "a2q",
         .llvm_name = "a2q",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .booke,
             .cmpb,
@@ -653,7 +557,7 @@ pub const cpu = struct {
     pub const e500 = Cpu{
         .name = "e500",
         .llvm_name = "e500",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .booke,
             .icbt,
             .isel,
@@ -662,7 +566,7 @@ pub const cpu = struct {
     pub const e500mc = Cpu{
         .name = "e500mc",
         .llvm_name = "e500mc",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .booke,
             .icbt,
             .isel,
@@ -672,7 +576,7 @@ pub const cpu = struct {
     pub const e5500 = Cpu{
         .name = "e5500",
         .llvm_name = "e5500",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .booke,
             .icbt,
@@ -684,7 +588,7 @@ pub const cpu = struct {
     pub const g3 = Cpu{
         .name = "g3",
         .llvm_name = "g3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -692,7 +596,7 @@ pub const cpu = struct {
     pub const g4 = Cpu{
         .name = "g4",
         .llvm_name = "g4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -701,7 +605,7 @@ pub const cpu = struct {
     pub const @"g4+" = Cpu{
         .name = "g4+",
         .llvm_name = "g4+",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -710,7 +614,7 @@ pub const cpu = struct {
     pub const g5 = Cpu{
         .name = "g5",
         .llvm_name = "g5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -723,28 +627,28 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc = Cpu{
         .name = "ppc",
         .llvm_name = "ppc",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc32 = Cpu{
         .name = "ppc32",
         .llvm_name = "ppc32",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc64 = Cpu{
         .name = "ppc64",
         .llvm_name = "ppc64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -757,7 +661,7 @@ pub const cpu = struct {
     pub const ppc64le = Cpu{
         .name = "ppc64le",
         .llvm_name = "ppc64le",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -792,7 +696,7 @@ pub const cpu = struct {
     pub const pwr3 = Cpu{
         .name = "pwr3",
         .llvm_name = "pwr3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -804,7 +708,7 @@ pub const cpu = struct {
     pub const pwr4 = Cpu{
         .name = "pwr4",
         .llvm_name = "pwr4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -817,7 +721,7 @@ pub const cpu = struct {
     pub const pwr5 = Cpu{
         .name = "pwr5",
         .llvm_name = "pwr5",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fre,
@@ -832,7 +736,7 @@ pub const cpu = struct {
     pub const pwr5x = Cpu{
         .name = "pwr5x",
         .llvm_name = "pwr5x",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .fprnd,
@@ -848,7 +752,7 @@ pub const cpu = struct {
     pub const pwr6 = Cpu{
         .name = "pwr6",
         .llvm_name = "pwr6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .cmpb,
@@ -868,7 +772,7 @@ pub const cpu = struct {
     pub const pwr6x = Cpu{
         .name = "pwr6x",
         .llvm_name = "pwr6x",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .cmpb,
@@ -888,7 +792,7 @@ pub const cpu = struct {
     pub const pwr7 = Cpu{
         .name = "pwr7",
         .llvm_name = "pwr7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -916,7 +820,7 @@ pub const cpu = struct {
     pub const pwr8 = Cpu{
         .name = "pwr8",
         .llvm_name = "pwr8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -951,7 +855,7 @@ pub const cpu = struct {
     pub const pwr9 = Cpu{
         .name = "pwr9",
         .llvm_name = "pwr9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index ee0d6509df370baf3a10dfcb11c0519a92eceb21..f4ba975d085edc5b7ea261c4b8f4974498635281 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -16,66 +16,56 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"64bit")] = .{
-        .index = @enumToInt(Feature.@"64bit"),
-        .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Implements RV64",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a)] = .{
-        .index = @enumToInt(Feature.a),
-        .name = @tagName(Feature.a),
         .llvm_name = "a",
         .description = "'A' (Atomic Instructions)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.c)] = .{
-        .index = @enumToInt(Feature.c),
-        .name = @tagName(Feature.c),
         .llvm_name = "c",
         .description = "'C' (Compressed Instructions)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.d)] = .{
-        .index = @enumToInt(Feature.d),
-        .name = @tagName(Feature.d),
         .llvm_name = "d",
         .description = "'D' (Double-Precision Floating-Point)",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .f,
         }),
     };
     result[@enumToInt(Feature.e)] = .{
-        .index = @enumToInt(Feature.e),
-        .name = @tagName(Feature.e),
         .llvm_name = "e",
         .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f)] = .{
-        .index = @enumToInt(Feature.f),
-        .name = @tagName(Feature.f),
         .llvm_name = "f",
         .description = "'F' (Single-Precision Floating-Point)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m)] = .{
-        .index = @enumToInt(Feature.m),
-        .name = @tagName(Feature.m),
         .llvm_name = "m",
         .description = "'M' (Integer Multiplication and Division)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.relax)] = .{
-        .index = @enumToInt(Feature.relax),
-        .name = @tagName(Feature.relax),
         .llvm_name = "relax",
         .description = "Enable Linker relaxation.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -83,12 +73,12 @@ pub const cpu = struct {
     pub const generic_rv32 = Cpu{
         .name = "generic_rv32",
         .llvm_name = "generic-rv32",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const generic_rv64 = Cpu{
         .name = "generic_rv64",
         .llvm_name = "generic-rv64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
         }),
     };
@@ -102,7 +92,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.generic_rv64,
 };
 
-pub const baseline_32_features = featureSet(&[_]Feature{
+pub const baseline_32_features = featureSet(&all_features, &[_]Feature{
     .a,
     .c,
     .d,
@@ -111,7 +101,7 @@ pub const baseline_32_features = featureSet(&[_]Feature{
     .relax,
 });
 
-pub const baseline_64_features = featureSet(&[_]Feature{
+pub const baseline_64_features = featureSet(&all_features, &[_]Feature{
     .@"64bit",
     .a,
     .c,
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index da7649e8316bd6458d342b4f9a6631affc7ab62b..a9d75f5191363aed4b5a49aa5bb10e0b86fa5edd 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -27,141 +27,109 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.deprecated_v8)] = .{
-        .index = @enumToInt(Feature.deprecated_v8),
-        .name = @tagName(Feature.deprecated_v8),
         .llvm_name = "deprecated-v8",
         .description = "Enable deprecated V8 instructions in V9 mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.detectroundchange)] = .{
-        .index = @enumToInt(Feature.detectroundchange),
-        .name = @tagName(Feature.detectroundchange),
         .llvm_name = "detectroundchange",
         .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fixallfdivsqrt)] = .{
-        .index = @enumToInt(Feature.fixallfdivsqrt),
-        .name = @tagName(Feature.fixallfdivsqrt),
         .llvm_name = "fixallfdivsqrt",
         .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hard_quad_float)] = .{
-        .index = @enumToInt(Feature.hard_quad_float),
-        .name = @tagName(Feature.hard_quad_float),
         .llvm_name = "hard-quad-float",
         .description = "Enable quad-word floating point instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasleoncasa)] = .{
-        .index = @enumToInt(Feature.hasleoncasa),
-        .name = @tagName(Feature.hasleoncasa),
         .llvm_name = "hasleoncasa",
         .description = "Enable CASA instruction for LEON3 and LEON4 processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasumacsmac)] = .{
-        .index = @enumToInt(Feature.hasumacsmac),
-        .name = @tagName(Feature.hasumacsmac),
         .llvm_name = "hasumacsmac",
         .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insertnopload)] = .{
-        .index = @enumToInt(Feature.insertnopload),
-        .name = @tagName(Feature.insertnopload),
         .llvm_name = "insertnopload",
         .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leon)] = .{
-        .index = @enumToInt(Feature.leon),
-        .name = @tagName(Feature.leon),
         .llvm_name = "leon",
         .description = "Enable LEON extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leoncyclecounter)] = .{
-        .index = @enumToInt(Feature.leoncyclecounter),
-        .name = @tagName(Feature.leoncyclecounter),
         .llvm_name = "leoncyclecounter",
         .description = "Use the Leon cycle counter register",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leonpwrpsr)] = .{
-        .index = @enumToInt(Feature.leonpwrpsr),
-        .name = @tagName(Feature.leonpwrpsr),
         .llvm_name = "leonpwrpsr",
         .description = "Enable the PWRPSR instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fmuls)] = .{
-        .index = @enumToInt(Feature.no_fmuls),
-        .name = @tagName(Feature.no_fmuls),
         .llvm_name = "no-fmuls",
         .description = "Disable the fmuls instruction.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fsmuld)] = .{
-        .index = @enumToInt(Feature.no_fsmuld),
-        .name = @tagName(Feature.no_fsmuld),
         .llvm_name = "no-fsmuld",
         .description = "Disable the fsmuld instruction.",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popc)] = .{
-        .index = @enumToInt(Feature.popc),
-        .name = @tagName(Feature.popc),
         .llvm_name = "popc",
         .description = "Use the popc (population count) instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
-        .index = @enumToInt(Feature.soft_float),
-        .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software emulation for floating point",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_mul_div)] = .{
-        .index = @enumToInt(Feature.soft_mul_div),
-        .name = @tagName(Feature.soft_mul_div),
         .llvm_name = "soft-mul-div",
         .description = "Use software emulation for integer multiply and divide",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v9)] = .{
-        .index = @enumToInt(Feature.v9),
-        .name = @tagName(Feature.v9),
         .llvm_name = "v9",
         .description = "Enable SPARC-V9 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis)] = .{
-        .index = @enumToInt(Feature.vis),
-        .name = @tagName(Feature.vis),
         .llvm_name = "vis",
         .description = "Enable UltraSPARC Visual Instruction Set extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis2)] = .{
-        .index = @enumToInt(Feature.vis2),
-        .name = @tagName(Feature.vis2),
         .llvm_name = "vis2",
         .description = "Enable Visual Instruction Set extensions II",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis3)] = .{
-        .index = @enumToInt(Feature.vis3),
-        .name = @tagName(Feature.vis3),
         .llvm_name = "vis3",
         .description = "Enable Visual Instruction Set extensions III",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -169,7 +137,7 @@ pub const cpu = struct {
     pub const at697e = Cpu{
         .name = "at697e",
         .llvm_name = "at697e",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .insertnopload,
             .leon,
         }),
@@ -177,7 +145,7 @@ pub const cpu = struct {
     pub const at697f = Cpu{
         .name = "at697f",
         .llvm_name = "at697f",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .insertnopload,
             .leon,
         }),
@@ -185,17 +153,17 @@ pub const cpu = struct {
     pub const f934 = Cpu{
         .name = "f934",
         .llvm_name = "f934",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const gr712rc = Cpu{
         .name = "gr712rc",
         .llvm_name = "gr712rc",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -203,7 +171,7 @@ pub const cpu = struct {
     pub const gr740 = Cpu{
         .name = "gr740",
         .llvm_name = "gr740",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .hasumacsmac,
             .leon,
@@ -214,19 +182,19 @@ pub const cpu = struct {
     pub const hypersparc = Cpu{
         .name = "hypersparc",
         .llvm_name = "hypersparc",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const leon2 = Cpu{
         .name = "leon2",
         .llvm_name = "leon2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .leon,
         }),
     };
     pub const leon3 = Cpu{
         .name = "leon3",
         .llvm_name = "leon3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasumacsmac,
             .leon,
         }),
@@ -234,7 +202,7 @@ pub const cpu = struct {
     pub const leon4 = Cpu{
         .name = "leon4",
         .llvm_name = "leon4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .hasumacsmac,
             .leon,
@@ -243,7 +211,7 @@ pub const cpu = struct {
     pub const ma2080 = Cpu{
         .name = "ma2080",
         .llvm_name = "ma2080",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -251,7 +219,7 @@ pub const cpu = struct {
     pub const ma2085 = Cpu{
         .name = "ma2085",
         .llvm_name = "ma2085",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -259,7 +227,7 @@ pub const cpu = struct {
     pub const ma2100 = Cpu{
         .name = "ma2100",
         .llvm_name = "ma2100",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -267,7 +235,7 @@ pub const cpu = struct {
     pub const ma2150 = Cpu{
         .name = "ma2150",
         .llvm_name = "ma2150",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -275,7 +243,7 @@ pub const cpu = struct {
     pub const ma2155 = Cpu{
         .name = "ma2155",
         .llvm_name = "ma2155",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -283,7 +251,7 @@ pub const cpu = struct {
     pub const ma2450 = Cpu{
         .name = "ma2450",
         .llvm_name = "ma2450",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -291,7 +259,7 @@ pub const cpu = struct {
     pub const ma2455 = Cpu{
         .name = "ma2455",
         .llvm_name = "ma2455",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -299,7 +267,7 @@ pub const cpu = struct {
     pub const ma2480 = Cpu{
         .name = "ma2480",
         .llvm_name = "ma2480",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -307,7 +275,7 @@ pub const cpu = struct {
     pub const ma2485 = Cpu{
         .name = "ma2485",
         .llvm_name = "ma2485",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -315,7 +283,7 @@ pub const cpu = struct {
     pub const ma2x5x = Cpu{
         .name = "ma2x5x",
         .llvm_name = "ma2x5x",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -323,7 +291,7 @@ pub const cpu = struct {
     pub const ma2x8x = Cpu{
         .name = "ma2x8x",
         .llvm_name = "ma2x8x",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -331,7 +299,7 @@ pub const cpu = struct {
     pub const myriad2 = Cpu{
         .name = "myriad2",
         .llvm_name = "myriad2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -339,7 +307,7 @@ pub const cpu = struct {
     pub const myriad2_1 = Cpu{
         .name = "myriad2_1",
         .llvm_name = "myriad2.1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -347,7 +315,7 @@ pub const cpu = struct {
     pub const myriad2_2 = Cpu{
         .name = "myriad2_2",
         .llvm_name = "myriad2.2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -355,7 +323,7 @@ pub const cpu = struct {
     pub const myriad2_3 = Cpu{
         .name = "myriad2_3",
         .llvm_name = "myriad2.3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -363,7 +331,7 @@ pub const cpu = struct {
     pub const niagara = Cpu{
         .name = "niagara",
         .llvm_name = "niagara",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -373,7 +341,7 @@ pub const cpu = struct {
     pub const niagara2 = Cpu{
         .name = "niagara2",
         .llvm_name = "niagara2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -384,7 +352,7 @@ pub const cpu = struct {
     pub const niagara3 = Cpu{
         .name = "niagara3",
         .llvm_name = "niagara3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -395,7 +363,7 @@ pub const cpu = struct {
     pub const niagara4 = Cpu{
         .name = "niagara4",
         .llvm_name = "niagara4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -407,32 +375,32 @@ pub const cpu = struct {
     pub const sparclet = Cpu{
         .name = "sparclet",
         .llvm_name = "sparclet",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const sparclite = Cpu{
         .name = "sparclite",
         .llvm_name = "sparclite",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const sparclite86x = Cpu{
         .name = "sparclite86x",
         .llvm_name = "sparclite86x",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const supersparc = Cpu{
         .name = "supersparc",
         .llvm_name = "supersparc",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const tsc701 = Cpu{
         .name = "tsc701",
         .llvm_name = "tsc701",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const ultrasparc = Cpu{
         .name = "ultrasparc",
         .llvm_name = "ultrasparc",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -441,7 +409,7 @@ pub const cpu = struct {
     pub const ultrasparc3 = Cpu{
         .name = "ultrasparc3",
         .llvm_name = "ultrasparc3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -451,7 +419,7 @@ pub const cpu = struct {
     pub const ut699 = Cpu{
         .name = "ut699",
         .llvm_name = "ut699",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .fixallfdivsqrt,
             .insertnopload,
             .leon,
@@ -462,7 +430,7 @@ pub const cpu = struct {
     pub const v7 = Cpu{
         .name = "v7",
         .llvm_name = "v7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .no_fsmuld,
             .soft_mul_div,
         }),
@@ -470,12 +438,12 @@ pub const cpu = struct {
     pub const v8 = Cpu{
         .name = "v8",
         .llvm_name = "v8",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const v9 = Cpu{
         .name = "v9",
         .llvm_name = "v9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .v9,
         }),
     };
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index aaee832c28a8b7db4be08b822970f081e0e9cad1..1326ad23ed54acbeec2e0cde6bb574d6bb17ee60 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -43,253 +43,189 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.deflate_conversion)] = .{
-        .index = @enumToInt(Feature.deflate_conversion),
-        .name = @tagName(Feature.deflate_conversion),
         .llvm_name = "deflate-conversion",
         .description = "Assume that the deflate-conversion facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_packed_conversion)] = .{
-        .index = @enumToInt(Feature.dfp_packed_conversion),
-        .name = @tagName(Feature.dfp_packed_conversion),
         .llvm_name = "dfp-packed-conversion",
         .description = "Assume that the DFP packed-conversion facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
-        .index = @enumToInt(Feature.dfp_zoned_conversion),
-        .name = @tagName(Feature.dfp_zoned_conversion),
         .llvm_name = "dfp-zoned-conversion",
         .description = "Assume that the DFP zoned-conversion facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.distinct_ops)] = .{
-        .index = @enumToInt(Feature.distinct_ops),
-        .name = @tagName(Feature.distinct_ops),
         .llvm_name = "distinct-ops",
         .description = "Assume that the distinct-operands facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_dat_2)] = .{
-        .index = @enumToInt(Feature.enhanced_dat_2),
-        .name = @tagName(Feature.enhanced_dat_2),
         .llvm_name = "enhanced-dat-2",
         .description = "Assume that the enhanced-DAT facility 2 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_sort)] = .{
-        .index = @enumToInt(Feature.enhanced_sort),
-        .name = @tagName(Feature.enhanced_sort),
         .llvm_name = "enhanced-sort",
         .description = "Assume that the enhanced-sort facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execution_hint)] = .{
-        .index = @enumToInt(Feature.execution_hint),
-        .name = @tagName(Feature.execution_hint),
         .llvm_name = "execution-hint",
         .description = "Assume that the execution-hint facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_serialization)] = .{
-        .index = @enumToInt(Feature.fast_serialization),
-        .name = @tagName(Feature.fast_serialization),
         .llvm_name = "fast-serialization",
         .description = "Assume that the fast-serialization facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_extension)] = .{
-        .index = @enumToInt(Feature.fp_extension),
-        .name = @tagName(Feature.fp_extension),
         .llvm_name = "fp-extension",
         .description = "Assume that the floating-point extension facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.guarded_storage)] = .{
-        .index = @enumToInt(Feature.guarded_storage),
-        .name = @tagName(Feature.guarded_storage),
         .llvm_name = "guarded-storage",
         .description = "Assume that the guarded-storage facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.high_word)] = .{
-        .index = @enumToInt(Feature.high_word),
-        .name = @tagName(Feature.high_word),
         .llvm_name = "high-word",
         .description = "Assume that the high-word facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
-        .index = @enumToInt(Feature.insert_reference_bits_multiple),
-        .name = @tagName(Feature.insert_reference_bits_multiple),
         .llvm_name = "insert-reference-bits-multiple",
         .description = "Assume that the insert-reference-bits-multiple facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.interlocked_access1)] = .{
-        .index = @enumToInt(Feature.interlocked_access1),
-        .name = @tagName(Feature.interlocked_access1),
         .llvm_name = "interlocked-access1",
         .description = "Assume that interlocked-access facility 1 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_trap)] = .{
-        .index = @enumToInt(Feature.load_and_trap),
-        .name = @tagName(Feature.load_and_trap),
         .llvm_name = "load-and-trap",
         .description = "Assume that the load-and-trap facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
-        .index = @enumToInt(Feature.load_and_zero_rightmost_byte),
-        .name = @tagName(Feature.load_and_zero_rightmost_byte),
         .llvm_name = "load-and-zero-rightmost-byte",
         .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond)] = .{
-        .index = @enumToInt(Feature.load_store_on_cond),
-        .name = @tagName(Feature.load_store_on_cond),
         .llvm_name = "load-store-on-cond",
         .description = "Assume that the load/store-on-condition facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond_2)] = .{
-        .index = @enumToInt(Feature.load_store_on_cond_2),
-        .name = @tagName(Feature.load_store_on_cond_2),
         .llvm_name = "load-store-on-cond-2",
         .description = "Assume that the load/store-on-condition facility 2 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension3)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension3),
-        .name = @tagName(Feature.message_security_assist_extension3),
         .llvm_name = "message-security-assist-extension3",
         .description = "Assume that the message-security-assist extension facility 3 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension4)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension4),
-        .name = @tagName(Feature.message_security_assist_extension4),
         .llvm_name = "message-security-assist-extension4",
         .description = "Assume that the message-security-assist extension facility 4 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension5)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension5),
-        .name = @tagName(Feature.message_security_assist_extension5),
         .llvm_name = "message-security-assist-extension5",
         .description = "Assume that the message-security-assist extension facility 5 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension7)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension7),
-        .name = @tagName(Feature.message_security_assist_extension7),
         .llvm_name = "message-security-assist-extension7",
         .description = "Assume that the message-security-assist extension facility 7 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension8)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension8),
-        .name = @tagName(Feature.message_security_assist_extension8),
         .llvm_name = "message-security-assist-extension8",
         .description = "Assume that the message-security-assist extension facility 8 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension9)] = .{
-        .index = @enumToInt(Feature.message_security_assist_extension9),
-        .name = @tagName(Feature.message_security_assist_extension9),
         .llvm_name = "message-security-assist-extension9",
         .description = "Assume that the message-security-assist extension facility 9 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions)] = .{
-        .index = @enumToInt(Feature.miscellaneous_extensions),
-        .name = @tagName(Feature.miscellaneous_extensions),
         .llvm_name = "miscellaneous-extensions",
         .description = "Assume that the miscellaneous-extensions facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
-        .index = @enumToInt(Feature.miscellaneous_extensions_2),
-        .name = @tagName(Feature.miscellaneous_extensions_2),
         .llvm_name = "miscellaneous-extensions-2",
         .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
-        .index = @enumToInt(Feature.miscellaneous_extensions_3),
-        .name = @tagName(Feature.miscellaneous_extensions_3),
         .llvm_name = "miscellaneous-extensions-3",
         .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.population_count)] = .{
-        .index = @enumToInt(Feature.population_count),
-        .name = @tagName(Feature.population_count),
         .llvm_name = "population-count",
         .description = "Assume that the population-count facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.processor_assist)] = .{
-        .index = @enumToInt(Feature.processor_assist),
-        .name = @tagName(Feature.processor_assist),
         .llvm_name = "processor-assist",
         .description = "Assume that the processor-assist facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
-        .index = @enumToInt(Feature.reset_reference_bits_multiple),
-        .name = @tagName(Feature.reset_reference_bits_multiple),
         .llvm_name = "reset-reference-bits-multiple",
         .description = "Assume that the reset-reference-bits-multiple facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.transactional_execution)] = .{
-        .index = @enumToInt(Feature.transactional_execution),
-        .name = @tagName(Feature.transactional_execution),
         .llvm_name = "transactional-execution",
         .description = "Assume that the transactional-execution facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector)] = .{
-        .index = @enumToInt(Feature.vector),
-        .name = @tagName(Feature.vector),
         .llvm_name = "vector",
         .description = "Assume that the vectory facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_1)] = .{
-        .index = @enumToInt(Feature.vector_enhancements_1),
-        .name = @tagName(Feature.vector_enhancements_1),
         .llvm_name = "vector-enhancements-1",
         .description = "Assume that the vector enhancements facility 1 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_2)] = .{
-        .index = @enumToInt(Feature.vector_enhancements_2),
-        .name = @tagName(Feature.vector_enhancements_2),
         .llvm_name = "vector-enhancements-2",
         .description = "Assume that the vector enhancements facility 2 is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal)] = .{
-        .index = @enumToInt(Feature.vector_packed_decimal),
-        .name = @tagName(Feature.vector_packed_decimal),
         .llvm_name = "vector-packed-decimal",
         .description = "Assume that the vector packed decimal facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
-        .index = @enumToInt(Feature.vector_packed_decimal_enhancement),
-        .name = @tagName(Feature.vector_packed_decimal_enhancement),
         .llvm_name = "vector-packed-decimal-enhancement",
         .description = "Assume that the vector packed decimal enhancement facility is installed",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -297,7 +233,7 @@ pub const cpu = struct {
     pub const arch10 = Cpu{
         .name = "arch10",
         .llvm_name = "arch10",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_zoned_conversion,
             .distinct_ops,
             .enhanced_dat_2,
@@ -320,7 +256,7 @@ pub const cpu = struct {
     pub const arch11 = Cpu{
         .name = "arch11",
         .llvm_name = "arch11",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -348,7 +284,7 @@ pub const cpu = struct {
     pub const arch12 = Cpu{
         .name = "arch12",
         .llvm_name = "arch12",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -383,7 +319,7 @@ pub const cpu = struct {
     pub const arch13 = Cpu{
         .name = "arch13",
         .llvm_name = "arch13",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .deflate_conversion,
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
@@ -424,12 +360,12 @@ pub const cpu = struct {
     pub const arch8 = Cpu{
         .name = "arch8",
         .llvm_name = "arch8",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const arch9 = Cpu{
         .name = "arch9",
         .llvm_name = "arch9",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .distinct_ops,
             .fast_serialization,
             .fp_extension,
@@ -445,17 +381,17 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const z10 = Cpu{
         .name = "z10",
         .llvm_name = "z10",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const z13 = Cpu{
         .name = "z13",
         .llvm_name = "z13",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -483,7 +419,7 @@ pub const cpu = struct {
     pub const z14 = Cpu{
         .name = "z14",
         .llvm_name = "z14",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -518,7 +454,7 @@ pub const cpu = struct {
     pub const z196 = Cpu{
         .name = "z196",
         .llvm_name = "z196",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .distinct_ops,
             .fast_serialization,
             .fp_extension,
@@ -534,7 +470,7 @@ pub const cpu = struct {
     pub const zEC12 = Cpu{
         .name = "zEC12",
         .llvm_name = "zEC12",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .dfp_zoned_conversion,
             .distinct_ops,
             .enhanced_dat_2,
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index 3df17d503b4a38d896f29a0d49baade17fd9bad2..bd6ae8cc8f15ed30d5f6c946adc414cdd3c3b270 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -18,80 +18,66 @@ pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.atomics)] = .{
-        .index = @enumToInt(Feature.atomics),
-        .name = @tagName(Feature.atomics),
         .llvm_name = "atomics",
         .description = "Enable Atomics",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bulk_memory)] = .{
-        .index = @enumToInt(Feature.bulk_memory),
-        .name = @tagName(Feature.bulk_memory),
         .llvm_name = "bulk-memory",
         .description = "Enable bulk memory operations",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exception_handling)] = .{
-        .index = @enumToInt(Feature.exception_handling),
-        .name = @tagName(Feature.exception_handling),
         .llvm_name = "exception-handling",
         .description = "Enable Wasm exception handling",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.multivalue)] = .{
-        .index = @enumToInt(Feature.multivalue),
-        .name = @tagName(Feature.multivalue),
         .llvm_name = "multivalue",
         .description = "Enable multivalue blocks, instructions, and functions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mutable_globals)] = .{
-        .index = @enumToInt(Feature.mutable_globals),
-        .name = @tagName(Feature.mutable_globals),
         .llvm_name = "mutable-globals",
         .description = "Enable mutable globals",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nontrapping_fptoint)] = .{
-        .index = @enumToInt(Feature.nontrapping_fptoint),
-        .name = @tagName(Feature.nontrapping_fptoint),
         .llvm_name = "nontrapping-fptoint",
         .description = "Enable non-trapping float-to-int conversion operators",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sign_ext)] = .{
-        .index = @enumToInt(Feature.sign_ext),
-        .name = @tagName(Feature.sign_ext),
         .llvm_name = "sign-ext",
         .description = "Enable sign extension operators",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.simd128)] = .{
-        .index = @enumToInt(Feature.simd128),
-        .name = @tagName(Feature.simd128),
         .llvm_name = "simd128",
         .description = "Enable 128-bit SIMD",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tail_call)] = .{
-        .index = @enumToInt(Feature.tail_call),
-        .name = @tagName(Feature.tail_call),
         .llvm_name = "tail-call",
         .description = "Enable tail call instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unimplemented_simd128)] = .{
-        .index = @enumToInt(Feature.unimplemented_simd128),
-        .name = @tagName(Feature.unimplemented_simd128),
         .llvm_name = "unimplemented-simd128",
         .description = "Enable 128-bit SIMD not yet implemented in engines",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .simd128,
         }),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -99,7 +85,7 @@ pub const cpu = struct {
     pub const bleeding_edge = Cpu{
         .name = "bleeding_edge",
         .llvm_name = "bleeding-edge",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .atomics,
             .mutable_globals,
             .nontrapping_fptoint,
@@ -110,12 +96,12 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const mvp = Cpu{
         .name = "mvp",
         .llvm_name = "mvp",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index ce9830f1fa94ab568ca08786c07fab1f31aa539e..a576bf408256c046d4c648bdea375c4fa90eb37d 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -128,940 +128,705 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
+    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
-    std.debug.assert(len <= Cpu.Feature.Set.bit_count);
+    std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"3dnow")] = .{
-        .index = @enumToInt(Feature.@"3dnow"),
-        .name = @tagName(Feature.@"3dnow"),
         .llvm_name = "3dnow",
         .description = "Enable 3DNow! instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .mmx,
         }),
     };
     result[@enumToInt(Feature.@"3dnowa")] = .{
-        .index = @enumToInt(Feature.@"3dnowa"),
-        .name = @tagName(Feature.@"3dnowa"),
         .llvm_name = "3dnowa",
         .description = "Enable 3DNow! Athlon instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .@"3dnow",
         }),
     };
     result[@enumToInt(Feature.@"64bit")] = .{
-        .index = @enumToInt(Feature.@"64bit"),
-        .name = @tagName(Feature.@"64bit"),
         .llvm_name = "64bit",
         .description = "Support 64-bit instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.adx)] = .{
-        .index = @enumToInt(Feature.adx),
-        .name = @tagName(Feature.adx),
         .llvm_name = "adx",
         .description = "Support ADX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
-        .index = @enumToInt(Feature.aes),
-        .name = @tagName(Feature.aes),
         .llvm_name = "aes",
         .description = "Enable AES instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.avx)] = .{
-        .index = @enumToInt(Feature.avx),
-        .name = @tagName(Feature.avx),
         .llvm_name = "avx",
         .description = "Enable AVX instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse4_2,
         }),
     };
     result[@enumToInt(Feature.avx2)] = .{
-        .index = @enumToInt(Feature.avx2),
-        .name = @tagName(Feature.avx2),
         .llvm_name = "avx2",
         .description = "Enable AVX2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.avx512bf16)] = .{
-        .index = @enumToInt(Feature.avx512bf16),
-        .name = @tagName(Feature.avx512bf16),
         .llvm_name = "avx512bf16",
         .description = "Support bfloat16 floating point",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512bitalg)] = .{
-        .index = @enumToInt(Feature.avx512bitalg),
-        .name = @tagName(Feature.avx512bitalg),
         .llvm_name = "avx512bitalg",
         .description = "Enable AVX-512 Bit Algorithms",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512bw)] = .{
-        .index = @enumToInt(Feature.avx512bw),
-        .name = @tagName(Feature.avx512bw),
         .llvm_name = "avx512bw",
         .description = "Enable AVX-512 Byte and Word Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512cd)] = .{
-        .index = @enumToInt(Feature.avx512cd),
-        .name = @tagName(Feature.avx512cd),
         .llvm_name = "avx512cd",
         .description = "Enable AVX-512 Conflict Detection Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512dq)] = .{
-        .index = @enumToInt(Feature.avx512dq),
-        .name = @tagName(Feature.avx512dq),
         .llvm_name = "avx512dq",
         .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512er)] = .{
-        .index = @enumToInt(Feature.avx512er),
-        .name = @tagName(Feature.avx512er),
         .llvm_name = "avx512er",
         .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512f)] = .{
-        .index = @enumToInt(Feature.avx512f),
-        .name = @tagName(Feature.avx512f),
         .llvm_name = "avx512f",
         .description = "Enable AVX-512 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx2,
             .f16c,
             .fma,
         }),
     };
     result[@enumToInt(Feature.avx512ifma)] = .{
-        .index = @enumToInt(Feature.avx512ifma),
-        .name = @tagName(Feature.avx512ifma),
         .llvm_name = "avx512ifma",
         .description = "Enable AVX-512 Integer Fused Multiple-Add",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512pf)] = .{
-        .index = @enumToInt(Feature.avx512pf),
-        .name = @tagName(Feature.avx512pf),
         .llvm_name = "avx512pf",
         .description = "Enable AVX-512 PreFetch Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vbmi)] = .{
-        .index = @enumToInt(Feature.avx512vbmi),
-        .name = @tagName(Feature.avx512vbmi),
         .llvm_name = "avx512vbmi",
         .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512vbmi2)] = .{
-        .index = @enumToInt(Feature.avx512vbmi2),
-        .name = @tagName(Feature.avx512vbmi2),
         .llvm_name = "avx512vbmi2",
         .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512vl)] = .{
-        .index = @enumToInt(Feature.avx512vl),
-        .name = @tagName(Feature.avx512vl),
         .llvm_name = "avx512vl",
         .description = "Enable AVX-512 Vector Length eXtensions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vnni)] = .{
-        .index = @enumToInt(Feature.avx512vnni),
-        .name = @tagName(Feature.avx512vnni),
         .llvm_name = "avx512vnni",
         .description = "Enable AVX-512 Vector Neural Network Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vp2intersect)] = .{
-        .index = @enumToInt(Feature.avx512vp2intersect),
-        .name = @tagName(Feature.avx512vp2intersect),
         .llvm_name = "avx512vp2intersect",
         .description = "Enable AVX-512 vp2intersect",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vpopcntdq)] = .{
-        .index = @enumToInt(Feature.avx512vpopcntdq),
-        .name = @tagName(Feature.avx512vpopcntdq),
         .llvm_name = "avx512vpopcntdq",
         .description = "Enable AVX-512 Population Count Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.bmi)] = .{
-        .index = @enumToInt(Feature.bmi),
-        .name = @tagName(Feature.bmi),
         .llvm_name = "bmi",
         .description = "Support BMI instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bmi2)] = .{
-        .index = @enumToInt(Feature.bmi2),
-        .name = @tagName(Feature.bmi2),
         .llvm_name = "bmi2",
         .description = "Support BMI2 instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.branchfusion)] = .{
-        .index = @enumToInt(Feature.branchfusion),
-        .name = @tagName(Feature.branchfusion),
         .llvm_name = "branchfusion",
         .description = "CMP/TEST can be fused with conditional branches",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cldemote)] = .{
-        .index = @enumToInt(Feature.cldemote),
-        .name = @tagName(Feature.cldemote),
         .llvm_name = "cldemote",
         .description = "Enable Cache Demote",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clflushopt)] = .{
-        .index = @enumToInt(Feature.clflushopt),
-        .name = @tagName(Feature.clflushopt),
         .llvm_name = "clflushopt",
         .description = "Flush A Cache Line Optimized",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clwb)] = .{
-        .index = @enumToInt(Feature.clwb),
-        .name = @tagName(Feature.clwb),
         .llvm_name = "clwb",
         .description = "Cache Line Write Back",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clzero)] = .{
-        .index = @enumToInt(Feature.clzero),
-        .name = @tagName(Feature.clzero),
         .llvm_name = "clzero",
         .description = "Enable Cache Line Zero",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmov)] = .{
-        .index = @enumToInt(Feature.cmov),
-        .name = @tagName(Feature.cmov),
         .llvm_name = "cmov",
         .description = "Enable conditional move instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cx16)] = .{
-        .index = @enumToInt(Feature.cx16),
-        .name = @tagName(Feature.cx16),
         .llvm_name = "cx16",
         .description = "64-bit with cmpxchg16b",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .cx8,
         }),
     };
     result[@enumToInt(Feature.cx8)] = .{
-        .index = @enumToInt(Feature.cx8),
-        .name = @tagName(Feature.cx8),
         .llvm_name = "cx8",
         .description = "Support CMPXCHG8B instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enqcmd)] = .{
-        .index = @enumToInt(Feature.enqcmd),
-        .name = @tagName(Feature.enqcmd),
         .llvm_name = "enqcmd",
         .description = "Has ENQCMD instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ermsb)] = .{
-        .index = @enumToInt(Feature.ermsb),
-        .name = @tagName(Feature.ermsb),
         .llvm_name = "ermsb",
         .description = "REP MOVS/STOS are fast",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f16c)] = .{
-        .index = @enumToInt(Feature.f16c),
-        .name = @tagName(Feature.f16c),
         .llvm_name = "f16c",
         .description = "Support 16-bit floating point conversion instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
-        .index = @enumToInt(Feature.false_deps_lzcnt_tzcnt),
-        .name = @tagName(Feature.false_deps_lzcnt_tzcnt),
         .llvm_name = "false-deps-lzcnt-tzcnt",
         .description = "LZCNT/TZCNT have a false dependency on dest register",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.false_deps_popcnt)] = .{
-        .index = @enumToInt(Feature.false_deps_popcnt),
-        .name = @tagName(Feature.false_deps_popcnt),
         .llvm_name = "false-deps-popcnt",
         .description = "POPCNT has a false dependency on dest register",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_11bytenop)] = .{
-        .index = @enumToInt(Feature.fast_11bytenop),
-        .name = @tagName(Feature.fast_11bytenop),
         .llvm_name = "fast-11bytenop",
         .description = "Target can quickly decode up to 11 byte NOPs",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_15bytenop)] = .{
-        .index = @enumToInt(Feature.fast_15bytenop),
-        .name = @tagName(Feature.fast_15bytenop),
         .llvm_name = "fast-15bytenop",
         .description = "Target can quickly decode up to 15 byte NOPs",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_bextr)] = .{
-        .index = @enumToInt(Feature.fast_bextr),
-        .name = @tagName(Feature.fast_bextr),
         .llvm_name = "fast-bextr",
         .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_gather)] = .{
-        .index = @enumToInt(Feature.fast_gather),
-        .name = @tagName(Feature.fast_gather),
         .llvm_name = "fast-gather",
         .description = "Indicates if gather is reasonably fast",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_hops)] = .{
-        .index = @enumToInt(Feature.fast_hops),
-        .name = @tagName(Feature.fast_hops),
         .llvm_name = "fast-hops",
         .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.fast_lzcnt)] = .{
-        .index = @enumToInt(Feature.fast_lzcnt),
-        .name = @tagName(Feature.fast_lzcnt),
         .llvm_name = "fast-lzcnt",
         .description = "LZCNT instructions are as fast as most simple integer ops",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
-        .index = @enumToInt(Feature.fast_partial_ymm_or_zmm_write),
-        .name = @tagName(Feature.fast_partial_ymm_or_zmm_write),
         .llvm_name = "fast-partial-ymm-or-zmm-write",
         .description = "Partial writes to YMM/ZMM registers are fast",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
-        .index = @enumToInt(Feature.fast_scalar_fsqrt),
-        .name = @tagName(Feature.fast_scalar_fsqrt),
         .llvm_name = "fast-scalar-fsqrt",
         .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
-        .index = @enumToInt(Feature.fast_scalar_shift_masks),
-        .name = @tagName(Feature.fast_scalar_shift_masks),
         .llvm_name = "fast-scalar-shift-masks",
         .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_shld_rotate)] = .{
-        .index = @enumToInt(Feature.fast_shld_rotate),
-        .name = @tagName(Feature.fast_shld_rotate),
         .llvm_name = "fast-shld-rotate",
         .description = "SHLD can be used as a faster rotate",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_variable_shuffle)] = .{
-        .index = @enumToInt(Feature.fast_variable_shuffle),
-        .name = @tagName(Feature.fast_variable_shuffle),
         .llvm_name = "fast-variable-shuffle",
         .description = "Shuffles with variable masks are fast",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
-        .index = @enumToInt(Feature.fast_vector_fsqrt),
-        .name = @tagName(Feature.fast_vector_fsqrt),
         .llvm_name = "fast-vector-fsqrt",
         .description = "Vector SQRT is fast (disable Newton-Raphson)",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
-        .index = @enumToInt(Feature.fast_vector_shift_masks),
-        .name = @tagName(Feature.fast_vector_shift_masks),
         .llvm_name = "fast-vector-shift-masks",
         .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma)] = .{
-        .index = @enumToInt(Feature.fma),
-        .name = @tagName(Feature.fma),
         .llvm_name = "fma",
         .description = "Enable three-operand fused multiple-add",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.fma4)] = .{
-        .index = @enumToInt(Feature.fma4),
-        .name = @tagName(Feature.fma4),
         .llvm_name = "fma4",
         .description = "Enable four-operand fused multiple-add",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx,
             .sse4a,
         }),
     };
     result[@enumToInt(Feature.fsgsbase)] = .{
-        .index = @enumToInt(Feature.fsgsbase),
-        .name = @tagName(Feature.fsgsbase),
         .llvm_name = "fsgsbase",
         .description = "Support FS/GS Base instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fxsr)] = .{
-        .index = @enumToInt(Feature.fxsr),
-        .name = @tagName(Feature.fxsr),
         .llvm_name = "fxsr",
         .description = "Support fxsave/fxrestore instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfni)] = .{
-        .index = @enumToInt(Feature.gfni),
-        .name = @tagName(Feature.gfni),
         .llvm_name = "gfni",
         .description = "Enable Galois Field Arithmetic Instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.idivl_to_divb)] = .{
-        .index = @enumToInt(Feature.idivl_to_divb),
-        .name = @tagName(Feature.idivl_to_divb),
         .llvm_name = "idivl-to-divb",
         .description = "Use 8-bit divide for positive values less than 256",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.idivq_to_divl)] = .{
-        .index = @enumToInt(Feature.idivq_to_divl),
-        .name = @tagName(Feature.idivq_to_divl),
         .llvm_name = "idivq-to-divl",
         .description = "Use 32-bit divide for positive values less than 2^32",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invpcid)] = .{
-        .index = @enumToInt(Feature.invpcid),
-        .name = @tagName(Feature.invpcid),
         .llvm_name = "invpcid",
         .description = "Invalidate Process-Context Identifier",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_sp)] = .{
-        .index = @enumToInt(Feature.lea_sp),
-        .name = @tagName(Feature.lea_sp),
         .llvm_name = "lea-sp",
         .description = "Use LEA for adjusting the stack pointer",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_uses_ag)] = .{
-        .index = @enumToInt(Feature.lea_uses_ag),
-        .name = @tagName(Feature.lea_uses_ag),
         .llvm_name = "lea-uses-ag",
         .description = "LEA instruction needs inputs at AG stage",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lwp)] = .{
-        .index = @enumToInt(Feature.lwp),
-        .name = @tagName(Feature.lwp),
         .llvm_name = "lwp",
         .description = "Enable LWP instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lzcnt)] = .{
-        .index = @enumToInt(Feature.lzcnt),
-        .name = @tagName(Feature.lzcnt),
         .llvm_name = "lzcnt",
         .description = "Support LZCNT instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.macrofusion)] = .{
-        .index = @enumToInt(Feature.macrofusion),
-        .name = @tagName(Feature.macrofusion),
         .llvm_name = "macrofusion",
         .description = "Various instructions can be fused with conditional branches",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
-        .index = @enumToInt(Feature.merge_to_threeway_branch),
-        .name = @tagName(Feature.merge_to_threeway_branch),
         .llvm_name = "merge-to-threeway-branch",
         .description = "Merge branches to a three-way conditional branch",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mmx)] = .{
-        .index = @enumToInt(Feature.mmx),
-        .name = @tagName(Feature.mmx),
         .llvm_name = "mmx",
         .description = "Enable MMX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movbe)] = .{
-        .index = @enumToInt(Feature.movbe),
-        .name = @tagName(Feature.movbe),
         .llvm_name = "movbe",
         .description = "Support MOVBE instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdir64b)] = .{
-        .index = @enumToInt(Feature.movdir64b),
-        .name = @tagName(Feature.movdir64b),
         .llvm_name = "movdir64b",
         .description = "Support movdir64b instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdiri)] = .{
-        .index = @enumToInt(Feature.movdiri),
-        .name = @tagName(Feature.movdiri),
         .llvm_name = "movdiri",
         .description = "Support movdiri instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpx)] = .{
-        .index = @enumToInt(Feature.mpx),
-        .name = @tagName(Feature.mpx),
         .llvm_name = "mpx",
         .description = "Support MPX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mwaitx)] = .{
-        .index = @enumToInt(Feature.mwaitx),
-        .name = @tagName(Feature.mwaitx),
         .llvm_name = "mwaitx",
         .description = "Enable MONITORX/MWAITX timer functionality",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nopl)] = .{
-        .index = @enumToInt(Feature.nopl),
-        .name = @tagName(Feature.nopl),
         .llvm_name = "nopl",
         .description = "Enable NOPL instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pad_short_functions)] = .{
-        .index = @enumToInt(Feature.pad_short_functions),
-        .name = @tagName(Feature.pad_short_functions),
         .llvm_name = "pad-short-functions",
         .description = "Pad short functions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pclmul)] = .{
-        .index = @enumToInt(Feature.pclmul),
-        .name = @tagName(Feature.pclmul),
         .llvm_name = "pclmul",
         .description = "Enable packed carry-less multiplication instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.pconfig)] = .{
-        .index = @enumToInt(Feature.pconfig),
-        .name = @tagName(Feature.pconfig),
         .llvm_name = "pconfig",
         .description = "platform configuration instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pku)] = .{
-        .index = @enumToInt(Feature.pku),
-        .name = @tagName(Feature.pku),
         .llvm_name = "pku",
         .description = "Enable protection keys",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcnt)] = .{
-        .index = @enumToInt(Feature.popcnt),
-        .name = @tagName(Feature.popcnt),
         .llvm_name = "popcnt",
         .description = "Support POPCNT instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_256_bit)] = .{
-        .index = @enumToInt(Feature.prefer_256_bit),
-        .name = @tagName(Feature.prefer_256_bit),
         .llvm_name = "prefer-256-bit",
         .description = "Prefer 256-bit AVX instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefetchwt1)] = .{
-        .index = @enumToInt(Feature.prefetchwt1),
-        .name = @tagName(Feature.prefetchwt1),
         .llvm_name = "prefetchwt1",
         .description = "Prefetch with Intent to Write and T1 Hint",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prfchw)] = .{
-        .index = @enumToInt(Feature.prfchw),
-        .name = @tagName(Feature.prfchw),
         .llvm_name = "prfchw",
         .description = "Support PRFCHW instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptwrite)] = .{
-        .index = @enumToInt(Feature.ptwrite),
-        .name = @tagName(Feature.ptwrite),
         .llvm_name = "ptwrite",
         .description = "Support ptwrite instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdpid)] = .{
-        .index = @enumToInt(Feature.rdpid),
-        .name = @tagName(Feature.rdpid),
         .llvm_name = "rdpid",
         .description = "Support RDPID instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdrnd)] = .{
-        .index = @enumToInt(Feature.rdrnd),
-        .name = @tagName(Feature.rdrnd),
         .llvm_name = "rdrnd",
         .description = "Support RDRAND instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdseed)] = .{
-        .index = @enumToInt(Feature.rdseed),
-        .name = @tagName(Feature.rdseed),
         .llvm_name = "rdseed",
         .description = "Support RDSEED instruction",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline)] = .{
-        .index = @enumToInt(Feature.retpoline),
-        .name = @tagName(Feature.retpoline),
         .llvm_name = "retpoline",
         .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .retpoline_indirect_branches,
             .retpoline_indirect_calls,
         }),
     };
     result[@enumToInt(Feature.retpoline_external_thunk)] = .{
-        .index = @enumToInt(Feature.retpoline_external_thunk),
-        .name = @tagName(Feature.retpoline_external_thunk),
         .llvm_name = "retpoline-external-thunk",
         .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .retpoline_indirect_calls,
         }),
     };
     result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
-        .index = @enumToInt(Feature.retpoline_indirect_branches),
-        .name = @tagName(Feature.retpoline_indirect_branches),
         .llvm_name = "retpoline-indirect-branches",
         .description = "Remove speculation of indirect branches from the generated code",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
-        .index = @enumToInt(Feature.retpoline_indirect_calls),
-        .name = @tagName(Feature.retpoline_indirect_calls),
         .llvm_name = "retpoline-indirect-calls",
         .description = "Remove speculation of indirect calls from the generated code",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rtm)] = .{
-        .index = @enumToInt(Feature.rtm),
-        .name = @tagName(Feature.rtm),
         .llvm_name = "rtm",
         .description = "Support RTM instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sahf)] = .{
-        .index = @enumToInt(Feature.sahf),
-        .name = @tagName(Feature.sahf),
         .llvm_name = "sahf",
         .description = "Support LAHF and SAHF instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sgx)] = .{
-        .index = @enumToInt(Feature.sgx),
-        .name = @tagName(Feature.sgx),
         .llvm_name = "sgx",
         .description = "Enable Software Guard Extensions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha)] = .{
-        .index = @enumToInt(Feature.sha),
-        .name = @tagName(Feature.sha),
         .llvm_name = "sha",
         .description = "Enable SHA instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.shstk)] = .{
-        .index = @enumToInt(Feature.shstk),
-        .name = @tagName(Feature.shstk),
         .llvm_name = "shstk",
         .description = "Support CET Shadow-Stack instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_3ops_lea)] = .{
-        .index = @enumToInt(Feature.slow_3ops_lea),
-        .name = @tagName(Feature.slow_3ops_lea),
         .llvm_name = "slow-3ops-lea",
         .description = "LEA instruction with 3 ops or certain registers is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_incdec)] = .{
-        .index = @enumToInt(Feature.slow_incdec),
-        .name = @tagName(Feature.slow_incdec),
         .llvm_name = "slow-incdec",
         .description = "INC and DEC instructions are slower than ADD and SUB",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_lea)] = .{
-        .index = @enumToInt(Feature.slow_lea),
-        .name = @tagName(Feature.slow_lea),
         .llvm_name = "slow-lea",
         .description = "LEA instruction with certain arguments is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmaddwd)] = .{
-        .index = @enumToInt(Feature.slow_pmaddwd),
-        .name = @tagName(Feature.slow_pmaddwd),
         .llvm_name = "slow-pmaddwd",
         .description = "PMADDWD is slower than PMULLD",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmulld)] = .{
-        .index = @enumToInt(Feature.slow_pmulld),
-        .name = @tagName(Feature.slow_pmulld),
         .llvm_name = "slow-pmulld",
         .description = "PMULLD instruction is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_shld)] = .{
-        .index = @enumToInt(Feature.slow_shld),
-        .name = @tagName(Feature.slow_shld),
         .llvm_name = "slow-shld",
         .description = "SHLD instruction is slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_two_mem_ops)] = .{
-        .index = @enumToInt(Feature.slow_two_mem_ops),
-        .name = @tagName(Feature.slow_two_mem_ops),
         .llvm_name = "slow-two-mem-ops",
         .description = "Two memory operand instructions are slow",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
-        .index = @enumToInt(Feature.slow_unaligned_mem_16),
-        .name = @tagName(Feature.slow_unaligned_mem_16),
         .llvm_name = "slow-unaligned-mem-16",
         .description = "Slow unaligned 16-byte memory access",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
-        .index = @enumToInt(Feature.slow_unaligned_mem_32),
-        .name = @tagName(Feature.slow_unaligned_mem_32),
         .llvm_name = "slow-unaligned-mem-32",
         .description = "Slow unaligned 32-byte memory access",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
-        .index = @enumToInt(Feature.soft_float),
-        .name = @tagName(Feature.soft_float),
         .llvm_name = "soft-float",
         .description = "Use software floating point features",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse)] = .{
-        .index = @enumToInt(Feature.sse),
-        .name = @tagName(Feature.sse),
         .llvm_name = "sse",
         .description = "Enable SSE instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse_unaligned_mem)] = .{
-        .index = @enumToInt(Feature.sse_unaligned_mem),
-        .name = @tagName(Feature.sse_unaligned_mem),
         .llvm_name = "sse-unaligned-mem",
         .description = "Allow unaligned memory operands with SSE instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse2)] = .{
-        .index = @enumToInt(Feature.sse2),
-        .name = @tagName(Feature.sse2),
         .llvm_name = "sse2",
         .description = "Enable SSE2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse,
         }),
     };
     result[@enumToInt(Feature.sse3)] = .{
-        .index = @enumToInt(Feature.sse3),
-        .name = @tagName(Feature.sse3),
         .llvm_name = "sse3",
         .description = "Enable SSE3 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.sse4_1)] = .{
-        .index = @enumToInt(Feature.sse4_1),
-        .name = @tagName(Feature.sse4_1),
         .llvm_name = "sse4.1",
         .description = "Enable SSE 4.1 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .ssse3,
         }),
     };
     result[@enumToInt(Feature.sse4_2)] = .{
-        .index = @enumToInt(Feature.sse4_2),
-        .name = @tagName(Feature.sse4_2),
         .llvm_name = "sse4.2",
         .description = "Enable SSE 4.2 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse4_1,
         }),
     };
     result[@enumToInt(Feature.sse4a)] = .{
-        .index = @enumToInt(Feature.sse4a),
-        .name = @tagName(Feature.sse4a),
         .llvm_name = "sse4a",
         .description = "Support SSE 4a instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.ssse3)] = .{
-        .index = @enumToInt(Feature.ssse3),
-        .name = @tagName(Feature.ssse3),
         .llvm_name = "ssse3",
         .description = "Enable SSSE3 instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.tbm)] = .{
-        .index = @enumToInt(Feature.tbm),
-        .name = @tagName(Feature.tbm),
         .llvm_name = "tbm",
         .description = "Enable TBM instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vaes)] = .{
-        .index = @enumToInt(Feature.vaes),
-        .name = @tagName(Feature.vaes),
         .llvm_name = "vaes",
         .description = "Promote selected AES instructions to AVX512/AVX registers",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .aes,
             .avx,
         }),
     };
     result[@enumToInt(Feature.vpclmulqdq)] = .{
-        .index = @enumToInt(Feature.vpclmulqdq),
-        .name = @tagName(Feature.vpclmulqdq),
         .llvm_name = "vpclmulqdq",
         .description = "Enable vpclmulqdq instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .avx,
             .pclmul,
         }),
     };
     result[@enumToInt(Feature.waitpkg)] = .{
-        .index = @enumToInt(Feature.waitpkg),
-        .name = @tagName(Feature.waitpkg),
         .llvm_name = "waitpkg",
         .description = "Wait and pause enhancements",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wbnoinvd)] = .{
-        .index = @enumToInt(Feature.wbnoinvd),
-        .name = @tagName(Feature.wbnoinvd),
         .llvm_name = "wbnoinvd",
         .description = "Write Back No Invalidate",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.x87)] = .{
-        .index = @enumToInt(Feature.x87),
-        .name = @tagName(Feature.x87),
         .llvm_name = "x87",
         .description = "Enable X87 float instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xop)] = .{
-        .index = @enumToInt(Feature.xop),
-        .name = @tagName(Feature.xop),
         .llvm_name = "xop",
         .description = "Enable XOP instructions",
-        .dependencies = featureSet(&[_]Feature{
+        .dependencies = sparseFeatureSet(&[_]Feature{
             .fma4,
         }),
     };
     result[@enumToInt(Feature.xsave)] = .{
-        .index = @enumToInt(Feature.xsave),
-        .name = @tagName(Feature.xsave),
         .llvm_name = "xsave",
         .description = "Support xsave instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsavec)] = .{
-        .index = @enumToInt(Feature.xsavec),
-        .name = @tagName(Feature.xsavec),
         .llvm_name = "xsavec",
         .description = "Support xsavec instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaveopt)] = .{
-        .index = @enumToInt(Feature.xsaveopt),
-        .name = @tagName(Feature.xsaveopt),
         .llvm_name = "xsaveopt",
         .description = "Support xsaveopt instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaves)] = .{
-        .index = @enumToInt(Feature.xsaves),
-        .name = @tagName(Feature.xsaves),
         .llvm_name = "xsaves",
         .description = "Support xsaves instructions",
-        .dependencies = featureSet(&[_]Feature{}),
+        .dependencies = sparseFeatureSet(&[_]Feature{}),
     };
+    const ti = @typeInfo(Feature);
+    for (result) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.Enum.fields[i].name;
+        elem.dependencies.initAsDependencies(i, &result);
+    }
     break :blk result;
 };
 
@@ -1069,7 +834,7 @@ pub const cpu = struct {
     pub const amdfam10 = Cpu{
         .name = "amdfam10",
         .llvm_name = "amdfam10",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1089,7 +854,7 @@ pub const cpu = struct {
     pub const athlon = Cpu{
         .name = "athlon",
         .llvm_name = "athlon",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1102,7 +867,7 @@ pub const cpu = struct {
     pub const athlon_4 = Cpu{
         .name = "athlon_4",
         .llvm_name = "athlon-4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1117,7 +882,7 @@ pub const cpu = struct {
     pub const athlon_fx = Cpu{
         .name = "athlon_fx",
         .llvm_name = "athlon-fx",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1134,7 +899,7 @@ pub const cpu = struct {
     pub const athlon_mp = Cpu{
         .name = "athlon_mp",
         .llvm_name = "athlon-mp",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1149,7 +914,7 @@ pub const cpu = struct {
     pub const athlon_tbird = Cpu{
         .name = "athlon_tbird",
         .llvm_name = "athlon-tbird",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1162,7 +927,7 @@ pub const cpu = struct {
     pub const athlon_xp = Cpu{
         .name = "athlon_xp",
         .llvm_name = "athlon-xp",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -1177,7 +942,7 @@ pub const cpu = struct {
     pub const athlon64 = Cpu{
         .name = "athlon64",
         .llvm_name = "athlon64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1194,7 +959,7 @@ pub const cpu = struct {
     pub const athlon64_sse3 = Cpu{
         .name = "athlon64_sse3",
         .llvm_name = "athlon64-sse3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1212,7 +977,7 @@ pub const cpu = struct {
     pub const atom = Cpu{
         .name = "atom",
         .llvm_name = "atom",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1236,7 +1001,7 @@ pub const cpu = struct {
     pub const barcelona = Cpu{
         .name = "barcelona",
         .llvm_name = "barcelona",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1256,7 +1021,7 @@ pub const cpu = struct {
     pub const bdver1 = Cpu{
         .name = "bdver1",
         .llvm_name = "bdver1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .branchfusion,
@@ -1283,7 +1048,7 @@ pub const cpu = struct {
     pub const bdver2 = Cpu{
         .name = "bdver2",
         .llvm_name = "bdver2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .bmi,
@@ -1315,7 +1080,7 @@ pub const cpu = struct {
     pub const bdver3 = Cpu{
         .name = "bdver3",
         .llvm_name = "bdver3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .bmi,
@@ -1349,7 +1114,7 @@ pub const cpu = struct {
     pub const bdver4 = Cpu{
         .name = "bdver4",
         .llvm_name = "bdver4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .avx2,
@@ -1386,7 +1151,7 @@ pub const cpu = struct {
     pub const bonnell = Cpu{
         .name = "bonnell",
         .llvm_name = "bonnell",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1410,7 +1175,7 @@ pub const cpu = struct {
     pub const broadwell = Cpu{
         .name = "broadwell",
         .llvm_name = "broadwell",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .avx,
@@ -1454,7 +1219,7 @@ pub const cpu = struct {
     pub const btver1 = Cpu{
         .name = "btver1",
         .llvm_name = "btver1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1478,7 +1243,7 @@ pub const cpu = struct {
     pub const btver2 = Cpu{
         .name = "btver2",
         .llvm_name = "btver2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .avx,
@@ -1514,7 +1279,7 @@ pub const cpu = struct {
     pub const c3 = Cpu{
         .name = "c3",
         .llvm_name = "c3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
@@ -1523,7 +1288,7 @@ pub const cpu = struct {
     pub const c3_2 = Cpu{
         .name = "c3_2",
         .llvm_name = "c3-2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -1536,7 +1301,7 @@ pub const cpu = struct {
     pub const cannonlake = Cpu{
         .name = "cannonlake",
         .llvm_name = "cannonlake",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1595,7 +1360,7 @@ pub const cpu = struct {
     pub const cascadelake = Cpu{
         .name = "cascadelake",
         .llvm_name = "cascadelake",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1653,7 +1418,7 @@ pub const cpu = struct {
     pub const cooperlake = Cpu{
         .name = "cooperlake",
         .llvm_name = "cooperlake",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1712,7 +1477,7 @@ pub const cpu = struct {
     pub const core_avx_i = Cpu{
         .name = "core_avx_i",
         .llvm_name = "core-avx-i",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -1744,7 +1509,7 @@ pub const cpu = struct {
     pub const core_avx2 = Cpu{
         .name = "core_avx2",
         .llvm_name = "core-avx2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .avx2,
@@ -1785,7 +1550,7 @@ pub const cpu = struct {
     pub const core2 = Cpu{
         .name = "core2",
         .llvm_name = "core2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1803,7 +1568,7 @@ pub const cpu = struct {
     pub const corei7 = Cpu{
         .name = "corei7",
         .llvm_name = "corei7",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1821,7 +1586,7 @@ pub const cpu = struct {
     pub const corei7_avx = Cpu{
         .name = "corei7_avx",
         .llvm_name = "corei7-avx",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -1850,7 +1615,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -1859,7 +1624,7 @@ pub const cpu = struct {
     pub const geode = Cpu{
         .name = "geode",
         .llvm_name = "geode",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .cx8,
             .slow_unaligned_mem_16,
@@ -1869,7 +1634,7 @@ pub const cpu = struct {
     pub const goldmont = Cpu{
         .name = "goldmont",
         .llvm_name = "goldmont",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .clflushopt,
@@ -1905,7 +1670,7 @@ pub const cpu = struct {
     pub const goldmont_plus = Cpu{
         .name = "goldmont_plus",
         .llvm_name = "goldmont-plus",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .clflushopt,
@@ -1943,7 +1708,7 @@ pub const cpu = struct {
     pub const haswell = Cpu{
         .name = "haswell",
         .llvm_name = "haswell",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .avx2,
@@ -1984,7 +1749,7 @@ pub const cpu = struct {
     pub const _i386 = Cpu{
         .name = "_i386",
         .llvm_name = "i386",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -1992,7 +1757,7 @@ pub const cpu = struct {
     pub const _i486 = Cpu{
         .name = "_i486",
         .llvm_name = "i486",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -2000,7 +1765,7 @@ pub const cpu = struct {
     pub const _i586 = Cpu{
         .name = "_i586",
         .llvm_name = "i586",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2009,7 +1774,7 @@ pub const cpu = struct {
     pub const _i686 = Cpu{
         .name = "_i686",
         .llvm_name = "i686",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .slow_unaligned_mem_16,
@@ -2019,7 +1784,7 @@ pub const cpu = struct {
     pub const icelake_client = Cpu{
         .name = "icelake_client",
         .llvm_name = "icelake-client",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2087,7 +1852,7 @@ pub const cpu = struct {
     pub const icelake_server = Cpu{
         .name = "icelake_server",
         .llvm_name = "icelake-server",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2157,7 +1922,7 @@ pub const cpu = struct {
     pub const ivybridge = Cpu{
         .name = "ivybridge",
         .llvm_name = "ivybridge",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -2189,7 +1954,7 @@ pub const cpu = struct {
     pub const k6 = Cpu{
         .name = "k6",
         .llvm_name = "k6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -2199,7 +1964,7 @@ pub const cpu = struct {
     pub const k6_2 = Cpu{
         .name = "k6_2",
         .llvm_name = "k6-2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
@@ -2209,7 +1974,7 @@ pub const cpu = struct {
     pub const k6_3 = Cpu{
         .name = "k6_3",
         .llvm_name = "k6-3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
@@ -2219,7 +1984,7 @@ pub const cpu = struct {
     pub const k8 = Cpu{
         .name = "k8",
         .llvm_name = "k8",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2236,7 +2001,7 @@ pub const cpu = struct {
     pub const k8_sse3 = Cpu{
         .name = "k8_sse3",
         .llvm_name = "k8-sse3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2254,7 +2019,7 @@ pub const cpu = struct {
     pub const knl = Cpu{
         .name = "knl",
         .llvm_name = "knl",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2297,7 +2062,7 @@ pub const cpu = struct {
     pub const knm = Cpu{
         .name = "knm",
         .llvm_name = "knm",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2341,12 +2106,12 @@ pub const cpu = struct {
     pub const lakemont = Cpu{
         .name = "lakemont",
         .llvm_name = "lakemont",
-        .features = featureSet(&[_]Feature{}),
+        .features = featureSet(&all_features, &[_]Feature{}),
     };
     pub const nehalem = Cpu{
         .name = "nehalem",
         .llvm_name = "nehalem",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2364,7 +2129,7 @@ pub const cpu = struct {
     pub const nocona = Cpu{
         .name = "nocona",
         .llvm_name = "nocona",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2380,7 +2145,7 @@ pub const cpu = struct {
     pub const opteron = Cpu{
         .name = "opteron",
         .llvm_name = "opteron",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2397,7 +2162,7 @@ pub const cpu = struct {
     pub const opteron_sse3 = Cpu{
         .name = "opteron_sse3",
         .llvm_name = "opteron-sse3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2415,7 +2180,7 @@ pub const cpu = struct {
     pub const penryn = Cpu{
         .name = "penryn",
         .llvm_name = "penryn",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2433,7 +2198,7 @@ pub const cpu = struct {
     pub const pentium = Cpu{
         .name = "pentium",
         .llvm_name = "pentium",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2442,7 +2207,7 @@ pub const cpu = struct {
     pub const pentium_m = Cpu{
         .name = "pentium_m",
         .llvm_name = "pentium-m",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2456,7 +2221,7 @@ pub const cpu = struct {
     pub const pentium_mmx = Cpu{
         .name = "pentium_mmx",
         .llvm_name = "pentium-mmx",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -2466,7 +2231,7 @@ pub const cpu = struct {
     pub const pentium2 = Cpu{
         .name = "pentium2",
         .llvm_name = "pentium2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2479,7 +2244,7 @@ pub const cpu = struct {
     pub const pentium3 = Cpu{
         .name = "pentium3",
         .llvm_name = "pentium3",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2493,7 +2258,7 @@ pub const cpu = struct {
     pub const pentium3m = Cpu{
         .name = "pentium3m",
         .llvm_name = "pentium3m",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2507,7 +2272,7 @@ pub const cpu = struct {
     pub const pentium4 = Cpu{
         .name = "pentium4",
         .llvm_name = "pentium4",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2521,7 +2286,7 @@ pub const cpu = struct {
     pub const pentium4m = Cpu{
         .name = "pentium4m",
         .llvm_name = "pentium4m",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2535,7 +2300,7 @@ pub const cpu = struct {
     pub const pentiumpro = Cpu{
         .name = "pentiumpro",
         .llvm_name = "pentiumpro",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .nopl,
@@ -2546,7 +2311,7 @@ pub const cpu = struct {
     pub const prescott = Cpu{
         .name = "prescott",
         .llvm_name = "prescott",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2560,7 +2325,7 @@ pub const cpu = struct {
     pub const sandybridge = Cpu{
         .name = "sandybridge",
         .llvm_name = "sandybridge",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -2589,7 +2354,7 @@ pub const cpu = struct {
     pub const silvermont = Cpu{
         .name = "silvermont",
         .llvm_name = "silvermont",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2617,7 +2382,7 @@ pub const cpu = struct {
     pub const skx = Cpu{
         .name = "skx",
         .llvm_name = "skx",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2674,7 +2439,7 @@ pub const cpu = struct {
     pub const skylake = Cpu{
         .name = "skylake",
         .llvm_name = "skylake",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2725,7 +2490,7 @@ pub const cpu = struct {
     pub const skylake_avx512 = Cpu{
         .name = "skylake_avx512",
         .llvm_name = "skylake-avx512",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2782,7 +2547,7 @@ pub const cpu = struct {
     pub const slm = Cpu{
         .name = "slm",
         .llvm_name = "slm",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2810,7 +2575,7 @@ pub const cpu = struct {
     pub const tremont = Cpu{
         .name = "tremont",
         .llvm_name = "tremont",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .aes,
             .cldemote,
@@ -2853,7 +2618,7 @@ pub const cpu = struct {
     pub const westmere = Cpu{
         .name = "westmere",
         .llvm_name = "westmere",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2872,7 +2637,7 @@ pub const cpu = struct {
     pub const winchip_c6 = Cpu{
         .name = "winchip_c6",
         .llvm_name = "winchip-c6",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .mmx,
             .slow_unaligned_mem_16,
             .x87,
@@ -2881,7 +2646,7 @@ pub const cpu = struct {
     pub const winchip2 = Cpu{
         .name = "winchip2",
         .llvm_name = "winchip2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
@@ -2890,7 +2655,7 @@ pub const cpu = struct {
     pub const x86_64 = Cpu{
         .name = "x86_64",
         .llvm_name = "x86-64",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .cmov,
             .cx8,
@@ -2907,7 +2672,7 @@ pub const cpu = struct {
     pub const yonah = Cpu{
         .name = "yonah",
         .llvm_name = "yonah",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2921,7 +2686,7 @@ pub const cpu = struct {
     pub const znver1 = Cpu{
         .name = "znver1",
         .llvm_name = "znver1",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2965,7 +2730,7 @@ pub const cpu = struct {
     pub const znver2 = Cpu{
         .name = "znver2",
         .llvm_name = "znver2",
-        .features = featureSet(&[_]Feature{
+        .features = featureSet(&all_features, &[_]Feature{
             .@"64bit",
             .adx,
             .aes,
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index a11d3aae88946c4f35db073183bb31e5e51c2efc..e6aa97f32c69915da3c7aadb40a21514976181a7 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -581,8 +581,8 @@ fn cpuFeaturesFromLLVM(
             const this_llvm_name = feature.llvm_name orelse continue;
             if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                 switch (op) {
-                    .add => set.addFeature(@intCast(u8, index)),
-                    .sub => set.removeFeature(@intCast(u8, index)),
+                    .add => set.addSparseFeature(@intCast(u8, index)),
+                    .sub => set.removeSparseFeature(@intCast(u8, index)),
                 }
                 break;
             }
@@ -676,7 +676,7 @@ const Stage2CpuFeatures = struct {
         });
         errdefer allocator.free(builtin_str);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{x}", .{ cpu.name, cpu.features.bytes });
+        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ cpu.name, cpu.features.asBytes() });
         errdefer allocator.free(cache_hash);
 
         self.* = Self{
@@ -699,10 +699,13 @@ const Stage2CpuFeatures = struct {
         defer llvm_features_buffer.deinit();
 
         const all_features = arch.allFeaturesList();
+        var populated_feature_set = feature_set;
+        if (arch.subArchFeature()) |sub_arch_index| {
+            populated_feature_set.addFeature(sub_arch_index, all_features);
+        }
         for (all_features) |feature, index| {
             const llvm_name = feature.llvm_name orelse continue;
-
-            const plus_or_minus = "-+"[@boolToInt(feature_set.isEnabled(@intCast(u8, index)))];
+            const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))];
             try llvm_features_buffer.appendByte(plus_or_minus);
             try llvm_features_buffer.append(llvm_name);
             try llvm_features_buffer.append(",");
@@ -721,7 +724,7 @@ const Stage2CpuFeatures = struct {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.bytes});
+        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.asBytes()});
         errdefer allocator.free(cache_hash);
 
         const generic_arch_name = arch.genericName();
diff --git a/src/all_types.hpp b/src/all_types.hpp
index df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f..fae7dae07709263c473f27ffd08828c9c7873933 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -2144,6 +2144,7 @@ struct CodeGen {
     bool verbose_llvm_ir;
     bool verbose_cimport;
     bool verbose_cc;
+    bool verbose_llvm_cpu_features;
     bool error_during_imports;
     bool generate_error_name_table;
     bool enable_cache; // mutually exclusive with output_dir
diff --git a/src/codegen.cpp b/src/codegen.cpp
index ffdf0e5bb07d1f5d460257057e6d50d1110369d3..f7cfc95b3aa58b66579a5ae2ce4da4456b9a4224 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8802,8 +8802,10 @@ static void init(CodeGen *g) {
         target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
         target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
     }
-    //fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
-    //fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
+    if (g->verbose_llvm_cpu_features) {
+        fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
+        fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
+    }
     
     g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
             target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
diff --git a/src/main.cpp b/src/main.cpp
index d12ae850fa48cf18482c013d0f5650d7ed0f1a4e..bc181f3d5d9f11b9c1856c110937c4bf09205ce3 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
         "  --verbose-llvm-ir            enable compiler debug output for LLVM IR\n"
         "  --verbose-cimport            enable compiler debug output for C imports\n"
         "  --verbose-cc                 enable compiler debug output for C compilation\n"
+        "  --verbose-llvm-cpu-features  enable compiler debug output for LLVM CPU features\n"
         "  -dirafter [dir]              add directory to AFTER include search path\n"
         "  -isystem [dir]               add directory to SYSTEM include search path\n"
         "  -I[dir]                      add directory to include search path\n"
@@ -398,6 +399,7 @@ int main(int argc, char **argv) {
     bool verbose_llvm_ir = false;
     bool verbose_cimport = false;
     bool verbose_cc = false;
+    bool verbose_llvm_cpu_features = false;
     bool link_eh_frame_hdr = false;
     ErrColor color = ErrColorAuto;
     CacheOpt enable_cache = CacheOptAuto;
@@ -614,6 +616,8 @@ int main(int argc, char **argv) {
                 verbose_cimport = true;
             } else if (strcmp(arg, "--verbose-cc") == 0) {
                 verbose_cc = true;
+            } else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) {
+                verbose_llvm_cpu_features = true;
             } else if (strcmp(arg, "-rdynamic") == 0) {
                 rdynamic = true;
             } else if (strcmp(arg, "--each-lib-rpath") == 0) {
@@ -1184,6 +1188,7 @@ int main(int argc, char **argv) {
             g->verbose_llvm_ir = verbose_llvm_ir;
             g->verbose_cimport = verbose_cimport;
             g->verbose_cc = verbose_cc;
+            g->verbose_llvm_cpu_features = verbose_llvm_cpu_features;
             g->output_dir = output_dir;
             g->disable_gen_h = disable_gen_h;
             g->bundle_compiler_rt = bundle_compiler_rt;
-- 
2.54.0


From 68b6867e7689617b3dcef72a88414deaf3ede43b Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 20:11:36 -0500
Subject: [PATCH 087/116] lazily compute the full cpu features dependencies

---
 lib/std/target.zig         |  83 ++----
 lib/std/target/aarch64.zig | 346 +++++++++++-----------
 lib/std/target/amdgpu.zig  | 294 ++++++++++---------
 lib/std/target/arm.zig     | 513 ++++++++++++++++----------------
 lib/std/target/avr.zig     | 583 ++++++++++++++++++-------------------
 lib/std/target/bpf.zig     |  17 +-
 lib/std/target/hexagon.zig |  63 ++--
 lib/std/target/mips.zig    | 133 +++++----
 lib/std/target/msp430.zig  |  15 +-
 lib/std/target/nvptx.zig   |  81 +++---
 lib/std/target/powerpc.zig | 177 ++++++-----
 lib/std/target/riscv.zig   |  25 +-
 lib/std/target/sparc.zig   | 119 ++++----
 lib/std/target/systemz.zig |  95 +++---
 lib/std/target/wasm.zig    |  27 +-
 lib/std/target/x86.zig     | 400 +++++++++++++------------
 src-self-hosted/stage1.zig |   7 +-
 17 files changed, 1459 insertions(+), 1519 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index f5ef5802d653eecc3d35861b4c6099ddee24bd0d..49913de2ee0f6876e334a27a863cdca1e71258d2 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -304,12 +304,12 @@ pub const Target = union(enum) {
                     if (mem.eql(u8, feature_name, feature.name)) {
                         switch (op) {
                             .add => {
-                                baseline_set.addFeature(index, all_features);
-                                whitelist_set.addFeature(index, all_features);
+                                baseline_set.addFeature(index);
+                                whitelist_set.addFeature(index);
                             },
                             .sub => {
-                                baseline_set.removeFeature(index, all_features);
-                                whitelist_set.removeFeature(index, all_features);
+                                baseline_set.removeFeature(index);
+                                whitelist_set.removeFeature(index);
                             },
                         }
                         break;
@@ -580,12 +580,8 @@ pub const Target = union(enum) {
             /// Human-friendly UTF-8 text.
             description: []const u8,
 
-            /// `Set` of all features this depends on, and this feature itself.
-            /// Can be "or"ed with another set to remove this feature and all
-            /// its dependencies.
-            /// Has a default value of `undefined` because the canonical
-            /// structures are populated via comptime logic.
-            dependencies: Set = undefined,
+            /// Sparse `Set` of features this depends on.
+            dependencies: Set,
 
             /// A bit set of all the features.
             pub const Set = struct {
@@ -598,6 +594,9 @@ pub const Target = union(enum) {
                 pub const ShiftInt = std.math.Log2Int(usize);
 
                 pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
+                pub fn empty_workaround() Set {
+                    return Set{ .ints = [1]usize{0} ** usize_count };
+                }
 
                 pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
                     const usize_index = arch_feature_index / @bitSizeOf(usize);
@@ -605,60 +604,28 @@ pub const Target = union(enum) {
                     return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
                 }
 
-                /// Adds the specified feature and all its dependencies to the set. O(1).
-                pub fn addFeature(
-                    set: *Set,
-                    arch_feature_index: Index,
-                    all_features_list: []const Cpu.Feature,
-                ) void {
-                    set.ints = @as(@Vector(usize_count, usize), set.ints) |
-                        @as(@Vector(usize_count, usize), all_features_list[arch_feature_index].dependencies.ints);
-                }
-
-                /// Removes the specified feature (TODO and all its dependents) from the set. O(1).
-                /// TODO improve this function to actually handle dependants rather than just calling
-                /// `removeSparseFeature`.
-                pub fn removeFeature(
-                    set: *Set,
-                    arch_feature_index: Index,
-                    all_features_list: []const Cpu.Feature,
-                ) void {
-                    set.removeSparseFeature(arch_feature_index);
-                }
-
                 /// Adds the specified feature but not its dependencies.
-                pub fn addSparseFeature(set: *Set, arch_feature_index: Index) void {
+                pub fn addFeature(set: *Set, arch_feature_index: Index) void {
                     const usize_index = arch_feature_index / @bitSizeOf(usize);
                     const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
                     set.ints[usize_index] |= @as(usize, 1) << bit_index;
                 }
 
                 /// Removes the specified feature but not its dependents.
-                pub fn removeSparseFeature(set: *Set, arch_feature_index: Index) void {
+                pub fn removeFeature(set: *Set, arch_feature_index: Index) void {
                     const usize_index = arch_feature_index / @bitSizeOf(usize);
                     const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
                     set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
                 }
 
-                pub fn initAsDependencies(
-                    set: *Set,
-                    arch_feature_index: Index,
-                    all_features_list: []const Cpu.Feature,
-                ) void {
-                    // fast-case to help reduce how much comptime code must execute
-                    const no_deps = for (set.ints) |elem| {
-                        if (elem != 0) break false;
-                    } else true;
-                    // add itself to its own dependencies for easy "or"ing later
-                    set.addSparseFeature(arch_feature_index);
-                    if (no_deps) return;
-
+                pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void {
                     var old = set.ints;
                     while (true) {
-                        for (all_features_list) |feature, index| {
-                            const casted_index = @intCast(Index, index);
-                            if (set.isEnabled(casted_index)) {
-                                set.addFeature(casted_index, all_features_list);
+                        for (all_features_list) |feature, index_usize| {
+                            const index = @intCast(Index, index_usize);
+                            if (set.isEnabled(index)) {
+                                set.ints = @as(@Vector(usize_count, usize), set.ints) |
+                                    @as(@Vector(usize_count, usize), feature.dependencies.ints);
                             }
                         }
                         const nothing_changed = mem.eql(usize, &old, &set.ints);
@@ -674,21 +641,11 @@ pub const Target = union(enum) {
 
             pub fn feature_set_fns(comptime F: type) type {
                 return struct {
-                    /// Populates a set with the list of features and all their dependencies included.
-                    pub fn featureSet(all_features_list: []const Feature, features: []const F) Set {
-                        var x: Set = Set.empty;
-                        for (features) |feature| {
-                            x.addFeature(@enumToInt(feature), all_features_list);
-                        }
-                        @compileLog(Set.empty);
-                        return x;
-                    }
-
                     /// Populates only the feature bits specified.
-                    pub fn sparseFeatureSet(features: []const F) Set {
-                        var x = Set.empty;
+                    pub fn featureSet(features: []const F) Set {
+                        var x = Set.empty_workaround(); // TODO remove empty_workaround
                         for (features) |feature| {
-                            x.addSparseFeature(@enumToInt(feature));
+                            x.addFeature(@enumToInt(feature));
                         }
                         return x;
                     }
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 3ddec8229855af6b0b0dc3a6f9a5ba3ceb2bf9e3..4639fe6dcc4eb04ede4b884c749373964a927d76 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -153,14 +153,13 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
-    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.a35)] = .{
         .llvm_name = "a35",
         .description = "Cortex-A35 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -171,7 +170,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a53)] = .{
         .llvm_name = "a53",
         .description = "Cortex-A53 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .balance_fp_ops,
             .crc,
             .crypto,
@@ -187,7 +186,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a55)] = .{
         .llvm_name = "a55",
         .description = "Cortex-A55 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -202,7 +201,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a57)] = .{
         .llvm_name = "a57",
         .description = "Cortex-A57 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .balance_fp_ops,
             .crc,
             .crypto,
@@ -219,7 +218,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a72)] = .{
         .llvm_name = "a72",
         .description = "Cortex-A72 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -231,7 +230,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a73)] = .{
         .llvm_name = "a73",
         .description = "Cortex-A73 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -243,7 +242,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a75)] = .{
         .llvm_name = "a75",
         .description = "Cortex-A75 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -258,7 +257,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.a76)] = .{
         .llvm_name = "a76",
         .description = "Cortex-A76 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crypto,
             .dotprod,
             .fp_armv8,
@@ -272,126 +271,126 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.aes)] = .{
         .llvm_name = "aes",
         .description = "Enable AES support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.aggressive_fma)] = .{
         .llvm_name = "aggressive-fma",
         .description = "Enable Aggressive FMA for floating-point.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
         .llvm_name = "alternate-sextload-cvt-f32-pattern",
         .description = "Use alternative pattern for sextload convert to f32",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altnzcv)] = .{
         .llvm_name = "altnzcv",
         .description = "Enable alternative NZCV format for floating point comparisons",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.am)] = .{
         .llvm_name = "am",
         .description = "Enable v8.4-A Activity Monitors extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_bcc_fusion)] = .{
         .llvm_name = "arith-bcc-fusion",
         .description = "CPU fuses arithmetic+bcc operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.arith_cbz_fusion)] = .{
         .llvm_name = "arith-cbz-fusion",
         .description = "CPU fuses arithmetic + cbz/cbnz operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.balance_fp_ops)] = .{
         .llvm_name = "balance-fp-ops",
         .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bti)] = .{
         .llvm_name = "bti",
         .description = "Enable Branch Target Identification",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x10)] = .{
         .llvm_name = "call-saved-x10",
         .description = "Make X10 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x11)] = .{
         .llvm_name = "call-saved-x11",
         .description = "Make X11 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x12)] = .{
         .llvm_name = "call-saved-x12",
         .description = "Make X12 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x13)] = .{
         .llvm_name = "call-saved-x13",
         .description = "Make X13 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x14)] = .{
         .llvm_name = "call-saved-x14",
         .description = "Make X14 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x15)] = .{
         .llvm_name = "call-saved-x15",
         .description = "Make X15 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x18)] = .{
         .llvm_name = "call-saved-x18",
         .description = "Make X18 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x8)] = .{
         .llvm_name = "call-saved-x8",
         .description = "Make X8 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.call_saved_x9)] = .{
         .llvm_name = "call-saved-x9",
         .description = "Make X9 callee saved.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccdp)] = .{
         .llvm_name = "ccdp",
         .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccidx)] = .{
         .llvm_name = "ccidx",
         .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ccpp)] = .{
         .llvm_name = "ccpp",
         .description = "Enable v8.2 data Cache Clean to Point of Persistence",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.complxnum)] = .{
         .llvm_name = "complxnum",
         .description = "Enable v8.3-A Floating-point complex number support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.crc)] = .{
         .llvm_name = "crc",
         .description = "Enable ARMv8 CRC-32 checksum instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .llvm_name = "crypto",
         .description = "Enable cryptographic instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aes,
             .neon,
             .sha2,
@@ -400,12 +399,12 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.custom_cheap_as_move)] = .{
         .llvm_name = "custom-cheap-as-move",
         .description = "Use custom handling of cheap instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cyclone)] = .{
         .llvm_name = "cyclone",
         .description = "Cyclone",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .alternate_sextload_cvt_f32_pattern,
             .arith_bcc_fusion,
             .arith_cbz_fusion,
@@ -424,29 +423,29 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
         .llvm_name = "disable-latency-sched-heuristic",
         .description = "Disable latency scheduling heuristic",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dit)] = .{
         .llvm_name = "dit",
         .description = "Enable v8.4-A Data Independent Timing instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
         .llvm_name = "dotprod",
         .description = "Enable dot product support",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
         .llvm_name = "exynos-cheap-as-move",
         .description = "Use Exynos specific handling of cheap instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .custom_cheap_as_move,
         }),
     };
     result[@enumToInt(Feature.exynosm1)] = .{
         .llvm_name = "exynosm1",
         .description = "Samsung Exynos-M1 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -463,7 +462,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.exynosm2)] = .{
         .llvm_name = "exynosm2",
         .description = "Samsung Exynos-M2 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -479,7 +478,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.exynosm3)] = .{
         .llvm_name = "exynosm3",
         .description = "Samsung Exynos-M3 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .exynos_cheap_as_move,
@@ -498,7 +497,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.exynosm4)] = .{
         .llvm_name = "exynosm4",
         .description = "Samsung Exynos-M4 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .arith_bcc_fusion,
             .arith_cbz_fusion,
             .crypto,
@@ -521,7 +520,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.falkor)] = .{
         .llvm_name = "falkor",
         .description = "Qualcomm Falkor processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .custom_cheap_as_move,
@@ -539,78 +538,78 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fmi)] = .{
         .llvm_name = "fmi",
         .description = "Enable v8.4-A Flag Manipulation Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
         .llvm_name = "force-32bit-jump-tables",
         .description = "Force jump table entries to be 32-bits wide except at MinSize",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_armv8)] = .{
         .llvm_name = "fp-armv8",
         .description = "Enable ARMv8 FP",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
         .llvm_name = "fp16fml",
         .description = "Enable FP16 FML instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fullfp16,
         }),
     };
     result[@enumToInt(Feature.fptoint)] = .{
         .llvm_name = "fptoint",
         .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fullfp16)] = .{
         .llvm_name = "fullfp16",
         .description = "Full FP16",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.fuse_address)] = .{
         .llvm_name = "fuse-address",
         .description = "CPU fuses address generation and memory operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_aes)] = .{
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_arith_logic)] = .{
         .llvm_name = "fuse-arith-logic",
         .description = "CPU fuses arithmetic and logic operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_crypto_eor)] = .{
         .llvm_name = "fuse-crypto-eor",
         .description = "CPU fuses AES/PMULL and EOR operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_csel)] = .{
         .llvm_name = "fuse-csel",
         .description = "CPU fuses conditional select operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jsconv)] = .{
         .llvm_name = "jsconv",
         .description = "Enable v8.3-A JavaScript FP conversion enchancement",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.kryo)] = .{
         .llvm_name = "kryo",
         .description = "Qualcomm Kryo processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .custom_cheap_as_move,
@@ -626,235 +625,235 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.lor)] = .{
         .llvm_name = "lor",
         .description = "Enables ARM v8.1 Limited Ordering Regions extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lse)] = .{
         .llvm_name = "lse",
         .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lsl_fast)] = .{
         .llvm_name = "lsl-fast",
         .description = "CPU has a fastpath logical shift of up to 3 places",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpam)] = .{
         .llvm_name = "mpam",
         .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mte)] = .{
         .llvm_name = "mte",
         .description = "Enable Memory Tagging Extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
         .llvm_name = "neon",
         .description = "Enable Advanced SIMD instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8,
         }),
     };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nv)] = .{
         .llvm_name = "nv",
         .description = "Enable v8.4-A Nested Virtualization Enchancement",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pa)] = .{
         .llvm_name = "pa",
         .description = "Enable v8.3-A Pointer Authentication enchancement",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan)] = .{
         .llvm_name = "pan",
         .description = "Enables ARM v8.1 Privileged Access-Never extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pan_rwv)] = .{
         .llvm_name = "pan-rwv",
         .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .pan,
         }),
     };
     result[@enumToInt(Feature.perfmon)] = .{
         .llvm_name = "perfmon",
         .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predictable_select_expensive)] = .{
         .llvm_name = "predictable-select-expensive",
         .description = "Prefer likely predicted branches over selects",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.predres)] = .{
         .llvm_name = "predres",
         .description = "Enable v8.5a execution and data prediction invalidation instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rand)] = .{
         .llvm_name = "rand",
         .description = "Enable Random Number generation instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
         .llvm_name = "ras",
         .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rasv8_4)] = .{
         .llvm_name = "rasv8_4",
         .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .ras,
         }),
     };
     result[@enumToInt(Feature.rcpc)] = .{
         .llvm_name = "rcpc",
         .description = "Enable support for RCPC extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rcpc_immo)] = .{
         .llvm_name = "rcpc-immo",
         .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .rcpc,
         }),
     };
     result[@enumToInt(Feature.rdm)] = .{
         .llvm_name = "rdm",
         .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x1)] = .{
         .llvm_name = "reserve-x1",
         .description = "Reserve X1, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x10)] = .{
         .llvm_name = "reserve-x10",
         .description = "Reserve X10, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x11)] = .{
         .llvm_name = "reserve-x11",
         .description = "Reserve X11, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x12)] = .{
         .llvm_name = "reserve-x12",
         .description = "Reserve X12, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x13)] = .{
         .llvm_name = "reserve-x13",
         .description = "Reserve X13, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x14)] = .{
         .llvm_name = "reserve-x14",
         .description = "Reserve X14, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x15)] = .{
         .llvm_name = "reserve-x15",
         .description = "Reserve X15, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x18)] = .{
         .llvm_name = "reserve-x18",
         .description = "Reserve X18, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x2)] = .{
         .llvm_name = "reserve-x2",
         .description = "Reserve X2, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x20)] = .{
         .llvm_name = "reserve-x20",
         .description = "Reserve X20, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x21)] = .{
         .llvm_name = "reserve-x21",
         .description = "Reserve X21, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x22)] = .{
         .llvm_name = "reserve-x22",
         .description = "Reserve X22, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x23)] = .{
         .llvm_name = "reserve-x23",
         .description = "Reserve X23, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x24)] = .{
         .llvm_name = "reserve-x24",
         .description = "Reserve X24, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x25)] = .{
         .llvm_name = "reserve-x25",
         .description = "Reserve X25, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x26)] = .{
         .llvm_name = "reserve-x26",
         .description = "Reserve X26, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x27)] = .{
         .llvm_name = "reserve-x27",
         .description = "Reserve X27, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x28)] = .{
         .llvm_name = "reserve-x28",
         .description = "Reserve X28, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x3)] = .{
         .llvm_name = "reserve-x3",
         .description = "Reserve X3, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x4)] = .{
         .llvm_name = "reserve-x4",
         .description = "Reserve X4, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x5)] = .{
         .llvm_name = "reserve-x5",
         .description = "Reserve X5, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x6)] = .{
         .llvm_name = "reserve-x6",
         .description = "Reserve X6, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x7)] = .{
         .llvm_name = "reserve-x7",
         .description = "Reserve X7, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_x9)] = .{
         .llvm_name = "reserve-x9",
         .description = "Reserve X9, making it unavailable as a GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.saphira)] = .{
         .llvm_name = "saphira",
         .description = "Qualcomm Saphira processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crypto,
             .custom_cheap_as_move,
             .fp_armv8,
@@ -871,24 +870,24 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sb)] = .{
         .llvm_name = "sb",
         .description = "Enable v8.5 Speculation Barrier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sel2)] = .{
         .llvm_name = "sel2",
         .description = "Enable v8.4-A Secure Exception Level 2 extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
         .llvm_name = "sha2",
         .description = "Enable SHA1 and SHA256 support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.sha3)] = .{
         .llvm_name = "sha3",
         .description = "Enable SHA512 and SHA3 support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
             .sha2,
         }),
@@ -896,61 +895,61 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.slow_misaligned_128store)] = .{
         .llvm_name = "slow-misaligned-128store",
         .description = "Misaligned 128 bit stores are slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_paired_128)] = .{
         .llvm_name = "slow-paired-128",
         .description = "Paired 128 bit loads and stores are slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_strqro_store)] = .{
         .llvm_name = "slow-strqro-store",
         .description = "STR of Q register with register offset is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm4)] = .{
         .llvm_name = "sm4",
         .description = "Enable SM3 and SM4 support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.spe)] = .{
         .llvm_name = "spe",
         .description = "Enable Statistical Profiling extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.specrestrict)] = .{
         .llvm_name = "specrestrict",
         .description = "Enable architectural speculation restriction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ssbs)] = .{
         .llvm_name = "ssbs",
         .description = "Enable Speculative Store Bypass Safe bit",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.strict_align)] = .{
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve)] = .{
         .llvm_name = "sve",
         .description = "Enable Scalable Vector Extension (SVE) instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sve2)] = .{
         .llvm_name = "sve2",
         .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sve,
         }),
     };
     result[@enumToInt(Feature.sve2_aes)] = .{
         .llvm_name = "sve2-aes",
         .description = "Enable AES SVE2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aes,
             .sve2,
         }),
@@ -958,14 +957,14 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sve2_bitperm)] = .{
         .llvm_name = "sve2-bitperm",
         .description = "Enable bit permutation SVE2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sve2,
         }),
     };
     result[@enumToInt(Feature.sve2_sha3)] = .{
         .llvm_name = "sve2-sha3",
         .description = "Enable SHA3 SVE2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sha3,
             .sve2,
         }),
@@ -973,7 +972,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sve2_sm4)] = .{
         .llvm_name = "sve2-sm4",
         .description = "Enable SM4 SVE2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sm4,
             .sve2,
         }),
@@ -981,7 +980,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.thunderx)] = .{
         .llvm_name = "thunderx",
         .description = "Cavium ThunderX processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -994,7 +993,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.thunderx2t99)] = .{
         .llvm_name = "thunderx2t99",
         .description = "Cavium ThunderX2 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aggressive_fma,
             .arith_bcc_fusion,
             .crc,
@@ -1010,7 +1009,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.thunderxt81)] = .{
         .llvm_name = "thunderxt81",
         .description = "Cavium ThunderX processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1023,7 +1022,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.thunderxt83)] = .{
         .llvm_name = "thunderxt83",
         .description = "Cavium ThunderX processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1036,7 +1035,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.thunderxt88)] = .{
         .llvm_name = "thunderxt88",
         .description = "Cavium ThunderX processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .fp_armv8,
@@ -1049,32 +1048,32 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.tlb_rmi)] = .{
         .llvm_name = "tlb-rmi",
         .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el1)] = .{
         .llvm_name = "tpidr-el1",
         .description = "Permit use of TPIDR_EL1 for the TLS base",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el2)] = .{
         .llvm_name = "tpidr-el2",
         .description = "Permit use of TPIDR_EL2 for the TLS base",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tpidr_el3)] = .{
         .llvm_name = "tpidr-el3",
         .description = "Permit use of TPIDR_EL3 for the TLS base",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tracev8_4)] = .{
         .llvm_name = "tracev8.4",
         .description = "Enable v8.4-A Trace extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tsv110)] = .{
         .llvm_name = "tsv110",
         .description = "HiSilicon TS-V110 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crypto,
             .custom_cheap_as_move,
             .dotprod,
@@ -1092,27 +1091,27 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.uaops)] = .{
         .llvm_name = "uaops",
         .description = "Enable v8.2 UAO PState",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_postra_scheduler)] = .{
         .llvm_name = "use-postra-scheduler",
         .description = "Schedule again after register allocation",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
         .llvm_name = "use-reciprocal-square-root",
         .description = "Use the reciprocal square root approximation",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8_1a)] = .{
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .lor,
             .lse,
@@ -1124,7 +1123,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_2a)] = .{
         .llvm_name = "v8.2a",
         .description = "Support ARM v8.2a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .ccpp,
             .pan_rwv,
             .ras,
@@ -1135,7 +1134,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_3a)] = .{
         .llvm_name = "v8.3a",
         .description = "Support ARM v8.3a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .ccidx,
             .complxnum,
             .jsconv,
@@ -1147,7 +1146,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_4a)] = .{
         .llvm_name = "v8.4a",
         .description = "Support ARM v8.4a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .am,
             .dit,
             .dotprod,
@@ -1165,7 +1164,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_5a)] = .{
         .llvm_name = "v8.5a",
         .description = "Support ARM v8.5a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .altnzcv,
             .bti,
             .ccdp,
@@ -1180,17 +1179,17 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vh)] = .{
         .llvm_name = "vh",
         .description = "Enables ARM v8.1 Virtual Host extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcm)] = .{
         .llvm_name = "zcm",
         .description = "Has zero-cycle register moves",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz)] = .{
         .llvm_name = "zcz",
         .description = "Has zero-cycle zeroing instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .zcz_fp,
             .zcz_gp,
         }),
@@ -1198,23 +1197,22 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.zcz_fp)] = .{
         .llvm_name = "zcz-fp",
         .description = "Has zero-cycle zeroing instructions for FP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_fp_workaround)] = .{
         .llvm_name = "zcz-fp-workaround",
         .description = "The zero-cycle floating-point zeroing instruction has a bug",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zcz_gp)] = .{
         .llvm_name = "zcz-gp",
         .description = "Has zero-cycle zeroing instructions for generic registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -1223,126 +1221,126 @@ pub const cpu = struct {
     pub const apple_latest = Cpu{
         .name = "apple_latest",
         .llvm_name = "apple-latest",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cyclone,
         }),
     };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a35,
         }),
     };
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a53,
         }),
     };
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a55,
         }),
     };
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a57,
         }),
     };
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a72,
         }),
     };
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a73,
         }),
     };
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a75,
         }),
     };
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a76,
         }),
     };
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a76,
         }),
     };
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cyclone,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .exynosm1,
         }),
     };
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .exynosm2,
         }),
     };
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .exynosm3,
         }),
     };
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .exynosm4,
         }),
     };
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .exynosm4,
         }),
     };
     pub const falkor = Cpu{
         .name = "falkor",
         .llvm_name = "falkor",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .falkor,
         }),
     };
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fp_armv8,
             .fuse_aes,
             .neon,
@@ -1353,56 +1351,56 @@ pub const cpu = struct {
     pub const kryo = Cpu{
         .name = "kryo",
         .llvm_name = "kryo",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .kryo,
         }),
     };
     pub const saphira = Cpu{
         .name = "saphira",
         .llvm_name = "saphira",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .saphira,
         }),
     };
     pub const thunderx = Cpu{
         .name = "thunderx",
         .llvm_name = "thunderx",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .thunderx,
         }),
     };
     pub const thunderx2t99 = Cpu{
         .name = "thunderx2t99",
         .llvm_name = "thunderx2t99",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .thunderx2t99,
         }),
     };
     pub const thunderxt81 = Cpu{
         .name = "thunderxt81",
         .llvm_name = "thunderxt81",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .thunderxt81,
         }),
     };
     pub const thunderxt83 = Cpu{
         .name = "thunderxt83",
         .llvm_name = "thunderxt83",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .thunderxt83,
         }),
     };
     pub const thunderxt88 = Cpu{
         .name = "thunderxt88",
         .llvm_name = "thunderxt88",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .thunderxt88,
         }),
     };
     pub const tsv110 = Cpu{
         .name = "tsv110",
         .llvm_name = "tsv110",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .tsv110,
         }),
     };
diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig
index 54bd073c2c0a4551596f259371b58d03f5423a52..182b9fa45375f6e04459d7ac1cb8228e6974471c 100644
--- a/lib/std/target/amdgpu.zig
+++ b/lib/std/target/amdgpu.zig
@@ -114,186 +114,185 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
-    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"16_bit_insts")] = .{
         .llvm_name = "16-bit-insts",
         .description = "Has i16/f16 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.DumpCode)] = .{
         .llvm_name = "DumpCode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.add_no_carry_insts)] = .{
         .llvm_name = "add-no-carry-insts",
         .description = "Have VALU add/sub instructions without carry out",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aperture_regs)] = .{
         .llvm_name = "aperture-regs",
         .description = "Has Memory Aperture Base and Size Registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.atomic_fadd_insts)] = .{
         .llvm_name = "atomic-fadd-insts",
         .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
         .llvm_name = "auto-waitcnt-before-barrier",
         .description = "Hardware automatically inserts waitcnt before barrier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ci_insts)] = .{
         .llvm_name = "ci-insts",
         .description = "Additional instructions for CI+",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.code_object_v3)] = .{
         .llvm_name = "code-object-v3",
         .description = "Generate code object version 3",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cumode)] = .{
         .llvm_name = "cumode",
         .description = "Enable CU wavefront execution mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dl_insts)] = .{
         .llvm_name = "dl-insts",
         .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot1_insts)] = .{
         .llvm_name = "dot1-insts",
         .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot2_insts)] = .{
         .llvm_name = "dot2-insts",
         .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot3_insts)] = .{
         .llvm_name = "dot3-insts",
         .description = "Has v_dot8c_i32_i4 instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot4_insts)] = .{
         .llvm_name = "dot4-insts",
         .description = "Has v_dot2c_i32_i16 instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot5_insts)] = .{
         .llvm_name = "dot5-insts",
         .description = "Has v_dot2c_f32_f16 instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dot6_insts)] = .{
         .llvm_name = "dot6-insts",
         .description = "Has v_dot4c_i32_i8 instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp)] = .{
         .llvm_name = "dpp",
         .description = "Support DPP (Data Parallel Primitives) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dpp8)] = .{
         .llvm_name = "dpp8",
         .description = "Support DPP8 (Data Parallel Primitives) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dumpcode)] = .{
         .llvm_name = "dumpcode",
         .description = "Dump MachineInstrs in the CodeEmitter",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_ds128)] = .{
         .llvm_name = "enable-ds128",
         .description = "Use ds_read|write_b128",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enable_prt_strict_null)] = .{
         .llvm_name = "enable-prt-strict-null",
         .description = "Enable zeroing of result registers for sparse texture fetches",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_fmaf)] = .{
         .llvm_name = "fast-fmaf",
         .description = "Assuming f32 fma is at least as fast as mul + add",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_address_space)] = .{
         .llvm_name = "flat-address-space",
         .description = "Support flat address space",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_for_global)] = .{
         .llvm_name = "flat-for-global",
         .description = "Force to generate flat instruction for global",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_global_insts)] = .{
         .llvm_name = "flat-global-insts",
         .description = "Have global_* flat memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_inst_offsets)] = .{
         .llvm_name = "flat-inst-offsets",
         .description = "Flat instructions have immediate offset addressing mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_scratch_insts)] = .{
         .llvm_name = "flat-scratch-insts",
         .description = "Have scratch_* flat memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
         .llvm_name = "flat-segment-offset-bug",
         .description = "GFX10 bug, inst_offset ignored in flat segment",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma_mix_insts)] = .{
         .llvm_name = "fma-mix-insts",
         .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fmaf)] = .{
         .llvm_name = "fmaf",
         .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_exceptions)] = .{
         .llvm_name = "fp-exceptions",
         .description = "Enable floating point exceptions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16_denormals)] = .{
         .llvm_name = "fp16-denormals",
         .description = "Enable half precision denormal handling",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64_fp16_denormals,
         }),
     };
     result[@enumToInt(Feature.fp32_denormals)] = .{
         .llvm_name = "fp32-denormals",
         .description = "Enable single precision denormal handling",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
         .llvm_name = "fp64",
         .description = "Enable double precision operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64_denormals)] = .{
         .llvm_name = "fp64-denormals",
         .description = "Enable double and half precision denormal handling",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
             .fp64_fp16_denormals,
         }),
@@ -301,19 +300,19 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
         .llvm_name = "fp64-fp16-denormals",
         .description = "Enable double and half precision denormal handling",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
         }),
     };
     result[@enumToInt(Feature.gcn3_encoding)] = .{
         .llvm_name = "gcn3-encoding",
         .description = "Encoding format for VI",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx10)] = .{
         .llvm_name = "gfx10",
         .description = "GFX10 GPU generation",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"16_bit_insts",
             .add_no_carry_insts,
             .aperture_regs,
@@ -353,22 +352,22 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.gfx10_insts)] = .{
         .llvm_name = "gfx10-insts",
         .description = "Additional instructions for GFX10+",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
         .llvm_name = "gfx7-gfx8-gfx9-insts",
         .description = "Instructions shared in GFX7, GFX8, GFX9",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx8_insts)] = .{
         .llvm_name = "gfx8-insts",
         .description = "Additional instructions for GFX8+",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfx9)] = .{
         .llvm_name = "gfx9",
         .description = "GFX9 GPU generation",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"16_bit_insts",
             .add_no_carry_insts,
             .aperture_regs,
@@ -404,212 +403,212 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.gfx9_insts)] = .{
         .llvm_name = "gfx9-insts",
         .description = "Additional instructions for GFX9+",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.half_rate_64_ops)] = .{
         .llvm_name = "half-rate-64-ops",
         .description = "Most fp64 instructions are half rate instead of quarter",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
         .llvm_name = "inst-fwd-prefetch-bug",
         .description = "S_INST_PREFETCH instruction causes shader to hang",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.int_clamp_insts)] = .{
         .llvm_name = "int-clamp-insts",
         .description = "Support clamp for integer destination",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
         .llvm_name = "inv-2pi-inline-imm",
         .description = "Has 1 / (2 * pi) as inline immediate",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
         .llvm_name = "lds-branch-vmem-war-hazard",
         .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lds_misaligned_bug)] = .{
         .llvm_name = "lds-misaligned-bug",
         .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount16)] = .{
         .llvm_name = "ldsbankcount16",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldsbankcount32)] = .{
         .llvm_name = "ldsbankcount32",
         .description = "The number of LDS banks per compute unit.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_opt)] = .{
         .llvm_name = "load-store-opt",
         .description = "Enable SI load/store optimizer pass",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize0)] = .{
         .llvm_name = "localmemorysize0",
         .description = "The size of local memory in bytes",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize32768)] = .{
         .llvm_name = "localmemorysize32768",
         .description = "The size of local memory in bytes",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.localmemorysize65536)] = .{
         .llvm_name = "localmemorysize65536",
         .description = "The size of local memory in bytes",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mad_mix_insts)] = .{
         .llvm_name = "mad-mix-insts",
         .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mai_insts)] = .{
         .llvm_name = "mai-insts",
         .description = "Has mAI instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_16)] = .{
         .llvm_name = "max-private-element-size-16",
         .description = "Maximum private access size may be 16",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_4)] = .{
         .llvm_name = "max-private-element-size-4",
         .description = "Maximum private access size may be 4",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.max_private_element_size_8)] = .{
         .llvm_name = "max-private-element-size-8",
         .description = "Maximum private access size may be 8",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mimg_r128)] = .{
         .llvm_name = "mimg-r128",
         .description = "Support 128-bit texture resources",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movrel)] = .{
         .llvm_name = "movrel",
         .description = "Has v_movrel*_b32 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_data_dep_hazard)] = .{
         .llvm_name = "no-data-dep-hazard",
         .description = "Does not need SW waitstates",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sdst_cmpx)] = .{
         .llvm_name = "no-sdst-cmpx",
         .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_sram_ecc_support)] = .{
         .llvm_name = "no-sram-ecc-support",
         .description = "Hardware does not support SRAM ECC",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_xnack_support)] = .{
         .llvm_name = "no-xnack-support",
         .description = "Hardware does not support XNACK",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_encoding)] = .{
         .llvm_name = "nsa-encoding",
         .description = "Support NSA encoding for image instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
         .llvm_name = "nsa-to-vmem-bug",
         .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.offset_3f_bug)] = .{
         .llvm_name = "offset-3f-bug",
         .description = "Branch offset of 3f hardware bug",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
         .llvm_name = "pk-fmac-f16-inst",
         .description = "Has v_pk_fmac_f16 instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.promote_alloca)] = .{
         .llvm_name = "promote-alloca",
         .description = "Enable promote alloca pass",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r128_a16)] = .{
         .llvm_name = "r128-a16",
         .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.register_banking)] = .{
         .llvm_name = "register-banking",
         .description = "Has register banking",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.s_memrealtime)] = .{
         .llvm_name = "s-memrealtime",
         .description = "Has s_memrealtime instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_atomics)] = .{
         .llvm_name = "scalar-atomics",
         .description = "Has atomic scalar memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
         .llvm_name = "scalar-flat-scratch-insts",
         .description = "Have s_scratch_* flat memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.scalar_stores)] = .{
         .llvm_name = "scalar-stores",
         .description = "Has store scalar memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa)] = .{
         .llvm_name = "sdwa",
         .description = "Support SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_mav)] = .{
         .llvm_name = "sdwa-mav",
         .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_omod)] = .{
         .llvm_name = "sdwa-omod",
         .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
         .llvm_name = "sdwa-out-mods-vopc",
         .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_scalar)] = .{
         .llvm_name = "sdwa-scalar",
         .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sdwa_sdst)] = .{
         .llvm_name = "sdwa-sdst",
         .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sea_islands)] = .{
         .llvm_name = "sea-islands",
         .description = "SEA_ISLANDS GPU generation",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .ci_insts,
             .flat_address_space,
             .fp64,
@@ -625,22 +624,22 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sgpr_init_bug)] = .{
         .llvm_name = "sgpr-init-bug",
         .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.si_scheduler)] = .{
         .llvm_name = "si-scheduler",
         .description = "Enable SI Machine Scheduler",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
         .llvm_name = "smem-to-vector-write-hazard",
         .description = "s_load_dword followed by v_cmp page faults",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.southern_islands)] = .{
         .llvm_name = "southern-islands",
         .description = "SOUTHERN_ISLANDS GPU generation",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
             .ldsbankcount32,
             .localmemorysize32768,
@@ -655,62 +654,62 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.sram_ecc)] = .{
         .llvm_name = "sram-ecc",
         .description = "Enable SRAM ECC",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trap_handler)] = .{
         .llvm_name = "trap-handler",
         .description = "Trap handler support",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trig_reduced_range)] = .{
         .llvm_name = "trig-reduced-range",
         .description = "Requires use of fract on arguments to trig instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_buffer_access)] = .{
         .llvm_name = "unaligned-buffer-access",
         .description = "Support unaligned global loads and stores",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unaligned_scratch_access)] = .{
         .llvm_name = "unaligned-scratch-access",
         .description = "Support unaligned scratch loads and stores",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
         .llvm_name = "unpacked-d16-vmem",
         .description = "Has unpacked d16 vmem instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
         .llvm_name = "unsafe-ds-offset-folding",
         .description = "Force using DS instruction immediate offsets on SI",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
         .llvm_name = "vcmpx-exec-war-hazard",
         .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
         .llvm_name = "vcmpx-permlane-hazard",
         .description = "TODO: describe me",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vgpr_index_mode)] = .{
         .llvm_name = "vgpr-index-mode",
         .description = "Has VGPR mode register indexing",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
         .llvm_name = "vmem-to-scalar-write-hazard",
         .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.volcanic_islands)] = .{
         .llvm_name = "volcanic-islands",
         .description = "VOLCANIC_ISLANDS GPU generation",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"16_bit_insts",
             .ci_insts,
             .dpp,
@@ -738,43 +737,42 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vop3_literal)] = .{
         .llvm_name = "vop3-literal",
         .description = "Can use one literal in VOP3",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vop3p)] = .{
         .llvm_name = "vop3p",
         .description = "Has VOP3P packed instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vscnt)] = .{
         .llvm_name = "vscnt",
         .description = "Has separate store vscnt counter",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize16)] = .{
         .llvm_name = "wavefrontsize16",
         .description = "The number of threads per wavefront",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize32)] = .{
         .llvm_name = "wavefrontsize32",
         .description = "The number of threads per wavefront",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wavefrontsize64)] = .{
         .llvm_name = "wavefrontsize64",
         .description = "The number of threads per wavefront",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xnack)] = .{
         .llvm_name = "xnack",
         .description = "Enable XNACK support",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -783,7 +781,7 @@ pub const cpu = struct {
     pub const bonaire = Cpu{
         .name = "bonaire",
         .llvm_name = "bonaire",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -793,7 +791,7 @@ pub const cpu = struct {
     pub const carrizo = Cpu{
         .name = "carrizo",
         .llvm_name = "carrizo",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -806,7 +804,7 @@ pub const cpu = struct {
     pub const fiji = Cpu{
         .name = "fiji",
         .llvm_name = "fiji",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -817,14 +815,14 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .wavefrontsize64,
         }),
     };
     pub const generic_hsa = Cpu{
         .name = "generic_hsa",
         .llvm_name = "generic-hsa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .flat_address_space,
             .wavefrontsize64,
         }),
@@ -832,7 +830,7 @@ pub const cpu = struct {
     pub const gfx1010 = Cpu{
         .name = "gfx1010",
         .llvm_name = "gfx1010",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .dl_insts,
             .flat_segment_offset_bug,
@@ -858,7 +856,7 @@ pub const cpu = struct {
     pub const gfx1011 = Cpu{
         .name = "gfx1011",
         .llvm_name = "gfx1011",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -887,7 +885,7 @@ pub const cpu = struct {
     pub const gfx1012 = Cpu{
         .name = "gfx1012",
         .llvm_name = "gfx1012",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -917,7 +915,7 @@ pub const cpu = struct {
     pub const gfx600 = Cpu{
         .name = "gfx600",
         .llvm_name = "gfx600",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -929,7 +927,7 @@ pub const cpu = struct {
     pub const gfx601 = Cpu{
         .name = "gfx601",
         .llvm_name = "gfx601",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -939,7 +937,7 @@ pub const cpu = struct {
     pub const gfx700 = Cpu{
         .name = "gfx700",
         .llvm_name = "gfx700",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -949,7 +947,7 @@ pub const cpu = struct {
     pub const gfx701 = Cpu{
         .name = "gfx701",
         .llvm_name = "gfx701",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -961,7 +959,7 @@ pub const cpu = struct {
     pub const gfx702 = Cpu{
         .name = "gfx702",
         .llvm_name = "gfx702",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .ldsbankcount16,
@@ -972,7 +970,7 @@ pub const cpu = struct {
     pub const gfx703 = Cpu{
         .name = "gfx703",
         .llvm_name = "gfx703",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -982,7 +980,7 @@ pub const cpu = struct {
     pub const gfx704 = Cpu{
         .name = "gfx704",
         .llvm_name = "gfx704",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -992,7 +990,7 @@ pub const cpu = struct {
     pub const gfx801 = Cpu{
         .name = "gfx801",
         .llvm_name = "gfx801",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1005,7 +1003,7 @@ pub const cpu = struct {
     pub const gfx802 = Cpu{
         .name = "gfx802",
         .llvm_name = "gfx802",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1017,7 +1015,7 @@ pub const cpu = struct {
     pub const gfx803 = Cpu{
         .name = "gfx803",
         .llvm_name = "gfx803",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1028,7 +1026,7 @@ pub const cpu = struct {
     pub const gfx810 = Cpu{
         .name = "gfx810",
         .llvm_name = "gfx810",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .volcanic_islands,
@@ -1038,7 +1036,7 @@ pub const cpu = struct {
     pub const gfx900 = Cpu{
         .name = "gfx900",
         .llvm_name = "gfx900",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1050,7 +1048,7 @@ pub const cpu = struct {
     pub const gfx902 = Cpu{
         .name = "gfx902",
         .llvm_name = "gfx902",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1062,7 +1060,7 @@ pub const cpu = struct {
     pub const gfx904 = Cpu{
         .name = "gfx904",
         .llvm_name = "gfx904",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fma_mix_insts,
             .gfx9,
@@ -1074,7 +1072,7 @@ pub const cpu = struct {
     pub const gfx906 = Cpu{
         .name = "gfx906",
         .llvm_name = "gfx906",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .dl_insts,
             .dot1_insts,
@@ -1089,7 +1087,7 @@ pub const cpu = struct {
     pub const gfx908 = Cpu{
         .name = "gfx908",
         .llvm_name = "gfx908",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .atomic_fadd_insts,
             .code_object_v3,
             .dl_insts,
@@ -1111,7 +1109,7 @@ pub const cpu = struct {
     pub const gfx909 = Cpu{
         .name = "gfx909",
         .llvm_name = "gfx909",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .gfx9,
             .ldsbankcount32,
@@ -1122,7 +1120,7 @@ pub const cpu = struct {
     pub const hainan = Cpu{
         .name = "hainan",
         .llvm_name = "hainan",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1132,7 +1130,7 @@ pub const cpu = struct {
     pub const hawaii = Cpu{
         .name = "hawaii",
         .llvm_name = "hawaii",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1144,7 +1142,7 @@ pub const cpu = struct {
     pub const iceland = Cpu{
         .name = "iceland",
         .llvm_name = "iceland",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1156,7 +1154,7 @@ pub const cpu = struct {
     pub const kabini = Cpu{
         .name = "kabini",
         .llvm_name = "kabini",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -1166,7 +1164,7 @@ pub const cpu = struct {
     pub const kaveri = Cpu{
         .name = "kaveri",
         .llvm_name = "kaveri",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1176,7 +1174,7 @@ pub const cpu = struct {
     pub const mullins = Cpu{
         .name = "mullins",
         .llvm_name = "mullins",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .no_xnack_support,
@@ -1186,7 +1184,7 @@ pub const cpu = struct {
     pub const oland = Cpu{
         .name = "oland",
         .llvm_name = "oland",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1196,7 +1194,7 @@ pub const cpu = struct {
     pub const pitcairn = Cpu{
         .name = "pitcairn",
         .llvm_name = "pitcairn",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1206,7 +1204,7 @@ pub const cpu = struct {
     pub const polaris10 = Cpu{
         .name = "polaris10",
         .llvm_name = "polaris10",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1217,7 +1215,7 @@ pub const cpu = struct {
     pub const polaris11 = Cpu{
         .name = "polaris11",
         .llvm_name = "polaris11",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1228,7 +1226,7 @@ pub const cpu = struct {
     pub const stoney = Cpu{
         .name = "stoney",
         .llvm_name = "stoney",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount16,
             .volcanic_islands,
@@ -1238,7 +1236,7 @@ pub const cpu = struct {
     pub const tahiti = Cpu{
         .name = "tahiti",
         .llvm_name = "tahiti",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .fast_fmaf,
             .half_rate_64_ops,
@@ -1250,7 +1248,7 @@ pub const cpu = struct {
     pub const tonga = Cpu{
         .name = "tonga",
         .llvm_name = "tonga",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
@@ -1262,7 +1260,7 @@ pub const cpu = struct {
     pub const verde = Cpu{
         .name = "verde",
         .llvm_name = "verde",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .code_object_v3,
             .ldsbankcount32,
             .no_xnack_support,
diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig
index bcc04ae88427810492e2cc99f4691ae37cab3b24..62a4e1e83511ff112676502b2dc44e9715f74189 100644
--- a/lib/std/target/arm.zig
+++ b/lib/std/target/arm.zig
@@ -188,167 +188,167 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.@"32bit")] = .{
         .llvm_name = "32bit",
         .description = "Prefer 32-bit Thumb instrs",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"8msecext")] = .{
         .llvm_name = "8msecext",
         .description = "Enable support for ARMv8-M Security Extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a12)] = .{
         .llvm_name = "a12",
         .description = "Cortex-A12 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a15)] = .{
         .llvm_name = "a15",
         .description = "Cortex-A15 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a17)] = .{
         .llvm_name = "a17",
         .description = "Cortex-A17 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a32)] = .{
         .llvm_name = "a32",
         .description = "Cortex-A32 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a35)] = .{
         .llvm_name = "a35",
         .description = "Cortex-A35 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a5)] = .{
         .llvm_name = "a5",
         .description = "Cortex-A5 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a53)] = .{
         .llvm_name = "a53",
         .description = "Cortex-A53 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a55)] = .{
         .llvm_name = "a55",
         .description = "Cortex-A55 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a57)] = .{
         .llvm_name = "a57",
         .description = "Cortex-A57 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a7)] = .{
         .llvm_name = "a7",
         .description = "Cortex-A7 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a72)] = .{
         .llvm_name = "a72",
         .description = "Cortex-A72 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a73)] = .{
         .llvm_name = "a73",
         .description = "Cortex-A73 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a75)] = .{
         .llvm_name = "a75",
         .description = "Cortex-A75 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a76)] = .{
         .llvm_name = "a76",
         .description = "Cortex-A76 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a8)] = .{
         .llvm_name = "a8",
         .description = "Cortex-A8 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a9)] = .{
         .llvm_name = "a9",
         .description = "Cortex-A9 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aclass)] = .{
         .llvm_name = "aclass",
         .description = "Is application profile ('A' series)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.acquire_release)] = .{
         .llvm_name = "acquire-release",
         .description = "Has v8 acquire/release (lda/ldaex  etc) instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
         .llvm_name = "aes",
         .description = "Enable AES support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.armv2)] = .{
         .llvm_name = "armv2",
         .description = "ARMv2 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv2a)] = .{
         .llvm_name = "armv2a",
         .description = "ARMv2a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3)] = .{
         .llvm_name = "armv3",
         .description = "ARMv3 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv3m)] = .{
         .llvm_name = "armv3m",
         .description = "ARMv3m architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4)] = .{
         .llvm_name = "armv4",
         .description = "ARMv4 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.armv4t)] = .{
         .llvm_name = "armv4t",
         .description = "ARMv4t architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v4t,
         }),
     };
     result[@enumToInt(Feature.armv5t)] = .{
         .llvm_name = "armv5t",
         .description = "ARMv5t architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v5t,
         }),
     };
     result[@enumToInt(Feature.armv5te)] = .{
         .llvm_name = "armv5te",
         .description = "ARMv5te architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.armv5tej)] = .{
         .llvm_name = "armv5tej",
         .description = "ARMv5tej architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.armv6)] = .{
         .llvm_name = "armv6",
         .description = "ARMv6 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dsp,
             .v6,
         }),
@@ -356,7 +356,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv6_m)] = .{
         .llvm_name = "armv6-m",
         .description = "ARMv6m architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .db,
             .mclass,
             .noarm,
@@ -368,21 +368,21 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv6j)] = .{
         .llvm_name = "armv6j",
         .description = "ARMv7a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv6,
         }),
     };
     result[@enumToInt(Feature.armv6k)] = .{
         .llvm_name = "armv6k",
         .description = "ARMv6k architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v6k,
         }),
     };
     result[@enumToInt(Feature.armv6kz)] = .{
         .llvm_name = "armv6kz",
         .description = "ARMv6kz architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .trustzone,
             .v6k,
         }),
@@ -390,7 +390,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv6s_m)] = .{
         .llvm_name = "armv6s-m",
         .description = "ARMv6sm architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .db,
             .mclass,
             .noarm,
@@ -402,7 +402,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv6t2)] = .{
         .llvm_name = "armv6t2",
         .description = "ARMv6t2 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dsp,
             .v6t2,
         }),
@@ -410,7 +410,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv7_a)] = .{
         .llvm_name = "armv7-a",
         .description = "ARMv7a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .db,
             .dsp,
@@ -421,7 +421,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv7_m)] = .{
         .llvm_name = "armv7-m",
         .description = "ARMv7m architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .db,
             .hwdiv,
             .mclass,
@@ -434,7 +434,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv7_r)] = .{
         .llvm_name = "armv7-r",
         .description = "ARMv7r architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .db,
             .dsp,
             .hwdiv,
@@ -445,7 +445,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv7e_m)] = .{
         .llvm_name = "armv7e-m",
         .description = "ARMv7em architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .db,
             .dsp,
             .hwdiv,
@@ -459,21 +459,21 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv7k)] = .{
         .llvm_name = "armv7k",
         .description = "ARMv7a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv7_a,
         }),
     };
     result[@enumToInt(Feature.armv7s)] = .{
         .llvm_name = "armv7s",
         .description = "ARMv7a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv7_a,
         }),
     };
     result[@enumToInt(Feature.armv7ve)] = .{
         .llvm_name = "armv7ve",
         .description = "ARMv7ve architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .db,
             .dsp,
@@ -487,7 +487,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_a)] = .{
         .llvm_name = "armv8-a",
         .description = "ARMv8a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -504,7 +504,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_m_base)] = .{
         .llvm_name = "armv8-m.base",
         .description = "ARMv8mBaseline architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -520,7 +520,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_m_main)] = .{
         .llvm_name = "armv8-m.main",
         .description = "ARMv8mMainline architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -534,7 +534,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_r)] = .{
         .llvm_name = "armv8-r",
         .description = "ARMv8r architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .db,
             .dfb,
@@ -550,7 +550,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_1_a)] = .{
         .llvm_name = "armv8.1-a",
         .description = "ARMv81a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -567,7 +567,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_1_m_main)] = .{
         .llvm_name = "armv8.1-m.main",
         .description = "ARMv81mMainline architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"8msecext",
             .acquire_release,
             .db,
@@ -583,7 +583,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_2_a)] = .{
         .llvm_name = "armv8.2-a",
         .description = "ARMv82a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -601,7 +601,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_3_a)] = .{
         .llvm_name = "armv8.3-a",
         .description = "ARMv83a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -619,7 +619,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_4_a)] = .{
         .llvm_name = "armv8.4-a",
         .description = "ARMv84a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -638,7 +638,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.armv8_5_a)] = .{
         .llvm_name = "armv8.5-a",
         .description = "ARMv85a architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aclass,
             .crc,
             .crypto,
@@ -657,27 +657,27 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avoid_movs_shop)] = .{
         .llvm_name = "avoid-movs-shop",
         .description = "Avoid movs instructions with shifter operand",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
         .llvm_name = "avoid-partial-cpsr",
         .description = "Avoid CPSR partial update for OOO execution",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
         .llvm_name = "cheap-predicable-cpsr",
         .description = "Disable +1 predication cost for instructions updating CPSR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crc)] = .{
         .llvm_name = "crc",
         .description = "Enable support for CRC instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .llvm_name = "crypto",
         .description = "Enable support for Cryptography extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aes,
             .neon,
             .sha2,
@@ -686,54 +686,54 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.d32)] = .{
         .llvm_name = "d32",
         .description = "Extend FP to 32 double registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.db)] = .{
         .llvm_name = "db",
         .description = "Has data barrier (dmb/dsb) instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfb)] = .{
         .llvm_name = "dfb",
         .description = "Has full data barrier (dfb) instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.disable_postra_scheduler)] = .{
         .llvm_name = "disable-postra-scheduler",
         .description = "Don't schedule again after register allocation",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dont_widen_vmovs)] = .{
         .llvm_name = "dont-widen-vmovs",
         .description = "Don't widen VMOVS to VMOVD",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dotprod)] = .{
         .llvm_name = "dotprod",
         .description = "Enable support for dot product instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.dsp)] = .{
         .llvm_name = "dsp",
         .description = "Supports DSP instructions in ARM and/or Thumb2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execute_only)] = .{
         .llvm_name = "execute-only",
         .description = "Enable the generation of execute only code.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.expand_fp_mlx)] = .{
         .llvm_name = "expand-fp-mlx",
         .description = "Expand VFP/NEON MLA/MLS instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exynos)] = .{
         .llvm_name = "exynos",
         .description = "Samsung Exynos processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .crc,
             .crypto,
             .expand_fp_mlx,
@@ -756,7 +756,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fp_armv8)] = .{
         .llvm_name = "fp-armv8",
         .description = "Enable ARMv8 FP",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8d16,
             .fp_armv8sp,
             .vfp4,
@@ -765,7 +765,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fp_armv8d16)] = .{
         .llvm_name = "fp-armv8d16",
         .description = "Enable ARMv8 FP with only 16 d-registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fp64,
             .vfp4d16,
@@ -774,14 +774,14 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fp_armv8d16sp)] = .{
         .llvm_name = "fp-armv8d16sp",
         .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp4d16sp,
         }),
     };
     result[@enumToInt(Feature.fp_armv8sp)] = .{
         .llvm_name = "fp-armv8sp",
         .description = "Enable ARMv8 FP with no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .d32,
             .fp_armv8d16sp,
             .vfp4sp,
@@ -790,50 +790,50 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fp16)] = .{
         .llvm_name = "fp16",
         .description = "Enable half-precision floating point",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp16fml)] = .{
         .llvm_name = "fp16fml",
         .description = "Enable full half-precision floating point fml instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fullfp16,
         }),
     };
     result[@enumToInt(Feature.fp64)] = .{
         .llvm_name = "fp64",
         .description = "Floating point unit supports double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpregs64,
         }),
     };
     result[@enumToInt(Feature.fpao)] = .{
         .llvm_name = "fpao",
         .description = "Enable fast computation of positive address offsets",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs)] = .{
         .llvm_name = "fpregs",
         .description = "Enable FP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpregs16)] = .{
         .llvm_name = "fpregs16",
         .description = "Enable 16-bit FP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.fpregs64)] = .{
         .llvm_name = "fpregs64",
         .description = "Enable 64-bit FP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.fullfp16)] = .{
         .llvm_name = "fullfp16",
         .description = "Enable full half-precision floating point",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fpregs16,
         }),
@@ -841,86 +841,86 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fuse_aes)] = .{
         .llvm_name = "fuse-aes",
         .description = "CPU fuses AES crypto operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fuse_literals)] = .{
         .llvm_name = "fuse-literals",
         .description = "CPU fuses literal generation operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv)] = .{
         .llvm_name = "hwdiv",
         .description = "Enable divide instructions in Thumb",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwdiv_arm)] = .{
         .llvm_name = "hwdiv-arm",
         .description = "Enable divide instructions in ARM mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.iwmmxt)] = .{
         .llvm_name = "iwmmxt",
         .description = "ARMv5te architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.iwmmxt2)] = .{
         .llvm_name = "iwmmxt2",
         .description = "ARMv5te architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.krait)] = .{
         .llvm_name = "krait",
         .description = "Qualcomm Krait processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.kryo)] = .{
         .llvm_name = "kryo",
         .description = "Qualcomm Kryo processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lob)] = .{
         .llvm_name = "lob",
         .description = "Enable Low Overhead Branch extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
         .llvm_name = "long-calls",
         .description = "Generate calls via indirect call instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.loop_align)] = .{
         .llvm_name = "loop-align",
         .description = "Prefer 32-bit alignment for loops",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m3)] = .{
         .llvm_name = "m3",
         .description = "Cortex-M3 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mclass)] = .{
         .llvm_name = "mclass",
         .description = "Is microcontroller profile ('M' series)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mp)] = .{
         .llvm_name = "mp",
         .description = "Supports Multiprocessing extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.muxed_units)] = .{
         .llvm_name = "muxed-units",
         .description = "Has muxed AGU and NEON/FPU",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mve)] = .{
         .llvm_name = "mve",
         .description = "Support M-Class Vector Extension with integer ops",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dsp,
             .fpregs16,
             .fpregs64,
@@ -930,7 +930,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mve_fp)] = .{
         .llvm_name = "mve.fp",
         .description = "Support M-Class Vector Extension with integer and floating ops",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp_armv8d16sp,
             .fullfp16,
             .mve,
@@ -939,248 +939,248 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.nacl_trap)] = .{
         .llvm_name = "nacl-trap",
         .description = "NaCl trap",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neon)] = .{
         .llvm_name = "neon",
         .description = "Enable NEON instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp3,
         }),
     };
     result[@enumToInt(Feature.neon_fpmovs)] = .{
         .llvm_name = "neon-fpmovs",
         .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.neonfp)] = .{
         .llvm_name = "neonfp",
         .description = "Use NEON for single precision FP",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_branch_predictor)] = .{
         .llvm_name = "no-branch-predictor",
         .description = "Has no branch predictor",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_movt)] = .{
         .llvm_name = "no-movt",
         .description = "Don't use movt/movw pairs for 32-bit imms",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_neg_immediates)] = .{
         .llvm_name = "no-neg-immediates",
         .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noarm)] = .{
         .llvm_name = "noarm",
         .description = "Does not support ARM mode execution",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nonpipelined_vfp)] = .{
         .llvm_name = "nonpipelined-vfp",
         .description = "VFP instructions are not pipelined",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.perfmon)] = .{
         .llvm_name = "perfmon",
         .description = "Enable support for Performance Monitor extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_ishst)] = .{
         .llvm_name = "prefer-ishst",
         .description = "Prefer ISHST barriers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_vmovsr)] = .{
         .llvm_name = "prefer-vmovsr",
         .description = "Prefer VMOVSR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prof_unpr)] = .{
         .llvm_name = "prof-unpr",
         .description = "Is profitable to unpredicate",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r4)] = .{
         .llvm_name = "r4",
         .description = "Cortex-R4 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r5)] = .{
         .llvm_name = "r5",
         .description = "Cortex-R5 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r52)] = .{
         .llvm_name = "r52",
         .description = "Cortex-R52 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.r7)] = .{
         .llvm_name = "r7",
         .description = "Cortex-R7 ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ras)] = .{
         .llvm_name = "ras",
         .description = "Enable Reliability, Availability and Serviceability extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rclass)] = .{
         .llvm_name = "rclass",
         .description = "Is realtime profile ('R' series)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.read_tp_hard)] = .{
         .llvm_name = "read-tp-hard",
         .description = "Reading thread pointer from register",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserve_r9)] = .{
         .llvm_name = "reserve-r9",
         .description = "Reserve R9, making it unavailable as GPR",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ret_addr_stack)] = .{
         .llvm_name = "ret-addr-stack",
         .description = "Has return address stack",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sb)] = .{
         .llvm_name = "sb",
         .description = "Enable v8.5a Speculation Barrier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha2)] = .{
         .llvm_name = "sha2",
         .description = "Enable SHA1 and SHA256 support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .neon,
         }),
     };
     result[@enumToInt(Feature.slow_fp_brcc)] = .{
         .llvm_name = "slow-fp-brcc",
         .description = "FP compare + branch is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_load_D_subreg)] = .{
         .llvm_name = "slow-load-D-subreg",
         .description = "Loading into D subregs is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_odd_reg)] = .{
         .llvm_name = "slow-odd-reg",
         .description = "VLDM/VSTM starting with an odd register is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vdup32)] = .{
         .llvm_name = "slow-vdup32",
         .description = "Has slow VDUP32 - prefer VMOV",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_vgetlni32)] = .{
         .llvm_name = "slow-vgetlni32",
         .description = "Has slow VGETLNi32 - prefer VMOV",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slowfpvmlx)] = .{
         .llvm_name = "slowfpvmlx",
         .description = "Disable VFP / NEON MAC instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .llvm_name = "soft-float",
         .description = "Use software floating point features.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.splat_vfp_neon)] = .{
         .llvm_name = "splat-vfp-neon",
         .description = "Splat register from VFP to NEON",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dont_widen_vmovs,
         }),
     };
     result[@enumToInt(Feature.strict_align)] = .{
         .llvm_name = "strict-align",
         .description = "Disallow all unaligned memory access",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.swift)] = .{
         .llvm_name = "swift",
         .description = "Swift ARM processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb_mode)] = .{
         .llvm_name = "thumb-mode",
         .description = "Thumb mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.thumb2)] = .{
         .llvm_name = "thumb2",
         .description = "Enable Thumb2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.trustzone)] = .{
         .llvm_name = "trustzone",
         .description = "Enable support for TrustZone security extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_aa)] = .{
         .llvm_name = "use-aa",
         .description = "Use alias analysis during codegen",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_misched)] = .{
         .llvm_name = "use-misched",
         .description = "Use the MachineScheduler",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v4t)] = .{
         .llvm_name = "v4t",
         .description = "Support ARM v4T instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5t)] = .{
         .llvm_name = "v5t",
         .description = "Support ARM v5T instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v4t,
         }),
     };
     result[@enumToInt(Feature.v5te)] = .{
         .llvm_name = "v5te",
         .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v5t,
         }),
     };
     result[@enumToInt(Feature.v6)] = .{
         .llvm_name = "v6",
         .description = "Support ARM v6 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v5te,
         }),
     };
     result[@enumToInt(Feature.v6k)] = .{
         .llvm_name = "v6k",
         .description = "Support ARM v6k instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v6,
         }),
     };
     result[@enumToInt(Feature.v6m)] = .{
         .llvm_name = "v6m",
         .description = "Support ARM v6M instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v6,
         }),
     };
     result[@enumToInt(Feature.v6t2)] = .{
         .llvm_name = "v6t2",
         .description = "Support ARM v6t2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .thumb2,
             .v6k,
             .v8m,
@@ -1189,7 +1189,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v7)] = .{
         .llvm_name = "v7",
         .description = "Support ARM v7 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .perfmon,
             .v6t2,
             .v7clrex,
@@ -1198,12 +1198,12 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v7clrex)] = .{
         .llvm_name = "v7clrex",
         .description = "Has v7 clrex instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v8)] = .{
         .llvm_name = "v8",
         .description = "Support ARM v8 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .acquire_release,
             .v7,
         }),
@@ -1211,35 +1211,35 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_1a)] = .{
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v8,
         }),
     };
     result[@enumToInt(Feature.v8_1m_main)] = .{
         .llvm_name = "v8.1m.main",
         .description = "Support ARM v8-1M Mainline instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v8m_main,
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
         .llvm_name = "v8.2a",
         .description = "Support ARM v8.2a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v8_1a,
         }),
     };
     result[@enumToInt(Feature.v8_3a)] = .{
         .llvm_name = "v8.3a",
         .description = "Support ARM v8.3a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v8_2a,
         }),
     };
     result[@enumToInt(Feature.v8_4a)] = .{
         .llvm_name = "v8.4a",
         .description = "Support ARM v8.4a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dotprod,
             .v8_3a,
         }),
@@ -1247,7 +1247,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8_5a)] = .{
         .llvm_name = "v8.5a",
         .description = "Support ARM v8.5a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sb,
             .v8_4a,
         }),
@@ -1255,21 +1255,21 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.v8m)] = .{
         .llvm_name = "v8m",
         .description = "Support ARM v8M Baseline instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v6m,
         }),
     };
     result[@enumToInt(Feature.v8m_main)] = .{
         .llvm_name = "v8m.main",
         .description = "Support ARM v8M Mainline instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .v7,
         }),
     };
     result[@enumToInt(Feature.vfp2)] = .{
         .llvm_name = "vfp2",
         .description = "Enable VFP2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp2d16,
             .vfp2sp,
         }),
@@ -1277,7 +1277,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp2d16)] = .{
         .llvm_name = "vfp2d16",
         .description = "Enable VFP2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
             .vfp2d16sp,
         }),
@@ -1285,21 +1285,21 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp2d16sp)] = .{
         .llvm_name = "vfp2d16sp",
         .description = "Enable VFP2 instructions with no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpregs,
         }),
     };
     result[@enumToInt(Feature.vfp2sp)] = .{
         .llvm_name = "vfp2sp",
         .description = "Enable VFP2 instructions with no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp2d16sp,
         }),
     };
     result[@enumToInt(Feature.vfp3)] = .{
         .llvm_name = "vfp3",
         .description = "Enable VFP3 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp3d16,
             .vfp3sp,
         }),
@@ -1307,7 +1307,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp3d16)] = .{
         .llvm_name = "vfp3d16",
         .description = "Enable VFP3 instructions with only 16 d-registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
             .vfp2,
             .vfp3d16sp,
@@ -1316,14 +1316,14 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp3d16sp)] = .{
         .llvm_name = "vfp3d16sp",
         .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vfp2sp,
         }),
     };
     result[@enumToInt(Feature.vfp3sp)] = .{
         .llvm_name = "vfp3sp",
         .description = "Enable VFP3 instructions with no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .d32,
             .vfp3d16sp,
         }),
@@ -1331,7 +1331,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp4)] = .{
         .llvm_name = "vfp4",
         .description = "Enable VFP4 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp16,
             .vfp3,
             .vfp4d16,
@@ -1341,7 +1341,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp4d16)] = .{
         .llvm_name = "vfp4d16",
         .description = "Enable VFP4 instructions with only 16 d-registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp16,
             .fp64,
             .vfp3d16,
@@ -1351,7 +1351,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp4d16sp)] = .{
         .llvm_name = "vfp4d16sp",
         .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp16,
             .vfp3d16sp,
         }),
@@ -1359,7 +1359,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vfp4sp)] = .{
         .llvm_name = "vfp4sp",
         .description = "Enable VFP4 instructions with no double precision",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .d32,
             .fp16,
             .vfp3sp,
@@ -1369,7 +1369,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.virtualization)] = .{
         .llvm_name = "virtualization",
         .description = "Supports Virtualization extension",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hwdiv,
             .hwdiv_arm,
         }),
@@ -1377,40 +1377,39 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vldn_align)] = .{
         .llvm_name = "vldn-align",
         .description = "Check for VLDn unaligned access",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_forwarding)] = .{
         .llvm_name = "vmlx-forwarding",
         .description = "Has multiplier accumulator forwarding",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vmlx_hazards)] = .{
         .llvm_name = "vmlx-hazards",
         .description = "Has VMLx hazards",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wide_stride_vfp)] = .{
         .llvm_name = "wide-stride-vfp",
         .description = "Use a wide stride when allocating VFP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xscale)] = .{
         .llvm_name = "xscale",
         .description = "ARMv5te architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     result[@enumToInt(Feature.zcz)] = .{
         .llvm_name = "zcz",
         .description = "Has zero-cycle zeroing instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -1419,49 +1418,49 @@ pub const cpu = struct {
     pub const arm1020e = Cpu{
         .name = "arm1020e",
         .llvm_name = "arm1020e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm1020t = Cpu{
         .name = "arm1020t",
         .llvm_name = "arm1020t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5t,
         }),
     };
     pub const arm1022e = Cpu{
         .name = "arm1022e",
         .llvm_name = "arm1022e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm10e = Cpu{
         .name = "arm10e",
         .llvm_name = "arm10e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm10tdmi = Cpu{
         .name = "arm10tdmi",
         .llvm_name = "arm10tdmi",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5t,
         }),
     };
     pub const arm1136j_s = Cpu{
         .name = "arm1136j_s",
         .llvm_name = "arm1136j-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6,
         }),
     };
     pub const arm1136jf_s = Cpu{
         .name = "arm1136jf_s",
         .llvm_name = "arm1136jf-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6,
             .slowfpvmlx,
             .vfp2,
@@ -1470,14 +1469,14 @@ pub const cpu = struct {
     pub const arm1156t2_s = Cpu{
         .name = "arm1156t2_s",
         .llvm_name = "arm1156t2-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6t2,
         }),
     };
     pub const arm1156t2f_s = Cpu{
         .name = "arm1156t2f_s",
         .llvm_name = "arm1156t2f-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6t2,
             .slowfpvmlx,
             .vfp2,
@@ -1486,21 +1485,21 @@ pub const cpu = struct {
     pub const arm1176j_s = Cpu{
         .name = "arm1176j_s",
         .llvm_name = "arm1176j-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6kz,
         }),
     };
     pub const arm1176jz_s = Cpu{
         .name = "arm1176jz_s",
         .llvm_name = "arm1176jz-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6kz,
         }),
     };
     pub const arm1176jzf_s = Cpu{
         .name = "arm1176jzf_s",
         .llvm_name = "arm1176jzf-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6kz,
             .slowfpvmlx,
             .vfp2,
@@ -1509,126 +1508,126 @@ pub const cpu = struct {
     pub const arm710t = Cpu{
         .name = "arm710t",
         .llvm_name = "arm710t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm720t = Cpu{
         .name = "arm720t",
         .llvm_name = "arm720t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm7tdmi = Cpu{
         .name = "arm7tdmi",
         .llvm_name = "arm7tdmi",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm7tdmi_s = Cpu{
         .name = "arm7tdmi_s",
         .llvm_name = "arm7tdmi-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm8 = Cpu{
         .name = "arm8",
         .llvm_name = "arm8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const arm810 = Cpu{
         .name = "arm810",
         .llvm_name = "arm810",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const arm9 = Cpu{
         .name = "arm9",
         .llvm_name = "arm9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm920 = Cpu{
         .name = "arm920",
         .llvm_name = "arm920",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm920t = Cpu{
         .name = "arm920t",
         .llvm_name = "arm920t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm922t = Cpu{
         .name = "arm922t",
         .llvm_name = "arm922t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm926ej_s = Cpu{
         .name = "arm926ej_s",
         .llvm_name = "arm926ej-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm940t = Cpu{
         .name = "arm940t",
         .llvm_name = "arm940t",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const arm946e_s = Cpu{
         .name = "arm946e_s",
         .llvm_name = "arm946e-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm966e_s = Cpu{
         .name = "arm966e_s",
         .llvm_name = "arm966e-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm968e_s = Cpu{
         .name = "arm968e_s",
         .llvm_name = "arm968e-s",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm9e = Cpu{
         .name = "arm9e",
         .llvm_name = "arm9e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const arm9tdmi = Cpu{
         .name = "arm9tdmi",
         .llvm_name = "arm9tdmi",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const cortex_a12 = Cpu{
         .name = "cortex_a12",
         .llvm_name = "cortex-a12",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a12,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -1643,7 +1642,7 @@ pub const cpu = struct {
     pub const cortex_a15 = Cpu{
         .name = "cortex_a15",
         .llvm_name = "cortex-a15",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a15,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -1661,7 +1660,7 @@ pub const cpu = struct {
     pub const cortex_a17 = Cpu{
         .name = "cortex_a17",
         .llvm_name = "cortex-a17",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a17,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -1676,7 +1675,7 @@ pub const cpu = struct {
     pub const cortex_a32 = Cpu{
         .name = "cortex_a32",
         .llvm_name = "cortex-a32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .crc,
             .crypto,
@@ -1687,7 +1686,7 @@ pub const cpu = struct {
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a35,
             .armv8_a,
             .crc,
@@ -1699,7 +1698,7 @@ pub const cpu = struct {
     pub const cortex_a5 = Cpu{
         .name = "cortex_a5",
         .llvm_name = "cortex-a5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a5,
             .armv7_a,
             .mp,
@@ -1714,7 +1713,7 @@ pub const cpu = struct {
     pub const cortex_a53 = Cpu{
         .name = "cortex_a53",
         .llvm_name = "cortex-a53",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a53,
             .armv8_a,
             .crc,
@@ -1727,7 +1726,7 @@ pub const cpu = struct {
     pub const cortex_a55 = Cpu{
         .name = "cortex_a55",
         .llvm_name = "cortex-a55",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a55,
             .armv8_2_a,
             .dotprod,
@@ -1738,7 +1737,7 @@ pub const cpu = struct {
     pub const cortex_a57 = Cpu{
         .name = "cortex_a57",
         .llvm_name = "cortex-a57",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a57,
             .armv8_a,
             .avoid_partial_cpsr,
@@ -1753,7 +1752,7 @@ pub const cpu = struct {
     pub const cortex_a7 = Cpu{
         .name = "cortex_a7",
         .llvm_name = "cortex-a7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a7,
             .armv7_a,
             .mp,
@@ -1770,7 +1769,7 @@ pub const cpu = struct {
     pub const cortex_a72 = Cpu{
         .name = "cortex_a72",
         .llvm_name = "cortex-a72",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a72,
             .armv8_a,
             .crc,
@@ -1782,7 +1781,7 @@ pub const cpu = struct {
     pub const cortex_a73 = Cpu{
         .name = "cortex_a73",
         .llvm_name = "cortex-a73",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a73,
             .armv8_a,
             .crc,
@@ -1794,7 +1793,7 @@ pub const cpu = struct {
     pub const cortex_a75 = Cpu{
         .name = "cortex_a75",
         .llvm_name = "cortex-a75",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a75,
             .armv8_2_a,
             .dotprod,
@@ -1805,7 +1804,7 @@ pub const cpu = struct {
     pub const cortex_a76 = Cpu{
         .name = "cortex_a76",
         .llvm_name = "cortex-a76",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a76,
             .armv8_2_a,
             .crc,
@@ -1819,7 +1818,7 @@ pub const cpu = struct {
     pub const cortex_a76ae = Cpu{
         .name = "cortex_a76ae",
         .llvm_name = "cortex-a76ae",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a76,
             .armv8_2_a,
             .crc,
@@ -1833,7 +1832,7 @@ pub const cpu = struct {
     pub const cortex_a8 = Cpu{
         .name = "cortex_a8",
         .llvm_name = "cortex-a8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a8,
             .armv7_a,
             .nonpipelined_vfp,
@@ -1848,7 +1847,7 @@ pub const cpu = struct {
     pub const cortex_a9 = Cpu{
         .name = "cortex_a9",
         .llvm_name = "cortex-a9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .a9,
             .armv7_a,
             .avoid_partial_cpsr,
@@ -1868,28 +1867,28 @@ pub const cpu = struct {
     pub const cortex_m0 = Cpu{
         .name = "cortex_m0",
         .llvm_name = "cortex-m0",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m0plus = Cpu{
         .name = "cortex_m0plus",
         .llvm_name = "cortex-m0plus",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m1 = Cpu{
         .name = "cortex_m1",
         .llvm_name = "cortex-m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6_m,
         }),
     };
     pub const cortex_m23 = Cpu{
         .name = "cortex_m23",
         .llvm_name = "cortex-m23",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_m_base,
             .no_movt,
         }),
@@ -1897,7 +1896,7 @@ pub const cpu = struct {
     pub const cortex_m3 = Cpu{
         .name = "cortex_m3",
         .llvm_name = "cortex-m3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_m,
             .loop_align,
             .m3,
@@ -1909,7 +1908,7 @@ pub const cpu = struct {
     pub const cortex_m33 = Cpu{
         .name = "cortex_m33",
         .llvm_name = "cortex-m33",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_m_main,
             .dsp,
             .fp_armv8d16sp,
@@ -1923,7 +1922,7 @@ pub const cpu = struct {
     pub const cortex_m35p = Cpu{
         .name = "cortex_m35p",
         .llvm_name = "cortex-m35p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_m_main,
             .dsp,
             .fp_armv8d16sp,
@@ -1937,7 +1936,7 @@ pub const cpu = struct {
     pub const cortex_m4 = Cpu{
         .name = "cortex_m4",
         .llvm_name = "cortex-m4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7e_m,
             .loop_align,
             .no_branch_predictor,
@@ -1950,7 +1949,7 @@ pub const cpu = struct {
     pub const cortex_m7 = Cpu{
         .name = "cortex_m7",
         .llvm_name = "cortex-m7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7e_m,
             .fp_armv8d16,
         }),
@@ -1958,7 +1957,7 @@ pub const cpu = struct {
     pub const cortex_r4 = Cpu{
         .name = "cortex_r4",
         .llvm_name = "cortex-r4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .r4,
@@ -1968,7 +1967,7 @@ pub const cpu = struct {
     pub const cortex_r4f = Cpu{
         .name = "cortex_r4f",
         .llvm_name = "cortex-r4f",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .r4,
@@ -1981,7 +1980,7 @@ pub const cpu = struct {
     pub const cortex_r5 = Cpu{
         .name = "cortex_r5",
         .llvm_name = "cortex-r5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .hwdiv_arm,
@@ -1995,7 +1994,7 @@ pub const cpu = struct {
     pub const cortex_r52 = Cpu{
         .name = "cortex_r52",
         .llvm_name = "cortex-r52",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_r,
             .fpao,
             .r52,
@@ -2006,7 +2005,7 @@ pub const cpu = struct {
     pub const cortex_r7 = Cpu{
         .name = "cortex_r7",
         .llvm_name = "cortex-r7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .fp16,
@@ -2022,7 +2021,7 @@ pub const cpu = struct {
     pub const cortex_r8 = Cpu{
         .name = "cortex_r8",
         .llvm_name = "cortex-r8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_r,
             .avoid_partial_cpsr,
             .fp16,
@@ -2037,7 +2036,7 @@ pub const cpu = struct {
     pub const cyclone = Cpu{
         .name = "cyclone",
         .llvm_name = "cyclone",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
@@ -2058,14 +2057,14 @@ pub const cpu = struct {
     pub const ep9312 = Cpu{
         .name = "ep9312",
         .llvm_name = "ep9312",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4t,
         }),
     };
     pub const exynos_m1 = Cpu{
         .name = "exynos_m1",
         .llvm_name = "exynos-m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2073,7 +2072,7 @@ pub const cpu = struct {
     pub const exynos_m2 = Cpu{
         .name = "exynos_m2",
         .llvm_name = "exynos-m2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2081,7 +2080,7 @@ pub const cpu = struct {
     pub const exynos_m3 = Cpu{
         .name = "exynos_m3",
         .llvm_name = "exynos-m3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .exynos,
         }),
@@ -2089,7 +2088,7 @@ pub const cpu = struct {
     pub const exynos_m4 = Cpu{
         .name = "exynos_m4",
         .llvm_name = "exynos-m4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_2_a,
             .dotprod,
             .exynos,
@@ -2099,7 +2098,7 @@ pub const cpu = struct {
     pub const exynos_m5 = Cpu{
         .name = "exynos_m5",
         .llvm_name = "exynos-m5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_2_a,
             .dotprod,
             .exynos,
@@ -2109,19 +2108,19 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const iwmmxt = Cpu{
         .name = "iwmmxt",
         .llvm_name = "iwmmxt",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
     pub const krait = Cpu{
         .name = "krait",
         .llvm_name = "krait",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_a,
             .avoid_partial_cpsr,
             .fp16,
@@ -2138,7 +2137,7 @@ pub const cpu = struct {
     pub const kryo = Cpu{
         .name = "kryo",
         .llvm_name = "kryo",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv8_a,
             .crc,
             .crypto,
@@ -2150,7 +2149,7 @@ pub const cpu = struct {
     pub const mpcore = Cpu{
         .name = "mpcore",
         .llvm_name = "mpcore",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6k,
             .slowfpvmlx,
             .vfp2,
@@ -2159,21 +2158,21 @@ pub const cpu = struct {
     pub const mpcorenovfp = Cpu{
         .name = "mpcorenovfp",
         .llvm_name = "mpcorenovfp",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6k,
         }),
     };
     pub const sc000 = Cpu{
         .name = "sc000",
         .llvm_name = "sc000",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv6_m,
         }),
     };
     pub const sc300 = Cpu{
         .name = "sc300",
         .llvm_name = "sc300",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_m,
             .m3,
             .no_branch_predictor,
@@ -2184,35 +2183,35 @@ pub const cpu = struct {
     pub const strongarm = Cpu{
         .name = "strongarm",
         .llvm_name = "strongarm",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm110 = Cpu{
         .name = "strongarm110",
         .llvm_name = "strongarm110",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm1100 = Cpu{
         .name = "strongarm1100",
         .llvm_name = "strongarm1100",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const strongarm1110 = Cpu{
         .name = "strongarm1110",
         .llvm_name = "strongarm1110",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv4,
         }),
     };
     pub const swift = Cpu{
         .name = "swift",
         .llvm_name = "swift",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv7_a,
             .avoid_movs_shop,
             .avoid_partial_cpsr,
@@ -2239,7 +2238,7 @@ pub const cpu = struct {
     pub const xscale = Cpu{
         .name = "xscale",
         .llvm_name = "xscale",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .armv5te,
         }),
     };
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 687a8122fee8fe26abeb5476406506b8bd60d475..8eb6df98f301e7e93d74037500113adf8bc56c67 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -46,17 +46,17 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.addsubiw)] = .{
         .llvm_name = "addsubiw",
         .description = "Enable 16-bit register-immediate addition and subtraction instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr0)] = .{
         .llvm_name = "avr0",
         .description = "The device is a part of the avr0 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.avr1)] = .{
         .llvm_name = "avr1",
         .description = "The device is a part of the avr1 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr0,
             .lpm,
         }),
@@ -64,7 +64,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr2)] = .{
         .llvm_name = "avr2",
         .description = "The device is a part of the avr2 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .addsubiw,
             .avr1,
             .ijmpcall,
@@ -74,7 +74,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr25)] = .{
         .llvm_name = "avr25",
         .description = "The device is a part of the avr25 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr2,
             .@"break",
             .lpmx,
@@ -85,7 +85,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr3)] = .{
         .llvm_name = "avr3",
         .description = "The device is a part of the avr3 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr2,
             .jmpcall,
         }),
@@ -93,7 +93,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr31)] = .{
         .llvm_name = "avr31",
         .description = "The device is a part of the avr31 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr3,
             .elpm,
         }),
@@ -101,7 +101,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr35)] = .{
         .llvm_name = "avr35",
         .description = "The device is a part of the avr35 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr3,
             .@"break",
             .lpmx,
@@ -112,7 +112,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr4)] = .{
         .llvm_name = "avr4",
         .description = "The device is a part of the avr4 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr2,
             .@"break",
             .lpmx,
@@ -124,7 +124,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr5)] = .{
         .llvm_name = "avr5",
         .description = "The device is a part of the avr5 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr3,
             .@"break",
             .lpmx,
@@ -136,7 +136,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr51)] = .{
         .llvm_name = "avr51",
         .description = "The device is a part of the avr51 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr5,
             .elpm,
             .elpmx,
@@ -145,14 +145,14 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avr6)] = .{
         .llvm_name = "avr6",
         .description = "The device is a part of the avr6 family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     result[@enumToInt(Feature.avrtiny)] = .{
         .llvm_name = "avrtiny",
         .description = "The device is a part of the avrtiny family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr0,
             .@"break",
             .sram,
@@ -162,72 +162,72 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.@"break")] = .{
         .llvm_name = "break",
         .description = "The device supports the `BREAK` debugging instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.des)] = .{
         .llvm_name = "des",
         .description = "The device supports the `DES k` encryption instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.eijmpcall)] = .{
         .llvm_name = "eijmpcall",
         .description = "The device supports the `EIJMP`/`EICALL` instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpm)] = .{
         .llvm_name = "elpm",
         .description = "The device supports the ELPM instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.elpmx)] = .{
         .llvm_name = "elpmx",
         .description = "The device supports the `ELPM Rd, Z[+]` instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ijmpcall)] = .{
         .llvm_name = "ijmpcall",
         .description = "The device supports `IJMP`/`ICALL`instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.jmpcall)] = .{
         .llvm_name = "jmpcall",
         .description = "The device supports the `JMP` and `CALL` instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpm)] = .{
         .llvm_name = "lpm",
         .description = "The device supports the `LPM` instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lpmx)] = .{
         .llvm_name = "lpmx",
         .description = "The device supports the `LPM Rd, Z[+]` instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movw)] = .{
         .llvm_name = "movw",
         .description = "The device supports the 16-bit MOVW instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mul)] = .{
         .llvm_name = "mul",
         .description = "The device supports the multiplication instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rmw)] = .{
         .llvm_name = "rmw",
         .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.smallstack)] = .{
         .llvm_name = "smallstack",
         .description = "The device has an 8-bit stack pointer",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.special)] = .{
         .llvm_name = "special",
         .description = "Enable use of the entire instruction set - used for debugging",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .addsubiw,
             .@"break",
             .des,
@@ -249,27 +249,27 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.spm)] = .{
         .llvm_name = "spm",
         .description = "The device supports the `SPM` instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spmx)] = .{
         .llvm_name = "spmx",
         .description = "The device supports the `SPM Z+` instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sram)] = .{
         .llvm_name = "sram",
         .description = "The device has random access memory",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tinyencoding)] = .{
         .llvm_name = "tinyencoding",
         .description = "The device has Tiny core specific instruction encodings",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xmega)] = .{
         .llvm_name = "xmega",
         .description = "The device is a part of the xmega family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avr51,
             .des,
             .eijmpcall,
@@ -279,7 +279,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.xmegau)] = .{
         .llvm_name = "xmegau",
         .description = "The device is a part of the xmegau family",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .rmw,
             .xmega,
         }),
@@ -288,7 +288,6 @@ pub const all_features = blk: {
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -297,28 +296,28 @@ pub const cpu = struct {
     pub const at43usb320 = Cpu{
         .name = "at43usb320",
         .llvm_name = "at43usb320",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr31,
         }),
     };
     pub const at43usb355 = Cpu{
         .name = "at43usb355",
         .llvm_name = "at43usb355",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
         }),
     };
     pub const at76c711 = Cpu{
         .name = "at76c711",
         .llvm_name = "at76c711",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
         }),
     };
     pub const at86rf401 = Cpu{
         .name = "at86rf401",
         .llvm_name = "at86rf401",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -327,217 +326,217 @@ pub const cpu = struct {
     pub const at90c8534 = Cpu{
         .name = "at90c8534",
         .llvm_name = "at90c8534",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90can128 = Cpu{
         .name = "at90can128",
         .llvm_name = "at90can128",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const at90can32 = Cpu{
         .name = "at90can32",
         .llvm_name = "at90can32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90can64 = Cpu{
         .name = "at90can64",
         .llvm_name = "at90can64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm1 = Cpu{
         .name = "at90pwm1",
         .llvm_name = "at90pwm1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm161 = Cpu{
         .name = "at90pwm161",
         .llvm_name = "at90pwm161",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm2 = Cpu{
         .name = "at90pwm2",
         .llvm_name = "at90pwm2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm216 = Cpu{
         .name = "at90pwm216",
         .llvm_name = "at90pwm216",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm2b = Cpu{
         .name = "at90pwm2b",
         .llvm_name = "at90pwm2b",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm3 = Cpu{
         .name = "at90pwm3",
         .llvm_name = "at90pwm3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm316 = Cpu{
         .name = "at90pwm316",
         .llvm_name = "at90pwm316",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90pwm3b = Cpu{
         .name = "at90pwm3b",
         .llvm_name = "at90pwm3b",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90pwm81 = Cpu{
         .name = "at90pwm81",
         .llvm_name = "at90pwm81",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const at90s1200 = Cpu{
         .name = "at90s1200",
         .llvm_name = "at90s1200",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr0,
         }),
     };
     pub const at90s2313 = Cpu{
         .name = "at90s2313",
         .llvm_name = "at90s2313",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2323 = Cpu{
         .name = "at90s2323",
         .llvm_name = "at90s2323",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2333 = Cpu{
         .name = "at90s2333",
         .llvm_name = "at90s2333",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s2343 = Cpu{
         .name = "at90s2343",
         .llvm_name = "at90s2343",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4414 = Cpu{
         .name = "at90s4414",
         .llvm_name = "at90s4414",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4433 = Cpu{
         .name = "at90s4433",
         .llvm_name = "at90s4433",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s4434 = Cpu{
         .name = "at90s4434",
         .llvm_name = "at90s4434",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s8515 = Cpu{
         .name = "at90s8515",
         .llvm_name = "at90s8515",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90s8535 = Cpu{
         .name = "at90s8535",
         .llvm_name = "at90s8535",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const at90scr100 = Cpu{
         .name = "at90scr100",
         .llvm_name = "at90scr100",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb1286 = Cpu{
         .name = "at90usb1286",
         .llvm_name = "at90usb1286",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const at90usb1287 = Cpu{
         .name = "at90usb1287",
         .llvm_name = "at90usb1287",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const at90usb162 = Cpu{
         .name = "at90usb162",
         .llvm_name = "at90usb162",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const at90usb646 = Cpu{
         .name = "at90usb646",
         .llvm_name = "at90usb646",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb647 = Cpu{
         .name = "at90usb647",
         .llvm_name = "at90usb647",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const at90usb82 = Cpu{
         .name = "at90usb82",
         .llvm_name = "at90usb82",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const at94k = Cpu{
         .name = "at94k",
         .llvm_name = "at94k",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -547,133 +546,133 @@ pub const cpu = struct {
     pub const ata5272 = Cpu{
         .name = "ata5272",
         .llvm_name = "ata5272",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const ata5505 = Cpu{
         .name = "ata5505",
         .llvm_name = "ata5505",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const ata5790 = Cpu{
         .name = "ata5790",
         .llvm_name = "ata5790",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const ata5795 = Cpu{
         .name = "ata5795",
         .llvm_name = "ata5795",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const ata6285 = Cpu{
         .name = "ata6285",
         .llvm_name = "ata6285",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const ata6286 = Cpu{
         .name = "ata6286",
         .llvm_name = "ata6286",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const ata6289 = Cpu{
         .name = "ata6289",
         .llvm_name = "ata6289",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega103 = Cpu{
         .name = "atmega103",
         .llvm_name = "atmega103",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr31,
         }),
     };
     pub const atmega128 = Cpu{
         .name = "atmega128",
         .llvm_name = "atmega128",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1280 = Cpu{
         .name = "atmega1280",
         .llvm_name = "atmega1280",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1281 = Cpu{
         .name = "atmega1281",
         .llvm_name = "atmega1281",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284 = Cpu{
         .name = "atmega1284",
         .llvm_name = "atmega1284",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284p = Cpu{
         .name = "atmega1284p",
         .llvm_name = "atmega1284p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega1284rfr2 = Cpu{
         .name = "atmega1284rfr2",
         .llvm_name = "atmega1284rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128a = Cpu{
         .name = "atmega128a",
         .llvm_name = "atmega128a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128rfa1 = Cpu{
         .name = "atmega128rfa1",
         .llvm_name = "atmega128rfa1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega128rfr2 = Cpu{
         .name = "atmega128rfr2",
         .llvm_name = "atmega128rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const atmega16 = Cpu{
         .name = "atmega16",
         .llvm_name = "atmega16",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega161 = Cpu{
         .name = "atmega161",
         .llvm_name = "atmega161",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -684,14 +683,14 @@ pub const cpu = struct {
     pub const atmega162 = Cpu{
         .name = "atmega162",
         .llvm_name = "atmega162",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega163 = Cpu{
         .name = "atmega163",
         .llvm_name = "atmega163",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
             .lpmx,
             .movw,
@@ -702,623 +701,623 @@ pub const cpu = struct {
     pub const atmega164a = Cpu{
         .name = "atmega164a",
         .llvm_name = "atmega164a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega164p = Cpu{
         .name = "atmega164p",
         .llvm_name = "atmega164p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega164pa = Cpu{
         .name = "atmega164pa",
         .llvm_name = "atmega164pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165 = Cpu{
         .name = "atmega165",
         .llvm_name = "atmega165",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165a = Cpu{
         .name = "atmega165a",
         .llvm_name = "atmega165a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165p = Cpu{
         .name = "atmega165p",
         .llvm_name = "atmega165p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega165pa = Cpu{
         .name = "atmega165pa",
         .llvm_name = "atmega165pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168 = Cpu{
         .name = "atmega168",
         .llvm_name = "atmega168",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168a = Cpu{
         .name = "atmega168a",
         .llvm_name = "atmega168a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168p = Cpu{
         .name = "atmega168p",
         .llvm_name = "atmega168p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega168pa = Cpu{
         .name = "atmega168pa",
         .llvm_name = "atmega168pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169 = Cpu{
         .name = "atmega169",
         .llvm_name = "atmega169",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169a = Cpu{
         .name = "atmega169a",
         .llvm_name = "atmega169a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169p = Cpu{
         .name = "atmega169p",
         .llvm_name = "atmega169p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega169pa = Cpu{
         .name = "atmega169pa",
         .llvm_name = "atmega169pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16a = Cpu{
         .name = "atmega16a",
         .llvm_name = "atmega16a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hva = Cpu{
         .name = "atmega16hva",
         .llvm_name = "atmega16hva",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hva2 = Cpu{
         .name = "atmega16hva2",
         .llvm_name = "atmega16hva2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hvb = Cpu{
         .name = "atmega16hvb",
         .llvm_name = "atmega16hvb",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16hvbrevb = Cpu{
         .name = "atmega16hvbrevb",
         .llvm_name = "atmega16hvbrevb",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16m1 = Cpu{
         .name = "atmega16m1",
         .llvm_name = "atmega16m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega16u2 = Cpu{
         .name = "atmega16u2",
         .llvm_name = "atmega16u2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const atmega16u4 = Cpu{
         .name = "atmega16u4",
         .llvm_name = "atmega16u4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega2560 = Cpu{
         .name = "atmega2560",
         .llvm_name = "atmega2560",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr6,
         }),
     };
     pub const atmega2561 = Cpu{
         .name = "atmega2561",
         .llvm_name = "atmega2561",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr6,
         }),
     };
     pub const atmega2564rfr2 = Cpu{
         .name = "atmega2564rfr2",
         .llvm_name = "atmega2564rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr6,
         }),
     };
     pub const atmega256rfr2 = Cpu{
         .name = "atmega256rfr2",
         .llvm_name = "atmega256rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr6,
         }),
     };
     pub const atmega32 = Cpu{
         .name = "atmega32",
         .llvm_name = "atmega32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega323 = Cpu{
         .name = "atmega323",
         .llvm_name = "atmega323",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324a = Cpu{
         .name = "atmega324a",
         .llvm_name = "atmega324a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324p = Cpu{
         .name = "atmega324p",
         .llvm_name = "atmega324p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega324pa = Cpu{
         .name = "atmega324pa",
         .llvm_name = "atmega324pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325 = Cpu{
         .name = "atmega325",
         .llvm_name = "atmega325",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250 = Cpu{
         .name = "atmega3250",
         .llvm_name = "atmega3250",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250a = Cpu{
         .name = "atmega3250a",
         .llvm_name = "atmega3250a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250p = Cpu{
         .name = "atmega3250p",
         .llvm_name = "atmega3250p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3250pa = Cpu{
         .name = "atmega3250pa",
         .llvm_name = "atmega3250pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325a = Cpu{
         .name = "atmega325a",
         .llvm_name = "atmega325a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325p = Cpu{
         .name = "atmega325p",
         .llvm_name = "atmega325p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega325pa = Cpu{
         .name = "atmega325pa",
         .llvm_name = "atmega325pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega328 = Cpu{
         .name = "atmega328",
         .llvm_name = "atmega328",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega328p = Cpu{
         .name = "atmega328p",
         .llvm_name = "atmega328p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329 = Cpu{
         .name = "atmega329",
         .llvm_name = "atmega329",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290 = Cpu{
         .name = "atmega3290",
         .llvm_name = "atmega3290",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290a = Cpu{
         .name = "atmega3290a",
         .llvm_name = "atmega3290a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290p = Cpu{
         .name = "atmega3290p",
         .llvm_name = "atmega3290p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega3290pa = Cpu{
         .name = "atmega3290pa",
         .llvm_name = "atmega3290pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329a = Cpu{
         .name = "atmega329a",
         .llvm_name = "atmega329a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329p = Cpu{
         .name = "atmega329p",
         .llvm_name = "atmega329p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega329pa = Cpu{
         .name = "atmega329pa",
         .llvm_name = "atmega329pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32a = Cpu{
         .name = "atmega32a",
         .llvm_name = "atmega32a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32c1 = Cpu{
         .name = "atmega32c1",
         .llvm_name = "atmega32c1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32hvb = Cpu{
         .name = "atmega32hvb",
         .llvm_name = "atmega32hvb",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32hvbrevb = Cpu{
         .name = "atmega32hvbrevb",
         .llvm_name = "atmega32hvbrevb",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32m1 = Cpu{
         .name = "atmega32m1",
         .llvm_name = "atmega32m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32u2 = Cpu{
         .name = "atmega32u2",
         .llvm_name = "atmega32u2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const atmega32u4 = Cpu{
         .name = "atmega32u4",
         .llvm_name = "atmega32u4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega32u6 = Cpu{
         .name = "atmega32u6",
         .llvm_name = "atmega32u6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega406 = Cpu{
         .name = "atmega406",
         .llvm_name = "atmega406",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega48 = Cpu{
         .name = "atmega48",
         .llvm_name = "atmega48",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48a = Cpu{
         .name = "atmega48a",
         .llvm_name = "atmega48a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48p = Cpu{
         .name = "atmega48p",
         .llvm_name = "atmega48p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega48pa = Cpu{
         .name = "atmega48pa",
         .llvm_name = "atmega48pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega64 = Cpu{
         .name = "atmega64",
         .llvm_name = "atmega64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega640 = Cpu{
         .name = "atmega640",
         .llvm_name = "atmega640",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644 = Cpu{
         .name = "atmega644",
         .llvm_name = "atmega644",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644a = Cpu{
         .name = "atmega644a",
         .llvm_name = "atmega644a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644p = Cpu{
         .name = "atmega644p",
         .llvm_name = "atmega644p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644pa = Cpu{
         .name = "atmega644pa",
         .llvm_name = "atmega644pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega644rfr2 = Cpu{
         .name = "atmega644rfr2",
         .llvm_name = "atmega644rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645 = Cpu{
         .name = "atmega645",
         .llvm_name = "atmega645",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450 = Cpu{
         .name = "atmega6450",
         .llvm_name = "atmega6450",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450a = Cpu{
         .name = "atmega6450a",
         .llvm_name = "atmega6450a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6450p = Cpu{
         .name = "atmega6450p",
         .llvm_name = "atmega6450p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645a = Cpu{
         .name = "atmega645a",
         .llvm_name = "atmega645a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega645p = Cpu{
         .name = "atmega645p",
         .llvm_name = "atmega645p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649 = Cpu{
         .name = "atmega649",
         .llvm_name = "atmega649",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490 = Cpu{
         .name = "atmega6490",
         .llvm_name = "atmega6490",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490a = Cpu{
         .name = "atmega6490a",
         .llvm_name = "atmega6490a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega6490p = Cpu{
         .name = "atmega6490p",
         .llvm_name = "atmega6490p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649a = Cpu{
         .name = "atmega649a",
         .llvm_name = "atmega649a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega649p = Cpu{
         .name = "atmega649p",
         .llvm_name = "atmega649p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64a = Cpu{
         .name = "atmega64a",
         .llvm_name = "atmega64a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64c1 = Cpu{
         .name = "atmega64c1",
         .llvm_name = "atmega64c1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64hve = Cpu{
         .name = "atmega64hve",
         .llvm_name = "atmega64hve",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64m1 = Cpu{
         .name = "atmega64m1",
         .llvm_name = "atmega64m1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega64rfr2 = Cpu{
         .name = "atmega64rfr2",
         .llvm_name = "atmega64rfr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const atmega8 = Cpu{
         .name = "atmega8",
         .llvm_name = "atmega8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8515 = Cpu{
         .name = "atmega8515",
         .llvm_name = "atmega8515",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -1329,7 +1328,7 @@ pub const cpu = struct {
     pub const atmega8535 = Cpu{
         .name = "atmega8535",
         .llvm_name = "atmega8535",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
             .lpmx,
             .movw,
@@ -1340,175 +1339,175 @@ pub const cpu = struct {
     pub const atmega88 = Cpu{
         .name = "atmega88",
         .llvm_name = "atmega88",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88a = Cpu{
         .name = "atmega88a",
         .llvm_name = "atmega88a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88p = Cpu{
         .name = "atmega88p",
         .llvm_name = "atmega88p",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega88pa = Cpu{
         .name = "atmega88pa",
         .llvm_name = "atmega88pa",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8a = Cpu{
         .name = "atmega8a",
         .llvm_name = "atmega8a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8hva = Cpu{
         .name = "atmega8hva",
         .llvm_name = "atmega8hva",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const atmega8u2 = Cpu{
         .name = "atmega8u2",
         .llvm_name = "atmega8u2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const attiny10 = Cpu{
         .name = "attiny10",
         .llvm_name = "attiny10",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny102 = Cpu{
         .name = "attiny102",
         .llvm_name = "attiny102",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny104 = Cpu{
         .name = "attiny104",
         .llvm_name = "attiny104",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny11 = Cpu{
         .name = "attiny11",
         .llvm_name = "attiny11",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr1,
         }),
     };
     pub const attiny12 = Cpu{
         .name = "attiny12",
         .llvm_name = "attiny12",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr1,
         }),
     };
     pub const attiny13 = Cpu{
         .name = "attiny13",
         .llvm_name = "attiny13",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny13a = Cpu{
         .name = "attiny13a",
         .llvm_name = "attiny13a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny15 = Cpu{
         .name = "attiny15",
         .llvm_name = "attiny15",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr1,
         }),
     };
     pub const attiny1634 = Cpu{
         .name = "attiny1634",
         .llvm_name = "attiny1634",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const attiny167 = Cpu{
         .name = "attiny167",
         .llvm_name = "attiny167",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const attiny20 = Cpu{
         .name = "attiny20",
         .llvm_name = "attiny20",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny22 = Cpu{
         .name = "attiny22",
         .llvm_name = "attiny22",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const attiny2313 = Cpu{
         .name = "attiny2313",
         .llvm_name = "attiny2313",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny2313a = Cpu{
         .name = "attiny2313a",
         .llvm_name = "attiny2313a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny24 = Cpu{
         .name = "attiny24",
         .llvm_name = "attiny24",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny24a = Cpu{
         .name = "attiny24a",
         .llvm_name = "attiny24a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny25 = Cpu{
         .name = "attiny25",
         .llvm_name = "attiny25",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny26 = Cpu{
         .name = "attiny26",
         .llvm_name = "attiny26",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
             .lpmx,
         }),
@@ -1516,602 +1515,602 @@ pub const cpu = struct {
     pub const attiny261 = Cpu{
         .name = "attiny261",
         .llvm_name = "attiny261",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny261a = Cpu{
         .name = "attiny261a",
         .llvm_name = "attiny261a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny28 = Cpu{
         .name = "attiny28",
         .llvm_name = "attiny28",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr1,
         }),
     };
     pub const attiny4 = Cpu{
         .name = "attiny4",
         .llvm_name = "attiny4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny40 = Cpu{
         .name = "attiny40",
         .llvm_name = "attiny40",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny4313 = Cpu{
         .name = "attiny4313",
         .llvm_name = "attiny4313",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny43u = Cpu{
         .name = "attiny43u",
         .llvm_name = "attiny43u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny44 = Cpu{
         .name = "attiny44",
         .llvm_name = "attiny44",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny44a = Cpu{
         .name = "attiny44a",
         .llvm_name = "attiny44a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny45 = Cpu{
         .name = "attiny45",
         .llvm_name = "attiny45",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny461 = Cpu{
         .name = "attiny461",
         .llvm_name = "attiny461",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny461a = Cpu{
         .name = "attiny461a",
         .llvm_name = "attiny461a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny48 = Cpu{
         .name = "attiny48",
         .llvm_name = "attiny48",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny5 = Cpu{
         .name = "attiny5",
         .llvm_name = "attiny5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const attiny828 = Cpu{
         .name = "attiny828",
         .llvm_name = "attiny828",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny84 = Cpu{
         .name = "attiny84",
         .llvm_name = "attiny84",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny84a = Cpu{
         .name = "attiny84a",
         .llvm_name = "attiny84a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny85 = Cpu{
         .name = "attiny85",
         .llvm_name = "attiny85",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny861 = Cpu{
         .name = "attiny861",
         .llvm_name = "attiny861",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny861a = Cpu{
         .name = "attiny861a",
         .llvm_name = "attiny861a",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny87 = Cpu{
         .name = "attiny87",
         .llvm_name = "attiny87",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny88 = Cpu{
         .name = "attiny88",
         .llvm_name = "attiny88",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const attiny9 = Cpu{
         .name = "attiny9",
         .llvm_name = "attiny9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const atxmega128a1 = Cpu{
         .name = "atxmega128a1",
         .llvm_name = "atxmega128a1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128a1u = Cpu{
         .name = "atxmega128a1u",
         .llvm_name = "atxmega128a1u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128a3 = Cpu{
         .name = "atxmega128a3",
         .llvm_name = "atxmega128a3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128a3u = Cpu{
         .name = "atxmega128a3u",
         .llvm_name = "atxmega128a3u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128a4u = Cpu{
         .name = "atxmega128a4u",
         .llvm_name = "atxmega128a4u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128b1 = Cpu{
         .name = "atxmega128b1",
         .llvm_name = "atxmega128b1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128b3 = Cpu{
         .name = "atxmega128b3",
         .llvm_name = "atxmega128b3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128c3 = Cpu{
         .name = "atxmega128c3",
         .llvm_name = "atxmega128c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega128d3 = Cpu{
         .name = "atxmega128d3",
         .llvm_name = "atxmega128d3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega128d4 = Cpu{
         .name = "atxmega128d4",
         .llvm_name = "atxmega128d4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16a4 = Cpu{
         .name = "atxmega16a4",
         .llvm_name = "atxmega16a4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16a4u = Cpu{
         .name = "atxmega16a4u",
         .llvm_name = "atxmega16a4u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega16c4 = Cpu{
         .name = "atxmega16c4",
         .llvm_name = "atxmega16c4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega16d4 = Cpu{
         .name = "atxmega16d4",
         .llvm_name = "atxmega16d4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega16e5 = Cpu{
         .name = "atxmega16e5",
         .llvm_name = "atxmega16e5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega192a3 = Cpu{
         .name = "atxmega192a3",
         .llvm_name = "atxmega192a3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega192a3u = Cpu{
         .name = "atxmega192a3u",
         .llvm_name = "atxmega192a3u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega192c3 = Cpu{
         .name = "atxmega192c3",
         .llvm_name = "atxmega192c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega192d3 = Cpu{
         .name = "atxmega192d3",
         .llvm_name = "atxmega192d3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3 = Cpu{
         .name = "atxmega256a3",
         .llvm_name = "atxmega256a3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3b = Cpu{
         .name = "atxmega256a3b",
         .llvm_name = "atxmega256a3b",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega256a3bu = Cpu{
         .name = "atxmega256a3bu",
         .llvm_name = "atxmega256a3bu",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256a3u = Cpu{
         .name = "atxmega256a3u",
         .llvm_name = "atxmega256a3u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256c3 = Cpu{
         .name = "atxmega256c3",
         .llvm_name = "atxmega256c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega256d3 = Cpu{
         .name = "atxmega256d3",
         .llvm_name = "atxmega256d3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32a4 = Cpu{
         .name = "atxmega32a4",
         .llvm_name = "atxmega32a4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32a4u = Cpu{
         .name = "atxmega32a4u",
         .llvm_name = "atxmega32a4u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega32c4 = Cpu{
         .name = "atxmega32c4",
         .llvm_name = "atxmega32c4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega32d4 = Cpu{
         .name = "atxmega32d4",
         .llvm_name = "atxmega32d4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32e5 = Cpu{
         .name = "atxmega32e5",
         .llvm_name = "atxmega32e5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega32x1 = Cpu{
         .name = "atxmega32x1",
         .llvm_name = "atxmega32x1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega384c3 = Cpu{
         .name = "atxmega384c3",
         .llvm_name = "atxmega384c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega384d3 = Cpu{
         .name = "atxmega384d3",
         .llvm_name = "atxmega384d3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a1 = Cpu{
         .name = "atxmega64a1",
         .llvm_name = "atxmega64a1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a1u = Cpu{
         .name = "atxmega64a1u",
         .llvm_name = "atxmega64a1u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64a3 = Cpu{
         .name = "atxmega64a3",
         .llvm_name = "atxmega64a3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64a3u = Cpu{
         .name = "atxmega64a3u",
         .llvm_name = "atxmega64a3u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64a4u = Cpu{
         .name = "atxmega64a4u",
         .llvm_name = "atxmega64a4u",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64b1 = Cpu{
         .name = "atxmega64b1",
         .llvm_name = "atxmega64b1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64b3 = Cpu{
         .name = "atxmega64b3",
         .llvm_name = "atxmega64b3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64c3 = Cpu{
         .name = "atxmega64c3",
         .llvm_name = "atxmega64c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmegau,
         }),
     };
     pub const atxmega64d3 = Cpu{
         .name = "atxmega64d3",
         .llvm_name = "atxmega64d3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega64d4 = Cpu{
         .name = "atxmega64d4",
         .llvm_name = "atxmega64d4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const atxmega8e5 = Cpu{
         .name = "atxmega8e5",
         .llvm_name = "atxmega8e5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avr1 = Cpu{
         .name = "avr1",
         .llvm_name = "avr1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr1,
         }),
     };
     pub const avr2 = Cpu{
         .name = "avr2",
         .llvm_name = "avr2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr2,
         }),
     };
     pub const avr25 = Cpu{
         .name = "avr25",
         .llvm_name = "avr25",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr25,
         }),
     };
     pub const avr3 = Cpu{
         .name = "avr3",
         .llvm_name = "avr3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr3,
         }),
     };
     pub const avr31 = Cpu{
         .name = "avr31",
         .llvm_name = "avr31",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr31,
         }),
     };
     pub const avr35 = Cpu{
         .name = "avr35",
         .llvm_name = "avr35",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr35,
         }),
     };
     pub const avr4 = Cpu{
         .name = "avr4",
         .llvm_name = "avr4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr4,
         }),
     };
     pub const avr5 = Cpu{
         .name = "avr5",
         .llvm_name = "avr5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
     pub const avr51 = Cpu{
         .name = "avr51",
         .llvm_name = "avr51",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr51,
         }),
     };
     pub const avr6 = Cpu{
         .name = "avr6",
         .llvm_name = "avr6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr6,
         }),
     };
     pub const avrtiny = Cpu{
         .name = "avrtiny",
         .llvm_name = "avrtiny",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avrtiny,
         }),
     };
     pub const avrxmega1 = Cpu{
         .name = "avrxmega1",
         .llvm_name = "avrxmega1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega2 = Cpu{
         .name = "avrxmega2",
         .llvm_name = "avrxmega2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega3 = Cpu{
         .name = "avrxmega3",
         .llvm_name = "avrxmega3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega4 = Cpu{
         .name = "avrxmega4",
         .llvm_name = "avrxmega4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega5 = Cpu{
         .name = "avrxmega5",
         .llvm_name = "avrxmega5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega6 = Cpu{
         .name = "avrxmega6",
         .llvm_name = "avrxmega6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const avrxmega7 = Cpu{
         .name = "avrxmega7",
         .llvm_name = "avrxmega7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .xmega,
         }),
     };
     pub const m3000 = Cpu{
         .name = "m3000",
         .llvm_name = "m3000",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .avr5,
         }),
     };
@@ -2380,6 +2379,6 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.m3000,
 };
 
-pub const baseline_features = featureSet(&all_features, &[_]Feature{
+pub const baseline_features = featureSet(&[_]Feature{
     .avr0,
 });
diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig
index 350d434a6c5da066057dc8984dec96927531adea..b6179075cc2e4cdbd590a9ffb781bdb3af14244b 100644
--- a/lib/std/target/bpf.zig
+++ b/lib/std/target/bpf.zig
@@ -16,23 +16,22 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.alu32)] = .{
         .llvm_name = "alu32",
         .description = "Enable ALU32 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dummy)] = .{
         .llvm_name = "dummy",
         .description = "unused feature",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dwarfris)] = .{
         .llvm_name = "dwarfris",
         .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -41,27 +40,27 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const probe = Cpu{
         .name = "probe",
         .llvm_name = "probe",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v1 = Cpu{
         .name = "v1",
         .llvm_name = "v1",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v2 = Cpu{
         .name = "v2",
         .llvm_name = "v2",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v3 = Cpu{
         .name = "v3",
         .llvm_name = "v3",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig
index cdb44ec889800119207477350a28b4c2d4940926..f873237493f419a7f53a3b86220649520b6f04c3 100644
--- a/lib/std/target/hexagon.zig
+++ b/lib/std/target/hexagon.zig
@@ -37,38 +37,38 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.duplex)] = .{
         .llvm_name = "duplex",
         .description = "Enable generation of duplex instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx)] = .{
         .llvm_name = "hvx",
         .description = "Hexagon HVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hvx_length128b)] = .{
         .llvm_name = "hvx-length128b",
         .description = "Hexagon HVX 128B instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvx_length64b)] = .{
         .llvm_name = "hvx-length64b",
         .description = "Hexagon HVX 64B instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvxv60)] = .{
         .llvm_name = "hvxv60",
         .description = "Hexagon HVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
         }),
     };
     result[@enumToInt(Feature.hvxv62)] = .{
         .llvm_name = "hvxv62",
         .description = "Hexagon HVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
             .hvxv60,
         }),
@@ -76,7 +76,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.hvxv65)] = .{
         .llvm_name = "hvxv65",
         .description = "Hexagon HVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
             .hvxv60,
             .hvxv62,
@@ -85,7 +85,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.hvxv66)] = .{
         .llvm_name = "hvxv66",
         .description = "Hexagon HVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hvx,
             .hvxv60,
             .hvxv62,
@@ -96,92 +96,91 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.long_calls)] = .{
         .llvm_name = "long-calls",
         .description = "Use constant-extended calls",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mem_noshuf)] = .{
         .llvm_name = "mem_noshuf",
         .description = "Supports mem_noshuf feature",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.memops)] = .{
         .llvm_name = "memops",
         .description = "Use memop instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noreturn_stack_elim)] = .{
         .llvm_name = "noreturn-stack-elim",
         .description = "Eliminate stack allocation in a noreturn function when possible",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nvj)] = .{
         .llvm_name = "nvj",
         .description = "Support for new-value jumps",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .packets,
         }),
     };
     result[@enumToInt(Feature.nvs)] = .{
         .llvm_name = "nvs",
         .description = "Support for new-value stores",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .packets,
         }),
     };
     result[@enumToInt(Feature.packets)] = .{
         .llvm_name = "packets",
         .description = "Support for instruction packets",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reserved_r19)] = .{
         .llvm_name = "reserved-r19",
         .description = "Reserve register R19",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.small_data)] = .{
         .llvm_name = "small-data",
         .description = "Allow GP-relative addressing of global variables",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v5)] = .{
         .llvm_name = "v5",
         .description = "Enable Hexagon V5 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v55)] = .{
         .llvm_name = "v55",
         .description = "Enable Hexagon V55 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v60)] = .{
         .llvm_name = "v60",
         .description = "Enable Hexagon V60 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v62)] = .{
         .llvm_name = "v62",
         .description = "Enable Hexagon V62 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v65)] = .{
         .llvm_name = "v65",
         .description = "Enable Hexagon V65 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v66)] = .{
         .llvm_name = "v66",
         .description = "Enable Hexagon V66 architecture",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.zreg)] = .{
         .llvm_name = "zreg",
         .description = "Hexagon ZReg extension instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -190,7 +189,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -205,7 +204,7 @@ pub const cpu = struct {
     pub const hexagonv5 = Cpu{
         .name = "hexagonv5",
         .llvm_name = "hexagonv5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -218,7 +217,7 @@ pub const cpu = struct {
     pub const hexagonv55 = Cpu{
         .name = "hexagonv55",
         .llvm_name = "hexagonv55",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -232,7 +231,7 @@ pub const cpu = struct {
     pub const hexagonv60 = Cpu{
         .name = "hexagonv60",
         .llvm_name = "hexagonv60",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -247,7 +246,7 @@ pub const cpu = struct {
     pub const hexagonv62 = Cpu{
         .name = "hexagonv62",
         .llvm_name = "hexagonv62",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .memops,
             .nvj,
@@ -263,7 +262,7 @@ pub const cpu = struct {
     pub const hexagonv65 = Cpu{
         .name = "hexagonv65",
         .llvm_name = "hexagonv65",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .mem_noshuf,
             .memops,
@@ -281,7 +280,7 @@ pub const cpu = struct {
     pub const hexagonv66 = Cpu{
         .name = "hexagonv66",
         .llvm_name = "hexagonv66",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .duplex,
             .mem_noshuf,
             .memops,
diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig
index 51835f29808e2bb32f4b65426bb0e33266d92ae4..fce7c9ce36c5446af3ff23f4a86a8a625e9c7341 100644
--- a/lib/std/target/mips.zig
+++ b/lib/std/target/mips.zig
@@ -62,36 +62,36 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.abs2008)] = .{
         .llvm_name = "abs2008",
         .description = "Disable IEEE 754-2008 abs.fmt mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cnmips)] = .{
         .llvm_name = "cnmips",
         .description = "Octeon cnMIPS Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips64r2,
         }),
     };
     result[@enumToInt(Feature.crc)] = .{
         .llvm_name = "crc",
         .description = "Mips R6 CRC ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dsp)] = .{
         .llvm_name = "dsp",
         .description = "Mips DSP ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dspr2)] = .{
         .llvm_name = "dspr2",
         .description = "Mips DSP-R2 ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dsp,
         }),
     };
     result[@enumToInt(Feature.dspr3)] = .{
         .llvm_name = "dspr3",
         .description = "Mips DSP-R3 ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .dsp,
             .dspr2,
         }),
@@ -99,59 +99,59 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.eva)] = .{
         .llvm_name = "eva",
         .description = "Mips EVA ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp64)] = .{
         .llvm_name = "fp64",
         .description = "Support 64-bit FP registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fpxx)] = .{
         .llvm_name = "fpxx",
         .description = "Support for FPXX",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ginv)] = .{
         .llvm_name = "ginv",
         .description = "Mips Global Invalidate ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gp64)] = .{
         .llvm_name = "gp64",
         .description = "General Purpose Registers are 64-bit wide",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.long_calls)] = .{
         .llvm_name = "long-calls",
         .description = "Disable use of the jal instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.micromips)] = .{
         .llvm_name = "micromips",
         .description = "microMips mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips1)] = .{
         .llvm_name = "mips1",
         .description = "Mips I ISA Support [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips16)] = .{
         .llvm_name = "mips16",
         .description = "Mips16 mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips2)] = .{
         .llvm_name = "mips2",
         .description = "Mips II ISA Support [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips1,
         }),
     };
     result[@enumToInt(Feature.mips3)] = .{
         .llvm_name = "mips3",
         .description = "MIPS III ISA Support [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fp64,
             .gp64,
             .mips2,
@@ -162,7 +162,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips32)] = .{
         .llvm_name = "mips32",
         .description = "Mips32 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips2,
             .mips3_32,
             .mips4_32,
@@ -171,7 +171,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips32r2)] = .{
         .llvm_name = "mips32r2",
         .description = "Mips32r2 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32,
             .mips3_32r2,
             .mips4_32r2,
@@ -181,21 +181,21 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips32r3)] = .{
         .llvm_name = "mips32r3",
         .description = "Mips32r3 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r2,
         }),
     };
     result[@enumToInt(Feature.mips32r5)] = .{
         .llvm_name = "mips32r5",
         .description = "Mips32r5 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r3,
         }),
     };
     result[@enumToInt(Feature.mips32r6)] = .{
         .llvm_name = "mips32r6",
         .description = "Mips32r6 ISA Support [experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .abs2008,
             .fp64,
             .mips32r5,
@@ -205,17 +205,17 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips3_32)] = .{
         .llvm_name = "mips3_32",
         .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips3_32r2)] = .{
         .llvm_name = "mips3_32r2",
         .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4)] = .{
         .llvm_name = "mips4",
         .description = "MIPS IV ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips3,
             .mips4_32,
             .mips4_32r2,
@@ -224,17 +224,17 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips4_32)] = .{
         .llvm_name = "mips4_32",
         .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips4_32r2)] = .{
         .llvm_name = "mips4_32r2",
         .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips5)] = .{
         .llvm_name = "mips5",
         .description = "MIPS V ISA Support [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips4,
             .mips5_32r2,
         }),
@@ -242,12 +242,12 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips5_32r2)] = .{
         .llvm_name = "mips5_32r2",
         .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mips64)] = .{
         .llvm_name = "mips64",
         .description = "Mips64 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32,
             .mips5,
         }),
@@ -255,7 +255,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips64r2)] = .{
         .llvm_name = "mips64r2",
         .description = "Mips64r2 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r2,
             .mips64,
         }),
@@ -263,7 +263,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips64r3)] = .{
         .llvm_name = "mips64r3",
         .description = "Mips64r3 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r3,
             .mips64r2,
         }),
@@ -271,7 +271,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips64r5)] = .{
         .llvm_name = "mips64r5",
         .description = "Mips64r5 ISA Support",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r5,
             .mips64r3,
         }),
@@ -279,7 +279,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.mips64r6)] = .{
         .llvm_name = "mips64r6",
         .description = "Mips64r6 ISA Support [experimental]",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .abs2008,
             .mips32r6,
             .mips64r5,
@@ -289,85 +289,84 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.msa)] = .{
         .llvm_name = "msa",
         .description = "Mips MSA ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mt)] = .{
         .llvm_name = "mt",
         .description = "Mips MT ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nan2008)] = .{
         .llvm_name = "nan2008",
         .description = "IEEE 754-2008 NaN encoding",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.noabicalls)] = .{
         .llvm_name = "noabicalls",
         .description = "Disable SVR4-style position-independent code",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nomadd4)] = .{
         .llvm_name = "nomadd4",
         .description = "Disable 4-operand madd.fmt and related instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nooddspreg)] = .{
         .llvm_name = "nooddspreg",
         .description = "Disable odd numbered single-precision registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.p5600)] = .{
         .llvm_name = "p5600",
         .description = "The P5600 Processor",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mips32r5,
         }),
     };
     result[@enumToInt(Feature.ptr64)] = .{
         .llvm_name = "ptr64",
         .description = "Pointers are 64-bit wide",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.single_float)] = .{
         .llvm_name = "single-float",
         .description = "Only supports single precision float",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .llvm_name = "soft-float",
         .description = "Does not support floating point instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sym32)] = .{
         .llvm_name = "sym32",
         .description = "Symbols are 32 bit on Mips64",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
         .llvm_name = "use-indirect-jump-hazard",
         .description = "Use indirect jump guards to prevent certain speculation based attacks",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.use_tcc_in_div)] = .{
         .llvm_name = "use-tcc-in-div",
         .description = "Force the assembler to use trapping",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vfpu)] = .{
         .llvm_name = "vfpu",
         .description = "Enable vector FPU instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.virt)] = .{
         .llvm_name = "virt",
         .description = "Mips Virtualization ASE",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -376,112 +375,112 @@ pub const cpu = struct {
     pub const mips1 = Cpu{
         .name = "mips1",
         .llvm_name = "mips1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips1,
         }),
     };
     pub const mips2 = Cpu{
         .name = "mips2",
         .llvm_name = "mips2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips2,
         }),
     };
     pub const mips3 = Cpu{
         .name = "mips3",
         .llvm_name = "mips3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips3,
         }),
     };
     pub const mips32 = Cpu{
         .name = "mips32",
         .llvm_name = "mips32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips32,
         }),
     };
     pub const mips32r2 = Cpu{
         .name = "mips32r2",
         .llvm_name = "mips32r2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips32r2,
         }),
     };
     pub const mips32r3 = Cpu{
         .name = "mips32r3",
         .llvm_name = "mips32r3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips32r3,
         }),
     };
     pub const mips32r5 = Cpu{
         .name = "mips32r5",
         .llvm_name = "mips32r5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips32r5,
         }),
     };
     pub const mips32r6 = Cpu{
         .name = "mips32r6",
         .llvm_name = "mips32r6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips32r6,
         }),
     };
     pub const mips4 = Cpu{
         .name = "mips4",
         .llvm_name = "mips4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips4,
         }),
     };
     pub const mips5 = Cpu{
         .name = "mips5",
         .llvm_name = "mips5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips5,
         }),
     };
     pub const mips64 = Cpu{
         .name = "mips64",
         .llvm_name = "mips64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips64,
         }),
     };
     pub const mips64r2 = Cpu{
         .name = "mips64r2",
         .llvm_name = "mips64r2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips64r2,
         }),
     };
     pub const mips64r3 = Cpu{
         .name = "mips64r3",
         .llvm_name = "mips64r3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips64r3,
         }),
     };
     pub const mips64r5 = Cpu{
         .name = "mips64r5",
         .llvm_name = "mips64r5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips64r5,
         }),
     };
     pub const mips64r6 = Cpu{
         .name = "mips64r6",
         .llvm_name = "mips64r6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mips64r6,
         }),
     };
     pub const octeon = Cpu{
         .name = "octeon",
         .llvm_name = "octeon",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cnmips,
             .mips64r2,
         }),
@@ -489,7 +488,7 @@ pub const cpu = struct {
     pub const p5600 = Cpu{
         .name = "p5600",
         .llvm_name = "p5600",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .p5600,
         }),
     };
diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig
index ecbc362b1afd4f9142ae19f37faa89cb2fd5998d..bc932f22956db69ca09abb81d3c8a59f4f522ad0 100644
--- a/lib/std/target/msp430.zig
+++ b/lib/std/target/msp430.zig
@@ -17,28 +17,27 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.ext)] = .{
         .llvm_name = "ext",
         .description = "Enable MSP430-X extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult16)] = .{
         .llvm_name = "hwmult16",
         .description = "Enable 16-bit hardware multiplier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmult32)] = .{
         .llvm_name = "hwmult32",
         .description = "Enable 32-bit hardware multiplier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hwmultf5)] = .{
         .llvm_name = "hwmultf5",
         .description = "Enable F5 series hardware multiplier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -47,17 +46,17 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const msp430 = Cpu{
         .name = "msp430",
         .llvm_name = "msp430",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const msp430x = Cpu{
         .name = "msp430x",
         .llvm_name = "msp430x",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ext,
         }),
     };
diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig
index 58babffd86d7ae6eb8240837ee5f500c99ebae94..1800e320b4af7d9ba9cdf91dd889b6d62f950e07 100644
--- a/lib/std/target/nvptx.zig
+++ b/lib/std/target/nvptx.zig
@@ -38,133 +38,132 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.ptx32)] = .{
         .llvm_name = "ptx32",
         .description = "Use PTX version 3.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx40)] = .{
         .llvm_name = "ptx40",
         .description = "Use PTX version 4.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx41)] = .{
         .llvm_name = "ptx41",
         .description = "Use PTX version 4.1",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx42)] = .{
         .llvm_name = "ptx42",
         .description = "Use PTX version 4.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx43)] = .{
         .llvm_name = "ptx43",
         .description = "Use PTX version 4.3",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx50)] = .{
         .llvm_name = "ptx50",
         .description = "Use PTX version 5.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx60)] = .{
         .llvm_name = "ptx60",
         .description = "Use PTX version 6.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx61)] = .{
         .llvm_name = "ptx61",
         .description = "Use PTX version 6.1",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx63)] = .{
         .llvm_name = "ptx63",
         .description = "Use PTX version 6.3",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptx64)] = .{
         .llvm_name = "ptx64",
         .description = "Use PTX version 6.4",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_20)] = .{
         .llvm_name = "sm_20",
         .description = "Target SM 2.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_21)] = .{
         .llvm_name = "sm_21",
         .description = "Target SM 2.1",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_30)] = .{
         .llvm_name = "sm_30",
         .description = "Target SM 3.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_32)] = .{
         .llvm_name = "sm_32",
         .description = "Target SM 3.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_35)] = .{
         .llvm_name = "sm_35",
         .description = "Target SM 3.5",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_37)] = .{
         .llvm_name = "sm_37",
         .description = "Target SM 3.7",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_50)] = .{
         .llvm_name = "sm_50",
         .description = "Target SM 5.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_52)] = .{
         .llvm_name = "sm_52",
         .description = "Target SM 5.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_53)] = .{
         .llvm_name = "sm_53",
         .description = "Target SM 5.3",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_60)] = .{
         .llvm_name = "sm_60",
         .description = "Target SM 6.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_61)] = .{
         .llvm_name = "sm_61",
         .description = "Target SM 6.1",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_62)] = .{
         .llvm_name = "sm_62",
         .description = "Target SM 6.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_70)] = .{
         .llvm_name = "sm_70",
         .description = "Target SM 7.0",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_72)] = .{
         .llvm_name = "sm_72",
         .description = "Target SM 7.2",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sm_75)] = .{
         .llvm_name = "sm_75",
         .description = "Target SM 7.5",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -173,28 +172,28 @@ pub const cpu = struct {
     pub const sm_20 = Cpu{
         .name = "sm_20",
         .llvm_name = "sm_20",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .sm_20,
         }),
     };
     pub const sm_21 = Cpu{
         .name = "sm_21",
         .llvm_name = "sm_21",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .sm_21,
         }),
     };
     pub const sm_30 = Cpu{
         .name = "sm_30",
         .llvm_name = "sm_30",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .sm_30,
         }),
     };
     pub const sm_32 = Cpu{
         .name = "sm_32",
         .llvm_name = "sm_32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx40,
             .sm_32,
         }),
@@ -202,14 +201,14 @@ pub const cpu = struct {
     pub const sm_35 = Cpu{
         .name = "sm_35",
         .llvm_name = "sm_35",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .sm_35,
         }),
     };
     pub const sm_37 = Cpu{
         .name = "sm_37",
         .llvm_name = "sm_37",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx41,
             .sm_37,
         }),
@@ -217,7 +216,7 @@ pub const cpu = struct {
     pub const sm_50 = Cpu{
         .name = "sm_50",
         .llvm_name = "sm_50",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx40,
             .sm_50,
         }),
@@ -225,7 +224,7 @@ pub const cpu = struct {
     pub const sm_52 = Cpu{
         .name = "sm_52",
         .llvm_name = "sm_52",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx41,
             .sm_52,
         }),
@@ -233,7 +232,7 @@ pub const cpu = struct {
     pub const sm_53 = Cpu{
         .name = "sm_53",
         .llvm_name = "sm_53",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx42,
             .sm_53,
         }),
@@ -241,7 +240,7 @@ pub const cpu = struct {
     pub const sm_60 = Cpu{
         .name = "sm_60",
         .llvm_name = "sm_60",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx50,
             .sm_60,
         }),
@@ -249,7 +248,7 @@ pub const cpu = struct {
     pub const sm_61 = Cpu{
         .name = "sm_61",
         .llvm_name = "sm_61",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx50,
             .sm_61,
         }),
@@ -257,7 +256,7 @@ pub const cpu = struct {
     pub const sm_62 = Cpu{
         .name = "sm_62",
         .llvm_name = "sm_62",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx50,
             .sm_62,
         }),
@@ -265,7 +264,7 @@ pub const cpu = struct {
     pub const sm_70 = Cpu{
         .name = "sm_70",
         .llvm_name = "sm_70",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx60,
             .sm_70,
         }),
@@ -273,7 +272,7 @@ pub const cpu = struct {
     pub const sm_72 = Cpu{
         .name = "sm_72",
         .llvm_name = "sm_72",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx61,
             .sm_72,
         }),
@@ -281,7 +280,7 @@ pub const cpu = struct {
     pub const sm_75 = Cpu{
         .name = "sm_75",
         .llvm_name = "sm_75",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .ptx63,
             .sm_75,
         }),
diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig
index 981c595c93eedba66c7804523a961d1d397e348e..41321f7b04097da960515e03557c4c8f8a3bbc7e 100644
--- a/lib/std/target/powerpc.zig
+++ b/lib/std/target/powerpc.zig
@@ -64,216 +64,216 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.@"64bit")] = .{
         .llvm_name = "64bit",
         .description = "Enable 64-bit instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.@"64bitregs")] = .{
         .llvm_name = "64bitregs",
         .description = "Enable 64-bit registers usage for ppc32 [beta]",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.altivec)] = .{
         .llvm_name = "altivec",
         .description = "Enable Altivec instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.booke)] = .{
         .llvm_name = "booke",
         .description = "Enable Book E instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .icbt,
         }),
     };
     result[@enumToInt(Feature.bpermd)] = .{
         .llvm_name = "bpermd",
         .description = "Enable the bpermd instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmpb)] = .{
         .llvm_name = "cmpb",
         .description = "Enable the cmpb instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crbits)] = .{
         .llvm_name = "crbits",
         .description = "Use condition-register bits individually",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.crypto)] = .{
         .llvm_name = "crypto",
         .description = "Enable POWER8 Crypto instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .power8_altivec,
         }),
     };
     result[@enumToInt(Feature.direct_move)] = .{
         .llvm_name = "direct-move",
         .description = "Enable Power8 direct move instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vsx,
         }),
     };
     result[@enumToInt(Feature.e500)] = .{
         .llvm_name = "e500",
         .description = "Enable E500/E500mc instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.extdiv)] = .{
         .llvm_name = "extdiv",
         .description = "Enable extended divide instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fcpsgn)] = .{
         .llvm_name = "fcpsgn",
         .description = "Enable the fcpsgn instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.float128)] = .{
         .llvm_name = "float128",
         .description = "Enable the __float128 data type for IEEE-754R Binary128.",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .vsx,
         }),
     };
     result[@enumToInt(Feature.fpcvt)] = .{
         .llvm_name = "fpcvt",
         .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fprnd)] = .{
         .llvm_name = "fprnd",
         .description = "Enable the fri[mnpz] instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fpu)] = .{
         .llvm_name = "fpu",
         .description = "Enable classic FPU instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hard_float,
         }),
     };
     result[@enumToInt(Feature.fre)] = .{
         .llvm_name = "fre",
         .description = "Enable the fre instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fres)] = .{
         .llvm_name = "fres",
         .description = "Enable the fres instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.frsqrte)] = .{
         .llvm_name = "frsqrte",
         .description = "Enable the frsqrte instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.frsqrtes)] = .{
         .llvm_name = "frsqrtes",
         .description = "Enable the frsqrtes instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.fsqrt)] = .{
         .llvm_name = "fsqrt",
         .description = "Enable the fsqrt instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.hard_float)] = .{
         .llvm_name = "hard-float",
         .description = "Enable floating-point instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.htm)] = .{
         .llvm_name = "htm",
         .description = "Enable Hardware Transactional Memory instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.icbt)] = .{
         .llvm_name = "icbt",
         .description = "Enable icbt instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invariant_function_descriptors)] = .{
         .llvm_name = "invariant-function-descriptors",
         .description = "Assume function descriptors are invariant",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isa_v30_instructions)] = .{
         .llvm_name = "isa-v30-instructions",
         .description = "Enable instructions added in ISA 3.0.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.isel)] = .{
         .llvm_name = "isel",
         .description = "Enable the isel instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ldbrx)] = .{
         .llvm_name = "ldbrx",
         .description = "Enable the ldbrx instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lfiwax)] = .{
         .llvm_name = "lfiwax",
         .description = "Enable the lfiwax instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.longcall)] = .{
         .llvm_name = "longcall",
         .description = "Always use indirect calls",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mfocrf)] = .{
         .llvm_name = "mfocrf",
         .description = "Enable the MFOCRF instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.msync)] = .{
         .llvm_name = "msync",
         .description = "Has only the msync instruction instead of sync",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .booke,
         }),
     };
     result[@enumToInt(Feature.partword_atomics)] = .{
         .llvm_name = "partword-atomics",
         .description = "Enable l[bh]arx and st[bh]cx.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcntd)] = .{
         .llvm_name = "popcntd",
         .description = "Enable the popcnt[dw] instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.power8_altivec)] = .{
         .llvm_name = "power8-altivec",
         .description = "Enable POWER8 Altivec instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .altivec,
         }),
     };
     result[@enumToInt(Feature.power8_vector)] = .{
         .llvm_name = "power8-vector",
         .description = "Enable POWER8 vector instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .power8_altivec,
             .vsx,
         }),
@@ -281,7 +281,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.power9_altivec)] = .{
         .llvm_name = "power9-altivec",
         .description = "Enable POWER9 Altivec instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .isa_v30_instructions,
             .power8_altivec,
         }),
@@ -289,7 +289,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.power9_vector)] = .{
         .llvm_name = "power9-vector",
         .description = "Enable POWER9 vector instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .isa_v30_instructions,
             .power8_vector,
             .power9_altivec,
@@ -298,73 +298,73 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.ppc_postra_sched)] = .{
         .llvm_name = "ppc-postra-sched",
         .description = "Use PowerPC post-RA scheduling strategy",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc_prera_sched)] = .{
         .llvm_name = "ppc-prera-sched",
         .description = "Use PowerPC pre-RA scheduling strategy",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc4xx)] = .{
         .llvm_name = "ppc4xx",
         .description = "Enable PPC 4xx instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ppc6xx)] = .{
         .llvm_name = "ppc6xx",
         .description = "Enable PPC 6xx instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.qpx)] = .{
         .llvm_name = "qpx",
         .description = "Enable QPX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.recipprec)] = .{
         .llvm_name = "recipprec",
         .description = "Assume higher precision reciprocal estimates",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.secure_plt)] = .{
         .llvm_name = "secure-plt",
         .description = "Enable secure plt mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_popcntd)] = .{
         .llvm_name = "slow-popcntd",
         .description = "Has slow popcnt[dw] instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.spe)] = .{
         .llvm_name = "spe",
         .description = "Enable SPE instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .hard_float,
         }),
     };
     result[@enumToInt(Feature.stfiwx)] = .{
         .llvm_name = "stfiwx",
         .description = "Enable the stfiwx instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     result[@enumToInt(Feature.two_const_nr)] = .{
         .llvm_name = "two-const-nr",
         .description = "Requires two constant Newton-Raphson computation",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vectors_use_two_units)] = .{
         .llvm_name = "vectors-use-two-units",
         .description = "Vectors use two units",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vsx)] = .{
         .llvm_name = "vsx",
         .description = "Enable VSX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .altivec,
         }),
     };
@@ -372,7 +372,6 @@ pub const all_features = blk: {
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -381,7 +380,7 @@ pub const cpu = struct {
     pub const @"440" = Cpu{
         .name = "440",
         .llvm_name = "440",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .booke,
             .fres,
             .frsqrte,
@@ -393,7 +392,7 @@ pub const cpu = struct {
     pub const @"450" = Cpu{
         .name = "450",
         .llvm_name = "450",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .booke,
             .fres,
             .frsqrte,
@@ -405,21 +404,21 @@ pub const cpu = struct {
     pub const @"601" = Cpu{
         .name = "601",
         .llvm_name = "601",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     pub const @"602" = Cpu{
         .name = "602",
         .llvm_name = "602",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fpu,
         }),
     };
     pub const @"603" = Cpu{
         .name = "603",
         .llvm_name = "603",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -427,7 +426,7 @@ pub const cpu = struct {
     pub const @"603e" = Cpu{
         .name = "603e",
         .llvm_name = "603e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -435,7 +434,7 @@ pub const cpu = struct {
     pub const @"603ev" = Cpu{
         .name = "603ev",
         .llvm_name = "603ev",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -443,7 +442,7 @@ pub const cpu = struct {
     pub const @"604" = Cpu{
         .name = "604",
         .llvm_name = "604",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -451,7 +450,7 @@ pub const cpu = struct {
     pub const @"604e" = Cpu{
         .name = "604e",
         .llvm_name = "604e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -459,7 +458,7 @@ pub const cpu = struct {
     pub const @"620" = Cpu{
         .name = "620",
         .llvm_name = "620",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -467,7 +466,7 @@ pub const cpu = struct {
     pub const @"7400" = Cpu{
         .name = "7400",
         .llvm_name = "7400",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -476,7 +475,7 @@ pub const cpu = struct {
     pub const @"7450" = Cpu{
         .name = "7450",
         .llvm_name = "7450",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -485,7 +484,7 @@ pub const cpu = struct {
     pub const @"750" = Cpu{
         .name = "750",
         .llvm_name = "750",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -493,7 +492,7 @@ pub const cpu = struct {
     pub const @"970" = Cpu{
         .name = "970",
         .llvm_name = "970",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -506,7 +505,7 @@ pub const cpu = struct {
     pub const a2 = Cpu{
         .name = "a2",
         .llvm_name = "a2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .booke,
             .cmpb,
@@ -531,7 +530,7 @@ pub const cpu = struct {
     pub const a2q = Cpu{
         .name = "a2q",
         .llvm_name = "a2q",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .booke,
             .cmpb,
@@ -557,7 +556,7 @@ pub const cpu = struct {
     pub const e500 = Cpu{
         .name = "e500",
         .llvm_name = "e500",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .booke,
             .icbt,
             .isel,
@@ -566,7 +565,7 @@ pub const cpu = struct {
     pub const e500mc = Cpu{
         .name = "e500mc",
         .llvm_name = "e500mc",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .booke,
             .icbt,
             .isel,
@@ -576,7 +575,7 @@ pub const cpu = struct {
     pub const e5500 = Cpu{
         .name = "e5500",
         .llvm_name = "e5500",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .booke,
             .icbt,
@@ -588,7 +587,7 @@ pub const cpu = struct {
     pub const g3 = Cpu{
         .name = "g3",
         .llvm_name = "g3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fres,
             .frsqrte,
         }),
@@ -596,7 +595,7 @@ pub const cpu = struct {
     pub const g4 = Cpu{
         .name = "g4",
         .llvm_name = "g4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -605,7 +604,7 @@ pub const cpu = struct {
     pub const @"g4+" = Cpu{
         .name = "g4+",
         .llvm_name = "g4+",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .altivec,
             .fres,
             .frsqrte,
@@ -614,7 +613,7 @@ pub const cpu = struct {
     pub const g5 = Cpu{
         .name = "g5",
         .llvm_name = "g5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -627,28 +626,28 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc = Cpu{
         .name = "ppc",
         .llvm_name = "ppc",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc32 = Cpu{
         .name = "ppc32",
         .llvm_name = "ppc32",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hard_float,
         }),
     };
     pub const ppc64 = Cpu{
         .name = "ppc64",
         .llvm_name = "ppc64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -661,7 +660,7 @@ pub const cpu = struct {
     pub const ppc64le = Cpu{
         .name = "ppc64le",
         .llvm_name = "ppc64le",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -696,7 +695,7 @@ pub const cpu = struct {
     pub const pwr3 = Cpu{
         .name = "pwr3",
         .llvm_name = "pwr3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -708,7 +707,7 @@ pub const cpu = struct {
     pub const pwr4 = Cpu{
         .name = "pwr4",
         .llvm_name = "pwr4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fres,
@@ -721,7 +720,7 @@ pub const cpu = struct {
     pub const pwr5 = Cpu{
         .name = "pwr5",
         .llvm_name = "pwr5",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fre,
@@ -736,7 +735,7 @@ pub const cpu = struct {
     pub const pwr5x = Cpu{
         .name = "pwr5x",
         .llvm_name = "pwr5x",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .fprnd,
@@ -752,7 +751,7 @@ pub const cpu = struct {
     pub const pwr6 = Cpu{
         .name = "pwr6",
         .llvm_name = "pwr6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .cmpb,
@@ -772,7 +771,7 @@ pub const cpu = struct {
     pub const pwr6x = Cpu{
         .name = "pwr6x",
         .llvm_name = "pwr6x",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .cmpb,
@@ -792,7 +791,7 @@ pub const cpu = struct {
     pub const pwr7 = Cpu{
         .name = "pwr7",
         .llvm_name = "pwr7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -820,7 +819,7 @@ pub const cpu = struct {
     pub const pwr8 = Cpu{
         .name = "pwr8",
         .llvm_name = "pwr8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
@@ -855,7 +854,7 @@ pub const cpu = struct {
     pub const pwr9 = Cpu{
         .name = "pwr9",
         .llvm_name = "pwr9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .altivec,
             .bpermd,
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index f4ba975d085edc5b7ea261c4b8f4974498635281..e0671ad91b66033a3f85c3a4d9b1894fcec5fe12 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -21,50 +21,49 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.@"64bit")] = .{
         .llvm_name = "64bit",
         .description = "Implements RV64",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.a)] = .{
         .llvm_name = "a",
         .description = "'A' (Atomic Instructions)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.c)] = .{
         .llvm_name = "c",
         .description = "'C' (Compressed Instructions)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.d)] = .{
         .llvm_name = "d",
         .description = "'D' (Double-Precision Floating-Point)",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .f,
         }),
     };
     result[@enumToInt(Feature.e)] = .{
         .llvm_name = "e",
         .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f)] = .{
         .llvm_name = "f",
         .description = "'F' (Single-Precision Floating-Point)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.m)] = .{
         .llvm_name = "m",
         .description = "'M' (Integer Multiplication and Division)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.relax)] = .{
         .llvm_name = "relax",
         .description = "Enable Linker relaxation.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -73,12 +72,12 @@ pub const cpu = struct {
     pub const generic_rv32 = Cpu{
         .name = "generic_rv32",
         .llvm_name = "generic-rv32",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const generic_rv64 = Cpu{
         .name = "generic_rv64",
         .llvm_name = "generic-rv64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
         }),
     };
@@ -92,7 +91,7 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.generic_rv64,
 };
 
-pub const baseline_32_features = featureSet(&all_features, &[_]Feature{
+pub const baseline_32_features = featureSet(&[_]Feature{
     .a,
     .c,
     .d,
@@ -101,7 +100,7 @@ pub const baseline_32_features = featureSet(&all_features, &[_]Feature{
     .relax,
 });
 
-pub const baseline_64_features = featureSet(&all_features, &[_]Feature{
+pub const baseline_64_features = featureSet(&[_]Feature{
     .@"64bit",
     .a,
     .c,
diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig
index a9d75f5191363aed4b5a49aa5bb10e0b86fa5edd..923cc0732c054bccdc60996a879204c24c0dd9d0 100644
--- a/lib/std/target/sparc.zig
+++ b/lib/std/target/sparc.zig
@@ -32,103 +32,102 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.deprecated_v8)] = .{
         .llvm_name = "deprecated-v8",
         .description = "Enable deprecated V8 instructions in V9 mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.detectroundchange)] = .{
         .llvm_name = "detectroundchange",
         .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fixallfdivsqrt)] = .{
         .llvm_name = "fixallfdivsqrt",
         .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hard_quad_float)] = .{
         .llvm_name = "hard-quad-float",
         .description = "Enable quad-word floating point instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasleoncasa)] = .{
         .llvm_name = "hasleoncasa",
         .description = "Enable CASA instruction for LEON3 and LEON4 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.hasumacsmac)] = .{
         .llvm_name = "hasumacsmac",
         .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insertnopload)] = .{
         .llvm_name = "insertnopload",
         .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leon)] = .{
         .llvm_name = "leon",
         .description = "Enable LEON extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leoncyclecounter)] = .{
         .llvm_name = "leoncyclecounter",
         .description = "Use the Leon cycle counter register",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.leonpwrpsr)] = .{
         .llvm_name = "leonpwrpsr",
         .description = "Enable the PWRPSR instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fmuls)] = .{
         .llvm_name = "no-fmuls",
         .description = "Disable the fmuls instruction.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.no_fsmuld)] = .{
         .llvm_name = "no-fsmuld",
         .description = "Disable the fsmuld instruction.",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popc)] = .{
         .llvm_name = "popc",
         .description = "Use the popc (population count) instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .llvm_name = "soft-float",
         .description = "Use software emulation for floating point",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_mul_div)] = .{
         .llvm_name = "soft-mul-div",
         .description = "Use software emulation for integer multiply and divide",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.v9)] = .{
         .llvm_name = "v9",
         .description = "Enable SPARC-V9 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis)] = .{
         .llvm_name = "vis",
         .description = "Enable UltraSPARC Visual Instruction Set extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis2)] = .{
         .llvm_name = "vis2",
         .description = "Enable Visual Instruction Set extensions II",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vis3)] = .{
         .llvm_name = "vis3",
         .description = "Enable Visual Instruction Set extensions III",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -137,7 +136,7 @@ pub const cpu = struct {
     pub const at697e = Cpu{
         .name = "at697e",
         .llvm_name = "at697e",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .insertnopload,
             .leon,
         }),
@@ -145,7 +144,7 @@ pub const cpu = struct {
     pub const at697f = Cpu{
         .name = "at697f",
         .llvm_name = "at697f",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .insertnopload,
             .leon,
         }),
@@ -153,17 +152,17 @@ pub const cpu = struct {
     pub const f934 = Cpu{
         .name = "f934",
         .llvm_name = "f934",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const gr712rc = Cpu{
         .name = "gr712rc",
         .llvm_name = "gr712rc",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -171,7 +170,7 @@ pub const cpu = struct {
     pub const gr740 = Cpu{
         .name = "gr740",
         .llvm_name = "gr740",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .hasumacsmac,
             .leon,
@@ -182,19 +181,19 @@ pub const cpu = struct {
     pub const hypersparc = Cpu{
         .name = "hypersparc",
         .llvm_name = "hypersparc",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const leon2 = Cpu{
         .name = "leon2",
         .llvm_name = "leon2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .leon,
         }),
     };
     pub const leon3 = Cpu{
         .name = "leon3",
         .llvm_name = "leon3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasumacsmac,
             .leon,
         }),
@@ -202,7 +201,7 @@ pub const cpu = struct {
     pub const leon4 = Cpu{
         .name = "leon4",
         .llvm_name = "leon4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .hasumacsmac,
             .leon,
@@ -211,7 +210,7 @@ pub const cpu = struct {
     pub const ma2080 = Cpu{
         .name = "ma2080",
         .llvm_name = "ma2080",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -219,7 +218,7 @@ pub const cpu = struct {
     pub const ma2085 = Cpu{
         .name = "ma2085",
         .llvm_name = "ma2085",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -227,7 +226,7 @@ pub const cpu = struct {
     pub const ma2100 = Cpu{
         .name = "ma2100",
         .llvm_name = "ma2100",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -235,7 +234,7 @@ pub const cpu = struct {
     pub const ma2150 = Cpu{
         .name = "ma2150",
         .llvm_name = "ma2150",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -243,7 +242,7 @@ pub const cpu = struct {
     pub const ma2155 = Cpu{
         .name = "ma2155",
         .llvm_name = "ma2155",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -251,7 +250,7 @@ pub const cpu = struct {
     pub const ma2450 = Cpu{
         .name = "ma2450",
         .llvm_name = "ma2450",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -259,7 +258,7 @@ pub const cpu = struct {
     pub const ma2455 = Cpu{
         .name = "ma2455",
         .llvm_name = "ma2455",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -267,7 +266,7 @@ pub const cpu = struct {
     pub const ma2480 = Cpu{
         .name = "ma2480",
         .llvm_name = "ma2480",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -275,7 +274,7 @@ pub const cpu = struct {
     pub const ma2485 = Cpu{
         .name = "ma2485",
         .llvm_name = "ma2485",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -283,7 +282,7 @@ pub const cpu = struct {
     pub const ma2x5x = Cpu{
         .name = "ma2x5x",
         .llvm_name = "ma2x5x",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -291,7 +290,7 @@ pub const cpu = struct {
     pub const ma2x8x = Cpu{
         .name = "ma2x8x",
         .llvm_name = "ma2x8x",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -299,7 +298,7 @@ pub const cpu = struct {
     pub const myriad2 = Cpu{
         .name = "myriad2",
         .llvm_name = "myriad2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -307,7 +306,7 @@ pub const cpu = struct {
     pub const myriad2_1 = Cpu{
         .name = "myriad2_1",
         .llvm_name = "myriad2.1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -315,7 +314,7 @@ pub const cpu = struct {
     pub const myriad2_2 = Cpu{
         .name = "myriad2_2",
         .llvm_name = "myriad2.2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -323,7 +322,7 @@ pub const cpu = struct {
     pub const myriad2_3 = Cpu{
         .name = "myriad2_3",
         .llvm_name = "myriad2.3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .hasleoncasa,
             .leon,
         }),
@@ -331,7 +330,7 @@ pub const cpu = struct {
     pub const niagara = Cpu{
         .name = "niagara",
         .llvm_name = "niagara",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -341,7 +340,7 @@ pub const cpu = struct {
     pub const niagara2 = Cpu{
         .name = "niagara2",
         .llvm_name = "niagara2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -352,7 +351,7 @@ pub const cpu = struct {
     pub const niagara3 = Cpu{
         .name = "niagara3",
         .llvm_name = "niagara3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -363,7 +362,7 @@ pub const cpu = struct {
     pub const niagara4 = Cpu{
         .name = "niagara4",
         .llvm_name = "niagara4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .popc,
             .v9,
@@ -375,32 +374,32 @@ pub const cpu = struct {
     pub const sparclet = Cpu{
         .name = "sparclet",
         .llvm_name = "sparclet",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const sparclite = Cpu{
         .name = "sparclite",
         .llvm_name = "sparclite",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const sparclite86x = Cpu{
         .name = "sparclite86x",
         .llvm_name = "sparclite86x",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const supersparc = Cpu{
         .name = "supersparc",
         .llvm_name = "supersparc",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const tsc701 = Cpu{
         .name = "tsc701",
         .llvm_name = "tsc701",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const ultrasparc = Cpu{
         .name = "ultrasparc",
         .llvm_name = "ultrasparc",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -409,7 +408,7 @@ pub const cpu = struct {
     pub const ultrasparc3 = Cpu{
         .name = "ultrasparc3",
         .llvm_name = "ultrasparc3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deprecated_v8,
             .v9,
             .vis,
@@ -419,7 +418,7 @@ pub const cpu = struct {
     pub const ut699 = Cpu{
         .name = "ut699",
         .llvm_name = "ut699",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .fixallfdivsqrt,
             .insertnopload,
             .leon,
@@ -430,7 +429,7 @@ pub const cpu = struct {
     pub const v7 = Cpu{
         .name = "v7",
         .llvm_name = "v7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .no_fsmuld,
             .soft_mul_div,
         }),
@@ -438,12 +437,12 @@ pub const cpu = struct {
     pub const v8 = Cpu{
         .name = "v8",
         .llvm_name = "v8",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const v9 = Cpu{
         .name = "v9",
         .llvm_name = "v9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .v9,
         }),
     };
diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig
index 1326ad23ed54acbeec2e0cde6bb574d6bb17ee60..c924af6e7068a1972922b6628c78e098107312c8 100644
--- a/lib/std/target/systemz.zig
+++ b/lib/std/target/systemz.zig
@@ -48,183 +48,182 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.deflate_conversion)] = .{
         .llvm_name = "deflate-conversion",
         .description = "Assume that the deflate-conversion facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_packed_conversion)] = .{
         .llvm_name = "dfp-packed-conversion",
         .description = "Assume that the DFP packed-conversion facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
         .llvm_name = "dfp-zoned-conversion",
         .description = "Assume that the DFP zoned-conversion facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.distinct_ops)] = .{
         .llvm_name = "distinct-ops",
         .description = "Assume that the distinct-operands facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_dat_2)] = .{
         .llvm_name = "enhanced-dat-2",
         .description = "Assume that the enhanced-DAT facility 2 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enhanced_sort)] = .{
         .llvm_name = "enhanced-sort",
         .description = "Assume that the enhanced-sort facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.execution_hint)] = .{
         .llvm_name = "execution-hint",
         .description = "Assume that the execution-hint facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_serialization)] = .{
         .llvm_name = "fast-serialization",
         .description = "Assume that the fast-serialization facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fp_extension)] = .{
         .llvm_name = "fp-extension",
         .description = "Assume that the floating-point extension facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.guarded_storage)] = .{
         .llvm_name = "guarded-storage",
         .description = "Assume that the guarded-storage facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.high_word)] = .{
         .llvm_name = "high-word",
         .description = "Assume that the high-word facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
         .llvm_name = "insert-reference-bits-multiple",
         .description = "Assume that the insert-reference-bits-multiple facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.interlocked_access1)] = .{
         .llvm_name = "interlocked-access1",
         .description = "Assume that interlocked-access facility 1 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_trap)] = .{
         .llvm_name = "load-and-trap",
         .description = "Assume that the load-and-trap facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
         .llvm_name = "load-and-zero-rightmost-byte",
         .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond)] = .{
         .llvm_name = "load-store-on-cond",
         .description = "Assume that the load/store-on-condition facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.load_store_on_cond_2)] = .{
         .llvm_name = "load-store-on-cond-2",
         .description = "Assume that the load/store-on-condition facility 2 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension3)] = .{
         .llvm_name = "message-security-assist-extension3",
         .description = "Assume that the message-security-assist extension facility 3 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension4)] = .{
         .llvm_name = "message-security-assist-extension4",
         .description = "Assume that the message-security-assist extension facility 4 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension5)] = .{
         .llvm_name = "message-security-assist-extension5",
         .description = "Assume that the message-security-assist extension facility 5 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension7)] = .{
         .llvm_name = "message-security-assist-extension7",
         .description = "Assume that the message-security-assist extension facility 7 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension8)] = .{
         .llvm_name = "message-security-assist-extension8",
         .description = "Assume that the message-security-assist extension facility 8 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.message_security_assist_extension9)] = .{
         .llvm_name = "message-security-assist-extension9",
         .description = "Assume that the message-security-assist extension facility 9 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions)] = .{
         .llvm_name = "miscellaneous-extensions",
         .description = "Assume that the miscellaneous-extensions facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
         .llvm_name = "miscellaneous-extensions-2",
         .description = "Assume that the miscellaneous-extensions facility 2 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
         .llvm_name = "miscellaneous-extensions-3",
         .description = "Assume that the miscellaneous-extensions facility 3 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.population_count)] = .{
         .llvm_name = "population-count",
         .description = "Assume that the population-count facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.processor_assist)] = .{
         .llvm_name = "processor-assist",
         .description = "Assume that the processor-assist facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
         .llvm_name = "reset-reference-bits-multiple",
         .description = "Assume that the reset-reference-bits-multiple facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.transactional_execution)] = .{
         .llvm_name = "transactional-execution",
         .description = "Assume that the transactional-execution facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector)] = .{
         .llvm_name = "vector",
         .description = "Assume that the vectory facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_1)] = .{
         .llvm_name = "vector-enhancements-1",
         .description = "Assume that the vector enhancements facility 1 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_enhancements_2)] = .{
         .llvm_name = "vector-enhancements-2",
         .description = "Assume that the vector enhancements facility 2 is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal)] = .{
         .llvm_name = "vector-packed-decimal",
         .description = "Assume that the vector packed decimal facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
         .llvm_name = "vector-packed-decimal-enhancement",
         .description = "Assume that the vector packed decimal enhancement facility is installed",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -233,7 +232,7 @@ pub const cpu = struct {
     pub const arch10 = Cpu{
         .name = "arch10",
         .llvm_name = "arch10",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_zoned_conversion,
             .distinct_ops,
             .enhanced_dat_2,
@@ -256,7 +255,7 @@ pub const cpu = struct {
     pub const arch11 = Cpu{
         .name = "arch11",
         .llvm_name = "arch11",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -284,7 +283,7 @@ pub const cpu = struct {
     pub const arch12 = Cpu{
         .name = "arch12",
         .llvm_name = "arch12",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -319,7 +318,7 @@ pub const cpu = struct {
     pub const arch13 = Cpu{
         .name = "arch13",
         .llvm_name = "arch13",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .deflate_conversion,
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
@@ -360,12 +359,12 @@ pub const cpu = struct {
     pub const arch8 = Cpu{
         .name = "arch8",
         .llvm_name = "arch8",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const arch9 = Cpu{
         .name = "arch9",
         .llvm_name = "arch9",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .distinct_ops,
             .fast_serialization,
             .fp_extension,
@@ -381,17 +380,17 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const z10 = Cpu{
         .name = "z10",
         .llvm_name = "z10",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const z13 = Cpu{
         .name = "z13",
         .llvm_name = "z13",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -419,7 +418,7 @@ pub const cpu = struct {
     pub const z14 = Cpu{
         .name = "z14",
         .llvm_name = "z14",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_packed_conversion,
             .dfp_zoned_conversion,
             .distinct_ops,
@@ -454,7 +453,7 @@ pub const cpu = struct {
     pub const z196 = Cpu{
         .name = "z196",
         .llvm_name = "z196",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .distinct_ops,
             .fast_serialization,
             .fp_extension,
@@ -470,7 +469,7 @@ pub const cpu = struct {
     pub const zEC12 = Cpu{
         .name = "zEC12",
         .llvm_name = "zEC12",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .dfp_zoned_conversion,
             .distinct_ops,
             .enhanced_dat_2,
diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig
index bd6ae8cc8f15ed30d5f6c946adc414cdd3c3b270..6d79bbb2820e8040a6ab8268e605b6cc7df35e4e 100644
--- a/lib/std/target/wasm.zig
+++ b/lib/std/target/wasm.zig
@@ -23,52 +23,52 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.atomics)] = .{
         .llvm_name = "atomics",
         .description = "Enable Atomics",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bulk_memory)] = .{
         .llvm_name = "bulk-memory",
         .description = "Enable bulk memory operations",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.exception_handling)] = .{
         .llvm_name = "exception-handling",
         .description = "Enable Wasm exception handling",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.multivalue)] = .{
         .llvm_name = "multivalue",
         .description = "Enable multivalue blocks, instructions, and functions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mutable_globals)] = .{
         .llvm_name = "mutable-globals",
         .description = "Enable mutable globals",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nontrapping_fptoint)] = .{
         .llvm_name = "nontrapping-fptoint",
         .description = "Enable non-trapping float-to-int conversion operators",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sign_ext)] = .{
         .llvm_name = "sign-ext",
         .description = "Enable sign extension operators",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.simd128)] = .{
         .llvm_name = "simd128",
         .description = "Enable 128-bit SIMD",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.tail_call)] = .{
         .llvm_name = "tail-call",
         .description = "Enable tail call instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.unimplemented_simd128)] = .{
         .llvm_name = "unimplemented-simd128",
         .description = "Enable 128-bit SIMD not yet implemented in engines",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .simd128,
         }),
     };
@@ -76,7 +76,6 @@ pub const all_features = blk: {
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -85,7 +84,7 @@ pub const cpu = struct {
     pub const bleeding_edge = Cpu{
         .name = "bleeding_edge",
         .llvm_name = "bleeding-edge",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .atomics,
             .mutable_globals,
             .nontrapping_fptoint,
@@ -96,12 +95,12 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const mvp = Cpu{
         .name = "mvp",
         .llvm_name = "mvp",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
 };
 
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index a576bf408256c046d4c648bdea375c4fa90eb37d..3c2e306e799738a2290fd69a5f11a2ff04884973 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -128,101 +128,100 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
-    @setEvalBranchQuota(10000);
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
     result[@enumToInt(Feature.@"3dnow")] = .{
         .llvm_name = "3dnow",
         .description = "Enable 3DNow! instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .mmx,
         }),
     };
     result[@enumToInt(Feature.@"3dnowa")] = .{
         .llvm_name = "3dnowa",
         .description = "Enable 3DNow! Athlon instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .@"3dnow",
         }),
     };
     result[@enumToInt(Feature.@"64bit")] = .{
         .llvm_name = "64bit",
         .description = "Support 64-bit instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.adx)] = .{
         .llvm_name = "adx",
         .description = "Support ADX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.aes)] = .{
         .llvm_name = "aes",
         .description = "Enable AES instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.avx)] = .{
         .llvm_name = "avx",
         .description = "Enable AVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse4_2,
         }),
     };
     result[@enumToInt(Feature.avx2)] = .{
         .llvm_name = "avx2",
         .description = "Enable AVX2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.avx512bf16)] = .{
         .llvm_name = "avx512bf16",
         .description = "Support bfloat16 floating point",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512bitalg)] = .{
         .llvm_name = "avx512bitalg",
         .description = "Enable AVX-512 Bit Algorithms",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512bw)] = .{
         .llvm_name = "avx512bw",
         .description = "Enable AVX-512 Byte and Word Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512cd)] = .{
         .llvm_name = "avx512cd",
         .description = "Enable AVX-512 Conflict Detection Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512dq)] = .{
         .llvm_name = "avx512dq",
         .description = "Enable AVX-512 Doubleword and Quadword Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512er)] = .{
         .llvm_name = "avx512er",
         .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512f)] = .{
         .llvm_name = "avx512f",
         .description = "Enable AVX-512 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx2,
             .f16c,
             .fma,
@@ -231,216 +230,216 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.avx512ifma)] = .{
         .llvm_name = "avx512ifma",
         .description = "Enable AVX-512 Integer Fused Multiple-Add",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512pf)] = .{
         .llvm_name = "avx512pf",
         .description = "Enable AVX-512 PreFetch Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vbmi)] = .{
         .llvm_name = "avx512vbmi",
         .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512vbmi2)] = .{
         .llvm_name = "avx512vbmi2",
         .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512bw,
         }),
     };
     result[@enumToInt(Feature.avx512vl)] = .{
         .llvm_name = "avx512vl",
         .description = "Enable AVX-512 Vector Length eXtensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vnni)] = .{
         .llvm_name = "avx512vnni",
         .description = "Enable AVX-512 Vector Neural Network Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vp2intersect)] = .{
         .llvm_name = "avx512vp2intersect",
         .description = "Enable AVX-512 vp2intersect",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.avx512vpopcntdq)] = .{
         .llvm_name = "avx512vpopcntdq",
         .description = "Enable AVX-512 Population Count Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx512f,
         }),
     };
     result[@enumToInt(Feature.bmi)] = .{
         .llvm_name = "bmi",
         .description = "Support BMI instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.bmi2)] = .{
         .llvm_name = "bmi2",
         .description = "Support BMI2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.branchfusion)] = .{
         .llvm_name = "branchfusion",
         .description = "CMP/TEST can be fused with conditional branches",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cldemote)] = .{
         .llvm_name = "cldemote",
         .description = "Enable Cache Demote",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clflushopt)] = .{
         .llvm_name = "clflushopt",
         .description = "Flush A Cache Line Optimized",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clwb)] = .{
         .llvm_name = "clwb",
         .description = "Cache Line Write Back",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.clzero)] = .{
         .llvm_name = "clzero",
         .description = "Enable Cache Line Zero",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cmov)] = .{
         .llvm_name = "cmov",
         .description = "Enable conditional move instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.cx16)] = .{
         .llvm_name = "cx16",
         .description = "64-bit with cmpxchg16b",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .cx8,
         }),
     };
     result[@enumToInt(Feature.cx8)] = .{
         .llvm_name = "cx8",
         .description = "Support CMPXCHG8B instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.enqcmd)] = .{
         .llvm_name = "enqcmd",
         .description = "Has ENQCMD instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ermsb)] = .{
         .llvm_name = "ermsb",
         .description = "REP MOVS/STOS are fast",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.f16c)] = .{
         .llvm_name = "f16c",
         .description = "Support 16-bit floating point conversion instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
         .llvm_name = "false-deps-lzcnt-tzcnt",
         .description = "LZCNT/TZCNT have a false dependency on dest register",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.false_deps_popcnt)] = .{
         .llvm_name = "false-deps-popcnt",
         .description = "POPCNT has a false dependency on dest register",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_11bytenop)] = .{
         .llvm_name = "fast-11bytenop",
         .description = "Target can quickly decode up to 11 byte NOPs",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_15bytenop)] = .{
         .llvm_name = "fast-15bytenop",
         .description = "Target can quickly decode up to 15 byte NOPs",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_bextr)] = .{
         .llvm_name = "fast-bextr",
         .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_gather)] = .{
         .llvm_name = "fast-gather",
         .description = "Indicates if gather is reasonably fast",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_hops)] = .{
         .llvm_name = "fast-hops",
         .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.fast_lzcnt)] = .{
         .llvm_name = "fast-lzcnt",
         .description = "LZCNT instructions are as fast as most simple integer ops",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
         .llvm_name = "fast-partial-ymm-or-zmm-write",
         .description = "Partial writes to YMM/ZMM registers are fast",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
         .llvm_name = "fast-scalar-fsqrt",
         .description = "Scalar SQRT is fast (disable Newton-Raphson)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
         .llvm_name = "fast-scalar-shift-masks",
         .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_shld_rotate)] = .{
         .llvm_name = "fast-shld-rotate",
         .description = "SHLD can be used as a faster rotate",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_variable_shuffle)] = .{
         .llvm_name = "fast-variable-shuffle",
         .description = "Shuffles with variable masks are fast",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
         .llvm_name = "fast-vector-fsqrt",
         .description = "Vector SQRT is fast (disable Newton-Raphson)",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
         .llvm_name = "fast-vector-shift-masks",
         .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fma)] = .{
         .llvm_name = "fma",
         .description = "Enable three-operand fused multiple-add",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx,
         }),
     };
     result[@enumToInt(Feature.fma4)] = .{
         .llvm_name = "fma4",
         .description = "Enable four-operand fused multiple-add",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx,
             .sse4a,
         }),
@@ -448,166 +447,166 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.fsgsbase)] = .{
         .llvm_name = "fsgsbase",
         .description = "Support FS/GS Base instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.fxsr)] = .{
         .llvm_name = "fxsr",
         .description = "Support fxsave/fxrestore instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.gfni)] = .{
         .llvm_name = "gfni",
         .description = "Enable Galois Field Arithmetic Instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.idivl_to_divb)] = .{
         .llvm_name = "idivl-to-divb",
         .description = "Use 8-bit divide for positive values less than 256",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.idivq_to_divl)] = .{
         .llvm_name = "idivq-to-divl",
         .description = "Use 32-bit divide for positive values less than 2^32",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.invpcid)] = .{
         .llvm_name = "invpcid",
         .description = "Invalidate Process-Context Identifier",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_sp)] = .{
         .llvm_name = "lea-sp",
         .description = "Use LEA for adjusting the stack pointer",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lea_uses_ag)] = .{
         .llvm_name = "lea-uses-ag",
         .description = "LEA instruction needs inputs at AG stage",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lwp)] = .{
         .llvm_name = "lwp",
         .description = "Enable LWP instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.lzcnt)] = .{
         .llvm_name = "lzcnt",
         .description = "Support LZCNT instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.macrofusion)] = .{
         .llvm_name = "macrofusion",
         .description = "Various instructions can be fused with conditional branches",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
         .llvm_name = "merge-to-threeway-branch",
         .description = "Merge branches to a three-way conditional branch",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mmx)] = .{
         .llvm_name = "mmx",
         .description = "Enable MMX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movbe)] = .{
         .llvm_name = "movbe",
         .description = "Support MOVBE instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdir64b)] = .{
         .llvm_name = "movdir64b",
         .description = "Support movdir64b instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.movdiri)] = .{
         .llvm_name = "movdiri",
         .description = "Support movdiri instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mpx)] = .{
         .llvm_name = "mpx",
         .description = "Support MPX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.mwaitx)] = .{
         .llvm_name = "mwaitx",
         .description = "Enable MONITORX/MWAITX timer functionality",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.nopl)] = .{
         .llvm_name = "nopl",
         .description = "Enable NOPL instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pad_short_functions)] = .{
         .llvm_name = "pad-short-functions",
         .description = "Pad short functions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pclmul)] = .{
         .llvm_name = "pclmul",
         .description = "Enable packed carry-less multiplication instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.pconfig)] = .{
         .llvm_name = "pconfig",
         .description = "platform configuration instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.pku)] = .{
         .llvm_name = "pku",
         .description = "Enable protection keys",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.popcnt)] = .{
         .llvm_name = "popcnt",
         .description = "Support POPCNT instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefer_256_bit)] = .{
         .llvm_name = "prefer-256-bit",
         .description = "Prefer 256-bit AVX instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prefetchwt1)] = .{
         .llvm_name = "prefetchwt1",
         .description = "Prefetch with Intent to Write and T1 Hint",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.prfchw)] = .{
         .llvm_name = "prfchw",
         .description = "Support PRFCHW instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.ptwrite)] = .{
         .llvm_name = "ptwrite",
         .description = "Support ptwrite instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdpid)] = .{
         .llvm_name = "rdpid",
         .description = "Support RDPID instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdrnd)] = .{
         .llvm_name = "rdrnd",
         .description = "Support RDRAND instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rdseed)] = .{
         .llvm_name = "rdseed",
         .description = "Support RDSEED instruction",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline)] = .{
         .llvm_name = "retpoline",
         .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .retpoline_indirect_branches,
             .retpoline_indirect_calls,
         }),
@@ -615,158 +614,158 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.retpoline_external_thunk)] = .{
         .llvm_name = "retpoline-external-thunk",
         .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .retpoline_indirect_calls,
         }),
     };
     result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
         .llvm_name = "retpoline-indirect-branches",
         .description = "Remove speculation of indirect branches from the generated code",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
         .llvm_name = "retpoline-indirect-calls",
         .description = "Remove speculation of indirect calls from the generated code",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.rtm)] = .{
         .llvm_name = "rtm",
         .description = "Support RTM instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sahf)] = .{
         .llvm_name = "sahf",
         .description = "Support LAHF and SAHF instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sgx)] = .{
         .llvm_name = "sgx",
         .description = "Enable Software Guard Extensions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sha)] = .{
         .llvm_name = "sha",
         .description = "Enable SHA instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.shstk)] = .{
         .llvm_name = "shstk",
         .description = "Support CET Shadow-Stack instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_3ops_lea)] = .{
         .llvm_name = "slow-3ops-lea",
         .description = "LEA instruction with 3 ops or certain registers is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_incdec)] = .{
         .llvm_name = "slow-incdec",
         .description = "INC and DEC instructions are slower than ADD and SUB",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_lea)] = .{
         .llvm_name = "slow-lea",
         .description = "LEA instruction with certain arguments is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmaddwd)] = .{
         .llvm_name = "slow-pmaddwd",
         .description = "PMADDWD is slower than PMULLD",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_pmulld)] = .{
         .llvm_name = "slow-pmulld",
         .description = "PMULLD instruction is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_shld)] = .{
         .llvm_name = "slow-shld",
         .description = "SHLD instruction is slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_two_mem_ops)] = .{
         .llvm_name = "slow-two-mem-ops",
         .description = "Two memory operand instructions are slow",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
         .llvm_name = "slow-unaligned-mem-16",
         .description = "Slow unaligned 16-byte memory access",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
         .llvm_name = "slow-unaligned-mem-32",
         .description = "Slow unaligned 32-byte memory access",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.soft_float)] = .{
         .llvm_name = "soft-float",
         .description = "Use software floating point features",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse)] = .{
         .llvm_name = "sse",
         .description = "Enable SSE instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse_unaligned_mem)] = .{
         .llvm_name = "sse-unaligned-mem",
         .description = "Allow unaligned memory operands with SSE instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.sse2)] = .{
         .llvm_name = "sse2",
         .description = "Enable SSE2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse,
         }),
     };
     result[@enumToInt(Feature.sse3)] = .{
         .llvm_name = "sse3",
         .description = "Enable SSE3 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse2,
         }),
     };
     result[@enumToInt(Feature.sse4_1)] = .{
         .llvm_name = "sse4.1",
         .description = "Enable SSE 4.1 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .ssse3,
         }),
     };
     result[@enumToInt(Feature.sse4_2)] = .{
         .llvm_name = "sse4.2",
         .description = "Enable SSE 4.2 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse4_1,
         }),
     };
     result[@enumToInt(Feature.sse4a)] = .{
         .llvm_name = "sse4a",
         .description = "Support SSE 4a instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.ssse3)] = .{
         .llvm_name = "ssse3",
         .description = "Enable SSSE3 instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .sse3,
         }),
     };
     result[@enumToInt(Feature.tbm)] = .{
         .llvm_name = "tbm",
         .description = "Enable TBM instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.vaes)] = .{
         .llvm_name = "vaes",
         .description = "Promote selected AES instructions to AVX512/AVX registers",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .aes,
             .avx,
         }),
@@ -774,7 +773,7 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.vpclmulqdq)] = .{
         .llvm_name = "vpclmulqdq",
         .description = "Enable vpclmulqdq instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .avx,
             .pclmul,
         }),
@@ -782,50 +781,49 @@ pub const all_features = blk: {
     result[@enumToInt(Feature.waitpkg)] = .{
         .llvm_name = "waitpkg",
         .description = "Wait and pause enhancements",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.wbnoinvd)] = .{
         .llvm_name = "wbnoinvd",
         .description = "Write Back No Invalidate",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.x87)] = .{
         .llvm_name = "x87",
         .description = "Enable X87 float instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xop)] = .{
         .llvm_name = "xop",
         .description = "Enable XOP instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{
+        .dependencies = featureSet(&[_]Feature{
             .fma4,
         }),
     };
     result[@enumToInt(Feature.xsave)] = .{
         .llvm_name = "xsave",
         .description = "Support xsave instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsavec)] = .{
         .llvm_name = "xsavec",
         .description = "Support xsavec instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaveopt)] = .{
         .llvm_name = "xsaveopt",
         .description = "Support xsaveopt instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     result[@enumToInt(Feature.xsaves)] = .{
         .llvm_name = "xsaves",
         .description = "Support xsaves instructions",
-        .dependencies = sparseFeatureSet(&[_]Feature{}),
+        .dependencies = featureSet(&[_]Feature{}),
     };
     const ti = @typeInfo(Feature);
     for (result) |*elem, i| {
         elem.index = i;
         elem.name = ti.Enum.fields[i].name;
-        elem.dependencies.initAsDependencies(i, &result);
     }
     break :blk result;
 };
@@ -834,7 +832,7 @@ pub const cpu = struct {
     pub const amdfam10 = Cpu{
         .name = "amdfam10",
         .llvm_name = "amdfam10",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -854,7 +852,7 @@ pub const cpu = struct {
     pub const athlon = Cpu{
         .name = "athlon",
         .llvm_name = "athlon",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -867,7 +865,7 @@ pub const cpu = struct {
     pub const athlon_4 = Cpu{
         .name = "athlon_4",
         .llvm_name = "athlon-4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -882,7 +880,7 @@ pub const cpu = struct {
     pub const athlon_fx = Cpu{
         .name = "athlon_fx",
         .llvm_name = "athlon-fx",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -899,7 +897,7 @@ pub const cpu = struct {
     pub const athlon_mp = Cpu{
         .name = "athlon_mp",
         .llvm_name = "athlon-mp",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -914,7 +912,7 @@ pub const cpu = struct {
     pub const athlon_tbird = Cpu{
         .name = "athlon_tbird",
         .llvm_name = "athlon-tbird",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -927,7 +925,7 @@ pub const cpu = struct {
     pub const athlon_xp = Cpu{
         .name = "athlon_xp",
         .llvm_name = "athlon-xp",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cmov,
             .cx8,
@@ -942,7 +940,7 @@ pub const cpu = struct {
     pub const athlon64 = Cpu{
         .name = "athlon64",
         .llvm_name = "athlon64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -959,7 +957,7 @@ pub const cpu = struct {
     pub const athlon64_sse3 = Cpu{
         .name = "athlon64_sse3",
         .llvm_name = "athlon64-sse3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -977,7 +975,7 @@ pub const cpu = struct {
     pub const atom = Cpu{
         .name = "atom",
         .llvm_name = "atom",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1001,7 +999,7 @@ pub const cpu = struct {
     pub const barcelona = Cpu{
         .name = "barcelona",
         .llvm_name = "barcelona",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -1021,7 +1019,7 @@ pub const cpu = struct {
     pub const bdver1 = Cpu{
         .name = "bdver1",
         .llvm_name = "bdver1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .branchfusion,
@@ -1048,7 +1046,7 @@ pub const cpu = struct {
     pub const bdver2 = Cpu{
         .name = "bdver2",
         .llvm_name = "bdver2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .bmi,
@@ -1080,7 +1078,7 @@ pub const cpu = struct {
     pub const bdver3 = Cpu{
         .name = "bdver3",
         .llvm_name = "bdver3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .bmi,
@@ -1114,7 +1112,7 @@ pub const cpu = struct {
     pub const bdver4 = Cpu{
         .name = "bdver4",
         .llvm_name = "bdver4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .avx2,
@@ -1151,7 +1149,7 @@ pub const cpu = struct {
     pub const bonnell = Cpu{
         .name = "bonnell",
         .llvm_name = "bonnell",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1175,7 +1173,7 @@ pub const cpu = struct {
     pub const broadwell = Cpu{
         .name = "broadwell",
         .llvm_name = "broadwell",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .avx,
@@ -1219,7 +1217,7 @@ pub const cpu = struct {
     pub const btver1 = Cpu{
         .name = "btver1",
         .llvm_name = "btver1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1243,7 +1241,7 @@ pub const cpu = struct {
     pub const btver2 = Cpu{
         .name = "btver2",
         .llvm_name = "btver2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .avx,
@@ -1279,7 +1277,7 @@ pub const cpu = struct {
     pub const c3 = Cpu{
         .name = "c3",
         .llvm_name = "c3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
@@ -1288,7 +1286,7 @@ pub const cpu = struct {
     pub const c3_2 = Cpu{
         .name = "c3_2",
         .llvm_name = "c3-2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -1301,7 +1299,7 @@ pub const cpu = struct {
     pub const cannonlake = Cpu{
         .name = "cannonlake",
         .llvm_name = "cannonlake",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1360,7 +1358,7 @@ pub const cpu = struct {
     pub const cascadelake = Cpu{
         .name = "cascadelake",
         .llvm_name = "cascadelake",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1418,7 +1416,7 @@ pub const cpu = struct {
     pub const cooperlake = Cpu{
         .name = "cooperlake",
         .llvm_name = "cooperlake",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1477,7 +1475,7 @@ pub const cpu = struct {
     pub const core_avx_i = Cpu{
         .name = "core_avx_i",
         .llvm_name = "core-avx-i",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -1509,7 +1507,7 @@ pub const cpu = struct {
     pub const core_avx2 = Cpu{
         .name = "core_avx2",
         .llvm_name = "core-avx2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .avx2,
@@ -1550,7 +1548,7 @@ pub const cpu = struct {
     pub const core2 = Cpu{
         .name = "core2",
         .llvm_name = "core2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1568,7 +1566,7 @@ pub const cpu = struct {
     pub const corei7 = Cpu{
         .name = "corei7",
         .llvm_name = "corei7",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -1586,7 +1584,7 @@ pub const cpu = struct {
     pub const corei7_avx = Cpu{
         .name = "corei7_avx",
         .llvm_name = "corei7-avx",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -1615,7 +1613,7 @@ pub const cpu = struct {
     pub const generic = Cpu{
         .name = "generic",
         .llvm_name = "generic",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -1624,7 +1622,7 @@ pub const cpu = struct {
     pub const geode = Cpu{
         .name = "geode",
         .llvm_name = "geode",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .cx8,
             .slow_unaligned_mem_16,
@@ -1634,7 +1632,7 @@ pub const cpu = struct {
     pub const goldmont = Cpu{
         .name = "goldmont",
         .llvm_name = "goldmont",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .clflushopt,
@@ -1670,7 +1668,7 @@ pub const cpu = struct {
     pub const goldmont_plus = Cpu{
         .name = "goldmont_plus",
         .llvm_name = "goldmont-plus",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .clflushopt,
@@ -1708,7 +1706,7 @@ pub const cpu = struct {
     pub const haswell = Cpu{
         .name = "haswell",
         .llvm_name = "haswell",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .avx2,
@@ -1749,7 +1747,7 @@ pub const cpu = struct {
     pub const _i386 = Cpu{
         .name = "_i386",
         .llvm_name = "i386",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -1757,7 +1755,7 @@ pub const cpu = struct {
     pub const _i486 = Cpu{
         .name = "_i486",
         .llvm_name = "i486",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .slow_unaligned_mem_16,
             .x87,
         }),
@@ -1765,7 +1763,7 @@ pub const cpu = struct {
     pub const _i586 = Cpu{
         .name = "_i586",
         .llvm_name = "i586",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -1774,7 +1772,7 @@ pub const cpu = struct {
     pub const _i686 = Cpu{
         .name = "_i686",
         .llvm_name = "i686",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .slow_unaligned_mem_16,
@@ -1784,7 +1782,7 @@ pub const cpu = struct {
     pub const icelake_client = Cpu{
         .name = "icelake_client",
         .llvm_name = "icelake-client",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1852,7 +1850,7 @@ pub const cpu = struct {
     pub const icelake_server = Cpu{
         .name = "icelake_server",
         .llvm_name = "icelake-server",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -1922,7 +1920,7 @@ pub const cpu = struct {
     pub const ivybridge = Cpu{
         .name = "ivybridge",
         .llvm_name = "ivybridge",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -1954,7 +1952,7 @@ pub const cpu = struct {
     pub const k6 = Cpu{
         .name = "k6",
         .llvm_name = "k6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -1964,7 +1962,7 @@ pub const cpu = struct {
     pub const k6_2 = Cpu{
         .name = "k6_2",
         .llvm_name = "k6-2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
@@ -1974,7 +1972,7 @@ pub const cpu = struct {
     pub const k6_3 = Cpu{
         .name = "k6_3",
         .llvm_name = "k6-3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnow",
             .cx8,
             .slow_unaligned_mem_16,
@@ -1984,7 +1982,7 @@ pub const cpu = struct {
     pub const k8 = Cpu{
         .name = "k8",
         .llvm_name = "k8",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2001,7 +1999,7 @@ pub const cpu = struct {
     pub const k8_sse3 = Cpu{
         .name = "k8_sse3",
         .llvm_name = "k8-sse3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2019,7 +2017,7 @@ pub const cpu = struct {
     pub const knl = Cpu{
         .name = "knl",
         .llvm_name = "knl",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2062,7 +2060,7 @@ pub const cpu = struct {
     pub const knm = Cpu{
         .name = "knm",
         .llvm_name = "knm",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2106,12 +2104,12 @@ pub const cpu = struct {
     pub const lakemont = Cpu{
         .name = "lakemont",
         .llvm_name = "lakemont",
-        .features = featureSet(&all_features, &[_]Feature{}),
+        .features = featureSet(&[_]Feature{}),
     };
     pub const nehalem = Cpu{
         .name = "nehalem",
         .llvm_name = "nehalem",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2129,7 +2127,7 @@ pub const cpu = struct {
     pub const nocona = Cpu{
         .name = "nocona",
         .llvm_name = "nocona",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2145,7 +2143,7 @@ pub const cpu = struct {
     pub const opteron = Cpu{
         .name = "opteron",
         .llvm_name = "opteron",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2162,7 +2160,7 @@ pub const cpu = struct {
     pub const opteron_sse3 = Cpu{
         .name = "opteron_sse3",
         .llvm_name = "opteron-sse3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnowa",
             .@"64bit",
             .cmov,
@@ -2180,7 +2178,7 @@ pub const cpu = struct {
     pub const penryn = Cpu{
         .name = "penryn",
         .llvm_name = "penryn",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2198,7 +2196,7 @@ pub const cpu = struct {
     pub const pentium = Cpu{
         .name = "pentium",
         .llvm_name = "pentium",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .slow_unaligned_mem_16,
             .x87,
@@ -2207,7 +2205,7 @@ pub const cpu = struct {
     pub const pentium_m = Cpu{
         .name = "pentium_m",
         .llvm_name = "pentium-m",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2221,7 +2219,7 @@ pub const cpu = struct {
     pub const pentium_mmx = Cpu{
         .name = "pentium_mmx",
         .llvm_name = "pentium-mmx",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cx8,
             .mmx,
             .slow_unaligned_mem_16,
@@ -2231,7 +2229,7 @@ pub const cpu = struct {
     pub const pentium2 = Cpu{
         .name = "pentium2",
         .llvm_name = "pentium2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2244,7 +2242,7 @@ pub const cpu = struct {
     pub const pentium3 = Cpu{
         .name = "pentium3",
         .llvm_name = "pentium3",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2258,7 +2256,7 @@ pub const cpu = struct {
     pub const pentium3m = Cpu{
         .name = "pentium3m",
         .llvm_name = "pentium3m",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2272,7 +2270,7 @@ pub const cpu = struct {
     pub const pentium4 = Cpu{
         .name = "pentium4",
         .llvm_name = "pentium4",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2286,7 +2284,7 @@ pub const cpu = struct {
     pub const pentium4m = Cpu{
         .name = "pentium4m",
         .llvm_name = "pentium4m",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2300,7 +2298,7 @@ pub const cpu = struct {
     pub const pentiumpro = Cpu{
         .name = "pentiumpro",
         .llvm_name = "pentiumpro",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .nopl,
@@ -2311,7 +2309,7 @@ pub const cpu = struct {
     pub const prescott = Cpu{
         .name = "prescott",
         .llvm_name = "prescott",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2325,7 +2323,7 @@ pub const cpu = struct {
     pub const sandybridge = Cpu{
         .name = "sandybridge",
         .llvm_name = "sandybridge",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .avx,
             .cmov,
@@ -2354,7 +2352,7 @@ pub const cpu = struct {
     pub const silvermont = Cpu{
         .name = "silvermont",
         .llvm_name = "silvermont",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2382,7 +2380,7 @@ pub const cpu = struct {
     pub const skx = Cpu{
         .name = "skx",
         .llvm_name = "skx",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2439,7 +2437,7 @@ pub const cpu = struct {
     pub const skylake = Cpu{
         .name = "skylake",
         .llvm_name = "skylake",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2490,7 +2488,7 @@ pub const cpu = struct {
     pub const skylake_avx512 = Cpu{
         .name = "skylake_avx512",
         .llvm_name = "skylake-avx512",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2547,7 +2545,7 @@ pub const cpu = struct {
     pub const slm = Cpu{
         .name = "slm",
         .llvm_name = "slm",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2575,7 +2573,7 @@ pub const cpu = struct {
     pub const tremont = Cpu{
         .name = "tremont",
         .llvm_name = "tremont",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .aes,
             .cldemote,
@@ -2618,7 +2616,7 @@ pub const cpu = struct {
     pub const westmere = Cpu{
         .name = "westmere",
         .llvm_name = "westmere",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx16,
@@ -2637,7 +2635,7 @@ pub const cpu = struct {
     pub const winchip_c6 = Cpu{
         .name = "winchip_c6",
         .llvm_name = "winchip-c6",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .mmx,
             .slow_unaligned_mem_16,
             .x87,
@@ -2646,7 +2644,7 @@ pub const cpu = struct {
     pub const winchip2 = Cpu{
         .name = "winchip2",
         .llvm_name = "winchip2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"3dnow",
             .slow_unaligned_mem_16,
             .x87,
@@ -2655,7 +2653,7 @@ pub const cpu = struct {
     pub const x86_64 = Cpu{
         .name = "x86_64",
         .llvm_name = "x86-64",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .cmov,
             .cx8,
@@ -2672,7 +2670,7 @@ pub const cpu = struct {
     pub const yonah = Cpu{
         .name = "yonah",
         .llvm_name = "yonah",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .cmov,
             .cx8,
             .fxsr,
@@ -2686,7 +2684,7 @@ pub const cpu = struct {
     pub const znver1 = Cpu{
         .name = "znver1",
         .llvm_name = "znver1",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
@@ -2730,7 +2728,7 @@ pub const cpu = struct {
     pub const znver2 = Cpu{
         .name = "znver2",
         .llvm_name = "znver2",
-        .features = featureSet(&all_features, &[_]Feature{
+        .features = featureSet(&[_]Feature{
             .@"64bit",
             .adx,
             .aes,
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index e6aa97f32c69915da3c7aadb40a21514976181a7..e6756a34583bd76c0d6054b6b207c5884a61822a 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -581,8 +581,8 @@ fn cpuFeaturesFromLLVM(
             const this_llvm_name = feature.llvm_name orelse continue;
             if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                 switch (op) {
-                    .add => set.addSparseFeature(@intCast(u8, index)),
-                    .sub => set.removeSparseFeature(@intCast(u8, index)),
+                    .add => set.addFeature(@intCast(u8, index)),
+                    .sub => set.removeFeature(@intCast(u8, index)),
                 }
                 break;
             }
@@ -701,8 +701,9 @@ const Stage2CpuFeatures = struct {
         const all_features = arch.allFeaturesList();
         var populated_feature_set = feature_set;
         if (arch.subArchFeature()) |sub_arch_index| {
-            populated_feature_set.addFeature(sub_arch_index, all_features);
+            populated_feature_set.addFeature(sub_arch_index);
         }
+        populated_feature_set.populateDependencies(all_features);
         for (all_features) |feature, index| {
             const llvm_name = feature.llvm_name orelse continue;
             const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))];
-- 
2.54.0


From 6e6ec3d71d1b5ecff8ad6bff5e159417abfa5382 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 21:01:36 -0500
Subject: [PATCH 088/116] put hack back in to disable windows native cpu
 features

See #508. This can be removed when we upgrade to LLVM 10.
---
 src-self-hosted/stage1.zig | 23 +++++++++++++++++------
 src/codegen.cpp            |  6 +++---
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index e6756a34583bd76c0d6054b6b207c5884a61822a..c1c48753a102d55a8d47426587f4af2d385e19ad 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -659,11 +659,20 @@ const Stage2CpuFeatures = struct {
         const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
         const arch = target.Cross.arch;
         const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features);
-        switch (cpu_features) {
-            .baseline => return createBaseline(allocator, arch),
-            .cpu => |cpu| return createFromCpu(allocator, arch, cpu),
-            .features => |features| return createFromCpuFeatures(allocator, arch, features),
+        const result = switch (cpu_features) {
+            .baseline => try createBaseline(allocator, arch),
+            .cpu => |cpu| try createFromCpu(allocator, arch, cpu),
+            .features => |features| try createFromCpuFeatures(allocator, arch, features),
+        };
+        // LLVM creates invalid binaries on Windows sometimes.
+        // See https://github.com/ziglang/zig/issues/508
+        // As a workaround we do not use target native features on Windows.
+        // This logic is repeated in codegen.cpp
+        if (target.isWindows() or target.isUefi()) {
+            result.llvm_cpu_name = "";
+            result.llvm_features_str = "";
         }
+        return result;
     }
 
     fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self {
@@ -742,9 +751,11 @@ const Stage2CpuFeatures = struct {
         for (arch.allFeaturesList()) |feature, index| {
             if (!feature_set.isEnabled(@intCast(u8, index))) continue;
 
-            try builtin_str_buffer.append("        .");
+            // TODO some kind of "zig identifier escape" function rather than
+            // unconditionally using @"" syntax
+            try builtin_str_buffer.append("        .@\"");
             try builtin_str_buffer.append(feature.name);
-            try builtin_str_buffer.append(",\n");
+            try builtin_str_buffer.append("\",\n");
         }
 
         try builtin_str_buffer.append(
diff --git a/src/codegen.cpp b/src/codegen.cpp
index f7cfc95b3aa58b66579a5ae2ce4da4456b9a4224..c2dcdb38b8e6bef3740d7d0721cd88a935bd1f14 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8785,15 +8785,15 @@ static void init(CodeGen *g) {
     const char *target_specific_features = "";
 
     if (g->zig_target->is_native) {
+        target_specific_cpu_args = ZigLLVMGetHostCPUName();
+        target_specific_features = ZigLLVMGetNativeFeatures();
         // LLVM creates invalid binaries on Windows sometimes.
         // See https://github.com/ziglang/zig/issues/508
         // As a workaround we do not use target native features on Windows.
+        // This logic is repeated in stage1.zig
         if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) {
             target_specific_cpu_args = "";
             target_specific_features = "";
-        } else {
-            target_specific_cpu_args = ZigLLVMGetHostCPUName();
-            target_specific_features = ZigLLVMGetNativeFeatures();
         }
     }
 
-- 
2.54.0


From 4640ef589e8fddcab7aeab2c6044bc031cf33515 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 21:02:33 -0500
Subject: [PATCH 089/116] tests: use an older aarch64 sub-arch

to avoid an illegal instruction error with the older qemu
version that is available on the CI server.
---
 test/tests.zig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/test/tests.zig b/test/tests.zig
index 7c97e46e0280d7494807eb6bafe1592372552920..fb30f064cce3e1872f8c39195019ae999a784f43 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -101,7 +101,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
                 .abi = .none,
             },
         },
@@ -110,7 +110,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
                 .abi = .musl,
             },
         },
@@ -120,7 +120,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
                 .abi = .gnu,
             },
         },
-- 
2.54.0


From 830e0ba2d27b55f999a891d007b24131b790e8c9 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 21:46:06 -0500
Subject: [PATCH 090/116] enable native CPU feature for windows; disable
 failing tests

See #508. These can be re-enabled when we upgrade to LLVM 10.
---
 lib/std/fmt/parse_float.zig   |  4 ++++
 lib/std/io/test.zig           |  4 ++++
 lib/std/math/fabs.zig         |  4 ++++
 lib/std/math/isinf.zig        | 12 ++++++++++++
 lib/std/math/isnan.zig        |  4 ++++
 src-self-hosted/stage1.zig    | 17 ++++-------------
 src/codegen.cpp               |  8 --------
 test/stage1/behavior/math.zig |  8 ++++++++
 8 files changed, 40 insertions(+), 21 deletions(-)

diff --git a/lib/std/fmt/parse_float.zig b/lib/std/fmt/parse_float.zig
index 2c480852ac5d79f369f61a7bc85000856b20c887..1456dd8e57c318891cdcbb82799d7d07c1c5769b 100644
--- a/lib/std/fmt/parse_float.zig
+++ b/lib/std/fmt/parse_float.zig
@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {
 }
 
 test "fmt.parseFloat" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     const testing = std.testing;
     const expect = testing.expect;
     const expectEqual = testing.expectEqual;
diff --git a/lib/std/io/test.zig b/lib/std/io/test.zig
index 92259fd6e923df2c615c1fed09f257c09fa373bb..21ebd723c46ef915a67176b05c35786ac399d76e 100644
--- a/lib/std/io/test.zig
+++ b/lib/std/io/test.zig
@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:
 }
 
 test "Serializer/Deserializer generic" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     try testSerializerDeserializer(builtin.Endian.Big, .Byte);
     try testSerializerDeserializer(builtin.Endian.Little, .Byte);
     try testSerializerDeserializer(builtin.Endian.Big, .Bit);
diff --git a/lib/std/math/fabs.zig b/lib/std/math/fabs.zig
index a659e35ca21e8ab661ef063302ef2d44048d7acd..61692283e633b8b44651a21891e12be95c331e39 100644
--- a/lib/std/math/fabs.zig
+++ b/lib/std/math/fabs.zig
@@ -95,6 +95,10 @@ test "math.fabs64.special" {
 }
 
 test "math.fabs128.special" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     expect(math.isPositiveInf(fabs(math.inf(f128))));
     expect(math.isPositiveInf(fabs(-math.inf(f128))));
     expect(math.isNan(fabs(math.nan(f128))));
diff --git a/lib/std/math/isinf.zig b/lib/std/math/isinf.zig
index 6eacab52adfcdf898d628f453d02bf5b13941480..eeac61915cd325e903e871b4b3f80bc32c026bbe 100644
--- a/lib/std/math/isinf.zig
+++ b/lib/std/math/isinf.zig
@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {
 }
 
 test "math.isInf" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     expect(!isInf(@as(f16, 0.0)));
     expect(!isInf(@as(f16, -0.0)));
     expect(!isInf(@as(f32, 0.0)));
@@ -93,6 +97,10 @@ test "math.isInf" {
 }
 
 test "math.isPositiveInf" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     expect(!isPositiveInf(@as(f16, 0.0)));
     expect(!isPositiveInf(@as(f16, -0.0)));
     expect(!isPositiveInf(@as(f32, 0.0)));
@@ -112,6 +120,10 @@ test "math.isPositiveInf" {
 }
 
 test "math.isNegativeInf" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     expect(!isNegativeInf(@as(f16, 0.0)));
     expect(!isNegativeInf(@as(f16, -0.0)));
     expect(!isNegativeInf(@as(f32, 0.0)));
diff --git a/lib/std/math/isnan.zig b/lib/std/math/isnan.zig
index ac865f0d0c60ba7a8430bb93de3c6729f3701560..4b7e69490a3a31880a829d1fc9024f1f41368600 100644
--- a/lib/std/math/isnan.zig
+++ b/lib/std/math/isnan.zig
@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {
 }
 
 test "math.isNan" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     expect(isNan(math.nan(f16)));
     expect(isNan(math.nan(f32)));
     expect(isNan(math.nan(f64)));
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index c1c48753a102d55a8d47426587f4af2d385e19ad..e47103399c68eac25d00a108c34cb34c6122a1ad 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -659,20 +659,11 @@ const Stage2CpuFeatures = struct {
         const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
         const arch = target.Cross.arch;
         const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features);
-        const result = switch (cpu_features) {
-            .baseline => try createBaseline(allocator, arch),
-            .cpu => |cpu| try createFromCpu(allocator, arch, cpu),
-            .features => |features| try createFromCpuFeatures(allocator, arch, features),
-        };
-        // LLVM creates invalid binaries on Windows sometimes.
-        // See https://github.com/ziglang/zig/issues/508
-        // As a workaround we do not use target native features on Windows.
-        // This logic is repeated in codegen.cpp
-        if (target.isWindows() or target.isUefi()) {
-            result.llvm_cpu_name = "";
-            result.llvm_features_str = "";
+        switch (cpu_features) {
+            .baseline => return createBaseline(allocator, arch),
+            .cpu => |cpu| return createFromCpu(allocator, arch, cpu),
+            .features => |features| return createFromCpuFeatures(allocator, arch, features),
         }
-        return result;
     }
 
     fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self {
diff --git a/src/codegen.cpp b/src/codegen.cpp
index c2dcdb38b8e6bef3740d7d0721cd88a935bd1f14..bb14d39a91808b9babd1d4f0df0e273fde09143e 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8787,14 +8787,6 @@ static void init(CodeGen *g) {
     if (g->zig_target->is_native) {
         target_specific_cpu_args = ZigLLVMGetHostCPUName();
         target_specific_features = ZigLLVMGetNativeFeatures();
-        // LLVM creates invalid binaries on Windows sometimes.
-        // See https://github.com/ziglang/zig/issues/508
-        // As a workaround we do not use target native features on Windows.
-        // This logic is repeated in stage1.zig
-        if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) {
-            target_specific_cpu_args = "";
-            target_specific_features = "";
-        }
     }
 
     // Override CPU and features if defined by user.
diff --git a/test/stage1/behavior/math.zig b/test/stage1/behavior/math.zig
index e00b1a83faca921da8a56f81dc0813eab8d33174..228311878785347cf60b6dbdd823abb338843124 100644
--- a/test/stage1/behavior/math.zig
+++ b/test/stage1/behavior/math.zig
@@ -529,6 +529,10 @@ test "comptime_int xor" {
 }
 
 test "f128" {
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test_f128();
     comptime test_f128();
 }
@@ -627,6 +631,10 @@ test "NaN comparison" {
         // TODO: https://github.com/ziglang/zig/issues/3338
         return error.SkipZigTest;
     }
+    if (std.Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     testNanEqNan(f16);
     testNanEqNan(f32);
     testNanEqNan(f64);
-- 
2.54.0


From cbe9a51518db6f4e77a4f8c72e8cd9cd02fa7f49 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 22:01:24 -0500
Subject: [PATCH 091/116] don't trust llvm's GetHostCPUName

comment from this commit reproduced here:

I have observed the CPU name reported by LLVM being incorrect. On
the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp",
which is a 32-bit CPU, even though the system is 64-bit and the reported
CPU features include, among other things, +64bit.
So the strategy taken here is that we observe both reported CPU, and the
reported CPU features. The features are trusted more; but if the features
match exactly the features of the reported CPU, then we trust the reported CPU.
---
 lib/std/target.zig         |  4 ++++
 src-self-hosted/stage1.zig | 43 +++++++++++++++++++++++++++-----------
 2 files changed, 35 insertions(+), 12 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 49913de2ee0f6876e334a27a863cdca1e71258d2..e72a1a8452230a4cbd0f611c5b28b6eb3a6ed197 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -637,6 +637,10 @@ pub const Target = union(enum) {
                 pub fn asBytes(set: *const Set) *const [byte_count]u8 {
                     return @ptrCast(*const [byte_count]u8, &set.ints);
                 }
+
+                pub fn eql(set: Set, other: Set) bool {
+                    return mem.eql(usize, &set.ints, &other.ints);
+                }
             };
 
             pub fn feature_set_fns(comptime F: type) type {
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index e47103399c68eac25d00a108c34cb34c6122a1ad..e80b6ba1232059c88d4fa0a506924efd68ec5226 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -540,27 +540,25 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
     node.context.maybeRefresh();
 }
 
+/// I have observed the CPU name reported by LLVM being incorrect. On
+/// the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp",
+/// which is a 32-bit CPU, even though the system is 64-bit and the reported
+/// CPU features include, among other things, +64bit.
+/// So the strategy taken here is that we observe both reported CPU, and the
+/// reported CPU features. The features are trusted more; but if the features
+/// match exactly the features of the reported CPU, then we trust the reported CPU.
 fn cpuFeaturesFromLLVM(
     arch: Target.Arch,
     llvm_cpu_name_z: ?[*:0]const u8,
     llvm_cpu_features_opt: ?[*:0]const u8,
 ) !Target.CpuFeatures {
-    if (llvm_cpu_name_z) |cpu_name_z| {
-        const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
-
-        for (arch.allCpus()) |cpu| {
-            const this_llvm_name = cpu.llvm_name orelse continue;
-            if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
-                return Target.CpuFeatures{ .cpu = cpu };
-            }
-        }
-    }
-
     var set = arch.baselineFeatures();
     const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{
         .features = set,
     };
 
+    const all_features = arch.allFeaturesList();
+
     var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
     while (it.next()) |decorated_llvm_feat| {
         var op: enum {
@@ -577,7 +575,7 @@ fn cpuFeaturesFromLLVM(
         } else {
             return error.InvalidLlvmCpuFeaturesFormat;
         }
-        for (arch.allFeaturesList()) |feature, index| {
+        for (all_features) |feature, index| {
             const this_llvm_name = feature.llvm_name orelse continue;
             if (mem.eql(u8, llvm_feat, this_llvm_name)) {
                 switch (op) {
@@ -588,6 +586,27 @@ fn cpuFeaturesFromLLVM(
             }
         }
     }
+
+    if (llvm_cpu_name_z) |cpu_name_z| {
+        const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
+
+        for (arch.allCpus()) |cpu| {
+            const this_llvm_name = cpu.llvm_name orelse continue;
+            if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
+                // Only trust the CPU if the reported features exactly match.
+                var populated_reported_features = set;
+                populated_reported_features.populateDependencies(all_features);
+                var populated_cpu_features = cpu.features;
+                populated_cpu_features.populateDependencies(all_features);
+                if (populated_reported_features.eql(populated_cpu_features)) {
+                    return Target.CpuFeatures{ .cpu = cpu };
+                } else {
+                    return Target.CpuFeatures{ .features = set };
+                }
+            }
+        }
+    }
+
     return Target.CpuFeatures{ .features = set };
 }
 
-- 
2.54.0


From c6bfece1d54c54024397d7aff9f25087cc4dbfda Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Tue, 21 Jan 2020 22:24:40 -0500
Subject: [PATCH 092/116] Revert "tests: use an older aarch64 sub-arch"

This reverts commit 4640ef589e8fddcab7aeab2c6044bc031cf33515.

This attempted workaround did not have the desired effect.
---
 test/tests.zig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/test/tests.zig b/test/tests.zig
index fb30f064cce3e1872f8c39195019ae999a784f43..7c97e46e0280d7494807eb6bafe1592372552920 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -101,7 +101,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
                 .abi = .none,
             },
         },
@@ -110,7 +110,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
                 .abi = .musl,
             },
         },
@@ -120,7 +120,7 @@ const test_targets = [_]TestTarget{
         .target = Target{
             .Cross = CrossTarget{
                 .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_1a },
+                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
                 .abi = .gnu,
             },
         },
-- 
2.54.0


From 69c72e24d4aa2044bb9de0c101517af7afe555de Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Wed, 22 Jan 2020 16:07:51 +0100
Subject: [PATCH 093/116] compiler-rt: Port __mulsi3 builtin

---
 lib/std/special/compiler_rt.zig     |  1 +
 lib/std/special/compiler_rt/int.zig | 60 +++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/lib/std/special/compiler_rt.zig b/lib/std/special/compiler_rt.zig
index 90dbf0cdf4f502a54e13e8b99b101cbc396d76d0..f5e83b52786c0131b1b2ba11ec5602d4915202a3 100644
--- a/lib/std/special/compiler_rt.zig
+++ b/lib/std/special/compiler_rt.zig
@@ -130,6 +130,7 @@ comptime {
     @export(@import("compiler_rt/int.zig").__udivmoddi4, .{ .name = "__udivmoddi4", .linkage = linkage });
     @export(@import("compiler_rt/popcountdi2.zig").__popcountdi2, .{ .name = "__popcountdi2", .linkage = linkage });
 
+    @export(@import("compiler_rt/int.zig").__mulsi3, .{ .name = "__mulsi3", .linkage = linkage });
     @export(@import("compiler_rt/muldi3.zig").__muldi3, .{ .name = "__muldi3", .linkage = linkage });
     @export(@import("compiler_rt/int.zig").__divmoddi4, .{ .name = "__divmoddi4", .linkage = linkage });
     @export(@import("compiler_rt/int.zig").__divsi3, .{ .name = "__divsi3", .linkage = linkage });
diff --git a/lib/std/special/compiler_rt/int.zig b/lib/std/special/compiler_rt/int.zig
index 88f4d66966d950d42754d50d0b30c0d85068c72e..1ff77ba63c8761992fa3b77d466d7f48059f9e8f 100644
--- a/lib/std/special/compiler_rt/int.zig
+++ b/lib/std/special/compiler_rt/int.zig
@@ -1,6 +1,8 @@
 // Builtin functions that operate on integer types
 const builtin = @import("builtin");
 const testing = @import("std").testing;
+const maxInt = @import("std").math.maxInt;
+const minInt = @import("std").math.maxInt;
 
 const udivmod = @import("udivmod.zig").udivmod;
 
@@ -578,3 +580,61 @@ fn test_one_umodsi3(a: u32, b: u32, expected_r: u32) void {
     const r: u32 = __umodsi3(a, b);
     testing.expect(r == expected_r);
 }
+
+pub fn __mulsi3(a: i32, b: i32) callconv(.C) i32 {
+    @setRuntimeSafety(builtin.is_test);
+
+    var ua = @bitCast(u32, a);
+    var ub = @bitCast(u32, b);
+    var r: u32 = 0;
+
+    while (ua > 0) {
+        if ((ua & 1) != 0) r +%= ub;
+        ua >>= 1;
+        ub <<= 1;
+    }
+
+    return @bitCast(i32, r);
+}
+
+fn test_one_mulsi3(a: i32, b: i32, result: i32) void {
+    testing.expectEqual(result, __mulsi3(a, b));
+}
+
+test "mulsi3" {
+    test_one_mulsi3(0, 0, 0);
+    test_one_mulsi3(0, 1, 0);
+    test_one_mulsi3(1, 0, 0);
+    test_one_mulsi3(0, 10, 0);
+    test_one_mulsi3(10, 0, 0);
+    test_one_mulsi3(0, maxInt(i32), 0);
+    test_one_mulsi3(maxInt(i32), 0, 0);
+    test_one_mulsi3(0, -1, 0);
+    test_one_mulsi3(-1, 0, 0);
+    test_one_mulsi3(0, -10, 0);
+    test_one_mulsi3(-10, 0, 0);
+    test_one_mulsi3(0, minInt(i32), 0);
+    test_one_mulsi3(minInt(i32), 0, 0);
+    test_one_mulsi3(1, 1, 1);
+    test_one_mulsi3(1, 10, 10);
+    test_one_mulsi3(10, 1, 10);
+    test_one_mulsi3(1, maxInt(i32), maxInt(i32));
+    test_one_mulsi3(maxInt(i32), 1, maxInt(i32));
+    test_one_mulsi3(1, -1, -1);
+    test_one_mulsi3(1, -10, -10);
+    test_one_mulsi3(-10, 1, -10);
+    test_one_mulsi3(1, minInt(i32), minInt(i32));
+    test_one_mulsi3(minInt(i32), 1, minInt(i32));
+    test_one_mulsi3(46340, 46340, 2147395600);
+    test_one_mulsi3(-46340, 46340, -2147395600);
+    test_one_mulsi3(46340, -46340, -2147395600);
+    test_one_mulsi3(-46340, -46340, 2147395600);
+    test_one_mulsi3(4194303, 8192, @truncate(i32, 34359730176));
+    test_one_mulsi3(-4194303, 8192, @truncate(i32, -34359730176));
+    test_one_mulsi3(4194303, -8192, @truncate(i32, -34359730176));
+    test_one_mulsi3(-4194303, -8192, @truncate(i32, 34359730176));
+    test_one_mulsi3(8192, 4194303, @truncate(i32, 34359730176));
+    test_one_mulsi3(-8192, 4194303, @truncate(i32, -34359730176));
+    test_one_mulsi3(8192, -4194303, @truncate(i32, -34359730176));
+    test_one_mulsi3(-8192, -4194303, @truncate(i32, 34359730176));
+}
-- 
2.54.0


From 48c7e6c48b81e6e0423b3e4aea238402189eecb7 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 22 Jan 2020 17:13:31 -0500
Subject: [PATCH 094/116] std.Target.CpuFeatures is now a struct with both CPU
 and feature set

Previously it was a tagged union which was one of:
 * baseline
 * a specific CPU
 * a set of features

Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.

This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
---
 lib/std/build.zig                 |  50 ++--
 lib/std/target.zig                | 150 +++++-----
 lib/std/target/avr.zig            |   4 -
 lib/std/target/riscv.zig          |  49 ++--
 src-self-hosted/print_targets.zig |  12 +-
 src-self-hosted/stage1.zig        | 408 ++++++++++------------------
 src/codegen.cpp                   |   2 +-
 src/main.cpp                      |  33 +--
 src/userland.cpp                  |  49 ++--
 src/userland.h                    |  16 +-
 test/compile_errors.zig           |  11 +-
 test/tests.zig                    | 436 ++++++++++++++++--------------
 test/translate_c.zig              |  22 +-
 13 files changed, 571 insertions(+), 671 deletions(-)

diff --git a/lib/std/build.zig b/lib/std/build.zig
index a36818fb2908cca2f81fcf74f3b881d5d6584e65..ac6ca3049484471ab9c0176b0ba3f0052eab915a 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -484,6 +484,7 @@ pub const Builder = struct {
                         .arch = builtin.arch,
                         .os = builtin.os,
                         .abi = builtin.abi,
+                        .cpu_features = builtin.cpu_features,
                     },
                 }).linuxTriple(self.allocator);
 
@@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {
                 .arch = target_arch,
                 .os = target_os,
                 .abi = target_abi,
+                .cpu_features = target_arch.getBaselineCpuFeatures(),
             },
         });
     }
@@ -1972,25 +1974,41 @@ pub const LibExeObjStep = struct {
                 try zig_args.append("-target");
                 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
 
-                switch (cross.cpu_features) {
-                    .baseline => {},
-                    .cpu => |cpu| {
+                const all_features = self.target.getArch().allFeaturesList();
+                var populated_cpu_features = cross.cpu_features.cpu.features;
+                populated_cpu_features.populateDependencies(all_features);
+
+                if (populated_cpu_features.eql(cross.cpu_features.features)) {
+                    // The CPU name alone is sufficient.
+                    // If it is the baseline CPU, no command line args are required.
+                    if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
                         try zig_args.append("-target-cpu");
-                        try zig_args.append(cpu.name);
-                    },
-                    .features => |features| {
-                        try zig_args.append("-target-cpu-features");
+                        try zig_args.append(cross.cpu_features.cpu.name);
+                    }
+                } else {
+                    try zig_args.append("-target-cpu");
+                    try zig_args.append(cross.cpu_features.cpu.name);
 
-                        var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
-                        for (self.target.getArch().allFeaturesList()) |feature, i| {
-                            if (features.isEnabled(@intCast(Target.Cpu.Feature.Set.Index, i))) {
-                                try feature_str_buffer.append(feature.name);
-                                try feature_str_buffer.append(",");
-                            }
+                    try zig_args.append("-target-feature");
+                    var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
+                    for (all_features) |feature, i_usize| {
+                        const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
+                        const in_cpu_set = populated_cpu_features.isEnabled(i);
+                        const in_actual_set = cross.cpu_features.features.isEnabled(i);
+                        if (in_cpu_set and !in_actual_set) {
+                            try feature_str_buffer.appendByte('-');
+                            try feature_str_buffer.append(feature.name);
+                            try feature_str_buffer.appendByte(',');
+                        } else if (!in_cpu_set and in_actual_set) {
+                            try feature_str_buffer.appendByte('+');
+                            try feature_str_buffer.append(feature.name);
+                            try feature_str_buffer.appendByte(',');
                         }
-
-                        try zig_args.append(feature_str_buffer.toSlice());
-                    },
+                    }
+                    if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
+                        feature_str_buffer.shrink(feature_str_buffer.len() - 1);
+                    }
+                    try zig_args.append(feature_str_buffer.toSliceConst());
                 }
             },
         }
diff --git a/lib/std/target.zig b/lib/std/target.zig
index e72a1a8452230a4cbd0f611c5b28b6eb3a6ed197..f23fc78df27460a3301774f6b747e95c1b9685de 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -172,6 +172,15 @@ pub const Target = union(enum) {
             r6,
         };
 
+        pub fn subArchName(arch: Arch) ?[]const u8 {
+            return switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32),
+                .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64),
+                .kalimba => |kalimba| @tagName(kalimba),
+                else => return null,
+            };
+        }
+
         pub fn subArchFeature(arch: Arch) ?u8 {
             return switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
@@ -251,24 +260,12 @@ pub const Target = union(enum) {
             return error.UnknownCpu;
         }
 
-        /// This parsing function supports 2 syntaxes.
-        /// * Comma-separated list of features, with + or - in front of each feature. This
-        ///   form represents a deviation from baseline.
-        /// * Comma-separated list of features, with no + or - in front of each feature. This
-        ///   form represents an exclusive list of enabled features; no other features besides
-        ///   the ones listed, and their dependencies, will be enabled.
+        /// Comma-separated list of features, with + or - in front of each feature. This
+        /// form represents a deviation from baseline CPU, which is provided as a parameter.
         /// Extra commas are ignored.
-        pub fn parseCpuFeatureSet(arch: Arch, features_text: []const u8) !Cpu.Feature.Set {
-            // Here we compute both and choose the correct result at the end, based
-            // on whether or not we saw + and - signs.
-            var whitelist_set = Cpu.Feature.Set.empty;
-            var baseline_set = arch.baselineFeatures();
-            var mode: enum {
-                unknown,
-                baseline,
-                whitelist,
-            } = .unknown;
-
+        pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set {
+            const all_features = arch.allFeaturesList();
+            var set = cpu.features;
             var it = mem.tokenize(features_text, ",");
             while (it.next()) |item_text| {
                 var feature_name: []const u8 = undefined;
@@ -277,40 +274,20 @@ pub const Target = union(enum) {
                     sub,
                 } = undefined;
                 if (mem.startsWith(u8, item_text, "+")) {
-                    switch (mode) {
-                        .unknown, .baseline => mode = .baseline,
-                        .whitelist => return error.InvalidCpuFeatures,
-                    }
                     op = .add;
                     feature_name = item_text[1..];
                 } else if (mem.startsWith(u8, item_text, "-")) {
-                    switch (mode) {
-                        .unknown, .baseline => mode = .baseline,
-                        .whitelist => return error.InvalidCpuFeatures,
-                    }
                     op = .sub;
                     feature_name = item_text[1..];
                 } else {
-                    switch (mode) {
-                        .unknown, .whitelist => mode = .whitelist,
-                        .baseline => return error.InvalidCpuFeatures,
-                    }
-                    op = .add;
-                    feature_name = item_text;
+                    return error.InvalidCpuFeatures;
                 }
-                const all_features = arch.allFeaturesList();
                 for (all_features) |feature, index_usize| {
                     const index = @intCast(Cpu.Feature.Set.Index, index_usize);
                     if (mem.eql(u8, feature_name, feature.name)) {
                         switch (op) {
-                            .add => {
-                                baseline_set.addFeature(index);
-                                whitelist_set.addFeature(index);
-                            },
-                            .sub => {
-                                baseline_set.removeFeature(index);
-                                whitelist_set.removeFeature(index);
-                            },
+                            .add => set.addFeature(index),
+                            .sub => set.removeFeature(index),
                         }
                         break;
                     }
@@ -319,10 +296,8 @@ pub const Target = union(enum) {
                 }
             }
 
-            return switch (mode) {
-                .unknown, .whitelist => whitelist_set,
-                .baseline => baseline_set,
-            };
+            set.populateDependencies(all_features);
+            return set;
         }
 
         pub fn toElfMachine(arch: Arch) std.elf.EM {
@@ -485,29 +460,37 @@ pub const Target = union(enum) {
 
         /// The "default" set of CPU features for cross-compiling. A conservative set
         /// of features that is expected to be supported on most available hardware.
-        pub fn baselineFeatures(arch: Arch) Cpu.Feature.Set {
-            return switch (arch) {
-                .arm, .armeb, .thumb, .thumbeb => arm.cpu.generic.features,
-                .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpu.generic.features,
-                .avr => avr.baseline_features,
-                .bpfel, .bpfeb => bpf.cpu.generic.features,
-                .hexagon => hexagon.cpu.generic.features,
-                .mips, .mipsel => mips.cpu.mips32.features,
-                .mips64, .mips64el => mips.cpu.mips64.features,
-                .msp430 => msp430.cpu.generic.features,
-                .powerpc, .powerpc64, .powerpc64le => powerpc.cpu.generic.features,
-                .amdgcn => amdgpu.cpu.generic.features,
-                .riscv32 => riscv.baseline_32_features,
-                .riscv64 => riscv.baseline_64_features,
-                .sparc, .sparcv9, .sparcel => sparc.cpu.generic.features,
-                .s390x => systemz.cpu.generic.features,
-                .i386 => x86.cpu.pentium4.features,
-                .x86_64 => x86.cpu.x86_64.features,
-                .nvptx, .nvptx64 => nvptx.cpu.sm_20.features,
-                .wasm32, .wasm64 => wasm.cpu.generic.features,
+        pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures {
+            const S = struct {
+                const generic_cpu = Cpu{
+                    .name = "generic",
+                    .llvm_name = null,
+                    .features = Cpu.Feature.Set.empty,
+                };
+            };
+            const cpu = switch (arch) {
+                .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
+                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
+                .avr => &avr.cpu.avr1,
+                .bpfel, .bpfeb => &bpf.cpu.generic,
+                .hexagon => &hexagon.cpu.generic,
+                .mips, .mipsel => &mips.cpu.mips32,
+                .mips64, .mips64el => &mips.cpu.mips64,
+                .msp430 => &msp430.cpu.generic,
+                .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic,
+                .amdgcn => &amdgpu.cpu.generic,
+                .riscv32 => &riscv.cpu.baseline_rv32,
+                .riscv64 => &riscv.cpu.baseline_rv64,
+                .sparc, .sparcv9, .sparcel => &sparc.cpu.generic,
+                .s390x => &systemz.cpu.generic,
+                .i386 => &x86.cpu.pentium4,
+                .x86_64 => &x86.cpu.x86_64,
+                .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
+                .wasm32, .wasm64 => &wasm.cpu.generic,
 
-                else => Cpu.Feature.Set.empty,
+                else => &S.generic_cpu,
             };
+            return CpuFeatures.initFromCpu(arch, cpu);
         }
 
         /// All CPUs Zig is aware of, sorted lexicographically by name.
@@ -685,19 +668,28 @@ pub const Target = union(enum) {
         arch: Arch,
         os: Os,
         abi: Abi,
-        cpu_features: CpuFeatures = .baseline,
+        cpu_features: CpuFeatures,
     };
 
-    pub const CpuFeatures = union(enum) {
-        /// The "default" set of CPU features for cross-compiling. A conservative set
-        /// of features that is expected to be supported on most available hardware.
-        baseline,
-
-        /// Target one specific CPU.
+    pub const CpuFeatures = struct {
+        /// The CPU to target. It has a set of features
+        /// which are overridden with the `features` field.
         cpu: *const Cpu,
 
         /// Explicitly provide the entire CPU feature set.
         features: Cpu.Feature.Set,
+
+        pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures {
+            var features = cpu.features;
+            if (arch.subArchFeature()) |sub_arch_index| {
+                features.addFeature(sub_arch_index);
+            }
+            features.populateDependencies(arch.allFeaturesList());
+            return CpuFeatures{
+                .cpu = cpu,
+                .features = features,
+            };
+        }
     };
 
     pub const current = Target{
@@ -718,14 +710,6 @@ pub const Target = union(enum) {
         };
     }
 
-    pub fn cpuFeatureSet(self: Target) Cpu.Feature.Set {
-        return switch (self.getCpuFeatures()) {
-            .baseline => self.getArch().baselineFeatures(),
-            .cpu => |cpu| cpu.features,
-            .features => |features| features,
-        };
-    }
-
     pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
         return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
             @tagName(self.getArch()),
@@ -791,14 +775,18 @@ pub const Target = union(enum) {
         });
     }
 
+    /// TODO: Support CPU features here?
+    /// https://github.com/ziglang/zig/issues/4261
     pub fn parse(text: []const u8) !Target {
         var it = mem.separate(text, "-");
         const arch_name = it.next() orelse return error.MissingArchitecture;
         const os_name = it.next() orelse return error.MissingOperatingSystem;
         const abi_name = it.next();
+        const arch = try parseArchSub(arch_name);
 
         var cross = Cross{
-            .arch = try parseArchSub(arch_name),
+            .arch = arch,
+            .cpu_features = arch.getBaselineCpuFeatures(),
             .os = try parseOs(os_name),
             .abi = undefined,
         };
diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig
index 8eb6df98f301e7e93d74037500113adf8bc56c67..3902a3860f502a795ebc95d9f16d8717a8801b28 100644
--- a/lib/std/target/avr.zig
+++ b/lib/std/target/avr.zig
@@ -2378,7 +2378,3 @@ pub const all_cpus = &[_]*const Cpu{
     &cpu.avrxmega7,
     &cpu.m3000,
 };
-
-pub const baseline_features = featureSet(&[_]Feature{
-    .avr0,
-});
diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig
index e0671ad91b66033a3f85c3a4d9b1894fcec5fe12..315329306e7626b74a4331cfd4ede6b1e1f17f23 100644
--- a/lib/std/target/riscv.zig
+++ b/lib/std/target/riscv.zig
@@ -69,11 +69,39 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
+    pub const baseline_rv32 = Cpu{
+        .name = "baseline_rv32",
+        .llvm_name = "generic-rv32",
+        .features = featureSet(&[_]Feature{
+            .a,
+            .c,
+            .d,
+            .f,
+            .m,
+            .relax,
+        }),
+    };
+
+    pub const baseline_rv64 = Cpu{
+        .name = "baseline_rv64",
+        .llvm_name = "generic-rv64",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .a,
+            .c,
+            .d,
+            .f,
+            .m,
+            .relax,
+        }),
+    };
+
     pub const generic_rv32 = Cpu{
         .name = "generic_rv32",
         .llvm_name = "generic-rv32",
         .features = featureSet(&[_]Feature{}),
     };
+
     pub const generic_rv64 = Cpu{
         .name = "generic_rv64",
         .llvm_name = "generic-rv64",
@@ -87,25 +115,8 @@ pub const cpu = struct {
 /// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
 /// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
+    &cpu.baseline_rv32,
+    &cpu.baseline_rv64,
     &cpu.generic_rv32,
     &cpu.generic_rv64,
 };
-
-pub const baseline_32_features = featureSet(&[_]Feature{
-    .a,
-    .c,
-    .d,
-    .f,
-    .m,
-    .relax,
-});
-
-pub const baseline_64_features = featureSet(&[_]Feature{
-    .@"64bit",
-    .a,
-    .c,
-    .d,
-    .f,
-    .m,
-    .relax,
-});
diff --git a/src-self-hosted/print_targets.zig b/src-self-hosted/print_targets.zig
index a7013e8cd9e91463cdc03aa611e07e4acfb10032..79041da4312d02a9f11e702b3714f7b5ebb52cab 100644
--- a/src-self-hosted/print_targets.zig
+++ b/src-self-hosted/print_targets.zig
@@ -227,16 +227,14 @@ pub fn cmdTargets(
     try jws.objectField("abi");
     try jws.emitString(@tagName(native_target.getAbi()));
     try jws.objectField("cpuName");
-    switch (native_target.getCpuFeatures()) {
-        .baseline, .features => try jws.emitNull(),
-        .cpu => |cpu| try jws.emitString(cpu.name),
-    }
+    const cpu_features = native_target.getCpuFeatures();
+    try jws.emitString(cpu_features.cpu.name);
     {
         try jws.objectField("cpuFeatures");
         try jws.beginArray();
-        const feature_set = native_target.cpuFeatureSet();
-        for (native_target.getArch().allFeaturesList()) |feature, i| {
-            if (feature_set.isEnabled(@intCast(u8, i))) {
+        for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
+            const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
+            if (cpu_features.features.isEnabled(index)) {
                 try jws.arrayElem();
                 try jws.emitString(feature.name);
             }
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index e80b6ba1232059c88d4fa0a506924efd68ec5226..a6a3bc013c59ad55c9852872138454f247732bb0 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -540,52 +540,12 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
     node.context.maybeRefresh();
 }
 
-/// I have observed the CPU name reported by LLVM being incorrect. On
-/// the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp",
-/// which is a 32-bit CPU, even though the system is 64-bit and the reported
-/// CPU features include, among other things, +64bit.
-/// So the strategy taken here is that we observe both reported CPU, and the
-/// reported CPU features. The features are trusted more; but if the features
-/// match exactly the features of the reported CPU, then we trust the reported CPU.
 fn cpuFeaturesFromLLVM(
     arch: Target.Arch,
     llvm_cpu_name_z: ?[*:0]const u8,
     llvm_cpu_features_opt: ?[*:0]const u8,
 ) !Target.CpuFeatures {
-    var set = arch.baselineFeatures();
-    const llvm_cpu_features = llvm_cpu_features_opt orelse return Target.CpuFeatures{
-        .features = set,
-    };
-
-    const all_features = arch.allFeaturesList();
-
-    var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
-    while (it.next()) |decorated_llvm_feat| {
-        var op: enum {
-            add,
-            sub,
-        } = undefined;
-        var llvm_feat: []const u8 = undefined;
-        if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
-            op = .add;
-            llvm_feat = decorated_llvm_feat[1..];
-        } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
-            op = .sub;
-            llvm_feat = decorated_llvm_feat[1..];
-        } else {
-            return error.InvalidLlvmCpuFeaturesFormat;
-        }
-        for (all_features) |feature, index| {
-            const this_llvm_name = feature.llvm_name orelse continue;
-            if (mem.eql(u8, llvm_feat, this_llvm_name)) {
-                switch (op) {
-                    .add => set.addFeature(@intCast(u8, index)),
-                    .sub => set.removeFeature(@intCast(u8, index)),
-                }
-                break;
-            }
-        }
-    }
+    var result = arch.getBaselineCpuFeatures();
 
     if (llvm_cpu_name_z) |cpu_name_z| {
         const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
@@ -593,21 +553,53 @@ fn cpuFeaturesFromLLVM(
         for (arch.allCpus()) |cpu| {
             const this_llvm_name = cpu.llvm_name orelse continue;
             if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
-                // Only trust the CPU if the reported features exactly match.
-                var populated_reported_features = set;
-                populated_reported_features.populateDependencies(all_features);
-                var populated_cpu_features = cpu.features;
-                populated_cpu_features.populateDependencies(all_features);
-                if (populated_reported_features.eql(populated_cpu_features)) {
-                    return Target.CpuFeatures{ .cpu = cpu };
-                } else {
-                    return Target.CpuFeatures{ .features = set };
+                // Here we use the non-dependencies-populated set,
+                // so that subtracting features later in this function
+                // affect the prepopulated set.
+                result = Target.CpuFeatures{
+                    .cpu = cpu,
+                    .features = cpu.features,
+                };
+                break;
+            }
+        }
+    }
+
+    const all_features = arch.allFeaturesList();
+
+    if (llvm_cpu_features_opt) |llvm_cpu_features| {
+        var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
+        while (it.next()) |decorated_llvm_feat| {
+            var op: enum {
+                add,
+                sub,
+            } = undefined;
+            var llvm_feat: []const u8 = undefined;
+            if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
+                op = .add;
+                llvm_feat = decorated_llvm_feat[1..];
+            } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
+                op = .sub;
+                llvm_feat = decorated_llvm_feat[1..];
+            } else {
+                return error.InvalidLlvmCpuFeaturesFormat;
+            }
+            for (all_features) |feature, index_usize| {
+                const this_llvm_name = feature.llvm_name orelse continue;
+                if (mem.eql(u8, llvm_feat, this_llvm_name)) {
+                    const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
+                    switch (op) {
+                        .add => result.features.addFeature(index),
+                        .sub => result.features.removeFeature(index),
+                    }
+                    break;
                 }
             }
         }
     }
 
-    return Target.CpuFeatures{ .features = set };
+    result.features.populateDependencies(all_features);
+    return result;
 }
 
 // ABI warning
@@ -639,7 +631,6 @@ const Stage2CpuFeatures = struct {
     allocator: *mem.Allocator,
     cpu_features: Target.CpuFeatures,
 
-    llvm_cpu_name: ?[*:0]const u8,
     llvm_features_str: ?[*:0]const u8,
 
     builtin_str: [:0]const u8,
@@ -647,125 +638,64 @@ const Stage2CpuFeatures = struct {
 
     const Self = @This();
 
-    fn createBaseline(allocator: *mem.Allocator, arch: Target.Arch) !*Self {
-        const self = try allocator.create(Self);
-        errdefer allocator.destroy(self);
-
-        const builtin_str = try std.fmt.allocPrint0(allocator, ".baseline;\n", .{});
-        errdefer allocator.free(builtin_str);
-
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n\n", .{});
-        errdefer allocator.free(cache_hash);
-
-        self.* = Self{
-            .allocator = allocator,
-            .cpu_features = .baseline,
-            .llvm_cpu_name = null,
-            .llvm_features_str = try initLLVMFeatures(allocator, arch, arch.baselineFeatures()),
-            .builtin_str = builtin_str,
-            .cache_hash = cache_hash,
-        };
-
-        return self;
-    }
-
-    fn createFromLLVM(
-        allocator: *mem.Allocator,
-        zig_triple: [*:0]const u8,
-        llvm_cpu_name_z: ?[*:0]const u8,
-        llvm_cpu_features: ?[*:0]const u8,
-    ) !*Self {
-        const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
-        const arch = target.Cross.arch;
-        const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name_z, llvm_cpu_features);
-        switch (cpu_features) {
-            .baseline => return createBaseline(allocator, arch),
-            .cpu => |cpu| return createFromCpu(allocator, arch, cpu),
-            .features => |features| return createFromCpuFeatures(allocator, arch, features),
-        }
-    }
-
-    fn createFromCpu(allocator: *mem.Allocator, arch: Target.Arch, cpu: *const Target.Cpu) !*Self {
-        const self = try allocator.create(Self);
-        errdefer allocator.destroy(self);
-
-        const builtin_str = try std.fmt.allocPrint0(allocator, "CpuFeatures{{ .cpu = &Target.{}.cpu.{} }};\n", .{
-            arch.genericName(),
-            cpu.name,
-        });
-        errdefer allocator.free(builtin_str);
-
-        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{ cpu.name, cpu.features.asBytes() });
-        errdefer allocator.free(cache_hash);
-
-        self.* = Self{
-            .allocator = allocator,
-            .cpu_features = .{ .cpu = cpu },
-            .llvm_cpu_name = if (cpu.llvm_name) |n| n.ptr else null,
-            .llvm_features_str = null,
-            .builtin_str = builtin_str,
-            .cache_hash = cache_hash,
-        };
-        return self;
-    }
-
-    fn initLLVMFeatures(
-        allocator: *mem.Allocator,
-        arch: Target.Arch,
-        feature_set: Target.Cpu.Feature.Set,
-    ) ![*:0]const u8 {
-        var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
-        defer llvm_features_buffer.deinit();
-
-        const all_features = arch.allFeaturesList();
-        var populated_feature_set = feature_set;
-        if (arch.subArchFeature()) |sub_arch_index| {
-            populated_feature_set.addFeature(sub_arch_index);
-        }
-        populated_feature_set.populateDependencies(all_features);
-        for (all_features) |feature, index| {
-            const llvm_name = feature.llvm_name orelse continue;
-            const plus_or_minus = "-+"[@boolToInt(populated_feature_set.isEnabled(@intCast(u8, index)))];
-            try llvm_features_buffer.appendByte(plus_or_minus);
-            try llvm_features_buffer.append(llvm_name);
-            try llvm_features_buffer.append(",");
-        }
-        assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
-        llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
-
-        return llvm_features_buffer.toOwnedSlice().ptr;
+    fn createFromNative(allocator: *mem.Allocator) !*Self {
+        const arch = Target.current.getArch();
+        const llvm = @import("llvm.zig");
+        const llvm_cpu_name = llvm.GetHostCPUName();
+        const llvm_cpu_features = llvm.GetNativeFeatures();
+        const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
+        return createFromCpuFeatures(allocator, arch, cpu_features);
     }
 
     fn createFromCpuFeatures(
         allocator: *mem.Allocator,
         arch: Target.Arch,
-        feature_set: Target.Cpu.Feature.Set,
+        cpu_features: Target.CpuFeatures,
     ) !*Self {
         const self = try allocator.create(Self);
         errdefer allocator.destroy(self);
 
-        const cache_hash = try std.fmt.allocPrint0(allocator, "\n{}", .{feature_set.asBytes()});
+        const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
+            cpu_features.cpu.name,
+            cpu_features.features.asBytes(),
+        });
         errdefer allocator.free(cache_hash);
 
         const generic_arch_name = arch.genericName();
-        var builtin_str_buffer = try std.Buffer.allocPrint(
-            allocator,
+        var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
             \\CpuFeatures{{
+            \\    .cpu = &Target.{}.cpu.{},
             \\    .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
             \\
-        ,
-            .{ generic_arch_name, generic_arch_name },
-        );
+        , .{
+            generic_arch_name,
+            cpu_features.cpu.name,
+            generic_arch_name,
+            generic_arch_name,
+        });
         defer builtin_str_buffer.deinit();
 
-        for (arch.allFeaturesList()) |feature, index| {
-            if (!feature_set.isEnabled(@intCast(u8, index))) continue;
+        var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
+        defer llvm_features_buffer.deinit();
 
-            // TODO some kind of "zig identifier escape" function rather than
-            // unconditionally using @"" syntax
-            try builtin_str_buffer.append("        .@\"");
-            try builtin_str_buffer.append(feature.name);
-            try builtin_str_buffer.append("\",\n");
+        for (arch.allFeaturesList()) |feature, index_usize| {
+            const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
+            const is_enabled = cpu_features.features.isEnabled(index);
+
+            if (feature.llvm_name) |llvm_name| {
+                const plus_or_minus = "-+"[@boolToInt(is_enabled)];
+                try llvm_features_buffer.appendByte(plus_or_minus);
+                try llvm_features_buffer.append(llvm_name);
+                try llvm_features_buffer.append(",");
+            }
+
+            if (is_enabled) {
+                // TODO some kind of "zig identifier escape" function rather than
+                // unconditionally using @"" syntax
+                try builtin_str_buffer.append("        .@\"");
+                try builtin_str_buffer.append(feature.name);
+                try builtin_str_buffer.append("\",\n");
+            }
         }
 
         try builtin_str_buffer.append(
@@ -774,11 +704,13 @@ const Stage2CpuFeatures = struct {
             \\
         );
 
+        assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
+        llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
+
         self.* = Self{
             .allocator = allocator,
-            .cpu_features = .{ .features = feature_set },
-            .llvm_cpu_name = null,
-            .llvm_features_str = try initLLVMFeatures(allocator, arch, feature_set),
+            .cpu_features = cpu_features,
+            .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
             .builtin_str = builtin_str_buffer.toOwnedSlice(),
             .cache_hash = cache_hash,
         };
@@ -794,12 +726,13 @@ const Stage2CpuFeatures = struct {
 };
 
 // ABI warning
-export fn stage2_cpu_features_parse_cpu(
+export fn stage2_cpu_features_parse(
     result: **Stage2CpuFeatures,
-    zig_triple: [*:0]const u8,
-    cpu_name: [*:0]const u8,
+    zig_triple: ?[*:0]const u8,
+    cpu_name: ?[*:0]const u8,
+    cpu_features: ?[*:0]const u8,
 ) Error {
-    result.* = parseCpu(zig_triple, cpu_name) catch |err| switch (err) {
+    result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) {
         error.OutOfMemory => return .OutOfMemory,
         error.UnknownArchitecture => return .UnknownArchitecture,
         error.UnknownSubArchitecture => return .UnknownSubArchitecture,
@@ -807,112 +740,63 @@ export fn stage2_cpu_features_parse_cpu(
         error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
         error.MissingOperatingSystem => return .MissingOperatingSystem,
         error.MissingArchitecture => return .MissingArchitecture,
-    };
-    return .None;
-}
-
-fn parseCpu(zig_triple: [*:0]const u8, cpu_name_z: [*:0]const u8) !*Stage2CpuFeatures {
-    const cpu_name = mem.toSliceConst(u8, cpu_name_z);
-    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
-    const arch = target.Cross.arch;
-    const cpu = arch.parseCpu(cpu_name) catch |err| switch (err) {
-        error.UnknownCpu => {
-            std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
-                cpu_name,
-                @tagName(arch),
-            });
-            for (arch.allCpus()) |cpu| {
-                std.debug.warn(" {}\n", .{cpu.name});
-            }
-            process.exit(1);
-        },
-        else => |e| return e,
-    };
-    return Stage2CpuFeatures.createFromCpu(std.heap.c_allocator, arch, cpu);
-}
-
-// ABI warning
-export fn stage2_cpu_features_parse_features(
-    result: **Stage2CpuFeatures,
-    zig_triple: [*:0]const u8,
-    features_text: [*:0]const u8,
-) Error {
-    result.* = parseFeatures(zig_triple, features_text) catch |err| switch (err) {
-        error.OutOfMemory => return .OutOfMemory,
-        error.InvalidCpuFeatures => return .InvalidCpuFeatures,
-        error.UnknownArchitecture => return .UnknownArchitecture,
-        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
-        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
-        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
-        error.MissingOperatingSystem => return .MissingOperatingSystem,
-        error.MissingArchitecture => return .MissingArchitecture,
-    };
-    return .None;
-}
-
-fn parseFeatures(zig_triple: [*:0]const u8, features_text: [*:0]const u8) !*Stage2CpuFeatures {
-    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
-    const arch = target.Cross.arch;
-    const set = arch.parseCpuFeatureSet(mem.toSliceConst(u8, features_text)) catch |err| switch (err) {
-        error.UnknownCpuFeature => {
-            std.debug.warn("Unknown CPU features specified.\nAvailable CPU features for architecture '{}':\n", .{
-                @tagName(arch),
-            });
-            for (arch.allFeaturesList()) |feature| {
-                std.debug.warn(" {}\n", .{feature.name});
-            }
-            process.exit(1);
-        },
-        else => |e| return e,
-    };
-    return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, set);
-}
-
-// ABI warning
-export fn stage2_cpu_features_baseline(result: **Stage2CpuFeatures, zig_triple: [*:0]const u8) Error {
-    result.* = cpuFeaturesBaseline(zig_triple) catch |err| switch (err) {
-        error.OutOfMemory => return .OutOfMemory,
-        error.UnknownArchitecture => return .UnknownArchitecture,
-        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
-        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
-        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
-        error.MissingOperatingSystem => return .MissingOperatingSystem,
-        error.MissingArchitecture => return .MissingArchitecture,
-    };
-    return .None;
-}
-
-fn cpuFeaturesBaseline(zig_triple: [*:0]const u8) !*Stage2CpuFeatures {
-    const target = try Target.parse(mem.toSliceConst(u8, zig_triple));
-    const arch = target.Cross.arch;
-    return Stage2CpuFeatures.createBaseline(std.heap.c_allocator, arch);
-}
-
-// ABI warning
-export fn stage2_cpu_features_llvm(
-    result: **Stage2CpuFeatures,
-    zig_triple: [*:0]const u8,
-    llvm_cpu_name: ?[*:0]const u8,
-    llvm_cpu_features: ?[*:0]const u8,
-) Error {
-    result.* = Stage2CpuFeatures.createFromLLVM(
-        std.heap.c_allocator,
-        zig_triple,
-        llvm_cpu_name,
-        llvm_cpu_features,
-    ) catch |err| switch (err) {
-        error.OutOfMemory => return .OutOfMemory,
-        error.UnknownArchitecture => return .UnknownArchitecture,
-        error.UnknownSubArchitecture => return .UnknownSubArchitecture,
         error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
-        error.UnknownOperatingSystem => return .UnknownOperatingSystem,
-        error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
-        error.MissingOperatingSystem => return .MissingOperatingSystem,
-        error.MissingArchitecture => return .MissingArchitecture,
+        error.InvalidCpuFeatures => return .InvalidCpuFeatures,
     };
     return .None;
 }
 
+fn stage2ParseCpuFeatures(
+    zig_triple_oz: ?[*:0]const u8,
+    cpu_name_oz: ?[*:0]const u8,
+    cpu_features_oz: ?[*:0]const u8,
+) !*Stage2CpuFeatures {
+    const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
+    const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
+    const arch = target.Cross.arch;
+
+    const cpu = if (cpu_name_oz) |cpu_name_z| blk: {
+        const cpu_name = mem.toSliceConst(u8, cpu_name_z);
+        break :blk arch.parseCpu(cpu_name) catch |err| switch (err) {
+            error.UnknownCpu => {
+                std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
+                    cpu_name,
+                    @tagName(arch),
+                });
+                for (arch.allCpus()) |cpu| {
+                    std.debug.warn(" {}\n", .{cpu.name});
+                }
+                process.exit(1);
+            },
+            else => |e| return e,
+        };
+    } else target.Cross.cpu_features.cpu;
+
+    var set = if (cpu_features_oz) |cpu_features_z| blk: {
+        const cpu_features = mem.toSliceConst(u8, cpu_features_z);
+        break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) {
+            error.UnknownCpuFeature => {
+                std.debug.warn(
+                    \\Unknown CPU features specified.
+                    \\Available CPU features for architecture '{}':
+                    \\
+                , .{@tagName(arch)});
+                for (arch.allFeaturesList()) |feature| {
+                    std.debug.warn(" {}\n", .{feature.name});
+                }
+                process.exit(1);
+            },
+            else => |e| return e,
+        };
+    } else cpu.features;
+
+    set.populateDependencies(arch.allFeaturesList());
+    return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
+        .cpu = cpu,
+        .features = set,
+    });
+}
+
 // ABI warning
 export fn stage2_cpu_features_get_cache_hash(
     cpu_features: *const Stage2CpuFeatures,
@@ -935,7 +819,7 @@ export fn stage2_cpu_features_get_builtin_str(
 
 // ABI warning
 export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
-    return cpu_features.llvm_cpu_name;
+    return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null;
 }
 
 // ABI warning
diff --git a/src/codegen.cpp b/src/codegen.cpp
index bb14d39a91808b9babd1d4f0df0e273fde09143e..6fffcc6fdf618b34a0285710348ca314c37e5fd2 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8581,7 +8581,7 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
             stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
             buf_append_mem(contents, ptr, len);
         } else {
-            buf_append_str(contents, ".baseline;\n");
+            buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
         }
     }
     if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
diff --git a/src/main.cpp b/src/main.cpp
index bc181f3d5d9f11b9c1856c110937c4bf09205ce3..512b7a9b0c5165af7856087db207e4c530905fa2 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -866,7 +866,7 @@ int main(int argc, char **argv) {
                     cpu = argv[i];
                 } else if (strcmp(arg, "-target-feature") == 0) {
                     features = argv[i];
-                }else {
+                } else {
                     fprintf(stderr, "Invalid argument: %s\n", arg);
                     return print_error_usage(arg0);
                 }
@@ -984,35 +984,10 @@ int main(int argc, char **argv) {
     Buf zig_triple_buf = BUF_INIT;
     target_triple_zig(&zig_triple_buf, &target);
 
-    if (cpu && features) {
-        fprintf(stderr, "-target-cpu and -target-feature options not allowed together\n");
+    const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
+    if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
+        fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
         return main_exit(root_progress_node, EXIT_FAILURE);
-    } else if (cpu) {
-        if ((err = stage2_cpu_features_parse_cpu(&target.cpu_features, buf_ptr(&zig_triple_buf), cpu))) {
-            fprintf(stderr, "-target-cpu error: %s\n", err_str(err));
-            return main_exit(root_progress_node, EXIT_FAILURE);
-        }
-    } else if (features) {
-        if ((err = stage2_cpu_features_parse_features(&target.cpu_features, buf_ptr(&zig_triple_buf),
-                        features)))
-        {
-            fprintf(stderr, "-target-feature error: %s\n", err_str(err));
-            return main_exit(root_progress_node, EXIT_FAILURE);
-        }
-    } else if (target.is_native) {
-        const char *cpu_name = ZigLLVMGetHostCPUName();
-        const char *cpu_features = ZigLLVMGetNativeFeatures();
-        if ((err = stage2_cpu_features_llvm(&target.cpu_features, buf_ptr(&zig_triple_buf),
-                        cpu_name, cpu_features)))
-        {
-            fprintf(stderr, "unable to determine native CPU features: %s\n", err_str(err));
-            return main_exit(root_progress_node, EXIT_FAILURE);
-        }
-    } else {
-        if ((err = stage2_cpu_features_baseline(&target.cpu_features, buf_ptr(&zig_triple_buf)))) {
-            fprintf(stderr, "unable to determine baseline CPU features: %s\n", err_str(err));
-            return main_exit(root_progress_node, EXIT_FAILURE);
-        }
     }
 
     if (output_dir != nullptr && enable_cache == CacheOptOn) {
diff --git a/src/userland.cpp b/src/userland.cpp
index 64849b65ed99af8db60d565101554bc3334b4991..8524be5739d2fca5b88530f2f797b9158b11afbe 100644
--- a/src/userland.cpp
+++ b/src/userland.cpp
@@ -2,7 +2,8 @@
 // src-self-hosted/stage1.zig
 
 #include "userland.h"
-#include "ast_render.hpp"
+#include "util.hpp"
+#include "zig_llvm.h"
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -96,32 +97,30 @@ struct Stage2CpuFeatures {
     const char *cache_hash;
 };
 
-Error stage2_cpu_features_parse_cpu(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
-    const char *msg = "stage0 called stage2_cpu_features_parse_cpu";
-    stage2_panic(msg, strlen(msg));
-}
-Error stage2_cpu_features_parse_features(Stage2CpuFeatures **out, const char *zig_triple, const char *str) {
-    const char *msg = "stage0 called stage2_cpu_features_parse_features";
-    stage2_panic(msg, strlen(msg));
-}
-Error stage2_cpu_features_baseline(Stage2CpuFeatures **out, const char *zig_triple) {
-    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
-    result->builtin_str = ".baseline;\n";
-    result->cache_hash = "\n\n";
-    *out = result;
-    return ErrorNone;
-}
-Error stage2_cpu_features_llvm(Stage2CpuFeatures **out, const char *zig_triple,
-        const char *llvm_cpu_name, const char *llvm_features)
+Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
+        const char *cpu_name, const char *cpu_features)
 {
-    Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
-    result->llvm_cpu_name = llvm_cpu_name;
-    result->llvm_cpu_features = llvm_features;
-    result->builtin_str = ".baseline;\n";
-    result->cache_hash = "native\n\n";
-    *out = result;
-    return ErrorNone;
+    if (zig_triple == nullptr) {
+        Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+        result->llvm_cpu_name = ZigLLVMGetHostCPUName();
+        result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
+        result->builtin_str = "arch.getBaselineCpuFeatures();\n";
+        result->cache_hash = "native\n\n";
+        *out = result;
+        return ErrorNone;
+    }
+    if (cpu_name == nullptr && cpu_features == nullptr) {
+        Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
+        result->builtin_str = "arch.getBaselineCpuFeatures();\n";
+        result->cache_hash = "\n\n";
+        *out = result;
+        return ErrorNone;
+    }
+
+    const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
+    stage2_panic(msg, strlen(msg));
 }
+
 void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
         const char **ptr, size_t *len)
 {
diff --git a/src/userland.h b/src/userland.h
index 01faf0b532f32fb1987b07db9fe1e2e091e58aa5..6b16d2338efb1796ca967e0aabce8ce4b7754a86 100644
--- a/src/userland.h
+++ b/src/userland.h
@@ -184,20 +184,8 @@ ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
 struct Stage2CpuFeatures;
 
 // ABI warning
-ZIG_EXTERN_C Error stage2_cpu_features_parse_cpu(struct Stage2CpuFeatures **result,
-        const char *zig_triple, const char *cpu_name);
-
-// ABI warning
-ZIG_EXTERN_C Error stage2_cpu_features_parse_features(struct Stage2CpuFeatures **result,
-        const char *zig_triple, const char *features);
-
-// ABI warning
-ZIG_EXTERN_C Error stage2_cpu_features_baseline(struct Stage2CpuFeatures **result,
-        const char *zig_triple);
-
-// ABI warning
-ZIG_EXTERN_C Error stage2_cpu_features_llvm(struct Stage2CpuFeatures **result,
-        const char *zig_triple, const char *llvm_cpu_name, const char *llvm_features);
+ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
+        const char *zig_triple, const char *cpu_name, const char *cpu_features);
 
 // ABI warning
 ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index be2a40d74dc55ea5c1a9222eff8e34814ec335d6..a4ed8549a78f7fffc99994bfc756e21c3e13ce33 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -1,5 +1,6 @@
 const tests = @import("tests.zig");
 const builtin = @import("builtin");
+const Target = @import("std").Target;
 
 pub fn addCases(cases: *tests.CompileErrorContext) void {
     cases.addTest("non-exhaustive enums",
@@ -272,9 +273,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         , &[_][]const u8{
             "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",
         });
-        tc.target = tests.Target{
-            .Cross = tests.CrossTarget{
+        tc.target = Target{
+            .Cross = .{
                 .arch = .wasm32,
+                .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
                 .os = .wasi,
                 .abi = .none,
             },
@@ -673,9 +675,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
         , &[_][]const u8{
             "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",
         });
-        tc.target = tests.Target{
-            .Cross = tests.CrossTarget{
+        tc.target = Target{
+            .Cross = .{
                 .arch = .x86_64,
+                .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
                 .os = .linux,
                 .abi = .gnu,
             },
diff --git a/test/tests.zig b/test/tests.zig
index 7c97e46e0280d7494807eb6bafe1592372552920..1ec25d11ecdca1ab8c9d2acf859f8a0e1c224e86 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -38,236 +38,260 @@ const TestTarget = struct {
     disable_native: bool = false,
 };
 
-const test_targets = [_]TestTarget{
-    TestTarget{},
-    TestTarget{
-        .link_libc = true,
-    },
-    TestTarget{
-        .single_threaded = true,
-    },
-
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .x86_64,
-                .abi = .none,
-            },
-        },
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .x86_64,
-                .abi = .gnu,
-            },
-        },
-        .link_libc = true,
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .x86_64,
-                .abi = .musl,
-            },
-        },
-        .link_libc = true,
-    },
+const test_targets = blk: {
+    // getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm
+    // (where N is roughly 160, which technically makes it O(1), but it adds up to a
+    // lot of branches)
+    @setEvalBranchQuota(50000);
+    break :blk [_]TestTarget{
+        TestTarget{},
+        TestTarget{
+            .link_libc = true,
+        },
+        TestTarget{
+            .single_threaded = true,
+        },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .i386,
-                .abi = .none,
-            },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .x86_64,
+                    .abi = .none,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                },
+            },
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .x86_64,
+                    .abi = .gnu,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                },
+            },
+            .link_libc = true,
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .x86_64,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                    .abi = .musl,
+                },
+            },
+            .link_libc = true,
         },
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .i386,
-                .abi = .musl,
-            },
+
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .i386,
+                    .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
+                    .abi = .none,
+                },
+            },
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .i386,
+                    .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
+                    .abi = .musl,
+                },
+            },
+            .link_libc = true,
         },
-        .link_libc = true,
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
-                .abi = .none,
-            },
-        },
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
-                .abi = .musl,
-            },
-        },
-        .link_libc = true,
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
-                .abi = .gnu,
-            },
-        },
-        .link_libc = true,
-    },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = Target.Arch{ .aarch64 = .v8_5a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .abi = .none,
+                },
+            },
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = Target.Arch{ .aarch64 = .v8_5a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .abi = .musl,
+                },
+            },
+            .link_libc = true,
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = Target.Arch{ .aarch64 = .v8_5a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .abi = .gnu,
+                },
+            },
+            .link_libc = true,
+        },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
-                .abi = .none,
-            },
-        },
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
-                .abi = .musleabihf,
-            },
-        },
-        .link_libc = true,
-    },
-    // TODO https://github.com/ziglang/zig/issues/3287
-    //TestTarget{
-    //    .target = Target{
-    //        .Cross = CrossTarget{
-    //            .os = .linux,
-    //            .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
-    //            .abi = .gnueabihf,
-    //        },
-    //    },
-    //    .link_libc = true,
-    //},
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = Target.Arch{ .arm = .v8_5a },
+                    .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+                    .abi = .none,
+                },
+            },
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = Target.Arch{ .arm = .v8_5a },
+                    .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+                    .abi = .musleabihf,
+                },
+            },
+            .link_libc = true,
+        },
+        // TODO https://github.com/ziglang/zig/issues/3287
+        //TestTarget{
+        //    .target = Target{
+        //        .Cross = CrossTarget{
+        //            .os = .linux,
+        //            .arch = Target.Arch{ .arm = .v8_5a },
+        //            .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+        //            .abi = .gnueabihf,
+        //        },
+        //    },
+        //    .link_libc = true,
+        //},
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .mipsel,
-                .abi = .none,
-            },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .mipsel,
+                    .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
+                    .abi = .none,
+                },
+            },
+        },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .linux,
+                    .arch = .mipsel,
+                    .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
+                    .abi = .musl,
+                },
+            },
+            .link_libc = true,
         },
-    },
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .linux,
-                .arch = .mipsel,
-                .abi = .musl,
-            },
-        },
-        .link_libc = true,
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .macosx,
-                .arch = .x86_64,
-                .abi = .gnu,
-            },
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .macosx,
+                    .arch = .x86_64,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                    .abi = .gnu,
+                },
+            },
+            // TODO https://github.com/ziglang/zig/issues/3295
+            .disable_native = true,
         },
-        // TODO https://github.com/ziglang/zig/issues/3295
-        .disable_native = true,
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .windows,
-                .arch = .i386,
-                .abi = .msvc,
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .windows,
+                    .arch = .i386,
+                    .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
+                    .abi = .msvc,
+                },
             },
         },
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .windows,
-                .arch = .x86_64,
-                .abi = .msvc,
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .windows,
+                    .arch = .x86_64,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                    .abi = .msvc,
+                },
             },
         },
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .windows,
-                .arch = .i386,
-                .abi = .gnu,
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .windows,
+                    .arch = .i386,
+                    .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
+                    .abi = .gnu,
+                },
             },
+            .link_libc = true,
         },
-        .link_libc = true,
-    },
 
-    TestTarget{
-        .target = Target{
-            .Cross = CrossTarget{
-                .os = .windows,
-                .arch = .x86_64,
-                .abi = .gnu,
+        TestTarget{
+            .target = Target{
+                .Cross = CrossTarget{
+                    .os = .windows,
+                    .arch = .x86_64,
+                    .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
+                    .abi = .gnu,
+                },
             },
+            .link_libc = true,
         },
-        .link_libc = true,
-    },
 
-    // Do the release tests last because they take a long time
-    TestTarget{
-        .mode = .ReleaseFast,
-    },
-    TestTarget{
-        .link_libc = true,
-        .mode = .ReleaseFast,
-    },
-    TestTarget{
-        .mode = .ReleaseFast,
-        .single_threaded = true,
-    },
+        // Do the release tests last because they take a long time
+        TestTarget{
+            .mode = .ReleaseFast,
+        },
+        TestTarget{
+            .link_libc = true,
+            .mode = .ReleaseFast,
+        },
+        TestTarget{
+            .mode = .ReleaseFast,
+            .single_threaded = true,
+        },
 
-    TestTarget{
-        .mode = .ReleaseSafe,
-    },
-    TestTarget{
-        .link_libc = true,
-        .mode = .ReleaseSafe,
-    },
-    TestTarget{
-        .mode = .ReleaseSafe,
-        .single_threaded = true,
-    },
+        TestTarget{
+            .mode = .ReleaseSafe,
+        },
+        TestTarget{
+            .link_libc = true,
+            .mode = .ReleaseSafe,
+        },
+        TestTarget{
+            .mode = .ReleaseSafe,
+            .single_threaded = true,
+        },
 
-    TestTarget{
-        .mode = .ReleaseSmall,
-    },
-    TestTarget{
-        .link_libc = true,
-        .mode = .ReleaseSmall,
-    },
-    TestTarget{
-        .mode = .ReleaseSmall,
-        .single_threaded = true,
-    },
+        TestTarget{
+            .mode = .ReleaseSmall,
+        },
+        TestTarget{
+            .link_libc = true,
+            .mode = .ReleaseSmall,
+        },
+        TestTarget{
+            .mode = .ReleaseSmall,
+            .single_threaded = true,
+        },
+    };
 };
 
 const max_stdout_size = 1 * 1024 * 1024; // 1 MB
diff --git a/test/translate_c.zig b/test/translate_c.zig
index df33d9b145f14fb9baab40bea31bbf70d51708de..0870d5bebe84782b8d205e9c70a2674693a31f0b 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -1,5 +1,6 @@
 const tests = @import("tests.zig");
 const builtin = @import("builtin");
+const Target = @import("std").Target;
 
 pub fn addCases(cases: *tests.TranslateCContext) void {
     cases.add("empty declaration",
@@ -1005,7 +1006,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
     });
 
     cases.addWithTarget("Calling convention", tests.Target{
-        .Cross = .{ .os = .linux, .arch = .i386, .abi = .none },
+        .Cross = .{
+            .os = .linux,
+            .arch = .i386,
+            .abi = .none,
+            .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
+        },
     },
         \\void __attribute__((fastcall)) foo1(float *a);
         \\void __attribute__((stdcall)) foo2(float *a);
@@ -1021,7 +1027,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
     });
 
     cases.addWithTarget("Calling convention", tests.Target{
-        .Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none },
+        .Cross = .{
+            .os = .linux,
+            .arch = .{ .arm = .v8_5a },
+            .abi = .none,
+            .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+        },
     },
         \\void __attribute__((pcs("aapcs"))) foo1(float *a);
         \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
@@ -1031,7 +1042,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
     });
 
     cases.addWithTarget("Calling convention", tests.Target{
-        .Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none },
+        .Cross = .{
+            .os = .linux,
+            .arch = .{ .aarch64 = .v8_5a },
+            .abi = .none,
+            .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+        },
     },
         \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
     , &[_][]const u8{
-- 
2.54.0


From 3227aec848bfe13d7a592eb887824e23e018aba9 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 22 Jan 2020 17:35:57 -0500
Subject: [PATCH 095/116] fix not respecting sub-arch feature

---
 lib/std/target.zig         | 4 +---
 src-self-hosted/stage1.zig | 4 ++++
 src/codegen.cpp            | 1 +
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index f23fc78df27460a3301774f6b747e95c1b9685de..1292626f242c99279d19bd8b26bb52b9bd4571f8 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -181,7 +181,7 @@ pub const Target = union(enum) {
             };
         }
 
-        pub fn subArchFeature(arch: Arch) ?u8 {
+        pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index {
             return switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
                     .v8_5a => @enumToInt(arm.Feature.armv8_5_a),
@@ -295,8 +295,6 @@ pub const Target = union(enum) {
                     return error.UnknownCpuFeature;
                 }
             }
-
-            set.populateDependencies(all_features);
             return set;
         }
 
diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig
index a6a3bc013c59ad55c9852872138454f247732bb0..961b95d481177461079ee163dcd1f406167948d8 100644
--- a/src-self-hosted/stage1.zig
+++ b/src-self-hosted/stage1.zig
@@ -790,7 +790,11 @@ fn stage2ParseCpuFeatures(
         };
     } else cpu.features;
 
+    if (arch.subArchFeature()) |index| {
+        set.addFeature(index);
+    }
     set.populateDependencies(arch.allFeaturesList());
+
     return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
         .cpu = cpu,
         .features = set,
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 6fffcc6fdf618b34a0285710348ca314c37e5fd2..7ad19fdfcba2377b6ee7f05e81dd60edb1399777 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -10679,6 +10679,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
     child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;
     child_gen->verbose_cimport = parent_gen->verbose_cimport;
     child_gen->verbose_cc = parent_gen->verbose_cc;
+    child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features;
     child_gen->llvm_argv = parent_gen->llvm_argv;
     child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;
 
-- 
2.54.0


From 0c477f3c793d483c3917f08971b867e19c8c88a9 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 22 Jan 2020 17:47:18 -0500
Subject: [PATCH 096/116] fix std.Target.Arch.parseCpuFeatureSet unit test

---
 lib/std/target.zig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 1292626f242c99279d19bd8b26bb52b9bd4571f8..5dcbb962be2484481d6afacd6b4647932acc38ec 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -1172,7 +1172,9 @@ pub const Target = union(enum) {
 };
 
 test "parseCpuFeatureSet" {
-    const set = try @as(Target.Arch, .x86_64).parseCpuFeatureSet("-sse,-avx,-cx8");
+    const arch: Target.Arch = .x86_64;
+    const baseline = arch.getBaselineCpuFeatures();
+    const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8");
     std.testing.expect(!Target.x86.featureSetHas(set, .sse));
     std.testing.expect(!Target.x86.featureSetHas(set, .avx));
     std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
-- 
2.54.0


From a284be3f69aabb13ad64753e03601169e8292a24 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Mon, 20 Jan 2020 23:13:20 +0100
Subject: [PATCH 097/116] Fix unsafe cast in translate_c

Fixes #4250
---
 src-self-hosted/clang.zig       |  1 +
 src-self-hosted/translate_c.zig |  3 ++-
 src/zig_clang.cpp               |  5 +++++
 src/zig_clang.h                 |  1 +
 test/translate_c.zig            | 25 +++++++++++++++++++++++++
 5 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/src-self-hosted/clang.zig b/src-self-hosted/clang.zig
index 37f1eebe27424999b69aac16350b0ead74d41d8a..a569113b9d3c3e9a7d0dd78a72f232241d2b5fc2 100644
--- a/src-self-hosted/clang.zig
+++ b/src-self-hosted/clang.zig
@@ -809,6 +809,7 @@ pub extern fn ZigClangQualType_isRestrictQualified(self: struct_ZigClangQualType
 pub extern fn ZigClangType_getTypeClass(self: ?*const struct_ZigClangType) ZigClangTypeClass;
 pub extern fn ZigClangType_getPointeeType(self: ?*const struct_ZigClangType) struct_ZigClangQualType;
 pub extern fn ZigClangType_isVoidType(self: ?*const struct_ZigClangType) bool;
+pub extern fn ZigClangType_isConstantArrayType(self: ?*const struct_ZigClangType) bool;
 pub extern fn ZigClangType_isRecordType(self: ?*const struct_ZigClangType) bool;
 pub extern fn ZigClangType_isArrayType(self: ?*const struct_ZigClangType) bool;
 pub extern fn ZigClangType_isBooleanType(self: ?*const struct_ZigClangType) bool;
diff --git a/src-self-hosted/translate_c.zig b/src-self-hosted/translate_c.zig
index bade253a074859e25d125fc14d3a033499505262..093acf1083f7e5c6a7bcd7fa3d61452c3e0d4e6a 100644
--- a/src-self-hosted/translate_c.zig
+++ b/src-self-hosted/translate_c.zig
@@ -1982,7 +1982,8 @@ fn transInitListExprArray(
     const arr_type = ZigClangType_getAsArrayTypeUnsafe(ty);
     const child_qt = ZigClangArrayType_getElementType(arr_type);
     const init_count = ZigClangInitListExpr_getNumInits(expr);
-    const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, ty);
+    assert(ZigClangType_isConstantArrayType(@ptrCast(*const ZigClangType, arr_type)));
+    const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, arr_type);
     const size_ap_int = ZigClangConstantArrayType_getSize(const_arr_ty);
     const all_count = ZigClangAPInt_getLimitedValue(size_ap_int, math.maxInt(usize));
     const leftover_count = all_count - init_count;
diff --git a/src/zig_clang.cpp b/src/zig_clang.cpp
index 5769d2fc73ccbc4291e02bba92c684ab24ff65de..348c85b87ba0579c2421ee7f69d3836ee6df341e 100644
--- a/src/zig_clang.cpp
+++ b/src/zig_clang.cpp
@@ -1877,6 +1877,11 @@ bool ZigClangType_isRecordType(const ZigClangType *self) {
     return casted->isRecordType();
 }
 
+bool ZigClangType_isConstantArrayType(const ZigClangType *self) {
+    auto casted = reinterpret_cast<const clang::Type *>(self);
+    return casted->isConstantArrayType();
+}
+
 const char *ZigClangType_getTypeClassName(const ZigClangType *self) {
     auto casted = reinterpret_cast<const clang::Type *>(self);
     return casted->getTypeClassName();
diff --git a/src/zig_clang.h b/src/zig_clang.h
index f9ced941cbf2bda9f7969607aa41ec7d6c49a4ba..6f8d786bf6bf51ed418d7f5b65d44a4d43ffe67c 100644
--- a/src/zig_clang.h
+++ b/src/zig_clang.h
@@ -945,6 +945,7 @@ ZIG_EXTERN_C bool ZigClangType_isBooleanType(const struct ZigClangType *self);
 ZIG_EXTERN_C bool ZigClangType_isVoidType(const struct ZigClangType *self);
 ZIG_EXTERN_C bool ZigClangType_isArrayType(const struct ZigClangType *self);
 ZIG_EXTERN_C bool ZigClangType_isRecordType(const struct ZigClangType *self);
+ZIG_EXTERN_C bool ZigClangType_isConstantArrayType(const ZigClangType *self);
 ZIG_EXTERN_C const char *ZigClangType_getTypeClassName(const struct ZigClangType *self);
 ZIG_EXTERN_C const struct ZigClangArrayType *ZigClangType_getAsArrayTypeUnsafe(const struct ZigClangType *self);
 ZIG_EXTERN_C const ZigClangRecordType *ZigClangType_getAsRecordType(const ZigClangType *self);
diff --git a/test/translate_c.zig b/test/translate_c.zig
index df33d9b145f14fb9baab40bea31bbf70d51708de..df2c872bf909d8e02a179d909497b8df9db5cddc 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -2,6 +2,31 @@ const tests = @import("tests.zig");
 const builtin = @import("builtin");
 
 pub fn addCases(cases: *tests.TranslateCContext) void {
+    cases.add("array initializer w/ typedef",
+        \\typedef unsigned char uuid_t[16];
+        \\static const uuid_t UUID_NULL __attribute__ ((unused)) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+    , &[_][]const u8{
+        \\pub const uuid_t = [16]u8;
+        \\pub const UUID_NULL: uuid_t = .{
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\    @bitCast(u8, @truncate(i8, @as(c_int, 0))),
+        \\};
+    });
+
     cases.add("empty declaration",
         \\;
     , &[_][]const u8{""});
-- 
2.54.0


From 9845264a0bcb1347216a00dad0fd67fe79555485 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 22 Jan 2020 18:40:34 -0500
Subject: [PATCH 098/116] aarch64: less feature-full baseline CPU

---
 lib/std/target.zig         | 2 +-
 lib/std/target/aarch64.zig | 6 ++++++
 src/codegen.cpp            | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 5dcbb962be2484481d6afacd6b4647932acc38ec..6457216676014eb51dbeb1f4daf008b415138ac1 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -468,7 +468,7 @@ pub const Target = union(enum) {
             };
             const cpu = switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
-                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
+                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline,
                 .avr => &avr.cpu.avr1,
                 .bpfel, .bpfeb => &bpf.cpu.generic,
                 .hexagon => &hexagon.cpu.generic,
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 4639fe6dcc4eb04ede4b884c749373964a927d76..4d05a94290af1c972d75c27bad2df2afa17d6b7d 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -1225,6 +1225,11 @@ pub const cpu = struct {
             .cyclone,
         }),
     };
+    pub const baseline = Cpu{
+        .name = "baseline",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
@@ -1411,6 +1416,7 @@ pub const cpu = struct {
 /// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
     &cpu.apple_latest,
+    &cpu.baseline,
     &cpu.cortex_a35,
     &cpu.cortex_a53,
     &cpu.cortex_a55,
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 7ad19fdfcba2377b6ee7f05e81dd60edb1399777..123115ba2ff3bd3adce066b5ca0502d4fb543c5d 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8795,6 +8795,7 @@ static void init(CodeGen *g) {
         target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
     }
     if (g->verbose_llvm_cpu_features) {
+        fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
         fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
         fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
     }
-- 
2.54.0


From 357f42da6c2f158fff2afa28a56b7e0e7a8a5963 Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Wed, 22 Jan 2020 18:30:21 -0500
Subject: [PATCH 099/116] compiler_rt: fix mulsi3 test typo

---
 lib/std/special/compiler_rt/int.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/std/special/compiler_rt/int.zig b/lib/std/special/compiler_rt/int.zig
index 1ff77ba63c8761992fa3b77d466d7f48059f9e8f..eb731ee89814dfc400c53a2d8e3b415c84d08525 100644
--- a/lib/std/special/compiler_rt/int.zig
+++ b/lib/std/special/compiler_rt/int.zig
@@ -2,7 +2,7 @@
 const builtin = @import("builtin");
 const testing = @import("std").testing;
 const maxInt = @import("std").math.maxInt;
-const minInt = @import("std").math.maxInt;
+const minInt = @import("std").math.minInt;
 
 const udivmod = @import("udivmod.zig").udivmod;
 
-- 
2.54.0


From ead7d15772587cecff69d8b8fac3b5122ff2b98c Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Thu, 23 Jan 2020 00:41:34 -0500
Subject: [PATCH 100/116] use an older arm64 sub-arch for test suite

hopefully this avoids the older qemu version crashing
---
 lib/std/target.zig         |  2 +-
 lib/std/target/aarch64.zig |  6 ------
 test/tests.zig             | 24 ++++++++++++------------
 3 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 6457216676014eb51dbeb1f4daf008b415138ac1..5dcbb962be2484481d6afacd6b4647932acc38ec 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -468,7 +468,7 @@ pub const Target = union(enum) {
             };
             const cpu = switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
-                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.baseline,
+                .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
                 .avr => &avr.cpu.avr1,
                 .bpfel, .bpfeb => &bpf.cpu.generic,
                 .hexagon => &hexagon.cpu.generic,
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 4d05a94290af1c972d75c27bad2df2afa17d6b7d..4639fe6dcc4eb04ede4b884c749373964a927d76 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -1225,11 +1225,6 @@ pub const cpu = struct {
             .cyclone,
         }),
     };
-    pub const baseline = Cpu{
-        .name = "baseline",
-        .llvm_name = null,
-        .features = featureSet(&[_]Feature{}),
-    };
     pub const cortex_a35 = Cpu{
         .name = "cortex_a35",
         .llvm_name = "cortex-a35",
@@ -1416,7 +1411,6 @@ pub const cpu = struct {
 /// compiler has inefficient memory and CPU usage, affecting build times.
 pub const all_cpus = &[_]*const Cpu{
     &cpu.apple_latest,
-    &cpu.baseline,
     &cpu.cortex_a35,
     &cpu.cortex_a53,
     &cpu.cortex_a55,
diff --git a/test/tests.zig b/test/tests.zig
index 1ec25d11ecdca1ab8c9d2acf859f8a0e1c224e86..13cd2c3198177d17a436c3383ed40eae794b0feb 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -111,8 +111,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_5a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8_1a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
                     .abi = .none,
                 },
             },
@@ -121,8 +121,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_5a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8_1a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
                     .abi = .musl,
                 },
             },
@@ -132,8 +132,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_5a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8_1a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
                     .abi = .gnu,
                 },
             },
@@ -144,8 +144,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .arm = .v8_5a },
-                    .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .arm = .v8_1a },
+                    .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
                     .abi = .none,
                 },
             },
@@ -154,8 +154,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .arm = .v8_5a },
-                    .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .arm = .v8_1a },
+                    .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
                     .abi = .musleabihf,
                 },
             },
@@ -166,8 +166,8 @@ const test_targets = blk: {
         //    .target = Target{
         //        .Cross = CrossTarget{
         //            .os = .linux,
-        //            .arch = Target.Arch{ .arm = .v8_5a },
-        //            .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
+        //            .arch = Target.Arch{ .arm = .v8_1a },
+        //            .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
         //            .abi = .gnueabihf,
         //        },
         //    },
-- 
2.54.0


From c86589a738e5053a26b2be7d156bcfee1565f00b Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Thu, 23 Jan 2020 02:05:24 -0500
Subject: [PATCH 101/116] disable f128 compiler_rt tests failing on windows

These were never working with native CPU features. In this branch,
we fix native CPU features not being enabled on Windows, and regress
f128 language features. In the llvm10 branch, all this is fixed,
and the tests are re-enabled.
---
 lib/std/special/compiler_rt/addXf3_test.zig      | 8 ++++++++
 lib/std/special/compiler_rt/fixtfdi_test.zig     | 4 ++++
 lib/std/special/compiler_rt/fixtfsi_test.zig     | 4 ++++
 lib/std/special/compiler_rt/fixtfti_test.zig     | 4 ++++
 lib/std/special/compiler_rt/fixunstfdi_test.zig  | 4 ++++
 lib/std/special/compiler_rt/fixunstfsi_test.zig  | 4 ++++
 lib/std/special/compiler_rt/fixunstfti_test.zig  | 4 ++++
 lib/std/special/compiler_rt/floattitf_test.zig   | 4 ++++
 lib/std/special/compiler_rt/floatuntitf_test.zig | 4 ++++
 lib/std/special/compiler_rt/mulXf3_test.zig      | 4 ++++
 lib/std/special/compiler_rt/truncXfYf2_test.zig  | 8 ++++++++
 11 files changed, 52 insertions(+)

diff --git a/lib/std/special/compiler_rt/addXf3_test.zig b/lib/std/special/compiler_rt/addXf3_test.zig
index af991b37e923cfbc4b363dc0654ed4e6297ba756..402bb5a43c4c815ab23b7004321187da3f210f25 100644
--- a/lib/std/special/compiler_rt/addXf3_test.zig
+++ b/lib/std/special/compiler_rt/addXf3_test.zig
@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
 }
 
 test "addtf3" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
 
     // NaN + any = NaN
@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
 }
 
 test "subtf3" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     // qNaN - any = qNaN
     test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
 
diff --git a/lib/std/special/compiler_rt/fixtfdi_test.zig b/lib/std/special/compiler_rt/fixtfdi_test.zig
index 6baa9011c3ea49ca0f854dd78c9cf7976a744f00..4c43c90550ed76c354bf75d7eb91e444b8e0d353 100644
--- a/lib/std/special/compiler_rt/fixtfdi_test.zig
+++ b/lib/std/special/compiler_rt/fixtfdi_test.zig
@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {
 }
 
 test "fixtfdi" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     //warn("\n", .{});
     test__fixtfdi(-math.f128_max, math.minInt(i64));
 
diff --git a/lib/std/special/compiler_rt/fixtfsi_test.zig b/lib/std/special/compiler_rt/fixtfsi_test.zig
index c7294fe250146af0346957d38c6fba8e07a5c408..4eabd0c59466e23088014db3bf8d65fbac672535 100644
--- a/lib/std/special/compiler_rt/fixtfsi_test.zig
+++ b/lib/std/special/compiler_rt/fixtfsi_test.zig
@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {
 }
 
 test "fixtfsi" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     //warn("\n", .{});
     test__fixtfsi(-math.f128_max, math.minInt(i32));
 
diff --git a/lib/std/special/compiler_rt/fixtfti_test.zig b/lib/std/special/compiler_rt/fixtfti_test.zig
index 6b8218e2f61a9f1ea1958c4ae8694bd8cb082bc8..acda2f162bd976a822bdebf02fe449e3ac70748b 100644
--- a/lib/std/special/compiler_rt/fixtfti_test.zig
+++ b/lib/std/special/compiler_rt/fixtfti_test.zig
@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {
 }
 
 test "fixtfti" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     //warn("\n", .{});
     test__fixtfti(-math.f128_max, math.minInt(i128));
 
diff --git a/lib/std/special/compiler_rt/fixunstfdi_test.zig b/lib/std/special/compiler_rt/fixunstfdi_test.zig
index 0d47641c092af8fbfd0b8931da7df0b8faed3be5..154fffe18a3cf27fad0d52e16b09e9591bc90891 100644
--- a/lib/std/special/compiler_rt/fixunstfdi_test.zig
+++ b/lib/std/special/compiler_rt/fixunstfdi_test.zig
@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {
 }
 
 test "fixunstfdi" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__fixunstfdi(0.0, 0);
 
     test__fixunstfdi(0.5, 0);
diff --git a/lib/std/special/compiler_rt/fixunstfsi_test.zig b/lib/std/special/compiler_rt/fixunstfsi_test.zig
index 286567629a3f7afe45fb746b4ee95915ab672344..af312ddc464419a26fb9420a0bc5f96c523f23bc 100644
--- a/lib/std/special/compiler_rt/fixunstfsi_test.zig
+++ b/lib/std/special/compiler_rt/fixunstfsi_test.zig
@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {
 const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
 
 test "fixunstfsi" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__fixunstfsi(inf128, 0xffffffff);
     test__fixunstfsi(0, 0x0);
     test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);
diff --git a/lib/std/special/compiler_rt/fixunstfti_test.zig b/lib/std/special/compiler_rt/fixunstfti_test.zig
index 62a9bbfecfb8c4a5832f34083cbd11ef11309fbc..84dbf991e2cafaa9ddd2356f57e43e36998acc49 100644
--- a/lib/std/special/compiler_rt/fixunstfti_test.zig
+++ b/lib/std/special/compiler_rt/fixunstfti_test.zig
@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {
 const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
 
 test "fixunstfti" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);
 
     test__fixunstfti(0.0, 0);
diff --git a/lib/std/special/compiler_rt/floattitf_test.zig b/lib/std/special/compiler_rt/floattitf_test.zig
index 53e3e48bdb6a8cd96aec7ecfb5a4dc098bdd37e1..0b2b5b958a60f7dedac07279e222078985093261 100644
--- a/lib/std/special/compiler_rt/floattitf_test.zig
+++ b/lib/std/special/compiler_rt/floattitf_test.zig
@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {
 }
 
 test "floattitf" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__floattitf(0, 0.0);
 
     test__floattitf(1, 1.0);
diff --git a/lib/std/special/compiler_rt/floatuntitf_test.zig b/lib/std/special/compiler_rt/floatuntitf_test.zig
index 09f3eabb3e60a79f7de5d115b270a7ca39584cd8..8b99bbef5dc42767d23b9bf5e18eac68bda579e9 100644
--- a/lib/std/special/compiler_rt/floatuntitf_test.zig
+++ b/lib/std/special/compiler_rt/floatuntitf_test.zig
@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {
 }
 
 test "floatuntitf" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     test__floatuntitf(0, 0.0);
 
     test__floatuntitf(1, 1.0);
diff --git a/lib/std/special/compiler_rt/mulXf3_test.zig b/lib/std/special/compiler_rt/mulXf3_test.zig
index 57dc38532174095c9fda6f4cc028bf5bbc3766d0..00db984a89e723587118022abf39d26c7bea1fa9 100644
--- a/lib/std/special/compiler_rt/mulXf3_test.zig
+++ b/lib/std/special/compiler_rt/mulXf3_test.zig
@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {
     return float_result;
 }
 test "multf3" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     // qNaN * any = qNaN
     test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
 
diff --git a/lib/std/special/compiler_rt/truncXfYf2_test.zig b/lib/std/special/compiler_rt/truncXfYf2_test.zig
index baec2a445061f8a6b5eae624bb2a0dd6b79ab1a9..f14dbe6b4371d239a64911ee342eef6acaba0905 100644
--- a/lib/std/special/compiler_rt/truncXfYf2_test.zig
+++ b/lib/std/special/compiler_rt/truncXfYf2_test.zig
@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {
 }
 
 test "trunctfsf2" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     // qnan
     test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);
     // nan
@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {
 }
 
 test "trunctfdf2" {
+    if (@import("std").Target.current.isWindows()) {
+        // TODO https://github.com/ziglang/zig/issues/508
+        return error.SkipZigTest;
+    }
     // qnan
     test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);
     // nan
-- 
2.54.0


From fbfda7f00edbbf4eb623898d53c3faf43ab874ce Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Thu, 23 Jan 2020 13:02:45 -0500
Subject: [PATCH 102/116] fix incorrect list of sub-arches for aarch64

tests use older sub-arch that works in the older qemu
---
 lib/std/target.zig         | 22 ++++++++--------------
 lib/std/target/aarch64.zig | 11 +++++++++++
 src/target.cpp             |  7 ++-----
 src/zig_llvm.cpp           |  4 ++--
 test/tests.zig             | 24 ++++++++++++------------
 5 files changed, 35 insertions(+), 33 deletions(-)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 5dcbb962be2484481d6afacd6b4647932acc38ec..0b09ebf8384cd0d729f990f73037cbb846de1b0b 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -123,12 +123,12 @@ pub const Target = union(enum) {
             v8_3a,
             v8_2a,
             v8_1a,
-            v8,
+            v8a,
             v8r,
             v8m_baseline,
             v8m_mainline,
             v8_1m_mainline,
-            v7,
+            v7a,
             v7em,
             v7m,
             v7s,
@@ -144,8 +144,8 @@ pub const Target = union(enum) {
 
             pub fn version(version: Arm32) comptime_int {
                 return switch (version) {
-                    .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
-                    .v7, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
+                    .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
+                    .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
                     .v6, .v6m, .v6k, .v6t2 => 6,
                     .v5, .v5te => 5,
                     .v4t => 4,
@@ -158,10 +158,7 @@ pub const Target = union(enum) {
             v8_3a,
             v8_2a,
             v8_1a,
-            v8,
-            v8r,
-            v8m_baseline,
-            v8m_mainline,
+            v8a,
         };
         pub const Kalimba = enum {
             v5,
@@ -189,12 +186,12 @@ pub const Target = union(enum) {
                     .v8_3a => @enumToInt(arm.Feature.armv8_3_a),
                     .v8_2a => @enumToInt(arm.Feature.armv8_2_a),
                     .v8_1a => @enumToInt(arm.Feature.armv8_1_a),
-                    .v8 => @enumToInt(arm.Feature.armv8_a),
+                    .v8a => @enumToInt(arm.Feature.armv8_a),
                     .v8r => @enumToInt(arm.Feature.armv8_r),
                     .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
                     .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
                     .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
-                    .v7 => @enumToInt(arm.Feature.armv7_a),
+                    .v7a => @enumToInt(arm.Feature.armv7_a),
                     .v7em => @enumToInt(arm.Feature.armv7e_m),
                     .v7m => @enumToInt(arm.Feature.armv7_m),
                     .v7s => @enumToInt(arm.Feature.armv7s),
@@ -214,10 +211,7 @@ pub const Target = union(enum) {
                     .v8_3a => @enumToInt(aarch64.Feature.v8_3a),
                     .v8_2a => @enumToInt(aarch64.Feature.v8_2a),
                     .v8_1a => @enumToInt(aarch64.Feature.v8_1a),
-                    .v8 => @enumToInt(aarch64.Feature.v8_1a),
-                    .v8r => @enumToInt(aarch64.Feature.v8_1a),
-                    .v8m_baseline => @enumToInt(aarch64.Feature.v8_1a),
-                    .v8m_mainline => @enumToInt(aarch64.Feature.v8_1a),
+                    .v8a => @enumToInt(aarch64.Feature.v8a),
                 },
                 else => return null,
             };
diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig
index 4639fe6dcc4eb04ede4b884c749373964a927d76..d2878e24239bd12320a7877190c662f7f034a364 100644
--- a/lib/std/target/aarch64.zig
+++ b/lib/std/target/aarch64.zig
@@ -137,6 +137,7 @@ pub const Feature = enum {
     use_aa,
     use_postra_scheduler,
     use_reciprocal_square_root,
+    v8a,
     v8_1a,
     v8_2a,
     v8_3a,
@@ -153,6 +154,7 @@ pub const Feature = enum {
 pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
 
 pub const all_features = blk: {
+    @setEvalBranchQuota(2000);
     const len = @typeInfo(Feature).Enum.fields.len;
     std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
     var result: [len]Cpu.Feature = undefined;
@@ -1108,6 +1110,14 @@ pub const all_features = blk: {
         .description = "Use the reciprocal square root approximation",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@enumToInt(Feature.v8a)] = .{
+        .llvm_name = null,
+        .description = "Support ARM v8a instructions",
+        .dependencies = featureSet(&[_]Feature{
+            .fp_armv8,
+            .neon,
+        }),
+    };
     result[@enumToInt(Feature.v8_1a)] = .{
         .llvm_name = "v8.1a",
         .description = "Support ARM v8.1a instructions",
@@ -1118,6 +1128,7 @@ pub const all_features = blk: {
             .pan,
             .rdm,
             .vh,
+            .v8a,
         }),
     };
     result[@enumToInt(Feature.v8_2a)] = .{
diff --git a/src/target.cpp b/src/target.cpp
index 7542ff7c95752b3f8cd453360cd8150a5b0b51fc..53d2e598bec874b09e0071702611c6b6374e65b4 100644
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {
     ZigLLVM_ARMSubArch_v8_2a,
     ZigLLVM_ARMSubArch_v8_1a,
     ZigLLVM_ARMSubArch_v8,
-    ZigLLVM_ARMSubArch_v8r,
-    ZigLLVM_ARMSubArch_v8m_baseline,
-    ZigLLVM_ARMSubArch_v8m_mainline,
 };
 
 static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
@@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
         case ZigLLVM_ARMSubArch_v8_1a:
             return "v8_1a";
         case ZigLLVM_ARMSubArch_v8:
-            return "v8";
+            return "v8a";
         case ZigLLVM_ARMSubArch_v8r:
             return "v8r";
         case ZigLLVM_ARMSubArch_v8m_baseline:
@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
         case ZigLLVM_ARMSubArch_v8_1m_mainline:
             return "v8_1m_mainline";
         case ZigLLVM_ARMSubArch_v7:
-            return "v7";
+            return "v7a";
         case ZigLLVM_ARMSubArch_v7em:
             return "v7em";
         case ZigLLVM_ARMSubArch_v7m:
diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp
index b5c43b632b83cc74535056feed2bb1220abd1762..614d31dc5a31bd4a7aa86cf0b5c853fa1941b775 100644
--- a/src/zig_llvm.cpp
+++ b/src/zig_llvm.cpp
@@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
         case ZigLLVM_ARMSubArch_v8_1a:
             return "v8.1a";
         case ZigLLVM_ARMSubArch_v8:
-            return "v8";
+            return "v8a";
         case ZigLLVM_ARMSubArch_v8r:
             return "v8r";
         case ZigLLVM_ARMSubArch_v8m_baseline:
@@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
         case ZigLLVM_ARMSubArch_v8_1m_mainline:
             return "v8.1m.main";
         case ZigLLVM_ARMSubArch_v7:
-            return "v7";
+            return "v7a";
         case ZigLLVM_ARMSubArch_v7em:
             return "v7em";
         case ZigLLVM_ARMSubArch_v7m:
diff --git a/test/tests.zig b/test/tests.zig
index 13cd2c3198177d17a436c3383ed40eae794b0feb..4d1f15fe294ea06737d39fa78926440f0125fc45 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -111,8 +111,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_1a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
                     .abi = .none,
                 },
             },
@@ -121,8 +121,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_1a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
                     .abi = .musl,
                 },
             },
@@ -132,8 +132,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .aarch64 = .v8_1a },
-                    .cpu_features = (Target.Arch{ .aarch64 = .v8_1a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .aarch64 = .v8a },
+                    .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
                     .abi = .gnu,
                 },
             },
@@ -144,8 +144,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .arm = .v8_1a },
-                    .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .arm = .v8a },
+                    .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
                     .abi = .none,
                 },
             },
@@ -154,8 +154,8 @@ const test_targets = blk: {
             .target = Target{
                 .Cross = CrossTarget{
                     .os = .linux,
-                    .arch = Target.Arch{ .arm = .v8_1a },
-                    .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
+                    .arch = Target.Arch{ .arm = .v8a },
+                    .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
                     .abi = .musleabihf,
                 },
             },
@@ -166,8 +166,8 @@ const test_targets = blk: {
         //    .target = Target{
         //        .Cross = CrossTarget{
         //            .os = .linux,
-        //            .arch = Target.Arch{ .arm = .v8_1a },
-        //            .cpu_features = (Target.Arch{ .arm = .v8_1a }).getBaselineCpuFeatures(),
+        //            .arch = Target.Arch{ .arm = .v8a },
+        //            .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
         //            .abi = .gnueabihf,
         //        },
         //    },
-- 
2.54.0


From 8d9b8ab930d8633b9e9e77a80a36fa08a5e7f3f5 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Thu, 23 Jan 2020 22:40:12 +0100
Subject: [PATCH 103/116] More error checking for unresolved TLDs

Closes #4274
---
 src/ir.cpp              | 44 ++++++++++++++++++++++++++---------------
 test/compile_errors.zig |  6 ++++++
 2 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/src/ir.cpp b/src/ir.cpp
index db1faac37c7eefa266b46819e231a0280ecf98ce..808bc2e90bff006dbf85a063abc06b80954e150f 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -264,6 +264,7 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
     IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type);
 static ResultLoc *no_result_loc(void);
 static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value);
+static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *source_instr);
 
 static void destroy_instruction(IrInstruction *inst) {
 #ifdef ZIG_ENABLE_MEM_PROFILE
@@ -20022,8 +20023,13 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
                 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
                 if (tld->resolution == TldResolutionInvalid)
                     return ira->codegen->invalid_instruction;
+                if (tld->resolution == TldResolutionResolving)
+                    return ir_error_dependency_loop(ira, source_instr);
+
                 TldFn *tld_fn = (TldFn *)tld;
                 ZigFn *fn_entry = tld_fn->fn_entry;
+                assert(fn_entry != nullptr);
+
                 if (type_is_invalid(fn_entry->type_entry))
                     return ira->codegen->invalid_instruction;
 
@@ -20034,8 +20040,13 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
                 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
                 if (tld->resolution == TldResolutionInvalid)
                     return ira->codegen->invalid_instruction;
+                if (tld->resolution == TldResolutionResolving)
+                    return ir_error_dependency_loop(ira, source_instr);
+
                 TldVar *tld_var = (TldVar *)tld;
                 ZigVar *var = tld_var->var;
+                assert(var != nullptr);
+
                 if (type_is_invalid(var->var_type))
                     return ira->codegen->invalid_instruction;
 
@@ -20369,9 +20380,10 @@ static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *so
 
 static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_instruction, Tld *tld) {
     resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);
-    if (tld->resolution == TldResolutionInvalid) {
+    if (tld->resolution == TldResolutionInvalid)
         return ira->codegen->invalid_instruction;
-    }
+    if (tld->resolution == TldResolutionResolving)
+        return ir_error_dependency_loop(ira, source_instruction);
 
     switch (tld->id) {
         case TldIdContainer:
@@ -20381,9 +20393,8 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
         case TldIdVar: {
             TldVar *tld_var = (TldVar *)tld;
             ZigVar *var = tld_var->var;
-            if (var == nullptr) {
-                return ir_error_dependency_loop(ira, source_instruction);
-            }
+            assert(var != nullptr);
+
             if (tld_var->extern_lib_name != nullptr) {
                 add_link_lib_symbol(ira, tld_var->extern_lib_name, buf_create_from_str(var->name),
                         source_instruction->source_node);
@@ -20394,7 +20405,7 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
         case TldIdFn: {
             TldFn *tld_fn = (TldFn *)tld;
             ZigFn *fn_entry = tld_fn->fn_entry;
-            assert(fn_entry->type_entry);
+            assert(fn_entry->type_entry != nullptr);
 
             if (type_is_invalid(fn_entry->type_entry))
                 return ira->codegen->invalid_instruction;
@@ -22628,11 +22639,14 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
 
     while ((curr_entry = decl_it.next()) != nullptr) {
         // If the declaration is unresolved, force it to be resolved again.
-        if (curr_entry->value->resolution == TldResolutionUnresolved) {
-            resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
-            if (curr_entry->value->resolution != TldResolutionOk) {
-                return ErrorSemanticAnalyzeFail;
-            }
+        resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
+        if (curr_entry->value->resolution == TldResolutionInvalid) {
+            return ErrorSemanticAnalyzeFail;
+        }
+
+        if (curr_entry->value->resolution == TldResolutionResolving) {
+            ir_error_dependency_loop(ira, source_instr);
+            return ErrorSemanticAnalyzeFail;
         }
 
         // Skip comptime blocks and test functions.
@@ -22689,6 +22703,8 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
             case TldIdVar:
                 {
                     ZigVar *var = ((TldVar *)curr_entry->value)->var;
+                    assert(var != nullptr);
+
                     if ((err = type_resolve(ira->codegen, var->const_value->type, ResolveStatusSizeKnown)))
                         return ErrorSemanticAnalyzeFail;
 
@@ -22719,11 +22735,7 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
 
                     ZigFn *fn_entry = ((TldFn *)curr_entry->value)->fn_entry;
                     assert(!fn_entry->is_test);
-
-                    if (fn_entry->type_entry == nullptr) {
-                        ir_error_dependency_loop(ira, source_instr);
-                        return ErrorSemanticAnalyzeFail;
-                    }
+                    assert(fn_entry->type_entry != nullptr);
 
                     AstNodeFnProto *fn_node = &fn_entry->proto_node->data.fn_proto;
 
diff --git a/test/compile_errors.zig b/test/compile_errors.zig
index be2a40d74dc55ea5c1a9222eff8e34814ec335d6..ff0ad419969af841cb74f750d778f3f857c704a6 100644
--- a/test/compile_errors.zig
+++ b/test/compile_errors.zig
@@ -2,6 +2,12 @@ const tests = @import("tests.zig");
 const builtin = @import("builtin");
 
 pub fn addCases(cases: *tests.CompileErrorContext) void {
+    cases.addTest("dependency loop in top-level decl with @TypeInfo",
+        \\export const foo = @typeInfo(@This());
+    , &[_][]const u8{
+        "tmp.zig:1:20: error: dependency loop detected",
+    });
+
     cases.addTest("non-exhaustive enums",
         \\const A = enum {
         \\    a,
-- 
2.54.0


From b54040d394830b847a7d64babac23f29fda8d47c Mon Sep 17 00:00:00 2001
From: Michael Dusan <michael.dusan@gmail.com>
Date: Thu, 23 Jan 2020 21:56:53 -0500
Subject: [PATCH 104/116] stage1: make sure to create native_libc.txt dir

- fix regression from #4186
---
 src/codegen.cpp |  5 ++++-
 src/main.cpp    | 10 +++++-----
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/src/codegen.cpp b/src/codegen.cpp
index 3d4d2a8c317e0f360c8bce83f2d8e800995e6aee..7546025e720a791b0b1cea4f25b630f2817902b5 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -8996,7 +8996,10 @@ static void detect_libc(CodeGen *g) {
                     "See `zig libc --help` for more details.\n", err_str(err));
                 exit(1);
             }
-            if ((err = os_make_path(g->cache_dir))) {
+            Buf libc_txt_dir = BUF_INIT;
+            os_path_dirname(libc_txt, &libc_txt_dir);
+            buf_deinit(&libc_txt_dir);
+            if ((err = os_make_path(&libc_txt_dir))) {
                 fprintf(stderr, "Unable to create %s directory: %s\n",
                     buf_ptr(g->cache_dir), err_str(err));
                 exit(1);
diff --git a/src/main.cpp b/src/main.cpp
index d89ac352a5e856a2c225a747c6d4ca1222cc205f..fd50c1b145fef4a71518536ea2df0edb88dac924 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -141,15 +141,15 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
         "You can save this into a file and then edit the paths to create a cross\n"
         "compilation libc kit. Then you can pass `--libc [file]` for Zig to use it.\n"
         "\n"
-        "When compiling natively and no `--libc` argument provided, Zig automatically\n"
-        "creates zig-cache/native_libc.txt so that it does not have to detect libc\n"
-        "on every invocation. You can remove this file to have Zig re-detect the\n"
-        "native libc.\n"
+        "When compiling natively and no `--libc` argument provided, Zig will create\n"
+        "`%s/native_libc.txt`\n"
+        "so that it does not have to detect libc on every invocation. You can remove\n"
+        "this file to have Zig re-detect the native libc.\n"
         "\n\n"
         "Usage: %s libc [file]\n"
         "\n"
         "Parse a libc installation text file and validate it.\n"
-    , arg0, arg0);
+    , arg0, buf_ptr(get_global_cache_dir()), arg0);
     return return_code;
 }
 
-- 
2.54.0


From 3d8328abceba086ff502f38c6353792f7c590f1c Mon Sep 17 00:00:00 2001
From: Tadeo Kondrak <me@tadeo.ca>
Date: Thu, 23 Jan 2020 18:18:01 -0700
Subject: [PATCH 105/116] Don't include stdbool.h for void and unreachable

Fixes https://github.com/ziglang/zig/issues/4272
---
 src/codegen.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/codegen.cpp b/src/codegen.cpp
index 3d4d2a8c317e0f360c8bce83f2d8e800995e6aee..89edfc641223ce3eb5c96a59ef461f83430bd7f0 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -9787,6 +9787,7 @@ static void prepend_c_type_to_decl_list(CodeGen *g, GenH *gen_h, ZigType *type_e
             zig_unreachable();
         case ZigTypeIdVoid:
         case ZigTypeIdUnreachable:
+            return;
         case ZigTypeIdBool:
             g->c_want_stdbool = true;
             return;
-- 
2.54.0


From a4a93306482c4f7c331a2e8b7ecd5a1e5c56bf69 Mon Sep 17 00:00:00 2001
From: Feix Weiglhofer <9267733+fweig@users.noreply.github.com>
Date: Fri, 24 Jan 2020 21:32:32 +0100
Subject: [PATCH 106/116] translate-c: Don't make const parameters mutable.
 (#4273)

* translate-c: Remove arg-prefix from const parameters.
* translate-c: Add unittest for const parameters.
---
 src-self-hosted/clang.zig       |  1 +
 src-self-hosted/translate_c.zig | 26 ++++++++++++++++++--------
 src/zig_clang.cpp               |  4 ++++
 src/zig_clang.h                 |  2 ++
 test/translate_c.zig            | 12 ++++++++++++
 5 files changed, 37 insertions(+), 8 deletions(-)

diff --git a/src-self-hosted/clang.zig b/src-self-hosted/clang.zig
index a569113b9d3c3e9a7d0dd78a72f232241d2b5fc2..d2db306be8d86c4fef2cc3b24feccc6858dd8116 100644
--- a/src-self-hosted/clang.zig
+++ b/src-self-hosted/clang.zig
@@ -768,6 +768,7 @@ pub extern fn ZigClangFieldDecl_getCanonicalDecl(field_decl: ?*const struct_ZigC
 pub extern fn ZigClangEnumDecl_getCanonicalDecl(self: ?*const struct_ZigClangEnumDecl) ?*const struct_ZigClangTagDecl;
 pub extern fn ZigClangTypedefNameDecl_getCanonicalDecl(self: ?*const struct_ZigClangTypedefNameDecl) ?*const struct_ZigClangTypedefNameDecl;
 pub extern fn ZigClangFunctionDecl_getCanonicalDecl(self: ?*const struct_ZigClangFunctionDecl) ?*const struct_ZigClangFunctionDecl;
+pub extern fn ZigClangParmVarDecl_getOriginalType(self: ?*const struct_ZigClangParmVarDecl) struct_ZigClangQualType;
 pub extern fn ZigClangVarDecl_getCanonicalDecl(self: ?*const struct_ZigClangVarDecl) ?*const struct_ZigClangVarDecl;
 pub extern fn ZigClangVarDecl_getSectionAttribute(self: *const ZigClangVarDecl, len: *usize) ?[*]const u8;
 pub extern fn ZigClangFunctionDecl_getAlignedAttribute(self: *const ZigClangFunctionDecl, *const ZigClangASTContext) c_uint;
diff --git a/src-self-hosted/translate_c.zig b/src-self-hosted/translate_c.zig
index 093acf1083f7e5c6a7bcd7fa3d61452c3e0d4e6a..18c4cafbe3d3e32b898613e99e8da3206be96c9c 100644
--- a/src-self-hosted/translate_c.zig
+++ b/src-self-hosted/translate_c.zig
@@ -485,6 +485,7 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
     block_scope.block_node = block_node;
 
     var it = proto_node.params.iterator(0);
+    var param_id: c_uint = 0;
     while (it.next()) |p| {
         const param = @fieldParentPtr(ast.Node.ParamDecl, "base", p.*);
         const param_name = if (param.name_token) |name_tok|
@@ -498,18 +499,27 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
 
         const mangled_param_name = try block_scope.makeMangledName(c, param_name);
 
+        const c_param = ZigClangFunctionDecl_getParamDecl(fn_decl, param_id);
+        const qual_type = ZigClangParmVarDecl_getOriginalType(c_param);
+        const is_const = ZigClangQualType_isConstQualified(qual_type);
+
         const arg_name = blk: {
-            const bare_arg_name = try std.fmt.allocPrint(c.a(), "arg_{}", .{mangled_param_name});
+            const param_prefix = if (is_const) "" else "arg_";
+            const bare_arg_name = try std.fmt.allocPrint(c.a(), "{}{}", .{param_prefix, mangled_param_name});
             break :blk try block_scope.makeMangledName(c, bare_arg_name);
         };
 
-        const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
-        node.eq_token = try appendToken(c, .Equal, "=");
-        node.init_node = try transCreateNodeIdentifier(c, arg_name);
-        node.semicolon_token = try appendToken(c, .Semicolon, ";");
-        try block_node.statements.push(&node.base);
-        param.name_token = try appendIdentifier(c, arg_name);
-        _ = try appendToken(c, .Colon, ":");
+        if (!is_const) {
+            const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
+            node.eq_token = try appendToken(c, .Equal, "=");
+            node.init_node = try transCreateNodeIdentifier(c, arg_name);
+            node.semicolon_token = try appendToken(c, .Semicolon, ";");
+            try block_node.statements.push(&node.base);
+            param.name_token = try appendIdentifier(c, arg_name);
+            _ = try appendToken(c, .Colon, ":");
+        }
+
+        param_id += 1;
     }
 
     transCompoundStmtInline(rp, &block_scope.base, @ptrCast(*const ZigClangCompoundStmt, body_stmt), block_node) catch |err| switch (err) {
diff --git a/src/zig_clang.cpp b/src/zig_clang.cpp
index 348c85b87ba0579c2421ee7f69d3836ee6df341e..8a1baa2d49f723ce157e9df54e62a2a94eb4b70a 100644
--- a/src/zig_clang.cpp
+++ b/src/zig_clang.cpp
@@ -1625,6 +1625,10 @@ unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionD
     return 0;
 }
 
+ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self) {
+    return bitcast(reinterpret_cast<const clang::ParmVarDecl *>(self)->getOriginalType());
+}
+
 const ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const ZigClangRecordDecl *zig_record_decl) {
     const clang::RecordDecl *record_decl = reinterpret_cast<const clang::RecordDecl *>(zig_record_decl);
     const clang::RecordDecl *definition = record_decl->getDefinition();
diff --git a/src/zig_clang.h b/src/zig_clang.h
index 6f8d786bf6bf51ed418d7f5b65d44a4d43ffe67c..f7de9c2cee37173d121903cc5d1343afd3b97b26 100644
--- a/src/zig_clang.h
+++ b/src/zig_clang.h
@@ -866,6 +866,8 @@ ZIG_EXTERN_C const char* ZigClangVarDecl_getSectionAttribute(const struct ZigCla
 ZIG_EXTERN_C unsigned ZigClangVarDecl_getAlignedAttribute(const struct ZigClangVarDecl *self, const ZigClangASTContext* ctx);
 ZIG_EXTERN_C unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionDecl *self, const ZigClangASTContext* ctx);
 
+ZIG_EXTERN_C struct ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self);
+
 ZIG_EXTERN_C bool ZigClangRecordDecl_getPackedAttribute(const struct ZigClangRecordDecl *);
 ZIG_EXTERN_C const struct ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const struct ZigClangRecordDecl *);
 ZIG_EXTERN_C const struct ZigClangEnumDecl *ZigClangEnumDecl_getDefinition(const struct ZigClangEnumDecl *);
diff --git a/test/translate_c.zig b/test/translate_c.zig
index df2c872bf909d8e02a179d909497b8df9db5cddc..a596ff3eb7bc61610dfc1b8a0d16aad28404ef8d 100644
--- a/test/translate_c.zig
+++ b/test/translate_c.zig
@@ -2615,4 +2615,16 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
         \\    return foo((@intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(c)))) != @intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(b))))));
         \\}
     });
+
+    cases.add("Don't make const parameters mutable",
+        \\int max(const int x, int y) {
+        \\    return (x > y) ? x : y;
+        \\}
+    , &[_][]const u8{
+        \\pub export fn max(x: c_int, arg_y: c_int) c_int {
+        \\    var y = arg_y;
+        \\    return if (x > y) x else y;
+        \\}
+    });
+            
 }
-- 
2.54.0


From 8516ee392c8e1e29b3968a7c9c8812013414004c Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 25 Jan 2020 14:06:46 +0100
Subject: [PATCH 107/116] Fix parsing of DW_AT_Ranges debug entry

Follow the specification about what the base address is and how it can
be changed by some entries in the list itself.
---
 lib/std/debug.zig | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index dd162487b80912344ef67428b530c1fe84dc47ed..e7c296d1723d6ad461cf652e723770e53fa596f1 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -1377,9 +1377,13 @@ pub const DwarfInfo = struct {
             if (compile_unit.pc_range) |range| {
                 if (target_address >= range.start and target_address < range.end) return compile_unit;
             }
-            if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
-                var base_address: usize = 0;
-                if (di.debug_ranges) |debug_ranges| {
+            if (di.debug_ranges) |debug_ranges| {
+                if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
+                    // All the addresses in the list are relative to the value
+                    // specified by DW_AT_low_pc or to some other value encoded
+                    // in the list itself
+                    var base_address = try compile_unit.die.getAttrAddr(DW.AT_low_pc);
+
                     try di.dwarf_seekable_stream.seekTo(debug_ranges.offset + ranges_offset);
                     while (true) {
                         const begin_addr = try di.dwarf_in_stream.readIntLittle(usize);
@@ -1387,18 +1391,21 @@ pub const DwarfInfo = struct {
                         if (begin_addr == 0 and end_addr == 0) {
                             break;
                         }
+                        // This entry selects a new value for the base address
                         if (begin_addr == maxInt(usize)) {
-                            base_address = begin_addr;
+                            base_address = end_addr;
                             continue;
                         }
-                        if (target_address >= begin_addr and target_address < end_addr) {
+                        if (target_address >= base_address + begin_addr and target_address < base_address + end_addr) {
                             return compile_unit;
                         }
                     }
+
+                    return error.InvalidDebugInfo;
+                } else |err| {
+                    if (err != error.MissingDebugInfo) return err;
+                    continue;
                 }
-            } else |err| {
-                if (err != error.MissingDebugInfo) return err;
-                continue;
             }
         }
         return error.MissingDebugInfo;
-- 
2.54.0


From aaa2f9ab2febf9e8be9bb284cd8d5e3f6c2c54f1 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Sat, 25 Jan 2020 23:35:43 +0100
Subject: [PATCH 108/116] Fix handling of DW_LNE_end_sequence

The DWARF specification states that LNE_end_sequence should just reset
the state machine, it's not an error.
---
 lib/std/debug.zig | 30 +++++++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index e7c296d1723d6ad461cf652e723770e53fa596f1..33b062db2385ff7a254c3f03845ec72e2ebf14d6 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -1478,7 +1478,8 @@ pub const DwarfInfo = struct {
 
         assert(line_info_offset < di.debug_line.size);
 
-        try di.dwarf_seekable_stream.seekTo(di.debug_line.offset + line_info_offset);
+        const this_unit_offset = di.debug_line.offset + line_info_offset;
+        try di.dwarf_seekable_stream.seekTo(this_unit_offset);
 
         var is_64: bool = undefined;
         const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
@@ -1546,7 +1547,9 @@ pub const DwarfInfo = struct {
 
         try di.dwarf_seekable_stream.seekTo(prog_start_offset);
 
-        while (true) {
+        const next_unit_pos = this_unit_offset + next_offset;
+
+        while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {
             const opcode = try di.dwarf_in_stream.readByte();
 
             if (opcode == DW.LNS_extended_op) {
@@ -1557,7 +1560,7 @@ pub const DwarfInfo = struct {
                     DW.LNE_end_sequence => {
                         prog.end_sequence = true;
                         if (try prog.checkLineMatch()) |info| return info;
-                        return error.MissingDebugInfo;
+                        prog.reset();
                     },
                     DW.LNE_set_address => {
                         const addr = try di.dwarf_in_stream.readInt(usize, di.endian);
@@ -1814,6 +1817,7 @@ const LineNumberProgram = struct {
     basic_block: bool,
     end_sequence: bool,
 
+    default_is_stmt: bool,
     target_address: usize,
     include_dirs: []const []const u8,
     file_entries: *ArrayList(FileEntry),
@@ -1826,6 +1830,25 @@ const LineNumberProgram = struct {
     prev_basic_block: bool,
     prev_end_sequence: bool,
 
+    // Reset the state machine following the DWARF specification
+    pub fn reset(self: *LineNumberProgram) void {
+        self.address = 0;
+        self.file = 1;
+        self.line = 1;
+        self.column = 0;
+        self.is_stmt = self.default_is_stmt;
+        self.basic_block = false;
+        self.end_sequence = false;
+        // Invalidate all the remaining fields
+        self.prev_address = 0;
+        self.prev_file = undefined;
+        self.prev_line = undefined;
+        self.prev_column = undefined;
+        self.prev_is_stmt = undefined;
+        self.prev_basic_block = undefined;
+        self.prev_end_sequence = undefined;
+    }
+
     pub fn init(is_stmt: bool, include_dirs: []const []const u8, file_entries: *ArrayList(FileEntry), target_address: usize) LineNumberProgram {
         return LineNumberProgram{
             .address = 0,
@@ -1837,6 +1860,7 @@ const LineNumberProgram = struct {
             .end_sequence = false,
             .include_dirs = include_dirs,
             .file_entries = file_entries,
+            .default_is_stmt = is_stmt,
             .target_address = target_address,
             .prev_address = 0,
             .prev_file = undefined,
-- 
2.54.0


From 6aac423964d10f9d884877a158f9604f7547b742 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sat, 25 Jan 2020 21:49:32 -0500
Subject: [PATCH 109/116] split IrInstruction into IrInst, IrInstSrc, IrInstGen

This makes it so that less memory is used for IR instructions, as well
as catching bugs when one expected one kind of instruction and received
the other.
---
 src/all_types.hpp |  2286 +++++---
 src/analyze.cpp   |   155 +-
 src/analyze.hpp   |     5 +-
 src/codegen.cpp   |   881 ++-
 src/ir.cpp        | 13551 +++++++++++++++++++++++---------------------
 src/ir.hpp        |    20 +-
 src/ir_print.cpp  |  3025 ++++++----
 src/ir_print.hpp  |    13 +-
 src/parser.cpp    |     2 +-
 9 files changed, 10978 insertions(+), 8960 deletions(-)

diff --git a/src/all_types.hpp b/src/all_types.hpp
index df52c29a4e11f0acbfde29e7ba9e135fb3f39c4f..ad099cc9b02b60ae38e309fe076e86bf65f72fb2 100644
--- a/src/all_types.hpp
+++ b/src/all_types.hpp
@@ -33,12 +33,15 @@ struct BuiltinFnEntry;
 struct TypeStructField;
 struct CodeGen;
 struct ZigValue;
-struct IrInstruction;
-struct IrInstructionCast;
-struct IrInstructionAllocaGen;
-struct IrInstructionCallGen;
-struct IrInstructionAwaitGen;
-struct IrBasicBlock;
+struct IrInst;
+struct IrInstSrc;
+struct IrInstGen;
+struct IrInstGenCast;
+struct IrInstGenAlloca;
+struct IrInstGenCall;
+struct IrInstGenAwait;
+struct IrBasicBlockSrc;
+struct IrBasicBlockGen;
 struct ScopeDecls;
 struct ZigWindowsSDK;
 struct Tld;
@@ -50,6 +53,7 @@ struct ResultLocPeerParent;
 struct ResultLocBitCast;
 struct ResultLocCast;
 struct ResultLocReturn;
+struct IrExecutableGen;
 
 enum PtrLen {
     PtrLenUnknown,
@@ -97,8 +101,8 @@ enum X64CABIClass {
     X64CABIClass_SSE,
 };
 
-struct IrExecutable {
-    ZigList<IrBasicBlock *> basic_block_list;
+struct IrExecutableSrc {
+    ZigList<IrBasicBlockSrc *> basic_block_list;
     Buf *name;
     ZigFn *name_fn;
     size_t mem_slot_count;
@@ -108,8 +112,7 @@ struct IrExecutable {
     ZigFn *fn_entry;
     Buf *c_import_buf;
     AstNode *source_node;
-    IrExecutable *parent_exec;
-    IrExecutable *source_exec;
+    IrExecutableGen *parent_exec;
     IrAnalyze *analysis;
     Scope *begin_scope;
     ErrorMsg *first_err_trace_msg;
@@ -124,6 +127,32 @@ struct IrExecutable {
     void src();
 };
 
+struct IrExecutableGen {
+    ZigList<IrBasicBlockGen *> basic_block_list;
+    Buf *name;
+    ZigFn *name_fn;
+    size_t mem_slot_count;
+    size_t next_debug_id;
+    size_t *backward_branch_count;
+    size_t *backward_branch_quota;
+    ZigFn *fn_entry;
+    Buf *c_import_buf;
+    AstNode *source_node;
+    IrExecutableGen *parent_exec;
+    IrExecutableSrc *source_exec;
+    Scope *begin_scope;
+    ErrorMsg *first_err_trace_msg;
+    ZigList<Tld *> tld_list;
+
+    bool is_inline;
+    bool is_generic_instantiation;
+    bool need_err_code_spill;
+
+    // This is a function for use in the debugger to print
+    // the source location.
+    void src();
+};
+
 enum OutType {
     OutTypeUnknown,
     OutTypeExe,
@@ -287,7 +316,7 @@ struct ConstErrValue {
 
 struct ConstBoundFnValue {
     ZigFn *fn;
-    IrInstruction *first_arg;
+    IrInstGen *first_arg;
 };
 
 struct ConstArgTuple {
@@ -350,14 +379,14 @@ struct LazyValueAlignOf {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *target_type;
+    IrInstGen *target_type;
 };
 
 struct LazyValueSizeOf {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *target_type;
+    IrInstGen *target_type;
 
     bool bit_size;
 };
@@ -366,9 +395,9 @@ struct LazyValueSliceType {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *sentinel; // can be null
-    IrInstruction *elem_type;
-    IrInstruction *align_inst; // can be null
+    IrInstGen *sentinel; // can be null
+    IrInstGen *elem_type;
+    IrInstGen *align_inst; // can be null
 
     bool is_const;
     bool is_volatile;
@@ -379,8 +408,8 @@ struct LazyValueArrayType {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *sentinel; // can be null
-    IrInstruction *elem_type;
+    IrInstGen *sentinel; // can be null
+    IrInstGen *elem_type;
     uint64_t length;
 };
 
@@ -388,9 +417,9 @@ struct LazyValuePtrType {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *sentinel; // can be null
-    IrInstruction *elem_type;
-    IrInstruction *align_inst; // can be null
+    IrInstGen *sentinel; // can be null
+    IrInstGen *elem_type;
+    IrInstGen *align_inst; // can be null
 
     PtrLen ptr_len;
     uint32_t bit_offset_in_host;
@@ -405,7 +434,7 @@ struct LazyValueOptType {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *payload_type;
+    IrInstGen *payload_type;
 };
 
 struct LazyValueFnType {
@@ -413,9 +442,9 @@ struct LazyValueFnType {
 
     IrAnalyze *ira;
     AstNode *proto_node;
-    IrInstruction **param_types;
-    IrInstruction *align_inst; // can be null
-    IrInstruction *return_type;
+    IrInstGen **param_types;
+    IrInstGen *align_inst; // can be null
+    IrInstGen *return_type;
 
     CallingConvention cc;
     bool is_generic;
@@ -425,8 +454,8 @@ struct LazyValueErrUnionType {
     LazyValue base;
 
     IrAnalyze *ira;
-    IrInstruction *err_set_type;
-    IrInstruction *payload_type;
+    IrInstGen *err_set_type;
+    IrInstGen *payload_type;
     Buf *type_name;
 };
 
@@ -1602,19 +1631,19 @@ struct ZigFn {
     // in the case of async functions this is the implicit return type according to the
     // zig source code, not according to zig ir
     ZigType *src_implicit_return_type;
-    IrExecutable *ir_executable;
-    IrExecutable analyzed_executable;
+    IrExecutableSrc *ir_executable;
+    IrExecutableGen analyzed_executable;
     size_t prealloc_bbc;
     size_t prealloc_backward_branch_quota;
     AstNode **param_source_nodes;
     Buf **param_names;
-    IrInstruction *err_code_spill;
+    IrInstGen *err_code_spill;
     AstNode *assumed_non_async;
 
     AstNode *fn_no_inline_set_node;
     AstNode *fn_static_eval_set_node;
 
-    ZigList<IrInstructionAllocaGen *> alloca_gen_list;
+    ZigList<IrInstGenAlloca *> alloca_gen_list;
     ZigList<ZigVar *> variable_list;
 
     Buf *section_name;
@@ -1626,8 +1655,8 @@ struct ZigFn {
     AstNode *non_async_node;
 
     ZigList<GlobalExport> export_list;
-    ZigList<IrInstructionCallGen *> call_list;
-    ZigList<IrInstructionAwaitGen *> await_list;
+    ZigList<IrInstGenCall *> call_list;
+    ZigList<IrInstGenAwait *> await_list;
 
     LLVMValueRef valgrind_client_request_array;
 
@@ -2098,8 +2127,9 @@ struct CodeGen {
     Buf *zig_c_headers_dir; // Cannot be overridden; derived from zig_lib_dir.
     Buf *zig_std_special_dir; // Cannot be overridden; derived from zig_lib_dir.
 
-    IrInstruction *invalid_instruction;
-    IrInstruction *unreach_instruction;
+    IrInstSrc *invalid_inst_src;
+    IrInstGen *invalid_inst_gen;
+    IrInstGen *unreach_instruction;
 
     ZigValue panic_msg_vals[PanicMsgIdCount];
 
@@ -2222,8 +2252,8 @@ struct ZigVar {
     ZigValue *const_value;
     ZigType *var_type;
     LLVMValueRef value_ref;
-    IrInstruction *is_comptime;
-    IrInstruction *ptr_instruction;
+    IrInstSrc *is_comptime;
+    IrInstGen *ptr_instruction;
     // which node is the declaration of the variable
     AstNode *decl_node;
     ZigLLVMDILocalVariable *di_loc_var;
@@ -2232,7 +2262,7 @@ struct ZigVar {
     Scope *child_scope;
     LLVMValueRef param_value_ref;
     size_t mem_slot_index;
-    IrExecutable *owner_exec;
+    IrExecutableSrc *owner_exec;
 
     Buf *section_name;
 
@@ -2323,11 +2353,11 @@ struct ScopeBlock {
     Scope base;
 
     Buf *name;
-    IrBasicBlock *end_block;
-    IrInstruction *is_comptime;
+    IrBasicBlockSrc *end_block;
+    IrInstSrc *is_comptime;
     ResultLocPeerParent *peer_parent;
-    ZigList<IrInstruction *> *incoming_values;
-    ZigList<IrBasicBlock *> *incoming_blocks;
+    ZigList<IrInstSrc *> *incoming_values;
+    ZigList<IrBasicBlockSrc *> *incoming_blocks;
 
     AstNode *safety_set_node;
     AstNode *fast_math_set_node;
@@ -2378,11 +2408,11 @@ struct ScopeLoop {
 
     LVal lval;
     Buf *name;
-    IrBasicBlock *break_block;
-    IrBasicBlock *continue_block;
-    IrInstruction *is_comptime;
-    ZigList<IrInstruction *> *incoming_values;
-    ZigList<IrBasicBlock *> *incoming_blocks;
+    IrBasicBlockSrc *break_block;
+    IrBasicBlockSrc *continue_block;
+    IrInstSrc *is_comptime;
+    ZigList<IrInstSrc *> *incoming_values;
+    ZigList<IrBasicBlockSrc *> *incoming_blocks;
     ResultLocPeerParent *peer_parent;
     ScopeExpr *spill_scope;
 };
@@ -2393,7 +2423,7 @@ struct ScopeLoop {
 struct ScopeRuntime {
     Scope base;
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
 };
 
 // This scope is created for a suspend block in order to have labeled
@@ -2472,319 +2502,450 @@ enum AtomicRmwOp {
 // to another basic block.
 // Phi instructions must be first in a basic block.
 // The last instruction in a basic block must be of type unreachable.
-struct IrBasicBlock {
-    ZigList<IrInstruction *> instruction_list;
-    IrBasicBlock *other;
+struct IrBasicBlockSrc {
+    ZigList<IrInstSrc *> instruction_list;
+    IrBasicBlockGen *child;
     Scope *scope;
     const char *name_hint;
-    size_t debug_id;
-    size_t ref_count;
-    // index into the basic block list
-    size_t index;
+    IrInst *suspend_instruction_ref;
+
+    uint32_t ref_count;
+    uint32_t index; // index into the basic block list
+
+    uint32_t debug_id;
+    bool suspended;
+    bool in_resume_stack;
+};
+
+struct IrBasicBlockGen {
+    ZigList<IrInstGen *> instruction_list;
+    IrBasicBlockSrc *parent;
+    Scope *scope;
+    const char *name_hint;
+    uint32_t index; // index into the basic block list
+    uint32_t ref_count;
     LLVMBasicBlockRef llvm_block;
     LLVMBasicBlockRef llvm_exit_block;
     // The instruction that referenced this basic block and caused us to
     // analyze the basic block. If the same instruction wants us to emit
     // the same basic block, then we re-generate it instead of saving it.
-    IrInstruction *ref_instruction;
+    IrInst *ref_instruction;
     // When this is non-null, a branch to this basic block is only allowed
     // if the branch is comptime. The instruction points to the reason
     // the basic block must be comptime.
-    IrInstruction *must_be_comptime_source_instr;
-    IrInstruction *suspend_instruction_ref;
+    IrInst *must_be_comptime_source_instr;
+
+    uint32_t debug_id;
     bool already_appended;
-    bool suspended;
-    bool in_resume_stack;
 };
 
-// These instructions are in transition to having "pass 1" instructions
-// and "pass 2" instructions. The pass 1 instructions are suffixed with Src
-// and pass 2 are suffixed with Gen.
-// Once all instructions are separated in this way, they'll have different
-// base types for better type safety.
 // Src instructions are generated by ir_gen_* functions in ir.cpp from AST.
 // ir_analyze_* functions consume Src instructions and produce Gen instructions.
+// Src instructions do not have type information; Gen instructions do.
+enum IrInstSrcId {
+    IrInstSrcIdInvalid,
+    IrInstSrcIdDeclVar,
+    IrInstSrcIdBr,
+    IrInstSrcIdCondBr,
+    IrInstSrcIdSwitchBr,
+    IrInstSrcIdSwitchVar,
+    IrInstSrcIdSwitchElseVar,
+    IrInstSrcIdSwitchTarget,
+    IrInstSrcIdPhi,
+    IrInstSrcIdUnOp,
+    IrInstSrcIdBinOp,
+    IrInstSrcIdMergeErrSets,
+    IrInstSrcIdLoadPtr,
+    IrInstSrcIdStorePtr,
+    IrInstSrcIdFieldPtr,
+    IrInstSrcIdElemPtr,
+    IrInstSrcIdVarPtr,
+    IrInstSrcIdCall,
+    IrInstSrcIdCallArgs,
+    IrInstSrcIdCallExtra,
+    IrInstSrcIdConst,
+    IrInstSrcIdReturn,
+    IrInstSrcIdContainerInitList,
+    IrInstSrcIdContainerInitFields,
+    IrInstSrcIdUnreachable,
+    IrInstSrcIdTypeOf,
+    IrInstSrcIdSetCold,
+    IrInstSrcIdSetRuntimeSafety,
+    IrInstSrcIdSetFloatMode,
+    IrInstSrcIdArrayType,
+    IrInstSrcIdAnyFrameType,
+    IrInstSrcIdSliceType,
+    IrInstSrcIdAsm,
+    IrInstSrcIdSizeOf,
+    IrInstSrcIdTestNonNull,
+    IrInstSrcIdOptionalUnwrapPtr,
+    IrInstSrcIdClz,
+    IrInstSrcIdCtz,
+    IrInstSrcIdPopCount,
+    IrInstSrcIdBswap,
+    IrInstSrcIdBitReverse,
+    IrInstSrcIdImport,
+    IrInstSrcIdCImport,
+    IrInstSrcIdCInclude,
+    IrInstSrcIdCDefine,
+    IrInstSrcIdCUndef,
+    IrInstSrcIdRef,
+    IrInstSrcIdCompileErr,
+    IrInstSrcIdCompileLog,
+    IrInstSrcIdErrName,
+    IrInstSrcIdEmbedFile,
+    IrInstSrcIdCmpxchg,
+    IrInstSrcIdFence,
+    IrInstSrcIdTruncate,
+    IrInstSrcIdIntCast,
+    IrInstSrcIdFloatCast,
+    IrInstSrcIdIntToFloat,
+    IrInstSrcIdFloatToInt,
+    IrInstSrcIdBoolToInt,
+    IrInstSrcIdIntType,
+    IrInstSrcIdVectorType,
+    IrInstSrcIdShuffleVector,
+    IrInstSrcIdSplat,
+    IrInstSrcIdBoolNot,
+    IrInstSrcIdMemset,
+    IrInstSrcIdMemcpy,
+    IrInstSrcIdSlice,
+    IrInstSrcIdMemberCount,
+    IrInstSrcIdMemberType,
+    IrInstSrcIdMemberName,
+    IrInstSrcIdBreakpoint,
+    IrInstSrcIdReturnAddress,
+    IrInstSrcIdFrameAddress,
+    IrInstSrcIdFrameHandle,
+    IrInstSrcIdFrameType,
+    IrInstSrcIdFrameSize,
+    IrInstSrcIdAlignOf,
+    IrInstSrcIdOverflowOp,
+    IrInstSrcIdTestErr,
+    IrInstSrcIdMulAdd,
+    IrInstSrcIdFloatOp,
+    IrInstSrcIdUnwrapErrCode,
+    IrInstSrcIdUnwrapErrPayload,
+    IrInstSrcIdFnProto,
+    IrInstSrcIdTestComptime,
+    IrInstSrcIdPtrCast,
+    IrInstSrcIdBitCast,
+    IrInstSrcIdIntToPtr,
+    IrInstSrcIdPtrToInt,
+    IrInstSrcIdIntToEnum,
+    IrInstSrcIdEnumToInt,
+    IrInstSrcIdIntToErr,
+    IrInstSrcIdErrToInt,
+    IrInstSrcIdCheckSwitchProngs,
+    IrInstSrcIdCheckStatementIsVoid,
+    IrInstSrcIdTypeName,
+    IrInstSrcIdDeclRef,
+    IrInstSrcIdPanic,
+    IrInstSrcIdTagName,
+    IrInstSrcIdTagType,
+    IrInstSrcIdFieldParentPtr,
+    IrInstSrcIdByteOffsetOf,
+    IrInstSrcIdBitOffsetOf,
+    IrInstSrcIdTypeInfo,
+    IrInstSrcIdType,
+    IrInstSrcIdHasField,
+    IrInstSrcIdTypeId,
+    IrInstSrcIdSetEvalBranchQuota,
+    IrInstSrcIdPtrType,
+    IrInstSrcIdAlignCast,
+    IrInstSrcIdImplicitCast,
+    IrInstSrcIdResolveResult,
+    IrInstSrcIdResetResult,
+    IrInstSrcIdOpaqueType,
+    IrInstSrcIdSetAlignStack,
+    IrInstSrcIdArgType,
+    IrInstSrcIdExport,
+    IrInstSrcIdErrorReturnTrace,
+    IrInstSrcIdErrorUnion,
+    IrInstSrcIdAtomicRmw,
+    IrInstSrcIdAtomicLoad,
+    IrInstSrcIdAtomicStore,
+    IrInstSrcIdSaveErrRetAddr,
+    IrInstSrcIdAddImplicitReturnType,
+    IrInstSrcIdErrSetCast,
+    IrInstSrcIdToBytes,
+    IrInstSrcIdFromBytes,
+    IrInstSrcIdCheckRuntimeScope,
+    IrInstSrcIdHasDecl,
+    IrInstSrcIdUndeclaredIdent,
+    IrInstSrcIdAlloca,
+    IrInstSrcIdEndExpr,
+    IrInstSrcIdUnionInitNamedField,
+    IrInstSrcIdSuspendBegin,
+    IrInstSrcIdSuspendFinish,
+    IrInstSrcIdAwait,
+    IrInstSrcIdResume,
+    IrInstSrcIdSpillBegin,
+    IrInstSrcIdSpillEnd,
+};
+
 // ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.
 // Src instructions do not have type information; Gen instructions do.
-enum IrInstructionId {
-    IrInstructionIdInvalid,
-    IrInstructionIdDeclVarSrc,
-    IrInstructionIdDeclVarGen,
-    IrInstructionIdBr,
-    IrInstructionIdCondBr,
-    IrInstructionIdSwitchBr,
-    IrInstructionIdSwitchVar,
-    IrInstructionIdSwitchElseVar,
-    IrInstructionIdSwitchTarget,
-    IrInstructionIdPhi,
-    IrInstructionIdUnOp,
-    IrInstructionIdBinOp,
-    IrInstructionIdMergeErrSets,
-    IrInstructionIdLoadPtr,
-    IrInstructionIdLoadPtrGen,
-    IrInstructionIdStorePtr,
-    IrInstructionIdVectorStoreElem,
-    IrInstructionIdFieldPtr,
-    IrInstructionIdStructFieldPtr,
-    IrInstructionIdUnionFieldPtr,
-    IrInstructionIdElemPtr,
-    IrInstructionIdVarPtr,
-    IrInstructionIdReturnPtr,
-    IrInstructionIdCallSrc,
-    IrInstructionIdCallSrcArgs,
-    IrInstructionIdCallExtra,
-    IrInstructionIdCallGen,
-    IrInstructionIdConst,
-    IrInstructionIdReturn,
-    IrInstructionIdCast,
-    IrInstructionIdResizeSlice,
-    IrInstructionIdContainerInitList,
-    IrInstructionIdContainerInitFields,
-    IrInstructionIdUnreachable,
-    IrInstructionIdTypeOf,
-    IrInstructionIdSetCold,
-    IrInstructionIdSetRuntimeSafety,
-    IrInstructionIdSetFloatMode,
-    IrInstructionIdArrayType,
-    IrInstructionIdAnyFrameType,
-    IrInstructionIdSliceType,
-    IrInstructionIdAsmSrc,
-    IrInstructionIdAsmGen,
-    IrInstructionIdSizeOf,
-    IrInstructionIdTestNonNull,
-    IrInstructionIdOptionalUnwrapPtr,
-    IrInstructionIdOptionalWrap,
-    IrInstructionIdUnionTag,
-    IrInstructionIdClz,
-    IrInstructionIdCtz,
-    IrInstructionIdPopCount,
-    IrInstructionIdBswap,
-    IrInstructionIdBitReverse,
-    IrInstructionIdImport,
-    IrInstructionIdCImport,
-    IrInstructionIdCInclude,
-    IrInstructionIdCDefine,
-    IrInstructionIdCUndef,
-    IrInstructionIdRef,
-    IrInstructionIdRefGen,
-    IrInstructionIdCompileErr,
-    IrInstructionIdCompileLog,
-    IrInstructionIdErrName,
-    IrInstructionIdEmbedFile,
-    IrInstructionIdCmpxchgSrc,
-    IrInstructionIdCmpxchgGen,
-    IrInstructionIdFence,
-    IrInstructionIdTruncate,
-    IrInstructionIdIntCast,
-    IrInstructionIdFloatCast,
-    IrInstructionIdIntToFloat,
-    IrInstructionIdFloatToInt,
-    IrInstructionIdBoolToInt,
-    IrInstructionIdIntType,
-    IrInstructionIdVectorType,
-    IrInstructionIdShuffleVector,
-    IrInstructionIdSplatSrc,
-    IrInstructionIdSplatGen,
-    IrInstructionIdBoolNot,
-    IrInstructionIdMemset,
-    IrInstructionIdMemcpy,
-    IrInstructionIdSliceSrc,
-    IrInstructionIdSliceGen,
-    IrInstructionIdMemberCount,
-    IrInstructionIdMemberType,
-    IrInstructionIdMemberName,
-    IrInstructionIdBreakpoint,
-    IrInstructionIdReturnAddress,
-    IrInstructionIdFrameAddress,
-    IrInstructionIdFrameHandle,
-    IrInstructionIdFrameType,
-    IrInstructionIdFrameSizeSrc,
-    IrInstructionIdFrameSizeGen,
-    IrInstructionIdAlignOf,
-    IrInstructionIdOverflowOp,
-    IrInstructionIdTestErrSrc,
-    IrInstructionIdTestErrGen,
-    IrInstructionIdMulAdd,
-    IrInstructionIdFloatOp,
-    IrInstructionIdUnwrapErrCode,
-    IrInstructionIdUnwrapErrPayload,
-    IrInstructionIdErrWrapCode,
-    IrInstructionIdErrWrapPayload,
-    IrInstructionIdFnProto,
-    IrInstructionIdTestComptime,
-    IrInstructionIdPtrCastSrc,
-    IrInstructionIdPtrCastGen,
-    IrInstructionIdBitCastSrc,
-    IrInstructionIdBitCastGen,
-    IrInstructionIdWidenOrShorten,
-    IrInstructionIdIntToPtr,
-    IrInstructionIdPtrToInt,
-    IrInstructionIdIntToEnum,
-    IrInstructionIdEnumToInt,
-    IrInstructionIdIntToErr,
-    IrInstructionIdErrToInt,
-    IrInstructionIdCheckSwitchProngs,
-    IrInstructionIdCheckStatementIsVoid,
-    IrInstructionIdTypeName,
-    IrInstructionIdDeclRef,
-    IrInstructionIdPanic,
-    IrInstructionIdTagName,
-    IrInstructionIdTagType,
-    IrInstructionIdFieldParentPtr,
-    IrInstructionIdByteOffsetOf,
-    IrInstructionIdBitOffsetOf,
-    IrInstructionIdTypeInfo,
-    IrInstructionIdType,
-    IrInstructionIdHasField,
-    IrInstructionIdTypeId,
-    IrInstructionIdSetEvalBranchQuota,
-    IrInstructionIdPtrType,
-    IrInstructionIdAlignCast,
-    IrInstructionIdImplicitCast,
-    IrInstructionIdResolveResult,
-    IrInstructionIdResetResult,
-    IrInstructionIdOpaqueType,
-    IrInstructionIdSetAlignStack,
-    IrInstructionIdArgType,
-    IrInstructionIdExport,
-    IrInstructionIdErrorReturnTrace,
-    IrInstructionIdErrorUnion,
-    IrInstructionIdAtomicRmw,
-    IrInstructionIdAtomicLoad,
-    IrInstructionIdAtomicStore,
-    IrInstructionIdSaveErrRetAddr,
-    IrInstructionIdAddImplicitReturnType,
-    IrInstructionIdErrSetCast,
-    IrInstructionIdToBytes,
-    IrInstructionIdFromBytes,
-    IrInstructionIdCheckRuntimeScope,
-    IrInstructionIdVectorToArray,
-    IrInstructionIdArrayToVector,
-    IrInstructionIdAssertZero,
-    IrInstructionIdAssertNonNull,
-    IrInstructionIdHasDecl,
-    IrInstructionIdUndeclaredIdent,
-    IrInstructionIdAllocaSrc,
-    IrInstructionIdAllocaGen,
-    IrInstructionIdEndExpr,
-    IrInstructionIdPtrOfArrayToSlice,
-    IrInstructionIdUnionInitNamedField,
-    IrInstructionIdSuspendBegin,
-    IrInstructionIdSuspendFinish,
-    IrInstructionIdAwaitSrc,
-    IrInstructionIdAwaitGen,
-    IrInstructionIdResume,
-    IrInstructionIdSpillBegin,
-    IrInstructionIdSpillEnd,
-    IrInstructionIdVectorExtractElem,
+enum IrInstGenId {
+    IrInstGenIdInvalid,
+    IrInstGenIdDeclVar,
+    IrInstGenIdBr,
+    IrInstGenIdCondBr,
+    IrInstGenIdSwitchBr,
+    IrInstGenIdPhi,
+    IrInstGenIdBinaryNot,
+    IrInstGenIdNegation,
+    IrInstGenIdNegationWrapping,
+    IrInstGenIdBinOp,
+    IrInstGenIdLoadPtr,
+    IrInstGenIdStorePtr,
+    IrInstGenIdVectorStoreElem,
+    IrInstGenIdStructFieldPtr,
+    IrInstGenIdUnionFieldPtr,
+    IrInstGenIdElemPtr,
+    IrInstGenIdVarPtr,
+    IrInstGenIdReturnPtr,
+    IrInstGenIdCall,
+    IrInstGenIdReturn,
+    IrInstGenIdCast,
+    IrInstGenIdResizeSlice,
+    IrInstGenIdUnreachable,
+    IrInstGenIdAsm,
+    IrInstGenIdTestNonNull,
+    IrInstGenIdOptionalUnwrapPtr,
+    IrInstGenIdOptionalWrap,
+    IrInstGenIdUnionTag,
+    IrInstGenIdClz,
+    IrInstGenIdCtz,
+    IrInstGenIdPopCount,
+    IrInstGenIdBswap,
+    IrInstGenIdBitReverse,
+    IrInstGenIdRef,
+    IrInstGenIdErrName,
+    IrInstGenIdCmpxchg,
+    IrInstGenIdFence,
+    IrInstGenIdTruncate,
+    IrInstGenIdShuffleVector,
+    IrInstGenIdSplat,
+    IrInstGenIdBoolNot,
+    IrInstGenIdMemset,
+    IrInstGenIdMemcpy,
+    IrInstGenIdSlice,
+    IrInstGenIdBreakpoint,
+    IrInstGenIdReturnAddress,
+    IrInstGenIdFrameAddress,
+    IrInstGenIdFrameHandle,
+    IrInstGenIdFrameSize,
+    IrInstGenIdOverflowOp,
+    IrInstGenIdTestErr,
+    IrInstGenIdMulAdd,
+    IrInstGenIdFloatOp,
+    IrInstGenIdUnwrapErrCode,
+    IrInstGenIdUnwrapErrPayload,
+    IrInstGenIdErrWrapCode,
+    IrInstGenIdErrWrapPayload,
+    IrInstGenIdPtrCast,
+    IrInstGenIdBitCast,
+    IrInstGenIdWidenOrShorten,
+    IrInstGenIdIntToPtr,
+    IrInstGenIdPtrToInt,
+    IrInstGenIdIntToEnum,
+    IrInstGenIdIntToErr,
+    IrInstGenIdErrToInt,
+    IrInstGenIdPanic,
+    IrInstGenIdTagName,
+    IrInstGenIdFieldParentPtr,
+    IrInstGenIdAlignCast,
+    IrInstGenIdErrorReturnTrace,
+    IrInstGenIdAtomicRmw,
+    IrInstGenIdAtomicLoad,
+    IrInstGenIdAtomicStore,
+    IrInstGenIdSaveErrRetAddr,
+    IrInstGenIdVectorToArray,
+    IrInstGenIdArrayToVector,
+    IrInstGenIdAssertZero,
+    IrInstGenIdAssertNonNull,
+    IrInstGenIdPtrOfArrayToSlice,
+    IrInstGenIdSuspendBegin,
+    IrInstGenIdSuspendFinish,
+    IrInstGenIdAwait,
+    IrInstGenIdResume,
+    IrInstGenIdSpillBegin,
+    IrInstGenIdSpillEnd,
+    IrInstGenIdVectorExtractElem,
+    IrInstGenIdAlloca,
+    IrInstGenIdConst,
 };
 
-struct IrInstruction {
-    Scope *scope;
-    AstNode *source_node;
-    LLVMValueRef llvm_value;
-    ZigValue *value;
-    uint32_t debug_id;
+// Common fields between IrInstSrc and IrInstGen. This allows future passes
+// after pass2 to be added to zig.
+struct IrInst {
     // if ref_count is zero and the instruction has no side effects,
     // the instruction can be omitted in codegen
     uint32_t ref_count;
+    uint32_t debug_id;
+
+    Scope *scope;
+    AstNode *source_node;
+
+    // for debugging purposes, these are useful to call to inspect the instruction
+    void dump();
+    void src();
+};
+
+struct IrInstSrc {
+    IrInst base;
+
+    IrInstSrcId id;
+    // true if this instruction was generated by zig and not from user code
+    // this matters for the "unreachable code" compile error
+    bool is_gen;
+    bool is_noreturn;
+
     // When analyzing IR, instructions that point to this instruction in the "old ir"
     // can find the instruction that corresponds to this value in the "new ir"
     // with this child field.
-    IrInstruction *child;
-    IrBasicBlock *owner_bb;
+    IrInstGen *child;
+    IrBasicBlockSrc *owner_bb;
+
+    // for debugging purposes, these are useful to call to inspect the instruction
+    void dump();
+    void src();
+};
+
+struct IrInstGen {
+    IrInst base;
+
+    IrInstGenId id;
+
+    LLVMValueRef llvm_value;
+    ZigValue *value;
+    IrBasicBlockGen *owner_bb;
     // Nearly any instruction can have to be stored as a local variable before suspending
     // and then loaded after resuming, in case there is an expression with a suspend point
     // in it, such as: x + await y
-    IrInstruction *spill;
-    IrInstructionId id;
-    // true if this instruction was generated by zig and not from user code
-    bool is_gen;
+    IrInstGen *spill;
 
     // for debugging purposes, these are useful to call to inspect the instruction
     void dump();
     void src();
 };
 
-struct IrInstructionDeclVarSrc {
-    IrInstruction base;
+struct IrInstSrcDeclVar {
+    IrInstSrc base;
 
     ZigVar *var;
-    IrInstruction *var_type;
-    IrInstruction *align_value;
-    IrInstruction *ptr;
+    IrInstSrc *var_type;
+    IrInstSrc *align_value;
+    IrInstSrc *ptr;
 };
 
-struct IrInstructionDeclVarGen {
-    IrInstruction base;
+struct IrInstGenDeclVar {
+    IrInstGen base;
 
     ZigVar *var;
-    IrInstruction *var_ptr;
+    IrInstGen *var_ptr;
 };
 
-struct IrInstructionCondBr {
-    IrInstruction base;
+struct IrInstSrcCondBr {
+    IrInstSrc base;
 
-    IrInstruction *condition;
-    IrBasicBlock *then_block;
-    IrBasicBlock *else_block;
-    IrInstruction *is_comptime;
+    IrInstSrc *condition;
+    IrBasicBlockSrc *then_block;
+    IrBasicBlockSrc *else_block;
+    IrInstSrc *is_comptime;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionBr {
-    IrInstruction base;
+struct IrInstGenCondBr {
+    IrInstGen base;
 
-    IrBasicBlock *dest_block;
-    IrInstruction *is_comptime;
+    IrInstGen *condition;
+    IrBasicBlockGen *then_block;
+    IrBasicBlockGen *else_block;
 };
 
-struct IrInstructionSwitchBrCase {
-    IrInstruction *value;
-    IrBasicBlock *block;
+struct IrInstSrcBr {
+    IrInstSrc base;
+
+    IrBasicBlockSrc *dest_block;
+    IrInstSrc *is_comptime;
+};
+
+struct IrInstGenBr {
+    IrInstGen base;
+
+    IrBasicBlockGen *dest_block;
+};
+
+struct IrInstSrcSwitchBrCase {
+    IrInstSrc *value;
+    IrBasicBlockSrc *block;
+};
+
+struct IrInstSrcSwitchBr {
+    IrInstSrc base;
+
+    IrInstSrc *target_value;
+    IrBasicBlockSrc *else_block;
+    size_t case_count;
+    IrInstSrcSwitchBrCase *cases;
+    IrInstSrc *is_comptime;
+    IrInstSrc *switch_prongs_void;
+};
+
+struct IrInstGenSwitchBrCase {
+    IrInstGen *value;
+    IrBasicBlockGen *block;
 };
 
-struct IrInstructionSwitchBr {
-    IrInstruction base;
+struct IrInstGenSwitchBr {
+    IrInstGen base;
 
-    IrInstruction *target_value;
-    IrBasicBlock *else_block;
+    IrInstGen *target_value;
+    IrBasicBlockGen *else_block;
     size_t case_count;
-    IrInstructionSwitchBrCase *cases;
-    IrInstruction *is_comptime;
-    IrInstruction *switch_prongs_void;
+    IrInstGenSwitchBrCase *cases;
 };
 
-struct IrInstructionSwitchVar {
-    IrInstruction base;
+struct IrInstSrcSwitchVar {
+    IrInstSrc base;
 
-    IrInstruction *target_value_ptr;
-    IrInstruction **prongs_ptr;
+    IrInstSrc *target_value_ptr;
+    IrInstSrc **prongs_ptr;
     size_t prongs_len;
 };
 
-struct IrInstructionSwitchElseVar {
-    IrInstruction base;
+struct IrInstSrcSwitchElseVar {
+    IrInstSrc base;
 
-    IrInstruction *target_value_ptr;
-    IrInstructionSwitchBr *switch_br;
+    IrInstSrc *target_value_ptr;
+    IrInstSrcSwitchBr *switch_br;
 };
 
-struct IrInstructionSwitchTarget {
-    IrInstruction base;
+struct IrInstSrcSwitchTarget {
+    IrInstSrc base;
 
-    IrInstruction *target_value_ptr;
+    IrInstSrc *target_value_ptr;
 };
 
-struct IrInstructionPhi {
-    IrInstruction base;
+struct IrInstSrcPhi {
+    IrInstSrc base;
 
     size_t incoming_count;
-    IrBasicBlock **incoming_blocks;
-    IrInstruction **incoming_values;
+    IrBasicBlockSrc **incoming_blocks;
+    IrInstSrc **incoming_values;
     ResultLocPeerParent *peer_parent;
 };
 
+struct IrInstGenPhi {
+    IrInstGen base;
+
+    size_t incoming_count;
+    IrBasicBlockGen **incoming_blocks;
+    IrInstGen **incoming_values;
+};
+
 enum IrUnOp {
     IrUnOpInvalid,
     IrUnOpBinNot,
@@ -2794,15 +2955,30 @@ enum IrUnOp {
     IrUnOpOptional,
 };
 
-struct IrInstructionUnOp {
-    IrInstruction base;
+struct IrInstSrcUnOp {
+    IrInstSrc base;
 
     IrUnOp op_id;
     LVal lval;
-    IrInstruction *value;
+    IrInstSrc *value;
     ResultLoc *result_loc;
 };
 
+struct IrInstGenBinaryNot {
+    IrInstGen base;
+    IrInstGen *operand;
+};
+
+struct IrInstGenNegation {
+    IrInstGen base;
+    IrInstGen *operand;
+};
+
+struct IrInstGenNegationWrapping {
+    IrInstGen base;
+    IrInstGen *operand;
+};
+
 enum IrBinOp {
     IrBinOpInvalid,
     IrBinOpBoolOr,
@@ -2837,113 +3013,144 @@ enum IrBinOp {
     IrBinOpArrayMult,
 };
 
-struct IrInstructionBinOp {
-    IrInstruction base;
+struct IrInstSrcBinOp {
+    IrInstSrc base;
 
-    IrInstruction *op1;
-    IrInstruction *op2;
+    IrInstSrc *op1;
+    IrInstSrc *op2;
     IrBinOp op_id;
     bool safety_check_on;
 };
 
-struct IrInstructionMergeErrSets {
-    IrInstruction base;
+struct IrInstGenBinOp {
+    IrInstGen base;
 
-    IrInstruction *op1;
-    IrInstruction *op2;
+    IrInstGen *op1;
+    IrInstGen *op2;
+    IrBinOp op_id;
+    bool safety_check_on;
+};
+
+struct IrInstSrcMergeErrSets {
+    IrInstSrc base;
+
+    IrInstSrc *op1;
+    IrInstSrc *op2;
     Buf *type_name;
 };
 
-struct IrInstructionLoadPtr {
-    IrInstruction base;
+struct IrInstSrcLoadPtr {
+    IrInstSrc base;
 
-    IrInstruction *ptr;
+    IrInstSrc *ptr;
 };
 
-struct IrInstructionLoadPtrGen {
-    IrInstruction base;
+struct IrInstGenLoadPtr {
+    IrInstGen base;
 
-    IrInstruction *ptr;
-    IrInstruction *result_loc;
+    IrInstGen *ptr;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionStorePtr {
-    IrInstruction base;
+struct IrInstSrcStorePtr {
+    IrInstSrc base;
+
+    IrInstSrc *ptr;
+    IrInstSrc *value;
 
     bool allow_write_through_const;
-    IrInstruction *ptr;
-    IrInstruction *value;
 };
 
-struct IrInstructionVectorStoreElem {
-    IrInstruction base;
+struct IrInstGenStorePtr {
+    IrInstGen base;
 
-    IrInstruction *vector_ptr;
-    IrInstruction *index;
-    IrInstruction *value;
+    IrInstGen *ptr;
+    IrInstGen *value;
 };
 
-struct IrInstructionFieldPtr {
-    IrInstruction base;
+struct IrInstGenVectorStoreElem {
+    IrInstGen base;
 
-    bool initializing;
-    IrInstruction *container_ptr;
+    IrInstGen *vector_ptr;
+    IrInstGen *index;
+    IrInstGen *value;
+};
+
+struct IrInstSrcFieldPtr {
+    IrInstSrc base;
+
+    IrInstSrc *container_ptr;
     Buf *field_name_buffer;
-    IrInstruction *field_name_expr;
+    IrInstSrc *field_name_expr;
+    bool initializing;
 };
 
-struct IrInstructionStructFieldPtr {
-    IrInstruction base;
+struct IrInstGenStructFieldPtr {
+    IrInstGen base;
 
-    IrInstruction *struct_ptr;
+    IrInstGen *struct_ptr;
     TypeStructField *field;
     bool is_const;
 };
 
-struct IrInstructionUnionFieldPtr {
-    IrInstruction base;
+struct IrInstGenUnionFieldPtr {
+    IrInstGen base;
 
-    bool safety_check_on;
-    bool initializing;
-    IrInstruction *union_ptr;
+    IrInstGen *union_ptr;
     TypeUnionField *field;
+    bool safety_check_on;
+    bool initializing;
 };
 
-struct IrInstructionElemPtr {
-    IrInstruction base;
+struct IrInstSrcElemPtr {
+    IrInstSrc base;
 
-    IrInstruction *array_ptr;
-    IrInstruction *elem_index;
+    IrInstSrc *array_ptr;
+    IrInstSrc *elem_index;
     AstNode *init_array_type_source_node;
     PtrLen ptr_len;
     bool safety_check_on;
 };
 
-struct IrInstructionVarPtr {
-    IrInstruction base;
+struct IrInstGenElemPtr {
+    IrInstGen base;
+
+    IrInstGen *array_ptr;
+    IrInstGen *elem_index;
+    bool safety_check_on;
+};
+
+struct IrInstSrcVarPtr {
+    IrInstSrc base;
 
     ZigVar *var;
     ScopeFnDef *crossed_fndef_scope;
 };
 
+struct IrInstGenVarPtr {
+    IrInstGen base;
+
+    ZigVar *var;
+};
+
 // For functions that have a return type for which handle_is_ptr is true, a
 // result location pointer is the secret first parameter ("sret"). This
 // instruction returns that pointer.
-struct IrInstructionReturnPtr {
-    IrInstruction base;
+struct IrInstGenReturnPtr {
+    IrInstGen base;
 };
 
-struct IrInstructionCallSrc {
-    IrInstruction base;
+struct IrInstSrcCall {
+    IrInstSrc base;
 
-    IrInstruction *fn_ref;
+    IrInstSrc *fn_ref;
     ZigFn *fn_entry;
     size_t arg_count;
-    IrInstruction **args;
-    IrInstruction *ret_ptr;
+    IrInstSrc **args;
+    IrInstSrc *ret_ptr;
     ResultLoc *result_loc;
 
-    IrInstruction *new_stack;
+    IrInstSrc *new_stack;
 
     CallModifier modifier;
     bool is_async_call_builtin;
@@ -2951,12 +3158,12 @@ struct IrInstructionCallSrc {
 
 // This is a pass1 instruction, used by @call when the args node is
 // a tuple or struct literal.
-struct IrInstructionCallSrcArgs {
-    IrInstruction base;
+struct IrInstSrcCallArgs {
+    IrInstSrc base;
 
-    IrInstruction *options;
-    IrInstruction *fn_ref;
-    IrInstruction **args_ptr;
+    IrInstSrc *options;
+    IrInstSrc *fn_ref;
+    IrInstSrc **args_ptr;
     size_t args_len;
     ResultLoc *result_loc;
 };
@@ -2964,42 +3171,54 @@ struct IrInstructionCallSrcArgs {
 // This is a pass1 instruction, used by @call, when the args node
 // is not a literal.
 // `args` is expected to be either a struct or a tuple.
-struct IrInstructionCallExtra {
-    IrInstruction base;
+struct IrInstSrcCallExtra {
+    IrInstSrc base;
 
-    IrInstruction *options;
-    IrInstruction *fn_ref;
-    IrInstruction *args;
+    IrInstSrc *options;
+    IrInstSrc *fn_ref;
+    IrInstSrc *args;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionCallGen {
-    IrInstruction base;
+struct IrInstGenCall {
+    IrInstGen base;
 
-    IrInstruction *fn_ref;
+    IrInstGen *fn_ref;
     ZigFn *fn_entry;
     size_t arg_count;
-    IrInstruction **args;
-    IrInstruction *result_loc;
-    IrInstruction *frame_result_loc;
-    IrInstruction *new_stack;
+    IrInstGen **args;
+    IrInstGen *result_loc;
+    IrInstGen *frame_result_loc;
+    IrInstGen *new_stack;
 
     CallModifier modifier;
 
     bool is_async_call_builtin;
 };
 
-struct IrInstructionConst {
-    IrInstruction base;
+struct IrInstSrcConst {
+    IrInstSrc base;
+
+    ZigValue *value;
+};
+
+struct IrInstGenConst {
+    IrInstGen base;
+};
+
+struct IrInstSrcReturn {
+    IrInstSrc base;
+
+    IrInstSrc *operand;
 };
 
 // When an IrExecutable is not in a function, a return instruction means that
 // the expression returns with that value, even though a return statement from
 // an AST perspective is invalid.
-struct IrInstructionReturn {
-    IrInstruction base;
+struct IrInstGenReturn {
+    IrInstGen base;
 
-    IrInstruction *operand;
+    IrInstGen *operand;
 };
 
 enum CastOp {
@@ -3014,89 +3233,92 @@ enum CastOp {
 };
 
 // TODO get rid of this instruction, replace with instructions for each op code
-struct IrInstructionCast {
-    IrInstruction base;
+struct IrInstGenCast {
+    IrInstGen base;
 
-    IrInstruction *value;
-    ZigType *dest_type;
+    IrInstGen *value;
     CastOp cast_op;
 };
 
-struct IrInstructionResizeSlice {
-    IrInstruction base;
+struct IrInstGenResizeSlice {
+    IrInstGen base;
 
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionContainerInitList {
-    IrInstruction base;
+struct IrInstSrcContainerInitList {
+    IrInstSrc base;
 
-    IrInstruction *elem_type;
+    IrInstSrc *elem_type;
     size_t item_count;
-    IrInstruction **elem_result_loc_list;
-    IrInstruction *result_loc;
+    IrInstSrc **elem_result_loc_list;
+    IrInstSrc *result_loc;
     AstNode *init_array_type_source_node;
 };
 
-struct IrInstructionContainerInitFieldsField {
+struct IrInstSrcContainerInitFieldsField {
     Buf *name;
     AstNode *source_node;
     TypeStructField *type_struct_field;
-    IrInstruction *result_loc;
+    IrInstSrc *result_loc;
 };
 
-struct IrInstructionContainerInitFields {
-    IrInstruction base;
+struct IrInstSrcContainerInitFields {
+    IrInstSrc base;
 
     size_t field_count;
-    IrInstructionContainerInitFieldsField *fields;
-    IrInstruction *result_loc;
+    IrInstSrcContainerInitFieldsField *fields;
+    IrInstSrc *result_loc;
 };
 
-struct IrInstructionUnreachable {
-    IrInstruction base;
+struct IrInstSrcUnreachable {
+    IrInstSrc base;
 };
 
-struct IrInstructionTypeOf {
-    IrInstruction base;
+struct IrInstGenUnreachable {
+    IrInstGen base;
+};
+
+struct IrInstSrcTypeOf {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
 };
 
-struct IrInstructionSetCold {
-    IrInstruction base;
+struct IrInstSrcSetCold {
+    IrInstSrc base;
 
-    IrInstruction *is_cold;
+    IrInstSrc *is_cold;
 };
 
-struct IrInstructionSetRuntimeSafety {
-    IrInstruction base;
+struct IrInstSrcSetRuntimeSafety {
+    IrInstSrc base;
 
-    IrInstruction *safety_on;
+    IrInstSrc *safety_on;
 };
 
-struct IrInstructionSetFloatMode {
-    IrInstruction base;
+struct IrInstSrcSetFloatMode {
+    IrInstSrc base;
 
-    IrInstruction *scope_value;
-    IrInstruction *mode_value;
+    IrInstSrc *scope_value;
+    IrInstSrc *mode_value;
 };
 
-struct IrInstructionArrayType {
-    IrInstruction base;
+struct IrInstSrcArrayType {
+    IrInstSrc base;
 
-    IrInstruction *size;
-    IrInstruction *sentinel;
-    IrInstruction *child_type;
+    IrInstSrc *size;
+    IrInstSrc *sentinel;
+    IrInstSrc *child_type;
 };
 
-struct IrInstructionPtrType {
-    IrInstruction base;
+struct IrInstSrcPtrType {
+    IrInstSrc base;
 
-    IrInstruction *sentinel;
-    IrInstruction *align_value;
-    IrInstruction *child_type;
+    IrInstSrc *sentinel;
+    IrInstSrc *align_value;
+    IrInstSrc *child_type;
     uint32_t bit_offset_start;
     uint32_t host_int_bytes;
     PtrLen ptr_len;
@@ -3105,375 +3327,459 @@ struct IrInstructionPtrType {
     bool is_allow_zero;
 };
 
-struct IrInstructionAnyFrameType {
-    IrInstruction base;
+struct IrInstSrcAnyFrameType {
+    IrInstSrc base;
 
-    IrInstruction *payload_type;
+    IrInstSrc *payload_type;
 };
 
-struct IrInstructionSliceType {
-    IrInstruction base;
+struct IrInstSrcSliceType {
+    IrInstSrc base;
 
-    IrInstruction *sentinel;
-    IrInstruction *align_value;
-    IrInstruction *child_type;
+    IrInstSrc *sentinel;
+    IrInstSrc *align_value;
+    IrInstSrc *child_type;
     bool is_const;
     bool is_volatile;
     bool is_allow_zero;
 };
 
-struct IrInstructionAsmSrc {
-    IrInstruction base;
+struct IrInstSrcAsm {
+    IrInstSrc base;
 
-    IrInstruction *asm_template;
-    IrInstruction **input_list;
-    IrInstruction **output_types;
+    IrInstSrc *asm_template;
+    IrInstSrc **input_list;
+    IrInstSrc **output_types;
     ZigVar **output_vars;
     size_t return_count;
     bool has_side_effects;
     bool is_global;
 };
 
-struct IrInstructionAsmGen {
-    IrInstruction base;
+struct IrInstGenAsm {
+    IrInstGen base;
 
     Buf *asm_template;
     AsmToken *token_list;
     size_t token_list_len;
-    IrInstruction **input_list;
-    IrInstruction **output_types;
+    IrInstGen **input_list;
+    IrInstGen **output_types;
     ZigVar **output_vars;
     size_t return_count;
     bool has_side_effects;
 };
 
-struct IrInstructionSizeOf {
-    IrInstruction base;
+struct IrInstSrcSizeOf {
+    IrInstSrc base;
 
+    IrInstSrc *type_value;
     bool bit_size;
-    IrInstruction *type_value;
 };
 
 // returns true if nonnull, returns false if null
-// this is so that `zeroes` sets maybe values to null
-struct IrInstructionTestNonNull {
-    IrInstruction base;
+struct IrInstSrcTestNonNull {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
+};
+
+struct IrInstGenTestNonNull {
+    IrInstGen base;
+
+    IrInstGen *value;
 };
 
 // Takes a pointer to an optional value, returns a pointer
 // to the payload.
-struct IrInstructionOptionalUnwrapPtr {
-    IrInstruction base;
+struct IrInstSrcOptionalUnwrapPtr {
+    IrInstSrc base;
 
+    IrInstSrc *base_ptr;
     bool safety_check_on;
     bool initializing;
-    IrInstruction *base_ptr;
 };
 
-struct IrInstructionCtz {
-    IrInstruction base;
+struct IrInstGenOptionalUnwrapPtr {
+    IrInstGen base;
 
-    IrInstruction *type;
-    IrInstruction *op;
+    IrInstGen *base_ptr;
+    bool safety_check_on;
+    bool initializing;
+};
+
+struct IrInstSrcCtz {
+    IrInstSrc base;
+
+    IrInstSrc *type;
+    IrInstSrc *op;
+};
+
+struct IrInstGenCtz {
+    IrInstGen base;
+
+    IrInstGen *op;
+};
+
+struct IrInstSrcClz {
+    IrInstSrc base;
+
+    IrInstSrc *type;
+    IrInstSrc *op;
+};
+
+struct IrInstGenClz {
+    IrInstGen base;
+
+    IrInstGen *op;
 };
 
-struct IrInstructionClz {
-    IrInstruction base;
+struct IrInstSrcPopCount {
+    IrInstSrc base;
 
-    IrInstruction *type;
-    IrInstruction *op;
+    IrInstSrc *type;
+    IrInstSrc *op;
 };
 
-struct IrInstructionPopCount {
-    IrInstruction base;
+struct IrInstGenPopCount {
+    IrInstGen base;
 
-    IrInstruction *type;
-    IrInstruction *op;
+    IrInstGen *op;
 };
 
-struct IrInstructionUnionTag {
-    IrInstruction base;
+struct IrInstGenUnionTag {
+    IrInstGen base;
 
-    IrInstruction *value;
+    IrInstGen *value;
 };
 
-struct IrInstructionImport {
-    IrInstruction base;
+struct IrInstSrcImport {
+    IrInstSrc base;
 
-    IrInstruction *name;
+    IrInstSrc *name;
 };
 
-struct IrInstructionRef {
-    IrInstruction base;
+struct IrInstSrcRef {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
     bool is_const;
     bool is_volatile;
 };
 
-struct IrInstructionRefGen {
-    IrInstruction base;
+struct IrInstGenRef {
+    IrInstGen base;
 
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionCompileErr {
-    IrInstruction base;
+struct IrInstSrcCompileErr {
+    IrInstSrc base;
 
-    IrInstruction *msg;
+    IrInstSrc *msg;
 };
 
-struct IrInstructionCompileLog {
-    IrInstruction base;
+struct IrInstSrcCompileLog {
+    IrInstSrc base;
 
     size_t msg_count;
-    IrInstruction **msg_list;
+    IrInstSrc **msg_list;
 };
 
-struct IrInstructionErrName {
-    IrInstruction base;
+struct IrInstSrcErrName {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
 };
 
-struct IrInstructionCImport {
-    IrInstruction base;
+struct IrInstGenErrName {
+    IrInstGen base;
+
+    IrInstGen *value;
+};
+
+struct IrInstSrcCImport {
+    IrInstSrc base;
 };
 
-struct IrInstructionCInclude {
-    IrInstruction base;
+struct IrInstSrcCInclude {
+    IrInstSrc base;
 
-    IrInstruction *name;
+    IrInstSrc *name;
 };
 
-struct IrInstructionCDefine {
-    IrInstruction base;
+struct IrInstSrcCDefine {
+    IrInstSrc base;
 
-    IrInstruction *name;
-    IrInstruction *value;
+    IrInstSrc *name;
+    IrInstSrc *value;
 };
 
-struct IrInstructionCUndef {
-    IrInstruction base;
+struct IrInstSrcCUndef {
+    IrInstSrc base;
 
-    IrInstruction *name;
+    IrInstSrc *name;
 };
 
-struct IrInstructionEmbedFile {
-    IrInstruction base;
+struct IrInstSrcEmbedFile {
+    IrInstSrc base;
 
-    IrInstruction *name;
+    IrInstSrc *name;
 };
 
-struct IrInstructionCmpxchgSrc {
-    IrInstruction base;
+struct IrInstSrcCmpxchg {
+    IrInstSrc base;
 
     bool is_weak;
-    IrInstruction *type_value;
-    IrInstruction *ptr;
-    IrInstruction *cmp_value;
-    IrInstruction *new_value;
-    IrInstruction *success_order_value;
-    IrInstruction *failure_order_value;
+    IrInstSrc *type_value;
+    IrInstSrc *ptr;
+    IrInstSrc *cmp_value;
+    IrInstSrc *new_value;
+    IrInstSrc *success_order_value;
+    IrInstSrc *failure_order_value;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionCmpxchgGen {
-    IrInstruction base;
+struct IrInstGenCmpxchg {
+    IrInstGen base;
 
-    bool is_weak;
     AtomicOrder success_order;
     AtomicOrder failure_order;
-    IrInstruction *ptr;
-    IrInstruction *cmp_value;
-    IrInstruction *new_value;
-    IrInstruction *result_loc;
+    IrInstGen *ptr;
+    IrInstGen *cmp_value;
+    IrInstGen *new_value;
+    IrInstGen *result_loc;
+    bool is_weak;
 };
 
-struct IrInstructionFence {
-    IrInstruction base;
+struct IrInstSrcFence {
+    IrInstSrc base;
 
-    IrInstruction *order_value;
+    IrInstSrc *order;
+};
+
+struct IrInstGenFence {
+    IrInstGen base;
 
-    // if this instruction gets to runtime then we know these values:
     AtomicOrder order;
 };
 
-struct IrInstructionTruncate {
-    IrInstruction base;
+struct IrInstSrcTruncate {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionIntCast {
-    IrInstruction base;
+struct IrInstGenTruncate {
+    IrInstGen base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionFloatCast {
-    IrInstruction base;
+struct IrInstSrcIntCast {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionErrSetCast {
-    IrInstruction base;
+struct IrInstSrcFloatCast {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionToBytes {
-    IrInstruction base;
+struct IrInstSrcErrSetCast {
+    IrInstSrc base;
 
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
+};
+
+struct IrInstSrcToBytes {
+    IrInstSrc base;
+
+    IrInstSrc *target;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionFromBytes {
-    IrInstruction base;
+struct IrInstSrcFromBytes {
+    IrInstSrc base;
 
-    IrInstruction *dest_child_type;
-    IrInstruction *target;
+    IrInstSrc *dest_child_type;
+    IrInstSrc *target;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionIntToFloat {
-    IrInstruction base;
+struct IrInstSrcIntToFloat {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionFloatToInt {
-    IrInstruction base;
+struct IrInstSrcFloatToInt {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionBoolToInt {
-    IrInstruction base;
+struct IrInstSrcBoolToInt {
+    IrInstSrc base;
 
-    IrInstruction *target;
+    IrInstSrc *target;
 };
 
-struct IrInstructionIntType {
-    IrInstruction base;
+struct IrInstSrcIntType {
+    IrInstSrc base;
 
-    IrInstruction *is_signed;
-    IrInstruction *bit_count;
+    IrInstSrc *is_signed;
+    IrInstSrc *bit_count;
 };
 
-struct IrInstructionVectorType {
-    IrInstruction base;
+struct IrInstSrcVectorType {
+    IrInstSrc base;
 
-    IrInstruction *len;
-    IrInstruction *elem_type;
+    IrInstSrc *len;
+    IrInstSrc *elem_type;
 };
 
-struct IrInstructionBoolNot {
-    IrInstruction base;
+struct IrInstSrcBoolNot {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
 };
 
-struct IrInstructionMemset {
-    IrInstruction base;
+struct IrInstGenBoolNot {
+    IrInstGen base;
 
-    IrInstruction *dest_ptr;
-    IrInstruction *byte;
-    IrInstruction *count;
+    IrInstGen *value;
 };
 
-struct IrInstructionMemcpy {
-    IrInstruction base;
+struct IrInstSrcMemset {
+    IrInstSrc base;
 
-    IrInstruction *dest_ptr;
-    IrInstruction *src_ptr;
-    IrInstruction *count;
+    IrInstSrc *dest_ptr;
+    IrInstSrc *byte;
+    IrInstSrc *count;
 };
 
-struct IrInstructionSliceSrc {
-    IrInstruction base;
+struct IrInstGenMemset {
+    IrInstGen base;
 
-    bool safety_check_on;
-    IrInstruction *ptr;
-    IrInstruction *start;
-    IrInstruction *end;
-    IrInstruction *sentinel;
+    IrInstGen *dest_ptr;
+    IrInstGen *byte;
+    IrInstGen *count;
+};
+
+struct IrInstSrcMemcpy {
+    IrInstSrc base;
+
+    IrInstSrc *dest_ptr;
+    IrInstSrc *src_ptr;
+    IrInstSrc *count;
+};
+
+struct IrInstGenMemcpy {
+    IrInstGen base;
+
+    IrInstGen *dest_ptr;
+    IrInstGen *src_ptr;
+    IrInstGen *count;
+};
+
+struct IrInstSrcSlice {
+    IrInstSrc base;
+
+    IrInstSrc *ptr;
+    IrInstSrc *start;
+    IrInstSrc *end;
+    IrInstSrc *sentinel;
     ResultLoc *result_loc;
+    bool safety_check_on;
 };
 
-struct IrInstructionSliceGen {
-    IrInstruction base;
+struct IrInstGenSlice {
+    IrInstGen base;
 
+    IrInstGen *ptr;
+    IrInstGen *start;
+    IrInstGen *end;
+    IrInstGen *result_loc;
     bool safety_check_on;
-    IrInstruction *ptr;
-    IrInstruction *start;
-    IrInstruction *end;
-    IrInstruction *result_loc;
 };
 
-struct IrInstructionMemberCount {
-    IrInstruction base;
+struct IrInstSrcMemberCount {
+    IrInstSrc base;
+
+    IrInstSrc *container;
+};
+
+struct IrInstSrcMemberType {
+    IrInstSrc base;
 
-    IrInstruction *container;
+    IrInstSrc *container_type;
+    IrInstSrc *member_index;
 };
 
-struct IrInstructionMemberType {
-    IrInstruction base;
+struct IrInstSrcMemberName {
+    IrInstSrc base;
 
-    IrInstruction *container_type;
-    IrInstruction *member_index;
+    IrInstSrc *container_type;
+    IrInstSrc *member_index;
 };
 
-struct IrInstructionMemberName {
-    IrInstruction base;
+struct IrInstSrcBreakpoint {
+    IrInstSrc base;
+};
+
+struct IrInstGenBreakpoint {
+    IrInstGen base;
+};
+
+struct IrInstSrcReturnAddress {
+    IrInstSrc base;
+};
 
-    IrInstruction *container_type;
-    IrInstruction *member_index;
+struct IrInstGenReturnAddress {
+    IrInstGen base;
 };
 
-struct IrInstructionBreakpoint {
-    IrInstruction base;
+struct IrInstSrcFrameAddress {
+    IrInstSrc base;
 };
 
-struct IrInstructionReturnAddress {
-    IrInstruction base;
+struct IrInstGenFrameAddress {
+    IrInstGen base;
 };
 
-struct IrInstructionFrameAddress {
-    IrInstruction base;
+struct IrInstSrcFrameHandle {
+    IrInstSrc base;
 };
 
-struct IrInstructionFrameHandle {
-    IrInstruction base;
+struct IrInstGenFrameHandle {
+    IrInstGen base;
 };
 
-struct IrInstructionFrameType {
-    IrInstruction base;
+struct IrInstSrcFrameType {
+    IrInstSrc base;
 
-    IrInstruction *fn;
+    IrInstSrc *fn;
 };
 
-struct IrInstructionFrameSizeSrc {
-    IrInstruction base;
+struct IrInstSrcFrameSize {
+    IrInstSrc base;
 
-    IrInstruction *fn;
+    IrInstSrc *fn;
 };
 
-struct IrInstructionFrameSizeGen {
-    IrInstruction base;
+struct IrInstGenFrameSize {
+    IrInstGen base;
 
-    IrInstruction *fn;
+    IrInstGen *fn;
 };
 
 enum IrOverflowOp {
@@ -3483,560 +3789,713 @@ enum IrOverflowOp {
     IrOverflowOpShl,
 };
 
-struct IrInstructionOverflowOp {
-    IrInstruction base;
+struct IrInstSrcOverflowOp {
+    IrInstSrc base;
 
     IrOverflowOp op;
-    IrInstruction *type_value;
-    IrInstruction *op1;
-    IrInstruction *op2;
-    IrInstruction *result_ptr;
+    IrInstSrc *type_value;
+    IrInstSrc *op1;
+    IrInstSrc *op2;
+    IrInstSrc *result_ptr;
+};
 
+struct IrInstGenOverflowOp {
+    IrInstGen base;
+
+    IrOverflowOp op;
+    IrInstGen *op1;
+    IrInstGen *op2;
+    IrInstGen *result_ptr;
+
+    // TODO can this field be removed?
     ZigType *result_ptr_type;
 };
 
-struct IrInstructionMulAdd {
-    IrInstruction base;
+struct IrInstSrcMulAdd {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
-    IrInstruction *op1;
-    IrInstruction *op2;
-    IrInstruction *op3;
+    IrInstSrc *type_value;
+    IrInstSrc *op1;
+    IrInstSrc *op2;
+    IrInstSrc *op3;
 };
 
-struct IrInstructionAlignOf {
-    IrInstruction base;
+struct IrInstGenMulAdd {
+    IrInstGen base;
 
-    IrInstruction *type_value;
+    IrInstGen *op1;
+    IrInstGen *op2;
+    IrInstGen *op3;
+};
+
+struct IrInstSrcAlignOf {
+    IrInstSrc base;
+
+    IrInstSrc *type_value;
 };
 
 // returns true if error, returns false if not error
-struct IrInstructionTestErrSrc {
-    IrInstruction base;
+struct IrInstSrcTestErr {
+    IrInstSrc base;
 
+    IrInstSrc *base_ptr;
     bool resolve_err_set;
     bool base_ptr_is_payload;
-    IrInstruction *base_ptr;
 };
 
-struct IrInstructionTestErrGen {
-    IrInstruction base;
+struct IrInstGenTestErr {
+    IrInstGen base;
 
-    IrInstruction *err_union;
+    IrInstGen *err_union;
 };
 
 // Takes an error union pointer, returns a pointer to the error code.
-struct IrInstructionUnwrapErrCode {
-    IrInstruction base;
+struct IrInstSrcUnwrapErrCode {
+    IrInstSrc base;
 
+    IrInstSrc *err_union_ptr;
     bool initializing;
-    IrInstruction *err_union_ptr;
 };
 
-struct IrInstructionUnwrapErrPayload {
-    IrInstruction base;
+struct IrInstGenUnwrapErrCode {
+    IrInstGen base;
 
+    IrInstGen *err_union_ptr;
+    bool initializing;
+};
+
+struct IrInstSrcUnwrapErrPayload {
+    IrInstSrc base;
+
+    IrInstSrc *value;
+    bool safety_check_on;
+    bool initializing;
+};
+
+struct IrInstGenUnwrapErrPayload {
+    IrInstGen base;
+
+    IrInstGen *value;
     bool safety_check_on;
     bool initializing;
-    IrInstruction *value;
 };
 
-struct IrInstructionOptionalWrap {
-    IrInstruction base;
+struct IrInstGenOptionalWrap {
+    IrInstGen base;
 
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionErrWrapPayload {
-    IrInstruction base;
+struct IrInstGenErrWrapPayload {
+    IrInstGen base;
 
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionErrWrapCode {
-    IrInstruction base;
+struct IrInstGenErrWrapCode {
+    IrInstGen base;
 
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionFnProto {
-    IrInstruction base;
+struct IrInstSrcFnProto {
+    IrInstSrc base;
 
-    IrInstruction **param_types;
-    IrInstruction *align_value;
-    IrInstruction *callconv_value;
-    IrInstruction *return_type;
+    IrInstSrc **param_types;
+    IrInstSrc *align_value;
+    IrInstSrc *callconv_value;
+    IrInstSrc *return_type;
     bool is_var_args;
 };
 
 // true if the target value is compile time known, false otherwise
-struct IrInstructionTestComptime {
-    IrInstruction base;
+struct IrInstSrcTestComptime {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
 };
 
-struct IrInstructionPtrCastSrc {
-    IrInstruction base;
+struct IrInstSrcPtrCast {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *ptr;
+    IrInstSrc *dest_type;
+    IrInstSrc *ptr;
     bool safety_check_on;
 };
 
-struct IrInstructionPtrCastGen {
-    IrInstruction base;
+struct IrInstGenPtrCast {
+    IrInstGen base;
 
-    IrInstruction *ptr;
+    IrInstGen *ptr;
     bool safety_check_on;
 };
 
-struct IrInstructionImplicitCast {
-    IrInstruction base;
+struct IrInstSrcImplicitCast {
+    IrInstSrc base;
 
-    IrInstruction *operand;
+    IrInstSrc *operand;
     ResultLocCast *result_loc_cast;
 };
 
-struct IrInstructionBitCastSrc {
-    IrInstruction base;
+struct IrInstSrcBitCast {
+    IrInstSrc base;
 
-    IrInstruction *operand;
+    IrInstSrc *operand;
     ResultLocBitCast *result_loc_bit_cast;
 };
 
-struct IrInstructionBitCastGen {
-    IrInstruction base;
+struct IrInstGenBitCast {
+    IrInstGen base;
 
-    IrInstruction *operand;
+    IrInstGen *operand;
 };
 
-struct IrInstructionWidenOrShorten {
-    IrInstruction base;
+struct IrInstGenWidenOrShorten {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionPtrToInt {
-    IrInstruction base;
+struct IrInstSrcPtrToInt {
+    IrInstSrc base;
 
-    IrInstruction *target;
+    IrInstSrc *target;
 };
 
-struct IrInstructionIntToPtr {
-    IrInstruction base;
+struct IrInstGenPtrToInt {
+    IrInstGen base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionIntToEnum {
-    IrInstruction base;
+struct IrInstSrcIntToPtr {
+    IrInstSrc base;
 
-    IrInstruction *dest_type;
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionEnumToInt {
-    IrInstruction base;
+struct IrInstGenIntToPtr {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionIntToErr {
-    IrInstruction base;
+struct IrInstSrcIntToEnum {
+    IrInstSrc base;
 
-    IrInstruction *target;
+    IrInstSrc *dest_type;
+    IrInstSrc *target;
 };
 
-struct IrInstructionErrToInt {
-    IrInstruction base;
+struct IrInstGenIntToEnum {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionCheckSwitchProngsRange {
-    IrInstruction *start;
-    IrInstruction *end;
+struct IrInstSrcEnumToInt {
+    IrInstSrc base;
+
+    IrInstSrc *target;
+};
+
+struct IrInstSrcIntToErr {
+    IrInstSrc base;
+
+    IrInstSrc *target;
+};
+
+struct IrInstGenIntToErr {
+    IrInstGen base;
+
+    IrInstGen *target;
+};
+
+struct IrInstSrcErrToInt {
+    IrInstSrc base;
+
+    IrInstSrc *target;
+};
+
+struct IrInstGenErrToInt {
+    IrInstGen base;
+
+    IrInstGen *target;
+};
+
+struct IrInstSrcCheckSwitchProngsRange {
+    IrInstSrc *start;
+    IrInstSrc *end;
 };
 
-struct IrInstructionCheckSwitchProngs {
-    IrInstruction base;
+struct IrInstSrcCheckSwitchProngs {
+    IrInstSrc base;
 
-    IrInstruction *target_value;
-    IrInstructionCheckSwitchProngsRange *ranges;
+    IrInstSrc *target_value;
+    IrInstSrcCheckSwitchProngsRange *ranges;
     size_t range_count;
     bool have_else_prong;
     bool have_underscore_prong;
 };
 
-struct IrInstructionCheckStatementIsVoid {
-    IrInstruction base;
+struct IrInstSrcCheckStatementIsVoid {
+    IrInstSrc base;
 
-    IrInstruction *statement_value;
+    IrInstSrc *statement_value;
 };
 
-struct IrInstructionTypeName {
-    IrInstruction base;
+struct IrInstSrcTypeName {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
+    IrInstSrc *type_value;
 };
 
-struct IrInstructionDeclRef {
-    IrInstruction base;
+struct IrInstSrcDeclRef {
+    IrInstSrc base;
 
     LVal lval;
     Tld *tld;
 };
 
-struct IrInstructionPanic {
-    IrInstruction base;
+struct IrInstSrcPanic {
+    IrInstSrc base;
 
-    IrInstruction *msg;
+    IrInstSrc *msg;
 };
 
-struct IrInstructionTagName {
-    IrInstruction base;
+struct IrInstGenPanic {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *msg;
 };
 
-struct IrInstructionTagType {
-    IrInstruction base;
+struct IrInstSrcTagName {
+    IrInstSrc base;
 
-    IrInstruction *target;
+    IrInstSrc *target;
 };
 
-struct IrInstructionFieldParentPtr {
-    IrInstruction base;
+struct IrInstGenTagName {
+    IrInstGen base;
 
-    IrInstruction *type_value;
-    IrInstruction *field_name;
-    IrInstruction *field_ptr;
+    IrInstGen *target;
+};
+
+struct IrInstSrcTagType {
+    IrInstSrc base;
+
+    IrInstSrc *target;
+};
+
+struct IrInstSrcFieldParentPtr {
+    IrInstSrc base;
+
+    IrInstSrc *type_value;
+    IrInstSrc *field_name;
+    IrInstSrc *field_ptr;
+};
+
+struct IrInstGenFieldParentPtr {
+    IrInstGen base;
+
+    IrInstGen *field_ptr;
     TypeStructField *field;
 };
 
-struct IrInstructionByteOffsetOf {
-    IrInstruction base;
+struct IrInstSrcByteOffsetOf {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
-    IrInstruction *field_name;
+    IrInstSrc *type_value;
+    IrInstSrc *field_name;
 };
 
-struct IrInstructionBitOffsetOf {
-    IrInstruction base;
+struct IrInstSrcBitOffsetOf {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
-    IrInstruction *field_name;
+    IrInstSrc *type_value;
+    IrInstSrc *field_name;
 };
 
-struct IrInstructionTypeInfo {
-    IrInstruction base;
+struct IrInstSrcTypeInfo {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
+    IrInstSrc *type_value;
 };
 
-struct IrInstructionType {
-    IrInstruction base;
+struct IrInstSrcType {
+    IrInstSrc base;
 
-    IrInstruction *type_info;
+    IrInstSrc *type_info;
 };
 
-struct IrInstructionHasField {
-    IrInstruction base;
+struct IrInstSrcHasField {
+    IrInstSrc base;
 
-    IrInstruction *container_type;
-    IrInstruction *field_name;
+    IrInstSrc *container_type;
+    IrInstSrc *field_name;
 };
 
-struct IrInstructionTypeId {
-    IrInstruction base;
+struct IrInstSrcTypeId {
+    IrInstSrc base;
 
-    IrInstruction *type_value;
+    IrInstSrc *type_value;
 };
 
-struct IrInstructionSetEvalBranchQuota {
-    IrInstruction base;
+struct IrInstSrcSetEvalBranchQuota {
+    IrInstSrc base;
 
-    IrInstruction *new_quota;
+    IrInstSrc *new_quota;
 };
 
-struct IrInstructionAlignCast {
-    IrInstruction base;
+struct IrInstSrcAlignCast {
+    IrInstSrc base;
 
-    IrInstruction *align_bytes;
-    IrInstruction *target;
+    IrInstSrc *align_bytes;
+    IrInstSrc *target;
 };
 
-struct IrInstructionOpaqueType {
-    IrInstruction base;
+struct IrInstGenAlignCast {
+    IrInstGen base;
+
+    IrInstGen *target;
+};
+
+struct IrInstSrcOpaqueType {
+    IrInstSrc base;
 };
 
-struct IrInstructionSetAlignStack {
-    IrInstruction base;
+struct IrInstSrcSetAlignStack {
+    IrInstSrc base;
 
-    IrInstruction *align_bytes;
+    IrInstSrc *align_bytes;
 };
 
-struct IrInstructionArgType {
-    IrInstruction base;
+struct IrInstSrcArgType {
+    IrInstSrc base;
 
-    IrInstruction *fn_type;
-    IrInstruction *arg_index;
+    IrInstSrc *fn_type;
+    IrInstSrc *arg_index;
     bool allow_var;
 };
 
-struct IrInstructionExport {
-    IrInstruction base;
+struct IrInstSrcExport {
+    IrInstSrc base;
 
-    IrInstruction *target;
-    IrInstruction *options;
+    IrInstSrc *target;
+    IrInstSrc *options;
 };
 
-struct IrInstructionErrorReturnTrace {
-    IrInstruction base;
+enum IrInstErrorReturnTraceOptional {
+    IrInstErrorReturnTraceNull,
+    IrInstErrorReturnTraceNonNull,
+};
+
+struct IrInstSrcErrorReturnTrace {
+    IrInstSrc base;
+
+    IrInstErrorReturnTraceOptional optional;
+};
+
+struct IrInstGenErrorReturnTrace {
+    IrInstGen base;
 
-    enum Optional {
-        Null,
-        NonNull,
-    } optional;
+    IrInstErrorReturnTraceOptional optional;
 };
 
-struct IrInstructionErrorUnion {
-    IrInstruction base;
+struct IrInstSrcErrorUnion {
+    IrInstSrc base;
 
-    IrInstruction *err_set;
-    IrInstruction *payload;
+    IrInstSrc *err_set;
+    IrInstSrc *payload;
     Buf *type_name;
 };
 
-struct IrInstructionAtomicRmw {
-    IrInstruction base;
+struct IrInstSrcAtomicRmw {
+    IrInstSrc base;
+
+    IrInstSrc *operand_type;
+    IrInstSrc *ptr;
+    IrInstSrc *op;
+    IrInstSrc *operand;
+    IrInstSrc *ordering;
+};
+
+struct IrInstGenAtomicRmw {
+    IrInstGen base;
+
+    IrInstGen *ptr;
+    IrInstGen *operand;
+    AtomicRmwOp op;
+    AtomicOrder ordering;
+};
+
+struct IrInstSrcAtomicLoad {
+    IrInstSrc base;
 
-    IrInstruction *operand_type;
-    IrInstruction *ptr;
-    IrInstruction *op;
-    AtomicRmwOp resolved_op;
-    IrInstruction *operand;
-    IrInstruction *ordering;
-    AtomicOrder resolved_ordering;
+    IrInstSrc *operand_type;
+    IrInstSrc *ptr;
+    IrInstSrc *ordering;
 };
 
-struct IrInstructionAtomicLoad {
-    IrInstruction base;
+struct IrInstGenAtomicLoad {
+    IrInstGen base;
 
-    IrInstruction *operand_type;
-    IrInstruction *ptr;
-    IrInstruction *ordering;
-    AtomicOrder resolved_ordering;
+    IrInstGen *ptr;
+    AtomicOrder ordering;
 };
 
-struct IrInstructionAtomicStore {
-    IrInstruction base;
+struct IrInstSrcAtomicStore {
+    IrInstSrc base;
+
+    IrInstSrc *operand_type;
+    IrInstSrc *ptr;
+    IrInstSrc *value;
+    IrInstSrc *ordering;
+};
+
+struct IrInstGenAtomicStore {
+    IrInstGen base;
+
+    IrInstGen *ptr;
+    IrInstGen *value;
+    AtomicOrder ordering;
+};
 
-    IrInstruction *operand_type;
-    IrInstruction *ptr;
-    IrInstruction *value;
-    IrInstruction *ordering;
-    AtomicOrder resolved_ordering;
+struct IrInstSrcSaveErrRetAddr {
+    IrInstSrc base;
 };
 
-struct IrInstructionSaveErrRetAddr {
-    IrInstruction base;
+struct IrInstGenSaveErrRetAddr {
+    IrInstGen base;
 };
 
-struct IrInstructionAddImplicitReturnType {
-    IrInstruction base;
+struct IrInstSrcAddImplicitReturnType {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
     ResultLocReturn *result_loc_ret;
 };
 
-// For float ops which take a single argument
-struct IrInstructionFloatOp {
-    IrInstruction base;
+// For float ops that take a single argument
+struct IrInstSrcFloatOp {
+    IrInstSrc base;
 
+    IrInstSrc *operand;
     BuiltinFnId fn_id;
-    IrInstruction *operand;
 };
 
-struct IrInstructionCheckRuntimeScope {
-    IrInstruction base;
+struct IrInstGenFloatOp {
+    IrInstGen base;
 
-    IrInstruction *scope_is_comptime;
-    IrInstruction *is_comptime;
+    IrInstGen *operand;
+    BuiltinFnId fn_id;
+};
+
+struct IrInstSrcCheckRuntimeScope {
+    IrInstSrc base;
+
+    IrInstSrc *scope_is_comptime;
+    IrInstSrc *is_comptime;
+};
+
+struct IrInstSrcBswap {
+    IrInstSrc base;
+
+    IrInstSrc *type;
+    IrInstSrc *op;
+};
+
+struct IrInstGenBswap {
+    IrInstGen base;
+
+    IrInstGen *op;
+};
+
+struct IrInstSrcBitReverse {
+    IrInstSrc base;
+
+    IrInstSrc *type;
+    IrInstSrc *op;
 };
 
-struct IrInstructionBswap {
-    IrInstruction base;
+struct IrInstGenBitReverse {
+    IrInstGen base;
 
-    IrInstruction *type;
-    IrInstruction *op;
+    IrInstGen *op;
 };
 
-struct IrInstructionBitReverse {
-    IrInstruction base;
+struct IrInstGenArrayToVector {
+    IrInstGen base;
 
-    IrInstruction *type;
-    IrInstruction *op;
+    IrInstGen *array;
 };
 
-struct IrInstructionArrayToVector {
-    IrInstruction base;
+struct IrInstGenVectorToArray {
+    IrInstGen base;
 
-    IrInstruction *array;
+    IrInstGen *vector;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionVectorToArray {
-    IrInstruction base;
+struct IrInstSrcShuffleVector {
+    IrInstSrc base;
 
-    IrInstruction *vector;
-    IrInstruction *result_loc;
+    IrInstSrc *scalar_type;
+    IrInstSrc *a;
+    IrInstSrc *b;
+    IrInstSrc *mask; // This is in zig-format, not llvm format
 };
 
-struct IrInstructionShuffleVector {
-    IrInstruction base;
+struct IrInstGenShuffleVector {
+    IrInstGen base;
 
-    IrInstruction *scalar_type;
-    IrInstruction *a;
-    IrInstruction *b;
-    IrInstruction *mask; // This is in zig-format, not llvm format
+    IrInstGen *a;
+    IrInstGen *b;
+    IrInstGen *mask; // This is in zig-format, not llvm format
 };
 
-struct IrInstructionSplatSrc {
-    IrInstruction base;
+struct IrInstSrcSplat {
+    IrInstSrc base;
 
-    IrInstruction *len;
-    IrInstruction *scalar;
+    IrInstSrc *len;
+    IrInstSrc *scalar;
 };
 
-struct IrInstructionSplatGen {
-    IrInstruction base;
+struct IrInstGenSplat {
+    IrInstGen base;
 
-    IrInstruction *scalar;
+    IrInstGen *scalar;
 };
 
-struct IrInstructionAssertZero {
-    IrInstruction base;
+struct IrInstGenAssertZero {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionAssertNonNull {
-    IrInstruction base;
+struct IrInstGenAssertNonNull {
+    IrInstGen base;
 
-    IrInstruction *target;
+    IrInstGen *target;
 };
 
-struct IrInstructionUnionInitNamedField {
-    IrInstruction base;
+struct IrInstSrcUnionInitNamedField {
+    IrInstSrc base;
 
-    IrInstruction *union_type;
-    IrInstruction *field_name;
-    IrInstruction *field_result_loc;
-    IrInstruction *result_loc;
+    IrInstSrc *union_type;
+    IrInstSrc *field_name;
+    IrInstSrc *field_result_loc;
+    IrInstSrc *result_loc;
 };
 
-struct IrInstructionHasDecl {
-    IrInstruction base;
+struct IrInstSrcHasDecl {
+    IrInstSrc base;
 
-    IrInstruction *container;
-    IrInstruction *name;
+    IrInstSrc *container;
+    IrInstSrc *name;
 };
 
-struct IrInstructionUndeclaredIdent {
-    IrInstruction base;
+struct IrInstSrcUndeclaredIdent {
+    IrInstSrc base;
 
     Buf *name;
 };
 
-struct IrInstructionAllocaSrc {
-    IrInstruction base;
+struct IrInstSrcAlloca {
+    IrInstSrc base;
 
-    IrInstruction *align;
-    IrInstruction *is_comptime;
+    IrInstSrc *align;
+    IrInstSrc *is_comptime;
     const char *name_hint;
 };
 
-struct IrInstructionAllocaGen {
-    IrInstruction base;
+struct IrInstGenAlloca {
+    IrInstGen base;
 
     uint32_t align;
     const char *name_hint;
     size_t field_index;
 };
 
-struct IrInstructionEndExpr {
-    IrInstruction base;
+struct IrInstSrcEndExpr {
+    IrInstSrc base;
 
-    IrInstruction *value;
+    IrInstSrc *value;
     ResultLoc *result_loc;
 };
 
 // This one is for writing through the result pointer.
-struct IrInstructionResolveResult {
-    IrInstruction base;
+struct IrInstSrcResolveResult {
+    IrInstSrc base;
 
     ResultLoc *result_loc;
-    IrInstruction *ty;
+    IrInstSrc *ty;
 };
 
-// This one is when you want to read the value of the result.
-// You have to give the value in case it is comptime.
-struct IrInstructionResultPtr {
-    IrInstruction base;
+struct IrInstSrcResetResult {
+    IrInstSrc base;
 
     ResultLoc *result_loc;
-    IrInstruction *result;
 };
 
-struct IrInstructionResetResult {
-    IrInstruction base;
+struct IrInstGenPtrOfArrayToSlice {
+    IrInstGen base;
 
-    ResultLoc *result_loc;
+    IrInstGen *operand;
+    IrInstGen *result_loc;
 };
 
-struct IrInstructionPtrOfArrayToSlice {
-    IrInstruction base;
-
-    IrInstruction *operand;
-    IrInstruction *result_loc;
+struct IrInstSrcSuspendBegin {
+    IrInstSrc base;
 };
 
-struct IrInstructionSuspendBegin {
-    IrInstruction base;
+struct IrInstGenSuspendBegin {
+    IrInstGen base;
 
     LLVMBasicBlockRef resume_bb;
 };
 
-struct IrInstructionSuspendFinish {
-    IrInstruction base;
+struct IrInstSrcSuspendFinish {
+    IrInstSrc base;
 
-    IrInstructionSuspendBegin *begin;
+    IrInstSrcSuspendBegin *begin;
 };
 
-struct IrInstructionAwaitSrc {
-    IrInstruction base;
+struct IrInstGenSuspendFinish {
+    IrInstGen base;
 
-    IrInstruction *frame;
+    IrInstGenSuspendBegin *begin;
+};
+
+struct IrInstSrcAwait {
+    IrInstSrc base;
+
+    IrInstSrc *frame;
     ResultLoc *result_loc;
 };
 
-struct IrInstructionAwaitGen {
-    IrInstruction base;
+struct IrInstGenAwait {
+    IrInstGen base;
 
-    IrInstruction *frame;
-    IrInstruction *result_loc;
+    IrInstGen *frame;
+    IrInstGen *result_loc;
     ZigFn *target_fn;
 };
 
-struct IrInstructionResume {
-    IrInstruction base;
+struct IrInstSrcResume {
+    IrInstSrc base;
 
-    IrInstruction *frame;
+    IrInstSrc *frame;
+};
+
+struct IrInstGenResume {
+    IrInstGen base;
+
+    IrInstGen *frame;
 };
 
 enum SpillId {
@@ -4044,24 +4503,37 @@ enum SpillId {
     SpillIdRetErrCode,
 };
 
-struct IrInstructionSpillBegin {
-    IrInstruction base;
+struct IrInstSrcSpillBegin {
+    IrInstSrc base;
 
+    IrInstSrc *operand;
     SpillId spill_id;
-    IrInstruction *operand;
 };
 
-struct IrInstructionSpillEnd {
-    IrInstruction base;
+struct IrInstGenSpillBegin {
+    IrInstGen base;
 
-    IrInstructionSpillBegin *begin;
+    SpillId spill_id;
+    IrInstGen *operand;
+};
+
+struct IrInstSrcSpillEnd {
+    IrInstSrc base;
+
+    IrInstSrcSpillBegin *begin;
+};
+
+struct IrInstGenSpillEnd {
+    IrInstGen base;
+
+    IrInstGenSpillBegin *begin;
 };
 
-struct IrInstructionVectorExtractElem {
-    IrInstruction base;
+struct IrInstGenVectorExtractElem {
+    IrInstGen base;
 
-    IrInstruction *vector;
-    IrInstruction *index;
+    IrInstGen *vector;
+    IrInstGen *index;
 };
 
 enum ResultLocId {
@@ -4082,9 +4554,9 @@ struct ResultLoc {
     ResultLocId id;
     bool written;
     bool allow_write_through_const;
-    IrInstruction *resolved_loc; // result ptr
-    IrInstruction *source_instruction;
-    IrInstruction *gen_instruction; // value to store to the result loc
+    IrInstGen *resolved_loc; // result ptr
+    IrInstSrc *source_instruction;
+    IrInstGen *gen_instruction; // value to store to the result loc
     ZigType *implicit_elem_type;
 };
 
@@ -4114,18 +4586,18 @@ struct ResultLocPeerParent {
 
     bool skipped;
     bool done_resuming;
-    IrBasicBlock *end_bb;
+    IrBasicBlockSrc *end_bb;
     ResultLoc *parent;
     ZigList<ResultLocPeer *> peers;
     ZigType *resolved_type;
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
 };
 
 struct ResultLocPeer {
     ResultLoc base;
 
     ResultLocPeerParent *parent;
-    IrBasicBlock *next_bb;
+    IrBasicBlockSrc *next_bb;
     IrSuspendPosition suspend_pos;
 };
 
@@ -4196,7 +4668,7 @@ struct FnWalkAttrs {
 struct FnWalkCall {
     ZigList<LLVMValueRef> *gen_param_values;
     ZigList<ZigType *> *gen_param_types;
-    IrInstructionCallGen *inst;
+    IrInstGenCall *inst;
     bool is_var_args;
 };
 
diff --git a/src/analyze.cpp b/src/analyze.cpp
index 638b0b03b0420d36afb6211121b68a089296fec9..86f7cb77020e5631cf2f9a78a73304d9d8154d27 100644
--- a/src/analyze.cpp
+++ b/src/analyze.cpp
@@ -199,7 +199,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {
     return scope;
 }
 
-Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime) {
+Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime) {
     ScopeRuntime *scope = allocate<ScopeRuntime>(1);
     scope->is_comptime = is_comptime;
     init_scope(g, &scope->base, ScopeIdRuntime, node, parent);
@@ -3350,7 +3350,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i
 
 ZigFn *create_fn_raw(CodeGen *g, FnInline inline_value) {
     ZigFn *fn_entry = allocate<ZigFn>(1, "ZigFn");
-    fn_entry->ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
+    fn_entry->ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
 
     fn_entry->prealloc_backward_branch_quota = default_backward_branch_quota;
 
@@ -4097,7 +4097,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
     if (type_is_invalid(result->type)) {
         dest_decls_scope->any_imports_failed = true;
         using_namespace->base.resolution = TldResolutionInvalid;
-        using_namespace->using_namespace_value = g->invalid_instruction->value;
+        using_namespace->using_namespace_value = g->invalid_inst_gen->value;
         return;
     }
 
@@ -4106,7 +4106,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
             buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&result->data.x_type->name)));
         dest_decls_scope->any_imports_failed = true;
         using_namespace->base.resolution = TldResolutionInvalid;
-        using_namespace->using_namespace_value = g->invalid_instruction->value;
+        using_namespace->using_namespace_value = g->invalid_inst_gen->value;
         return;
     }
 }
@@ -4667,12 +4667,12 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
     }
 
     for (size_t i = 0; i < fn->call_list.length; i += 1) {
-        IrInstructionCallGen *call = fn->call_list.at(i);
+        IrInstGenCall *call = fn->call_list.at(i);
         if (call->fn_entry == nullptr) {
             // TODO function pointer call here, could be anything
             continue;
         }
-        switch (analyze_callee_async(g, fn, call->fn_entry, call->base.source_node, must_not_be_async,
+        switch (analyze_callee_async(g, fn, call->fn_entry, call->base.base.source_node, must_not_be_async,
                     call->modifier))
         {
             case ErrorSemanticAnalyzeFail:
@@ -4690,10 +4690,10 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
         }
     }
     for (size_t i = 0; i < fn->await_list.length; i += 1) {
-        IrInstructionAwaitGen *await = fn->await_list.at(i);
+        IrInstGenAwait *await = fn->await_list.at(i);
         // TODO If this is a noasync await, it doesn't count
         // https://github.com/ziglang/zig/issues/3157
-        switch (analyze_callee_async(g, fn, await->target_fn, await->base.source_node, must_not_be_async,
+        switch (analyze_callee_async(g, fn, await->target_fn, await->base.base.source_node, must_not_be_async,
                     CallModifierNone))
         {
             case ErrorSemanticAnalyzeFail:
@@ -4784,7 +4784,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
 
     if (g->verbose_ir) {
         fprintf(stderr, "fn %s() { // (analyzed)\n", buf_ptr(&fn->symbol_name));
-        ir_print(g, stderr, &fn->analyzed_executable, 4, IrPassGen);
+        ir_print_gen(g, stderr, &fn->analyzed_executable, 4);
         fprintf(stderr, "}\n");
     }
     fn->anal_state = FnAnalStateComplete;
@@ -4827,7 +4827,7 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {
         fprintf(stderr, "\n");
         ast_render(stderr, fn_table_entry->body_node, 4);
         fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));
-        ir_print(g, stderr, fn_table_entry->ir_executable, 4, IrPassSrc);
+        ir_print_src(g, stderr, fn_table_entry->ir_executable, 4);
         fprintf(stderr, "}\n");
     }
 
@@ -6191,13 +6191,13 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
     ZigType *fn_type = get_async_fn_type(g, fn->type_entry);
 
     if (fn->analyzed_executable.need_err_code_spill) {
-        IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
-        alloca_gen->base.id = IrInstructionIdAllocaGen;
-        alloca_gen->base.source_node = fn->proto_node;
-        alloca_gen->base.scope = fn->child_scope;
+        IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
+        alloca_gen->base.id = IrInstGenIdAlloca;
+        alloca_gen->base.base.source_node = fn->proto_node;
+        alloca_gen->base.base.scope = fn->child_scope;
         alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
         alloca_gen->base.value->type = get_pointer_to_type(g, g->builtin_types.entry_global_error_set, false);
-        alloca_gen->base.ref_count = 1;
+        alloca_gen->base.base.ref_count = 1;
         alloca_gen->name_hint = "";
         fn->alloca_gen_list.append(alloca_gen);
         fn->err_code_spill = &alloca_gen->base;
@@ -6205,18 +6205,18 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
 
     ZigType *largest_call_frame_type = nullptr;
     // Later we'll change this to be largest_call_frame_type instead of void.
-    IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
+    IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
             fn, g->builtin_types.entry_void, "@async_call_frame");
 
     for (size_t i = 0; i < fn->call_list.length; i += 1) {
-        IrInstructionCallGen *call = fn->call_list.at(i);
+        IrInstGenCall *call = fn->call_list.at(i);
         if (call->new_stack != nullptr) {
             // don't need to allocate a frame for this
             continue;
         }
         ZigFn *callee = call->fn_entry;
         if (callee == nullptr) {
-            add_node_error(g, call->base.source_node,
+            add_node_error(g, call->base.base.source_node,
                 buf_sprintf("function is not comptime-known; @asyncCall required"));
             return ErrorSemanticAnalyzeFail;
         }
@@ -6226,14 +6226,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
         if (callee->anal_state == FnAnalStateProbing) {
             ErrorMsg *msg = add_node_error(g, fn->proto_node,
                 buf_sprintf("unable to determine async function frame of '%s'", buf_ptr(&fn->symbol_name)));
-            g->trace_err = add_error_note(g, msg, call->base.source_node,
+            g->trace_err = add_error_note(g, msg, call->base.base.source_node,
                 buf_sprintf("analysis of function '%s' depends on the frame", buf_ptr(&callee->symbol_name)));
             return ErrorSemanticAnalyzeFail;
         }
 
         ZigType *callee_frame_type = get_fn_frame_type(g, callee);
         frame_type->data.frame.resolve_loop_type = callee_frame_type;
-        frame_type->data.frame.resolve_loop_src_node = call->base.source_node;
+        frame_type->data.frame.resolve_loop_src_node = call->base.base.source_node;
 
         analyze_fn_body(g, callee);
         if (callee->anal_state == FnAnalStateInvalid) {
@@ -6249,7 +6249,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
         if (!fn_is_async(callee))
             continue;
 
-        mark_suspension_point(call->base.scope);
+        mark_suspension_point(call->base.base.scope);
 
         if ((err = type_resolve(g, callee_frame_type, ResolveStatusSizeKnown))) {
             return err;
@@ -6271,7 +6271,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
     // For example: foo() + await z
     // The funtion call result of foo() must be spilled.
     for (size_t i = 0; i < fn->await_list.length; i += 1) {
-        IrInstructionAwaitGen *await = fn->await_list.at(i);
+        IrInstGenAwait *await = fn->await_list.at(i);
         // TODO If this is a noasync await, it doesn't suspend
         // https://github.com/ziglang/zig/issues/3157
         if (await->base.value->special != ConstValSpecialRuntime) {
@@ -6293,52 +6293,51 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
         }
         // This await is a suspend point, but it might not need a spill.
         // We do need to mark the ExprScope as having a suspend point in it.
-        mark_suspension_point(await->base.scope);
+        mark_suspension_point(await->base.base.scope);
 
         if (await->result_loc != nullptr) {
             // If there's a result location, that is the spill
             continue;
         }
-        if (await->base.ref_count == 0)
+        if (await->base.base.ref_count == 0)
             continue;
         if (!type_has_bits(await->base.value->type))
             continue;
-        await->result_loc = ir_create_alloca(g, await->base.scope, await->base.source_node, fn,
+        await->result_loc = ir_create_alloca(g, await->base.base.scope, await->base.base.source_node, fn,
                 await->base.value->type, "");
     }
     for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
-        IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
+        IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
         for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
-            IrInstruction *instruction = block->instruction_list.at(instr_i);
-            if (instruction->id == IrInstructionIdSuspendFinish) {
-                mark_suspension_point(instruction->scope);
+            IrInstGen *instruction = block->instruction_list.at(instr_i);
+            if (instruction->id == IrInstGenIdSuspendFinish) {
+                mark_suspension_point(instruction->base.scope);
             }
         }
     }
     // Now that we've marked all the expr scopes that have to spill, we go over the instructions
     // and spill the relevant ones.
     for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
-        IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
+        IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
         for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
-            IrInstruction *instruction = block->instruction_list.at(instr_i);
-            if (instruction->id == IrInstructionIdAwaitGen ||
-                instruction->id == IrInstructionIdVarPtr ||
-                instruction->id == IrInstructionIdDeclRef ||
-                instruction->id == IrInstructionIdAllocaGen)
+            IrInstGen *instruction = block->instruction_list.at(instr_i);
+            if (instruction->id == IrInstGenIdAwait ||
+                instruction->id == IrInstGenIdVarPtr ||
+                instruction->id == IrInstGenIdAlloca)
             {
                 // This instruction does its own spilling specially, or otherwise doesn't need it.
                 continue;
             }
             if (instruction->value->special != ConstValSpecialRuntime)
                 continue;
-            if (instruction->ref_count == 0)
+            if (instruction->base.ref_count == 0)
                 continue;
             if ((err = type_resolve(g, instruction->value->type, ResolveStatusZeroBitsKnown)))
                 return ErrorSemanticAnalyzeFail;
             if (!type_has_bits(instruction->value->type))
                 continue;
-            if (scope_needs_spill(instruction->scope)) {
-                instruction->spill = ir_create_alloca(g, instruction->scope, instruction->source_node,
+            if (scope_needs_spill(instruction->base.scope)) {
+                instruction->spill = ir_create_alloca(g, instruction->base.scope, instruction->base.source_node,
                         fn, instruction->value->type, "");
             }
         }
@@ -6389,14 +6388,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
     }
 
     for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {
-        IrInstructionAllocaGen *instruction = fn->alloca_gen_list.at(alloca_i);
+        IrInstGenAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
         instruction->field_index = SIZE_MAX;
         ZigType *ptr_type = instruction->base.value->type;
         assert(ptr_type->id == ZigTypeIdPointer);
         ZigType *child_type = ptr_type->data.pointer.child_type;
         if (!type_has_bits(child_type))
             continue;
-        if (instruction->base.ref_count == 0)
+        if (instruction->base.base.ref_count == 0)
             continue;
         if (instruction->base.value->special != ConstValSpecialRuntime) {
             if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
@@ -6407,7 +6406,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
         }
 
         frame_type->data.frame.resolve_loop_type = child_type;
-        frame_type->data.frame.resolve_loop_src_node = instruction->base.source_node;
+        frame_type->data.frame.resolve_loop_src_node = instruction->base.base.source_node;
         if ((err = type_resolve(g, child_type, ResolveStatusSizeKnown))) {
             return err;
         }
@@ -6421,7 +6420,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
         instruction->field_index = fields.length;
 
         src_assert(child_type->id != ZigTypeIdPointer || child_type->data.pointer.inferred_struct_field == nullptr,
-                instruction->base.source_node);
+                instruction->base.base.source_node);
         fields.append({name, child_type, instruction->align});
     }
 
@@ -6554,8 +6553,10 @@ bool ir_get_var_is_comptime(ZigVar *var) {
     // As an optimization, is_comptime values which are constant are allowed
     // to be omitted from analysis. In this case, there is no child instruction
     // and we simply look at the unanalyzed const parent instruction.
-    assert(var->is_comptime->value->type->id == ZigTypeIdBool);
-    var->is_comptime_memoized_value = var->is_comptime->value->data.x_bool;
+    assert(var->is_comptime->id == IrInstSrcIdConst);
+    IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(var->is_comptime);
+    assert(const_inst->value->type->id == ZigTypeIdBool);
+    var->is_comptime_memoized_value = const_inst->value->data.x_bool;
     var->is_comptime = nullptr;
     return var->is_comptime_memoized_value;
 }
@@ -9193,21 +9194,6 @@ void src_assert(bool ok, AstNode *source_node) {
     stage2_panic(msg, strlen(msg));
 }
 
-IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
-        ZigType *var_type, const char *name_hint)
-{
-    IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
-    alloca_gen->base.id = IrInstructionIdAllocaGen;
-    alloca_gen->base.source_node = source_node;
-    alloca_gen->base.scope = scope;
-    alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
-    alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
-    alloca_gen->base.ref_count = 1;
-    alloca_gen->name_hint = name_hint;
-    fn->alloca_gen_list.append(alloca_gen);
-    return &alloca_gen->base;
-}
-
 Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
         ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path)
 {
@@ -9268,8 +9254,17 @@ Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
 }
 
 
-void IrExecutable::src() {
-    IrExecutable *it;
+void IrExecutableSrc::src() {
+    if (this->source_node != nullptr) {
+        this->source_node->src();
+    }
+    if (this->parent_exec != nullptr) {
+        this->parent_exec->src();
+    }
+}
+
+void IrExecutableGen::src() {
+    IrExecutableGen *it;
     for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {
         it->source_node->src();
     }
@@ -9357,3 +9352,41 @@ bool type_is_numeric(ZigType *ty) {
     }
     zig_unreachable();
 }
+
+// float ops that take a single argument
+//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign, lround, llround, lrint, llrint
+const char *float_op_to_name(BuiltinFnId op) {
+    switch (op) {
+    case BuiltinFnIdSqrt:
+        return "sqrt";
+    case BuiltinFnIdSin:
+        return "sin";
+    case BuiltinFnIdCos:
+        return "cos";
+    case BuiltinFnIdExp:
+        return "exp";
+    case BuiltinFnIdExp2:
+        return "exp2";
+    case BuiltinFnIdLog:
+        return "log";
+    case BuiltinFnIdLog10:
+        return "log10";
+    case BuiltinFnIdLog2:
+        return "log2";
+    case BuiltinFnIdFabs:
+        return "fabs";
+    case BuiltinFnIdFloor:
+        return "floor";
+    case BuiltinFnIdCeil:
+        return "ceil";
+    case BuiltinFnIdTrunc:
+        return "trunc";
+    case BuiltinFnIdNearbyInt:
+        return "nearbyint";
+    case BuiltinFnIdRound:
+        return "round";
+    default:
+        zig_unreachable();
+    }
+}
+
diff --git a/src/analyze.hpp b/src/analyze.hpp
index f79dbbda444ea9e05d02ba6dbc809dbbf5cd54e6..c0026945e2bd494bcdd4e0a7ec6e79978a76aa89 100644
--- a/src/analyze.hpp
+++ b/src/analyze.hpp
@@ -120,7 +120,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent);
 ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);
 ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);
 Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);
-Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime);
+Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime);
 Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);
 ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);
 
@@ -271,8 +271,6 @@ ZigType *resolve_struct_field_type(CodeGen *g, TypeStructField *struct_field);
 
 void add_async_error_notes(CodeGen *g, ErrorMsg *msg, ZigFn *fn);
 
-IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
-        ZigType *var_type, const char *name_hint);
 Error analyze_import(CodeGen *codegen, ZigType *source_import, Buf *import_target_str,
         ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path);
 ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry);
@@ -281,4 +279,5 @@ void copy_const_val(ZigValue *dest, ZigValue *src);
 bool type_has_optional_repr(ZigType *ty);
 bool is_opt_err_set(ZigType *ty);
 bool type_is_numeric(ZigType *ty);
+const char *float_op_to_name(BuiltinFnId op);
 #endif
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 3d4d2a8c317e0f360c8bce83f2d8e800995e6aee..f4a7d408a7ad20fb7aa77e3a31c90d9ddea4ab9e 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -191,7 +191,7 @@ static void generate_error_name_table(CodeGen *g);
 static bool value_is_all_undef(CodeGen *g, ZigValue *const_val);
 static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_type, LLVMValueRef ptr);
 static LLVMValueRef build_alloca(CodeGen *g, ZigType *type_entry, const char *name, uint32_t alignment);
-static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
+static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
         LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
         LLVMValueRef result_loc, bool non_async);
 static Error get_tmp_filename(CodeGen *g, Buf *out, Buf *suffix);
@@ -877,14 +877,14 @@ static LLVMValueRef get_handle_value(CodeGen *g, LLVMValueRef ptr, ZigType *type
     }
 }
 
-static void ir_assert(bool ok, IrInstruction *source_instruction) {
+static void ir_assert(bool ok, IrInstGen *source_instruction) {
     if (ok) return;
-    src_assert(ok, source_instruction->source_node);
+    src_assert(ok, source_instruction->base.source_node);
 }
 
-static bool ir_want_fast_math(CodeGen *g, IrInstruction *instruction) {
+static bool ir_want_fast_math(CodeGen *g, IrInstGen *instruction) {
     // TODO memoize
-    Scope *scope = instruction->scope;
+    Scope *scope = instruction->base.scope;
     while (scope) {
         if (scope->id == ScopeIdBlock) {
             ScopeBlock *block_scope = (ScopeBlock *)scope;
@@ -919,8 +919,8 @@ static bool ir_want_runtime_safety_scope(CodeGen *g, Scope *scope) {
             g->build_mode != BuildModeSmallRelease);
 }
 
-static bool ir_want_runtime_safety(CodeGen *g, IrInstruction *instruction) {
-    return ir_want_runtime_safety_scope(g, instruction->scope);
+static bool ir_want_runtime_safety(CodeGen *g, IrInstGen *instruction) {
+    return ir_want_runtime_safety_scope(g, instruction->base.scope);
 }
 
 static Buf *panic_msg_buf(PanicMsgId msg_id) {
@@ -1046,8 +1046,8 @@ static void gen_assertion_scope(CodeGen *g, PanicMsgId msg_id, Scope *source_sco
     }
 }
 
-static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstruction *source_instruction) {
-    return gen_assertion_scope(g, msg_id, source_instruction->scope);
+static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstGen *source_instruction) {
+    return gen_assertion_scope(g, msg_id, source_instruction->base.scope);
 }
 
 static LLVMValueRef get_stacksave_fn_val(CodeGen *g) {
@@ -1761,7 +1761,7 @@ static void gen_var_debug_decl(CodeGen *g, ZigVar *var) {
             LLVMGetInsertBlock(g->builder));
 }
 
-static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
+static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstGen *instruction) {
     Error err;
 
     bool value_has_bits;
@@ -1772,8 +1772,8 @@ static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
         return nullptr;
 
     if (!instruction->llvm_value) {
-        if (instruction->id == IrInstructionIdAwaitGen) {
-            IrInstructionAwaitGen *await = reinterpret_cast<IrInstructionAwaitGen*>(instruction);
+        if (instruction->id == IrInstGenIdAwait) {
+            IrInstGenAwait *await = reinterpret_cast<IrInstGenAwait*>(instruction);
             if (await->result_loc != nullptr) {
                 return get_handle_value(g, ir_llvm_value(g, await->result_loc),
                     await->result_loc->value->type->data.pointer.child_type, await->result_loc->value->type);
@@ -1856,9 +1856,9 @@ static bool iter_function_params_c_abi(CodeGen *g, ZigType *fn_type, FnWalk *fn_
         case FnWalkIdCall: {
             if (src_i >= fn_walk->data.call.inst->arg_count)
                 return false;
-            IrInstruction *arg = fn_walk->data.call.inst->args[src_i];
+            IrInstGen *arg = fn_walk->data.call.inst->args[src_i];
             ty = arg->value->type;
-            source_node = arg->source_node;
+            source_node = arg->base.source_node;
             val = ir_llvm_value(g, arg);
             break;
         }
@@ -2091,10 +2091,10 @@ void walk_function_params(CodeGen *g, ZigType *fn_type, FnWalk *fn_walk) {
         return;
     }
     if (fn_walk->id == FnWalkIdCall) {
-        IrInstructionCallGen *instruction = fn_walk->data.call.inst;
+        IrInstGenCall *instruction = fn_walk->data.call.inst;
         bool is_var_args = fn_walk->data.call.is_var_args;
         for (size_t call_i = 0; call_i < instruction->arg_count; call_i += 1) {
-            IrInstruction *param_instruction = instruction->args[call_i];
+            IrInstGen *param_instruction = instruction->args[call_i];
             ZigType *param_type = param_instruction->value->type;
             if (is_var_args || type_has_bits(param_type)) {
                 LLVMValueRef param_value = ir_llvm_value(g, param_instruction);
@@ -2309,14 +2309,14 @@ static LLVMValueRef get_merge_err_ret_traces_fn_val(CodeGen *g) {
     return fn_val;
 
 }
-static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *executable,
-        IrInstructionSaveErrRetAddr *save_err_ret_addr_instruction)
+static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenSaveErrRetAddr *save_err_ret_addr_instruction)
 {
     assert(g->have_err_ret_tracing);
 
     LLVMValueRef return_err_fn = get_return_err_fn(g);
     bool is_llvm_alloca;
-    LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.scope,
+    LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.base.scope,
             &is_llvm_alloca);
     ZigLLVMBuildCall(g->builder, return_err_fn, &my_err_trace_val, 1,
             get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
@@ -2331,7 +2331,7 @@ static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *execut
     return nullptr;
 }
 
-static void gen_assert_resume_id(CodeGen *g, IrInstruction *source_instr, ResumeId resume_id, PanicMsgId msg_id,
+static void gen_assert_resume_id(CodeGen *g, IrInstGen *source_instr, ResumeId resume_id, PanicMsgId msg_id,
         LLVMBasicBlockRef end_bb)
 {
     LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
@@ -2408,7 +2408,7 @@ static LLVMValueRef gen_maybe_atomic_op(CodeGen *g, LLVMAtomicRMWBinOp op, LLVMV
     }
 }
 
-static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
+static void gen_async_return(CodeGen *g, IrInstGenReturn *instruction) {
     LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
 
     ZigType *operand_type = (instruction->operand != nullptr) ? instruction->operand->value->type : nullptr;
@@ -2487,7 +2487,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
                     frame_index_trace_arg(g, ret_type) + 1, "");
             LLVMValueRef dest_trace_ptr = LLVMBuildLoad(g->builder, awaiter_trace_ptr_ptr, "");
             bool is_llvm_alloca;
-            LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
+            LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
             LLVMValueRef args[] = { dest_trace_ptr, my_err_trace_val };
             ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
                     get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
@@ -2502,7 +2502,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
     LLVMBuildRetVoid(g->builder);
 }
 
-static LLVMValueRef ir_render_return(CodeGen *g, IrExecutable *executable, IrInstructionReturn *instruction) {
+static LLVMValueRef ir_render_return(CodeGen *g, IrExecutableGen *executable, IrInstGenReturn *instruction) {
     if (fn_is_async(g->cur_fn)) {
         gen_async_return(g, instruction);
         return nullptr;
@@ -2843,12 +2843,12 @@ static LLVMValueRef gen_rem(CodeGen *g, bool want_runtime_safety, bool want_fast
 
 }
 
-static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutable *executable,
-        IrInstructionBinOp *bin_op_instruction)
+static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenBinOp *bin_op_instruction)
 {
     IrBinOp op_id = bin_op_instruction->op_id;
-    IrInstruction *op1 = bin_op_instruction->op1;
-    IrInstruction *op2 = bin_op_instruction->op2;
+    IrInstGen *op1 = bin_op_instruction->op1;
+    IrInstGen *op2 = bin_op_instruction->op2;
 
     ZigType *operand_type = op1->value->type;
     ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
@@ -3053,8 +3053,8 @@ static void add_error_range_check(CodeGen *g, ZigType *err_set_type, ZigType *in
     }
 }
 
-static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
-        IrInstructionResizeSlice *instruction)
+static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenResizeSlice *instruction)
 {
     ZigType *actual_type = instruction->operand->value->type;
     ZigType *wanted_type = instruction->base.value->type;
@@ -3121,8 +3121,8 @@ static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
     return result_loc;
 }
 
-static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
-        IrInstructionCast *cast_instruction)
+static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenCast *cast_instruction)
 {
     ZigType *actual_type = cast_instruction->value->value->type;
     ZigType *wanted_type = cast_instruction->base.value->type;
@@ -3199,8 +3199,8 @@ static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
     zig_unreachable();
 }
 
-static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *executable,
-        IrInstructionPtrOfArrayToSlice *instruction)
+static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenPtrOfArrayToSlice *instruction)
 {
     ZigType *actual_type = instruction->operand->value->type;
     ZigType *slice_type = instruction->base.value->type;
@@ -3236,8 +3236,8 @@ static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *ex
     return result_loc;
 }
 
-static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
-        IrInstructionPtrCastGen *instruction)
+static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenPtrCast *instruction)
 {
     ZigType *wanted_type = instruction->base.value->type;
     if (!type_has_bits(wanted_type)) {
@@ -3262,8 +3262,8 @@ static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
     return result_ptr;
 }
 
-static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
-        IrInstructionBitCastGen *instruction)
+static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenBitCast *instruction)
 {
     ZigType *wanted_type = instruction->base.value->type;
     ZigType *actual_type = instruction->operand->value->type;
@@ -3286,8 +3286,8 @@ static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
     }
 }
 
-static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executable,
-        IrInstructionWidenOrShorten *instruction)
+static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenWidenOrShorten *instruction)
 {
     ZigType *actual_type = instruction->target->value->type;
     // TODO instead of this logic, use the Noop instruction to change the type from
@@ -3303,7 +3303,7 @@ static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executa
             instruction->base.value->type, target_val);
 }
 
-static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, IrInstructionIntToPtr *instruction) {
+static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToPtr *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
     LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
 
@@ -3341,13 +3341,13 @@ static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, I
     return LLVMBuildIntToPtr(g->builder, target_val, get_llvm_type(g, wanted_type), "");
 }
 
-static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutable *executable, IrInstructionPtrToInt *instruction) {
+static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenPtrToInt *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
     LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
     return LLVMBuildPtrToInt(g->builder, target_val, get_llvm_type(g, wanted_type), "");
 }
 
-static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable, IrInstructionIntToEnum *instruction) {
+static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToEnum *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
     assert(wanted_type->id == ZigTypeIdEnum);
     ZigType *tag_int_type = wanted_type->data.enumeration.tag_int_type;
@@ -3374,7 +3374,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
     return tag_int_value;
 }
 
-static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, IrInstructionIntToErr *instruction) {
+static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToErr *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
     assert(wanted_type->id == ZigTypeIdErrorSet);
 
@@ -3391,7 +3391,7 @@ static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, I
     return gen_widen_or_shorten(g, false, actual_type, g->err_tag_type, target_val);
 }
 
-static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, IrInstructionErrToInt *instruction) {
+static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenErrToInt *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
     assert(wanted_type->id == ZigTypeIdInt);
     assert(!wanted_type->data.integral.is_signed);
@@ -3417,8 +3417,8 @@ static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, I
     }
 }
 
-static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
-        IrInstructionUnreachable *unreachable_instruction)
+static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenUnreachable *unreachable_instruction)
 {
     if (ir_want_runtime_safety(g, &unreachable_instruction->base)) {
         gen_safety_crash(g, PanicMsgIdUnreachable);
@@ -3428,8 +3428,8 @@ static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
     return nullptr;
 }
 
-static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
-        IrInstructionCondBr *cond_br_instruction)
+static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenCondBr *cond_br_instruction)
 {
     LLVMBuildCondBr(g->builder,
             ir_llvm_value(g, cond_br_instruction->condition),
@@ -3438,51 +3438,56 @@ static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
     return nullptr;
 }
 
-static LLVMValueRef ir_render_br(CodeGen *g, IrExecutable *executable, IrInstructionBr *br_instruction) {
+static LLVMValueRef ir_render_br(CodeGen *g, IrExecutableGen *executable, IrInstGenBr *br_instruction) {
     LLVMBuildBr(g->builder, br_instruction->dest_block->llvm_block);
     return nullptr;
 }
 
-static LLVMValueRef ir_render_un_op(CodeGen *g, IrExecutable *executable, IrInstructionUnOp *un_op_instruction) {
-    IrUnOp op_id = un_op_instruction->op_id;
-    LLVMValueRef expr = ir_llvm_value(g, un_op_instruction->value);
-    ZigType *operand_type = un_op_instruction->value->value->type;
-    ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
+static LLVMValueRef ir_render_binary_not(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenBinaryNot *inst)
+{
+    LLVMValueRef operand = ir_llvm_value(g, inst->operand);
+    return LLVMBuildNot(g->builder, operand, "");
+}
 
-    switch (op_id) {
-        case IrUnOpInvalid:
-        case IrUnOpOptional:
-        case IrUnOpDereference:
-            zig_unreachable();
-        case IrUnOpNegation:
-        case IrUnOpNegationWrap:
-            {
-                if (scalar_type->id == ZigTypeIdFloat) {
-                    ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, &un_op_instruction->base));
-                    return LLVMBuildFNeg(g->builder, expr, "");
-                } else if (scalar_type->id == ZigTypeIdInt) {
-                    if (op_id == IrUnOpNegationWrap) {
-                        return LLVMBuildNeg(g->builder, expr, "");
-                    } else if (ir_want_runtime_safety(g, &un_op_instruction->base)) {
-                        LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(expr));
-                        return gen_overflow_op(g, operand_type, AddSubMulSub, zero, expr);
-                    } else if (scalar_type->data.integral.is_signed) {
-                        return LLVMBuildNSWNeg(g->builder, expr, "");
-                    } else {
-                        return LLVMBuildNUWNeg(g->builder, expr, "");
-                    }
-                } else {
-                    zig_unreachable();
-                }
-            }
-        case IrUnOpBinNot:
-            return LLVMBuildNot(g->builder, expr, "");
+static LLVMValueRef ir_gen_negation(CodeGen *g, IrInstGen *inst, IrInstGen *operand, bool wrapping) {
+    LLVMValueRef llvm_operand = ir_llvm_value(g, operand);
+    ZigType *operand_type = operand->value->type;
+    ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
+        operand_type->data.vector.elem_type : operand_type;
+
+    if (scalar_type->id == ZigTypeIdFloat) {
+        ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, inst));
+        return LLVMBuildFNeg(g->builder, llvm_operand, "");
+    } else if (scalar_type->id == ZigTypeIdInt) {
+        if (wrapping) {
+            return LLVMBuildNeg(g->builder, llvm_operand, "");
+        } else if (ir_want_runtime_safety(g, inst)) {
+            LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(llvm_operand));
+            return gen_overflow_op(g, operand_type, AddSubMulSub, zero, llvm_operand);
+        } else if (scalar_type->data.integral.is_signed) {
+            return LLVMBuildNSWNeg(g->builder, llvm_operand, "");
+        } else {
+            return LLVMBuildNUWNeg(g->builder, llvm_operand, "");
+        }
+    } else {
+        zig_unreachable();
     }
+}
+
+static LLVMValueRef ir_render_negation(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenNegation *inst)
+{
+    return ir_gen_negation(g, &inst->base, inst->operand, false);
+}
 
-    zig_unreachable();
+static LLVMValueRef ir_render_negation_wrapping(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenNegationWrapping *inst)
+{
+    return ir_gen_negation(g, &inst->base, inst->operand, true);
 }
 
-static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutable *executable, IrInstructionBoolNot *instruction) {
+static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutableGen *executable, IrInstGenBoolNot *instruction) {
     LLVMValueRef value = ir_llvm_value(g, instruction->value);
     LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(value));
     return LLVMBuildICmp(g->builder, LLVMIntEQ, value, zero, "");
@@ -3496,14 +3501,14 @@ static void render_decl_var(CodeGen *g, ZigVar *var) {
     gen_var_debug_decl(g, var);
 }
 
-static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutable *executable, IrInstructionDeclVarGen *instruction) {
+static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutableGen *executable, IrInstGenDeclVar *instruction) {
     instruction->var->ptr_instruction = instruction->var_ptr;
     render_decl_var(g, instruction->var);
     return nullptr;
 }
 
-static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutable *executable,
-        IrInstructionLoadPtrGen *instruction)
+static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenLoadPtr *instruction)
 {
     ZigType *child_type = instruction->base.value->type;
     if (!type_has_bits(child_type))
@@ -3705,7 +3710,7 @@ static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_
     }
 }
 
-static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, IrInstructionStorePtr *instruction) {
+static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenStorePtr *instruction) {
     Error err;
 
     ZigType *ptr_type = instruction->ptr->value->type;
@@ -3715,7 +3720,7 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
         codegen_report_errors_and_exit(g);
     if (!ptr_type_has_bits)
         return nullptr;
-    if (instruction->ptr->ref_count == 0) {
+    if (instruction->ptr->base.ref_count == 0) {
         // In this case, this StorePtr instruction should be elided. Something happened like this:
         //     var t = true;
         //     const x = if (t) Num.Two else unreachable;
@@ -3737,8 +3742,8 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
     return nullptr;
 }
 
-static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *executable,
-        IrInstructionVectorStoreElem *instruction)
+static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenVectorStoreElem *instruction)
 {
     LLVMValueRef vector_ptr = ir_llvm_value(g, instruction->vector_ptr);
     LLVMValueRef index = ir_llvm_value(g, instruction->index);
@@ -3750,7 +3755,7 @@ static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *execut
     return nullptr;
 }
 
-static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrInstructionVarPtr *instruction) {
+static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenVarPtr *instruction) {
     if (instruction->base.value->special != ConstValSpecialRuntime)
         return ir_llvm_value(g, &instruction->base);
     ZigVar *var = instruction->var;
@@ -3762,8 +3767,8 @@ static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrIn
     }
 }
 
-static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
-        IrInstructionReturnPtr *instruction)
+static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenReturnPtr *instruction)
 {
     if (!type_has_bits(instruction->base.value->type))
         return nullptr;
@@ -3771,7 +3776,7 @@ static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
     return g->cur_ret_ptr;
 }
 
-static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutable *executable, IrInstructionElemPtr *instruction) {
+static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenElemPtr *instruction) {
     LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->array_ptr);
     ZigType *array_ptr_type = instruction->array_ptr->value->type;
     assert(array_ptr_type->id == ZigTypeIdPointer);
@@ -3947,7 +3952,7 @@ static void render_async_spills(CodeGen *g) {
     ZigType *frame_type = g->cur_fn->frame_type->data.frame.locals_struct;
 
     for (size_t alloca_i = 0; alloca_i < g->cur_fn->alloca_gen_list.length; alloca_i += 1) {
-        IrInstructionAllocaGen *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
+        IrInstGenAlloca *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
         if (instruction->field_index == SIZE_MAX)
             continue;
 
@@ -4014,7 +4019,7 @@ static void gen_init_stack_trace(CodeGen *g, LLVMValueRef trace_field_ptr, LLVMV
     LLVMBuildStore(g->builder, LLVMConstInt(usize_type_ref, stack_trace_ptr_count, false), addrs_len_ptr);
 }
 
-static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstructionCallGen *instruction) {
+static LLVMValueRef ir_render_call(CodeGen *g, IrExecutableGen *executable, IrInstGenCall *instruction) {
     LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
 
     LLVMValueRef fn_val;
@@ -4149,7 +4154,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
                 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, frame_result_loc,
                         frame_index_trace_arg(g, src_return_type) + 1, "");
                 bool is_llvm_alloca;
-                LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope,
+                LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope,
                         &is_llvm_alloca);
                 LLVMBuildStore(g->builder, my_err_ret_trace_val, err_ret_trace_ptr_ptr);
             }
@@ -4208,7 +4213,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
                 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
 
                 bool is_llvm_alloca;
-                gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
+                gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
             }
         }
     } else {
@@ -4217,7 +4222,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
         }
         if (prefix_arg_err_ret_stack) {
             bool is_llvm_alloca;
-            gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
+            gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
         }
     }
     FnWalk fn_walk = {};
@@ -4327,13 +4332,13 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
 
             LLVMPositionBuilderAtEnd(g->builder, call_bb);
             gen_assert_resume_id(g, &instruction->base, ResumeIdReturn, PanicMsgIdResumedAnAwaitingFn, nullptr);
-            render_async_var_decls(g, instruction->base.scope);
+            render_async_var_decls(g, instruction->base.base.scope);
 
             if (!type_has_bits(src_return_type))
                 return nullptr;
 
             if (result_loc != nullptr) {
-                if (instruction->result_loc->id == IrInstructionIdReturnPtr) {
+                if (instruction->result_loc->id == IrInstGenIdReturnPtr) {
                     instruction->base.spill = nullptr;
                     return g->cur_ret_ptr;
                 } else {
@@ -4393,8 +4398,8 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
     }
 }
 
-static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executable,
-    IrInstructionStructFieldPtr *instruction)
+static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutableGen *executable,
+    IrInstGenStructFieldPtr *instruction)
 {
     Error err;
 
@@ -4444,8 +4449,8 @@ static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executa
     return field_ptr_val;
 }
 
-static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutable *executable,
-    IrInstructionUnionFieldPtr *instruction)
+static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutableGen *executable,
+    IrInstGenUnionFieldPtr *instruction)
 {
     if (instruction->base.value->special != ConstValSpecialRuntime)
         return nullptr;
@@ -4544,8 +4549,8 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
     return SIZE_MAX;
 }
 
-static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrInstructionAsmGen *instruction) {
-    AstNode *asm_node = instruction->base.source_node;
+static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutableGen *executable, IrInstGenAsm *instruction) {
+    AstNode *asm_node = instruction->base.base.source_node;
     assert(asm_node->type == NodeTypeAsmExpr);
     AstNodeAsmExpr *asm_expr = &asm_node->data.asm_expr;
 
@@ -4629,7 +4634,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrIn
     for (size_t i = 0; i < asm_expr->input_list.length; i += 1, total_index += 1, param_index += 1) {
         AsmInput *asm_input = asm_expr->input_list.at(i);
         buf_replace(asm_input->constraint, ',', '|');
-        IrInstruction *ir_input = instruction->input_list[i];
+        IrInstGen *ir_input = instruction->input_list[i];
         buf_append_buf(&constraint_buf, asm_input->constraint);
         if (total_index + 1 < total_constraint_count) {
             buf_append_char(&constraint_buf, ',');
@@ -4692,14 +4697,14 @@ static LLVMValueRef gen_non_null_bit(CodeGen *g, ZigType *maybe_type, LLVMValueR
     return gen_load_untyped(g, maybe_field_ptr, 0, false, "");
 }
 
-static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutable *executable,
-    IrInstructionTestNonNull *instruction)
+static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutableGen *executable,
+    IrInstGenTestNonNull *instruction)
 {
     return gen_non_null_bit(g, instruction->value->value->type, ir_llvm_value(g, instruction->value));
 }
 
-static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *executable,
-        IrInstructionOptionalUnwrapPtr *instruction)
+static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenOptionalUnwrapPtr *instruction)
 {
     if (instruction->base.value->special != ConstValSpecialRuntime)
         return nullptr;
@@ -4801,7 +4806,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFn
     return fn_val;
 }
 
-static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstructionClz *instruction) {
+static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutableGen *executable, IrInstGenClz *instruction) {
     ZigType *int_type = instruction->op->value->type;
     LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdClz);
     LLVMValueRef operand = ir_llvm_value(g, instruction->op);
@@ -4813,7 +4818,7 @@ static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstru
     return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
 }
 
-static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstructionCtz *instruction) {
+static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutableGen *executable, IrInstGenCtz *instruction) {
     ZigType *int_type = instruction->op->value->type;
     LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdCtz);
     LLVMValueRef operand = ir_llvm_value(g, instruction->op);
@@ -4825,7 +4830,7 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru
     return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
 }
 
-static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executable, IrInstructionShuffleVector *instruction) {
+static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutableGen *executable, IrInstGenShuffleVector *instruction) {
     uint64_t len_a = instruction->a->value->type->data.vector.len;
     uint64_t len_mask = instruction->mask->value->type->data.vector.len;
 
@@ -4834,7 +4839,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
     // when changing code, so Zig uses negative numbers to index the
     // second vector. These start at -1 and go down, and are easiest to use
     // with the ~ operator. Here we convert between the two formats.
-    IrInstruction *mask = instruction->mask;
+    IrInstGen *mask = instruction->mask;
     LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);
     for (uint64_t i = 0; i < len_mask; i++) {
         if (mask->value->data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {
@@ -4855,7 +4860,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
         llvm_mask_value, "");
 }
 
-static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {
+static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutableGen *executable, IrInstGenSplat *instruction) {
     ZigType *result_type = instruction->base.value->type;
     ir_assert(result_type->id == ZigTypeIdVector, &instruction->base);
     uint32_t len = result_type->data.vector.len;
@@ -4867,7 +4872,7 @@ static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInst
     return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
 }
 
-static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {
+static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutableGen *executable, IrInstGenPopCount *instruction) {
     ZigType *int_type = instruction->op->value->type;
     LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);
     LLVMValueRef operand = ir_llvm_value(g, instruction->op);
@@ -4875,7 +4880,7 @@ static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, Ir
     return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
 }
 
-static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, IrInstructionSwitchBr *instruction) {
+static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutableGen *executable, IrInstGenSwitchBr *instruction) {
     ZigType *target_type = instruction->target_value->value->type;
     LLVMBasicBlockRef else_block = instruction->else_block->llvm_block;
 
@@ -4889,7 +4894,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
                                                 (unsigned)instruction->case_count);
 
     for (size_t i = 0; i < instruction->case_count; i += 1) {
-        IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
+        IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
 
         LLVMValueRef case_value = ir_llvm_value(g, this_case->value);
         if (target_type->id == ZigTypeIdPointer) {
@@ -4903,7 +4908,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
     return nullptr;
 }
 
-static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstructionPhi *instruction) {
+static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutableGen *executable, IrInstGenPhi *instruction) {
     if (!type_has_bits(instruction->base.value->type))
         return nullptr;
 
@@ -4925,7 +4930,7 @@ static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstru
     return phi;
 }
 
-static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstructionRefGen *instruction) {
+static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutableGen *executable, IrInstGenRef *instruction) {
     if (!type_has_bits(instruction->base.value->type)) {
         return nullptr;
     }
@@ -4939,7 +4944,7 @@ static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstru
     }
 }
 
-static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutable *executable, IrInstructionErrName *instruction) {
+static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutableGen *executable, IrInstGenErrName *instruction) {
     assert(g->generate_error_name_table);
 
     if (g->errors_by_index.length == 1) {
@@ -5060,13 +5065,13 @@ static LLVMValueRef get_enum_tag_name_function(CodeGen *g, ZigType *enum_type) {
     return fn_val;
 }
 
-static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable,
-        IrInstructionTagName *instruction)
+static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenTagName *instruction)
 {
     ZigType *enum_type = instruction->target->value->type;
     assert(enum_type->id == ZigTypeIdEnum);
     if (enum_type->data.enumeration.non_exhaustive) {
-        add_node_error(g, instruction->base.source_node,
+        add_node_error(g, instruction->base.base.source_node,
             buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
         codegen_report_errors_and_exit(g);
     }
@@ -5078,8 +5083,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
             get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
 }
 
-static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executable,
-        IrInstructionFieldParentPtr *instruction)
+static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenFieldParentPtr *instruction)
 {
     ZigType *container_ptr_type = instruction->base.value->type;
     assert(container_ptr_type->id == ZigTypeIdPointer);
@@ -5105,7 +5110,7 @@ static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executa
     }
 }
 
-static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, IrInstructionAlignCast *instruction) {
+static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutableGen *executable, IrInstGenAlignCast *instruction) {
     LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
     assert(target_val);
 
@@ -5168,11 +5173,11 @@ static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, I
     return target_val;
 }
 
-static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutable *executable,
-        IrInstructionErrorReturnTrace *instruction)
+static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenErrorReturnTrace *instruction)
 {
     bool is_llvm_alloca;
-    LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
+    LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
     if (cur_err_ret_trace_val == nullptr) {
         return LLVMConstNull(get_llvm_type(g, ptr_to_stack_trace_type(g)));
     }
@@ -5210,7 +5215,7 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool
     zig_unreachable();
 }
 
-static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrInstructionCmpxchgGen *instruction) {
+static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, IrInstGenCmpxchg *instruction) {
     LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);
     LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);
     LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
@@ -5251,13 +5256,13 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrIn
     return result_loc;
 }
 
-static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutable *executable, IrInstructionFence *instruction) {
+static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutableGen *executable, IrInstGenFence *instruction) {
     LLVMAtomicOrdering atomic_order = to_LLVMAtomicOrdering(instruction->order);
     LLVMBuildFence(g->builder, atomic_order, false, "");
     return nullptr;
 }
 
-static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrInstructionTruncate *instruction) {
+static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutableGen *executable, IrInstGenTruncate *instruction) {
     LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
     ZigType *dest_type = instruction->base.value->type;
     ZigType *src_type = instruction->target->value->type;
@@ -5272,7 +5277,7 @@ static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrI
     }
 }
 
-static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrInstructionMemset *instruction) {
+static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutableGen *executable, IrInstGenMemset *instruction) {
     LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
     LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
 
@@ -5284,7 +5289,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
 
     bool val_is_undef = value_is_all_undef(g, instruction->byte->value);
     LLVMValueRef fill_char;
-    if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.scope)) {
+    if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.base.scope)) {
         fill_char = LLVMConstInt(LLVMInt8Type(), 0xaa, false);
     } else {
         fill_char = ir_llvm_value(g, instruction->byte);
@@ -5298,7 +5303,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
     return nullptr;
 }
 
-static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrInstructionMemcpy *instruction) {
+static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutableGen *executable, IrInstGenMemcpy *instruction) {
     LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
     LLVMValueRef src_ptr = ir_llvm_value(g, instruction->src_ptr);
     LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
@@ -5320,7 +5325,7 @@ static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrIns
     return nullptr;
 }
 
-static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutable *executable, IrInstructionSliceGen *instruction) {
+static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrInstGenSlice *instruction) {
     LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->ptr);
     ZigType *array_ptr_type = instruction->ptr->value->type;
     assert(array_ptr_type->id == ZigTypeIdPointer);
@@ -5482,13 +5487,13 @@ static LLVMValueRef get_trap_fn_val(CodeGen *g) {
 }
 
 
-static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutable *executable, IrInstructionBreakpoint *instruction) {
+static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutableGen *executable, IrInstGenBreakpoint *instruction) {
     LLVMBuildCall(g->builder, get_trap_fn_val(g), nullptr, 0, "");
     return nullptr;
 }
 
-static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutable *executable,
-        IrInstructionReturnAddress *instruction)
+static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenReturnAddress *instruction)
 {
     LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
     LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_return_address_fn_val(g), &zero, 1, "");
@@ -5509,19 +5514,19 @@ static LLVMValueRef get_frame_address_fn_val(CodeGen *g) {
     return g->frame_address_fn_val;
 }
 
-static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutable *executable,
-        IrInstructionFrameAddress *instruction)
+static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenFrameAddress *instruction)
 {
     LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
     LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_frame_address_fn_val(g), &zero, 1, "");
     return LLVMBuildPtrToInt(g->builder, ptr_val, g->builtin_types.entry_usize->llvm_type, "");
 }
 
-static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutable *executable, IrInstructionFrameHandle *instruction) {
+static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutableGen *executable, IrInstGenFrameHandle *instruction) {
     return g->cur_frame_ptr;
 }
 
-static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp *instruction) {
+static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstGenOverflowOp *instruction) {
     ZigType *int_type = instruction->result_ptr_type;
     assert(int_type->id == ZigTypeIdInt);
 
@@ -5546,7 +5551,7 @@ static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp
     return overflow_bit;
 }
 
-static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable, IrInstructionOverflowOp *instruction) {
+static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutableGen *executable, IrInstGenOverflowOp *instruction) {
     AddSubMul add_sub_mul;
     switch (instruction->op) {
         case IrOverflowOpAdd:
@@ -5584,7 +5589,7 @@ static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable,
     return overflow_bit;
 }
 
-static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrInstructionTestErrGen *instruction) {
+static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutableGen *executable, IrInstGenTestErr *instruction) {
     ZigType *err_union_type = instruction->err_union->value->type;
     ZigType *payload_type = err_union_type->data.error_union.payload_type;
     LLVMValueRef err_union_handle = ir_llvm_value(g, instruction->err_union);
@@ -5601,8 +5606,8 @@ static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrI
     return LLVMBuildICmp(g->builder, LLVMIntNE, err_val, zero, "");
 }
 
-static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executable,
-        IrInstructionUnwrapErrCode *instruction)
+static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenUnwrapErrCode *instruction)
 {
     if (instruction->base.value->special != ConstValSpecialRuntime)
         return nullptr;
@@ -5621,8 +5626,8 @@ static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executab
     }
 }
 
-static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *executable,
-        IrInstructionUnwrapErrPayload *instruction)
+static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenUnwrapErrPayload *instruction)
 {
     Error err;
 
@@ -5665,7 +5670,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
         LLVMBuildCondBr(g->builder, cond_val, ok_block, err_block);
 
         LLVMPositionBuilderAtEnd(g->builder, err_block);
-        gen_safety_crash_for_err(g, err_val, instruction->base.scope);
+        gen_safety_crash_for_err(g, err_val, instruction->base.base.scope);
 
         LLVMPositionBuilderAtEnd(g->builder, ok_block);
     }
@@ -5682,7 +5687,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
     }
 }
 
-static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable, IrInstructionOptionalWrap *instruction) {
+static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutableGen *executable, IrInstGenOptionalWrap *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
 
     assert(wanted_type->id == ZigTypeIdOptional);
@@ -5718,7 +5723,7 @@ static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable
     return result_loc;
 }
 
-static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapCode *instruction) {
+static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapCode *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
 
     assert(wanted_type->id == ZigTypeIdErrorUnion);
@@ -5738,7 +5743,7 @@ static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable
     return result_loc;
 }
 
-static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapPayload *instruction) {
+static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapPayload *instruction) {
     ZigType *wanted_type = instruction->base.value->type;
 
     assert(wanted_type->id == ZigTypeIdErrorUnion);
@@ -5769,7 +5774,7 @@ static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executa
     return result_loc;
 }
 
-static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, IrInstructionUnionTag *instruction) {
+static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutableGen *executable, IrInstGenUnionTag *instruction) {
     ZigType *union_type = instruction->value->value->type;
 
     ZigType *tag_type = union_type->data.unionation.tag_type;
@@ -5787,15 +5792,15 @@ static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, Ir
     return get_handle_value(g, tag_field_ptr, tag_type, ptr_type);
 }
 
-static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutable *executable, IrInstructionPanic *instruction) {
+static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutableGen *executable, IrInstGenPanic *instruction) {
     bool is_llvm_alloca;
-    LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
+    LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
     gen_panic(g, ir_llvm_value(g, instruction->msg), err_ret_trace_val, is_llvm_alloca);
     return nullptr;
 }
 
-static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
-        IrInstructionAtomicRmw *instruction)
+static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenAtomicRmw *instruction)
 {
     bool is_signed;
     ZigType *operand_type = instruction->operand->value->type;
@@ -5805,8 +5810,8 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
     } else {
         is_signed = false;
     }
-    enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->resolved_op, is_signed, is_float);
-    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
+    enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
+    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
     LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
     LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
 
@@ -5823,20 +5828,20 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
     return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
 }
 
-static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutable *executable,
-        IrInstructionAtomicLoad *instruction)
+static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenAtomicLoad *instruction)
 {
-    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
+    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
     LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
     LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
     LLVMSetOrdering(load_inst, ordering);
     return load_inst;
 }
 
-static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
-        IrInstructionAtomicStore *instruction)
+static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenAtomicStore *instruction)
 {
-    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
+    LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
     LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
     LLVMValueRef value = ir_llvm_value(g, instruction->value);
     LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
@@ -5844,13 +5849,13 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
     return nullptr;
 }
 
-static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutable *executable, IrInstructionFloatOp *instruction) {
+static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutableGen *executable, IrInstGenFloatOp *instruction) {
     LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
     LLVMValueRef fn_val = get_float_fn(g, instruction->base.value->type, ZigLLVMFnIdFloatOp, instruction->fn_id);
     return LLVMBuildCall(g->builder, fn_val, &operand, 1, "");
 }
 
-static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrInstructionMulAdd *instruction) {
+static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutableGen *executable, IrInstGenMulAdd *instruction) {
     LLVMValueRef op1 = ir_llvm_value(g, instruction->op1);
     LLVMValueRef op2 = ir_llvm_value(g, instruction->op2);
     LLVMValueRef op3 = ir_llvm_value(g, instruction->op3);
@@ -5865,7 +5870,7 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn
     return LLVMBuildCall(g->builder, fn_val, args, 3, "");
 }
 
-static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInstructionBswap *instruction) {
+static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutableGen *executable, IrInstGenBswap *instruction) {
     LLVMValueRef op = ir_llvm_value(g, instruction->op);
     ZigType *expr_type = instruction->base.value->type;
     bool is_vector = expr_type->id == ZigTypeIdVector;
@@ -5899,7 +5904,7 @@ static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInst
     return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");
 }
 
-static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable, IrInstructionBitReverse *instruction) {
+static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutableGen *executable, IrInstGenBitReverse *instruction) {
     LLVMValueRef op = ir_llvm_value(g, instruction->op);
     ZigType *int_type = instruction->base.value->type;
     assert(int_type->id == ZigTypeIdInt);
@@ -5907,8 +5912,8 @@ static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable,
     return LLVMBuildCall(g->builder, fn_val, &op, 1, "");
 }
 
-static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executable,
-        IrInstructionVectorToArray *instruction)
+static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenVectorToArray *instruction)
 {
     ZigType *array_type = instruction->base.value->type;
     assert(array_type->id == ZigTypeIdArray);
@@ -5941,8 +5946,8 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab
     return result_loc;
 }
 
-static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executable,
-        IrInstructionArrayToVector *instruction)
+static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenArrayToVector *instruction)
 {
     ZigType *vector_type = instruction->base.value->type;
     assert(vector_type->id == ZigTypeIdVector);
@@ -5978,8 +5983,8 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab
     }
 }
 
-static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
-        IrInstructionAssertZero *instruction)
+static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenAssertZero *instruction)
 {
     LLVMValueRef target = ir_llvm_value(g, instruction->target);
     ZigType *int_type = instruction->target->value->type;
@@ -5989,8 +5994,8 @@ static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
     return nullptr;
 }
 
-static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executable,
-        IrInstructionAssertNonNull *instruction)
+static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenAssertNonNull *instruction)
 {
     LLVMValueRef target = ir_llvm_value(g, instruction->target);
     ZigType *target_type = instruction->target->value->type;
@@ -6014,8 +6019,8 @@ static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executab
     return nullptr;
 }
 
-static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable,
-        IrInstructionSuspendBegin *instruction)
+static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenSuspendBegin *instruction)
 {
     if (fn_is_async(g->cur_fn)) {
         instruction->resume_bb = gen_suspend_begin(g, "SuspendResume");
@@ -6023,8 +6028,8 @@ static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable
     return nullptr;
 }
 
-static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executable,
-        IrInstructionSuspendFinish *instruction)
+static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenSuspendFinish *instruction)
 {
     LLVMBuildRetVoid(g->builder);
 
@@ -6032,11 +6037,11 @@ static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executabl
     if (ir_want_runtime_safety(g, &instruction->base)) {
         LLVMBuildStore(g->builder, g->cur_bad_not_suspended_index, g->cur_async_resume_index_ptr);
     }
-    render_async_var_decls(g, instruction->base.scope);
+    render_async_var_decls(g, instruction->base.base.scope);
     return nullptr;
 }
 
-static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
+static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
         LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
         LLVMValueRef result_loc, bool non_async)
 {
@@ -6062,7 +6067,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
                 frame_index_trace_arg(g, result_type), "");
         LLVMValueRef src_trace_ptr = LLVMBuildLoad(g->builder, their_trace_ptr_ptr, "");
         bool is_llvm_alloca;
-        LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->scope, &is_llvm_alloca);
+        LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->base.scope, &is_llvm_alloca);
         LLVMValueRef args[] = { dest_trace_ptr, src_trace_ptr };
         ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
                 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
@@ -6075,7 +6080,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
     }
 }
 
-static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInstructionAwaitGen *instruction) {
+static LLVMValueRef ir_render_await(CodeGen *g, IrExecutableGen *executable, IrInstGenAwait *instruction) {
     LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
     LLVMValueRef zero = LLVMConstNull(usize_type_ref);
     LLVMValueRef target_frame_ptr = ir_llvm_value(g, instruction->frame);
@@ -6112,7 +6117,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
     // supply the error return trace pointer
     if (codegen_fn_has_err_ret_tracing_arg(g, result_type)) {
         bool is_llvm_alloca;
-        LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
+        LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
         assert(my_err_ret_trace_val != nullptr);
         LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, target_frame_ptr,
                 frame_index_trace_arg(g, result_type) + 1, "");
@@ -6160,7 +6165,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
     return nullptr;
 }
 
-static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrInstructionResume *instruction) {
+static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutableGen *executable, IrInstGenResume *instruction) {
     LLVMValueRef frame = ir_llvm_value(g, instruction->frame);
     ZigType *frame_type = instruction->frame->value->type;
     assert(frame_type->id == ZigTypeIdAnyFrame);
@@ -6169,15 +6174,15 @@ static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrIns
     return nullptr;
 }
 
-static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutable *executable,
-        IrInstructionFrameSizeGen *instruction)
+static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenFrameSize *instruction)
 {
     LLVMValueRef fn_val = ir_llvm_value(g, instruction->fn);
     return gen_frame_size(g, fn_val);
 }
 
-static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
-        IrInstructionSpillBegin *instruction)
+static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenSpillBegin *instruction)
 {
     if (!fn_is_async(g->cur_fn))
         return nullptr;
@@ -6196,7 +6201,7 @@ static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
     zig_unreachable();
 }
 
-static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, IrInstructionSpillEnd *instruction) {
+static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutableGen *executable, IrInstGenSpillEnd *instruction) {
     if (!fn_is_async(g->cur_fn))
         return ir_llvm_value(g, instruction->begin->operand);
 
@@ -6212,17 +6217,17 @@ static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, Ir
     zig_unreachable();
 }
 
-static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutable *executable,
-        IrInstructionVectorExtractElem *instruction)
+static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutableGen *executable,
+        IrInstGenVectorExtractElem *instruction)
 {
     LLVMValueRef vector = ir_llvm_value(g, instruction->vector);
     LLVMValueRef index = ir_llvm_value(g, instruction->index);
     return LLVMBuildExtractElement(g->builder, vector, index, "");
 }
 
-static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
-    AstNode *source_node = instruction->source_node;
-    Scope *scope = instruction->scope;
+static void set_debug_location(CodeGen *g, IrInstGen *instruction) {
+    AstNode *source_node = instruction->base.source_node;
+    Scope *scope = instruction->base.scope;
 
     assert(source_node);
     assert(scope);
@@ -6231,263 +6236,183 @@ static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
             (int)source_node->column + 1, get_di_scope(g, scope));
 }
 
-static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, IrInstruction *instruction) {
+static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutableGen *executable, IrInstGen *instruction) {
     switch (instruction->id) {
-        case IrInstructionIdInvalid:
-        case IrInstructionIdConst:
-        case IrInstructionIdTypeOf:
-        case IrInstructionIdFieldPtr:
-        case IrInstructionIdSetCold:
-        case IrInstructionIdSetRuntimeSafety:
-        case IrInstructionIdSetFloatMode:
-        case IrInstructionIdArrayType:
-        case IrInstructionIdAnyFrameType:
-        case IrInstructionIdSliceType:
-        case IrInstructionIdSizeOf:
-        case IrInstructionIdSwitchTarget:
-        case IrInstructionIdContainerInitFields:
-        case IrInstructionIdCompileErr:
-        case IrInstructionIdCompileLog:
-        case IrInstructionIdImport:
-        case IrInstructionIdCImport:
-        case IrInstructionIdCInclude:
-        case IrInstructionIdCDefine:
-        case IrInstructionIdCUndef:
-        case IrInstructionIdEmbedFile:
-        case IrInstructionIdIntType:
-        case IrInstructionIdVectorType:
-        case IrInstructionIdMemberCount:
-        case IrInstructionIdMemberType:
-        case IrInstructionIdMemberName:
-        case IrInstructionIdAlignOf:
-        case IrInstructionIdFnProto:
-        case IrInstructionIdTestComptime:
-        case IrInstructionIdCheckSwitchProngs:
-        case IrInstructionIdCheckStatementIsVoid:
-        case IrInstructionIdTypeName:
-        case IrInstructionIdDeclRef:
-        case IrInstructionIdSwitchVar:
-        case IrInstructionIdSwitchElseVar:
-        case IrInstructionIdByteOffsetOf:
-        case IrInstructionIdBitOffsetOf:
-        case IrInstructionIdTypeInfo:
-        case IrInstructionIdType:
-        case IrInstructionIdHasField:
-        case IrInstructionIdTypeId:
-        case IrInstructionIdSetEvalBranchQuota:
-        case IrInstructionIdPtrType:
-        case IrInstructionIdOpaqueType:
-        case IrInstructionIdSetAlignStack:
-        case IrInstructionIdArgType:
-        case IrInstructionIdTagType:
-        case IrInstructionIdExport:
-        case IrInstructionIdErrorUnion:
-        case IrInstructionIdAddImplicitReturnType:
-        case IrInstructionIdIntCast:
-        case IrInstructionIdFloatCast:
-        case IrInstructionIdIntToFloat:
-        case IrInstructionIdFloatToInt:
-        case IrInstructionIdBoolToInt:
-        case IrInstructionIdErrSetCast:
-        case IrInstructionIdFromBytes:
-        case IrInstructionIdToBytes:
-        case IrInstructionIdEnumToInt:
-        case IrInstructionIdCheckRuntimeScope:
-        case IrInstructionIdDeclVarSrc:
-        case IrInstructionIdPtrCastSrc:
-        case IrInstructionIdCmpxchgSrc:
-        case IrInstructionIdLoadPtr:
-        case IrInstructionIdHasDecl:
-        case IrInstructionIdUndeclaredIdent:
-        case IrInstructionIdCallExtra:
-        case IrInstructionIdCallSrc:
-        case IrInstructionIdCallSrcArgs:
-        case IrInstructionIdAllocaSrc:
-        case IrInstructionIdEndExpr:
-        case IrInstructionIdImplicitCast:
-        case IrInstructionIdResolveResult:
-        case IrInstructionIdResetResult:
-        case IrInstructionIdContainerInitList:
-        case IrInstructionIdSliceSrc:
-        case IrInstructionIdRef:
-        case IrInstructionIdBitCastSrc:
-        case IrInstructionIdTestErrSrc:
-        case IrInstructionIdUnionInitNamedField:
-        case IrInstructionIdFrameType:
-        case IrInstructionIdFrameSizeSrc:
-        case IrInstructionIdAllocaGen:
-        case IrInstructionIdAwaitSrc:
-        case IrInstructionIdSplatSrc:
-        case IrInstructionIdMergeErrSets:
-        case IrInstructionIdAsmSrc:
+        case IrInstGenIdInvalid:
+        case IrInstGenIdConst:
+        case IrInstGenIdAlloca:
             zig_unreachable();
 
-        case IrInstructionIdDeclVarGen:
-            return ir_render_decl_var(g, executable, (IrInstructionDeclVarGen *)instruction);
-        case IrInstructionIdReturn:
-            return ir_render_return(g, executable, (IrInstructionReturn *)instruction);
-        case IrInstructionIdBinOp:
-            return ir_render_bin_op(g, executable, (IrInstructionBinOp *)instruction);
-        case IrInstructionIdCast:
-            return ir_render_cast(g, executable, (IrInstructionCast *)instruction);
-        case IrInstructionIdUnreachable:
-            return ir_render_unreachable(g, executable, (IrInstructionUnreachable *)instruction);
-        case IrInstructionIdCondBr:
-            return ir_render_cond_br(g, executable, (IrInstructionCondBr *)instruction);
-        case IrInstructionIdBr:
-            return ir_render_br(g, executable, (IrInstructionBr *)instruction);
-        case IrInstructionIdUnOp:
-            return ir_render_un_op(g, executable, (IrInstructionUnOp *)instruction);
-        case IrInstructionIdLoadPtrGen:
-            return ir_render_load_ptr(g, executable, (IrInstructionLoadPtrGen *)instruction);
-        case IrInstructionIdStorePtr:
-            return ir_render_store_ptr(g, executable, (IrInstructionStorePtr *)instruction);
-        case IrInstructionIdVectorStoreElem:
-            return ir_render_vector_store_elem(g, executable, (IrInstructionVectorStoreElem *)instruction);
-        case IrInstructionIdVarPtr:
-            return ir_render_var_ptr(g, executable, (IrInstructionVarPtr *)instruction);
-        case IrInstructionIdReturnPtr:
-            return ir_render_return_ptr(g, executable, (IrInstructionReturnPtr *)instruction);
-        case IrInstructionIdElemPtr:
-            return ir_render_elem_ptr(g, executable, (IrInstructionElemPtr *)instruction);
-        case IrInstructionIdCallGen:
-            return ir_render_call(g, executable, (IrInstructionCallGen *)instruction);
-        case IrInstructionIdStructFieldPtr:
-            return ir_render_struct_field_ptr(g, executable, (IrInstructionStructFieldPtr *)instruction);
-        case IrInstructionIdUnionFieldPtr:
-            return ir_render_union_field_ptr(g, executable, (IrInstructionUnionFieldPtr *)instruction);
-        case IrInstructionIdAsmGen:
-            return ir_render_asm_gen(g, executable, (IrInstructionAsmGen *)instruction);
-        case IrInstructionIdTestNonNull:
-            return ir_render_test_non_null(g, executable, (IrInstructionTestNonNull *)instruction);
-        case IrInstructionIdOptionalUnwrapPtr:
-            return ir_render_optional_unwrap_ptr(g, executable, (IrInstructionOptionalUnwrapPtr *)instruction);
-        case IrInstructionIdClz:
-            return ir_render_clz(g, executable, (IrInstructionClz *)instruction);
-        case IrInstructionIdCtz:
-            return ir_render_ctz(g, executable, (IrInstructionCtz *)instruction);
-        case IrInstructionIdPopCount:
-            return ir_render_pop_count(g, executable, (IrInstructionPopCount *)instruction);
-        case IrInstructionIdSwitchBr:
-            return ir_render_switch_br(g, executable, (IrInstructionSwitchBr *)instruction);
-        case IrInstructionIdBswap:
-            return ir_render_bswap(g, executable, (IrInstructionBswap *)instruction);
-        case IrInstructionIdBitReverse:
-            return ir_render_bit_reverse(g, executable, (IrInstructionBitReverse *)instruction);
-        case IrInstructionIdPhi:
-            return ir_render_phi(g, executable, (IrInstructionPhi *)instruction);
-        case IrInstructionIdRefGen:
-            return ir_render_ref(g, executable, (IrInstructionRefGen *)instruction);
-        case IrInstructionIdErrName:
-            return ir_render_err_name(g, executable, (IrInstructionErrName *)instruction);
-        case IrInstructionIdCmpxchgGen:
-            return ir_render_cmpxchg(g, executable, (IrInstructionCmpxchgGen *)instruction);
-        case IrInstructionIdFence:
-            return ir_render_fence(g, executable, (IrInstructionFence *)instruction);
-        case IrInstructionIdTruncate:
-            return ir_render_truncate(g, executable, (IrInstructionTruncate *)instruction);
-        case IrInstructionIdBoolNot:
-            return ir_render_bool_not(g, executable, (IrInstructionBoolNot *)instruction);
-        case IrInstructionIdMemset:
-            return ir_render_memset(g, executable, (IrInstructionMemset *)instruction);
-        case IrInstructionIdMemcpy:
-            return ir_render_memcpy(g, executable, (IrInstructionMemcpy *)instruction);
-        case IrInstructionIdSliceGen:
-            return ir_render_slice(g, executable, (IrInstructionSliceGen *)instruction);
-        case IrInstructionIdBreakpoint:
-            return ir_render_breakpoint(g, executable, (IrInstructionBreakpoint *)instruction);
-        case IrInstructionIdReturnAddress:
-            return ir_render_return_address(g, executable, (IrInstructionReturnAddress *)instruction);
-        case IrInstructionIdFrameAddress:
-            return ir_render_frame_address(g, executable, (IrInstructionFrameAddress *)instruction);
-        case IrInstructionIdFrameHandle:
-            return ir_render_handle(g, executable, (IrInstructionFrameHandle *)instruction);
-        case IrInstructionIdOverflowOp:
-            return ir_render_overflow_op(g, executable, (IrInstructionOverflowOp *)instruction);
-        case IrInstructionIdTestErrGen:
-            return ir_render_test_err(g, executable, (IrInstructionTestErrGen *)instruction);
-        case IrInstructionIdUnwrapErrCode:
-            return ir_render_unwrap_err_code(g, executable, (IrInstructionUnwrapErrCode *)instruction);
-        case IrInstructionIdUnwrapErrPayload:
-            return ir_render_unwrap_err_payload(g, executable, (IrInstructionUnwrapErrPayload *)instruction);
-        case IrInstructionIdOptionalWrap:
-            return ir_render_optional_wrap(g, executable, (IrInstructionOptionalWrap *)instruction);
-        case IrInstructionIdErrWrapCode:
-            return ir_render_err_wrap_code(g, executable, (IrInstructionErrWrapCode *)instruction);
-        case IrInstructionIdErrWrapPayload:
-            return ir_render_err_wrap_payload(g, executable, (IrInstructionErrWrapPayload *)instruction);
-        case IrInstructionIdUnionTag:
-            return ir_render_union_tag(g, executable, (IrInstructionUnionTag *)instruction);
-        case IrInstructionIdPtrCastGen:
-            return ir_render_ptr_cast(g, executable, (IrInstructionPtrCastGen *)instruction);
-        case IrInstructionIdBitCastGen:
-            return ir_render_bit_cast(g, executable, (IrInstructionBitCastGen *)instruction);
-        case IrInstructionIdWidenOrShorten:
-            return ir_render_widen_or_shorten(g, executable, (IrInstructionWidenOrShorten *)instruction);
-        case IrInstructionIdPtrToInt:
-            return ir_render_ptr_to_int(g, executable, (IrInstructionPtrToInt *)instruction);
-        case IrInstructionIdIntToPtr:
-            return ir_render_int_to_ptr(g, executable, (IrInstructionIntToPtr *)instruction);
-        case IrInstructionIdIntToEnum:
-            return ir_render_int_to_enum(g, executable, (IrInstructionIntToEnum *)instruction);
-        case IrInstructionIdIntToErr:
-            return ir_render_int_to_err(g, executable, (IrInstructionIntToErr *)instruction);
-        case IrInstructionIdErrToInt:
-            return ir_render_err_to_int(g, executable, (IrInstructionErrToInt *)instruction);
-        case IrInstructionIdPanic:
-            return ir_render_panic(g, executable, (IrInstructionPanic *)instruction);
-        case IrInstructionIdTagName:
-            return ir_render_enum_tag_name(g, executable, (IrInstructionTagName *)instruction);
-        case IrInstructionIdFieldParentPtr:
-            return ir_render_field_parent_ptr(g, executable, (IrInstructionFieldParentPtr *)instruction);
-        case IrInstructionIdAlignCast:
-            return ir_render_align_cast(g, executable, (IrInstructionAlignCast *)instruction);
-        case IrInstructionIdErrorReturnTrace:
-            return ir_render_error_return_trace(g, executable, (IrInstructionErrorReturnTrace *)instruction);
-        case IrInstructionIdAtomicRmw:
-            return ir_render_atomic_rmw(g, executable, (IrInstructionAtomicRmw *)instruction);
-        case IrInstructionIdAtomicLoad:
-            return ir_render_atomic_load(g, executable, (IrInstructionAtomicLoad *)instruction);
-        case IrInstructionIdAtomicStore:
-            return ir_render_atomic_store(g, executable, (IrInstructionAtomicStore *)instruction);
-        case IrInstructionIdSaveErrRetAddr:
-            return ir_render_save_err_ret_addr(g, executable, (IrInstructionSaveErrRetAddr *)instruction);
-        case IrInstructionIdFloatOp:
-            return ir_render_float_op(g, executable, (IrInstructionFloatOp *)instruction);
-        case IrInstructionIdMulAdd:
-            return ir_render_mul_add(g, executable, (IrInstructionMulAdd *)instruction);
-        case IrInstructionIdArrayToVector:
-            return ir_render_array_to_vector(g, executable, (IrInstructionArrayToVector *)instruction);
-        case IrInstructionIdVectorToArray:
-            return ir_render_vector_to_array(g, executable, (IrInstructionVectorToArray *)instruction);
-        case IrInstructionIdAssertZero:
-            return ir_render_assert_zero(g, executable, (IrInstructionAssertZero *)instruction);
-        case IrInstructionIdAssertNonNull:
-            return ir_render_assert_non_null(g, executable, (IrInstructionAssertNonNull *)instruction);
-        case IrInstructionIdResizeSlice:
-            return ir_render_resize_slice(g, executable, (IrInstructionResizeSlice *)instruction);
-        case IrInstructionIdPtrOfArrayToSlice:
-            return ir_render_ptr_of_array_to_slice(g, executable, (IrInstructionPtrOfArrayToSlice *)instruction);
-        case IrInstructionIdSuspendBegin:
-            return ir_render_suspend_begin(g, executable, (IrInstructionSuspendBegin *)instruction);
-        case IrInstructionIdSuspendFinish:
-            return ir_render_suspend_finish(g, executable, (IrInstructionSuspendFinish *)instruction);
-        case IrInstructionIdResume:
-            return ir_render_resume(g, executable, (IrInstructionResume *)instruction);
-        case IrInstructionIdFrameSizeGen:
-            return ir_render_frame_size(g, executable, (IrInstructionFrameSizeGen *)instruction);
-        case IrInstructionIdAwaitGen:
-            return ir_render_await(g, executable, (IrInstructionAwaitGen *)instruction);
-        case IrInstructionIdSpillBegin:
-            return ir_render_spill_begin(g, executable, (IrInstructionSpillBegin *)instruction);
-        case IrInstructionIdSpillEnd:
-            return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);
-        case IrInstructionIdShuffleVector:
-            return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);
-        case IrInstructionIdSplatGen:
-            return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);
-        case IrInstructionIdVectorExtractElem:
-            return ir_render_vector_extract_elem(g, executable, (IrInstructionVectorExtractElem *) instruction);
+        case IrInstGenIdDeclVar:
+            return ir_render_decl_var(g, executable, (IrInstGenDeclVar *)instruction);
+        case IrInstGenIdReturn:
+            return ir_render_return(g, executable, (IrInstGenReturn *)instruction);
+        case IrInstGenIdBinOp:
+            return ir_render_bin_op(g, executable, (IrInstGenBinOp *)instruction);
+        case IrInstGenIdCast:
+            return ir_render_cast(g, executable, (IrInstGenCast *)instruction);
+        case IrInstGenIdUnreachable:
+            return ir_render_unreachable(g, executable, (IrInstGenUnreachable *)instruction);
+        case IrInstGenIdCondBr:
+            return ir_render_cond_br(g, executable, (IrInstGenCondBr *)instruction);
+        case IrInstGenIdBr:
+            return ir_render_br(g, executable, (IrInstGenBr *)instruction);
+        case IrInstGenIdBinaryNot:
+            return ir_render_binary_not(g, executable, (IrInstGenBinaryNot *)instruction);
+        case IrInstGenIdNegation:
+            return ir_render_negation(g, executable, (IrInstGenNegation *)instruction);
+        case IrInstGenIdNegationWrapping:
+            return ir_render_negation_wrapping(g, executable, (IrInstGenNegationWrapping *)instruction);
+        case IrInstGenIdLoadPtr:
+            return ir_render_load_ptr(g, executable, (IrInstGenLoadPtr *)instruction);
+        case IrInstGenIdStorePtr:
+            return ir_render_store_ptr(g, executable, (IrInstGenStorePtr *)instruction);
+        case IrInstGenIdVectorStoreElem:
+            return ir_render_vector_store_elem(g, executable, (IrInstGenVectorStoreElem *)instruction);
+        case IrInstGenIdVarPtr:
+            return ir_render_var_ptr(g, executable, (IrInstGenVarPtr *)instruction);
+        case IrInstGenIdReturnPtr:
+            return ir_render_return_ptr(g, executable, (IrInstGenReturnPtr *)instruction);
+        case IrInstGenIdElemPtr:
+            return ir_render_elem_ptr(g, executable, (IrInstGenElemPtr *)instruction);
+        case IrInstGenIdCall:
+            return ir_render_call(g, executable, (IrInstGenCall *)instruction);
+        case IrInstGenIdStructFieldPtr:
+            return ir_render_struct_field_ptr(g, executable, (IrInstGenStructFieldPtr *)instruction);
+        case IrInstGenIdUnionFieldPtr:
+            return ir_render_union_field_ptr(g, executable, (IrInstGenUnionFieldPtr *)instruction);
+        case IrInstGenIdAsm:
+            return ir_render_asm_gen(g, executable, (IrInstGenAsm *)instruction);
+        case IrInstGenIdTestNonNull:
+            return ir_render_test_non_null(g, executable, (IrInstGenTestNonNull *)instruction);
+        case IrInstGenIdOptionalUnwrapPtr:
+            return ir_render_optional_unwrap_ptr(g, executable, (IrInstGenOptionalUnwrapPtr *)instruction);
+        case IrInstGenIdClz:
+            return ir_render_clz(g, executable, (IrInstGenClz *)instruction);
+        case IrInstGenIdCtz:
+            return ir_render_ctz(g, executable, (IrInstGenCtz *)instruction);
+        case IrInstGenIdPopCount:
+            return ir_render_pop_count(g, executable, (IrInstGenPopCount *)instruction);
+        case IrInstGenIdSwitchBr:
+            return ir_render_switch_br(g, executable, (IrInstGenSwitchBr *)instruction);
+        case IrInstGenIdBswap:
+            return ir_render_bswap(g, executable, (IrInstGenBswap *)instruction);
+        case IrInstGenIdBitReverse:
+            return ir_render_bit_reverse(g, executable, (IrInstGenBitReverse *)instruction);
+        case IrInstGenIdPhi:
+            return ir_render_phi(g, executable, (IrInstGenPhi *)instruction);
+        case IrInstGenIdRef:
+            return ir_render_ref(g, executable, (IrInstGenRef *)instruction);
+        case IrInstGenIdErrName:
+            return ir_render_err_name(g, executable, (IrInstGenErrName *)instruction);
+        case IrInstGenIdCmpxchg:
+            return ir_render_cmpxchg(g, executable, (IrInstGenCmpxchg *)instruction);
+        case IrInstGenIdFence:
+            return ir_render_fence(g, executable, (IrInstGenFence *)instruction);
+        case IrInstGenIdTruncate:
+            return ir_render_truncate(g, executable, (IrInstGenTruncate *)instruction);
+        case IrInstGenIdBoolNot:
+            return ir_render_bool_not(g, executable, (IrInstGenBoolNot *)instruction);
+        case IrInstGenIdMemset:
+            return ir_render_memset(g, executable, (IrInstGenMemset *)instruction);
+        case IrInstGenIdMemcpy:
+            return ir_render_memcpy(g, executable, (IrInstGenMemcpy *)instruction);
+        case IrInstGenIdSlice:
+            return ir_render_slice(g, executable, (IrInstGenSlice *)instruction);
+        case IrInstGenIdBreakpoint:
+            return ir_render_breakpoint(g, executable, (IrInstGenBreakpoint *)instruction);
+        case IrInstGenIdReturnAddress:
+            return ir_render_return_address(g, executable, (IrInstGenReturnAddress *)instruction);
+        case IrInstGenIdFrameAddress:
+            return ir_render_frame_address(g, executable, (IrInstGenFrameAddress *)instruction);
+        case IrInstGenIdFrameHandle:
+            return ir_render_handle(g, executable, (IrInstGenFrameHandle *)instruction);
+        case IrInstGenIdOverflowOp:
+            return ir_render_overflow_op(g, executable, (IrInstGenOverflowOp *)instruction);
+        case IrInstGenIdTestErr:
+            return ir_render_test_err(g, executable, (IrInstGenTestErr *)instruction);
+        case IrInstGenIdUnwrapErrCode:
+            return ir_render_unwrap_err_code(g, executable, (IrInstGenUnwrapErrCode *)instruction);
+        case IrInstGenIdUnwrapErrPayload:
+            return ir_render_unwrap_err_payload(g, executable, (IrInstGenUnwrapErrPayload *)instruction);
+        case IrInstGenIdOptionalWrap:
+            return ir_render_optional_wrap(g, executable, (IrInstGenOptionalWrap *)instruction);
+        case IrInstGenIdErrWrapCode:
+            return ir_render_err_wrap_code(g, executable, (IrInstGenErrWrapCode *)instruction);
+        case IrInstGenIdErrWrapPayload:
+            return ir_render_err_wrap_payload(g, executable, (IrInstGenErrWrapPayload *)instruction);
+        case IrInstGenIdUnionTag:
+            return ir_render_union_tag(g, executable, (IrInstGenUnionTag *)instruction);
+        case IrInstGenIdPtrCast:
+            return ir_render_ptr_cast(g, executable, (IrInstGenPtrCast *)instruction);
+        case IrInstGenIdBitCast:
+            return ir_render_bit_cast(g, executable, (IrInstGenBitCast *)instruction);
+        case IrInstGenIdWidenOrShorten:
+            return ir_render_widen_or_shorten(g, executable, (IrInstGenWidenOrShorten *)instruction);
+        case IrInstGenIdPtrToInt:
+            return ir_render_ptr_to_int(g, executable, (IrInstGenPtrToInt *)instruction);
+        case IrInstGenIdIntToPtr:
+            return ir_render_int_to_ptr(g, executable, (IrInstGenIntToPtr *)instruction);
+        case IrInstGenIdIntToEnum:
+            return ir_render_int_to_enum(g, executable, (IrInstGenIntToEnum *)instruction);
+        case IrInstGenIdIntToErr:
+            return ir_render_int_to_err(g, executable, (IrInstGenIntToErr *)instruction);
+        case IrInstGenIdErrToInt:
+            return ir_render_err_to_int(g, executable, (IrInstGenErrToInt *)instruction);
+        case IrInstGenIdPanic:
+            return ir_render_panic(g, executable, (IrInstGenPanic *)instruction);
+        case IrInstGenIdTagName:
+            return ir_render_enum_tag_name(g, executable, (IrInstGenTagName *)instruction);
+        case IrInstGenIdFieldParentPtr:
+            return ir_render_field_parent_ptr(g, executable, (IrInstGenFieldParentPtr *)instruction);
+        case IrInstGenIdAlignCast:
+            return ir_render_align_cast(g, executable, (IrInstGenAlignCast *)instruction);
+        case IrInstGenIdErrorReturnTrace:
+            return ir_render_error_return_trace(g, executable, (IrInstGenErrorReturnTrace *)instruction);
+        case IrInstGenIdAtomicRmw:
+            return ir_render_atomic_rmw(g, executable, (IrInstGenAtomicRmw *)instruction);
+        case IrInstGenIdAtomicLoad:
+            return ir_render_atomic_load(g, executable, (IrInstGenAtomicLoad *)instruction);
+        case IrInstGenIdAtomicStore:
+            return ir_render_atomic_store(g, executable, (IrInstGenAtomicStore *)instruction);
+        case IrInstGenIdSaveErrRetAddr:
+            return ir_render_save_err_ret_addr(g, executable, (IrInstGenSaveErrRetAddr *)instruction);
+        case IrInstGenIdFloatOp:
+            return ir_render_float_op(g, executable, (IrInstGenFloatOp *)instruction);
+        case IrInstGenIdMulAdd:
+            return ir_render_mul_add(g, executable, (IrInstGenMulAdd *)instruction);
+        case IrInstGenIdArrayToVector:
+            return ir_render_array_to_vector(g, executable, (IrInstGenArrayToVector *)instruction);
+        case IrInstGenIdVectorToArray:
+            return ir_render_vector_to_array(g, executable, (IrInstGenVectorToArray *)instruction);
+        case IrInstGenIdAssertZero:
+            return ir_render_assert_zero(g, executable, (IrInstGenAssertZero *)instruction);
+        case IrInstGenIdAssertNonNull:
+            return ir_render_assert_non_null(g, executable, (IrInstGenAssertNonNull *)instruction);
+        case IrInstGenIdResizeSlice:
+            return ir_render_resize_slice(g, executable, (IrInstGenResizeSlice *)instruction);
+        case IrInstGenIdPtrOfArrayToSlice:
+            return ir_render_ptr_of_array_to_slice(g, executable, (IrInstGenPtrOfArrayToSlice *)instruction);
+        case IrInstGenIdSuspendBegin:
+            return ir_render_suspend_begin(g, executable, (IrInstGenSuspendBegin *)instruction);
+        case IrInstGenIdSuspendFinish:
+            return ir_render_suspend_finish(g, executable, (IrInstGenSuspendFinish *)instruction);
+        case IrInstGenIdResume:
+            return ir_render_resume(g, executable, (IrInstGenResume *)instruction);
+        case IrInstGenIdFrameSize:
+            return ir_render_frame_size(g, executable, (IrInstGenFrameSize *)instruction);
+        case IrInstGenIdAwait:
+            return ir_render_await(g, executable, (IrInstGenAwait *)instruction);
+        case IrInstGenIdSpillBegin:
+            return ir_render_spill_begin(g, executable, (IrInstGenSpillBegin *)instruction);
+        case IrInstGenIdSpillEnd:
+            return ir_render_spill_end(g, executable, (IrInstGenSpillEnd *)instruction);
+        case IrInstGenIdShuffleVector:
+            return ir_render_shuffle_vector(g, executable, (IrInstGenShuffleVector *) instruction);
+        case IrInstGenIdSplat:
+            return ir_render_splat(g, executable, (IrInstGenSplat *) instruction);
+        case IrInstGenIdVectorExtractElem:
+            return ir_render_vector_extract_elem(g, executable, (IrInstGenVectorExtractElem *) instruction);
     }
     zig_unreachable();
 }
@@ -6495,21 +6420,21 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
 static void ir_render(CodeGen *g, ZigFn *fn_entry) {
     assert(fn_entry);
 
-    IrExecutable *executable = &fn_entry->analyzed_executable;
+    IrExecutableGen *executable = &fn_entry->analyzed_executable;
     assert(executable->basic_block_list.length > 0);
 
     for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
-        IrBasicBlock *current_block = executable->basic_block_list.at(block_i);
+        IrBasicBlockGen *current_block = executable->basic_block_list.at(block_i);
         if (get_scope_typeof(current_block->scope) != nullptr) {
             LLVMBuildBr(g->builder, current_block->llvm_block);
         }
         assert(current_block->llvm_block);
         LLVMPositionBuilderAtEnd(g->builder, current_block->llvm_block);
         for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
-            IrInstruction *instruction = current_block->instruction_list.at(instr_i);
-            if (instruction->ref_count == 0 && !ir_has_side_effects(instruction))
+            IrInstGen *instruction = current_block->instruction_list.at(instr_i);
+            if (instruction->base.ref_count == 0 && !ir_inst_gen_has_side_effects(instruction))
                 continue;
-            if (get_scope_typeof(instruction->scope) != nullptr)
+            if (get_scope_typeof(instruction->base.scope) != nullptr)
                 continue;
 
             if (!g->strip_debug_symbols) {
@@ -7401,7 +7326,7 @@ static void generate_error_name_table(CodeGen *g) {
 }
 
 static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
-    IrExecutable *executable = &fn->analyzed_executable;
+    IrExecutableGen *executable = &fn->analyzed_executable;
     assert(executable->basic_block_list.length > 0);
     LLVMValueRef fn_val = fn_llvm_value(g, fn);
     LLVMBasicBlockRef first_bb = nullptr;
@@ -7410,7 +7335,7 @@ static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
         g->cur_preamble_llvm_block = first_bb;
     }
     for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
-        IrBasicBlock *bb = executable->basic_block_list.at(block_i);
+        IrBasicBlockGen *bb = executable->basic_block_list.at(block_i);
         bb->llvm_block = LLVMAppendBasicBlock(fn_val, bb->name_hint);
     }
     if (first_bb == nullptr) {
@@ -7643,10 +7568,10 @@ static void do_code_gen(CodeGen *g) {
         if (!is_async) {
             // allocate async frames for noasync calls & awaits to async functions
             ZigType *largest_call_frame_type = nullptr;
-            IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
+            IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
                     fn_table_entry->body_node, fn_table_entry, g->builtin_types.entry_void, "@async_call_frame");
             for (size_t i = 0; i < fn_table_entry->call_list.length; i += 1) {
-                IrInstructionCallGen *call = fn_table_entry->call_list.at(i);
+                IrInstGenCall *call = fn_table_entry->call_list.at(i);
                 if (call->fn_entry == nullptr)
                     continue;
                 if (!fn_is_async(call->fn_entry))
@@ -7668,7 +7593,7 @@ static void do_code_gen(CodeGen *g) {
             }
             // allocate temporary stack data
             for (size_t alloca_i = 0; alloca_i < fn_table_entry->alloca_gen_list.length; alloca_i += 1) {
-                IrInstructionAllocaGen *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
+                IrInstGenAlloca *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
                 ZigType *ptr_type = instruction->base.value->type;
                 assert(ptr_type->id == ZigTypeIdPointer);
                 ZigType *child_type = ptr_type->data.pointer.child_type;
@@ -7676,7 +7601,7 @@ static void do_code_gen(CodeGen *g) {
                     zig_unreachable();
                 if (!type_has_bits(child_type))
                     continue;
-                if (instruction->base.ref_count == 0)
+                if (instruction->base.base.ref_count == 0)
                     continue;
                 if (instruction->base.value->special != ConstValSpecialRuntime) {
                     if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
@@ -7793,7 +7718,7 @@ static void do_code_gen(CodeGen *g) {
                 ZigLLVMSetCurrentDebugLocation(g->builder, (int)source_node->line + 1,
                         (int)source_node->column + 1, get_di_scope(g, fn_table_entry->child_scope));
             }
-            IrExecutable *executable = &fn_table_entry->analyzed_executable;
+            IrExecutableGen *executable = &fn_table_entry->analyzed_executable;
             LLVMBasicBlockRef bad_resume_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadResume");
             LLVMPositionBuilderAtEnd(g->builder, bad_resume_block);
             gen_assertion_scope(g, PanicMsgIdBadResume, fn_table_entry->child_scope);
@@ -7820,7 +7745,7 @@ static void do_code_gen(CodeGen *g) {
             g->cur_async_switch_instr = switch_instr;
 
             LLVMValueRef zero = LLVMConstNull(usize_type_ref);
-            IrBasicBlock *entry_block = executable->basic_block_list.at(0);
+            IrBasicBlockGen *entry_block = executable->basic_block_list.at(0);
             LLVMAddCase(switch_instr, zero, entry_block->llvm_block);
             g->cur_resume_block_count += 1;
 
@@ -7852,7 +7777,7 @@ static void do_code_gen(CodeGen *g) {
 
                 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
             }
-            render_async_var_decls(g, entry_block->instruction_list.at(0)->scope);
+            render_async_var_decls(g, entry_block->instruction_list.at(0)->base.scope);
         } else {
             // create debug variable declarations for parameters
             // rely on the first variables in the variable_list being parameters.
@@ -7941,6 +7866,12 @@ static void zig_llvm_emit_output(CodeGen *g) {
         default:
             zig_unreachable();
     }
+    LLVMDisposeModule(g->module);
+    g->module = nullptr;
+    LLVMDisposeTargetData(g->target_data_ref);
+    g->target_data_ref = nullptr;
+    LLVMDisposeTargetMachine(g->target_machine);
+    g->target_machine = nullptr;
 }
 
 struct CIntTypeInfo {
@@ -8846,15 +8777,17 @@ static void init(CodeGen *g) {
     define_builtin_types(g);
     define_intern_values(g);
 
-    IrInstruction *sentinel_instructions = allocate<IrInstruction>(2);
-    g->invalid_instruction = &sentinel_instructions[0];
-    g->invalid_instruction->value = allocate<ZigValue>(1, "ZigValue");
-    g->invalid_instruction->value->type = g->builtin_types.entry_invalid;
+    IrInstGen *sentinel_instructions = allocate<IrInstGen>(2);
+    g->invalid_inst_gen = &sentinel_instructions[0];
+    g->invalid_inst_gen->value = allocate<ZigValue>(1, "ZigValue");
+    g->invalid_inst_gen->value->type = g->builtin_types.entry_invalid;
 
     g->unreach_instruction = &sentinel_instructions[1];
     g->unreach_instruction->value = allocate<ZigValue>(1, "ZigValue");
     g->unreach_instruction->value->type = g->builtin_types.entry_unreachable;
 
+    g->invalid_inst_src = allocate<IrInstSrc>(1);
+
     define_builtin_fns(g);
     Error err;
     if ((err = define_builtin_compile_vars(g))) {
diff --git a/src/ir.cpp b/src/ir.cpp
index db1faac37c7eefa266b46819e231a0280ecf98ce..78673860cd7722f02836091d0259b7e50c5686d3 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -21,25 +21,31 @@ struct IrExecContext {
     ZigList<ZigValue *> mem_slot_list;
 };
 
-struct IrBuilder {
+struct IrBuilderSrc {
     CodeGen *codegen;
-    IrExecutable *exec;
-    IrBasicBlock *current_basic_block;
+    IrExecutableSrc *exec;
+    IrBasicBlockSrc *current_basic_block;
     AstNode *main_block_node;
 };
 
+struct IrBuilderGen {
+    CodeGen *codegen;
+    IrExecutableGen *exec;
+    IrBasicBlockGen *current_basic_block;
+};
+
 struct IrAnalyze {
     CodeGen *codegen;
-    IrBuilder old_irb;
-    IrBuilder new_irb;
+    IrBuilderSrc old_irb;
+    IrBuilderGen new_irb;
     IrExecContext exec_context;
     size_t old_bb_index;
     size_t instruction_index;
     ZigType *explicit_return_type;
     AstNode *explicit_return_type_source_node;
-    ZigList<IrInstruction *> src_implicit_return_type_list;
+    ZigList<IrInstGen *> src_implicit_return_type_list;
     ZigList<IrSuspendPosition> resume_stack;
-    IrBasicBlock *const_predecessor_bb;
+    IrBasicBlockSrc *const_predecessor_bb;
     size_t ref_count;
     size_t break_debug_id; // for debugging purposes
 
@@ -206,412 +212,538 @@ struct DbgIrBreakPoint {
 DbgIrBreakPoint dbg_ir_breakpoints_buf[20];
 size_t dbg_ir_breakpoints_count = 0;
 
-static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope);
-static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
+static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope);
+static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
         ResultLoc *result_loc);
-static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type);
-static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
-        IrInstruction *value, ZigType *expected_type);
-static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
+static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type);
+static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
+        IrInstGen *value, ZigType *expected_type);
+static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr,
         ResultLoc *result_loc);
-static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg);
-static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
-    IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing);
-static void ir_assert(bool ok, IrInstruction *source_instruction);
-static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var);
-static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op);
-static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval, ResultLoc *result_loc);
-static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc);
+static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg);
+static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
+    IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing);
+static void ir_assert(bool ok, IrInst* source_instruction);
+static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
+static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
+static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
+static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
+static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
 static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
 static ZigType *adjust_slice_align(CodeGen *g, ZigType *slice_type, uint32_t new_align);
 static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, uint8_t *buf, ZigValue *val);
 static void buf_write_value_bytes(CodeGen *codegen, uint8_t *buf, ZigValue *val);
 static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
         ZigValue *out_val, ZigValue *ptr_val);
-static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
-        ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on);
-static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed);
+static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
+        ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on);
+static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed);
 static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align);
-static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
+static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
         ZigType *ptr_type);
-static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
         ZigType *dest_type);
-static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
-        ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
+static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
+        ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
         bool non_null_comptime, bool allow_discard);
-static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
-        ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
+static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
+        ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
         bool non_null_comptime, bool allow_discard);
-static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool safety_check_on, bool initializing);
-static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool safety_check_on, bool initializing);
-static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool initializing);
-static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const);
-static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
+static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool safety_check_on, bool initializing);
+static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool safety_check_on, bool initializing);
+static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool initializing);
+static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const);
+static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
     LVal lval, ResultLoc *parent_result_loc);
 static void ir_reset_result(ResultLoc *result_loc);
-static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
+static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
         Scope *scope, AstNode *source_node, Buf *out_bare_name);
-static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
+static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
         ResultLoc *parent_result_loc);
-static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing);
-static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
-    IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type);
+static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
+        TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing);
+static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
+    IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type);
 static ResultLoc *no_result_loc(void);
-static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value);
+static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value);
 
-static void destroy_instruction(IrInstruction *inst) {
+static void destroy_instruction_src(IrInstSrc *inst) {
 #ifdef ZIG_ENABLE_MEM_PROFILE
-    const char *name = ir_instruction_type_str(inst->id);
+    const char *name = ir_inst_src_type_str(inst->id);
 #else
     const char *name = nullptr;
 #endif
     switch (inst->id) {
-        case IrInstructionIdInvalid:
+        case IrInstSrcIdInvalid:
             zig_unreachable();
-        case IrInstructionIdReturn:
-            return destroy(reinterpret_cast<IrInstructionReturn *>(inst), name);
-        case IrInstructionIdConst:
-            return destroy(reinterpret_cast<IrInstructionConst *>(inst), name);
-        case IrInstructionIdBinOp:
-            return destroy(reinterpret_cast<IrInstructionBinOp *>(inst), name);
-        case IrInstructionIdMergeErrSets:
-            return destroy(reinterpret_cast<IrInstructionMergeErrSets *>(inst), name);
-        case IrInstructionIdDeclVarSrc:
-            return destroy(reinterpret_cast<IrInstructionDeclVarSrc *>(inst), name);
-        case IrInstructionIdCast:
-            return destroy(reinterpret_cast<IrInstructionCast *>(inst), name);
-        case IrInstructionIdCallSrc:
-            return destroy(reinterpret_cast<IrInstructionCallSrc *>(inst), name);
-        case IrInstructionIdCallSrcArgs:
-            return destroy(reinterpret_cast<IrInstructionCallSrcArgs *>(inst), name);
-        case IrInstructionIdCallExtra:
-            return destroy(reinterpret_cast<IrInstructionCallExtra *>(inst), name);
-        case IrInstructionIdCallGen:
-            return destroy(reinterpret_cast<IrInstructionCallGen *>(inst), name);
-        case IrInstructionIdUnOp:
-            return destroy(reinterpret_cast<IrInstructionUnOp *>(inst), name);
-        case IrInstructionIdCondBr:
-            return destroy(reinterpret_cast<IrInstructionCondBr *>(inst), name);
-        case IrInstructionIdBr:
-            return destroy(reinterpret_cast<IrInstructionBr *>(inst), name);
-        case IrInstructionIdPhi:
-            return destroy(reinterpret_cast<IrInstructionPhi *>(inst), name);
-        case IrInstructionIdContainerInitList:
-            return destroy(reinterpret_cast<IrInstructionContainerInitList *>(inst), name);
-        case IrInstructionIdContainerInitFields:
-            return destroy(reinterpret_cast<IrInstructionContainerInitFields *>(inst), name);
-        case IrInstructionIdUnreachable:
-            return destroy(reinterpret_cast<IrInstructionUnreachable *>(inst), name);
-        case IrInstructionIdElemPtr:
-            return destroy(reinterpret_cast<IrInstructionElemPtr *>(inst), name);
-        case IrInstructionIdVarPtr:
-            return destroy(reinterpret_cast<IrInstructionVarPtr *>(inst), name);
-        case IrInstructionIdReturnPtr:
-            return destroy(reinterpret_cast<IrInstructionReturnPtr *>(inst), name);
-        case IrInstructionIdLoadPtr:
-            return destroy(reinterpret_cast<IrInstructionLoadPtr *>(inst), name);
-        case IrInstructionIdLoadPtrGen:
-            return destroy(reinterpret_cast<IrInstructionLoadPtrGen *>(inst), name);
-        case IrInstructionIdStorePtr:
-            return destroy(reinterpret_cast<IrInstructionStorePtr *>(inst), name);
-        case IrInstructionIdVectorStoreElem:
-            return destroy(reinterpret_cast<IrInstructionVectorStoreElem *>(inst), name);
-        case IrInstructionIdTypeOf:
-            return destroy(reinterpret_cast<IrInstructionTypeOf *>(inst), name);
-        case IrInstructionIdFieldPtr:
-            return destroy(reinterpret_cast<IrInstructionFieldPtr *>(inst), name);
-        case IrInstructionIdStructFieldPtr:
-            return destroy(reinterpret_cast<IrInstructionStructFieldPtr *>(inst), name);
-        case IrInstructionIdUnionFieldPtr:
-            return destroy(reinterpret_cast<IrInstructionUnionFieldPtr *>(inst), name);
-        case IrInstructionIdSetCold:
-            return destroy(reinterpret_cast<IrInstructionSetCold *>(inst), name);
-        case IrInstructionIdSetRuntimeSafety:
-            return destroy(reinterpret_cast<IrInstructionSetRuntimeSafety *>(inst), name);
-        case IrInstructionIdSetFloatMode:
-            return destroy(reinterpret_cast<IrInstructionSetFloatMode *>(inst), name);
-        case IrInstructionIdArrayType:
-            return destroy(reinterpret_cast<IrInstructionArrayType *>(inst), name);
-        case IrInstructionIdSliceType:
-            return destroy(reinterpret_cast<IrInstructionSliceType *>(inst), name);
-        case IrInstructionIdAnyFrameType:
-            return destroy(reinterpret_cast<IrInstructionAnyFrameType *>(inst), name);
-        case IrInstructionIdAsmSrc:
-            return destroy(reinterpret_cast<IrInstructionAsmSrc *>(inst), name);
-        case IrInstructionIdAsmGen:
-            return destroy(reinterpret_cast<IrInstructionAsmGen *>(inst), name);
-        case IrInstructionIdSizeOf:
-            return destroy(reinterpret_cast<IrInstructionSizeOf *>(inst), name);
-        case IrInstructionIdTestNonNull:
-            return destroy(reinterpret_cast<IrInstructionTestNonNull *>(inst), name);
-        case IrInstructionIdOptionalUnwrapPtr:
-            return destroy(reinterpret_cast<IrInstructionOptionalUnwrapPtr *>(inst), name);
-        case IrInstructionIdPopCount:
-            return destroy(reinterpret_cast<IrInstructionPopCount *>(inst), name);
-        case IrInstructionIdClz:
-            return destroy(reinterpret_cast<IrInstructionClz *>(inst), name);
-        case IrInstructionIdCtz:
-            return destroy(reinterpret_cast<IrInstructionCtz *>(inst), name);
-        case IrInstructionIdBswap:
-            return destroy(reinterpret_cast<IrInstructionBswap *>(inst), name);
-        case IrInstructionIdBitReverse:
-            return destroy(reinterpret_cast<IrInstructionBitReverse *>(inst), name);
-        case IrInstructionIdSwitchBr:
-            return destroy(reinterpret_cast<IrInstructionSwitchBr *>(inst), name);
-        case IrInstructionIdSwitchVar:
-            return destroy(reinterpret_cast<IrInstructionSwitchVar *>(inst), name);
-        case IrInstructionIdSwitchElseVar:
-            return destroy(reinterpret_cast<IrInstructionSwitchElseVar *>(inst), name);
-        case IrInstructionIdSwitchTarget:
-            return destroy(reinterpret_cast<IrInstructionSwitchTarget *>(inst), name);
-        case IrInstructionIdUnionTag:
-            return destroy(reinterpret_cast<IrInstructionUnionTag *>(inst), name);
-        case IrInstructionIdImport:
-            return destroy(reinterpret_cast<IrInstructionImport *>(inst), name);
-        case IrInstructionIdRef:
-            return destroy(reinterpret_cast<IrInstructionRef *>(inst), name);
-        case IrInstructionIdRefGen:
-            return destroy(reinterpret_cast<IrInstructionRefGen *>(inst), name);
-        case IrInstructionIdCompileErr:
-            return destroy(reinterpret_cast<IrInstructionCompileErr *>(inst), name);
-        case IrInstructionIdCompileLog:
-            return destroy(reinterpret_cast<IrInstructionCompileLog *>(inst), name);
-        case IrInstructionIdErrName:
-            return destroy(reinterpret_cast<IrInstructionErrName *>(inst), name);
-        case IrInstructionIdCImport:
-            return destroy(reinterpret_cast<IrInstructionCImport *>(inst), name);
-        case IrInstructionIdCInclude:
-            return destroy(reinterpret_cast<IrInstructionCInclude *>(inst), name);
-        case IrInstructionIdCDefine:
-            return destroy(reinterpret_cast<IrInstructionCDefine *>(inst), name);
-        case IrInstructionIdCUndef:
-            return destroy(reinterpret_cast<IrInstructionCUndef *>(inst), name);
-        case IrInstructionIdEmbedFile:
-            return destroy(reinterpret_cast<IrInstructionEmbedFile *>(inst), name);
-        case IrInstructionIdCmpxchgSrc:
-            return destroy(reinterpret_cast<IrInstructionCmpxchgSrc *>(inst), name);
-        case IrInstructionIdCmpxchgGen:
-            return destroy(reinterpret_cast<IrInstructionCmpxchgGen *>(inst), name);
-        case IrInstructionIdFence:
-            return destroy(reinterpret_cast<IrInstructionFence *>(inst), name);
-        case IrInstructionIdTruncate:
-            return destroy(reinterpret_cast<IrInstructionTruncate *>(inst), name);
-        case IrInstructionIdIntCast:
-            return destroy(reinterpret_cast<IrInstructionIntCast *>(inst), name);
-        case IrInstructionIdFloatCast:
-            return destroy(reinterpret_cast<IrInstructionFloatCast *>(inst), name);
-        case IrInstructionIdErrSetCast:
-            return destroy(reinterpret_cast<IrInstructionErrSetCast *>(inst), name);
-        case IrInstructionIdFromBytes:
-            return destroy(reinterpret_cast<IrInstructionFromBytes *>(inst), name);
-        case IrInstructionIdToBytes:
-            return destroy(reinterpret_cast<IrInstructionToBytes *>(inst), name);
-        case IrInstructionIdIntToFloat:
-            return destroy(reinterpret_cast<IrInstructionIntToFloat *>(inst), name);
-        case IrInstructionIdFloatToInt:
-            return destroy(reinterpret_cast<IrInstructionFloatToInt *>(inst), name);
-        case IrInstructionIdBoolToInt:
-            return destroy(reinterpret_cast<IrInstructionBoolToInt *>(inst), name);
-        case IrInstructionIdIntType:
-            return destroy(reinterpret_cast<IrInstructionIntType *>(inst), name);
-        case IrInstructionIdVectorType:
-            return destroy(reinterpret_cast<IrInstructionVectorType *>(inst), name);
-        case IrInstructionIdShuffleVector:
-            return destroy(reinterpret_cast<IrInstructionShuffleVector *>(inst), name);
-        case IrInstructionIdSplatSrc:
-            return destroy(reinterpret_cast<IrInstructionSplatSrc *>(inst), name);
-        case IrInstructionIdSplatGen:
-            return destroy(reinterpret_cast<IrInstructionSplatGen *>(inst), name);
-        case IrInstructionIdBoolNot:
-            return destroy(reinterpret_cast<IrInstructionBoolNot *>(inst), name);
-        case IrInstructionIdMemset:
-            return destroy(reinterpret_cast<IrInstructionMemset *>(inst), name);
-        case IrInstructionIdMemcpy:
-            return destroy(reinterpret_cast<IrInstructionMemcpy *>(inst), name);
-        case IrInstructionIdSliceSrc:
-            return destroy(reinterpret_cast<IrInstructionSliceSrc *>(inst), name);
-        case IrInstructionIdSliceGen:
-            return destroy(reinterpret_cast<IrInstructionSliceGen *>(inst), name);
-        case IrInstructionIdMemberCount:
-            return destroy(reinterpret_cast<IrInstructionMemberCount *>(inst), name);
-        case IrInstructionIdMemberType:
-            return destroy(reinterpret_cast<IrInstructionMemberType *>(inst), name);
-        case IrInstructionIdMemberName:
-            return destroy(reinterpret_cast<IrInstructionMemberName *>(inst), name);
-        case IrInstructionIdBreakpoint:
-            return destroy(reinterpret_cast<IrInstructionBreakpoint *>(inst), name);
-        case IrInstructionIdReturnAddress:
-            return destroy(reinterpret_cast<IrInstructionReturnAddress *>(inst), name);
-        case IrInstructionIdFrameAddress:
-            return destroy(reinterpret_cast<IrInstructionFrameAddress *>(inst), name);
-        case IrInstructionIdFrameHandle:
-            return destroy(reinterpret_cast<IrInstructionFrameHandle *>(inst), name);
-        case IrInstructionIdFrameType:
-            return destroy(reinterpret_cast<IrInstructionFrameType *>(inst), name);
-        case IrInstructionIdFrameSizeSrc:
-            return destroy(reinterpret_cast<IrInstructionFrameSizeSrc *>(inst), name);
-        case IrInstructionIdFrameSizeGen:
-            return destroy(reinterpret_cast<IrInstructionFrameSizeGen *>(inst), name);
-        case IrInstructionIdAlignOf:
-            return destroy(reinterpret_cast<IrInstructionAlignOf *>(inst), name);
-        case IrInstructionIdOverflowOp:
-            return destroy(reinterpret_cast<IrInstructionOverflowOp *>(inst), name);
-        case IrInstructionIdTestErrSrc:
-            return destroy(reinterpret_cast<IrInstructionTestErrSrc *>(inst), name);
-        case IrInstructionIdTestErrGen:
-            return destroy(reinterpret_cast<IrInstructionTestErrGen *>(inst), name);
-        case IrInstructionIdUnwrapErrCode:
-            return destroy(reinterpret_cast<IrInstructionUnwrapErrCode *>(inst), name);
-        case IrInstructionIdUnwrapErrPayload:
-            return destroy(reinterpret_cast<IrInstructionUnwrapErrPayload *>(inst), name);
-        case IrInstructionIdOptionalWrap:
-            return destroy(reinterpret_cast<IrInstructionOptionalWrap *>(inst), name);
-        case IrInstructionIdErrWrapCode:
-            return destroy(reinterpret_cast<IrInstructionErrWrapCode *>(inst), name);
-        case IrInstructionIdErrWrapPayload:
-            return destroy(reinterpret_cast<IrInstructionErrWrapPayload *>(inst), name);
-        case IrInstructionIdFnProto:
-            return destroy(reinterpret_cast<IrInstructionFnProto *>(inst), name);
-        case IrInstructionIdTestComptime:
-            return destroy(reinterpret_cast<IrInstructionTestComptime *>(inst), name);
-        case IrInstructionIdPtrCastSrc:
-            return destroy(reinterpret_cast<IrInstructionPtrCastSrc *>(inst), name);
-        case IrInstructionIdPtrCastGen:
-            return destroy(reinterpret_cast<IrInstructionPtrCastGen *>(inst), name);
-        case IrInstructionIdBitCastSrc:
-            return destroy(reinterpret_cast<IrInstructionBitCastSrc *>(inst), name);
-        case IrInstructionIdBitCastGen:
-            return destroy(reinterpret_cast<IrInstructionBitCastGen *>(inst), name);
-        case IrInstructionIdWidenOrShorten:
-            return destroy(reinterpret_cast<IrInstructionWidenOrShorten *>(inst), name);
-        case IrInstructionIdPtrToInt:
-            return destroy(reinterpret_cast<IrInstructionPtrToInt *>(inst), name);
-        case IrInstructionIdIntToPtr:
-            return destroy(reinterpret_cast<IrInstructionIntToPtr *>(inst), name);
-        case IrInstructionIdIntToEnum:
-            return destroy(reinterpret_cast<IrInstructionIntToEnum *>(inst), name);
-        case IrInstructionIdIntToErr:
-            return destroy(reinterpret_cast<IrInstructionIntToErr *>(inst), name);
-        case IrInstructionIdErrToInt:
-            return destroy(reinterpret_cast<IrInstructionErrToInt *>(inst), name);
-        case IrInstructionIdCheckSwitchProngs:
-            return destroy(reinterpret_cast<IrInstructionCheckSwitchProngs *>(inst), name);
-        case IrInstructionIdCheckStatementIsVoid:
-            return destroy(reinterpret_cast<IrInstructionCheckStatementIsVoid *>(inst), name);
-        case IrInstructionIdTypeName:
-            return destroy(reinterpret_cast<IrInstructionTypeName *>(inst), name);
-        case IrInstructionIdTagName:
-            return destroy(reinterpret_cast<IrInstructionTagName *>(inst), name);
-        case IrInstructionIdPtrType:
-            return destroy(reinterpret_cast<IrInstructionPtrType *>(inst), name);
-        case IrInstructionIdDeclRef:
-            return destroy(reinterpret_cast<IrInstructionDeclRef *>(inst), name);
-        case IrInstructionIdPanic:
-            return destroy(reinterpret_cast<IrInstructionPanic *>(inst), name);
-        case IrInstructionIdFieldParentPtr:
-            return destroy(reinterpret_cast<IrInstructionFieldParentPtr *>(inst), name);
-        case IrInstructionIdByteOffsetOf:
-            return destroy(reinterpret_cast<IrInstructionByteOffsetOf *>(inst), name);
-        case IrInstructionIdBitOffsetOf:
-            return destroy(reinterpret_cast<IrInstructionBitOffsetOf *>(inst), name);
-        case IrInstructionIdTypeInfo:
-            return destroy(reinterpret_cast<IrInstructionTypeInfo *>(inst), name);
-        case IrInstructionIdType:
-            return destroy(reinterpret_cast<IrInstructionType *>(inst), name);
-        case IrInstructionIdHasField:
-            return destroy(reinterpret_cast<IrInstructionHasField *>(inst), name);
-        case IrInstructionIdTypeId:
-            return destroy(reinterpret_cast<IrInstructionTypeId *>(inst), name);
-        case IrInstructionIdSetEvalBranchQuota:
-            return destroy(reinterpret_cast<IrInstructionSetEvalBranchQuota *>(inst), name);
-        case IrInstructionIdAlignCast:
-            return destroy(reinterpret_cast<IrInstructionAlignCast *>(inst), name);
-        case IrInstructionIdImplicitCast:
-            return destroy(reinterpret_cast<IrInstructionImplicitCast *>(inst), name);
-        case IrInstructionIdResolveResult:
-            return destroy(reinterpret_cast<IrInstructionResolveResult *>(inst), name);
-        case IrInstructionIdResetResult:
-            return destroy(reinterpret_cast<IrInstructionResetResult *>(inst), name);
-        case IrInstructionIdOpaqueType:
-            return destroy(reinterpret_cast<IrInstructionOpaqueType *>(inst), name);
-        case IrInstructionIdSetAlignStack:
-            return destroy(reinterpret_cast<IrInstructionSetAlignStack *>(inst), name);
-        case IrInstructionIdArgType:
-            return destroy(reinterpret_cast<IrInstructionArgType *>(inst), name);
-        case IrInstructionIdTagType:
-            return destroy(reinterpret_cast<IrInstructionTagType *>(inst), name);
-        case IrInstructionIdExport:
-            return destroy(reinterpret_cast<IrInstructionExport *>(inst), name);
-        case IrInstructionIdErrorReturnTrace:
-            return destroy(reinterpret_cast<IrInstructionErrorReturnTrace *>(inst), name);
-        case IrInstructionIdErrorUnion:
-            return destroy(reinterpret_cast<IrInstructionErrorUnion *>(inst), name);
-        case IrInstructionIdAtomicRmw:
-            return destroy(reinterpret_cast<IrInstructionAtomicRmw *>(inst), name);
-        case IrInstructionIdSaveErrRetAddr:
-            return destroy(reinterpret_cast<IrInstructionSaveErrRetAddr *>(inst), name);
-        case IrInstructionIdAddImplicitReturnType:
-            return destroy(reinterpret_cast<IrInstructionAddImplicitReturnType *>(inst), name);
-        case IrInstructionIdFloatOp:
-            return destroy(reinterpret_cast<IrInstructionFloatOp *>(inst), name);
-        case IrInstructionIdMulAdd:
-            return destroy(reinterpret_cast<IrInstructionMulAdd *>(inst), name);
-        case IrInstructionIdAtomicLoad:
-            return destroy(reinterpret_cast<IrInstructionAtomicLoad *>(inst), name);
-        case IrInstructionIdAtomicStore:
-            return destroy(reinterpret_cast<IrInstructionAtomicStore *>(inst), name);
-        case IrInstructionIdEnumToInt:
-            return destroy(reinterpret_cast<IrInstructionEnumToInt *>(inst), name);
-        case IrInstructionIdCheckRuntimeScope:
-            return destroy(reinterpret_cast<IrInstructionCheckRuntimeScope *>(inst), name);
-        case IrInstructionIdDeclVarGen:
-            return destroy(reinterpret_cast<IrInstructionDeclVarGen *>(inst), name);
-        case IrInstructionIdArrayToVector:
-            return destroy(reinterpret_cast<IrInstructionArrayToVector *>(inst), name);
-        case IrInstructionIdVectorToArray:
-            return destroy(reinterpret_cast<IrInstructionVectorToArray *>(inst), name);
-        case IrInstructionIdPtrOfArrayToSlice:
-            return destroy(reinterpret_cast<IrInstructionPtrOfArrayToSlice *>(inst), name);
-        case IrInstructionIdAssertZero:
-            return destroy(reinterpret_cast<IrInstructionAssertZero *>(inst), name);
-        case IrInstructionIdAssertNonNull:
-            return destroy(reinterpret_cast<IrInstructionAssertNonNull *>(inst), name);
-        case IrInstructionIdResizeSlice:
-            return destroy(reinterpret_cast<IrInstructionResizeSlice *>(inst), name);
-        case IrInstructionIdHasDecl:
-            return destroy(reinterpret_cast<IrInstructionHasDecl *>(inst), name);
-        case IrInstructionIdUndeclaredIdent:
-            return destroy(reinterpret_cast<IrInstructionUndeclaredIdent *>(inst), name);
-        case IrInstructionIdAllocaSrc:
-            return destroy(reinterpret_cast<IrInstructionAllocaSrc *>(inst), name);
-        case IrInstructionIdAllocaGen:
-            return destroy(reinterpret_cast<IrInstructionAllocaGen *>(inst), name);
-        case IrInstructionIdEndExpr:
-            return destroy(reinterpret_cast<IrInstructionEndExpr *>(inst), name);
-        case IrInstructionIdUnionInitNamedField:
-            return destroy(reinterpret_cast<IrInstructionUnionInitNamedField *>(inst), name);
-        case IrInstructionIdSuspendBegin:
-            return destroy(reinterpret_cast<IrInstructionSuspendBegin *>(inst), name);
-        case IrInstructionIdSuspendFinish:
-            return destroy(reinterpret_cast<IrInstructionSuspendFinish *>(inst), name);
-        case IrInstructionIdResume:
-            return destroy(reinterpret_cast<IrInstructionResume *>(inst), name);
-        case IrInstructionIdAwaitSrc:
-            return destroy(reinterpret_cast<IrInstructionAwaitSrc *>(inst), name);
-        case IrInstructionIdAwaitGen:
-            return destroy(reinterpret_cast<IrInstructionAwaitGen *>(inst), name);
-        case IrInstructionIdSpillBegin:
-            return destroy(reinterpret_cast<IrInstructionSpillBegin *>(inst), name);
-        case IrInstructionIdSpillEnd:
-            return destroy(reinterpret_cast<IrInstructionSpillEnd *>(inst), name);
-        case IrInstructionIdVectorExtractElem:
-            return destroy(reinterpret_cast<IrInstructionVectorExtractElem *>(inst), name);
+        case IrInstSrcIdReturn:
+            return destroy(reinterpret_cast<IrInstSrcReturn *>(inst), name);
+        case IrInstSrcIdConst:
+            return destroy(reinterpret_cast<IrInstSrcConst *>(inst), name);
+        case IrInstSrcIdBinOp:
+            return destroy(reinterpret_cast<IrInstSrcBinOp *>(inst), name);
+        case IrInstSrcIdMergeErrSets:
+            return destroy(reinterpret_cast<IrInstSrcMergeErrSets *>(inst), name);
+        case IrInstSrcIdDeclVar:
+            return destroy(reinterpret_cast<IrInstSrcDeclVar *>(inst), name);
+        case IrInstSrcIdCall:
+            return destroy(reinterpret_cast<IrInstSrcCall *>(inst), name);
+        case IrInstSrcIdCallExtra:
+            return destroy(reinterpret_cast<IrInstSrcCallExtra *>(inst), name);
+        case IrInstSrcIdUnOp:
+            return destroy(reinterpret_cast<IrInstSrcUnOp *>(inst), name);
+        case IrInstSrcIdCondBr:
+            return destroy(reinterpret_cast<IrInstSrcCondBr *>(inst), name);
+        case IrInstSrcIdBr:
+            return destroy(reinterpret_cast<IrInstSrcBr *>(inst), name);
+        case IrInstSrcIdPhi:
+            return destroy(reinterpret_cast<IrInstSrcPhi *>(inst), name);
+        case IrInstSrcIdContainerInitList:
+            return destroy(reinterpret_cast<IrInstSrcContainerInitList *>(inst), name);
+        case IrInstSrcIdContainerInitFields:
+            return destroy(reinterpret_cast<IrInstSrcContainerInitFields *>(inst), name);
+        case IrInstSrcIdUnreachable:
+            return destroy(reinterpret_cast<IrInstSrcUnreachable *>(inst), name);
+        case IrInstSrcIdElemPtr:
+            return destroy(reinterpret_cast<IrInstSrcElemPtr *>(inst), name);
+        case IrInstSrcIdVarPtr:
+            return destroy(reinterpret_cast<IrInstSrcVarPtr *>(inst), name);
+        case IrInstSrcIdLoadPtr:
+            return destroy(reinterpret_cast<IrInstSrcLoadPtr *>(inst), name);
+        case IrInstSrcIdStorePtr:
+            return destroy(reinterpret_cast<IrInstSrcStorePtr *>(inst), name);
+        case IrInstSrcIdTypeOf:
+            return destroy(reinterpret_cast<IrInstSrcTypeOf *>(inst), name);
+        case IrInstSrcIdFieldPtr:
+            return destroy(reinterpret_cast<IrInstSrcFieldPtr *>(inst), name);
+        case IrInstSrcIdSetCold:
+            return destroy(reinterpret_cast<IrInstSrcSetCold *>(inst), name);
+        case IrInstSrcIdSetRuntimeSafety:
+            return destroy(reinterpret_cast<IrInstSrcSetRuntimeSafety *>(inst), name);
+        case IrInstSrcIdSetFloatMode:
+            return destroy(reinterpret_cast<IrInstSrcSetFloatMode *>(inst), name);
+        case IrInstSrcIdArrayType:
+            return destroy(reinterpret_cast<IrInstSrcArrayType *>(inst), name);
+        case IrInstSrcIdSliceType:
+            return destroy(reinterpret_cast<IrInstSrcSliceType *>(inst), name);
+        case IrInstSrcIdAnyFrameType:
+            return destroy(reinterpret_cast<IrInstSrcAnyFrameType *>(inst), name);
+        case IrInstSrcIdAsm:
+            return destroy(reinterpret_cast<IrInstSrcAsm *>(inst), name);
+        case IrInstSrcIdSizeOf:
+            return destroy(reinterpret_cast<IrInstSrcSizeOf *>(inst), name);
+        case IrInstSrcIdTestNonNull:
+            return destroy(reinterpret_cast<IrInstSrcTestNonNull *>(inst), name);
+        case IrInstSrcIdOptionalUnwrapPtr:
+            return destroy(reinterpret_cast<IrInstSrcOptionalUnwrapPtr *>(inst), name);
+        case IrInstSrcIdPopCount:
+            return destroy(reinterpret_cast<IrInstSrcPopCount *>(inst), name);
+        case IrInstSrcIdClz:
+            return destroy(reinterpret_cast<IrInstSrcClz *>(inst), name);
+        case IrInstSrcIdCtz:
+            return destroy(reinterpret_cast<IrInstSrcCtz *>(inst), name);
+        case IrInstSrcIdBswap:
+            return destroy(reinterpret_cast<IrInstSrcBswap *>(inst), name);
+        case IrInstSrcIdBitReverse:
+            return destroy(reinterpret_cast<IrInstSrcBitReverse *>(inst), name);
+        case IrInstSrcIdSwitchBr:
+            return destroy(reinterpret_cast<IrInstSrcSwitchBr *>(inst), name);
+        case IrInstSrcIdSwitchVar:
+            return destroy(reinterpret_cast<IrInstSrcSwitchVar *>(inst), name);
+        case IrInstSrcIdSwitchElseVar:
+            return destroy(reinterpret_cast<IrInstSrcSwitchElseVar *>(inst), name);
+        case IrInstSrcIdSwitchTarget:
+            return destroy(reinterpret_cast<IrInstSrcSwitchTarget *>(inst), name);
+        case IrInstSrcIdImport:
+            return destroy(reinterpret_cast<IrInstSrcImport *>(inst), name);
+        case IrInstSrcIdRef:
+            return destroy(reinterpret_cast<IrInstSrcRef *>(inst), name);
+        case IrInstSrcIdCompileErr:
+            return destroy(reinterpret_cast<IrInstSrcCompileErr *>(inst), name);
+        case IrInstSrcIdCompileLog:
+            return destroy(reinterpret_cast<IrInstSrcCompileLog *>(inst), name);
+        case IrInstSrcIdErrName:
+            return destroy(reinterpret_cast<IrInstSrcErrName *>(inst), name);
+        case IrInstSrcIdCImport:
+            return destroy(reinterpret_cast<IrInstSrcCImport *>(inst), name);
+        case IrInstSrcIdCInclude:
+            return destroy(reinterpret_cast<IrInstSrcCInclude *>(inst), name);
+        case IrInstSrcIdCDefine:
+            return destroy(reinterpret_cast<IrInstSrcCDefine *>(inst), name);
+        case IrInstSrcIdCUndef:
+            return destroy(reinterpret_cast<IrInstSrcCUndef *>(inst), name);
+        case IrInstSrcIdEmbedFile:
+            return destroy(reinterpret_cast<IrInstSrcEmbedFile *>(inst), name);
+        case IrInstSrcIdCmpxchg:
+            return destroy(reinterpret_cast<IrInstSrcCmpxchg *>(inst), name);
+        case IrInstSrcIdFence:
+            return destroy(reinterpret_cast<IrInstSrcFence *>(inst), name);
+        case IrInstSrcIdTruncate:
+            return destroy(reinterpret_cast<IrInstSrcTruncate *>(inst), name);
+        case IrInstSrcIdIntCast:
+            return destroy(reinterpret_cast<IrInstSrcIntCast *>(inst), name);
+        case IrInstSrcIdFloatCast:
+            return destroy(reinterpret_cast<IrInstSrcFloatCast *>(inst), name);
+        case IrInstSrcIdErrSetCast:
+            return destroy(reinterpret_cast<IrInstSrcErrSetCast *>(inst), name);
+        case IrInstSrcIdFromBytes:
+            return destroy(reinterpret_cast<IrInstSrcFromBytes *>(inst), name);
+        case IrInstSrcIdToBytes:
+            return destroy(reinterpret_cast<IrInstSrcToBytes *>(inst), name);
+        case IrInstSrcIdIntToFloat:
+            return destroy(reinterpret_cast<IrInstSrcIntToFloat *>(inst), name);
+        case IrInstSrcIdFloatToInt:
+            return destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst), name);
+        case IrInstSrcIdBoolToInt:
+            return destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst), name);
+        case IrInstSrcIdIntType:
+            return destroy(reinterpret_cast<IrInstSrcIntType *>(inst), name);
+        case IrInstSrcIdVectorType:
+            return destroy(reinterpret_cast<IrInstSrcVectorType *>(inst), name);
+        case IrInstSrcIdShuffleVector:
+            return destroy(reinterpret_cast<IrInstSrcShuffleVector *>(inst), name);
+        case IrInstSrcIdSplat:
+            return destroy(reinterpret_cast<IrInstSrcSplat *>(inst), name);
+        case IrInstSrcIdBoolNot:
+            return destroy(reinterpret_cast<IrInstSrcBoolNot *>(inst), name);
+        case IrInstSrcIdMemset:
+            return destroy(reinterpret_cast<IrInstSrcMemset *>(inst), name);
+        case IrInstSrcIdMemcpy:
+            return destroy(reinterpret_cast<IrInstSrcMemcpy *>(inst), name);
+        case IrInstSrcIdSlice:
+            return destroy(reinterpret_cast<IrInstSrcSlice *>(inst), name);
+        case IrInstSrcIdMemberCount:
+            return destroy(reinterpret_cast<IrInstSrcMemberCount *>(inst), name);
+        case IrInstSrcIdMemberType:
+            return destroy(reinterpret_cast<IrInstSrcMemberType *>(inst), name);
+        case IrInstSrcIdMemberName:
+            return destroy(reinterpret_cast<IrInstSrcMemberName *>(inst), name);
+        case IrInstSrcIdBreakpoint:
+            return destroy(reinterpret_cast<IrInstSrcBreakpoint *>(inst), name);
+        case IrInstSrcIdReturnAddress:
+            return destroy(reinterpret_cast<IrInstSrcReturnAddress *>(inst), name);
+        case IrInstSrcIdFrameAddress:
+            return destroy(reinterpret_cast<IrInstSrcFrameAddress *>(inst), name);
+        case IrInstSrcIdFrameHandle:
+            return destroy(reinterpret_cast<IrInstSrcFrameHandle *>(inst), name);
+        case IrInstSrcIdFrameType:
+            return destroy(reinterpret_cast<IrInstSrcFrameType *>(inst), name);
+        case IrInstSrcIdFrameSize:
+            return destroy(reinterpret_cast<IrInstSrcFrameSize *>(inst), name);
+        case IrInstSrcIdAlignOf:
+            return destroy(reinterpret_cast<IrInstSrcAlignOf *>(inst), name);
+        case IrInstSrcIdOverflowOp:
+            return destroy(reinterpret_cast<IrInstSrcOverflowOp *>(inst), name);
+        case IrInstSrcIdTestErr:
+            return destroy(reinterpret_cast<IrInstSrcTestErr *>(inst), name);
+        case IrInstSrcIdUnwrapErrCode:
+            return destroy(reinterpret_cast<IrInstSrcUnwrapErrCode *>(inst), name);
+        case IrInstSrcIdUnwrapErrPayload:
+            return destroy(reinterpret_cast<IrInstSrcUnwrapErrPayload *>(inst), name);
+        case IrInstSrcIdFnProto:
+            return destroy(reinterpret_cast<IrInstSrcFnProto *>(inst), name);
+        case IrInstSrcIdTestComptime:
+            return destroy(reinterpret_cast<IrInstSrcTestComptime *>(inst), name);
+        case IrInstSrcIdPtrCast:
+            return destroy(reinterpret_cast<IrInstSrcPtrCast *>(inst), name);
+        case IrInstSrcIdBitCast:
+            return destroy(reinterpret_cast<IrInstSrcBitCast *>(inst), name);
+        case IrInstSrcIdPtrToInt:
+            return destroy(reinterpret_cast<IrInstSrcPtrToInt *>(inst), name);
+        case IrInstSrcIdIntToPtr:
+            return destroy(reinterpret_cast<IrInstSrcIntToPtr *>(inst), name);
+        case IrInstSrcIdIntToEnum:
+            return destroy(reinterpret_cast<IrInstSrcIntToEnum *>(inst), name);
+        case IrInstSrcIdIntToErr:
+            return destroy(reinterpret_cast<IrInstSrcIntToErr *>(inst), name);
+        case IrInstSrcIdErrToInt:
+            return destroy(reinterpret_cast<IrInstSrcErrToInt *>(inst), name);
+        case IrInstSrcIdCheckSwitchProngs:
+            return destroy(reinterpret_cast<IrInstSrcCheckSwitchProngs *>(inst), name);
+        case IrInstSrcIdCheckStatementIsVoid:
+            return destroy(reinterpret_cast<IrInstSrcCheckStatementIsVoid *>(inst), name);
+        case IrInstSrcIdTypeName:
+            return destroy(reinterpret_cast<IrInstSrcTypeName *>(inst), name);
+        case IrInstSrcIdTagName:
+            return destroy(reinterpret_cast<IrInstSrcTagName *>(inst), name);
+        case IrInstSrcIdPtrType:
+            return destroy(reinterpret_cast<IrInstSrcPtrType *>(inst), name);
+        case IrInstSrcIdDeclRef:
+            return destroy(reinterpret_cast<IrInstSrcDeclRef *>(inst), name);
+        case IrInstSrcIdPanic:
+            return destroy(reinterpret_cast<IrInstSrcPanic *>(inst), name);
+        case IrInstSrcIdFieldParentPtr:
+            return destroy(reinterpret_cast<IrInstSrcFieldParentPtr *>(inst), name);
+        case IrInstSrcIdByteOffsetOf:
+            return destroy(reinterpret_cast<IrInstSrcByteOffsetOf *>(inst), name);
+        case IrInstSrcIdBitOffsetOf:
+            return destroy(reinterpret_cast<IrInstSrcBitOffsetOf *>(inst), name);
+        case IrInstSrcIdTypeInfo:
+            return destroy(reinterpret_cast<IrInstSrcTypeInfo *>(inst), name);
+        case IrInstSrcIdType:
+            return destroy(reinterpret_cast<IrInstSrcType *>(inst), name);
+        case IrInstSrcIdHasField:
+            return destroy(reinterpret_cast<IrInstSrcHasField *>(inst), name);
+        case IrInstSrcIdTypeId:
+            return destroy(reinterpret_cast<IrInstSrcTypeId *>(inst), name);
+        case IrInstSrcIdSetEvalBranchQuota:
+            return destroy(reinterpret_cast<IrInstSrcSetEvalBranchQuota *>(inst), name);
+        case IrInstSrcIdAlignCast:
+            return destroy(reinterpret_cast<IrInstSrcAlignCast *>(inst), name);
+        case IrInstSrcIdImplicitCast:
+            return destroy(reinterpret_cast<IrInstSrcImplicitCast *>(inst), name);
+        case IrInstSrcIdResolveResult:
+            return destroy(reinterpret_cast<IrInstSrcResolveResult *>(inst), name);
+        case IrInstSrcIdResetResult:
+            return destroy(reinterpret_cast<IrInstSrcResetResult *>(inst), name);
+        case IrInstSrcIdOpaqueType:
+            return destroy(reinterpret_cast<IrInstSrcOpaqueType *>(inst), name);
+        case IrInstSrcIdSetAlignStack:
+            return destroy(reinterpret_cast<IrInstSrcSetAlignStack *>(inst), name);
+        case IrInstSrcIdArgType:
+            return destroy(reinterpret_cast<IrInstSrcArgType *>(inst), name);
+        case IrInstSrcIdTagType:
+            return destroy(reinterpret_cast<IrInstSrcTagType *>(inst), name);
+        case IrInstSrcIdExport:
+            return destroy(reinterpret_cast<IrInstSrcExport *>(inst), name);
+        case IrInstSrcIdErrorReturnTrace:
+            return destroy(reinterpret_cast<IrInstSrcErrorReturnTrace *>(inst), name);
+        case IrInstSrcIdErrorUnion:
+            return destroy(reinterpret_cast<IrInstSrcErrorUnion *>(inst), name);
+        case IrInstSrcIdAtomicRmw:
+            return destroy(reinterpret_cast<IrInstSrcAtomicRmw *>(inst), name);
+        case IrInstSrcIdSaveErrRetAddr:
+            return destroy(reinterpret_cast<IrInstSrcSaveErrRetAddr *>(inst), name);
+        case IrInstSrcIdAddImplicitReturnType:
+            return destroy(reinterpret_cast<IrInstSrcAddImplicitReturnType *>(inst), name);
+        case IrInstSrcIdFloatOp:
+            return destroy(reinterpret_cast<IrInstSrcFloatOp *>(inst), name);
+        case IrInstSrcIdMulAdd:
+            return destroy(reinterpret_cast<IrInstSrcMulAdd *>(inst), name);
+        case IrInstSrcIdAtomicLoad:
+            return destroy(reinterpret_cast<IrInstSrcAtomicLoad *>(inst), name);
+        case IrInstSrcIdAtomicStore:
+            return destroy(reinterpret_cast<IrInstSrcAtomicStore *>(inst), name);
+        case IrInstSrcIdEnumToInt:
+            return destroy(reinterpret_cast<IrInstSrcEnumToInt *>(inst), name);
+        case IrInstSrcIdCheckRuntimeScope:
+            return destroy(reinterpret_cast<IrInstSrcCheckRuntimeScope *>(inst), name);
+        case IrInstSrcIdHasDecl:
+            return destroy(reinterpret_cast<IrInstSrcHasDecl *>(inst), name);
+        case IrInstSrcIdUndeclaredIdent:
+            return destroy(reinterpret_cast<IrInstSrcUndeclaredIdent *>(inst), name);
+        case IrInstSrcIdAlloca:
+            return destroy(reinterpret_cast<IrInstSrcAlloca *>(inst), name);
+        case IrInstSrcIdEndExpr:
+            return destroy(reinterpret_cast<IrInstSrcEndExpr *>(inst), name);
+        case IrInstSrcIdUnionInitNamedField:
+            return destroy(reinterpret_cast<IrInstSrcUnionInitNamedField *>(inst), name);
+        case IrInstSrcIdSuspendBegin:
+            return destroy(reinterpret_cast<IrInstSrcSuspendBegin *>(inst), name);
+        case IrInstSrcIdSuspendFinish:
+            return destroy(reinterpret_cast<IrInstSrcSuspendFinish *>(inst), name);
+        case IrInstSrcIdResume:
+            return destroy(reinterpret_cast<IrInstSrcResume *>(inst), name);
+        case IrInstSrcIdAwait:
+            return destroy(reinterpret_cast<IrInstSrcAwait *>(inst), name);
+        case IrInstSrcIdSpillBegin:
+            return destroy(reinterpret_cast<IrInstSrcSpillBegin *>(inst), name);
+        case IrInstSrcIdSpillEnd:
+            return destroy(reinterpret_cast<IrInstSrcSpillEnd *>(inst), name);
+        case IrInstSrcIdCallArgs:
+            return destroy(reinterpret_cast<IrInstSrcCallArgs *>(inst), name);
+    }
+    zig_unreachable();
+}
+
+void destroy_instruction_gen(IrInstGen *inst) {
+#ifdef ZIG_ENABLE_MEM_PROFILE
+    const char *name = ir_inst_gen_type_str(inst->id);
+#else
+    const char *name = nullptr;
+#endif
+    switch (inst->id) {
+        case IrInstGenIdInvalid:
+            zig_unreachable();
+        case IrInstGenIdReturn:
+            return destroy(reinterpret_cast<IrInstGenReturn *>(inst), name);
+        case IrInstGenIdConst:
+            return destroy(reinterpret_cast<IrInstGenConst *>(inst), name);
+        case IrInstGenIdBinOp:
+            return destroy(reinterpret_cast<IrInstGenBinOp *>(inst), name);
+        case IrInstGenIdCast:
+            return destroy(reinterpret_cast<IrInstGenCast *>(inst), name);
+        case IrInstGenIdCall:
+            return destroy(reinterpret_cast<IrInstGenCall *>(inst), name);
+        case IrInstGenIdCondBr:
+            return destroy(reinterpret_cast<IrInstGenCondBr *>(inst), name);
+        case IrInstGenIdBr:
+            return destroy(reinterpret_cast<IrInstGenBr *>(inst), name);
+        case IrInstGenIdPhi:
+            return destroy(reinterpret_cast<IrInstGenPhi *>(inst), name);
+        case IrInstGenIdUnreachable:
+            return destroy(reinterpret_cast<IrInstGenUnreachable *>(inst), name);
+        case IrInstGenIdElemPtr:
+            return destroy(reinterpret_cast<IrInstGenElemPtr *>(inst), name);
+        case IrInstGenIdVarPtr:
+            return destroy(reinterpret_cast<IrInstGenVarPtr *>(inst), name);
+        case IrInstGenIdReturnPtr:
+            return destroy(reinterpret_cast<IrInstGenReturnPtr *>(inst), name);
+        case IrInstGenIdLoadPtr:
+            return destroy(reinterpret_cast<IrInstGenLoadPtr *>(inst), name);
+        case IrInstGenIdStorePtr:
+            return destroy(reinterpret_cast<IrInstGenStorePtr *>(inst), name);
+        case IrInstGenIdVectorStoreElem:
+            return destroy(reinterpret_cast<IrInstGenVectorStoreElem *>(inst), name);
+        case IrInstGenIdStructFieldPtr:
+            return destroy(reinterpret_cast<IrInstGenStructFieldPtr *>(inst), name);
+        case IrInstGenIdUnionFieldPtr:
+            return destroy(reinterpret_cast<IrInstGenUnionFieldPtr *>(inst), name);
+        case IrInstGenIdAsm:
+            return destroy(reinterpret_cast<IrInstGenAsm *>(inst), name);
+        case IrInstGenIdTestNonNull:
+            return destroy(reinterpret_cast<IrInstGenTestNonNull *>(inst), name);
+        case IrInstGenIdOptionalUnwrapPtr:
+            return destroy(reinterpret_cast<IrInstGenOptionalUnwrapPtr *>(inst), name);
+        case IrInstGenIdPopCount:
+            return destroy(reinterpret_cast<IrInstGenPopCount *>(inst), name);
+        case IrInstGenIdClz:
+            return destroy(reinterpret_cast<IrInstGenClz *>(inst), name);
+        case IrInstGenIdCtz:
+            return destroy(reinterpret_cast<IrInstGenCtz *>(inst), name);
+        case IrInstGenIdBswap:
+            return destroy(reinterpret_cast<IrInstGenBswap *>(inst), name);
+        case IrInstGenIdBitReverse:
+            return destroy(reinterpret_cast<IrInstGenBitReverse *>(inst), name);
+        case IrInstGenIdSwitchBr:
+            return destroy(reinterpret_cast<IrInstGenSwitchBr *>(inst), name);
+        case IrInstGenIdUnionTag:
+            return destroy(reinterpret_cast<IrInstGenUnionTag *>(inst), name);
+        case IrInstGenIdRef:
+            return destroy(reinterpret_cast<IrInstGenRef *>(inst), name);
+        case IrInstGenIdErrName:
+            return destroy(reinterpret_cast<IrInstGenErrName *>(inst), name);
+        case IrInstGenIdCmpxchg:
+            return destroy(reinterpret_cast<IrInstGenCmpxchg *>(inst), name);
+        case IrInstGenIdFence:
+            return destroy(reinterpret_cast<IrInstGenFence *>(inst), name);
+        case IrInstGenIdTruncate:
+            return destroy(reinterpret_cast<IrInstGenTruncate *>(inst), name);
+        case IrInstGenIdShuffleVector:
+            return destroy(reinterpret_cast<IrInstGenShuffleVector *>(inst), name);
+        case IrInstGenIdSplat:
+            return destroy(reinterpret_cast<IrInstGenSplat *>(inst), name);
+        case IrInstGenIdBoolNot:
+            return destroy(reinterpret_cast<IrInstGenBoolNot *>(inst), name);
+        case IrInstGenIdMemset:
+            return destroy(reinterpret_cast<IrInstGenMemset *>(inst), name);
+        case IrInstGenIdMemcpy:
+            return destroy(reinterpret_cast<IrInstGenMemcpy *>(inst), name);
+        case IrInstGenIdSlice:
+            return destroy(reinterpret_cast<IrInstGenSlice *>(inst), name);
+        case IrInstGenIdBreakpoint:
+            return destroy(reinterpret_cast<IrInstGenBreakpoint *>(inst), name);
+        case IrInstGenIdReturnAddress:
+            return destroy(reinterpret_cast<IrInstGenReturnAddress *>(inst), name);
+        case IrInstGenIdFrameAddress:
+            return destroy(reinterpret_cast<IrInstGenFrameAddress *>(inst), name);
+        case IrInstGenIdFrameHandle:
+            return destroy(reinterpret_cast<IrInstGenFrameHandle *>(inst), name);
+        case IrInstGenIdFrameSize:
+            return destroy(reinterpret_cast<IrInstGenFrameSize *>(inst), name);
+        case IrInstGenIdOverflowOp:
+            return destroy(reinterpret_cast<IrInstGenOverflowOp *>(inst), name);
+        case IrInstGenIdTestErr:
+            return destroy(reinterpret_cast<IrInstGenTestErr *>(inst), name);
+        case IrInstGenIdUnwrapErrCode:
+            return destroy(reinterpret_cast<IrInstGenUnwrapErrCode *>(inst), name);
+        case IrInstGenIdUnwrapErrPayload:
+            return destroy(reinterpret_cast<IrInstGenUnwrapErrPayload *>(inst), name);
+        case IrInstGenIdOptionalWrap:
+            return destroy(reinterpret_cast<IrInstGenOptionalWrap *>(inst), name);
+        case IrInstGenIdErrWrapCode:
+            return destroy(reinterpret_cast<IrInstGenErrWrapCode *>(inst), name);
+        case IrInstGenIdErrWrapPayload:
+            return destroy(reinterpret_cast<IrInstGenErrWrapPayload *>(inst), name);
+        case IrInstGenIdPtrCast:
+            return destroy(reinterpret_cast<IrInstGenPtrCast *>(inst), name);
+        case IrInstGenIdBitCast:
+            return destroy(reinterpret_cast<IrInstGenBitCast *>(inst), name);
+        case IrInstGenIdWidenOrShorten:
+            return destroy(reinterpret_cast<IrInstGenWidenOrShorten *>(inst), name);
+        case IrInstGenIdPtrToInt:
+            return destroy(reinterpret_cast<IrInstGenPtrToInt *>(inst), name);
+        case IrInstGenIdIntToPtr:
+            return destroy(reinterpret_cast<IrInstGenIntToPtr *>(inst), name);
+        case IrInstGenIdIntToEnum:
+            return destroy(reinterpret_cast<IrInstGenIntToEnum *>(inst), name);
+        case IrInstGenIdIntToErr:
+            return destroy(reinterpret_cast<IrInstGenIntToErr *>(inst), name);
+        case IrInstGenIdErrToInt:
+            return destroy(reinterpret_cast<IrInstGenErrToInt *>(inst), name);
+        case IrInstGenIdTagName:
+            return destroy(reinterpret_cast<IrInstGenTagName *>(inst), name);
+        case IrInstGenIdPanic:
+            return destroy(reinterpret_cast<IrInstGenPanic *>(inst), name);
+        case IrInstGenIdFieldParentPtr:
+            return destroy(reinterpret_cast<IrInstGenFieldParentPtr *>(inst), name);
+        case IrInstGenIdAlignCast:
+            return destroy(reinterpret_cast<IrInstGenAlignCast *>(inst), name);
+        case IrInstGenIdErrorReturnTrace:
+            return destroy(reinterpret_cast<IrInstGenErrorReturnTrace *>(inst), name);
+        case IrInstGenIdAtomicRmw:
+            return destroy(reinterpret_cast<IrInstGenAtomicRmw *>(inst), name);
+        case IrInstGenIdSaveErrRetAddr:
+            return destroy(reinterpret_cast<IrInstGenSaveErrRetAddr *>(inst), name);
+        case IrInstGenIdFloatOp:
+            return destroy(reinterpret_cast<IrInstGenFloatOp *>(inst), name);
+        case IrInstGenIdMulAdd:
+            return destroy(reinterpret_cast<IrInstGenMulAdd *>(inst), name);
+        case IrInstGenIdAtomicLoad:
+            return destroy(reinterpret_cast<IrInstGenAtomicLoad *>(inst), name);
+        case IrInstGenIdAtomicStore:
+            return destroy(reinterpret_cast<IrInstGenAtomicStore *>(inst), name);
+        case IrInstGenIdDeclVar:
+            return destroy(reinterpret_cast<IrInstGenDeclVar *>(inst), name);
+        case IrInstGenIdArrayToVector:
+            return destroy(reinterpret_cast<IrInstGenArrayToVector *>(inst), name);
+        case IrInstGenIdVectorToArray:
+            return destroy(reinterpret_cast<IrInstGenVectorToArray *>(inst), name);
+        case IrInstGenIdPtrOfArrayToSlice:
+            return destroy(reinterpret_cast<IrInstGenPtrOfArrayToSlice *>(inst), name);
+        case IrInstGenIdAssertZero:
+            return destroy(reinterpret_cast<IrInstGenAssertZero *>(inst), name);
+        case IrInstGenIdAssertNonNull:
+            return destroy(reinterpret_cast<IrInstGenAssertNonNull *>(inst), name);
+        case IrInstGenIdResizeSlice:
+            return destroy(reinterpret_cast<IrInstGenResizeSlice *>(inst), name);
+        case IrInstGenIdAlloca:
+            return destroy(reinterpret_cast<IrInstGenAlloca *>(inst), name);
+        case IrInstGenIdSuspendBegin:
+            return destroy(reinterpret_cast<IrInstGenSuspendBegin *>(inst), name);
+        case IrInstGenIdSuspendFinish:
+            return destroy(reinterpret_cast<IrInstGenSuspendFinish *>(inst), name);
+        case IrInstGenIdResume:
+            return destroy(reinterpret_cast<IrInstGenResume *>(inst), name);
+        case IrInstGenIdAwait:
+            return destroy(reinterpret_cast<IrInstGenAwait *>(inst), name);
+        case IrInstGenIdSpillBegin:
+            return destroy(reinterpret_cast<IrInstGenSpillBegin *>(inst), name);
+        case IrInstGenIdSpillEnd:
+            return destroy(reinterpret_cast<IrInstGenSpillEnd *>(inst), name);
+        case IrInstGenIdVectorExtractElem:
+            return destroy(reinterpret_cast<IrInstGenVectorExtractElem *>(inst), name);
+        case IrInstGenIdBinaryNot:
+            return destroy(reinterpret_cast<IrInstGenBinaryNot *>(inst), name);
+        case IrInstGenIdNegation:
+            return destroy(reinterpret_cast<IrInstGenNegation *>(inst), name);
+        case IrInstGenIdNegationWrapping:
+            return destroy(reinterpret_cast<IrInstGenNegationWrapping *>(inst), name);
     }
     zig_unreachable();
 }
@@ -627,17 +759,17 @@ static void ira_deref(IrAnalyze *ira) {
     assert(ira->ref_count != 0);
 
     for (size_t bb_i = 0; bb_i < ira->old_irb.exec->basic_block_list.length; bb_i += 1) {
-        IrBasicBlock *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
+        IrBasicBlockSrc *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
         for (size_t inst_i = 0; inst_i < pass1_bb->instruction_list.length; inst_i += 1) {
-            IrInstruction *pass1_inst = pass1_bb->instruction_list.items[inst_i];
-            destroy_instruction(pass1_inst);
+            IrInstSrc *pass1_inst = pass1_bb->instruction_list.items[inst_i];
+            destroy_instruction_src(pass1_inst);
         }
-        destroy(pass1_bb, "IrBasicBlock");
+        destroy(pass1_bb, "IrBasicBlockSrc");
     }
     ira->old_irb.exec->basic_block_list.deinit();
     ira->old_irb.exec->tld_list.deinit();
     // cannot destroy here because of var->owner_exec
-    //destroy(ira->old_irb.exec, "IrExecutablePass1");
+    //destroy(ira->old_irb.exec, "IrExecutableSrc");
     ira->src_implicit_return_type_list.deinit();
     ira->resume_stack.deinit();
     ira->exec_context.mem_slot_list.deinit();
@@ -785,7 +917,7 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
     zig_unreachable();
 }
 
-static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
+static bool ir_should_inline(IrExecutableSrc *exec, Scope *scope) {
     if (exec->is_inline)
         return true;
 
@@ -801,29 +933,41 @@ static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
     return false;
 }
 
-static void ir_instruction_append(IrBasicBlock *basic_block, IrInstruction *instruction) {
+static void ir_instruction_append(IrBasicBlockSrc *basic_block, IrInstSrc *instruction) {
     assert(basic_block);
     assert(instruction);
     basic_block->instruction_list.append(instruction);
 }
 
-static size_t exec_next_debug_id(IrExecutable *exec) {
+static void ir_inst_gen_append(IrBasicBlockGen *basic_block, IrInstGen *instruction) {
+    assert(basic_block);
+    assert(instruction);
+    basic_block->instruction_list.append(instruction);
+}
+
+static size_t exec_next_debug_id(IrExecutableSrc *exec) {
+    size_t result = exec->next_debug_id;
+    exec->next_debug_id += 1;
+    return result;
+}
+
+static size_t exec_next_debug_id_gen(IrExecutableGen *exec) {
     size_t result = exec->next_debug_id;
     exec->next_debug_id += 1;
     return result;
 }
 
-static size_t exec_next_mem_slot(IrExecutable *exec) {
+static size_t exec_next_mem_slot(IrExecutableSrc *exec) {
     size_t result = exec->mem_slot_count;
     exec->mem_slot_count += 1;
     return result;
 }
 
-static ZigFn *exec_fn_entry(IrExecutable *exec) {
+static ZigFn *exec_fn_entry(IrExecutableSrc *exec) {
     return exec->fn_entry;
 }
 
-static Buf *exec_c_import_buf(IrExecutable *exec) {
+static Buf *exec_c_import_buf(IrExecutableSrc *exec) {
     return exec->c_import_buf;
 }
 
@@ -831,28 +975,42 @@ static bool value_is_comptime(ZigValue *const_val) {
     return const_val->special != ConstValSpecialRuntime;
 }
 
-static bool instr_is_comptime(IrInstruction *instruction) {
+static bool instr_is_comptime(IrInstGen *instruction) {
     return value_is_comptime(instruction->value);
 }
 
-static bool instr_is_unreachable(IrInstruction *instruction) {
-    return instruction->value->type && instruction->value->type->id == ZigTypeIdUnreachable;
+static bool instr_is_unreachable(IrInstSrc *instruction) {
+    return instruction->is_noreturn;
 }
 
-static void ir_link_new_bb(IrBasicBlock *new_bb, IrBasicBlock *old_bb) {
-    new_bb->other = old_bb;
-    old_bb->other = new_bb;
+static void ir_link_new_bb(IrBasicBlockGen *new_bb, IrBasicBlockSrc *old_bb) {
+    new_bb->parent = old_bb;
+    old_bb->child = new_bb;
 }
 
-static void ir_ref_bb(IrBasicBlock *bb) {
+static void ir_ref_bb(IrBasicBlockSrc *bb) {
     bb->ref_count += 1;
 }
 
-static void ir_ref_instruction(IrInstruction *instruction, IrBasicBlock *cur_bb) {
-    assert(instruction->id != IrInstructionIdInvalid);
-    instruction->ref_count += 1;
-    if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
+static void ir_ref_bb_gen(IrBasicBlockGen *bb) {
+    bb->ref_count += 1;
+}
+
+static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) {
+    assert(instruction->id != IrInstSrcIdInvalid);
+    instruction->base.ref_count += 1;
+    if (instruction->owner_bb != cur_bb && !instr_is_unreachable(instruction)
+        && instruction->id != IrInstSrcIdConst)
+    {
         ir_ref_bb(instruction->owner_bb);
+    }
+}
+
+static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) {
+    assert(instruction->id != IrInstGenIdInvalid);
+    instruction->base.ref_count += 1;
+    if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
+        ir_ref_bb_gen(instruction->owner_bb);
 }
 
 static void ir_ref_var(ZigVar *var) {
@@ -871,962 +1029,1259 @@ ZigType *ir_analyze_type_expr(IrAnalyze *ira, Scope *scope, AstNode *node) {
     return result->data.x_type;
 }
 
-static IrBasicBlock *ir_create_basic_block(IrBuilder *irb, Scope *scope, const char *name_hint) {
-    IrBasicBlock *result = allocate<IrBasicBlock>(1, "IrBasicBlock");
+static IrBasicBlockSrc *ir_create_basic_block(IrBuilderSrc *irb, Scope *scope, const char *name_hint) {
+    IrBasicBlockSrc *result = allocate<IrBasicBlockSrc>(1, "IrBasicBlockSrc");
     result->scope = scope;
     result->name_hint = name_hint;
     result->debug_id = exec_next_debug_id(irb->exec);
-    result->index = SIZE_MAX; // set later
+    result->index = UINT32_MAX; // set later
     return result;
 }
 
-static IrBasicBlock *ir_build_bb_from(IrBuilder *irb, IrBasicBlock *other_bb) {
-    IrBasicBlock *new_bb = ir_create_basic_block(irb, other_bb->scope, other_bb->name_hint);
+static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, const char *name_hint) {
+    IrBasicBlockGen *result = allocate<IrBasicBlockGen>(1, "IrBasicBlockGen");
+    result->scope = scope;
+    result->name_hint = name_hint;
+    result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec);
+    result->index = UINT32_MAX; // set later
+    return result;
+}
+
+static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) {
+    IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint);
     ir_link_new_bb(new_bb, other_bb);
     return new_bb;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarSrc *) {
-    return IrInstructionIdDeclVarSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclVar *) {
+    return IrInstSrcIdDeclVar;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarGen *) {
-    return IrInstructionIdDeclVarGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBr *) {
+    return IrInstSrcIdBr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCondBr *) {
-    return IrInstructionIdCondBr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCondBr *) {
+    return IrInstSrcIdCondBr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBr *) {
-    return IrInstructionIdBr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchBr *) {
+    return IrInstSrcIdSwitchBr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchBr *) {
-    return IrInstructionIdSwitchBr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchVar *) {
+    return IrInstSrcIdSwitchVar;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchVar *) {
-    return IrInstructionIdSwitchVar;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchElseVar *) {
+    return IrInstSrcIdSwitchElseVar;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchElseVar *) {
-    return IrInstructionIdSwitchElseVar;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchTarget *) {
+    return IrInstSrcIdSwitchTarget;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchTarget *) {
-    return IrInstructionIdSwitchTarget;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPhi *) {
+    return IrInstSrcIdPhi;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPhi *) {
-    return IrInstructionIdPhi;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnOp *) {
+    return IrInstSrcIdUnOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnOp *) {
-    return IrInstructionIdUnOp;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBinOp *) {
+    return IrInstSrcIdBinOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBinOp *) {
-    return IrInstructionIdBinOp;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMergeErrSets *) {
+    return IrInstSrcIdMergeErrSets;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMergeErrSets *) {
-    return IrInstructionIdMergeErrSets;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcLoadPtr *) {
+    return IrInstSrcIdLoadPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionExport *) {
-    return IrInstructionIdExport;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcStorePtr *) {
+    return IrInstSrcIdStorePtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtr *) {
-    return IrInstructionIdLoadPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldPtr *) {
+    return IrInstSrcIdFieldPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtrGen *) {
-    return IrInstructionIdLoadPtrGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcElemPtr *) {
+    return IrInstSrcIdElemPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionStorePtr *) {
-    return IrInstructionIdStorePtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcVarPtr *) {
+    return IrInstSrcIdVarPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorStoreElem *) {
-    return IrInstructionIdVectorStoreElem;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCall *) {
+    return IrInstSrcIdCall;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldPtr *) {
-    return IrInstructionIdFieldPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallArgs *) {
+    return IrInstSrcIdCallArgs;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionStructFieldPtr *) {
-    return IrInstructionIdStructFieldPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallExtra *) {
+    return IrInstSrcIdCallExtra;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionFieldPtr *) {
-    return IrInstructionIdUnionFieldPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcConst *) {
+    return IrInstSrcIdConst;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionElemPtr *) {
-    return IrInstructionIdElemPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturn *) {
+    return IrInstSrcIdReturn;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionVarPtr *) {
-    return IrInstructionIdVarPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitList *) {
+    return IrInstSrcIdContainerInitList;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnPtr *) {
-    return IrInstructionIdReturnPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitFields *) {
+    return IrInstSrcIdContainerInitFields;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrc *) {
-    return IrInstructionIdCallSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnreachable *) {
+    return IrInstSrcIdUnreachable;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrcArgs *) {
-    return IrInstructionIdCallSrcArgs;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeOf *) {
+    return IrInstSrcIdTypeOf;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCallExtra *) {
-    return IrInstructionIdCallExtra;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetCold *) {
+    return IrInstSrcIdSetCold;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCallGen *) {
-    return IrInstructionIdCallGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetRuntimeSafety *) {
+    return IrInstSrcIdSetRuntimeSafety;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionConst *) {
-    return IrInstructionIdConst;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetFloatMode *) {
+    return IrInstSrcIdSetFloatMode;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionReturn *) {
-    return IrInstructionIdReturn;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcArrayType *) {
+    return IrInstSrcIdArrayType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCast *) {
-    return IrInstructionIdCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAnyFrameType *) {
+    return IrInstSrcIdAnyFrameType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionResizeSlice *) {
-    return IrInstructionIdResizeSlice;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSliceType *) {
+    return IrInstSrcIdSliceType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitList *) {
-    return IrInstructionIdContainerInitList;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAsm *) {
+    return IrInstSrcIdAsm;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitFields *) {
-    return IrInstructionIdContainerInitFields;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSizeOf *) {
+    return IrInstSrcIdSizeOf;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnreachable *) {
-    return IrInstructionIdUnreachable;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestNonNull *) {
+    return IrInstSrcIdTestNonNull;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeOf *) {
-    return IrInstructionIdTypeOf;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcOptionalUnwrapPtr *) {
+    return IrInstSrcIdOptionalUnwrapPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSetCold *) {
-    return IrInstructionIdSetCold;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcClz *) {
+    return IrInstSrcIdClz;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSetRuntimeSafety *) {
-    return IrInstructionIdSetRuntimeSafety;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCtz *) {
+    return IrInstSrcIdCtz;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSetFloatMode *) {
-    return IrInstructionIdSetFloatMode;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPopCount *) {
+    return IrInstSrcIdPopCount;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayType *) {
-    return IrInstructionIdArrayType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBswap *) {
+    return IrInstSrcIdBswap;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAnyFrameType *) {
-    return IrInstructionIdAnyFrameType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitReverse *) {
+    return IrInstSrcIdBitReverse;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceType *) {
-    return IrInstructionIdSliceType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcImport *) {
+    return IrInstSrcIdImport;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmSrc *) {
-    return IrInstructionIdAsmSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCImport *) {
+    return IrInstSrcIdCImport;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmGen *) {
-    return IrInstructionIdAsmGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCInclude *) {
+    return IrInstSrcIdCInclude;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSizeOf *) {
-    return IrInstructionIdSizeOf;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCDefine *) {
+    return IrInstSrcIdCDefine;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTestNonNull *) {
-    return IrInstructionIdTestNonNull;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCUndef *) {
+    return IrInstSrcIdCUndef;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalUnwrapPtr *) {
-    return IrInstructionIdOptionalUnwrapPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcRef *) {
+    return IrInstSrcIdRef;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionClz *) {
-    return IrInstructionIdClz;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileErr *) {
+    return IrInstSrcIdCompileErr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCtz *) {
-    return IrInstructionIdCtz;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileLog *) {
+    return IrInstSrcIdCompileLog;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPopCount *) {
-    return IrInstructionIdPopCount;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrName *) {
+    return IrInstSrcIdErrName;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBswap *) {
-    return IrInstructionIdBswap;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcEmbedFile *) {
+    return IrInstSrcIdEmbedFile;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBitReverse *) {
-    return IrInstructionIdBitReverse;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCmpxchg *) {
+    return IrInstSrcIdCmpxchg;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionTag *) {
-    return IrInstructionIdUnionTag;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFence *) {
+    return IrInstSrcIdFence;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionImport *) {
-    return IrInstructionIdImport;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTruncate *) {
+    return IrInstSrcIdTruncate;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCImport *) {
-    return IrInstructionIdCImport;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntCast *) {
+    return IrInstSrcIdIntCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCInclude *) {
-    return IrInstructionIdCInclude;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatCast *) {
+    return IrInstSrcIdFloatCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCDefine *) {
-    return IrInstructionIdCDefine;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToFloat *) {
+    return IrInstSrcIdIntToFloat;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCUndef *) {
-    return IrInstructionIdCUndef;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatToInt *) {
+    return IrInstSrcIdFloatToInt;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionRef *) {
-    return IrInstructionIdRef;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
+    return IrInstSrcIdBoolToInt;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionRefGen *) {
-    return IrInstructionIdRefGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
+    return IrInstSrcIdIntType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileErr *) {
-    return IrInstructionIdCompileErr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
+    return IrInstSrcIdVectorType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileLog *) {
-    return IrInstructionIdCompileLog;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcShuffleVector *) {
+    return IrInstSrcIdShuffleVector;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrName *) {
-    return IrInstructionIdErrName;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSplat *) {
+    return IrInstSrcIdSplat;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionEmbedFile *) {
-    return IrInstructionIdEmbedFile;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolNot *) {
+    return IrInstSrcIdBoolNot;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgSrc *) {
-    return IrInstructionIdCmpxchgSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemset *) {
+    return IrInstSrcIdMemset;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgGen *) {
-    return IrInstructionIdCmpxchgGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemcpy *) {
+    return IrInstSrcIdMemcpy;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFence *) {
-    return IrInstructionIdFence;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSlice *) {
+    return IrInstSrcIdSlice;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTruncate *) {
-    return IrInstructionIdTruncate;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberCount *) {
+    return IrInstSrcIdMemberCount;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntCast *) {
-    return IrInstructionIdIntCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberType *) {
+    return IrInstSrcIdMemberType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatCast *) {
-    return IrInstructionIdFloatCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberName *) {
+    return IrInstSrcIdMemberName;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrSetCast *) {
-    return IrInstructionIdErrSetCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBreakpoint *) {
+    return IrInstSrcIdBreakpoint;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionToBytes *) {
-    return IrInstructionIdToBytes;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturnAddress *) {
+    return IrInstSrcIdReturnAddress;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFromBytes *) {
-    return IrInstructionIdFromBytes;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameAddress *) {
+    return IrInstSrcIdFrameAddress;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToFloat *) {
-    return IrInstructionIdIntToFloat;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameHandle *) {
+    return IrInstSrcIdFrameHandle;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatToInt *) {
-    return IrInstructionIdFloatToInt;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameType *) {
+    return IrInstSrcIdFrameType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolToInt *) {
-    return IrInstructionIdBoolToInt;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameSize *) {
+    return IrInstSrcIdFrameSize;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntType *) {
-    return IrInstructionIdIntType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignOf *) {
+    return IrInstSrcIdAlignOf;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorType *) {
-    return IrInstructionIdVectorType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcOverflowOp *) {
+    return IrInstSrcIdOverflowOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) {
-    return IrInstructionIdShuffleVector;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestErr *) {
+    return IrInstSrcIdTestErr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {
-    return IrInstructionIdSplatSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcMulAdd *) {
+    return IrInstSrcIdMulAdd;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {
-    return IrInstructionIdSplatGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatOp *) {
+    return IrInstSrcIdFloatOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {
-    return IrInstructionIdBoolNot;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrCode *) {
+    return IrInstSrcIdUnwrapErrCode;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMemset *) {
-    return IrInstructionIdMemset;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrPayload *) {
+    return IrInstSrcIdUnwrapErrPayload;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMemcpy *) {
-    return IrInstructionIdMemcpy;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFnProto *) {
+    return IrInstSrcIdFnProto;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceSrc *) {
-    return IrInstructionIdSliceSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestComptime *) {
+    return IrInstSrcIdTestComptime;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceGen *) {
-    return IrInstructionIdSliceGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrCast *) {
+    return IrInstSrcIdPtrCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberCount *) {
-    return IrInstructionIdMemberCount;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitCast *) {
+    return IrInstSrcIdBitCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberType *) {
-    return IrInstructionIdMemberType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToPtr *) {
+    return IrInstSrcIdIntToPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberName *) {
-    return IrInstructionIdMemberName;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrToInt *) {
+    return IrInstSrcIdPtrToInt;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBreakpoint *) {
-    return IrInstructionIdBreakpoint;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToEnum *) {
+    return IrInstSrcIdIntToEnum;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnAddress *) {
-    return IrInstructionIdReturnAddress;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcEnumToInt *) {
+    return IrInstSrcIdEnumToInt;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameAddress *) {
-    return IrInstructionIdFrameAddress;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToErr *) {
+    return IrInstSrcIdIntToErr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameHandle *) {
-    return IrInstructionIdFrameHandle;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrToInt *) {
+    return IrInstSrcIdErrToInt;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameType *) {
-    return IrInstructionIdFrameType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckSwitchProngs *) {
+    return IrInstSrcIdCheckSwitchProngs;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeSrc *) {
-    return IrInstructionIdFrameSizeSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckStatementIsVoid *) {
+    return IrInstSrcIdCheckStatementIsVoid;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeGen *) {
-    return IrInstructionIdFrameSizeGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeName *) {
+    return IrInstSrcIdTypeName;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignOf *) {
-    return IrInstructionIdAlignOf;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclRef *) {
+    return IrInstSrcIdDeclRef;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionOverflowOp *) {
-    return IrInstructionIdOverflowOp;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPanic *) {
+    return IrInstSrcIdPanic;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrSrc *) {
-    return IrInstructionIdTestErrSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagName *) {
+    return IrInstSrcIdTagName;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrGen *) {
-    return IrInstructionIdTestErrGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagType *) {
+    return IrInstSrcIdTagType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionMulAdd *) {
-  return IrInstructionIdMulAdd;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldParentPtr *) {
+    return IrInstSrcIdFieldParentPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrCode *) {
-    return IrInstructionIdUnwrapErrCode;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcByteOffsetOf *) {
+    return IrInstSrcIdByteOffsetOf;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrPayload *) {
-    return IrInstructionIdUnwrapErrPayload;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitOffsetOf *) {
+    return IrInstSrcIdBitOffsetOf;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalWrap *) {
-    return IrInstructionIdOptionalWrap;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeInfo *) {
+    return IrInstSrcIdTypeInfo;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapPayload *) {
-    return IrInstructionIdErrWrapPayload;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcType *) {
+    return IrInstSrcIdType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapCode *) {
-    return IrInstructionIdErrWrapCode;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasField *) {
+    return IrInstSrcIdHasField;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFnProto *) {
-    return IrInstructionIdFnProto;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeId *) {
+    return IrInstSrcIdTypeId;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTestComptime *) {
-    return IrInstructionIdTestComptime;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetEvalBranchQuota *) {
+    return IrInstSrcIdSetEvalBranchQuota;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastSrc *) {
-    return IrInstructionIdPtrCastSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrType *) {
+    return IrInstSrcIdPtrType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastGen *) {
-    return IrInstructionIdPtrCastGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignCast *) {
+    return IrInstSrcIdAlignCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastSrc *) {
-    return IrInstructionIdBitCastSrc;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcImplicitCast *) {
+    return IrInstSrcIdImplicitCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastGen *) {
-    return IrInstructionIdBitCastGen;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcResolveResult *) {
+    return IrInstSrcIdResolveResult;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionWidenOrShorten *) {
-    return IrInstructionIdWidenOrShorten;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcResetResult *) {
+    return IrInstSrcIdResetResult;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrToInt *) {
-    return IrInstructionIdPtrToInt;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcOpaqueType *) {
+    return IrInstSrcIdOpaqueType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToPtr *) {
-    return IrInstructionIdIntToPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetAlignStack *) {
+    return IrInstSrcIdSetAlignStack;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToEnum *) {
-    return IrInstructionIdIntToEnum;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcArgType *) {
+    return IrInstSrcIdArgType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionEnumToInt *) {
-    return IrInstructionIdEnumToInt;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcExport *) {
+    return IrInstSrcIdExport;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToErr *) {
-    return IrInstructionIdIntToErr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorReturnTrace *) {
+    return IrInstSrcIdErrorReturnTrace;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrToInt *) {
-    return IrInstructionIdErrToInt;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorUnion *) {
+    return IrInstSrcIdErrorUnion;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckSwitchProngs *) {
-    return IrInstructionIdCheckSwitchProngs;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicRmw *) {
+    return IrInstSrcIdAtomicRmw;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckStatementIsVoid *) {
-    return IrInstructionIdCheckStatementIsVoid;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicLoad *) {
+    return IrInstSrcIdAtomicLoad;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeName *) {
-    return IrInstructionIdTypeName;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicStore *) {
+    return IrInstSrcIdAtomicStore;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclRef *) {
-    return IrInstructionIdDeclRef;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSaveErrRetAddr *) {
+    return IrInstSrcIdSaveErrRetAddr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPanic *) {
-    return IrInstructionIdPanic;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAddImplicitReturnType *) {
+    return IrInstSrcIdAddImplicitReturnType;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTagName *) {
-    return IrInstructionIdTagName;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrSetCast *) {
+    return IrInstSrcIdErrSetCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTagType *) {
-    return IrInstructionIdTagType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcToBytes *) {
+    return IrInstSrcIdToBytes;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldParentPtr *) {
-    return IrInstructionIdFieldParentPtr;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcFromBytes *) {
+    return IrInstSrcIdFromBytes;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionByteOffsetOf *) {
-    return IrInstructionIdByteOffsetOf;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckRuntimeScope *) {
+    return IrInstSrcIdCheckRuntimeScope;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionBitOffsetOf *) {
-    return IrInstructionIdBitOffsetOf;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasDecl *) {
+    return IrInstSrcIdHasDecl;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeInfo *) {
-    return IrInstructionIdTypeInfo;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUndeclaredIdent *) {
+    return IrInstSrcIdUndeclaredIdent;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionType *) {
-    return IrInstructionIdType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlloca *) {
+    return IrInstSrcIdAlloca;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionHasField *) {
-    return IrInstructionIdHasField;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcEndExpr *) {
+    return IrInstSrcIdEndExpr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeId *) {
-    return IrInstructionIdTypeId;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnionInitNamedField *) {
+    return IrInstSrcIdUnionInitNamedField;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSetEvalBranchQuota *) {
-    return IrInstructionIdSetEvalBranchQuota;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendBegin *) {
+    return IrInstSrcIdSuspendBegin;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrType *) {
-    return IrInstructionIdPtrType;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendFinish *) {
+    return IrInstSrcIdSuspendFinish;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignCast *) {
-    return IrInstructionIdAlignCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcAwait *) {
+    return IrInstSrcIdAwait;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionImplicitCast *) {
-    return IrInstructionIdImplicitCast;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcResume *) {
+    return IrInstSrcIdResume;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionResolveResult *) {
-    return IrInstructionIdResolveResult;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillBegin *) {
+    return IrInstSrcIdSpillBegin;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionResetResult *) {
-    return IrInstructionIdResetResult;
+static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillEnd *) {
+    return IrInstSrcIdSpillEnd;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrOfArrayToSlice *) {
-    return IrInstructionIdPtrOfArrayToSlice;
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) {
+    return IrInstGenIdDeclVar;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenBr *) {
+    return IrInstGenIdBr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenCondBr *) {
+    return IrInstGenIdCondBr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSwitchBr *) {
+    return IrInstGenIdSwitchBr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenPhi *) {
+    return IrInstGenIdPhi;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenBinaryNot *) {
+    return IrInstGenIdBinaryNot;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenNegation *) {
+    return IrInstGenIdNegation;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenNegationWrapping *) {
+    return IrInstGenIdNegationWrapping;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenBinOp *) {
+    return IrInstGenIdBinOp;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenLoadPtr *) {
+    return IrInstGenIdLoadPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenStorePtr *) {
+    return IrInstGenIdStorePtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenVectorStoreElem *) {
+    return IrInstGenIdVectorStoreElem;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenStructFieldPtr *) {
+    return IrInstGenIdStructFieldPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenUnionFieldPtr *) {
+    return IrInstGenIdUnionFieldPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenElemPtr *) {
+    return IrInstGenIdElemPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenVarPtr *) {
+    return IrInstGenIdVarPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenReturnPtr *) {
+    return IrInstGenIdReturnPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenCall *) {
+    return IrInstGenIdCall;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenReturn *) {
+    return IrInstGenIdReturn;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenCast *) {
+    return IrInstGenIdCast;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenResizeSlice *) {
+    return IrInstGenIdResizeSlice;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenUnreachable *) {
+    return IrInstGenIdUnreachable;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAsm *) {
+    return IrInstGenIdAsm;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenTestNonNull *) {
+    return IrInstGenIdTestNonNull;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalUnwrapPtr *) {
+    return IrInstGenIdOptionalUnwrapPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalWrap *) {
+    return IrInstGenIdOptionalWrap;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenUnionTag *) {
+    return IrInstGenIdUnionTag;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenClz *) {
+    return IrInstGenIdClz;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenCtz *) {
+    return IrInstGenIdCtz;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenPopCount *) {
+    return IrInstGenIdPopCount;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenBswap *) {
+    return IrInstGenIdBswap;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionOpaqueType *) {
-    return IrInstructionIdOpaqueType;
+static constexpr IrInstGenId ir_inst_id(IrInstGenBitReverse *) {
+    return IrInstGenIdBitReverse;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSetAlignStack *) {
-    return IrInstructionIdSetAlignStack;
+static constexpr IrInstGenId ir_inst_id(IrInstGenRef *) {
+    return IrInstGenIdRef;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionArgType *) {
-    return IrInstructionIdArgType;
+static constexpr IrInstGenId ir_inst_id(IrInstGenErrName *) {
+    return IrInstGenIdErrName;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorReturnTrace *) {
-    return IrInstructionIdErrorReturnTrace;
+static constexpr IrInstGenId ir_inst_id(IrInstGenCmpxchg *) {
+    return IrInstGenIdCmpxchg;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorUnion *) {
-    return IrInstructionIdErrorUnion;
+static constexpr IrInstGenId ir_inst_id(IrInstGenFence *) {
+    return IrInstGenIdFence;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicRmw *) {
-    return IrInstructionIdAtomicRmw;
+static constexpr IrInstGenId ir_inst_id(IrInstGenTruncate *) {
+    return IrInstGenIdTruncate;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicLoad *) {
-    return IrInstructionIdAtomicLoad;
+static constexpr IrInstGenId ir_inst_id(IrInstGenShuffleVector *) {
+    return IrInstGenIdShuffleVector;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicStore *) {
-    return IrInstructionIdAtomicStore;
+static constexpr IrInstGenId ir_inst_id(IrInstGenSplat *) {
+    return IrInstGenIdSplat;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSaveErrRetAddr *) {
-    return IrInstructionIdSaveErrRetAddr;
+static constexpr IrInstGenId ir_inst_id(IrInstGenBoolNot *) {
+    return IrInstGenIdBoolNot;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAddImplicitReturnType *) {
-    return IrInstructionIdAddImplicitReturnType;
+static constexpr IrInstGenId ir_inst_id(IrInstGenMemset *) {
+    return IrInstGenIdMemset;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatOp *) {
-    return IrInstructionIdFloatOp;
+static constexpr IrInstGenId ir_inst_id(IrInstGenMemcpy *) {
+    return IrInstGenIdMemcpy;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckRuntimeScope *) {
-    return IrInstructionIdCheckRuntimeScope;
+static constexpr IrInstGenId ir_inst_id(IrInstGenSlice *) {
+    return IrInstGenIdSlice;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorToArray *) {
-    return IrInstructionIdVectorToArray;
+static constexpr IrInstGenId ir_inst_id(IrInstGenBreakpoint *) {
+    return IrInstGenIdBreakpoint;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayToVector *) {
-    return IrInstructionIdArrayToVector;
+static constexpr IrInstGenId ir_inst_id(IrInstGenReturnAddress *) {
+    return IrInstGenIdReturnAddress;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertZero *) {
-    return IrInstructionIdAssertZero;
+static constexpr IrInstGenId ir_inst_id(IrInstGenFrameAddress *) {
+    return IrInstGenIdFrameAddress;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertNonNull *) {
-    return IrInstructionIdAssertNonNull;
+static constexpr IrInstGenId ir_inst_id(IrInstGenFrameHandle *) {
+    return IrInstGenIdFrameHandle;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionHasDecl *) {
-    return IrInstructionIdHasDecl;
+static constexpr IrInstGenId ir_inst_id(IrInstGenFrameSize *) {
+    return IrInstGenIdFrameSize;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUndeclaredIdent *) {
-    return IrInstructionIdUndeclaredIdent;
+static constexpr IrInstGenId ir_inst_id(IrInstGenOverflowOp *) {
+    return IrInstGenIdOverflowOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaSrc *) {
-    return IrInstructionIdAllocaSrc;
+static constexpr IrInstGenId ir_inst_id(IrInstGenTestErr *) {
+    return IrInstGenIdTestErr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaGen *) {
-    return IrInstructionIdAllocaGen;
+static constexpr IrInstGenId ir_inst_id(IrInstGenMulAdd *) {
+    return IrInstGenIdMulAdd;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionEndExpr *) {
-    return IrInstructionIdEndExpr;
+static constexpr IrInstGenId ir_inst_id(IrInstGenFloatOp *) {
+    return IrInstGenIdFloatOp;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionInitNamedField *) {
-    return IrInstructionIdUnionInitNamedField;
+static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrCode *) {
+    return IrInstGenIdUnwrapErrCode;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendBegin *) {
-    return IrInstructionIdSuspendBegin;
+static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrPayload *) {
+    return IrInstGenIdUnwrapErrPayload;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendFinish *) {
-    return IrInstructionIdSuspendFinish;
+static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapCode *) {
+    return IrInstGenIdErrWrapCode;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitSrc *) {
-    return IrInstructionIdAwaitSrc;
+static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapPayload *) {
+    return IrInstGenIdErrWrapPayload;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitGen *) {
-    return IrInstructionIdAwaitGen;
+static constexpr IrInstGenId ir_inst_id(IrInstGenPtrCast *) {
+    return IrInstGenIdPtrCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionResume *) {
-    return IrInstructionIdResume;
+static constexpr IrInstGenId ir_inst_id(IrInstGenBitCast *) {
+    return IrInstGenIdBitCast;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillBegin *) {
-    return IrInstructionIdSpillBegin;
+static constexpr IrInstGenId ir_inst_id(IrInstGenWidenOrShorten *) {
+    return IrInstGenIdWidenOrShorten;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillEnd *) {
-    return IrInstructionIdSpillEnd;
+static constexpr IrInstGenId ir_inst_id(IrInstGenIntToPtr *) {
+    return IrInstGenIdIntToPtr;
 }
 
-static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorExtractElem *) {
-    return IrInstructionIdVectorExtractElem;
+static constexpr IrInstGenId ir_inst_id(IrInstGenPtrToInt *) {
+    return IrInstGenIdPtrToInt;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenIntToEnum *) {
+    return IrInstGenIdIntToEnum;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenIntToErr *) {
+    return IrInstGenIdIntToErr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenErrToInt *) {
+    return IrInstGenIdErrToInt;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenPanic *) {
+    return IrInstGenIdPanic;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenTagName *) {
+    return IrInstGenIdTagName;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenFieldParentPtr *) {
+    return IrInstGenIdFieldParentPtr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAlignCast *) {
+    return IrInstGenIdAlignCast;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenErrorReturnTrace *) {
+    return IrInstGenIdErrorReturnTrace;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicRmw *) {
+    return IrInstGenIdAtomicRmw;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicLoad *) {
+    return IrInstGenIdAtomicLoad;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicStore *) {
+    return IrInstGenIdAtomicStore;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSaveErrRetAddr *) {
+    return IrInstGenIdSaveErrRetAddr;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenVectorToArray *) {
+    return IrInstGenIdVectorToArray;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenArrayToVector *) {
+    return IrInstGenIdArrayToVector;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAssertZero *) {
+    return IrInstGenIdAssertZero;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAssertNonNull *) {
+    return IrInstGenIdAssertNonNull;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenPtrOfArrayToSlice *) {
+    return IrInstGenIdPtrOfArrayToSlice;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendBegin *) {
+    return IrInstGenIdSuspendBegin;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendFinish *) {
+    return IrInstGenIdSuspendFinish;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAwait *) {
+    return IrInstGenIdAwait;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenResume *) {
+    return IrInstGenIdResume;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSpillBegin *) {
+    return IrInstGenIdSpillBegin;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenSpillEnd *) {
+    return IrInstGenIdSpillEnd;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenVectorExtractElem *) {
+    return IrInstGenIdVectorExtractElem;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenAlloca *) {
+    return IrInstGenIdAlloca;
+}
+
+static constexpr IrInstGenId ir_inst_id(IrInstGenConst *) {
+    return IrInstGenIdConst;
+}
+
+template<typename T>
+static T *ir_create_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    const char *name = nullptr;
+#ifdef ZIG_ENABLE_MEM_PROFILE
+    T *dummy = nullptr;
+    name = ir_instruction_type_str(ir_inst_id(dummy));
+#endif
+    T *special_instruction = allocate<T>(1, name);
+    special_instruction->base.id = ir_inst_id(special_instruction);
+    special_instruction->base.base.scope = scope;
+    special_instruction->base.base.source_node = source_node;
+    special_instruction->base.base.debug_id = exec_next_debug_id(irb->exec);
+    special_instruction->base.owner_bb = irb->current_basic_block;
+    return special_instruction;
 }
 
 template<typename T>
-static T *ir_create_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
+static T *ir_create_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
     const char *name = nullptr;
 #ifdef ZIG_ENABLE_MEM_PROFILE
     T *dummy = nullptr;
-    name = ir_instruction_type_str(ir_instruction_id(dummy));
+    name = ir_inst_gen_type_str(ir_inst_id(dummy));
 #endif
     T *special_instruction = allocate<T>(1, name);
-    special_instruction->base.id = ir_instruction_id(special_instruction);
-    special_instruction->base.scope = scope;
-    special_instruction->base.source_node = source_node;
-    special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
+    special_instruction->base.id = ir_inst_id(special_instruction);
+    special_instruction->base.base.scope = scope;
+    special_instruction->base.base.source_node = source_node;
+    special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
     special_instruction->base.owner_bb = irb->current_basic_block;
     special_instruction->base.value = allocate<ZigValue>(1, "ZigValue");
     return special_instruction;
 }
 
 template<typename T>
-static T *ir_create_instruction_noval(IrBuilder *irb, Scope *scope, AstNode *source_node) {
+static T *ir_create_inst_noval(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
     const char *name = nullptr;
 #ifdef ZIG_ENABLE_MEM_PROFILE
     T *dummy = nullptr;
-    name = ir_instruction_type_str(ir_instruction_id(dummy));
+    name = ir_inst_gen_type_str(ir_inst_id(dummy));
 #endif
     T *special_instruction = allocate<T>(1, name);
-    special_instruction->base.id = ir_instruction_id(special_instruction);
-    special_instruction->base.scope = scope;
-    special_instruction->base.source_node = source_node;
-    special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
+    special_instruction->base.id = ir_inst_id(special_instruction);
+    special_instruction->base.base.scope = scope;
+    special_instruction->base.base.source_node = source_node;
+    special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
     special_instruction->base.owner_bb = irb->current_basic_block;
     return special_instruction;
 }
 
 template<typename T>
-static T *ir_build_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
+static T *ir_build_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
     T *special_instruction = ir_create_instruction<T>(irb, scope, source_node);
     ir_instruction_append(irb->current_basic_block, &special_instruction->base);
     return special_instruction;
 }
 
-static IrInstruction *ir_build_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *dest_type,
-    IrInstruction *value, CastOp cast_op)
+template<typename T>
+static T *ir_build_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
+    T *special_instruction = ir_create_inst_gen<T>(irb, scope, source_node);
+    ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
+    return special_instruction;
+}
+
+template<typename T>
+static T *ir_build_inst_noreturn(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
+    T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
+    special_instruction->base.value = irb->codegen->intern.for_unreachable();
+    ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
+    return special_instruction;
+}
+
+template<typename T>
+static T *ir_build_inst_void(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
+    T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
+    special_instruction->base.value = irb->codegen->intern.for_void();
+    ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
+    return special_instruction;
+}
+
+IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
+        ZigType *var_type, const char *name_hint)
+{
+    IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
+    alloca_gen->base.id = IrInstGenIdAlloca;
+    alloca_gen->base.base.source_node = source_node;
+    alloca_gen->base.base.scope = scope;
+    alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
+    alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
+    alloca_gen->base.base.ref_count = 1;
+    alloca_gen->name_hint = name_hint;
+    fn->alloca_gen_list.append(alloca_gen);
+    return &alloca_gen->base;
+}
+
+static IrInstGen *ir_build_cast(IrAnalyze *ira, IrInst *source_instr,ZigType *dest_type,
+    IrInstGen *value, CastOp cast_op)
 {
-    IrInstructionCast *cast_instruction = ir_build_instruction<IrInstructionCast>(irb, scope, source_node);
-    cast_instruction->dest_type = dest_type;
-    cast_instruction->value = value;
-    cast_instruction->cast_op = cast_op;
+    IrInstGenCast *inst = ir_build_inst_gen<IrInstGenCast>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = dest_type;
+    inst->value = value;
+    inst->cast_op = cast_op;
 
-    ir_ref_instruction(value, irb->current_basic_block);
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
 
-    return &cast_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_cond_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *condition,
-        IrBasicBlock *then_block, IrBasicBlock *else_block, IrInstruction *is_comptime)
+static IrInstSrc *ir_build_cond_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *condition,
+        IrBasicBlockSrc *then_block, IrBasicBlockSrc *else_block, IrInstSrc *is_comptime)
 {
-    IrInstructionCondBr *cond_br_instruction = ir_build_instruction<IrInstructionCondBr>(irb, scope, source_node);
-    cond_br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
-    cond_br_instruction->base.value->special = ConstValSpecialStatic;
-    cond_br_instruction->condition = condition;
-    cond_br_instruction->then_block = then_block;
-    cond_br_instruction->else_block = else_block;
-    cond_br_instruction->is_comptime = is_comptime;
+    IrInstSrcCondBr *inst = ir_build_instruction<IrInstSrcCondBr>(irb, scope, source_node);
+    inst->base.is_noreturn = true;
+    inst->condition = condition;
+    inst->then_block = then_block;
+    inst->else_block = else_block;
+    inst->is_comptime = is_comptime;
 
     ir_ref_instruction(condition, irb->current_basic_block);
     ir_ref_bb(then_block);
     ir_ref_bb(else_block);
     if (is_comptime != nullptr) ir_ref_instruction(is_comptime, irb->current_basic_block);
 
-    return &cond_br_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_return(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand)
+static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *condition,
+        IrBasicBlockGen *then_block, IrBasicBlockGen *else_block)
 {
-    IrInstructionReturn *return_instruction = ir_build_instruction<IrInstructionReturn>(irb, scope, source_node);
-    return_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
-    return_instruction->base.value->special = ConstValSpecialStatic;
-    return_instruction->operand = operand;
+    IrInstGenCondBr *inst = ir_build_inst_noreturn<IrInstGenCondBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->condition = condition;
+    inst->then_block = then_block;
+    inst->else_block = else_block;
+
+    ir_ref_inst_gen(condition, ira->new_irb.current_basic_block);
+    ir_ref_bb_gen(then_block);
+    ir_ref_bb_gen(else_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_return_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand) {
+    IrInstSrcReturn *inst = ir_build_instruction<IrInstSrcReturn>(irb, scope, source_node);
+    inst->base.is_noreturn = true;
+    inst->operand = operand;
 
     if (operand != nullptr) ir_ref_instruction(operand, irb->current_basic_block);
 
-    return &return_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_const_void(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
+static IrInstGen *ir_build_return_gen(IrAnalyze *ira, IrInst *source_inst, IrInstGen *operand) {
+    IrInstGenReturn *inst = ir_build_inst_noreturn<IrInstGenReturn>(&ira->new_irb,
+            source_inst->scope, source_inst->source_node);
+    inst->operand = operand;
+
+    if (operand != nullptr) ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_const_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
     ir_instruction_append(irb->current_basic_block, &const_instruction->base);
-    const_instruction->base.value = irb->codegen->intern.for_void();
+    const_instruction->value = irb->codegen->intern.for_void();
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_undefined(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
+static IrInstSrc *ir_build_const_undefined(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
     ir_instruction_append(irb->current_basic_block, &const_instruction->base);
-    const_instruction->base.value = irb->codegen->intern.for_undefined();
+    const_instruction->value = irb->codegen->intern.for_undefined();
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_uint(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
+static IrInstSrc *ir_build_const_uint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
+    const_instruction->value->special = ConstValSpecialStatic;
+    bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_bigint(IrBuilder *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    bigint_init_bigint(&const_instruction->base.value->data.x_bigint, bigint);
+static IrInstSrc *ir_build_const_bigint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
+    const_instruction->value->special = ConstValSpecialStatic;
+    bigint_init_bigint(&const_instruction->value->data.x_bigint, bigint);
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_bigfloat(IrBuilder *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_float;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    bigfloat_init_bigfloat(&const_instruction->base.value->data.x_bigfloat, bigfloat);
+static IrInstSrc *ir_build_const_bigfloat(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_float;
+    const_instruction->value->special = ConstValSpecialStatic;
+    bigfloat_init_bigfloat(&const_instruction->value->data.x_bigfloat, bigfloat);
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_null(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
+static IrInstSrc *ir_build_const_null(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
     ir_instruction_append(irb->current_basic_block, &const_instruction->base);
-    const_instruction->base.value = irb->codegen->intern.for_null();
+    const_instruction->value = irb->codegen->intern.for_null();
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_usize(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_usize;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
+static IrInstSrc *ir_build_const_usize(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_usize;
+    const_instruction->value->special = ConstValSpecialStatic;
+    bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_create_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
+static IrInstSrc *ir_create_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
         ZigType *type_entry)
 {
-    IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_type = type_entry;
+    IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_type;
+    const_instruction->value->special = ConstValSpecialStatic;
+    const_instruction->value->data.x_type = type_entry;
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
+static IrInstSrc *ir_build_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
         ZigType *type_entry)
 {
-    IrInstruction *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
+    IrInstSrc *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
     ir_instruction_append(irb->current_basic_block, instruction);
     return instruction;
 }
 
-static IrInstruction *ir_create_const_fn(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigFn *fn_entry) {
-    IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = fn_entry->type_entry;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_ptr.data.fn.fn_entry = fn_entry;
-    const_instruction->base.value->data.x_ptr.mut = ConstPtrMutComptimeConst;
-    const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialFunction;
+static IrInstSrc *ir_build_const_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigType *import) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_type;
+    const_instruction->value->special = ConstValSpecialStatic;
+    const_instruction->value->data.x_type = import;
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_import(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *import) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_type = import;
+static IrInstSrc *ir_build_const_bool(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, bool value) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_bool;
+    const_instruction->value->special = ConstValSpecialStatic;
+    const_instruction->value->data.x_bool = value;
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_bool(IrBuilder *irb, Scope *scope, AstNode *source_node, bool value) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_bool;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_bool = value;
-    return &const_instruction->base;
-}
-
-static IrInstruction *ir_build_const_enum_literal(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *name) {
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = irb->codegen->builtin_types.entry_enum_literal;
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_enum_literal = name;
-    return &const_instruction->base;
-}
-
-static IrInstruction *ir_build_const_bound_fn(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    ZigFn *fn_entry, IrInstruction *first_arg)
-{
-    IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
-    const_instruction->base.value->type = get_bound_fn_type(irb->codegen, fn_entry);
-    const_instruction->base.value->special = ConstValSpecialStatic;
-    const_instruction->base.value->data.x_bound_fn.fn = fn_entry;
-    const_instruction->base.value->data.x_bound_fn.first_arg = first_arg;
+static IrInstSrc *ir_build_const_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
+    IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    const_instruction->value->type = irb->codegen->builtin_types.entry_enum_literal;
+    const_instruction->value->special = ConstValSpecialStatic;
+    const_instruction->value->data.x_enum_literal = name;
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_create_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
-    IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
-    init_const_str_lit(irb->codegen, const_instruction->base.value, str);
+static IrInstSrc *ir_create_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
+    IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
+    const_instruction->value = create_const_vals(1);
+    init_const_str_lit(irb->codegen, const_instruction->value, str);
 
     return &const_instruction->base;
 }
 
-static IrInstruction *ir_build_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
-    IrInstruction *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
+static IrInstSrc *ir_build_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
+    IrInstSrc *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
     ir_instruction_append(irb->current_basic_block, instruction);
     return instruction;
 }
 
-static IrInstruction *ir_build_bin_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
-        IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
+static IrInstSrc *ir_build_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
+        IrInstSrc *op1, IrInstSrc *op2, bool safety_check_on)
 {
-    IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(irb, scope, source_node);
-    bin_op_instruction->op_id = op_id;
-    bin_op_instruction->op1 = op1;
-    bin_op_instruction->op2 = op2;
-    bin_op_instruction->safety_check_on = safety_check_on;
+    IrInstSrcBinOp *inst = ir_build_instruction<IrInstSrcBinOp>(irb, scope, source_node);
+    inst->op_id = op_id;
+    inst->op1 = op1;
+    inst->op2 = op2;
+    inst->safety_check_on = safety_check_on;
 
     ir_ref_instruction(op1, irb->current_basic_block);
     ir_ref_instruction(op2, irb->current_basic_block);
 
-    return &bin_op_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_bin_op_gen(IrAnalyze *ira, IrInstruction *source_instr, ZigType *res_type,
-        IrBinOp op_id, IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
+static IrInstGen *ir_build_bin_op_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *res_type,
+        IrBinOp op_id, IrInstGen *op1, IrInstGen *op2, bool safety_check_on)
 {
-    IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(&ira->new_irb,
+    IrInstGenBinOp *inst = ir_build_inst_gen<IrInstGenBinOp>(&ira->new_irb,
             source_instr->scope, source_instr->source_node);
-    bin_op_instruction->base.value->type = res_type;
-    bin_op_instruction->op_id = op_id;
-    bin_op_instruction->op1 = op1;
-    bin_op_instruction->op2 = op2;
-    bin_op_instruction->safety_check_on = safety_check_on;
+    inst->base.value->type = res_type;
+    inst->op_id = op_id;
+    inst->op1 = op1;
+    inst->op2 = op2;
+    inst->safety_check_on = safety_check_on;
 
-    ir_ref_instruction(op1, ira->new_irb.current_basic_block);
-    ir_ref_instruction(op2, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
 
-    return &bin_op_instruction->base;
+    return &inst->base;
 }
 
 
-static IrInstruction *ir_build_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *op1, IrInstruction *op2, Buf *type_name)
+static IrInstSrc *ir_build_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *op1, IrInstSrc *op2, Buf *type_name)
 {
-    IrInstructionMergeErrSets *merge_err_sets_instruction = ir_build_instruction<IrInstructionMergeErrSets>(irb, scope, source_node);
-    merge_err_sets_instruction->op1 = op1;
-    merge_err_sets_instruction->op2 = op2;
-    merge_err_sets_instruction->type_name = type_name;
+    IrInstSrcMergeErrSets *inst = ir_build_instruction<IrInstSrcMergeErrSets>(irb, scope, source_node);
+    inst->op1 = op1;
+    inst->op2 = op2;
+    inst->type_name = type_name;
 
     ir_ref_instruction(op1, irb->current_basic_block);
     ir_ref_instruction(op2, irb->current_basic_block);
 
-    return &merge_err_sets_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
+static IrInstSrc *ir_build_var_ptr_x(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
         ScopeFnDef *crossed_fndef_scope)
 {
-    IrInstructionVarPtr *instruction = ir_build_instruction<IrInstructionVarPtr>(irb, scope, source_node);
+    IrInstSrcVarPtr *instruction = ir_build_instruction<IrInstSrcVarPtr>(irb, scope, source_node);
     instruction->var = var;
     instruction->crossed_fndef_scope = crossed_fndef_scope;
 
@@ -1835,22 +2290,31 @@ static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_var_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
+static IrInstSrc *ir_build_var_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
     return ir_build_var_ptr_x(irb, scope, source_node, var, nullptr);
 }
 
-static IrInstruction *ir_build_return_ptr(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
-    IrInstructionReturnPtr *instruction = ir_build_instruction<IrInstructionReturnPtr>(&ira->new_irb,
+static IrInstGen *ir_build_var_ptr_gen(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
+    IrInstGenVarPtr *instruction = ir_build_inst_gen<IrInstGenVarPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    instruction->var = var;
+
+    ir_ref_var(var);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_return_ptr(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
+    IrInstGenReturnPtr *instruction = ir_build_inst_gen<IrInstGenReturnPtr>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ty;
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *array_ptr, IrInstruction *elem_index, bool safety_check_on, PtrLen ptr_len,
+static IrInstSrc *ir_build_elem_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *array_ptr, IrInstSrc *elem_index, bool safety_check_on, PtrLen ptr_len,
         AstNode *init_array_type_source_node)
 {
-    IrInstructionElemPtr *instruction = ir_build_instruction<IrInstructionElemPtr>(irb, scope, source_node);
+    IrInstSrcElemPtr *instruction = ir_build_instruction<IrInstSrcElemPtr>(irb, scope, source_node);
     instruction->array_ptr = array_ptr;
     instruction->elem_index = elem_index;
     instruction->safety_check_on = safety_check_on;
@@ -1863,10 +2327,25 @@ static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *container_ptr, IrInstruction *field_name_expr, bool initializing)
+static IrInstGen *ir_build_elem_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+        IrInstGen *array_ptr, IrInstGen *elem_index, bool safety_check_on, ZigType *return_type)
 {
-    IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
+    IrInstGenElemPtr *instruction = ir_build_inst_gen<IrInstGenElemPtr>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = return_type;
+    instruction->array_ptr = array_ptr;
+    instruction->elem_index = elem_index;
+    instruction->safety_check_on = safety_check_on;
+
+    ir_ref_inst_gen(array_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(elem_index, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_field_ptr_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *container_ptr, IrInstSrc *field_name_expr, bool initializing)
+{
+    IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
     instruction->container_ptr = container_ptr;
     instruction->field_name_buffer = nullptr;
     instruction->field_name_expr = field_name_expr;
@@ -1878,10 +2357,10 @@ static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scop
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *container_ptr, Buf *field_name, bool initializing)
+static IrInstSrc *ir_build_field_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *container_ptr, Buf *field_name, bool initializing)
 {
-    IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
+    IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
     instruction->container_ptr = container_ptr;
     instruction->field_name_buffer = field_name;
     instruction->field_name_expr = nullptr;
@@ -1892,10 +2371,10 @@ static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *container_type, IrInstruction *field_name)
+static IrInstSrc *ir_build_has_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *container_type, IrInstSrc *field_name)
 {
-    IrInstructionHasField *instruction = ir_build_instruction<IrInstructionHasField>(irb, scope, source_node);
+    IrInstSrcHasField *instruction = ir_build_instruction<IrInstSrcHasField>(irb, scope, source_node);
     instruction->container_type = container_type;
     instruction->field_name = field_name;
 
@@ -1905,36 +2384,39 @@ static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_struct_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *struct_ptr, TypeStructField *field)
+static IrInstGen *ir_build_struct_field_ptr(IrAnalyze *ira, IrInst *source_instr,
+    IrInstGen *struct_ptr, TypeStructField *field, ZigType *ptr_type)
 {
-    IrInstructionStructFieldPtr *instruction = ir_build_instruction<IrInstructionStructFieldPtr>(irb, scope, source_node);
-    instruction->struct_ptr = struct_ptr;
-    instruction->field = field;
+    IrInstGenStructFieldPtr *inst = ir_build_inst_gen<IrInstGenStructFieldPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ptr_type;
+    inst->struct_ptr = struct_ptr;
+    inst->field = field;
 
-    ir_ref_instruction(struct_ptr, irb->current_basic_block);
+    ir_ref_inst_gen(struct_ptr, ira->new_irb.current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_union_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing)
+static IrInstGen *ir_build_union_field_ptr(IrAnalyze *ira, IrInst *source_instr,
+    IrInstGen *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing, ZigType *ptr_type)
 {
-    IrInstructionUnionFieldPtr *instruction = ir_build_instruction<IrInstructionUnionFieldPtr>(irb, scope, source_node);
-    instruction->initializing = initializing;
-    instruction->safety_check_on = safety_check_on;
-    instruction->union_ptr = union_ptr;
-    instruction->field = field;
+    IrInstGenUnionFieldPtr *inst = ir_build_inst_gen<IrInstGenUnionFieldPtr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ptr_type;
+    inst->initializing = initializing;
+    inst->safety_check_on = safety_check_on;
+    inst->union_ptr = union_ptr;
+    inst->field = field;
 
-    ir_ref_instruction(union_ptr, irb->current_basic_block);
+    ir_ref_inst_gen(union_ptr, ira->new_irb.current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *options, IrInstruction *fn_ref, IrInstruction *args, ResultLoc *result_loc)
+static IrInstSrc *ir_build_call_extra(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc *args, ResultLoc *result_loc)
 {
-    IrInstructionCallExtra *call_instruction = ir_build_instruction<IrInstructionCallExtra>(irb, scope, source_node);
+    IrInstSrcCallExtra *call_instruction = ir_build_instruction<IrInstSrcCallExtra>(irb, scope, source_node);
     call_instruction->options = options;
     call_instruction->fn_ref = fn_ref;
     call_instruction->args = args;
@@ -1947,11 +2429,11 @@ static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode
     return &call_instruction->base;
 }
 
-static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *options, IrInstruction *fn_ref, IrInstruction **args_ptr, size_t args_len,
+static IrInstSrc *ir_build_call_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc **args_ptr, size_t args_len,
         ResultLoc *result_loc)
 {
-    IrInstructionCallSrcArgs *call_instruction = ir_build_instruction<IrInstructionCallSrcArgs>(irb, scope, source_node);
+    IrInstSrcCallArgs *call_instruction = ir_build_instruction<IrInstSrcCallArgs>(irb, scope, source_node);
     call_instruction->options = options;
     call_instruction->fn_ref = fn_ref;
     call_instruction->args_ptr = args_ptr;
@@ -1966,12 +2448,12 @@ static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNo
     return &call_instruction->base;
 }
 
-static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
-        IrInstruction *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
-        IrInstruction *new_stack, ResultLoc *result_loc)
+static IrInstSrc *ir_build_call_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        ZigFn *fn_entry, IrInstSrc *fn_ref, size_t arg_count, IrInstSrc **args,
+        IrInstSrc *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
+        IrInstSrc *new_stack, ResultLoc *result_loc)
 {
-    IrInstructionCallSrc *call_instruction = ir_build_instruction<IrInstructionCallSrc>(irb, scope, source_node);
+    IrInstSrcCall *call_instruction = ir_build_instruction<IrInstSrcCall>(irb, scope, source_node);
     call_instruction->fn_entry = fn_entry;
     call_instruction->fn_ref = fn_ref;
     call_instruction->args = args;
@@ -1991,12 +2473,12 @@ static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *s
     return &call_instruction->base;
 }
 
-static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
-        CallModifier modifier, IrInstruction *new_stack, bool is_async_call_builtin,
-        IrInstruction *result_loc, ZigType *return_type)
+static IrInstGenCall *ir_build_call_gen(IrAnalyze *ira, IrInst *source_instruction,
+        ZigFn *fn_entry, IrInstGen *fn_ref, size_t arg_count, IrInstGen **args,
+        CallModifier modifier, IrInstGen *new_stack, bool is_async_call_builtin,
+        IrInstGen *result_loc, ZigType *return_type)
 {
-    IrInstructionCallGen *call_instruction = ir_build_instruction<IrInstructionCallGen>(&ira->new_irb,
+    IrInstGenCall *call_instruction = ir_build_inst_gen<IrInstGenCall>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     call_instruction->base.value->type = return_type;
     call_instruction->fn_entry = fn_entry;
@@ -2008,23 +2490,23 @@ static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *so
     call_instruction->new_stack = new_stack;
     call_instruction->result_loc = result_loc;
 
-    if (fn_ref != nullptr) ir_ref_instruction(fn_ref, ira->new_irb.current_basic_block);
+    if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref, ira->new_irb.current_basic_block);
     for (size_t i = 0; i < arg_count; i += 1)
-        ir_ref_instruction(args[i], ira->new_irb.current_basic_block);
-    if (new_stack != nullptr) ir_ref_instruction(new_stack, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+        ir_ref_inst_gen(args[i], ira->new_irb.current_basic_block);
+    if (new_stack != nullptr) ir_ref_inst_gen(new_stack, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return call_instruction;
 }
 
-static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        size_t incoming_count, IrBasicBlock **incoming_blocks, IrInstruction **incoming_values,
+static IrInstSrc *ir_build_phi(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        size_t incoming_count, IrBasicBlockSrc **incoming_blocks, IrInstSrc **incoming_values,
         ResultLocPeerParent *peer_parent)
 {
     assert(incoming_count != 0);
     assert(incoming_count != SIZE_MAX);
 
-    IrInstructionPhi *phi_instruction = ir_build_instruction<IrInstructionPhi>(irb, scope, source_node);
+    IrInstSrcPhi *phi_instruction = ir_build_instruction<IrInstSrcPhi>(irb, scope, source_node);
     phi_instruction->incoming_count = incoming_count;
     phi_instruction->incoming_blocks = incoming_blocks;
     phi_instruction->incoming_values = incoming_values;
@@ -2038,56 +2520,77 @@ static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source
     return &phi_instruction->base;
 }
 
-static IrInstruction *ir_create_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrBasicBlock *dest_block, IrInstruction *is_comptime)
+static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t incoming_count,
+        IrBasicBlockGen **incoming_blocks, IrInstGen **incoming_values, ZigType *result_type)
 {
-    IrInstructionBr *br_instruction = ir_create_instruction<IrInstructionBr>(irb, scope, source_node);
-    br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
-    br_instruction->base.value->special = ConstValSpecialStatic;
-    br_instruction->dest_block = dest_block;
-    br_instruction->is_comptime = is_comptime;
+    assert(incoming_count != 0);
+    assert(incoming_count != SIZE_MAX);
+
+    IrInstGenPhi *phi_instruction = ir_build_inst_gen<IrInstGenPhi>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    phi_instruction->base.value->type = result_type;
+    phi_instruction->incoming_count = incoming_count;
+    phi_instruction->incoming_blocks = incoming_blocks;
+    phi_instruction->incoming_values = incoming_values;
+
+    for (size_t i = 0; i < incoming_count; i += 1) {
+        ir_ref_bb_gen(incoming_blocks[i]);
+        ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block);
+    }
+
+    return &phi_instruction->base;
+}
+
+static IrInstSrc *ir_build_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrBasicBlockSrc *dest_block, IrInstSrc *is_comptime)
+{
+    IrInstSrcBr *inst = ir_build_instruction<IrInstSrcBr>(irb, scope, source_node);
+    inst->base.is_noreturn = true;
+    inst->dest_block = dest_block;
+    inst->is_comptime = is_comptime;
 
     ir_ref_bb(dest_block);
     if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
 
-    return &br_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrBasicBlock *dest_block, IrInstruction *is_comptime)
-{
-    IrInstruction *instruction = ir_create_br(irb, scope, source_node, dest_block, is_comptime);
-    ir_instruction_append(irb->current_basic_block, instruction);
-    return instruction;
+static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicBlockGen *dest_block) {
+    IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->dest_block = dest_block;
+
+    ir_ref_bb_gen(dest_block);
+
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_ptr_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
-        IrInstruction *sentinel, IrInstruction *align_value,
+static IrInstSrc *ir_build_ptr_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
+        IrInstSrc *sentinel, IrInstSrc *align_value,
         uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)
 {
-    IrInstructionPtrType *ptr_type_of_instruction = ir_build_instruction<IrInstructionPtrType>(irb, scope, source_node);
-    ptr_type_of_instruction->sentinel = sentinel;
-    ptr_type_of_instruction->align_value = align_value;
-    ptr_type_of_instruction->child_type = child_type;
-    ptr_type_of_instruction->is_const = is_const;
-    ptr_type_of_instruction->is_volatile = is_volatile;
-    ptr_type_of_instruction->ptr_len = ptr_len;
-    ptr_type_of_instruction->bit_offset_start = bit_offset_start;
-    ptr_type_of_instruction->host_int_bytes = host_int_bytes;
-    ptr_type_of_instruction->is_allow_zero = is_allow_zero;
+    IrInstSrcPtrType *inst = ir_build_instruction<IrInstSrcPtrType>(irb, scope, source_node);
+    inst->sentinel = sentinel;
+    inst->align_value = align_value;
+    inst->child_type = child_type;
+    inst->is_const = is_const;
+    inst->is_volatile = is_volatile;
+    inst->ptr_len = ptr_len;
+    inst->bit_offset_start = bit_offset_start;
+    inst->host_int_bytes = host_int_bytes;
+    inst->is_allow_zero = is_allow_zero;
 
     if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);
     if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);
     ir_ref_instruction(child_type, irb->current_basic_block);
 
-    return &ptr_type_of_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
-        IrInstruction *value, LVal lval, ResultLoc *result_loc)
+static IrInstSrc *ir_build_un_op_lval(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
+        IrInstSrc *value, LVal lval, ResultLoc *result_loc)
 {
-    IrInstructionUnOp *instruction = ir_build_instruction<IrInstructionUnOp>(irb, scope, source_node);
+    IrInstSrcUnOp *instruction = ir_build_instruction<IrInstSrcUnOp>(irb, scope, source_node);
     instruction->op_id = op_id;
     instruction->value = value;
     instruction->lval = lval;
@@ -2098,18 +2601,55 @@ static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_un_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
-        IrInstruction *value)
+static IrInstSrc *ir_build_un_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
+        IrInstSrc *value)
 {
     return ir_build_un_op_lval(irb, scope, source_node, op_id, value, LValNone, nullptr);
 }
 
-static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        size_t item_count, IrInstruction **elem_result_loc_list, IrInstruction *result_loc,
+static IrInstGen *ir_build_negation(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand, ZigType *expr_type) {
+    IrInstGenNegation *instruction = ir_build_inst_gen<IrInstGenNegation>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = expr_type;
+    instruction->operand = operand;
+
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_negation_wrapping(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
+        ZigType *expr_type)
+{
+    IrInstGenNegationWrapping *instruction = ir_build_inst_gen<IrInstGenNegationWrapping>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = expr_type;
+    instruction->operand = operand;
+
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_binary_not(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
+        ZigType *expr_type)
+{
+    IrInstGenBinaryNot *instruction = ir_build_inst_gen<IrInstGenBinaryNot>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = expr_type;
+    instruction->operand = operand;
+
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_container_init_list(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        size_t item_count, IrInstSrc **elem_result_loc_list, IrInstSrc *result_loc,
         AstNode *init_array_type_source_node)
 {
-    IrInstructionContainerInitList *container_init_list_instruction =
-        ir_build_instruction<IrInstructionContainerInitList>(irb, scope, source_node);
+    IrInstSrcContainerInitList *container_init_list_instruction =
+        ir_build_instruction<IrInstSrcContainerInitList>(irb, scope, source_node);
     container_init_list_instruction->item_count = item_count;
     container_init_list_instruction->elem_result_loc_list = elem_result_loc_list;
     container_init_list_instruction->result_loc = result_loc;
@@ -2123,11 +2663,11 @@ static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope,
     return &container_init_list_instruction->base;
 }
 
-static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        size_t field_count, IrInstructionContainerInitFieldsField *fields, IrInstruction *result_loc)
+static IrInstSrc *ir_build_container_init_fields(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        size_t field_count, IrInstSrcContainerInitFieldsField *fields, IrInstSrc *result_loc)
 {
-    IrInstructionContainerInitFields *container_init_fields_instruction =
-        ir_build_instruction<IrInstructionContainerInitFields>(irb, scope, source_node);
+    IrInstSrcContainerInitFields *container_init_fields_instruction =
+        ir_build_instruction<IrInstSrcContainerInitFields>(irb, scope, source_node);
     container_init_fields_instruction->field_count = field_count;
     container_init_fields_instruction->fields = fields;
     container_init_fields_instruction->result_loc = result_loc;
@@ -2140,20 +2680,21 @@ static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scop
     return &container_init_fields_instruction->base;
 }
 
-static IrInstruction *ir_build_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionUnreachable *unreachable_instruction =
-        ir_build_instruction<IrInstructionUnreachable>(irb, scope, source_node);
-    unreachable_instruction->base.value->special = ConstValSpecialStatic;
-    unreachable_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
-    return &unreachable_instruction->base;
+static IrInstSrc *ir_build_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcUnreachable *inst = ir_build_instruction<IrInstSrcUnreachable>(irb, scope, source_node);
+    inst->base.is_noreturn = true;
+    return &inst->base;
 }
 
-static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *ptr, IrInstruction *value)
+static IrInstGen *ir_build_unreachable_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenUnreachable *inst = ir_build_inst_noreturn<IrInstGenUnreachable>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    return &inst->base;
+}
+
+static IrInstSrcStorePtr *ir_build_store_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *ptr, IrInstSrc *value)
 {
-    IrInstructionStorePtr *instruction = ir_build_instruction<IrInstructionStorePtr>(irb, scope, source_node);
-    instruction->base.value->special = ConstValSpecialStatic;
-    instruction->base.value->type = irb->codegen->builtin_types.entry_void;
+    IrInstSrcStorePtr *instruction = ir_build_instruction<IrInstSrcStorePtr>(irb, scope, source_node);
     instruction->ptr = ptr;
     instruction->value = value;
 
@@ -2163,76 +2704,83 @@ static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, A
     return instruction;
 }
 
-static IrInstruction *ir_build_vector_store_elem(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *vector_ptr, IrInstruction *index, IrInstruction *value)
+static IrInstGen *ir_build_store_ptr_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr, IrInstGen *value) {
+    IrInstGenStorePtr *instruction = ir_build_inst_void<IrInstGenStorePtr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->ptr = ptr;
+    instruction->value = value;
+
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_vector_store_elem(IrAnalyze *ira, IrInst *src_inst,
+        IrInstGen *vector_ptr, IrInstGen *index, IrInstGen *value)
 {
-    IrInstructionVectorStoreElem *inst = ir_build_instruction<IrInstructionVectorStoreElem>(
-            &ira->new_irb, source_instruction->scope, source_instruction->source_node);
-    inst->base.value->type = ira->codegen->builtin_types.entry_void;
+    IrInstGenVectorStoreElem *inst = ir_build_inst_void<IrInstGenVectorStoreElem>(
+            &ira->new_irb, src_inst->scope, src_inst->source_node);
     inst->vector_ptr = vector_ptr;
     inst->index = index;
     inst->value = value;
 
-    ir_ref_instruction(vector_ptr, ira->new_irb.current_basic_block);
-    ir_ref_instruction(index, ira->new_irb.current_basic_block);
-    ir_ref_instruction(value, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(vector_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
 
     return &inst->base;
 }
 
-static IrInstruction *ir_build_var_decl_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        ZigVar *var, IrInstruction *align_value, IrInstruction *ptr)
+static IrInstSrc *ir_build_var_decl_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        ZigVar *var, IrInstSrc *align_value, IrInstSrc *ptr)
 {
-    IrInstructionDeclVarSrc *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarSrc>(irb, scope, source_node);
-    decl_var_instruction->base.value->special = ConstValSpecialStatic;
-    decl_var_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
-    decl_var_instruction->var = var;
-    decl_var_instruction->align_value = align_value;
-    decl_var_instruction->ptr = ptr;
+    IrInstSrcDeclVar *inst = ir_build_instruction<IrInstSrcDeclVar>(irb, scope, source_node);
+    inst->var = var;
+    inst->align_value = align_value;
+    inst->ptr = ptr;
 
     if (align_value != nullptr) ir_ref_instruction(align_value, irb->current_basic_block);
     ir_ref_instruction(ptr, irb->current_basic_block);
 
-    return &decl_var_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_var_decl_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigVar *var, IrInstruction *var_ptr)
+static IrInstGen *ir_build_var_decl_gen(IrAnalyze *ira, IrInst *source_instruction,
+        ZigVar *var, IrInstGen *var_ptr)
 {
-    IrInstructionDeclVarGen *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarGen>(&ira->new_irb,
+    IrInstGenDeclVar *inst = ir_build_inst_gen<IrInstGenDeclVar>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
-    decl_var_instruction->base.value->special = ConstValSpecialStatic;
-    decl_var_instruction->base.value->type = ira->codegen->builtin_types.entry_void;
-    decl_var_instruction->var = var;
-    decl_var_instruction->var_ptr = var_ptr;
+    inst->base.value->special = ConstValSpecialStatic;
+    inst->base.value->type = ira->codegen->builtin_types.entry_void;
+    inst->var = var;
+    inst->var_ptr = var_ptr;
 
-    ir_ref_instruction(var_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(var_ptr, ira->new_irb.current_basic_block);
 
-    return &decl_var_instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_resize_slice(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *operand, ZigType *ty, IrInstruction *result_loc)
+static IrInstGen *ir_build_resize_slice(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *operand, ZigType *ty, IrInstGen *result_loc)
 {
-    IrInstructionResizeSlice *instruction = ir_build_instruction<IrInstructionResizeSlice>(&ira->new_irb,
+    IrInstGenResizeSlice *instruction = ir_build_inst_gen<IrInstGenResizeSlice>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ty;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target, IrInstruction *options)
+static IrInstSrc *ir_build_export(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target, IrInstSrc *options)
 {
-    IrInstructionExport *export_instruction = ir_build_instruction<IrInstructionExport>(
+    IrInstSrcExport *export_instruction = ir_build_instruction<IrInstSrcExport>(
             irb, scope, source_node);
-    export_instruction->base.value->special = ConstValSpecialStatic;
-    export_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
     export_instruction->target = target;
     export_instruction->options = options;
 
@@ -2242,8 +2790,8 @@ static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *sou
     return &export_instruction->base;
 }
 
-static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *ptr) {
-    IrInstructionLoadPtr *instruction = ir_build_instruction<IrInstructionLoadPtr>(irb, scope, source_node);
+static IrInstSrc *ir_build_load_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *ptr) {
+    IrInstSrcLoadPtr *instruction = ir_build_instruction<IrInstSrcLoadPtr>(irb, scope, source_node);
     instruction->ptr = ptr;
 
     ir_ref_instruction(ptr, irb->current_basic_block);
@@ -2251,8 +2799,23 @@ static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionTypeOf *instruction = ir_build_instruction<IrInstructionTypeOf>(irb, scope, source_node);
+static IrInstGen *ir_build_load_ptr_gen(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *ptr, ZigType *ty, IrInstGen *result_loc)
+{
+    IrInstGenLoadPtr *instruction = ir_build_inst_gen<IrInstGenLoadPtr>(
+            &ira->new_irb, source_instruction->scope, source_instruction->source_node);
+    instruction->base.value->type = ty;
+    instruction->ptr = ptr;
+    instruction->result_loc = result_loc;
+
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_typeof(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
+    IrInstSrcTypeOf *instruction = ir_build_instruction<IrInstSrcTypeOf>(irb, scope, source_node);
     instruction->value = value;
 
     ir_ref_instruction(value, irb->current_basic_block);
@@ -2260,8 +2823,8 @@ static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *sou
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_cold) {
-    IrInstructionSetCold *instruction = ir_build_instruction<IrInstructionSetCold>(irb, scope, source_node);
+static IrInstSrc *ir_build_set_cold(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_cold) {
+    IrInstSrcSetCold *instruction = ir_build_instruction<IrInstSrcSetCold>(irb, scope, source_node);
     instruction->is_cold = is_cold;
 
     ir_ref_instruction(is_cold, irb->current_basic_block);
@@ -2269,21 +2832,21 @@ static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_set_runtime_safety(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *safety_on)
+static IrInstSrc *ir_build_set_runtime_safety(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *safety_on)
 {
-    IrInstructionSetRuntimeSafety *instruction = ir_build_instruction<IrInstructionSetRuntimeSafety>(irb, scope, source_node);
-    instruction->safety_on = safety_on;
+    IrInstSrcSetRuntimeSafety *inst = ir_build_instruction<IrInstSrcSetRuntimeSafety>(irb, scope, source_node);
+    inst->safety_on = safety_on;
 
     ir_ref_instruction(safety_on, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *mode_value)
+static IrInstSrc *ir_build_set_float_mode(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *mode_value)
 {
-    IrInstructionSetFloatMode *instruction = ir_build_instruction<IrInstructionSetFloatMode>(irb, scope, source_node);
+    IrInstSrcSetFloatMode *instruction = ir_build_instruction<IrInstSrcSetFloatMode>(irb, scope, source_node);
     instruction->mode_value = mode_value;
 
     ir_ref_instruction(mode_value, irb->current_basic_block);
@@ -2291,10 +2854,10 @@ static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstN
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *size,
-        IrInstruction *sentinel, IrInstruction *child_type)
+static IrInstSrc *ir_build_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *size,
+        IrInstSrc *sentinel, IrInstSrc *child_type)
 {
-    IrInstructionArrayType *instruction = ir_build_instruction<IrInstructionArrayType>(irb, scope, source_node);
+    IrInstSrcArrayType *instruction = ir_build_instruction<IrInstSrcArrayType>(irb, scope, source_node);
     instruction->size = size;
     instruction->sentinel = sentinel;
     instruction->child_type = child_type;
@@ -2306,10 +2869,10 @@ static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *payload_type)
+static IrInstSrc *ir_build_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *payload_type)
 {
-    IrInstructionAnyFrameType *instruction = ir_build_instruction<IrInstructionAnyFrameType>(irb, scope, source_node);
+    IrInstSrcAnyFrameType *instruction = ir_build_instruction<IrInstSrcAnyFrameType>(irb, scope, source_node);
     instruction->payload_type = payload_type;
 
     if (payload_type != nullptr) ir_ref_instruction(payload_type, irb->current_basic_block);
@@ -2317,11 +2880,11 @@ static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNo
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *child_type, bool is_const, bool is_volatile,
-        IrInstruction *sentinel, IrInstruction *align_value, bool is_allow_zero)
+static IrInstSrc *ir_build_slice_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *child_type, bool is_const, bool is_volatile,
+        IrInstSrc *sentinel, IrInstSrc *align_value, bool is_allow_zero)
 {
-    IrInstructionSliceType *instruction = ir_build_instruction<IrInstructionSliceType>(irb, scope, source_node);
+    IrInstSrcSliceType *instruction = ir_build_instruction<IrInstSrcSliceType>(irb, scope, source_node);
     instruction->is_const = is_const;
     instruction->is_volatile = is_volatile;
     instruction->child_type = child_type;
@@ -2336,11 +2899,11 @@ static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *asm_template, IrInstruction **input_list, IrInstruction **output_types,
+static IrInstSrc *ir_build_asm_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *asm_template, IrInstSrc **input_list, IrInstSrc **output_types,
         ZigVar **output_vars, size_t return_count, bool has_side_effects, bool is_global)
 {
-    IrInstructionAsmSrc *instruction = ir_build_instruction<IrInstructionAsmSrc>(irb, scope, source_node);
+    IrInstSrcAsm *instruction = ir_build_instruction<IrInstSrcAsm>(irb, scope, source_node);
     instruction->asm_template = asm_template;
     instruction->input_list = input_list;
     instruction->output_types = output_types;
@@ -2351,24 +2914,25 @@ static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *so
 
     assert(source_node->type == NodeTypeAsmExpr);
     for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
-        IrInstruction *output_type = output_types[i];
+        IrInstSrc *output_type = output_types[i];
         if (output_type) ir_ref_instruction(output_type, irb->current_basic_block);
     }
 
     for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
-        IrInstruction *input_value = input_list[i];
+        IrInstSrc *input_value = input_list[i];
         ir_ref_instruction(input_value, irb->current_basic_block);
     }
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+static IrInstGen *ir_build_asm_gen(IrAnalyze *ira, IrInst *source_instr,
         Buf *asm_template, AsmToken *token_list, size_t token_list_len,
-        IrInstruction **input_list, IrInstruction **output_types, ZigVar **output_vars, size_t return_count,
-        bool has_side_effects)
+        IrInstGen **input_list, IrInstGen **output_types, ZigVar **output_vars, size_t return_count,
+        bool has_side_effects, ZigType *return_type)
 {
-    IrInstructionAsmGen *instruction = ir_build_instruction<IrInstructionAsmGen>(&ira->new_irb, scope, source_node);
+    IrInstGenAsm *instruction = ir_build_inst_gen<IrInstGenAsm>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = return_type;
     instruction->asm_template = asm_template;
     instruction->token_list = token_list;
     instruction->token_list_len = token_list_len;
@@ -2378,22 +2942,24 @@ static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *so
     instruction->return_count = return_count;
     instruction->has_side_effects = has_side_effects;
 
-    assert(source_node->type == NodeTypeAsmExpr);
-    for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
-        IrInstruction *output_type = output_types[i];
-        if (output_type) ir_ref_instruction(output_type, ira->new_irb.current_basic_block);
+    assert(source_instr->source_node->type == NodeTypeAsmExpr);
+    for (size_t i = 0; i < source_instr->source_node->data.asm_expr.output_list.length; i += 1) {
+        IrInstGen *output_type = output_types[i];
+        if (output_type) ir_ref_inst_gen(output_type, ira->new_irb.current_basic_block);
     }
 
-    for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
-        IrInstruction *input_value = input_list[i];
-        ir_ref_instruction(input_value, ira->new_irb.current_basic_block);
+    for (size_t i = 0; i < source_instr->source_node->data.asm_expr.input_list.length; i += 1) {
+        IrInstGen *input_value = input_list[i];
+        ir_ref_inst_gen(input_value, ira->new_irb.current_basic_block);
     }
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value, bool bit_size) {
-    IrInstructionSizeOf *instruction = ir_build_instruction<IrInstructionSizeOf>(irb, scope, source_node);
+static IrInstSrc *ir_build_size_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value,
+        bool bit_size)
+{
+    IrInstSrcSizeOf *instruction = ir_build_instruction<IrInstSrcSizeOf>(irb, scope, source_node);
     instruction->type_value = type_value;
     instruction->bit_size = bit_size;
 
@@ -2402,8 +2968,10 @@ static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *so
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionTestNonNull *instruction = ir_build_instruction<IrInstructionTestNonNull>(irb, scope, source_node);
+static IrInstSrc *ir_build_test_non_null_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *value)
+{
+    IrInstSrcTestNonNull *instruction = ir_build_instruction<IrInstSrcTestNonNull>(irb, scope, source_node);
     instruction->value = value;
 
     ir_ref_instruction(value, irb->current_basic_block);
@@ -2411,10 +2979,21 @@ static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *base_ptr, bool safety_check_on, bool initializing)
+static IrInstGen *ir_build_test_non_null_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
+    IrInstGenTestNonNull *inst = ir_build_inst_gen<IrInstGenTestNonNull>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ira->codegen->builtin_types.entry_bool;
+    inst->value = value;
+
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_optional_unwrap_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *base_ptr, bool safety_check_on, bool initializing)
 {
-    IrInstructionOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstructionOptionalUnwrapPtr>(irb, scope, source_node);
+    IrInstSrcOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstSrcOptionalUnwrapPtr>(irb, scope, source_node);
     instruction->base_ptr = base_ptr;
     instruction->safety_check_on = safety_check_on;
     instruction->initializing = initializing;
@@ -2424,113 +3003,198 @@ static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope,
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_optional_wrap(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_ty,
-        IrInstruction *operand, IrInstruction *result_loc)
+static IrInstGen *ir_build_optional_unwrap_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *base_ptr, bool safety_check_on, bool initializing, ZigType *result_type)
 {
-    IrInstructionOptionalWrap *instruction = ir_build_instruction<IrInstructionOptionalWrap>(
+    IrInstGenOptionalUnwrapPtr *inst = ir_build_inst_gen<IrInstGenOptionalUnwrapPtr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    inst->base.value->type = result_type;
+    inst->base_ptr = base_ptr;
+    inst->safety_check_on = safety_check_on;
+    inst->initializing = initializing;
+
+    ir_ref_inst_gen(base_ptr, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_optional_wrap(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_ty,
+        IrInstGen *operand, IrInstGen *result_loc)
+{
+    IrInstGenOptionalWrap *instruction = ir_build_inst_gen<IrInstGenOptionalWrap>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_ty;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
+static IrInstGen *ir_build_err_wrap_payload(IrAnalyze *ira, IrInst *source_instruction,
+        ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
 {
-    IrInstructionErrWrapPayload *instruction = ir_build_instruction<IrInstructionErrWrapPayload>(
+    IrInstGenErrWrapPayload *instruction = ir_build_inst_gen<IrInstGenErrWrapPayload>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
+static IrInstGen *ir_build_err_wrap_code(IrAnalyze *ira, IrInst *source_instruction,
+        ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
 {
-    IrInstructionErrWrapCode *instruction = ir_build_instruction<IrInstructionErrWrapCode>(
+    IrInstGenErrWrapCode *instruction = ir_build_inst_gen<IrInstGenErrWrapCode>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_clz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
-    IrInstructionClz *instruction = ir_build_instruction<IrInstructionClz>(irb, scope, source_node);
+static IrInstSrc *ir_build_clz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
+        IrInstSrc *op)
+{
+    IrInstSrcClz *instruction = ir_build_instruction<IrInstSrcClz>(irb, scope, source_node);
     instruction->type = type;
     instruction->op = op;
 
-    if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
+    ir_ref_instruction(type, irb->current_basic_block);
     ir_ref_instruction(op, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ctz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
-    IrInstructionCtz *instruction = ir_build_instruction<IrInstructionCtz>(irb, scope, source_node);
+static IrInstGen *ir_build_clz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
+    IrInstGenClz *instruction = ir_build_inst_gen<IrInstGenClz>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = result_type;
+    instruction->op = op;
+
+    ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_ctz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
+        IrInstSrc *op)
+{
+    IrInstSrcCtz *instruction = ir_build_instruction<IrInstSrcCtz>(irb, scope, source_node);
     instruction->type = type;
     instruction->op = op;
 
-    if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
+    ir_ref_instruction(type, irb->current_basic_block);
     ir_ref_instruction(op, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_pop_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
-    IrInstructionPopCount *instruction = ir_build_instruction<IrInstructionPopCount>(irb, scope, source_node);
+static IrInstGen *ir_build_ctz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
+    IrInstGenCtz *instruction = ir_build_inst_gen<IrInstGenCtz>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = result_type;
+    instruction->op = op;
+
+    ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_pop_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
+        IrInstSrc *op)
+{
+    IrInstSrcPopCount *instruction = ir_build_instruction<IrInstSrcPopCount>(irb, scope, source_node);
     instruction->type = type;
     instruction->op = op;
 
-    if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
+    ir_ref_instruction(type, irb->current_basic_block);
     ir_ref_instruction(op, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bswap(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
-    IrInstructionBswap *instruction = ir_build_instruction<IrInstructionBswap>(irb, scope, source_node);
+static IrInstGen *ir_build_pop_count_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type,
+        IrInstGen *op)
+{
+    IrInstGenPopCount *instruction = ir_build_inst_gen<IrInstGenPopCount>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = result_type;
+    instruction->op = op;
+
+    ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_bswap(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
+        IrInstSrc *op)
+{
+    IrInstSrcBswap *instruction = ir_build_instruction<IrInstSrcBswap>(irb, scope, source_node);
     instruction->type = type;
     instruction->op = op;
 
-    if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
+    ir_ref_instruction(type, irb->current_basic_block);
     ir_ref_instruction(op, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bit_reverse(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
-    IrInstructionBitReverse *instruction = ir_build_instruction<IrInstructionBitReverse>(irb, scope, source_node);
+static IrInstGen *ir_build_bswap_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *op_type,
+        IrInstGen *op)
+{
+    IrInstGenBswap *instruction = ir_build_inst_gen<IrInstGenBswap>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = op_type;
+    instruction->op = op;
+
+    ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_bit_reverse(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
+        IrInstSrc *op)
+{
+    IrInstSrcBitReverse *instruction = ir_build_instruction<IrInstSrcBitReverse>(irb, scope, source_node);
     instruction->type = type;
     instruction->op = op;
 
-    if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
+    ir_ref_instruction(type, irb->current_basic_block);
     ir_ref_instruction(op, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target_value,
-        IrBasicBlock *else_block, size_t case_count, IrInstructionSwitchBrCase *cases, IrInstruction *is_comptime,
-        IrInstruction *switch_prongs_void)
+static IrInstGen *ir_build_bit_reverse_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *int_type,
+        IrInstGen *op)
+{
+    IrInstGenBitReverse *instruction = ir_build_inst_gen<IrInstGenBitReverse>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = int_type;
+    instruction->op = op;
+
+    ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrcSwitchBr *ir_build_switch_br_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target_value, IrBasicBlockSrc *else_block, size_t case_count, IrInstSrcSwitchBrCase *cases,
+        IrInstSrc *is_comptime, IrInstSrc *switch_prongs_void)
 {
-    IrInstructionSwitchBr *instruction = ir_build_instruction<IrInstructionSwitchBr>(irb, scope, source_node);
-    instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
-    instruction->base.value->special = ConstValSpecialStatic;
+    IrInstSrcSwitchBr *instruction = ir_build_instruction<IrInstSrcSwitchBr>(irb, scope, source_node);
+    instruction->base.is_noreturn = true;
     instruction->target_value = target_value;
     instruction->else_block = else_block;
     instruction->case_count = case_count;
@@ -2539,9 +3203,9 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
     instruction->switch_prongs_void = switch_prongs_void;
 
     ir_ref_instruction(target_value, irb->current_basic_block);
-    if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
+    ir_ref_instruction(is_comptime, irb->current_basic_block);
     ir_ref_bb(else_block);
-    if (switch_prongs_void) ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
+    ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
 
     for (size_t i = 0; i < case_count; i += 1) {
         ir_ref_instruction(cases[i].value, irb->current_basic_block);
@@ -2551,10 +3215,31 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
     return instruction;
 }
 
-static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target_value_ptr)
+static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *target_value, IrBasicBlockGen *else_block, size_t case_count, IrInstGenSwitchBrCase *cases)
 {
-    IrInstructionSwitchTarget *instruction = ir_build_instruction<IrInstructionSwitchTarget>(irb, scope, source_node);
+    IrInstGenSwitchBr *instruction = ir_build_inst_noreturn<IrInstGenSwitchBr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->target_value = target_value;
+    instruction->else_block = else_block;
+    instruction->case_count = case_count;
+    instruction->cases = cases;
+
+    ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block);
+    ir_ref_bb_gen(else_block);
+
+    for (size_t i = 0; i < case_count; i += 1) {
+        ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block);
+        ir_ref_bb_gen(cases[i].block);
+    }
+
+    return instruction;
+}
+
+static IrInstSrc *ir_build_switch_target(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target_value_ptr)
+{
+    IrInstSrcSwitchTarget *instruction = ir_build_instruction<IrInstSrcSwitchTarget>(irb, scope, source_node);
     instruction->target_value_ptr = target_value_ptr;
 
     ir_ref_instruction(target_value_ptr, irb->current_basic_block);
@@ -2562,10 +3247,10 @@ static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNo
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target_value_ptr, IrInstruction **prongs_ptr, size_t prongs_len)
+static IrInstSrc *ir_build_switch_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target_value_ptr, IrInstSrc **prongs_ptr, size_t prongs_len)
 {
-    IrInstructionSwitchVar *instruction = ir_build_instruction<IrInstructionSwitchVar>(irb, scope, source_node);
+    IrInstSrcSwitchVar *instruction = ir_build_instruction<IrInstSrcSwitchVar>(irb, scope, source_node);
     instruction->target_value_ptr = target_value_ptr;
     instruction->prongs_ptr = prongs_ptr;
     instruction->prongs_len = prongs_len;
@@ -2579,10 +3264,10 @@ static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode
 }
 
 // For this instruction the switch_br must be set later.
-static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target_value_ptr)
+static IrInstSrcSwitchElseVar *ir_build_switch_else_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target_value_ptr)
 {
-    IrInstructionSwitchElseVar *instruction = ir_build_instruction<IrInstructionSwitchElseVar>(irb, scope, source_node);
+    IrInstSrcSwitchElseVar *instruction = ir_build_instruction<IrInstSrcSwitchElseVar>(irb, scope, source_node);
     instruction->target_value_ptr = target_value_ptr;
 
     ir_ref_instruction(target_value_ptr, irb->current_basic_block);
@@ -2590,17 +3275,21 @@ static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scop
     return instruction;
 }
 
-static IrInstruction *ir_build_union_tag(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionUnionTag *instruction = ir_build_instruction<IrInstructionUnionTag>(irb, scope, source_node);
+static IrInstGen *ir_build_union_tag(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
+        ZigType *tag_type)
+{
+    IrInstGenUnionTag *instruction = ir_build_inst_gen<IrInstGenUnionTag>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
     instruction->value = value;
+    instruction->base.value->type = tag_type;
 
-    ir_ref_instruction(value, irb->current_basic_block);
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
-    IrInstructionImport *instruction = ir_build_instruction<IrInstructionImport>(irb, scope, source_node);
+static IrInstSrc *ir_build_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
+    IrInstSrcImport *instruction = ir_build_instruction<IrInstSrcImport>(irb, scope, source_node);
     instruction->name = name;
 
     ir_ref_instruction(name, irb->current_basic_block);
@@ -2608,10 +3297,10 @@ static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *sou
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value,
+static IrInstSrc *ir_build_ref_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value,
         bool is_const, bool is_volatile)
 {
-    IrInstructionRef *instruction = ir_build_instruction<IrInstructionRef>(irb, scope, source_node);
+    IrInstSrcRef *instruction = ir_build_instruction<IrInstSrcRef>(irb, scope, source_node);
     instruction->value = value;
     instruction->is_const = is_const;
     instruction->is_volatile = is_volatile;
@@ -2621,23 +3310,23 @@ static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ref_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
-        IrInstruction *operand, IrInstruction *result_loc)
+static IrInstGen *ir_build_ref_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
+        IrInstGen *operand, IrInstGen *result_loc)
 {
-    IrInstructionRefGen *instruction = ir_build_instruction<IrInstructionRefGen>(&ira->new_irb,
+    IrInstGenRef *instruction = ir_build_inst_gen<IrInstGenRef>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
-    IrInstructionCompileErr *instruction = ir_build_instruction<IrInstructionCompileErr>(irb, scope, source_node);
+static IrInstSrc *ir_build_compile_err(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
+    IrInstSrcCompileErr *instruction = ir_build_instruction<IrInstSrcCompileErr>(irb, scope, source_node);
     instruction->msg = msg;
 
     ir_ref_instruction(msg, irb->current_basic_block);
@@ -2645,10 +3334,10 @@ static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        size_t msg_count, IrInstruction **msg_list)
+static IrInstSrc *ir_build_compile_log(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        size_t msg_count, IrInstSrc **msg_list)
 {
-    IrInstructionCompileLog *instruction = ir_build_instruction<IrInstructionCompileLog>(irb, scope, source_node);
+    IrInstSrcCompileLog *instruction = ir_build_instruction<IrInstSrcCompileLog>(irb, scope, source_node);
     instruction->msg_count = msg_count;
     instruction->msg_list = msg_list;
 
@@ -2659,8 +3348,8 @@ static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionErrName *instruction = ir_build_instruction<IrInstructionErrName>(irb, scope, source_node);
+static IrInstSrc *ir_build_err_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
+    IrInstSrcErrName *instruction = ir_build_instruction<IrInstSrcErrName>(irb, scope, source_node);
     instruction->value = value;
 
     ir_ref_instruction(value, irb->current_basic_block);
@@ -2668,13 +3357,26 @@ static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_c_import(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionCImport *instruction = ir_build_instruction<IrInstructionCImport>(irb, scope, source_node);
+static IrInstGen *ir_build_err_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
+        ZigType *str_type)
+{
+    IrInstGenErrName *instruction = ir_build_inst_gen<IrInstGenErrName>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = str_type;
+    instruction->value = value;
+
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_c_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcCImport *instruction = ir_build_instruction<IrInstSrcCImport>(irb, scope, source_node);
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
-    IrInstructionCInclude *instruction = ir_build_instruction<IrInstructionCInclude>(irb, scope, source_node);
+static IrInstSrc *ir_build_c_include(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
+    IrInstSrcCInclude *instruction = ir_build_instruction<IrInstSrcCInclude>(irb, scope, source_node);
     instruction->name = name;
 
     ir_ref_instruction(name, irb->current_basic_block);
@@ -2682,8 +3384,8 @@ static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name, IrInstruction *value) {
-    IrInstructionCDefine *instruction = ir_build_instruction<IrInstructionCDefine>(irb, scope, source_node);
+static IrInstSrc *ir_build_c_define(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name, IrInstSrc *value) {
+    IrInstSrcCDefine *instruction = ir_build_instruction<IrInstSrcCDefine>(irb, scope, source_node);
     instruction->name = name;
     instruction->value = value;
 
@@ -2693,8 +3395,8 @@ static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
-    IrInstructionCUndef *instruction = ir_build_instruction<IrInstructionCUndef>(irb, scope, source_node);
+static IrInstSrc *ir_build_c_undef(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
+    IrInstSrcCUndef *instruction = ir_build_instruction<IrInstSrcCUndef>(irb, scope, source_node);
     instruction->name = name;
 
     ir_ref_instruction(name, irb->current_basic_block);
@@ -2702,8 +3404,8 @@ static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *so
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
-    IrInstructionEmbedFile *instruction = ir_build_instruction<IrInstructionEmbedFile>(irb, scope, source_node);
+static IrInstSrc *ir_build_embed_file(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
+    IrInstSrcEmbedFile *instruction = ir_build_instruction<IrInstSrcEmbedFile>(irb, scope, source_node);
     instruction->name = name;
 
     ir_ref_instruction(name, irb->current_basic_block);
@@ -2711,11 +3413,11 @@ static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *type_value, IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
-    IrInstruction *success_order_value, IrInstruction *failure_order_value, bool is_weak, ResultLoc *result_loc)
+static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *type_value, IrInstSrc *ptr, IrInstSrc *cmp_value, IrInstSrc *new_value,
+    IrInstSrc *success_order_value, IrInstSrc *failure_order_value, bool is_weak, ResultLoc *result_loc)
 {
-    IrInstructionCmpxchgSrc *instruction = ir_build_instruction<IrInstructionCmpxchgSrc>(irb, scope, source_node);
+    IrInstSrcCmpxchg *instruction = ir_build_instruction<IrInstSrcCmpxchg>(irb, scope, source_node);
     instruction->type_value = type_value;
     instruction->ptr = ptr;
     instruction->cmp_value = cmp_value;
@@ -2735,11 +3437,11 @@ static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
-    IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
-    AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstruction *result_loc)
+static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
+    IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
+    AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
 {
-    IrInstructionCmpxchgGen *instruction = ir_build_instruction<IrInstructionCmpxchgGen>(&ira->new_irb,
+    IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->ptr = ptr;
@@ -2750,26 +3452,35 @@ static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source
     instruction->is_weak = is_weak;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
-    ir_ref_instruction(cmp_value, ira->new_irb.current_basic_block);
-    ir_ref_instruction(new_value, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(new_value, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_fence(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *order_value, AtomicOrder order) {
-    IrInstructionFence *instruction = ir_build_instruction<IrInstructionFence>(irb, scope, source_node);
-    instruction->order_value = order_value;
+static IrInstSrc *ir_build_fence(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *order) {
+    IrInstSrcFence *instruction = ir_build_instruction<IrInstSrcFence>(irb, scope, source_node);
     instruction->order = order;
 
-    ir_ref_instruction(order_value, irb->current_basic_block);
+    ir_ref_instruction(order, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionTruncate *instruction = ir_build_instruction<IrInstructionTruncate>(irb, scope, source_node);
+static IrInstGen *ir_build_fence_gen(IrAnalyze *ira, IrInst *source_instr, AtomicOrder order) {
+    IrInstGenFence *instruction = ir_build_inst_void<IrInstGenFence>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->order = order;
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_truncate(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
+{
+    IrInstSrcTruncate *instruction = ir_build_instruction<IrInstSrcTruncate>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2779,8 +3490,23 @@ static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionIntCast *instruction = ir_build_instruction<IrInstructionIntCast>(irb, scope, source_node);
+static IrInstGen *ir_build_truncate_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *dest_type,
+        IrInstGen *target)
+{
+    IrInstGenTruncate *instruction = ir_build_inst_gen<IrInstGenTruncate>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = dest_type;
+    instruction->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_int_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
+        IrInstSrc *target)
+{
+    IrInstSrcIntCast *instruction = ir_build_instruction<IrInstSrcIntCast>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2790,8 +3516,10 @@ static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionFloatCast *instruction = ir_build_instruction<IrInstructionFloatCast>(irb, scope, source_node);
+static IrInstSrc *ir_build_float_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
+        IrInstSrc *target)
+{
+    IrInstSrcFloatCast *instruction = ir_build_instruction<IrInstSrcFloatCast>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2801,8 +3529,10 @@ static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionErrSetCast *instruction = ir_build_instruction<IrInstructionErrSetCast>(irb, scope, source_node);
+static IrInstSrc *ir_build_err_set_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
+{
+    IrInstSrcErrSetCast *instruction = ir_build_instruction<IrInstSrcErrSetCast>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2812,10 +3542,10 @@ static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target,
+static IrInstSrc *ir_build_to_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target,
         ResultLoc *result_loc)
 {
-    IrInstructionToBytes *instruction = ir_build_instruction<IrInstructionToBytes>(irb, scope, source_node);
+    IrInstSrcToBytes *instruction = ir_build_instruction<IrInstSrcToBytes>(irb, scope, source_node);
     instruction->target = target;
     instruction->result_loc = result_loc;
 
@@ -2824,10 +3554,10 @@ static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *dest_child_type, IrInstruction *target, ResultLoc *result_loc)
+static IrInstSrc *ir_build_from_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_child_type, IrInstSrc *target, ResultLoc *result_loc)
 {
-    IrInstructionFromBytes *instruction = ir_build_instruction<IrInstructionFromBytes>(irb, scope, source_node);
+    IrInstSrcFromBytes *instruction = ir_build_instruction<IrInstSrcFromBytes>(irb, scope, source_node);
     instruction->dest_child_type = dest_child_type;
     instruction->target = target;
     instruction->result_loc = result_loc;
@@ -2838,8 +3568,10 @@ static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionIntToFloat *instruction = ir_build_instruction<IrInstructionIntToFloat>(irb, scope, source_node);
+static IrInstSrc *ir_build_int_to_float(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
+{
+    IrInstSrcIntToFloat *instruction = ir_build_instruction<IrInstSrcIntToFloat>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2849,8 +3581,10 @@ static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
-    IrInstructionFloatToInt *instruction = ir_build_instruction<IrInstructionFloatToInt>(irb, scope, source_node);
+static IrInstSrc *ir_build_float_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
+{
+    IrInstSrcFloatToInt *instruction = ir_build_instruction<IrInstSrcFloatToInt>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -2860,8 +3594,8 @@ static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target) {
-    IrInstructionBoolToInt *instruction = ir_build_instruction<IrInstructionBoolToInt>(irb, scope, source_node);
+static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
+    IrInstSrcBoolToInt *instruction = ir_build_instruction<IrInstSrcBoolToInt>(irb, scope, source_node);
     instruction->target = target;
 
     ir_ref_instruction(target, irb->current_basic_block);
@@ -2869,8 +3603,10 @@ static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_signed, IrInstruction *bit_count) {
-    IrInstructionIntType *instruction = ir_build_instruction<IrInstructionIntType>(irb, scope, source_node);
+static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
+        IrInstSrc *bit_count)
+{
+    IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
     instruction->is_signed = is_signed;
     instruction->bit_count = bit_count;
 
@@ -2880,10 +3616,10 @@ static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *len,
-        IrInstruction *elem_type)
+static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
+        IrInstSrc *elem_type)
 {
-    IrInstructionVectorType *instruction = ir_build_instruction<IrInstructionVectorType>(irb, scope, source_node);
+    IrInstSrcVectorType *instruction = ir_build_instruction<IrInstSrcVectorType>(irb, scope, source_node);
     instruction->len = len;
     instruction->elem_type = elem_type;
 
@@ -2893,18 +3629,16 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
+static IrInstSrc *ir_build_shuffle_vector(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *scalar_type, IrInstSrc *a, IrInstSrc *b, IrInstSrc *mask)
 {
-    IrInstructionShuffleVector *instruction = ir_build_instruction<IrInstructionShuffleVector>(irb, scope, source_node);
+    IrInstSrcShuffleVector *instruction = ir_build_instruction<IrInstSrcShuffleVector>(irb, scope, source_node);
     instruction->scalar_type = scalar_type;
     instruction->a = a;
     instruction->b = b;
     instruction->mask = mask;
 
-    if (scalar_type != nullptr) {
-        ir_ref_instruction(scalar_type, irb->current_basic_block);
-    }
+    if (scalar_type != nullptr) ir_ref_instruction(scalar_type, irb->current_basic_block);
     ir_ref_instruction(a, irb->current_basic_block);
     ir_ref_instruction(b, irb->current_basic_block);
     ir_ref_instruction(mask, irb->current_basic_block);
@@ -2912,10 +3646,26 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *len, IrInstruction *scalar)
+static IrInstGen *ir_build_shuffle_vector_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+        ZigType *result_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
 {
-    IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);
+    IrInstGenShuffleVector *inst = ir_build_inst_gen<IrInstGenShuffleVector>(&ira->new_irb, scope, source_node);
+    inst->base.value->type = result_type;
+    inst->a = a;
+    inst->b = b;
+    inst->mask = mask;
+
+    ir_ref_inst_gen(a, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(b, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(mask, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_splat_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *len, IrInstSrc *scalar)
+{
+    IrInstSrcSplat *instruction = ir_build_instruction<IrInstSrcSplat>(irb, scope, source_node);
     instruction->len = len;
     instruction->scalar = scalar;
 
@@ -2925,8 +3675,21 @@ static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionBoolNot *instruction = ir_build_instruction<IrInstructionBoolNot>(irb, scope, source_node);
+static IrInstGen *ir_build_splat_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
+    IrInstGen *scalar)
+{
+    IrInstGenSplat *instruction = ir_build_inst_gen<IrInstGenSplat>(
+            &ira->new_irb, source_instruction->scope, source_instruction->source_node);
+    instruction->base.value->type = result_type;
+    instruction->scalar = scalar;
+
+    ir_ref_inst_gen(scalar, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
+    IrInstSrcBoolNot *instruction = ir_build_instruction<IrInstSrcBoolNot>(irb, scope, source_node);
     instruction->value = value;
 
     ir_ref_instruction(value, irb->current_basic_block);
@@ -2934,10 +3697,21 @@ static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *dest_ptr, IrInstruction *byte, IrInstruction *count)
+static IrInstGen *ir_build_bool_not_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
+    IrInstGenBoolNot *instruction = ir_build_inst_gen<IrInstGenBoolNot>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
+    instruction->value = value;
+
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_memset_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *dest_ptr, IrInstSrc *byte, IrInstSrc *count)
 {
-    IrInstructionMemset *instruction = ir_build_instruction<IrInstructionMemset>(irb, scope, source_node);
+    IrInstSrcMemset *instruction = ir_build_instruction<IrInstSrcMemset>(irb, scope, source_node);
     instruction->dest_ptr = dest_ptr;
     instruction->byte = byte;
     instruction->count = count;
@@ -2949,10 +3723,26 @@ static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *sou
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *dest_ptr, IrInstruction *src_ptr, IrInstruction *count)
+static IrInstGen *ir_build_memset_gen(IrAnalyze *ira, IrInst *source_instr,
+    IrInstGen *dest_ptr, IrInstGen *byte, IrInstGen *count)
 {
-    IrInstructionMemcpy *instruction = ir_build_instruction<IrInstructionMemcpy>(irb, scope, source_node);
+    IrInstGenMemset *instruction = ir_build_inst_void<IrInstGenMemset>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->dest_ptr = dest_ptr;
+    instruction->byte = byte;
+    instruction->count = count;
+
+    ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(byte, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_memcpy_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *dest_ptr, IrInstSrc *src_ptr, IrInstSrc *count)
+{
+    IrInstSrcMemcpy *instruction = ir_build_instruction<IrInstSrcMemcpy>(irb, scope, source_node);
     instruction->dest_ptr = dest_ptr;
     instruction->src_ptr = src_ptr;
     instruction->count = count;
@@ -2964,11 +3754,27 @@ static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *sou
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *ptr, IrInstruction *start, IrInstruction *end, IrInstruction *sentinel,
+static IrInstGen *ir_build_memcpy_gen(IrAnalyze *ira, IrInst *source_instr,
+    IrInstGen *dest_ptr, IrInstGen *src_ptr, IrInstGen *count)
+{
+    IrInstGenMemcpy *instruction = ir_build_inst_void<IrInstGenMemcpy>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->dest_ptr = dest_ptr;
+    instruction->src_ptr = src_ptr;
+    instruction->count = count;
+
+    ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(src_ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *ptr, IrInstSrc *start, IrInstSrc *end, IrInstSrc *sentinel,
     bool safety_check_on, ResultLoc *result_loc)
 {
-    IrInstructionSliceSrc *instruction = ir_build_instruction<IrInstructionSliceSrc>(irb, scope, source_node);
+    IrInstSrcSlice *instruction = ir_build_instruction<IrInstSrcSlice>(irb, scope, source_node);
     instruction->ptr = ptr;
     instruction->start = start;
     instruction->end = end;
@@ -2984,23 +3790,10 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
-    IrInstruction *scalar)
+static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type,
+    IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc)
 {
-    IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
-            &ira->new_irb, source_instruction->scope, source_instruction->source_node);
-    instruction->base.value->type = result_type;
-    instruction->scalar = scalar;
-
-    ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
-
-    return &instruction->base;
-}
-
-static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
-    IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
-{
-    IrInstructionSliceGen *instruction = ir_build_instruction<IrInstructionSliceGen>(
+    IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = slice_type;
     instruction->ptr = ptr;
@@ -3009,16 +3802,16 @@ static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_i
     instruction->safety_check_on = safety_check_on;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
-    ir_ref_instruction(start, ira->new_irb.current_basic_block);
-    if (end) ir_ref_instruction(end, ira->new_irb.current_basic_block);
-    ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(start, ira->new_irb.current_basic_block);
+    if (end) ir_ref_inst_gen(end, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *container) {
-    IrInstructionMemberCount *instruction = ir_build_instruction<IrInstructionMemberCount>(irb, scope, source_node);
+static IrInstSrc *ir_build_member_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *container) {
+    IrInstSrcMemberCount *instruction = ir_build_instruction<IrInstSrcMemberCount>(irb, scope, source_node);
     instruction->container = container;
 
     ir_ref_instruction(container, irb->current_basic_block);
@@ -3026,10 +3819,10 @@ static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *container_type, IrInstruction *member_index)
+static IrInstSrc *ir_build_member_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *container_type, IrInstSrc *member_index)
 {
-    IrInstructionMemberType *instruction = ir_build_instruction<IrInstructionMemberType>(irb, scope, source_node);
+    IrInstSrcMemberType *instruction = ir_build_instruction<IrInstSrcMemberType>(irb, scope, source_node);
     instruction->container_type = container_type;
     instruction->member_index = member_index;
 
@@ -3039,10 +3832,10 @@ static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *container_type, IrInstruction *member_index)
+static IrInstSrc *ir_build_member_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *container_type, IrInstSrc *member_index)
 {
-    IrInstructionMemberName *instruction = ir_build_instruction<IrInstructionMemberName>(irb, scope, source_node);
+    IrInstSrcMemberName *instruction = ir_build_instruction<IrInstSrcMemberName>(irb, scope, source_node);
     instruction->container_type = container_type;
     instruction->member_index = member_index;
 
@@ -3052,65 +3845,88 @@ static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_breakpoint(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionBreakpoint *instruction = ir_build_instruction<IrInstructionBreakpoint>(irb, scope, source_node);
+static IrInstSrc *ir_build_breakpoint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcBreakpoint *instruction = ir_build_instruction<IrInstSrcBreakpoint>(irb, scope, source_node);
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_return_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionReturnAddress *instruction = ir_build_instruction<IrInstructionReturnAddress>(irb, scope, source_node);
+static IrInstGen *ir_build_breakpoint_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenBreakpoint *instruction = ir_build_inst_void<IrInstGenBreakpoint>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_frame_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionFrameAddress *instruction = ir_build_instruction<IrInstructionFrameAddress>(irb, scope, source_node);
+static IrInstSrc *ir_build_return_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcReturnAddress *instruction = ir_build_instruction<IrInstSrcReturnAddress>(irb, scope, source_node);
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_handle(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionFrameHandle *instruction = ir_build_instruction<IrInstructionFrameHandle>(irb, scope, source_node);
-    return &instruction->base;
+static IrInstGen *ir_build_return_address_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenReturnAddress *inst = ir_build_inst_gen<IrInstGenReturnAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ira->codegen->builtin_types.entry_usize;
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_frame_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcFrameAddress *inst = ir_build_instruction<IrInstSrcFrameAddress>(irb, scope, source_node);
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_frame_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
-    IrInstructionFrameType *instruction = ir_build_instruction<IrInstructionFrameType>(irb, scope, source_node);
-    instruction->fn = fn;
+static IrInstGen *ir_build_frame_address_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenFrameAddress *inst = ir_build_inst_gen<IrInstGenFrameAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ira->codegen->builtin_types.entry_usize;
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_handle_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcFrameHandle *inst = ir_build_instruction<IrInstSrcFrameHandle>(irb, scope, source_node);
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_handle_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *ty) {
+    IrInstGenFrameHandle *inst = ir_build_inst_gen<IrInstGenFrameHandle>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ty;
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_frame_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
+    IrInstSrcFrameType *inst = ir_build_instruction<IrInstSrcFrameType>(irb, scope, source_node);
+    inst->fn = fn;
 
     ir_ref_instruction(fn, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_frame_size_src(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
-    IrInstructionFrameSizeSrc *instruction = ir_build_instruction<IrInstructionFrameSizeSrc>(irb, scope, source_node);
-    instruction->fn = fn;
+static IrInstSrc *ir_build_frame_size_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
+    IrInstSrcFrameSize *inst = ir_build_instruction<IrInstSrcFrameSize>(irb, scope, source_node);
+    inst->fn = fn;
 
     ir_ref_instruction(fn, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_frame_size_gen(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn)
+static IrInstGen *ir_build_frame_size_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *fn)
 {
-    IrInstructionFrameSizeGen *instruction = ir_build_instruction<IrInstructionFrameSizeGen>(irb, scope, source_node);
-    instruction->fn = fn;
+    IrInstGenFrameSize *inst = ir_build_inst_gen<IrInstGenFrameSize>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ira->codegen->builtin_types.entry_usize;
+    inst->fn = fn;
 
-    ir_ref_instruction(fn, irb->current_basic_block);
+    ir_ref_inst_gen(fn, ira->new_irb.current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrOverflowOp op, IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2,
-        IrInstruction *result_ptr, ZigType *result_ptr_type)
+static IrInstSrc *ir_build_overflow_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrOverflowOp op, IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *result_ptr)
 {
-    IrInstructionOverflowOp *instruction = ir_build_instruction<IrInstructionOverflowOp>(irb, scope, source_node);
+    IrInstSrcOverflowOp *instruction = ir_build_instruction<IrInstSrcOverflowOp>(irb, scope, source_node);
     instruction->op = op;
     instruction->type_value = type_value;
     instruction->op1 = op1;
     instruction->op2 = op2;
     instruction->result_ptr = result_ptr;
-    instruction->result_ptr_type = result_ptr_type;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
     ir_ref_instruction(op1, irb->current_basic_block);
@@ -3120,49 +3936,30 @@ static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
+static IrInstGen *ir_build_overflow_op_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrOverflowOp op, IrInstGen *op1, IrInstGen *op2, IrInstGen *result_ptr,
+        ZigType *result_ptr_type)
+{
+    IrInstGenOverflowOp *instruction = ir_build_inst_gen<IrInstGenOverflowOp>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
+    instruction->op = op;
+    instruction->op1 = op1;
+    instruction->op2 = op2;
+    instruction->result_ptr = result_ptr;
+    instruction->result_ptr_type = result_ptr_type;
 
-//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign,
-// lround, llround, lrint, llrint
-// So far this is only non-complicated type functions.
-const char *float_op_to_name(BuiltinFnId op) {
-    switch (op) {
-    case BuiltinFnIdSqrt:
-        return "sqrt";
-    case BuiltinFnIdSin:
-        return "sin";
-    case BuiltinFnIdCos:
-        return "cos";
-    case BuiltinFnIdExp:
-        return "exp";
-    case BuiltinFnIdExp2:
-        return "exp2";
-    case BuiltinFnIdLog:
-        return "log";
-    case BuiltinFnIdLog10:
-        return "log10";
-    case BuiltinFnIdLog2:
-        return "log2";
-    case BuiltinFnIdFabs:
-        return "fabs";
-    case BuiltinFnIdFloor:
-        return "floor";
-    case BuiltinFnIdCeil:
-        return "ceil";
-    case BuiltinFnIdTrunc:
-        return "trunc";
-    case BuiltinFnIdNearbyInt:
-        return "nearbyint";
-    case BuiltinFnIdRound:
-        return "round";
-    default:
-        zig_unreachable();
-    }
+    ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(result_ptr, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
 }
 
-static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *operand,
+static IrInstSrc *ir_build_float_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand,
         BuiltinFnId fn_id)
 {
-    IrInstructionFloatOp *instruction = ir_build_instruction<IrInstructionFloatOp>(irb, scope, source_node);
+    IrInstSrcFloatOp *instruction = ir_build_instruction<IrInstSrcFloatOp>(irb, scope, source_node);
     instruction->operand = operand;
     instruction->fn_id = fn_id;
 
@@ -3171,9 +3968,24 @@ static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2, IrInstruction *op3) {
-    IrInstructionMulAdd *instruction = ir_build_instruction<IrInstructionMulAdd>(irb, scope, source_node);
+static IrInstGen *ir_build_float_op_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
+        BuiltinFnId fn_id, ZigType *operand_type)
+{
+    IrInstGenFloatOp *instruction = ir_build_inst_gen<IrInstGenFloatOp>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = operand_type;
+    instruction->operand = operand;
+    instruction->fn_id = fn_id;
+
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_mul_add_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *op3)
+{
+    IrInstSrcMulAdd *instruction = ir_build_instruction<IrInstSrcMulAdd>(irb, scope, source_node);
     instruction->type_value = type_value;
     instruction->op1 = op1;
     instruction->op2 = op2;
@@ -3187,8 +3999,25 @@ static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *so
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value) {
-    IrInstructionAlignOf *instruction = ir_build_instruction<IrInstructionAlignOf>(irb, scope, source_node);
+static IrInstGen *ir_build_mul_add_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *op1, IrInstGen *op2,
+        IrInstGen *op3, ZigType *expr_type)
+{
+    IrInstGenMulAdd *instruction = ir_build_inst_gen<IrInstGenMulAdd>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = expr_type;
+    instruction->op1 = op1;
+    instruction->op2 = op2;
+    instruction->op3 = op3;
+
+    ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(op3, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_align_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
+    IrInstSrcAlignOf *instruction = ir_build_instruction<IrInstSrcAlignOf>(irb, scope, source_node);
     instruction->type_value = type_value;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
@@ -3196,10 +4025,10 @@ static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
+static IrInstSrc *ir_build_test_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
 {
-    IrInstructionTestErrSrc *instruction = ir_build_instruction<IrInstructionTestErrSrc>(irb, scope, source_node);
+    IrInstSrcTestErr *instruction = ir_build_instruction<IrInstSrcTestErr>(irb, scope, source_node);
     instruction->base_ptr = base_ptr;
     instruction->resolve_err_set = resolve_err_set;
     instruction->base_ptr_is_payload = base_ptr_is_payload;
@@ -3209,48 +4038,72 @@ static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_test_err_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-    IrInstruction *err_union)
-{
-    IrInstructionTestErrGen *instruction = ir_build_instruction<IrInstructionTestErrGen>(
+static IrInstGen *ir_build_test_err_gen(IrAnalyze *ira, IrInst *source_instruction, IrInstGen *err_union) {
+    IrInstGenTestErr *instruction = ir_build_inst_gen<IrInstGenTestErr>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
     instruction->err_union = err_union;
 
-    ir_ref_instruction(err_union, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(err_union, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_unwrap_err_code(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *err_union_ptr)
+static IrInstSrc *ir_build_unwrap_err_code_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *err_union_ptr)
 {
-    IrInstructionUnwrapErrCode *instruction = ir_build_instruction<IrInstructionUnwrapErrCode>(irb, scope, source_node);
-    instruction->err_union_ptr = err_union_ptr;
+    IrInstSrcUnwrapErrCode *inst = ir_build_instruction<IrInstSrcUnwrapErrCode>(irb, scope, source_node);
+    inst->err_union_ptr = err_union_ptr;
 
     ir_ref_instruction(err_union_ptr, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_unwrap_err_payload(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *value, bool safety_check_on, bool initializing)
+static IrInstGen *ir_build_unwrap_err_code_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+    IrInstGen *err_union_ptr, ZigType *result_type)
 {
-    IrInstructionUnwrapErrPayload *instruction = ir_build_instruction<IrInstructionUnwrapErrPayload>(irb, scope, source_node);
-    instruction->value = value;
-    instruction->safety_check_on = safety_check_on;
-    instruction->initializing = initializing;
+    IrInstGenUnwrapErrCode *inst = ir_build_inst_gen<IrInstGenUnwrapErrCode>(&ira->new_irb, scope, source_node);
+    inst->base.value->type = result_type;
+    inst->err_union_ptr = err_union_ptr;
+
+    ir_ref_inst_gen(err_union_ptr, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_unwrap_err_payload_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *value, bool safety_check_on, bool initializing)
+{
+    IrInstSrcUnwrapErrPayload *inst = ir_build_instruction<IrInstSrcUnwrapErrPayload>(irb, scope, source_node);
+    inst->value = value;
+    inst->safety_check_on = safety_check_on;
+    inst->initializing = initializing;
 
     ir_ref_instruction(value, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction **param_types, IrInstruction *align_value, IrInstruction *callconv_value,
-    IrInstruction *return_type, bool is_var_args)
+static IrInstGen *ir_build_unwrap_err_payload_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+    IrInstGen *value, bool safety_check_on, bool initializing, ZigType *result_type)
 {
-    IrInstructionFnProto *instruction = ir_build_instruction<IrInstructionFnProto>(irb, scope, source_node);
+    IrInstGenUnwrapErrPayload *inst = ir_build_inst_gen<IrInstGenUnwrapErrPayload>(&ira->new_irb, scope, source_node);
+    inst->base.value->type = result_type;
+    inst->value = value;
+    inst->safety_check_on = safety_check_on;
+    inst->initializing = initializing;
+
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_fn_proto(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc **param_types, IrInstSrc *align_value, IrInstSrc *callconv_value,
+    IrInstSrc *return_type, bool is_var_args)
+{
+    IrInstSrcFnProto *instruction = ir_build_instruction<IrInstSrcFnProto>(irb, scope, source_node);
     instruction->param_types = param_types;
     instruction->align_value = align_value;
     instruction->callconv_value = callconv_value;
@@ -3270,8 +4123,8 @@ static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
-    IrInstructionTestComptime *instruction = ir_build_instruction<IrInstructionTestComptime>(irb, scope, source_node);
+static IrInstSrc *ir_build_test_comptime(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
+    IrInstSrcTestComptime *instruction = ir_build_instruction<IrInstSrcTestComptime>(irb, scope, source_node);
     instruction->value = value;
 
     ir_ref_instruction(value, irb->current_basic_block);
@@ -3279,10 +4132,10 @@ static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNo
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *dest_type, IrInstruction *ptr, bool safety_check_on)
+static IrInstSrc *ir_build_ptr_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *ptr, bool safety_check_on)
 {
-    IrInstructionPtrCastSrc *instruction = ir_build_instruction<IrInstructionPtrCastSrc>(
+    IrInstSrcPtrCast *instruction = ir_build_instruction<IrInstSrcPtrCast>(
             irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->ptr = ptr;
@@ -3294,39 +4147,24 @@ static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigType *ptr_type, IrInstruction *ptr, bool safety_check_on)
+static IrInstGen *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
+        ZigType *ptr_type, IrInstGen *ptr, bool safety_check_on)
 {
-    IrInstructionPtrCastGen *instruction = ir_build_instruction<IrInstructionPtrCastGen>(
+    IrInstGenPtrCast *instruction = ir_build_inst_gen<IrInstGenPtrCast>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ptr_type;
     instruction->ptr = ptr;
     instruction->safety_check_on = safety_check_on;
 
-    ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_load_ptr_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *ptr, ZigType *ty, IrInstruction *result_loc)
+static IrInstSrc *ir_build_implicit_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand, ResultLocCast *result_loc_cast)
 {
-    IrInstructionLoadPtrGen *instruction = ir_build_instruction<IrInstructionLoadPtrGen>(
-            &ira->new_irb, source_instruction->scope, source_instruction->source_node);
-    instruction->base.value->type = ty;
-    instruction->ptr = ptr;
-    instruction->result_loc = result_loc;
-
-    ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
-
-    return &instruction->base;
-}
-
-static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand, ResultLocCast *result_loc_cast)
-{
-    IrInstructionImplicitCast *instruction = ir_build_instruction<IrInstructionImplicitCast>(irb, scope, source_node);
+    IrInstSrcImplicitCast *instruction = ir_build_instruction<IrInstSrcImplicitCast>(irb, scope, source_node);
     instruction->operand = operand;
     instruction->result_loc_cast = result_loc_cast;
 
@@ -3335,10 +4173,10 @@ static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNo
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand, ResultLocBitCast *result_loc_bit_cast)
+static IrInstSrc *ir_build_bit_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand, ResultLocBitCast *result_loc_bit_cast)
 {
-    IrInstructionBitCastSrc *instruction = ir_build_instruction<IrInstructionBitCastSrc>(irb, scope, source_node);
+    IrInstSrcBitCast *instruction = ir_build_instruction<IrInstSrcBitCast>(irb, scope, source_node);
     instruction->operand = operand;
     instruction->result_loc_bit_cast = result_loc_bit_cast;
 
@@ -3347,62 +4185,81 @@ static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNod
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bit_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *operand, ZigType *ty)
+static IrInstGen *ir_build_bit_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *operand, ZigType *ty)
 {
-    IrInstructionBitCastGen *instruction = ir_build_instruction<IrInstructionBitCastGen>(
+    IrInstGenBitCast *instruction = ir_build_inst_gen<IrInstGenBitCast>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ty;
     instruction->operand = operand;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_widen_or_shorten(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+static IrInstGen *ir_build_widen_or_shorten(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
+        ZigType *result_type)
 {
-    IrInstructionWidenOrShorten *instruction = ir_build_instruction<IrInstructionWidenOrShorten>(
-            irb, scope, source_node);
-    instruction->target = target;
+    IrInstGenWidenOrShorten *inst = ir_build_inst_gen<IrInstGenWidenOrShorten>(&ira->new_irb, scope, source_node);
+    inst->base.value->type = result_type;
+    inst->target = target;
 
-    ir_ref_instruction(target, irb->current_basic_block);
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_int_to_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *dest_type, IrInstruction *target)
+static IrInstSrc *ir_build_int_to_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
 {
-    IrInstructionIntToPtr *instruction = ir_build_instruction<IrInstructionIntToPtr>(
-            irb, scope, source_node);
+    IrInstSrcIntToPtr *instruction = ir_build_instruction<IrInstSrcIntToPtr>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
-    if (dest_type) ir_ref_instruction(dest_type, irb->current_basic_block);
+    ir_ref_instruction(dest_type, irb->current_basic_block);
     ir_ref_instruction(target, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ptr_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+static IrInstGen *ir_build_int_to_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+        IrInstGen *target, ZigType *ptr_type)
 {
-    IrInstructionPtrToInt *instruction = ir_build_instruction<IrInstructionPtrToInt>(
-            irb, scope, source_node);
+    IrInstGenIntToPtr *instruction = ir_build_inst_gen<IrInstGenIntToPtr>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = ptr_type;
     instruction->target = target;
 
-    ir_ref_instruction(target, irb->current_basic_block);
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *dest_type, IrInstruction *target)
+static IrInstSrc *ir_build_ptr_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target)
 {
-    IrInstructionIntToEnum *instruction = ir_build_instruction<IrInstructionIntToEnum>(
-            irb, scope, source_node);
+    IrInstSrcPtrToInt *inst = ir_build_instruction<IrInstSrcPtrToInt>(irb, scope, source_node);
+    inst->target = target;
+
+    ir_ref_instruction(target, irb->current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_ptr_to_int_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
+    IrInstGenPtrToInt *inst = ir_build_inst_gen<IrInstGenPtrToInt>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    inst->base.value->type = ira->codegen->builtin_types.entry_usize;
+    inst->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_int_to_enum_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *dest_type, IrInstSrc *target)
+{
+    IrInstSrcIntToEnum *instruction = ir_build_instruction<IrInstSrcIntToEnum>(irb, scope, source_node);
     instruction->dest_type = dest_type;
     instruction->target = target;
 
@@ -3412,12 +4269,22 @@ static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
+static IrInstGen *ir_build_int_to_enum_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+        ZigType *dest_type, IrInstGen *target)
+{
+    IrInstGenIntToEnum *instruction = ir_build_inst_gen<IrInstGenIntToEnum>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = dest_type;
+    instruction->target = target;
 
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
 
-static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_enum_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target)
 {
-    IrInstructionEnumToInt *instruction = ir_build_instruction<IrInstructionEnumToInt>(
+    IrInstSrcEnumToInt *instruction = ir_build_instruction<IrInstSrcEnumToInt>(
             irb, scope, source_node);
     instruction->target = target;
 
@@ -3426,11 +4293,10 @@ static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+static IrInstSrc *ir_build_int_to_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target)
 {
-    IrInstructionIntToErr *instruction = ir_build_instruction<IrInstructionIntToErr>(
-            irb, scope, source_node);
+    IrInstSrcIntToErr *instruction = ir_build_instruction<IrInstSrcIntToErr>(irb, scope, source_node);
     instruction->target = target;
 
     ir_ref_instruction(target, irb->current_basic_block);
@@ -3438,10 +4304,22 @@ static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+static IrInstGen *ir_build_int_to_err_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
+        ZigType *wanted_type)
 {
-    IrInstructionErrToInt *instruction = ir_build_instruction<IrInstructionErrToInt>(
+    IrInstGenIntToErr *instruction = ir_build_inst_gen<IrInstGenIntToErr>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = wanted_type;
+    instruction->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_err_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target)
+{
+    IrInstSrcErrToInt *instruction = ir_build_instruction<IrInstSrcErrToInt>(
             irb, scope, source_node);
     instruction->target = target;
 
@@ -3450,11 +4328,23 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target_value, IrInstructionCheckSwitchProngsRange *ranges, size_t range_count,
+static IrInstGen *ir_build_err_to_int_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
+        ZigType *wanted_type)
+{
+    IrInstGenErrToInt *instruction = ir_build_inst_gen<IrInstGenErrToInt>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = wanted_type;
+    instruction->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_check_switch_prongs(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target_value, IrInstSrcCheckSwitchProngsRange *ranges, size_t range_count,
         bool have_else_prong, bool have_underscore_prong)
 {
-    IrInstructionCheckSwitchProngs *instruction = ir_build_instruction<IrInstructionCheckSwitchProngs>(
+    IrInstSrcCheckSwitchProngs *instruction = ir_build_instruction<IrInstSrcCheckSwitchProngs>(
             irb, scope, source_node);
     instruction->target_value = target_value;
     instruction->ranges = ranges;
@@ -3471,10 +4361,10 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction* statement_value)
+static IrInstSrc *ir_build_check_statement_is_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc* statement_value)
 {
-    IrInstructionCheckStatementIsVoid *instruction = ir_build_instruction<IrInstructionCheckStatementIsVoid>(
+    IrInstSrcCheckStatementIsVoid *instruction = ir_build_instruction<IrInstSrcCheckStatementIsVoid>(
             irb, scope, source_node);
     instruction->statement_value = statement_value;
 
@@ -3483,11 +4373,10 @@ static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *sc
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value)
+static IrInstSrc *ir_build_type_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *type_value)
 {
-    IrInstructionTypeName *instruction = ir_build_instruction<IrInstructionTypeName>(
-            irb, scope, source_node);
+    IrInstSrcTypeName *instruction = ir_build_instruction<IrInstSrcTypeName>(irb, scope, source_node);
     instruction->type_value = type_value;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
@@ -3495,18 +4384,17 @@ static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_decl_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
-    IrInstructionDeclRef *instruction = ir_build_instruction<IrInstructionDeclRef>(irb, scope, source_node);
+static IrInstSrc *ir_build_decl_ref(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
+    IrInstSrcDeclRef *instruction = ir_build_instruction<IrInstSrcDeclRef>(irb, scope, source_node);
     instruction->tld = tld;
     instruction->lval = lval;
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
-    IrInstructionPanic *instruction = ir_build_instruction<IrInstructionPanic>(irb, scope, source_node);
-    instruction->base.value->special = ConstValSpecialStatic;
-    instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
+static IrInstSrc *ir_build_panic_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
+    IrInstSrcPanic *instruction = ir_build_instruction<IrInstSrcPanic>(irb, scope, source_node);
+    instruction->base.is_noreturn = true;
     instruction->msg = msg;
 
     ir_ref_instruction(msg, irb->current_basic_block);
@@ -3514,10 +4402,18 @@ static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *sour
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
-{
-    IrInstructionTagName *instruction = ir_build_instruction<IrInstructionTagName>(irb, scope, source_node);
+static IrInstGen *ir_build_panic_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *msg) {
+    IrInstGenPanic *instruction = ir_build_inst_noreturn<IrInstGenPanic>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->msg = msg;
+
+    ir_ref_inst_gen(msg, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_tag_name_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
+    IrInstSrcTagName *instruction = ir_build_instruction<IrInstSrcTagName>(irb, scope, source_node);
     instruction->target = target;
 
     ir_ref_instruction(target, irb->current_basic_block);
@@ -3525,10 +4421,23 @@ static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *target)
+static IrInstGen *ir_build_tag_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target,
+        ZigType *result_type)
+{
+    IrInstGenTagName *instruction = ir_build_inst_gen<IrInstGenTagName>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = result_type;
+    instruction->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_tag_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *target)
 {
-    IrInstructionTagType *instruction = ir_build_instruction<IrInstructionTagType>(irb, scope, source_node);
+    IrInstSrcTagType *instruction = ir_build_instruction<IrInstSrcTagType>(irb, scope, source_node);
     instruction->target = target;
 
     ir_ref_instruction(target, irb->current_basic_block);
@@ -3536,27 +4445,40 @@ static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_field_parent_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value, IrInstruction *field_name, IrInstruction *field_ptr, TypeStructField *field)
+static IrInstSrc *ir_build_field_parent_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *type_value, IrInstSrc *field_name, IrInstSrc *field_ptr)
 {
-    IrInstructionFieldParentPtr *instruction = ir_build_instruction<IrInstructionFieldParentPtr>(
+    IrInstSrcFieldParentPtr *inst = ir_build_instruction<IrInstSrcFieldParentPtr>(
             irb, scope, source_node);
-    instruction->type_value = type_value;
-    instruction->field_name = field_name;
-    instruction->field_ptr = field_ptr;
-    instruction->field = field;
+    inst->type_value = type_value;
+    inst->field_name = field_name;
+    inst->field_ptr = field_ptr;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
     ir_ref_instruction(field_name, irb->current_basic_block);
     ir_ref_instruction(field_ptr, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_field_parent_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *field_ptr, TypeStructField *field, ZigType *result_type)
+{
+    IrInstGenFieldParentPtr *inst = ir_build_inst_gen<IrInstGenFieldParentPtr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    inst->base.value->type = result_type;
+    inst->field_ptr = field_ptr;
+    inst->field = field;
+
+    ir_ref_inst_gen(field_ptr, ira->new_irb.current_basic_block);
+
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value, IrInstruction *field_name)
+static IrInstSrc *ir_build_byte_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *type_value, IrInstSrc *field_name)
 {
-    IrInstructionByteOffsetOf *instruction = ir_build_instruction<IrInstructionByteOffsetOf>(irb, scope, source_node);
+    IrInstSrcByteOffsetOf *instruction = ir_build_instruction<IrInstSrcByteOffsetOf>(irb, scope, source_node);
     instruction->type_value = type_value;
     instruction->field_name = field_name;
 
@@ -3566,10 +4488,10 @@ static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstN
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value, IrInstruction *field_name)
+static IrInstSrc *ir_build_bit_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *type_value, IrInstSrc *field_name)
 {
-    IrInstructionBitOffsetOf *instruction = ir_build_instruction<IrInstructionBitOffsetOf>(irb, scope, source_node);
+    IrInstSrcBitOffsetOf *instruction = ir_build_instruction<IrInstSrcBitOffsetOf>(irb, scope, source_node);
     instruction->type_value = type_value;
     instruction->field_name = field_name;
 
@@ -3579,9 +4501,8 @@ static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNo
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value) {
-    IrInstructionTypeInfo *instruction = ir_build_instruction<IrInstructionTypeInfo>(irb, scope, source_node);
+static IrInstSrc *ir_build_type_info(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
+    IrInstSrcTypeInfo *instruction = ir_build_instruction<IrInstSrcTypeInfo>(irb, scope, source_node);
     instruction->type_value = type_value;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
@@ -3589,8 +4510,8 @@ static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_info) {
-    IrInstructionType *instruction = ir_build_instruction<IrInstructionType>(irb, scope, source_node);
+static IrInstSrc *ir_build_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_info) {
+    IrInstSrcType *instruction = ir_build_instruction<IrInstSrcType>(irb, scope, source_node);
     instruction->type_info = type_info;
 
     ir_ref_instruction(type_info, irb->current_basic_block);
@@ -3598,10 +4519,8 @@ static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *sourc
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *type_value)
-{
-    IrInstructionTypeId *instruction = ir_build_instruction<IrInstructionTypeId>(irb, scope, source_node);
+static IrInstSrc *ir_build_type_id(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
+    IrInstSrcTypeId *instruction = ir_build_instruction<IrInstSrcTypeId>(irb, scope, source_node);
     instruction->type_value = type_value;
 
     ir_ref_instruction(type_value, irb->current_basic_block);
@@ -3609,10 +4528,10 @@ static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *so
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *new_quota)
+static IrInstSrc *ir_build_set_eval_branch_quota(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *new_quota)
 {
-    IrInstructionSetEvalBranchQuota *instruction = ir_build_instruction<IrInstructionSetEvalBranchQuota>(irb, scope, source_node);
+    IrInstSrcSetEvalBranchQuota *instruction = ir_build_instruction<IrInstSrcSetEvalBranchQuota>(irb, scope, source_node);
     instruction->new_quota = new_quota;
 
     ir_ref_instruction(new_quota, irb->current_basic_block);
@@ -3620,23 +4539,35 @@ static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scop
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_align_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *align_bytes, IrInstruction *target)
+static IrInstSrc *ir_build_align_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *align_bytes, IrInstSrc *target)
 {
-    IrInstructionAlignCast *instruction = ir_build_instruction<IrInstructionAlignCast>(irb, scope, source_node);
+    IrInstSrcAlignCast *instruction = ir_build_instruction<IrInstSrcAlignCast>(irb, scope, source_node);
     instruction->align_bytes = align_bytes;
     instruction->target = target;
 
-    if (align_bytes) ir_ref_instruction(align_bytes, irb->current_basic_block);
+    ir_ref_instruction(align_bytes, irb->current_basic_block);
     ir_ref_instruction(target, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        ResultLoc *result_loc, IrInstruction *ty)
+static IrInstGen *ir_build_align_cast_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
+        ZigType *result_type)
 {
-    IrInstructionResolveResult *instruction = ir_build_instruction<IrInstructionResolveResult>(irb, scope, source_node);
+    IrInstGenAlignCast *instruction = ir_build_inst_gen<IrInstGenAlignCast>(&ira->new_irb, scope, source_node);
+    instruction->base.value->type = result_type;
+    instruction->target = target;
+
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_resolve_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        ResultLoc *result_loc, IrInstSrc *ty)
+{
+    IrInstSrcResolveResult *instruction = ir_build_instruction<IrInstSrcResolveResult>(irb, scope, source_node);
     instruction->result_loc = result_loc;
     instruction->ty = ty;
 
@@ -3645,25 +4576,25 @@ static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstN
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_reset_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
+static IrInstSrc *ir_build_reset_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
         ResultLoc *result_loc)
 {
-    IrInstructionResetResult *instruction = ir_build_instruction<IrInstructionResetResult>(irb, scope, source_node);
+    IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(irb, scope, source_node);
     instruction->result_loc = result_loc;
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_opaque_type(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionOpaqueType *instruction = ir_build_instruction<IrInstructionOpaqueType>(irb, scope, source_node);
+static IrInstSrc *ir_build_opaque_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcOpaqueType *instruction = ir_build_instruction<IrInstSrcOpaqueType>(irb, scope, source_node);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *align_bytes)
+static IrInstSrc *ir_build_set_align_stack(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *align_bytes)
 {
-    IrInstructionSetAlignStack *instruction = ir_build_instruction<IrInstructionSetAlignStack>(irb, scope, source_node);
+    IrInstSrcSetAlignStack *instruction = ir_build_instruction<IrInstSrcSetAlignStack>(irb, scope, source_node);
     instruction->align_bytes = align_bytes;
 
     ir_ref_instruction(align_bytes, irb->current_basic_block);
@@ -3671,10 +4602,10 @@ static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, Ast
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *fn_type, IrInstruction *arg_index, bool allow_var)
+static IrInstSrc *ir_build_arg_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *fn_type, IrInstSrc *arg_index, bool allow_var)
 {
-    IrInstructionArgType *instruction = ir_build_instruction<IrInstructionArgType>(irb, scope, source_node);
+    IrInstSrcArgType *instruction = ir_build_instruction<IrInstSrcArgType>(irb, scope, source_node);
     instruction->fn_type = fn_type;
     instruction->arg_index = arg_index;
     instruction->allow_var = allow_var;
@@ -3685,17 +4616,29 @@ static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_error_return_trace(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstructionErrorReturnTrace::Optional optional) {
-    IrInstructionErrorReturnTrace *instruction = ir_build_instruction<IrInstructionErrorReturnTrace>(irb, scope, source_node);
-    instruction->optional = optional;
+static IrInstSrc *ir_build_error_return_trace_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstErrorReturnTraceOptional optional)
+{
+    IrInstSrcErrorReturnTrace *inst = ir_build_instruction<IrInstSrcErrorReturnTrace>(irb, scope, source_node);
+    inst->optional = optional;
+
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_error_return_trace_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
+        IrInstErrorReturnTraceOptional optional, ZigType *result_type)
+{
+    IrInstGenErrorReturnTrace *inst = ir_build_inst_gen<IrInstGenErrorReturnTrace>(&ira->new_irb, scope, source_node);
+    inst->base.value->type = result_type;
+    inst->optional = optional;
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *err_set, IrInstruction *payload)
+static IrInstSrc *ir_build_error_union(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *err_set, IrInstSrc *payload)
 {
-    IrInstructionErrorUnion *instruction = ir_build_instruction<IrInstructionErrorUnion>(irb, scope, source_node);
+    IrInstSrcErrorUnion *instruction = ir_build_instruction<IrInstSrcErrorUnion>(irb, scope, source_node);
     instruction->err_set = err_set;
     instruction->payload = payload;
 
@@ -3705,85 +4648,130 @@ static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_atomic_rmw(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *op, IrInstruction *operand,
-        IrInstruction *ordering, AtomicRmwOp resolved_op, AtomicOrder resolved_ordering)
+static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *op, IrInstSrc *operand,
+        IrInstSrc *ordering)
 {
-    IrInstructionAtomicRmw *instruction = ir_build_instruction<IrInstructionAtomicRmw>(irb, scope, source_node);
+    IrInstSrcAtomicRmw *instruction = ir_build_instruction<IrInstSrcAtomicRmw>(irb, scope, source_node);
     instruction->operand_type = operand_type;
     instruction->ptr = ptr;
     instruction->op = op;
     instruction->operand = operand;
     instruction->ordering = ordering;
-    instruction->resolved_op = resolved_op;
-    instruction->resolved_ordering = resolved_ordering;
 
-    if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
+    ir_ref_instruction(operand_type, irb->current_basic_block);
     ir_ref_instruction(ptr, irb->current_basic_block);
-    if (op != nullptr) ir_ref_instruction(op, irb->current_basic_block);
+    ir_ref_instruction(op, irb->current_basic_block);
     ir_ref_instruction(operand, irb->current_basic_block);
-    if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
+    ir_ref_instruction(ordering, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_atomic_load(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand_type, IrInstruction *ptr,
-        IrInstruction *ordering, AtomicOrder resolved_ordering)
+static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
 {
-    IrInstructionAtomicLoad *instruction = ir_build_instruction<IrInstructionAtomicLoad>(irb, scope, source_node);
+    IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = operand_type;
+    instruction->ptr = ptr;
+    instruction->op = op;
+    instruction->operand = operand;
+    instruction->ordering = ordering;
+
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *ordering)
+{
+    IrInstSrcAtomicLoad *instruction = ir_build_instruction<IrInstSrcAtomicLoad>(irb, scope, source_node);
     instruction->operand_type = operand_type;
     instruction->ptr = ptr;
     instruction->ordering = ordering;
-    instruction->resolved_ordering = resolved_ordering;
 
-    if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
+    ir_ref_instruction(operand_type, irb->current_basic_block);
     ir_ref_instruction(ptr, irb->current_basic_block);
-    if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
+    ir_ref_instruction(ordering, irb->current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
+{
+    IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = operand_type;
+    instruction->ptr = ptr;
+    instruction->ordering = ordering;
+
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_atomic_store(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *value,
-        IrInstruction *ordering, AtomicOrder resolved_ordering)
+static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *value, IrInstSrc *ordering)
 {
-    IrInstructionAtomicStore *instruction = ir_build_instruction<IrInstructionAtomicStore>(irb, scope, source_node);
+    IrInstSrcAtomicStore *instruction = ir_build_instruction<IrInstSrcAtomicStore>(irb, scope, source_node);
     instruction->operand_type = operand_type;
     instruction->ptr = ptr;
     instruction->value = value;
     instruction->ordering = ordering;
-    instruction->resolved_ordering = resolved_ordering;
 
-    if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
+    ir_ref_instruction(operand_type, irb->current_basic_block);
     ir_ref_instruction(ptr, irb->current_basic_block);
     ir_ref_instruction(value, irb->current_basic_block);
-    if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
+    ir_ref_instruction(ordering, irb->current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_save_err_ret_addr(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionSaveErrRetAddr *instruction = ir_build_instruction<IrInstructionSaveErrRetAddr>(irb, scope, source_node);
+static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
+{
+    IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->ptr = ptr;
+    instruction->value = value;
+    instruction->ordering = ordering;
+
+    ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
+
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_add_implicit_return_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *value, ResultLocReturn *result_loc_ret)
+static IrInstSrc *ir_build_save_err_ret_addr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    IrInstSrcSaveErrRetAddr *inst = ir_build_instruction<IrInstSrcSaveErrRetAddr>(irb, scope, source_node);
+    return &inst->base;
+}
+
+static IrInstGen *ir_build_save_err_ret_addr_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenSaveErrRetAddr *inst = ir_build_inst_void<IrInstGenSaveErrRetAddr>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_add_implicit_return_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *value, ResultLocReturn *result_loc_ret)
 {
-    IrInstructionAddImplicitReturnType *instruction = ir_build_instruction<IrInstructionAddImplicitReturnType>(irb, scope, source_node);
-    instruction->value = value;
-    instruction->result_loc_ret = result_loc_ret;
+    IrInstSrcAddImplicitReturnType *inst = ir_build_instruction<IrInstSrcAddImplicitReturnType>(irb, scope, source_node);
+    inst->value = value;
+    inst->result_loc_ret = result_loc_ret;
 
     ir_ref_instruction(value, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *container, IrInstruction *name)
+static IrInstSrc *ir_build_has_decl(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *container, IrInstSrc *name)
 {
-    IrInstructionHasDecl *instruction = ir_build_instruction<IrInstructionHasDecl>(irb, scope, source_node);
+    IrInstSrcHasDecl *instruction = ir_build_instruction<IrInstSrcHasDecl>(irb, scope, source_node);
     instruction->container = container;
     instruction->name = name;
 
@@ -3793,17 +4781,15 @@ static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_undeclared_identifier(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        Buf *name)
-{
-    IrInstructionUndeclaredIdent *instruction = ir_build_instruction<IrInstructionUndeclaredIdent>(irb, scope, source_node);
+static IrInstSrc *ir_build_undeclared_identifier(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
+    IrInstSrcUndeclaredIdent *instruction = ir_build_instruction<IrInstSrcUndeclaredIdent>(irb, scope, source_node);
     instruction->name = name;
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *scope_is_comptime, IrInstruction *is_comptime) {
-    IrInstructionCheckRuntimeScope *instruction = ir_build_instruction<IrInstructionCheckRuntimeScope>(irb, scope, source_node);
+static IrInstSrc *ir_build_check_runtime_scope(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *scope_is_comptime, IrInstSrc *is_comptime) {
+    IrInstSrcCheckRuntimeScope *instruction = ir_build_instruction<IrInstSrcCheckRuntimeScope>(irb, scope, source_node);
     instruction->scope_is_comptime = scope_is_comptime;
     instruction->is_comptime = is_comptime;
 
@@ -3813,10 +4799,10 @@ static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope,
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *union_type, IrInstruction *field_name, IrInstruction *field_result_loc, IrInstruction *result_loc)
+static IrInstSrc *ir_build_union_init_named_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *union_type, IrInstSrc *field_name, IrInstSrc *field_result_loc, IrInstSrc *result_loc)
 {
-    IrInstructionUnionInitNamedField *instruction = ir_build_instruction<IrInstructionUnionInitNamedField>(irb, scope, source_node);
+    IrInstSrcUnionInitNamedField *instruction = ir_build_instruction<IrInstSrcUnionInitNamedField>(irb, scope, source_node);
     instruction->union_type = union_type;
     instruction->field_name = field_name;
     instruction->field_result_loc = field_result_loc;
@@ -3831,79 +4817,79 @@ static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *sco
 }
 
 
-static IrInstruction *ir_build_vector_to_array(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigType *result_type, IrInstruction *vector, IrInstruction *result_loc)
+static IrInstGen *ir_build_vector_to_array(IrAnalyze *ira, IrInst *source_instruction,
+        ZigType *result_type, IrInstGen *vector, IrInstGen *result_loc)
 {
-    IrInstructionVectorToArray *instruction = ir_build_instruction<IrInstructionVectorToArray>(&ira->new_irb,
+    IrInstGenVectorToArray *instruction = ir_build_inst_gen<IrInstGenVectorToArray>(&ira->new_irb,
         source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->vector = vector;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(vector, ira->new_irb.current_basic_block);
-    ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instruction,
-        ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
+static IrInstGen *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInst *source_instruction,
+        ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
 {
-    IrInstructionPtrOfArrayToSlice *instruction = ir_build_instruction<IrInstructionPtrOfArrayToSlice>(&ira->new_irb,
+    IrInstGenPtrOfArrayToSlice *instruction = ir_build_inst_gen<IrInstGenPtrOfArrayToSlice>(&ira->new_irb,
         source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->operand = operand;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(operand, ira->new_irb.current_basic_block);
-    ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_array_to_vector(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *array, ZigType *result_type)
+static IrInstGen *ir_build_array_to_vector(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *array, ZigType *result_type)
 {
-    IrInstructionArrayToVector *instruction = ir_build_instruction<IrInstructionArrayToVector>(&ira->new_irb,
+    IrInstGenArrayToVector *instruction = ir_build_inst_gen<IrInstGenArrayToVector>(&ira->new_irb,
         source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->array = array;
 
-    ir_ref_instruction(array, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(array, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_assert_zero(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *target)
+static IrInstGen *ir_build_assert_zero(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *target)
 {
-    IrInstructionAssertZero *instruction = ir_build_instruction<IrInstructionAssertZero>(&ira->new_irb,
+    IrInstGenAssertZero *instruction = ir_build_inst_gen<IrInstGenAssertZero>(&ira->new_irb,
         source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ira->codegen->builtin_types.entry_void;
     instruction->target = target;
 
-    ir_ref_instruction(target, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_assert_non_null(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *target)
+static IrInstGen *ir_build_assert_non_null(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *target)
 {
-    IrInstructionAssertNonNull *instruction = ir_build_instruction<IrInstructionAssertNonNull>(&ira->new_irb,
+    IrInstGenAssertNonNull *instruction = ir_build_inst_gen<IrInstGenAssertNonNull>(&ira->new_irb,
         source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = ira->codegen->builtin_types.entry_void;
     instruction->target = target;
 
-    ir_ref_instruction(target, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *align, const char *name_hint, IrInstruction *is_comptime)
+static IrInstSrc *ir_build_alloca_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime)
 {
-    IrInstructionAllocaSrc *instruction = ir_build_instruction<IrInstructionAllocaSrc>(irb, scope, source_node);
+    IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(irb, scope, source_node);
     instruction->base.is_gen = true;
     instruction->align = align;
     instruction->name_hint = name_hint;
@@ -3915,10 +4901,10 @@ static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode
     return &instruction->base;
 }
 
-static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction *source_instruction,
+static IrInstGenAlloca *ir_build_alloca_gen(IrAnalyze *ira, IrInst *source_instruction,
         uint32_t align, const char *name_hint)
 {
-    IrInstructionAllocaGen *instruction = ir_create_instruction<IrInstructionAllocaGen>(&ira->new_irb,
+    IrInstGenAlloca *instruction = ir_create_inst_gen<IrInstGenAlloca>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->align = align;
     instruction->name_hint = name_hint;
@@ -3926,10 +4912,10 @@ static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction
     return instruction;
 }
 
-static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *value, ResultLoc *result_loc)
+static IrInstSrc *ir_build_end_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *value, ResultLoc *result_loc)
 {
-    IrInstructionEndExpr *instruction = ir_build_instruction<IrInstructionEndExpr>(irb, scope, source_node);
+    IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(irb, scope, source_node);
     instruction->base.is_gen = true;
     instruction->value = value;
     instruction->result_loc = result_loc;
@@ -3939,29 +4925,41 @@ static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *s
     return &instruction->base;
 }
 
-static IrInstructionSuspendBegin *ir_build_suspend_begin(IrBuilder *irb, Scope *scope, AstNode *source_node) {
-    IrInstructionSuspendBegin *instruction = ir_build_instruction<IrInstructionSuspendBegin>(irb, scope, source_node);
-    instruction->base.value->type = irb->codegen->builtin_types.entry_void;
+static IrInstSrcSuspendBegin *ir_build_suspend_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
+    return ir_build_instruction<IrInstSrcSuspendBegin>(irb, scope, source_node);
+}
 
-    return instruction;
+static IrInstGen *ir_build_suspend_begin_gen(IrAnalyze *ira, IrInst *source_instr) {
+    IrInstGenSuspendBegin *inst = ir_build_inst_void<IrInstGenSuspendBegin>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_suspend_finish(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstructionSuspendBegin *begin)
+static IrInstSrc *ir_build_suspend_finish_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrcSuspendBegin *begin)
 {
-    IrInstructionSuspendFinish *instruction = ir_build_instruction<IrInstructionSuspendFinish>(irb, scope, source_node);
-    instruction->base.value->type = irb->codegen->builtin_types.entry_void;
-    instruction->begin = begin;
+    IrInstSrcSuspendFinish *inst = ir_build_instruction<IrInstSrcSuspendFinish>(irb, scope, source_node);
+    inst->begin = begin;
 
     ir_ref_instruction(&begin->base, irb->current_basic_block);
 
-    return &instruction->base;
+    return &inst->base;
 }
 
-static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *frame, ResultLoc *result_loc)
+static IrInstGen *ir_build_suspend_finish_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSuspendBegin *begin) {
+    IrInstGenSuspendFinish *inst = ir_build_inst_void<IrInstGenSuspendFinish>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    inst->begin = begin;
+
+    ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
+
+    return &inst->base;
+}
+
+static IrInstSrc *ir_build_await_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *frame, ResultLoc *result_loc)
 {
-    IrInstructionAwaitSrc *instruction = ir_build_instruction<IrInstructionAwaitSrc>(irb, scope, source_node);
+    IrInstSrcAwait *instruction = ir_build_instruction<IrInstSrcAwait>(irb, scope, source_node);
     instruction->frame = frame;
     instruction->result_loc = result_loc;
 
@@ -3970,24 +4968,23 @@ static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstructionAwaitGen *ir_build_await_gen(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *frame, ZigType *result_type, IrInstruction *result_loc)
+static IrInstGenAwait *ir_build_await_gen(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *frame, ZigType *result_type, IrInstGen *result_loc)
 {
-    IrInstructionAwaitGen *instruction = ir_build_instruction<IrInstructionAwaitGen>(&ira->new_irb,
+    IrInstGenAwait *instruction = ir_build_inst_gen<IrInstGenAwait>(&ira->new_irb,
             source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = result_type;
     instruction->frame = frame;
     instruction->result_loc = result_loc;
 
-    ir_ref_instruction(frame, ira->new_irb.current_basic_block);
-    if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
+    if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
 
     return instruction;
 }
 
-static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *frame) {
-    IrInstructionResume *instruction = ir_build_instruction<IrInstructionResume>(irb, scope, source_node);
-    instruction->base.value->type = irb->codegen->builtin_types.entry_void;
+static IrInstSrc *ir_build_resume_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *frame) {
+    IrInstSrcResume *instruction = ir_build_instruction<IrInstSrcResume>(irb, scope, source_node);
     instruction->frame = frame;
 
     ir_ref_instruction(frame, irb->current_basic_block);
@@ -3995,12 +4992,20 @@ static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *sou
     return &instruction->base;
 }
 
-static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstruction *operand, SpillId spill_id)
+static IrInstGen *ir_build_resume_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *frame) {
+    IrInstGenResume *instruction = ir_build_inst_void<IrInstGenResume>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->frame = frame;
+
+    ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrcSpillBegin *ir_build_spill_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrc *operand, SpillId spill_id)
 {
-    IrInstructionSpillBegin *instruction = ir_build_instruction<IrInstructionSpillBegin>(irb, scope, source_node);
-    instruction->base.value->special = ConstValSpecialStatic;
-    instruction->base.value->type = irb->codegen->builtin_types.entry_void;
+    IrInstSrcSpillBegin *instruction = ir_build_instruction<IrInstSrcSpillBegin>(irb, scope, source_node);
     instruction->operand = operand;
     instruction->spill_id = spill_id;
 
@@ -4009,10 +5014,23 @@ static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scop
     return instruction;
 }
 
-static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        IrInstructionSpillBegin *begin)
+static IrInstGen *ir_build_spill_begin_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
+        SpillId spill_id)
 {
-    IrInstructionSpillEnd *instruction = ir_build_instruction<IrInstructionSpillEnd>(irb, scope, source_node);
+    IrInstGenSpillBegin *instruction = ir_build_inst_void<IrInstGenSpillBegin>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->operand = operand;
+    instruction->spill_id = spill_id;
+
+    ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstSrc *ir_build_spill_end_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        IrInstSrcSpillBegin *begin)
+{
+    IrInstSrcSpillEnd *instruction = ir_build_instruction<IrInstSrcSpillEnd>(irb, scope, source_node);
     instruction->begin = begin;
 
     ir_ref_instruction(&begin->base, irb->current_basic_block);
@@ -4020,22 +5038,35 @@ static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *
     return &instruction->base;
 }
 
-static IrInstruction *ir_build_vector_extract_elem(IrAnalyze *ira, IrInstruction *source_instruction,
-        IrInstruction *vector, IrInstruction *index)
+static IrInstGen *ir_build_spill_end_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSpillBegin *begin,
+        ZigType *result_type)
 {
-    IrInstructionVectorExtractElem *instruction = ir_build_instruction<IrInstructionVectorExtractElem>(
+    IrInstGenSpillEnd *instruction = ir_build_inst_gen<IrInstGenSpillEnd>(&ira->new_irb,
+            source_instr->scope, source_instr->source_node);
+    instruction->base.value->type = result_type;
+    instruction->begin = begin;
+
+    ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
+
+    return &instruction->base;
+}
+
+static IrInstGen *ir_build_vector_extract_elem(IrAnalyze *ira, IrInst *source_instruction,
+        IrInstGen *vector, IrInstGen *index)
+{
+    IrInstGenVectorExtractElem *instruction = ir_build_inst_gen<IrInstGenVectorExtractElem>(
             &ira->new_irb, source_instruction->scope, source_instruction->source_node);
     instruction->base.value->type = vector->value->type->data.vector.elem_type;
     instruction->vector = vector;
     instruction->index = index;
 
-    ir_ref_instruction(vector, ira->new_irb.current_basic_block);
-    ir_ref_instruction(index, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
+    ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
 
     return &instruction->base;
 }
 
-static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
+static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
     results[ReturnKindUnconditional] = 0;
     results[ReturnKindError] = 0;
 
@@ -4072,12 +5103,12 @@ static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_sco
     }
 }
 
-static IrInstruction *ir_mark_gen(IrInstruction *instruction) {
+static IrInstSrc *ir_mark_gen(IrInstSrc *instruction) {
     instruction->is_gen = true;
     return instruction;
 }
 
-static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
+static bool ir_gen_defers_for_block(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
     Scope *scope = inner_scope;
     bool is_noreturn = false;
     while (scope != outer_scope) {
@@ -4094,11 +5125,9 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
                 {
                     AstNode *defer_expr_node = defer_node->data.defer.expr;
                     Scope *defer_expr_scope = defer_node->data.defer.expr_scope;
-                    IrInstruction *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
-                    if (defer_expr_value != irb->codegen->invalid_instruction) {
-                        if (defer_expr_value->value->type != nullptr &&
-                                defer_expr_value->value->type->id == ZigTypeIdUnreachable)
-                        {
+                    IrInstSrc *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
+                    if (defer_expr_value != irb->codegen->invalid_inst_src) {
+                        if (defer_expr_value->is_noreturn) {
                             is_noreturn = true;
                         } else {
                             ir_mark_gen(ir_build_check_statement_is_void(irb, defer_expr_scope, defer_expr_node,
@@ -4130,13 +5159,17 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
     return is_noreturn;
 }
 
-static void ir_set_cursor_at_end(IrBuilder *irb, IrBasicBlock *basic_block) {
+static void ir_set_cursor_at_end_gen(IrBuilderGen *irb, IrBasicBlockGen *basic_block) {
     assert(basic_block);
+    irb->current_basic_block = basic_block;
+}
 
+static void ir_set_cursor_at_end(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
+    assert(basic_block);
     irb->current_basic_block = basic_block;
 }
 
-static void ir_set_cursor_at_end_and_append_block(IrBuilder *irb, IrBasicBlock *basic_block) {
+static void ir_set_cursor_at_end_and_append_block(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
     basic_block->index = irb->exec->basic_block_list.length;
     irb->exec->basic_block_list.append(basic_block);
     ir_set_cursor_at_end(irb, basic_block);
@@ -4166,13 +5199,13 @@ static ScopeDeferExpr *get_scope_defer_expr(Scope *scope) {
     return nullptr;
 }
 
-static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
+static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
     assert(node->type == NodeTypeReturnExpr);
 
     ZigFn *fn_entry = exec_fn_entry(irb->exec);
     if (!fn_entry) {
         add_node_error(irb->codegen, node, buf_sprintf("return expression outside function definition"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     ScopeDeferExpr *scope_defer_expr = get_scope_defer_expr(scope);
@@ -4181,7 +5214,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
             add_node_error(irb->codegen, node, buf_sprintf("cannot return from defer expression"));
             scope_defer_expr->reported_err = true;
         }
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     Scope *outer_scope = irb->exec->begin_scope;
@@ -4194,15 +5227,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 result_loc_ret->base.id = ResultLocIdReturn;
                 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
 
-                IrInstruction *return_value;
+                IrInstSrc *return_value;
                 if (expr_node) {
                     // Temporarily set this so that if we return a type it gets the name of the function
                     ZigFn *prev_name_fn = irb->exec->name_fn;
                     irb->exec->name_fn = exec_fn_entry(irb->exec);
                     return_value = ir_gen_node_extra(irb, expr_node, scope, LValNone, &result_loc_ret->base);
                     irb->exec->name_fn = prev_name_fn;
-                    if (return_value == irb->codegen->invalid_instruction)
-                        return irb->codegen->invalid_instruction;
+                    if (return_value == irb->codegen->invalid_inst_src)
+                        return irb->codegen->invalid_inst_src;
                 } else {
                     return_value = ir_build_const_void(irb, scope, node);
                 }
@@ -4215,22 +5248,22 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 if (!have_err_defers && !irb->codegen->have_err_ret_tracing) {
                     // only generate unconditional defers
                     ir_gen_defers_for_block(irb, scope, outer_scope, false);
-                    IrInstruction *result = ir_build_return(irb, scope, node, return_value);
+                    IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
                     result_loc_ret->base.source_instruction = result;
                     return result;
                 }
                 bool should_inline = ir_should_inline(irb->exec, scope);
 
-                IrBasicBlock *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
-                IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
+                IrBasicBlockSrc *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
+                IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
 
                 if (!have_err_defers) {
                     ir_gen_defers_for_block(irb, scope, outer_scope, false);
                 }
 
-                IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
+                IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
 
-                IrInstruction *is_comptime;
+                IrInstSrc *is_comptime;
                 if (should_inline) {
                     is_comptime = ir_build_const_bool(irb, scope, node, should_inline);
                 } else {
@@ -4238,14 +5271,14 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 }
 
                 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err, err_block, ok_block, is_comptime));
-                IrBasicBlock *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
+                IrBasicBlockSrc *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
 
                 ir_set_cursor_at_end_and_append_block(irb, err_block);
                 if (have_err_defers) {
                     ir_gen_defers_for_block(irb, scope, outer_scope, true);
                 }
                 if (irb->codegen->have_err_ret_tracing && !should_inline) {
-                    ir_build_save_err_ret_addr(irb, scope, node);
+                    ir_build_save_err_ret_addr_src(irb, scope, node);
                 }
                 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
 
@@ -4256,21 +5289,21 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
 
                 ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block);
-                IrInstruction *result = ir_build_return(irb, scope, node, return_value);
+                IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
                 result_loc_ret->base.source_instruction = result;
                 return result;
             }
         case ReturnKindError:
             {
                 assert(expr_node);
-                IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
-                if (err_union_ptr == irb->codegen->invalid_instruction)
-                    return irb->codegen->invalid_instruction;
-                IrInstruction *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
+                IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
+                if (err_union_ptr == irb->codegen->invalid_inst_src)
+                    return irb->codegen->invalid_inst_src;
+                IrInstSrc *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
 
-                IrBasicBlock *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
-                IrBasicBlock *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
-                IrInstruction *is_comptime;
+                IrBasicBlockSrc *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
+                IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
+                IrInstSrc *is_comptime;
                 bool should_inline = ir_should_inline(irb->exec, scope);
                 if (should_inline) {
                     is_comptime = ir_build_const_bool(irb, scope, node, true);
@@ -4280,10 +5313,10 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err_val, return_block, continue_block, is_comptime));
 
                 ir_set_cursor_at_end_and_append_block(irb, return_block);
-                IrInstruction *err_val_ptr = ir_build_unwrap_err_code(irb, scope, node, err_union_ptr);
-                IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
+                IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(irb, scope, node, err_union_ptr);
+                IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
                 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, err_val, nullptr));
-                IrInstructionSpillBegin *spill_begin = ir_build_spill_begin(irb, scope, node, err_val,
+                IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(irb, scope, node, err_val,
                         SpillIdRetErrCode);
                 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
                 result_loc_ret->base.id = ResultLocIdReturn;
@@ -4291,15 +5324,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
                 ir_build_end_expr(irb, scope, node, err_val, &result_loc_ret->base);
                 if (!ir_gen_defers_for_block(irb, scope, outer_scope, true)) {
                     if (irb->codegen->have_err_ret_tracing && !should_inline) {
-                        ir_build_save_err_ret_addr(irb, scope, node);
+                        ir_build_save_err_ret_addr_src(irb, scope, node);
                     }
-                    err_val = ir_build_spill_end(irb, scope, node, spill_begin);
-                    IrInstruction *ret_inst = ir_build_return(irb, scope, node, err_val);
+                    err_val = ir_build_spill_end_src(irb, scope, node, spill_begin);
+                    IrInstSrc *ret_inst = ir_build_return_src(irb, scope, node, err_val);
                     result_loc_ret->base.source_instruction = ret_inst;
                 }
 
                 ir_set_cursor_at_end_and_append_block(irb, continue_block);
-                IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, scope, node, err_union_ptr, false, false);
+                IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, scope, node, err_union_ptr, false, false);
                 if (lval == LValPtr)
                     return unwrapped_ptr;
                 else
@@ -4310,7 +5343,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
 }
 
 static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,
-        Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime,
+        Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime,
         bool skip_name_check)
 {
     ZigVar *variable_entry = allocate<ZigVar>(1, "ZigVar");
@@ -4322,7 +5355,7 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
     variable_entry->const_value = create_const_vals(1);
 
     if (is_comptime != nullptr) {
-        is_comptime->ref_count += 1;
+        is_comptime->base.ref_count += 1;
     }
 
     if (name) {
@@ -4372,8 +5405,8 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
 
 // Set name to nullptr to make the variable anonymous (not visible to programmer).
 // After you call this function var->child_scope has the variable in scope
-static ZigVar *ir_create_var(IrBuilder *irb, AstNode *node, Scope *scope, Buf *name,
-        bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime)
+static ZigVar *ir_create_var(IrBuilderSrc *irb, AstNode *node, Scope *scope, Buf *name,
+        bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime)
 {
     bool is_underscored = name ? buf_eql_str(name, "_") : false;
     ZigVar *var = create_local_var(irb->codegen, node, scope,
@@ -4396,13 +5429,13 @@ static ResultLocPeer *create_peer_result(ResultLocPeerParent *peer_parent) {
     return result;
 }
 
-static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
+static IrInstSrc *ir_gen_block(IrBuilderSrc *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(block_node->type == NodeTypeBlock);
 
-    ZigList<IrInstruction *> incoming_values = {0};
-    ZigList<IrBasicBlock *> incoming_blocks = {0};
+    ZigList<IrInstSrc *> incoming_values = {0};
+    ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
 
     ScopeBlock *scope_block = create_block_scope(irb->codegen, block_node, parent_scope);
 
@@ -4438,11 +5471,11 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
     }
 
     bool is_continuation_unreachable = false;
-    IrInstruction *noreturn_return_value = nullptr;
+    IrInstSrc *noreturn_return_value = nullptr;
     for (size_t i = 0; i < block_node->data.block.statements.length; i += 1) {
         AstNode *statement_node = block_node->data.block.statements.at(i);
 
-        IrInstruction *statement_value = ir_gen_node(irb, statement_node, child_scope);
+        IrInstSrc *statement_value = ir_gen_node(irb, statement_node, child_scope);
         is_continuation_unreachable = instr_is_unreachable(statement_value);
         if (is_continuation_unreachable) {
             // keep the last noreturn statement value around in case we need to return it
@@ -4450,15 +5483,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
         }
         // This logic must be kept in sync with
         // [STMT_EXPR_TEST_THING] <--- (search this token)
-        if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_instruction) {
+        if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_inst_src) {
             // defer starts a new scope
             child_scope = statement_node->data.defer.child_scope;
             assert(child_scope);
-        } else if (statement_value->id == IrInstructionIdDeclVarSrc) {
+        } else if (statement_value->id == IrInstSrcIdDeclVar) {
             // variable declarations start a new scope
-            IrInstructionDeclVarSrc *decl_var_instruction = (IrInstructionDeclVarSrc *)statement_value;
+            IrInstSrcDeclVar *decl_var_instruction = (IrInstSrcDeclVar *)statement_value;
             child_scope = decl_var_instruction->var->child_scope;
-        } else if (statement_value != irb->codegen->invalid_instruction && !is_continuation_unreachable) {
+        } else if (statement_value != irb->codegen->invalid_inst_src && !is_continuation_unreachable) {
             // this statement's value must be void
             ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, statement_node, statement_value));
         }
@@ -4474,12 +5507,12 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
             scope_block->peer_parent->peers.last()->next_bb = scope_block->end_block;
         }
         ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
-        IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
+        IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
                 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
         return ir_expr_wrap(irb, parent_scope, phi, result_loc);
     } else {
         incoming_blocks.append(irb->current_basic_block);
-        IrInstruction *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
+        IrInstSrc *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
 
         if (scope_block->peer_parent != nullptr) {
             ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent);
@@ -4499,15 +5532,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
         ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
     }
 
-    IrInstruction *result;
+    IrInstSrc *result;
     if (block_node->data.block.name != nullptr) {
         ir_mark_gen(ir_build_br(irb, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime));
         ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
-        IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
+        IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
                 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
         result = ir_expr_wrap(irb, parent_scope, phi, result_loc);
     } else {
-        IrInstruction *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
+        IrInstSrc *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
         result = ir_lval_wrap(irb, parent_scope, void_inst, lval, result_loc);
     }
     if (!is_return_from_fn)
@@ -4518,30 +5551,30 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
 
     ir_mark_gen(ir_build_add_implicit_return_type(irb, child_scope, block_node, result, nullptr));
     ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
-    return ir_mark_gen(ir_build_return(irb, child_scope, result->source_node, result));
+    return ir_mark_gen(ir_build_return_src(irb, child_scope, result->base.source_node, result));
 }
 
-static IrInstruction *ir_gen_bin_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
+static IrInstSrc *ir_gen_bin_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
     Scope *inner_scope = scope;
     if (op_id == IrBinOpArrayCat || op_id == IrBinOpArrayMult) {
         inner_scope = create_comptime_scope(irb->codegen, node, scope);
     }
 
-    IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
-    IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
+    IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
+    IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
 
-    if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     return ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
 }
 
-static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
-    IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
-    IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
+static IrInstSrc *ir_gen_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
+    IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
+    IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
 
-    if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     // TODO only pass type_name when the || operator is the top level AST node in the var decl expr
     Buf bare_name = BUF_INIT;
@@ -4550,10 +5583,10 @@ static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNod
     return ir_build_merge_err_sets(irb, scope, node, op1, op2, type_name);
 }
 
-static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node) {
-    IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
-    if (lvalue == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+static IrInstSrc *ir_gen_assign(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
+    IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
+    if (lvalue == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1, "ResultLocInstruction");
     result_loc_inst->base.id = ResultLocIdInstruction;
@@ -4561,49 +5594,49 @@ static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node)
     ir_ref_instruction(lvalue, irb->current_basic_block);
     ir_build_reset_result(irb, scope, node, &result_loc_inst->base);
 
-    IrInstruction *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
+    IrInstSrc *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
             &result_loc_inst->base);
-    if (rvalue == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    if (rvalue == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     return ir_build_const_void(irb, scope, node);
 }
 
-static IrInstruction *ir_gen_assign_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
-    IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
-    if (lvalue == irb->codegen->invalid_instruction)
+static IrInstSrc *ir_gen_assign_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
+    IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
+    if (lvalue == irb->codegen->invalid_inst_src)
         return lvalue;
-    IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
-    IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
-    if (op2 == irb->codegen->invalid_instruction)
+    IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
+    IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
+    if (op2 == irb->codegen->invalid_inst_src)
         return op2;
-    IrInstruction *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
+    IrInstSrc *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
     ir_build_store_ptr(irb, scope, node, lvalue, result);
     return ir_build_const_void(irb, scope, node);
 }
 
-static IrInstruction *ir_gen_assign_op(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
-    IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
-    if (lvalue == irb->codegen->invalid_instruction)
+static IrInstSrc *ir_gen_assign_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
+    IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
+    if (lvalue == irb->codegen->invalid_inst_src)
         return lvalue;
-    IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
-    IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
-    if (op2 == irb->codegen->invalid_instruction)
+    IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
+    IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
+    if (op2 == irb->codegen->invalid_inst_src)
         return op2;
-    IrInstruction *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
+    IrInstSrc *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
     ir_build_store_ptr(irb, scope, node, lvalue, result);
     return ir_build_const_void(irb, scope, node);
 }
 
-static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_bool_or(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeBinOpExpr);
 
-    IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
-    if (val1 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *post_val1_block = irb->current_basic_block;
+    IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
+    if (val1 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, scope)) {
         is_comptime = ir_build_const_bool(irb, scope, node, true);
     } else {
@@ -4611,41 +5644,41 @@ static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node
     }
 
     // block for when val1 == false
-    IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
+    IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
     // block for when val1 == true (don't even evaluate the second part)
-    IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
+    IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
 
     ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, false_block);
-    IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
-    if (val2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *post_val2_block = irb->current_basic_block;
+    IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
+    if (val2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
 
     ir_build_br(irb, scope, node, true_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, true_block);
 
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2, "IrInstruction *");
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2, "IrInstSrc *");
     incoming_values[0] = val1;
     incoming_values[1] = val2;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = post_val1_block;
     incoming_blocks[1] = post_val2_block;
 
     return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
 }
 
-static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_bool_and(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeBinOpExpr);
 
-    IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
-    if (val1 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *post_val1_block = irb->current_basic_block;
+    IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
+    if (val1 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, scope)) {
         is_comptime = ir_build_const_bool(irb, scope, node, true);
     } else {
@@ -4653,34 +5686,34 @@ static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *nod
     }
 
     // block for when val1 == true
-    IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
+    IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
     // block for when val1 == false (don't even evaluate the second part)
-    IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
+    IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
 
     ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, true_block);
-    IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
-    if (val2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *post_val2_block = irb->current_basic_block;
+    IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
+    if (val2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
 
     ir_build_br(irb, scope, node, false_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, false_block);
 
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = val1;
     incoming_values[1] = val2;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = post_val1_block;
     incoming_blocks[1] = post_val2_block;
 
     return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
 }
 
-static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
-        IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
+static ResultLocPeerParent *ir_build_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
+        IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
 {
     ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
     peer_parent->base.id = ResultLocIdPeerParent;
@@ -4690,17 +5723,17 @@ static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction
     peer_parent->is_comptime = is_comptime;
     peer_parent->parent = parent;
 
-    IrInstruction *popped_inst = irb->current_basic_block->instruction_list.pop();
-    ir_assert(popped_inst == cond_br_inst, cond_br_inst);
+    IrInstSrc *popped_inst = irb->current_basic_block->instruction_list.pop();
+    ir_assert(popped_inst == cond_br_inst, &cond_br_inst->base);
 
-    ir_build_reset_result(irb, cond_br_inst->scope, cond_br_inst->source_node, &peer_parent->base);
+    ir_build_reset_result(irb, cond_br_inst->base.scope, cond_br_inst->base.source_node, &peer_parent->base);
     irb->current_basic_block->instruction_list.append(popped_inst);
 
     return peer_parent;
 }
 
-static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
-        IrBasicBlock *else_block, IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
+static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
+        IrBasicBlockSrc *else_block, IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
 {
     ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, parent, is_comptime);
 
@@ -4713,7 +5746,7 @@ static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstr
     return peer_parent;
 }
 
-static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_orelse(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeBinOpExpr);
@@ -4721,73 +5754,73 @@ static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode
     AstNode *op1_node = node->data.bin_op_expr.op1;
     AstNode *op2_node = node->data.bin_op_expr.op2;
 
-    IrInstruction *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
-    if (maybe_ptr == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
+    if (maybe_ptr == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
-    IrInstruction *is_non_null = ir_build_test_nonnull(irb, parent_scope, node, maybe_val);
+    IrInstSrc *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
+    IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, parent_scope, node, maybe_val);
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, parent_scope)) {
         is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
     } else {
         is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_non_null);
     }
 
-    IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
-    IrBasicBlock *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
-    IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
-    IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
+    IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
+    IrBasicBlockSrc *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
+    IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
+    IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
 
     ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block,
             result_loc, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, null_block);
-    IrInstruction *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
+    IrInstSrc *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
             &peer_parent->peers.at(0)->base);
-    if (null_result == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *after_null_block = irb->current_basic_block;
+    if (null_result == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *after_null_block = irb->current_basic_block;
     if (!instr_is_unreachable(null_result))
         ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, ok_block);
-    IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
-    IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
+    IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
+    IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
     ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
-    IrBasicBlock *after_ok_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
     ir_build_br(irb, parent_scope, node, end_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, end_block);
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = null_result;
     incoming_values[1] = unwrapped_payload;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = after_null_block;
     incoming_blocks[1] = after_ok_block;
-    IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
+    IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
     return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_error_union(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_error_union(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeBinOpExpr);
 
     AstNode *op1_node = node->data.bin_op_expr.op1;
     AstNode *op2_node = node->data.bin_op_expr.op2;
 
-    IrInstruction *err_set = ir_gen_node(irb, op1_node, parent_scope);
-    if (err_set == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *err_set = ir_gen_node(irb, op1_node, parent_scope);
+    if (err_set == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *payload = ir_gen_node(irb, op2_node, parent_scope);
-    if (payload == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *payload = ir_gen_node(irb, op2_node, parent_scope);
+    if (payload == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     return ir_build_error_union(irb, parent_scope, node, err_set, payload);
 }
 
-static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
+static IrInstSrc *ir_gen_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
     assert(node->type == NodeTypeBinOpExpr);
 
     BinOpType bin_op_type = node->data.bin_op_expr.bin_op;
@@ -4880,30 +5913,30 @@ static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node,
     zig_unreachable();
 }
 
-static IrInstruction *ir_gen_int_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_int_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeIntLiteral);
 
     return ir_build_const_bigint(irb, scope, node, node->data.int_literal.bigint);
 }
 
-static IrInstruction *ir_gen_float_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_float_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeFloatLiteral);
 
     if (node->data.float_literal.overflow) {
         add_node_error(irb->codegen, node, buf_sprintf("float literal out of range of any type"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     return ir_build_const_bigfloat(irb, scope, node, node->data.float_literal.bigfloat);
 }
 
-static IrInstruction *ir_gen_char_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_char_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeCharLiteral);
 
     return ir_build_const_uint(irb, scope, node, node->data.char_literal.value);
 }
 
-static IrInstruction *ir_gen_null_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_null_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeNullLiteral);
 
     return ir_build_const_null(irb, scope, node);
@@ -4921,11 +5954,11 @@ static void populate_invalid_variable_in_scope(CodeGen *g, Scope *scope, AstNode
     init_tld(&tld_var->base, TldIdVar, var_name, VisibModPub, node, &scope_decls->base);
     tld_var->base.resolution = TldResolutionInvalid;
     tld_var->var = add_variable(g, node, &scope_decls->base, var_name, false,
-            g->invalid_instruction->value, &tld_var->base, g->builtin_types.entry_invalid);
+            g->invalid_inst_gen->value, &tld_var->base, g->builtin_types.entry_invalid);
     scope_decls->decl_table.put(var_name, &tld_var->base);
 }
 
-static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
+static IrInstSrc *ir_gen_symbol(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
     Error err;
     assert(node->type == NodeTypeSymbol);
 
@@ -4933,15 +5966,16 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
 
     if (buf_eql_str(variable_name, "_")) {
         if (lval == LValPtr) {
-            IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, node);
-            const_instruction->base.value->type = get_pointer_to_type(irb->codegen,
+            IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, node);
+            const_instruction->value = create_const_vals(1);
+            const_instruction->value->type = get_pointer_to_type(irb->codegen,
                     irb->codegen->builtin_types.entry_void, false);
-            const_instruction->base.value->special = ConstValSpecialStatic;
-            const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialDiscard;
+            const_instruction->value->special = ConstValSpecialStatic;
+            const_instruction->value->data.x_ptr.special = ConstPtrSpecialDiscard;
             return &const_instruction->base;
         } else {
             add_node_error(irb->codegen, node, buf_sprintf("`_` may only be used to assign things to"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
     }
 
@@ -4951,13 +5985,13 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
             add_node_error(irb->codegen, node,
                 buf_sprintf("primitive integer type '%s' exceeds maximum bit width of 65535",
                     buf_ptr(variable_name)));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         assert(err == ErrorPrimitiveTypeNotFound);
     } else {
-        IrInstruction *value = ir_build_const_type(irb, scope, node, primitive_type);
+        IrInstSrc *value = ir_build_const_type(irb, scope, node, primitive_type);
         if (lval == LValPtr) {
-            return ir_build_ref(irb, scope, node, value, false, false);
+            return ir_build_ref_src(irb, scope, node, value, false, false);
         } else {
             return ir_expr_wrap(irb, scope, value, result_loc);
         }
@@ -4966,7 +6000,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
     ScopeFnDef *crossed_fndef_scope;
     ZigVar *var = find_variable(irb->codegen, scope, variable_name, &crossed_fndef_scope);
     if (var) {
-        IrInstruction *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
+        IrInstSrc *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
         if (lval == LValPtr) {
             return var_ptr;
         } else {
@@ -4976,7 +6010,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
 
     Tld *tld = find_decl(irb->codegen, scope, variable_name);
     if (tld) {
-        IrInstruction *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
+        IrInstSrc *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
         if (lval == LValPtr) {
             return decl_ref;
         } else {
@@ -4987,50 +6021,50 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
     if (get_container_scope(node->owner)->any_imports_failed) {
         // skip the error message since we had a failing import in this file
         // if an import breaks we don't need redundant undeclared identifier errors
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     return ir_build_undeclared_identifier(irb, scope, node, variable_name);
 }
 
-static IrInstruction *ir_gen_array_access(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_array_access(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeArrayAccessExpr);
 
     AstNode *array_ref_node = node->data.array_access_expr.array_ref_expr;
-    IrInstruction *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
-    if (array_ref_instruction == irb->codegen->invalid_instruction)
+    IrInstSrc *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
+    if (array_ref_instruction == irb->codegen->invalid_inst_src)
         return array_ref_instruction;
 
     AstNode *subscript_node = node->data.array_access_expr.subscript;
-    IrInstruction *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
-    if (subscript_instruction == irb->codegen->invalid_instruction)
+    IrInstSrc *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
+    if (subscript_instruction == irb->codegen->invalid_inst_src)
         return subscript_instruction;
 
-    IrInstruction *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
+    IrInstSrc *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
             subscript_instruction, true, PtrLenSingle, nullptr);
     if (lval == LValPtr)
         return ptr_instruction;
 
-    IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
+    IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
     return ir_expr_wrap(irb, scope, load_ptr, result_loc);
 }
 
-static IrInstruction *ir_gen_field_access(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_field_access(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeFieldAccessExpr);
 
     AstNode *container_ref_node = node->data.field_access_expr.struct_expr;
     Buf *field_name = node->data.field_access_expr.field_name;
 
-    IrInstruction *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
-    if (container_ref_instruction == irb->codegen->invalid_instruction)
+    IrInstSrc *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
+    if (container_ref_instruction == irb->codegen->invalid_inst_src)
         return container_ref_instruction;
 
     return ir_build_field_ptr(irb, scope, node, container_ref_instruction, field_name, false);
 }
 
-static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
+static IrInstSrc *ir_gen_overflow_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
     assert(node->type == NodeTypeFnCallExpr);
 
     AstNode *type_node = node->data.fn_call_expr.params.at(0);
@@ -5039,26 +6073,26 @@ static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *
     AstNode *result_ptr_node = node->data.fn_call_expr.params.at(3);
 
 
-    IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
-    if (type_value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
+    if (type_value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
-    if (op1 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
+    if (op1 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
-    if (op2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
+    if (op2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
-    if (result_ptr == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
+    if (result_ptr == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    return ir_build_overflow_op(irb, scope, node, op, type_value, op1, op2, result_ptr, nullptr);
+    return ir_build_overflow_op_src(irb, scope, node, op, type_value, op1, op2, result_ptr);
 }
 
-static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_mul_add(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeFnCallExpr);
 
     AstNode *type_node = node->data.fn_call_expr.params.at(0);
@@ -5066,26 +6100,26 @@ static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node
     AstNode *op2_node = node->data.fn_call_expr.params.at(2);
     AstNode *op3_node = node->data.fn_call_expr.params.at(3);
 
-    IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
-    if (type_value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
+    if (type_value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
-    if (op1 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
+    if (op1 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
-    if (op2 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
+    if (op2 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *op3 = ir_gen_node(irb, op3_node, scope);
-    if (op3 == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *op3 = ir_gen_node(irb, op3_node, scope);
+    if (op3 == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    return ir_build_mul_add(irb, scope, node, type_value, op1, op2, op3);
+    return ir_build_mul_add_src(irb, scope, node, type_value, op1, op2, op3);
 }
 
-static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *node) {
+static IrInstSrc *ir_gen_this(IrBuilderSrc *irb, Scope *orig_scope, AstNode *node) {
     for (Scope *it_scope = orig_scope; it_scope != nullptr; it_scope = it_scope->parent) {
         if (it_scope->id == ScopeIdDecls) {
             ScopeDecls *decls_scope = (ScopeDecls *)it_scope;
@@ -5100,7 +6134,7 @@ static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *no
     zig_unreachable();
 }
 
-static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
+static IrInstSrc *ir_gen_async_call(IrBuilderSrc *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
         LVal lval, ResultLoc *result_loc)
 {
     size_t arg_offset = 3;
@@ -5108,71 +6142,71 @@ static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *a
         add_node_error(irb->codegen, call_node,
             buf_sprintf("expected at least %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
                 arg_offset, call_node->data.fn_call_expr.params.length));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     AstNode *bytes_node = call_node->data.fn_call_expr.params.at(0);
-    IrInstruction *bytes = ir_gen_node(irb, bytes_node, scope);
-    if (bytes == irb->codegen->invalid_instruction)
+    IrInstSrc *bytes = ir_gen_node(irb, bytes_node, scope);
+    if (bytes == irb->codegen->invalid_inst_src)
         return bytes;
 
     AstNode *ret_ptr_node = call_node->data.fn_call_expr.params.at(1);
-    IrInstruction *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
-    if (ret_ptr == irb->codegen->invalid_instruction)
+    IrInstSrc *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
+    if (ret_ptr == irb->codegen->invalid_inst_src)
         return ret_ptr;
 
     AstNode *fn_ref_node = call_node->data.fn_call_expr.params.at(2);
-    IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
-    if (fn_ref == irb->codegen->invalid_instruction)
+    IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
+    if (fn_ref == irb->codegen->invalid_inst_src)
         return fn_ref;
 
     size_t arg_count = call_node->data.fn_call_expr.params.length - arg_offset;
-    IrInstruction **args = allocate<IrInstruction*>(arg_count);
+    IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
     for (size_t i = 0; i < arg_count; i += 1) {
         AstNode *arg_node = call_node->data.fn_call_expr.params.at(i + arg_offset);
-        IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
-        if (arg == irb->codegen->invalid_instruction)
+        IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
+        if (arg == irb->codegen->invalid_inst_src)
             return arg;
         args[i] = arg;
     }
 
     CallModifier modifier = (await_node == nullptr) ? CallModifierAsync : CallModifierNone;
     bool is_async_call_builtin = true;
-    IrInstruction *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
+    IrInstSrc *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
             ret_ptr, modifier, is_async_call_builtin, bytes, result_loc);
     return ir_lval_wrap(irb, scope, call, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
-        AstNode *fn_ref_node, CallModifier modifier, IrInstruction *options,
+static IrInstSrc *ir_gen_fn_call_with_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+        AstNode *fn_ref_node, CallModifier modifier, IrInstSrc *options,
         AstNode **args_ptr, size_t args_len, LVal lval, ResultLoc *result_loc)
 {
-    IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
-    if (fn_ref == irb->codegen->invalid_instruction)
+    IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
+    if (fn_ref == irb->codegen->invalid_inst_src)
         return fn_ref;
 
-    IrInstruction *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
+    IrInstSrc *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
 
-    IrInstruction **args = allocate<IrInstruction*>(args_len);
+    IrInstSrc **args = allocate<IrInstSrc*>(args_len);
     for (size_t i = 0; i < args_len; i += 1) {
         AstNode *arg_node = args_ptr[i];
 
-        IrInstruction *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
-        IrInstruction *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
+        IrInstSrc *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
+        IrInstSrc *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
         ResultLoc *no_result = no_result_loc();
         ir_build_reset_result(irb, scope, source_node, no_result);
         ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, arg_type, no_result);
 
-        IrInstruction *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
-        if (arg == irb->codegen->invalid_instruction)
+        IrInstSrc *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
+        if (arg == irb->codegen->invalid_inst_src)
             return arg;
 
         args[i] = ir_build_implicit_cast(irb, scope, arg_node, arg, result_loc_cast);
     }
 
-    IrInstruction *fn_call;
+    IrInstSrc *fn_call;
     if (options != nullptr) {
-        fn_call = ir_build_call_src_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
+        fn_call = ir_build_call_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
     } else {
         fn_call = ir_build_call_src(irb, scope, source_node, nullptr, fn_ref, args_len, args, nullptr,
                 modifier, false, nullptr, result_loc);
@@ -5180,7 +6214,7 @@ static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, Ast
     return ir_lval_wrap(irb, scope, fn_call, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeFnCallExpr);
@@ -5192,7 +6226,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
     if (!entry) {
         add_node_error(irb->codegen, node,
                 buf_sprintf("invalid builtin function: '%s'", buf_ptr(name)));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     BuiltinFnEntry *builtin_fn = entry->value;
@@ -5202,7 +6236,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         add_node_error(irb->codegen, node,
                 buf_sprintf("expected %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
                     builtin_fn->param_count, actual_param_count));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     switch (builtin_fn->id) {
@@ -5213,197 +6247,197 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
                 Scope *sub_scope = create_typeof_scope(irb->codegen, node, scope);
 
                 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg = ir_gen_node(irb, arg_node, sub_scope);
-                if (arg == irb->codegen->invalid_instruction)
+                IrInstSrc *arg = ir_gen_node(irb, arg_node, sub_scope);
+                if (arg == irb->codegen->invalid_inst_src)
                     return arg;
 
-                IrInstruction *type_of = ir_build_typeof(irb, scope, node, arg);
+                IrInstSrc *type_of = ir_build_typeof(irb, scope, node, arg);
                 return ir_lval_wrap(irb, scope, type_of, lval, result_loc);
             }
         case BuiltinFnIdSetCold:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
+                IrInstSrc *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_cold, lval, result_loc);
             }
         case BuiltinFnIdSetRuntimeSafety:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
+                IrInstSrc *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_safety, lval, result_loc);
             }
         case BuiltinFnIdSetFloatMode:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
+                IrInstSrc *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_float_mode, lval, result_loc);
             }
         case BuiltinFnIdSizeof:
         case BuiltinFnIdBitSizeof:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
+                IrInstSrc *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
                 return ir_lval_wrap(irb, scope, size_of, lval, result_loc);
             }
         case BuiltinFnIdImport:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *import = ir_build_import(irb, scope, node, arg0_value);
+                IrInstSrc *import = ir_build_import(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, import, lval, result_loc);
             }
         case BuiltinFnIdCImport:
             {
-                IrInstruction *c_import = ir_build_c_import(irb, scope, node);
+                IrInstSrc *c_import = ir_build_c_import(irb, scope, node);
                 return ir_lval_wrap(irb, scope, c_import, lval, result_loc);
             }
         case BuiltinFnIdCInclude:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 if (!exec_c_import_buf(irb->exec)) {
                     add_node_error(irb->codegen, node, buf_sprintf("C include valid only inside C import block"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
 
-                IrInstruction *c_include = ir_build_c_include(irb, scope, node, arg0_value);
+                IrInstSrc *c_include = ir_build_c_include(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, c_include, lval, result_loc);
             }
         case BuiltinFnIdCDefine:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 if (!exec_c_import_buf(irb->exec)) {
                     add_node_error(irb->codegen, node, buf_sprintf("C define valid only inside C import block"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
 
-                IrInstruction *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, c_define, lval, result_loc);
             }
         case BuiltinFnIdCUndef:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 if (!exec_c_import_buf(irb->exec)) {
                     add_node_error(irb->codegen, node, buf_sprintf("C undef valid only inside C import block"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
 
-                IrInstruction *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
+                IrInstSrc *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, c_undef, lval, result_loc);
             }
         case BuiltinFnIdCompileErr:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
+                IrInstSrc *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, compile_err, lval, result_loc);
             }
         case BuiltinFnIdCompileLog:
             {
-                IrInstruction **args = allocate<IrInstruction*>(actual_param_count);
+                IrInstSrc **args = allocate<IrInstSrc*>(actual_param_count);
 
                 for (size_t i = 0; i < actual_param_count; i += 1) {
                     AstNode *arg_node = node->data.fn_call_expr.params.at(i);
                     args[i] = ir_gen_node(irb, arg_node, scope);
-                    if (args[i] == irb->codegen->invalid_instruction)
-                        return irb->codegen->invalid_instruction;
+                    if (args[i] == irb->codegen->invalid_inst_src)
+                        return irb->codegen->invalid_inst_src;
                 }
 
-                IrInstruction *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
+                IrInstSrc *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
                 return ir_lval_wrap(irb, scope, compile_log, lval, result_loc);
             }
         case BuiltinFnIdErrName:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *err_name = ir_build_err_name(irb, scope, node, arg0_value);
+                IrInstSrc *err_name = ir_build_err_name(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, err_name, lval, result_loc);
             }
         case BuiltinFnIdEmbedFile:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
+                IrInstSrc *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, embed_file, lval, result_loc);
             }
         case BuiltinFnIdCmpxchgWeak:
         case BuiltinFnIdCmpxchgStrong:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
                 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
-                IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
-                if (arg3_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
+                if (arg3_value == irb->codegen->invalid_inst_src)
                     return arg3_value;
 
                 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
-                IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
-                if (arg4_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
+                if (arg4_value == irb->codegen->invalid_inst_src)
                     return arg4_value;
 
                 AstNode *arg5_node = node->data.fn_call_expr.params.at(5);
-                IrInstruction *arg5_value = ir_gen_node(irb, arg5_node, scope);
-                if (arg5_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg5_value = ir_gen_node(irb, arg5_node, scope);
+                if (arg5_value == irb->codegen->invalid_inst_src)
                     return arg5_value;
 
-                IrInstruction *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
+                IrInstSrc *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
                     arg2_value, arg3_value, arg4_value, arg5_value, (builtin_fn->id == BuiltinFnIdCmpxchgWeak),
                     result_loc);
                 return ir_lval_wrap(irb, scope, cmpxchg, lval, result_loc);
@@ -5411,86 +6445,86 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdFence:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *fence = ir_build_fence(irb, scope, node, arg0_value, AtomicOrderUnordered);
+                IrInstSrc *fence = ir_build_fence(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, fence, lval, result_loc);
             }
         case BuiltinFnIdDivExact:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdDivTrunc:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdDivFloor:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdRem:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdMod:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdSqrt:
@@ -5509,406 +6543,406 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdRound:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *inst = ir_build_float_op(irb, scope, node, arg0_value, builtin_fn->id);
+                IrInstSrc *inst = ir_build_float_op_src(irb, scope, node, arg0_value, builtin_fn->id);
                 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
             }
         case BuiltinFnIdTruncate:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, truncate, lval, result_loc);
             }
         case BuiltinFnIdIntCast:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdFloatCast:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdErrSetCast:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdFromBytes:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
+                IrInstSrc *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdToBytes:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
+                IrInstSrc *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdIntToFloat:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdFloatToInt:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdErrToInt:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *result = ir_build_err_to_int(irb, scope, node, arg0_value);
+                IrInstSrc *result = ir_build_err_to_int_src(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdIntToErr:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *result = ir_build_int_to_err(irb, scope, node, arg0_value);
+                IrInstSrc *result = ir_build_int_to_err_src(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdBoolToInt:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
+                IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdIntType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
             }
         case BuiltinFnIdVectorType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);
             }
         case BuiltinFnIdShuffle:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
                 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
-                IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
-                if (arg3_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
+                if (arg3_value == irb->codegen->invalid_inst_src)
                     return arg3_value;
 
-                IrInstruction *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
+                IrInstSrc *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
                     arg0_value, arg1_value, arg2_value, arg3_value);
                 return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);
             }
         case BuiltinFnIdSplat:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *splat = ir_build_splat_src(irb, scope, node,
+                IrInstSrc *splat = ir_build_splat_src(irb, scope, node,
                     arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, splat, lval, result_loc);
             }
         case BuiltinFnIdMemcpy:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
-                IrInstruction *ir_memcpy = ir_build_memcpy(irb, scope, node, arg0_value, arg1_value, arg2_value);
+                IrInstSrc *ir_memcpy = ir_build_memcpy_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
                 return ir_lval_wrap(irb, scope, ir_memcpy, lval, result_loc);
             }
         case BuiltinFnIdMemset:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
-                IrInstruction *ir_memset = ir_build_memset(irb, scope, node, arg0_value, arg1_value, arg2_value);
+                IrInstSrc *ir_memset = ir_build_memset_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
                 return ir_lval_wrap(irb, scope, ir_memset, lval, result_loc);
             }
         case BuiltinFnIdMemberCount:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *member_count = ir_build_member_count(irb, scope, node, arg0_value);
+                IrInstSrc *member_count = ir_build_member_count(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, member_count, lval, result_loc);
             }
         case BuiltinFnIdMemberType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
 
-                IrInstruction *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, member_type, lval, result_loc);
             }
         case BuiltinFnIdMemberName:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
 
-                IrInstruction *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, member_name, lval, result_loc);
             }
         case BuiltinFnIdField:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
+                IrInstSrc *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
                         arg0_value, arg1_value, false);
 
                 if (lval == LValPtr)
                     return ptr_instruction;
 
-                IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
+                IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
                 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
             }
         case BuiltinFnIdHasField:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
             }
         case BuiltinFnIdTypeInfo:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *type_info = ir_build_type_info(irb, scope, node, arg0_value);
+                IrInstSrc *type_info = ir_build_type_info(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
             }
         case BuiltinFnIdType:
             {
                 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
-                if (arg == irb->codegen->invalid_instruction)
+                IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
+                if (arg == irb->codegen->invalid_inst_src)
                     return arg;
 
-                IrInstruction *type = ir_build_type(irb, scope, node, arg);
+                IrInstSrc *type = ir_build_type(irb, scope, node, arg);
                 return ir_lval_wrap(irb, scope, type, lval, result_loc);
             }
         case BuiltinFnIdBreakpoint:
             return ir_lval_wrap(irb, scope, ir_build_breakpoint(irb, scope, node), lval, result_loc);
         case BuiltinFnIdReturnAddress:
-            return ir_lval_wrap(irb, scope, ir_build_return_address(irb, scope, node), lval, result_loc);
+            return ir_lval_wrap(irb, scope, ir_build_return_address_src(irb, scope, node), lval, result_loc);
         case BuiltinFnIdFrameAddress:
-            return ir_lval_wrap(irb, scope, ir_build_frame_address(irb, scope, node), lval, result_loc);
+            return ir_lval_wrap(irb, scope, ir_build_frame_address_src(irb, scope, node), lval, result_loc);
         case BuiltinFnIdFrameHandle:
             if (!irb->exec->fn_entry) {
                 add_node_error(irb->codegen, node, buf_sprintf("@frame() called outside of function definition"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
-            return ir_lval_wrap(irb, scope, ir_build_handle(irb, scope, node), lval, result_loc);
+            return ir_lval_wrap(irb, scope, ir_build_handle_src(irb, scope, node), lval, result_loc);
         case BuiltinFnIdFrameType: {
             AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-            IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-            if (arg0_value == irb->codegen->invalid_instruction)
+            IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+            if (arg0_value == irb->codegen->invalid_inst_src)
                 return arg0_value;
 
-            IrInstruction *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
+            IrInstSrc *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
             return ir_lval_wrap(irb, scope, frame_type, lval, result_loc);
         }
         case BuiltinFnIdFrameSize: {
             AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-            IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-            if (arg0_value == irb->codegen->invalid_instruction)
+            IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+            if (arg0_value == irb->codegen->invalid_inst_src)
                 return arg0_value;
 
-            IrInstruction *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
+            IrInstSrc *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
             return ir_lval_wrap(irb, scope, frame_size, lval, result_loc);
         }
         case BuiltinFnIdAlignOf:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *align_of = ir_build_align_of(irb, scope, node, arg0_value);
+                IrInstSrc *align_of = ir_build_align_of(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, align_of, lval, result_loc);
             }
         case BuiltinFnIdAddWithOverflow:
@@ -5924,43 +6958,43 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdTypeName:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *type_name = ir_build_type_name(irb, scope, node, arg0_value);
+                IrInstSrc *type_name = ir_build_type_name(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, type_name, lval, result_loc);
             }
         case BuiltinFnIdPanic:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *panic = ir_build_panic(irb, scope, node, arg0_value);
+                IrInstSrc *panic = ir_build_panic_src(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, panic, lval, result_loc);
             }
         case BuiltinFnIdPtrCast:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
+                IrInstSrc *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, ptr_cast, lval, result_loc);
             }
         case BuiltinFnIdBitCast:
             {
                 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
-                if (dest_type == irb->codegen->invalid_instruction)
+                IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
+                if (dest_type == irb->codegen->invalid_inst_src)
                     return dest_type;
 
                 ResultLocBitCast *result_loc_bit_cast = allocate<ResultLocBitCast>(1);
@@ -5972,125 +7006,126 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
                 ir_build_reset_result(irb, scope, node, &result_loc_bit_cast->base);
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
+                IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
                         &result_loc_bit_cast->base);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
+                IrInstSrc *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
                 return ir_lval_wrap(irb, scope, bitcast, lval, result_loc);
             }
         case BuiltinFnIdAs:
             {
                 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
-                if (dest_type == irb->codegen->invalid_instruction)
+                IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
+                if (dest_type == irb->codegen->invalid_inst_src)
                     return dest_type;
 
                 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, dest_type, result_loc);
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
+                IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
                         &result_loc_cast->base);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
+                IrInstSrc *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdIntToPtr:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *int_to_ptr = ir_build_int_to_ptr(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *int_to_ptr = ir_build_int_to_ptr_src(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, int_to_ptr, lval, result_loc);
             }
         case BuiltinFnIdPtrToInt:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *ptr_to_int = ir_build_ptr_to_int(irb, scope, node, arg0_value);
+                IrInstSrc *ptr_to_int = ir_build_ptr_to_int_src(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, ptr_to_int, lval, result_loc);
             }
         case BuiltinFnIdTagName:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, arg0_value);
+                IrInstSrc *tag_name = ir_build_tag_name_src(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);
             }
         case BuiltinFnIdTagType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
+                IrInstSrc *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, tag_type, lval, result_loc);
             }
         case BuiltinFnIdFieldParentPtr:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
-                IrInstruction *field_parent_ptr = ir_build_field_parent_ptr(irb, scope, node, arg0_value, arg1_value, arg2_value, nullptr);
+                IrInstSrc *field_parent_ptr = ir_build_field_parent_ptr_src(irb, scope, node,
+                        arg0_value, arg1_value, arg2_value);
                 return ir_lval_wrap(irb, scope, field_parent_ptr, lval, result_loc);
             }
         case BuiltinFnIdByteOffsetOf:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
             }
         case BuiltinFnIdBitOffsetOf:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
             }
         case BuiltinFnIdNewStackCall:
@@ -6099,45 +7134,45 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
                     add_node_error(irb->codegen, node,
                         buf_sprintf("expected at least 2 arguments, found %" ZIG_PRI_usize,
                             node->data.fn_call_expr.params.length));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
 
                 AstNode *new_stack_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *new_stack = ir_gen_node(irb, new_stack_node, scope);
-                if (new_stack == irb->codegen->invalid_instruction)
+                IrInstSrc *new_stack = ir_gen_node(irb, new_stack_node, scope);
+                if (new_stack == irb->codegen->invalid_inst_src)
                     return new_stack;
 
                 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
-                if (fn_ref == irb->codegen->invalid_instruction)
+                IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
+                if (fn_ref == irb->codegen->invalid_inst_src)
                     return fn_ref;
 
                 size_t arg_count = node->data.fn_call_expr.params.length - 2;
 
-                IrInstruction **args = allocate<IrInstruction*>(arg_count);
+                IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
                 for (size_t i = 0; i < arg_count; i += 1) {
                     AstNode *arg_node = node->data.fn_call_expr.params.at(i + 2);
                     args[i] = ir_gen_node(irb, arg_node, scope);
-                    if (args[i] == irb->codegen->invalid_instruction)
+                    if (args[i] == irb->codegen->invalid_inst_src)
                         return args[i];
                 }
 
-                IrInstruction *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
+                IrInstSrc *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
                         nullptr, CallModifierNone, false, new_stack, result_loc);
                 return ir_lval_wrap(irb, scope, call, lval, result_loc);
             }
         case BuiltinFnIdCall: {
             // Cast the options parameter to the options type
             ZigType *options_type = get_builtin_type(irb->codegen, "CallOptions");
-            IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
+            IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
             ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
 
             AstNode *options_node = node->data.fn_call_expr.params.at(0);
-            IrInstruction *options_inner = ir_gen_node_extra(irb, options_node, scope,
+            IrInstSrc *options_inner = ir_gen_node_extra(irb, options_node, scope,
                     LValNone, &result_loc_cast->base);
-            if (options_inner == irb->codegen->invalid_instruction)
+            if (options_inner == irb->codegen->invalid_inst_src)
                 return options_inner;
-            IrInstruction *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
+            IrInstSrc *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
 
             AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
             AstNode *args_node = node->data.fn_call_expr.params.at(2);
@@ -6153,18 +7188,18 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
                 } else {
                     exec_add_error_node(irb->codegen, irb->exec, args_node,
                             buf_sprintf("TODO: @call with anon struct literal"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
             } else {
-                IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
-                if (fn_ref == irb->codegen->invalid_instruction)
+                IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
+                if (fn_ref == irb->codegen->invalid_inst_src)
                     return fn_ref;
 
-                IrInstruction *args = ir_gen_node(irb, args_node, scope);
-                if (args == irb->codegen->invalid_instruction)
+                IrInstSrc *args = ir_gen_node(irb, args_node, scope);
+                if (args == irb->codegen->invalid_inst_src)
                     return args;
 
-                IrInstruction *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
+                IrInstSrc *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
                 return ir_lval_wrap(irb, scope, call, lval, result_loc);
             }
         }
@@ -6173,237 +7208,233 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdTypeId:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *type_id = ir_build_type_id(irb, scope, node, arg0_value);
+                IrInstSrc *type_id = ir_build_type_id(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, type_id, lval, result_loc);
             }
         case BuiltinFnIdShlExact:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdShrExact:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
+                IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
                 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
             }
         case BuiltinFnIdSetEvalBranchQuota:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
+                IrInstSrc *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_eval_branch_quota, lval, result_loc);
             }
         case BuiltinFnIdAlignCast:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *align_cast = ir_build_align_cast(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *align_cast = ir_build_align_cast_src(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, align_cast, lval, result_loc);
             }
         case BuiltinFnIdOpaqueType:
             {
-                IrInstruction *opaque_type = ir_build_opaque_type(irb, scope, node);
+                IrInstSrc *opaque_type = ir_build_opaque_type(irb, scope, node);
                 return ir_lval_wrap(irb, scope, opaque_type, lval, result_loc);
             }
         case BuiltinFnIdThis:
             {
-                IrInstruction *this_inst = ir_gen_this(irb, scope, node);
+                IrInstSrc *this_inst = ir_gen_this(irb, scope, node);
                 return ir_lval_wrap(irb, scope, this_inst, lval, result_loc);
             }
         case BuiltinFnIdSetAlignStack:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
+                IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
             }
         case BuiltinFnIdArgType:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
+                IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
                 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
             }
         case BuiltinFnIdExport:
             {
                 // Cast the options parameter to the options type
                 ZigType *options_type = get_builtin_type(irb->codegen, "ExportOptions");
-                IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
+                IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
                 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
 
                 AstNode *target_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *target_value = ir_gen_node(irb, target_node, scope);
-                if (target_value == irb->codegen->invalid_instruction)
+                IrInstSrc *target_value = ir_gen_node(irb, target_node, scope);
+                if (target_value == irb->codegen->invalid_inst_src)
                     return target_value;
 
                 AstNode *options_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *options_value = ir_gen_node_extra(irb, options_node,
+                IrInstSrc *options_value = ir_gen_node_extra(irb, options_node,
                     scope, LValNone, &result_loc_cast->base);
-                if (options_value == irb->codegen->invalid_instruction)
+                if (options_value == irb->codegen->invalid_inst_src)
                     return options_value;
 
-                IrInstruction *casted_options_value = ir_build_implicit_cast(
+                IrInstSrc *casted_options_value = ir_build_implicit_cast(
                     irb, scope, options_node, options_value, result_loc_cast);
 
-                IrInstruction *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
+                IrInstSrc *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
                 return ir_lval_wrap(irb, scope, ir_export, lval, result_loc);
             }
         case BuiltinFnIdErrorReturnTrace:
             {
-                IrInstruction *error_return_trace = ir_build_error_return_trace(irb, scope, node, IrInstructionErrorReturnTrace::Null);
+                IrInstSrc *error_return_trace = ir_build_error_return_trace_src(irb, scope, node,
+                        IrInstErrorReturnTraceNull);
                 return ir_lval_wrap(irb, scope, error_return_trace, lval, result_loc);
             }
         case BuiltinFnIdAtomicRmw:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
                 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
-                IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
-                if (arg3_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
+                if (arg3_value == irb->codegen->invalid_inst_src)
                     return arg3_value;
 
                 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
-                IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
-                if (arg4_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
+                if (arg4_value == irb->codegen->invalid_inst_src)
                     return arg4_value;
 
-                IrInstruction *inst = ir_build_atomic_rmw(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
-                        arg4_value,
-                        // these 2 values don't mean anything since we passed non-null values for other args
-                        AtomicRmwOp_xchg, AtomicOrderMonotonic);
+                IrInstSrc *inst = ir_build_atomic_rmw_src(irb, scope, node,
+                        arg0_value, arg1_value, arg2_value, arg3_value, arg4_value);
                 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
             }
         case BuiltinFnIdAtomicLoad:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
-                IrInstruction *inst = ir_build_atomic_load(irb, scope, node, arg0_value, arg1_value, arg2_value,
-                        // this value does not mean anything since we passed non-null values for other arg
-                        AtomicOrderMonotonic);
+                IrInstSrc *inst = ir_build_atomic_load_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
                 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
             }
         case BuiltinFnIdAtomicStore:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
                 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
-                IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
-                if (arg2_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
+                if (arg2_value == irb->codegen->invalid_inst_src)
                     return arg2_value;
 
                 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
-                IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
-                if (arg3_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
+                if (arg3_value == irb->codegen->invalid_inst_src)
                     return arg3_value;
 
-                IrInstruction *inst = ir_build_atomic_store(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
-                        // this value does not mean anything since we passed non-null values for other arg
-                        AtomicOrderMonotonic);
+                IrInstSrc *inst = ir_build_atomic_store_src(irb, scope, node, arg0_value, arg1_value,
+                        arg2_value, arg3_value);
                 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
             }
         case BuiltinFnIdIntToEnum:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result = ir_build_int_to_enum(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *result = ir_build_int_to_enum_src(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdEnumToInt:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
-                IrInstruction *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
+                IrInstSrc *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
                 return ir_lval_wrap(irb, scope, result, lval, result_loc);
             }
         case BuiltinFnIdCtz:
@@ -6413,16 +7444,16 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdBitReverse:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *result;
+                IrInstSrc *result;
                 switch (builtin_fn->id) {
                 case BuiltinFnIdCtz:
                     result = ir_build_ctz(irb, scope, node, arg0_value, arg1_value);
@@ -6447,28 +7478,28 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
         case BuiltinFnIdHasDecl:
             {
                 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
-                if (arg0_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
+                if (arg0_value == irb->codegen->invalid_inst_src)
                     return arg0_value;
 
                 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
-                if (arg1_value == irb->codegen->invalid_instruction)
+                IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
+                if (arg1_value == irb->codegen->invalid_inst_src)
                     return arg1_value;
 
-                IrInstruction *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
+                IrInstSrc *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
                 return ir_lval_wrap(irb, scope, has_decl, lval, result_loc);
             }
         case BuiltinFnIdUnionInit:
             {
                 AstNode *union_type_node = node->data.fn_call_expr.params.at(0);
-                IrInstruction *union_type_inst = ir_gen_node(irb, union_type_node, scope);
-                if (union_type_inst == irb->codegen->invalid_instruction)
+                IrInstSrc *union_type_inst = ir_gen_node(irb, union_type_node, scope);
+                if (union_type_inst == irb->codegen->invalid_inst_src)
                     return union_type_inst;
 
                 AstNode *name_node = node->data.fn_call_expr.params.at(1);
-                IrInstruction *name_inst = ir_gen_node(irb, name_node, scope);
-                if (name_inst == irb->codegen->invalid_instruction)
+                IrInstSrc *name_inst = ir_gen_node(irb, name_node, scope);
+                if (name_inst == irb->codegen->invalid_inst_src)
                     return name_inst;
 
                 AstNode *init_node = node->data.fn_call_expr.params.at(2);
@@ -6480,7 +7511,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
     zig_unreachable();
 }
 
-static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeFnCallExpr);
@@ -6493,16 +7524,16 @@ static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node
         nullptr, node->data.fn_call_expr.params.items, node->data.fn_call_expr.params.length, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_if_bool_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeIfBoolExpr);
 
-    IrInstruction *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
-    if (condition == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
+    if (condition == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, scope)) {
         is_comptime = ir_build_const_bool(irb, scope, node, true);
     } else {
@@ -6512,11 +7543,11 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
     AstNode *then_node = node->data.if_bool_expr.then_block;
     AstNode *else_node = node->data.if_bool_expr.else_node;
 
-    IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "Then");
-    IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "Else");
-    IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "EndIf");
+    IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "Then");
+    IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "Else");
+    IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "EndIf");
 
-    IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
+    IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
             then_block, else_block, is_comptime);
     ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
             result_loc, is_comptime);
@@ -6524,70 +7555,70 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
     ir_set_cursor_at_end_and_append_block(irb, then_block);
 
     Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
-    IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
+    IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
             &peer_parent->peers.at(0)->base);
-    if (then_expr_result == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *after_then_block = irb->current_basic_block;
+    if (then_expr_result == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *after_then_block = irb->current_basic_block;
     if (!instr_is_unreachable(then_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, else_block);
-    IrInstruction *else_expr_result;
+    IrInstSrc *else_expr_result;
     if (else_node) {
         else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
-        if (else_expr_result == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (else_expr_result == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     } else {
         else_expr_result = ir_build_const_void(irb, scope, node);
         ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
     }
-    IrBasicBlock *after_else_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_else_block = irb->current_basic_block;
     if (!instr_is_unreachable(else_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, endif_block);
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = then_expr_result;
     incoming_values[1] = else_expr_result;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = after_then_block;
     incoming_blocks[1] = after_else_block;
 
-    IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
+    IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
     return ir_expr_wrap(irb, scope, phi, result_loc);
 }
 
-static IrInstruction *ir_gen_prefix_op_id_lval(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
+static IrInstSrc *ir_gen_prefix_op_id_lval(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
     assert(node->type == NodeTypePrefixOpExpr);
     AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
 
-    IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
-    if (value == irb->codegen->invalid_instruction)
+    IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
+    if (value == irb->codegen->invalid_inst_src)
         return value;
 
     return ir_build_un_op(irb, scope, node, op_id, value);
 }
 
-static IrInstruction *ir_gen_prefix_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
+static IrInstSrc *ir_gen_prefix_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
     return ir_gen_prefix_op_id_lval(irb, scope, node, op_id, LValNone);
 }
 
-static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc) {
-    if (inst == irb->codegen->invalid_instruction) return inst;
-    ir_build_end_expr(irb, scope, inst->source_node, inst, result_loc);
+static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc) {
+    if (inst == irb->codegen->invalid_inst_src) return inst;
+    ir_build_end_expr(irb, scope, inst->base.source_node, inst, result_loc);
     return inst;
 }
 
-static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval,
+static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval,
         ResultLoc *result_loc)
 {
     // This logic must be kept in sync with
     // [STMT_EXPR_TEST_THING] <--- (search this token)
-    if (value == irb->codegen->invalid_instruction ||
+    if (value == irb->codegen->invalid_inst_src ||
         instr_is_unreachable(value) ||
-        value->source_node->type == NodeTypeDefer ||
-        value->id == IrInstructionIdDeclVarSrc)
+        value->base.source_node->type == NodeTypeDefer ||
+        value->id == IrInstSrcIdDeclVar)
     {
         return value;
     }
@@ -6595,7 +7626,7 @@ static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *
     if (lval == LValPtr) {
         // We needed a pointer to a value, but we got a value. So we create
         // an instruction which just makes a pointer of it.
-        return ir_build_ref(irb, scope, value->source_node, value, false, false);
+        return ir_build_ref_src(irb, scope, value->base.source_node, value, false, false);
     } else if (result_loc != nullptr) {
         return ir_expr_wrap(irb, scope, value, result_loc);
     } else {
@@ -6618,7 +7649,7 @@ static PtrLen star_token_to_ptr_len(TokenId token_id) {
     }
 }
 
-static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_pointer_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypePointerType);
 
     PtrLen ptr_len = star_token_to_ptr_len(node->data.pointer_type.star_token->id);
@@ -6630,26 +7661,26 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
     AstNode *expr_node = node->data.pointer_type.op_expr;
     AstNode *align_expr = node->data.pointer_type.align_expr;
 
-    IrInstruction *sentinel;
+    IrInstSrc *sentinel;
     if (sentinel_expr != nullptr) {
         sentinel = ir_gen_node(irb, sentinel_expr, scope);
-        if (sentinel == irb->codegen->invalid_instruction)
+        if (sentinel == irb->codegen->invalid_inst_src)
             return sentinel;
     } else {
         sentinel = nullptr;
     }
 
-    IrInstruction *align_value;
+    IrInstSrc *align_value;
     if (align_expr != nullptr) {
         align_value = ir_gen_node(irb, align_expr, scope);
-        if (align_value == irb->codegen->invalid_instruction)
+        if (align_value == irb->codegen->invalid_inst_src)
             return align_value;
     } else {
         align_value = nullptr;
     }
 
-    IrInstruction *child_type = ir_gen_node(irb, expr_node, scope);
-    if (child_type == irb->codegen->invalid_instruction)
+    IrInstSrc *child_type = ir_gen_node(irb, expr_node, scope);
+    if (child_type == irb->codegen->invalid_inst_src)
         return child_type;
 
     uint32_t bit_offset_start = 0;
@@ -6659,7 +7690,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
             bigint_append_buf(val_buf, node->data.pointer_type.bit_offset_start, 10);
             exec_add_error_node(irb->codegen, irb->exec, node,
                     buf_sprintf("value %s too large for u32 bit offset", buf_ptr(val_buf)));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         bit_offset_start = bigint_as_u32(node->data.pointer_type.bit_offset_start);
     }
@@ -6671,7 +7702,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
             bigint_append_buf(val_buf, node->data.pointer_type.host_int_bytes, 10);
             exec_add_error_node(irb->codegen, irb->exec, node,
                     buf_sprintf("value %s too large for u32 byte count", buf_ptr(val_buf)));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         host_int_bytes = bigint_as_u32(node->data.pointer_type.host_int_bytes);
     }
@@ -6679,43 +7710,43 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
     if (host_int_bytes != 0 && bit_offset_start >= host_int_bytes * 8) {
         exec_add_error_node(irb->codegen, irb->exec, node,
                 buf_sprintf("bit offset starts after end of host integer"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     return ir_build_ptr_type(irb, scope, node, child_type, is_const, is_volatile,
             ptr_len, sentinel, align_value, bit_offset_start, host_int_bytes, is_allow_zero);
 }
 
-static IrInstruction *ir_gen_catch_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node,
+static IrInstSrc *ir_gen_catch_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
         AstNode *expr_node, LVal lval, ResultLoc *result_loc)
 {
-    IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
-    if (err_union_ptr == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
+    if (err_union_ptr == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, scope, source_node, err_union_ptr, true, false);
-    if (payload_ptr == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, scope, source_node, err_union_ptr, true, false);
+    if (payload_ptr == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     if (lval == LValPtr)
         return payload_ptr;
 
-    IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
+    IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
     return ir_expr_wrap(irb, scope, load_ptr, result_loc);
 }
 
-static IrInstruction *ir_gen_bool_not(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypePrefixOpExpr);
     AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
 
-    IrInstruction *value = ir_gen_node(irb, expr_node, scope);
-    if (value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *value = ir_gen_node(irb, expr_node, scope);
+    if (value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     return ir_build_bool_not(irb, scope, node, value);
 }
 
-static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_prefix_op_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypePrefixOpExpr);
@@ -6743,12 +7774,12 @@ static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNod
     zig_unreachable();
 }
 
-static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
-    IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
+static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
+    IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
     LVal lval, ResultLoc *parent_result_loc)
 {
-    IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
-    IrInstruction *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
+    IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
+    IrInstSrc *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
             field_name, true);
 
     ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
@@ -6757,18 +7788,18 @@ static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNo
     ir_ref_instruction(field_ptr, irb->current_basic_block);
     ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
 
-    IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
+    IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
             &result_loc_inst->base);
-    if (expr_value == irb->codegen->invalid_instruction)
+    if (expr_value == irb->codegen->invalid_inst_src)
         return expr_value;
 
-    IrInstruction *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
+    IrInstSrc *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
             field_name, field_ptr, container_ptr);
 
     return ir_lval_wrap(irb, scope, init_union, lval, parent_result_loc);
 }
 
-static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_container_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *parent_result_loc)
 {
     assert(node->type == NodeTypeContainerInitExpr);
@@ -6780,42 +7811,42 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
     ResultLoc *child_result_loc;
     AstNode *init_array_type_source_node;
     if (container_init_expr->type != nullptr) {
-        IrInstruction *container_type;
+        IrInstSrc *container_type;
         if (container_init_expr->type->type == NodeTypeInferredArrayType) {
             if (kind == ContainerInitKindStruct) {
                 add_node_error(irb->codegen, container_init_expr->type,
                         buf_sprintf("initializing array with struct syntax"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
-            IrInstruction *sentinel;
+            IrInstSrc *sentinel;
             if (container_init_expr->type->data.inferred_array_type.sentinel != nullptr) {
                 sentinel = ir_gen_node(irb, container_init_expr->type->data.inferred_array_type.sentinel, scope);
-                if (sentinel == irb->codegen->invalid_instruction)
+                if (sentinel == irb->codegen->invalid_inst_src)
                     return sentinel;
             } else {
                 sentinel = nullptr;
             }
 
-            IrInstruction *elem_type = ir_gen_node(irb,
+            IrInstSrc *elem_type = ir_gen_node(irb,
                     container_init_expr->type->data.inferred_array_type.child_type, scope);
-            if (elem_type == irb->codegen->invalid_instruction)
+            if (elem_type == irb->codegen->invalid_inst_src)
                 return elem_type;
             size_t item_count = container_init_expr->entries.length;
-            IrInstruction *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
+            IrInstSrc *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
             container_type = ir_build_array_type(irb, scope, node, item_count_inst, sentinel, elem_type);
         } else {
             container_type = ir_gen_node(irb, container_init_expr->type, scope);
-            if (container_type == irb->codegen->invalid_instruction)
+            if (container_type == irb->codegen->invalid_inst_src)
                 return container_type;
         }
 
         result_loc_cast = ir_build_cast_result_loc(irb, container_type, parent_result_loc);
         child_result_loc = &result_loc_cast->base;
-        init_array_type_source_node = container_type->source_node;
+        init_array_type_source_node = container_type->base.source_node;
     } else {
         child_result_loc = parent_result_loc;
         if (parent_result_loc->source_instruction != nullptr) {
-            init_array_type_source_node = parent_result_loc->source_instruction->source_node;
+            init_array_type_source_node = parent_result_loc->source_instruction->base.source_node;
         } else {
             init_array_type_source_node = node;
         }
@@ -6823,11 +7854,11 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
 
     switch (kind) {
         case ContainerInitKindStruct: {
-            IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
+            IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
                     nullptr);
 
             size_t field_count = container_init_expr->entries.length;
-            IrInstructionContainerInitFieldsField *fields = allocate<IrInstructionContainerInitFieldsField>(field_count);
+            IrInstSrcContainerInitFieldsField *fields = allocate<IrInstSrcContainerInitFieldsField>(field_count);
             for (size_t i = 0; i < field_count; i += 1) {
                 AstNode *entry_node = container_init_expr->entries.at(i);
                 assert(entry_node->type == NodeTypeStructValueField);
@@ -6835,7 +7866,7 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
                 Buf *name = entry_node->data.struct_val_field.name;
                 AstNode *expr_node = entry_node->data.struct_val_field.expr;
 
-                IrInstruction *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
+                IrInstSrc *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
                 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
                 result_loc_inst->base.id = ResultLocIdInstruction;
                 result_loc_inst->base.source_instruction = field_ptr;
@@ -6843,16 +7874,16 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
                 ir_ref_instruction(field_ptr, irb->current_basic_block);
                 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
 
-                IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
+                IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
                         &result_loc_inst->base);
-                if (expr_value == irb->codegen->invalid_instruction)
+                if (expr_value == irb->codegen->invalid_inst_src)
                     return expr_value;
 
                 fields[i].name = name;
                 fields[i].source_node = entry_node;
                 fields[i].result_loc = field_ptr;
             }
-            IrInstruction *result = ir_build_container_init_fields(irb, scope, node, field_count,
+            IrInstSrc *result = ir_build_container_init_fields(irb, scope, node, field_count,
                     fields, container_ptr);
 
             if (result_loc_cast != nullptr) {
@@ -6863,15 +7894,15 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
         case ContainerInitKindArray: {
             size_t item_count = container_init_expr->entries.length;
 
-            IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
+            IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
                     nullptr);
 
-            IrInstruction **result_locs = allocate<IrInstruction *>(item_count);
+            IrInstSrc **result_locs = allocate<IrInstSrc *>(item_count);
             for (size_t i = 0; i < item_count; i += 1) {
                 AstNode *expr_node = container_init_expr->entries.at(i);
 
-                IrInstruction *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
-                IrInstruction *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
+                IrInstSrc *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
+                IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
                         elem_index, false, PtrLenSingle, init_array_type_source_node);
                 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
                 result_loc_inst->base.id = ResultLocIdInstruction;
@@ -6880,14 +7911,14 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
                 ir_ref_instruction(elem_ptr, irb->current_basic_block);
                 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
 
-                IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
+                IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
                         &result_loc_inst->base);
-                if (expr_value == irb->codegen->invalid_instruction)
+                if (expr_value == irb->codegen->invalid_inst_src)
                     return expr_value;
 
                 result_locs[i] = elem_ptr;
             }
-            IrInstruction *result = ir_build_container_init_list(irb, scope, node, item_count,
+            IrInstSrc *result = ir_build_container_init_list(irb, scope, node, item_count,
                     result_locs, container_ptr, init_array_type_source_node);
             if (result_loc_cast != nullptr) {
                 result = ir_build_implicit_cast(irb, scope, node, result, result_loc_cast);
@@ -6898,19 +7929,19 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
     zig_unreachable();
 }
 
-static ResultLocVar *ir_build_var_result_loc(IrBuilder *irb, IrInstruction *alloca, ZigVar *var) {
+static ResultLocVar *ir_build_var_result_loc(IrBuilderSrc *irb, IrInstSrc *alloca, ZigVar *var) {
     ResultLocVar *result_loc_var = allocate<ResultLocVar>(1);
     result_loc_var->base.id = ResultLocIdVar;
     result_loc_var->base.source_instruction = alloca;
     result_loc_var->base.allow_write_through_const = true;
     result_loc_var->var = var;
 
-    ir_build_reset_result(irb, alloca->scope, alloca->source_node, &result_loc_var->base);
+    ir_build_reset_result(irb, alloca->base.scope, alloca->base.source_node, &result_loc_var->base);
 
     return result_loc_var;
 }
 
-static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
+static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
         ResultLoc *parent_result_loc)
 {
     ResultLocCast *result_loc_cast = allocate<ResultLocCast>(1);
@@ -6920,37 +7951,37 @@ static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *de
     ir_ref_instruction(dest_type, irb->current_basic_block);
     result_loc_cast->parent = parent_result_loc;
 
-    ir_build_reset_result(irb, dest_type->scope, dest_type->source_node, &result_loc_cast->base);
+    ir_build_reset_result(irb, dest_type->base.scope, dest_type->base.source_node, &result_loc_cast->base);
 
     return result_loc_cast;
 }
 
-static void build_decl_var_and_init(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
-        IrInstruction *init, const char *name_hint, IrInstruction *is_comptime)
+static void build_decl_var_and_init(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
+        IrInstSrc *init, const char *name_hint, IrInstSrc *is_comptime)
 {
-    IrInstruction *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
+    IrInstSrc *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
     ResultLocVar *var_result_loc = ir_build_var_result_loc(irb, alloca, var);
     ir_build_end_expr(irb, scope, source_node, init, &var_result_loc->base);
     ir_build_var_decl_src(irb, scope, source_node, var, nullptr, alloca);
 }
 
-static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_var_decl(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeVariableDeclaration);
 
     AstNodeVariableDeclaration *variable_declaration = &node->data.variable_declaration;
 
     if (buf_eql_str(variable_declaration->symbol, "_")) {
         add_node_error(irb->codegen, node, buf_sprintf("`_` is not a declarable symbol"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
     // Used for the type expr and the align expr
     Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
 
-    IrInstruction *type_instruction;
+    IrInstSrc *type_instruction;
     if (variable_declaration->type != nullptr) {
         type_instruction = ir_gen_node(irb, variable_declaration->type, comptime_scope);
-        if (type_instruction == irb->codegen->invalid_instruction)
+        if (type_instruction == irb->codegen->invalid_inst_src)
             return type_instruction;
     } else {
         type_instruction = nullptr;
@@ -6961,22 +7992,22 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
     bool is_extern = variable_declaration->is_extern;
 
     bool is_comptime_scalar = ir_should_inline(irb->exec, scope) || variable_declaration->is_comptime;
-    IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
+    IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
     ZigVar *var = ir_create_var(irb, node, scope, variable_declaration->symbol,
         is_const, is_const, is_shadowable, is_comptime);
-    // we detect IrInstructionIdDeclVarSrc in gen_block to make sure the next node
+    // we detect IrInstSrcDeclVar in gen_block to make sure the next node
     // is inside var->child_scope
 
     if (!is_extern && !variable_declaration->expr) {
         var->var_type = irb->codegen->builtin_types.entry_invalid;
         add_node_error(irb->codegen, node, buf_sprintf("variables must be initialized"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
-    IrInstruction *align_value = nullptr;
+    IrInstSrc *align_value = nullptr;
     if (variable_declaration->align_expr != nullptr) {
         align_value = ir_gen_node(irb, variable_declaration->align_expr, comptime_scope);
-        if (align_value == irb->codegen->invalid_instruction)
+        if (align_value == irb->codegen->invalid_inst_src)
             return align_value;
     }
 
@@ -6988,7 +8019,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
     // Parser should ensure that this never happens
     assert(variable_declaration->threadlocal_tok == nullptr);
 
-    IrInstruction *alloca = ir_build_alloca_src(irb, scope, node, align_value,
+    IrInstSrc *alloca = ir_build_alloca_src(irb, scope, node, align_value,
             buf_ptr(variable_declaration->symbol), is_comptime);
 
     // Create a result location for the initialization expression.
@@ -7006,19 +8037,19 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
     Scope *init_scope = is_comptime_scalar ?
         create_comptime_scope(irb->codegen, variable_declaration->expr, scope) : scope;
 
-    // Temporarily set the name of the IrExecutable to the VariableDeclaration
+    // Temporarily set the name of the IrExecutableSrc to the VariableDeclaration
     // so that the struct or enum from the init expression inherits the name.
     Buf *old_exec_name = irb->exec->name;
     irb->exec->name = variable_declaration->symbol;
-    IrInstruction *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
+    IrInstSrc *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
             LValNone, init_result_loc);
     irb->exec->name = old_exec_name;
 
-    if (init_value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    if (init_value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     if (result_loc_cast != nullptr) {
-        IrInstruction *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->source_node,
+        IrInstSrc *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->base.source_node,
                 init_value, result_loc_cast);
         ir_build_end_expr(irb, scope, node, implicit_cast, &result_loc_var->base);
     }
@@ -7026,7 +8057,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
     return ir_build_var_decl_src(irb, scope, node, var, align_value, alloca);
 }
 
-static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_while_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeWhileExpr);
@@ -7034,15 +8065,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
     AstNode *continue_expr_node = node->data.while_expr.continue_expr;
     AstNode *else_node = node->data.while_expr.else_node;
 
-    IrBasicBlock *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
-    IrBasicBlock *body_block = ir_create_basic_block(irb, scope, "WhileBody");
-    IrBasicBlock *continue_block = continue_expr_node ?
+    IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
+    IrBasicBlockSrc *body_block = ir_create_basic_block(irb, scope, "WhileBody");
+    IrBasicBlockSrc *continue_block = continue_expr_node ?
         ir_create_basic_block(irb, scope, "WhileContinue") : cond_block;
-    IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
-    IrBasicBlock *else_block = else_node ?
+    IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
+    IrBasicBlockSrc *else_block = else_node ?
         ir_create_basic_block(irb, scope, "WhileElse") : end_block;
 
-    IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node,
+    IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node,
         ir_should_inline(irb->exec, scope) || node->data.while_expr.is_inline);
     ir_build_br(irb, scope, node, cond_block, is_comptime);
 
@@ -7063,15 +8094,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         } else {
             payload_scope = subexpr_scope;
         }
-        IrInstruction *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
+        IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
                 LValPtr, nullptr);
-        if (err_val_ptr == irb->codegen->invalid_instruction)
+        if (err_val_ptr == irb->codegen->invalid_inst_src)
             return err_val_ptr;
-        IrInstruction *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
+        IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
                 true, false);
-        IrBasicBlock *after_cond_block = irb->current_basic_block;
-        IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
-        IrInstruction *cond_br_inst;
+        IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
+        IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
+        IrInstSrc *cond_br_inst;
         if (!instr_is_unreachable(is_err)) {
             cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_err,
                         else_block, body_block, is_comptime);
@@ -7086,15 +8117,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
 
         ir_set_cursor_at_end_and_append_block(irb, body_block);
         if (var_symbol) {
-            IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, payload_scope, symbol_node,
+            IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, payload_scope, symbol_node,
                     err_val_ptr, false, false);
-            IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
-                ir_build_ref(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
+            IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
+                ir_build_ref_src(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
             ir_build_var_decl_src(irb, payload_scope, symbol_node, payload_var, nullptr, var_ptr);
         }
 
-        ZigList<IrInstruction *> incoming_values = {0};
-        ZigList<IrBasicBlock *> incoming_blocks = {0};
+        ZigList<IrInstSrc *> incoming_values = {0};
+        ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
 
         ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, payload_scope);
         loop_scope->break_block = end_block;
@@ -7108,8 +8139,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         // Note the body block of the loop is not the place that lval and result_loc are used -
         // it's actually in break statements, handled similarly to return statements.
         // That is why we set those values in loop_scope above and not in this ir_gen_node call.
-        IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
-        if (body_result == irb->codegen->invalid_instruction)
+        IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
+        if (body_result == irb->codegen->invalid_inst_src)
             return body_result;
 
         if (!instr_is_unreachable(body_result)) {
@@ -7119,8 +8150,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
 
         if (continue_expr_node) {
             ir_set_cursor_at_end_and_append_block(irb, continue_block);
-            IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
-            if (expr_result == irb->codegen->invalid_instruction)
+            IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
+            if (expr_result == irb->codegen->invalid_inst_src)
                 return expr_result;
             if (!instr_is_unreachable(expr_result)) {
                 ir_mark_gen(ir_build_check_statement_is_void(irb, payload_scope, continue_expr_node, expr_result));
@@ -7136,7 +8167,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         ZigVar *err_var = ir_create_var(irb, err_symbol_node, scope, err_symbol,
                 true, false, false, is_comptime);
         Scope *err_scope = err_var->child_scope;
-        IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, err_symbol_node, err_val_ptr);
+        IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, err_symbol_node, err_val_ptr);
         ir_build_var_decl_src(irb, err_scope, symbol_node, err_var, nullptr, err_ptr);
 
         if (peer_parent->peers.length != 0) {
@@ -7144,12 +8175,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         }
         ResultLocPeer *peer_result = create_peer_result(peer_parent);
         peer_parent->peers.append(peer_result);
-        IrInstruction *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
-        if (else_result == irb->codegen->invalid_instruction)
+        IrInstSrc *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
+        if (else_result == irb->codegen->invalid_inst_src)
             return else_result;
         if (!instr_is_unreachable(else_result))
             ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
-        IrBasicBlock *after_else_block = irb->current_basic_block;
+        IrBasicBlockSrc *after_else_block = irb->current_basic_block;
         ir_set_cursor_at_end_and_append_block(irb, end_block);
         if (else_result) {
             incoming_blocks.append(after_else_block);
@@ -7162,7 +8193,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             peer_parent->peers.last()->next_bb = end_block;
         }
 
-        IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
+        IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
                 incoming_blocks.items, incoming_values.items, peer_parent);
         return ir_expr_wrap(irb, scope, phi, result_loc);
     } else if (var_symbol != nullptr) {
@@ -7174,15 +8205,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         ZigVar *payload_var = ir_create_var(irb, symbol_node, subexpr_scope, var_symbol,
                 true, false, false, is_comptime);
         Scope *child_scope = payload_var->child_scope;
-        IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
+        IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
                 LValPtr, nullptr);
-        if (maybe_val_ptr == irb->codegen->invalid_instruction)
+        if (maybe_val_ptr == irb->codegen->invalid_inst_src)
             return maybe_val_ptr;
-        IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
-        IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node->data.while_expr.condition, maybe_val);
-        IrBasicBlock *after_cond_block = irb->current_basic_block;
-        IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
-        IrInstruction *cond_br_inst;
+        IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
+        IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node->data.while_expr.condition, maybe_val);
+        IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
+        IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
+        IrInstSrc *cond_br_inst;
         if (!instr_is_unreachable(is_non_null)) {
             cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_non_null,
                         body_block, else_block, is_comptime);
@@ -7196,13 +8227,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
                 is_comptime);
 
         ir_set_cursor_at_end_and_append_block(irb, body_block);
-        IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
-        IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
-            ir_build_ref(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
+        IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
+        IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
+            ir_build_ref_src(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
         ir_build_var_decl_src(irb, child_scope, symbol_node, payload_var, nullptr, var_ptr);
 
-        ZigList<IrInstruction *> incoming_values = {0};
-        ZigList<IrBasicBlock *> incoming_blocks = {0};
+        ZigList<IrInstSrc *> incoming_values = {0};
+        ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
 
         ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
         loop_scope->break_block = end_block;
@@ -7216,8 +8247,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         // Note the body block of the loop is not the place that lval and result_loc are used -
         // it's actually in break statements, handled similarly to return statements.
         // That is why we set those values in loop_scope above and not in this ir_gen_node call.
-        IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
-        if (body_result == irb->codegen->invalid_instruction)
+        IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
+        if (body_result == irb->codegen->invalid_inst_src)
             return body_result;
 
         if (!instr_is_unreachable(body_result)) {
@@ -7227,8 +8258,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
 
         if (continue_expr_node) {
             ir_set_cursor_at_end_and_append_block(irb, continue_block);
-            IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
-            if (expr_result == irb->codegen->invalid_instruction)
+            IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
+            if (expr_result == irb->codegen->invalid_inst_src)
                 return expr_result;
             if (!instr_is_unreachable(expr_result)) {
                 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, continue_expr_node, expr_result));
@@ -7236,7 +8267,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             }
         }
 
-        IrInstruction *else_result = nullptr;
+        IrInstSrc *else_result = nullptr;
         if (else_node) {
             ir_set_cursor_at_end_and_append_block(irb, else_block);
 
@@ -7246,12 +8277,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             ResultLocPeer *peer_result = create_peer_result(peer_parent);
             peer_parent->peers.append(peer_result);
             else_result = ir_gen_node_extra(irb, else_node, scope, lval, &peer_result->base);
-            if (else_result == irb->codegen->invalid_instruction)
+            if (else_result == irb->codegen->invalid_inst_src)
                 return else_result;
             if (!instr_is_unreachable(else_result))
                 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
         }
-        IrBasicBlock *after_else_block = irb->current_basic_block;
+        IrBasicBlockSrc *after_else_block = irb->current_basic_block;
         ir_set_cursor_at_end_and_append_block(irb, end_block);
         if (else_result) {
             incoming_blocks.append(after_else_block);
@@ -7264,17 +8295,17 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             peer_parent->peers.last()->next_bb = end_block;
         }
 
-        IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
+        IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
                 incoming_blocks.items, incoming_values.items, peer_parent);
         return ir_expr_wrap(irb, scope, phi, result_loc);
     } else {
         ir_set_cursor_at_end_and_append_block(irb, cond_block);
-        IrInstruction *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
-        if (cond_val == irb->codegen->invalid_instruction)
+        IrInstSrc *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
+        if (cond_val == irb->codegen->invalid_inst_src)
             return cond_val;
-        IrBasicBlock *after_cond_block = irb->current_basic_block;
-        IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
-        IrInstruction *cond_br_inst;
+        IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
+        IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
+        IrInstSrc *cond_br_inst;
         if (!instr_is_unreachable(cond_val)) {
             cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, cond_val,
                         body_block, else_block, is_comptime);
@@ -7288,8 +8319,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
                 is_comptime);
         ir_set_cursor_at_end_and_append_block(irb, body_block);
 
-        ZigList<IrInstruction *> incoming_values = {0};
-        ZigList<IrBasicBlock *> incoming_blocks = {0};
+        ZigList<IrInstSrc *> incoming_values = {0};
+        ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
 
         Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
 
@@ -7305,8 +8336,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
         // Note the body block of the loop is not the place that lval and result_loc are used -
         // it's actually in break statements, handled similarly to return statements.
         // That is why we set those values in loop_scope above and not in this ir_gen_node call.
-        IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
-        if (body_result == irb->codegen->invalid_instruction)
+        IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
+        if (body_result == irb->codegen->invalid_inst_src)
             return body_result;
 
         if (!instr_is_unreachable(body_result)) {
@@ -7316,8 +8347,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
 
         if (continue_expr_node) {
             ir_set_cursor_at_end_and_append_block(irb, continue_block);
-            IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
-            if (expr_result == irb->codegen->invalid_instruction)
+            IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
+            if (expr_result == irb->codegen->invalid_inst_src)
                 return expr_result;
             if (!instr_is_unreachable(expr_result)) {
                 ir_mark_gen(ir_build_check_statement_is_void(irb, scope, continue_expr_node, expr_result));
@@ -7325,7 +8356,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             }
         }
 
-        IrInstruction *else_result = nullptr;
+        IrInstSrc *else_result = nullptr;
         if (else_node) {
             ir_set_cursor_at_end_and_append_block(irb, else_block);
 
@@ -7336,12 +8367,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             peer_parent->peers.append(peer_result);
 
             else_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_result->base);
-            if (else_result == irb->codegen->invalid_instruction)
+            if (else_result == irb->codegen->invalid_inst_src)
                 return else_result;
             if (!instr_is_unreachable(else_result))
                 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
         }
-        IrBasicBlock *after_else_block = irb->current_basic_block;
+        IrBasicBlockSrc *after_else_block = irb->current_basic_block;
         ir_set_cursor_at_end_and_append_block(irb, end_block);
         if (else_result) {
             incoming_blocks.append(after_else_block);
@@ -7354,13 +8385,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
             peer_parent->peers.last()->next_bb = end_block;
         }
 
-        IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
+        IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
                 incoming_blocks.items, incoming_values.items, peer_parent);
         return ir_expr_wrap(irb, scope, phi, result_loc);
     }
 }
 
-static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_for_expr(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeForExpr);
@@ -7373,17 +8404,17 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
 
     if (!elem_node) {
         add_node_error(irb->codegen, node, buf_sprintf("for loop expression missing element parameter"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
     assert(elem_node->type == NodeTypeSymbol);
 
     ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, parent_scope);
 
-    IrInstruction *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
-    if (array_val_ptr == irb->codegen->invalid_instruction)
+    IrInstSrc *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
+    if (array_val_ptr == irb->codegen->invalid_inst_src)
         return array_val_ptr;
 
-    IrInstruction *is_comptime = ir_build_const_bool(irb, parent_scope, node,
+    IrInstSrc *is_comptime = ir_build_const_bool(irb, parent_scope, node,
         ir_should_inline(irb->exec, parent_scope) || node->data.for_expr.is_inline);
 
     AstNode *index_var_source_node;
@@ -7400,50 +8431,50 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
         index_var_name = "i";
     }
 
-    IrInstruction *zero = ir_build_const_usize(irb, parent_scope, node, 0);
+    IrInstSrc *zero = ir_build_const_usize(irb, parent_scope, node, 0);
     build_decl_var_and_init(irb, parent_scope, index_var_source_node, index_var, zero, index_var_name, is_comptime);
     parent_scope = index_var->child_scope;
 
-    IrInstruction *one = ir_build_const_usize(irb, parent_scope, node, 1);
-    IrInstruction *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
+    IrInstSrc *one = ir_build_const_usize(irb, parent_scope, node, 1);
+    IrInstSrc *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
 
 
-    IrBasicBlock *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
-    IrBasicBlock *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
-    IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
-    IrBasicBlock *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
-    IrBasicBlock *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
+    IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
+    IrBasicBlockSrc *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
+    IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
+    IrBasicBlockSrc *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
+    IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
 
     Buf *len_field_name = buf_create_from_str("len");
-    IrInstruction *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
-    IrInstruction *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
+    IrInstSrc *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
+    IrInstSrc *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
     ir_build_br(irb, parent_scope, node, cond_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, cond_block);
-    IrInstruction *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
-    IrInstruction *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
-    IrBasicBlock *after_cond_block = irb->current_basic_block;
-    IrInstruction *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
-    IrInstruction *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
+    IrInstSrc *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
+    IrInstSrc *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
+    IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
+    IrInstSrc *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
+    IrInstSrc *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
                 body_block, else_block, is_comptime));
 
     ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, result_loc, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, body_block);
     Scope *elem_ptr_scope = node->data.for_expr.elem_is_ptr ? parent_scope : &spill_scope->base;
-    IrInstruction *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
+    IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
             PtrLenSingle, nullptr);
     // TODO make it an error to write to element variable or i variable.
     Buf *elem_var_name = elem_node->data.symbol_expr.symbol;
     ZigVar *elem_var = ir_create_var(irb, elem_node, parent_scope, elem_var_name, true, false, false, is_comptime);
     Scope *child_scope = elem_var->child_scope;
 
-    IrInstruction *var_ptr = node->data.for_expr.elem_is_ptr ?
-        ir_build_ref(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
+    IrInstSrc *var_ptr = node->data.for_expr.elem_is_ptr ?
+        ir_build_ref_src(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
     ir_build_var_decl_src(irb, parent_scope, elem_node, elem_var, nullptr, var_ptr);
 
-    ZigList<IrInstruction *> incoming_values = {0};
-    ZigList<IrBasicBlock *> incoming_blocks = {0};
+    ZigList<IrInstSrc *> incoming_values = {0};
+    ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
     ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
     loop_scope->break_block = end_block;
     loop_scope->continue_block = continue_block;
@@ -7457,9 +8488,9 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
     // Note the body block of the loop is not the place that lval and result_loc are used -
     // it's actually in break statements, handled similarly to return statements.
     // That is why we set those values in loop_scope above and not in this ir_gen_node call.
-    IrInstruction *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
-    if (body_result == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
+    if (body_result == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     if (!instr_is_unreachable(body_result)) {
         ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.for_expr.body, body_result));
@@ -7467,11 +8498,11 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
     }
 
     ir_set_cursor_at_end_and_append_block(irb, continue_block);
-    IrInstruction *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
+    IrInstSrc *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
     ir_build_store_ptr(irb, child_scope, node, index_ptr, new_index_val)->allow_write_through_const = true;
     ir_build_br(irb, child_scope, node, cond_block, is_comptime);
 
-    IrInstruction *else_result = nullptr;
+    IrInstSrc *else_result = nullptr;
     if (else_node) {
         ir_set_cursor_at_end_and_append_block(irb, else_block);
 
@@ -7481,12 +8512,12 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
         ResultLocPeer *peer_result = create_peer_result(peer_parent);
         peer_parent->peers.append(peer_result);
         else_result = ir_gen_node_extra(irb, else_node, parent_scope, LValNone, &peer_result->base);
-        if (else_result == irb->codegen->invalid_instruction)
+        if (else_result == irb->codegen->invalid_inst_src)
             return else_result;
         if (!instr_is_unreachable(else_result))
             ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
     }
-    IrBasicBlock *after_else_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_else_block = irb->current_basic_block;
     ir_set_cursor_at_end_and_append_block(irb, end_block);
 
     if (else_result) {
@@ -7500,29 +8531,29 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
         peer_parent->peers.last()->next_bb = end_block;
     }
 
-    IrInstruction *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
+    IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
             incoming_blocks.items, incoming_values.items, peer_parent);
     return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_bool_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_bool_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeBoolLiteral);
     return ir_build_const_bool(irb, scope, node, node->data.bool_literal.value);
 }
 
-static IrInstruction *ir_gen_enum_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeEnumLiteral);
     Buf *name = &node->data.enum_literal.identifier->data.str_lit.str;
     return ir_build_const_enum_literal(irb, scope, node, name);
 }
 
-static IrInstruction *ir_gen_string_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_string_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeStringLiteral);
 
     return ir_build_const_str_lit(irb, scope, node, node->data.string_literal.buf);
 }
 
-static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeArrayType);
 
     AstNode *size_node = node->data.array_type.size;
@@ -7535,10 +8566,10 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
 
     Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
 
-    IrInstruction *sentinel;
+    IrInstSrc *sentinel;
     if (sentinel_expr != nullptr) {
         sentinel = ir_gen_node(irb, sentinel_expr, comptime_scope);
-        if (sentinel == irb->codegen->invalid_instruction)
+        if (sentinel == irb->codegen->invalid_inst_src)
             return sentinel;
     } else {
         sentinel = nullptr;
@@ -7547,42 +8578,42 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
     if (size_node) {
         if (is_const) {
             add_node_error(irb->codegen, node, buf_create_from_str("const qualifier invalid on array type"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         if (is_volatile) {
             add_node_error(irb->codegen, node, buf_create_from_str("volatile qualifier invalid on array type"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         if (is_allow_zero) {
             add_node_error(irb->codegen, node, buf_create_from_str("allowzero qualifier invalid on array type"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         if (align_expr != nullptr) {
             add_node_error(irb->codegen, node, buf_create_from_str("align qualifier invalid on array type"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
 
-        IrInstruction *size_value = ir_gen_node(irb, size_node, comptime_scope);
-        if (size_value == irb->codegen->invalid_instruction)
+        IrInstSrc *size_value = ir_gen_node(irb, size_node, comptime_scope);
+        if (size_value == irb->codegen->invalid_inst_src)
             return size_value;
 
-        IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
-        if (child_type == irb->codegen->invalid_instruction)
+        IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
+        if (child_type == irb->codegen->invalid_inst_src)
             return child_type;
 
         return ir_build_array_type(irb, scope, node, size_value, sentinel, child_type);
     } else {
-        IrInstruction *align_value;
+        IrInstSrc *align_value;
         if (align_expr != nullptr) {
             align_value = ir_gen_node(irb, align_expr, comptime_scope);
-            if (align_value == irb->codegen->invalid_instruction)
+            if (align_value == irb->codegen->invalid_inst_src)
                 return align_value;
         } else {
             align_value = nullptr;
         }
 
-        IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
-        if (child_type == irb->codegen->invalid_instruction)
+        IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
+        if (child_type == irb->codegen->invalid_inst_src)
             return child_type;
 
         return ir_build_slice_type(irb, scope, node, child_type, is_const, is_volatile, sentinel,
@@ -7590,15 +8621,15 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
     }
 }
 
-static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeAnyFrameType);
 
     AstNode *payload_type_node = node->data.anyframe_type.payload_type;
-    IrInstruction *payload_type_value = nullptr;
+    IrInstSrc *payload_type_value = nullptr;
 
     if (payload_type_node != nullptr) {
         payload_type_value = ir_gen_node(irb, payload_type_node, scope);
-        if (payload_type_value == irb->codegen->invalid_instruction)
+        if (payload_type_value == irb->codegen->invalid_inst_src)
             return payload_type_value;
 
     }
@@ -7606,7 +8637,7 @@ static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode
     return ir_build_anyframe_type(irb, scope, node, payload_type_value);
 }
 
-static IrInstruction *ir_gen_undefined_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_undefined_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeUndefinedLiteral);
     return ir_build_const_undefined(irb, scope, node);
 }
@@ -7723,13 +8754,13 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
     return SIZE_MAX;
 }
 
-static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_asm_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeAsmExpr);
     AstNodeAsmExpr *asm_expr = &node->data.asm_expr;
 
-    IrInstruction *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
-    if (asm_template == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
+    if (asm_template == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
     bool is_volatile = asm_expr->volatile_token != nullptr;
     bool in_fn_scope = (scope_fn_entry(scope) != nullptr);
@@ -7738,7 +8769,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
         if (is_volatile) {
             add_token_error(irb->codegen, node->owner, asm_expr->volatile_token,
                     buf_sprintf("volatile is meaningless on global assembly"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
 
         if (asm_expr->output_list.length != 0 || asm_expr->input_list.length != 0 ||
@@ -7746,34 +8777,34 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
         {
             add_node_error(irb->codegen, node,
                 buf_sprintf("global assembly cannot have inputs, outputs, or clobbers"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
 
         return ir_build_asm_src(irb, scope, node, asm_template, nullptr, nullptr,
                                 nullptr, 0, is_volatile, true);
     }
 
-    IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
-    IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
+    IrInstSrc **input_list = allocate<IrInstSrc *>(asm_expr->input_list.length);
+    IrInstSrc **output_types = allocate<IrInstSrc *>(asm_expr->output_list.length);
     ZigVar **output_vars = allocate<ZigVar *>(asm_expr->output_list.length);
     size_t return_count = 0;
     if (!is_volatile && asm_expr->output_list.length == 0) {
         add_node_error(irb->codegen, node,
                 buf_sprintf("assembly expression with no output must be marked volatile"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
     for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
         AsmOutput *asm_output = asm_expr->output_list.at(i);
         if (asm_output->return_type) {
             return_count += 1;
 
-            IrInstruction *return_type = ir_gen_node(irb, asm_output->return_type, scope);
-            if (return_type == irb->codegen->invalid_instruction)
-                return irb->codegen->invalid_instruction;
+            IrInstSrc *return_type = ir_gen_node(irb, asm_output->return_type, scope);
+            if (return_type == irb->codegen->invalid_inst_src)
+                return irb->codegen->invalid_inst_src;
             if (return_count > 1) {
                 add_node_error(irb->codegen, node,
                         buf_sprintf("inline assembly allows up to one output value"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
             output_types[i] = return_type;
         } else {
@@ -7786,7 +8817,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
             } else {
                 add_node_error(irb->codegen, node,
                         buf_sprintf("use of undeclared identifier '%s'", buf_ptr(variable_name)));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
         }
 
@@ -7796,14 +8827,14 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
                 buf_sprintf("invalid modifier starting output constraint for '%s': '%c', only '=' is supported."
                     " Compiler TODO: see https://github.com/ziglang/zig/issues/215",
                     buf_ptr(asm_output->asm_symbolic_name), modifier));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
     }
     for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
         AsmInput *asm_input = asm_expr->input_list.at(i);
-        IrInstruction *input_value = ir_gen_node(irb, asm_input->expr, scope);
-        if (input_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        IrInstSrc *input_value = ir_gen_node(irb, asm_input->expr, scope);
+        if (input_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
 
         input_list[i] = input_value;
     }
@@ -7812,7 +8843,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
                             output_vars, return_count, is_volatile, false);
 }
 
-static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_if_optional_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeIfOptional);
@@ -7823,24 +8854,24 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
     AstNode *else_node = node->data.test_expr.else_node;
     bool var_is_ptr = node->data.test_expr.var_is_ptr;
 
-    IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
-    if (maybe_val_ptr == irb->codegen->invalid_instruction)
+    IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
+    if (maybe_val_ptr == irb->codegen->invalid_inst_src)
         return maybe_val_ptr;
 
-    IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
-    IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node, maybe_val);
+    IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
+    IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node, maybe_val);
 
-    IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
-    IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
-    IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
+    IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
+    IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
+    IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, scope)) {
         is_comptime = ir_build_const_bool(irb, scope, node, true);
     } else {
         is_comptime = ir_build_test_comptime(irb, scope, node, is_non_null);
     }
-    IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
+    IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
             then_block, else_block, is_comptime);
 
     ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
@@ -7856,48 +8887,48 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
         ZigVar *var = ir_create_var(irb, node, subexpr_scope,
                 var_symbol, is_const, is_const, is_shadowable, is_comptime);
 
-        IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
-        IrInstruction *var_ptr = var_is_ptr ? ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
+        IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
+        IrInstSrc *var_ptr = var_is_ptr ? ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
         ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
         var_scope = var->child_scope;
     } else {
         var_scope = subexpr_scope;
     }
-    IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
+    IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
             &peer_parent->peers.at(0)->base);
-    if (then_expr_result == irb->codegen->invalid_instruction)
+    if (then_expr_result == irb->codegen->invalid_inst_src)
         return then_expr_result;
-    IrBasicBlock *after_then_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_then_block = irb->current_basic_block;
     if (!instr_is_unreachable(then_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, else_block);
-    IrInstruction *else_expr_result;
+    IrInstSrc *else_expr_result;
     if (else_node) {
         else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
-        if (else_expr_result == irb->codegen->invalid_instruction)
+        if (else_expr_result == irb->codegen->invalid_inst_src)
             return else_expr_result;
     } else {
         else_expr_result = ir_build_const_void(irb, scope, node);
         ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
     }
-    IrBasicBlock *after_else_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_else_block = irb->current_basic_block;
     if (!instr_is_unreachable(else_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, endif_block);
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = then_expr_result;
     incoming_values[1] = else_expr_result;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = after_then_block;
     incoming_blocks[1] = after_else_block;
 
-    IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
+    IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
     return ir_expr_wrap(irb, scope, phi, result_loc);
 }
 
-static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_if_err_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeIfErrorExpr);
@@ -7910,20 +8941,20 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
     Buf *var_symbol = node->data.if_err_expr.var_symbol;
     Buf *err_symbol = node->data.if_err_expr.err_symbol;
 
-    IrInstruction *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
-    if (err_val_ptr == irb->codegen->invalid_instruction)
+    IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
+    if (err_val_ptr == irb->codegen->invalid_inst_src)
         return err_val_ptr;
 
-    IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
-    IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
+    IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
+    IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
 
-    IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "TryOk");
-    IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "TryElse");
-    IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
+    IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "TryOk");
+    IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "TryElse");
+    IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
 
     bool force_comptime = ir_should_inline(irb->exec, scope);
-    IrInstruction *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
-    IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
+    IrInstSrc *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
+    IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
 
     ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
             result_loc, is_comptime);
@@ -7934,29 +8965,29 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
     Scope *var_scope;
     if (var_symbol) {
         bool is_shadowable = false;
-        IrInstruction *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
+        IrInstSrc *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
         ZigVar *var = ir_create_var(irb, node, subexpr_scope,
                 var_symbol, var_is_const, var_is_const, is_shadowable, var_is_comptime);
 
-        IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, subexpr_scope, node, err_val_ptr, false, false);
-        IrInstruction *var_ptr = var_is_ptr ?
-            ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
+        IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, subexpr_scope, node, err_val_ptr, false, false);
+        IrInstSrc *var_ptr = var_is_ptr ?
+            ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
         ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
         var_scope = var->child_scope;
     } else {
         var_scope = subexpr_scope;
     }
-    IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
+    IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
             &peer_parent->peers.at(0)->base);
-    if (then_expr_result == irb->codegen->invalid_instruction)
+    if (then_expr_result == irb->codegen->invalid_inst_src)
         return then_expr_result;
-    IrBasicBlock *after_then_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_then_block = irb->current_basic_block;
     if (!instr_is_unreachable(then_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, else_block);
 
-    IrInstruction *else_expr_result;
+    IrInstSrc *else_expr_result;
     if (else_node) {
         Scope *err_var_scope;
         if (err_symbol) {
@@ -7965,40 +8996,40 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
             ZigVar *var = ir_create_var(irb, node, subexpr_scope,
                     err_symbol, is_const, is_const, is_shadowable, is_comptime);
 
-            IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, subexpr_scope, node, err_val_ptr);
+            IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, subexpr_scope, node, err_val_ptr);
             ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, err_ptr);
             err_var_scope = var->child_scope;
         } else {
             err_var_scope = subexpr_scope;
         }
         else_expr_result = ir_gen_node_extra(irb, else_node, err_var_scope, lval, &peer_parent->peers.at(1)->base);
-        if (else_expr_result == irb->codegen->invalid_instruction)
+        if (else_expr_result == irb->codegen->invalid_inst_src)
             return else_expr_result;
     } else {
         else_expr_result = ir_build_const_void(irb, scope, node);
         ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
     }
-    IrBasicBlock *after_else_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_else_block = irb->current_basic_block;
     if (!instr_is_unreachable(else_expr_result))
         ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, endif_block);
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = then_expr_result;
     incoming_values[1] = else_expr_result;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = after_then_block;
     incoming_blocks[1] = after_else_block;
 
-    IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
+    IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
     return ir_expr_wrap(irb, scope, phi, result_loc);
 }
 
-static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
-        IrBasicBlock *end_block, IrInstruction *is_comptime, IrInstruction *var_is_comptime,
-        IrInstruction *target_value_ptr, IrInstruction **prong_values, size_t prong_values_len,
-        ZigList<IrBasicBlock *> *incoming_blocks, ZigList<IrInstruction *> *incoming_values,
-        IrInstructionSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
+static bool ir_gen_switch_prong_expr(IrBuilderSrc *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
+        IrBasicBlockSrc *end_block, IrInstSrc *is_comptime, IrInstSrc *var_is_comptime,
+        IrInstSrc *target_value_ptr, IrInstSrc **prong_values, size_t prong_values_len,
+        ZigList<IrBasicBlockSrc *> *incoming_blocks, ZigList<IrInstSrc *> *incoming_values,
+        IrInstSrcSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
 {
     assert(switch_node->type == NodeTypeSwitchExpr);
     assert(prong_node->type == NodeTypeSwitchProng);
@@ -8016,28 +9047,28 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
         ZigVar *var = ir_create_var(irb, var_symbol_node, scope,
                 var_name, is_const, is_const, is_shadowable, var_is_comptime);
         child_scope = var->child_scope;
-        IrInstruction *var_ptr;
+        IrInstSrc *var_ptr;
         if (out_switch_else_var != nullptr) {
-            IrInstructionSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
+            IrInstSrcSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
                     target_value_ptr);
             *out_switch_else_var = switch_else_var;
-            IrInstruction *payload_ptr = &switch_else_var->base;
-            var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
+            IrInstSrc *payload_ptr = &switch_else_var->base;
+            var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
         } else if (prong_values != nullptr) {
-            IrInstruction *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
+            IrInstSrc *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
                     prong_values, prong_values_len);
-            var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
+            var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
         } else {
             var_ptr = var_is_ptr ?
-                ir_build_ref(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
+                ir_build_ref_src(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
         }
         ir_build_var_decl_src(irb, scope, var_symbol_node, var, nullptr, var_ptr);
     } else {
         child_scope = scope;
     }
 
-    IrInstruction *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
-    if (expr_result == irb->codegen->invalid_instruction)
+    IrInstSrc *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
+    if (expr_result == irb->codegen->invalid_inst_src)
         return false;
     if (!instr_is_unreachable(expr_result))
         ir_mark_gen(ir_build_br(irb, scope, switch_node, end_block, is_comptime));
@@ -8046,25 +9077,25 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
     return true;
 }
 
-static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_switch_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeSwitchExpr);
 
     AstNode *target_node = node->data.switch_expr.expr;
-    IrInstruction *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
-    if (target_value_ptr == irb->codegen->invalid_instruction)
+    IrInstSrc *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
+    if (target_value_ptr == irb->codegen->invalid_inst_src)
         return target_value_ptr;
-    IrInstruction *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
+    IrInstSrc *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
 
-    IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
-    IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
+    IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
+    IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
 
     size_t prong_count = node->data.switch_expr.prongs.length;
-    ZigList<IrInstructionSwitchBrCase> cases = {0};
+    ZigList<IrInstSrcSwitchBrCase> cases = {0};
 
-    IrInstruction *is_comptime;
-    IrInstruction *var_is_comptime;
+    IrInstSrc *is_comptime;
+    IrInstSrc *var_is_comptime;
     if (ir_should_inline(irb->exec, scope)) {
         is_comptime = ir_build_const_bool(irb, scope, node, true);
         var_is_comptime = is_comptime;
@@ -8073,11 +9104,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
         var_is_comptime = ir_build_test_comptime(irb, scope, node, target_value_ptr);
     }
 
-    ZigList<IrInstruction *> incoming_values = {0};
-    ZigList<IrBasicBlock *> incoming_blocks = {0};
-    ZigList<IrInstructionCheckSwitchProngsRange> check_ranges = {0};
+    ZigList<IrInstSrc *> incoming_values = {0};
+    ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
+    ZigList<IrInstSrcCheckSwitchProngsRange> check_ranges = {0};
 
-    IrInstructionSwitchElseVar *switch_else_var = nullptr;
+    IrInstSrcSwitchElseVar *switch_else_var = nullptr;
 
     ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
     peer_parent->base.id = ResultLocIdPeerParent;
@@ -8099,7 +9130,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
         if (prong_node->data.switch_prong.any_items_are_range) {
             ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
-            IrInstruction *ok_bit = nullptr;
+            IrInstSrc *ok_bit = nullptr;
             AstNode *last_item_node = nullptr;
             for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
                 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
@@ -8108,23 +9139,23 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                     AstNode *start_node = item_node->data.switch_range.start;
                     AstNode *end_node = item_node->data.switch_range.end;
 
-                    IrInstruction *start_value = ir_gen_node(irb, start_node, comptime_scope);
-                    if (start_value == irb->codegen->invalid_instruction)
-                        return irb->codegen->invalid_instruction;
+                    IrInstSrc *start_value = ir_gen_node(irb, start_node, comptime_scope);
+                    if (start_value == irb->codegen->invalid_inst_src)
+                        return irb->codegen->invalid_inst_src;
 
-                    IrInstruction *end_value = ir_gen_node(irb, end_node, comptime_scope);
-                    if (end_value == irb->codegen->invalid_instruction)
-                        return irb->codegen->invalid_instruction;
+                    IrInstSrc *end_value = ir_gen_node(irb, end_node, comptime_scope);
+                    if (end_value == irb->codegen->invalid_inst_src)
+                        return irb->codegen->invalid_inst_src;
 
-                    IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
+                    IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
                     check_range->start = start_value;
                     check_range->end = end_value;
 
-                    IrInstruction *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
+                    IrInstSrc *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
                             target_value, start_value, false);
-                    IrInstruction *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
+                    IrInstSrc *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
                             target_value, end_value, false);
-                    IrInstruction *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
+                    IrInstSrc *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
                             lower_range_ok, upper_range_ok, false);
                     if (ok_bit) {
                         ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, both_ok, ok_bit, false);
@@ -8132,15 +9163,15 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                         ok_bit = both_ok;
                     }
                 } else {
-                    IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
-                    if (item_value == irb->codegen->invalid_instruction)
-                        return irb->codegen->invalid_instruction;
+                    IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
+                    if (item_value == irb->codegen->invalid_inst_src)
+                        return irb->codegen->invalid_inst_src;
 
-                    IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
+                    IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
                     check_range->start = item_value;
                     check_range->end = item_value;
 
-                    IrInstruction *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
+                    IrInstSrc *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
                             item_value, target_value, false);
                     if (ok_bit) {
                         ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, cmp_ok, ok_bit, false);
@@ -8150,12 +9181,12 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                 }
             }
 
-            IrBasicBlock *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
-            IrBasicBlock *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
+            IrBasicBlockSrc *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
+            IrBasicBlockSrc *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
 
             assert(ok_bit);
             assert(last_item_node);
-            IrInstruction *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
+            IrInstSrc *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
                         range_block_yes, range_block_no, is_comptime));
             if (peer_parent->base.source_instruction == nullptr) {
                 peer_parent->base.source_instruction = br_inst;
@@ -8170,7 +9201,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0,
                 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
             {
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
 
             ir_set_cursor_at_end_and_append_block(irb, range_block_no);
@@ -8181,7 +9212,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                             buf_sprintf("multiple else prongs in switch expression"));
                     add_error_note(irb->codegen, msg, else_prong,
                             buf_sprintf("previous else prong is here"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
                 else_prong = prong_node;
             } else if (prong_item_count == 1 && 
@@ -8192,7 +9223,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                             buf_sprintf("multiple '_' prongs in switch expression"));
                     add_error_note(irb->codegen, msg, underscore_prong,
                             buf_sprintf("previous '_' prong is here"));
-                    return irb->codegen->invalid_instruction;
+                    return irb->codegen->invalid_inst_src;
                 }
                 underscore_prong = prong_node;
             } else {
@@ -8207,11 +9238,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                 else
                     add_error_note(irb->codegen, msg, underscore_prong,
                             buf_sprintf("'_' prong is here"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
             ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
-            IrBasicBlock *prev_block = irb->current_basic_block;
+            IrBasicBlockSrc *prev_block = irb->current_basic_block;
             if (peer_parent->peers.length > 0) {
                 peer_parent->peers.last()->next_bb = else_block;
             }
@@ -8221,7 +9252,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
                 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
                 &switch_else_var, LValNone, &this_peer_result_loc->base))
             {
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
             ir_set_cursor_at_end(irb, prev_block);
         }
@@ -8240,29 +9271,29 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
 
         ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
 
-        IrBasicBlock *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
-        IrInstruction **items = allocate<IrInstruction *>(prong_item_count);
+        IrBasicBlockSrc *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
+        IrInstSrc **items = allocate<IrInstSrc *>(prong_item_count);
 
         for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
             AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
             assert(item_node->type != NodeTypeSwitchRange);
 
-            IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
-            if (item_value == irb->codegen->invalid_instruction)
-                return irb->codegen->invalid_instruction;
+            IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
+            if (item_value == irb->codegen->invalid_inst_src)
+                return irb->codegen->invalid_inst_src;
 
-            IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
+            IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
             check_range->start = item_value;
             check_range->end = item_value;
 
-            IrInstructionSwitchBrCase *this_case = cases.add_one();
+            IrInstSrcSwitchBrCase *this_case = cases.add_one();
             this_case->value = item_value;
             this_case->block = prong_block;
 
             items[item_i] = item_value;
         }
 
-        IrBasicBlock *prev_block = irb->current_basic_block;
+        IrBasicBlockSrc *prev_block = irb->current_basic_block;
         if (peer_parent->peers.length > 0) {
             peer_parent->peers.last()->next_bb = prong_block;
         }
@@ -8272,21 +9303,21 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
             is_comptime, var_is_comptime, target_value_ptr, items, prong_item_count,
             &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
         {
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
 
         ir_set_cursor_at_end(irb, prev_block);
 
     }
 
-    IrInstruction *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
+    IrInstSrc *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
             check_ranges.items, check_ranges.length, else_prong != nullptr, underscore_prong != nullptr);
 
-    IrInstruction *br_instruction;
+    IrInstSrc *br_instruction;
     if (cases.length == 0) {
         br_instruction = ir_build_br(irb, scope, node, else_block, is_comptime);
     } else {
-        IrInstructionSwitchBr *switch_br = ir_build_switch_br(irb, scope, node, target_value, else_block,
+        IrInstSrcSwitchBr *switch_br = ir_build_switch_br_src(irb, scope, node, target_value, else_block,
                 cases.length, cases.items, is_comptime, switch_prongs_void);
         if (switch_else_var != nullptr) {
             switch_else_var->switch_br = switch_br;
@@ -8314,7 +9345,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
 
     ir_set_cursor_at_end_and_append_block(irb, end_block);
     assert(incoming_blocks.length == incoming_values.length);
-    IrInstruction *result_instruction;
+    IrInstSrc *result_instruction;
     if (incoming_blocks.length == 0) {
         result_instruction = ir_build_const_void(irb, scope, node);
     } else {
@@ -8324,7 +9355,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
     return ir_lval_wrap(irb, scope, result_instruction, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval) {
+static IrInstSrc *ir_gen_comptime(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval) {
     assert(node->type == NodeTypeCompTime);
 
     Scope *child_scope = create_comptime_scope(irb->codegen, node, parent_scope);
@@ -8332,28 +9363,28 @@ static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNo
     return ir_gen_node_extra(irb, node->data.comptime_expr.expr, child_scope, lval, nullptr);
 }
 
-static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
-    IrInstruction *is_comptime;
+static IrInstSrc *ir_gen_return_from_block(IrBuilderSrc *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, break_scope)) {
         is_comptime = ir_build_const_bool(irb, break_scope, node, true);
     } else {
         is_comptime = block_scope->is_comptime;
     }
 
-    IrInstruction *result_value;
+    IrInstSrc *result_value;
     if (node->data.break_expr.expr) {
         ResultLocPeer *peer_result = create_peer_result(block_scope->peer_parent);
         block_scope->peer_parent->peers.append(peer_result);
 
         result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope, block_scope->lval,
                 &peer_result->base);
-        if (result_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (result_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     } else {
         result_value = ir_build_const_void(irb, break_scope, node);
     }
 
-    IrBasicBlock *dest_block = block_scope->end_block;
+    IrBasicBlockSrc *dest_block = block_scope->end_block;
     ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
 
     block_scope->incoming_blocks->append(irb->current_basic_block);
@@ -8361,7 +9392,7 @@ static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scop
     return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
 }
 
-static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *node) {
+static IrInstSrc *ir_gen_break(IrBuilderSrc *irb, Scope *break_scope, AstNode *node) {
     assert(node->type == NodeTypeBreak);
 
     // Search up the scope. We'll find one of these things first:
@@ -8376,14 +9407,14 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
         if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
             if (node->data.break_expr.name != nullptr) {
                 add_node_error(irb->codegen, node, buf_sprintf("label not found: '%s'", buf_ptr(node->data.break_expr.name)));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             } else {
                 add_node_error(irb->codegen, node, buf_sprintf("break expression outside loop"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
         } else if (search_scope->id == ScopeIdDeferExpr) {
             add_node_error(irb->codegen, node, buf_sprintf("cannot break out of defer expression"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         } else if (search_scope->id == ScopeIdLoop) {
             ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
             if (node->data.break_expr.name == nullptr ||
@@ -8402,32 +9433,32 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
             }
         } else if (search_scope->id == ScopeIdSuspend) {
             add_node_error(irb->codegen, node, buf_sprintf("cannot break out of suspend block"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         search_scope = search_scope->parent;
     }
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, break_scope)) {
         is_comptime = ir_build_const_bool(irb, break_scope, node, true);
     } else {
         is_comptime = loop_scope->is_comptime;
     }
 
-    IrInstruction *result_value;
+    IrInstSrc *result_value;
     if (node->data.break_expr.expr) {
         ResultLocPeer *peer_result = create_peer_result(loop_scope->peer_parent);
         loop_scope->peer_parent->peers.append(peer_result);
 
         result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope,
                 loop_scope->lval, &peer_result->base);
-        if (result_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (result_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     } else {
         result_value = ir_build_const_void(irb, break_scope, node);
     }
 
-    IrBasicBlock *dest_block = loop_scope->break_block;
+    IrBasicBlockSrc *dest_block = loop_scope->break_block;
     ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
 
     loop_scope->incoming_blocks->append(irb->current_basic_block);
@@ -8435,7 +9466,7 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
     return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
 }
 
-static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, AstNode *node) {
+static IrInstSrc *ir_gen_continue(IrBuilderSrc *irb, Scope *continue_scope, AstNode *node) {
     assert(node->type == NodeTypeContinue);
 
     // Search up the scope. We'll find one of these things first:
@@ -8451,14 +9482,14 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
         if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
             if (node->data.continue_expr.name != nullptr) {
                 add_node_error(irb->codegen, node, buf_sprintf("labeled loop not found: '%s'", buf_ptr(node->data.continue_expr.name)));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             } else {
                 add_node_error(irb->codegen, node, buf_sprintf("continue expression outside loop"));
-                return irb->codegen->invalid_instruction;
+                return irb->codegen->invalid_inst_src;
             }
         } else if (search_scope->id == ScopeIdDeferExpr) {
             add_node_error(irb->codegen, node, buf_sprintf("cannot continue out of defer expression"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         } else if (search_scope->id == ScopeIdLoop) {
             ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
             if (node->data.continue_expr.name == nullptr ||
@@ -8474,7 +9505,7 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
         search_scope = search_scope->parent;
     }
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, continue_scope)) {
         is_comptime = ir_build_const_bool(irb, continue_scope, node, true);
     } else {
@@ -8486,17 +9517,17 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
         ir_mark_gen(ir_build_check_runtime_scope(irb, continue_scope, node, scope_runtime->is_comptime, is_comptime));
     }
 
-    IrBasicBlock *dest_block = loop_scope->continue_block;
+    IrBasicBlockSrc *dest_block = loop_scope->continue_block;
     ir_gen_defers_for_block(irb, continue_scope, dest_block->scope, false);
     return ir_mark_gen(ir_build_br(irb, continue_scope, node, dest_block, is_comptime));
 }
 
-static IrInstruction *ir_gen_error_type(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_error_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeErrorType);
     return ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_global_error_set);
 }
 
-static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_defer(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeDefer);
 
     ScopeDefer *defer_child_scope = create_defer_scope(irb->codegen, node, parent_scope);
@@ -8508,7 +9539,7 @@ static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode
     return ir_build_const_void(irb, parent_scope, node);
 }
 
-static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
+static IrInstSrc *ir_gen_slice(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
     assert(node->type == NodeTypeSliceExpr);
 
     AstNodeSliceExpr *slice_expr = &node->data.slice_expr;
@@ -8517,38 +9548,38 @@ static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node,
     AstNode *end_node = slice_expr->end;
     AstNode *sentinel_node = slice_expr->sentinel;
 
-    IrInstruction *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
-    if (ptr_value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
+    if (ptr_value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *start_value = ir_gen_node(irb, start_node, scope);
-    if (start_value == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *start_value = ir_gen_node(irb, start_node, scope);
+    if (start_value == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *end_value;
+    IrInstSrc *end_value;
     if (end_node) {
         end_value = ir_gen_node(irb, end_node, scope);
-        if (end_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (end_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     } else {
         end_value = nullptr;
     }
 
-    IrInstruction *sentinel_value;
+    IrInstSrc *sentinel_value;
     if (sentinel_node) {
         sentinel_value = ir_gen_node(irb, sentinel_node, scope);
-        if (sentinel_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (sentinel_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     } else {
         sentinel_value = nullptr;
     }
 
-    IrInstruction *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
+    IrInstSrc *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
             sentinel_value, true, result_loc);
     return ir_lval_wrap(irb, scope, slice, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeCatchExpr);
@@ -8562,29 +9593,29 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
             assert(var_node->type == NodeTypeSymbol);
             Buf *var_name = var_node->data.symbol_expr.symbol;
             add_node_error(irb->codegen, var_node, buf_sprintf("unused variable: '%s'", buf_ptr(var_name)));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         return ir_gen_catch_unreachable(irb, parent_scope, node, op1_node, lval, result_loc);
     }
 
 
-    IrInstruction *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
-    if (err_union_ptr == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
+    if (err_union_ptr == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
+    IrInstSrc *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
 
-    IrInstruction *is_comptime;
+    IrInstSrc *is_comptime;
     if (ir_should_inline(irb->exec, parent_scope)) {
         is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
     } else {
         is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_err);
     }
 
-    IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
-    IrBasicBlock *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
-    IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
-    IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
+    IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
+    IrBasicBlockSrc *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
+    IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
+    IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
 
     ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block, result_loc,
             is_comptime);
@@ -8600,33 +9631,33 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
         ZigVar *var = ir_create_var(irb, node, subexpr_scope, var_name,
             is_const, is_const, is_shadowable, is_comptime);
         err_scope = var->child_scope;
-        IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, node, err_union_ptr);
+        IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, node, err_union_ptr);
         ir_build_var_decl_src(irb, err_scope, var_node, var, nullptr, err_ptr);
     } else {
         err_scope = subexpr_scope;
     }
-    IrInstruction *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
-    if (err_result == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
-    IrBasicBlock *after_err_block = irb->current_basic_block;
+    IrInstSrc *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
+    if (err_result == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
+    IrBasicBlockSrc *after_err_block = irb->current_basic_block;
     if (!instr_is_unreachable(err_result))
         ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
 
     ir_set_cursor_at_end_and_append_block(irb, ok_block);
-    IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, parent_scope, node, err_union_ptr, false, false);
-    IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
+    IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, parent_scope, node, err_union_ptr, false, false);
+    IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
     ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
-    IrBasicBlock *after_ok_block = irb->current_basic_block;
+    IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
     ir_build_br(irb, parent_scope, node, end_block, is_comptime);
 
     ir_set_cursor_at_end_and_append_block(irb, end_block);
-    IrInstruction **incoming_values = allocate<IrInstruction *>(2);
+    IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
     incoming_values[0] = err_result;
     incoming_values[1] = unwrapped_payload;
-    IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
+    IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
     incoming_blocks[0] = after_err_block;
     incoming_blocks[1] = after_ok_block;
-    IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
+    IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
     return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
 }
 
@@ -8644,7 +9675,7 @@ static bool render_instance_name_recursive(CodeGen *codegen, Buf *name, Scope *o
     return true;
 }
 
-static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
+static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
         Scope *scope, AstNode *source_node, Buf *out_bare_name)
 {
     if (exec != nullptr && exec->name) {
@@ -8673,7 +9704,7 @@ static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char
     }
 }
 
-static IrInstruction *ir_gen_container_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_container_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeContainerDecl);
 
     ContainerKind kind = node->data.container_decl.kind;
@@ -8798,7 +9829,7 @@ static AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node) {
     }
 }
 
-static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_err_set_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeErrorSetDecl);
 
     uint32_t err_count = node->data.err_set_decl.decls.length;
@@ -8841,7 +9872,7 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
                     buf_sprintf("duplicate error: '%s'", buf_ptr(&err->name)));
             add_error_note(irb->codegen, msg, ast_field_to_symbol_node(prev_err->decl_node),
                     buf_sprintf("other error here"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         }
         errors[err->value] = err;
     }
@@ -8849,11 +9880,11 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
     return ir_build_const_type(irb, parent_scope, node, err_set_type);
 }
 
-static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_fn_proto(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeFnProto);
 
     size_t param_count = node->data.fn_proto.params.length;
-    IrInstruction **param_types = allocate<IrInstruction*>(param_count);
+    IrInstSrc **param_types = allocate<IrInstSrc*>(param_count);
 
     bool is_var_args = false;
     for (size_t i = 0; i < param_count; i += 1) {
@@ -8864,59 +9895,59 @@ static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNo
         }
         if (param_node->data.param_decl.var_token == nullptr) {
             AstNode *type_node = param_node->data.param_decl.type;
-            IrInstruction *type_value = ir_gen_node(irb, type_node, parent_scope);
-            if (type_value == irb->codegen->invalid_instruction)
-                return irb->codegen->invalid_instruction;
+            IrInstSrc *type_value = ir_gen_node(irb, type_node, parent_scope);
+            if (type_value == irb->codegen->invalid_inst_src)
+                return irb->codegen->invalid_inst_src;
             param_types[i] = type_value;
         } else {
             param_types[i] = nullptr;
         }
     }
 
-    IrInstruction *align_value = nullptr;
+    IrInstSrc *align_value = nullptr;
     if (node->data.fn_proto.align_expr != nullptr) {
         align_value = ir_gen_node(irb, node->data.fn_proto.align_expr, parent_scope);
-        if (align_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (align_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     }
 
-    IrInstruction *callconv_value = nullptr;
+    IrInstSrc *callconv_value = nullptr;
     if (node->data.fn_proto.callconv_expr != nullptr) {
         callconv_value = ir_gen_node(irb, node->data.fn_proto.callconv_expr, parent_scope);
-        if (callconv_value == irb->codegen->invalid_instruction)
-            return irb->codegen->invalid_instruction;
+        if (callconv_value == irb->codegen->invalid_inst_src)
+            return irb->codegen->invalid_inst_src;
     }
 
-    IrInstruction *return_type;
+    IrInstSrc *return_type;
     if (node->data.fn_proto.return_var_token == nullptr) {
         if (node->data.fn_proto.return_type == nullptr) {
             return_type = ir_build_const_type(irb, parent_scope, node, irb->codegen->builtin_types.entry_void);
         } else {
             return_type = ir_gen_node(irb, node->data.fn_proto.return_type, parent_scope);
-            if (return_type == irb->codegen->invalid_instruction)
-                return irb->codegen->invalid_instruction;
+            if (return_type == irb->codegen->invalid_inst_src)
+                return irb->codegen->invalid_inst_src;
         }
     } else {
         add_node_error(irb->codegen, node,
             buf_sprintf("TODO implement inferred return types https://github.com/ziglang/zig/issues/447"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
         //return_type = nullptr;
     }
 
     return ir_build_fn_proto(irb, parent_scope, node, param_types, align_value, callconv_value, return_type, is_var_args);
 }
 
-static IrInstruction *ir_gen_resume(IrBuilder *irb, Scope *scope, AstNode *node) {
+static IrInstSrc *ir_gen_resume(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
     assert(node->type == NodeTypeResume);
 
-    IrInstruction *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
-    if (target_inst == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
+    if (target_inst == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    return ir_build_resume(irb, scope, node, target_inst);
+    return ir_build_resume_src(irb, scope, node, target_inst);
 }
 
-static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
+static IrInstSrc *ir_gen_await_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
         ResultLoc *result_loc)
 {
     assert(node->type == NodeTypeAwaitExpr);
@@ -8937,7 +9968,7 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
     ZigFn *fn_entry = exec_fn_entry(irb->exec);
     if (!fn_entry) {
         add_node_error(irb->codegen, node, buf_sprintf("await outside function definition"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
     ScopeSuspend *existing_suspend_scope = get_scope_suspend(scope);
     if (existing_suspend_scope) {
@@ -8946,24 +9977,24 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
             add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("suspend block here"));
             existing_suspend_scope->reported_err = true;
         }
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
-    IrInstruction *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
-    if (target_inst == irb->codegen->invalid_instruction)
-        return irb->codegen->invalid_instruction;
+    IrInstSrc *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
+    if (target_inst == irb->codegen->invalid_inst_src)
+        return irb->codegen->invalid_inst_src;
 
-    IrInstruction *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
+    IrInstSrc *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
     return ir_lval_wrap(irb, scope, await_inst, lval, result_loc);
 }
 
-static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
+static IrInstSrc *ir_gen_suspend(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
     assert(node->type == NodeTypeSuspend);
 
     ZigFn *fn_entry = exec_fn_entry(irb->exec);
     if (!fn_entry) {
         add_node_error(irb->codegen, node, buf_sprintf("suspend outside function definition"));
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
     ScopeSuspend *existing_suspend_scope = get_scope_suspend(parent_scope);
     if (existing_suspend_scope) {
@@ -8972,21 +10003,21 @@ static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNod
             add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("other suspend block here"));
             existing_suspend_scope->reported_err = true;
         }
-        return irb->codegen->invalid_instruction;
+        return irb->codegen->invalid_inst_src;
     }
 
-    IrInstructionSuspendBegin *begin = ir_build_suspend_begin(irb, parent_scope, node);
+    IrInstSrcSuspendBegin *begin = ir_build_suspend_begin_src(irb, parent_scope, node);
     if (node->data.suspend.block != nullptr) {
         ScopeSuspend *suspend_scope = create_suspend_scope(irb->codegen, node, parent_scope);
         Scope *child_scope = &suspend_scope->base;
-        IrInstruction *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
+        IrInstSrc *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
         ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.suspend.block, susp_res));
     }
 
-    return ir_mark_gen(ir_build_suspend_finish(irb, parent_scope, node, begin));
+    return ir_mark_gen(ir_build_suspend_finish_src(irb, parent_scope, node, begin));
 }
 
-static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scope,
+static IrInstSrc *ir_gen_node_raw(IrBuilderSrc *irb, AstNode *node, Scope *scope,
         LVal lval, ResultLoc *result_loc)
 {
     assert(scope);
@@ -9035,39 +10066,39 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
             return ir_gen_return(irb, scope, node, lval, result_loc);
         case NodeTypeFieldAccessExpr:
             {
-                IrInstruction *ptr_instruction = ir_gen_field_access(irb, scope, node);
-                if (ptr_instruction == irb->codegen->invalid_instruction)
+                IrInstSrc *ptr_instruction = ir_gen_field_access(irb, scope, node);
+                if (ptr_instruction == irb->codegen->invalid_inst_src)
                     return ptr_instruction;
                 if (lval == LValPtr)
                     return ptr_instruction;
 
-                IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
+                IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
                 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
             }
         case NodeTypePtrDeref: {
             AstNode *expr_node = node->data.ptr_deref_expr.target;
-            IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
-            if (value == irb->codegen->invalid_instruction)
+            IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
+            if (value == irb->codegen->invalid_inst_src)
                 return value;
 
             // We essentially just converted any lvalue from &(x.*) to (&x).*;
             // this inhibits checking that x is a pointer later, so we directly
             // record whether the pointer check is needed
-            IrInstruction *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
+            IrInstSrc *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
             return ir_expr_wrap(irb, scope, un_op, result_loc);
         }
         case NodeTypeUnwrapOptional: {
             AstNode *expr_node = node->data.unwrap_optional.expr;
 
-            IrInstruction *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
-            if (maybe_ptr == irb->codegen->invalid_instruction)
-                return irb->codegen->invalid_instruction;
+            IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
+            if (maybe_ptr == irb->codegen->invalid_inst_src)
+                return irb->codegen->invalid_inst_src;
 
-            IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
+            IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
             if (lval == LValPtr)
                 return unwrapped_ptr;
 
-            IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
+            IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
             return ir_expr_wrap(irb, scope, load_ptr, result_loc);
         }
         case NodeTypeBoolLiteral:
@@ -9125,7 +10156,7 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
         case NodeTypeInferredArrayType:
             add_node_error(irb->codegen, node,
                 buf_sprintf("inferred array size invalid here"));
-            return irb->codegen->invalid_instruction;
+            return irb->codegen->invalid_inst_src;
         case NodeTypeVarFieldType:
             return ir_lval_wrap(irb, scope,
                     ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_var), lval, result_loc);
@@ -9139,7 +10170,7 @@ static ResultLoc *no_result_loc(void) {
     return &result_loc_none->base;
 }
 
-static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
+static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
         ResultLoc *result_loc)
 {
     if (result_loc == nullptr) {
@@ -9156,8 +10187,8 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
     } else {
         child_scope = &create_expr_scope(irb->codegen, node, scope)->base;
     }
-    IrInstruction *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
-    if (result == irb->codegen->invalid_instruction) {
+    IrInstSrc *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
+    if (result == irb->codegen->invalid_inst_src) {
         if (irb->exec->first_err_trace_msg == nullptr) {
             irb->exec->first_err_trace_msg = irb->codegen->trace_err;
         }
@@ -9165,11 +10196,22 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
     return result;
 }
 
-static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope) {
+static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope) {
     return ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
 }
 
-static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
+static void invalidate_exec(IrExecutableSrc *exec, ErrorMsg *msg) {
+    if (exec->first_err_trace_msg != nullptr)
+        return;
+
+    exec->first_err_trace_msg = msg;
+
+    for (size_t i = 0; i < exec->tld_list.length; i += 1) {
+        exec->tld_list.items[i]->resolution = TldResolutionInvalid;
+    }
+}
+
+static void invalidate_exec_gen(IrExecutableGen *exec, ErrorMsg *msg) {
     if (exec->first_err_trace_msg != nullptr)
         return;
 
@@ -9183,24 +10225,25 @@ static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
         invalidate_exec(exec->source_exec, msg);
 }
 
-bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_executable) {
+
+bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable) {
     assert(node->owner);
 
-    IrBuilder ir_builder = {0};
-    IrBuilder *irb = &ir_builder;
+    IrBuilderSrc ir_builder = {0};
+    IrBuilderSrc *irb = &ir_builder;
 
     irb->codegen = codegen;
     irb->exec = ir_executable;
     irb->main_block_node = node;
 
-    IrBasicBlock *entry_block = ir_create_basic_block(irb, scope, "Entry");
+    IrBasicBlockSrc *entry_block = ir_create_basic_block(irb, scope, "Entry");
     ir_set_cursor_at_end_and_append_block(irb, entry_block);
     // Entry block gets a reference because we enter it to begin.
     ir_ref_bb(irb->current_basic_block);
 
-    IrInstruction *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
+    IrInstSrc *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
 
-    if (result == irb->codegen->invalid_instruction)
+    if (result == irb->codegen->invalid_inst_src)
         return false;
 
     if (irb->exec->first_err_trace_msg != nullptr) {
@@ -9209,9 +10252,9 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
     }
 
     if (!instr_is_unreachable(result)) {
-        ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->source_node, result, nullptr));
+        ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->base.source_node, result, nullptr));
         // no need for save_err_ret_addr because this cannot return error
-        ir_mark_gen(ir_build_return(irb, scope, result->source_node, result));
+        ir_mark_gen(ir_build_return_src(irb, scope, result->base.source_node, result));
     }
 
     return true;
@@ -9220,7 +10263,7 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
 bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
     assert(fn_entry);
 
-    IrExecutable *ir_executable = fn_entry->ir_executable;
+    IrExecutableSrc *ir_executable = fn_entry->ir_executable;
     AstNode *body_node = fn_entry->body_node;
 
     assert(fn_entry->child_scope);
@@ -9228,14 +10271,21 @@ bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
     return ir_gen(codegen, body_node, fn_entry->child_scope, ir_executable);
 }
 
-static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutable *exec, ErrorMsg *err_msg, int limit) {
+static void ir_add_call_stack_errors_gen(CodeGen *codegen, IrExecutableGen *exec, ErrorMsg *err_msg, int limit) {
     if (!exec || !exec->source_node || limit < 0) return;
     add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
 
-    ir_add_call_stack_errors(codegen, exec->parent_exec, err_msg, limit - 1);
+    ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
 }
 
-static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg) {
+static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutableSrc *exec, ErrorMsg *err_msg, int limit) {
+    if (!exec || !exec->source_node || limit < 0) return;
+    add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
+
+    ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
+}
+
+static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg) {
     ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
     invalidate_exec(exec, err_msg);
     if (exec->parent_exec) {
@@ -9244,26 +10294,40 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNo
     return err_msg;
 }
 
+static ErrorMsg *exec_add_error_node_gen(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node, Buf *msg) {
+    ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
+    invalidate_exec_gen(exec, err_msg);
+    if (exec->parent_exec) {
+        ir_add_call_stack_errors_gen(codegen, exec, err_msg, 10);
+    }
+    return err_msg;
+}
+
 static ErrorMsg *ir_add_error_node(IrAnalyze *ira, AstNode *source_node, Buf *msg) {
-    return exec_add_error_node(ira->codegen, ira->new_irb.exec, source_node, msg);
+    return exec_add_error_node_gen(ira->codegen, ira->new_irb.exec, source_node, msg);
 }
 
 static ErrorMsg *opt_ir_add_error_node(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, Buf *msg) {
     if (ira != nullptr)
-        return exec_add_error_node(codegen, ira->new_irb.exec, source_node, msg);
+        return exec_add_error_node_gen(codegen, ira->new_irb.exec, source_node, msg);
     else
         return add_node_error(codegen, source_node, msg);
 }
 
-static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInstruction *source_instruction, Buf *msg) {
+static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInst *source_instruction, Buf *msg) {
     return ir_add_error_node(ira, source_instruction->source_node, msg);
 }
 
-static void ir_assert(bool ok, IrInstruction *source_instruction) {
+static void ir_assert(bool ok, IrInst *source_instruction) {
     if (ok) return;
     src_assert(ok, source_instruction->source_node);
 }
 
+static void ir_assert_gen(bool ok, IrInstGen *source_instruction) {
+    if (ok) return;
+    src_assert(ok, source_instruction->base.source_node);
+}
+
 // This function takes a comptime ptr and makes the child const value conform to the type
 // described by the pointer.
 static Error eval_comptime_ptr_reinterpret(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
@@ -9309,43 +10373,43 @@ ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_va
     return val;
 }
 
-static ZigValue *ir_exec_const_result(CodeGen *codegen, IrExecutable *exec) {
-    IrBasicBlock *bb = exec->basic_block_list.at(0);
+static ZigValue *ir_exec_const_result(CodeGen *codegen, IrExecutableGen *exec) {
+    IrBasicBlockGen *bb = exec->basic_block_list.at(0);
     for (size_t i = 0; i < bb->instruction_list.length; i += 1) {
-        IrInstruction *instruction = bb->instruction_list.at(i);
-        if (instruction->id == IrInstructionIdReturn) {
-            IrInstructionReturn *ret_inst = (IrInstructionReturn *)instruction;
-            IrInstruction *operand = ret_inst->operand;
+        IrInstGen *instruction = bb->instruction_list.at(i);
+        if (instruction->id == IrInstGenIdReturn) {
+            IrInstGenReturn *ret_inst = (IrInstGenReturn *)instruction;
+            IrInstGen *operand = ret_inst->operand;
             if (operand->value->special == ConstValSpecialRuntime) {
-                exec_add_error_node(codegen, exec, operand->source_node,
+                exec_add_error_node_gen(codegen, exec, operand->base.source_node,
                         buf_sprintf("unable to evaluate constant expression"));
-                return codegen->invalid_instruction->value;
+                return codegen->invalid_inst_gen->value;
             }
             return operand->value;
-        } else if (ir_has_side_effects(instruction)) {
+        } else if (ir_inst_gen_has_side_effects(instruction)) {
             if (instr_is_comptime(instruction)) {
                 switch (instruction->id) {
-                    case IrInstructionIdUnwrapErrPayload:
-                    case IrInstructionIdUnionFieldPtr:
+                    case IrInstGenIdUnwrapErrPayload:
+                    case IrInstGenIdUnionFieldPtr:
                         continue;
                     default:
                         break;
                 }
             }
-            if (get_scope_typeof(instruction->scope) != nullptr) {
+            if (get_scope_typeof(instruction->base.scope) != nullptr) {
                 // doesn't count, it's inside a @TypeOf()
                 continue;
             }
-            exec_add_error_node(codegen, exec, instruction->source_node,
+            exec_add_error_node_gen(codegen, exec, instruction->base.source_node,
                     buf_sprintf("unable to evaluate constant expression"));
-            return codegen->invalid_instruction->value;
+            return codegen->invalid_inst_gen->value;
         }
     }
     zig_unreachable();
 }
 
-static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInstruction *source_instruction) {
-    if (ir_should_inline(ira->new_irb.exec, source_instruction->scope)) {
+static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInst* source_instruction) {
+    if (ir_should_inline(ira->old_irb.exec, source_instruction->scope)) {
         ir_add_error(ira, source_instruction, buf_sprintf("unable to evaluate constant expression"));
         return false;
     }
@@ -10079,7 +11143,7 @@ void float_read_ieee597(ZigValue *val, uint8_t *buf, bool is_big_endian) {
     }
 }
 
-static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruction, ZigType *other_type,
+static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstGen *instruction, ZigType *other_type,
         bool explicit_cast)
 {
     if (type_is_invalid(other_type)) {
@@ -10173,7 +11237,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
             }
             Buf *val_buf = buf_alloc();
             bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
-            ir_add_error(ira, instruction,
+            ir_add_error_node(ira, instruction->base.source_node,
                 buf_sprintf("integer value %s has no representation in type '%s'",
                     buf_ptr(val_buf),
                     buf_ptr(&other_type->name)));
@@ -10268,7 +11332,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
         }
         Buf *val_buf = buf_alloc();
         float_append_buf(val_buf, const_val);
-        ir_add_error(ira, instruction,
+        ir_add_error_node(ira, instruction->base.source_node,
             buf_sprintf("cast of value %s to type '%s' loses information",
                 buf_ptr(val_buf),
                 buf_ptr(&other_type->name)));
@@ -10277,7 +11341,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
         if (!other_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
             Buf *val_buf = buf_alloc();
             bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
-            ir_add_error(ira, instruction,
+            ir_add_error_node(ira, instruction->base.source_node,
                 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
                     buf_ptr(val_buf),
                     buf_ptr(&other_type->name)));
@@ -10298,7 +11362,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
             if (!child_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
                 Buf *val_buf = buf_alloc();
                 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
-                ir_add_error(ira, instruction,
+                ir_add_error_node(ira, instruction->base.source_node,
                     buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
                         buf_ptr(val_buf),
                         buf_ptr(&child_type->name)));
@@ -10321,7 +11385,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
             Buf *val_buf = buf_alloc();
             float_append_buf(val_buf, const_val);
 
-            ir_add_error(ira, instruction,
+            ir_add_error_node(ira, instruction->base.source_node,
                 buf_sprintf("fractional component prevents float value %s from being casted to type '%s'",
                     buf_ptr(val_buf),
                     buf_ptr(&other_type->name)));
@@ -10351,7 +11415,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
         bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
     }
 
-    ir_add_error(ira, instruction,
+    ir_add_error_node(ira, instruction->base.source_node,
         buf_sprintf("%s value %s cannot be coerced to type '%s'",
             num_lit_str,
             buf_ptr(val_buf),
@@ -10805,11 +11869,11 @@ static void update_errors_helper(CodeGen *g, ErrorTableEntry ***errors, size_t *
 }
 
 static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigType *expected_type,
-        IrInstruction **instructions, size_t instruction_count)
+        IrInstGen **instructions, size_t instruction_count)
 {
     Error err;
     assert(instruction_count >= 1);
-    IrInstruction *prev_inst;
+    IrInstGen *prev_inst;
     size_t i = 0;
     for (;;) {
         prev_inst = instructions[i];
@@ -10829,7 +11893,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
     size_t errors_count = 0;
     ZigType *err_set_type = nullptr;
     if (prev_inst->value->type->id == ZigTypeIdErrorSet) {
-        if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->source_node)) {
+        if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->base.source_node)) {
             return ira->codegen->builtin_types.entry_invalid;
         }
         if (type_is_global_error_set(prev_inst->value->type)) {
@@ -10849,7 +11913,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
     bool any_are_null = (prev_inst->value->type->id == ZigTypeIdNull);
     bool convert_to_const_slice = false;
     for (; i < instruction_count; i += 1) {
-        IrInstruction *cur_inst = instructions[i];
+        IrInstGen *cur_inst = instructions[i];
         ZigType *cur_type = cur_inst->value->type;
         ZigType *prev_type = prev_inst->value->type;
 
@@ -10871,14 +11935,14 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
         }
 
         if (prev_type->id == ZigTypeIdErrorSet) {
-            ir_assert(err_set_type != nullptr, prev_inst);
+            ir_assert_gen(err_set_type != nullptr, prev_inst);
             if (cur_type->id == ZigTypeIdErrorSet) {
                 if (type_is_global_error_set(err_set_type)) {
                     continue;
                 }
                 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
                         cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
-                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
+                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
                 if (!allow_infer && type_is_global_error_set(cur_type)) {
@@ -10946,7 +12010,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
                 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
                 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
                     cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
-                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
+                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
                 if (!allow_infer && type_is_global_error_set(cur_err_set_type)) {
@@ -11001,7 +12065,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
         if (cur_type->id == ZigTypeIdErrorSet) {
             bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
                     cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
-            if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
+            if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
                 return ira->codegen->builtin_types.entry_invalid;
             }
             if (!allow_infer && type_is_global_error_set(cur_type)) {
@@ -11024,7 +12088,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
                     err_set_type = cur_type;
                 }
 
-                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->source_node)) {
+                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
 
@@ -11087,11 +12151,11 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
                 bool allow_infer_cur = cur_err_set_type->data.error_set.infer_fn != nullptr &&
                         cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
 
-                if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->source_node)) {
+                if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
 
-                if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
+                if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
 
@@ -11268,7 +12332,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
                 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
                 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
                     cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
-                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
+                if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
                     return ira->codegen->builtin_types.entry_invalid;
                 }
                 if ((!allow_infer && type_is_global_error_set(cur_err_set_type)) ||
@@ -11463,9 +12527,9 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
         ErrorMsg *msg = ir_add_error_node(ira, source_node,
             buf_sprintf("incompatible types: '%s' and '%s'",
                 buf_ptr(&prev_type->name), buf_ptr(&cur_type->name)));
-        add_error_note(ira->codegen, msg, prev_inst->source_node,
+        add_error_note(ira->codegen, msg, prev_inst->base.source_node,
             buf_sprintf("type '%s' here", buf_ptr(&prev_type->name)));
-        add_error_note(ira->codegen, msg, cur_inst->source_node,
+        add_error_note(ira->codegen, msg, cur_inst->base.source_node,
             buf_sprintf("type '%s' here", buf_ptr(&cur_type->name)));
 
         return ira->codegen->builtin_types.entry_invalid;
@@ -11535,7 +12599,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
     }
 }
 
-static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_instr,
+static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInst *source_instr,
         CastOp cast_op,
         ZigValue *other_val, ZigType *other_type,
         ZigValue *const_val, ZigType *new_type)
@@ -11635,58 +12699,56 @@ static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_
     return true;
 }
 
-static IrInstruction *ir_const(IrAnalyze *ira, IrInstruction *old_instruction, ZigType *ty) {
-    IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
-            old_instruction->scope, old_instruction->source_node);
-    IrInstruction *new_instruction = &const_instruction->base;
+static IrInstGen *ir_const(IrAnalyze *ira, IrInst *inst, ZigType *ty) {
+    IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
+            inst->scope, inst->source_node);
+    IrInstGen *new_instruction = &const_instruction->base;
     new_instruction->value->type = ty;
     new_instruction->value->special = ConstValSpecialStatic;
     return new_instruction;
 }
 
-static IrInstruction *ir_const_noval(IrAnalyze *ira, IrInstruction *old_instruction) {
-    IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,
+static IrInstGen *ir_const_noval(IrAnalyze *ira, IrInst *old_instruction) {
+    IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
             old_instruction->scope, old_instruction->source_node);
     return &const_instruction->base;
 }
 
-// This function initializes the new IrInstruction with the provided ZigValue,
+// This function initializes the new IrInstGen with the provided ZigValue,
 // rather than creating a new one.
-static IrInstruction *ir_const_move(IrAnalyze *ira, IrInstruction *old_instruction, ZigValue *val) {
-    IrInstruction *result = ir_const_noval(ira, old_instruction);
+static IrInstGen *ir_const_move(IrAnalyze *ira, IrInst *old_instruction, ZigValue *val) {
+    IrInstGen *result = ir_const_noval(ira, old_instruction);
     result->value = val;
     return result;
 }
 
-static IrInstruction *ir_resolve_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_resolve_cast(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
         ZigType *wanted_type, CastOp cast_op)
 {
     if (instr_is_comptime(value) || !type_has_bits(wanted_type)) {
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         if (!eval_const_expr_implicit_cast(ira, source_instr, cast_op, value->value, value->value->type,
             result->value, wanted_type))
         {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         return result;
     } else {
-        IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, cast_op);
-        result->value->type = wanted_type;
-        return result;
+        return ir_build_cast(ira, source_instr, wanted_type, value, cast_op);
     }
 }
 
-static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
-    assert(value->value->type->id == ZigTypeIdPointer);
+    ir_assert(value->value->type->id == ZigTypeIdPointer, source_instr);
 
     Error err;
 
     if ((err = type_resolve(ira->codegen, value->value->type->data.pointer.child_type,
                     ResolveStatusAlignmentKnown)))
     {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, value->value->type));
@@ -11694,9 +12756,9 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
     if (instr_is_comptime(value)) {
         ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, value->value, source_instr->source_node);
         if (pointee == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (pointee->special != ConstValSpecialRuntime) {
-            IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            IrInstGen *result = ir_const(ira, source_instr, wanted_type);
             result->value->data.x_ptr.special = ConstPtrSpecialBaseArray;
             result->value->data.x_ptr.mut = value->value->data.x_ptr.mut;
             result->value->data.x_ptr.data.base_array.array_val = pointee;
@@ -11705,21 +12767,18 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
         }
     }
 
-    IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
-            wanted_type, value, CastOpBitCast);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
 }
 
-static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
+static IrInstGen *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
 {
     Error err;
 
     if ((err = type_resolve(ira->codegen, array_ptr->value->type->data.pointer.child_type,
                     ResolveStatusAlignmentKnown)))
     {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     wanted_type = adjust_slice_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, array_ptr->value->type));
@@ -11727,14 +12786,14 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
     if (instr_is_comptime(array_ptr)) {
         ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr->value, source_instr->source_node);
         if (pointee == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (pointee->special != ConstValSpecialRuntime) {
             assert(array_ptr->value->type->id == ZigTypeIdPointer);
             ZigType *array_type = array_ptr->value->type->data.pointer.child_type;
             assert(is_slice(wanted_type));
             bool is_const = wanted_type->data.structure.fields[slice_ptr_index]->type_entry->data.pointer.is_const;
 
-            IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            IrInstGen *result = ir_const(ira, source_instr, wanted_type);
             init_const_slice(ira->codegen, result->value, pointee, 0, array_type->data.array.len, is_const);
             result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr->value->data.x_ptr.mut;
             result->value->type = wanted_type;
@@ -11743,32 +12802,34 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
     }
 
     if (result_loc == nullptr) result_loc = no_result_loc();
-    IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true,
+    IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true,
             false, true);
-    if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+    if (type_is_invalid(result_loc_inst->value->type) ||
+        result_loc_inst->value->type->id == ZigTypeIdUnreachable)
+    {
         return result_loc_inst;
     }
     return ir_build_ptr_of_array_to_slice(ira, source_instr, wanted_type, array_ptr, result_loc_inst);
 }
 
-static IrBasicBlock *ir_get_new_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
+static IrBasicBlockGen *ir_get_new_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
     assert(old_bb);
 
-    if (old_bb->other) {
-        if (ref_old_instruction == nullptr || old_bb->other->ref_instruction != ref_old_instruction) {
-            return old_bb->other;
+    if (old_bb->child) {
+        if (ref_old_instruction == nullptr || old_bb->child->ref_instruction != ref_old_instruction) {
+            return old_bb->child;
         }
     }
 
-    IrBasicBlock *new_bb = ir_build_bb_from(&ira->new_irb, old_bb);
+    IrBasicBlockGen *new_bb = ir_build_bb_from(ira, old_bb);
     new_bb->ref_instruction = ref_old_instruction;
 
     return new_bb;
 }
 
-static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
+static IrBasicBlockGen *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
     assert(ref_old_instruction != nullptr);
-    IrBasicBlock *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
+    IrBasicBlockGen *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
     if (new_bb->must_be_comptime_source_instr) {
         ErrorMsg *msg = ir_add_error(ira, ref_old_instruction,
             buf_sprintf("control flow attempts to use compile-time variable at runtime"));
@@ -11779,24 +12840,24 @@ static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb,
     return new_bb;
 }
 
-static void ir_start_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrBasicBlock *const_predecessor_bb) {
-    ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? old_bb->instruction_list.at(0) : nullptr);
+static void ir_start_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrBasicBlockSrc *const_predecessor_bb) {
+    ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? &old_bb->instruction_list.at(0)->base : nullptr);
     ira->instruction_index = 0;
     ira->old_irb.current_basic_block = old_bb;
     ira->const_predecessor_bb = const_predecessor_bb;
     ira->old_bb_index = old_bb->index;
 }
 
-static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction, IrBasicBlock *next_bb,
+static IrInstGen *ira_suspend(IrAnalyze *ira, IrInst *old_instruction, IrBasicBlockSrc *next_bb,
         IrSuspendPosition *suspend_pos)
 {
     if (ira->codegen->verbose_ir) {
-        fprintf(stderr, "suspend %s_%zu %s_%zu #%" PRIu32 " (%zu,%zu)\n",
+        fprintf(stderr, "suspend %s_%" PRIu32 " %s_%" PRIu32 " #%" PRIu32 " (%zu,%zu)\n",
                 ira->old_irb.current_basic_block->name_hint,
                 ira->old_irb.current_basic_block->debug_id,
                 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->name_hint,
                 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->debug_id,
-                ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->debug_id,
+                ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->base.debug_id,
                 ira->old_bb_index, ira->instruction_index);
     }
     suspend_pos->basic_block_index = ira->old_bb_index;
@@ -11811,13 +12872,13 @@ static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction
         assert(ira->old_irb.current_basic_block == next_bb);
         ira->instruction_index = 0;
         ira->const_predecessor_bb = nullptr;
-        next_bb->other = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
-        ira->new_irb.current_basic_block = next_bb->other;
+        next_bb->child = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
+        ira->new_irb.current_basic_block = next_bb->child;
     }
     return ira->codegen->unreach_instruction;
 }
 
-static IrInstruction *ira_resume(IrAnalyze *ira) {
+static IrInstGen *ira_resume(IrAnalyze *ira) {
     IrSuspendPosition pos = ira->resume_stack.pop();
     if (ira->codegen->verbose_ir) {
         fprintf(stderr, "resume (%zu,%zu) ", pos.basic_block_index, pos.instruction_index);
@@ -11830,12 +12891,12 @@ static IrInstruction *ira_resume(IrAnalyze *ira) {
     ira->instruction_index = pos.instruction_index;
     assert(pos.instruction_index < ira->old_irb.current_basic_block->instruction_list.length);
     if (ira->codegen->verbose_ir) {
-        fprintf(stderr, "%s_%zu #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
+        fprintf(stderr, "%s_%" PRIu32 " #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
                 ira->old_irb.current_basic_block->debug_id,
-                ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->debug_id);
+                ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->base.debug_id);
     }
     ira->const_predecessor_bb = nullptr;
-    ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->other;
+    ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->child;
     assert(ira->new_irb.current_basic_block != nullptr);
     return ira->codegen->unreach_instruction;
 }
@@ -11846,8 +12907,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
     bool need_repeat = true;
     for (;;) {
         while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
-            IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
-            if (old_bb->other == nullptr && old_bb->suspend_instruction_ref == nullptr) {
+            IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
+            if (old_bb->child == nullptr && old_bb->suspend_instruction_ref == nullptr) {
                 ira->old_bb_index += 1;
                 continue;
             }
@@ -11855,8 +12916,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
             // if it's a suspended block,
             // then skip it
             if (old_bb->suspended ||
-                (old_bb->other != nullptr && old_bb->other->instruction_list.length != 0) ||
-                (old_bb->other != nullptr && old_bb->other->already_appended))
+                (old_bb->child != nullptr && old_bb->child->instruction_list.length != 0) ||
+                (old_bb->child != nullptr && old_bb->child->already_appended))
             {
                 ira->old_bb_index += 1;
                 continue;
@@ -11870,10 +12931,10 @@ static void ir_start_next_bb(IrAnalyze *ira) {
                 return;
             }
 
-            if (old_bb->other == nullptr) {
-                old_bb->other = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
+            if (old_bb->child == nullptr) {
+                old_bb->child = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
             }
-            ira->new_irb.current_basic_block = old_bb->other;
+            ira->new_irb.current_basic_block = old_bb->child;
             ir_start_bb(ira, old_bb, nullptr);
             return;
         }
@@ -11893,16 +12954,16 @@ static void ir_finish_bb(IrAnalyze *ira) {
     if (!ira->new_irb.current_basic_block->already_appended) {
         ira->new_irb.current_basic_block->already_appended = true;
         if (ira->codegen->verbose_ir) {
-            fprintf(stderr, "append new bb %s_%zu\n", ira->new_irb.current_basic_block->name_hint,
+            fprintf(stderr, "append new bb %s_%" PRIu32 "\n", ira->new_irb.current_basic_block->name_hint,
                     ira->new_irb.current_basic_block->debug_id);
         }
         ira->new_irb.exec->basic_block_list.append(ira->new_irb.current_basic_block);
     }
     ira->instruction_index += 1;
     while (ira->instruction_index < ira->old_irb.current_basic_block->instruction_list.length) {
-        IrInstruction *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
+        IrInstSrc *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
         if (!next_instruction->is_gen) {
-            ir_add_error(ira, next_instruction, buf_sprintf("unreachable code"));
+            ir_add_error(ira, &next_instruction->base, buf_sprintf("unreachable code"));
             break;
         }
         ira->instruction_index += 1;
@@ -11911,7 +12972,7 @@ static void ir_finish_bb(IrAnalyze *ira) {
     ir_start_next_bb(ira);
 }
 
-static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
+static IrInstGen *ir_unreach_error(IrAnalyze *ira) {
     ira->old_bb_index = SIZE_MAX;
     if (ira->new_irb.exec->first_err_trace_msg == nullptr) {
         ira->new_irb.exec->first_err_trace_msg = ira->codegen->trace_err;
@@ -11919,7 +12980,7 @@ static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
     return ira->codegen->unreach_instruction;
 }
 
-static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instruction) {
+static bool ir_emit_backward_branch(IrAnalyze *ira, IrInst* source_instruction) {
     size_t *bbc = ira->new_irb.exec->backward_branch_count;
     size_t *quota = ira->new_irb.exec->backward_branch_quota;
 
@@ -11938,66 +12999,82 @@ static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instru
     return true;
 }
 
-static IrInstruction *ir_inline_bb(IrAnalyze *ira, IrInstruction *source_instruction, IrBasicBlock *old_bb) {
+static IrInstGen *ir_inline_bb(IrAnalyze *ira, IrInst* source_instruction, IrBasicBlockSrc *old_bb) {
     if (old_bb->debug_id <= ira->old_irb.current_basic_block->debug_id) {
         if (!ir_emit_backward_branch(ira, source_instruction))
             return ir_unreach_error(ira);
     }
 
-    old_bb->other = ira->old_irb.current_basic_block->other;
+    old_bb->child = ira->old_irb.current_basic_block->child;
     ir_start_bb(ira, old_bb, ira->old_irb.current_basic_block);
     return ira->codegen->unreach_instruction;
 }
 
-static IrInstruction *ir_finish_anal(IrAnalyze *ira, IrInstruction *instruction) {
+static IrInstGen *ir_finish_anal(IrAnalyze *ira, IrInstGen *instruction) {
     if (instruction->value->type->id == ZigTypeIdUnreachable)
         ir_finish_bb(ira);
     return instruction;
 }
 
-static IrInstruction *ir_const_type(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
-    IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_const_fn(IrAnalyze *ira, IrInst *source_instr, ZigFn *fn_entry) {
+    IrInstGen *result = ir_const(ira, source_instr, fn_entry->type_entry);
+    result->value->special = ConstValSpecialStatic;
+    result->value->data.x_ptr.data.fn.fn_entry = fn_entry;
+    result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
+    result->value->data.x_ptr.special = ConstPtrSpecialFunction;
+    return result;
+}
+
+static IrInstGen *ir_const_bound_fn(IrAnalyze *ira, IrInst *src_inst, ZigFn *fn_entry, IrInstGen *first_arg) {
+    IrInstGen *result = ir_const(ira, src_inst, get_bound_fn_type(ira->codegen, fn_entry));
+    result->value->data.x_bound_fn.fn = fn_entry;
+    result->value->data.x_bound_fn.first_arg = first_arg;
+    return result;
+}
+
+static IrInstGen *ir_const_type(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
+    IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
     result->value->data.x_type = ty;
     return result;
 }
 
-static IrInstruction *ir_const_bool(IrAnalyze *ira, IrInstruction *source_instruction, bool value) {
-    IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
+static IrInstGen *ir_const_bool(IrAnalyze *ira, IrInst *source_instruction, bool value) {
+    IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
     result->value->data.x_bool = value;
     return result;
 }
 
-static IrInstruction *ir_const_undef(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
-    IrInstruction *result = ir_const(ira, source_instruction, ty);
+static IrInstGen *ir_const_undef(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
+    IrInstGen *result = ir_const(ira, source_instruction, ty);
     result->value->special = ConstValSpecialUndef;
     return result;
 }
 
-static IrInstruction *ir_const_unreachable(IrAnalyze *ira, IrInstruction *source_instruction) {
-    IrInstruction *result = ir_const_noval(ira, source_instruction);
+static IrInstGen *ir_const_unreachable(IrAnalyze *ira, IrInst *source_instruction) {
+    IrInstGen *result = ir_const_noval(ira, source_instruction);
     result->value = ira->codegen->intern.for_unreachable();
     return result;
 }
 
-static IrInstruction *ir_const_void(IrAnalyze *ira, IrInstruction *source_instruction) {
-    IrInstruction *result = ir_const_noval(ira, source_instruction);
+static IrInstGen *ir_const_void(IrAnalyze *ira, IrInst *source_instruction) {
+    IrInstGen *result = ir_const_noval(ira, source_instruction);
     result->value = ira->codegen->intern.for_void();
     return result;
 }
 
-static IrInstruction *ir_const_unsigned(IrAnalyze *ira, IrInstruction *source_instruction, uint64_t value) {
-    IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
+static IrInstGen *ir_const_unsigned(IrAnalyze *ira, IrInst *source_instruction, uint64_t value) {
+    IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
     bigint_init_unsigned(&result->value->data.x_bigint, value);
     return result;
 }
 
-static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instruction,
+static IrInstGen *ir_get_const_ptr(IrAnalyze *ira, IrInst *instruction,
         ZigValue *pointee, ZigType *pointee_type,
         ConstPtrMut ptr_mut, bool ptr_is_const, bool ptr_is_volatile, uint32_t ptr_align)
 {
     ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, pointee_type,
             ptr_is_const, ptr_is_volatile, PtrLenSingle, ptr_align, 0, 0, false);
-    IrInstruction *const_instr = ir_const(ira, instruction, ptr_type);
+    IrInstGen *const_instr = ir_const(ira, instruction, ptr_type);
     ZigValue *const_val = const_instr->value;
     const_val->data.x_ptr.special = ConstPtrSpecialRef;
     const_val->data.x_ptr.mut = ptr_mut;
@@ -12005,7 +13082,7 @@ static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instructio
     return const_instr;
 }
 
-static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
+static Error ir_resolve_const_val(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
         ZigValue *val, UndefAllowed undef_allowed)
 {
     Error err;
@@ -12017,14 +13094,14 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
                 if (!type_has_bits(val->type))
                     return ErrorNone;
 
-                exec_add_error_node(codegen, exec, source_node,
+                exec_add_error_node_gen(codegen, exec, source_node,
                         buf_sprintf("unable to evaluate constant expression"));
                 return ErrorSemanticAnalyzeFail;
             case ConstValSpecialUndef:
                 if (undef_allowed == UndefOk || undef_allowed == LazyOk)
                     return ErrorNone;
 
-                exec_add_error_node(codegen, exec, source_node,
+                exec_add_error_node_gen(codegen, exec, source_node,
                         buf_sprintf("use of undefined value here causes undefined behavior"));
                 return ErrorSemanticAnalyzeFail;
             case ConstValSpecialLazy:
@@ -12039,9 +13116,9 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
     }
 }
 
-static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed) {
+static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed) {
     Error err;
-    if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->source_node,
+    if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->base.source_node,
                     value->value, undef_allowed)))
     {
         return nullptr;
@@ -12052,14 +13129,14 @@ static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAll
 ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
         ZigType *expected_type, size_t *backward_branch_count, size_t *backward_branch_quota,
         ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
-        IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
+        IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
 {
     Error err;
 
     if (expected_type != nullptr && type_is_invalid(expected_type))
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
 
-    IrExecutable *ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
+    IrExecutableSrc *ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
     ir_executable->source_node = source_node;
     ir_executable->parent_exec = parent_exec;
     ir_executable->name = exec_name;
@@ -12069,21 +13146,21 @@ ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
     ir_executable->begin_scope = scope;
 
     if (!ir_gen(codegen, node, scope, ir_executable))
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
 
     if (ir_executable->first_err_trace_msg != nullptr) {
         codegen->trace_err = ir_executable->first_err_trace_msg;
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
     }
 
     if (codegen->verbose_ir) {
         fprintf(stderr, "\nSource: ");
         ast_render(stderr, node, 4);
         fprintf(stderr, "\n{ // (IR)\n");
-        ir_print(codegen, stderr, ir_executable, 2, IrPassSrc);
+        ir_print_src(codegen, stderr, ir_executable, 2);
         fprintf(stderr, "}\n");
     }
-    IrExecutable *analyzed_executable = allocate<IrExecutable>(1, "IrExecutablePass2");
+    IrExecutableGen *analyzed_executable = allocate<IrExecutableGen>(1, "IrExecutableGen");
     analyzed_executable->source_node = source_node;
     analyzed_executable->parent_exec = parent_exec;
     analyzed_executable->source_exec = ir_executable;
@@ -12096,31 +13173,31 @@ ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
     analyzed_executable->begin_scope = scope;
     ZigType *result_type = ir_analyze(codegen, ir_executable, analyzed_executable, expected_type, expected_type_source_node);
     if (type_is_invalid(result_type)) {
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
     }
 
     if (codegen->verbose_ir) {
         fprintf(stderr, "{ // (analyzed)\n");
-        ir_print(codegen, stderr, analyzed_executable, 2, IrPassGen);
+        ir_print_gen(codegen, stderr, analyzed_executable, 2);
         fprintf(stderr, "}\n");
     }
 
     ZigValue *result = ir_exec_const_result(codegen, analyzed_executable);
     if (type_is_invalid(result->type))
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
 
     if ((err = ir_resolve_const_val(codegen, analyzed_executable, node, result, undef_allowed)))
-        return codegen->invalid_instruction->value;
+        return codegen->invalid_inst_gen->value;
 
     return result;
 }
 
-static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_value) {
+static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstGen *err_value) {
     if (type_is_invalid(err_value->value->type))
         return nullptr;
 
     if (err_value->value->type->id != ZigTypeIdErrorSet) {
-        ir_add_error(ira, err_value,
+        ir_add_error_node(ira, err_value->base.source_node,
                 buf_sprintf("expected error, found '%s'", buf_ptr(&err_value->value->type->name)));
         return nullptr;
     }
@@ -12133,7 +13210,7 @@ static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_valu
     return const_val->data.x_err_set;
 }
 
-static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
+static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
         ZigValue *val)
 {
     Error err;
@@ -12144,18 +13221,18 @@ static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstN
     return val->data.x_type;
 }
 
-static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value) {
+static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstGen *type_value) {
     if (type_is_invalid(type_value->value->type))
         return nullptr;
 
     if (type_value->value->type->id != ZigTypeIdMetaType) {
-        ir_add_error(ira, type_value,
+        ir_add_error_node(ira, type_value->base.source_node,
                 buf_sprintf("expected type 'type', found '%s'", buf_ptr(&type_value->value->type->name)));
         return nullptr;
     }
 
     Error err;
-    if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->source_node,
+    if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->base.source_node,
                     type_value->value, LazyOk)))
     {
         return nullptr;
@@ -12164,17 +13241,17 @@ static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value)
     return type_value->value;
 }
 
-static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {
+static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstGen *type_value) {
     ZigValue *val = ir_resolve_type_lazy(ira, type_value);
     if (val == nullptr)
         return ira->codegen->builtin_types.entry_invalid;
 
-    return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);
+    return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->base.source_node, val);
 }
 
-static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {
+static Error ir_validate_vector_elem_type(IrAnalyze *ira, AstNode *source_node, ZigType *elem_type) {
     if (!is_valid_vector_elem_type(elem_type)) {
-        ir_add_error(ira, source_instr,
+        ir_add_error_node(ira, source_node,
             buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
                 buf_ptr(&elem_type->name)));
         return ErrorSemanticAnalyzeFail;
@@ -12182,28 +13259,28 @@ static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_
     return ErrorNone;
 }
 
-static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {
+static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstGen *elem_type_value) {
     Error err;
     ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
     if (type_is_invalid(elem_type))
         return ira->codegen->builtin_types.entry_invalid;
-    if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))
+    if ((err = ir_validate_vector_elem_type(ira, elem_type_value->base.source_node, elem_type)))
         return ira->codegen->builtin_types.entry_invalid;
     return elem_type;
 }
 
-static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
+static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstGen *type_value) {
     ZigType *ty = ir_resolve_type(ira, type_value);
     if (type_is_invalid(ty))
         return ira->codegen->builtin_types.entry_invalid;
 
     if (ty->id != ZigTypeIdInt) {
-        ErrorMsg *msg = ir_add_error(ira, type_value,
+        ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
             buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));
         if (ty->id == ZigTypeIdVector &&
             ty->data.vector.elem_type->id == ZigTypeIdInt)
         {
-            add_error_note(ira->codegen, msg, type_value->source_node,
+            add_error_note(ira->codegen, msg, type_value->base.source_node,
                 buf_sprintf("represent vectors with their element types, i.e. '%s'",
                     buf_ptr(&ty->data.vector.elem_type->name)));
         }
@@ -12213,12 +13290,12 @@ static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
     return ty;
 }
 
-static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_source, IrInstruction *type_value) {
+static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInst *op_source, IrInstGen *type_value) {
     if (type_is_invalid(type_value->value->type))
         return ira->codegen->builtin_types.entry_invalid;
 
     if (type_value->value->type->id != ZigTypeIdMetaType) {
-        ErrorMsg *msg = ir_add_error(ira, type_value,
+        ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
                 buf_sprintf("expected error set type, found '%s'", buf_ptr(&type_value->value->type->name)));
         add_error_note(ira->codegen, msg, op_source->source_node,
                 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
@@ -12232,7 +13309,7 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
     assert(const_val->data.x_type != nullptr);
     ZigType *result_type = const_val->data.x_type;
     if (result_type->id != ZigTypeIdErrorSet) {
-        ErrorMsg *msg = ir_add_error(ira, type_value,
+        ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
                 buf_sprintf("expected error set type, found type '%s'", buf_ptr(&result_type->name)));
         add_error_note(ira->codegen, msg, op_source->source_node,
                 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
@@ -12241,15 +13318,12 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
     return result_type;
 }
 
-static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
-    if (fn_value == ira->codegen->invalid_instruction)
-        return nullptr;
-
+static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstGen *fn_value) {
     if (type_is_invalid(fn_value->value->type))
         return nullptr;
 
     if (fn_value->value->type->id != ZigTypeIdFn) {
-        ir_add_error_node(ira, fn_value->source_node,
+        ir_add_error_node(ira, fn_value->base.source_node,
                 buf_sprintf("expected function type, found '%s'", buf_ptr(&fn_value->value->type->name)));
         return nullptr;
     }
@@ -12265,22 +13339,22 @@ static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
     return const_val->data.x_ptr.data.fn.fn_entry;
 }
 
-static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
-        ZigType *wanted_type, ResultLoc *result_loc)
+static IrInstGen *ir_analyze_optional_wrap(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
 {
     assert(wanted_type->id == ZigTypeIdOptional);
 
     if (instr_is_comptime(value)) {
         ZigType *payload_type = wanted_type->data.maybe.child_type;
-        IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
+        IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
         if (type_is_invalid(casted_payload->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+        IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                 source_instr->scope, source_instr->source_node);
         const_instruction->base.value->special = ConstValSpecialStatic;
         if (types_have_same_zig_comptime_repr(ira->codegen, wanted_type, payload_type)) {
@@ -12295,40 +13369,42 @@ static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *so
     if (result_loc == nullptr && handle_is_ptr(wanted_type)) {
         result_loc = no_result_loc();
     }
-    IrInstruction *result_loc_inst = nullptr;
+    IrInstGen *result_loc_inst = nullptr;
     if (result_loc != nullptr) {
         result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
-        if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+        if (type_is_invalid(result_loc_inst->value->type) ||
+            result_loc_inst->value->type->id == ZigTypeIdUnreachable)
+        {
             return result_loc_inst;
         }
     }
-    IrInstruction *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
+    IrInstGen *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
     result->value->data.rh_maybe = RuntimeHintOptionalNonNull;
     return result;
 }
 
-static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type, ResultLoc *result_loc)
+static IrInstGen *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
 {
     assert(wanted_type->id == ZigTypeIdErrorUnion);
 
     ZigType *payload_type = wanted_type->data.error_union.payload_type;
     ZigType *err_set_type = wanted_type->data.error_union.err_set_type;
     if (instr_is_comptime(value)) {
-        IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
+        IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
         if (type_is_invalid(casted_payload->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *val = ir_resolve_const(ira, casted_payload, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *err_set_val = create_const_vals(1);
         err_set_val->type = err_set_type;
         err_set_val->special = ConstValSpecialStatic;
         err_set_val->data.x_err_set = nullptr;
 
-        IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+        IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                 source_instr->scope, source_instr->source_node);
         const_instruction->base.value->type = wanted_type;
         const_instruction->base.value->special = ConstValSpecialStatic;
@@ -12337,23 +13413,24 @@ static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction
         return &const_instruction->base;
     }
 
-    IrInstruction *result_loc_inst;
+    IrInstGen *result_loc_inst;
     if (handle_is_ptr(wanted_type)) {
         if (result_loc == nullptr) result_loc = no_result_loc();
         result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
-        if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+        if (type_is_invalid(result_loc_inst->value->type) ||
+            result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
             return result_loc_inst;
         }
     } else {
         result_loc_inst = nullptr;
     }
 
-    IrInstruction *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
+    IrInstGen *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
     result->value->data.rh_error_union = RuntimeHintErrorUnionNonError;
     return result;
 }
 
-static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_analyze_err_set_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
         ZigType *wanted_type)
 {
     assert(value->value->type->id == ZigTypeIdErrorSet);
@@ -12362,10 +13439,10 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
     if (instr_is_comptime(value)) {
         ZigValue *val = ir_resolve_const(ira, value, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if (!type_is_global_error_set(wanted_type)) {
             bool subset = false;
@@ -12379,11 +13456,11 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
                 ir_add_error(ira, source_instr,
                     buf_sprintf("error.%s not a member of error set '%s'",
                         buf_ptr(&val->data.x_err_set->name), buf_ptr(&wanted_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
-        IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+        IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                 source_instr->scope, source_instr->source_node);
         const_instruction->base.value->type = wanted_type;
         const_instruction->base.value->special = ConstValSpecialStatic;
@@ -12391,18 +13468,16 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
         return &const_instruction->base;
     }
 
-    IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, CastOpErrSet);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_cast(ira, source_instr, wanted_type, value, CastOpErrSet);
 }
 
-static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *frame_ptr, ZigType *wanted_type)
+static IrInstGen *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *frame_ptr, ZigType *wanted_type)
 {
     if (instr_is_comptime(frame_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, frame_ptr, UndefBad);
         if (ptr_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ir_assert(ptr_val->type->id == ZigTypeIdPointer, source_instr);
         if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
@@ -12410,44 +13485,38 @@ static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruc
         }
     }
 
-    IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
-            wanted_type, frame_ptr, CastOpBitCast);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_cast(ira, source_instr, wanted_type, frame_ptr, CastOpBitCast);
 }
 
-static IrInstruction *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
     if (instr_is_comptime(value)) {
         zig_panic("TODO comptime anyframe->T to anyframe");
     }
 
-    IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
-            wanted_type, value, CastOpBitCast);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
 }
 
 
-static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
         ZigType *wanted_type, ResultLoc *result_loc)
 {
     assert(wanted_type->id == ZigTypeIdErrorUnion);
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
 
     if (instr_is_comptime(casted_value)) {
         ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *err_set_val = create_const_vals(1);
         err_set_val->special = ConstValSpecialStatic;
         err_set_val->type = wanted_type->data.error_union.err_set_type;
         err_set_val->data.x_err_set = val->data.x_err_set;
 
-        IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+        IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                 source_instr->scope, source_instr->source_node);
         const_instruction->base.value->type = wanted_type;
         const_instruction->base.value->special = ConstValSpecialStatic;
@@ -12456,11 +13525,13 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
         return &const_instruction->base;
     }
 
-    IrInstruction *result_loc_inst;
+    IrInstGen *result_loc_inst;
     if (handle_is_ptr(wanted_type)) {
         if (result_loc == nullptr) result_loc = no_result_loc();
         result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, false, true);
-        if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+        if (type_is_invalid(result_loc_inst->value->type) ||
+            result_loc_inst->value->type->id == ZigTypeIdUnreachable)
+        {
             return result_loc_inst;
         }
     } else {
@@ -12468,19 +13539,19 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
     }
 
 
-    IrInstruction *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
+    IrInstGen *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
     result->value->data.rh_error_union = RuntimeHintErrorUnionError;
     return result;
 }
 
-static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value, ZigType *wanted_type) {
+static IrInstGen *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value, ZigType *wanted_type) {
     assert(wanted_type->id == ZigTypeIdOptional);
     assert(instr_is_comptime(value));
 
     ZigValue *val = ir_resolve_const(ira, value, UndefBad);
     assert(val != nullptr);
 
-    IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+    IrInstGen *result = ir_const(ira, source_instr, wanted_type);
     result->value->special = ConstValSpecialStatic;
     if (get_codegen_ptr_type(wanted_type) != nullptr) {
         result->value->data.x_ptr.special = ConstPtrSpecialNull;
@@ -12492,8 +13563,8 @@ static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *so
     return result;
 }
 
-static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
     assert(wanted_type->id == ZigTypeIdPointer);
     assert(wanted_type->data.pointer.ptr_len == PtrLenC);
@@ -12502,24 +13573,24 @@ static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction
     ZigValue *val = ir_resolve_const(ira, value, UndefBad);
     assert(val != nullptr);
 
-    IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+    IrInstGen *result = ir_const(ira, source_instr, wanted_type);
     result->value->data.x_ptr.special = ConstPtrSpecialNull;
     result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
     return result;
 }
 
-static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *value,
+static IrInstGen *ir_get_ref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *value,
         bool is_const, bool is_volatile)
 {
     Error err;
 
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(value)) {
         ZigValue *val = ir_resolve_const(ira, value, LazyOk);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return ir_get_const_ptr(ira, source_instruction, val, value->value->type,
                 ConstPtrMutComptimeConst, is_const, is_volatile, 0);
     }
@@ -12528,9 +13599,9 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
             is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
 
     if ((err = type_resolve(ira->codegen, ptr_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result_loc;
+    IrInstGen *result_loc;
     if (type_has_bits(ptr_type) && !handle_is_ptr(value->value->type)) {
         result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), value->value->type, nullptr, true,
                 false, true);
@@ -12538,12 +13609,12 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
         result_loc = nullptr;
     }
 
-    IrInstruction *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
+    IrInstGen *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
     new_instruction->value->data.rh_ptr = RuntimeHintPtrStack;
     return new_instruction;
 }
 
-static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *union_type) {
+static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, AstNode *source_node, ZigType *union_type) {
     assert(union_type->id == ZigTypeIdUnion);
 
     Error err;
@@ -12555,36 +13626,36 @@ static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_
         assert(union_type->data.unionation.tag_type != nullptr);
         return union_type->data.unionation.tag_type;
     } else {
-        ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union '%s' has no tag",
+        ErrorMsg *msg = ir_add_error_node(ira, source_node, buf_sprintf("union '%s' has no tag",
             buf_ptr(&union_type->name)));
         add_error_note(ira->codegen, msg, decl_node, buf_sprintf("consider 'union(enum)' here"));
         return ira->codegen->builtin_types.entry_invalid;
     }
 }
 
-static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target) {
+static IrInstGen *ir_analyze_enum_to_int(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
     Error err;
 
-    IrInstruction *enum_target;
+    IrInstGen *enum_target;
     ZigType *enum_type;
     if (target->value->type->id == ZigTypeIdUnion) {
-        enum_type = ir_resolve_union_tag_type(ira, target, target->value->type);
+        enum_type = ir_resolve_union_tag_type(ira, target->base.source_node, target->value->type);
         if (type_is_invalid(enum_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         enum_target = ir_implicit_cast(ira, target, enum_type);
         if (type_is_invalid(enum_target->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else if (target->value->type->id == ZigTypeIdEnum) {
         enum_target = target;
         enum_type = target->value->type;
     } else {
-        ir_add_error(ira, target,
+        ir_add_error_node(ira, target->base.source_node,
             buf_sprintf("expected enum, found type '%s'", buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *tag_type = enum_type->data.enumeration.tag_int_type;
     assert(tag_type->id == ZigTypeIdInt || tag_type->id == ZigTypeIdComptimeInt);
@@ -12593,7 +13664,7 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
     if (enum_type->data.enumeration.layout == ContainerLayoutAuto &&
         enum_type->data.enumeration.src_field_count == 1)
     {
-        IrInstruction *result = ir_const(ira, source_instr, tag_type);
+        IrInstGen *result = ir_const(ira, source_instr, tag_type);
         init_const_bigint(result->value, tag_type,
                 &enum_type->data.enumeration.fields[0].value);
         return result;
@@ -12602,20 +13673,17 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
     if (instr_is_comptime(enum_target)) {
         ZigValue *val = ir_resolve_const(ira, enum_target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
-        IrInstruction *result = ir_const(ira, source_instr, tag_type);
+            return ira->codegen->invalid_inst_gen;
+        IrInstGen *result = ir_const(ira, source_instr, tag_type);
         init_const_bigint(result->value, tag_type, &val->data.x_enum_tag);
         return result;
     }
 
-    IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, enum_target);
-    result->value->type = tag_type;
-    return result;
+    return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, enum_target, tag_type);
 }
 
-static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_union_to_tag(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *target, ZigType *wanted_type)
 {
     assert(target->value->type->id == ZigTypeIdUnion);
     assert(wanted_type->id == ZigTypeIdEnum);
@@ -12624,8 +13692,8 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            return ira->codegen->invalid_inst_gen;
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         result->value->special = ConstValSpecialStatic;
         result->value->type = wanted_type;
         bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_union.tag);
@@ -12636,7 +13704,7 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
     if (wanted_type->data.enumeration.layout == ContainerLayoutAuto &&
         wanted_type->data.enumeration.src_field_count == 1)
     {
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         result->value->special = ConstValSpecialStatic;
         result->value->type = wanted_type;
         TypeEnumField *enum_field = target->value->type->data.unionation.fields[0].enum_field;
@@ -12644,48 +13712,45 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
         return result;
     }
 
-    IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, target);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_union_tag(ira, source_instr, target, wanted_type);
 }
 
-static IrInstruction *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *target, ZigType *wanted_type)
 {
-    IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+    IrInstGen *result = ir_const(ira, source_instr, wanted_type);
     result->value->special = ConstValSpecialUndef;
     return result;
 }
 
-static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *uncasted_target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_enum_to_union(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *uncasted_target, ZigType *wanted_type)
 {
     Error err;
     assert(wanted_type->id == ZigTypeIdUnion);
 
     if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
+    IrInstGen *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         TypeUnionField *union_field = find_union_field_by_tag(wanted_type, &val->data.x_enum_tag);
         assert(union_field != nullptr);
         ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
         if (field_type == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if ((err = type_resolve(ira->codegen, field_type, ResolveStatusZeroBitsKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         switch (type_has_one_possible_value(ira->codegen, field_type)) {
             case OnePossibleValueInvalid:
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             case OnePossibleValueNo: {
                 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(
                         union_field->enum_field->decl_index);
@@ -12696,13 +13761,13 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
                             buf_ptr(union_field->name)));
                 add_error_note(ira->codegen, msg, field_node,
                         buf_sprintf("field '%s' declared here", buf_ptr(union_field->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             case OnePossibleValueYes:
                 break;
         }
 
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         result->value->special = ConstValSpecialStatic;
         result->value->type = wanted_type;
         bigint_init_bigint(&result->value->data.x_union.tag, &val->data.x_enum_tag);
@@ -12715,9 +13780,7 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
     // if the union has all fields 0 bits, we can do it
     // and in fact it's a noop cast because the union value is just the enum value
     if (wanted_type->data.unionation.gen_field_count == 0) {
-        IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, wanted_type, target, CastOpNoop);
-        result->value->type = wanted_type;
-        return result;
+        return ir_build_cast(ira, &target->base, wanted_type, target, CastOpNoop);
     }
 
     ErrorMsg *msg = ir_add_error(ira, source_instr,
@@ -12727,10 +13790,10 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
         TypeUnionField *union_field = &wanted_type->data.unionation.fields[i];
         ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
         if (field_type == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         bool has_bits;
         if ((err = type_has_bits2(ira->codegen, field_type, &has_bits)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (has_bits) {
             AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(i);
             add_error_note(ira->codegen, msg, field_node,
@@ -12739,23 +13802,23 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
                         buf_ptr(&field_type->name)));
         }
     }
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *target, ZigType *wanted_type)
 {
     assert(wanted_type->id == ZigTypeIdInt || wanted_type->id == ZigTypeIdFloat);
 
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (wanted_type->id == ZigTypeIdInt) {
             if (bigint_cmp_zero(&val->data.x_bigint) == CmpLT && !wanted_type->data.integral.is_signed) {
                 ir_add_error(ira, source_instr,
                     buf_sprintf("attempt to cast negative value to unsigned integer"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             if (!bigint_fits_in_bits(&val->data.x_bigint, wanted_type->data.integral.bit_count,
                     wanted_type->data.integral.is_signed))
@@ -12763,10 +13826,10 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
                 ir_add_error(ira, source_instr,
                     buf_sprintf("cast from '%s' to '%s' truncates bits",
                         buf_ptr(&target->value->type->name), buf_ptr(&wanted_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         result->value->type = wanted_type;
         if (wanted_type->id == ZigTypeIdInt) {
             bigint_init_bigint(&result->value->data.x_bigint, &val->data.x_bigint);
@@ -12783,19 +13846,16 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
         assert(wanted_type->id == ZigTypeIdInt);
         assert(type_has_bits(target->value->type));
         ir_build_assert_zero(ira, source_instr, target);
-        IrInstruction *result = ir_const_unsigned(ira, source_instr, 0);
+        IrInstGen *result = ir_const_unsigned(ira, source_instr, 0);
         result->value->type = wanted_type;
         return result;
     }
 
-    IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, target);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
 }
 
-static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_int_to_enum(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *target, ZigType *wanted_type)
 {
     Error err;
     assert(wanted_type->id == ZigTypeIdEnum);
@@ -12803,14 +13863,14 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
     ZigType *actual_type = target->value->type;
 
     if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (actual_type != wanted_type->data.enumeration.tag_int_type) {
         ir_add_error(ira, source_instr,
                 buf_sprintf("integer to enum cast from '%s' instead of its tag type, '%s'",
                     buf_ptr(&actual_type->name),
                     buf_ptr(&wanted_type->data.enumeration.tag_int_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     assert(actual_type->id == ZigTypeIdInt || actual_type->id == ZigTypeIdComptimeInt);
@@ -12818,7 +13878,7 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);
         if (field == nullptr && !wanted_type->data.enumeration.non_exhaustive) {
@@ -12829,28 +13889,25 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
                     buf_ptr(&wanted_type->name), buf_ptr(val_buf)));
             add_error_note(ira->codegen, msg, wanted_type->data.enumeration.decl_node,
                     buf_sprintf("'%s' declared here", buf_ptr(&wanted_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
         bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_bigint);
         return result;
     }
 
-    IrInstruction *result = ir_build_int_to_enum(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, nullptr, target);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_int_to_enum_gen(ira, source_instr->scope, source_instr->source_node, wanted_type, target);
 }
 
-static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *target, ZigType *wanted_type)
+static IrInstGen *ir_analyze_number_to_literal(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *target, ZigType *wanted_type)
 {
     ZigValue *val = ir_resolve_const(ira, target, UndefBad);
     if (!val)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+    IrInstGen *result = ir_const(ira, source_instr, wanted_type);
     if (wanted_type->id == ZigTypeIdComptimeFloat) {
         float_init_float(result->value, val);
     } else if (wanted_type->id == ZigTypeIdComptimeInt) {
@@ -12861,7 +13918,7 @@ static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction
     return result;
 }
 
-static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
+static IrInstGen *ir_analyze_int_to_err(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
     ZigType *wanted_type)
 {
     assert(target->value->type->id == ZigTypeIdInt);
@@ -12871,12 +13928,12 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
 
         if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (type_is_global_error_set(wanted_type)) {
@@ -12888,7 +13945,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
                 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
                 ir_add_error(ira, source_instr,
                     buf_sprintf("integer value %s represents no error", buf_ptr(val_buf)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             size_t index = bigint_as_usize(&val->data.x_bigint);
@@ -12912,7 +13969,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
                 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
                 ir_add_error(ira, source_instr,
                     buf_sprintf("integer value %s represents no error in '%s'", buf_ptr(val_buf), buf_ptr(&wanted_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             result->value->data.x_err_set = err;
@@ -12920,12 +13977,10 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
         }
     }
 
-    IrInstruction *result = ir_build_int_to_err(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_int_to_err_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
 }
 
-static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
+static IrInstGen *ir_analyze_err_to_int(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
         ZigType *wanted_type)
 {
     assert(wanted_type->id == ZigTypeIdInt);
@@ -12935,9 +13990,9 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+        IrInstGen *result = ir_const(ira, source_instr, wanted_type);
 
         ErrorTableEntry *err;
         if (err_type->id == ZigTypeIdErrorUnion) {
@@ -12957,7 +14012,7 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
             ir_add_error_node(ira, source_instr->source_node,
                     buf_sprintf("error code '%s' does not fit in '%s'",
                         buf_ptr(&err->name), buf_ptr(&wanted_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         return result;
@@ -12973,14 +14028,14 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
     }
     if (!type_is_global_error_set(err_set_type)) {
         if (!resolve_inferred_error_set(ira->codegen, err_set_type, source_instr->source_node)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if (err_set_type->data.error_set.err_count == 0) {
-            IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            IrInstGen *result = ir_const(ira, source_instr, wanted_type);
             bigint_init_unsigned(&result->value->data.x_bigint, 0);
             return result;
         } else if (err_set_type->data.error_set.err_count == 1) {
-            IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            IrInstGen *result = ir_const(ira, source_instr, wanted_type);
             ErrorTableEntry *err = err_set_type->data.error_set.errors[0];
             bigint_init_unsigned(&result->value->data.x_bigint, err->value);
             return result;
@@ -12992,21 +14047,19 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
     if (!bigint_fits_in_bits(&bn, wanted_type->data.integral.bit_count, wanted_type->data.integral.is_signed)) {
         ir_add_error_node(ira, source_instr->source_node,
                 buf_sprintf("too many error values to fit in '%s'", buf_ptr(&wanted_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *result = ir_build_err_to_int(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_err_to_int_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
 }
 
-static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
+static IrInstGen *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
         ZigType *wanted_type)
 {
     assert(wanted_type->id == ZigTypeIdPointer);
     Error err;
     if ((err = type_resolve(ira->codegen, target->value->type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     assert((wanted_type->data.pointer.is_const && target->value->type->data.pointer.is_const) || !target->value->type->data.pointer.is_const);
     wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, target->value->type));
     ZigType *array_type = wanted_type->data.pointer.child_type;
@@ -13016,12 +14069,12 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         assert(val->type->id == ZigTypeIdPointer);
         ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
         if (pointee == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (pointee->special != ConstValSpecialRuntime) {
             ZigValue *array_val = create_const_vals(1);
             array_val->special = ConstValSpecialStatic;
@@ -13031,7 +14084,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
             array_val->parent.id = ConstParentIdScalar;
             array_val->parent.data.p_scalar.scalar_val = pointee;
 
-            IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+            IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                     source_instr->scope, source_instr->source_node);
             const_instruction->base.value->type = wanted_type;
             const_instruction->base.value->special = ConstValSpecialStatic;
@@ -13043,10 +14096,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
     }
 
     // pointer to array and pointer to single item are represented the same way at runtime
-    IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node,
-            wanted_type, target, CastOpBitCast);
-    result->value->type = wanted_type;
-    return result;
+    return ir_build_cast(ira, &target->base, wanted_type, target, CastOpBitCast);
 }
 
 static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCastOnly *cast_result,
@@ -13234,12 +14284,12 @@ static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCa
     }
 }
 
-static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *source_instr,
-    IrInstruction *array, ZigType *vector_type)
+static IrInstGen *ir_analyze_array_to_vector(IrAnalyze *ira, IrInst* source_instr,
+    IrInstGen *array, ZigType *vector_type)
 {
     if (instr_is_comptime(array)) {
         // arrays and vectors have the same ZigValue representation
-        IrInstruction *result = ir_const(ira, source_instr, vector_type);
+        IrInstGen *result = ir_const(ira, source_instr, vector_type);
         copy_const_val(result->value, array->value);
         result->value->type = vector_type;
         return result;
@@ -13247,12 +14297,12 @@ static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *
     return ir_build_array_to_vector(ira, source_instr, array, vector_type);
 }
 
-static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *source_instr,
-    IrInstruction *vector, ZigType *array_type, ResultLoc *result_loc)
+static IrInstGen *ir_analyze_vector_to_array(IrAnalyze *ira, IrInst* source_instr,
+    IrInstGen *vector, ZigType *array_type, ResultLoc *result_loc)
 {
     if (instr_is_comptime(vector)) {
         // arrays and vectors have the same ZigValue representation
-        IrInstruction *result = ir_const(ira, source_instr, array_type);
+        IrInstGen *result = ir_const(ira, source_instr, array_type);
         copy_const_val(result->value, vector->value);
         result->value->type = array_type;
         return result;
@@ -13260,18 +14310,18 @@ static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *
     if (result_loc == nullptr) {
         result_loc = no_result_loc();
     }
-    IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr,
+    IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr,
             true, false, true);
-    if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+    if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
         return result_loc_inst;
     }
     return ir_build_vector_to_array(ira, source_instr, array_type, vector, result_loc_inst);
 }
 
-static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *integer, ZigType *dest_type)
+static IrInstGen *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *integer, ZigType *dest_type)
 {
-    IrInstruction *unsigned_integer;
+    IrInstGen *unsigned_integer;
     if (instr_is_comptime(integer)) {
         unsigned_integer = integer;
     } else {
@@ -13284,7 +14334,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
                 buf_sprintf("integer type '%s' too big for implicit @intToPtr to type '%s'",
                     buf_ptr(&integer->value->type->name),
                     buf_ptr(&dest_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (integer->value->type->data.integral.is_signed) {
@@ -13292,7 +14342,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
                     integer->value->type->data.integral.bit_count);
             unsigned_integer = ir_analyze_bit_cast(ira, source_instr, integer, unsigned_int_type);
             if (type_is_invalid(unsigned_integer->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             unsigned_integer = integer;
         }
@@ -13312,14 +14362,14 @@ static bool is_pointery_and_elem_is_not_pointery(ZigType *ty) {
     return false;
 }
 
-static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_analyze_enum_literal(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
         ZigType *enum_type)
 {
     assert(enum_type->id == ZigTypeIdEnum);
 
     Error err;
     if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeEnumField *field = find_enum_type_field(enum_type, value->value->data.x_enum_literal);
     if (field == nullptr) {
@@ -13327,40 +14377,40 @@ static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *sou
                 buf_ptr(&enum_type->name), buf_ptr(value->value->data.x_enum_literal)));
         add_error_note(ira->codegen, msg, enum_type->data.enumeration.decl_node,
                 buf_sprintf("'%s' declared here", buf_ptr(&enum_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction *result = ir_const(ira, source_instr, enum_type);
+    IrInstGen *result = ir_const(ira, source_instr, enum_type);
     bigint_init_bigint(&result->value->data.x_enum_tag, &field->value);
 
     return result;
 }
 
-static IrInstruction *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
     ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon list literal to array"));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
     ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to struct"));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *value, ZigType *wanted_type)
+static IrInstGen *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *value, ZigType *wanted_type)
 {
     ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to union"));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
 // Add a compile error and return ErrorSemanticAnalyzeFail if the pointer alignment does not work,
 // otherwise return ErrorNone. Does not emit any instructions.
 // Assumes that the pointer types have element types with the same ABI alignment. Avoids resolving the
 // pointer types' alignments if both of the pointer types are ABI aligned.
-static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigType *dest_ptr_type,
+static Error ir_cast_ptr_align(IrAnalyze *ira, IrInst* source_instr, ZigType *dest_ptr_type,
         ZigType *src_ptr_type, AstNode *src_source_node)
 {
     Error err;
@@ -13394,37 +14444,37 @@ static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigT
     return ErrorNone;
 }
 
-static IrInstruction *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *struct_operand, TypeStructField *field)
+static IrInstGen *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *struct_operand, TypeStructField *field)
 {
-    IrInstruction *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
+    IrInstGen *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
     if (type_is_invalid(struct_ptr->value->type))
-        return ira->codegen->invalid_instruction;
-    IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
+        return ira->codegen->invalid_inst_gen;
+    IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
             struct_operand->value->type, false);
     if (type_is_invalid(field_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     return ir_get_deref(ira, source_instr, field_ptr, nullptr);
 }
 
-static IrInstruction *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *optional_operand, bool safety_check_on)
+static IrInstGen *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *optional_operand, bool safety_check_on)
 {
-    IrInstruction *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
-    IrInstruction *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
+    IrInstGen *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
+    IrInstGen *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
             safety_check_on, false);
     return ir_get_deref(ira, source_instr, payload_ptr, nullptr);
 }
 
-static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_instr,
-    ZigType *wanted_type, IrInstruction *value)
+static IrInstGen *ir_analyze_cast(IrAnalyze *ira, IrInst *source_instr,
+    ZigType *wanted_type, IrInstGen *value)
 {
     Error err;
     ZigType *actual_type = value->value->type;
     AstNode *source_node = source_instr->source_node;
 
     if (type_is_invalid(wanted_type) || type_is_invalid(actual_type)) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     // This means the wanted type is anything.
@@ -13436,7 +14486,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
     ConstCastOnly const_cast_result = types_match_const_cast_only(ira, wanted_type, actual_type,
             source_node, false);
     if (const_cast_result.id == ConstCastResultIdInvalid)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     if (const_cast_result.id == ConstCastResultIdOk) {
         return ir_resolve_cast(ira, source_instr, value, wanted_type, CastOpNoop);
     }
@@ -13470,7 +14520,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             if (ir_num_lit_fits_in_other_type(ira, value, wanted_child_type, true)) {
                 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
             } else {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (
             wanted_child_type->id == ZigTypeIdPointer &&
@@ -13480,18 +14530,18 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             actual_type->data.pointer.child_type->id == ZigTypeIdArray)
         {
             if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if ((err = type_resolve(ira->codegen, wanted_child_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_child_type) &&
                 types_match_const_cast_only(ira, wanted_child_type->data.pointer.child_type,
                 actual_type->data.pointer.child_type->data.array.child_type, source_node,
                 !wanted_child_type->data.pointer.is_const).id == ConstCastResultIdOk)
             {
-                IrInstruction *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
+                IrInstGen *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
                         wanted_child_type);
                 if (type_is_invalid(cast1->value->type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 return ir_analyze_optional_wrap(ira, source_instr, cast1, wanted_type, nullptr);
             }
         }
@@ -13509,7 +14559,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             if (ir_num_lit_fits_in_other_type(ira, value, wanted_type->data.error_union.payload_type, true)) {
                 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
             } else {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
     }
@@ -13525,13 +14575,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             actual_type->id == ZigTypeIdComptimeInt ||
             actual_type->id == ZigTypeIdComptimeFloat)
         {
-            IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
+            IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
             if (type_is_invalid(cast1->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
+            IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
             if (type_is_invalid(cast2->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             return cast2;
         }
@@ -13546,13 +14596,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
         wanted_type->id == ZigTypeIdFloat || wanted_type->id == ZigTypeIdComptimeFloat))
     {
         if (value->value->special == ConstValSpecialUndef) {
-            IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+            IrInstGen *result = ir_const(ira, source_instr, wanted_type);
             result->value->special = ConstValSpecialUndef;
             return result;
         }
         if (ir_num_lit_fits_in_other_type(ira, value, wanted_type, true)) {
             if (wanted_type->id == ZigTypeIdComptimeInt || wanted_type->id == ZigTypeIdInt) {
-                IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+                IrInstGen *result = ir_const(ira, source_instr, wanted_type);
                 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
                     copy_const_val(result->value, value->value);
                     result->value->type = wanted_type;
@@ -13561,7 +14611,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                 }
                 return result;
             } else if (wanted_type->id == ZigTypeIdComptimeFloat || wanted_type->id == ZigTypeIdFloat) {
-                IrInstruction *result = ir_const(ira, source_instr, wanted_type);
+                IrInstGen *result = ir_const(ira, source_instr, wanted_type);
                 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
                     BigFloat bf;
                     bigfloat_init_bigint(&bf, &value->value->data.x_bigint);
@@ -13573,7 +14623,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             }
             zig_unreachable();
         } else {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
@@ -13609,13 +14659,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
         actual_type->data.pointer.ptr_len == PtrLenSingle &&
         actual_type->data.pointer.child_type->id == ZigTypeIdArray)
     {
-        IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
+        IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
         if (type_is_invalid(cast1->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
+        IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
         if (type_is_invalid(cast2->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         return cast2;
     }
@@ -13636,9 +14686,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                  actual_array_type->data.array.sentinel)))
         {
             if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if ((err = type_resolve(ira->codegen, wanted_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_type) &&
                 types_match_const_cast_only(ira, wanted_type->data.pointer.child_type,
                     actual_type->data.pointer.child_type->data.array.child_type, source_node,
@@ -13679,24 +14729,24 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
                                 ResolveStatusAlignmentKnown)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
                                 ResolveStatusAlignmentKnown)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
             }
             if (ok_align) {
                 if (wanted_type->id == ZigTypeIdErrorUnion) {
-                    IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
+                    IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
                     if (type_is_invalid(cast1->value->type))
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
 
-                    IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
+                    IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
                     if (type_is_invalid(cast2->value->type))
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
 
                     return cast2;
                 } else {
@@ -13731,12 +14781,12 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
                                 ResolveStatusAlignmentKnown)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
                                 ResolveStatusAlignmentKnown)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
             }
@@ -13777,7 +14827,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                 }
             }
             if (ok) {
-                IrInstruction *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
+                IrInstGen *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
                 if (anyframe_type == wanted_type)
                     return cast1;
                 return ir_analyze_cast(ira, source_instr, wanted_type, cast1);
@@ -13832,28 +14882,28 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
     if (actual_type->id == ZigTypeIdEnumLiteral &&
         (wanted_type->id == ZigTypeIdOptional && wanted_type->data.maybe.child_type->id == ZigTypeIdEnum))
     {
-        IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
-        if (result == ira->codegen->invalid_instruction)
+        IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
+        if (type_is_invalid(result->value->type))
             return result;
 
-        return ir_analyze_optional_wrap(ira, result, value, wanted_type, nullptr);
+        return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
     }
 
     // cast from enum literal to error union when payload is an enum
     if (actual_type->id == ZigTypeIdEnumLiteral &&
         (wanted_type->id == ZigTypeIdErrorUnion && wanted_type->data.error_union.payload_type->id == ZigTypeIdEnum))
     {
-        IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
-        if (result == ira->codegen->invalid_instruction)
+        IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
+        if (type_is_invalid(result->value->type))
             return result;
 
-        return ir_analyze_err_wrap_payload(ira, result, value, wanted_type, nullptr);
+        return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
     }
 
     // cast from union to the enum type of the union
     if (actual_type->id == ZigTypeIdUnion && wanted_type->id == ZigTypeIdEnum) {
         if ((err = type_resolve(ira->codegen, actual_type, ResolveStatusZeroBitsKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (actual_type->data.unionation.tag_type == wanted_type) {
             return ir_analyze_union_to_tag(ira, source_instr, value, wanted_type);
@@ -13881,8 +14931,8 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             (!actual_type->data.pointer.is_const || wanted_type->data.pointer.is_const) &&
             (!actual_type->data.pointer.is_volatile || wanted_type->data.pointer.is_volatile))
         {
-            if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->source_node)))
-                return ira->codegen->invalid_instruction;
+            if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->base.source_node)))
+                return ira->codegen->invalid_inst_gen;
 
             return ir_analyze_ptr_to_array(ira, source_instr, value, wanted_type);
         }
@@ -13905,7 +14955,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
                         slice_ptr_type->data.pointer.sentinel))))
         {
             TypeStructField *ptr_field = actual_type->data.structure.fields[slice_ptr_index];
-            IrInstruction *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
+            IrInstGen *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
             return ir_implicit_cast2(ira, source_instr, slice_ptr, wanted_type);
         }
     }
@@ -13936,7 +14986,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
     {
         bool has_bits;
         if ((err = type_has_bits2(ira->codegen, actual_type, &has_bits)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (!has_bits) {
             return ir_get_ref(ira, source_instr, value, false, false);
         }
@@ -14003,9 +15053,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
 
     // T to ?U, where T implicitly casts to U
     if (wanted_type->id == ZigTypeIdOptional && actual_type->id != ZigTypeIdOptional) {
-        IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
+        IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
         if (type_is_invalid(cast1->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
     }
 
@@ -14013,9 +15063,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
     if (wanted_type->id == ZigTypeIdErrorUnion && actual_type->id != ZigTypeIdErrorUnion &&
         actual_type->id != ZigTypeIdErrorSet)
     {
-        IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
+        IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
         if (type_is_invalid(cast1->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
     }
 
@@ -14024,14 +15074,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
             buf_ptr(&wanted_type->name),
             buf_ptr(&actual_type->name)));
     report_recursive_error(ira, source_instr->source_node, &const_cast_result, parent_msg);
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
-        IrInstruction *value, ZigType *expected_type)
+static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
+        IrInstGen *value, ZigType *expected_type)
 {
     assert(value);
-    assert(value != ira->codegen->invalid_instruction);
     assert(!expected_type || !type_is_invalid(expected_type));
     assert(value->value->type);
     assert(!type_is_invalid(value->value->type));
@@ -14045,17 +15094,17 @@ static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_sou
     return ir_analyze_cast(ira, value_source_instr, expected_type, value);
 }
 
-static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type) {
-    return ir_implicit_cast2(ira, value, value, expected_type);
+static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type) {
+    return ir_implicit_cast2(ira, &value->base, value, expected_type);
 }
 
-static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
-    ir_assert(ptr->value->type->id == ZigTypeIdPointer, ptr);
+static ZigType *get_ptr_elem_type(CodeGen *g, IrInstGen *ptr) {
+    ir_assert_gen(ptr->value->type->id == ZigTypeIdPointer, ptr);
     ZigType *elem_type = ptr->value->type->data.pointer.child_type;
     if (elem_type != g->builtin_types.entry_var)
         return elem_type;
 
-    if (ir_resolve_lazy(g, ptr->source_node, ptr->value))
+    if (ir_resolve_lazy(g, ptr->base.source_node, ptr->value))
         return g->builtin_types.entry_invalid;
 
     assert(value_is_comptime(ptr->value));
@@ -14063,28 +15112,28 @@ static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
     return pointee->type;
 }
 
-static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
+static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *ptr,
         ResultLoc *result_loc)
 {
     Error err;
     ZigType *ptr_type = ptr->value->type;
     if (type_is_invalid(ptr_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (ptr_type->id != ZigTypeIdPointer) {
         ir_add_error_node(ira, source_instruction->source_node,
             buf_sprintf("attempt to dereference non-pointer type '%s'",
                 buf_ptr(&ptr_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *child_type = ptr_type->data.pointer.child_type;
     if (type_is_invalid(child_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     // if the child type has one possible value, the deref is comptime
     switch (type_has_one_possible_value(ira->codegen, child_type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
             return ir_const_move(ira, source_instruction,
                      get_the_one_possible_value(ira->codegen, child_type));
@@ -14093,8 +15142,8 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
     }
     if (instr_is_comptime(ptr)) {
         if (ptr->value->special == ConstValSpecialUndef) {
-            ir_add_error(ira, ptr, buf_sprintf("attempt to dereference undefined value"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &ptr->base, buf_sprintf("attempt to dereference undefined value"));
+            return ira->codegen->invalid_inst_gen;
         }
         if (ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
             ZigValue *pointee = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
@@ -14102,12 +15151,12 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
                 child_type = pointee->type;
             }
             if (pointee->special != ConstValSpecialRuntime) {
-                IrInstruction *result = ir_const(ira, source_instruction, child_type);
+                IrInstGen *result = ir_const(ira, source_instruction, child_type);
 
                 if ((err = ir_read_const_ptr(ira, ira->codegen, source_instruction->source_node, result->value,
                                 ptr->value)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 result->value->type = child_type;
                 return result;
@@ -14116,38 +15165,38 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
     }
 
     // if the instruction is a const ref instruction we can skip it
-    if (ptr->id == IrInstructionIdRef) {
-        IrInstructionRef *ref_inst = reinterpret_cast<IrInstructionRef *>(ptr);
-        return ref_inst->value;
+    if (ptr->id == IrInstGenIdRef) {
+        IrInstGenRef *ref_inst = reinterpret_cast<IrInstGenRef *>(ptr);
+        return ref_inst->operand;
     }
 
     // If the instruction is a element pointer instruction to a vector, we emit
     // vector element extract instruction rather than load pointer. If the
     // pointer type has non-VECTOR_INDEX_RUNTIME value, it would have been
-    // possible to implement this in the codegen for IrInstructionLoadPtrGen.
+    // possible to implement this in the codegen for IrInstGenLoadPtr.
     // However if it has VECTOR_INDEX_RUNTIME then we must emit a compile error
     // if the vector index cannot be determined right here, right now, because
     // the type information does not contain enough information to actually
     // perform a dereference.
     if (ptr_type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
-        if (ptr->id == IrInstructionIdElemPtr) {
-            IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
-            IrInstruction *vector_loaded = ir_get_deref(ira, elem_ptr->array_ptr,
+        if (ptr->id == IrInstGenIdElemPtr) {
+            IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
+            IrInstGen *vector_loaded = ir_get_deref(ira, &elem_ptr->array_ptr->base,
                     elem_ptr->array_ptr, nullptr);
-            IrInstruction *elem_index = elem_ptr->elem_index;
+            IrInstGen *elem_index = elem_ptr->elem_index;
             return ir_build_vector_extract_elem(ira, source_instruction, vector_loaded, elem_index);
         }
-        ir_add_error(ira, ptr,
+        ir_add_error(ira, &ptr->base,
             buf_sprintf("unable to determine vector element index of type '%s'", buf_ptr(&ptr_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *result_loc_inst;
+    IrInstGen *result_loc_inst;
     if (ptr_type->data.pointer.host_int_bytes != 0 && handle_is_ptr(child_type)) {
         if (result_loc == nullptr) result_loc = no_result_loc();
         result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr,
                 true, false, true);
-        if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
+        if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
             return result_loc_inst;
         }
     } else {
@@ -14157,7 +15206,7 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
     return ir_build_load_ptr_gen(ira, source_instruction, ptr, child_type, result_loc_inst);
 }
 
-static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
+static bool ir_resolve_const_align(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
         ZigValue *const_val, uint32_t *out)
 {
     Error err;
@@ -14166,12 +15215,12 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
 
     uint32_t align_bytes = bigint_as_u32(&const_val->data.x_bigint);
     if (align_bytes == 0) {
-        exec_add_error_node(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
+        exec_add_error_node_gen(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
         return false;
     }
 
     if (!is_power_of_2(align_bytes)) {
-        exec_add_error_node(codegen, exec, source_node,
+        exec_add_error_node_gen(codegen, exec, source_node,
                 buf_sprintf("alignment value %" PRIu32 " is not a power of 2", align_bytes));
         return false;
     }
@@ -14180,7 +15229,7 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
     return true;
 }
 
-static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem_type, uint32_t *out) {
+static bool ir_resolve_align(IrAnalyze *ira, IrInstGen *value, ZigType *elem_type, uint32_t *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
@@ -14201,19 +15250,19 @@ static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem
         }
     }
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
     if (type_is_invalid(casted_value->value->type))
         return false;
 
-    return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->source_node,
+    return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->base.source_node,
             casted_value->value, out);
 }
 
-static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *int_type, uint64_t *out) {
+static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstGen *value, ZigType *int_type, uint64_t *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, int_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, int_type);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14225,15 +15274,15 @@ static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *i
     return true;
 }
 
-static bool ir_resolve_usize(IrAnalyze *ira, IrInstruction *value, uint64_t *out) {
+static bool ir_resolve_usize(IrAnalyze *ira, IrInstGen *value, uint64_t *out) {
     return ir_resolve_unsigned(ira, value, ira->codegen->builtin_types.entry_usize, out);
 }
 
-static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
+static bool ir_resolve_bool(IrAnalyze *ira, IrInstGen *value, bool *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14245,7 +15294,7 @@ static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
     return true;
 }
 
-static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out) {
+static bool ir_resolve_comptime(IrAnalyze *ira, IrInstGen *value, bool *out) {
     if (!value) {
         *out = false;
         return true;
@@ -14253,13 +15302,13 @@ static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out)
     return ir_resolve_bool(ira, value, out);
 }
 
-static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, AtomicOrder *out) {
+static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstGen *value, AtomicOrder *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
     ZigType *atomic_order_type = get_builtin_type(ira->codegen, "AtomicOrder");
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14271,13 +15320,13 @@ static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, Atomic
     return true;
 }
 
-static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, AtomicRmwOp *out) {
+static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstGen *value, AtomicRmwOp *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
     ZigType *atomic_rmw_op_type = get_builtin_type(ira->codegen, "AtomicRmwOp");
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14289,13 +15338,13 @@ static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, Atomi
     return true;
 }
 
-static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, GlobalLinkageId *out) {
+static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstGen *value, GlobalLinkageId *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
     ZigType *global_linkage_type = get_builtin_type(ira->codegen, "GlobalLinkage");
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14307,13 +15356,13 @@ static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, Glob
     return true;
 }
 
-static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMode *out) {
+static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstGen *value, FloatMode *out) {
     if (type_is_invalid(value->value->type))
         return false;
 
     ZigType *float_mode_type = get_builtin_type(ira->codegen, "FloatMode");
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, float_mode_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, float_mode_type);
     if (type_is_invalid(casted_value->value->type))
         return false;
 
@@ -14325,14 +15374,14 @@ static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMod
     return true;
 }
 
-static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
+static Buf *ir_resolve_str(IrAnalyze *ira, IrInstGen *value) {
     if (type_is_invalid(value->value->type))
         return nullptr;
 
     ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
             true, false, PtrLenUnknown, 0, 0, 0, false);
     ZigType *str_type = get_slice_type(ira->codegen, ptr_type);
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, str_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, str_type);
     if (type_is_invalid(casted_value->value->type))
         return nullptr;
 
@@ -14356,7 +15405,7 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
         size_t new_index = ptr_field->data.x_ptr.data.base_array.elem_index + i;
         ZigValue *char_val = &array_val->data.x_array.data.s_none.elements[new_index];
         if (char_val->special == ConstValSpecialUndef) {
-            ir_add_error(ira, casted_value, buf_sprintf("use of undefined value"));
+            ir_add_error(ira, &casted_value->base, buf_sprintf("use of undefined value"));
             return nullptr;
         }
         uint64_t big_c = bigint_as_u64(&char_val->data.x_bigint);
@@ -14367,10 +15416,10 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
-        IrInstructionAddImplicitReturnType *instruction)
+static IrInstGen *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
+        IrInstSrcAddImplicitReturnType *instruction)
 {
-    IrInstruction *value = instruction->value->child;
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
         return ir_unreach_error(ira);
 
@@ -14378,15 +15427,15 @@ static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze
         ira->src_implicit_return_type_list.append(value);
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructionReturn *instruction) {
-    IrInstruction *operand = instruction->operand->child;
+static IrInstGen *ir_analyze_instruction_return(IrAnalyze *ira, IrInstSrcReturn *instruction) {
+    IrInstGen *operand = instruction->operand->child;
     if (type_is_invalid(operand->value->type))
         return ir_unreach_error(ira);
 
-    IrInstruction *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
+    IrInstGen *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
     if (type_is_invalid(casted_operand->value->type)) {
         AstNode *source_node = ira->explicit_return_type_source_node;
         if (source_node != nullptr) {
@@ -14401,9 +15450,7 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
             handle_is_ptr(ira->explicit_return_type))
     {
         // result location mechanism took care of it.
-        IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
-                instruction->base.source_node, nullptr);
-        result->value->type = ira->codegen->builtin_types.entry_unreachable;
+        IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, nullptr);
         return ir_finish_anal(ira, result);
     }
 
@@ -14411,47 +15458,45 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
         casted_operand->value->type->id == ZigTypeIdPointer &&
         casted_operand->value->data.rh_ptr == RuntimeHintPtrStack)
     {
-        ir_add_error(ira, casted_operand, buf_sprintf("function returns address of local variable"));
+        ir_add_error(ira, &casted_operand->base, buf_sprintf("function returns address of local variable"));
         return ir_unreach_error(ira);
     }
 
-    IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, casted_operand);
-    result->value->type = ira->codegen->builtin_types.entry_unreachable;
+    IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, casted_operand);
     return ir_finish_anal(ira, result);
 }
 
-static IrInstruction *ir_analyze_instruction_const(IrAnalyze *ira, IrInstructionConst *instruction) {
-    return ir_const_move(ira, &instruction->base, instruction->base.value);
+static IrInstGen *ir_analyze_instruction_const(IrAnalyze *ira, IrInstSrcConst *instruction) {
+    return ir_const_move(ira, &instruction->base.base, instruction->value);
 }
 
-static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
-    IrInstruction *op1 = bin_op_instruction->op1->child;
+static IrInstGen *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
+    IrInstGen *op1 = bin_op_instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = bin_op_instruction->op2->child;
+    IrInstGen *op2 = bin_op_instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
-    if (casted_op1 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
+    if (type_is_invalid(casted_op1->value->type))
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
-    if (casted_op2 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
+    if (type_is_invalid(casted_op2->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
         ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         assert(casted_op1->value->type->id == ZigTypeIdBool);
         assert(casted_op2->value->type->id == ZigTypeIdBool);
@@ -14463,14 +15508,11 @@ static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp
         } else {
             zig_unreachable();
         }
-        return ir_const_bool(ira, &bin_op_instruction->base, result_bool);
+        return ir_const_bool(ira, &bin_op_instruction->base.base, result_bool);
     }
 
-    IrInstruction *result = ir_build_bin_op(&ira->new_irb,
-            bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
+    return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, bool_type,
             bin_op_instruction->op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
-    result->value->type = bool_type;
-    return result;
 }
 
 static bool resolve_cmp_op_id(IrBinOp op_id, Cmp cmp) {
@@ -14535,12 +15577,13 @@ static void set_optional_payload(ZigValue *opt_val, ZigValue *payload) {
     }
 }
 
-static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
-    ZigValue *op1_val, ZigValue *op2_val, IrInstructionBinOp *bin_op_instruction, IrBinOp op_id,
-    bool one_possible_value) {
+static IrInstGen *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
+    ZigValue *op1_val, ZigValue *op2_val, IrInstSrcBinOp *bin_op_instruction, IrBinOp op_id,
+    bool one_possible_value)
+{
     if (op1_val->special == ConstValSpecialUndef ||
         op2_val->special == ConstValSpecialUndef)
-        return ir_const_undef(ira, &bin_op_instruction->base, resolved_type);
+        return ir_const_undef(ira, &bin_op_instruction->base.base, resolved_type);
     if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
         if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
                 op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
@@ -14560,7 +15603,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
                 cmp_result = CmpEQ;
             }
             bool answer = resolve_cmp_op_id(op_id, cmp_result);
-            return ir_const_bool(ira, &bin_op_instruction->base, answer);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
         }
     } else {
         bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
@@ -14572,7 +15615,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
         } else {
             zig_unreachable();
         }
-        return ir_const_bool(ira, &bin_op_instruction->base, answer);
+        return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
     }
     zig_unreachable();
 }
@@ -14626,7 +15669,7 @@ static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {
     zig_unreachable();
 }
 
-static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInstruction *source_instr,
+static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInst* source_instr,
     ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
 {
     Error err;
@@ -14704,14 +15747,14 @@ never_mind_just_calculate_it_normally:
             return nullptr;
         }
         if (op1_val->type->id == ZigTypeIdComptimeFloat) {
-            IrInstruction *tmp = ir_const_noval(ira, source_instr);
+            IrInstGen *tmp = ir_const_noval(ira, source_instr);
             tmp->value = op1_val;
-            IrInstruction *casted = ir_implicit_cast(ira, tmp, op2_val->type);
+            IrInstGen *casted = ir_implicit_cast(ira, tmp, op2_val->type);
             op1_val = casted->value;
         } else if (op2_val->type->id == ZigTypeIdComptimeFloat) {
-            IrInstruction *tmp = ir_const_noval(ira, source_instr);
+            IrInstGen *tmp = ir_const_noval(ira, source_instr);
             tmp->value = op2_val;
-            IrInstruction *casted = ir_implicit_cast(ira, tmp, op1_val->type);
+            IrInstGen *casted = ir_implicit_cast(ira, tmp, op1_val->type);
             op2_val = casted->value;
         }
         Cmp cmp_result = float_cmp(op1_val, op2_val);
@@ -14753,8 +15796,8 @@ never_mind_just_calculate_it_normally:
     return nullptr;
 }
 
-static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *op1, IrInstruction *op2, IrBinOp op_id)
+static IrInstGen *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInst *source_instr,
+        IrInstGen *op1, IrInstGen *op2, IrBinOp op_id)
 {
     Error err;
 
@@ -14767,7 +15810,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
             ir_add_error(ira, source_instr,
                 buf_sprintf("vector length mismatch: %" PRIu32 " and %" PRIu32,
                     op1->value->type->data.vector.len, op2->value->type->data.vector.len));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         result_type = get_vector_type(ira->codegen, op1->value->type->data.vector.len, scalar_result_type);
         op1_scalar_type = op1->value->type->data.vector.elem_type;
@@ -14776,13 +15819,13 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
         ir_add_error(ira, source_instr,
             buf_sprintf("mixed scalar and vector operands to comparison operator: '%s' and '%s'",
                 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     bool opv_op1;
     switch (type_has_one_possible_value(ira->codegen, op1->value->type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
             opv_op1 = true;
             break;
@@ -14793,7 +15836,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
     bool opv_op2;
     switch (type_has_one_possible_value(ira->codegen, op2->value->type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
             opv_op2 = true;
             break;
@@ -14804,21 +15847,21 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
     Cmp op1_cmp_zero;
     bool have_op1_cmp_zero = false;
     if ((err = lazy_cmp_zero(source_instr->source_node, op1->value, &op1_cmp_zero))) {
-        if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
+        if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
     } else {
         have_op1_cmp_zero = true;
     }
     Cmp op2_cmp_zero;
     bool have_op2_cmp_zero = false;
     if ((err = lazy_cmp_zero(source_instr->source_node, op2->value, &op2_cmp_zero))) {
-        if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
+        if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
     } else {
         have_op2_cmp_zero = true;
     }
     if (((opv_op1 || instr_is_comptime(op1)) && (opv_op2 || instr_is_comptime(op2))) ||
         (have_op1_cmp_zero && have_op2_cmp_zero))
     {
-        IrInstruction *result_instruction = ir_const(ira, source_instr, result_type);
+        IrInstGen *result_instruction = ir_const(ira, source_instr, result_type);
         ZigValue *out_val = result_instruction->value;
         if (result_type->id == ZigTypeIdVector) {
             size_t len = result_type->data.vector.len;
@@ -14836,7 +15879,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
                 if (msg != nullptr) {
                     add_error_note(ira->codegen, msg, source_instr->source_node,
                         buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
             }
             out_val->type = result_type;
@@ -14845,7 +15888,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
             if (ir_eval_bin_op_cmp_scalar(ira, source_instr, op1->value, op_id,
                         op2->value, out_val) != nullptr)
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         return result_instruction;
@@ -14939,10 +15982,10 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
         }
         ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
             get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
-        IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
-        IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
+        IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
+        IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
         if (type_is_invalid(casted_op1->value->type) || type_is_invalid(casted_op2->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
     }
 
@@ -14972,12 +16015,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
     if (instr_is_comptime(op1)) {
         ZigValue *op1_val = ir_resolve_const(ira, op1, UndefOk);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (op1_val->special == ConstValSpecialUndef)
             return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
         if (result_type->id == ZigTypeIdVector) {
-            ir_add_error(ira, op1, buf_sprintf("compiler bug: TODO: support comptime vector here"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &op1->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
+            return ira->codegen->invalid_inst_gen;
         }
         bool is_unsigned;
         if (op1_is_float) {
@@ -15016,12 +16059,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
     if (instr_is_comptime(op2)) {
         ZigValue *op2_val = ir_resolve_const(ira, op2, UndefOk);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (op2_val->special == ConstValSpecialUndef)
             return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
         if (result_type->id == ZigTypeIdVector) {
-            ir_add_error(ira, op2, buf_sprintf("compiler bug: TODO: support comptime vector here"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &op2->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
+            return ira->codegen->invalid_inst_gen;
         }
         bool is_unsigned;
         if (op2_is_float) {
@@ -15062,35 +16105,35 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
     ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
         get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
     if (type_is_invalid(casted_op1->value->type))
-        return ira->codegen->invalid_instruction;
-    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
+        return ira->codegen->invalid_inst_gen;
+    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
     if (type_is_invalid(casted_op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
 }
 
-static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
-    IrInstruction *op1 = bin_op_instruction->op1->child;
+static IrInstGen *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
+    IrInstGen *op1 = bin_op_instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = bin_op_instruction->op2->child;
+    IrInstGen *op2 = bin_op_instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    AstNode *source_node = bin_op_instruction->base.source_node;
+    AstNode *source_node = bin_op_instruction->base.base.source_node;
 
     IrBinOp op_id = bin_op_instruction->op_id;
     bool is_equality_cmp = (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq);
     if (is_equality_cmp && op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdNull) {
-        return ir_const_bool(ira, &bin_op_instruction->base, (op_id == IrBinOpCmpEq));
+        return ir_const_bool(ira, &bin_op_instruction->base.base, (op_id == IrBinOpCmpEq));
     } else if (is_equality_cmp &&
         ((op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdOptional) ||
         (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdOptional)))
     {
-        IrInstruction *maybe_op;
+        IrInstGen *maybe_op;
         if (op1->value->type->id == ZigTypeIdNull) {
             maybe_op = op2;
         } else if (op2->value->type->id == ZigTypeIdNull) {
@@ -15101,21 +16144,16 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
         if (instr_is_comptime(maybe_op)) {
             ZigValue *maybe_val = ir_resolve_const(ira, maybe_op, UndefBad);
             if (!maybe_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             bool is_null = optional_value_is_null(maybe_val);
             bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
-            return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
         }
 
-        IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
-            source_node, maybe_op);
-        is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
+        IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, maybe_op);
 
         if (op_id == IrBinOpCmpEq) {
-            IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
-                bin_op_instruction->base.source_node, is_non_null);
-            result->value->type = ira->codegen->builtin_types.entry_bool;
-            return result;
+            return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
         } else {
             return is_non_null;
         }
@@ -15125,7 +16163,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
         (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdPointer &&
             op1->value->type->data.pointer.ptr_len == PtrLenC)))
     {
-        IrInstruction *c_ptr_op;
+        IrInstGen *c_ptr_op;
         if (op1->value->type->id == ZigTypeIdNull) {
             c_ptr_op = op2;
         } else if (op2->value->type->id == ZigTypeIdNull) {
@@ -15136,24 +16174,19 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
         if (instr_is_comptime(c_ptr_op)) {
             ZigValue *c_ptr_val = ir_resolve_const(ira, c_ptr_op, UndefOk);
             if (!c_ptr_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (c_ptr_val->special == ConstValSpecialUndef)
-                return ir_const_undef(ira, &bin_op_instruction->base, ira->codegen->builtin_types.entry_bool);
+                return ir_const_undef(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool);
             bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
                 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
                     c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
             bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
-            return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
         }
-        IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
-            source_node, c_ptr_op);
-        is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
+        IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, c_ptr_op);
 
         if (op_id == IrBinOpCmpEq) {
-            IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
-                bin_op_instruction->base.source_node, is_non_null);
-            result->value->type = ira->codegen->builtin_types.entry_bool;
-            return result;
+            return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
         } else {
             return is_non_null;
         }
@@ -15161,61 +16194,57 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
         ZigType *non_null_type = (op1->value->type->id == ZigTypeIdNull) ? op2->value->type : op1->value->type;
         ir_add_error_node(ira, source_node, buf_sprintf("comparison of '%s' with null",
             buf_ptr(&non_null_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (is_equality_cmp && (
         (op1->value->type->id == ZigTypeIdEnumLiteral && op2->value->type->id == ZigTypeIdUnion) ||
         (op2->value->type->id == ZigTypeIdEnumLiteral && op1->value->type->id == ZigTypeIdUnion)))
     {
         // Support equality comparison between a union's tag value and a enum literal
-        IrInstruction *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
-        IrInstruction *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
+        IrInstGen *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
+        IrInstGen *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
 
         ZigType *tag_type = union_val->value->type->data.unionation.tag_type;
         assert(tag_type != nullptr);
 
-        IrInstruction *casted_union = ir_implicit_cast(ira, union_val, tag_type);
+        IrInstGen *casted_union = ir_implicit_cast(ira, union_val, tag_type);
         if (type_is_invalid(casted_union->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
+        IrInstGen *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
         if (type_is_invalid(casted_val->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (instr_is_comptime(casted_union)) {
             ZigValue *const_union_val = ir_resolve_const(ira, casted_union, UndefBad);
             if (!const_union_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             ZigValue *const_enum_val = ir_resolve_const(ira, casted_val, UndefBad);
             if (!const_enum_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             Cmp cmp_result = bigint_cmp(&const_union_val->data.x_union.tag, &const_enum_val->data.x_enum_tag);
             bool bool_result = (op_id == IrBinOpCmpEq) ? cmp_result == CmpEQ : cmp_result != CmpEQ;
 
-            return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
         }
 
-        IrInstruction *result = ir_build_bin_op(&ira->new_irb,
-            bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
+        return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
             op_id, casted_union, casted_val, bin_op_instruction->safety_check_on);
-        result->value->type = ira->codegen->builtin_types.entry_bool;
-
-        return result;
     }
 
     if (op1->value->type->id == ZigTypeIdErrorSet && op2->value->type->id == ZigTypeIdErrorSet) {
         if (!is_equality_cmp) {
             ir_add_error_node(ira, source_node, buf_sprintf("operator not allowed for errors"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         ZigType *intersect_type = get_error_set_intersection(ira, op1->value->type, op2->value->type, source_node);
         if (type_is_invalid(intersect_type)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (!resolve_inferred_error_set(ira->codegen, intersect_type, source_node)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         // exception if one of the operators has the type of the empty error set, we allow the comparison
@@ -15232,7 +16261,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
             } else {
                 zig_unreachable();
             }
-            return ir_const_bool(ira, &bin_op_instruction->base, answer);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
         }
 
         if (!type_is_global_error_set(intersect_type)) {
@@ -15240,7 +16269,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
                 ir_add_error_node(ira, source_node,
                     buf_sprintf("error sets '%s' and '%s' have no common errors",
                         buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             if (op1->value->type->data.error_set.err_count == 1 && op2->value->type->data.error_set.err_count == 1) {
                 bool are_equal = true;
@@ -15252,17 +16281,17 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
                 } else {
                     zig_unreachable();
                 }
-                return ir_const_bool(ira, &bin_op_instruction->base, answer);
+                return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
             }
         }
 
         if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
             ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
             if (op1_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
             if (op2_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             bool answer;
             bool are_equal = op1_val->data.x_err_set->value == op2_val->data.x_err_set->value;
@@ -15274,27 +16303,24 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
                 zig_unreachable();
             }
 
-            return ir_const_bool(ira, &bin_op_instruction->base, answer);
+            return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
         }
 
-        IrInstruction *result = ir_build_bin_op(&ira->new_irb,
-                bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
+        return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
                 op_id, op1, op2, bin_op_instruction->safety_check_on);
-        result->value->type = ira->codegen->builtin_types.entry_bool;
-        return result;
     }
 
     if (type_is_numeric(op1->value->type) && type_is_numeric(op2->value->type)) {
         // This operation allows any combination of integer and float types, regardless of the
         // signed-ness, comptime-ness, and bit-width. So peer type resolution is incorrect for
         // numeric types.
-        return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base, op1, op2, op_id);
+        return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base.base, op1, op2, op_id);
     }
 
-    IrInstruction *instructions[] = {op1, op2};
+    IrInstGen *instructions[] = {op1, op2};
     ZigType *resolved_type = ir_resolve_peer_types(ira, source_node, nullptr, instructions, 2);
     if (type_is_invalid(resolved_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool operator_allowed;
     switch (resolved_type->id) {
@@ -15342,21 +16368,21 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
     if (!operator_allowed) {
         ir_add_error_node(ira, source_node,
             buf_sprintf("operator not allowed for type '%s'", buf_ptr(&resolved_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
-    if (casted_op1 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
+    if (type_is_invalid(casted_op1->value->type))
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
-    if (casted_op2 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
+    if (type_is_invalid(casted_op2->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     bool one_possible_value;
     switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
             one_possible_value = true;
             break;
@@ -15368,20 +16394,20 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
     if (one_possible_value || (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2))) {
         ZigValue *op1_val = one_possible_value ? casted_op1->value : ir_resolve_const(ira, casted_op1, UndefBad);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigValue *op2_val = one_possible_value ? casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (resolved_type->id != ZigTypeIdVector)
             return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);
-        IrInstruction *result = ir_const(ira, &bin_op_instruction->base,
+        IrInstGen *result = ir_const(ira, &bin_op_instruction->base.base,
             get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));
         result->value->data.x_array.data.s_none.elements =
             create_const_vals(resolved_type->data.vector.len);
 
         expand_undef_array(ira->codegen, result->value);
         for (size_t i = 0;i < resolved_type->data.vector.len;i++) {
-            IrInstruction *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
+            IrInstGen *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
                 &op1_val->data.x_array.data.s_none.elements[i],
                 &op2_val->data.x_array.data.s_none.elements[i],
                 bin_op_instruction, op_id, one_possible_value);
@@ -15390,19 +16416,14 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
         return result;
     }
 
-    IrInstruction *result = ir_build_bin_op(&ira->new_irb,
-            bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
+    ZigType *res_type = (resolved_type->id == ZigTypeIdVector) ?
+        get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool) :
+        ira->codegen->builtin_types.entry_bool;
+    return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, res_type,
             op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
-    if (resolved_type->id == ZigTypeIdVector) {
-        result->value->type = get_vector_type(ira->codegen, resolved_type->data.vector.len,
-            ira->codegen->builtin_types.entry_bool);
-    } else {
-        result->value->type = ira->codegen->builtin_types.entry_bool;
-    }
-    return result;
 }
 
-static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
+static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
         ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
 {
     bool is_int;
@@ -15582,10 +16603,10 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_in
 }
 
 // This works on operands that have already been checked to be comptime known.
-static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_instr,
+static IrInstGen *ir_analyze_math_op(IrAnalyze *ira, IrInst* source_instr,
         ZigType *type_entry, ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val)
 {
-    IrInstruction *result_instruction = ir_const(ira, source_instr, type_entry);
+    IrInstGen *result_instruction = ir_const(ira, source_instr, type_entry);
     ZigValue *out_val = result_instruction->value;
     if (type_entry->id == ZigTypeIdVector) {
         expand_undef_array(ira->codegen, op1_val);
@@ -15606,43 +16627,43 @@ static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_i
             if (msg != nullptr) {
                 add_error_note(ira->codegen, msg, source_instr->source_node,
                     buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         out_val->type = type_entry;
         out_val->special = ConstValSpecialStatic;
     } else {
         if (ir_eval_math_op_scalar(ira, source_instr, type_entry, op1_val, op_id, op2_val, out_val) != nullptr) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
     return ir_implicit_cast(ira, result_instruction, type_entry);
 }
 
-static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
-    IrInstruction *op1 = bin_op_instruction->op1->child;
+static IrInstGen *ir_analyze_bit_shift(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
+    IrInstGen *op1 = bin_op_instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (op1->value->type->id != ZigTypeIdInt && op1->value->type->id != ZigTypeIdComptimeInt) {
-        ir_add_error(ira, bin_op_instruction->op1,
+        ir_add_error(ira, &bin_op_instruction->op1->base,
             buf_sprintf("bit shifting operation expected integer type, found '%s'",
                 buf_ptr(&op1->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *op2 = bin_op_instruction->op2->child;
+    IrInstGen *op2 = bin_op_instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (op2->value->type->id != ZigTypeIdInt && op2->value->type->id != ZigTypeIdComptimeInt) {
-        ir_add_error(ira, bin_op_instruction->op2,
+        ir_add_error(ira, &bin_op_instruction->op2->base,
             buf_sprintf("shift amount has to be an integer type, but found '%s'",
                 buf_ptr(&op2->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *casted_op2;
+    IrInstGen *casted_op2;
     IrBinOp op_id = bin_op_instruction->op_id;
     if (op1->value->type->id == ZigTypeIdComptimeInt) {
         casted_op2 = op2;
@@ -15654,8 +16675,8 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
         if (casted_op2->value->data.x_bigint.is_negative) {
             Buf *val_buf = buf_alloc();
             bigint_append_buf(val_buf, &casted_op2->value->data.x_bigint, 10);
-            ir_add_error(ira, casted_op2, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &casted_op2->base, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
+            return ira->codegen->invalid_inst_gen;
         }
     } else {
         ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
@@ -15665,57 +16686,51 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
 
             ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
             if (op2_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (!bigint_fits_in_bits(&op2_val->data.x_bigint,
                                      shift_amt_type->data.integral.bit_count,
                                      op2_val->data.x_bigint.is_negative)) {
                 Buf *val_buf = buf_alloc();
                 bigint_append_buf(val_buf, &op2_val->data.x_bigint, 10);
                 ErrorMsg* msg = ir_add_error(ira,
-                    &bin_op_instruction->base,
+                    &bin_op_instruction->base.base,
                     buf_sprintf("RHS of shift is too large for LHS type"));
                 add_error_note(
                     ira->codegen,
                     msg,
-                    op2->source_node,
+                    op2->base.source_node,
                     buf_sprintf("value %s cannot fit into type %s",
                         buf_ptr(val_buf),
                         buf_ptr(&shift_amt_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
         casted_op2 = ir_implicit_cast(ira, op2, shift_amt_type);
-        if (casted_op2 == ira->codegen->invalid_instruction)
-            return ira->codegen->invalid_instruction;
+        if (type_is_invalid(casted_op2->value->type))
+            return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(op1) && instr_is_comptime(casted_op2)) {
         ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_analyze_math_op(ira, &bin_op_instruction->base, op1->value->type, op1_val, op_id, op2_val);
+        return ir_analyze_math_op(ira, &bin_op_instruction->base.base, op1->value->type, op1_val, op_id, op2_val);
     } else if (op1->value->type->id == ZigTypeIdComptimeInt) {
-        ir_add_error(ira, &bin_op_instruction->base,
+        ir_add_error(ira, &bin_op_instruction->base.base,
                 buf_sprintf("LHS of shift must be an integer type, or RHS must be compile-time known"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (instr_is_comptime(casted_op2) && bigint_cmp_zero(&casted_op2->value->data.x_bigint) == CmpEQ) {
-        IrInstruction *result = ir_build_cast(&ira->new_irb, bin_op_instruction->base.scope,
-                bin_op_instruction->base.source_node, op1->value->type, op1, CastOpNoop);
-        result->value->type = op1->value->type;
-        return result;
+        return ir_build_cast(ira, &bin_op_instruction->base.base, op1->value->type, op1, CastOpNoop);
     }
 
-    IrInstruction *result = ir_build_bin_op(&ira->new_irb, bin_op_instruction->base.scope,
-            bin_op_instruction->base.source_node, op_id,
-            op1, casted_op2, bin_op_instruction->safety_check_on);
-    result->value->type = op1->value->type;
-    return result;
+    return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, op1->value->type,
+            op_id, op1, casted_op2, bin_op_instruction->safety_check_on);
 }
 
 static bool ok_float_op(IrBinOp op) {
@@ -15779,24 +16794,24 @@ static bool is_pointer_arithmetic_allowed(ZigType *lhs_type, IrBinOp op) {
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp *instruction) {
+static IrInstGen *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
     Error err;
 
-    IrInstruction *op1 = instruction->op1->child;
+    IrInstGen *op1 = instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = instruction->op2->child;
+    IrInstGen *op2 = instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     IrBinOp op_id = instruction->op_id;
 
     // look for pointer math
     if (is_pointer_arithmetic_allowed(op1->value->type, op_id)) {
-        IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
+        IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
         if (type_is_invalid(casted_op2->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         // If either operand is undef, result is undef.
         ZigValue *op1_val = nullptr;
@@ -15804,28 +16819,28 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
         if (instr_is_comptime(op1)) {
             op1_val = ir_resolve_const(ira, op1, UndefOk);
             if (op1_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (op1_val->special == ConstValSpecialUndef)
-                return ir_const_undef(ira, &instruction->base, op1->value->type);
+                return ir_const_undef(ira, &instruction->base.base, op1->value->type);
         }
         if (instr_is_comptime(casted_op2)) {
             op2_val = ir_resolve_const(ira, casted_op2, UndefOk);
             if (op2_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (op2_val->special == ConstValSpecialUndef)
-                return ir_const_undef(ira, &instruction->base, op1->value->type);
+                return ir_const_undef(ira, &instruction->base.base, op1->value->type);
         }
 
         ZigType *elem_type = op1->value->type->data.pointer.child_type;
         if ((err = type_resolve(ira->codegen, elem_type, ResolveStatusSizeKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         // NOTE: this variable is meaningful iff op2_val is not null!
         uint64_t byte_offset;
         if (op2_val != nullptr) {
             uint64_t elem_offset;
             if (!ir_resolve_usize(ira, casted_op2, &elem_offset))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             byte_offset = type_size(ira->codegen, elem_type) * elem_offset;
         }
@@ -15840,7 +16855,7 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
         {
             uint32_t align_bytes;
             if ((err = resolve_ptr_align(ira, op1->value->type, &align_bytes)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             // If the addend is not a comptime-known value we can still count on
             // it being a multiple of the type size
@@ -15869,23 +16884,20 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
             } else {
                 zig_unreachable();
             }
-            IrInstruction *result = ir_const(ira, &instruction->base, result_type);
+            IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
             result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
             result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
             result->value->data.x_ptr.data.hard_coded_addr.addr = new_addr;
             return result;
         }
 
-        IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
-                instruction->base.source_node, op_id, op1, casted_op2, true);
-        result->value->type = result_type;
-        return result;
+        return ir_build_bin_op_gen(ira, &instruction->base.base, result_type, op_id, op1, casted_op2, true);
     }
 
-    IrInstruction *instructions[] = {op1, op2};
-    ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.source_node, nullptr, instructions, 2);
+    IrInstGen *instructions[] = {op1, op2};
+    ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.base.source_node, nullptr, instructions, 2);
     if (type_is_invalid(resolved_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool is_int = resolved_type->id == ZigTypeIdInt || resolved_type->id == ZigTypeIdComptimeInt;
     bool is_float = resolved_type->id == ZigTypeIdFloat || resolved_type->id == ZigTypeIdComptimeFloat;
@@ -15905,11 +16917,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
             if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
                 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
                 if (op1_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
                 if (op2_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 if (bigint_cmp_zero(&op2_val->data.x_bigint) == CmpEQ) {
                     // the division by zero error will be caught later, but we don't have a
@@ -15928,11 +16940,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
                 }
             }
             if (!ok) {
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("division with '%s' and '%s': signed integers must use @divTrunc, @divFloor, or @divExact",
                         buf_ptr(&op1->value->type->name),
                         buf_ptr(&op2->value->type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else {
             op_id = IrBinOpDivTrunc;
@@ -15943,12 +16955,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
             if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
                 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
                 if (op1_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 if (is_int) {
                     ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
                     if (op2_val == nullptr)
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
 
                     if (bigint_cmp_zero(&op2->value->data.x_bigint) == CmpEQ) {
                         // the division by zero error will be caught later, but we don't
@@ -15962,13 +16974,13 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
                         ok = bigint_cmp(&rem_result, &mod_result) == CmpEQ;
                     }
                 } else {
-                    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
-                    if (casted_op2 == ira->codegen->invalid_instruction)
-                        return ira->codegen->invalid_instruction;
+                    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
+                    if (type_is_invalid(casted_op2->value->type))
+                        return ira->codegen->invalid_inst_gen;
 
                     ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
                     if (op2_val == nullptr)
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
 
                     if (float_cmp_zero(casted_op2->value) == CmpEQ) {
                         // the division by zero error will be caught later, but we don't
@@ -15984,11 +16996,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
                 }
             }
             if (!ok) {
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("remainder division with '%s' and '%s': signed integers and floats must use @rem or @mod",
                         buf_ptr(&op1->value->type->name),
                         buf_ptr(&op2->value->type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         op_id = IrBinOpRemRem;
@@ -16008,12 +17020,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
         }
     }
     if (!ok) {
-        AstNode *source_node = instruction->base.source_node;
+        AstNode *source_node = instruction->base.base.source_node;
         ir_add_error_node(ira, source_node,
             buf_sprintf("invalid operands to binary expression: '%s' and '%s'",
                 buf_ptr(&op1->value->type->name),
                 buf_ptr(&op2->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (resolved_type->id == ZigTypeIdComptimeInt) {
@@ -16026,33 +17038,31 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
         }
     }
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
-    if (casted_op1 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
+    if (type_is_invalid(casted_op1->value->type))
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
-    if (casted_op2 == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
+    if (type_is_invalid(casted_op2->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
         ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_analyze_math_op(ira, &instruction->base, resolved_type, op1_val, op_id, op2_val);
+        return ir_analyze_math_op(ira, &instruction->base.base, resolved_type, op1_val, op_id, op2_val);
     }
 
-    IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, op_id, casted_op1, casted_op2, instruction->safety_check_on);
-    result->value->type = resolved_type;
-    return result;
+    return ir_build_bin_op_gen(ira, &instruction->base.base, resolved_type,
+            op_id, casted_op1, casted_op2, instruction->safety_check_on);
 }
 
-static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *op1, IrInstruction *op2)
+static IrInstGen *ir_analyze_tuple_cat(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *op1, IrInstGen *op2)
 {
     Error err;
     ZigType *op1_type = op1->value->type;
@@ -16069,9 +17079,9 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
     new_type->data.structure.special = StructSpecialInferredTuple;
     new_type->data.structure.resolve_status = ResolveStatusBeingInferred;
 
-    bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instr->scope);
+    bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope);
 
-    IrInstruction *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
+    IrInstGen *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
             new_type, nullptr, false, false, true);
     uint32_t new_field_count = op1_field_count + op2_field_count;
 
@@ -16095,13 +17105,13 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
         new_field->is_comptime = src_field->is_comptime;
     }
     if ((err = type_resolve(ira->codegen, new_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ZigList<IrInstruction *> const_ptrs = {};
-    IrInstruction *first_non_const_instruction = nullptr;
+    ZigList<IrInstGen *> const_ptrs = {};
+    IrInstGen *first_non_const_instruction = nullptr;
     for (uint32_t i = 0; i < new_field_count; i += 1) {
         TypeStructField *dst_field = new_type->data.structure.fields[i];
-        IrInstruction *src_struct_op;
+        IrInstGen *src_struct_op;
         TypeStructField *src_field;
         if (i < op1_field_count) {
             src_field = op1_type->data.structure.fields[i];
@@ -16110,73 +17120,73 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
             src_field = op2_type->data.structure.fields[i - op1_field_count];
             src_struct_op = op2;
         }
-        IrInstruction *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
+        IrInstGen *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
                 src_struct_op, src_field);
         if (type_is_invalid(field_value->value->type))
-            return ira->codegen->invalid_instruction;
-        IrInstruction *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
+            return ira->codegen->invalid_inst_gen;
+        IrInstGen *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
                 new_struct_ptr, new_type, true);
         if (type_is_invalid(dest_ptr->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (instr_is_comptime(field_value)) {
             const_ptrs.append(dest_ptr);
         } else {
             first_non_const_instruction = field_value;
         }
-        IrInstruction *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
+        IrInstGen *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
                 true);
         if (type_is_invalid(store_ptr_inst->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
     if (const_ptrs.length != new_field_count) {
         new_struct_ptr->value->special = ConstValSpecialRuntime;
         for (size_t i = 0; i < const_ptrs.length; i += 1) {
-            IrInstruction *elem_result_loc = const_ptrs.at(i);
+            IrInstGen *elem_result_loc = const_ptrs.at(i);
             assert(elem_result_loc->value->special == ConstValSpecialStatic);
             if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
                 // This field will be generated comptime; no need to do this.
                 continue;
             }
-            IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
+            IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
             elem_result_loc->value->special = ConstValSpecialRuntime;
-            ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
+            ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
         }
     }
-    IrInstruction *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
+    IrInstGen *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
     if (instr_is_comptime(result))
         return result;
 
     if (is_comptime) {
-        ir_add_error_node(ira, first_non_const_instruction->source_node,
+        ir_add_error(ira, &first_non_const_instruction->base,
             buf_sprintf("unable to evaluate constant expression"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     return result;
 }
 
-static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *instruction) {
-    IrInstruction *op1 = instruction->op1->child;
+static IrInstGen *ir_analyze_array_cat(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
+    IrInstGen *op1 = instruction->op1->child;
     ZigType *op1_type = op1->value->type;
     if (type_is_invalid(op1_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = instruction->op2->child;
+    IrInstGen *op2 = instruction->op2->child;
     ZigType *op2_type = op2->value->type;
     if (type_is_invalid(op2_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (is_tuple(op1_type) && is_tuple(op2_type)) {
-        return ir_analyze_tuple_cat(ira, &instruction->base, op1, op2);
+        return ir_analyze_tuple_cat(ira, &instruction->base.base, op1, op2);
     }
 
     ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
     if (!op1_val)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
     if (!op2_val)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigValue *sentinel1 = nullptr;
     ZigValue *op1_array_val;
@@ -16214,15 +17224,15 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
     {
         ZigType *array_type = op1_type->data.pointer.child_type;
         child_type = array_type->data.array.child_type;
-        op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->source_node);
+        op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->base.source_node);
         if (op1_array_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         op1_array_index = 0;
         op1_array_end = array_type->data.array.len;
         sentinel1 = array_type->data.array.sentinel;
     } else {
-        ir_add_error(ira, op1, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &op1->base, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigValue *sentinel2 = nullptr;
@@ -16262,23 +17272,23 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
     {
         ZigType *array_type = op2_type->data.pointer.child_type;
         op2_type_valid = array_type->data.array.child_type == child_type;
-        op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->source_node);
+        op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->base.source_node);
         if (op2_array_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         op2_array_index = 0;
         op2_array_end = array_type->data.array.len;
 
         sentinel2 = array_type->data.array.sentinel;
     } else {
-        ir_add_error(ira, op2,
+        ir_add_error(ira, &op2->base,
             buf_sprintf("expected array or C string literal, found '%s'", buf_ptr(&op2->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     if (!op2_type_valid) {
-        ir_add_error(ira, op2, buf_sprintf("expected array of type '%s', found '%s'",
+        ir_add_error(ira, &op2->base, buf_sprintf("expected array of type '%s', found '%s'",
                     buf_ptr(&child_type->name),
                     buf_ptr(&op2->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigValue *sentinel;
@@ -16295,7 +17305,7 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
     }
 
     // The type of result is populated in the following if blocks
-    IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
     ZigValue *out_val = result->value;
 
     ZigValue *out_array_val;
@@ -16383,14 +17393,14 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
     return result;
 }
 
-static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *instruction) {
-    IrInstruction *op1 = instruction->op1->child;
+static IrInstGen *ir_analyze_array_mult(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
+    IrInstGen *op1 = instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = instruction->op2->child;
+    IrInstGen *op2 = instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool want_ptr_to_array = false;
     ZigType *array_type;
@@ -16399,49 +17409,49 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
         array_type = op1->value->type;
         array_val = ir_resolve_const(ira, op1, UndefOk);
         if (array_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else if (op1->value->type->id == ZigTypeIdPointer && op1->value->type->data.pointer.ptr_len == PtrLenSingle &&
         op1->value->type->data.pointer.child_type->id == ZigTypeIdArray)
     {
         array_type = op1->value->type->data.pointer.child_type;
-        IrInstruction *array_inst = ir_get_deref(ira, op1, op1, nullptr);
+        IrInstGen *array_inst = ir_get_deref(ira, &op1->base, op1, nullptr);
         if (type_is_invalid(array_inst->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         array_val = ir_resolve_const(ira, array_inst, UndefOk);
         if (array_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         want_ptr_to_array = true;
     } else {
-        ir_add_error(ira, op1, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &op1->base, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     uint64_t mult_amt;
     if (!ir_resolve_usize(ira, op2, &mult_amt))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint64_t old_array_len = array_type->data.array.len;
     uint64_t new_array_len;
 
     if (mul_u64_overflow(old_array_len, mult_amt, &new_array_len)) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("operation results in overflow"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("operation results in overflow"));
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *child_type = array_type->data.array.child_type;
     ZigType *result_array_type = get_array_type(ira->codegen, child_type, new_array_len,
             array_type->data.array.sentinel);
 
-    IrInstruction *array_result;
+    IrInstGen *array_result;
     if (array_val->special == ConstValSpecialUndef || array_val->data.x_array.special == ConstArraySpecialUndef) {
-        array_result = ir_const_undef(ira, &instruction->base, result_array_type);
+        array_result = ir_const_undef(ira, &instruction->base.base, result_array_type);
     } else {
-        array_result = ir_const(ira, &instruction->base, result_array_type);
+        array_result = ir_const(ira, &instruction->base.base, result_array_type);
         ZigValue *out_val = array_result->value;
 
         switch (type_has_one_possible_value(ira->codegen, result_array_type)) {
             case OnePossibleValueInvalid:
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             case OnePossibleValueYes:
                 goto skip_computation;
             case OnePossibleValueNo:
@@ -16477,35 +17487,35 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
     }
 skip_computation:
     if (want_ptr_to_array) {
-        return ir_get_ref(ira, &instruction->base, array_result, true, false);
+        return ir_get_ref(ira, &instruction->base.base, array_result, true, false);
     } else {
         return array_result;
     }
 }
 
-static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
-        IrInstructionMergeErrSets *instruction)
+static IrInstGen *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
+        IrInstSrcMergeErrSets *instruction)
 {
-    ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op1->child);
+    ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op1->child);
     if (type_is_invalid(op1_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op2->child);
+    ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op2->child);
     if (type_is_invalid(op2_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (type_is_global_error_set(op1_type) ||
         type_is_global_error_set(op2_type))
     {
-        return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_global_error_set);
+        return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_global_error_set);
     }
 
-    if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->source_node)) {
-        return ira->codegen->invalid_instruction;
+    if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->base.source_node)) {
+        return ira->codegen->invalid_inst_gen;
     }
 
-    if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->source_node)) {
-        return ira->codegen->invalid_instruction;
+    if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->base.source_node)) {
+        return ira->codegen->invalid_inst_gen;
     }
 
     size_t errors_count = ira->codegen->errors_by_index.length;
@@ -16518,11 +17528,11 @@ static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
     ZigType *result_type = get_error_set_union(ira->codegen, errors, op1_type, op2_type, instruction->type_name);
     deallocate(errors, errors_count, "ErrorTableEntry *");
 
-    return ir_const_type(ira, &instruction->base, result_type);
+    return ir_const_type(ira, &instruction->base.base, result_type);
 }
 
 
-static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
+static IrInstGen *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
     IrBinOp op_id = bin_op_instruction->op_id;
     switch (op_id) {
         case IrBinOpInvalid:
@@ -16567,41 +17577,39 @@ static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructio
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
-        IrInstructionDeclVarSrc *decl_var_instruction)
-{
+static IrInstGen *ir_analyze_instruction_decl_var(IrAnalyze *ira, IrInstSrcDeclVar *decl_var_instruction) {
     Error err;
     ZigVar *var = decl_var_instruction->var;
 
     ZigType *explicit_type = nullptr;
-    IrInstruction *var_type = nullptr;
+    IrInstGen *var_type = nullptr;
     if (decl_var_instruction->var_type != nullptr) {
         var_type = decl_var_instruction->var_type->child;
         ZigType *proposed_type = ir_resolve_type(ira, var_type);
-        explicit_type = validate_var_type(ira->codegen, var_type->source_node, proposed_type);
+        explicit_type = validate_var_type(ira->codegen, var_type->base.source_node, proposed_type);
         if (type_is_invalid(explicit_type)) {
             var->var_type = ira->codegen->builtin_types.entry_invalid;
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
-    AstNode *source_node = decl_var_instruction->base.source_node;
+    AstNode *source_node = decl_var_instruction->base.base.source_node;
 
     bool is_comptime_var = ir_get_var_is_comptime(var);
 
     bool var_class_requires_const = false;
 
-    IrInstruction *var_ptr = decl_var_instruction->ptr->child;
+    IrInstGen *var_ptr = decl_var_instruction->ptr->child;
     // if this is null, a compiler error happened and did not initialize the variable.
     // if there are no compile errors there may be a missing ir_expr_wrap in pass1 IR generation.
     if (var_ptr == nullptr || type_is_invalid(var_ptr->value->type)) {
-        ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base);
+        ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base.base);
         var->var_type = ira->codegen->builtin_types.entry_invalid;
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     // The ir_build_var_decl_src call is supposed to pass a pointer to the allocation, not an initialization value.
-    ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base);
+    ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base.base);
 
     ZigType *result_type = var_ptr->value->type->data.pointer.child_type;
     if (type_is_invalid(result_type)) {
@@ -16612,7 +17620,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
 
     ZigValue *init_val = nullptr;
     if (instr_is_comptime(var_ptr) && var_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
-        init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.source_node);
+        init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.base.source_node);
         if (is_comptime_var) {
             if (var->gen_is_const) {
                 var->const_value = init_val;
@@ -16639,7 +17647,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
     case ReqCompTimeNo:
         if (init_val != nullptr && value_is_comptime(init_val)) {
             if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
-                    decl_var_instruction->base.source_node, init_val, UndefOk)))
+                    decl_var_instruction->base.base.source_node, init_val, UndefOk)))
             {
                 result_type = ira->codegen->builtin_types.entry_invalid;
             } else if (init_val->type->id == ZigTypeIdFn &&
@@ -16687,13 +17695,13 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
     assert(var->var_type);
 
     if (type_is_invalid(result_type)) {
-        return ir_const_void(ira, &decl_var_instruction->base);
+        return ir_const_void(ira, &decl_var_instruction->base.base);
     }
 
     if (decl_var_instruction->align_value == nullptr) {
         if ((err = type_resolve(ira->codegen, result_type, ResolveStatusAlignmentKnown))) {
             var->var_type = ira->codegen->builtin_types.entry_invalid;
-            return ir_const_void(ira, &decl_var_instruction->base);
+            return ir_const_void(ira, &decl_var_instruction->base.base);
         }
         var->align_bytes = get_abi_alignment(ira->codegen, result_type);
     } else {
@@ -16712,17 +17720,17 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
             // we need a runtime ptr but we have a comptime val.
             // since it's a comptime val there are no instructions for it.
             // we memcpy the init value here
-            IrInstruction *deref = ir_get_deref(ira, var_ptr, var_ptr, nullptr);
+            IrInstGen *deref = ir_get_deref(ira, &var_ptr->base, var_ptr, nullptr);
             if (type_is_invalid(deref->value->type)) {
                 var->var_type = ira->codegen->builtin_types.entry_invalid;
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             // If this assertion trips, something is wrong with the IR instructions, because
             // we expected the above deref to return a constant value, but it created a runtime
             // instruction.
             assert(deref->value->special != ConstValSpecialRuntime);
             var_ptr->value->special = ConstValSpecialRuntime;
-            ir_analyze_store_ptr(ira, var_ptr, var_ptr, deref, false);
+            ir_analyze_store_ptr(ira, &var_ptr->base, var_ptr, deref, false);
         }
 
         if (instr_is_comptime(var_ptr) && var->mem_slot_index != SIZE_MAX) {
@@ -16732,84 +17740,84 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
             ira_ref(var->owner_exec->analysis);
 
             if (is_comptime_var || (var_class_requires_const && var->gen_is_const)) {
-                return ir_const_void(ira, &decl_var_instruction->base);
+                return ir_const_void(ira, &decl_var_instruction->base.base);
             }
         }
     } else if (is_comptime_var) {
-        ir_add_error(ira, &decl_var_instruction->base,
+        ir_add_error(ira, &decl_var_instruction->base.base,
                 buf_sprintf("cannot store runtime value in compile time variable"));
         var->var_type = ira->codegen->builtin_types.entry_invalid;
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
     if (fn_entry)
         fn_entry->variable_list.append(var);
 
-    return ir_build_var_decl_gen(ira, &decl_var_instruction->base, var, var_ptr);
+    return ir_build_var_decl_gen(ira, &decl_var_instruction->base.base, var, var_ptr);
 }
 
-static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructionExport *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_export(IrAnalyze *ira, IrInstSrcExport *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *options = instruction->options->child;
+    IrInstGen *options = instruction->options->child;
     if (type_is_invalid(options->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *options_type = options->value->type;
     assert(options_type->id == ZigTypeIdStruct);
 
     TypeStructField *name_field = find_struct_type_field(options_type, buf_create_from_str("name"));
-    ir_assert(name_field != nullptr, &instruction->base);
-    IrInstruction *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, name_field);
+    ir_assert(name_field != nullptr, &instruction->base.base);
+    IrInstGen *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, name_field);
     if (type_is_invalid(name_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeStructField *linkage_field = find_struct_type_field(options_type, buf_create_from_str("linkage"));
-    ir_assert(linkage_field != nullptr, &instruction->base);
-    IrInstruction *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, linkage_field);
+    ir_assert(linkage_field != nullptr, &instruction->base.base);
+    IrInstGen *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, linkage_field);
     if (type_is_invalid(linkage_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeStructField *section_field = find_struct_type_field(options_type, buf_create_from_str("section"));
-    ir_assert(section_field != nullptr, &instruction->base);
-    IrInstruction *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, section_field);
+    ir_assert(section_field != nullptr, &instruction->base.base);
+    IrInstGen *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, section_field);
     if (type_is_invalid(section_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // The `section` field is optional, we have to unwrap it first
-    IrInstruction *non_null_check = ir_analyze_test_non_null(ira, &instruction->base, section_inst);
+    IrInstGen *non_null_check = ir_analyze_test_non_null(ira, &instruction->base.base, section_inst);
     bool is_non_null;
     if (!ir_resolve_bool(ira, non_null_check, &is_non_null))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *section_str_inst = nullptr;
+    IrInstGen *section_str_inst = nullptr;
     if (is_non_null) {
-        section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base, section_inst, false);
+        section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base.base, section_inst, false);
         if (type_is_invalid(section_str_inst->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     // Resolve all the comptime values
     Buf *symbol_name = ir_resolve_str(ira, name_inst);
     if (!symbol_name)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (buf_len(symbol_name) < 1) {
-        ir_add_error(ira, name_inst,
+        ir_add_error(ira, &name_inst->base,
             buf_sprintf("exported symbol name cannot be empty"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     GlobalLinkageId global_linkage_id;
     if (!ir_resolve_global_linkage(ira, linkage_inst, &global_linkage_id))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *section_name = nullptr;
     if (section_str_inst != nullptr && !(section_name = ir_resolve_str(ira, section_str_inst)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // TODO: This function needs to be audited.
     // It's not clear how all the different types are supposed to be handled.
@@ -16817,15 +17825,15 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
     // in another file.
     TldFn *tld_fn = allocate<TldFn>(1);
     tld_fn->base.id = TldIdFn;
-    tld_fn->base.source_node = instruction->base.source_node;
+    tld_fn->base.source_node = instruction->base.base.source_node;
 
     auto entry = ira->codegen->exported_symbol_names.put_unique(symbol_name, &tld_fn->base);
     if (entry) {
         AstNode *other_export_node = entry->value->source_node;
-        ErrorMsg *msg = ir_add_error(ira, &instruction->base,
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
                 buf_sprintf("exported symbol collision: '%s'", buf_ptr(symbol_name)));
         add_error_note(ira->codegen, msg, other_export_node, buf_sprintf("other symbol is here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     Error err;
@@ -16841,12 +17849,12 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
             CallingConvention cc = fn_entry->type_entry->data.fn.fn_type_id.cc;
             switch (cc) {
                 case CallingConventionUnspecified: {
-                    ErrorMsg *msg = ir_add_error(ira, target,
+                    ErrorMsg *msg = ir_add_error(ira, &target->base,
                         buf_sprintf("exported function must specify calling convention"));
                     add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
                 } break;
                 case CallingConventionAsync: {
-                    ErrorMsg *msg = ir_add_error(ira, target,
+                    ErrorMsg *msg = ir_add_error(ira, &target->base,
                         buf_sprintf("exported function cannot be async"));
                     add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
                 } break;
@@ -16869,10 +17877,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
         } break;
         case ZigTypeIdStruct:
             if (is_slice(target->value->type)) {
-                ir_add_error(ira, target,
+                ir_add_error(ira, &target->base,
                     buf_sprintf("unable to export value of type '%s'", buf_ptr(&target->value->type->name)));
             } else if (target->value->type->data.structure.layout != ContainerLayoutExtern) {
-                ErrorMsg *msg = ir_add_error(ira, target,
+                ErrorMsg *msg = ir_add_error(ira, &target->base,
                     buf_sprintf("exported struct value must be declared extern"));
                 add_error_note(ira->codegen, msg, target->value->type->data.structure.decl_node, buf_sprintf("declared here"));
             } else {
@@ -16881,7 +17889,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
             break;
         case ZigTypeIdUnion:
             if (target->value->type->data.unionation.layout != ContainerLayoutExtern) {
-                ErrorMsg *msg = ir_add_error(ira, target,
+                ErrorMsg *msg = ir_add_error(ira, &target->base,
                     buf_sprintf("exported union value must be declared extern"));
                 add_error_note(ira->codegen, msg, target->value->type->data.unionation.decl_node, buf_sprintf("declared here"));
             } else {
@@ -16890,7 +17898,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
             break;
         case ZigTypeIdEnum:
             if (target->value->type->data.enumeration.layout != ContainerLayoutExtern) {
-                ErrorMsg *msg = ir_add_error(ira, target,
+                ErrorMsg *msg = ir_add_error(ira, &target->base,
                     buf_sprintf("exported enum value must be declared extern"));
                 add_error_note(ira->codegen, msg, target->value->type->data.enumeration.decl_node, buf_sprintf("declared here"));
             } else {
@@ -16900,10 +17908,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
         case ZigTypeIdArray: {
             bool ok_type;
             if ((err = type_allowed_in_extern(ira->codegen, target->value->type->data.array.child_type, &ok_type)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (!ok_type) {
-                ir_add_error(ira, target,
+                ir_add_error(ira, &target->base,
                     buf_sprintf("array element type '%s' not extern-compatible",
                         buf_ptr(&target->value->type->data.array.child_type->name)));
             } else {
@@ -16918,31 +17926,31 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
                     zig_unreachable();
                 case ZigTypeIdStruct:
                     if (is_slice(type_value)) {
-                        ir_add_error(ira, target,
+                        ir_add_error(ira, &target->base,
                             buf_sprintf("unable to export type '%s'", buf_ptr(&type_value->name)));
                     } else if (type_value->data.structure.layout != ContainerLayoutExtern) {
-                        ErrorMsg *msg = ir_add_error(ira, target,
+                        ErrorMsg *msg = ir_add_error(ira, &target->base,
                             buf_sprintf("exported struct must be declared extern"));
                         add_error_note(ira->codegen, msg, type_value->data.structure.decl_node, buf_sprintf("declared here"));
                     }
                     break;
                 case ZigTypeIdUnion:
                     if (type_value->data.unionation.layout != ContainerLayoutExtern) {
-                        ErrorMsg *msg = ir_add_error(ira, target,
+                        ErrorMsg *msg = ir_add_error(ira, &target->base,
                             buf_sprintf("exported union must be declared extern"));
                         add_error_note(ira->codegen, msg, type_value->data.unionation.decl_node, buf_sprintf("declared here"));
                     }
                     break;
                 case ZigTypeIdEnum:
                     if (type_value->data.enumeration.layout != ContainerLayoutExtern) {
-                        ErrorMsg *msg = ir_add_error(ira, target,
+                        ErrorMsg *msg = ir_add_error(ira, &target->base,
                             buf_sprintf("exported enum must be declared extern"));
                         add_error_note(ira->codegen, msg, type_value->data.enumeration.decl_node, buf_sprintf("declared here"));
                     }
                     break;
                 case ZigTypeIdFn: {
                     if (type_value->data.fn.fn_type_id.cc == CallingConventionUnspecified) {
-                        ir_add_error(ira, target,
+                        ir_add_error(ira, &target->base,
                             buf_sprintf("exported function type must specify calling convention"));
                     }
                 } break;
@@ -16968,7 +17976,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
                 case ZigTypeIdOpaque:
                 case ZigTypeIdFnFrame:
                 case ZigTypeIdAnyFrame:
-                    ir_add_error(ira, target,
+                    ir_add_error(ira, &target->base,
                         buf_sprintf("invalid export target '%s'", buf_ptr(&type_value->name)));
                     break;
             }
@@ -16993,61 +18001,55 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
         case ZigTypeIdEnumLiteral:
         case ZigTypeIdFnFrame:
         case ZigTypeIdAnyFrame:
-            ir_add_error(ira, target,
+            ir_add_error(ira, &target->base,
                     buf_sprintf("invalid export target type '%s'", buf_ptr(&target->value->type->name)));
             break;
     }
 
     // TODO audit the various ways to use @export
-    if (want_var_export && target->id == IrInstructionIdLoadPtrGen) {
-        IrInstructionLoadPtrGen *load_ptr = reinterpret_cast<IrInstructionLoadPtrGen *>(target);
-        if (load_ptr->ptr->id == IrInstructionIdVarPtr) {
-            IrInstructionVarPtr *var_ptr = reinterpret_cast<IrInstructionVarPtr *>(load_ptr->ptr);
+    if (want_var_export && target->id == IrInstGenIdLoadPtr) {
+        IrInstGenLoadPtr *load_ptr = reinterpret_cast<IrInstGenLoadPtr *>(target);
+        if (load_ptr->ptr->id == IrInstGenIdVarPtr) {
+            IrInstGenVarPtr *var_ptr = reinterpret_cast<IrInstGenVarPtr *>(load_ptr->ptr);
             ZigVar *var = var_ptr->var;
             add_var_export(ira->codegen, var, buf_ptr(symbol_name), global_linkage_id);
             var->section_name = section_name;
         }
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static bool exec_has_err_ret_trace(CodeGen *g, IrExecutable *exec) {
+static bool exec_has_err_ret_trace(CodeGen *g, IrExecutableSrc *exec) {
     ZigFn *fn_entry = exec_fn_entry(exec);
     return fn_entry != nullptr && fn_entry->calls_or_awaits_errorable_fn && g->have_err_ret_tracing;
 }
 
-static IrInstruction *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
-        IrInstructionErrorReturnTrace *instruction)
+static IrInstGen *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
+        IrInstSrcErrorReturnTrace *instruction)
 {
     ZigType *ptr_to_stack_trace_type = get_pointer_to_type(ira->codegen, get_stack_trace_type(ira->codegen), false);
-    if (instruction->optional == IrInstructionErrorReturnTrace::Null) {
+    if (instruction->optional == IrInstErrorReturnTraceNull) {
         ZigType *optional_type = get_optional_type(ira->codegen, ptr_to_stack_trace_type);
-        if (!exec_has_err_ret_trace(ira->codegen, ira->new_irb.exec)) {
-            IrInstruction *result = ir_const(ira, &instruction->base, optional_type);
+        if (!exec_has_err_ret_trace(ira->codegen, ira->old_irb.exec)) {
+            IrInstGen *result = ir_const(ira, &instruction->base.base, optional_type);
             ZigValue *out_val = result->value;
             assert(get_codegen_ptr_type(optional_type) != nullptr);
             out_val->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
             out_val->data.x_ptr.data.hard_coded_addr.addr = 0;
             return result;
         }
-        IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
-                instruction->base.source_node, instruction->optional);
-        new_instruction->value->type = optional_type;
-        return new_instruction;
+        return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
+                instruction->base.base.source_node, instruction->optional, optional_type);
     } else {
         assert(ira->codegen->have_err_ret_tracing);
-        IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
-                instruction->base.source_node, instruction->optional);
-        new_instruction->value->type = ptr_to_stack_trace_type;
-        return new_instruction;
+        return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
+                instruction->base.base.source_node, instruction->optional, ptr_to_stack_trace_type);
     }
 }
 
-static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
-        IrInstructionErrorUnion *instruction)
-{
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_analyze_instruction_error_union(IrAnalyze *ira, IrInstSrcErrorUnion *instruction) {
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueErrUnionType *lazy_err_union_type = allocate<LazyValueErrUnionType>(1, "LazyValueErrUnionType");
@@ -17057,16 +18059,16 @@ static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
 
     lazy_err_union_type->err_set_type = instruction->err_set->child;
     if (ir_resolve_type_lazy(ira, lazy_err_union_type->err_set_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     lazy_err_union_type->payload_type = instruction->payload->child;
     if (ir_resolve_type_lazy(ira, lazy_err_union_type->payload_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_inst, ZigType *var_type,
+static IrInstGen *ir_analyze_alloca(IrAnalyze *ira, IrInst *source_inst, ZigType *var_type,
         uint32_t align, const char *name_hint, bool force_comptime)
 {
     Error err;
@@ -17074,7 +18076,7 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
     ZigValue *pointee = create_const_vals(1);
     pointee->special = ConstValSpecialUndef;
 
-    IrInstructionAllocaGen *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
+    IrInstGenAlloca *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
     result->base.value->special = ConstValSpecialStatic;
     result->base.value->data.x_ptr.special = ConstPtrSpecialRef;
     result->base.value->data.x_ptr.mut = force_comptime ? ConstPtrMutComptimeVar : ConstPtrMutInfer;
@@ -17082,15 +18084,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
 
     bool var_type_has_bits;
     if ((err = type_has_bits2(ira->codegen, var_type, &var_type_has_bits)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     if (align != 0) {
         if ((err = type_resolve(ira->codegen, var_type, ResolveStatusAlignmentKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (!var_type_has_bits) {
             ir_add_error(ira, source_inst,
                 buf_sprintf("variable '%s' of zero-bit type '%s' has no in-memory representation, it cannot be aligned",
                     name_hint, buf_ptr(&var_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
     assert(result->base.value->data.x_ptr.special != ConstPtrSpecialInvalid);
@@ -17099,15 +18101,14 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
     result->base.value->type = get_pointer_to_type_extra(ira->codegen, var_type, false, false,
             PtrLenSingle, align, 0, 0, false);
 
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
     if (fn_entry != nullptr) {
         fn_entry->alloca_gen_list.append(result);
     }
-    result->base.is_gen = true;
     return &result->base;
 }
 
-static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInstruction *suspend_source_instr,
+static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInst *suspend_source_instr,
         ResultLoc *result_loc)
 {
     switch (result_loc->id) {
@@ -17150,7 +18151,7 @@ static bool type_can_bit_cast(ZigType *t) {
     }
 }
 
-static void set_up_result_loc_for_inferred_comptime(IrInstruction *ptr) {
+static void set_up_result_loc_for_inferred_comptime(IrInstGen *ptr) {
     ZigValue *undef_child = create_const_vals(1);
     undef_child->type = ptr->value->type->data.pointer.child_type;
     undef_child->special = ConstValSpecialUndef;
@@ -17189,16 +18190,16 @@ static Error ir_result_has_type(IrAnalyze *ira, ResultLoc *result_loc, bool *out
     zig_unreachable();
 }
 
-static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *suspend_source_instr,
+static IrInstGen *ir_resolve_no_result_loc(IrAnalyze *ira, IrInst *suspend_source_instr,
     ResultLoc *result_loc, ZigType *value_type, bool force_runtime, bool non_null_comptime)
 {
     if (type_is_invalid(value_type))
-        return ira->codegen->invalid_instruction;
-    IrInstructionAllocaGen *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
+        return ira->codegen->invalid_inst_gen;
+    IrInstGenAlloca *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
     alloca_gen->base.value->type = get_pointer_to_type_extra(ira->codegen, value_type, false, false,
             PtrLenSingle, 0, 0, 0, false);
     set_up_result_loc_for_inferred_comptime(&alloca_gen->base);
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
     if (fn_entry != nullptr && get_scope_typeof(suspend_source_instr->scope) == nullptr) {
         fn_entry->alloca_gen_list.append(alloca_gen);
     }
@@ -17208,8 +18209,8 @@ static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *su
 }
 
 // when calling this function, at the callsite must check for result type noreturn and propagate it up
-static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
-        ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
+static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
+        ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
         bool non_null_comptime, bool allow_discard)
 {
     Error err;
@@ -17235,35 +18236,34 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
         }
         case ResultLocIdVar: {
             ResultLocVar *result_loc_var = reinterpret_cast<ResultLocVar *>(result_loc);
-            assert(result_loc->source_instruction->id == IrInstructionIdAllocaSrc);
+            assert(result_loc->source_instruction->id == IrInstSrcIdAlloca);
 
             if (value_type->id == ZigTypeIdUnreachable || value_type->id == ZigTypeIdOpaque) {
-                ir_add_error(ira, result_loc->source_instruction,
+                ir_add_error(ira, &result_loc->source_instruction->base,
                     buf_sprintf("variable of type '%s' not allowed", buf_ptr(&value_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
-            IrInstructionAllocaSrc *alloca_src =
-                reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
+            IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
             bool force_comptime;
             if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             bool is_comptime = force_comptime || (!force_runtime && value != nullptr &&
                     value->value->special != ConstValSpecialRuntime && result_loc_var->var->gen_is_const);
 
             if (alloca_src->base.child == nullptr || is_comptime) {
                 uint32_t align = 0;
                 if (alloca_src->align != nullptr && !ir_resolve_align(ira, alloca_src->align->child, nullptr, &align)) {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
-                IrInstruction *alloca_gen;
+                IrInstGen *alloca_gen;
                 if (is_comptime && value != nullptr) {
                     if (align > value->value->llvm_align) {
                         value->value->llvm_align = align;
                     }
-                    alloca_gen = ir_get_ref(ira, result_loc->source_instruction, value, true, false);
+                    alloca_gen = ir_get_ref(ira, &result_loc->source_instruction->base, value, true, false);
                 } else {
-                    alloca_gen = ir_analyze_alloca(ira, result_loc->source_instruction, value_type, align,
+                    alloca_gen = ir_analyze_alloca(ira, &result_loc->source_instruction->base, value_type, align,
                             alloca_src->name_hint, force_comptime);
                     if (force_runtime) {
                         alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
@@ -17271,7 +18271,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
                     }
                 }
                 if (alloca_src->base.child != nullptr && !result_loc->written) {
-                    alloca_src->base.child->ref_count = 0;
+                    alloca_src->base.child->base.ref_count = 0;
                 }
                 alloca_src->base.child = alloca_gen;
             }
@@ -17296,9 +18296,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             }
             bool has_bits;
             if ((err = type_has_bits2(ira->codegen, ira->explicit_return_type, &has_bits)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (!has_bits || !handle_is_ptr(ira->explicit_return_type)) {
-                ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
+                ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
                 if (fn_entry == nullptr || fn_entry->inferred_async_node == nullptr) {
                     return nullptr;
                 }
@@ -17306,8 +18306,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             ZigType *ptr_return_type = get_pointer_to_type(ira->codegen, ira->explicit_return_type, false);
             result_loc->written = true;
-            result_loc->resolved_loc = ir_build_return_ptr(ira, result_loc->source_instruction, ptr_return_type);
-            if (ir_should_inline(ira->old_irb.exec, result_loc->source_instruction->scope)) {
+            result_loc->resolved_loc = ir_build_return_ptr(ira, &result_loc->source_instruction->base, ptr_return_type);
+            if (ir_should_inline(ira->old_irb.exec, result_loc->source_instruction->base.scope)) {
                 set_up_result_loc_for_inferred_comptime(result_loc->resolved_loc);
             }
             return result_loc->resolved_loc;
@@ -17317,7 +18317,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             ResultLocPeerParent *peer_parent = result_peer->parent;
 
             if (peer_parent->peers.length == 1) {
-                IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
+                IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
                         value_type, value, force_runtime, non_null_comptime, true);
                 result_peer->suspend_pos.basic_block_index = SIZE_MAX;
                 result_peer->suspend_pos.instruction_index = SIZE_MAX;
@@ -17333,7 +18333,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             bool is_condition_comptime;
             if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_condition_comptime))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (is_condition_comptime) {
                 peer_parent->skipped = true;
                 if (non_null_comptime) {
@@ -17344,10 +18344,10 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             }
             bool peer_parent_has_type;
             if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (peer_parent_has_type) {
                 peer_parent->skipped = true;
-                IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
+                IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
                         value_type, value, force_runtime || !is_condition_comptime, true, true);
                 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
                     parent_result_loc->value->type->id == ZigTypeIdUnreachable)
@@ -17364,7 +18364,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
                 if (peer_parent->end_bb->suspend_instruction_ref == nullptr) {
                     peer_parent->end_bb->suspend_instruction_ref = suspend_source_instr;
                 }
-                IrInstruction *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
+                IrInstGen *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
                         &result_peer->suspend_pos);
                 if (result_peer->next_bb == nullptr) {
                     ir_start_next_bb(ira);
@@ -17372,7 +18372,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
                 return unreach_inst;
             }
 
-            IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
+            IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
                     peer_parent->resolved_type, nullptr, force_runtime, non_null_comptime, true);
             if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
                 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
@@ -17391,24 +18391,24 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             ResultLocCast *result_cast = reinterpret_cast<ResultLocCast *>(result_loc);
             ZigType *dest_type = ir_resolve_type(ira, result_cast->base.source_instruction->child);
             if (type_is_invalid(dest_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (dest_type == ira->codegen->builtin_types.entry_var) {
                 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type,
                         force_runtime, non_null_comptime);
             }
 
-            IrInstruction *casted_value;
+            IrInstGen *casted_value;
             if (value != nullptr) {
                 casted_value = ir_implicit_cast(ira, value, dest_type);
                 if (type_is_invalid(casted_value->value->type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 dest_type = casted_value->value->type;
             } else {
                 casted_value = nullptr;
             }
 
-            IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
+            IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
                     dest_type, casted_value, force_runtime, non_null_comptime, true);
             if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
                 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
@@ -17422,11 +18422,11 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             if ((err = type_resolve(ira->codegen, parent_ptr_type->data.pointer.child_type,
                             ResolveStatusAlignmentKnown)))
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
             if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             if (!type_has_bits(value_type)) {
                 parent_ptr_align = 0;
@@ -17449,9 +18449,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             ConstCastOnly const_cast_result = types_match_const_cast_only(ira,
                     parent_result_loc->value->type, ptr_type,
-                    result_cast->base.source_instruction->source_node, false);
+                    result_cast->base.source_instruction->base.source_node, false);
             if (const_cast_result.id == ConstCastResultIdInvalid)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (const_cast_result.id != ConstCastResultIdOk) {
                 if (allow_discard) {
                     return parent_result_loc;
@@ -17465,42 +18465,42 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             result_loc->written = true;
             result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
-                    ptr_type, result_cast->base.source_instruction, false);
+                    ptr_type, &result_cast->base.source_instruction->base, false);
             return result_loc->resolved_loc;
         }
         case ResultLocIdBitCast: {
             ResultLocBitCast *result_bit_cast = reinterpret_cast<ResultLocBitCast *>(result_loc);
             ZigType *dest_type = ir_resolve_type(ira, result_bit_cast->base.source_instruction->child);
             if (type_is_invalid(dest_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (get_codegen_ptr_type(dest_type) != nullptr) {
-                ir_add_error(ira, result_loc->source_instruction,
+                ir_add_error(ira, &result_loc->source_instruction->base,
                         buf_sprintf("unable to @bitCast to pointer type '%s'", buf_ptr(&dest_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             if (!type_can_bit_cast(dest_type)) {
-                ir_add_error(ira, result_loc->source_instruction,
+                ir_add_error(ira, &result_loc->source_instruction->base,
                         buf_sprintf("unable to @bitCast to type '%s'", buf_ptr(&dest_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             if (get_codegen_ptr_type(value_type) != nullptr) {
                 ir_add_error(ira, suspend_source_instr,
                     buf_sprintf("unable to @bitCast from pointer type '%s'", buf_ptr(&value_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             if (!type_can_bit_cast(value_type)) {
                 ir_add_error(ira, suspend_source_instr,
                         buf_sprintf("unable to @bitCast from type '%s'", buf_ptr(&value_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
-            IrInstruction *bitcasted_value;
+            IrInstGen *bitcasted_value;
             if (value != nullptr) {
-                bitcasted_value = ir_analyze_bit_cast(ira, result_loc->source_instruction, value, dest_type);
+                bitcasted_value = ir_analyze_bit_cast(ira, &result_loc->source_instruction->base, value, dest_type);
                 dest_type = bitcasted_value->value->type;
             } else {
                 bitcasted_value = nullptr;
@@ -17510,7 +18510,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
                 return bitcasted_value;
             }
 
-            IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
+            IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
                     dest_type, bitcasted_value, force_runtime, non_null_comptime, true);
             if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
                 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
@@ -17523,7 +18523,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             bool has_bits;
             if ((err = type_has_bits2(ira->codegen, child_type, &has_bits))) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             // This happens when the bitCast result is assigned to _
@@ -17533,12 +18533,12 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
             }
 
             if ((err = type_resolve(ira->codegen, child_type, ResolveStatusAlignmentKnown))) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
             if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value_type,
                     parent_ptr_type->data.pointer.is_const, parent_ptr_type->data.pointer.is_volatile, PtrLenSingle,
@@ -17546,29 +18546,33 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
 
             result_loc->written = true;
             result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
-                    ptr_type, result_bit_cast->base.source_instruction, false);
+                    ptr_type, &result_bit_cast->base.source_instruction->base, false);
             return result_loc->resolved_loc;
         }
     }
     zig_unreachable();
 }
 
-static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
-        ResultLoc *result_loc_pass1, ZigType *value_type, IrInstruction *value, bool force_runtime,
+static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
+        ResultLoc *result_loc_pass1, ZigType *value_type, IrInstGen *value, bool force_runtime,
         bool non_null_comptime, bool allow_discard)
 {
     Error err;
     if (!allow_discard && result_loc_pass1->id == ResultLocIdInstruction &&
-        instr_is_comptime(result_loc_pass1->source_instruction) &&
-        result_loc_pass1->source_instruction->value->type->id == ZigTypeIdPointer &&
-        result_loc_pass1->source_instruction->value->data.x_ptr.special == ConstPtrSpecialDiscard)
+        result_loc_pass1->source_instruction->id == IrInstSrcIdConst)
     {
-        result_loc_pass1 = no_result_loc();
+        IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(result_loc_pass1->source_instruction);
+        if (value_is_comptime(const_inst->value) &&
+            const_inst->value->type->id == ZigTypeIdPointer &&
+            const_inst->value->data.x_ptr.special == ConstPtrSpecialDiscard)
+        {
+            result_loc_pass1 = no_result_loc();
+        }
     }
     bool was_already_resolved = result_loc_pass1->resolved_loc != nullptr;
-    IrInstruction *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
+    IrInstGen *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
             value, force_runtime, non_null_comptime, allow_discard);
-    if (result_loc == nullptr || (instr_is_unreachable(result_loc) || type_is_invalid(result_loc->value->type)))
+    if (result_loc == nullptr || (result_loc->value->type->id == ZigTypeIdUnreachable || type_is_invalid(result_loc->value->type)))
         return result_loc;
 
     if ((force_runtime || (value != nullptr && !instr_is_comptime(value))) &&
@@ -17591,11 +18595,11 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
         field->type_entry = value_type;
         field->type_val = create_const_type(ira->codegen, field->type_entry);
         field->src_index = old_field_count;
-        field->decl_node = value ? value->source_node : suspend_source_instr->source_node;
+        field->decl_node = value ? value->base.source_node : suspend_source_instr->source_node;
         if (value && instr_is_comptime(value)) {
             ZigValue *val = ir_resolve_const(ira, value, UndefOk);
             if (!val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             field->is_comptime = true;
             field->init_val = create_const_vals(1);
             copy_const_val(field->init_val, val);
@@ -17603,7 +18607,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
         }
 
         ZigType *struct_ptr_type = get_pointer_to_type(ira->codegen, isf->inferred_struct_type, false);
-        IrInstruction *casted_ptr;
+        IrInstGen *casted_ptr;
         if (instr_is_comptime(result_loc)) {
             casted_ptr = ir_const(ira, suspend_source_instr, struct_ptr_type);
             copy_const_val(casted_ptr->value, result_loc->value);
@@ -17614,7 +18618,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
         if (instr_is_comptime(casted_ptr)) {
             ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
             if (!ptr_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
                 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,
                         suspend_source_instr->source_node);
@@ -17644,7 +18648,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
     {
         bool has_bits;
         if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (has_bits) {
             result_loc_pass1->written = false;
             return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, result_loc, false, true);
@@ -17652,12 +18656,12 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
     } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion) {
         bool has_bits;
         if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (has_bits) {
             if (value_type->id == ZigTypeIdErrorSet) {
                 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);
             } else {
-                IrInstruction *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
+                IrInstGen *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
                         result_loc, false, true);
                 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;
                 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
@@ -17672,37 +18676,35 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
     return result_loc;
 }
 
-static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
-        IrInstructionResolveResult *instruction)
-{
+static IrInstGen *ir_analyze_instruction_resolve_result(IrAnalyze *ira, IrInstSrcResolveResult *instruction) {
     ZigType *implicit_elem_type;
     if (instruction->ty == nullptr) {
         if (instruction->result_loc->id == ResultLocIdCast) {
             implicit_elem_type = ir_resolve_type(ira,
                     instruction->result_loc->source_instruction->child);
             if (type_is_invalid(implicit_elem_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else if (instruction->result_loc->id == ResultLocIdReturn) {
             implicit_elem_type = ira->explicit_return_type;
             if (type_is_invalid(implicit_elem_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             implicit_elem_type = ira->codegen->builtin_types.entry_var;
         }
         if (implicit_elem_type == ira->codegen->builtin_types.entry_var) {
             Buf *bare_name = buf_alloc();
             Buf *name = get_anon_type_name(ira->codegen, nullptr, container_string(ContainerKindStruct),
-                    instruction->base.scope, instruction->base.source_node, bare_name);
+                    instruction->base.base.scope, instruction->base.base.source_node, bare_name);
 
             StructSpecial struct_special = StructSpecialInferredStruct;
-            if (instruction->base.source_node->type == NodeTypeContainerInitExpr &&
-                instruction->base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
+            if (instruction->base.base.source_node->type == NodeTypeContainerInitExpr &&
+                instruction->base.base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
             {
                 struct_special = StructSpecialInferredTuple;
             }
 
             ZigType *inferred_struct_type = get_partial_container_type(ira->codegen,
-                    instruction->base.scope, ContainerKindStruct, instruction->base.source_node,
+                    instruction->base.base.scope, ContainerKindStruct, instruction->base.base.source_node,
                     buf_ptr(name), bare_name, ContainerLayoutAuto);
             inferred_struct_type->data.structure.special = struct_special;
             inferred_struct_type->data.structure.resolve_status = ResolveStatusBeingInferred;
@@ -17711,21 +18713,21 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
     } else {
         implicit_elem_type = ir_resolve_type(ira, instruction->ty->child);
         if (type_is_invalid(implicit_elem_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
             implicit_elem_type, nullptr, false, true, true);
     if (result_loc != nullptr)
         return result_loc;
 
-    ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *fn = ira->new_irb.exec->fn_entry;
     if (fn != nullptr && fn->type_entry->data.fn.fn_type_id.cc == CallingConventionAsync &&
             instruction->result_loc->id == ResultLocIdReturn)
     {
-        result_loc = ir_resolve_result(ira, &instruction->base, no_result_loc(),
+        result_loc = ir_resolve_result(ira, &instruction->base.base, no_result_loc(),
                 implicit_elem_type, nullptr, false, true, true);
         if (result_loc != nullptr &&
-                (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
+                (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
         {
             return result_loc;
         }
@@ -17733,9 +18735,9 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
         return result_loc;
     }
 
-    IrInstruction *result = ir_const(ira, &instruction->base, implicit_elem_type);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, implicit_elem_type);
     result->value->special = ConstValSpecialUndef;
-    IrInstruction *ptr = ir_get_ref(ira, &instruction->base, result, false, false);
+    IrInstGen *ptr = ir_get_ref(ira, &instruction->base.base, result, false, false);
     ptr->value->data.x_ptr.mut = ConstPtrMutComptimeVar;
     return ptr;
 }
@@ -17759,8 +18761,7 @@ static void ir_reset_result(ResultLoc *result_loc) {
             break;
         }
         case ResultLocIdVar: {
-            IrInstructionAllocaSrc *alloca_src =
-                reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
+            IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
             alloca_src->base.child = nullptr;
             break;
         }
@@ -17776,18 +18777,18 @@ static void ir_reset_result(ResultLoc *result_loc) {
     }
 }
 
-static IrInstruction *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstructionResetResult *instruction) {
+static IrInstGen *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstSrcResetResult *instruction) {
     ir_reset_result(instruction->result_loc);
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *source_instr,
-        ZigType *fn_ret_type, bool is_async_call_builtin, IrInstruction **args_ptr, size_t args_len,
-        IrInstruction *ret_ptr_uncasted)
+static IrInstGen *get_async_call_result_loc(IrAnalyze *ira, IrInst* source_instr,
+        ZigType *fn_ret_type, bool is_async_call_builtin, IrInstGen **args_ptr, size_t args_len,
+        IrInstGen *ret_ptr_uncasted)
 {
     ir_assert(is_async_call_builtin, source_instr);
     if (type_is_invalid(ret_ptr_uncasted->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     if (ret_ptr_uncasted->value->type->id == ZigTypeIdVoid) {
         // Result location will be inside the async frame.
         return nullptr;
@@ -17795,57 +18796,57 @@ static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *s
     return ir_implicit_cast(ira, ret_ptr_uncasted, get_pointer_to_type(ira->codegen, fn_ret_type, false));
 }
 
-static IrInstruction *ir_analyze_async_call(IrAnalyze *ira, IrInstruction *source_instr, ZigFn *fn_entry,
-        ZigType *fn_type, IrInstruction *fn_ref, IrInstruction **casted_args, size_t arg_count,
-        IrInstruction *casted_new_stack, bool is_async_call_builtin, IrInstruction *ret_ptr_uncasted,
+static IrInstGen *ir_analyze_async_call(IrAnalyze *ira, IrInst* source_instr, ZigFn *fn_entry,
+        ZigType *fn_type, IrInstGen *fn_ref, IrInstGen **casted_args, size_t arg_count,
+        IrInstGen *casted_new_stack, bool is_async_call_builtin, IrInstGen *ret_ptr_uncasted,
         ResultLoc *call_result_loc)
 {
     if (fn_entry == nullptr) {
         if (fn_type->data.fn.fn_type_id.cc != CallingConventionAsync) {
-            ir_add_error(ira, fn_ref,
+            ir_add_error(ira, &fn_ref->base,
                 buf_sprintf("expected async function, found '%s'", buf_ptr(&fn_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if (casted_new_stack == nullptr) {
-            ir_add_error(ira, fn_ref, buf_sprintf("function is not comptime-known; @asyncCall required"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &fn_ref->base, buf_sprintf("function is not comptime-known; @asyncCall required"));
+            return ira->codegen->invalid_inst_gen;
         }
     }
     if (casted_new_stack != nullptr) {
         ZigType *fn_ret_type = fn_type->data.fn.fn_type_id.return_type;
-        IrInstruction *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
+        IrInstGen *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
                 casted_args, arg_count, ret_ptr_uncasted);
         if (ret_ptr != nullptr && type_is_invalid(ret_ptr->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigType *anyframe_type = get_any_frame_type(ira->codegen, fn_ret_type);
 
-        IrInstructionCallGen *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
+        IrInstGenCall *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
                 arg_count, casted_args, CallModifierAsync, casted_new_stack,
                 is_async_call_builtin, ret_ptr, anyframe_type);
         return &call_gen->base;
     } else {
         ZigType *frame_type = get_fn_frame_type(ira->codegen, fn_entry);
-        IrInstruction *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
+        IrInstGen *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
                 frame_type, nullptr, true, true, false);
-        if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+        if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
             return result_loc;
         }
         result_loc = ir_implicit_cast(ira, result_loc, get_pointer_to_type(ira->codegen, frame_type, false));
         if (type_is_invalid(result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return &ir_build_call_gen(ira, source_instr, fn_entry, fn_ref, arg_count,
                 casted_args, CallModifierAsync, casted_new_stack,
                 is_async_call_builtin, result_loc, frame_type)->base;
     }
 }
 static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node,
-    IrInstruction *arg, Scope **exec_scope, size_t *next_proto_i)
+    IrInstGen *arg, Scope **exec_scope, size_t *next_proto_i)
 {
     AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
     assert(param_decl_node->type == NodeTypeParamDecl);
 
-    IrInstruction *casted_arg;
+    IrInstGen *casted_arg;
     if (param_decl_node->data.param_decl.var_token == nullptr) {
         AstNode *param_type_node = param_decl_node->data.param_decl.type;
         ZigType *param_type = ir_analyze_type_expr(ira, *exec_scope, param_type_node);
@@ -17873,15 +18874,15 @@ static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node
 }
 
 static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_node,
-    IrInstruction *arg, Scope **child_scope, size_t *next_proto_i,
-    GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstruction **casted_args,
+    IrInstGen *arg, Scope **child_scope, size_t *next_proto_i,
+    GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstGen **casted_args,
     ZigFn *impl_fn)
 {
     AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
     assert(param_decl_node->type == NodeTypeParamDecl);
     bool is_var_args = param_decl_node->data.param_decl.is_var_args;
     bool arg_part_of_generic_id = false;
-    IrInstruction *casted_arg;
+    IrInstGen *casted_arg;
     if (is_var_args) {
         arg_part_of_generic_id = true;
         casted_arg = arg;
@@ -17941,7 +18942,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
     } else if (casted_arg->value->type->id == ZigTypeIdComptimeInt ||
             casted_arg->value->type->id == ZigTypeIdComptimeFloat)
     {
-        ir_add_error(ira, casted_arg,
+        ir_add_error(ira, &casted_arg->base,
             buf_sprintf("compiler bug: integer and float literals in var args function must be casted. https://github.com/ziglang/zig/issues/557"));
         return false;
     }
@@ -17958,17 +18959,17 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
     return true;
 }
 
-static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var) {
+static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
     while (var->next_var != nullptr) {
         var = var->next_var;
     }
 
     if (var->mem_slot_index != SIZE_MAX && var->owner_exec->analysis == nullptr) {
         assert(ira->codegen->errors.length != 0);
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     if (var->var_type == nullptr || type_is_invalid(var->var_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigValue *mem_slot = nullptr;
 
@@ -17976,8 +18977,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
     bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;
     bool is_volatile = false;
 
-    IrInstruction *result = ir_build_var_ptr(&ira->new_irb,
-            instruction->scope, instruction->source_node, var);
+    IrInstGen *result = ir_build_var_ptr_gen(ira, source_instr, var);
     result->value->type = get_pointer_to_type_extra(ira->codegen, var->var_type,
             var->src_is_const, is_volatile, PtrLenSingle, var->align_bytes, 0, 0, false);
 
@@ -18030,7 +19030,7 @@ no_mem_slot:
 }
 
 // This function is called when a comptime value becomes accessible at runtime.
-static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *val) {
+static void mark_comptime_value_escape(IrAnalyze *ira, IrInst* source_instr, ZigValue *val) {
     ir_assert(value_is_comptime(val), source_instr);
     if (val->special == ConstValSpecialUndef)
         return;
@@ -18043,8 +19043,8 @@ static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_ins
     }
 }
 
-static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const)
+static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const)
 {
     assert(ptr->value->type->id == ZigTypeIdPointer);
 
@@ -18053,24 +19053,24 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
             uncasted_value->value->type->id == ZigTypeIdErrorSet)
         {
             ir_add_error(ira, source_instr, buf_sprintf("error is discarded"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         return ir_const_void(ira, source_instr);
     }
 
     if (ptr->value->type->data.pointer.is_const && !allow_write_through_const) {
         ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *child_type = ptr->value->type->data.pointer.child_type;
-    IrInstruction *value = ir_implicit_cast(ira, uncasted_value, child_type);
-    if (value == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *value = ir_implicit_cast(ira, uncasted_value, child_type);
+    if (type_is_invalid(value->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     switch (type_has_one_possible_value(ira->codegen, child_type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
             return ir_const_void(ira, source_instr);
         case OnePossibleValueNo:
@@ -18080,7 +19080,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
     if (instr_is_comptime(ptr) && ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
         if (!allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) {
             ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if ((allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) ||
             ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar ||
@@ -18089,7 +19089,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
             if (instr_is_comptime(value)) {
                 ZigValue *dest_val = const_ptr_pointee(ira, ira->codegen, ptr->value, source_instr->source_node);
                 if (dest_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 if (dest_val->special != ConstValSpecialRuntime) {
                     copy_const_val(dest_val, value->value);
 
@@ -18109,7 +19109,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
                 ZigValue *dest_val = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
                 dest_val->type = ira->codegen->builtin_types.entry_invalid;
 
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
     }
@@ -18122,15 +19122,15 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
 
     switch (type_requires_comptime(ira->codegen, child_type)) {
         case ReqCompTimeInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case ReqCompTimeYes:
             switch (type_has_one_possible_value(ira->codegen, ptr->value->type)) {
                 case OnePossibleValueInvalid:
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 case OnePossibleValueNo:
                     ir_add_error(ira, source_instr,
                             buf_sprintf("cannot store runtime value in type '%s'", buf_ptr(&child_type->name)));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 case OnePossibleValueYes:
                     return ir_const_void(ira, source_instr);
             }
@@ -18144,30 +19144,28 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
     }
 
     // If this is a store to a pointer with a runtime-known vector index,
-    // we have to figure out the IrInstruction which represents the index and
-    // emit a IrInstructionVectorStoreElem, or emit a compile error
+    // we have to figure out the IrInstGen which represents the index and
+    // emit a IrInstGenVectorStoreElem, or emit a compile error
     // explaining why it is impossible for this store to work. Which is that
     // the pointer address is of the vector; without the element index being known
     // we cannot properly perform the insertion.
     if (ptr->value->type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
-        if (ptr->id == IrInstructionIdElemPtr) {
-            IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
+        if (ptr->id == IrInstGenIdElemPtr) {
+            IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
             return ir_build_vector_store_elem(ira, source_instr, elem_ptr->array_ptr,
                     elem_ptr->elem_index, value);
         }
-        ir_add_error(ira, ptr,
+        ir_add_error(ira, &ptr->base,
             buf_sprintf("unable to determine vector element index of type '%s'",
                 buf_ptr(&ptr->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstructionStorePtr *store_ptr = ir_build_store_ptr(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, ptr, value);
-    return &store_ptr->base;
+    return ir_build_store_ptr_gen(ira, source_instr, ptr, value);
 }
 
-static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
+static IrInstGen *analyze_casted_new_stack(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
 {
     if (new_stack == nullptr)
         return nullptr;
@@ -18196,11 +19194,11 @@ static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *so
     }
 }
 
-static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_instr,
-    ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
-    IrInstruction *first_arg_ptr, CallModifier modifier,
-    IrInstruction *new_stack, bool is_async_call_builtin,
-    IrInstruction **args_ptr, size_t args_len, IrInstruction *ret_ptr, ResultLoc *call_result_loc)
+static IrInstGen *ir_analyze_fn_call(IrAnalyze *ira, IrInst* source_instr,
+    ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
+    IrInstGen *first_arg_ptr, CallModifier modifier,
+    IrInstGen *new_stack, bool is_async_call_builtin,
+    IrInstGen **args_ptr, size_t args_len, IrInstGen *ret_ptr, ResultLoc *call_result_loc)
 {
     Error err;
     FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
@@ -18221,11 +19219,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
     AstNode *fn_proto_node = fn_entry ? fn_entry->proto_node : nullptr;;
 
     if (fn_type_id->cc == CallingConventionNaked) {
-        ErrorMsg *msg = ir_add_error(ira, fn_ref, buf_sprintf("unable to call function with naked calling convention"));
+        ErrorMsg *msg = ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to call function with naked calling convention"));
         if (fn_proto_node) {
             add_error_note(ira->codegen, msg, fn_proto_node, buf_sprintf("declared here"));
         }
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (fn_type_id->is_var_args) {
@@ -18236,7 +19234,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
                 add_error_note(ira->codegen, msg, fn_proto_node,
                     buf_sprintf("declared here"));
             }
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     } else if (src_param_count != call_param_count) {
         ErrorMsg *msg = ir_add_error_node(ira, source_node,
@@ -18245,18 +19243,18 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             add_error_note(ira->codegen, msg, fn_proto_node,
                 buf_sprintf("declared here"));
         }
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (modifier == CallModifierCompileTime) {
         // No special handling is needed for compile time evaluation of generic functions.
         if (!fn_entry || fn_entry->body_node == nullptr) {
-            ir_add_error(ira, fn_ref, buf_sprintf("unable to evaluate constant expression"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to evaluate constant expression"));
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (!ir_emit_backward_branch(ira, source_instr))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         // Fork a scope of the function with known values for the parameters.
         Scope *exec_scope = &fn_entry->fndef_scope->base;
@@ -18269,47 +19267,47 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             if (fn_type_id->next_param_index >= 1) {
                 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
                 if (type_is_invalid(param_type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
             }
 
-            IrInstruction *first_arg;
+            IrInstGen *first_arg;
             if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
                 first_arg = first_arg_ptr;
             } else {
-                first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
+                first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
                 if (type_is_invalid(first_arg->value->type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
             }
 
             if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, first_arg, &exec_scope, &next_proto_i))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
 
         if (fn_proto_node->data.fn_proto.is_var_args) {
             ir_add_error(ira, source_instr,
                     buf_sprintf("compiler bug: unable to call var args function at compile time. https://github.com/ziglang/zig/issues/313"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
 
         for (size_t call_i = 0; call_i < args_len; call_i += 1) {
-            IrInstruction *old_arg = args_ptr[call_i];
+            IrInstGen *old_arg = args_ptr[call_i];
 
             if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, old_arg, &exec_scope, &next_proto_i))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
 
         AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
         ZigType *specified_return_type = ir_analyze_type_expr(ira, exec_scope, return_type_node);
         if (type_is_invalid(specified_return_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigType *return_type;
         ZigType *inferred_err_set_type = nullptr;
         if (fn_proto_node->data.fn_proto.auto_err_set) {
             inferred_err_set_type = get_auto_err_set_type(ira->codegen, fn_entry);
             if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
         } else {
             return_type = specified_return_type;
@@ -18354,24 +19352,24 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             }
 
             if (type_is_invalid(result->type)) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
-        IrInstruction *new_instruction = ir_const_move(ira, source_instr, result);
+        IrInstGen *new_instruction = ir_const_move(ira, source_instr, result);
         return ir_finish_anal(ira, new_instruction);
     }
 
     if (fn_type->data.fn.is_generic) {
         if (!fn_entry) {
-            ir_add_error(ira, fn_ref,
+            ir_add_error(ira, &fn_ref->base,
                 buf_sprintf("calling a generic function requires compile-time known function value"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         size_t new_fn_arg_count = first_arg_1_or_0 + args_len;
 
-        IrInstruction **casted_args = allocate<IrInstruction *>(new_fn_arg_count);
+        IrInstGen **casted_args = allocate<IrInstGen *>(new_fn_arg_count);
 
         // Fork a scope of the function with known values for the parameters.
         Scope *parent_scope = fn_entry->fndef_scope->base.parent;
@@ -18400,30 +19398,30 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             if (fn_type_id->next_param_index >= 1) {
                 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
                 if (type_is_invalid(param_type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
             }
 
-            IrInstruction *first_arg;
+            IrInstGen *first_arg;
             if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
                 first_arg = first_arg_ptr;
             } else {
-                first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
+                first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
                 if (type_is_invalid(first_arg->value->type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
             }
 
             if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, &impl_fn->child_scope,
                 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
-        ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
+        ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
         assert(parent_fn_entry);
         for (size_t call_i = 0; call_i < args_len; call_i += 1) {
-            IrInstruction *arg = args_ptr[call_i];
+            IrInstGen *arg = args_ptr[call_i];
 
             AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(next_proto_i);
             assert(param_decl_node->type == NodeTypeParamDecl);
@@ -18431,7 +19429,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &impl_fn->child_scope,
                 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
@@ -18441,7 +19439,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
                     ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota,
                     nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,
                     nullptr, UndefBad);
-            IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+            IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                     impl_fn->child_scope, fn_proto_node->data.fn_proto.align_expr);
             copy_const_val(const_instruction->base.value, align_result);
 
@@ -18455,11 +19453,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
             ZigType *specified_return_type = ir_analyze_type_expr(ira, impl_fn->child_scope, return_type_node);
             if (type_is_invalid(specified_return_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (fn_proto_node->data.fn_proto.auto_err_set) {
                 ZigType *inferred_err_set_type = get_auto_err_set_type(ira->codegen, impl_fn);
                 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 inst_fn_type_id.return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
             } else {
                 inst_fn_type_id.return_type = specified_return_type;
@@ -18472,7 +19470,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
                         CallModifierCompileTime, new_stack, is_async_call_builtin, args_ptr, args_len,
                         ret_ptr, call_result_loc);
             case ReqCompTimeInvalid:
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             case ReqCompTimeNo:
                 break;
             }
@@ -18486,7 +19484,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             // finish instantiating the function
             impl_fn->type_entry = get_fn_type(ira->codegen, &inst_fn_type_id);
             if (type_is_invalid(impl_fn->type_entry))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             impl_fn->ir_executable->source_node = source_instr->source_node;
             impl_fn->ir_executable->parent_exec = ira->new_irb.exec;
@@ -18504,25 +19502,25 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             parent_fn_entry->calls_or_awaits_errorable_fn = true;
         }
 
-        IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
+        IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
                 is_async_call_builtin, impl_fn);
         if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         size_t impl_param_count = impl_fn_type_id->param_count;
         if (modifier == CallModifierAsync) {
-            IrInstruction *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
+            IrInstGen *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
                 nullptr, casted_args, impl_param_count, casted_new_stack, is_async_call_builtin, ret_ptr,
                 call_result_loc);
             return ir_finish_anal(ira, result);
         }
 
-        IrInstruction *result_loc;
+        IrInstGen *result_loc;
         if (handle_is_ptr(impl_fn_type_id->return_type)) {
             result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
                     impl_fn_type_id->return_type, nullptr, true, true, false);
             if (result_loc != nullptr) {
-                if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+                if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
                     return result_loc;
                 }
                 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
@@ -18538,7 +19536,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             result_loc = get_async_call_result_loc(ira, source_instr, impl_fn_type_id->return_type,
                     is_async_call_builtin, args_ptr, args_len, ret_ptr);
             if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             result_loc = nullptr;
         }
@@ -18547,11 +19545,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
             parent_fn_entry->inferred_async_node == nullptr &&
             modifier != CallModifierNoAsync)
         {
-            parent_fn_entry->inferred_async_node = fn_ref->source_node;
+            parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
             parent_fn_entry->inferred_async_fn = impl_fn;
         }
 
-        IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr,
+        IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr,
                 impl_fn, nullptr, impl_param_count, casted_args, modifier, casted_new_stack,
                 is_async_call_builtin, result_loc, impl_fn_type_id->return_type);
 
@@ -18562,7 +19560,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
         return ir_finish_anal(ira, &new_call_instruction->base);
     }
 
-    ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
     assert(fn_type_id->return_type != nullptr);
     assert(parent_fn_entry != nullptr);
     if (fn_type_can_fail(fn_type_id)) {
@@ -18570,46 +19568,46 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
     }
 
 
-    IrInstruction **casted_args = allocate<IrInstruction *>(call_param_count);
+    IrInstGen **casted_args = allocate<IrInstGen *>(call_param_count);
     size_t next_arg_index = 0;
     if (first_arg_ptr) {
         assert(first_arg_ptr->value->type->id == ZigTypeIdPointer);
 
         ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
         if (type_is_invalid(param_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *first_arg;
+        IrInstGen *first_arg;
         if (param_type->id == ZigTypeIdPointer &&
             handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type))
         {
             first_arg = first_arg_ptr;
         } else {
-            first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
+            first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
             if (type_is_invalid(first_arg->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
+        IrInstGen *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
         if (type_is_invalid(casted_arg->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         casted_args[next_arg_index] = casted_arg;
         next_arg_index += 1;
     }
     for (size_t call_i = 0; call_i < args_len; call_i += 1) {
-        IrInstruction *old_arg = args_ptr[call_i];
+        IrInstGen *old_arg = args_ptr[call_i];
         if (type_is_invalid(old_arg->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *casted_arg;
+        IrInstGen *casted_arg;
         if (next_arg_index < src_param_count) {
             ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
             if (type_is_invalid(param_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             casted_arg = ir_implicit_cast(ira, old_arg, param_type);
             if (type_is_invalid(casted_arg->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             casted_arg = old_arg;
         }
@@ -18622,21 +19620,21 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
 
     ZigType *return_type = fn_type_id->return_type;
     if (type_is_invalid(return_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (fn_entry != nullptr && fn_entry->fn_inline == FnInlineAlways && modifier == CallModifierNeverInline) {
         ir_add_error(ira, source_instr,
             buf_sprintf("no-inline call of inline function"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
+    IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
             is_async_call_builtin, fn_entry);
     if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (modifier == CallModifierAsync) {
-        IrInstruction *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
+        IrInstGen *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
                 casted_args, call_param_count, casted_new_stack, is_async_call_builtin, ret_ptr, call_result_loc);
         return ir_finish_anal(ira, result);
     }
@@ -18645,16 +19643,16 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
         parent_fn_entry->inferred_async_node == nullptr &&
         modifier != CallModifierNoAsync)
     {
-        parent_fn_entry->inferred_async_node = fn_ref->source_node;
+        parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
         parent_fn_entry->inferred_async_fn = fn_entry;
     }
 
-    IrInstruction *result_loc;
+    IrInstGen *result_loc;
     if (handle_is_ptr(return_type)) {
         result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
                 return_type, nullptr, true, true, false);
         if (result_loc != nullptr) {
-            if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+            if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
                 return result_loc;
             }
             ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
@@ -18670,12 +19668,12 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
         result_loc = get_async_call_result_loc(ira, source_instr, return_type, is_async_call_builtin,
                 args_ptr, args_len, ret_ptr);
         if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         result_loc = nullptr;
     }
 
-    IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
+    IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
             call_param_count, casted_args, modifier, casted_new_stack,
             is_async_call_builtin, result_loc, return_type);
     if (get_scope_typeof(source_instr->scope) == nullptr) {
@@ -18684,62 +19682,62 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
     return ir_finish_anal(ira, &new_call_instruction->base);
 }
 
-static IrInstruction *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstructionCallSrc *call_instruction,
-    ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
-    IrInstruction *first_arg_ptr, CallModifier modifier)
+static IrInstGen *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstSrcCall *call_instruction,
+    ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
+    IrInstGen *first_arg_ptr, CallModifier modifier)
 {
-    IrInstruction *new_stack = nullptr;
+    IrInstGen *new_stack = nullptr;
     if (call_instruction->new_stack) {
         new_stack = call_instruction->new_stack->child;
         if (type_is_invalid(new_stack->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction **args_ptr = allocate<IrInstruction *>(call_instruction->arg_count, "IrInstruction *");
+    IrInstGen **args_ptr = allocate<IrInstGen *>(call_instruction->arg_count, "IrInstGen *");
     for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
         args_ptr[i] = call_instruction->args[i]->child;
         if (type_is_invalid(args_ptr[i]->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction *ret_ptr = nullptr;
+    IrInstGen *ret_ptr = nullptr;
     if (call_instruction->ret_ptr != nullptr) {
         ret_ptr = call_instruction->ret_ptr->child;
         if (type_is_invalid(ret_ptr->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction *result = ir_analyze_fn_call(ira, &call_instruction->base, fn_entry, fn_type, fn_ref,
+    IrInstGen *result = ir_analyze_fn_call(ira, &call_instruction->base.base, fn_entry, fn_type, fn_ref,
             first_arg_ptr, modifier, new_stack, call_instruction->is_async_call_builtin,
             args_ptr, call_instruction->arg_count, ret_ptr, call_instruction->result_loc);
-    deallocate(args_ptr, call_instruction->arg_count, "IrInstruction *");
+    deallocate(args_ptr, call_instruction->arg_count, "IrInstGen *");
     return result;
 }
 
-static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *pass1_options, IrInstruction *pass1_fn_ref, IrInstruction **args_ptr, size_t args_len,
+static IrInstGen *ir_analyze_call_extra(IrAnalyze *ira, IrInst* source_instr,
+        IrInstSrc *pass1_options, IrInstSrc *pass1_fn_ref, IrInstGen **args_ptr, size_t args_len,
         ResultLoc *result_loc)
 {
-    IrInstruction *options = pass1_options->child;
+    IrInstGen *options = pass1_options->child;
     if (type_is_invalid(options->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *fn_ref = pass1_fn_ref->child;
+    IrInstGen *fn_ref = pass1_fn_ref->child;
     if (type_is_invalid(fn_ref->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeStructField *modifier_field = find_struct_type_field(options->value->type, buf_create_from_str("modifier"));
     ir_assert(modifier_field != nullptr, source_instr);
-    IrInstruction *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
+    IrInstGen *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
     ZigValue *modifier_val = ir_resolve_const(ira, modifier_inst, UndefBad);
     if (modifier_val == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     CallModifier modifier = (CallModifier)bigint_as_u32(&modifier_val->data.x_enum_tag);
 
-    if (ir_should_inline(ira->new_irb.exec, source_instr->scope)) {
+    if (ir_should_inline(ira->old_irb.exec, source_instr->scope)) {
         switch (modifier) {
             case CallModifierBuiltin:
                 zig_unreachable();
             case CallModifierAsync:
                 ir_add_error(ira, source_instr, buf_sprintf("TODO: comptime @call with async modifier"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             case CallModifierCompileTime:
             case CallModifierNone:
             case CallModifierAlwaysInline:
@@ -18750,15 +19748,15 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
             case CallModifierNeverInline:
                 ir_add_error(ira, source_instr,
                     buf_sprintf("unable to perform 'never_inline' call at compile-time"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             case CallModifierNeverTail:
                 ir_add_error(ira, source_instr,
                     buf_sprintf("unable to perform 'never_tail' call at compile-time"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
     }
 
-    IrInstruction *first_arg_ptr = nullptr;
+    IrInstGen *first_arg_ptr = nullptr;
     ZigFn *fn = nullptr;
     if (instr_is_comptime(fn_ref)) {
         if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
@@ -18766,7 +19764,7 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
             fn = fn_ref->value->data.x_bound_fn.fn;
             first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
             if (type_is_invalid(first_arg_ptr->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             fn = ir_resolve_fn(ira, fn_ref);
         }
@@ -18778,9 +19776,9 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
         case CallModifierAlwaysInline:
         case CallModifierAsync:
             if (fn == nullptr) {
-                ir_add_error(ira, modifier_inst,
+                ir_add_error(ira, &modifier_inst->base,
                     buf_sprintf("the specified modifier requires a comptime-known function"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         default:
             break;
@@ -18790,93 +19788,93 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
 
     TypeStructField *stack_field = find_struct_type_field(options->value->type, buf_create_from_str("stack"));
     ir_assert(stack_field != nullptr, source_instr);
-    IrInstruction *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
+    IrInstGen *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
     if (type_is_invalid(opt_stack->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
+    IrInstGen *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
     bool stack_is_non_null;
     if (!ir_resolve_bool(ira, stack_is_non_null_inst, &stack_is_non_null))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *stack = nullptr;
+    IrInstGen *stack = nullptr;
     if (stack_is_non_null) {
         stack = ir_analyze_optional_value_payload_value(ira, source_instr, opt_stack, false);
         if (type_is_invalid(stack->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr,
         modifier, stack, false, args_ptr, args_len, nullptr, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstructionCallExtra *instruction) {
-    IrInstruction *args = instruction->args->child;
+static IrInstGen *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstSrcCallExtra *instruction) {
+    IrInstGen *args = instruction->args->child;
     ZigType *args_type = args->value->type;
     if (type_is_invalid(args_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (args_type->id != ZigTypeIdStruct) {
-        ir_add_error(ira, args,
+        ir_add_error(ira, &args->base,
             buf_sprintf("expected tuple or struct, found '%s'", buf_ptr(&args_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction **args_ptr = nullptr;
+    IrInstGen **args_ptr = nullptr;
     size_t args_len = 0;
 
     if (is_tuple(args_type)) {
         args_len = args_type->data.structure.src_field_count;
-        args_ptr = allocate<IrInstruction *>(args_len, "IrInstruction *");
+        args_ptr = allocate<IrInstGen *>(args_len, "IrInstGen *");
         for (size_t i = 0; i < args_len; i += 1) {
             TypeStructField *arg_field = args_type->data.structure.fields[i];
-            args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base, args, arg_field);
+            args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base.base, args, arg_field);
             if (type_is_invalid(args_ptr[i]->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
     } else {
-        ir_add_error(ira, args, buf_sprintf("TODO: struct args"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &args->base, buf_sprintf("TODO: struct args"));
+        return ira->codegen->invalid_inst_gen;
     }
-    IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
+    IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
             instruction->fn_ref, args_ptr, args_len, instruction->result_loc);
-    deallocate(args_ptr, args_len, "IrInstruction *");
+    deallocate(args_ptr, args_len, "IrInstGen *");
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstructionCallSrcArgs *instruction) {
-    IrInstruction **args_ptr = allocate<IrInstruction *>(instruction->args_len, "IrInstruction *");
+static IrInstGen *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstSrcCallArgs *instruction) {
+    IrInstGen **args_ptr = allocate<IrInstGen *>(instruction->args_len, "IrInstGen *");
     for (size_t i = 0; i < instruction->args_len; i += 1) {
         args_ptr[i] = instruction->args_ptr[i]->child;
         if (type_is_invalid(args_ptr[i]->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
+    IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
             instruction->fn_ref, args_ptr, instruction->args_len, instruction->result_loc);
-    deallocate(args_ptr, instruction->args_len, "IrInstruction *");
+    deallocate(args_ptr, instruction->args_len, "IrInstGen *");
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionCallSrc *call_instruction) {
-    IrInstruction *fn_ref = call_instruction->fn_ref->child;
+static IrInstGen *ir_analyze_instruction_call(IrAnalyze *ira, IrInstSrcCall *call_instruction) {
+    IrInstGen *fn_ref = call_instruction->fn_ref->child;
     if (type_is_invalid(fn_ref->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool is_comptime = (call_instruction->modifier == CallModifierCompileTime) ||
-        ir_should_inline(ira->new_irb.exec, call_instruction->base.scope);
+        ir_should_inline(ira->old_irb.exec, call_instruction->base.base.scope);
     CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
 
     if (is_comptime || instr_is_comptime(fn_ref)) {
         if (fn_ref->value->type->id == ZigTypeIdMetaType) {
             ZigType *ty = ir_resolve_type(ira, fn_ref);
             if (ty == nullptr)
-                return ira->codegen->invalid_instruction;
-            ErrorMsg *msg = ir_add_error_node(ira, fn_ref->source_node,
+                return ira->codegen->invalid_inst_gen;
+            ErrorMsg *msg = ir_add_error(ira, &fn_ref->base,
                 buf_sprintf("type '%s' not a function", buf_ptr(&ty->name)));
-            add_error_note(ira->codegen, msg, call_instruction->base.source_node,
+            add_error_note(ira->codegen, msg, call_instruction->base.base.source_node,
                 buf_sprintf("use @as builtin for type coercion"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else if (fn_ref->value->type->id == ZigTypeIdFn) {
             ZigFn *fn_table_entry = ir_resolve_fn(ira, fn_ref);
             ZigType *fn_type = fn_table_entry ? fn_table_entry->type_entry : fn_ref->value->type;
@@ -18886,14 +19884,14 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
         } else if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
             assert(fn_ref->value->special == ConstValSpecialStatic);
             ZigFn *fn_table_entry = fn_ref->value->data.x_bound_fn.fn;
-            IrInstruction *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
+            IrInstGen *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
             CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
             return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_table_entry->type_entry,
                 fn_ref, first_arg_ptr, modifier);
         } else {
-            ir_add_error_node(ira, fn_ref->source_node,
+            ir_add_error(ira, &fn_ref->base,
                 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
@@ -18901,9 +19899,9 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
         return ir_analyze_fn_call_src(ira, call_instruction, nullptr, fn_ref->value->type,
             fn_ref, nullptr, modifier);
     } else {
-        ir_add_error_node(ira, fn_ref->source_node,
+        ir_add_error(ira, &fn_ref->base,
             buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
@@ -18992,8 +19990,8 @@ static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp *instruction) {
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_analyze_optional_type(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueOptType *lazy_opt_type = allocate<LazyValueOptType>(1, "LazyValueOptType");
@@ -19003,12 +20001,12 @@ static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp
 
     lazy_opt_type->payload_type = instruction->value->child;
     if (ir_resolve_type_lazy(ira, lazy_opt_type->payload_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *scalar_type,
+static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *scalar_type,
         ZigValue *operand_val, ZigValue *scalar_out_val, bool is_wrap_op)
 {
     bool is_float = (scalar_type->id == ZigTypeIdFloat || scalar_type->id == ZigTypeIdComptimeFloat);
@@ -19043,19 +20041,19 @@ static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_i
     return nullptr;
 }
 
-static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_negation(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
+    IrInstGen *value = instruction->value->child;
     ZigType *expr_type = value->value->type;
     if (type_is_invalid(expr_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!(expr_type->id == ZigTypeIdInt || expr_type->id == ZigTypeIdComptimeInt ||
         expr_type->id == ZigTypeIdFloat || expr_type->id == ZigTypeIdComptimeFloat ||
         expr_type->id == ZigTypeIdVector))
     {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("negation of type '%s'", buf_ptr(&expr_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     bool is_wrap_op = (instruction->op_id == IrUnOpNegationWrap);
@@ -19065,9 +20063,9 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
     if (instr_is_comptime(value)) {
         ZigValue *operand_val = ir_resolve_const(ira, value, UndefBad);
         if (!operand_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result_instruction = ir_const(ira, &instruction->base, expr_type);
+        IrInstGen *result_instruction = ir_const(ira, &instruction->base.base, expr_type);
         ZigValue *out_val = result_instruction->value;
         if (expr_type->id == ZigTypeIdVector) {
             expand_undef_array(ira->codegen, operand_val);
@@ -19079,63 +20077,60 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
                 ZigValue *scalar_out_val = &out_val->data.x_array.data.s_none.elements[i];
                 assert(scalar_operand_val->type == scalar_type);
                 assert(scalar_out_val->type == scalar_type);
-                ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base, scalar_type,
+                ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type,
                         scalar_operand_val, scalar_out_val, is_wrap_op);
                 if (msg != nullptr) {
-                    add_error_note(ira->codegen, msg, instruction->base.source_node,
+                    add_error_note(ira->codegen, msg, instruction->base.base.source_node,
                         buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
             }
             out_val->type = expr_type;
             out_val->special = ConstValSpecialStatic;
         } else {
-            if (ir_eval_negation_scalar(ira, &instruction->base, scalar_type, operand_val, out_val,
+            if (ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type, operand_val, out_val,
                         is_wrap_op) != nullptr)
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         return result_instruction;
     }
 
-    IrInstruction *result = ir_build_un_op(&ira->new_irb,
-            instruction->base.scope, instruction->base.source_node,
-            instruction->op_id, value);
-    result->value->type = expr_type;
-    return result;
+    if (is_wrap_op) {
+        return ir_build_negation_wrapping(ira, &instruction->base.base, value, expr_type);
+    } else {
+        return ir_build_negation(ira, &instruction->base.base, value, expr_type);
+    }
 }
 
-static IrInstruction *ir_analyze_bin_not(IrAnalyze *ira, IrInstructionUnOp *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_bin_not(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
+    IrInstGen *value = instruction->value->child;
     ZigType *expr_type = value->value->type;
     if (type_is_invalid(expr_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (expr_type->id == ZigTypeIdInt) {
         if (instr_is_comptime(value)) {
             ZigValue *target_const_val = ir_resolve_const(ira, value, UndefBad);
             if (target_const_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
+            IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
             bigint_not(&result->value->data.x_bigint, &target_const_val->data.x_bigint,
                     expr_type->data.integral.bit_count, expr_type->data.integral.is_signed);
             return result;
         }
 
-        IrInstruction *result = ir_build_un_op(&ira->new_irb, instruction->base.scope,
-                instruction->base.source_node, IrUnOpBinNot, value);
-        result->value->type = expr_type;
-        return result;
+        return ir_build_binary_not(ira, &instruction->base.base, value, expr_type);
     }
 
-    ir_add_error(ira, &instruction->base,
+    ir_add_error(ira, &instruction->base.base,
             buf_sprintf("unable to perform binary not operation on type '%s'", buf_ptr(&expr_type->name)));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstructionUnOp *instruction) {
+static IrInstGen *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
     IrUnOp op_id = instruction->op_id;
     switch (op_id) {
         case IrUnOpInvalid:
@@ -19146,26 +20141,26 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
         case IrUnOpNegationWrap:
             return ir_analyze_negation(ira, instruction);
         case IrUnOpDereference: {
-            IrInstruction *ptr = instruction->value->child;
+            IrInstGen *ptr = instruction->value->child;
             if (type_is_invalid(ptr->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             ZigType *ptr_type = ptr->value->type;
             if (ptr_type->id == ZigTypeIdPointer && ptr_type->data.pointer.ptr_len == PtrLenUnknown) {
-                ir_add_error_node(ira, instruction->base.source_node,
+                ir_add_error_node(ira, instruction->base.base.source_node,
                     buf_sprintf("index syntax required for unknown-length pointer type '%s'",
                         buf_ptr(&ptr_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
-            IrInstruction *result = ir_get_deref(ira, &instruction->base, ptr, instruction->result_loc);
-            if (result == ira->codegen->invalid_instruction)
-                return ira->codegen->invalid_instruction;
+            IrInstGen *result = ir_get_deref(ira, &instruction->base.base, ptr, instruction->result_loc);
+            if (type_is_invalid(result->value->type))
+                return ira->codegen->invalid_inst_gen;
 
             // If the result needs to be an lvalue, type check it
             if (instruction->lval == LValPtr && result->value->type->id != ZigTypeIdPointer) {
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("attempt to dereference non-pointer type '%s'", buf_ptr(&result->value->type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             return result;
@@ -19177,42 +20172,40 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
 }
 
 static void ir_push_resume(IrAnalyze *ira, IrSuspendPosition pos) {
-    IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
+    IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
     if (old_bb->in_resume_stack) return;
     ira->resume_stack.append(pos);
     old_bb->in_resume_stack = true;
 }
 
-static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlock *old_bb) {
+static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlockSrc *old_bb) {
     if (ira->resume_stack.length != 0) {
         ir_push_resume(ira, {old_bb->index, 0});
     }
 }
 
-static IrInstruction *ir_analyze_instruction_br(IrAnalyze *ira, IrInstructionBr *br_instruction) {
-    IrBasicBlock *old_dest_block = br_instruction->dest_block;
+static IrInstGen *ir_analyze_instruction_br(IrAnalyze *ira, IrInstSrcBr *br_instruction) {
+    IrBasicBlockSrc *old_dest_block = br_instruction->dest_block;
 
     bool is_comptime;
     if (!ir_resolve_comptime(ira, br_instruction->is_comptime->child, &is_comptime))
         return ir_unreach_error(ira);
 
     if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
-        return ir_inline_bb(ira, &br_instruction->base, old_dest_block);
+        return ir_inline_bb(ira, &br_instruction->base.base, old_dest_block);
 
-    IrBasicBlock *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base);
+    IrBasicBlockGen *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base.base);
     if (new_bb == nullptr)
         return ir_unreach_error(ira);
 
     ir_push_resume_block(ira, old_dest_block);
 
-    IrInstruction *result = ir_build_br(&ira->new_irb,
-            br_instruction->base.scope, br_instruction->base.source_node, new_bb, nullptr);
-    result->value->type = ira->codegen->builtin_types.entry_unreachable;
+    IrInstGen *result = ir_build_br_gen(ira, &br_instruction->base.base, new_bb);
     return ir_finish_anal(ira, result);
 }
 
-static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructionCondBr *cond_br_instruction) {
-    IrInstruction *condition = cond_br_instruction->condition->child;
+static IrInstGen *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstSrcCondBr *cond_br_instruction) {
+    IrInstGen *condition = cond_br_instruction->condition->child;
     if (type_is_invalid(condition->value->type))
         return ir_unreach_error(ira);
 
@@ -19221,7 +20214,7 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
         return ir_unreach_error(ira);
 
     ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
-    IrInstruction *casted_condition = ir_implicit_cast(ira, condition, bool_type);
+    IrInstGen *casted_condition = ir_implicit_cast(ira, condition, bool_type);
     if (type_is_invalid(casted_condition->value->type))
         return ir_unreach_error(ira);
 
@@ -19230,67 +20223,61 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
         if (!ir_resolve_bool(ira, casted_condition, &cond_is_true))
             return ir_unreach_error(ira);
 
-        IrBasicBlock *old_dest_block = cond_is_true ?
+        IrBasicBlockSrc *old_dest_block = cond_is_true ?
             cond_br_instruction->then_block : cond_br_instruction->else_block;
 
         if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
-            return ir_inline_bb(ira, &cond_br_instruction->base, old_dest_block);
+            return ir_inline_bb(ira, &cond_br_instruction->base.base, old_dest_block);
 
-        IrBasicBlock *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base);
+        IrBasicBlockGen *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base.base);
         if (new_dest_block == nullptr)
             return ir_unreach_error(ira);
 
         ir_push_resume_block(ira, old_dest_block);
 
-        IrInstruction *result = ir_build_br(&ira->new_irb,
-            cond_br_instruction->base.scope, cond_br_instruction->base.source_node, new_dest_block, nullptr);
-        result->value->type = ira->codegen->builtin_types.entry_unreachable;
+        IrInstGen *result = ir_build_br_gen(ira, &cond_br_instruction->base.base, new_dest_block);
         return ir_finish_anal(ira, result);
     }
 
     assert(cond_br_instruction->then_block != cond_br_instruction->else_block);
-    IrBasicBlock *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base);
+    IrBasicBlockGen *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base.base);
     if (new_then_block == nullptr)
         return ir_unreach_error(ira);
 
-    IrBasicBlock *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base);
+    IrBasicBlockGen *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base.base);
     if (new_else_block == nullptr)
         return ir_unreach_error(ira);
 
     ir_push_resume_block(ira, cond_br_instruction->else_block);
     ir_push_resume_block(ira, cond_br_instruction->then_block);
 
-    IrInstruction *result = ir_build_cond_br(&ira->new_irb,
-            cond_br_instruction->base.scope, cond_br_instruction->base.source_node,
-            casted_condition, new_then_block, new_else_block, nullptr);
-    result->value->type = ira->codegen->builtin_types.entry_unreachable;
+    IrInstGen *result = ir_build_cond_br_gen(ira, &cond_br_instruction->base.base,
+            casted_condition, new_then_block, new_else_block);
     return ir_finish_anal(ira, result);
 }
 
-static IrInstruction *ir_analyze_instruction_unreachable(IrAnalyze *ira,
-        IrInstructionUnreachable *unreachable_instruction)
+static IrInstGen *ir_analyze_instruction_unreachable(IrAnalyze *ira,
+        IrInstSrcUnreachable *unreachable_instruction)
 {
-    IrInstruction *result = ir_build_unreachable(&ira->new_irb,
-            unreachable_instruction->base.scope, unreachable_instruction->base.source_node);
-    result->value->type = ira->codegen->builtin_types.entry_unreachable;
+    IrInstGen *result = ir_build_unreachable_gen(ira, &unreachable_instruction->base.base);
     return ir_finish_anal(ira, result);
 }
 
-static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPhi *phi_instruction) {
+static IrInstGen *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstSrcPhi *phi_instruction) {
     Error err;
 
     if (ira->const_predecessor_bb) {
         for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
-            IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
+            IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
             if (predecessor != ira->const_predecessor_bb)
                 continue;
-            IrInstruction *value = phi_instruction->incoming_values[i]->child;
+            IrInstGen *value = phi_instruction->incoming_values[i]->child;
             assert(value->value->type);
             if (type_is_invalid(value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (value->value->special != ConstValSpecialRuntime) {
-                IrInstruction *result = ir_const(ira, &phi_instruction->base, nullptr);
+                IrInstGen *result = ir_const(ira, &phi_instruction->base.base, nullptr);
                 copy_const_val(result->value, value->value);
                 return result;
             } else {
@@ -19305,17 +20292,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
         peer_parent->peers.length >= 2)
     {
         if (peer_parent->resolved_type == nullptr) {
-            IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peers.length);
+            IrInstGen **instructions = allocate<IrInstGen *>(peer_parent->peers.length);
             for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
                 ResultLocPeer *this_peer = peer_parent->peers.at(i);
 
-                IrInstruction *gen_instruction = this_peer->base.gen_instruction;
+                IrInstGen *gen_instruction = this_peer->base.gen_instruction;
                 if (gen_instruction == nullptr) {
                     // unreachable instructions will cause implicit_elem_type to be null
                     if (this_peer->base.implicit_elem_type == nullptr) {
-                        instructions[i] = ir_const_unreachable(ira, this_peer->base.source_instruction);
+                        instructions[i] = ir_const_unreachable(ira, &this_peer->base.source_instruction->base);
                     } else {
-                        instructions[i] = ir_const(ira, this_peer->base.source_instruction,
+                        instructions[i] = ir_const(ira, &this_peer->base.source_instruction->base,
                                 this_peer->base.implicit_elem_type);
                         instructions[i]->value->special = ConstValSpecialRuntime;
                     }
@@ -19324,34 +20311,34 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
                 }
 
             }
-            ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base, peer_parent->parent);
+            ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base.base, peer_parent->parent);
             peer_parent->resolved_type = ir_resolve_peer_types(ira,
-                    peer_parent->base.source_instruction->source_node, expected_type, instructions,
+                    peer_parent->base.source_instruction->base.source_node, expected_type, instructions,
                     peer_parent->peers.length);
             if (type_is_invalid(peer_parent->resolved_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             // the logic below assumes there are no instructions in the new current basic block yet
-            ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base);
+            ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base.base);
 
             // In case resolving the parent activates a suspend, do it now
-            IrInstruction *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base, peer_parent->parent,
+            IrInstGen *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base.base, peer_parent->parent,
                     peer_parent->resolved_type, nullptr, false, false, true);
             if (parent_result_loc != nullptr &&
-                (type_is_invalid(parent_result_loc->value->type) || instr_is_unreachable(parent_result_loc)))
+                (type_is_invalid(parent_result_loc->value->type) || parent_result_loc->value->type->id == ZigTypeIdUnreachable))
             {
                 return parent_result_loc;
             }
             // If the above code generated any instructions in the current basic block, we need
             // to move them to the peer parent predecessor.
-            ZigList<IrInstruction *> instrs_to_move = {};
+            ZigList<IrInstGen *> instrs_to_move = {};
             while (ira->new_irb.current_basic_block->instruction_list.length != 0) {
                 instrs_to_move.append(ira->new_irb.current_basic_block->instruction_list.pop());
             }
             if (instrs_to_move.length != 0) {
-                IrBasicBlock *predecessor = peer_parent->base.source_instruction->child->owner_bb;
-                IrInstruction *branch_instruction = predecessor->instruction_list.pop();
-                ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base);
+                IrBasicBlockGen *predecessor = peer_parent->base.source_instruction->child->owner_bb;
+                IrInstGen *branch_instruction = predecessor->instruction_list.pop();
+                ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base.base);
                 while (instrs_to_move.length != 0) {
                     predecessor->instruction_list.append(instrs_to_move.pop());
                 }
@@ -19360,7 +20347,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
         }
 
         IrSuspendPosition suspend_pos;
-        ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);
+        ira_suspend(ira, &phi_instruction->base.base, nullptr, &suspend_pos);
         ir_push_resume(ira, suspend_pos);
 
         for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
@@ -19376,34 +20363,32 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
         return ira_resume(ira);
     }
 
-    ZigList<IrBasicBlock*> new_incoming_blocks = {0};
-    ZigList<IrInstruction*> new_incoming_values = {0};
+    ZigList<IrBasicBlockGen*> new_incoming_blocks = {0};
+    ZigList<IrInstGen*> new_incoming_values = {0};
 
     for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
-        IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
+        IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
         if (predecessor->ref_count == 0)
             continue;
 
 
-        IrInstruction *old_value = phi_instruction->incoming_values[i];
+        IrInstSrc *old_value = phi_instruction->incoming_values[i];
         assert(old_value);
-        IrInstruction *new_value = old_value->child;
-        if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->other == nullptr)
+        IrInstGen *new_value = old_value->child;
+        if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->child == nullptr)
             continue;
 
         if (type_is_invalid(new_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
 
-        assert(predecessor->other);
-        new_incoming_blocks.append(predecessor->other);
+        assert(predecessor->child);
+        new_incoming_blocks.append(predecessor->child);
         new_incoming_values.append(new_value);
     }
 
     if (new_incoming_blocks.length == 0) {
-        IrInstruction *result = ir_build_unreachable(&ira->new_irb,
-            phi_instruction->base.scope, phi_instruction->base.source_node);
-        result->value->type = ira->codegen->builtin_types.entry_unreachable;
+        IrInstGen *result = ir_build_unreachable_gen(ira, &phi_instruction->base.base);
         return ir_finish_anal(ira, result);
     }
 
@@ -19415,7 +20400,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
     if (peer_parent != nullptr) {
         bool peer_parent_has_type;
         if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (peer_parent_has_type) {
             if (peer_parent->parent->id == ResultLocIdReturn) {
                 resolved_type = ira->explicit_return_type;
@@ -19423,27 +20408,27 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
                 resolved_type = ir_resolve_type(ira, peer_parent->parent->source_instruction->child);
             } else if (peer_parent->parent->resolved_loc) {
                 ZigType *resolved_loc_ptr_type = peer_parent->parent->resolved_loc->value->type;
-                ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base);
+                ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base.base);
                 resolved_type = resolved_loc_ptr_type->data.pointer.child_type;
             }
 
             if (resolved_type != nullptr && type_is_invalid(resolved_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
     }
 
     if (resolved_type == nullptr) {
-        resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.source_node, nullptr,
+        resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.base.source_node, nullptr,
                 new_incoming_values.items, new_incoming_values.length);
         if (type_is_invalid(resolved_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
     case OnePossibleValueInvalid:
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     case OnePossibleValueYes:
-        return ir_const_move(ira, &phi_instruction->base,
+        return ir_const_move(ira, &phi_instruction->base.base,
                  get_the_one_possible_value(ira->codegen, resolved_type));
     case OnePossibleValueNo:
         break;
@@ -19451,11 +20436,11 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
 
     switch (type_requires_comptime(ira->codegen, resolved_type)) {
     case ReqCompTimeInvalid:
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     case ReqCompTimeYes:
-        ir_add_error_node(ira, phi_instruction->base.source_node,
+        ir_add_error(ira, &phi_instruction->base.base,
                 buf_sprintf("values of type '%s' must be comptime known", buf_ptr(&resolved_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     case ReqCompTimeNo:
         break;
     }
@@ -19465,16 +20450,16 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
     // cast all values to the resolved type. however we can't put cast instructions in front of the phi instruction.
     // so we go back and insert the casts as the last instruction in the corresponding predecessor blocks, and
     // then make sure the branch instruction is preserved.
-    IrBasicBlock *cur_bb = ira->new_irb.current_basic_block;
+    IrBasicBlockGen *cur_bb = ira->new_irb.current_basic_block;
     for (size_t i = 0; i < new_incoming_values.length; i += 1) {
-        IrInstruction *new_value = new_incoming_values.at(i);
-        IrBasicBlock *predecessor = new_incoming_blocks.at(i);
-        ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base);
-        IrInstruction *branch_instruction = predecessor->instruction_list.pop();
-        ir_set_cursor_at_end(&ira->new_irb, predecessor);
-        IrInstruction *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
+        IrInstGen *new_value = new_incoming_values.at(i);
+        IrBasicBlockGen *predecessor = new_incoming_blocks.at(i);
+        ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base.base);
+        IrInstGen *branch_instruction = predecessor->instruction_list.pop();
+        ir_set_cursor_at_end_gen(&ira->new_irb, predecessor);
+        IrInstGen *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
         if (type_is_invalid(casted_value->value->type)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         new_incoming_values.items[i] = casted_value;
         predecessor->instruction_list.append(branch_instruction);
@@ -19485,12 +20470,10 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
             all_stack_ptrs = false;
         }
     }
-    ir_set_cursor_at_end(&ira->new_irb, cur_bb);
+    ir_set_cursor_at_end_gen(&ira->new_irb, cur_bb);
 
-    IrInstruction *result = ir_build_phi(&ira->new_irb,
-        phi_instruction->base.scope, phi_instruction->base.source_node,
-        new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, nullptr);
-    result->value->type = resolved_type;
+    IrInstGen *result = ir_build_phi_gen(ira, &phi_instruction->base.base,
+        new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, resolved_type);
 
     if (all_stack_ptrs) {
         assert(result->value->special == ConstValSpecialRuntime);
@@ -19500,17 +20483,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstructionVarPtr *instruction) {
+static IrInstGen *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstSrcVarPtr *instruction) {
     ZigVar *var = instruction->var;
-    IrInstruction *result = ir_get_var_ptr(ira, &instruction->base, var);
+    IrInstGen *result = ir_get_var_ptr(ira, &instruction->base.base, var);
     if (instruction->crossed_fndef_scope != nullptr && !instr_is_comptime(result)) {
-        ErrorMsg *msg = ir_add_error(ira, &instruction->base,
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
             buf_sprintf("'%s' not accessible from inner function", var->name));
         add_error_note(ira->codegen, msg, instruction->crossed_fndef_scope->base.source_node,
                 buf_sprintf("crossed function definition here"));
         add_error_note(ira->codegen, msg, var->decl_node,
                 buf_sprintf("declared here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     return result;
 }
@@ -19561,17 +20544,17 @@ static ZigType *adjust_ptr_len(CodeGen *g, ZigType *ptr_type, PtrLen ptr_len) {
             ptr_type->data.pointer.allow_zero);
 }
 
-static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstructionElemPtr *elem_ptr_instruction) {
+static IrInstGen *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstSrcElemPtr *elem_ptr_instruction) {
     Error err;
-    IrInstruction *array_ptr = elem_ptr_instruction->array_ptr->child;
+    IrInstGen *array_ptr = elem_ptr_instruction->array_ptr->child;
     if (type_is_invalid(array_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigValue *orig_array_ptr_val = array_ptr->value;
 
-    IrInstruction *elem_index = elem_ptr_instruction->elem_index->child;
+    IrInstGen *elem_index = elem_ptr_instruction->elem_index->child;
     if (type_is_invalid(elem_index->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ptr_type = orig_array_ptr_val->type;
     assert(ptr_type->id == ZigTypeIdPointer);
@@ -19583,7 +20566,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
     ZigType *return_type;
 
     if (type_is_invalid(array_type)) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (array_type->id == ZigTypeIdArray ||
         (array_type->id == ZigTypeIdPointer &&
          array_type->data.pointer.ptr_len == PtrLenSingle &&
@@ -19594,15 +20577,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
             ptr_type = ptr_type->data.pointer.child_type;
             if (orig_array_ptr_val->special != ConstValSpecialRuntime) {
                 orig_array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
-                        elem_ptr_instruction->base.source_node);
+                        elem_ptr_instruction->base.base.source_node);
                 if (orig_array_ptr_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
             }
         }
         if (array_type->data.array.len == 0) {
-            ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+            ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                     buf_sprintf("index 0 outside array of size 0"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         ZigType *child_type = array_type->data.array.child_type;
         if (ptr_type->data.pointer.host_int_bytes == 0) {
@@ -19613,7 +20596,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
         } else {
             uint64_t elem_val_scalar;
             if (!ir_resolve_usize(ira, elem_index, &elem_val_scalar))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             size_t bit_width = type_size_bits(ira->codegen, child_type);
             size_t bit_offset = bit_width * elem_val_scalar;
@@ -19625,9 +20608,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
         }
     } else if (array_type->id == ZigTypeIdPointer) {
         if (array_type->data.pointer.ptr_len == PtrLenSingle) {
-            ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+            ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                     buf_sprintf("index of single-item pointer"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         return_type = adjust_ptr_len(ira->codegen, array_type, elem_ptr_instruction->ptr_len);
     } else if (is_slice(array_type)) {
@@ -19641,38 +20624,38 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
         array_type->data.structure.resolve_status == ResolveStatusBeingInferred)
     {
         ZigType *usize = ira->codegen->builtin_types.entry_usize;
-        IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
+        IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
         if (type_is_invalid(casted_elem_index->value->type))
-            return ira->codegen->invalid_instruction;
-        ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base);
+            return ira->codegen->invalid_inst_gen;
+        ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base.base);
         Buf *field_name = buf_alloc();
         bigint_append_buf(field_name, &casted_elem_index->value->data.x_bigint, 10);
-        return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base,
+        return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base.base,
                 array_ptr, array_type);
     } else if (is_tuple(array_type)) {
         uint64_t elem_index_scalar;
         if (!ir_resolve_usize(ira, elem_index, &elem_index_scalar))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (elem_index_scalar >= array_type->data.structure.src_field_count) {
-            ir_add_error(ira, &elem_ptr_instruction->base, buf_sprintf(
+            ir_add_error(ira, &elem_ptr_instruction->base.base, buf_sprintf(
                 "field index %" ZIG_PRI_u64 " outside tuple '%s' which has %" PRIu32 " fields",
                 elem_index_scalar, buf_ptr(&array_type->name),
                 array_type->data.structure.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeStructField *field = array_type->data.structure.fields[elem_index_scalar];
-        return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base, field, array_ptr,
+        return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base.base, field, array_ptr,
                 array_type, false);
     } else {
-        ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+        ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                 buf_sprintf("array access of non-array type '%s'", buf_ptr(&array_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *usize = ira->codegen->builtin_types.entry_usize;
-    IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
-    if (casted_elem_index == ira->codegen->invalid_instruction)
-        return ira->codegen->invalid_instruction;
+    IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
+    if (type_is_invalid(casted_elem_index->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     bool safety_check_on = elem_ptr_instruction->safety_check_on;
     if (instr_is_comptime(casted_elem_index)) {
@@ -19681,15 +20664,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
             uint64_t array_len = array_type->data.array.len;
             if (index == array_len && array_type->data.array.sentinel != nullptr) {
                 ZigType *elem_type = array_type->data.array.child_type;
-                IrInstruction *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base, elem_type);
+                IrInstGen *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base.base, elem_type);
                 copy_const_val(sentinel_elem->value, array_type->data.array.sentinel);
-                return ir_get_ref(ira, &elem_ptr_instruction->base, sentinel_elem, true, false);
+                return ir_get_ref(ira, &elem_ptr_instruction->base.base, sentinel_elem, true, false);
             }
             if (index >= array_len) {
-                ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+                ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                     buf_sprintf("index %" ZIG_PRI_u64 " outside array of size %" ZIG_PRI_u64,
                             index, array_len));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             safety_check_on = false;
         }
@@ -19705,7 +20688,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
             // figure out the largest alignment possible
 
             if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
             uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
@@ -19735,9 +20718,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                 array_type->id == ZigTypeIdArray))
         {
             ZigValue *array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
-                                        elem_ptr_instruction->base.source_node);
+                                        elem_ptr_instruction->base.base.source_node);
             if (array_ptr_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (array_ptr_val->special == ConstValSpecialUndef &&
                 elem_ptr_instruction->init_array_type_source_node != nullptr)
@@ -19755,16 +20738,16 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                         elem_val->parent.data.p_array.elem_index = i;
                     }
                 } else if (is_slice(array_type)) {
-                    ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base);
+                    ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base.base);
                     ZigType *actual_array_type = array_ptr->value->type->data.pointer.child_type;
 
                     if (type_is_invalid(actual_array_type))
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     if (actual_array_type->id != ZigTypeIdArray) {
                         ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
                             buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
                                 buf_ptr(&actual_array_type->name)));
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     }
 
                     ZigValue *array_init_val = create_const_vals(1);
@@ -19789,7 +20772,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                     ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
                         buf_sprintf("expected array type or [_], found '%s'",
                             buf_ptr(&array_type->name)));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
             }
 
@@ -19798,7 +20781,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                     array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr))
             {
                 if (array_type->id == ZigTypeIdPointer) {
-                    IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
+                    IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
                     ZigValue *out_val = result->value;
                     out_val->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
                     size_t new_index;
@@ -19867,33 +20850,31 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                             zig_panic("TODO elem ptr on a null pointer");
                     }
                     if (new_index >= mem_size) {
-                        ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+                        ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                             buf_sprintf("index %" ZIG_PRI_u64 " outside pointer of size %" ZIG_PRI_usize "", index, old_size));
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     }
                     return result;
                 } else if (is_slice(array_type)) {
                     ZigValue *ptr_field = array_ptr_val->data.x_struct.fields[slice_ptr_index];
-                    ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base);
+                    ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base.base);
                     if (ptr_field->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
-                        IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
-                                elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, false,
-                                elem_ptr_instruction->ptr_len, nullptr);
-                        result->value->type = return_type;
-                        return result;
+                        return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
+                                elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, false,
+                                return_type);
                     }
                     ZigValue *len_field = array_ptr_val->data.x_struct.fields[slice_len_index];
-                    IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
+                    IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
                     ZigValue *out_val = result->value;
                     ZigType *slice_ptr_type = array_type->data.structure.fields[slice_ptr_index]->type_entry;
                     uint64_t slice_len = bigint_as_u64(&len_field->data.x_bigint);
                     uint64_t full_slice_len = slice_len +
                         ((slice_ptr_type->data.pointer.sentinel != nullptr) ? 1 : 0);
                     if (index >= full_slice_len) {
-                        ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
+                        ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
                             buf_sprintf("index %" ZIG_PRI_u64 " outside slice of size %" ZIG_PRI_u64,
                                 index, slice_len));
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     }
                     out_val->data.x_ptr.mut = ptr_field->data.x_ptr.mut;
                     switch (ptr_field->data.x_ptr.special) {
@@ -19913,7 +20894,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                                 {
                                     ir_assert(new_index <
                                             ptr_field->data.x_ptr.data.base_array.array_val->type->data.array.len,
-                                        &elem_ptr_instruction->base);
+                                        &elem_ptr_instruction->base.base);
                                 }
                                 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
                                 out_val->data.x_ptr.data.base_array.array_val =
@@ -19938,15 +20919,14 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
                     }
                     return result;
                 } else if (array_type->id == ZigTypeIdArray || array_type->id == ZigTypeIdVector) {
-                    IrInstruction *result;
+                    IrInstGen *result;
                     if (orig_array_ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                        result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
-                                elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index,
-                                false, elem_ptr_instruction->ptr_len, nullptr);
-                        result->value->type = return_type;
+                        result = ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
+                                elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index,
+                                false, return_type);
                         result->value->special = ConstValSpecialStatic;
                     } else {
-                        result = ir_const(ira, &elem_ptr_instruction->base, return_type);
+                        result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
                     }
                     ZigValue *out_val = result->value;
                     out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
@@ -19972,19 +20952,19 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
         // runtime known element index
         switch (type_requires_comptime(ira->codegen, return_type)) {
         case ReqCompTimeYes:
-            ir_add_error(ira, elem_index,
+            ir_add_error(ira, &elem_index->base,
                 buf_sprintf("values of type '%s' must be comptime known, but index value is runtime known",
                     buf_ptr(&return_type->data.pointer.child_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case ReqCompTimeInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case ReqCompTimeNo:
             break;
         }
 
         if (return_type->data.pointer.explicit_alignment != 0) {
             if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
             uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
@@ -20002,16 +20982,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
         }
     }
 
-    IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
-            elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, safety_check_on,
-            elem_ptr_instruction->ptr_len, nullptr);
-    result->value->type = return_type;
-    return result;
+    return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
+            elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, safety_check_on, return_type);
 }
 
-static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
-    ZigType *bare_struct_type, Buf *field_name, IrInstruction *source_instr,
-    IrInstruction *container_ptr, ZigType *container_type)
+static IrInstGen *ir_analyze_container_member_access_inner(IrAnalyze *ira,
+    ZigType *bare_struct_type, Buf *field_name, IrInst* source_instr,
+    IrInstGen *container_ptr, ZigType *container_type)
 {
     if (!is_slice(bare_struct_type)) {
         ScopeDecls *container_scope = get_container_scope(bare_struct_type);
@@ -20021,29 +20998,27 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
             if (tld->id == TldIdFn) {
                 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
                 if (tld->resolution == TldResolutionInvalid)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 TldFn *tld_fn = (TldFn *)tld;
                 ZigFn *fn_entry = tld_fn->fn_entry;
                 if (type_is_invalid(fn_entry->type_entry))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
-                IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
-                    source_instr->source_node, fn_entry, container_ptr);
+                IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn_entry, container_ptr);
                 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
             } else if (tld->id == TldIdVar) {
                 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
                 if (tld->resolution == TldResolutionInvalid)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 TldVar *tld_var = (TldVar *)tld;
                 ZigVar *var = tld_var->var;
                 if (type_is_invalid(var->var_type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 if (var->const_value->type->id == ZigTypeIdFn) {
                     ir_assert(var->const_value->data.x_ptr.special == ConstPtrSpecialFunction, source_instr);
                     ZigFn *fn = var->const_value->data.x_ptr.data.fn.fn_entry;
-                    IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
-                        source_instr->source_node, fn, container_ptr);
+                    IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn, container_ptr);
                     return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
                 }
             }
@@ -20063,7 +21038,7 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
     }
     ir_add_error_node(ira, source_instr->source_node,
         buf_sprintf("no member named '%s' in %s'%s'", buf_ptr(field_name), prefix_name, buf_ptr(&bare_struct_type->name)));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
 static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, TypeStructField *field) {
@@ -20078,24 +21053,24 @@ static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, Ty
             field->type_entry, nullptr, UndefOk);
 }
 
-static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
-        TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing)
+static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
+        TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing)
 {
     Error err;
     ZigType *field_type = resolve_struct_field_type(ira->codegen, field);
     if (field_type == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     if (field->is_comptime) {
-        IrInstruction *elem = ir_const(ira, source_instr, field_type);
+        IrInstGen *elem = ir_const(ira, source_instr, field_type);
         memoize_field_init_val(ira->codegen, struct_type, field);
         copy_const_val(elem->value, field->init_val);
         return ir_get_ref(ira, source_instr, elem, true, false);
     }
     switch (type_has_one_possible_value(ira->codegen, field_type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes: {
-            IrInstruction *elem = ir_const_move(ira, source_instr,
+            IrInstGen *elem = ir_const_move(ira, source_instr,
                  get_the_one_possible_value(ira->codegen, field_type));
             return ir_get_ref(ira, source_instr, elem, false, false);
         }
@@ -20113,7 +21088,7 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
             (struct_type->data.structure.layout == ContainerLayoutAuto) ?
                 ResolveStatusZeroBitsKnown : ResolveStatusSizeKnown;
         if ((err = type_resolve(ira->codegen, struct_type, needed_resolve_status)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         assert(struct_ptr->value->type->id == ZigTypeIdPointer);
         uint32_t ptr_bit_offset = struct_ptr->value->type->data.pointer.bit_offset_in_host;
         uint32_t ptr_host_int_bytes = struct_ptr->value->type->data.pointer.host_int_bytes;
@@ -20127,14 +21102,14 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
     if (instr_is_comptime(struct_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, struct_ptr, UndefBad);
         if (!ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
             ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
             if (struct_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (type_is_invalid(struct_val->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (initializing && struct_val->special == ConstValSpecialUndef) {
                 struct_val->data.x_struct.fields = alloc_const_vals_ptrs(struct_type->data.structure.src_field_count);
                 struct_val->special = ConstValSpecialStatic;
@@ -20148,11 +21123,9 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
                     field_val->parent.data.p_struct.field_index = i;
                 }
             }
-            IrInstruction *result;
+            IrInstGen *result;
             if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope,
-                        source_instr->source_node, struct_ptr, field);
-                result->value->type = ptr_type;
+                result = ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
                 result->value->special = ConstValSpecialStatic;
             } else {
                 result = ir_const(ira, source_instr, ptr_type);
@@ -20165,14 +21138,11 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
             return result;
         }
     }
-    IrInstruction *result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope, source_instr->source_node,
-            struct_ptr, field);
-    result->value->type = ptr_type;
-    return result;
+    return ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
 }
 
-static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
-    IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type)
+static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
+    IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type)
 {
     // The type of the field is not available until a store using this pointer happens.
     // So, here we create a special pointer type which has the inferred struct type and
@@ -20195,12 +21165,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
     if (instr_is_comptime(container_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
         if (ptr_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result;
+        IrInstGen *result;
         if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-            result = ir_build_cast(&ira->new_irb, source_instr->scope,
-                    source_instr->source_node, container_ptr_type, container_ptr, CastOpNoop);
+            result = ir_build_cast(ira, source_instr, container_ptr_type, container_ptr, CastOpNoop);
         } else {
             result = ir_const(ira, source_instr, field_ptr_type);
         }
@@ -20209,14 +21178,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
         return result;
     }
 
-    IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, field_ptr_type, container_ptr, CastOpNoop);
-    result->value->type = field_ptr_type;
-    return result;
+    return ir_build_cast(ira, source_instr, field_ptr_type, container_ptr, CastOpNoop);
 }
 
-static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
-    IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing)
+static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
+    IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing)
 {
     Error err;
 
@@ -20229,7 +21195,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
     }
 
     if ((err = type_resolve(ira->codegen, bare_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     assert(container_ptr->value->type->id == ZigTypeIdPointer);
     if (bare_type->id == ZigTypeIdStruct) {
@@ -20259,22 +21225,22 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
 
         ZigType *field_type = resolve_union_field_type(ira->codegen, field);
         if (field_type == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, field_type,
                 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
         if (instr_is_comptime(container_ptr)) {
             ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
             if (!ptr_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
                 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
                 ZigValue *union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
                 if (union_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 if (type_is_invalid(union_val->type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 if (initializing) {
                     ZigValue *payload_val = create_const_vals(1);
@@ -20295,17 +21261,16 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
                         ir_add_error_node(ira, source_instr->source_node,
                             buf_sprintf("accessing union field '%s' while field '%s' is set", buf_ptr(field_name),
                                 buf_ptr(actual_field->name)));
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     }
                 }
 
                 ZigValue *payload_val = union_val->data.x_union.payload;
 
-                IrInstruction *result;
+                IrInstGen *result;
                 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                    result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
-                            source_instr->source_node, container_ptr, field, true, initializing);
-                    result->value->type = ptr_type;
+                    result = ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true,
+                            initializing, ptr_type);
                     result->value->special = ConstValSpecialStatic;
                 } else {
                     result = ir_const(ira, source_instr, ptr_type);
@@ -20318,10 +21283,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
             }
         }
 
-        IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
-                source_instr->source_node, container_ptr, field, true, initializing);
-        result->value->type = ptr_type;
-        return result;
+        return ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true, initializing, ptr_type);
     }
 
     zig_unreachable();
@@ -20362,15 +21324,15 @@ static void add_link_lib_symbol(IrAnalyze *ira, Buf *lib_name, Buf *symbol_name,
     link_lib->symbols.append(symbol_name);
 }
 
-static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *source_instr) {
+static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst* source_instr) {
     ir_add_error(ira, source_instr, buf_sprintf("dependency loop detected"));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_instruction, Tld *tld) {
+static IrInstGen *ir_analyze_decl_ref(IrAnalyze *ira, IrInst* source_instruction, Tld *tld) {
     resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);
     if (tld->resolution == TldResolutionInvalid) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     switch (tld->id) {
@@ -20397,14 +21359,13 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
             assert(fn_entry->type_entry);
 
             if (type_is_invalid(fn_entry->type_entry))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (tld_fn->extern_lib_name != nullptr) {
                 add_link_lib_symbol(ira, tld_fn->extern_lib_name, &fn_entry->symbol_name, source_instruction->source_node);
             }
 
-            IrInstruction *fn_inst = ir_create_const_fn(&ira->new_irb, source_instruction->scope,
-                    source_instruction->source_node, fn_entry);
+            IrInstGen *fn_inst = ir_const_fn(ira, source_instruction, fn_entry);
             return ir_get_ref(ira, source_instruction, fn_inst, true, false);
         }
     }
@@ -20422,40 +21383,40 @@ static ErrorTableEntry *find_err_table_entry(ZigType *err_set_type, Buf *field_n
     return nullptr;
 }
 
-static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstructionFieldPtr *field_ptr_instruction) {
+static IrInstGen *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstSrcFieldPtr *field_ptr_instruction) {
     Error err;
-    IrInstruction *container_ptr = field_ptr_instruction->container_ptr->child;
+    IrInstGen *container_ptr = field_ptr_instruction->container_ptr->child;
     if (type_is_invalid(container_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *container_type = container_ptr->value->type->data.pointer.child_type;
 
     Buf *field_name = field_ptr_instruction->field_name_buffer;
     if (!field_name) {
-        IrInstruction *field_name_expr = field_ptr_instruction->field_name_expr->child;
+        IrInstGen *field_name_expr = field_ptr_instruction->field_name_expr->child;
         field_name = ir_resolve_str(ira, field_name_expr);
         if (!field_name)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
 
-    AstNode *source_node = field_ptr_instruction->base.source_node;
+    AstNode *source_node = field_ptr_instruction->base.base.source_node;
 
     if (type_is_invalid(container_type)) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (is_tuple(container_type) && !field_ptr_instruction->initializing && buf_eql_str(field_name, "len")) {
-        IrInstruction *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base,
+        IrInstGen *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base.base,
                 container_type->data.structure.src_field_count);
-        return ir_get_ref(ira, &field_ptr_instruction->base, len_inst, true, false);
+        return ir_get_ref(ira, &field_ptr_instruction->base.base, len_inst, true, false);
     } else if (is_slice(container_type) || is_container_ref(container_type)) {
         assert(container_ptr->value->type->id == ZigTypeIdPointer);
         if (container_type->id == ZigTypeIdPointer) {
             ZigType *bare_type = container_ref_type(container_type);
-            IrInstruction *container_child = ir_get_deref(ira, &field_ptr_instruction->base, container_ptr, nullptr);
-            IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_child, bare_type, field_ptr_instruction->initializing);
+            IrInstGen *container_child = ir_get_deref(ira, &field_ptr_instruction->base.base, container_ptr, nullptr);
+            IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_child, bare_type, field_ptr_instruction->initializing);
             return result;
         } else {
-            IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_ptr, container_type, field_ptr_instruction->initializing);
+            IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_ptr, container_type, field_ptr_instruction->initializing);
             return result;
         }
     } else if (is_array_ref(container_type) && !field_ptr_instruction->initializing) {
@@ -20470,42 +21431,42 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
             ZigType *usize = ira->codegen->builtin_types.entry_usize;
             bool ptr_is_const = true;
             bool ptr_is_volatile = false;
-            return ir_get_const_ptr(ira, &field_ptr_instruction->base, len_val,
+            return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, len_val,
                     usize, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
         } else {
             ir_add_error_node(ira, source_node,
                 buf_sprintf("no member named '%s' in '%s'", buf_ptr(field_name),
                     buf_ptr(&container_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     } else if (container_type->id == ZigTypeIdMetaType) {
         ZigValue *container_ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
         if (!container_ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         assert(container_ptr->value->type->id == ZigTypeIdPointer);
         ZigValue *child_val = const_ptr_pointee(ira, ira->codegen, container_ptr_val, source_node);
         if (child_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
-            field_ptr_instruction->base.source_node, child_val, UndefBad)))
+            field_ptr_instruction->base.base.source_node, child_val, UndefBad)))
         {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         ZigType *child_type = child_val->data.x_type;
 
         if (type_is_invalid(child_type)) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else if (is_container(child_type)) {
             if (child_type->id == ZigTypeIdEnum) {
                 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
                 TypeEnumField *field = find_enum_type_field(child_type, field_name);
                 if (field) {
                     bool ptr_is_const = true;
                     bool ptr_is_volatile = false;
-                    return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                    return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                             create_const_enum(child_type, &field->value), child_type,
                             ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
                 }
@@ -20514,37 +21475,37 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
             Tld *tld = find_container_decl(ira->codegen, container_scope, field_name);
             if (tld) {
                 if (tld->visib_mod == VisibModPrivate &&
-                    tld->import != get_scope_import(field_ptr_instruction->base.scope))
+                    tld->import != get_scope_import(field_ptr_instruction->base.base.scope))
                 {
-                    ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base,
+                    ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base.base,
                         buf_sprintf("'%s' is private", buf_ptr(field_name)));
                     add_error_note(ira->codegen, msg, tld->source_node, buf_sprintf("declared here"));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
-                return ir_analyze_decl_ref(ira, &field_ptr_instruction->base, tld);
+                return ir_analyze_decl_ref(ira, &field_ptr_instruction->base.base, tld);
             }
             if (child_type->id == ZigTypeIdUnion &&
                     (child_type->data.unionation.decl_node->data.container_decl.init_arg_expr != nullptr ||
                     child_type->data.unionation.decl_node->data.container_decl.auto_enum))
             {
                 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 TypeUnionField *field = find_union_type_field(child_type, field_name);
                 if (field) {
                     ZigType *enum_type = child_type->data.unionation.tag_type;
                     bool ptr_is_const = true;
                     bool ptr_is_volatile = false;
-                    return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                    return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                             create_const_enum(enum_type, &field->enum_field->value), enum_type,
                             ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
                 }
             }
             const char *container_name = (child_type == ira->codegen->root_import) ?
                 "root source file" : buf_ptr(buf_sprintf("container '%s'", buf_ptr(&child_type->name)));
-            ir_add_error(ira, &field_ptr_instruction->base,
+            ir_add_error(ira, &field_ptr_instruction->base.base,
                 buf_sprintf("%s has no member called '%s'",
                     container_name, buf_ptr(field_name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else if (child_type->id == ZigTypeIdErrorSet) {
             ErrorTableEntry *err_entry;
             ZigType *err_set_type;
@@ -20554,7 +21515,7 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
                     err_entry = existing_entry->value;
                 } else {
                     err_entry = allocate<ErrorTableEntry>(1);
-                    err_entry->decl_node = field_ptr_instruction->base.source_node;
+                    err_entry->decl_node = field_ptr_instruction->base.base.source_node;
                     buf_init_from_buf(&err_entry->name, field_name);
                     size_t error_value_count = ira->codegen->errors_by_index.length;
                     assert((uint32_t)error_value_count < (((uint32_t)1) << (uint32_t)ira->codegen->err_tag_type->data.integral.bit_count));
@@ -20564,19 +21525,19 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
                 }
                 if (err_entry->set_with_only_this_in_it == nullptr) {
                     err_entry->set_with_only_this_in_it = make_err_set_with_one_item(ira->codegen,
-                            field_ptr_instruction->base.scope, field_ptr_instruction->base.source_node,
+                            field_ptr_instruction->base.base.scope, field_ptr_instruction->base.base.source_node,
                             err_entry);
                 }
                 err_set_type = err_entry->set_with_only_this_in_it;
             } else {
-                if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.source_node)) {
-                    return ira->codegen->invalid_instruction;
+                if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.base.source_node)) {
+                    return ira->codegen->invalid_inst_gen;
                 }
                 err_entry = find_err_table_entry(child_type, field_name);
                 if (err_entry == nullptr) {
-                    ir_add_error(ira, &field_ptr_instruction->base,
+                    ir_add_error(ira, &field_ptr_instruction->base.base,
                         buf_sprintf("no error named '%s' in '%s'", buf_ptr(field_name), buf_ptr(&child_type->name)));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 err_set_type = child_type;
             }
@@ -20587,13 +21548,13 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
 
             bool ptr_is_const = true;
             bool ptr_is_volatile = false;
-            return ir_get_const_ptr(ira, &field_ptr_instruction->base, const_val,
+            return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, const_val,
                     err_set_type, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
         } else if (child_type->id == ZigTypeIdInt) {
             if (buf_eql_str(field_name, "bit_count")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
                         child_type->data.integral.bit_count, false),
                     ira->codegen->builtin_types.entry_num_lit_int,
@@ -20601,36 +21562,36 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
             } else if (buf_eql_str(field_name, "is_signed")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_bool(ira->codegen, child_type->data.integral.is_signed),
                     ira->codegen->builtin_types.entry_bool,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdFloat) {
             if (buf_eql_str(field_name, "bit_count")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
                         child_type->data.floating.bit_count, false),
                     ira->codegen->builtin_types.entry_num_lit_int,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdPointer) {
             if (buf_eql_str(field_name, "Child")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.pointer.child_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
@@ -20640,75 +21601,75 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
                 if ((err = type_resolve(ira->codegen, child_type->data.pointer.child_type,
                                 ResolveStatusAlignmentKnown)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
                         get_ptr_align(ira->codegen, child_type), false),
                     ira->codegen->builtin_types.entry_num_lit_int,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdArray) {
             if (buf_eql_str(field_name, "Child")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.array.child_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else if (buf_eql_str(field_name, "len")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
                         child_type->data.array.len, false),
                     ira->codegen->builtin_types.entry_num_lit_int,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdErrorUnion) {
             if (buf_eql_str(field_name, "Payload")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.error_union.payload_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else if (buf_eql_str(field_name, "ErrorSet")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.error_union.err_set_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdOptional) {
             if (buf_eql_str(field_name, "Child")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.maybe.child_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else if (child_type->id == ZigTypeIdFn) {
             if (buf_eql_str(field_name, "ReturnType")) {
@@ -20716,121 +21677,121 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
                     // Return type can only ever be null, if the function is generic
                     assert(child_type->data.fn.is_generic);
 
-                    ir_add_error(ira, &field_ptr_instruction->base,
+                    ir_add_error(ira, &field_ptr_instruction->base.base,
                         buf_sprintf("ReturnType has not been resolved because '%s' is generic", buf_ptr(&child_type->name)));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
 
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_type(ira->codegen, child_type->data.fn.fn_type_id.return_type),
                     ira->codegen->builtin_types.entry_type,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else if (buf_eql_str(field_name, "is_var_args")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_bool(ira->codegen, child_type->data.fn.fn_type_id.is_var_args),
                     ira->codegen->builtin_types.entry_bool,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else if (buf_eql_str(field_name, "arg_count")) {
                 bool ptr_is_const = true;
                 bool ptr_is_volatile = false;
-                return ir_get_const_ptr(ira, &field_ptr_instruction->base,
+                return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
                     create_const_usize(ira->codegen, child_type->data.fn.fn_type_id.param_count),
                     ira->codegen->builtin_types.entry_usize,
                     ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
             } else {
-                ir_add_error(ira, &field_ptr_instruction->base,
+                ir_add_error(ira, &field_ptr_instruction->base.base,
                     buf_sprintf("type '%s' has no member called '%s'",
                         buf_ptr(&child_type->name), buf_ptr(field_name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         } else {
-            ir_add_error(ira, &field_ptr_instruction->base,
+            ir_add_error(ira, &field_ptr_instruction->base.base,
                 buf_sprintf("type '%s' does not support field access", buf_ptr(&child_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     } else if (field_ptr_instruction->initializing) {
-        ir_add_error(ira, &field_ptr_instruction->base,
+        ir_add_error(ira, &field_ptr_instruction->base.base,
             buf_sprintf("type '%s' does not support struct initialization syntax", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else {
-        ir_add_error_node(ira, field_ptr_instruction->base.source_node,
+        ir_add_error_node(ira, field_ptr_instruction->base.base.source_node,
             buf_sprintf("type '%s' does not support field access", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
-static IrInstruction *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstructionStorePtr *instruction) {
-    IrInstruction *ptr = instruction->ptr->child;
+static IrInstGen *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstSrcStorePtr *instruction) {
+    IrInstGen *ptr = instruction->ptr->child;
     if (type_is_invalid(ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *value = instruction->value->child;
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_store_ptr(ira, &instruction->base, ptr, value, instruction->allow_write_through_const);
+    return ir_analyze_store_ptr(ira, &instruction->base.base, ptr, value, instruction->allow_write_through_const);
 }
 
-static IrInstruction *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstructionLoadPtr *instruction) {
-    IrInstruction *ptr = instruction->ptr->child;
+static IrInstGen *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstSrcLoadPtr *instruction) {
+    IrInstGen *ptr = instruction->ptr->child;
     if (type_is_invalid(ptr->value->type))
-        return ira->codegen->invalid_instruction;
-    return ir_get_deref(ira, &instruction->base, ptr, nullptr);
+        return ira->codegen->invalid_inst_gen;
+    return ir_get_deref(ira, &instruction->base.base, ptr, nullptr);
 }
 
-static IrInstruction *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstructionTypeOf *typeof_instruction) {
-    IrInstruction *expr_value = typeof_instruction->value->child;
+static IrInstGen *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstSrcTypeOf *typeof_instruction) {
+    IrInstGen *expr_value = typeof_instruction->value->child;
     ZigType *type_entry = expr_value->value->type;
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
-    return ir_const_type(ira, &typeof_instruction->base, type_entry);
+        return ira->codegen->invalid_inst_gen;
+    return ir_const_type(ira, &typeof_instruction->base.base, type_entry);
 }
 
-static IrInstruction *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstructionSetCold *instruction) {
+static IrInstGen *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstSrcSetCold *instruction) {
     if (ira->new_irb.exec->is_inline) {
         // ignore setCold when running functions at compile time
-        return ir_const_void(ira, &instruction->base);
+        return ir_const_void(ira, &instruction->base.base);
     }
 
-    IrInstruction *is_cold_value = instruction->is_cold->child;
+    IrInstGen *is_cold_value = instruction->is_cold->child;
     bool want_cold;
     if (!ir_resolve_bool(ira, is_cold_value, &want_cold))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ZigFn *fn_entry = scope_fn_entry(instruction->base.scope);
+    ZigFn *fn_entry = scope_fn_entry(instruction->base.base.scope);
     if (fn_entry == nullptr) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("@setCold outside function"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("@setCold outside function"));
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (fn_entry->set_cold_node != nullptr) {
-        ErrorMsg *msg = ir_add_error(ira, &instruction->base, buf_sprintf("cold set twice in same function"));
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base, buf_sprintf("cold set twice in same function"));
         add_error_note(ira->codegen, msg, fn_entry->set_cold_node, buf_sprintf("first set here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    fn_entry->set_cold_node = instruction->base.source_node;
+    fn_entry->set_cold_node = instruction->base.base.source_node;
     fn_entry->is_cold = want_cold;
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
-        IrInstructionSetRuntimeSafety *set_runtime_safety_instruction)
+static IrInstGen *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
+        IrInstSrcSetRuntimeSafety *set_runtime_safety_instruction)
 {
     if (ira->new_irb.exec->is_inline) {
         // ignore setRuntimeSafety when running functions at compile time
-        return ir_const_void(ira, &set_runtime_safety_instruction->base);
+        return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
     }
 
     bool *safety_off_ptr;
     AstNode **safety_set_node_ptr;
 
-    Scope *scope = set_runtime_safety_instruction->base.scope;
+    Scope *scope = set_runtime_safety_instruction->base.base.scope;
     while (scope != nullptr) {
         if (scope->id == ScopeIdBlock) {
             ScopeBlock *block_scope = (ScopeBlock *)scope;
@@ -20856,36 +21817,36 @@ static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
     }
     assert(scope != nullptr);
 
-    IrInstruction *safety_on_value = set_runtime_safety_instruction->safety_on->child;
+    IrInstGen *safety_on_value = set_runtime_safety_instruction->safety_on->child;
     bool want_runtime_safety;
     if (!ir_resolve_bool(ira, safety_on_value, &want_runtime_safety))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    AstNode *source_node = set_runtime_safety_instruction->base.source_node;
+    AstNode *source_node = set_runtime_safety_instruction->base.base.source_node;
     if (*safety_set_node_ptr) {
         ErrorMsg *msg = ir_add_error_node(ira, source_node,
                 buf_sprintf("runtime safety set twice for same scope"));
         add_error_note(ira->codegen, msg, *safety_set_node_ptr, buf_sprintf("first set here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     *safety_set_node_ptr = source_node;
     *safety_off_ptr = !want_runtime_safety;
 
-    return ir_const_void(ira, &set_runtime_safety_instruction->base);
+    return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
-        IrInstructionSetFloatMode *instruction)
+static IrInstGen *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
+        IrInstSrcSetFloatMode *instruction)
 {
     if (ira->new_irb.exec->is_inline) {
         // ignore setFloatMode when running functions at compile time
-        return ir_const_void(ira, &instruction->base);
+        return ir_const_void(ira, &instruction->base.base);
     }
 
     bool *fast_math_on_ptr;
     AstNode **fast_math_set_node_ptr;
 
-    Scope *scope = instruction->base.scope;
+    Scope *scope = instruction->base.base.scope;
     while (scope != nullptr) {
         if (scope->id == ScopeIdBlock) {
             ScopeBlock *block_scope = (ScopeBlock *)scope;
@@ -20911,42 +21872,38 @@ static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
     }
     assert(scope != nullptr);
 
-    IrInstruction *float_mode_value = instruction->mode_value->child;
+    IrInstGen *float_mode_value = instruction->mode_value->child;
     FloatMode float_mode_scalar;
     if (!ir_resolve_float_mode(ira, float_mode_value, &float_mode_scalar))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    AstNode *source_node = instruction->base.source_node;
+    AstNode *source_node = instruction->base.base.source_node;
     if (*fast_math_set_node_ptr) {
         ErrorMsg *msg = ir_add_error_node(ira, source_node,
                 buf_sprintf("float mode set twice for same scope"));
         add_error_note(ira->codegen, msg, *fast_math_set_node_ptr, buf_sprintf("first set here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     *fast_math_set_node_ptr = source_node;
     *fast_math_on_ptr = (float_mode_scalar == FloatModeOptimized);
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_any_frame_type(IrAnalyze *ira,
-        IrInstructionAnyFrameType *instruction)
-{
+static IrInstGen *ir_analyze_instruction_any_frame_type(IrAnalyze *ira, IrInstSrcAnyFrameType *instruction) {
     ZigType *payload_type = nullptr;
     if (instruction->payload_type != nullptr) {
         payload_type = ir_resolve_type(ira, instruction->payload_type->child);
         if (type_is_invalid(payload_type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *any_frame_type = get_any_frame_type(ira->codegen, payload_type);
-    return ir_const_type(ira, &instruction->base, any_frame_type);
+    return ir_const_type(ira, &instruction->base.base, any_frame_type);
 }
 
-static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
-        IrInstructionSliceType *slice_type_instruction)
-{
-    IrInstruction *result = ir_const(ira, &slice_type_instruction->base, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_analyze_instruction_slice_type(IrAnalyze *ira, IrInstSrcSliceType *slice_type_instruction) {
+    IrInstGen *result = ir_const(ira, &slice_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueSliceType *lazy_slice_type = allocate<LazyValueSliceType>(1, "LazyValueSliceType");
@@ -20957,18 +21914,18 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
     if (slice_type_instruction->align_value != nullptr) {
         lazy_slice_type->align_inst = slice_type_instruction->align_value->child;
         if (ir_resolve_const(ira, lazy_slice_type->align_inst, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     if (slice_type_instruction->sentinel != nullptr) {
         lazy_slice_type->sentinel = slice_type_instruction->sentinel->child;
         if (ir_resolve_const(ira, lazy_slice_type->sentinel, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     lazy_slice_type->elem_type = slice_type_instruction->child_type->child;
     if (ir_resolve_type_lazy(ira, lazy_slice_type->elem_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     lazy_slice_type->is_const = slice_type_instruction->is_const;
     lazy_slice_type->is_volatile = slice_type_instruction->is_volatile;
@@ -20977,31 +21934,31 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAsmSrc *asm_instruction) {
+static IrInstGen *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstSrcAsm *asm_instruction) {
     Error err;
 
-    assert(asm_instruction->base.source_node->type == NodeTypeAsmExpr);
+    assert(asm_instruction->base.base.source_node->type == NodeTypeAsmExpr);
 
-    AstNode *node = asm_instruction->base.source_node;
-    AstNodeAsmExpr *asm_expr = &asm_instruction->base.source_node->data.asm_expr;
+    AstNode *node = asm_instruction->base.base.source_node;
+    AstNodeAsmExpr *asm_expr = &asm_instruction->base.base.source_node->data.asm_expr;
 
     Buf *template_buf = ir_resolve_str(ira, asm_instruction->asm_template->child);
     if (template_buf == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (asm_instruction->is_global) {
         buf_append_char(&ira->codegen->global_asm, '\n');
         buf_append_buf(&ira->codegen->global_asm, template_buf);
 
-        return ir_const_void(ira, &asm_instruction->base);
+        return ir_const_void(ira, &asm_instruction->base.base);
     }
 
-    if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base))
-        return ira->codegen->invalid_instruction;
+    if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base.base))
+        return ira->codegen->invalid_inst_gen;
 
     ZigList<AsmToken> tok_list = {};
     if ((err = parse_asm_template(ira, node, template_buf, &tok_list))) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     for (size_t token_i = 0; token_i < tok_list.length; token_i += 1) {
@@ -21015,15 +21972,15 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
                 add_node_error(ira->codegen, node,
                     buf_sprintf("could not find '%.*s' in the inputs or outputs",
                         len, ptr));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
     }
 
     // TODO validate the output types and variable types
 
-    IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
-    IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
+    IrInstGen **input_list = allocate<IrInstGen *>(asm_expr->input_list.length);
+    IrInstGen **output_types = allocate<IrInstGen *>(asm_expr->output_list.length);
 
     ZigType *return_type = ira->codegen->builtin_types.entry_void;
     for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
@@ -21032,39 +21989,34 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
             output_types[i] = asm_instruction->output_types[i]->child;
             return_type = ir_resolve_type(ira, output_types[i]);
             if (type_is_invalid(return_type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         }
     }
 
     for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
-        IrInstruction *const input_value = asm_instruction->input_list[i]->child;
+        IrInstGen *const input_value = asm_instruction->input_list[i]->child;
         if (type_is_invalid(input_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (instr_is_comptime(input_value) &&
             (input_value->value->type->id == ZigTypeIdComptimeInt ||
             input_value->value->type->id == ZigTypeIdComptimeFloat)) {
-            ir_add_error_node(ira, input_value->source_node,
+            ir_add_error(ira, &input_value->base,
                 buf_sprintf("expected sized integer or sized float, found %s", buf_ptr(&input_value->value->type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         input_list[i] = input_value;
     }
 
-    IrInstruction *result = ir_build_asm_gen(ira,
-        asm_instruction->base.scope, asm_instruction->base.source_node,
+    return ir_build_asm_gen(ira, &asm_instruction->base.base,
         template_buf, tok_list.items, tok_list.length,
         input_list, output_types, asm_instruction->output_vars, asm_instruction->return_count,
-        asm_instruction->has_side_effects);
-    result->value->type = return_type;
-    return result;
+        asm_instruction->has_side_effects, return_type);
 }
 
-static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
-        IrInstructionArrayType *array_type_instruction)
-{
-    IrInstruction *result = ir_const(ira, &array_type_instruction->base, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_analyze_instruction_array_type(IrAnalyze *ira, IrInstSrcArrayType *array_type_instruction) {
+    IrInstGen *result = ir_const(ira, &array_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueArrayType *lazy_array_type = allocate<LazyValueArrayType>(1, "LazyValueArrayType");
@@ -21074,22 +22026,22 @@ static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
 
     lazy_array_type->elem_type = array_type_instruction->child_type->child;
     if (ir_resolve_type_lazy(ira, lazy_array_type->elem_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!ir_resolve_usize(ira, array_type_instruction->size->child, &lazy_array_type->length))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (array_type_instruction->sentinel != nullptr) {
         lazy_array_type->sentinel = array_type_instruction->sentinel->child;
         if (ir_resolve_const(ira, lazy_array_type->sentinel, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructionSizeOf *instruction) {
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
+static IrInstGen *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstSrcSizeOf *instruction) {
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueSizeOf *lazy_size_of = allocate<LazyValueSizeOf>(1, "LazyValueSizeOf");
@@ -21100,19 +22052,19 @@ static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructi
 
     lazy_size_of->target_type = instruction->type_value->child;
     if (ir_resolve_type_lazy(ira, lazy_size_of->target_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value) {
+static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value) {
     ZigType *type_entry = value->value->type;
 
     if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.allow_zero) {
         if (instr_is_comptime(value)) {
             ZigValue *c_ptr_val = ir_resolve_const(ira, value, UndefOk);
             if (c_ptr_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (c_ptr_val->special == ConstValSpecialUndef)
                 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
             bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
@@ -21121,25 +22073,19 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
             return ir_const_bool(ira, source_inst, !is_null);
         }
 
-        IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
-            source_inst->scope, source_inst->source_node, value);
-        result->value->type = ira->codegen->builtin_types.entry_bool;
-        return result;
+        return ir_build_test_non_null_gen(ira, source_inst, value);
     } else if (type_entry->id == ZigTypeIdOptional) {
         if (instr_is_comptime(value)) {
             ZigValue *maybe_val = ir_resolve_const(ira, value, UndefOk);
             if (maybe_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (maybe_val->special == ConstValSpecialUndef)
                 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
 
             return ir_const_bool(ira, source_inst, !optional_value_is_null(maybe_val));
         }
 
-        IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
-            source_inst->scope, source_inst->source_node, value);
-        result->value->type = ira->codegen->builtin_types.entry_bool;
-        return result;
+        return ir_build_test_non_null_gen(ira, source_inst, value);
     } else if (type_entry->id == ZigTypeIdNull) {
         return ir_const_bool(ira, source_inst, false);
     } else {
@@ -21147,51 +22093,51 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
     }
 }
 
-static IrInstruction *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstructionTestNonNull *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstSrcTestNonNull *instruction) {
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_test_non_null(ira, &instruction->base, value);
+    return ir_analyze_test_non_null(ira, &instruction->base.base, value);
 }
 
-static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool safety_check_on, bool initializing)
+static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool safety_check_on, bool initializing)
 {
     ZigType *type_entry = get_ptr_elem_type(ira->codegen, base_ptr);
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.ptr_len == PtrLenC) {
         if (instr_is_comptime(base_ptr)) {
             ZigValue *val = ir_resolve_const(ira, base_ptr, UndefBad);
             if (!val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
                 ZigValue *c_ptr_val = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
                 if (c_ptr_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
                     (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
                         c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
                 if (is_null) {
                     ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 return base_ptr;
             }
         }
         if (!safety_check_on)
             return base_ptr;
-        IrInstruction *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
+        IrInstGen *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
         ir_build_assert_non_null(ira, source_instr, c_ptr_val);
         return base_ptr;
     }
 
     if (type_entry->id != ZigTypeIdOptional) {
-        ir_add_error_node(ira, base_ptr->source_node,
+        ir_add_error(ira, &base_ptr->base,
                 buf_sprintf("expected optional type, found '%s'", buf_ptr(&type_entry->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *child_type = type_entry->data.maybe.child_type;
@@ -21204,16 +22150,16 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
     if (instr_is_comptime(base_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
         if (!ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
             ZigValue *optional_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
             if (optional_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (initializing) {
                 switch (type_has_one_possible_value(ira->codegen, child_type)) {
                     case OnePossibleValueInvalid:
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
                     case OnePossibleValueNo:
                         if (!same_comptime_repr) {
                             ZigValue *payload_val = create_const_vals(1);
@@ -21240,14 +22186,13 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
                 }
             } else if (optional_value_is_null(optional_val)) {
                 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
-            IrInstruction *result;
+            IrInstGen *result;
             if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
-                        source_instr->source_node, base_ptr, false, initializing);
-                result->value->type = result_type;
+                result = ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, false,
+                        initializing, result_type);
                 result->value->special = ConstValSpecialStatic;
             } else {
                 result = ir_const(ira, source_instr, result_type);
@@ -21257,7 +22202,7 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
             result_val->data.x_ptr.mut = ptr_val->data.x_ptr.mut;
             switch (type_has_one_possible_value(ira->codegen, child_type)) {
                 case OnePossibleValueInvalid:
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 case OnePossibleValueNo:
                     if (same_comptime_repr) {
                         result_val->data.x_ptr.data.ref.pointee = optional_val;
@@ -21275,131 +22220,120 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
         }
     }
 
-    IrInstruction *result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, base_ptr, safety_check_on, initializing);
-    result->value->type = result_type;
-    return result;
+    return ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, safety_check_on,
+            initializing, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
-        IrInstructionOptionalUnwrapPtr *instruction)
+static IrInstGen *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
+        IrInstSrcOptionalUnwrapPtr *instruction)
 {
-    IrInstruction *base_ptr = instruction->base_ptr->child;
+    IrInstGen *base_ptr = instruction->base_ptr->child;
     if (type_is_invalid(base_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_unwrap_optional_payload(ira, &instruction->base, base_ptr,
+    return ir_analyze_unwrap_optional_payload(ira, &instruction->base.base, base_ptr,
             instruction->safety_check_on, false);
 }
 
-static IrInstruction *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstructionCtz *instruction) {
+static IrInstGen *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstSrcCtz *instruction) {
     ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
     if (type_is_invalid(int_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
+    IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
     if (type_is_invalid(op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (int_type->data.integral.bit_count == 0)
-        return ir_const_unsigned(ira, &instruction->base, 0);
+        return ir_const_unsigned(ira, &instruction->base.base, 0);
 
     if (instr_is_comptime(op)) {
         ZigValue *val = ir_resolve_const(ira, op, UndefOk);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
+            return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
         size_t result_usize = bigint_ctz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
-        return ir_const_unsigned(ira, &instruction->base, result_usize);
+        return ir_const_unsigned(ira, &instruction->base.base, result_usize);
     }
 
     ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
-    IrInstruction *result = ir_build_ctz(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, op);
-    result->value->type = return_type;
-    return result;
+    return ir_build_ctz_gen(ira, &instruction->base.base, return_type, op);
 }
 
-static IrInstruction *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstructionClz *instruction) {
+static IrInstGen *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstSrcClz *instruction) {
     ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
     if (type_is_invalid(int_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
+    IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
     if (type_is_invalid(op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (int_type->data.integral.bit_count == 0)
-        return ir_const_unsigned(ira, &instruction->base, 0);
+        return ir_const_unsigned(ira, &instruction->base.base, 0);
 
     if (instr_is_comptime(op)) {
         ZigValue *val = ir_resolve_const(ira, op, UndefOk);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
+            return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
         size_t result_usize = bigint_clz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
-        return ir_const_unsigned(ira, &instruction->base, result_usize);
+        return ir_const_unsigned(ira, &instruction->base.base, result_usize);
     }
 
     ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
-    IrInstruction *result = ir_build_clz(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, op);
-    result->value->type = return_type;
-    return result;
+    return ir_build_clz_gen(ira, &instruction->base.base, return_type, op);
 }
 
-static IrInstruction *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstructionPopCount *instruction) {
+static IrInstGen *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstSrcPopCount *instruction) {
     ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
     if (type_is_invalid(int_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
+    IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
     if (type_is_invalid(op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (int_type->data.integral.bit_count == 0)
-        return ir_const_unsigned(ira, &instruction->base, 0);
+        return ir_const_unsigned(ira, &instruction->base.base, 0);
 
     if (instr_is_comptime(op)) {
         ZigValue *val = ir_resolve_const(ira, op, UndefOk);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
+            return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
 
         if (bigint_cmp_zero(&val->data.x_bigint) != CmpLT) {
             size_t result = bigint_popcount_unsigned(&val->data.x_bigint);
-            return ir_const_unsigned(ira, &instruction->base, result);
+            return ir_const_unsigned(ira, &instruction->base.base, result);
         }
         size_t result = bigint_popcount_signed(&val->data.x_bigint, int_type->data.integral.bit_count);
-        return ir_const_unsigned(ira, &instruction->base, result);
+        return ir_const_unsigned(ira, &instruction->base.base, result);
     }
 
     ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
-    IrInstruction *result = ir_build_pop_count(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, op);
-    result->value->type = return_type;
-    return result;
+    return ir_build_pop_count_gen(ira, &instruction->base.base, return_type, op);
 }
 
-static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value) {
+static IrInstGen *ir_analyze_union_tag(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value, bool is_gen) {
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (value->value->type->id != ZigTypeIdUnion) {
-        ir_add_error(ira, value,
+        ir_add_error(ira, &value->base,
             buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
-    if (!value->value->type->data.unionation.have_explicit_tag_type && !source_instr->is_gen) {
+    if (!value->value->type->data.unionation.have_explicit_tag_type && !is_gen) {
         ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union has no associated enum"));
         if (value->value->type->data.unionation.decl_node != nullptr) {
             add_error_note(ira->codegen, msg, value->value->type->data.unionation.decl_node,
                     buf_sprintf("declared here"));
         }
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *tag_type = value->value->type->data.unionation.tag_type;
@@ -21408,9 +22342,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
     if (instr_is_comptime(value)) {
         ZigValue *val = ir_resolve_const(ira, value, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
+        IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
                 source_instr->scope, source_instr->source_node);
         const_instruction->base.value->type = tag_type;
         const_instruction->base.value->special = ConstValSpecialStatic;
@@ -21418,15 +22352,13 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
         return &const_instruction->base;
     }
 
-    IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope, source_instr->source_node, value);
-    result->value->type = tag_type;
-    return result;
+    return ir_build_union_tag(ira, source_instr, value, tag_type);
 }
 
-static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
-        IrInstructionSwitchBr *switch_br_instruction)
+static IrInstGen *ir_analyze_instruction_switch_br(IrAnalyze *ira,
+        IrInstSrcSwitchBr *switch_br_instruction)
 {
-    IrInstruction *target_value = switch_br_instruction->target_value->child;
+    IrInstGen *target_value = switch_br_instruction->target_value->child;
     if (type_is_invalid(target_value->value->type))
         return ir_unreach_error(ira);
 
@@ -21441,21 +22373,21 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
 
     bool is_comptime;
     if (!ir_resolve_comptime(ira, switch_br_instruction->is_comptime->child, &is_comptime))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (is_comptime || instr_is_comptime(target_value)) {
         ZigValue *target_val = ir_resolve_const(ira, target_value, UndefBad);
         if (!target_val)
             return ir_unreach_error(ira);
 
-        IrBasicBlock *old_dest_block = switch_br_instruction->else_block;
+        IrBasicBlockSrc *old_dest_block = switch_br_instruction->else_block;
         for (size_t i = 0; i < case_count; i += 1) {
-            IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
-            IrInstruction *case_value = old_case->value->child;
+            IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
+            IrInstGen *case_value = old_case->value->child;
             if (type_is_invalid(case_value->value->type))
                 return ir_unreach_error(ira);
 
-            IrInstruction *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
+            IrInstGen *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
             if (type_is_invalid(casted_case_value->value->type))
                 return ir_unreach_error(ira);
 
@@ -21470,23 +22402,20 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
         }
 
         if (is_comptime || old_dest_block->ref_count == 1) {
-            return ir_inline_bb(ira, &switch_br_instruction->base, old_dest_block);
+            return ir_inline_bb(ira, &switch_br_instruction->base.base, old_dest_block);
         } else {
-            IrBasicBlock *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base);
-            IrInstruction *result = ir_build_br(&ira->new_irb,
-                switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
-                new_dest_block, nullptr);
-            result->value->type = ira->codegen->builtin_types.entry_unreachable;
+            IrBasicBlockGen *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base.base);
+            IrInstGen *result = ir_build_br_gen(ira, &switch_br_instruction->base.base, new_dest_block);
             return ir_finish_anal(ira, result);
         }
     }
 
-    IrInstructionSwitchBrCase *cases = allocate<IrInstructionSwitchBrCase>(case_count);
+    IrInstGenSwitchBrCase *cases = allocate<IrInstGenSwitchBrCase>(case_count);
     for (size_t i = 0; i < case_count; i += 1) {
-        IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
-        IrInstructionSwitchBrCase *new_case = &cases[i];
-        new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base);
-        new_case->value = ira->codegen->invalid_instruction;
+        IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
+        IrInstGenSwitchBrCase *new_case = &cases[i];
+        new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base.base);
+        new_case->value = ira->codegen->invalid_inst_gen;
 
         // Calling ir_get_new_bb set the ref_instruction on the new basic block.
         // However a switch br may branch to the same basic block which would trigger an
@@ -21494,12 +22423,12 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
         // it back after the loop.
         new_case->block->ref_instruction = nullptr;
 
-        IrInstruction *old_value = old_case->value;
-        IrInstruction *new_value = old_value->child;
+        IrInstSrc *old_value = old_case->value;
+        IrInstGen *new_value = old_value->child;
         if (type_is_invalid(new_value->value->type))
             continue;
 
-        IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
+        IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
         if (type_is_invalid(casted_new_value->value->type))
             continue;
 
@@ -21510,47 +22439,45 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
     }
 
     for (size_t i = 0; i < case_count; i += 1) {
-        IrInstructionSwitchBrCase *new_case = &cases[i];
-        if (new_case->value == ira->codegen->invalid_instruction)
+        IrInstGenSwitchBrCase *new_case = &cases[i];
+        if (type_is_invalid(new_case->value->value->type))
             return ir_unreach_error(ira);
-        new_case->block->ref_instruction = &switch_br_instruction->base;
+        new_case->block->ref_instruction = &switch_br_instruction->base.base;
     }
 
-    IrBasicBlock *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base);
-    IrInstructionSwitchBr *switch_br = ir_build_switch_br(&ira->new_irb,
-        switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
-        target_value, new_else_block, case_count, cases, nullptr, nullptr);
-    switch_br->base.value->type = ira->codegen->builtin_types.entry_unreachable;
+    IrBasicBlockGen *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base.base);
+    IrInstGenSwitchBr *switch_br = ir_build_switch_br_gen(ira, &switch_br_instruction->base.base,
+        target_value, new_else_block, case_count, cases);
     return ir_finish_anal(ira, &switch_br->base);
 }
 
-static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
-        IrInstructionSwitchTarget *switch_target_instruction)
+static IrInstGen *ir_analyze_instruction_switch_target(IrAnalyze *ira,
+        IrInstSrcSwitchTarget *switch_target_instruction)
 {
     Error err;
-    IrInstruction *target_value_ptr = switch_target_instruction->target_value_ptr->child;
+    IrInstGen *target_value_ptr = switch_target_instruction->target_value_ptr->child;
     if (type_is_invalid(target_value_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target_value_ptr->value->type->id == ZigTypeIdMetaType) {
         assert(instr_is_comptime(target_value_ptr));
         ZigType *ptr_type = target_value_ptr->value->data.x_type;
         assert(ptr_type->id == ZigTypeIdPointer);
-        return ir_const_type(ira, &switch_target_instruction->base, ptr_type->data.pointer.child_type);
+        return ir_const_type(ira, &switch_target_instruction->base.base, ptr_type->data.pointer.child_type);
     }
 
     ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
     ZigValue *pointee_val = nullptr;
     if (instr_is_comptime(target_value_ptr) && target_value_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
-        pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->source_node);
+        pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->base.source_node);
         if (pointee_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (pointee_val->special == ConstValSpecialRuntime)
             pointee_val = nullptr;
     }
     if ((err = type_resolve(ira->codegen, target_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     switch (target_type->id) {
         case ZigTypeIdInvalid:
@@ -21567,13 +22494,13 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
         case ZigTypeIdFn:
         case ZigTypeIdErrorSet: {
             if (pointee_val) {
-                IrInstruction *result = ir_const(ira, &switch_target_instruction->base, nullptr);
+                IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, nullptr);
                 copy_const_val(result->value, pointee_val);
                 result->value->type = target_type;
                 return result;
             }
 
-            IrInstruction *result = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
+            IrInstGen *result = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
             result->value->type = target_type;
             return result;
         }
@@ -21582,52 +22509,49 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
             if (!decl_node->data.container_decl.auto_enum &&
                 decl_node->data.container_decl.init_arg_expr == nullptr)
             {
-                ErrorMsg *msg = ir_add_error(ira, target_value_ptr,
+                ErrorMsg *msg = ir_add_error(ira, &target_value_ptr->base,
                     buf_sprintf("switch on union which has no attached enum"));
                 add_error_note(ira->codegen, msg, decl_node,
                         buf_sprintf("consider 'union(enum)' here"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
             ZigType *tag_type = target_type->data.unionation.tag_type;
             assert(tag_type != nullptr);
             assert(tag_type->id == ZigTypeIdEnum);
             if (pointee_val) {
-                IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
+                IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
                 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_union.tag);
                 return result;
             }
             if (tag_type->data.enumeration.src_field_count == 1) {
-                IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
+                IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
                 TypeEnumField *only_field = &tag_type->data.enumeration.fields[0];
                 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
                 return result;
             }
 
-            IrInstruction *union_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
+            IrInstGen *union_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
             union_value->value->type = target_type;
 
-            IrInstruction *union_tag_inst = ir_build_union_tag(&ira->new_irb, switch_target_instruction->base.scope,
-                    switch_target_instruction->base.source_node, union_value);
-            union_tag_inst->value->type = tag_type;
-            return union_tag_inst;
+            return ir_build_union_tag(ira, &switch_target_instruction->base.base, union_value, tag_type);
         }
         case ZigTypeIdEnum: {
             if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (target_type->data.enumeration.src_field_count == 1) {
                 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];
-                IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
+                IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
                 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
                 return result;
             }
 
             if (pointee_val) {
-                IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
+                IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
                 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_enum_tag);
                 return result;
             }
 
-            IrInstruction *enum_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
+            IrInstGen *enum_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
             enum_value->value->type = target_type;
             return enum_value;
         }
@@ -21643,17 +22567,17 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
         case ZigTypeIdVector:
         case ZigTypeIdFnFrame:
         case ZigTypeIdAnyFrame:
-            ir_add_error(ira, &switch_target_instruction->base,
+            ir_add_error(ira, &switch_target_instruction->base.base,
                 buf_sprintf("invalid switch target type '%s'", buf_ptr(&target_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstructionSwitchVar *instruction) {
-    IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
+static IrInstGen *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstSrcSwitchVar *instruction) {
+    IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
     if (type_is_invalid(target_value_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ref_type = target_value_ptr->value->type;
     assert(ref_type->id == ZigTypeIdPointer);
@@ -21664,62 +22588,62 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
         assert(enum_type->id == ZigTypeIdEnum);
         assert(instruction->prongs_len > 0);
 
-        IrInstruction *first_prong_value = instruction->prongs_ptr[0]->child;
+        IrInstGen *first_prong_value = instruction->prongs_ptr[0]->child;
         if (type_is_invalid(first_prong_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
+        IrInstGen *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
         if (type_is_invalid(first_casted_prong_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *first_prong_val = ir_resolve_const(ira, first_casted_prong_value, UndefBad);
         if (first_prong_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         TypeUnionField *first_field = find_union_field_by_tag(target_type, &first_prong_val->data.x_enum_tag);
 
         ErrorMsg *invalid_payload_msg = nullptr;
         for (size_t prong_i = 1; prong_i < instruction->prongs_len; prong_i += 1) {
-            IrInstruction *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
+            IrInstGen *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
             if (type_is_invalid(this_prong_inst->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
+            IrInstGen *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
             if (type_is_invalid(this_casted_prong_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             ZigValue *this_prong = ir_resolve_const(ira, this_casted_prong_value, UndefBad);
             if (this_prong == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             TypeUnionField *payload_field = find_union_field_by_tag(target_type, &this_prong->data.x_enum_tag);
             ZigType *payload_type = payload_field->type_entry;
             if (first_field->type_entry != payload_type) {
                 if (invalid_payload_msg == nullptr) {
-                    invalid_payload_msg = ir_add_error(ira, &instruction->base,
+                    invalid_payload_msg = ir_add_error(ira, &instruction->base.base,
                         buf_sprintf("capture group with incompatible types"));
-                    add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->source_node,
+                    add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->base.source_node,
                             buf_sprintf("type '%s' here", buf_ptr(&first_field->type_entry->name)));
                 }
-                add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->source_node,
+                add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->base.source_node,
                         buf_sprintf("type '%s' here", buf_ptr(&payload_field->type_entry->name)));
             }
         }
 
         if (invalid_payload_msg != nullptr) {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (instr_is_comptime(target_value_ptr)) {
             ZigValue *target_val_ptr = ir_resolve_const(ira, target_value_ptr, UndefBad);
             if (!target_value_ptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.source_node);
+            ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.base.source_node);
             if (pointee_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *result = ir_const(ira, &instruction->base,
+            IrInstGen *result = ir_const(ira, &instruction->base.base,
                     get_pointer_to_type(ira->codegen, first_field->type_entry,
                     target_val_ptr->type->data.pointer.is_const));
             ZigValue *out_val = result->value;
@@ -21729,11 +22653,10 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
             return result;
         }
 
-        IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb,
-            instruction->base.scope, instruction->base.source_node, target_value_ptr, first_field, false, false);
-        result->value->type = get_pointer_to_type(ira->codegen, first_field->type_entry,
+        ZigType *result_type = get_pointer_to_type(ira->codegen, first_field->type_entry,
                 target_value_ptr->value->type->data.pointer.is_const);
-        return result;
+        return ir_build_union_field_ptr(ira, &instruction->base.base, target_value_ptr, first_field,
+                false, false, result_type);
     } else if (target_type->id == ZigTypeIdErrorSet) {
         // construct an error set from the prong values
         ZigType *err_set_type = new_type_table_entry(ZigTypeIdErrorSet);
@@ -21746,7 +22669,7 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
         for (size_t i = 0; i < instruction->prongs_len; i += 1) {
             ErrorTableEntry *err = ir_resolve_error(ira, instruction->prongs_ptr[i]->child);
             if (err == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             error_list.append(err);
             buf_appendf(&err_set_type->name, "%s,", buf_ptr(&err->name));
         }
@@ -21762,29 +22685,29 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
             ref_type->data.pointer.explicit_alignment,
             ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
             ref_type->data.pointer.allow_zero);
-        return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
-                &instruction->base, false);
+        return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
+                &instruction->base.base, false);
     } else {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("switch on type '%s' provides no expression parameter", buf_ptr(&target_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
-static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
-        IrInstructionSwitchElseVar *instruction)
+static IrInstGen *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
+        IrInstSrcSwitchElseVar *instruction)
 {
-    IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
+    IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
     if (type_is_invalid(target_value_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ref_type = target_value_ptr->value->type;
     assert(ref_type->id == ZigTypeIdPointer);
     ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
     if (target_type->id == ZigTypeIdErrorSet) {
         //  make a new set that has the other cases removed
-        if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.source_node)) {
-            return ira->codegen->invalid_instruction;
+        if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.base.source_node)) {
+            return ira->codegen->invalid_inst_gen;
         }
         if (type_is_global_error_set(target_type)) {
             // the type of the else capture variable still has to be the global error set.
@@ -21794,17 +22717,17 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
         // Make note of the errors handled by other cases
         ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);
         for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {
-            IrInstructionSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
-            IrInstruction *case_expr = br_case->value->child;
+            IrInstSrcSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
+            IrInstGen *case_expr = br_case->value->child;
             if (case_expr->value->type->id == ZigTypeIdErrorSet) {
                 ErrorTableEntry *err = ir_resolve_error(ira, case_expr);
                 if (err == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 errors[err->value] = err;
             } else if (case_expr->value->type->id == ZigTypeIdMetaType) {
                 ZigType *err_set_type = ir_resolve_type(ira, case_expr);
                 if (type_is_invalid(err_set_type))
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 populate_error_set_table(errors, err_set_type);
             } else {
                 zig_unreachable();
@@ -21843,27 +22766,22 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
             ref_type->data.pointer.explicit_alignment,
             ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
             ref_type->data.pointer.allow_zero);
-        return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
-                &instruction->base, false);
+        return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
+                &instruction->base.base, false);
     }
 
     return target_value_ptr;
 }
 
-static IrInstruction *ir_analyze_instruction_union_tag(IrAnalyze *ira, IrInstructionUnionTag *instruction) {
-    IrInstruction *value = instruction->value->child;
-    return ir_analyze_union_tag(ira, &instruction->base, value);
-}
-
-static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructionImport *import_instruction) {
+static IrInstGen *ir_analyze_instruction_import(IrAnalyze *ira, IrInstSrcImport *import_instruction) {
     Error err;
 
-    IrInstruction *name_value = import_instruction->name->child;
+    IrInstGen *name_value = import_instruction->name->child;
     Buf *import_target_str = ir_resolve_str(ira, name_value);
     if (!import_target_str)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    AstNode *source_node = import_instruction->base.source_node;
+    AstNode *source_node = import_instruction->base.base.source_node;
     ZigType *import = source_node->owner;
 
     ZigType *target_import;
@@ -21876,48 +22794,48 @@ static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructio
             ir_add_error_node(ira, source_node,
                     buf_sprintf("import of file outside package path: '%s'",
                         buf_ptr(import_target_path)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else if (err == ErrorFileNotFound) {
             ir_add_error_node(ira, source_node,
                     buf_sprintf("unable to find '%s'", buf_ptr(import_target_path)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else {
             ir_add_error_node(ira, source_node,
                     buf_sprintf("unable to open '%s': %s", buf_ptr(&full_path), err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
-    return ir_const_type(ira, &import_instruction->base, target_import);
+    return ir_const_type(ira, &import_instruction->base.base, target_import);
 }
 
-static IrInstruction *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstructionRef *ref_instruction) {
-    IrInstruction *value = ref_instruction->value->child;
+static IrInstGen *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstSrcRef *ref_instruction) {
+    IrInstGen *value = ref_instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
-    return ir_get_ref(ira, &ref_instruction->base, value, ref_instruction->is_const, ref_instruction->is_volatile);
+        return ira->codegen->invalid_inst_gen;
+    return ir_get_ref(ira, &ref_instruction->base.base, value, ref_instruction->is_const, ref_instruction->is_volatile);
 }
 
-static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *source_instruction,
-        AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstruction *field_result_loc,
-        IrInstruction *result_loc)
+static IrInstGen *ir_analyze_union_init(IrAnalyze *ira, IrInst* source_instruction,
+        AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstGen *field_result_loc,
+        IrInstGen *result_loc)
 {
     Error err;
     assert(union_type->id == ZigTypeIdUnion);
 
     if ((err = type_resolve(ira->codegen, union_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeUnionField *type_field = find_union_type_field(union_type, field_name);
     if (type_field == nullptr) {
         ir_add_error_node(ira, field_source_node,
             buf_sprintf("no member named '%s' in union '%s'",
                 buf_ptr(field_name), buf_ptr(&union_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (type_is_invalid(type_field->type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
         if (instr_is_comptime(field_result_loc) &&
@@ -21929,42 +22847,42 @@ static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *sourc
         }
     }
 
-    bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instruction->scope)
+    bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instruction->scope)
         || type_requires_comptime(ira->codegen, union_type) == ReqCompTimeYes;
 
-    IrInstruction *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
+    IrInstGen *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
     if (is_comptime && !instr_is_comptime(result)) {
-        ir_add_error(ira, field_result_loc,
+        ir_add_error(ira, &field_result_loc->base,
             buf_sprintf("unable to evaluate constant expression"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     return result;
 }
 
-static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruction *instruction,
-    ZigType *container_type, size_t instr_field_count, IrInstructionContainerInitFieldsField *fields,
-    IrInstruction *result_loc)
+static IrInstGen *ir_analyze_container_init_fields(IrAnalyze *ira, IrInst *source_instr,
+    ZigType *container_type, size_t instr_field_count, IrInstSrcContainerInitFieldsField *fields,
+    IrInstGen *result_loc)
 {
     Error err;
     if (container_type->id == ZigTypeIdUnion) {
         if (instr_field_count != 1) {
-            ir_add_error(ira, instruction,
+            ir_add_error(ira, source_instr,
                 buf_sprintf("union initialization expects exactly one field"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
-        IrInstructionContainerInitFieldsField *field = &fields[0];
-        IrInstruction *field_result_loc = field->result_loc->child;
+        IrInstSrcContainerInitFieldsField *field = &fields[0];
+        IrInstGen *field_result_loc = field->result_loc->child;
         if (type_is_invalid(field_result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_analyze_union_init(ira, instruction, field->source_node, container_type, field->name,
+        return ir_analyze_union_init(ira, source_instr, field->source_node, container_type, field->name,
                 field_result_loc, result_loc);
     }
     if (container_type->id != ZigTypeIdStruct || is_slice(container_type)) {
-        ir_add_error(ira, instruction,
+        ir_add_error(ira, source_instr,
             buf_sprintf("type '%s' does not support struct initialization syntax",
                 buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (container_type->data.structure.resolve_status == ResolveStatusBeingInferred) {
@@ -21973,16 +22891,16 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
     }
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     size_t actual_field_count = container_type->data.structure.src_field_count;
 
-    IrInstruction *first_non_const_instruction = nullptr;
+    IrInstGen *first_non_const_instruction = nullptr;
 
     AstNode **field_assign_nodes = allocate<AstNode *>(actual_field_count);
-    ZigList<IrInstruction *> const_ptrs = {};
+    ZigList<IrInstGen *> const_ptrs = {};
 
-    bool is_comptime = ir_should_inline(ira->new_irb.exec, instruction->scope)
+    bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope)
         || type_requires_comptime(ira->codegen, container_type) == ReqCompTimeYes;
 
 
@@ -21998,29 +22916,29 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
     // comptime-known values.
 
     for (size_t i = 0; i < instr_field_count; i += 1) {
-        IrInstructionContainerInitFieldsField *field = &fields[i];
+        IrInstSrcContainerInitFieldsField *field = &fields[i];
 
-        IrInstruction *field_result_loc = field->result_loc->child;
+        IrInstGen *field_result_loc = field->result_loc->child;
         if (type_is_invalid(field_result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         TypeStructField *type_field = find_struct_type_field(container_type, field->name);
         if (!type_field) {
             ir_add_error_node(ira, field->source_node,
                 buf_sprintf("no member named '%s' in struct '%s'",
                     buf_ptr(field->name), buf_ptr(&container_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (type_is_invalid(type_field->type_entry))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         size_t field_index = type_field->src_index;
         AstNode *existing_assign_node = field_assign_nodes[field_index];
         if (existing_assign_node) {
             ErrorMsg *msg = ir_add_error_node(ira, field->source_node, buf_sprintf("duplicate field"));
             add_error_note(ira->codegen, msg, existing_assign_node, buf_sprintf("other field here"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         field_assign_nodes[field_index] = field->source_node;
 
@@ -22041,20 +22959,20 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
         TypeStructField *field = container_type->data.structure.fields[i];
         memoize_field_init_val(ira->codegen, container_type, field);
         if (field->init_val == nullptr) {
-            ir_add_error_node(ira, instruction->source_node,
+            ir_add_error(ira, source_instr,
                 buf_sprintf("missing field: '%s'", buf_ptr(container_type->data.structure.fields[i]->name)));
             any_missing = true;
             continue;
         }
         if (type_is_invalid(field->init_val->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *runtime_inst = ir_const(ira, instruction, field->init_val->type);
+        IrInstGen *runtime_inst = ir_const(ira, source_instr, field->init_val->type);
         copy_const_val(runtime_inst->value, field->init_val);
 
-        IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, instruction, field, result_loc,
+        IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, result_loc,
                 container_type, true);
-        ir_analyze_store_ptr(ira, instruction, field_ptr, runtime_inst, false);
+        ir_analyze_store_ptr(ira, source_instr, field_ptr, runtime_inst, false);
         if (instr_is_comptime(field_ptr) && field_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
             const_ptrs.append(field_ptr);
         } else {
@@ -22062,39 +22980,39 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
         }
     }
     if (any_missing)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
         if (const_ptrs.length != actual_field_count) {
             result_loc->value->special = ConstValSpecialRuntime;
             for (size_t i = 0; i < const_ptrs.length; i += 1) {
-                IrInstruction *field_result_loc = const_ptrs.at(i);
-                IrInstruction *deref = ir_get_deref(ira, field_result_loc, field_result_loc, nullptr);
+                IrInstGen *field_result_loc = const_ptrs.at(i);
+                IrInstGen *deref = ir_get_deref(ira, &field_result_loc->base, field_result_loc, nullptr);
                 field_result_loc->value->special = ConstValSpecialRuntime;
-                ir_analyze_store_ptr(ira, field_result_loc, field_result_loc, deref, false);
+                ir_analyze_store_ptr(ira, &field_result_loc->base, field_result_loc, deref, false);
             }
         }
     }
 
-    IrInstruction *result = ir_get_deref(ira, instruction, result_loc, nullptr);
+    IrInstGen *result = ir_get_deref(ira, source_instr, result_loc, nullptr);
 
     if (is_comptime && !instr_is_comptime(result)) {
-        ir_add_error_node(ira, first_non_const_instruction->source_node,
+        ir_add_error_node(ira, first_non_const_instruction->base.source_node,
             buf_sprintf("unable to evaluate constant expression"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
-        IrInstructionContainerInitList *instruction)
+static IrInstGen *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
+        IrInstSrcContainerInitList *instruction)
 {
-    ir_assert(instruction->result_loc != nullptr, &instruction->base);
-    IrInstruction *result_loc = instruction->result_loc->child;
+    ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
+    IrInstGen *result_loc = instruction->result_loc->child;
     if (type_is_invalid(result_loc->value->type))
         return result_loc;
-    ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
+    ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
 
     ZigType *container_type = result_loc->value->type->data.pointer.child_type;
 
@@ -22104,24 +23022,24 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
         ir_add_error_node(ira, instruction->init_array_type_source_node,
             buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
                 buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (container_type->id == ZigTypeIdVoid) {
         if (elem_count != 0) {
-            ir_add_error_node(ira, instruction->base.source_node,
+            ir_add_error_node(ira, instruction->base.base.source_node,
                 buf_sprintf("void expression expects no arguments"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
-        return ir_const_void(ira, &instruction->base);
+        return ir_const_void(ira, &instruction->base.base);
     }
 
     if (container_type->id == ZigTypeIdStruct && elem_count == 0) {
-        ir_assert(instruction->result_loc != nullptr, &instruction->base);
-        IrInstruction *result_loc = instruction->result_loc->child;
+        ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
+        IrInstGen *result_loc = instruction->result_loc->child;
         if (type_is_invalid(result_loc->value->type))
             return result_loc;
-        return ir_analyze_container_init_fields(ira, &instruction->base, container_type, 0, nullptr, result_loc);
+        return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type, 0, nullptr, result_loc);
     }
 
     if (container_type->id == ZigTypeIdArray) {
@@ -22129,10 +23047,10 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
         if (container_type->data.array.len != elem_count) {
             ZigType *literal_type = get_array_type(ira->codegen, child_type, elem_count, nullptr);
 
-            ir_add_error(ira, &instruction->base,
+            ir_add_error(ira, &instruction->base.base,
                 buf_sprintf("expected %s literal, found %s literal",
                     buf_ptr(&container_type->name), buf_ptr(&literal_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     } else if (container_type->id == ZigTypeIdStruct &&
          container_type->data.structure.resolve_status == ResolveStatusBeingInferred)
@@ -22142,17 +23060,17 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
     } else if (container_type->id == ZigTypeIdVector) {
         // OK
     } else {
-        ir_add_error_node(ira, instruction->base.source_node,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("type '%s' does not support array initialization",
                 buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     switch (type_has_one_possible_value(ira->codegen, container_type)) {
         case OnePossibleValueInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case OnePossibleValueYes:
-            return ir_const_move(ira, &instruction->base,
+            return ir_const_move(ira, &instruction->base.base,
                      get_the_one_possible_value(ira->codegen, container_type));
         case OnePossibleValueNo:
             break;
@@ -22161,16 +23079,16 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
     bool is_comptime;
     switch (type_requires_comptime(ira->codegen, container_type)) {
         case ReqCompTimeInvalid:
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         case ReqCompTimeNo:
-            is_comptime = ir_should_inline(ira->new_irb.exec, instruction->base.scope);
+            is_comptime = ir_should_inline(ira->old_irb.exec, instruction->base.base.scope);
             break;
         case ReqCompTimeYes:
             is_comptime = true;
             break;
     }
 
-    IrInstruction *first_non_const_instruction = nullptr;
+    IrInstGen *first_non_const_instruction = nullptr;
 
     // The Result Location Mechanism has already emitted runtime instructions to
     // initialize runtime elements and has omitted instructions for the comptime
@@ -22179,12 +23097,12 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
     // array initialization can be a comptime value, overwrite ConstPtrMutInfer with
     // ConstPtrMutComptimeConst. Otherwise, emit instructions to runtime-initialize the
     // elements that have comptime-known values.
-    ZigList<IrInstruction *> const_ptrs = {};
+    ZigList<IrInstGen *> const_ptrs = {};
 
     for (size_t i = 0; i < elem_count; i += 1) {
-        IrInstruction *elem_result_loc = instruction->elem_result_loc_list[i]->child;
+        IrInstGen *elem_result_loc = instruction->elem_result_loc_list[i]->child;
         if (type_is_invalid(elem_result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         assert(elem_result_loc->value->type->id == ZigTypeIdPointer);
 
@@ -22201,81 +23119,79 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
         if (const_ptrs.length != elem_count) {
             result_loc->value->special = ConstValSpecialRuntime;
             for (size_t i = 0; i < const_ptrs.length; i += 1) {
-                IrInstruction *elem_result_loc = const_ptrs.at(i);
+                IrInstGen *elem_result_loc = const_ptrs.at(i);
                 assert(elem_result_loc->value->special == ConstValSpecialStatic);
                 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
                     // This field will be generated comptime; no need to do this.
                     continue;
                 }
-                IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
+                IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
                 elem_result_loc->value->special = ConstValSpecialRuntime;
-                ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
+                ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
             }
         }
     }
 
-    IrInstruction *result = ir_get_deref(ira, &instruction->base, result_loc, nullptr);
+    IrInstGen *result = ir_get_deref(ira, &instruction->base.base, result_loc, nullptr);
     if (instr_is_comptime(result))
         return result;
 
     if (is_comptime) {
-        ir_add_error_node(ira, first_non_const_instruction->source_node,
+        ir_add_error(ira, &first_non_const_instruction->base,
             buf_sprintf("unable to evaluate constant expression"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *result_elem_type = result_loc->value->type->data.pointer.child_type;
     if (is_slice(result_elem_type)) {
-        ErrorMsg *msg = ir_add_error(ira, &instruction->base,
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
             buf_sprintf("runtime-initialized array cannot be casted to slice type '%s'",
                 buf_ptr(&result_elem_type->name)));
-        add_error_note(ira->codegen, msg, first_non_const_instruction->source_node,
+        add_error_note(ira->codegen, msg, first_non_const_instruction->base.source_node,
             buf_sprintf("this value is not comptime-known"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
-        IrInstructionContainerInitFields *instruction)
+static IrInstGen *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
+        IrInstSrcContainerInitFields *instruction)
 {
-    ir_assert(instruction->result_loc != nullptr, &instruction->base);
-    IrInstruction *result_loc = instruction->result_loc->child;
+    ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
+    IrInstGen *result_loc = instruction->result_loc->child;
     if (type_is_invalid(result_loc->value->type))
         return result_loc;
 
-    ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
+    ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
     ZigType *container_type = result_loc->value->type->data.pointer.child_type;
 
-    return ir_analyze_container_init_fields(ira, &instruction->base, container_type,
+    return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type,
         instruction->field_count, instruction->fields, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_compile_err(IrAnalyze *ira,
-        IrInstructionCompileErr *instruction)
-{
-    IrInstruction *msg_value = instruction->msg->child;
+static IrInstGen *ir_analyze_instruction_compile_err(IrAnalyze *ira, IrInstSrcCompileErr *instruction) {
+    IrInstGen *msg_value = instruction->msg->child;
     Buf *msg_buf = ir_resolve_str(ira, msg_value);
     if (!msg_buf)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ir_add_error(ira, &instruction->base, msg_buf);
+    ir_add_error(ira, &instruction->base.base, msg_buf);
 
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstructionCompileLog *instruction) {
+static IrInstGen *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstSrcCompileLog *instruction) {
     Buf buf = BUF_INIT;
     fprintf(stderr, "| ");
     for (size_t i = 0; i < instruction->msg_count; i += 1) {
-        IrInstruction *msg = instruction->msg_list[i]->child;
+        IrInstGen *msg = instruction->msg_list[i]->child;
         if (type_is_invalid(msg->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         buf_resize(&buf, 0);
         if (msg->value->special == ConstValSpecialLazy) {
             // Resolve any lazy value that's passed, we need its value
-            if (ir_resolve_lazy(ira->codegen, msg->source_node, msg->value))
-                return ira->codegen->invalid_instruction;
+            if (ir_resolve_lazy(ira->codegen, msg->base.source_node, msg->value))
+                return ira->codegen->invalid_inst_gen;
         }
         render_const_value(ira->codegen, &buf, msg->value);
         const char *comma_str = (i != 0) ? ", " : "";
@@ -22283,25 +23199,25 @@ static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstr
     }
     fprintf(stderr, "\n");
 
-    auto *expr = &instruction->base.source_node->data.fn_call_expr;
+    auto *expr = &instruction->base.base.source_node->data.fn_call_expr;
     if (!expr->seen) {
         // Here we bypass higher level functions such as ir_add_error because we do not want
         // invalidate_exec to be called.
-        add_node_error(ira->codegen, instruction->base.source_node, buf_sprintf("found compile log statement"));
+        add_node_error(ira->codegen, instruction->base.base.source_node, buf_sprintf("found compile log statement"));
     }
     expr->seen = true;
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstructionErrName *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstSrcErrName *instruction) {
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
     if (type_is_invalid(casted_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
             true, false, PtrLenUnknown, 0, 0, 0, false);
@@ -22309,13 +23225,13 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
     if (instr_is_comptime(casted_value)) {
         ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ErrorTableEntry *err = casted_value->value->data.x_err_set;
         if (!err->cached_error_name_val) {
             ZigValue *array_val = create_const_str_lit(ira->codegen, &err->name)->data.x_ptr.data.ref.pointee;
             err->cached_error_name_val = create_const_slice(ira->codegen, array_val, 0, buf_len(&err->name), true);
         }
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         copy_const_val(result->value, err->cached_error_name_val);
         result->value->type = str_type;
         return result;
@@ -22323,20 +23239,17 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
 
     ira->codegen->generate_error_name_table = true;
 
-    IrInstruction *result = ir_build_err_name(&ira->new_irb,
-        instruction->base.scope, instruction->base.source_node, value);
-    result->value->type = str_type;
-    return result;
+    return ir_build_err_name_gen(ira, &instruction->base.base, value, str_type);
 }
 
-static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstructionTagName *instruction) {
+static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrcTagName *instruction) {
     Error err;
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id == ZigTypeIdEnumLiteral) {
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         Buf *field_name = target->value->data.x_enum_literal;
         ZigValue *array_val = create_const_str_lit(ira->codegen, field_name)->data.x_ptr.data.ref.pointee;
         init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field_name), true);
@@ -22344,9 +23257,9 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
     }
 
     if (target->value->type->id == ZigTypeIdUnion) {
-        target = ir_analyze_union_tag(ira, &instruction->base, target);
+        target = ir_analyze_union_tag(ira, &instruction->base.base, target, instruction->base.is_gen);
         if (type_is_invalid(target->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     assert(target->value->type->id == ZigTypeIdEnum);
@@ -22355,75 +23268,73 @@ static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrIns
         !target->value->type->data.enumeration.non_exhaustive) {
         TypeEnumField *only_field = &target->value->type->data.enumeration.fields[0];
         ZigValue *array_val = create_const_str_lit(ira->codegen, only_field->name)->data.x_ptr.data.ref.pointee;
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(only_field->name), true);
         return result;
     }
 
     if (instr_is_comptime(target)) {
         if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (target->value->type->data.enumeration.non_exhaustive) {
-            add_node_error(ira->codegen, instruction->base.source_node,
+            ir_add_error(ira, &instruction->base.base,
                 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
         ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field->name), true);
         return result;
     }
 
-    IrInstruction *result = ir_build_tag_name(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, target);
     ZigType *u8_ptr_type = get_pointer_to_type_extra(
             ira->codegen, ira->codegen->builtin_types.entry_u8,
             true, false, PtrLenUnknown,
             0, 0, 0, false);
-    result->value->type = get_slice_type(ira->codegen, u8_ptr_type);
-    return result;
+    ZigType *result_type = get_slice_type(ira->codegen, u8_ptr_type);
+    return ir_build_tag_name_gen(ira, &instruction->base.base, target, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
-        IrInstructionFieldParentPtr *instruction)
+static IrInstGen *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
+        IrInstSrcFieldParentPtr *instruction)
 {
     Error err;
-    IrInstruction *type_value = instruction->type_value->child;
+    IrInstGen *type_value = instruction->type_value->child;
     ZigType *container_type = ir_resolve_type(ira, type_value);
     if (type_is_invalid(container_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *field_name_value = instruction->field_name->child;
+    IrInstGen *field_name_value = instruction->field_name->child;
     Buf *field_name = ir_resolve_str(ira, field_name_value);
     if (!field_name)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *field_ptr = instruction->field_ptr->child;
+    IrInstGen *field_ptr = instruction->field_ptr->child;
     if (type_is_invalid(field_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (container_type->id != ZigTypeIdStruct) {
-        ir_add_error(ira, type_value,
+        ir_add_error(ira, &type_value->base,
                 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     TypeStructField *field = find_struct_type_field(container_type, field_name);
     if (field == nullptr) {
-        ir_add_error(ira, field_name_value,
+        ir_add_error(ira, &field_name_value->base,
                 buf_sprintf("struct '%s' has no field '%s'",
                     buf_ptr(&container_type->name), buf_ptr(field_name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (field_ptr->value->type->id != ZigTypeIdPointer) {
-        ir_add_error(ira, field_ptr,
+        ir_add_error(ira, &field_ptr->base,
                 buf_sprintf("expected pointer, found '%s'", buf_ptr(&field_ptr->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     bool is_packed = (container_type->data.structure.layout == ContainerLayoutPacked);
@@ -22435,9 +23346,9 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
             field_ptr->value->type->data.pointer.is_volatile,
             PtrLenSingle,
             field_ptr_align, 0, 0, false);
-    IrInstruction *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
+    IrInstGen *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
     if (type_is_invalid(casted_field_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *result_type = get_pointer_to_type_extra(ira->codegen, container_type,
             casted_field_ptr->value->type->data.pointer.is_const,
@@ -22448,23 +23359,23 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
     if (instr_is_comptime(casted_field_ptr)) {
         ZigValue *field_ptr_val = ir_resolve_const(ira, casted_field_ptr, UndefBad);
         if (!field_ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (field_ptr_val->data.x_ptr.special != ConstPtrSpecialBaseStruct) {
-            ir_add_error(ira, field_ptr, buf_sprintf("pointer value not based on parent struct"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &field_ptr->base, buf_sprintf("pointer value not based on parent struct"));
+            return ira->codegen->invalid_inst_gen;
         }
 
         size_t ptr_field_index = field_ptr_val->data.x_ptr.data.base_struct.field_index;
         if (ptr_field_index != field->src_index) {
-            ir_add_error(ira, &instruction->base,
+            ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("field '%s' has index %" ZIG_PRI_usize " but pointer value is index %" ZIG_PRI_usize " of struct '%s'",
                         buf_ptr(field->name), field->src_index,
                         ptr_field_index, buf_ptr(&container_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *result = ir_const(ira, &instruction->base, result_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
         ZigValue *out_val = result->value;
         out_val->data.x_ptr.special = ConstPtrSpecialRef;
         out_val->data.x_ptr.data.ref.pointee = field_ptr_val->data.x_ptr.data.base_struct.struct_val;
@@ -22472,15 +23383,12 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
         return result;
     }
 
-    IrInstruction *result = ir_build_field_parent_ptr(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, type_value, field_name_value, casted_field_ptr, field);
-    result->value->type = result_type;
-    return result;
+    return ir_build_field_parent_ptr_gen(ira, &instruction->base.base, casted_field_ptr, field, result_type);
 }
 
 static TypeStructField *validate_byte_offset(IrAnalyze *ira,
-        IrInstruction *type_value,
-        IrInstruction *field_name_value,
+        IrInstGen *type_value,
+        IrInstGen *field_name_value,
         size_t *byte_offset)
 {
     ZigType *container_type = ir_resolve_type(ira, type_value);
@@ -22496,21 +23404,21 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
         return nullptr;
 
     if (container_type->id != ZigTypeIdStruct) {
-        ir_add_error(ira, type_value,
+        ir_add_error(ira, &type_value->base,
                 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
         return nullptr;
     }
 
     TypeStructField *field = find_struct_type_field(container_type, field_name);
     if (field == nullptr) {
-        ir_add_error(ira, field_name_value,
+        ir_add_error(ira, &field_name_value->base,
                 buf_sprintf("struct '%s' has no field '%s'",
                         buf_ptr(&container_type->name), buf_ptr(field_name)));
         return nullptr;
     }
 
     if (!type_has_bits(field->type_entry)) {
-        ir_add_error(ira, field_name_value,
+        ir_add_error(ira, &field_name_value->base,
                 buf_sprintf("zero-bit field '%s' in struct '%s' has no offset",
                         buf_ptr(field_name), buf_ptr(&container_type->name)));
         return nullptr;
@@ -22520,36 +23428,32 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
     return field;
 }
 
-static IrInstruction *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira,
-        IrInstructionByteOffsetOf *instruction)
-{
-    IrInstruction *type_value = instruction->type_value->child;
+static IrInstGen *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira, IrInstSrcByteOffsetOf *instruction) {
+    IrInstGen *type_value = instruction->type_value->child;
     if (type_is_invalid(type_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *field_name_value = instruction->field_name->child;
+    IrInstGen *field_name_value = instruction->field_name->child;
     size_t byte_offset = 0;
     if (!validate_byte_offset(ira, type_value, field_name_value, &byte_offset))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
 
-    return ir_const_unsigned(ira, &instruction->base, byte_offset);
+    return ir_const_unsigned(ira, &instruction->base.base, byte_offset);
 }
 
-static IrInstruction *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira,
-        IrInstructionBitOffsetOf *instruction)
-{
-    IrInstruction *type_value = instruction->type_value->child;
+static IrInstGen *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira, IrInstSrcBitOffsetOf *instruction) {
+    IrInstGen *type_value = instruction->type_value->child;
     if (type_is_invalid(type_value->value->type))
-        return ira->codegen->invalid_instruction;
-    IrInstruction *field_name_value = instruction->field_name->child;
+        return ira->codegen->invalid_inst_gen;
+    IrInstGen *field_name_value = instruction->field_name->child;
     size_t byte_offset = 0;
     TypeStructField *field = nullptr;
     if (!(field = validate_byte_offset(ira, type_value, field_name_value, &byte_offset)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     size_t bit_offset = byte_offset * 8 + field->bit_offset_in_host;
-    return ir_const_unsigned(ira, &instruction->base, bit_offset);
+    return ir_const_unsigned(ira, &instruction->base.base, bit_offset);
 }
 
 static void ensure_field_index(ZigType *type, const char *field_name, size_t index) {
@@ -22597,7 +23501,7 @@ static ZigType *ir_type_info_get_type(IrAnalyze *ira, const char *type_name, Zig
     return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, nullptr, var->const_value);
 }
 
-static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *out_val,
+static Error ir_make_type_info_decls(IrAnalyze *ira, IrInst* source_instr, ZigValue *out_val,
         ScopeDecls *decls_scope)
 {
     Error err;
@@ -22955,7 +23859,7 @@ static void make_enum_field_val(IrAnalyze *ira, ZigValue *enum_field_val, TypeEn
     enum_field_val->data.x_struct.fields = inner_fields;
 }
 
-static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
+static Error ir_make_type_info_value(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
         ZigValue **out)
 {
     Error err;
@@ -23543,22 +24447,20 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
     return ErrorNone;
 }
 
-static IrInstruction *ir_analyze_instruction_type_info(IrAnalyze *ira,
-        IrInstructionTypeInfo *instruction)
-{
+static IrInstGen *ir_analyze_instruction_type_info(IrAnalyze *ira, IrInstSrcTypeInfo *instruction) {
     Error err;
-    IrInstruction *type_value = instruction->type_value->child;
+    IrInstGen *type_value = instruction->type_value->child;
     ZigType *type_entry = ir_resolve_type(ira, type_value);
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *result_type = ir_type_info_get_type(ira, nullptr, nullptr);
 
     ZigValue *payload;
-    if ((err = ir_make_type_info_value(ira, &instruction->base, type_entry, &payload)))
-        return ira->codegen->invalid_instruction;
+    if ((err = ir_make_type_info_value(ira, &instruction->base.base, type_entry, &payload)))
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result = ir_const(ira, &instruction->base, result_type);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
     ZigValue *out_val = result->value;
     bigint_init_unsigned(&out_val->data.x_union.tag, type_id_index(type_entry));
     out_val->data.x_union.payload = payload;
@@ -23582,15 +24484,15 @@ static ZigValue *get_const_field(IrAnalyze *ira, AstNode *source_node, ZigValue
     return val;
 }
 
-static Error get_const_field_sentinel(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *struct_value,
+static Error get_const_field_sentinel(IrAnalyze *ira, IrInst* source_instr, ZigValue *struct_value,
         const char *name, size_t field_index, ZigType *elem_type, ZigValue **result)
 {
     ZigValue *field_val = get_const_field(ira, source_instr->source_node, struct_value, name, field_index);
     if (field_val == nullptr)
         return ErrorSemanticAnalyzeFail;
 
-    IrInstruction *field_inst = ir_const_move(ira, source_instr, field_val);
-    IrInstruction *casted_field_inst = ir_implicit_cast(ira, field_inst,
+    IrInstGen *field_inst = ir_const_move(ira, source_instr, field_val);
+    IrInstGen *casted_field_inst = ir_implicit_cast(ira, field_inst,
             get_optional_type(ira->codegen, elem_type));
     if (type_is_invalid(casted_field_inst->value->type))
         return ErrorSemanticAnalyzeFail;
@@ -23629,12 +24531,12 @@ static ZigType *get_const_field_meta_type(IrAnalyze *ira, AstNode *source_node,
 {
     ZigValue *value = get_const_field(ira, source_node, struct_value, name, field_index);
     if (value == nullptr)
-        return ira->codegen->invalid_instruction->value->type;
+        return ira->codegen->invalid_inst_gen->value->type;
     assert(value->type == ira->codegen->builtin_types.entry_type);
     return value->data.x_type;
 }
 
-static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, ZigTypeId tagTypeId, ZigValue *payload) {
+static ZigType *type_info_to_type(IrAnalyze *ira, IrInst *source_instr, ZigTypeId tagTypeId, ZigValue *payload) {
     Error err;
     switch (tagTypeId) {
         case ZigTypeIdInvalid:
@@ -23650,21 +24552,21 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
         case ZigTypeIdInt: {
             assert(payload->special == ConstValSpecialStatic);
             assert(payload->type == ir_type_info_get_type(ira, "Int", nullptr));
-            BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 1);
+            BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 1);
             if (bi == nullptr)
-                return ira->codegen->invalid_instruction->value->type;
+                return ira->codegen->invalid_inst_gen->value->type;
             bool is_signed;
-            if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_signed", 0, &is_signed)))
-                return ira->codegen->invalid_instruction->value->type;
+            if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_signed", 0, &is_signed)))
+                return ira->codegen->invalid_inst_gen->value->type;
             return get_int_type(ira->codegen, is_signed, bigint_as_u32(bi));
         }
         case ZigTypeIdFloat:
             {
                 assert(payload->special == ConstValSpecialStatic);
                 assert(payload->type == ir_type_info_get_type(ira, "Float", nullptr));
-                BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 0);
+                BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 0);
                 if (bi == nullptr)
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
                 uint32_t bits = bigint_as_u32(bi);
                 switch (bits) {
                     case  16: return ira->codegen->builtin_types.entry_f16;
@@ -23672,48 +24574,47 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
                     case  64: return ira->codegen->builtin_types.entry_f64;
                     case 128: return ira->codegen->builtin_types.entry_f128;
                 }
-                ir_add_error(ira, instruction,
-                    buf_sprintf("%d-bit float unsupported", bits));
-                return ira->codegen->invalid_instruction->value->type;
+                ir_add_error(ira, source_instr, buf_sprintf("%d-bit float unsupported", bits));
+                return ira->codegen->invalid_inst_gen->value->type;
             }
         case ZigTypeIdPointer:
             {
                 ZigType *type_info_pointer_type = ir_type_info_get_type(ira, "Pointer", nullptr);
                 assert(payload->special == ConstValSpecialStatic);
                 assert(payload->type == type_info_pointer_type);
-                ZigValue *size_value = get_const_field(ira, instruction->source_node, payload, "size", 0);
+                ZigValue *size_value = get_const_field(ira, source_instr->source_node, payload, "size", 0);
                 assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));
                 BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);
                 PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);
-                ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 4);
+                ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 4);
                 if (type_is_invalid(elem_type))
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
                 ZigValue *sentinel;
-                if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 6,
+                if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 6,
                                 elem_type, &sentinel)))
                 {
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
                 }
-                BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "alignment", 3);
+                BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "alignment", 3);
                 if (bi == nullptr)
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
 
                 bool is_const;
-                if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_const", 1, &is_const)))
-                    return ira->codegen->invalid_instruction->value->type;
+                if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_const", 1, &is_const)))
+                    return ira->codegen->invalid_inst_gen->value->type;
 
                 bool is_volatile;
-                if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_volatile", 2,
+                if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_volatile", 2,
                                 &is_volatile)))
                 {
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
                 }
 
                 bool is_allowzero;
-                if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_allowzero", 5,
+                if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_allowzero", 5,
                                 &is_allowzero)))
                 {
-                    return ira->codegen->invalid_instruction->value->type;
+                    return ira->codegen->invalid_inst_gen->value->type;
                 }
 
 
@@ -23734,18 +24635,18 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
         case ZigTypeIdArray: {
             assert(payload->special == ConstValSpecialStatic);
             assert(payload->type == ir_type_info_get_type(ira, "Array", nullptr));
-            ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 1);
+            ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 1);
             if (type_is_invalid(elem_type))
-                return ira->codegen->invalid_instruction->value->type;
+                return ira->codegen->invalid_inst_gen->value->type;
             ZigValue *sentinel;
-            if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 2,
+            if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 2,
                             elem_type, &sentinel)))
             {
-                return ira->codegen->invalid_instruction->value->type;
+                return ira->codegen->invalid_inst_gen->value->type;
             }
-            BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "len", 0);
+            BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "len", 0);
             if (bi == nullptr)
-                return ira->codegen->invalid_instruction->value->type;
+                return ira->codegen->invalid_inst_gen->value->type;
             return get_array_type(ira->codegen, elem_type, bigint_as_u64(bi), sentinel);
         }
         case ZigTypeIdComptimeFloat:
@@ -23765,78 +24666,77 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
         case ZigTypeIdAnyFrame:
         case ZigTypeIdVector:
         case ZigTypeIdEnumLiteral:
-            ir_add_error(ira, instruction, buf_sprintf(
+            ir_add_error(ira, source_instr, buf_sprintf(
                 "TODO implement @Type for 'TypeInfo.%s': see https://github.com/ziglang/zig/issues/2907", type_id_name(tagTypeId)));
-            return ira->codegen->invalid_instruction->value->type;
+            return ira->codegen->invalid_inst_gen->value->type;
         case ZigTypeIdUnion:
         case ZigTypeIdFn:
         case ZigTypeIdBoundFn:
         case ZigTypeIdStruct:
-            ir_add_error(ira, instruction, buf_sprintf(
+            ir_add_error(ira, source_instr, buf_sprintf(
                 "@Type not availble for 'TypeInfo.%s'", type_id_name(tagTypeId)));
-            return ira->codegen->invalid_instruction->value->type;
+            return ira->codegen->invalid_inst_gen->value->type;
     }
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_instruction_type(IrAnalyze *ira, IrInstructionType *instruction) {
-    IrInstruction *type_info_ir = instruction->type_info->child;
-    if (type_is_invalid(type_info_ir->value->type))
-        return ira->codegen->invalid_instruction;
+static IrInstGen *ir_analyze_instruction_type(IrAnalyze *ira, IrInstSrcType *instruction) {
+    IrInstGen *uncasted_type_info = instruction->type_info->child;
+    if (type_is_invalid(uncasted_type_info->value->type))
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_ir = ir_implicit_cast(ira, type_info_ir, ir_type_info_get_type(ira, nullptr, nullptr));
-    if (type_is_invalid(casted_ir->value->type))
-        return ira->codegen->invalid_instruction;
+    IrInstGen *type_info = ir_implicit_cast(ira, uncasted_type_info, ir_type_info_get_type(ira, nullptr, nullptr));
+    if (type_is_invalid(type_info->value->type))
+        return ira->codegen->invalid_inst_gen;
 
-    ZigValue *type_info_value = ir_resolve_const(ira, casted_ir, UndefBad);
-    if (!type_info_value)
-        return ira->codegen->invalid_instruction;
-    ZigTypeId typeId = type_id_at_index(bigint_as_usize(&type_info_value->data.x_union.tag));
-    ZigType *type = type_info_to_type(ira, type_info_ir, typeId, type_info_value->data.x_union.payload);
+    ZigValue *type_info_val = ir_resolve_const(ira, type_info, UndefBad);
+    if (type_info_val == nullptr)
+        return ira->codegen->invalid_inst_gen;
+    ZigTypeId type_id_tag = type_id_at_index(bigint_as_usize(&type_info_val->data.x_union.tag));
+    ZigType *type = type_info_to_type(ira, &uncasted_type_info->base, type_id_tag,
+            type_info_val->data.x_union.payload);
     if (type_is_invalid(type))
-        return ira->codegen->invalid_instruction;
-    return ir_const_type(ira, &instruction->base, type);
+        return ira->codegen->invalid_inst_gen;
+    return ir_const_type(ira, &instruction->base.base, type);
 }
 
-static IrInstruction *ir_analyze_instruction_type_id(IrAnalyze *ira,
-        IrInstructionTypeId *instruction)
-{
-    IrInstruction *type_value = instruction->type_value->child;
+static IrInstGen *ir_analyze_instruction_type_id(IrAnalyze *ira, IrInstSrcTypeId *instruction) {
+    IrInstGen *type_value = instruction->type_value->child;
     ZigType *type_entry = ir_resolve_type(ira, type_value);
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *result_type = get_builtin_type(ira->codegen, "TypeId");
 
-    IrInstruction *result = ir_const(ira, &instruction->base, result_type);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
     bigint_init_unsigned(&result->value->data.x_enum_tag, type_id_index(type_entry));
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
-        IrInstructionSetEvalBranchQuota *instruction)
+static IrInstGen *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
+        IrInstSrcSetEvalBranchQuota *instruction)
 {
     uint64_t new_quota;
     if (!ir_resolve_usize(ira, instruction->new_quota->child, &new_quota))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (new_quota > *ira->new_irb.exec->backward_branch_quota) {
         *ira->new_irb.exec->backward_branch_quota = new_quota;
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstructionTypeName *instruction) {
-    IrInstruction *type_value = instruction->type_value->child;
+static IrInstGen *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstSrcTypeName *instruction) {
+    IrInstGen *type_value = instruction->type_value->child;
     ZigType *type_entry = ir_resolve_type(ira, type_value);
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!type_entry->cached_const_name_val) {
         type_entry->cached_const_name_val = create_const_str_lit(ira->codegen, type_bare_name(type_entry));
     }
-    IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
     copy_const_val(result->value, type_entry->cached_const_name_val);
     return result;
 }
@@ -23848,13 +24748,13 @@ static void ir_cimport_cache_paths(Buf *cache_dir, Buf *tmp_c_file_digest, Buf *
             buf_ptr(cache_dir), buf_ptr(tmp_c_file_digest));
     buf_appendf(out_zig_path, "%s" OS_SEP "cimport.zig", buf_ptr(out_zig_dir));
 }
-static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstructionCImport *instruction) {
+static IrInstGen *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstSrcCImport *instruction) {
     Error err;
-    AstNode *node = instruction->base.source_node;
+    AstNode *node = instruction->base.base.source_node;
     assert(node->type == NodeTypeFnCallExpr);
     AstNode *block_node = node->data.fn_call_expr.params.at(0);
 
-    ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.scope);
+    ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.base.scope);
 
     // Execute the C import block like an inline function
     ZigType *void_type = ira->codegen->builtin_types.entry_void;
@@ -23862,9 +24762,9 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
         ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr,
         &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad);
     if (type_is_invalid(cimport_result->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ZigPackage *cur_scope_pkg = scope_package(instruction->base.scope);
+    ZigPackage *cur_scope_pkg = scope_package(instruction->base.base.scope);
     Buf *namespace_name = buf_sprintf("%s.cimport:%" ZIG_PRI_usize ":%" ZIG_PRI_usize,
             buf_ptr(&cur_scope_pkg->pkg_path), node->line + 1, node->column + 1);
 
@@ -23876,7 +24776,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
     CacheHash *cache_hash;
     if ((err = create_c_object_cache(ira->codegen, &cache_hash, false))) {
         ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to create cache: %s", err_str(err)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     cache_buf(cache_hash, &cimport_scope->buf);
 
@@ -23888,7 +24788,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
     if ((err = cache_hit(cache_hash, &tmp_c_file_digest))) {
         if (err != ErrorInvalidFormat) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to check cache: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
     ira->codegen->caches_to_release.append(cache_hash);
@@ -23907,12 +24807,12 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
 
         if ((err = os_make_path(tmp_c_file_dir))) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make dir: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if ((err = os_write_file(&tmp_c_file_path, &cimport_scope->buf))) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to write .h file: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if (ira->codegen->verbose_cimport) {
             fprintf(stderr, "@cImport source: %s\n", buf_ptr(&tmp_c_file_path));
@@ -23947,7 +24847,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
         {
             if (err != ErrorCCompileErrors) {
                 ir_add_error_node(ira, node, buf_sprintf("C import failed: %s", err_str(err)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
 
             ErrorMsg *parent_err_msg = ir_add_error_node(ira, node, buf_sprintf("C import failed"));
@@ -23968,7 +24868,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
                 }
             }
 
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if (ira->codegen->verbose_cimport) {
             fprintf(stderr, "@cImport .d file: %s\n", buf_ptr(tmp_dep_file));
@@ -23976,29 +24876,29 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
 
         if ((err = cache_add_dep_file(cache_hash, tmp_dep_file, false))) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to parse .d file: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         if ((err = cache_final(cache_hash, &tmp_c_file_digest))) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to finalize cache: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         ir_cimport_cache_paths(ira->codegen->cache_dir, &tmp_c_file_digest, out_zig_dir, out_zig_path);
         if ((err = os_make_path(out_zig_dir))) {
             ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make output dir: %s", err_str(err)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         FILE *out_file = fopen(buf_ptr(out_zig_path), "wb");
         if (out_file == nullptr) {
             ir_add_error_node(ira, node,
                     buf_sprintf("C import failed: unable to open output file: %s", strerror(errno)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         stage2_render_ast(ast, out_file);
         if (fclose(out_file) != 0) {
             ir_add_error_node(ira, node,
                     buf_sprintf("C import failed: unable to write to output file: %s", strerror(errno)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         if (ira->codegen->verbose_cimport) {
@@ -24017,90 +24917,90 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
     if ((err = file_fetch(ira->codegen, out_zig_path, import_code))) {
         ir_add_error_node(ira, node,
                 buf_sprintf("unable to open '%s': %s", buf_ptr(out_zig_path), err_str(err)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     ZigType *child_import = add_source_file(ira->codegen, cimport_pkg, out_zig_path,
             import_code, SourceKindCImport);
-    return ir_const_type(ira, &instruction->base, child_import);
+    return ir_const_type(ira, &instruction->base.base, child_import);
 }
 
-static IrInstruction *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstructionCInclude *instruction) {
-    IrInstruction *name_value = instruction->name->child;
+static IrInstGen *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstSrcCInclude *instruction) {
+    IrInstGen *name_value = instruction->name->child;
     if (type_is_invalid(name_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *include_name = ir_resolve_str(ira, name_value);
     if (!include_name)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
+    Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
     // We check for this error in pass1
     assert(c_import_buf);
 
     buf_appendf(c_import_buf, "#include <%s>\n", buf_ptr(include_name));
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstructionCDefine *instruction) {
-    IrInstruction *name = instruction->name->child;
+static IrInstGen *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstSrcCDefine *instruction) {
+    IrInstGen *name = instruction->name->child;
     if (type_is_invalid(name->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *define_name = ir_resolve_str(ira, name);
     if (!define_name)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *value = instruction->value->child;
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *define_value = nullptr;
     // The second parameter is either a string or void (equivalent to "")
     if (value->value->type->id != ZigTypeIdVoid) {
         define_value = ir_resolve_str(ira, value);
         if (!define_value)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
-    Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
+    Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
     // We check for this error in pass1
     assert(c_import_buf);
 
     buf_appendf(c_import_buf, "#define %s %s\n", buf_ptr(define_name),
         define_value ? buf_ptr(define_value) : "");
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstructionCUndef *instruction) {
-    IrInstruction *name = instruction->name->child;
+static IrInstGen *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstSrcCUndef *instruction) {
+    IrInstGen *name = instruction->name->child;
     if (type_is_invalid(name->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *undef_name = ir_resolve_str(ira, name);
     if (!undef_name)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
+    Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
     // We check for this error in pass1
     assert(c_import_buf);
 
     buf_appendf(c_import_buf, "#undef %s\n", buf_ptr(undef_name));
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstructionEmbedFile *instruction) {
-    IrInstruction *name = instruction->name->child;
+static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmbedFile *instruction) {
+    IrInstGen *name = instruction->name->child;
     if (type_is_invalid(name->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *rel_file_path = ir_resolve_str(ira, name);
     if (!rel_file_path)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    ZigType *import = get_scope_import(instruction->base.scope);
+    ZigType *import = get_scope_import(instruction->base.base.scope);
     // figure out absolute path to resource
     Buf source_dir_path = BUF_INIT;
     os_path_dirname(import->data.structure.root_struct->path, &source_dir_path);
@@ -24117,93 +25017,95 @@ static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstru
     Error err;
     if ((err = file_fetch(ira->codegen, file_path, file_contents))) {
         if (err == ErrorFileNotFound) {
-            ir_add_error(ira, instruction->name, buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->name->base,
+                    buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
+            return ira->codegen->invalid_inst_gen;
         } else {
-            ir_add_error(ira, instruction->name, buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->name->base,
+                    buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
     ZigType *result_type = get_array_type(ira->codegen,
             ira->codegen->builtin_types.entry_u8, buf_len(file_contents), nullptr);
-    IrInstruction *result = ir_const(ira, &instruction->base, result_type);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
     init_const_str_lit(ira->codegen, result->value, file_contents);
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructionCmpxchgSrc *instruction) {
+static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
     ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
     if (type_is_invalid(operand_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (operand_type->id == ZigTypeIdFloat) {
-        ir_add_error(ira, instruction->type_value->child,
+        ir_add_error(ira, &instruction->type_value->child->base,
             buf_sprintf("expected integer, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *ptr = instruction->ptr->child;
+    IrInstGen *ptr = instruction->ptr->child;
     if (type_is_invalid(ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // TODO let this be volatile
     ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
-    IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
+    IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
     if (type_is_invalid(casted_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *cmp_value = instruction->cmp_value->child;
+    IrInstGen *cmp_value = instruction->cmp_value->child;
     if (type_is_invalid(cmp_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *new_value = instruction->new_value->child;
+    IrInstGen *new_value = instruction->new_value->child;
     if (type_is_invalid(new_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *success_order_value = instruction->success_order_value->child;
+    IrInstGen *success_order_value = instruction->success_order_value->child;
     if (type_is_invalid(success_order_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     AtomicOrder success_order;
     if (!ir_resolve_atomic_order(ira, success_order_value, &success_order))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *failure_order_value = instruction->failure_order_value->child;
+    IrInstGen *failure_order_value = instruction->failure_order_value->child;
     if (type_is_invalid(failure_order_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     AtomicOrder failure_order;
     if (!ir_resolve_atomic_order(ira, failure_order_value, &failure_order))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
+    IrInstGen *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
     if (type_is_invalid(casted_cmp_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
+    IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
     if (type_is_invalid(casted_new_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (success_order < AtomicOrderMonotonic) {
-        ir_add_error(ira, success_order_value,
+        ir_add_error(ira, &success_order_value->base,
                 buf_sprintf("success atomic ordering must be Monotonic or stricter"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     if (failure_order < AtomicOrderMonotonic) {
-        ir_add_error(ira, failure_order_value,
+        ir_add_error(ira, &failure_order_value->base,
                 buf_sprintf("failure atomic ordering must be Monotonic or stricter"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     if (failure_order > success_order) {
-        ir_add_error(ira, failure_order_value,
+        ir_add_error(ira, &failure_order_value->base,
                 buf_sprintf("failure atomic ordering must be no stricter than success"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     if (failure_order == AtomicOrderRelease || failure_order == AtomicOrderAcqRel) {
-        ir_add_error(ira, failure_order_value,
+        ir_add_error(ira, &failure_order_value->base,
                 buf_sprintf("failure atomic ordering must not be Release or AcqRel"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
@@ -24212,66 +25114,63 @@ static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructi
     }
 
     ZigType *result_type = get_optional_type(ira->codegen, operand_type);
-    IrInstruction *result_loc;
+    IrInstGen *result_loc;
     if (handle_is_ptr(result_type)) {
-        result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+        result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
                 result_type, nullptr, true, false, true);
-        if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+        if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
             return result_loc;
         }
     } else {
         result_loc = nullptr;
     }
 
-    return ir_build_cmpxchg_gen(ira, &instruction->base, result_type,
+    return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
             casted_ptr, casted_cmp_value, casted_new_value,
             success_order, failure_order, instruction->is_weak, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstructionFence *instruction) {
-    IrInstruction *order_value = instruction->order_value->child;
-    if (type_is_invalid(order_value->value->type))
-        return ira->codegen->invalid_instruction;
+static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
+    IrInstGen *order_inst = instruction->order->child;
+    if (type_is_invalid(order_inst->value->type))
+        return ira->codegen->invalid_inst_gen;
 
     AtomicOrder order;
-    if (!ir_resolve_atomic_order(ira, order_value, &order))
-        return ira->codegen->invalid_instruction;
+    if (!ir_resolve_atomic_order(ira, order_inst, &order))
+        return ira->codegen->invalid_inst_gen;
 
     if (order < AtomicOrderAcquire) {
-        ir_add_error(ira, order_value,
+        ir_add_error(ira, &order_inst->base,
                 buf_sprintf("atomic ordering must be Acquire or stricter"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *result = ir_build_fence(&ira->new_irb,
-        instruction->base.scope, instruction->base.source_node, order_value, order);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+    return ir_build_fence_gen(ira, &instruction->base.base, order);
 }
 
-static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstructionTruncate *instruction) {
-    IrInstruction *dest_type_value = instruction->dest_type->child;
+static IrInstGen *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstSrcTruncate *instruction) {
+    IrInstGen *dest_type_value = instruction->dest_type->child;
     ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdInt &&
         dest_type->id != ZigTypeIdComptimeInt)
     {
-        ir_add_error(ira, dest_type_value, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     ZigType *src_type = target->value->type;
     if (type_is_invalid(src_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (src_type->id != ZigTypeIdInt &&
         src_type->id != ZigTypeIdComptimeInt)
     {
-        ir_add_error(ira, target, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &target->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (dest_type->id == ZigTypeIdComptimeInt) {
@@ -24281,54 +25180,51 @@ static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstruct
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
         bigint_truncate(&result->value->data.x_bigint, &val->data.x_bigint,
                 dest_type->data.integral.bit_count, dest_type->data.integral.is_signed);
         return result;
     }
 
     if (src_type->data.integral.bit_count == 0 || dest_type->data.integral.bit_count == 0) {
-        IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
         bigint_init_unsigned(&result->value->data.x_bigint, 0);
         return result;
     }
 
     if (src_type->data.integral.is_signed != dest_type->data.integral.is_signed) {
         const char *sign_str = dest_type->data.integral.is_signed ? "signed" : "unsigned";
-        ir_add_error(ira, target, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &target->base, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
+        return ira->codegen->invalid_inst_gen;
     } else if (src_type->data.integral.bit_count < dest_type->data.integral.bit_count) {
-        ir_add_error(ira, target, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
+        ir_add_error(ira, &target->base, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
                     buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *new_instruction = ir_build_truncate(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, dest_type_value, target);
-    new_instruction->value->type = dest_type;
-    return new_instruction;
+    return ir_build_truncate_gen(ira, &instruction->base.base, dest_type, target);
 }
 
-static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstructionIntCast *instruction) {
+static IrInstGen *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstSrcIntCast *instruction) {
     ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdInt && dest_type->id != ZigTypeIdComptimeInt) {
-        ir_add_error(ira, instruction->dest_type, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->dest_type->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
-        ir_add_error(ira, instruction->target, buf_sprintf("expected integer type, found '%s'",
+        ir_add_error(ira, &instruction->target->base, buf_sprintf("expected integer type, found '%s'",
                     buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(target)) {
@@ -24336,28 +25232,28 @@ static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstruct
     }
 
     if (dest_type->id == ZigTypeIdComptimeInt) {
-        ir_add_error(ira, instruction->target, buf_sprintf("attempt to cast runtime value to '%s'",
+        ir_add_error(ira, &instruction->target->base, buf_sprintf("attempt to cast runtime value to '%s'",
                 buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
+    return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstructionFloatCast *instruction) {
+static IrInstGen *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstSrcFloatCast *instruction) {
     ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdFloat) {
-        ir_add_error(ira, instruction->dest_type,
+        ir_add_error(ira, &instruction->dest_type->base,
                 buf_sprintf("expected float type, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id == ZigTypeIdComptimeInt ||
         target->value->type->id == ZigTypeIdComptimeFloat)
@@ -24369,55 +25265,55 @@ static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstru
             } else {
                 op = CastOpNumLitToConcrete;
             }
-            return ir_resolve_cast(ira, &instruction->base, target, dest_type, op);
+            return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, op);
         } else {
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
     if (target->value->type->id != ZigTypeIdFloat) {
-        ir_add_error(ira, instruction->target, buf_sprintf("expected float type, found '%s'",
+        ir_add_error(ira, &instruction->target->base, buf_sprintf("expected float type, found '%s'",
                     buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
+    return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstructionErrSetCast *instruction) {
+static IrInstGen *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstSrcErrSetCast *instruction) {
     ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdErrorSet) {
-        ir_add_error(ira, instruction->dest_type,
+        ir_add_error(ira, &instruction->dest_type->base,
                 buf_sprintf("expected error set type, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id != ZigTypeIdErrorSet) {
-        ir_add_error(ira, instruction->target,
+        ir_add_error(ira, &instruction->target->base,
                 buf_sprintf("expected error set type, found '%s'", buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_analyze_err_set_cast(ira, &instruction->base, target, dest_type);
+    return ir_analyze_err_set_cast(ira, &instruction->base.base, target, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstructionFromBytes *instruction) {
+static IrInstGen *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstSrcFromBytes *instruction) {
     Error err;
 
     ZigType *dest_child_type = ir_resolve_type(ira, instruction->dest_child_type->child);
     if (type_is_invalid(dest_child_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool src_ptr_const;
     bool src_ptr_volatile;
@@ -24427,27 +25323,27 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
         src_ptr_volatile = target->value->type->data.pointer.is_volatile;
 
         if ((err = resolve_ptr_align(ira, target->value->type, &src_ptr_align)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else if (is_slice(target->value->type)) {
         ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
         src_ptr_const = src_ptr_type->data.pointer.is_const;
         src_ptr_volatile = src_ptr_type->data.pointer.is_volatile;
 
         if ((err = resolve_ptr_align(ira, src_ptr_type, &src_ptr_align)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         src_ptr_const = true;
         src_ptr_volatile = false;
 
         if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusAlignmentKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         src_ptr_align = get_abi_alignment(ira->codegen, target->value->type);
     }
 
     if (src_ptr_align != 0) {
         if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusAlignmentKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_child_type,
@@ -24460,9 +25356,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
             src_ptr_align, 0, 0, false);
     ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, target, u8_slice);
+    IrInstGen *casted_value = ir_implicit_cast(ira, target, u8_slice);
     if (type_is_invalid(casted_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool have_known_len = false;
     uint64_t known_len;
@@ -24470,7 +25366,7 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
     if (instr_is_comptime(casted_value)) {
         ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *len_val = val->data.x_struct.fields[slice_len_index];
         if (value_is_comptime(len_val)) {
@@ -24479,9 +25375,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
         }
     }
 
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
             dest_slice_type, nullptr, true, false, true);
-    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc))) {
+    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable)) {
         return result_loc;
     }
 
@@ -24498,41 +25394,41 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
 
     if (have_known_len) {
         if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusSizeKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         uint64_t child_type_size = type_size(ira->codegen, dest_child_type);
         uint64_t remainder = known_len % child_type_size;
         if (remainder != 0) {
-            ErrorMsg *msg = ir_add_error(ira, &instruction->base,
+            ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("unable to convert [%" ZIG_PRI_u64 "]u8 to %s: size mismatch",
                         known_len, buf_ptr(&dest_slice_type->name)));
-            add_error_note(ira->codegen, msg, instruction->dest_child_type->source_node,
+            add_error_note(ira->codegen, msg, instruction->dest_child_type->base.source_node,
                 buf_sprintf("%s has size %" ZIG_PRI_u64 "; remaining bytes: %" ZIG_PRI_u64,
                 buf_ptr(&dest_child_type->name), child_type_size, remainder));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
-    return ir_build_resize_slice(ira, &instruction->base, casted_value, dest_slice_type, result_loc);
+    return ir_build_resize_slice(ira, &instruction->base.base, casted_value, dest_slice_type, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstructionToBytes *instruction) {
+static IrInstGen *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstSrcToBytes *instruction) {
     Error err;
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!is_slice(target->value->type)) {
-        ir_add_error(ira, instruction->target,
+        ir_add_error(ira, &instruction->target->base,
                 buf_sprintf("expected slice, found '%s'", buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
 
     uint32_t alignment;
     if ((err = resolve_ptr_align(ira, src_ptr_type, &alignment)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
             src_ptr_type->data.pointer.is_const, src_ptr_type->data.pointer.is_volatile, PtrLenUnknown,
@@ -24542,9 +25438,9 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
     if (instr_is_comptime(target)) {
         ZigValue *target_val = ir_resolve_const(ira, target, UndefBad);
         if (target_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, &instruction->base, dest_slice_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, dest_slice_type);
         result->value->data.x_struct.fields = alloc_const_vals_ptrs(2);
 
         ZigValue *ptr_val = result->value->data.x_struct.fields[slice_ptr_index];
@@ -24564,13 +25460,13 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
         return result;
     }
 
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
             dest_slice_type, nullptr, true, false, true);
-    if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+    if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
         return result_loc;
     }
 
-    return ir_build_resize_slice(ira, &instruction->base, target, dest_slice_type, result_loc);
+    return ir_build_resize_slice(ira, &instruction->base.base, target, dest_slice_type, result_loc);
 }
 
 static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align) {
@@ -24587,26 +25483,26 @@ static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_ali
     return ErrorNone;
 }
 
-static IrInstruction *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstructionIntToFloat *instruction) {
+static IrInstGen *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstSrcIntToFloat *instruction) {
     ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
-        ir_add_error(ira, instruction->target, buf_sprintf("expected int type, found '%s'",
+        ir_add_error(ira, &instruction->target->base, buf_sprintf("expected int type, found '%s'",
                     buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_resolve_cast(ira, &instruction->base, target, dest_type, CastOpIntToFloat);
+    return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, CastOpIntToFloat);
 }
 
-static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *source_instr,
-        ZigType *dest_type, IrInstruction *operand, AstNode *operand_source_node)
+static IrInstGen *ir_analyze_float_to_int(IrAnalyze *ira, IrInst* source_instr,
+        ZigType *dest_type, IrInstGen *operand, AstNode *operand_source_node)
 {
     if (operand->value->type->id == ZigTypeIdComptimeInt) {
         return ir_implicit_cast(ira, operand, dest_type);
@@ -24615,106 +25511,107 @@ static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *sou
     if (operand->value->type->id != ZigTypeIdFloat && operand->value->type->id != ZigTypeIdComptimeFloat) {
         ir_add_error_node(ira, operand_source_node, buf_sprintf("expected float type, found '%s'",
                     buf_ptr(&operand->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     return ir_resolve_cast(ira, source_instr, operand, dest_type, CastOpFloatToInt);
 }
 
-static IrInstruction *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstructionFloatToInt *instruction) {
+static IrInstGen *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstSrcFloatToInt *instruction) {
     ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *operand = instruction->target->child;
+    IrInstGen *operand = instruction->target->child;
     if (type_is_invalid(operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_float_to_int(ira, &instruction->base, dest_type, operand, instruction->target->source_node);
+    return ir_analyze_float_to_int(ira, &instruction->base.base, dest_type, operand,
+            instruction->target->base.source_node);
 }
 
-static IrInstruction *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstructionErrToInt *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstSrcErrToInt *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_target;
+    IrInstGen *casted_target;
     if (target->value->type->id == ZigTypeIdErrorSet) {
         casted_target = target;
     } else {
         casted_target = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_global_error_set);
         if (type_is_invalid(casted_target->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_analyze_err_to_int(ira, &instruction->base, casted_target, ira->codegen->err_tag_type);
+    return ir_analyze_err_to_int(ira, &instruction->base.base, casted_target, ira->codegen->err_tag_type);
 }
 
-static IrInstruction *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstructionIntToErr *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstSrcIntToErr *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
+    IrInstGen *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
     if (type_is_invalid(casted_target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_int_to_err(ira, &instruction->base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
+    return ir_analyze_int_to_err(ira, &instruction->base.base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
 }
 
-static IrInstruction *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstructionBoolToInt *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBoolToInt *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (target->value->type->id != ZigTypeIdBool) {
-        ir_add_error(ira, instruction->target, buf_sprintf("expected bool, found '%s'",
+        ir_add_error(ira, &instruction->target->base, buf_sprintf("expected bool, found '%s'",
                     buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(target)) {
         bool is_true;
         if (!ir_resolve_bool(ira, target, &is_true))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_const_unsigned(ira, &instruction->base, is_true ? 1 : 0);
+        return ir_const_unsigned(ira, &instruction->base.base, is_true ? 1 : 0);
     }
 
     ZigType *u1_type = get_int_type(ira->codegen, false, 1);
-    return ir_resolve_cast(ira, &instruction->base, target, u1_type, CastOpBoolToInt);
+    return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
 }
 
-static IrInstruction *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstructionIntType *instruction) {
-    IrInstruction *is_signed_value = instruction->is_signed->child;
+static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
+    IrInstGen *is_signed_value = instruction->is_signed->child;
     bool is_signed;
     if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *bit_count_value = instruction->bit_count->child;
+    IrInstGen *bit_count_value = instruction->bit_count->child;
     uint64_t bit_count;
     if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_const_type(ira, &instruction->base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
+    return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
 }
 
-static IrInstruction *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstructionVectorType *instruction) {
+static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
     uint64_t len;
     if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);
     if (type_is_invalid(elem_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);
 
-    return ir_const_type(ira, &instruction->base, vector_type);
+    return ir_const_type(ira, &instruction->base.base, vector_type);
 }
 
-static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *source_instr,
-    ZigType *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
+static IrInstGen *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInst* source_instr,
+    ZigType *scalar_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
 {
     ir_assert(source_instr && scalar_type && a && b && mask, source_instr);
     ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);
@@ -24725,15 +25622,15 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
     } else if (mask->value->type->id == ZigTypeIdArray) {
         len_mask = mask->value->type->data.array.len;
     } else {
-        ir_add_error(ira, mask,
+        ir_add_error(ira, &mask->base,
             buf_sprintf("expected vector or array, found '%s'",
                 buf_ptr(&mask->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,
                 ira->codegen->builtin_types.entry_i32));
     if (type_is_invalid(mask->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint32_t len_a;
     if (a->value->type->id == ZigTypeIdVector) {
@@ -24743,11 +25640,11 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
     } else if (a->value->type->id == ZigTypeIdUndefined) {
         len_a = UINT32_MAX;
     } else {
-        ir_add_error(ira, a,
+        ir_add_error(ira, &a->base,
             buf_sprintf("expected vector or array with element type '%s', found '%s'",
                 buf_ptr(&scalar_type->name),
                 buf_ptr(&a->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     uint32_t len_b;
@@ -24758,38 +25655,38 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
     } else if (b->value->type->id == ZigTypeIdUndefined) {
         len_b = UINT32_MAX;
     } else {
-        ir_add_error(ira, b,
+        ir_add_error(ira, &b->base,
             buf_sprintf("expected vector or array with element type '%s', found '%s'",
                 buf_ptr(&scalar_type->name),
                 buf_ptr(&b->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (len_a == UINT32_MAX && len_b == UINT32_MAX) {
-        return ir_const_undef(ira, a, get_vector_type(ira->codegen, len_mask, scalar_type));
+        return ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_mask, scalar_type));
     }
 
     if (len_a == UINT32_MAX) {
         len_a = len_b;
-        a = ir_const_undef(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
+        a = ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_a, scalar_type));
     } else {
         a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
         if (type_is_invalid(a->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     if (len_b == UINT32_MAX) {
         len_b = len_a;
-        b = ir_const_undef(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
+        b = ir_const_undef(ira, &b->base, get_vector_type(ira->codegen, len_b, scalar_type));
     } else {
         b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
         if (type_is_invalid(b->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     ZigValue *mask_val = ir_resolve_const(ira, mask, UndefOk);
     if (mask_val == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     expand_undef_array(ira->codegen, mask_val);
 
@@ -24799,7 +25696,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
             continue;
         int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);
         uint32_t v;
-        IrInstruction *chosen_operand;
+        IrInstGen *chosen_operand;
         if (v_i32 >= 0) {
             v = (uint32_t)v_i32;
             chosen_operand = a;
@@ -24808,16 +25705,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
             chosen_operand = b;
         }
         if (v >= chosen_operand->value->type->data.vector.len) {
-            ErrorMsg *msg = ir_add_error(ira, mask,
+            ErrorMsg *msg = ir_add_error(ira, &mask->base,
                 buf_sprintf("mask index '%u' has out-of-bounds selection", i));
-            add_error_note(ira->codegen, msg, chosen_operand->source_node,
+            add_error_note(ira->codegen, msg, chosen_operand->base.source_node,
                 buf_sprintf("selected index '%u' out of bounds of %s", v,
                     buf_ptr(&chosen_operand->value->type->name)));
             if (chosen_operand == a && v < len_a + len_b) {
-                add_error_note(ira->codegen, msg, b->source_node,
+                add_error_note(ira->codegen, msg, b->base.source_node,
                     buf_create_from_str("selections from the second vector are specified with negative numbers"));
             }
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
 
@@ -24825,16 +25722,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
     if (instr_is_comptime(a) && instr_is_comptime(b)) {
         ZigValue *a_val = ir_resolve_const(ira, a, UndefOk);
         if (a_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *b_val = ir_resolve_const(ira, b, UndefOk);
         if (b_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         expand_undef_array(ira->codegen, a_val);
         expand_undef_array(ira->codegen, b_val);
 
-        IrInstruction *result = ir_const(ira, source_instr, result_type);
+        IrInstGen *result = ir_const(ira, source_instr, result_type);
         result->value->data.x_array.data.s_none.elements = create_const_vals(len_mask);
         for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {
             ZigValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
@@ -24866,7 +25763,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
         uint32_t len_min = min(len_a, len_b);
         uint32_t len_max = max(len_a, len_b);
 
-        IrInstruction *expand_mask = ir_const(ira, mask,
+        IrInstGen *expand_mask = ir_const(ira, &mask->base,
             get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));
         expand_mask->value->data.x_array.data.s_none.elements = create_const_vals(len_max);
         uint32_t i = 0;
@@ -24875,7 +25772,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
         for (; i < len_max; i += 1)
             bigint_init_signed(&expand_mask->value->data.x_array.data.s_none.elements[i].data.x_bigint, -1);
 
-        IrInstruction *undef = ir_const_undef(ira, source_instr,
+        IrInstGen *undef = ir_const_undef(ira, source_instr,
             get_vector_type(ira->codegen, len_min, scalar_type));
 
         if (len_b < len_a) {
@@ -24885,62 +25782,59 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
         }
     }
 
-    IrInstruction *result = ir_build_shuffle_vector(&ira->new_irb,
-        source_instr->scope, source_instr->source_node,
-        nullptr, a, b, mask);
-    result->value->type = result_type;
-    return result;
+    return ir_build_shuffle_vector_gen(ira, source_instr->scope, source_instr->source_node,
+            result_type, a, b, mask);
 }
 
-static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstructionShuffleVector *instruction) {
-    ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type);
+static IrInstGen *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstSrcShuffleVector *instruction) {
+    ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type->child);
     if (type_is_invalid(scalar_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *a = instruction->a->child;
+    IrInstGen *a = instruction->a->child;
     if (type_is_invalid(a->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *b = instruction->b->child;
+    IrInstGen *b = instruction->b->child;
     if (type_is_invalid(b->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *mask = instruction->mask->child;
+    IrInstGen *mask = instruction->mask->child;
     if (type_is_invalid(mask->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);
+    return ir_analyze_shuffle_vector(ira, &instruction->base.base, scalar_type, a, b, mask);
 }
 
-static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {
+static IrInstGen *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstSrcSplat *instruction) {
     Error err;
 
-    IrInstruction *len = instruction->len->child;
+    IrInstGen *len = instruction->len->child;
     if (type_is_invalid(len->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *scalar = instruction->scalar->child;
+    IrInstGen *scalar = instruction->scalar->child;
     if (type_is_invalid(scalar->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint64_t len_u64;
     if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     uint32_t len_int = len_u64;
 
-    if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value->type)))
-        return ira->codegen->invalid_instruction;
+    if ((err = ir_validate_vector_elem_type(ira, scalar->base.source_node, scalar->value->type)))
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value->type);
 
     if (instr_is_comptime(scalar)) {
         ZigValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
         if (scalar_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (scalar_val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, return_type);
+            return ir_const_undef(ira, &instruction->base.base, return_type);
 
-        IrInstruction *result = ir_const(ira, &instruction->base, return_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
         result->value->data.x_array.data.s_none.elements = create_const_vals(len_int);
         for (uint32_t i = 0; i < len_int; i += 1) {
             copy_const_val(&result->value->data.x_array.data.s_none.elements[i], scalar_val);
@@ -24948,48 +25842,45 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction
         return result;
     }
 
-    return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);
+    return ir_build_splat_gen(ira, &instruction->base.base, return_type, scalar);
 }
 
-static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstSrcBoolNot *instruction) {
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, bool_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, bool_type);
     if (type_is_invalid(casted_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_value)) {
         ZigValue *value = ir_resolve_const(ira, casted_value, UndefBad);
         if (value == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_const_bool(ira, &instruction->base, !value->data.x_bool);
+        return ir_const_bool(ira, &instruction->base.base, !value->data.x_bool);
     }
 
-    IrInstruction *result = ir_build_bool_not(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, casted_value);
-    result->value->type = bool_type;
-    return result;
+    return ir_build_bool_not_gen(ira, &instruction->base.base, casted_value);
 }
 
-static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructionMemset *instruction) {
+static IrInstGen *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstSrcMemset *instruction) {
     Error err;
 
-    IrInstruction *dest_ptr = instruction->dest_ptr->child;
+    IrInstGen *dest_ptr = instruction->dest_ptr->child;
     if (type_is_invalid(dest_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *byte_value = instruction->byte->child;
+    IrInstGen *byte_value = instruction->byte->child;
     if (type_is_invalid(byte_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *count_value = instruction->count->child;
+    IrInstGen *count_value = instruction->count->child;
     if (type_is_invalid(count_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *dest_uncasted_type = dest_ptr->value->type;
     bool dest_is_volatile = (dest_uncasted_type->id == ZigTypeIdPointer) &&
@@ -25000,24 +25891,24 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
     uint32_t dest_align;
     if (dest_uncasted_type->id == ZigTypeIdPointer) {
         if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         dest_align = get_abi_alignment(ira->codegen, u8);
     }
     ZigType *u8_ptr = get_pointer_to_type_extra(ira->codegen, u8, false, dest_is_volatile,
             PtrLenUnknown, dest_align, 0, 0, false);
 
-    IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
+    IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
     if (type_is_invalid(casted_dest_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_byte = ir_implicit_cast(ira, byte_value, u8);
+    IrInstGen *casted_byte = ir_implicit_cast(ira, byte_value, u8);
     if (type_is_invalid(casted_byte->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
+    IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
     if (type_is_invalid(casted_count->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // TODO test this at comptime with u8 and non-u8 types
     if (instr_is_comptime(casted_dest_ptr) &&
@@ -25026,15 +25917,15 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
     {
         ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
         if (dest_ptr_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *byte_val = ir_resolve_const(ira, casted_byte, UndefOk);
         if (byte_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
         if (count_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (casted_dest_ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&
             casted_dest_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar)
@@ -25079,38 +25970,35 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
             size_t count = bigint_as_usize(&count_val->data.x_bigint);
             size_t end = start + count;
             if (end > bound_end) {
-                ir_add_error(ira, count_value, buf_sprintf("out of bounds pointer access"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &count_value->base, buf_sprintf("out of bounds pointer access"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             for (size_t i = start; i < end; i += 1) {
                 copy_const_val(&dest_elements[i], byte_val);
             }
 
-            return ir_const_void(ira, &instruction->base);
+            return ir_const_void(ira, &instruction->base.base);
         }
     }
 
-    IrInstruction *result = ir_build_memset(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
-            casted_dest_ptr, casted_byte, casted_count);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+    return ir_build_memset_gen(ira, &instruction->base.base, casted_dest_ptr, casted_byte, casted_count);
 }
 
-static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructionMemcpy *instruction) {
+static IrInstGen *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstSrcMemcpy *instruction) {
     Error err;
 
-    IrInstruction *dest_ptr = instruction->dest_ptr->child;
+    IrInstGen *dest_ptr = instruction->dest_ptr->child;
     if (type_is_invalid(dest_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *src_ptr = instruction->src_ptr->child;
+    IrInstGen *src_ptr = instruction->src_ptr->child;
     if (type_is_invalid(src_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *count_value = instruction->count->child;
+    IrInstGen *count_value = instruction->count->child;
     if (type_is_invalid(count_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *u8 = ira->codegen->builtin_types.entry_u8;
     ZigType *dest_uncasted_type = dest_ptr->value->type;
@@ -25123,7 +26011,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
     uint32_t dest_align;
     if (dest_uncasted_type->id == ZigTypeIdPointer) {
         if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         dest_align = get_abi_alignment(ira->codegen, u8);
     }
@@ -25131,7 +26019,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
     uint32_t src_align;
     if (src_uncasted_type->id == ZigTypeIdPointer) {
         if ((err = resolve_ptr_align(ira, src_uncasted_type, &src_align)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         src_align = get_abi_alignment(ira->codegen, u8);
     }
@@ -25142,17 +26030,17 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
     ZigType *u8_ptr_const = get_pointer_to_type_extra(ira->codegen, u8, true, src_is_volatile,
             PtrLenUnknown, src_align, 0, 0, false);
 
-    IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
+    IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
     if (type_is_invalid(casted_dest_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
+    IrInstGen *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
     if (type_is_invalid(casted_src_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
+    IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
     if (type_is_invalid(casted_count->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // TODO test this at comptime with u8 and non-u8 types
     // TODO test with dest ptr being a global runtime variable
@@ -25162,15 +26050,15 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
     {
         ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
         if (dest_ptr_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *src_ptr_val = ir_resolve_const(ira, casted_src_ptr, UndefBad);
         if (src_ptr_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
         if (count_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (dest_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
             size_t count = bigint_as_usize(&count_val->data.x_bigint);
@@ -25213,8 +26101,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
             }
 
             if (dest_start + count > dest_end) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             ZigValue *src_elements;
@@ -25256,8 +26144,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
             }
 
             if (src_start + count > src_end) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             // TODO check for noalias violations - this should be generalized to work for any function
@@ -25266,42 +26154,39 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
                 copy_const_val(&dest_elements[dest_start + i], &src_elements[src_start + i]);
             }
 
-            return ir_const_void(ira, &instruction->base);
+            return ir_const_void(ira, &instruction->base.base);
         }
     }
 
-    IrInstruction *result = ir_build_memcpy(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
-            casted_dest_ptr, casted_src_ptr, casted_count);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+    return ir_build_memcpy_gen(ira, &instruction->base.base, casted_dest_ptr, casted_src_ptr, casted_count);
 }
 
-static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstructionSliceSrc *instruction) {
-    IrInstruction *ptr_ptr = instruction->ptr->child;
+static IrInstGen *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstSrcSlice *instruction) {
+    IrInstGen *ptr_ptr = instruction->ptr->child;
     if (type_is_invalid(ptr_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ptr_ptr_type = ptr_ptr->value->type;
     assert(ptr_ptr_type->id == ZigTypeIdPointer);
     ZigType *array_type = ptr_ptr_type->data.pointer.child_type;
 
-    IrInstruction *start = instruction->start->child;
+    IrInstGen *start = instruction->start->child;
     if (type_is_invalid(start->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *usize = ira->codegen->builtin_types.entry_usize;
-    IrInstruction *casted_start = ir_implicit_cast(ira, start, usize);
+    IrInstGen *casted_start = ir_implicit_cast(ira, start, usize);
     if (type_is_invalid(casted_start->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *end;
+    IrInstGen *end;
     if (instruction->end) {
         end = instruction->end->child;
         if (type_is_invalid(end->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         end = ir_implicit_cast(ira, end, usize);
         if (type_is_invalid(end->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         end = nullptr;
     }
@@ -25329,8 +26214,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
                         PtrLenUnknown,
                         array_type->data.pointer.explicit_alignment, 0, 0, false);
             } else {
-                ir_add_error(ira, &instruction->base, buf_sprintf("slice of single-item pointer"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of single-item pointer"));
+                return ira->codegen->invalid_inst_gen;
             }
         } else {
             elem_type = array_type->data.pointer.child_type;
@@ -25340,8 +26225,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
             ZigType *maybe_sentineled_slice_ptr_type = array_type;
             non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
             if (!end) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("slice of pointer must include end value"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of pointer must include end value"));
+                return ira->codegen->invalid_inst_gen;
             }
         }
     } else if (is_slice(array_type)) {
@@ -25349,23 +26234,23 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
         non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
         elem_type = non_sentinel_slice_ptr_type->data.pointer.child_type;
     } else {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("slice of non-array type '%s'", buf_ptr(&array_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *return_type;
     ZigValue *sentinel_val = nullptr;
     if (instruction->sentinel) {
-        IrInstruction *uncasted_sentinel = instruction->sentinel->child;
+        IrInstGen *uncasted_sentinel = instruction->sentinel->child;
         if (type_is_invalid(uncasted_sentinel->value->type))
-            return ira->codegen->invalid_instruction;
-        IrInstruction *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
+            return ira->codegen->invalid_inst_gen;
+        IrInstGen *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
         if (type_is_invalid(sentinel->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
         if (sentinel_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigType *slice_ptr_type = adjust_ptr_sentinel(ira->codegen, non_sentinel_slice_ptr_type, sentinel_val);
         return_type = get_slice_type(ira->codegen, slice_ptr_type);
     } else {
@@ -25387,9 +26272,9 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
             if (array_type->id == ZigTypeIdPointer) {
                 ZigType *child_array_type = array_type->data.pointer.child_type;
                 assert(child_array_type->id == ZigTypeIdArray);
-                parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
+                parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
                 if (parent_ptr == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
 
 
                 if (parent_ptr->special == ConstValSpecialUndef) {
@@ -25398,26 +26283,26 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
                     rel_end = SIZE_MAX;
                     ptr_is_undef = true;
                 } else {
-                    array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.source_node);
+                    array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.base.source_node);
                     if (array_val == nullptr)
-                        return ira->codegen->invalid_instruction;
+                        return ira->codegen->invalid_inst_gen;
 
                     rel_end = child_array_type->data.array.len;
                     abs_offset = 0;
                 }
             } else {
-                array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
+                array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
                 if (array_val == nullptr)
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 rel_end = array_type->data.array.len;
                 parent_ptr = nullptr;
                 abs_offset = 0;
             }
         } else if (array_type->id == ZigTypeIdPointer) {
             assert(array_type->data.pointer.ptr_len == PtrLenUnknown);
-            parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
+            parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
             if (parent_ptr == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (parent_ptr->special == ConstValSpecialUndef) {
                 array_val = nullptr;
@@ -25463,19 +26348,19 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
                     zig_panic("TODO slice of null ptr");
             }
         } else if (is_slice(array_type)) {
-            ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
+            ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
             if (slice_ptr == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (slice_ptr->special == ConstValSpecialUndef) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             parent_ptr = slice_ptr->data.x_struct.fields[slice_ptr_index];
             if (parent_ptr->special == ConstValSpecialUndef) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             ZigValue *len_val = slice_ptr->data.x_struct.fields[slice_len_index];
@@ -25518,37 +26403,37 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
 
         ZigValue *start_val = ir_resolve_const(ira, casted_start, UndefBad);
         if (!start_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         uint64_t start_scalar = bigint_as_u64(&start_val->data.x_bigint);
         if (!ptr_is_undef && start_scalar > rel_end) {
-            ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
+            return ira->codegen->invalid_inst_gen;
         }
 
         uint64_t end_scalar = rel_end;
         if (end) {
             ZigValue *end_val = ir_resolve_const(ira, end, UndefBad);
             if (!end_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             end_scalar = bigint_as_u64(&end_val->data.x_bigint);
         }
         if (!ptr_is_undef) {
             if (end_scalar > rel_end) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
+                return ira->codegen->invalid_inst_gen;
             }
             if (start_scalar > end_scalar) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("slice start is greater than end"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("slice start is greater than end"));
+                return ira->codegen->invalid_inst_gen;
             }
         }
         if (ptr_is_undef && start_scalar != end_scalar) {
-            ir_add_error(ira, &instruction->base, buf_sprintf("non-zero length slice of undefined pointer"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->base.base, buf_sprintf("non-zero length slice of undefined pointer"));
+            return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *result = ir_const(ira, &instruction->base, return_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
         ZigValue *out_val = result->value;
         out_val->data.x_struct.fields = alloc_const_vals_ptrs(2);
 
@@ -25605,28 +26490,28 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
         return result;
     }
 
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
             return_type, nullptr, true, false, true);
-    if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
+    if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
         return result_loc;
     }
-    return ir_build_slice_gen(ira, &instruction->base, return_type,
+    return ir_build_slice_gen(ira, &instruction->base.base, return_type,
         ptr_ptr, casted_start, end, instruction->safety_check_on, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstructionMemberCount *instruction) {
+static IrInstGen *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstSrcMemberCount *instruction) {
     Error err;
-    IrInstruction *container = instruction->container->child;
+    IrInstGen *container = instruction->container->child;
     if (type_is_invalid(container->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     ZigType *container_type = ir_resolve_type(ira, container);
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint64_t result;
     if (type_is_invalid(container_type)) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (container_type->id == ZigTypeIdEnum) {
         result = container_type->data.enumeration.src_field_count;
     } else if (container_type->id == ZigTypeIdStruct) {
@@ -25634,135 +26519,135 @@ static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInst
     } else if (container_type->id == ZigTypeIdUnion) {
         result = container_type->data.unionation.src_field_count;
     } else if (container_type->id == ZigTypeIdErrorSet) {
-        if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.source_node)) {
-            return ira->codegen->invalid_instruction;
+        if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.base.source_node)) {
+            return ira->codegen->invalid_inst_gen;
         }
         if (type_is_global_error_set(container_type)) {
-            ir_add_error(ira, &instruction->base, buf_sprintf("global error set member count not available at comptime"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->base.base, buf_sprintf("global error set member count not available at comptime"));
+            return ira->codegen->invalid_inst_gen;
         }
         result = container_type->data.error_set.err_count;
     } else {
-        ir_add_error(ira, &instruction->base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_const_unsigned(ira, &instruction->base, result);
+    return ir_const_unsigned(ira, &instruction->base.base, result);
 }
 
-static IrInstruction *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstructionMemberType *instruction) {
+static IrInstGen *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstSrcMemberType *instruction) {
     Error err;
-    IrInstruction *container_type_value = instruction->container_type->child;
+    IrInstGen *container_type_value = instruction->container_type->child;
     ZigType *container_type = ir_resolve_type(ira, container_type_value);
     if (type_is_invalid(container_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
 
     uint64_t member_index;
-    IrInstruction *index_value = instruction->member_index->child;
+    IrInstGen *index_value = instruction->member_index->child;
     if (!ir_resolve_usize(ira, index_value, &member_index))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (container_type->id == ZigTypeIdStruct) {
         if (member_index >= container_type->data.structure.src_field_count) {
-            ir_add_error(ira, index_value,
+            ir_add_error(ira, &index_value->base,
                 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
                     member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeStructField *field = container_type->data.structure.fields[member_index];
 
-        return ir_const_type(ira, &instruction->base, field->type_entry);
+        return ir_const_type(ira, &instruction->base.base, field->type_entry);
     } else if (container_type->id == ZigTypeIdUnion) {
         if (member_index >= container_type->data.unionation.src_field_count) {
-            ir_add_error(ira, index_value,
+            ir_add_error(ira, &index_value->base,
                 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
                     member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeUnionField *field = &container_type->data.unionation.fields[member_index];
 
-        return ir_const_type(ira, &instruction->base, field->type_entry);
+        return ir_const_type(ira, &instruction->base.base, field->type_entry);
     } else {
-        ir_add_error(ira, container_type_value,
+        ir_add_error(ira, &container_type_value->base,
             buf_sprintf("type '%s' does not support @memberType", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
-static IrInstruction *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstructionMemberName *instruction) {
+static IrInstGen *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstSrcMemberName *instruction) {
     Error err;
-    IrInstruction *container_type_value = instruction->container_type->child;
+    IrInstGen *container_type_value = instruction->container_type->child;
     ZigType *container_type = ir_resolve_type(ira, container_type_value);
     if (type_is_invalid(container_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint64_t member_index;
-    IrInstruction *index_value = instruction->member_index->child;
+    IrInstGen *index_value = instruction->member_index->child;
     if (!ir_resolve_usize(ira, index_value, &member_index))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (container_type->id == ZigTypeIdStruct) {
         if (member_index >= container_type->data.structure.src_field_count) {
-            ir_add_error(ira, index_value,
+            ir_add_error(ira, &index_value->base,
                 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
                     member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeStructField *field = container_type->data.structure.fields[member_index];
 
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         init_const_str_lit(ira->codegen, result->value, field->name);
         return result;
     } else if (container_type->id == ZigTypeIdEnum) {
         if (member_index >= container_type->data.enumeration.src_field_count) {
-            ir_add_error(ira, index_value,
+            ir_add_error(ira, &index_value->base,
                 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
                     member_index, buf_ptr(&container_type->name), container_type->data.enumeration.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeEnumField *field = &container_type->data.enumeration.fields[member_index];
 
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         init_const_str_lit(ira->codegen, result->value, field->name);
         return result;
     } else if (container_type->id == ZigTypeIdUnion) {
         if (member_index >= container_type->data.unionation.src_field_count) {
-            ir_add_error(ira, index_value,
+            ir_add_error(ira, &index_value->base,
                 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
                     member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
         TypeUnionField *field = &container_type->data.unionation.fields[member_index];
 
-        IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
         init_const_str_lit(ira->codegen, result->value, field->name);
         return result;
     } else {
-        ir_add_error(ira, container_type_value,
+        ir_add_error(ira, &container_type_value->base,
             buf_sprintf("type '%s' does not support @memberName", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
-static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstructionHasField *instruction) {
+static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) {
     Error err;
     ZigType *container_type = ir_resolve_type(ira, instruction->container_type->child);
     if (type_is_invalid(container_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, container_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
     if (field_name == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool result;
     if (container_type->id == ZigTypeIdStruct) {
@@ -25772,91 +26657,77 @@ static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstruc
     } else if (container_type->id == ZigTypeIdUnion) {
         result = find_union_type_field(container_type, field_name) != nullptr;
     } else {
-        ir_add_error(ira, instruction->container_type,
+        ir_add_error(ira, &instruction->container_type->base,
             buf_sprintf("type '%s' does not support @hasField", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
-    return ir_const_bool(ira, &instruction->base, result);
+    return ir_const_bool(ira, &instruction->base.base, result);
 }
 
-static IrInstruction *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstructionBreakpoint *instruction) {
-    IrInstruction *result = ir_build_breakpoint(&ira->new_irb,
-        instruction->base.scope, instruction->base.source_node);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+static IrInstGen *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstSrcBreakpoint *instruction) {
+    return ir_build_breakpoint_gen(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstructionReturnAddress *instruction) {
-    IrInstruction *result = ir_build_return_address(&ira->new_irb,
-        instruction->base.scope, instruction->base.source_node);
-    result->value->type = ira->codegen->builtin_types.entry_usize;
-    return result;
+static IrInstGen *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstSrcReturnAddress *instruction) {
+    return ir_build_return_address_gen(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstructionFrameAddress *instruction) {
-    IrInstruction *result = ir_build_frame_address(&ira->new_irb,
-            instruction->base.scope, instruction->base.source_node);
-    result->value->type = ira->codegen->builtin_types.entry_usize;
-    return result;
+static IrInstGen *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstSrcFrameAddress *instruction) {
+    return ir_build_frame_address_gen(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstructionFrameHandle *instruction) {
-    ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
-    ir_assert(fn != nullptr, &instruction->base);
+static IrInstGen *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstSrcFrameHandle *instruction) {
+    ZigFn *fn = ira->new_irb.exec->fn_entry;
+    ir_assert(fn != nullptr, &instruction->base.base);
 
     if (fn->inferred_async_node == nullptr) {
-        fn->inferred_async_node = instruction->base.source_node;
+        fn->inferred_async_node = instruction->base.base.source_node;
     }
 
     ZigType *frame_type = get_fn_frame_type(ira->codegen, fn);
     ZigType *ptr_frame_type = get_pointer_to_type(ira->codegen, frame_type, false);
 
-    IrInstruction *result = ir_build_handle(&ira->new_irb, instruction->base.scope, instruction->base.source_node);
-    result->value->type = ptr_frame_type;
-    return result;
+    return ir_build_handle_gen(ira, &instruction->base.base, ptr_frame_type);
 }
 
-static IrInstruction *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstructionFrameType *instruction) {
+static IrInstGen *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstSrcFrameType *instruction) {
     ZigFn *fn = ir_resolve_fn(ira, instruction->fn->child);
     if (fn == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (fn->type_entry->data.fn.is_generic) {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
                 buf_sprintf("@Frame() of generic function"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *ty = get_fn_frame_type(ira->codegen, fn);
-    return ir_const_type(ira, &instruction->base, ty);
+    return ir_const_type(ira, &instruction->base.base, ty);
 }
 
-static IrInstruction *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstructionFrameSizeSrc *instruction) {
-    IrInstruction *fn = instruction->fn->child;
+static IrInstGen *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstSrcFrameSize *instruction) {
+    IrInstGen *fn = instruction->fn->child;
     if (type_is_invalid(fn->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (fn->value->type->id != ZigTypeIdFn) {
-        ir_add_error(ira, fn,
+        ir_add_error(ira, &fn->base,
                 buf_sprintf("expected function, found '%s'", buf_ptr(&fn->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ira->codegen->need_frame_size_prefix_data = true;
 
-    IrInstruction *result = ir_build_frame_size_gen(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, fn);
-    result->value->type = ira->codegen->builtin_types.entry_usize;
-    return result;
+    return ir_build_frame_size_gen(ira, &instruction->base.base, fn);
 }
 
-static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstructionAlignOf *instruction) {
+static IrInstGen *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstSrcAlignOf *instruction) {
     // Here we create a lazy value in order to avoid resolving the alignment of the type
     // immediately. This avoids false positive dependency loops such as:
     // const Node = struct {
     //     field: []align(@alignOf(Node)) Node,
     // };
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueAlignOf *lazy_align_of = allocate<LazyValueAlignOf>(1, "LazyValueAlignOf");
@@ -25866,41 +26737,41 @@ static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstruct
 
     lazy_align_of->target_type = instruction->type_value->child;
     if (ir_resolve_type_lazy(ira, lazy_align_of->target_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstructionOverflowOp *instruction) {
+static IrInstGen *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstSrcOverflowOp *instruction) {
     Error err;
 
-    IrInstruction *type_value = instruction->type_value->child;
+    IrInstGen *type_value = instruction->type_value->child;
     if (type_is_invalid(type_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *dest_type = ir_resolve_type(ira, type_value);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdInt) {
-        ir_add_error(ira, type_value,
+        ir_add_error(ira, &type_value->base,
             buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *op1 = instruction->op1->child;
+    IrInstGen *op1 = instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
     if (type_is_invalid(casted_op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = instruction->op2->child;
+    IrInstGen *op2 = instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op2;
+    IrInstGen *casted_op2;
     if (instruction->op == IrOverflowOpShl) {
         ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
                 dest_type->data.integral.bit_count - 1);
@@ -25909,17 +26780,17 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
         casted_op2 = ir_implicit_cast(ira, op2, dest_type);
     }
     if (type_is_invalid(casted_op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result_ptr = instruction->result_ptr->child;
+    IrInstGen *result_ptr = instruction->result_ptr->child;
     if (type_is_invalid(result_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *expected_ptr_type;
     if (result_ptr->value->type->id == ZigTypeIdPointer) {
         uint32_t alignment;
         if ((err = resolve_ptr_align(ira, result_ptr->value->type, &alignment)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         expected_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_type,
                 false, result_ptr->value->type->data.pointer.is_volatile,
                 PtrLenSingle,
@@ -25928,9 +26799,9 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
         expected_ptr_type = get_pointer_to_type(ira->codegen, dest_type, false);
     }
 
-    IrInstruction *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
+    IrInstGen *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
     if (type_is_invalid(casted_result_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_op1) &&
         instr_is_comptime(casted_op2) &&
@@ -25938,22 +26809,22 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
     {
         ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
         if (op1_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
         if (op2_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *result_val = ir_resolve_const(ira, casted_result_ptr, UndefBad);
         if (result_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         BigInt *op1_bigint = &op1_val->data.x_bigint;
         BigInt *op2_bigint = &op2_val->data.x_bigint;
         ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, result_val,
-                casted_result_ptr->source_node);
+                casted_result_ptr->base.source_node);
         if (pointee_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         BigInt *dest_bigint = &pointee_val->data.x_bigint;
         switch (instruction->op) {
             case IrOverflowOpAdd:
@@ -25980,17 +26851,14 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
                     dest_type->data.integral.is_signed);
         }
         pointee_val->special = ConstValSpecialStatic;
-        return ir_const_bool(ira, &instruction->base, result_bool);
+        return ir_const_bool(ira, &instruction->base.base, result_bool);
     }
 
-    IrInstruction *result = ir_build_overflow_op(&ira->new_irb,
-            instruction->base.scope, instruction->base.source_node,
-            instruction->op, type_value, casted_op1, casted_op2, casted_result_ptr, dest_type);
-    result->value->type = ira->codegen->builtin_types.entry_bool;
-    return result;
+    return ir_build_overflow_op_gen(ira, &instruction->base.base, instruction->op,
+            casted_op1, casted_op2, casted_result_ptr, dest_type);
 }
 
-static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, ZigType *float_type,
+static void ir_eval_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *source_instr, ZigType *float_type,
     ZigValue *op1, ZigValue *op2, ZigValue *op3, ZigValue *out_val) {
     if (float_type->id == ZigTypeIdComptimeFloat) {
         f128M_mulAdd(&out_val->data.x_bigfloat.value, &op1->data.x_bigfloat.value, &op2->data.x_bigfloat.value,
@@ -26017,61 +26885,61 @@ static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, Z
     }
 }
 
-static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructionMulAdd *instruction) {
-    IrInstruction *type_value = instruction->type_value->child;
+static IrInstGen *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *instruction) {
+    IrInstGen *type_value = instruction->type_value->child;
     if (type_is_invalid(type_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *expr_type = ir_resolve_type(ira, type_value);
     if (type_is_invalid(expr_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // Only allow float types, and vectors of floats.
     ZigType *float_type = (expr_type->id == ZigTypeIdVector) ? expr_type->data.vector.elem_type : expr_type;
     if (float_type->id != ZigTypeIdFloat) {
-        ir_add_error(ira, type_value,
+        ir_add_error(ira, &type_value->base,
             buf_sprintf("expected float or vector of float type, found '%s'", buf_ptr(&float_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *op1 = instruction->op1->child;
+    IrInstGen *op1 = instruction->op1->child;
     if (type_is_invalid(op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
+    IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
     if (type_is_invalid(casted_op1->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op2 = instruction->op2->child;
+    IrInstGen *op2 = instruction->op2->child;
     if (type_is_invalid(op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
+    IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
     if (type_is_invalid(casted_op2->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op3 = instruction->op3->child;
+    IrInstGen *op3 = instruction->op3->child;
     if (type_is_invalid(op3->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
+    IrInstGen *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
     if (type_is_invalid(casted_op3->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_op1) &&
         instr_is_comptime(casted_op2) &&
         instr_is_comptime(casted_op3)) {
         ZigValue *op1_const = ir_resolve_const(ira, casted_op1, UndefBad);
         if (!op1_const)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigValue *op2_const = ir_resolve_const(ira, casted_op2, UndefBad);
         if (!op2_const)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigValue *op3_const = ir_resolve_const(ira, casted_op3, UndefBad);
         if (!op3_const)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
         ZigValue *out_val = result->value;
 
         if (expr_type->id == ZigTypeIdVector) {
@@ -26102,63 +26970,59 @@ static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructi
         return result;
     }
 
-    IrInstruction *result = ir_build_mul_add(&ira->new_irb,
-            instruction->base.scope, instruction->base.source_node,
-            type_value, casted_op1, casted_op2, casted_op3);
-    result->value->type = expr_type;
-    return result;
+    return ir_build_mul_add_gen(ira, &instruction->base.base, casted_op1, casted_op2, casted_op3, expr_type);
 }
 
-static IrInstruction *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstructionTestErrSrc *instruction) {
-    IrInstruction *base_ptr = instruction->base_ptr->child;
+static IrInstGen *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstSrcTestErr *instruction) {
+    IrInstGen *base_ptr = instruction->base_ptr->child;
     if (type_is_invalid(base_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *value;
+    IrInstGen *value;
     if (instruction->base_ptr_is_payload) {
         value = base_ptr;
     } else {
-        value = ir_get_deref(ira, &instruction->base, base_ptr, nullptr);
+        value = ir_get_deref(ira, &instruction->base.base, base_ptr, nullptr);
     }
 
     ZigType *type_entry = value->value->type;
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     if (type_entry->id == ZigTypeIdErrorUnion) {
         if (instr_is_comptime(value)) {
             ZigValue *err_union_val = ir_resolve_const(ira, value, UndefBad);
             if (!err_union_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (err_union_val->special != ConstValSpecialRuntime) {
                 ErrorTableEntry *err = err_union_val->data.x_err_union.error_set->data.x_err_set;
-                return ir_const_bool(ira, &instruction->base, (err != nullptr));
+                return ir_const_bool(ira, &instruction->base.base, (err != nullptr));
             }
         }
 
         if (instruction->resolve_err_set) {
             ZigType *err_set_type = type_entry->data.error_union.err_set_type;
-            if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.source_node)) {
-                return ira->codegen->invalid_instruction;
+            if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.base.source_node)) {
+                return ira->codegen->invalid_inst_gen;
             }
             if (!type_is_global_error_set(err_set_type) &&
                 err_set_type->data.error_set.err_count == 0)
             {
                 assert(!err_set_type->data.error_set.incomplete);
-                return ir_const_bool(ira, &instruction->base, false);
+                return ir_const_bool(ira, &instruction->base.base, false);
             }
         }
 
-        return ir_build_test_err_gen(ira, &instruction->base, value);
+        return ir_build_test_err_gen(ira, &instruction->base.base, value);
     } else if (type_entry->id == ZigTypeIdErrorSet) {
-        return ir_const_bool(ira, &instruction->base, true);
+        return ir_const_bool(ira, &instruction->base.base, true);
     } else {
-        return ir_const_bool(ira, &instruction->base, false);
+        return ir_const_bool(ira, &instruction->base.base, false);
     }
 }
 
-static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool initializing)
+static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool initializing)
 {
     ZigType *ptr_type = base_ptr->value->type;
 
@@ -26167,12 +27031,12 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
 
     ZigType *type_entry = ptr_type->data.pointer.child_type;
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (type_entry->id != ZigTypeIdErrorUnion) {
-        ir_add_error(ira, base_ptr,
+        ir_add_error(ira, &base_ptr->base,
             buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *err_set_type = type_entry->data.error_union.err_set_type;
@@ -26183,13 +27047,13 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
     if (instr_is_comptime(base_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
         if (!ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
             ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr)
         {
             ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
             if (err_union_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             if (initializing && err_union_val->special == ConstValSpecialUndef) {
                 ZigValue *vals = create_const_vals(2);
@@ -26212,11 +27076,10 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
             }
             ir_assert(err_union_val->special != ConstValSpecialRuntime, source_instr);
 
-            IrInstruction *result;
+            IrInstGen *result;
             if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                result = ir_build_unwrap_err_code(&ira->new_irb, source_instr->scope,
-                        source_instr->source_node, base_ptr);
-                result->value->type = result_type;
+                result = ir_build_unwrap_err_code_gen(ira, source_instr->scope,
+                        source_instr->source_node, base_ptr, result_type);
                 result->value->special = ConstValSpecialStatic;
             } else {
                 result = ir_const(ira, source_instr, result_type);
@@ -26229,23 +27092,18 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
         }
     }
 
-    IrInstruction *result = ir_build_unwrap_err_code(&ira->new_irb,
-        source_instr->scope, source_instr->source_node, base_ptr);
-    result->value->type = result_type;
-    return result;
+    return ir_build_unwrap_err_code_gen(ira, source_instr->scope, source_instr->source_node, base_ptr, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira,
-        IrInstructionUnwrapErrCode *instruction)
-{
-    IrInstruction *base_ptr = instruction->err_union_ptr->child;
+static IrInstGen *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira, IrInstSrcUnwrapErrCode *instruction) {
+    IrInstGen *base_ptr = instruction->err_union_ptr->child;
     if (type_is_invalid(base_ptr->value->type))
-        return ira->codegen->invalid_instruction;
-    return ir_analyze_unwrap_err_code(ira, &instruction->base, base_ptr, false);
+        return ira->codegen->invalid_inst_gen;
+    return ir_analyze_unwrap_err_code(ira, &instruction->base.base, base_ptr, false);
 }
 
-static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *base_ptr, bool safety_check_on, bool initializing)
+static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *base_ptr, bool safety_check_on, bool initializing)
 {
     ZigType *ptr_type = base_ptr->value->type;
 
@@ -26254,17 +27112,17 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
 
     ZigType *type_entry = ptr_type->data.pointer.child_type;
     if (type_is_invalid(type_entry))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (type_entry->id != ZigTypeIdErrorUnion) {
-        ir_add_error(ira, base_ptr,
+        ir_add_error(ira, &base_ptr->base,
             buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *payload_type = type_entry->data.error_union.payload_type;
     if (type_is_invalid(payload_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *result_type = get_pointer_to_type_extra(ira->codegen, payload_type,
             ptr_type->data.pointer.is_const, ptr_type->data.pointer.is_volatile,
@@ -26273,11 +27131,11 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
     if (instr_is_comptime(base_ptr)) {
         ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
         if (!ptr_val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
             ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
             if (err_union_val == nullptr)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             if (initializing && err_union_val->special == ConstValSpecialUndef) {
                 ZigValue *vals = create_const_vals(2);
                 ZigValue *err_set_val = &vals[0];
@@ -26300,14 +27158,13 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
                 if (err != nullptr) {
                     ir_add_error(ira, source_instr,
                                  buf_sprintf("caught unexpected error '%s'", buf_ptr(&err->name)));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
 
-                IrInstruction *result;
+                IrInstGen *result;
                 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
-                    result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
-                        source_instr->source_node, base_ptr, safety_check_on, initializing);
-                    result->value->type = result_type;
+                    result = ir_build_unwrap_err_payload_gen(ira, source_instr->scope,
+                        source_instr->source_node, base_ptr, safety_check_on, initializing, result_type);
                     result->value->special = ConstValSpecialStatic;
                 } else {
                     result = ir_const(ira, source_instr, result_type);
@@ -26320,28 +27177,26 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
         }
     }
 
-    IrInstruction *result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, base_ptr, safety_check_on, initializing);
-    result->value->type = result_type;
-    return result;
+    return ir_build_unwrap_err_payload_gen(ira, source_instr->scope, source_instr->source_node,
+            base_ptr, safety_check_on, initializing, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
-    IrInstructionUnwrapErrPayload *instruction)
+static IrInstGen *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
+    IrInstSrcUnwrapErrPayload *instruction)
 {
     assert(instruction->value->child);
-    IrInstruction *value = instruction->value->child;
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_unwrap_error_payload(ira, &instruction->base, value, instruction->safety_check_on, false);
+    return ir_analyze_unwrap_error_payload(ira, &instruction->base.base, value, instruction->safety_check_on, false);
 }
 
-static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstructionFnProto *instruction) {
-    AstNode *proto_node = instruction->base.source_node;
+static IrInstGen *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstSrcFnProto *instruction) {
+    AstNode *proto_node = instruction->base.base.source_node;
     assert(proto_node->type == NodeTypeFnProto);
 
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValueFnType *lazy_fn_type = allocate<LazyValueFnType>(1, "LazyValueFnType");
@@ -26350,29 +27205,29 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
     lazy_fn_type->base.id = LazyValueIdFnType;
 
     if (proto_node->data.fn_proto.auto_err_set) {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("inferring error set of return type valid only for function definitions"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     lazy_fn_type->cc = cc_from_fn_proto(&proto_node->data.fn_proto);
     if (instruction->callconv_value != nullptr) {
         ZigType *cc_enum_type = get_builtin_type(ira->codegen, "CallingConvention");
 
-        IrInstruction *casted_value = ir_implicit_cast(ira, instruction->callconv_value, cc_enum_type);
+        IrInstGen *casted_value = ir_implicit_cast(ira, instruction->callconv_value->child, cc_enum_type);
         if (type_is_invalid(casted_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         ZigValue *const_value = ir_resolve_const(ira, casted_value, UndefBad);
         if (const_value == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         lazy_fn_type->cc = (CallingConvention)bigint_as_u32(&const_value->data.x_enum_tag);
     }
 
     size_t param_count = proto_node->data.fn_proto.params.length;
     lazy_fn_type->proto_node = proto_node;
-    lazy_fn_type->param_types = allocate<IrInstruction *>(param_count);
+    lazy_fn_type->param_types = allocate<IrInstGen *>(param_count);
 
     for (size_t param_index = 0; param_index < param_count; param_index += 1) {
         AstNode *param_node = proto_node->data.fn_proto.params.at(param_index);
@@ -26397,63 +27252,63 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
             return result;
         }
 
-        IrInstruction *param_type_value = instruction->param_types[param_index]->child;
+        IrInstGen *param_type_value = instruction->param_types[param_index]->child;
         if (type_is_invalid(param_type_value->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (ir_resolve_const(ira, param_type_value, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         lazy_fn_type->param_types[param_index] = param_type_value;
     }
 
     if (instruction->align_value != nullptr) {
         lazy_fn_type->align_inst = instruction->align_value->child;
         if (ir_resolve_const(ira, lazy_fn_type->align_inst, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     lazy_fn_type->return_type = instruction->return_type->child;
     if (ir_resolve_const(ira, lazy_fn_type->return_type, LazyOk) == nullptr)
-         return ira->codegen->invalid_instruction;
+         return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstructionTestComptime *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstSrcTestComptime *instruction) {
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_const_bool(ira, &instruction->base, instr_is_comptime(value));
+    return ir_const_bool(ira, &instruction->base.base, instr_is_comptime(value));
 }
 
-static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
-        IrInstructionCheckSwitchProngs *instruction)
+static IrInstGen *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
+        IrInstSrcCheckSwitchProngs *instruction)
 {
-    IrInstruction *target_value = instruction->target_value->child;
+    IrInstGen *target_value = instruction->target_value->child;
     ZigType *switch_type = target_value->value->type;
     if (type_is_invalid(switch_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (switch_type->id == ZigTypeIdEnum) {
         HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> field_prev_uses = {};
         field_prev_uses.init(switch_type->data.enumeration.src_field_count);
 
         for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
-            IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
+            IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
 
-            IrInstruction *start_value_uncasted = range->start->child;
+            IrInstGen *start_value_uncasted = range->start->child;
             if (type_is_invalid(start_value_uncasted->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
             if (type_is_invalid(start_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *end_value_uncasted = range->end->child;
+            IrInstGen *end_value_uncasted = range->end->child;
             if (type_is_invalid(end_value_uncasted->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
             if (type_is_invalid(end_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             assert(start_value->value->type->id == ZigTypeIdEnum);
             BigInt start_index;
@@ -26464,7 +27319,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
             bigint_init_bigint(&end_index, &end_value->value->data.x_enum_tag);
 
             if (bigint_cmp(&start_index, &end_index) == CmpGT) {
-                ir_add_error(ira, start_value,
+                ir_add_error(ira, &start_value->base,
                     buf_sprintf("range start value is greater than the end value"));
             }
 
@@ -26475,12 +27330,12 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
                 if (cmp == CmpGT) {
                     break;
                 }
-                auto entry = field_prev_uses.put_unique(field_index, start_value->source_node);
+                auto entry = field_prev_uses.put_unique(field_index, start_value->base.source_node);
                 if (entry) {
                     AstNode *prev_node = entry->value;
                     TypeEnumField *enum_field = find_enum_field_by_tag(switch_type, &field_index);
                     assert(enum_field != nullptr);
-                    ErrorMsg *msg = ir_add_error(ira, start_value,
+                    ErrorMsg *msg = ir_add_error(ira, &start_value->base,
                         buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name),
                             buf_ptr(enum_field->name)));
                     add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
@@ -26490,7 +27345,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
         }
         if (instruction->have_underscore_prong) {
             if (!switch_type->data.enumeration.non_exhaustive){
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("switch on non-exhaustive enum has `_` prong"));
             }
             for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
@@ -26500,14 +27355,14 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
 
                 auto entry = field_prev_uses.maybe_get(enum_field->value);
                 if (!entry) {
-                    ir_add_error(ira, &instruction->base,
+                    ir_add_error(ira, &instruction->base.base,
                         buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
                             buf_ptr(enum_field->name)));
                 }
             }
         } else if (!instruction->have_else_prong) {
             if (switch_type->data.enumeration.non_exhaustive) {
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("switch on non-exhaustive enum must include `else` or `_` prong"));
             }
             for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
@@ -26515,69 +27370,69 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
 
                 auto entry = field_prev_uses.maybe_get(enum_field->value);
                 if (!entry) {
-                    ir_add_error(ira, &instruction->base,
+                    ir_add_error(ira, &instruction->base.base,
                         buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
                             buf_ptr(enum_field->name)));
                 }
             }
         }
     } else if (switch_type->id == ZigTypeIdErrorSet) {
-        if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->source_node)) {
-            return ira->codegen->invalid_instruction;
+        if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->base.source_node)) {
+            return ira->codegen->invalid_inst_gen;
         }
 
         size_t field_prev_uses_count = ira->codegen->errors_by_index.length;
         AstNode **field_prev_uses = allocate<AstNode *>(field_prev_uses_count, "AstNode *");
 
         for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
-            IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
+            IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
 
-            IrInstruction *start_value_uncasted = range->start->child;
+            IrInstGen *start_value_uncasted = range->start->child;
             if (type_is_invalid(start_value_uncasted->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
             if (type_is_invalid(start_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *end_value_uncasted = range->end->child;
+            IrInstGen *end_value_uncasted = range->end->child;
             if (type_is_invalid(end_value_uncasted->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
             if (type_is_invalid(end_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
+            ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
             uint32_t start_index = start_value->value->data.x_err_set->value;
 
-            ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
+            ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
             uint32_t end_index = end_value->value->data.x_err_set->value;
 
             if (start_index != end_index) {
-                ir_add_error(ira, end_value, buf_sprintf("ranges not allowed when switching on errors"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &end_value->base, buf_sprintf("ranges not allowed when switching on errors"));
+                return ira->codegen->invalid_inst_gen;
             }
 
             AstNode *prev_node = field_prev_uses[start_index];
             if (prev_node != nullptr) {
                 Buf *err_name = &ira->codegen->errors_by_index.at(start_index)->name;
-                ErrorMsg *msg = ir_add_error(ira, start_value,
+                ErrorMsg *msg = ir_add_error(ira, &start_value->base,
                     buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name), buf_ptr(err_name)));
                 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
             }
-            field_prev_uses[start_index] = start_value->source_node;
+            field_prev_uses[start_index] = start_value->base.source_node;
         }
         if (!instruction->have_else_prong) {
             if (type_is_global_error_set(switch_type)) {
-                ir_add_error(ira, &instruction->base,
+                ir_add_error(ira, &instruction->base.base,
                     buf_sprintf("else prong required when switching on type 'anyerror'"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             } else {
                 for (uint32_t i = 0; i < switch_type->data.error_set.err_count; i += 1) {
                     ErrorTableEntry *err_entry = switch_type->data.error_set.errors[i];
 
                     AstNode *prev_node = field_prev_uses[err_entry->value];
                     if (prev_node == nullptr) {
-                        ir_add_error(ira, &instruction->base,
+                        ir_add_error(ira, &instruction->base.base,
                             buf_sprintf("error.%s not handled in switch", buf_ptr(&err_entry->name)));
                     }
                 }
@@ -26588,44 +27443,44 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
     } else if (switch_type->id == ZigTypeIdInt) {
         RangeSet rs = {0};
         for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
-            IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
+            IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
 
-            IrInstruction *start_value = range->start->child;
+            IrInstGen *start_value = range->start->child;
             if (type_is_invalid(start_value->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
             if (type_is_invalid(casted_start_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
-            IrInstruction *end_value = range->end->child;
+            IrInstGen *end_value = range->end->child;
             if (type_is_invalid(end_value->value->type))
-                return ira->codegen->invalid_instruction;
-            IrInstruction *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
+                return ira->codegen->invalid_inst_gen;
+            IrInstGen *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
             if (type_is_invalid(casted_end_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             ZigValue *start_val = ir_resolve_const(ira, casted_start_value, UndefBad);
             if (!start_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             ZigValue *end_val = ir_resolve_const(ira, casted_end_value, UndefBad);
             if (!end_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             assert(start_val->type->id == ZigTypeIdInt || start_val->type->id == ZigTypeIdComptimeInt);
             assert(end_val->type->id == ZigTypeIdInt || end_val->type->id == ZigTypeIdComptimeInt);
 
             if (bigint_cmp(&start_val->data.x_bigint, &end_val->data.x_bigint) == CmpGT) {
-                ir_add_error(ira, start_value,
+                ir_add_error(ira, &start_value->base,
                     buf_sprintf("range start value is greater than the end value"));
             }
 
             AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,
-                    start_value->source_node);
+                    start_value->base.source_node);
             if (prev_node != nullptr) {
-                ErrorMsg *msg = ir_add_error(ira, start_value, buf_sprintf("duplicate switch value"));
+                ErrorMsg *msg = ir_add_error(ira, &start_value->base, buf_sprintf("duplicate switch value"));
                 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("previous value is here"));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         if (!instruction->have_else_prong) {
@@ -26634,25 +27489,25 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
             BigInt max_val;
             eval_min_max_value_int(ira->codegen, switch_type, &max_val, true);
             if (!rangeset_spans(&rs, &min_val, &max_val)) {
-                ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
+                return ira->codegen->invalid_inst_gen;
             }
         }
     } else if (switch_type->id == ZigTypeIdBool) {
         int seenTrue = 0;
         int seenFalse = 0;
         for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
-            IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
+            IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
 
-            IrInstruction *value = range->start->child;
+            IrInstGen *value = range->start->child;
 
-            IrInstruction *casted_value = ir_implicit_cast(ira, value, switch_type);
+            IrInstGen *casted_value = ir_implicit_cast(ira, value, switch_type);
             if (type_is_invalid(casted_value->value->type))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             ZigValue *const_expr_val = ir_resolve_const(ira, casted_value, UndefBad);
             if (!const_expr_val)
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
 
             assert(const_expr_val->type->id == ZigTypeIdBool);
 
@@ -26663,60 +27518,59 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
             }
 
             if ((seenTrue > 1) || (seenFalse > 1)) {
-                ir_add_error(ira, value, buf_sprintf("duplicate switch value"));
-                return ira->codegen->invalid_instruction;
+                ir_add_error(ira, &value->base, buf_sprintf("duplicate switch value"));
+                return ira->codegen->invalid_inst_gen;
             }
         }
         if (((seenTrue < 1) || (seenFalse < 1)) && !instruction->have_else_prong) {
-            ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
-            return ira->codegen->invalid_instruction;
+            ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
+            return ira->codegen->invalid_inst_gen;
         }
     } else if (!instruction->have_else_prong) {
-        ir_add_error(ira, &instruction->base,
+        ir_add_error(ira, &instruction->base.base,
             buf_sprintf("else prong required when switching on type '%s'", buf_ptr(&switch_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
-        IrInstructionCheckStatementIsVoid *instruction)
+static IrInstGen *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
+        IrInstSrcCheckStatementIsVoid *instruction)
 {
-    IrInstruction *statement_value = instruction->statement_value->child;
+    IrInstGen *statement_value = instruction->statement_value->child;
     ZigType *statement_type = statement_value->value->type;
     if (type_is_invalid(statement_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (statement_type->id != ZigTypeIdVoid && statement_type->id != ZigTypeIdUnreachable) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("expression value is ignored"));
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("expression value is ignored"));
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstructionPanic *instruction) {
-    IrInstruction *msg = instruction->msg->child;
+static IrInstGen *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstSrcPanic *instruction) {
+    IrInstGen *msg = instruction->msg->child;
     if (type_is_invalid(msg->value->type))
         return ir_unreach_error(ira);
 
-    if (ir_should_inline(ira->new_irb.exec, instruction->base.scope)) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("encountered @panic at compile-time"));
+    if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope)) {
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("encountered @panic at compile-time"));
         return ir_unreach_error(ira);
     }
 
     ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
             true, false, PtrLenUnknown, 0, 0, 0, false);
     ZigType *str_type = get_slice_type(ira->codegen, u8_ptr_type);
-    IrInstruction *casted_msg = ir_implicit_cast(ira, msg, str_type);
+    IrInstGen *casted_msg = ir_implicit_cast(ira, msg, str_type);
     if (type_is_invalid(casted_msg->value->type))
         return ir_unreach_error(ira);
 
-    IrInstruction *new_instruction = ir_build_panic(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, casted_msg);
+    IrInstGen *new_instruction = ir_build_panic_gen(ira, &instruction->base.base, casted_msg);
     return ir_finish_anal(ira, new_instruction);
 }
 
-static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint32_t align_bytes, bool safety_check_on) {
+static IrInstGen *ir_align_cast(IrAnalyze *ira, IrInstGen *target, uint32_t align_bytes, bool safety_check_on) {
     Error err;
 
     ZigType *target_type = target->value->type;
@@ -26728,7 +27582,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
     if (target_type->id == ZigTypeIdPointer) {
         result_type = adjust_ptr_align(ira->codegen, target_type, align_bytes);
         if ((err = resolve_ptr_align(ira, target_type, &old_align_bytes)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else if (target_type->id == ZigTypeIdFn) {
         FnTypeId fn_type_id = target_type->data.fn.fn_type_id;
         old_align_bytes = fn_type_id.alignment;
@@ -26739,7 +27593,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
     {
         ZigType *ptr_type = target_type->data.maybe.child_type;
         if ((err = resolve_ptr_align(ira, ptr_type, &old_align_bytes)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigType *better_ptr_type = adjust_ptr_align(ira->codegen, ptr_type, align_bytes);
 
         result_type = get_optional_type(ira->codegen, better_ptr_type);
@@ -26754,47 +27608,44 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
     } else if (is_slice(target_type)) {
         ZigType *slice_ptr_type = target_type->data.structure.fields[slice_ptr_index]->type_entry;
         if ((err = resolve_ptr_align(ira, slice_ptr_type, &old_align_bytes)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         ZigType *result_ptr_type = adjust_ptr_align(ira->codegen, slice_ptr_type, align_bytes);
         result_type = get_slice_type(ira->codegen, result_ptr_type);
     } else {
-        ir_add_error(ira, target,
+        ir_add_error(ira, &target->base,
                 buf_sprintf("expected pointer or slice, found '%s'", buf_ptr(&target_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
             val->data.x_ptr.data.hard_coded_addr.addr % align_bytes != 0)
         {
-            ir_add_error(ira, target,
+            ir_add_error(ira, &target->base,
                     buf_sprintf("pointer address 0x%" ZIG_PRI_x64 " is not aligned to %" PRIu32 " bytes",
                         val->data.x_ptr.data.hard_coded_addr.addr, align_bytes));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *result = ir_const(ira, target, result_type);
+        IrInstGen *result = ir_const(ira, &target->base, result_type);
         copy_const_val(result->value, val);
         result->value->type = result_type;
         return result;
     }
 
-    IrInstruction *result;
     if (safety_check_on && align_bytes > old_align_bytes && align_bytes != 1) {
-        result = ir_build_align_cast(&ira->new_irb, target->scope, target->source_node, nullptr, target);
+        return ir_build_align_cast_gen(ira, target->base.scope, target->base.source_node, target, result_type);
     } else {
-        result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, result_type, target, CastOpNoop);
+        return ir_build_cast(ira, &target->base, result_type, target, CastOpNoop);
     }
-    result->value->type = result_type;
-    return result;
 }
 
-static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
-        ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on)
+static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
+        ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on)
 {
     Error err;
 
@@ -26810,44 +27661,44 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
 
     ZigType *src_ptr_type = get_src_ptr_type(src_type);
     if (src_ptr_type == nullptr) {
-        ir_add_error(ira, ptr, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &ptr->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *dest_ptr_type = get_src_ptr_type(dest_type);
     if (dest_ptr_type == nullptr) {
         ir_add_error(ira, dest_type_src,
                 buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (get_ptr_const(src_type) && !get_ptr_const(dest_type)) {
         ir_add_error(ira, source_instr, buf_sprintf("cast discards const qualifier"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
     uint32_t src_align_bytes;
     if ((err = resolve_ptr_align(ira, src_type, &src_align_bytes)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint32_t dest_align_bytes;
     if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
         ErrorMsg *msg = ir_add_error(ira, source_instr,
             buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
                 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
-        add_error_note(ira->codegen, msg, ptr->source_node,
+        add_error_note(ira->codegen, msg, ptr->base.source_node,
                 buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
         add_error_note(ira->codegen, msg, dest_type_src->source_node,
                 buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(ptr)) {
@@ -26855,7 +27706,7 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
         UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;
         ZigValue *val = ir_resolve_const(ira, ptr, is_undef_allowed);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (value_is_comptime(val) && val->special != ConstValSpecialUndef) {
             bool is_addr_zero = val->data.x_ptr.special == ConstPtrSpecialNull ||
@@ -26864,16 +27715,16 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
             if (is_addr_zero && !dest_allows_addr_zero) {
                 ir_add_error(ira, source_instr,
                         buf_sprintf("null pointer casted to type '%s'", buf_ptr(&dest_type->name)));
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
-        IrInstruction *result;
+        IrInstGen *result;
         if (ptr->value->data.x_ptr.mut == ConstPtrMutInfer) {
             result = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
 
             if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
         } else {
             result = ir_const(ira, source_instr, dest_type);
         }
@@ -26891,40 +27742,40 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
 
     if (dest_align_bytes > src_align_bytes) {
         ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("cast increases pointer alignment"));
-        add_error_note(ira->codegen, msg, ptr->source_node,
+        add_error_note(ira->codegen, msg, ptr->base.source_node,
                 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&src_type->name), src_align_bytes));
         add_error_note(ira->codegen, msg, dest_type_src->source_node,
                 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&dest_type->name), dest_align_bytes));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
+    IrInstGen *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
 
     // Keep the bigger alignment, it can only help-
     // unless the target is zero bits.
-    IrInstruction *result;
+    IrInstGen *result;
     if (src_align_bytes > dest_align_bytes && type_has_bits(dest_type)) {
         result = ir_align_cast(ira, casted_ptr, src_align_bytes, false);
         if (type_is_invalid(result->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     } else {
         result = casted_ptr;
     }
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstructionPtrCastSrc *instruction) {
-    IrInstruction *dest_type_value = instruction->dest_type->child;
+static IrInstGen *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstSrcPtrCast *instruction) {
+    IrInstGen *dest_type_value = instruction->dest_type->child;
     ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *ptr = instruction->ptr->child;
+    IrInstGen *ptr = instruction->ptr->child;
     ZigType *src_type = ptr->value->type;
     if (type_is_invalid(src_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_ptr_cast(ira, &instruction->base, ptr, dest_type, dest_type_value,
+    return ir_analyze_ptr_cast(ira, &instruction->base.base, ptr, dest_type, &dest_type_value->base,
             instruction->safety_check_on);
 }
 
@@ -27255,7 +28106,7 @@ static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *sou
     zig_unreachable();
 }
 
-static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
+static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
         ZigType *dest_type)
 {
     Error err;
@@ -27271,14 +28122,14 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
             buf_sprintf("cannot cast a value of type '%s'", buf_ptr(&dest_type->name)));
         add_error_note(ira->codegen, msg, source_instr->source_node,
             buf_sprintf("use @intToEnum for type coercion"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if ((err = type_resolve(ira->codegen, src_type, ResolveStatusSizeKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint64_t dest_size_bytes = type_size(ira->codegen, dest_type);
     uint64_t src_size_bytes = type_size(ira->codegen, src_type);
@@ -27287,7 +28138,7 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
             buf_sprintf("destination type '%s' has size %" ZIG_PRI_u64 " but source type '%s' has size %" ZIG_PRI_u64,
                 buf_ptr(&dest_type->name), dest_size_bytes,
                 buf_ptr(&src_type->name), src_size_bytes));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     uint64_t dest_size_bits = type_size_bits(ira->codegen, dest_type);
@@ -27297,26 +28148,26 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
             buf_sprintf("destination type '%s' has %" ZIG_PRI_u64 " bits but source type '%s' has %" ZIG_PRI_u64 " bits",
                 buf_ptr(&dest_type->name), dest_size_bits,
                 buf_ptr(&src_type->name), src_size_bits));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(value)) {
         ZigValue *val = ir_resolve_const(ira, value, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        IrInstruction *result = ir_const(ira, source_instr, dest_type);
+        IrInstGen *result = ir_const(ira, source_instr, dest_type);
         uint8_t *buf = allocate_nonzero<uint8_t>(src_size_bytes);
         buf_write_value_bytes(ira->codegen, buf, val);
         if ((err = buf_read_value_bytes(ira, ira->codegen, source_instr->source_node, buf, result->value)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         return result;
     }
 
     return ir_build_bit_cast_gen(ira, source_instr, value, dest_type);
 }
 
-static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
+static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
         ZigType *ptr_type)
 {
     Error err;
@@ -27324,136 +28175,128 @@ static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *sourc
     ir_assert(get_src_ptr_type(ptr_type) != nullptr, source_instr);
     ir_assert(type_has_bits(ptr_type), source_instr);
 
-    IrInstruction *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
+    IrInstGen *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
     if (type_is_invalid(casted_int->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instr_is_comptime(casted_int)) {
         ZigValue *val = ir_resolve_const(ira, casted_int, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         uint64_t addr = bigint_as_u64(&val->data.x_bigint);
         if (!ptr_allows_addr_zero(ptr_type) && addr == 0) {
             ir_add_error(ira, source_instr,
                     buf_sprintf("pointer type '%s' does not allow address zero", buf_ptr(&ptr_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
         uint32_t align_bytes;
         if ((err = resolve_ptr_align(ira, ptr_type, &align_bytes)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
         if (addr != 0 && addr % align_bytes != 0) {
             ir_add_error(ira, source_instr,
                     buf_sprintf("pointer type '%s' requires aligned address",
                                 buf_ptr(&ptr_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
 
-        IrInstruction *result = ir_const(ira, source_instr, ptr_type);
+        IrInstGen *result = ir_const(ira, source_instr, ptr_type);
         result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
         result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
         result->value->data.x_ptr.data.hard_coded_addr.addr = addr;
         return result;
     }
 
-    IrInstruction *result = ir_build_int_to_ptr(&ira->new_irb, source_instr->scope,
-            source_instr->source_node, nullptr, casted_int);
-    result->value->type = ptr_type;
-    return result;
+    return ir_build_int_to_ptr_gen(ira, source_instr->scope, source_instr->source_node, casted_int, ptr_type);
 }
 
-static IrInstruction *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstructionIntToPtr *instruction) {
+static IrInstGen *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstSrcIntToPtr *instruction) {
     Error err;
-    IrInstruction *dest_type_value = instruction->dest_type->child;
+    IrInstGen *dest_type_value = instruction->dest_type->child;
     ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // We explicitly check for the size, so we can use get_src_ptr_type
     if (get_src_ptr_type(dest_type) == nullptr) {
-        ir_add_error(ira, dest_type_value, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     bool has_bits;
     if ((err = type_has_bits2(ira->codegen, dest_type, &has_bits)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!has_bits) {
-        ir_add_error(ira, dest_type_value,
+        ir_add_error(ira, &dest_type_value->base,
                 buf_sprintf("type '%s' has 0 bits and cannot store information", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_int_to_ptr(ira, &instruction->base, target, dest_type);
+    return ir_analyze_int_to_ptr(ira, &instruction->base.base, target, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_decl_ref(IrAnalyze *ira,
-        IrInstructionDeclRef *instruction)
-{
-    IrInstruction *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base, instruction->tld);
+static IrInstGen *ir_analyze_instruction_decl_ref(IrAnalyze *ira, IrInstSrcDeclRef *instruction) {
+    IrInstGen *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base.base, instruction->tld);
     if (type_is_invalid(ref_instruction->value->type)) {
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instruction->lval == LValPtr) {
         return ref_instruction;
     } else {
-        return ir_get_deref(ira, &instruction->base, ref_instruction, nullptr);
+        return ir_get_deref(ira, &instruction->base.base, ref_instruction, nullptr);
     }
 }
 
-static IrInstruction *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstructionPtrToInt *instruction) {
+static IrInstGen *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstSrcPtrToInt *instruction) {
     Error err;
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *usize = ira->codegen->builtin_types.entry_usize;
 
     // We check size explicitly so we can use get_src_ptr_type here.
     if (get_src_ptr_type(target->value->type) == nullptr) {
-        ir_add_error(ira, target,
+        ir_add_error(ira, &target->base,
                 buf_sprintf("expected pointer, found '%s'", buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     bool has_bits;
     if ((err = type_has_bits2(ira->codegen, target->value->type, &has_bits)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!has_bits) {
-        ir_add_error(ira, target,
+        ir_add_error(ira, &target->base,
                 buf_sprintf("pointer to size 0 type has no address"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(target)) {
         ZigValue *val = ir_resolve_const(ira, target, UndefBad);
         if (!val)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->type->id == ZigTypeIdPointer && val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
-            IrInstruction *result = ir_const(ira, &instruction->base, usize);
+            IrInstGen *result = ir_const(ira, &instruction->base.base, usize);
             bigint_init_unsigned(&result->value->data.x_bigint, val->data.x_ptr.data.hard_coded_addr.addr);
             result->value->type = usize;
             return result;
         }
     }
 
-    IrInstruction *result = ir_build_ptr_to_int(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, target);
-    result->value->type = usize;
-    return result;
+    return ir_build_ptr_to_int_gen(ira, &instruction->base.base, target);
 }
 
-static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstructionPtrType *instruction) {
-    IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
+static IrInstGen *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstSrcPtrType *instruction) {
+    IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
     result->value->special = ConstValSpecialLazy;
 
     LazyValuePtrType *lazy_ptr_type = allocate<LazyValuePtrType>(1, "LazyValuePtrType");
@@ -27464,17 +28307,17 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
     if (instruction->sentinel != nullptr) {
         lazy_ptr_type->sentinel = instruction->sentinel->child;
         if (ir_resolve_const(ira, lazy_ptr_type->sentinel, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     lazy_ptr_type->elem_type = instruction->child_type->child;
     if (ir_resolve_type_lazy(ira, lazy_ptr_type->elem_type) == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (instruction->align_value != nullptr) {
         lazy_ptr_type->align_inst = instruction->align_value->child;
         if (ir_resolve_const(ira, lazy_ptr_type->align_inst, LazyOk) == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
     }
 
     lazy_ptr_type->ptr_len = instruction->ptr_len;
@@ -27487,10 +28330,10 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstructionAlignCast *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstSrcAlignCast *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *elem_type = nullptr;
     if (is_slice(target->value->type)) {
@@ -27501,192 +28344,192 @@ static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstru
     }
 
     uint32_t align_bytes;
-    IrInstruction *align_bytes_inst = instruction->align_bytes->child;
+    IrInstGen *align_bytes_inst = instruction->align_bytes->child;
     if (!ir_resolve_align(ira, align_bytes_inst, elem_type, &align_bytes))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result = ir_align_cast(ira, target, align_bytes, true);
+    IrInstGen *result = ir_align_cast(ira, target, align_bytes, true);
     if (type_is_invalid(result->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return result;
 }
 
-static IrInstruction *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstructionOpaqueType *instruction) {
+static IrInstGen *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstSrcOpaqueType *instruction) {
     Buf *bare_name = buf_alloc();
-    Buf *full_name = get_anon_type_name(ira->codegen, ira->new_irb.exec, "opaque",
-            instruction->base.scope, instruction->base.source_node, bare_name);
-    ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.scope, instruction->base.source_node,
-            buf_ptr(full_name), bare_name);
-    return ir_const_type(ira, &instruction->base, result_type);
+    Buf *full_name = get_anon_type_name(ira->codegen, ira->old_irb.exec, "opaque",
+            instruction->base.base.scope, instruction->base.base.source_node, bare_name);
+    ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.base.scope,
+            instruction->base.base.source_node, buf_ptr(full_name), bare_name);
+    return ir_const_type(ira, &instruction->base.base, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstructionSetAlignStack *instruction) {
+static IrInstGen *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstSrcSetAlignStack *instruction) {
     uint32_t align_bytes;
-    IrInstruction *align_bytes_inst = instruction->align_bytes->child;
+    IrInstGen *align_bytes_inst = instruction->align_bytes->child;
     if (!ir_resolve_align(ira, align_bytes_inst, nullptr, &align_bytes))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (align_bytes > 256) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
+        return ira->codegen->invalid_inst_gen;
     }
 
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
     if (fn_entry == nullptr) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack outside function"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack outside function"));
+        return ira->codegen->invalid_inst_gen;
     }
     if (fn_entry->type_entry->data.fn.fn_type_id.cc == CallingConventionNaked) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in naked function"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in naked function"));
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (fn_entry->fn_inline == FnInlineAlways) {
-        ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in inline function"));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in inline function"));
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (fn_entry->set_alignstack_node != nullptr) {
-        ErrorMsg *msg = ir_add_error_node(ira, instruction->base.source_node,
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
             buf_sprintf("alignstack set twice"));
         add_error_note(ira->codegen, msg, fn_entry->set_alignstack_node, buf_sprintf("first set here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    fn_entry->set_alignstack_node = instruction->base.source_node;
+    fn_entry->set_alignstack_node = instruction->base.base.source_node;
     fn_entry->alignstack_value = align_bytes;
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstructionArgType *instruction) {
-    IrInstruction *fn_type_inst = instruction->fn_type->child;
+static IrInstGen *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstSrcArgType *instruction) {
+    IrInstGen *fn_type_inst = instruction->fn_type->child;
     ZigType *fn_type = ir_resolve_type(ira, fn_type_inst);
     if (type_is_invalid(fn_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *arg_index_inst = instruction->arg_index->child;
+    IrInstGen *arg_index_inst = instruction->arg_index->child;
     uint64_t arg_index;
     if (!ir_resolve_usize(ira, arg_index_inst, &arg_index))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (fn_type->id == ZigTypeIdBoundFn) {
         fn_type = fn_type->data.bound_fn.fn_type;
         arg_index += 1;
     }
     if (fn_type->id != ZigTypeIdFn) {
-        ir_add_error(ira, fn_type_inst, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
-        return ira->codegen->invalid_instruction;
+        ir_add_error(ira, &fn_type_inst->base, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
+        return ira->codegen->invalid_inst_gen;
     }
 
     FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
     if (arg_index >= fn_type_id->param_count) {
         if (instruction->allow_var) {
             // TODO remove this with var args
-            return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
+            return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
         }
-        ir_add_error(ira, arg_index_inst,
+        ir_add_error(ira, &arg_index_inst->base,
                 buf_sprintf("arg index %" ZIG_PRI_u64 " out of bounds; '%s' has %" ZIG_PRI_usize " arguments",
                     arg_index, buf_ptr(&fn_type->name), fn_type_id->param_count));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ZigType *result_type = fn_type_id->param_info[arg_index].type;
     if (result_type == nullptr) {
         // Args are only unresolved if our function is generic.
-        ir_assert(fn_type->data.fn.is_generic, &instruction->base);
+        ir_assert(fn_type->data.fn.is_generic, &instruction->base.base);
 
         if (instruction->allow_var) {
-            return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
+            return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
         } else {
-            ir_add_error(ira, arg_index_inst,
+            ir_add_error(ira, &arg_index_inst->base,
                 buf_sprintf("@ArgType could not resolve the type of arg %" ZIG_PRI_u64 " because '%s' is generic",
                     arg_index, buf_ptr(&fn_type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         }
     }
-    return ir_const_type(ira, &instruction->base, result_type);
+    return ir_const_type(ira, &instruction->base.base, result_type);
 }
 
-static IrInstruction *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstructionTagType *instruction) {
+static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagType *instruction) {
     Error err;
-    IrInstruction *target_inst = instruction->target->child;
+    IrInstGen *target_inst = instruction->target->child;
     ZigType *enum_type = ir_resolve_type(ira, target_inst);
     if (type_is_invalid(enum_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (enum_type->id == ZigTypeIdEnum) {
         if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
 
-        return ir_const_type(ira, &instruction->base, enum_type->data.enumeration.tag_int_type);
+        return ir_const_type(ira, &instruction->base.base, enum_type->data.enumeration.tag_int_type);
     } else if (enum_type->id == ZigTypeIdUnion) {
-        ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target, enum_type);
+        ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target->base.source_node, enum_type);
         if (type_is_invalid(tag_type))
-            return ira->codegen->invalid_instruction;
-        return ir_const_type(ira, &instruction->base, tag_type);
+            return ira->codegen->invalid_inst_gen;
+        return ir_const_type(ira, &instruction->base.base, tag_type);
     } else {
-        ir_add_error(ira, target_inst, buf_sprintf("expected enum or union, found '%s'",
+        ir_add_error(ira, &target_inst->base, buf_sprintf("expected enum or union, found '%s'",
             buf_ptr(&enum_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 }
 
-static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op) {
+static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
     ZigType *operand_type = ir_resolve_type(ira, op);
     if (type_is_invalid(operand_type))
         return ira->codegen->builtin_types.entry_invalid;
 
     if (operand_type->id == ZigTypeIdInt) {
         if (operand_type->data.integral.bit_count < 8) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",
                     operand_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
         uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
         if (operand_type->data.integral.bit_count > max_atomic_bits) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("expected %" PRIu32 "-bit integer type or smaller, found %" PRIu32 "-bit integer type",
                     max_atomic_bits, operand_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
         if (!is_power_of_2(operand_type->data.integral.bit_count)) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
     } else if (operand_type->id == ZigTypeIdEnum) {
         ZigType *int_type = operand_type->data.enumeration.tag_int_type;
         if (int_type->data.integral.bit_count < 8) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",
                     int_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
         uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
         if (int_type->data.integral.bit_count > max_atomic_bits) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",
                     max_atomic_bits, int_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
         if (!is_power_of_2(int_type->data.integral.bit_count)) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
     } else if (operand_type->id == ZigTypeIdFloat) {
         uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
         if (operand_type->data.floating.bit_count > max_atomic_bits) {
-            ir_add_error(ira, op,
+            ir_add_error(ira, &op->base,
                 buf_sprintf("expected %" PRIu32 "-bit float or smaller, found %" PRIu32 "-bit float",
                     max_atomic_bits, (uint32_t) operand_type->data.floating.bit_count));
             return ira->codegen->builtin_types.entry_invalid;
         }
     } else if (get_codegen_ptr_type(operand_type) == nullptr) {
-        ir_add_error(ira, op,
+        ir_add_error(ira, &op->base,
             buf_sprintf("expected integer, float, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
         return ira->codegen->builtin_types.entry_invalid;
     }
@@ -27694,172 +28537,146 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op
     return operand_type;
 }
 
-static IrInstruction *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstructionAtomicRmw *instruction) {
+static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
     ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
     if (type_is_invalid(operand_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *ptr_inst = instruction->ptr->child;
+    IrInstGen *ptr_inst = instruction->ptr->child;
     if (type_is_invalid(ptr_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // TODO let this be volatile
     ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
-    IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
+    IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
     if (type_is_invalid(casted_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     AtomicRmwOp op;
-    if (instruction->op == nullptr) {
-        op = instruction->resolved_op;
-    } else {
-        if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
-            return ira->codegen->invalid_instruction;
-        }
+    if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) {
-        ir_add_error(ira, instruction->op,
+        ir_add_error(ira, &instruction->op->base,
             buf_sprintf("@atomicRmw on enum only works with .Xchg"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     } else if (operand_type->id == ZigTypeIdFloat && op > AtomicRmwOp_sub) {
-        ir_add_error(ira, instruction->op,
+        ir_add_error(ira, &instruction->op->base,
             buf_sprintf("@atomicRmw with float only works with .Xchg, .Add and .Sub"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *operand = instruction->operand->child;
+    IrInstGen *operand = instruction->operand->child;
     if (type_is_invalid(operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_operand = ir_implicit_cast(ira, operand, operand_type);
+    IrInstGen *casted_operand = ir_implicit_cast(ira, operand, operand_type);
     if (type_is_invalid(casted_operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     AtomicOrder ordering;
-    if (instruction->ordering == nullptr) {
-        ordering = instruction->resolved_ordering;
-    } else {
-        if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
-            return ira->codegen->invalid_instruction;
-        if (ordering == AtomicOrderUnordered) {
-            ir_add_error(ira, instruction->ordering,
-                buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
-            return ira->codegen->invalid_instruction;
-        }
+    if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
+        return ira->codegen->invalid_inst_gen;
+    if (ordering == AtomicOrderUnordered) {
+        ir_add_error(ira, &instruction->ordering->base,
+            buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(casted_operand) && instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar)
     {
-        zig_panic("TODO compile-time execution of atomicRmw");
+        ir_add_error(ira, &instruction->base.base,
+            buf_sprintf("compiler bug: TODO compile-time execution of @atomicRmw"));
+        return ira->codegen->invalid_inst_gen;
     }
 
-    IrInstruction *result = ir_build_atomic_rmw(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, casted_ptr, nullptr, casted_operand, nullptr,
-            op, ordering);
-    result->value->type = operand_type;
-    return result;
+    return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
+            ordering, operand_type);
 }
 
-static IrInstruction *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstructionAtomicLoad *instruction) {
+static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
     ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
     if (type_is_invalid(operand_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *ptr_inst = instruction->ptr->child;
+    IrInstGen *ptr_inst = instruction->ptr->child;
     if (type_is_invalid(ptr_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, true);
-    IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
+    IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
     if (type_is_invalid(casted_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     AtomicOrder ordering;
-    if (instruction->ordering == nullptr) {
-        ordering = instruction->resolved_ordering;
-    } else {
-        if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
-            return ira->codegen->invalid_instruction;
-    }
+    if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
+        return ira->codegen->invalid_inst_gen;
 
     if (ordering == AtomicOrderRelease || ordering == AtomicOrderAcqRel) {
-        ir_assert(instruction->ordering != nullptr, &instruction->base);
-        ir_add_error(ira, instruction->ordering,
+        ir_assert(instruction->ordering != nullptr, &instruction->base.base);
+        ir_add_error(ira, &instruction->ordering->base,
             buf_sprintf("@atomicLoad atomic ordering must not be Release or AcqRel"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(casted_ptr)) {
-        IrInstruction *result = ir_get_deref(ira, &instruction->base, casted_ptr, nullptr);
-        ir_assert(result->value->type != nullptr, &instruction->base);
+        IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr);
+        ir_assert(result->value->type != nullptr, &instruction->base.base);
         return result;
     }
 
-    IrInstruction *result = ir_build_atomic_load(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, casted_ptr, nullptr, ordering);
-    result->value->type = operand_type;
-    return result;
+    return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
 }
 
-static IrInstruction *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstructionAtomicStore *instruction) {
+static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
     ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
     if (type_is_invalid(operand_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *ptr_inst = instruction->ptr->child;
+    IrInstGen *ptr_inst = instruction->ptr->child;
     if (type_is_invalid(ptr_inst->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
-    IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
+    IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
     if (type_is_invalid(casted_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *value = instruction->value->child;
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_value = ir_implicit_cast(ira, value, operand_type);
+    IrInstGen *casted_value = ir_implicit_cast(ira, value, operand_type);
     if (type_is_invalid(casted_value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
 
     AtomicOrder ordering;
-    if (instruction->ordering == nullptr) {
-        ordering = instruction->resolved_ordering;
-    } else {
-        if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
-            return ira->codegen->invalid_instruction;
-    }
+    if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
+        return ira->codegen->invalid_inst_gen;
 
     if (ordering == AtomicOrderAcquire || ordering == AtomicOrderAcqRel) {
-        ir_assert(instruction->ordering != nullptr, &instruction->base);
-        ir_add_error(ira, instruction->ordering,
+        ir_assert(instruction->ordering != nullptr, &instruction->base.base);
+        ir_add_error(ira, &instruction->ordering->base,
             buf_sprintf("@atomicStore atomic ordering must not be Acquire or AcqRel"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(casted_value) && instr_is_comptime(casted_ptr)) {
-        IrInstruction *result = ir_analyze_store_ptr(ira, &instruction->base, casted_ptr, value, false);
+        IrInstGen *result = ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, value, false);
         result->value->type = ira->codegen->builtin_types.entry_void;
         return result;
     }
 
-    IrInstruction *result = ir_build_atomic_store(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, casted_ptr, casted_value, nullptr, ordering);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+    return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
 }
 
-static IrInstruction *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstructionSaveErrRetAddr *instruction) {
-    IrInstruction *result = ir_build_save_err_ret_addr(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node);
-    result->value->type = ira->codegen->builtin_types.entry_void;
-    return result;
+static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {
+    return ir_build_save_err_ret_addr_gen(ira, &instruction->base.base);
 }
 
-static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, BuiltinFnId fop, ZigType *float_type,
+static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInst* source_instr, BuiltinFnId fop, ZigType *float_type,
         ZigValue *op, ZigValue *out_val)
 {
     assert(ira && source_instr && float_type && out_val && op);
@@ -28072,30 +28889,30 @@ static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, B
     return nullptr;
 }
 
-static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstructionFloatOp *instruction) {
-    IrInstruction *operand = instruction->operand->child;
+static IrInstGen *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstSrcFloatOp *instruction) {
+    IrInstGen *operand = instruction->operand->child;
     ZigType *operand_type = operand->value->type;
     if (type_is_invalid(operand_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     // This instruction accepts floats and vectors of floats.
     ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
         operand_type->data.vector.elem_type : operand_type;
 
     if (scalar_type->id != ZigTypeIdFloat && scalar_type->id != ZigTypeIdComptimeFloat) {
-        ir_add_error(ira, operand,
+        ir_add_error(ira, &operand->base,
             buf_sprintf("expected float type, found '%s'", buf_ptr(&scalar_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(operand)) {
         ZigValue *operand_val = ir_resolve_const(ira, operand, UndefOk);
         if (operand_val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (operand_val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, operand_type);
+            return ir_const_undef(ira, &instruction->base.base, operand_type);
 
-        IrInstruction *result = ir_const(ira, &instruction->base, operand_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, operand_type);
         ZigValue *out_val = result->value;
 
         if (operand_type->id == ZigTypeIdVector) {
@@ -28106,47 +28923,44 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct
             for (size_t i = 0; i < len; i += 1) {
                 ZigValue *elem_operand = &operand_val->data.x_array.data.s_none.elements[i];
                 ZigValue *float_out_val = &out_val->data.x_array.data.s_none.elements[i];
-                ir_assert(elem_operand->type == scalar_type, &instruction->base);
-                ir_assert(float_out_val->type == scalar_type, &instruction->base);
-                ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
+                ir_assert(elem_operand->type == scalar_type, &instruction->base.base);
+                ir_assert(float_out_val->type == scalar_type, &instruction->base.base);
+                ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
                         elem_operand, float_out_val);
                 if (msg != nullptr) {
-                    add_error_note(ira->codegen, msg, instruction->base.source_node,
+                    add_error_note(ira->codegen, msg, instruction->base.base.source_node,
                         buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 float_out_val->type = scalar_type;
             }
             out_val->type = operand_type;
             out_val->special = ConstValSpecialStatic;
         } else {
-            if (ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
+            if (ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
                     operand_val, out_val) != nullptr)
             {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
         return result;
     }
 
-    ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base);
+    ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base.base);
 
-    IrInstruction *result = ir_build_float_op(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, operand, instruction->fn_id);
-    result->value->type = operand_type;
-    return result;
+    return ir_build_float_op_gen(ira, &instruction->base.base, operand, instruction->fn_id, operand_type);
 }
 
-static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstructionBswap *instruction) {
+static IrInstGen *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstSrcBswap *instruction) {
     Error err;
 
     ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
     if (type_is_invalid(int_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *uncasted_op = instruction->op->child;
+    IrInstGen *uncasted_op = instruction->op->child;
     if (type_is_invalid(uncasted_op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     uint32_t vector_len; // UINT32_MAX means not a vector
     if (uncasted_op->value->type->id == ZigTypeIdArray &&
@@ -28162,28 +28976,28 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
     bool is_vector = (vector_len != UINT32_MAX);
     ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;
 
-    IrInstruction *op = ir_implicit_cast(ira, uncasted_op, op_type);
+    IrInstGen *op = ir_implicit_cast(ira, uncasted_op, op_type);
     if (type_is_invalid(op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)
         return op;
 
     if (int_type->data.integral.bit_count % 8 != 0) {
-        ir_add_error(ira, instruction->op,
+        ir_add_error(ira, &instruction->op->base,
             buf_sprintf("@byteSwap integer type '%s' has %" PRIu32 " bits which is not evenly divisible by 8",
                 buf_ptr(&int_type->name), int_type->data.integral.bit_count));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (instr_is_comptime(op)) {
         ZigValue *val = ir_resolve_const(ira, op, UndefOk);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, op_type);
+            return ir_const_undef(ira, &instruction->base.base, op_type);
 
-        IrInstruction *result = ir_const(ira, &instruction->base, op_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, op_type);
         size_t buf_size = int_type->data.integral.bit_count / 8;
         uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);
         if (is_vector) {
@@ -28191,10 +29005,10 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
             result->value->data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);
             for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {
                 ZigValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];
-                if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.source_node,
+                if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.base.source_node,
                     op_elem_val, UndefOk)))
                 {
-                    return ira->codegen->invalid_instruction;
+                    return ira->codegen->invalid_inst_gen;
                 }
                 ZigValue *result_elem_val = &result->value->data.x_array.data.s_none.elements[i];
                 result_elem_val->type = int_type;
@@ -28216,23 +29030,20 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
         return result;
     }
 
-    IrInstruction *result = ir_build_bswap(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, op);
-    result->value->type = op_type;
-    return result;
+    return ir_build_bswap_gen(ira, &instruction->base.base, op_type, op);
 }
 
-static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstructionBitReverse *instruction) {
+static IrInstGen *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstSrcBitReverse *instruction) {
     ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
     if (type_is_invalid(int_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
+    IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
     if (type_is_invalid(op->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (int_type->data.integral.bit_count == 0) {
-        IrInstruction *result = ir_const(ira, &instruction->base, int_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
         bigint_init_unsigned(&result->value->data.x_bigint, 0);
         return result;
     }
@@ -28240,11 +29051,11 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
     if (instr_is_comptime(op)) {
         ZigValue *val = ir_resolve_const(ira, op, UndefOk);
         if (val == nullptr)
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (val->special == ConstValSpecialUndef)
-            return ir_const_undef(ira, &instruction->base, int_type);
+            return ir_const_undef(ira, &instruction->base.base, int_type);
 
-        IrInstruction *result = ir_const(ira, &instruction->base, int_type);
+        IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
         size_t num_bits = int_type->data.integral.bit_count;
         size_t buf_size = (num_bits + 7) / 8;
         uint8_t *comptime_buf = allocate_nonzero<uint8_t>(buf_size);
@@ -28271,128 +29082,125 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
         return result;
     }
 
-    IrInstruction *result = ir_build_bit_reverse(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, nullptr, op);
-    result->value->type = int_type;
-    return result;
+    return ir_build_bit_reverse_gen(ira, &instruction->base.base, int_type, op);
 }
 
 
-static IrInstruction *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstructionEnumToInt *instruction) {
-    IrInstruction *target = instruction->target->child;
+static IrInstGen *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstSrcEnumToInt *instruction) {
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_enum_to_int(ira, &instruction->base, target);
+    return ir_analyze_enum_to_int(ira, &instruction->base.base, target);
 }
 
-static IrInstruction *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstructionIntToEnum *instruction) {
+static IrInstGen *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstSrcIntToEnum *instruction) {
     Error err;
-    IrInstruction *dest_type_value = instruction->dest_type->child;
+    IrInstGen *dest_type_value = instruction->dest_type->child;
     ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (dest_type->id != ZigTypeIdEnum) {
-        ir_add_error(ira, instruction->dest_type,
+        ir_add_error(ira, &instruction->dest_type->base,
             buf_sprintf("expected enum, found type '%s'", buf_ptr(&dest_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *tag_type = dest_type->data.enumeration.tag_int_type;
 
-    IrInstruction *target = instruction->target->child;
+    IrInstGen *target = instruction->target->child;
     if (type_is_invalid(target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *casted_target = ir_implicit_cast(ira, target, tag_type);
+    IrInstGen *casted_target = ir_implicit_cast(ira, target, tag_type);
     if (type_is_invalid(casted_target->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_int_to_enum(ira, &instruction->base, casted_target, dest_type);
+    return ir_analyze_int_to_enum(ira, &instruction->base.base, casted_target, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstructionCheckRuntimeScope *instruction) {
-    IrInstruction *block_comptime_inst = instruction->scope_is_comptime->child;
+static IrInstGen *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstSrcCheckRuntimeScope *instruction) {
+    IrInstGen *block_comptime_inst = instruction->scope_is_comptime->child;
     bool scope_is_comptime;
     if (!ir_resolve_bool(ira, block_comptime_inst, &scope_is_comptime))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *is_comptime_inst = instruction->is_comptime->child;
+    IrInstGen *is_comptime_inst = instruction->is_comptime->child;
     bool is_comptime;
     if (!ir_resolve_bool(ira, is_comptime_inst, &is_comptime))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!scope_is_comptime && is_comptime) {
-        ErrorMsg *msg = ir_add_error(ira, &instruction->base,
+        ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
             buf_sprintf("comptime control flow inside runtime block"));
-        add_error_note(ira->codegen, msg, block_comptime_inst->source_node,
+        add_error_note(ira->codegen, msg, block_comptime_inst->base.source_node,
                 buf_sprintf("runtime block created here"));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstructionHasDecl *instruction) {
+static IrInstGen *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstSrcHasDecl *instruction) {
     ZigType *container_type = ir_resolve_type(ira, instruction->container->child);
     if (type_is_invalid(container_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     Buf *name = ir_resolve_str(ira, instruction->name->child);
     if (name == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!is_container(container_type)) {
-        ir_add_error(ira, instruction->container,
+        ir_add_error(ira, &instruction->container->base,
             buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&container_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     ScopeDecls *container_scope = get_container_scope(container_type);
     Tld *tld = find_container_decl(ira->codegen, container_scope, name);
     if (tld == nullptr)
-        return ir_const_bool(ira, &instruction->base, false);
+        return ir_const_bool(ira, &instruction->base.base, false);
 
-    if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.scope)) {
-        return ir_const_bool(ira, &instruction->base, false);
+    if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.base.scope)) {
+        return ir_const_bool(ira, &instruction->base.base, false);
     }
 
-    return ir_const_bool(ira, &instruction->base, true);
+    return ir_const_bool(ira, &instruction->base.base, true);
 }
 
-static IrInstruction *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstructionUndeclaredIdent *instruction) {
+static IrInstGen *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstSrcUndeclaredIdent *instruction) {
     // put a variable of same name with invalid type in global scope
     // so that future references to this same name will find a variable with an invalid type
-    populate_invalid_variable_in_scope(ira->codegen, instruction->base.scope, instruction->base.source_node,
-            instruction->name);
-    ir_add_error(ira, &instruction->base,
+    populate_invalid_variable_in_scope(ira->codegen, instruction->base.base.scope,
+            instruction->base.base.source_node, instruction->name);
+    ir_add_error(ira, &instruction->base.base,
             buf_sprintf("use of undeclared identifier '%s'", buf_ptr(instruction->name)));
-    return ira->codegen->invalid_instruction;
+    return ira->codegen->invalid_inst_gen;
 }
 
-static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstructionEndExpr *instruction) {
-    IrInstruction *value = instruction->value->child;
+static IrInstGen *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstSrcEndExpr *instruction) {
+    IrInstGen *value = instruction->value->child;
     if (type_is_invalid(value->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     bool was_written = instruction->result_loc->written;
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
             value->value->type, value, false, false, true);
     if (result_loc != nullptr) {
         if (type_is_invalid(result_loc->value->type))
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         if (result_loc->value->type->id == ZigTypeIdUnreachable)
             return result_loc;
 
         if (!was_written || instruction->result_loc->id == ResultLocIdPeer) {
-            IrInstruction *store_ptr = ir_analyze_store_ptr(ira, &instruction->base, result_loc, value,
+            IrInstGen *store_ptr = ir_analyze_store_ptr(ira, &instruction->base.base, result_loc, value,
                     instruction->result_loc->allow_write_through_const);
             if (type_is_invalid(store_ptr->value->type)) {
-                return ira->codegen->invalid_instruction;
+                return ira->codegen->invalid_inst_gen;
             }
         }
 
@@ -28407,33 +29215,33 @@ static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstruct
         }
     }
 
-    return ir_const_void(ira, &instruction->base);
+    return ir_const_void(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstructionImplicitCast *instruction) {
-    IrInstruction *operand = instruction->operand->child;
+static IrInstGen *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstSrcImplicitCast *instruction) {
+    IrInstGen *operand = instruction->operand->child;
     if (type_is_invalid(operand->value->type))
         return operand;
 
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base,
             &instruction->result_loc_cast->base, operand->value->type, operand, false, false, true);
-    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
+    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
         return result_loc;
 
     ZigType *dest_type = ir_resolve_type(ira, instruction->result_loc_cast->base.source_instruction->child);
     if (type_is_invalid(dest_type))
-        return ira->codegen->invalid_instruction;
-    return ir_implicit_cast2(ira, &instruction->base, operand, dest_type);
+        return ira->codegen->invalid_inst_gen;
+    return ir_implicit_cast2(ira, &instruction->base.base, operand, dest_type);
 }
 
-static IrInstruction *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstructionBitCastSrc *instruction) {
-    IrInstruction *operand = instruction->operand->child;
+static IrInstGen *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstSrcBitCast *instruction) {
+    IrInstGen *operand = instruction->operand->child;
     if (type_is_invalid(operand->value->type))
         return operand;
 
-    IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,
+    IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base,
             &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, false, true);
-    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
+    if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
         return result_loc;
 
     if (instruction->result_loc_bit_cast->parent->gen_instruction != nullptr) {
@@ -28443,70 +29251,66 @@ static IrInstruction *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInst
     return result_loc;
 }
 
-static IrInstruction *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
-        IrInstructionUnionInitNamedField *instruction)
+static IrInstGen *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
+        IrInstSrcUnionInitNamedField *instruction)
 {
     ZigType *union_type = ir_resolve_type(ira, instruction->union_type->child);
     if (type_is_invalid(union_type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (union_type->id != ZigTypeIdUnion) {
-        ir_add_error(ira, instruction->union_type,
+        ir_add_error(ira, &instruction->union_type->base,
             buf_sprintf("non-union type '%s' passed to @unionInit", buf_ptr(&union_type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
     if (field_name == nullptr)
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *field_result_loc = instruction->field_result_loc->child;
+    IrInstGen *field_result_loc = instruction->field_result_loc->child;
     if (type_is_invalid(field_result_loc->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *result_loc = instruction->result_loc->child;
+    IrInstGen *result_loc = instruction->result_loc->child;
     if (type_is_invalid(result_loc->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_analyze_union_init(ira, &instruction->base, instruction->base.source_node,
+    return ir_analyze_union_init(ira, &instruction->base.base, instruction->base.base.source_node,
             union_type, field_name, field_result_loc, result_loc);
 }
 
-static IrInstruction *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstructionSuspendBegin *instruction) {
-    IrInstructionSuspendBegin *result = ir_build_suspend_begin(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node);
-    return &result->base;
+static IrInstGen *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstSrcSuspendBegin *instruction) {
+    return ir_build_suspend_begin_gen(ira, &instruction->base.base);
 }
 
-static IrInstruction *ir_analyze_instruction_suspend_finish(IrAnalyze *ira,
-        IrInstructionSuspendFinish *instruction)
-{
-    IrInstruction *begin_base = instruction->begin->base.child;
+static IrInstGen *ir_analyze_instruction_suspend_finish(IrAnalyze *ira, IrInstSrcSuspendFinish *instruction) {
+    IrInstGen *begin_base = instruction->begin->base.child;
     if (type_is_invalid(begin_base->value->type))
-        return ira->codegen->invalid_instruction;
-    ir_assert(begin_base->id == IrInstructionIdSuspendBegin, &instruction->base);
-    IrInstructionSuspendBegin *begin = reinterpret_cast<IrInstructionSuspendBegin *>(begin_base);
+        return ira->codegen->invalid_inst_gen;
+    ir_assert(begin_base->id == IrInstGenIdSuspendBegin, &instruction->base.base);
+    IrInstGenSuspendBegin *begin = reinterpret_cast<IrInstGenSuspendBegin *>(begin_base);
 
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
-    ir_assert(fn_entry != nullptr, &instruction->base);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
+    ir_assert(fn_entry != nullptr, &instruction->base.base);
 
     if (fn_entry->inferred_async_node == nullptr) {
-        fn_entry->inferred_async_node = instruction->base.source_node;
+        fn_entry->inferred_async_node = instruction->base.base.source_node;
     }
 
-    return ir_build_suspend_finish(&ira->new_irb, instruction->base.scope, instruction->base.source_node, begin);
+    return ir_build_suspend_finish_gen(ira, &instruction->base.base, begin);
 }
 
-static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruction *source_instr,
-        IrInstruction *frame_ptr, ZigFn **target_fn)
+static IrInstGen *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInst* source_instr,
+        IrInstGen *frame_ptr, ZigFn **target_fn)
 {
     if (type_is_invalid(frame_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     *target_fn = nullptr;
 
     ZigType *result_type;
-    IrInstruction *frame;
+    IrInstGen *frame;
     if (frame_ptr->value->type->id == ZigTypeIdPointer &&
         frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
         frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
@@ -28529,38 +29333,38 @@ static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruct
         {
             ir_add_error(ira, source_instr,
                 buf_sprintf("expected anyframe->T, found '%s'", buf_ptr(&frame->value->type->name)));
-            return ira->codegen->invalid_instruction;
+            return ira->codegen->invalid_inst_gen;
         } else {
             result_type = frame->value->type->data.any_frame.result_type;
         }
     }
 
     ZigType *any_frame_type = get_any_frame_type(ira->codegen, result_type);
-    IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
+    IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
     if (type_is_invalid(casted_frame->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     return casted_frame;
 }
 
-static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstructionAwaitSrc *instruction) {
-    IrInstruction *operand = instruction->frame->child;
+static IrInstGen *ir_analyze_instruction_await(IrAnalyze *ira, IrInstSrcAwait *instruction) {
+    IrInstGen *operand = instruction->frame->child;
     if (type_is_invalid(operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     ZigFn *target_fn;
-    IrInstruction *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base, operand, &target_fn);
+    IrInstGen *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base.base, operand, &target_fn);
     if (type_is_invalid(frame->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     ZigType *result_type = frame->value->type->data.any_frame.result_type;
 
-    ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
-    ir_assert(fn_entry != nullptr, &instruction->base);
+    ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
+    ir_assert(fn_entry != nullptr, &instruction->base.base);
 
     // If it's not @Frame(func) then it's definitely a suspend point
     if (target_fn == nullptr) {
         if (fn_entry->inferred_async_node == nullptr) {
-            fn_entry->inferred_async_node = instruction->base.source_node;
+            fn_entry->inferred_async_node = instruction->base.base.source_node;
         }
     }
 
@@ -28568,401 +29372,364 @@ static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstruction
         fn_entry->calls_or_awaits_errorable_fn = true;
     }
 
-    IrInstruction *result_loc;
+    IrInstGen *result_loc;
     if (type_has_bits(result_type)) {
-        result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
+        result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
                 result_type, nullptr, true, true, true);
-        if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
+        if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
             return result_loc;
     } else {
         result_loc = nullptr;
     }
 
-    IrInstructionAwaitGen *result = ir_build_await_gen(ira, &instruction->base, frame, result_type, result_loc);
+    IrInstGenAwait *result = ir_build_await_gen(ira, &instruction->base.base, frame, result_type, result_loc);
     result->target_fn = target_fn;
     fn_entry->await_list.append(result);
     return ir_finish_anal(ira, &result->base);
 }
 
-static IrInstruction *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstructionResume *instruction) {
-    IrInstruction *frame_ptr = instruction->frame->child;
+static IrInstGen *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstSrcResume *instruction) {
+    IrInstGen *frame_ptr = instruction->frame->child;
     if (type_is_invalid(frame_ptr->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    IrInstruction *frame;
+    IrInstGen *frame;
     if (frame_ptr->value->type->id == ZigTypeIdPointer &&
         frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
         frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
     {
         frame = frame_ptr;
     } else {
-        frame = ir_get_deref(ira, &instruction->base, frame_ptr, nullptr);
+        frame = ir_get_deref(ira, &instruction->base.base, frame_ptr, nullptr);
     }
 
     ZigType *any_frame_type = get_any_frame_type(ira->codegen, nullptr);
-    IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
+    IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
     if (type_is_invalid(casted_frame->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    return ir_build_resume(&ira->new_irb, instruction->base.scope, instruction->base.source_node, casted_frame);
+    return ir_build_resume_gen(ira, &instruction->base.base, casted_frame);
 }
 
-static IrInstruction *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstructionSpillBegin *instruction) {
-    if (ir_should_inline(ira->new_irb.exec, instruction->base.scope))
-        return ir_const_void(ira, &instruction->base);
+static IrInstGen *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstSrcSpillBegin *instruction) {
+    if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope))
+        return ir_const_void(ira, &instruction->base.base);
 
-    IrInstruction *operand = instruction->operand->child;
+    IrInstGen *operand = instruction->operand->child;
     if (type_is_invalid(operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
     if (!type_has_bits(operand->value->type))
-        return ir_const_void(ira, &instruction->base);
+        return ir_const_void(ira, &instruction->base.base);
 
-    ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base);
+    ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base.base);
     ira->new_irb.exec->need_err_code_spill = true;
 
-    IrInstructionSpillBegin *result = ir_build_spill_begin(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, operand, instruction->spill_id);
-    return &result->base;
+    return ir_build_spill_begin_gen(ira, &instruction->base.base, operand, instruction->spill_id);
 }
 
-static IrInstruction *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstructionSpillEnd *instruction) {
-    IrInstruction *operand = instruction->begin->operand->child;
+static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpillEnd *instruction) {
+    IrInstGen *operand = instruction->begin->operand->child;
     if (type_is_invalid(operand->value->type))
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
 
-    if (ir_should_inline(ira->new_irb.exec, instruction->base.scope) || !type_has_bits(operand->value->type))
+    if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || !type_has_bits(operand->value->type))
         return operand;
 
-    ir_assert(instruction->begin->base.child->id == IrInstructionIdSpillBegin, &instruction->base);
-    IrInstructionSpillBegin *begin = reinterpret_cast<IrInstructionSpillBegin *>(instruction->begin->base.child);
+    ir_assert(instruction->begin->base.child->id == IrInstGenIdSpillBegin, &instruction->base.base);
+    IrInstGenSpillBegin *begin = reinterpret_cast<IrInstGenSpillBegin *>(instruction->begin->base.child);
 
-    IrInstruction *result = ir_build_spill_end(&ira->new_irb, instruction->base.scope,
-            instruction->base.source_node, begin);
-    result->value->type = operand->value->type;
-    return result;
+    return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type);
 }
 
-static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction *instruction) {
+static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) {
     switch (instruction->id) {
-        case IrInstructionIdInvalid:
-        case IrInstructionIdWidenOrShorten:
-        case IrInstructionIdStructFieldPtr:
-        case IrInstructionIdUnionFieldPtr:
-        case IrInstructionIdOptionalWrap:
-        case IrInstructionIdErrWrapCode:
-        case IrInstructionIdErrWrapPayload:
-        case IrInstructionIdCast:
-        case IrInstructionIdDeclVarGen:
-        case IrInstructionIdPtrCastGen:
-        case IrInstructionIdCmpxchgGen:
-        case IrInstructionIdArrayToVector:
-        case IrInstructionIdVectorToArray:
-        case IrInstructionIdPtrOfArrayToSlice:
-        case IrInstructionIdAssertZero:
-        case IrInstructionIdAssertNonNull:
-        case IrInstructionIdResizeSlice:
-        case IrInstructionIdLoadPtrGen:
-        case IrInstructionIdBitCastGen:
-        case IrInstructionIdCallGen:
-        case IrInstructionIdReturnPtr:
-        case IrInstructionIdAllocaGen:
-        case IrInstructionIdSliceGen:
-        case IrInstructionIdRefGen:
-        case IrInstructionIdTestErrGen:
-        case IrInstructionIdFrameSizeGen:
-        case IrInstructionIdAwaitGen:
-        case IrInstructionIdSplatGen:
-        case IrInstructionIdVectorExtractElem:
-        case IrInstructionIdVectorStoreElem:
-        case IrInstructionIdAsmGen:
+        case IrInstSrcIdInvalid:
             zig_unreachable();
 
-        case IrInstructionIdReturn:
-            return ir_analyze_instruction_return(ira, (IrInstructionReturn *)instruction);
-        case IrInstructionIdConst:
-            return ir_analyze_instruction_const(ira, (IrInstructionConst *)instruction);
-        case IrInstructionIdUnOp:
-            return ir_analyze_instruction_un_op(ira, (IrInstructionUnOp *)instruction);
-        case IrInstructionIdBinOp:
-            return ir_analyze_instruction_bin_op(ira, (IrInstructionBinOp *)instruction);
-        case IrInstructionIdMergeErrSets:
-            return ir_analyze_instruction_merge_err_sets(ira, (IrInstructionMergeErrSets *)instruction);
-        case IrInstructionIdDeclVarSrc:
-            return ir_analyze_instruction_decl_var(ira, (IrInstructionDeclVarSrc *)instruction);
-        case IrInstructionIdLoadPtr:
-            return ir_analyze_instruction_load_ptr(ira, (IrInstructionLoadPtr *)instruction);
-        case IrInstructionIdStorePtr:
-            return ir_analyze_instruction_store_ptr(ira, (IrInstructionStorePtr *)instruction);
-        case IrInstructionIdElemPtr:
-            return ir_analyze_instruction_elem_ptr(ira, (IrInstructionElemPtr *)instruction);
-        case IrInstructionIdVarPtr:
-            return ir_analyze_instruction_var_ptr(ira, (IrInstructionVarPtr *)instruction);
-        case IrInstructionIdFieldPtr:
-            return ir_analyze_instruction_field_ptr(ira, (IrInstructionFieldPtr *)instruction);
-        case IrInstructionIdCallSrc:
-            return ir_analyze_instruction_call(ira, (IrInstructionCallSrc *)instruction);
-        case IrInstructionIdCallSrcArgs:
-            return ir_analyze_instruction_call_args(ira, (IrInstructionCallSrcArgs *)instruction);
-        case IrInstructionIdCallExtra:
-            return ir_analyze_instruction_call_extra(ira, (IrInstructionCallExtra *)instruction);
-        case IrInstructionIdBr:
-            return ir_analyze_instruction_br(ira, (IrInstructionBr *)instruction);
-        case IrInstructionIdCondBr:
-            return ir_analyze_instruction_cond_br(ira, (IrInstructionCondBr *)instruction);
-        case IrInstructionIdUnreachable:
-            return ir_analyze_instruction_unreachable(ira, (IrInstructionUnreachable *)instruction);
-        case IrInstructionIdPhi:
-            return ir_analyze_instruction_phi(ira, (IrInstructionPhi *)instruction);
-        case IrInstructionIdTypeOf:
-            return ir_analyze_instruction_typeof(ira, (IrInstructionTypeOf *)instruction);
-        case IrInstructionIdSetCold:
-            return ir_analyze_instruction_set_cold(ira, (IrInstructionSetCold *)instruction);
-        case IrInstructionIdSetRuntimeSafety:
-            return ir_analyze_instruction_set_runtime_safety(ira, (IrInstructionSetRuntimeSafety *)instruction);
-        case IrInstructionIdSetFloatMode:
-            return ir_analyze_instruction_set_float_mode(ira, (IrInstructionSetFloatMode *)instruction);
-        case IrInstructionIdAnyFrameType:
-            return ir_analyze_instruction_any_frame_type(ira, (IrInstructionAnyFrameType *)instruction);
-        case IrInstructionIdSliceType:
-            return ir_analyze_instruction_slice_type(ira, (IrInstructionSliceType *)instruction);
-        case IrInstructionIdAsmSrc:
-            return ir_analyze_instruction_asm(ira, (IrInstructionAsmSrc *)instruction);
-        case IrInstructionIdArrayType:
-            return ir_analyze_instruction_array_type(ira, (IrInstructionArrayType *)instruction);
-        case IrInstructionIdSizeOf:
-            return ir_analyze_instruction_size_of(ira, (IrInstructionSizeOf *)instruction);
-        case IrInstructionIdTestNonNull:
-            return ir_analyze_instruction_test_non_null(ira, (IrInstructionTestNonNull *)instruction);
-        case IrInstructionIdOptionalUnwrapPtr:
-            return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstructionOptionalUnwrapPtr *)instruction);
-        case IrInstructionIdClz:
-            return ir_analyze_instruction_clz(ira, (IrInstructionClz *)instruction);
-        case IrInstructionIdCtz:
-            return ir_analyze_instruction_ctz(ira, (IrInstructionCtz *)instruction);
-        case IrInstructionIdPopCount:
-            return ir_analyze_instruction_pop_count(ira, (IrInstructionPopCount *)instruction);
-        case IrInstructionIdBswap:
-            return ir_analyze_instruction_bswap(ira, (IrInstructionBswap *)instruction);
-        case IrInstructionIdBitReverse:
-            return ir_analyze_instruction_bit_reverse(ira, (IrInstructionBitReverse *)instruction);
-        case IrInstructionIdSwitchBr:
-            return ir_analyze_instruction_switch_br(ira, (IrInstructionSwitchBr *)instruction);
-        case IrInstructionIdSwitchTarget:
-            return ir_analyze_instruction_switch_target(ira, (IrInstructionSwitchTarget *)instruction);
-        case IrInstructionIdSwitchVar:
-            return ir_analyze_instruction_switch_var(ira, (IrInstructionSwitchVar *)instruction);
-        case IrInstructionIdSwitchElseVar:
-            return ir_analyze_instruction_switch_else_var(ira, (IrInstructionSwitchElseVar *)instruction);
-        case IrInstructionIdUnionTag:
-            return ir_analyze_instruction_union_tag(ira, (IrInstructionUnionTag *)instruction);
-        case IrInstructionIdImport:
-            return ir_analyze_instruction_import(ira, (IrInstructionImport *)instruction);
-        case IrInstructionIdRef:
-            return ir_analyze_instruction_ref(ira, (IrInstructionRef *)instruction);
-        case IrInstructionIdContainerInitList:
-            return ir_analyze_instruction_container_init_list(ira, (IrInstructionContainerInitList *)instruction);
-        case IrInstructionIdContainerInitFields:
-            return ir_analyze_instruction_container_init_fields(ira, (IrInstructionContainerInitFields *)instruction);
-        case IrInstructionIdCompileErr:
-            return ir_analyze_instruction_compile_err(ira, (IrInstructionCompileErr *)instruction);
-        case IrInstructionIdCompileLog:
-            return ir_analyze_instruction_compile_log(ira, (IrInstructionCompileLog *)instruction);
-        case IrInstructionIdErrName:
-            return ir_analyze_instruction_err_name(ira, (IrInstructionErrName *)instruction);
-        case IrInstructionIdTypeName:
-            return ir_analyze_instruction_type_name(ira, (IrInstructionTypeName *)instruction);
-        case IrInstructionIdCImport:
-            return ir_analyze_instruction_c_import(ira, (IrInstructionCImport *)instruction);
-        case IrInstructionIdCInclude:
-            return ir_analyze_instruction_c_include(ira, (IrInstructionCInclude *)instruction);
-        case IrInstructionIdCDefine:
-            return ir_analyze_instruction_c_define(ira, (IrInstructionCDefine *)instruction);
-        case IrInstructionIdCUndef:
-            return ir_analyze_instruction_c_undef(ira, (IrInstructionCUndef *)instruction);
-        case IrInstructionIdEmbedFile:
-            return ir_analyze_instruction_embed_file(ira, (IrInstructionEmbedFile *)instruction);
-        case IrInstructionIdCmpxchgSrc:
-            return ir_analyze_instruction_cmpxchg(ira, (IrInstructionCmpxchgSrc *)instruction);
-        case IrInstructionIdFence:
-            return ir_analyze_instruction_fence(ira, (IrInstructionFence *)instruction);
-        case IrInstructionIdTruncate:
-            return ir_analyze_instruction_truncate(ira, (IrInstructionTruncate *)instruction);
-        case IrInstructionIdIntCast:
-            return ir_analyze_instruction_int_cast(ira, (IrInstructionIntCast *)instruction);
-        case IrInstructionIdFloatCast:
-            return ir_analyze_instruction_float_cast(ira, (IrInstructionFloatCast *)instruction);
-        case IrInstructionIdErrSetCast:
-            return ir_analyze_instruction_err_set_cast(ira, (IrInstructionErrSetCast *)instruction);
-        case IrInstructionIdFromBytes:
-            return ir_analyze_instruction_from_bytes(ira, (IrInstructionFromBytes *)instruction);
-        case IrInstructionIdToBytes:
-            return ir_analyze_instruction_to_bytes(ira, (IrInstructionToBytes *)instruction);
-        case IrInstructionIdIntToFloat:
-            return ir_analyze_instruction_int_to_float(ira, (IrInstructionIntToFloat *)instruction);
-        case IrInstructionIdFloatToInt:
-            return ir_analyze_instruction_float_to_int(ira, (IrInstructionFloatToInt *)instruction);
-        case IrInstructionIdBoolToInt:
-            return ir_analyze_instruction_bool_to_int(ira, (IrInstructionBoolToInt *)instruction);
-        case IrInstructionIdIntType:
-            return ir_analyze_instruction_int_type(ira, (IrInstructionIntType *)instruction);
-        case IrInstructionIdVectorType:
-            return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);
-        case IrInstructionIdShuffleVector:
-            return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);
-         case IrInstructionIdSplatSrc:
-            return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);
-        case IrInstructionIdBoolNot:
-            return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);
-        case IrInstructionIdMemset:
-            return ir_analyze_instruction_memset(ira, (IrInstructionMemset *)instruction);
-        case IrInstructionIdMemcpy:
-            return ir_analyze_instruction_memcpy(ira, (IrInstructionMemcpy *)instruction);
-        case IrInstructionIdSliceSrc:
-            return ir_analyze_instruction_slice(ira, (IrInstructionSliceSrc *)instruction);
-        case IrInstructionIdMemberCount:
-            return ir_analyze_instruction_member_count(ira, (IrInstructionMemberCount *)instruction);
-        case IrInstructionIdMemberType:
-            return ir_analyze_instruction_member_type(ira, (IrInstructionMemberType *)instruction);
-        case IrInstructionIdMemberName:
-            return ir_analyze_instruction_member_name(ira, (IrInstructionMemberName *)instruction);
-        case IrInstructionIdBreakpoint:
-            return ir_analyze_instruction_breakpoint(ira, (IrInstructionBreakpoint *)instruction);
-        case IrInstructionIdReturnAddress:
-            return ir_analyze_instruction_return_address(ira, (IrInstructionReturnAddress *)instruction);
-        case IrInstructionIdFrameAddress:
-            return ir_analyze_instruction_frame_address(ira, (IrInstructionFrameAddress *)instruction);
-        case IrInstructionIdFrameHandle:
-            return ir_analyze_instruction_frame_handle(ira, (IrInstructionFrameHandle *)instruction);
-        case IrInstructionIdFrameType:
-            return ir_analyze_instruction_frame_type(ira, (IrInstructionFrameType *)instruction);
-        case IrInstructionIdFrameSizeSrc:
-            return ir_analyze_instruction_frame_size(ira, (IrInstructionFrameSizeSrc *)instruction);
-        case IrInstructionIdAlignOf:
-            return ir_analyze_instruction_align_of(ira, (IrInstructionAlignOf *)instruction);
-        case IrInstructionIdOverflowOp:
-            return ir_analyze_instruction_overflow_op(ira, (IrInstructionOverflowOp *)instruction);
-        case IrInstructionIdTestErrSrc:
-            return ir_analyze_instruction_test_err(ira, (IrInstructionTestErrSrc *)instruction);
-        case IrInstructionIdUnwrapErrCode:
-            return ir_analyze_instruction_unwrap_err_code(ira, (IrInstructionUnwrapErrCode *)instruction);
-        case IrInstructionIdUnwrapErrPayload:
-            return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstructionUnwrapErrPayload *)instruction);
-        case IrInstructionIdFnProto:
-            return ir_analyze_instruction_fn_proto(ira, (IrInstructionFnProto *)instruction);
-        case IrInstructionIdTestComptime:
-            return ir_analyze_instruction_test_comptime(ira, (IrInstructionTestComptime *)instruction);
-        case IrInstructionIdCheckSwitchProngs:
-            return ir_analyze_instruction_check_switch_prongs(ira, (IrInstructionCheckSwitchProngs *)instruction);
-        case IrInstructionIdCheckStatementIsVoid:
-            return ir_analyze_instruction_check_statement_is_void(ira, (IrInstructionCheckStatementIsVoid *)instruction);
-        case IrInstructionIdDeclRef:
-            return ir_analyze_instruction_decl_ref(ira, (IrInstructionDeclRef *)instruction);
-        case IrInstructionIdPanic:
-            return ir_analyze_instruction_panic(ira, (IrInstructionPanic *)instruction);
-        case IrInstructionIdPtrCastSrc:
-            return ir_analyze_instruction_ptr_cast(ira, (IrInstructionPtrCastSrc *)instruction);
-        case IrInstructionIdIntToPtr:
-            return ir_analyze_instruction_int_to_ptr(ira, (IrInstructionIntToPtr *)instruction);
-        case IrInstructionIdPtrToInt:
-            return ir_analyze_instruction_ptr_to_int(ira, (IrInstructionPtrToInt *)instruction);
-        case IrInstructionIdTagName:
-            return ir_analyze_instruction_enum_tag_name(ira, (IrInstructionTagName *)instruction);
-        case IrInstructionIdFieldParentPtr:
-            return ir_analyze_instruction_field_parent_ptr(ira, (IrInstructionFieldParentPtr *)instruction);
-        case IrInstructionIdByteOffsetOf:
-            return ir_analyze_instruction_byte_offset_of(ira, (IrInstructionByteOffsetOf *)instruction);
-        case IrInstructionIdBitOffsetOf:
-            return ir_analyze_instruction_bit_offset_of(ira, (IrInstructionBitOffsetOf *)instruction);
-        case IrInstructionIdTypeInfo:
-            return ir_analyze_instruction_type_info(ira, (IrInstructionTypeInfo *) instruction);
-        case IrInstructionIdType:
-            return ir_analyze_instruction_type(ira, (IrInstructionType *)instruction);
-        case IrInstructionIdHasField:
-            return ir_analyze_instruction_has_field(ira, (IrInstructionHasField *) instruction);
-        case IrInstructionIdTypeId:
-            return ir_analyze_instruction_type_id(ira, (IrInstructionTypeId *)instruction);
-        case IrInstructionIdSetEvalBranchQuota:
-            return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstructionSetEvalBranchQuota *)instruction);
-        case IrInstructionIdPtrType:
-            return ir_analyze_instruction_ptr_type(ira, (IrInstructionPtrType *)instruction);
-        case IrInstructionIdAlignCast:
-            return ir_analyze_instruction_align_cast(ira, (IrInstructionAlignCast *)instruction);
-        case IrInstructionIdImplicitCast:
-            return ir_analyze_instruction_implicit_cast(ira, (IrInstructionImplicitCast *)instruction);
-        case IrInstructionIdResolveResult:
-            return ir_analyze_instruction_resolve_result(ira, (IrInstructionResolveResult *)instruction);
-        case IrInstructionIdResetResult:
-            return ir_analyze_instruction_reset_result(ira, (IrInstructionResetResult *)instruction);
-        case IrInstructionIdOpaqueType:
-            return ir_analyze_instruction_opaque_type(ira, (IrInstructionOpaqueType *)instruction);
-        case IrInstructionIdSetAlignStack:
-            return ir_analyze_instruction_set_align_stack(ira, (IrInstructionSetAlignStack *)instruction);
-        case IrInstructionIdArgType:
-            return ir_analyze_instruction_arg_type(ira, (IrInstructionArgType *)instruction);
-        case IrInstructionIdTagType:
-            return ir_analyze_instruction_tag_type(ira, (IrInstructionTagType *)instruction);
-        case IrInstructionIdExport:
-            return ir_analyze_instruction_export(ira, (IrInstructionExport *)instruction);
-        case IrInstructionIdErrorReturnTrace:
-            return ir_analyze_instruction_error_return_trace(ira, (IrInstructionErrorReturnTrace *)instruction);
-        case IrInstructionIdErrorUnion:
-            return ir_analyze_instruction_error_union(ira, (IrInstructionErrorUnion *)instruction);
-        case IrInstructionIdAtomicRmw:
-            return ir_analyze_instruction_atomic_rmw(ira, (IrInstructionAtomicRmw *)instruction);
-        case IrInstructionIdAtomicLoad:
-            return ir_analyze_instruction_atomic_load(ira, (IrInstructionAtomicLoad *)instruction);
-        case IrInstructionIdAtomicStore:
-            return ir_analyze_instruction_atomic_store(ira, (IrInstructionAtomicStore *)instruction);
-        case IrInstructionIdSaveErrRetAddr:
-            return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstructionSaveErrRetAddr *)instruction);
-        case IrInstructionIdAddImplicitReturnType:
-            return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstructionAddImplicitReturnType *)instruction);
-        case IrInstructionIdFloatOp:
-            return ir_analyze_instruction_float_op(ira, (IrInstructionFloatOp *)instruction);
-        case IrInstructionIdMulAdd:
-            return ir_analyze_instruction_mul_add(ira, (IrInstructionMulAdd *)instruction);
-        case IrInstructionIdIntToErr:
-            return ir_analyze_instruction_int_to_err(ira, (IrInstructionIntToErr *)instruction);
-        case IrInstructionIdErrToInt:
-            return ir_analyze_instruction_err_to_int(ira, (IrInstructionErrToInt *)instruction);
-        case IrInstructionIdIntToEnum:
-            return ir_analyze_instruction_int_to_enum(ira, (IrInstructionIntToEnum *)instruction);
-        case IrInstructionIdEnumToInt:
-            return ir_analyze_instruction_enum_to_int(ira, (IrInstructionEnumToInt *)instruction);
-        case IrInstructionIdCheckRuntimeScope:
-            return ir_analyze_instruction_check_runtime_scope(ira, (IrInstructionCheckRuntimeScope *)instruction);
-        case IrInstructionIdHasDecl:
-            return ir_analyze_instruction_has_decl(ira, (IrInstructionHasDecl *)instruction);
-        case IrInstructionIdUndeclaredIdent:
-            return ir_analyze_instruction_undeclared_ident(ira, (IrInstructionUndeclaredIdent *)instruction);
-        case IrInstructionIdAllocaSrc:
+        case IrInstSrcIdReturn:
+            return ir_analyze_instruction_return(ira, (IrInstSrcReturn *)instruction);
+        case IrInstSrcIdConst:
+            return ir_analyze_instruction_const(ira, (IrInstSrcConst *)instruction);
+        case IrInstSrcIdUnOp:
+            return ir_analyze_instruction_un_op(ira, (IrInstSrcUnOp *)instruction);
+        case IrInstSrcIdBinOp:
+            return ir_analyze_instruction_bin_op(ira, (IrInstSrcBinOp *)instruction);
+        case IrInstSrcIdMergeErrSets:
+            return ir_analyze_instruction_merge_err_sets(ira, (IrInstSrcMergeErrSets *)instruction);
+        case IrInstSrcIdDeclVar:
+            return ir_analyze_instruction_decl_var(ira, (IrInstSrcDeclVar *)instruction);
+        case IrInstSrcIdLoadPtr:
+            return ir_analyze_instruction_load_ptr(ira, (IrInstSrcLoadPtr *)instruction);
+        case IrInstSrcIdStorePtr:
+            return ir_analyze_instruction_store_ptr(ira, (IrInstSrcStorePtr *)instruction);
+        case IrInstSrcIdElemPtr:
+            return ir_analyze_instruction_elem_ptr(ira, (IrInstSrcElemPtr *)instruction);
+        case IrInstSrcIdVarPtr:
+            return ir_analyze_instruction_var_ptr(ira, (IrInstSrcVarPtr *)instruction);
+        case IrInstSrcIdFieldPtr:
+            return ir_analyze_instruction_field_ptr(ira, (IrInstSrcFieldPtr *)instruction);
+        case IrInstSrcIdCall:
+            return ir_analyze_instruction_call(ira, (IrInstSrcCall *)instruction);
+        case IrInstSrcIdCallArgs:
+            return ir_analyze_instruction_call_args(ira, (IrInstSrcCallArgs *)instruction);
+        case IrInstSrcIdCallExtra:
+            return ir_analyze_instruction_call_extra(ira, (IrInstSrcCallExtra *)instruction);
+        case IrInstSrcIdBr:
+            return ir_analyze_instruction_br(ira, (IrInstSrcBr *)instruction);
+        case IrInstSrcIdCondBr:
+            return ir_analyze_instruction_cond_br(ira, (IrInstSrcCondBr *)instruction);
+        case IrInstSrcIdUnreachable:
+            return ir_analyze_instruction_unreachable(ira, (IrInstSrcUnreachable *)instruction);
+        case IrInstSrcIdPhi:
+            return ir_analyze_instruction_phi(ira, (IrInstSrcPhi *)instruction);
+        case IrInstSrcIdTypeOf:
+            return ir_analyze_instruction_typeof(ira, (IrInstSrcTypeOf *)instruction);
+        case IrInstSrcIdSetCold:
+            return ir_analyze_instruction_set_cold(ira, (IrInstSrcSetCold *)instruction);
+        case IrInstSrcIdSetRuntimeSafety:
+            return ir_analyze_instruction_set_runtime_safety(ira, (IrInstSrcSetRuntimeSafety *)instruction);
+        case IrInstSrcIdSetFloatMode:
+            return ir_analyze_instruction_set_float_mode(ira, (IrInstSrcSetFloatMode *)instruction);
+        case IrInstSrcIdAnyFrameType:
+            return ir_analyze_instruction_any_frame_type(ira, (IrInstSrcAnyFrameType *)instruction);
+        case IrInstSrcIdSliceType:
+            return ir_analyze_instruction_slice_type(ira, (IrInstSrcSliceType *)instruction);
+        case IrInstSrcIdAsm:
+            return ir_analyze_instruction_asm(ira, (IrInstSrcAsm *)instruction);
+        case IrInstSrcIdArrayType:
+            return ir_analyze_instruction_array_type(ira, (IrInstSrcArrayType *)instruction);
+        case IrInstSrcIdSizeOf:
+            return ir_analyze_instruction_size_of(ira, (IrInstSrcSizeOf *)instruction);
+        case IrInstSrcIdTestNonNull:
+            return ir_analyze_instruction_test_non_null(ira, (IrInstSrcTestNonNull *)instruction);
+        case IrInstSrcIdOptionalUnwrapPtr:
+            return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstSrcOptionalUnwrapPtr *)instruction);
+        case IrInstSrcIdClz:
+            return ir_analyze_instruction_clz(ira, (IrInstSrcClz *)instruction);
+        case IrInstSrcIdCtz:
+            return ir_analyze_instruction_ctz(ira, (IrInstSrcCtz *)instruction);
+        case IrInstSrcIdPopCount:
+            return ir_analyze_instruction_pop_count(ira, (IrInstSrcPopCount *)instruction);
+        case IrInstSrcIdBswap:
+            return ir_analyze_instruction_bswap(ira, (IrInstSrcBswap *)instruction);
+        case IrInstSrcIdBitReverse:
+            return ir_analyze_instruction_bit_reverse(ira, (IrInstSrcBitReverse *)instruction);
+        case IrInstSrcIdSwitchBr:
+            return ir_analyze_instruction_switch_br(ira, (IrInstSrcSwitchBr *)instruction);
+        case IrInstSrcIdSwitchTarget:
+            return ir_analyze_instruction_switch_target(ira, (IrInstSrcSwitchTarget *)instruction);
+        case IrInstSrcIdSwitchVar:
+            return ir_analyze_instruction_switch_var(ira, (IrInstSrcSwitchVar *)instruction);
+        case IrInstSrcIdSwitchElseVar:
+            return ir_analyze_instruction_switch_else_var(ira, (IrInstSrcSwitchElseVar *)instruction);
+        case IrInstSrcIdImport:
+            return ir_analyze_instruction_import(ira, (IrInstSrcImport *)instruction);
+        case IrInstSrcIdRef:
+            return ir_analyze_instruction_ref(ira, (IrInstSrcRef *)instruction);
+        case IrInstSrcIdContainerInitList:
+            return ir_analyze_instruction_container_init_list(ira, (IrInstSrcContainerInitList *)instruction);
+        case IrInstSrcIdContainerInitFields:
+            return ir_analyze_instruction_container_init_fields(ira, (IrInstSrcContainerInitFields *)instruction);
+        case IrInstSrcIdCompileErr:
+            return ir_analyze_instruction_compile_err(ira, (IrInstSrcCompileErr *)instruction);
+        case IrInstSrcIdCompileLog:
+            return ir_analyze_instruction_compile_log(ira, (IrInstSrcCompileLog *)instruction);
+        case IrInstSrcIdErrName:
+            return ir_analyze_instruction_err_name(ira, (IrInstSrcErrName *)instruction);
+        case IrInstSrcIdTypeName:
+            return ir_analyze_instruction_type_name(ira, (IrInstSrcTypeName *)instruction);
+        case IrInstSrcIdCImport:
+            return ir_analyze_instruction_c_import(ira, (IrInstSrcCImport *)instruction);
+        case IrInstSrcIdCInclude:
+            return ir_analyze_instruction_c_include(ira, (IrInstSrcCInclude *)instruction);
+        case IrInstSrcIdCDefine:
+            return ir_analyze_instruction_c_define(ira, (IrInstSrcCDefine *)instruction);
+        case IrInstSrcIdCUndef:
+            return ir_analyze_instruction_c_undef(ira, (IrInstSrcCUndef *)instruction);
+        case IrInstSrcIdEmbedFile:
+            return ir_analyze_instruction_embed_file(ira, (IrInstSrcEmbedFile *)instruction);
+        case IrInstSrcIdCmpxchg:
+            return ir_analyze_instruction_cmpxchg(ira, (IrInstSrcCmpxchg *)instruction);
+        case IrInstSrcIdFence:
+            return ir_analyze_instruction_fence(ira, (IrInstSrcFence *)instruction);
+        case IrInstSrcIdTruncate:
+            return ir_analyze_instruction_truncate(ira, (IrInstSrcTruncate *)instruction);
+        case IrInstSrcIdIntCast:
+            return ir_analyze_instruction_int_cast(ira, (IrInstSrcIntCast *)instruction);
+        case IrInstSrcIdFloatCast:
+            return ir_analyze_instruction_float_cast(ira, (IrInstSrcFloatCast *)instruction);
+        case IrInstSrcIdErrSetCast:
+            return ir_analyze_instruction_err_set_cast(ira, (IrInstSrcErrSetCast *)instruction);
+        case IrInstSrcIdFromBytes:
+            return ir_analyze_instruction_from_bytes(ira, (IrInstSrcFromBytes *)instruction);
+        case IrInstSrcIdToBytes:
+            return ir_analyze_instruction_to_bytes(ira, (IrInstSrcToBytes *)instruction);
+        case IrInstSrcIdIntToFloat:
+            return ir_analyze_instruction_int_to_float(ira, (IrInstSrcIntToFloat *)instruction);
+        case IrInstSrcIdFloatToInt:
+            return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
+        case IrInstSrcIdBoolToInt:
+            return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
+        case IrInstSrcIdIntType:
+            return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
+        case IrInstSrcIdVectorType:
+            return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
+        case IrInstSrcIdShuffleVector:
+            return ir_analyze_instruction_shuffle_vector(ira, (IrInstSrcShuffleVector *)instruction);
+         case IrInstSrcIdSplat:
+            return ir_analyze_instruction_splat(ira, (IrInstSrcSplat *)instruction);
+        case IrInstSrcIdBoolNot:
+            return ir_analyze_instruction_bool_not(ira, (IrInstSrcBoolNot *)instruction);
+        case IrInstSrcIdMemset:
+            return ir_analyze_instruction_memset(ira, (IrInstSrcMemset *)instruction);
+        case IrInstSrcIdMemcpy:
+            return ir_analyze_instruction_memcpy(ira, (IrInstSrcMemcpy *)instruction);
+        case IrInstSrcIdSlice:
+            return ir_analyze_instruction_slice(ira, (IrInstSrcSlice *)instruction);
+        case IrInstSrcIdMemberCount:
+            return ir_analyze_instruction_member_count(ira, (IrInstSrcMemberCount *)instruction);
+        case IrInstSrcIdMemberType:
+            return ir_analyze_instruction_member_type(ira, (IrInstSrcMemberType *)instruction);
+        case IrInstSrcIdMemberName:
+            return ir_analyze_instruction_member_name(ira, (IrInstSrcMemberName *)instruction);
+        case IrInstSrcIdBreakpoint:
+            return ir_analyze_instruction_breakpoint(ira, (IrInstSrcBreakpoint *)instruction);
+        case IrInstSrcIdReturnAddress:
+            return ir_analyze_instruction_return_address(ira, (IrInstSrcReturnAddress *)instruction);
+        case IrInstSrcIdFrameAddress:
+            return ir_analyze_instruction_frame_address(ira, (IrInstSrcFrameAddress *)instruction);
+        case IrInstSrcIdFrameHandle:
+            return ir_analyze_instruction_frame_handle(ira, (IrInstSrcFrameHandle *)instruction);
+        case IrInstSrcIdFrameType:
+            return ir_analyze_instruction_frame_type(ira, (IrInstSrcFrameType *)instruction);
+        case IrInstSrcIdFrameSize:
+            return ir_analyze_instruction_frame_size(ira, (IrInstSrcFrameSize *)instruction);
+        case IrInstSrcIdAlignOf:
+            return ir_analyze_instruction_align_of(ira, (IrInstSrcAlignOf *)instruction);
+        case IrInstSrcIdOverflowOp:
+            return ir_analyze_instruction_overflow_op(ira, (IrInstSrcOverflowOp *)instruction);
+        case IrInstSrcIdTestErr:
+            return ir_analyze_instruction_test_err(ira, (IrInstSrcTestErr *)instruction);
+        case IrInstSrcIdUnwrapErrCode:
+            return ir_analyze_instruction_unwrap_err_code(ira, (IrInstSrcUnwrapErrCode *)instruction);
+        case IrInstSrcIdUnwrapErrPayload:
+            return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstSrcUnwrapErrPayload *)instruction);
+        case IrInstSrcIdFnProto:
+            return ir_analyze_instruction_fn_proto(ira, (IrInstSrcFnProto *)instruction);
+        case IrInstSrcIdTestComptime:
+            return ir_analyze_instruction_test_comptime(ira, (IrInstSrcTestComptime *)instruction);
+        case IrInstSrcIdCheckSwitchProngs:
+            return ir_analyze_instruction_check_switch_prongs(ira, (IrInstSrcCheckSwitchProngs *)instruction);
+        case IrInstSrcIdCheckStatementIsVoid:
+            return ir_analyze_instruction_check_statement_is_void(ira, (IrInstSrcCheckStatementIsVoid *)instruction);
+        case IrInstSrcIdDeclRef:
+            return ir_analyze_instruction_decl_ref(ira, (IrInstSrcDeclRef *)instruction);
+        case IrInstSrcIdPanic:
+            return ir_analyze_instruction_panic(ira, (IrInstSrcPanic *)instruction);
+        case IrInstSrcIdPtrCast:
+            return ir_analyze_instruction_ptr_cast(ira, (IrInstSrcPtrCast *)instruction);
+        case IrInstSrcIdIntToPtr:
+            return ir_analyze_instruction_int_to_ptr(ira, (IrInstSrcIntToPtr *)instruction);
+        case IrInstSrcIdPtrToInt:
+            return ir_analyze_instruction_ptr_to_int(ira, (IrInstSrcPtrToInt *)instruction);
+        case IrInstSrcIdTagName:
+            return ir_analyze_instruction_enum_tag_name(ira, (IrInstSrcTagName *)instruction);
+        case IrInstSrcIdFieldParentPtr:
+            return ir_analyze_instruction_field_parent_ptr(ira, (IrInstSrcFieldParentPtr *)instruction);
+        case IrInstSrcIdByteOffsetOf:
+            return ir_analyze_instruction_byte_offset_of(ira, (IrInstSrcByteOffsetOf *)instruction);
+        case IrInstSrcIdBitOffsetOf:
+            return ir_analyze_instruction_bit_offset_of(ira, (IrInstSrcBitOffsetOf *)instruction);
+        case IrInstSrcIdTypeInfo:
+            return ir_analyze_instruction_type_info(ira, (IrInstSrcTypeInfo *) instruction);
+        case IrInstSrcIdType:
+            return ir_analyze_instruction_type(ira, (IrInstSrcType *)instruction);
+        case IrInstSrcIdHasField:
+            return ir_analyze_instruction_has_field(ira, (IrInstSrcHasField *) instruction);
+        case IrInstSrcIdTypeId:
+            return ir_analyze_instruction_type_id(ira, (IrInstSrcTypeId *)instruction);
+        case IrInstSrcIdSetEvalBranchQuota:
+            return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstSrcSetEvalBranchQuota *)instruction);
+        case IrInstSrcIdPtrType:
+            return ir_analyze_instruction_ptr_type(ira, (IrInstSrcPtrType *)instruction);
+        case IrInstSrcIdAlignCast:
+            return ir_analyze_instruction_align_cast(ira, (IrInstSrcAlignCast *)instruction);
+        case IrInstSrcIdImplicitCast:
+            return ir_analyze_instruction_implicit_cast(ira, (IrInstSrcImplicitCast *)instruction);
+        case IrInstSrcIdResolveResult:
+            return ir_analyze_instruction_resolve_result(ira, (IrInstSrcResolveResult *)instruction);
+        case IrInstSrcIdResetResult:
+            return ir_analyze_instruction_reset_result(ira, (IrInstSrcResetResult *)instruction);
+        case IrInstSrcIdOpaqueType:
+            return ir_analyze_instruction_opaque_type(ira, (IrInstSrcOpaqueType *)instruction);
+        case IrInstSrcIdSetAlignStack:
+            return ir_analyze_instruction_set_align_stack(ira, (IrInstSrcSetAlignStack *)instruction);
+        case IrInstSrcIdArgType:
+            return ir_analyze_instruction_arg_type(ira, (IrInstSrcArgType *)instruction);
+        case IrInstSrcIdTagType:
+            return ir_analyze_instruction_tag_type(ira, (IrInstSrcTagType *)instruction);
+        case IrInstSrcIdExport:
+            return ir_analyze_instruction_export(ira, (IrInstSrcExport *)instruction);
+        case IrInstSrcIdErrorReturnTrace:
+            return ir_analyze_instruction_error_return_trace(ira, (IrInstSrcErrorReturnTrace *)instruction);
+        case IrInstSrcIdErrorUnion:
+            return ir_analyze_instruction_error_union(ira, (IrInstSrcErrorUnion *)instruction);
+        case IrInstSrcIdAtomicRmw:
+            return ir_analyze_instruction_atomic_rmw(ira, (IrInstSrcAtomicRmw *)instruction);
+        case IrInstSrcIdAtomicLoad:
+            return ir_analyze_instruction_atomic_load(ira, (IrInstSrcAtomicLoad *)instruction);
+        case IrInstSrcIdAtomicStore:
+            return ir_analyze_instruction_atomic_store(ira, (IrInstSrcAtomicStore *)instruction);
+        case IrInstSrcIdSaveErrRetAddr:
+            return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstSrcSaveErrRetAddr *)instruction);
+        case IrInstSrcIdAddImplicitReturnType:
+            return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstSrcAddImplicitReturnType *)instruction);
+        case IrInstSrcIdFloatOp:
+            return ir_analyze_instruction_float_op(ira, (IrInstSrcFloatOp *)instruction);
+        case IrInstSrcIdMulAdd:
+            return ir_analyze_instruction_mul_add(ira, (IrInstSrcMulAdd *)instruction);
+        case IrInstSrcIdIntToErr:
+            return ir_analyze_instruction_int_to_err(ira, (IrInstSrcIntToErr *)instruction);
+        case IrInstSrcIdErrToInt:
+            return ir_analyze_instruction_err_to_int(ira, (IrInstSrcErrToInt *)instruction);
+        case IrInstSrcIdIntToEnum:
+            return ir_analyze_instruction_int_to_enum(ira, (IrInstSrcIntToEnum *)instruction);
+        case IrInstSrcIdEnumToInt:
+            return ir_analyze_instruction_enum_to_int(ira, (IrInstSrcEnumToInt *)instruction);
+        case IrInstSrcIdCheckRuntimeScope:
+            return ir_analyze_instruction_check_runtime_scope(ira, (IrInstSrcCheckRuntimeScope *)instruction);
+        case IrInstSrcIdHasDecl:
+            return ir_analyze_instruction_has_decl(ira, (IrInstSrcHasDecl *)instruction);
+        case IrInstSrcIdUndeclaredIdent:
+            return ir_analyze_instruction_undeclared_ident(ira, (IrInstSrcUndeclaredIdent *)instruction);
+        case IrInstSrcIdAlloca:
             return nullptr;
-        case IrInstructionIdEndExpr:
-            return ir_analyze_instruction_end_expr(ira, (IrInstructionEndExpr *)instruction);
-        case IrInstructionIdBitCastSrc:
-            return ir_analyze_instruction_bit_cast_src(ira, (IrInstructionBitCastSrc *)instruction);
-        case IrInstructionIdUnionInitNamedField:
-            return ir_analyze_instruction_union_init_named_field(ira, (IrInstructionUnionInitNamedField *)instruction);
-        case IrInstructionIdSuspendBegin:
-            return ir_analyze_instruction_suspend_begin(ira, (IrInstructionSuspendBegin *)instruction);
-        case IrInstructionIdSuspendFinish:
-            return ir_analyze_instruction_suspend_finish(ira, (IrInstructionSuspendFinish *)instruction);
-        case IrInstructionIdResume:
-            return ir_analyze_instruction_resume(ira, (IrInstructionResume *)instruction);
-        case IrInstructionIdAwaitSrc:
-            return ir_analyze_instruction_await(ira, (IrInstructionAwaitSrc *)instruction);
-        case IrInstructionIdSpillBegin:
-            return ir_analyze_instruction_spill_begin(ira, (IrInstructionSpillBegin *)instruction);
-        case IrInstructionIdSpillEnd:
-            return ir_analyze_instruction_spill_end(ira, (IrInstructionSpillEnd *)instruction);
+        case IrInstSrcIdEndExpr:
+            return ir_analyze_instruction_end_expr(ira, (IrInstSrcEndExpr *)instruction);
+        case IrInstSrcIdBitCast:
+            return ir_analyze_instruction_bit_cast_src(ira, (IrInstSrcBitCast *)instruction);
+        case IrInstSrcIdUnionInitNamedField:
+            return ir_analyze_instruction_union_init_named_field(ira, (IrInstSrcUnionInitNamedField *)instruction);
+        case IrInstSrcIdSuspendBegin:
+            return ir_analyze_instruction_suspend_begin(ira, (IrInstSrcSuspendBegin *)instruction);
+        case IrInstSrcIdSuspendFinish:
+            return ir_analyze_instruction_suspend_finish(ira, (IrInstSrcSuspendFinish *)instruction);
+        case IrInstSrcIdResume:
+            return ir_analyze_instruction_resume(ira, (IrInstSrcResume *)instruction);
+        case IrInstSrcIdAwait:
+            return ir_analyze_instruction_await(ira, (IrInstSrcAwait *)instruction);
+        case IrInstSrcIdSpillBegin:
+            return ir_analyze_instruction_spill_begin(ira, (IrInstSrcSpillBegin *)instruction);
+        case IrInstSrcIdSpillEnd:
+            return ir_analyze_instruction_spill_end(ira, (IrInstSrcSpillEnd *)instruction);
     }
     zig_unreachable();
 }
 
 // This function attempts to evaluate IR code while doing type checking and other analysis.
-// It emits a new IrExecutable which is partially evaluated IR code.
-ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_exec,
+// It emits to a new IrExecutableGen which is partially evaluated IR code.
+ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen *new_exec,
         ZigType *expected_type, AstNode *expected_type_source_node)
 {
     assert(old_exec->first_err_trace_msg == nullptr);
@@ -28988,18 +29755,18 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
         ira->exec_context.mem_slot_list.items[i] = &vals[i];
     }
 
-    IrBasicBlock *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
-    IrBasicBlock *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
-    ir_ref_bb(new_entry_bb);
+    IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
+    IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
+    ir_ref_bb_gen(new_entry_bb);
     ira->new_irb.current_basic_block = new_entry_bb;
     ira->old_bb_index = 0;
 
     ir_start_bb(ira, old_entry_bb, nullptr);
 
     while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
-        IrInstruction *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
+        IrInstSrc *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
 
-        if (old_instruction->ref_count == 0 && !ir_has_side_effects(old_instruction)) {
+        if (old_instruction->base.ref_count == 0 && !ir_inst_src_has_side_effects(old_instruction)) {
             ira->instruction_index += 1;
             continue;
         }
@@ -29008,14 +29775,14 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
             fprintf(stderr, "~ ");
             old_instruction->src();
             fprintf(stderr, "~ ");
-            ir_print_instruction(codegen, stderr, old_instruction, 0, IrPassSrc);
+            ir_print_inst_src(codegen, stderr, old_instruction, 0);
             bool want_break = false;
-            if (ira->break_debug_id == old_instruction->debug_id) {
+            if (ira->break_debug_id == old_instruction->base.debug_id) {
                 want_break = true;
-            } else if (old_instruction->source_node != nullptr) {
+            } else if (old_instruction->base.source_node != nullptr) {
                 for (size_t i = 0; i < dbg_ir_breakpoints_count; i += 1) {
-                    if (dbg_ir_breakpoints_buf[i].line == old_instruction->source_node->line + 1 &&
-                        buf_ends_with_str(old_instruction->source_node->owner->data.structure.root_struct->path,
+                    if (dbg_ir_breakpoints_buf[i].line == old_instruction->base.source_node->line + 1 &&
+                        buf_ends_with_str(old_instruction->base.source_node->owner->data.structure.root_struct->path,
                                 dbg_ir_breakpoints_buf[i].src_file))
                     {
                         want_break = true;
@@ -29024,9 +29791,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
             }
             if (want_break) BREAKPOINT;
         }
-        IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
+        IrInstGen *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
         if (new_instruction != nullptr) {
-            ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, old_instruction);
+            ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, &old_instruction->base);
             old_instruction->child = new_instruction;
 
             if (type_is_invalid(new_instruction->value->type)) {
@@ -29040,19 +29807,19 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
                     new_exec->first_err_trace_msg = ira->codegen->trace_err;
                 }
                 if (new_exec->first_err_trace_msg != nullptr &&
-                    !old_instruction->source_node->already_traced_this_node)
+                    !old_instruction->base.source_node->already_traced_this_node)
                 {
-                    old_instruction->source_node->already_traced_this_node = true;
+                    old_instruction->base.source_node->already_traced_this_node = true;
                     new_exec->first_err_trace_msg = add_error_note(ira->codegen, new_exec->first_err_trace_msg,
-                            old_instruction->source_node, buf_create_from_str("referenced here"));
+                            old_instruction->base.source_node, buf_create_from_str("referenced here"));
                 }
                 return ira->codegen->builtin_types.entry_invalid;
             } else if (ira->codegen->verbose_ir) {
                 fprintf(stderr, "-> ");
-                if (instr_is_unreachable(new_instruction)) {
+                if (new_instruction->value->type->id == ZigTypeIdUnreachable) {
                     fprintf(stderr, "(noreturn)\n");
                 } else {
-                    ir_print_instruction(codegen, stderr, new_instruction, 0, IrPassGen);
+                    ir_print_inst_gen(codegen, stderr, new_instruction, 0);
                 }
             }
 
@@ -29092,204 +29859,279 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
     return res_type;
 }
 
-bool ir_has_side_effects(IrInstruction *instruction) {
+bool ir_inst_gen_has_side_effects(IrInstGen *instruction) {
     switch (instruction->id) {
-        case IrInstructionIdInvalid:
+        case IrInstGenIdInvalid:
             zig_unreachable();
-        case IrInstructionIdBr:
-        case IrInstructionIdCondBr:
-        case IrInstructionIdSwitchBr:
-        case IrInstructionIdDeclVarSrc:
-        case IrInstructionIdDeclVarGen:
-        case IrInstructionIdStorePtr:
-        case IrInstructionIdVectorStoreElem:
-        case IrInstructionIdCallExtra:
-        case IrInstructionIdCallSrc:
-        case IrInstructionIdCallSrcArgs:
-        case IrInstructionIdCallGen:
-        case IrInstructionIdReturn:
-        case IrInstructionIdUnreachable:
-        case IrInstructionIdSetCold:
-        case IrInstructionIdSetRuntimeSafety:
-        case IrInstructionIdSetFloatMode:
-        case IrInstructionIdImport:
-        case IrInstructionIdCompileErr:
-        case IrInstructionIdCompileLog:
-        case IrInstructionIdCImport:
-        case IrInstructionIdCInclude:
-        case IrInstructionIdCDefine:
-        case IrInstructionIdCUndef:
-        case IrInstructionIdFence:
-        case IrInstructionIdMemset:
-        case IrInstructionIdMemcpy:
-        case IrInstructionIdBreakpoint:
-        case IrInstructionIdOverflowOp: // TODO when we support multiple returns this can be side effect free
-        case IrInstructionIdCheckSwitchProngs:
-        case IrInstructionIdCheckStatementIsVoid:
-        case IrInstructionIdCheckRuntimeScope:
-        case IrInstructionIdPanic:
-        case IrInstructionIdSetEvalBranchQuota:
-        case IrInstructionIdPtrType:
-        case IrInstructionIdSetAlignStack:
-        case IrInstructionIdExport:
-        case IrInstructionIdSaveErrRetAddr:
-        case IrInstructionIdAddImplicitReturnType:
-        case IrInstructionIdAtomicRmw:
-        case IrInstructionIdAtomicStore:
-        case IrInstructionIdCmpxchgGen:
-        case IrInstructionIdCmpxchgSrc:
-        case IrInstructionIdAssertZero:
-        case IrInstructionIdAssertNonNull:
-        case IrInstructionIdResizeSlice:
-        case IrInstructionIdUndeclaredIdent:
-        case IrInstructionIdEndExpr:
-        case IrInstructionIdPtrOfArrayToSlice:
-        case IrInstructionIdSliceGen:
-        case IrInstructionIdOptionalWrap:
-        case IrInstructionIdVectorToArray:
-        case IrInstructionIdResetResult:
-        case IrInstructionIdSuspendBegin:
-        case IrInstructionIdSuspendFinish:
-        case IrInstructionIdResume:
-        case IrInstructionIdAwaitSrc:
-        case IrInstructionIdAwaitGen:
-        case IrInstructionIdSpillBegin:
+        case IrInstGenIdBr:
+        case IrInstGenIdCondBr:
+        case IrInstGenIdSwitchBr:
+        case IrInstGenIdDeclVar:
+        case IrInstGenIdStorePtr:
+        case IrInstGenIdVectorStoreElem:
+        case IrInstGenIdCall:
+        case IrInstGenIdReturn:
+        case IrInstGenIdUnreachable:
+        case IrInstGenIdFence:
+        case IrInstGenIdMemset:
+        case IrInstGenIdMemcpy:
+        case IrInstGenIdBreakpoint:
+        case IrInstGenIdOverflowOp: // TODO when we support multiple returns this can be side effect free
+        case IrInstGenIdPanic:
+        case IrInstGenIdSaveErrRetAddr:
+        case IrInstGenIdAtomicRmw:
+        case IrInstGenIdAtomicStore:
+        case IrInstGenIdCmpxchg:
+        case IrInstGenIdAssertZero:
+        case IrInstGenIdAssertNonNull:
+        case IrInstGenIdResizeSlice:
+        case IrInstGenIdPtrOfArrayToSlice:
+        case IrInstGenIdSlice:
+        case IrInstGenIdOptionalWrap:
+        case IrInstGenIdVectorToArray:
+        case IrInstGenIdSuspendBegin:
+        case IrInstGenIdSuspendFinish:
+        case IrInstGenIdResume:
+        case IrInstGenIdAwait:
+        case IrInstGenIdSpillBegin:
             return true;
 
-        case IrInstructionIdPhi:
-        case IrInstructionIdUnOp:
-        case IrInstructionIdBinOp:
-        case IrInstructionIdMergeErrSets:
-        case IrInstructionIdLoadPtr:
-        case IrInstructionIdConst:
-        case IrInstructionIdCast:
-        case IrInstructionIdContainerInitList:
-        case IrInstructionIdContainerInitFields:
-        case IrInstructionIdUnionInitNamedField:
-        case IrInstructionIdFieldPtr:
-        case IrInstructionIdElemPtr:
-        case IrInstructionIdVarPtr:
-        case IrInstructionIdReturnPtr:
-        case IrInstructionIdTypeOf:
-        case IrInstructionIdStructFieldPtr:
-        case IrInstructionIdArrayType:
-        case IrInstructionIdSliceType:
-        case IrInstructionIdAnyFrameType:
-        case IrInstructionIdSizeOf:
-        case IrInstructionIdTestNonNull:
-        case IrInstructionIdOptionalUnwrapPtr:
-        case IrInstructionIdClz:
-        case IrInstructionIdCtz:
-        case IrInstructionIdPopCount:
-        case IrInstructionIdBswap:
-        case IrInstructionIdBitReverse:
-        case IrInstructionIdSwitchVar:
-        case IrInstructionIdSwitchElseVar:
-        case IrInstructionIdSwitchTarget:
-        case IrInstructionIdUnionTag:
-        case IrInstructionIdRef:
-        case IrInstructionIdEmbedFile:
-        case IrInstructionIdTruncate:
-        case IrInstructionIdIntType:
-        case IrInstructionIdVectorType:
-        case IrInstructionIdShuffleVector:
-        case IrInstructionIdSplatSrc:
-        case IrInstructionIdSplatGen:
-        case IrInstructionIdBoolNot:
-        case IrInstructionIdSliceSrc:
-        case IrInstructionIdMemberCount:
-        case IrInstructionIdMemberType:
-        case IrInstructionIdMemberName:
-        case IrInstructionIdAlignOf:
-        case IrInstructionIdReturnAddress:
-        case IrInstructionIdFrameAddress:
-        case IrInstructionIdFrameHandle:
-        case IrInstructionIdFrameType:
-        case IrInstructionIdFrameSizeSrc:
-        case IrInstructionIdFrameSizeGen:
-        case IrInstructionIdTestErrSrc:
-        case IrInstructionIdTestErrGen:
-        case IrInstructionIdFnProto:
-        case IrInstructionIdTestComptime:
-        case IrInstructionIdPtrCastSrc:
-        case IrInstructionIdPtrCastGen:
-        case IrInstructionIdBitCastSrc:
-        case IrInstructionIdBitCastGen:
-        case IrInstructionIdWidenOrShorten:
-        case IrInstructionIdPtrToInt:
-        case IrInstructionIdIntToPtr:
-        case IrInstructionIdIntToEnum:
-        case IrInstructionIdIntToErr:
-        case IrInstructionIdErrToInt:
-        case IrInstructionIdDeclRef:
-        case IrInstructionIdErrName:
-        case IrInstructionIdTypeName:
-        case IrInstructionIdTagName:
-        case IrInstructionIdFieldParentPtr:
-        case IrInstructionIdByteOffsetOf:
-        case IrInstructionIdBitOffsetOf:
-        case IrInstructionIdTypeInfo:
-        case IrInstructionIdType:
-        case IrInstructionIdHasField:
-        case IrInstructionIdTypeId:
-        case IrInstructionIdAlignCast:
-        case IrInstructionIdImplicitCast:
-        case IrInstructionIdResolveResult:
-        case IrInstructionIdOpaqueType:
-        case IrInstructionIdArgType:
-        case IrInstructionIdTagType:
-        case IrInstructionIdErrorReturnTrace:
-        case IrInstructionIdErrorUnion:
-        case IrInstructionIdFloatOp:
-        case IrInstructionIdMulAdd:
-        case IrInstructionIdAtomicLoad:
-        case IrInstructionIdIntCast:
-        case IrInstructionIdFloatCast:
-        case IrInstructionIdErrSetCast:
-        case IrInstructionIdIntToFloat:
-        case IrInstructionIdFloatToInt:
-        case IrInstructionIdBoolToInt:
-        case IrInstructionIdFromBytes:
-        case IrInstructionIdToBytes:
-        case IrInstructionIdEnumToInt:
-        case IrInstructionIdArrayToVector:
-        case IrInstructionIdHasDecl:
-        case IrInstructionIdAllocaSrc:
-        case IrInstructionIdAllocaGen:
-        case IrInstructionIdSpillEnd:
-        case IrInstructionIdVectorExtractElem:
+        case IrInstGenIdPhi:
+        case IrInstGenIdBinOp:
+        case IrInstGenIdConst:
+        case IrInstGenIdCast:
+        case IrInstGenIdElemPtr:
+        case IrInstGenIdVarPtr:
+        case IrInstGenIdReturnPtr:
+        case IrInstGenIdStructFieldPtr:
+        case IrInstGenIdTestNonNull:
+        case IrInstGenIdOptionalUnwrapPtr:
+        case IrInstGenIdClz:
+        case IrInstGenIdCtz:
+        case IrInstGenIdPopCount:
+        case IrInstGenIdBswap:
+        case IrInstGenIdBitReverse:
+        case IrInstGenIdUnionTag:
+        case IrInstGenIdTruncate:
+        case IrInstGenIdShuffleVector:
+        case IrInstGenIdSplat:
+        case IrInstGenIdBoolNot:
+        case IrInstGenIdReturnAddress:
+        case IrInstGenIdFrameAddress:
+        case IrInstGenIdFrameHandle:
+        case IrInstGenIdFrameSize:
+        case IrInstGenIdTestErr:
+        case IrInstGenIdPtrCast:
+        case IrInstGenIdBitCast:
+        case IrInstGenIdWidenOrShorten:
+        case IrInstGenIdPtrToInt:
+        case IrInstGenIdIntToPtr:
+        case IrInstGenIdIntToEnum:
+        case IrInstGenIdIntToErr:
+        case IrInstGenIdErrToInt:
+        case IrInstGenIdErrName:
+        case IrInstGenIdTagName:
+        case IrInstGenIdFieldParentPtr:
+        case IrInstGenIdAlignCast:
+        case IrInstGenIdErrorReturnTrace:
+        case IrInstGenIdFloatOp:
+        case IrInstGenIdMulAdd:
+        case IrInstGenIdAtomicLoad:
+        case IrInstGenIdArrayToVector:
+        case IrInstGenIdAlloca:
+        case IrInstGenIdSpillEnd:
+        case IrInstGenIdVectorExtractElem:
+        case IrInstGenIdBinaryNot:
+        case IrInstGenIdNegation:
+        case IrInstGenIdNegationWrapping:
             return false;
 
-        case IrInstructionIdAsmSrc:
+        case IrInstGenIdAsm:
             {
-                IrInstructionAsmSrc *asm_instruction = (IrInstructionAsmSrc *)instruction;
+                IrInstGenAsm *asm_instruction = (IrInstGenAsm *)instruction;
                 return asm_instruction->has_side_effects;
             }
+        case IrInstGenIdUnwrapErrPayload:
+            {
+                IrInstGenUnwrapErrPayload *unwrap_err_payload_instruction =
+                    (IrInstGenUnwrapErrPayload *)instruction;
+                return unwrap_err_payload_instruction->safety_check_on ||
+                    unwrap_err_payload_instruction->initializing;
+            }
+        case IrInstGenIdUnwrapErrCode:
+            return reinterpret_cast<IrInstGenUnwrapErrCode *>(instruction)->initializing;
+        case IrInstGenIdUnionFieldPtr:
+            return reinterpret_cast<IrInstGenUnionFieldPtr *>(instruction)->initializing;
+        case IrInstGenIdErrWrapPayload:
+            return reinterpret_cast<IrInstGenErrWrapPayload *>(instruction)->result_loc != nullptr;
+        case IrInstGenIdErrWrapCode:
+            return reinterpret_cast<IrInstGenErrWrapCode *>(instruction)->result_loc != nullptr;
+        case IrInstGenIdLoadPtr:
+            return reinterpret_cast<IrInstGenLoadPtr *>(instruction)->result_loc != nullptr;
+        case IrInstGenIdRef:
+            return reinterpret_cast<IrInstGenRef *>(instruction)->result_loc != nullptr;
+    }
+    zig_unreachable();
+}
 
-        case IrInstructionIdAsmGen:
+bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
+    switch (instruction->id) {
+        case IrInstSrcIdInvalid:
+            zig_unreachable();
+        case IrInstSrcIdBr:
+        case IrInstSrcIdCondBr:
+        case IrInstSrcIdSwitchBr:
+        case IrInstSrcIdDeclVar:
+        case IrInstSrcIdStorePtr:
+        case IrInstSrcIdCallExtra:
+        case IrInstSrcIdCall:
+        case IrInstSrcIdCallArgs:
+        case IrInstSrcIdReturn:
+        case IrInstSrcIdUnreachable:
+        case IrInstSrcIdSetCold:
+        case IrInstSrcIdSetRuntimeSafety:
+        case IrInstSrcIdSetFloatMode:
+        case IrInstSrcIdImport:
+        case IrInstSrcIdCompileErr:
+        case IrInstSrcIdCompileLog:
+        case IrInstSrcIdCImport:
+        case IrInstSrcIdCInclude:
+        case IrInstSrcIdCDefine:
+        case IrInstSrcIdCUndef:
+        case IrInstSrcIdFence:
+        case IrInstSrcIdMemset:
+        case IrInstSrcIdMemcpy:
+        case IrInstSrcIdBreakpoint:
+        case IrInstSrcIdOverflowOp: // TODO when we support multiple returns this can be side effect free
+        case IrInstSrcIdCheckSwitchProngs:
+        case IrInstSrcIdCheckStatementIsVoid:
+        case IrInstSrcIdCheckRuntimeScope:
+        case IrInstSrcIdPanic:
+        case IrInstSrcIdSetEvalBranchQuota:
+        case IrInstSrcIdPtrType:
+        case IrInstSrcIdSetAlignStack:
+        case IrInstSrcIdExport:
+        case IrInstSrcIdSaveErrRetAddr:
+        case IrInstSrcIdAddImplicitReturnType:
+        case IrInstSrcIdAtomicRmw:
+        case IrInstSrcIdAtomicStore:
+        case IrInstSrcIdCmpxchg:
+        case IrInstSrcIdUndeclaredIdent:
+        case IrInstSrcIdEndExpr:
+        case IrInstSrcIdResetResult:
+        case IrInstSrcIdSuspendBegin:
+        case IrInstSrcIdSuspendFinish:
+        case IrInstSrcIdResume:
+        case IrInstSrcIdAwait:
+        case IrInstSrcIdSpillBegin:
+            return true;
+
+        case IrInstSrcIdPhi:
+        case IrInstSrcIdUnOp:
+        case IrInstSrcIdBinOp:
+        case IrInstSrcIdMergeErrSets:
+        case IrInstSrcIdLoadPtr:
+        case IrInstSrcIdConst:
+        case IrInstSrcIdContainerInitList:
+        case IrInstSrcIdContainerInitFields:
+        case IrInstSrcIdUnionInitNamedField:
+        case IrInstSrcIdFieldPtr:
+        case IrInstSrcIdElemPtr:
+        case IrInstSrcIdVarPtr:
+        case IrInstSrcIdTypeOf:
+        case IrInstSrcIdArrayType:
+        case IrInstSrcIdSliceType:
+        case IrInstSrcIdAnyFrameType:
+        case IrInstSrcIdSizeOf:
+        case IrInstSrcIdTestNonNull:
+        case IrInstSrcIdOptionalUnwrapPtr:
+        case IrInstSrcIdClz:
+        case IrInstSrcIdCtz:
+        case IrInstSrcIdPopCount:
+        case IrInstSrcIdBswap:
+        case IrInstSrcIdBitReverse:
+        case IrInstSrcIdSwitchVar:
+        case IrInstSrcIdSwitchElseVar:
+        case IrInstSrcIdSwitchTarget:
+        case IrInstSrcIdRef:
+        case IrInstSrcIdEmbedFile:
+        case IrInstSrcIdTruncate:
+        case IrInstSrcIdIntType:
+        case IrInstSrcIdVectorType:
+        case IrInstSrcIdShuffleVector:
+        case IrInstSrcIdSplat:
+        case IrInstSrcIdBoolNot:
+        case IrInstSrcIdSlice:
+        case IrInstSrcIdMemberCount:
+        case IrInstSrcIdMemberType:
+        case IrInstSrcIdMemberName:
+        case IrInstSrcIdAlignOf:
+        case IrInstSrcIdReturnAddress:
+        case IrInstSrcIdFrameAddress:
+        case IrInstSrcIdFrameHandle:
+        case IrInstSrcIdFrameType:
+        case IrInstSrcIdFrameSize:
+        case IrInstSrcIdTestErr:
+        case IrInstSrcIdFnProto:
+        case IrInstSrcIdTestComptime:
+        case IrInstSrcIdPtrCast:
+        case IrInstSrcIdBitCast:
+        case IrInstSrcIdPtrToInt:
+        case IrInstSrcIdIntToPtr:
+        case IrInstSrcIdIntToEnum:
+        case IrInstSrcIdIntToErr:
+        case IrInstSrcIdErrToInt:
+        case IrInstSrcIdDeclRef:
+        case IrInstSrcIdErrName:
+        case IrInstSrcIdTypeName:
+        case IrInstSrcIdTagName:
+        case IrInstSrcIdFieldParentPtr:
+        case IrInstSrcIdByteOffsetOf:
+        case IrInstSrcIdBitOffsetOf:
+        case IrInstSrcIdTypeInfo:
+        case IrInstSrcIdType:
+        case IrInstSrcIdHasField:
+        case IrInstSrcIdTypeId:
+        case IrInstSrcIdAlignCast:
+        case IrInstSrcIdImplicitCast:
+        case IrInstSrcIdResolveResult:
+        case IrInstSrcIdOpaqueType:
+        case IrInstSrcIdArgType:
+        case IrInstSrcIdTagType:
+        case IrInstSrcIdErrorReturnTrace:
+        case IrInstSrcIdErrorUnion:
+        case IrInstSrcIdFloatOp:
+        case IrInstSrcIdMulAdd:
+        case IrInstSrcIdAtomicLoad:
+        case IrInstSrcIdIntCast:
+        case IrInstSrcIdFloatCast:
+        case IrInstSrcIdErrSetCast:
+        case IrInstSrcIdIntToFloat:
+        case IrInstSrcIdFloatToInt:
+        case IrInstSrcIdBoolToInt:
+        case IrInstSrcIdFromBytes:
+        case IrInstSrcIdToBytes:
+        case IrInstSrcIdEnumToInt:
+        case IrInstSrcIdHasDecl:
+        case IrInstSrcIdAlloca:
+        case IrInstSrcIdSpillEnd:
+            return false;
+
+        case IrInstSrcIdAsm:
             {
-                IrInstructionAsmGen *asm_instruction = (IrInstructionAsmGen *)instruction;
+                IrInstSrcAsm *asm_instruction = (IrInstSrcAsm *)instruction;
                 return asm_instruction->has_side_effects;
             }
-        case IrInstructionIdUnwrapErrPayload:
+
+        case IrInstSrcIdUnwrapErrPayload:
             {
-                IrInstructionUnwrapErrPayload *unwrap_err_payload_instruction =
-                    (IrInstructionUnwrapErrPayload *)instruction;
+                IrInstSrcUnwrapErrPayload *unwrap_err_payload_instruction =
+                    (IrInstSrcUnwrapErrPayload *)instruction;
                 return unwrap_err_payload_instruction->safety_check_on ||
                     unwrap_err_payload_instruction->initializing;
             }
-        case IrInstructionIdUnwrapErrCode:
-            return reinterpret_cast<IrInstructionUnwrapErrCode *>(instruction)->initializing;
-        case IrInstructionIdUnionFieldPtr:
-            return reinterpret_cast<IrInstructionUnionFieldPtr *>(instruction)->initializing;
-        case IrInstructionIdErrWrapPayload:
-            return reinterpret_cast<IrInstructionErrWrapPayload *>(instruction)->result_loc != nullptr;
-        case IrInstructionIdErrWrapCode:
-            return reinterpret_cast<IrInstructionErrWrapCode *>(instruction)->result_loc != nullptr;
-        case IrInstructionIdLoadPtrGen:
-            return reinterpret_cast<IrInstructionLoadPtrGen *>(instruction)->result_loc != nullptr;
-        case IrInstructionIdRefGen:
-            return reinterpret_cast<IrInstructionRefGen *>(instruction)->result_loc != nullptr;
+        case IrInstSrcIdUnwrapErrCode:
+            return reinterpret_cast<IrInstSrcUnwrapErrCode *>(instruction)->initializing;
     }
     zig_unreachable();
 }
@@ -29323,14 +30165,14 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
             param_info->type = nullptr;
             return get_generic_fn_type(ira->codegen, &fn_type_id);
         } else {
-            IrInstruction *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
+            IrInstGen *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
             ZigType *param_type = ir_resolve_type(ira, param_type_inst);
             if (type_is_invalid(param_type))
                 return nullptr;
             switch (type_requires_comptime(ira->codegen, param_type)) {
             case ReqCompTimeYes:
                 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {
-                    ir_add_error(ira, param_type_inst,
+                    ir_add_error(ira, &param_type_inst->base,
                         buf_sprintf("parameter of type '%s' not allowed in function with calling convention '%s'",
                             buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
                     return nullptr;
@@ -29348,7 +30190,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
                 if ((err = type_has_bits2(ira->codegen, param_type, &has_bits)))
                     return nullptr;
                 if (!has_bits) {
-                    ir_add_error(ira, param_type_inst,
+                    ir_add_error(ira, &param_type_inst->base,
                         buf_sprintf("parameter of type '%s' has 0 bits; not allowed in function with calling convention '%s'",
                             buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
                     return nullptr;
@@ -29367,7 +30209,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
     if (type_is_invalid(fn_type_id.return_type))
         return nullptr;
     if (fn_type_id.return_type->id == ZigTypeIdOpaque) {
-        ir_add_error(ira, lazy_fn_type->return_type, buf_create_from_str("return type cannot be opaque"));
+        ir_add_error(ira, &lazy_fn_type->return_type->base, buf_create_from_str("return type cannot be opaque"));
         return nullptr;
     }
 
@@ -29399,7 +30241,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                     case ZigTypeIdBoundFn:
                     case ZigTypeIdVoid:
                     case ZigTypeIdOpaque:
-                        ir_add_error(ira, lazy_align_of->target_type,
+                        ir_add_error(ira, &lazy_align_of->target_type->base,
                             buf_sprintf("no align available for type '%s'",
                                 buf_ptr(&lazy_align_of->target_type->value->data.x_type->name)));
                         return ErrorSemanticAnalyzeFail;
@@ -29449,7 +30291,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                     case ZigTypeIdNull:
                     case ZigTypeIdBoundFn:
                     case ZigTypeIdOpaque:
-                        ir_add_error(ira, lazy_size_of->target_type,
+                        ir_add_error(ira, &lazy_size_of->target_type->base,
                             buf_sprintf("no size available for type '%s'",
                                 buf_ptr(&lazy_size_of->target_type->value->data.x_type->name)));
                         return ErrorSemanticAnalyzeFail;
@@ -29507,7 +30349,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
             if (lazy_slice_type->sentinel != nullptr) {
                 if (type_is_invalid(lazy_slice_type->sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
-                IrInstruction *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
+                IrInstGen *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
                 if (type_is_invalid(sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
                 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
@@ -29530,7 +30372,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                 case ZigTypeIdUndefined:
                 case ZigTypeIdNull:
                 case ZigTypeIdOpaque:
-                    ir_add_error(ira, lazy_slice_type->elem_type,
+                    ir_add_error(ira, &lazy_slice_type->elem_type->base,
                         buf_sprintf("slice of type '%s' not allowed", buf_ptr(&elem_type->name)));
                     return ErrorSemanticAnalyzeFail;
                 case ZigTypeIdMetaType:
@@ -29586,7 +30428,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
             if (lazy_ptr_type->sentinel != nullptr) {
                 if (type_is_invalid(lazy_ptr_type->sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
-                IrInstruction *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
+                IrInstGen *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
                 if (type_is_invalid(sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
                 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
@@ -29603,11 +30445,11 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
             }
 
             if (elem_type->id == ZigTypeIdUnreachable) {
-                ir_add_error(ira, lazy_ptr_type->elem_type,
+                ir_add_error(ira, &lazy_ptr_type->elem_type->base,
                         buf_create_from_str("pointer to noreturn not allowed"));
                 return ErrorSemanticAnalyzeFail;
             } else if (elem_type->id == ZigTypeIdOpaque && lazy_ptr_type->ptr_len == PtrLenUnknown) {
-                ir_add_error(ira, lazy_ptr_type->elem_type,
+                ir_add_error(ira, &lazy_ptr_type->elem_type->base,
                         buf_create_from_str("unknown-length pointer to opaque"));
                 return ErrorSemanticAnalyzeFail;
             } else if (lazy_ptr_type->ptr_len == PtrLenC) {
@@ -29615,16 +30457,16 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                 if ((err = type_allowed_in_extern(ira->codegen, elem_type, &ok_type)))
                     return err;
                 if (!ok_type) {
-                    ir_add_error(ira, lazy_ptr_type->elem_type,
+                    ir_add_error(ira, &lazy_ptr_type->elem_type->base,
                         buf_sprintf("C pointers cannot point to non-C-ABI-compatible type '%s'",
                             buf_ptr(&elem_type->name)));
                     return ErrorSemanticAnalyzeFail;
                 } else if (elem_type->id == ZigTypeIdOpaque) {
-                    ir_add_error(ira, lazy_ptr_type->elem_type,
+                    ir_add_error(ira, &lazy_ptr_type->elem_type->base,
                             buf_sprintf("C pointers cannot point opaque types"));
                     return ErrorSemanticAnalyzeFail;
                 } else if (lazy_ptr_type->is_allowzero) {
-                    ir_add_error(ira, lazy_ptr_type->elem_type,
+                    ir_add_error(ira, &lazy_ptr_type->elem_type->base,
                             buf_sprintf("C pointers always allow address zero"));
                     return ErrorSemanticAnalyzeFail;
                 }
@@ -29662,7 +30504,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                 case ZigTypeIdUndefined:
                 case ZigTypeIdNull:
                 case ZigTypeIdOpaque:
-                    ir_add_error(ira, lazy_array_type->elem_type,
+                    ir_add_error(ira, &lazy_array_type->elem_type->base,
                                  buf_sprintf("array of type '%s' not allowed",
                                              buf_ptr(&elem_type->name)));
                     return ErrorSemanticAnalyzeFail;
@@ -29697,7 +30539,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
             if (lazy_array_type->sentinel != nullptr) {
                 if (type_is_invalid(lazy_array_type->sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
-                IrInstruction *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
+                IrInstGen *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
                 if (type_is_invalid(sentinel->value->type))
                     return ErrorSemanticAnalyzeFail;
                 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
@@ -29721,7 +30563,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                 return ErrorSemanticAnalyzeFail;
 
             if (payload_type->id == ZigTypeIdOpaque || payload_type->id == ZigTypeIdUnreachable) {
-                ir_add_error(ira, lazy_opt_type->payload_type,
+                ir_add_error(ira, &lazy_opt_type->payload_type->base,
                         buf_sprintf("type '%s' cannot be optional", buf_ptr(&payload_type->name)));
                 return ErrorSemanticAnalyzeFail;
             }
@@ -29763,7 +30605,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
                 return ErrorSemanticAnalyzeFail;
 
             if (err_set_type->id != ZigTypeIdErrorSet) {
-                ir_add_error(ira, lazy_err_union_type->err_set_type,
+                ir_add_error(ira, &lazy_err_union_type->err_set_type->base,
                     buf_sprintf("expected error set type, found type '%s'",
                         buf_ptr(&err_set_type->name)));
                 return ErrorSemanticAnalyzeFail;
@@ -29799,8 +30641,8 @@ Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val) {
     return ErrorNone;
 }
 
-void IrInstruction::src() {
-    IrInstruction *inst = this;
+void IrInst::src() {
+    IrInst *inst = this;
     if (inst->source_node != nullptr) {
         inst->source_node->src();
     } else {
@@ -29808,26 +30650,45 @@ void IrInstruction::src() {
     }
 }
 
-void IrInstruction::dump() {
-    IrInstruction *inst = this;
+void IrInst::dump() {
+    this->src();
+    fprintf(stderr, "IrInst(#%" PRIu32 ")\n", this->debug_id);
+}
+
+void IrInstSrc::src() {
+    this->base.src();
+}
+
+void IrInstGen::src() {
+    this->base.src();
+}
+
+void IrInstSrc::dump() {
+    IrInstSrc *inst = this;
     inst->src();
-    IrPass pass = (inst->child == nullptr) ? IrPassGen : IrPassSrc;
-    if (inst->scope == nullptr) {
+    if (inst->base.scope == nullptr) {
         fprintf(stderr, "(null scope)\n");
     } else {
-        ir_print_instruction(inst->scope->codegen, stderr, inst, 0, pass);
-        if (pass == IrPassSrc) {
-            fprintf(stderr, "-> ");
-            ir_print_instruction(inst->scope->codegen, stderr, inst->child, 0, IrPassGen);
-        }
+        ir_print_inst_src(inst->base.scope->codegen, stderr, inst, 0);
+        fprintf(stderr, "-> ");
+        ir_print_inst_gen(inst->base.scope->codegen, stderr, inst->child, 0);
+    }
+}
+void IrInstGen::dump() {
+    IrInstGen *inst = this;
+    inst->src();
+    if (inst->base.scope == nullptr) {
+        fprintf(stderr, "(null scope)\n");
+    } else {
+        ir_print_inst_gen(inst->base.scope->codegen, stderr, inst, 0);
     }
 }
 
 void IrAnalyze::dump() {
-    ir_print(this->codegen, stderr, this->new_irb.exec, 0, IrPassGen);
+    ir_print_gen(this->codegen, stderr, this->new_irb.exec, 0);
     if (this->new_irb.current_basic_block != nullptr) {
         fprintf(stderr, "Current basic block:\n");
-        ir_print_basic_block(this->codegen, stderr, this->new_irb.current_basic_block, 1, IrPassGen);
+        ir_print_basic_block_gen(this->codegen, stderr, this->new_irb.current_basic_block, 1);
     }
 }
 
diff --git a/src/ir.hpp b/src/ir.hpp
index 003bf4897dcf86ce277eb9144d677c53812a1258..2aaa37b60486a2e67ced7eebf590c840de96cc59 100644
--- a/src/ir.hpp
+++ b/src/ir.hpp
@@ -10,33 +10,33 @@
 
 #include "all_types.hpp"
 
-enum IrPass {
-    IrPassSrc,
-    IrPassGen,
-};
-
-bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutable *ir_executable);
+bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable);
 bool ir_gen_fn(CodeGen *g, ZigFn *fn_entry);
 
+IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
+        ZigType *var_type, const char *name_hint);
+
 ZigValue *ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
         ZigType *expected_type, size_t *backward_branch_count, size_t *backward_branch_quota,
         ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
-        IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
+        IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
 
 Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val);
 
-ZigType *ir_analyze(CodeGen *g, IrExecutable *old_executable, IrExecutable *new_executable,
+ZigType *ir_analyze(CodeGen *g, IrExecutableSrc *old_executable, IrExecutableGen *new_executable,
         ZigType *expected_type, AstNode *expected_type_source_node);
 
-bool ir_has_side_effects(IrInstruction *instruction);
+bool ir_inst_gen_has_side_effects(IrInstGen *inst);
+bool ir_inst_src_has_side_effects(IrInstSrc *inst);
 
 struct IrAnalyze;
 ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,
         AstNode *source_node);
-const char *float_op_to_name(BuiltinFnId op);
 
 // for debugging purposes
 void dbg_ir_break(const char *src_file, uint32_t line);
 void dbg_ir_clear(void);
 
+void destroy_instruction_gen(IrInstGen *inst);
+
 #endif
diff --git a/src/ir_print.cpp b/src/ir_print.cpp
index 24e030f501bfe0bb547ae2844e3046ac59f1223f..745c8518dbe298cf24a0c8ab8adf9fbf19835276 100644
--- a/src/ir_print.cpp
+++ b/src/ir_print.cpp
@@ -10,19 +10,35 @@
 #include "ir_print.hpp"
 #include "os.hpp"
 
-static uint32_t hash_instruction_ptr(IrInstruction* instruction) {
+static uint32_t hash_inst_src_ptr(IrInstSrc* instruction) {
     return (uint32_t)(uintptr_t)instruction;
 }
 
-static bool instruction_ptr_equal(IrInstruction* a, IrInstruction* b) {
+static uint32_t hash_inst_gen_ptr(IrInstGen* instruction) {
+    return (uint32_t)(uintptr_t)instruction;
+}
+
+static bool inst_src_ptr_eql(IrInstSrc* a, IrInstSrc* b) {
     return a == b;
 }
 
-using InstructionSet = HashMap<IrInstruction*, uint8_t, hash_instruction_ptr, instruction_ptr_equal>;
-using InstructionList = ZigList<IrInstruction*>;
+static bool inst_gen_ptr_eql(IrInstGen* a, IrInstGen* b) {
+    return a == b;
+}
+
+using InstSetSrc = HashMap<IrInstSrc*, uint8_t, hash_inst_src_ptr, inst_src_ptr_eql>;
+using InstSetGen = HashMap<IrInstGen*, uint8_t, hash_inst_gen_ptr, inst_gen_ptr_eql>;
+using InstListSrc = ZigList<IrInstSrc*>;
+using InstListGen = ZigList<IrInstGen*>;
+
+struct IrPrintSrc {
+    CodeGen *codegen;
+    FILE *f;
+    int indent;
+    int indent_size;
+};
 
-struct IrPrint {
-    IrPass pass;
+struct IrPrintGen {
     CodeGen *codegen;
     FILE *f;
     int indent;
@@ -32,417 +48,590 @@ struct IrPrint {
     // present in the instruction list. Thus we track which instructions
     // are printed (per executable) and after each pass 2 instruction those
     // var instructions are rendered in a trailing fashion.
-    InstructionSet printed;
-    InstructionList pending;
+    InstSetGen printed;
+    InstListGen pending;
 };
 
-static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction);
+static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst);
+static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst);
 
-const char* ir_instruction_type_str(IrInstructionId id) {
+const char* ir_inst_src_type_str(IrInstSrcId id) {
     switch (id) {
-        case IrInstructionIdInvalid:
+        case IrInstSrcIdInvalid:
             return "Invalid";
-        case IrInstructionIdShuffleVector:
+        case IrInstSrcIdShuffleVector:
             return "Shuffle";
-        case IrInstructionIdSplatSrc:
-            return "SplatSrc";
-        case IrInstructionIdSplatGen:
-            return "SplatGen";
-        case IrInstructionIdDeclVarSrc:
-            return "DeclVarSrc";
-        case IrInstructionIdDeclVarGen:
-            return "DeclVarGen";
-        case IrInstructionIdBr:
+        case IrInstSrcIdSplat:
+            return "Splat";
+        case IrInstSrcIdDeclVar:
+            return "DeclVar";
+        case IrInstSrcIdBr:
             return "Br";
-        case IrInstructionIdCondBr:
+        case IrInstSrcIdCondBr:
             return "CondBr";
-        case IrInstructionIdSwitchBr:
+        case IrInstSrcIdSwitchBr:
             return "SwitchBr";
-        case IrInstructionIdSwitchVar:
+        case IrInstSrcIdSwitchVar:
             return "SwitchVar";
-        case IrInstructionIdSwitchElseVar:
+        case IrInstSrcIdSwitchElseVar:
             return "SwitchElseVar";
-        case IrInstructionIdSwitchTarget:
+        case IrInstSrcIdSwitchTarget:
             return "SwitchTarget";
-        case IrInstructionIdPhi:
+        case IrInstSrcIdPhi:
             return "Phi";
-        case IrInstructionIdUnOp:
+        case IrInstSrcIdUnOp:
             return "UnOp";
-        case IrInstructionIdBinOp:
+        case IrInstSrcIdBinOp:
             return "BinOp";
-        case IrInstructionIdMergeErrSets:
+        case IrInstSrcIdMergeErrSets:
             return "MergeErrSets";
-        case IrInstructionIdLoadPtr:
+        case IrInstSrcIdLoadPtr:
             return "LoadPtr";
-        case IrInstructionIdLoadPtrGen:
-            return "LoadPtrGen";
-        case IrInstructionIdStorePtr:
+        case IrInstSrcIdStorePtr:
             return "StorePtr";
-        case IrInstructionIdVectorStoreElem:
-            return "VectorStoreElem";
-        case IrInstructionIdFieldPtr:
+        case IrInstSrcIdFieldPtr:
             return "FieldPtr";
-        case IrInstructionIdStructFieldPtr:
-            return "StructFieldPtr";
-        case IrInstructionIdUnionFieldPtr:
-            return "UnionFieldPtr";
-        case IrInstructionIdElemPtr:
+        case IrInstSrcIdElemPtr:
             return "ElemPtr";
-        case IrInstructionIdVarPtr:
+        case IrInstSrcIdVarPtr:
             return "VarPtr";
-        case IrInstructionIdReturnPtr:
-            return "ReturnPtr";
-        case IrInstructionIdCallExtra:
+        case IrInstSrcIdCallExtra:
             return "CallExtra";
-        case IrInstructionIdCallSrc:
-            return "CallSrc";
-        case IrInstructionIdCallSrcArgs:
-            return "CallSrcArgs";
-        case IrInstructionIdCallGen:
-            return "CallGen";
-        case IrInstructionIdConst:
+        case IrInstSrcIdCall:
+            return "Call";
+        case IrInstSrcIdCallArgs:
+            return "CallArgs";
+        case IrInstSrcIdConst:
             return "Const";
-        case IrInstructionIdReturn:
+        case IrInstSrcIdReturn:
             return "Return";
-        case IrInstructionIdCast:
-            return "Cast";
-        case IrInstructionIdResizeSlice:
-            return "ResizeSlice";
-        case IrInstructionIdContainerInitList:
+        case IrInstSrcIdContainerInitList:
             return "ContainerInitList";
-        case IrInstructionIdContainerInitFields:
+        case IrInstSrcIdContainerInitFields:
             return "ContainerInitFields";
-        case IrInstructionIdUnreachable:
+        case IrInstSrcIdUnreachable:
             return "Unreachable";
-        case IrInstructionIdTypeOf:
+        case IrInstSrcIdTypeOf:
             return "TypeOf";
-        case IrInstructionIdSetCold:
+        case IrInstSrcIdSetCold:
             return "SetCold";
-        case IrInstructionIdSetRuntimeSafety:
+        case IrInstSrcIdSetRuntimeSafety:
             return "SetRuntimeSafety";
-        case IrInstructionIdSetFloatMode:
+        case IrInstSrcIdSetFloatMode:
             return "SetFloatMode";
-        case IrInstructionIdArrayType:
+        case IrInstSrcIdArrayType:
             return "ArrayType";
-        case IrInstructionIdAnyFrameType:
+        case IrInstSrcIdAnyFrameType:
             return "AnyFrameType";
-        case IrInstructionIdSliceType:
+        case IrInstSrcIdSliceType:
             return "SliceType";
-        case IrInstructionIdAsmSrc:
-            return "AsmSrc";
-        case IrInstructionIdAsmGen:
-            return "AsmGen";
-        case IrInstructionIdSizeOf:
+        case IrInstSrcIdAsm:
+            return "Asm";
+        case IrInstSrcIdSizeOf:
             return "SizeOf";
-        case IrInstructionIdTestNonNull:
+        case IrInstSrcIdTestNonNull:
             return "TestNonNull";
-        case IrInstructionIdOptionalUnwrapPtr:
+        case IrInstSrcIdOptionalUnwrapPtr:
             return "OptionalUnwrapPtr";
-        case IrInstructionIdOptionalWrap:
-            return "OptionalWrap";
-        case IrInstructionIdUnionTag:
-            return "UnionTag";
-        case IrInstructionIdClz:
+        case IrInstSrcIdClz:
             return "Clz";
-        case IrInstructionIdCtz:
+        case IrInstSrcIdCtz:
             return "Ctz";
-        case IrInstructionIdPopCount:
+        case IrInstSrcIdPopCount:
             return "PopCount";
-        case IrInstructionIdBswap:
+        case IrInstSrcIdBswap:
             return "Bswap";
-        case IrInstructionIdBitReverse:
+        case IrInstSrcIdBitReverse:
             return "BitReverse";
-        case IrInstructionIdImport:
+        case IrInstSrcIdImport:
             return "Import";
-        case IrInstructionIdCImport:
+        case IrInstSrcIdCImport:
             return "CImport";
-        case IrInstructionIdCInclude:
+        case IrInstSrcIdCInclude:
             return "CInclude";
-        case IrInstructionIdCDefine:
+        case IrInstSrcIdCDefine:
             return "CDefine";
-        case IrInstructionIdCUndef:
+        case IrInstSrcIdCUndef:
             return "CUndef";
-        case IrInstructionIdRef:
+        case IrInstSrcIdRef:
             return "Ref";
-        case IrInstructionIdRefGen:
-            return "RefGen";
-        case IrInstructionIdCompileErr:
+        case IrInstSrcIdCompileErr:
             return "CompileErr";
-        case IrInstructionIdCompileLog:
+        case IrInstSrcIdCompileLog:
             return "CompileLog";
-        case IrInstructionIdErrName:
+        case IrInstSrcIdErrName:
             return "ErrName";
-        case IrInstructionIdEmbedFile:
+        case IrInstSrcIdEmbedFile:
             return "EmbedFile";
-        case IrInstructionIdCmpxchgSrc:
-            return "CmpxchgSrc";
-        case IrInstructionIdCmpxchgGen:
-            return "CmpxchgGen";
-        case IrInstructionIdFence:
+        case IrInstSrcIdCmpxchg:
+            return "Cmpxchg";
+        case IrInstSrcIdFence:
             return "Fence";
-        case IrInstructionIdTruncate:
+        case IrInstSrcIdTruncate:
             return "Truncate";
-        case IrInstructionIdIntCast:
+        case IrInstSrcIdIntCast:
             return "IntCast";
-        case IrInstructionIdFloatCast:
+        case IrInstSrcIdFloatCast:
             return "FloatCast";
-        case IrInstructionIdIntToFloat:
+        case IrInstSrcIdIntToFloat:
             return "IntToFloat";
-        case IrInstructionIdFloatToInt:
+        case IrInstSrcIdFloatToInt:
             return "FloatToInt";
-        case IrInstructionIdBoolToInt:
+        case IrInstSrcIdBoolToInt:
             return "BoolToInt";
-        case IrInstructionIdIntType:
+        case IrInstSrcIdIntType:
             return "IntType";
-        case IrInstructionIdVectorType:
+        case IrInstSrcIdVectorType:
             return "VectorType";
-        case IrInstructionIdBoolNot:
+        case IrInstSrcIdBoolNot:
             return "BoolNot";
-        case IrInstructionIdMemset:
+        case IrInstSrcIdMemset:
             return "Memset";
-        case IrInstructionIdMemcpy:
+        case IrInstSrcIdMemcpy:
             return "Memcpy";
-        case IrInstructionIdSliceSrc:
-            return "SliceSrc";
-        case IrInstructionIdSliceGen:
-            return "SliceGen";
-        case IrInstructionIdMemberCount:
+        case IrInstSrcIdSlice:
+            return "Slice";
+        case IrInstSrcIdMemberCount:
             return "MemberCount";
-        case IrInstructionIdMemberType:
+        case IrInstSrcIdMemberType:
             return "MemberType";
-        case IrInstructionIdMemberName:
+        case IrInstSrcIdMemberName:
             return "MemberName";
-        case IrInstructionIdBreakpoint:
+        case IrInstSrcIdBreakpoint:
             return "Breakpoint";
-        case IrInstructionIdReturnAddress:
+        case IrInstSrcIdReturnAddress:
             return "ReturnAddress";
-        case IrInstructionIdFrameAddress:
+        case IrInstSrcIdFrameAddress:
             return "FrameAddress";
-        case IrInstructionIdFrameHandle:
+        case IrInstSrcIdFrameHandle:
             return "FrameHandle";
-        case IrInstructionIdFrameType:
+        case IrInstSrcIdFrameType:
             return "FrameType";
-        case IrInstructionIdFrameSizeSrc:
-            return "FrameSizeSrc";
-        case IrInstructionIdFrameSizeGen:
-            return "FrameSizeGen";
-        case IrInstructionIdAlignOf:
+        case IrInstSrcIdFrameSize:
+            return "FrameSize";
+        case IrInstSrcIdAlignOf:
             return "AlignOf";
-        case IrInstructionIdOverflowOp:
+        case IrInstSrcIdOverflowOp:
             return "OverflowOp";
-        case IrInstructionIdTestErrSrc:
-            return "TestErrSrc";
-        case IrInstructionIdTestErrGen:
-            return "TestErrGen";
-        case IrInstructionIdMulAdd:
+        case IrInstSrcIdTestErr:
+            return "TestErr";
+        case IrInstSrcIdMulAdd:
             return "MulAdd";
-        case IrInstructionIdFloatOp:
+        case IrInstSrcIdFloatOp:
             return "FloatOp";
-        case IrInstructionIdUnwrapErrCode:
+        case IrInstSrcIdUnwrapErrCode:
             return "UnwrapErrCode";
-        case IrInstructionIdUnwrapErrPayload:
+        case IrInstSrcIdUnwrapErrPayload:
             return "UnwrapErrPayload";
-        case IrInstructionIdErrWrapCode:
-            return "ErrWrapCode";
-        case IrInstructionIdErrWrapPayload:
-            return "ErrWrapPayload";
-        case IrInstructionIdFnProto:
+        case IrInstSrcIdFnProto:
             return "FnProto";
-        case IrInstructionIdTestComptime:
+        case IrInstSrcIdTestComptime:
             return "TestComptime";
-        case IrInstructionIdPtrCastSrc:
-            return "PtrCastSrc";
-        case IrInstructionIdPtrCastGen:
-            return "PtrCastGen";
-        case IrInstructionIdBitCastSrc:
-            return "BitCastSrc";
-        case IrInstructionIdBitCastGen:
-            return "BitCastGen";
-        case IrInstructionIdWidenOrShorten:
-            return "WidenOrShorten";
-        case IrInstructionIdIntToPtr:
+        case IrInstSrcIdPtrCast:
+            return "PtrCast";
+        case IrInstSrcIdBitCast:
+            return "BitCast";
+        case IrInstSrcIdIntToPtr:
             return "IntToPtr";
-        case IrInstructionIdPtrToInt:
+        case IrInstSrcIdPtrToInt:
             return "PtrToInt";
-        case IrInstructionIdIntToEnum:
+        case IrInstSrcIdIntToEnum:
             return "IntToEnum";
-        case IrInstructionIdEnumToInt:
+        case IrInstSrcIdEnumToInt:
             return "EnumToInt";
-        case IrInstructionIdIntToErr:
+        case IrInstSrcIdIntToErr:
             return "IntToErr";
-        case IrInstructionIdErrToInt:
+        case IrInstSrcIdErrToInt:
             return "ErrToInt";
-        case IrInstructionIdCheckSwitchProngs:
+        case IrInstSrcIdCheckSwitchProngs:
             return "CheckSwitchProngs";
-        case IrInstructionIdCheckStatementIsVoid:
+        case IrInstSrcIdCheckStatementIsVoid:
             return "CheckStatementIsVoid";
-        case IrInstructionIdTypeName:
+        case IrInstSrcIdTypeName:
             return "TypeName";
-        case IrInstructionIdDeclRef:
+        case IrInstSrcIdDeclRef:
             return "DeclRef";
-        case IrInstructionIdPanic:
+        case IrInstSrcIdPanic:
             return "Panic";
-        case IrInstructionIdTagName:
+        case IrInstSrcIdTagName:
             return "TagName";
-        case IrInstructionIdTagType:
+        case IrInstSrcIdTagType:
             return "TagType";
-        case IrInstructionIdFieldParentPtr:
+        case IrInstSrcIdFieldParentPtr:
             return "FieldParentPtr";
-        case IrInstructionIdByteOffsetOf:
+        case IrInstSrcIdByteOffsetOf:
             return "ByteOffsetOf";
-        case IrInstructionIdBitOffsetOf:
+        case IrInstSrcIdBitOffsetOf:
             return "BitOffsetOf";
-        case IrInstructionIdTypeInfo:
+        case IrInstSrcIdTypeInfo:
             return "TypeInfo";
-        case IrInstructionIdType:
+        case IrInstSrcIdType:
             return "Type";
-        case IrInstructionIdHasField:
+        case IrInstSrcIdHasField:
             return "HasField";
-        case IrInstructionIdTypeId:
+        case IrInstSrcIdTypeId:
             return "TypeId";
-        case IrInstructionIdSetEvalBranchQuota:
+        case IrInstSrcIdSetEvalBranchQuota:
             return "SetEvalBranchQuota";
-        case IrInstructionIdPtrType:
+        case IrInstSrcIdPtrType:
             return "PtrType";
-        case IrInstructionIdAlignCast:
+        case IrInstSrcIdAlignCast:
             return "AlignCast";
-        case IrInstructionIdImplicitCast:
+        case IrInstSrcIdImplicitCast:
             return "ImplicitCast";
-        case IrInstructionIdResolveResult:
+        case IrInstSrcIdResolveResult:
             return "ResolveResult";
-        case IrInstructionIdResetResult:
+        case IrInstSrcIdResetResult:
             return "ResetResult";
-        case IrInstructionIdOpaqueType:
+        case IrInstSrcIdOpaqueType:
             return "OpaqueType";
-        case IrInstructionIdSetAlignStack:
+        case IrInstSrcIdSetAlignStack:
             return "SetAlignStack";
-        case IrInstructionIdArgType:
+        case IrInstSrcIdArgType:
             return "ArgType";
-        case IrInstructionIdExport:
+        case IrInstSrcIdExport:
             return "Export";
-        case IrInstructionIdErrorReturnTrace:
+        case IrInstSrcIdErrorReturnTrace:
             return "ErrorReturnTrace";
-        case IrInstructionIdErrorUnion:
+        case IrInstSrcIdErrorUnion:
             return "ErrorUnion";
-        case IrInstructionIdAtomicRmw:
+        case IrInstSrcIdAtomicRmw:
             return "AtomicRmw";
-        case IrInstructionIdAtomicLoad:
+        case IrInstSrcIdAtomicLoad:
             return "AtomicLoad";
-        case IrInstructionIdAtomicStore:
+        case IrInstSrcIdAtomicStore:
             return "AtomicStore";
-        case IrInstructionIdSaveErrRetAddr:
+        case IrInstSrcIdSaveErrRetAddr:
             return "SaveErrRetAddr";
-        case IrInstructionIdAddImplicitReturnType:
+        case IrInstSrcIdAddImplicitReturnType:
             return "AddImplicitReturnType";
-        case IrInstructionIdErrSetCast:
+        case IrInstSrcIdErrSetCast:
             return "ErrSetCast";
-        case IrInstructionIdToBytes:
+        case IrInstSrcIdToBytes:
             return "ToBytes";
-        case IrInstructionIdFromBytes:
+        case IrInstSrcIdFromBytes:
             return "FromBytes";
-        case IrInstructionIdCheckRuntimeScope:
+        case IrInstSrcIdCheckRuntimeScope:
             return "CheckRuntimeScope";
-        case IrInstructionIdVectorToArray:
+        case IrInstSrcIdHasDecl:
+            return "HasDecl";
+        case IrInstSrcIdUndeclaredIdent:
+            return "UndeclaredIdent";
+        case IrInstSrcIdAlloca:
+            return "Alloca";
+        case IrInstSrcIdEndExpr:
+            return "EndExpr";
+        case IrInstSrcIdUnionInitNamedField:
+            return "UnionInitNamedField";
+        case IrInstSrcIdSuspendBegin:
+            return "SuspendBegin";
+        case IrInstSrcIdSuspendFinish:
+            return "SuspendFinish";
+        case IrInstSrcIdAwait:
+            return "AwaitSr";
+        case IrInstSrcIdResume:
+            return "Resume";
+        case IrInstSrcIdSpillBegin:
+            return "SpillBegin";
+        case IrInstSrcIdSpillEnd:
+            return "SpillEnd";
+    }
+    zig_unreachable();
+}
+
+const char* ir_inst_gen_type_str(IrInstGenId id) {
+    switch (id) {
+        case IrInstGenIdInvalid:
+            return "Invalid";
+        case IrInstGenIdShuffleVector:
+            return "Shuffle";
+        case IrInstGenIdSplat:
+            return "Splat";
+        case IrInstGenIdDeclVar:
+            return "DeclVar";
+        case IrInstGenIdBr:
+            return "Br";
+        case IrInstGenIdCondBr:
+            return "CondBr";
+        case IrInstGenIdSwitchBr:
+            return "SwitchBr";
+        case IrInstGenIdPhi:
+            return "Phi";
+        case IrInstGenIdBinOp:
+            return "BinOp";
+        case IrInstGenIdLoadPtr:
+            return "LoadPtr";
+        case IrInstGenIdStorePtr:
+            return "StorePtr";
+        case IrInstGenIdVectorStoreElem:
+            return "VectorStoreElem";
+        case IrInstGenIdStructFieldPtr:
+            return "StructFieldPtr";
+        case IrInstGenIdUnionFieldPtr:
+            return "UnionFieldPtr";
+        case IrInstGenIdElemPtr:
+            return "ElemPtr";
+        case IrInstGenIdVarPtr:
+            return "VarPtr";
+        case IrInstGenIdReturnPtr:
+            return "ReturnPtr";
+        case IrInstGenIdCall:
+            return "Call";
+        case IrInstGenIdConst:
+            return "Const";
+        case IrInstGenIdReturn:
+            return "Return";
+        case IrInstGenIdCast:
+            return "Cast";
+        case IrInstGenIdResizeSlice:
+            return "ResizeSlice";
+        case IrInstGenIdUnreachable:
+            return "Unreachable";
+        case IrInstGenIdAsm:
+            return "Asm";
+        case IrInstGenIdTestNonNull:
+            return "TestNonNull";
+        case IrInstGenIdOptionalUnwrapPtr:
+            return "OptionalUnwrapPtr";
+        case IrInstGenIdOptionalWrap:
+            return "OptionalWrap";
+        case IrInstGenIdUnionTag:
+            return "UnionTag";
+        case IrInstGenIdClz:
+            return "Clz";
+        case IrInstGenIdCtz:
+            return "Ctz";
+        case IrInstGenIdPopCount:
+            return "PopCount";
+        case IrInstGenIdBswap:
+            return "Bswap";
+        case IrInstGenIdBitReverse:
+            return "BitReverse";
+        case IrInstGenIdRef:
+            return "Ref";
+        case IrInstGenIdErrName:
+            return "ErrName";
+        case IrInstGenIdCmpxchg:
+            return "Cmpxchg";
+        case IrInstGenIdFence:
+            return "Fence";
+        case IrInstGenIdTruncate:
+            return "Truncate";
+        case IrInstGenIdBoolNot:
+            return "BoolNot";
+        case IrInstGenIdMemset:
+            return "Memset";
+        case IrInstGenIdMemcpy:
+            return "Memcpy";
+        case IrInstGenIdSlice:
+            return "Slice";
+        case IrInstGenIdBreakpoint:
+            return "Breakpoint";
+        case IrInstGenIdReturnAddress:
+            return "ReturnAddress";
+        case IrInstGenIdFrameAddress:
+            return "FrameAddress";
+        case IrInstGenIdFrameHandle:
+            return "FrameHandle";
+        case IrInstGenIdFrameSize:
+            return "FrameSize";
+        case IrInstGenIdOverflowOp:
+            return "OverflowOp";
+        case IrInstGenIdTestErr:
+            return "TestErr";
+        case IrInstGenIdMulAdd:
+            return "MulAdd";
+        case IrInstGenIdFloatOp:
+            return "FloatOp";
+        case IrInstGenIdUnwrapErrCode:
+            return "UnwrapErrCode";
+        case IrInstGenIdUnwrapErrPayload:
+            return "UnwrapErrPayload";
+        case IrInstGenIdErrWrapCode:
+            return "ErrWrapCode";
+        case IrInstGenIdErrWrapPayload:
+            return "ErrWrapPayload";
+        case IrInstGenIdPtrCast:
+            return "PtrCast";
+        case IrInstGenIdBitCast:
+            return "BitCast";
+        case IrInstGenIdWidenOrShorten:
+            return "WidenOrShorten";
+        case IrInstGenIdIntToPtr:
+            return "IntToPtr";
+        case IrInstGenIdPtrToInt:
+            return "PtrToInt";
+        case IrInstGenIdIntToEnum:
+            return "IntToEnum";
+        case IrInstGenIdIntToErr:
+            return "IntToErr";
+        case IrInstGenIdErrToInt:
+            return "ErrToInt";
+        case IrInstGenIdPanic:
+            return "Panic";
+        case IrInstGenIdTagName:
+            return "TagName";
+        case IrInstGenIdFieldParentPtr:
+            return "FieldParentPtr";
+        case IrInstGenIdAlignCast:
+            return "AlignCast";
+        case IrInstGenIdErrorReturnTrace:
+            return "ErrorReturnTrace";
+        case IrInstGenIdAtomicRmw:
+            return "AtomicRmw";
+        case IrInstGenIdAtomicLoad:
+            return "AtomicLoad";
+        case IrInstGenIdAtomicStore:
+            return "AtomicStore";
+        case IrInstGenIdSaveErrRetAddr:
+            return "SaveErrRetAddr";
+        case IrInstGenIdVectorToArray:
             return "VectorToArray";
-        case IrInstructionIdArrayToVector:
+        case IrInstGenIdArrayToVector:
             return "ArrayToVector";
-        case IrInstructionIdAssertZero:
+        case IrInstGenIdAssertZero:
             return "AssertZero";
-        case IrInstructionIdAssertNonNull:
+        case IrInstGenIdAssertNonNull:
             return "AssertNonNull";
-        case IrInstructionIdHasDecl:
-            return "HasDecl";
-        case IrInstructionIdUndeclaredIdent:
-            return "UndeclaredIdent";
-        case IrInstructionIdAllocaSrc:
-            return "AllocaSrc";
-        case IrInstructionIdAllocaGen:
-            return "AllocaGen";
-        case IrInstructionIdEndExpr:
-            return "EndExpr";
-        case IrInstructionIdPtrOfArrayToSlice:
+        case IrInstGenIdAlloca:
+            return "Alloca";
+        case IrInstGenIdPtrOfArrayToSlice:
             return "PtrOfArrayToSlice";
-        case IrInstructionIdUnionInitNamedField:
-            return "UnionInitNamedField";
-        case IrInstructionIdSuspendBegin:
+        case IrInstGenIdSuspendBegin:
             return "SuspendBegin";
-        case IrInstructionIdSuspendFinish:
+        case IrInstGenIdSuspendFinish:
             return "SuspendFinish";
-        case IrInstructionIdAwaitSrc:
-            return "AwaitSrc";
-        case IrInstructionIdAwaitGen:
-            return "AwaitGen";
-        case IrInstructionIdResume:
+        case IrInstGenIdAwait:
+            return "Await";
+        case IrInstGenIdResume:
             return "Resume";
-        case IrInstructionIdSpillBegin:
+        case IrInstGenIdSpillBegin:
             return "SpillBegin";
-        case IrInstructionIdSpillEnd:
+        case IrInstGenIdSpillEnd:
             return "SpillEnd";
-        case IrInstructionIdVectorExtractElem:
+        case IrInstGenIdVectorExtractElem:
             return "VectorExtractElem";
+        case IrInstGenIdBinaryNot:
+            return "BinaryNot";
+        case IrInstGenIdNegation:
+            return "Negation";
+        case IrInstGenIdNegationWrapping:
+            return "NegationWrapping";
     }
     zig_unreachable();
 }
 
-static void ir_print_indent(IrPrint *irp) {
+static void ir_print_indent_src(IrPrintSrc *irp) {
     for (int i = 0; i < irp->indent; i += 1) {
         fprintf(irp->f, " ");
     }
 }
 
-static void ir_print_prefix(IrPrint *irp, IrInstruction *instruction, bool trailing) {
-    ir_print_indent(irp);
+static void ir_print_indent_gen(IrPrintGen *irp) {
+    for (int i = 0; i < irp->indent; i += 1) {
+        fprintf(irp->f, " ");
+    }
+}
+
+static void ir_print_prefix_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
+    ir_print_indent_src(irp);
+    const char mark = trailing ? ':' : '#';
+    const char *type_name;
+    if (instruction->id == IrInstSrcIdConst) {
+        type_name = buf_ptr(&reinterpret_cast<IrInstSrcConst *>(instruction)->value->type->name);
+    } else if (instruction->is_noreturn) {
+        type_name = "noreturn";
+    } else {
+        type_name = "(unknown)";
+    }
+    const char *ref_count = ir_inst_src_has_side_effects(instruction) ?
+        "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
+    fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
+        ir_inst_src_type_str(instruction->id), type_name, ref_count);
+}
+
+static void ir_print_prefix_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
+    ir_print_indent_gen(irp);
     const char mark = trailing ? ':' : '#';
     const char *type_name = instruction->value->type ? buf_ptr(&instruction->value->type->name) : "(unknown)";
-    const char *ref_count = ir_has_side_effects(instruction) ?
-        "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->ref_count));
-    fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->debug_id,
-        ir_instruction_type_str(instruction->id), type_name, ref_count);
+    const char *ref_count = ir_inst_gen_has_side_effects(instruction) ?
+        "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
+    fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
+        ir_inst_gen_type_str(instruction->id), type_name, ref_count);
 }
 
-static void ir_print_const_value(IrPrint *irp, ZigValue *const_val) {
+static void ir_print_var_src(IrPrintSrc *irp, IrInstSrc *inst) {
+    fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
+}
+
+static void ir_print_var_gen(IrPrintGen *irp, IrInstGen *inst) {
+    fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
+    if (irp->printed.maybe_get(inst) == nullptr) {
+        irp->printed.put(inst, 0);
+        irp->pending.append(inst);
+    }
+}
+
+static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst) {
+    if (inst == nullptr) {
+        fprintf(irp->f, "(null)");
+        return;
+    }
+    ir_print_var_src(irp, inst);
+}
+
+static void ir_print_const_value(CodeGen *g, FILE *f, ZigValue *const_val) {
     Buf buf = BUF_INIT;
     buf_resize(&buf, 0);
-    render_const_value(irp->codegen, &buf, const_val);
-    fprintf(irp->f, "%s", buf_ptr(&buf));
+    render_const_value(g, &buf, const_val);
+    fprintf(f, "%s", buf_ptr(&buf));
 }
 
-static void ir_print_var_instruction(IrPrint *irp, IrInstruction *instruction) {
-    fprintf(irp->f, "#%" PRIu32 "", instruction->debug_id);
-    if (irp->pass != IrPassSrc && irp->printed.maybe_get(instruction) == nullptr) {
-        irp->printed.put(instruction, 0);
-        irp->pending.append(instruction);
-    }
-}
-
-static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction) {
-    if (instruction == nullptr) {
+static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst) {
+    if (inst == nullptr) {
         fprintf(irp->f, "(null)");
         return;
     }
 
-    if (instruction->value->special != ConstValSpecialRuntime) {
-        ir_print_const_value(irp, instruction->value);
+    if (inst->value->special != ConstValSpecialRuntime) {
+        ir_print_const_value(irp->codegen, irp->f, inst->value);
     } else {
-        ir_print_var_instruction(irp, instruction);
+        ir_print_var_gen(irp, inst);
     }
 }
 
-static void ir_print_other_block(IrPrint *irp, IrBasicBlock *bb) {
+static void ir_print_other_block(IrPrintSrc *irp, IrBasicBlockSrc *bb) {
     if (bb == nullptr) {
         fprintf(irp->f, "(null block)");
     } else {
-        fprintf(irp->f, "$%s_%" ZIG_PRI_usize "", bb->name_hint, bb->debug_id);
+        fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
     }
 }
 
-static void ir_print_return(IrPrint *irp, IrInstructionReturn *instruction) {
+static void ir_print_other_block_gen(IrPrintGen *irp, IrBasicBlockGen *bb) {
+    if (bb == nullptr) {
+        fprintf(irp->f, "(null block)");
+    } else {
+        fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
+    }
+}
+
+static void ir_print_return_src(IrPrintSrc *irp, IrInstSrcReturn *inst) {
     fprintf(irp->f, "return ");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, inst->operand);
+}
+
+static void ir_print_return_gen(IrPrintGen *irp, IrInstGenReturn *inst) {
+    fprintf(irp->f, "return ");
+    ir_print_other_inst_gen(irp, inst->operand);
+}
+
+static void ir_print_const(IrPrintSrc *irp, IrInstSrcConst *const_instruction) {
+    ir_print_const_value(irp->codegen, irp->f, const_instruction->value);
 }
 
-static void ir_print_const(IrPrint *irp, IrInstructionConst *const_instruction) {
-    ir_print_const_value(irp, const_instruction->base.value);
+static void ir_print_const(IrPrintGen *irp, IrInstGenConst *const_instruction) {
+    ir_print_const_value(irp->codegen, irp->f, const_instruction->base.value);
 }
 
 static const char *ir_bin_op_id_str(IrBinOp op_id) {
@@ -531,89 +720,111 @@ static const char *ir_un_op_id_str(IrUnOp op_id) {
     zig_unreachable();
 }
 
-static void ir_print_un_op(IrPrint *irp, IrInstructionUnOp *un_op_instruction) {
-    fprintf(irp->f, "%s ", ir_un_op_id_str(un_op_instruction->op_id));
-    ir_print_other_instruction(irp, un_op_instruction->value);
+static void ir_print_un_op(IrPrintSrc *irp, IrInstSrcUnOp *inst) {
+    fprintf(irp->f, "%s ", ir_un_op_id_str(inst->op_id));
+    ir_print_other_inst_src(irp, inst->value);
 }
 
-static void ir_print_bin_op(IrPrint *irp, IrInstructionBinOp *bin_op_instruction) {
-    ir_print_other_instruction(irp, bin_op_instruction->op1);
+static void ir_print_bin_op(IrPrintSrc *irp, IrInstSrcBinOp *bin_op_instruction) {
+    ir_print_other_inst_src(irp, bin_op_instruction->op1);
     fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
-    ir_print_other_instruction(irp, bin_op_instruction->op2);
+    ir_print_other_inst_src(irp, bin_op_instruction->op2);
     if (!bin_op_instruction->safety_check_on) {
         fprintf(irp->f, " // no safety");
     }
 }
 
-static void ir_print_merge_err_sets(IrPrint *irp, IrInstructionMergeErrSets *instruction) {
-    ir_print_other_instruction(irp, instruction->op1);
+static void ir_print_bin_op(IrPrintGen *irp, IrInstGenBinOp *bin_op_instruction) {
+    ir_print_other_inst_gen(irp, bin_op_instruction->op1);
+    fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
+    ir_print_other_inst_gen(irp, bin_op_instruction->op2);
+    if (!bin_op_instruction->safety_check_on) {
+        fprintf(irp->f, " // no safety");
+    }
+}
+
+static void ir_print_merge_err_sets(IrPrintSrc *irp, IrInstSrcMergeErrSets *instruction) {
+    ir_print_other_inst_src(irp, instruction->op1);
     fprintf(irp->f, " || ");
-    ir_print_other_instruction(irp, instruction->op2);
+    ir_print_other_inst_src(irp, instruction->op2);
     if (instruction->type_name != nullptr) {
         fprintf(irp->f, " // name=%s", buf_ptr(instruction->type_name));
     }
 }
 
-static void ir_print_decl_var_src(IrPrint *irp, IrInstructionDeclVarSrc *decl_var_instruction) {
+static void ir_print_decl_var_src(IrPrintSrc *irp, IrInstSrcDeclVar *decl_var_instruction) {
     const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
     const char *name = decl_var_instruction->var->name;
     if (decl_var_instruction->var_type) {
         fprintf(irp->f, "%s %s: ", var_or_const, name);
-        ir_print_other_instruction(irp, decl_var_instruction->var_type);
+        ir_print_other_inst_src(irp, decl_var_instruction->var_type);
         fprintf(irp->f, " ");
     } else {
         fprintf(irp->f, "%s %s ", var_or_const, name);
     }
     if (decl_var_instruction->align_value) {
         fprintf(irp->f, "align ");
-        ir_print_other_instruction(irp, decl_var_instruction->align_value);
+        ir_print_other_inst_src(irp, decl_var_instruction->align_value);
         fprintf(irp->f, " ");
     }
     fprintf(irp->f, "= ");
-    ir_print_other_instruction(irp, decl_var_instruction->ptr);
+    ir_print_other_inst_src(irp, decl_var_instruction->ptr);
     if (decl_var_instruction->var->is_comptime != nullptr) {
         fprintf(irp->f, " // comptime = ");
-        ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
+        ir_print_other_inst_src(irp, decl_var_instruction->var->is_comptime);
     }
 }
 
-static void ir_print_cast(IrPrint *irp, IrInstructionCast *cast_instruction) {
-    fprintf(irp->f, "cast ");
-    ir_print_other_instruction(irp, cast_instruction->value);
-    fprintf(irp->f, " to %s", buf_ptr(&cast_instruction->dest_type->name));
+static const char *cast_op_str(CastOp op) {
+    switch (op) {
+        case CastOpNoCast: return "NoCast";
+        case CastOpNoop: return "NoOp";
+        case CastOpIntToFloat: return "IntToFloat";
+        case CastOpFloatToInt: return "FloatToInt";
+        case CastOpBoolToInt: return "BoolToInt";
+        case CastOpNumLitToConcrete: return "NumLitToConcrate";
+        case CastOpErrSet: return "ErrSet";
+        case CastOpBitCast: return "BitCast";
+    }
+    zig_unreachable();
+}
+
+static void ir_print_cast(IrPrintGen *irp, IrInstGenCast *cast_instruction) {
+    fprintf(irp->f, "%s cast ", cast_op_str(cast_instruction->cast_op));
+    ir_print_other_inst_gen(irp, cast_instruction->value);
 }
 
-static void ir_print_result_loc_var(IrPrint *irp, ResultLocVar *result_loc_var) {
+static void ir_print_result_loc_var(IrPrintSrc *irp, ResultLocVar *result_loc_var) {
     fprintf(irp->f, "var(");
-    ir_print_other_instruction(irp, result_loc_var->base.source_instruction);
+    ir_print_other_inst_src(irp, result_loc_var->base.source_instruction);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_result_loc_instruction(IrPrint *irp, ResultLocInstruction *result_loc_inst) {
+static void ir_print_result_loc_instruction(IrPrintSrc *irp, ResultLocInstruction *result_loc_inst) {
     fprintf(irp->f, "inst(");
-    ir_print_other_instruction(irp, result_loc_inst->base.source_instruction);
+    ir_print_other_inst_src(irp, result_loc_inst->base.source_instruction);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_result_loc_peer(IrPrint *irp, ResultLocPeer *result_loc_peer) {
+static void ir_print_result_loc_peer(IrPrintSrc *irp, ResultLocPeer *result_loc_peer) {
     fprintf(irp->f, "peer(next=");
     ir_print_other_block(irp, result_loc_peer->next_bb);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_result_loc_bit_cast(IrPrint *irp, ResultLocBitCast *result_loc_bit_cast) {
+static void ir_print_result_loc_bit_cast(IrPrintSrc *irp, ResultLocBitCast *result_loc_bit_cast) {
     fprintf(irp->f, "bitcast(ty=");
-    ir_print_other_instruction(irp, result_loc_bit_cast->base.source_instruction);
+    ir_print_other_inst_src(irp, result_loc_bit_cast->base.source_instruction);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_result_loc_cast(IrPrint *irp, ResultLocCast *result_loc_cast) {
+static void ir_print_result_loc_cast(IrPrintSrc *irp, ResultLocCast *result_loc_cast) {
     fprintf(irp->f, "cast(ty=");
-    ir_print_other_instruction(irp, result_loc_cast->base.source_instruction);
+    ir_print_other_inst_src(irp, result_loc_cast->base.source_instruction);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
+static void ir_print_result_loc(IrPrintSrc *irp, ResultLoc *result_loc) {
     switch (result_loc->id) {
         case ResultLocIdInvalid:
             zig_unreachable();
@@ -640,34 +851,34 @@ static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
     zig_unreachable();
 }
 
-static void ir_print_call_extra(IrPrint *irp, IrInstructionCallExtra *instruction) {
+static void ir_print_call_extra(IrPrintSrc *irp, IrInstSrcCallExtra *instruction) {
     fprintf(irp->f, "opts=");
-    ir_print_other_instruction(irp, instruction->options);
+    ir_print_other_inst_src(irp, instruction->options);
     fprintf(irp->f, ", fn=");
-    ir_print_other_instruction(irp, instruction->fn_ref);
+    ir_print_other_inst_src(irp, instruction->fn_ref);
     fprintf(irp->f, ", args=");
-    ir_print_other_instruction(irp, instruction->args);
+    ir_print_other_inst_src(irp, instruction->args);
     fprintf(irp->f, ", result=");
     ir_print_result_loc(irp, instruction->result_loc);
 }
 
-static void ir_print_call_src_args(IrPrint *irp, IrInstructionCallSrcArgs *instruction) {
+static void ir_print_call_args(IrPrintSrc *irp, IrInstSrcCallArgs *instruction) {
     fprintf(irp->f, "opts=");
-    ir_print_other_instruction(irp, instruction->options);
+    ir_print_other_inst_src(irp, instruction->options);
     fprintf(irp->f, ", fn=");
-    ir_print_other_instruction(irp, instruction->fn_ref);
+    ir_print_other_inst_src(irp, instruction->fn_ref);
     fprintf(irp->f, ", args=(");
     for (size_t i = 0; i < instruction->args_len; i += 1) {
-        IrInstruction *arg = instruction->args_ptr[i];
+        IrInstSrc *arg = instruction->args_ptr[i];
         if (i != 0)
             fprintf(irp->f, ", ");
-        ir_print_other_instruction(irp, arg);
+        ir_print_other_inst_src(irp, arg);
     }
     fprintf(irp->f, "), result=");
     ir_print_result_loc(irp, instruction->result_loc);
 }
 
-static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instruction) {
+static void ir_print_call_src(IrPrintSrc *irp, IrInstSrcCall *call_instruction) {
     switch (call_instruction->modifier) {
         case CallModifierNone:
             break;
@@ -699,20 +910,20 @@ static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instructi
         fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
     } else {
         assert(call_instruction->fn_ref);
-        ir_print_other_instruction(irp, call_instruction->fn_ref);
+        ir_print_other_inst_src(irp, call_instruction->fn_ref);
     }
     fprintf(irp->f, "(");
     for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
-        IrInstruction *arg = call_instruction->args[i];
+        IrInstSrc *arg = call_instruction->args[i];
         if (i != 0)
             fprintf(irp->f, ", ");
-        ir_print_other_instruction(irp, arg);
+        ir_print_other_inst_src(irp, arg);
     }
     fprintf(irp->f, ")result=");
     ir_print_result_loc(irp, call_instruction->result_loc);
 }
 
-static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instruction) {
+static void ir_print_call_gen(IrPrintGen *irp, IrInstGenCall *call_instruction) {
     switch (call_instruction->modifier) {
         case CallModifierNone:
             break;
@@ -744,221 +955,291 @@ static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instructi
         fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
     } else {
         assert(call_instruction->fn_ref);
-        ir_print_other_instruction(irp, call_instruction->fn_ref);
+        ir_print_other_inst_gen(irp, call_instruction->fn_ref);
     }
     fprintf(irp->f, "(");
     for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
-        IrInstruction *arg = call_instruction->args[i];
+        IrInstGen *arg = call_instruction->args[i];
         if (i != 0)
             fprintf(irp->f, ", ");
-        ir_print_other_instruction(irp, arg);
+        ir_print_other_inst_gen(irp, arg);
     }
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, call_instruction->result_loc);
+    ir_print_other_inst_gen(irp, call_instruction->result_loc);
 }
 
-static void ir_print_cond_br(IrPrint *irp, IrInstructionCondBr *cond_br_instruction) {
+static void ir_print_cond_br(IrPrintSrc *irp, IrInstSrcCondBr *inst) {
     fprintf(irp->f, "if (");
-    ir_print_other_instruction(irp, cond_br_instruction->condition);
+    ir_print_other_inst_src(irp, inst->condition);
     fprintf(irp->f, ") ");
-    ir_print_other_block(irp, cond_br_instruction->then_block);
+    ir_print_other_block(irp, inst->then_block);
     fprintf(irp->f, " else ");
-    ir_print_other_block(irp, cond_br_instruction->else_block);
-    if (cond_br_instruction->is_comptime != nullptr) {
+    ir_print_other_block(irp, inst->else_block);
+    if (inst->is_comptime != nullptr) {
         fprintf(irp->f, " // comptime = ");
-        ir_print_other_instruction(irp, cond_br_instruction->is_comptime);
+        ir_print_other_inst_src(irp, inst->is_comptime);
     }
 }
 
-static void ir_print_br(IrPrint *irp, IrInstructionBr *br_instruction) {
+static void ir_print_cond_br(IrPrintGen *irp, IrInstGenCondBr *inst) {
+    fprintf(irp->f, "if (");
+    ir_print_other_inst_gen(irp, inst->condition);
+    fprintf(irp->f, ") ");
+    ir_print_other_block_gen(irp, inst->then_block);
+    fprintf(irp->f, " else ");
+    ir_print_other_block_gen(irp, inst->else_block);
+}
+
+static void ir_print_br(IrPrintSrc *irp, IrInstSrcBr *br_instruction) {
     fprintf(irp->f, "goto ");
     ir_print_other_block(irp, br_instruction->dest_block);
     if (br_instruction->is_comptime != nullptr) {
         fprintf(irp->f, " // comptime = ");
-        ir_print_other_instruction(irp, br_instruction->is_comptime);
+        ir_print_other_inst_src(irp, br_instruction->is_comptime);
     }
 }
 
-static void ir_print_phi(IrPrint *irp, IrInstructionPhi *phi_instruction) {
+static void ir_print_br(IrPrintGen *irp, IrInstGenBr *inst) {
+    fprintf(irp->f, "goto ");
+    ir_print_other_block_gen(irp, inst->dest_block);
+}
+
+static void ir_print_phi(IrPrintSrc *irp, IrInstSrcPhi *phi_instruction) {
     assert(phi_instruction->incoming_count != 0);
     assert(phi_instruction->incoming_count != SIZE_MAX);
     for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
-        IrBasicBlock *incoming_block = phi_instruction->incoming_blocks[i];
-        IrInstruction *incoming_value = phi_instruction->incoming_values[i];
+        IrBasicBlockSrc *incoming_block = phi_instruction->incoming_blocks[i];
+        IrInstSrc *incoming_value = phi_instruction->incoming_values[i];
         if (i != 0)
             fprintf(irp->f, " ");
         ir_print_other_block(irp, incoming_block);
         fprintf(irp->f, ":");
-        ir_print_other_instruction(irp, incoming_value);
+        ir_print_other_inst_src(irp, incoming_value);
     }
 }
 
-static void ir_print_container_init_list(IrPrint *irp, IrInstructionContainerInitList *instruction) {
+static void ir_print_phi(IrPrintGen *irp, IrInstGenPhi *phi_instruction) {
+    assert(phi_instruction->incoming_count != 0);
+    assert(phi_instruction->incoming_count != SIZE_MAX);
+    for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
+        IrBasicBlockGen *incoming_block = phi_instruction->incoming_blocks[i];
+        IrInstGen *incoming_value = phi_instruction->incoming_values[i];
+        if (i != 0)
+            fprintf(irp->f, " ");
+        ir_print_other_block_gen(irp, incoming_block);
+        fprintf(irp->f, ":");
+        ir_print_other_inst_gen(irp, incoming_value);
+    }
+}
+
+static void ir_print_container_init_list(IrPrintSrc *irp, IrInstSrcContainerInitList *instruction) {
     fprintf(irp->f, "{");
     if (instruction->item_count > 50) {
         fprintf(irp->f, "...(%" ZIG_PRI_usize " items)...", instruction->item_count);
     } else {
         for (size_t i = 0; i < instruction->item_count; i += 1) {
-            IrInstruction *result_loc = instruction->elem_result_loc_list[i];
+            IrInstSrc *result_loc = instruction->elem_result_loc_list[i];
             if (i != 0)
                 fprintf(irp->f, ", ");
-            ir_print_other_instruction(irp, result_loc);
+            ir_print_other_inst_src(irp, result_loc);
         }
     }
     fprintf(irp->f, "}result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_src(irp, instruction->result_loc);
 }
 
-static void ir_print_container_init_fields(IrPrint *irp, IrInstructionContainerInitFields *instruction) {
+static void ir_print_container_init_fields(IrPrintSrc *irp, IrInstSrcContainerInitFields *instruction) {
     fprintf(irp->f, "{");
     for (size_t i = 0; i < instruction->field_count; i += 1) {
-        IrInstructionContainerInitFieldsField *field = &instruction->fields[i];
+        IrInstSrcContainerInitFieldsField *field = &instruction->fields[i];
         const char *comma = (i == 0) ? "" : ", ";
         fprintf(irp->f, "%s.%s = ", comma, buf_ptr(field->name));
-        ir_print_other_instruction(irp, field->result_loc);
+        ir_print_other_inst_src(irp, field->result_loc);
     }
     fprintf(irp->f, "}result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_src(irp, instruction->result_loc);
 }
 
-static void ir_print_unreachable(IrPrint *irp, IrInstructionUnreachable *instruction) {
+static void ir_print_unreachable(IrPrintSrc *irp, IrInstSrcUnreachable *instruction) {
     fprintf(irp->f, "unreachable");
 }
 
-static void ir_print_elem_ptr(IrPrint *irp, IrInstructionElemPtr *instruction) {
+static void ir_print_unreachable(IrPrintGen *irp, IrInstGenUnreachable *instruction) {
+    fprintf(irp->f, "unreachable");
+}
+
+static void ir_print_elem_ptr(IrPrintSrc *irp, IrInstSrcElemPtr *instruction) {
+    fprintf(irp->f, "&");
+    ir_print_other_inst_src(irp, instruction->array_ptr);
+    fprintf(irp->f, "[");
+    ir_print_other_inst_src(irp, instruction->elem_index);
+    fprintf(irp->f, "]");
+    if (!instruction->safety_check_on) {
+        fprintf(irp->f, " // no safety");
+    }
+}
+
+static void ir_print_elem_ptr(IrPrintGen *irp, IrInstGenElemPtr *instruction) {
     fprintf(irp->f, "&");
-    ir_print_other_instruction(irp, instruction->array_ptr);
+    ir_print_other_inst_gen(irp, instruction->array_ptr);
     fprintf(irp->f, "[");
-    ir_print_other_instruction(irp, instruction->elem_index);
+    ir_print_other_inst_gen(irp, instruction->elem_index);
     fprintf(irp->f, "]");
     if (!instruction->safety_check_on) {
         fprintf(irp->f, " // no safety");
     }
 }
 
-static void ir_print_var_ptr(IrPrint *irp, IrInstructionVarPtr *instruction) {
+static void ir_print_var_ptr(IrPrintSrc *irp, IrInstSrcVarPtr *instruction) {
+    fprintf(irp->f, "&%s", instruction->var->name);
+}
+
+static void ir_print_var_ptr(IrPrintGen *irp, IrInstGenVarPtr *instruction) {
     fprintf(irp->f, "&%s", instruction->var->name);
 }
 
-static void ir_print_return_ptr(IrPrint *irp, IrInstructionReturnPtr *instruction) {
+static void ir_print_return_ptr(IrPrintGen *irp, IrInstGenReturnPtr *instruction) {
     fprintf(irp->f, "@ReturnPtr");
 }
 
-static void ir_print_load_ptr(IrPrint *irp, IrInstructionLoadPtr *instruction) {
-    ir_print_other_instruction(irp, instruction->ptr);
+static void ir_print_load_ptr(IrPrintSrc *irp, IrInstSrcLoadPtr *instruction) {
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ".*");
 }
 
-static void ir_print_load_ptr_gen(IrPrint *irp, IrInstructionLoadPtrGen *instruction) {
+static void ir_print_load_ptr_gen(IrPrintGen *irp, IrInstGenLoadPtr *instruction) {
     fprintf(irp->f, "loadptr(");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_gen(irp, instruction->ptr);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_store_ptr(IrPrint *irp, IrInstructionStorePtr *instruction) {
+static void ir_print_store_ptr(IrPrintSrc *irp, IrInstSrcStorePtr *instruction) {
     fprintf(irp->f, "*");
-    ir_print_var_instruction(irp, instruction->ptr);
+    ir_print_var_src(irp, instruction->ptr);
     fprintf(irp->f, " = ");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
 }
 
-static void ir_print_vector_store_elem(IrPrint *irp, IrInstructionVectorStoreElem *instruction) {
+static void ir_print_store_ptr(IrPrintGen *irp, IrInstGenStorePtr *instruction) {
+    fprintf(irp->f, "*");
+    ir_print_var_gen(irp, instruction->ptr);
+    fprintf(irp->f, " = ");
+    ir_print_other_inst_gen(irp, instruction->value);
+}
+
+static void ir_print_vector_store_elem(IrPrintGen *irp, IrInstGenVectorStoreElem *instruction) {
     fprintf(irp->f, "vector_ptr=");
-    ir_print_var_instruction(irp, instruction->vector_ptr);
+    ir_print_var_gen(irp, instruction->vector_ptr);
     fprintf(irp->f, ",index=");
-    ir_print_var_instruction(irp, instruction->index);
+    ir_print_var_gen(irp, instruction->index);
     fprintf(irp->f, ",value=");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_gen(irp, instruction->value);
 }
 
-static void ir_print_typeof(IrPrint *irp, IrInstructionTypeOf *instruction) {
+static void ir_print_typeof(IrPrintSrc *irp, IrInstSrcTypeOf *instruction) {
     fprintf(irp->f, "@TypeOf(");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_field_ptr(IrPrint *irp, IrInstructionFieldPtr *instruction) {
+static void ir_print_binary_not(IrPrintGen *irp, IrInstGenBinaryNot *instruction) {
+    fprintf(irp->f, "~");
+    ir_print_other_inst_gen(irp, instruction->operand);
+}
+
+static void ir_print_negation(IrPrintGen *irp, IrInstGenNegation *instruction) {
+    fprintf(irp->f, "-");
+    ir_print_other_inst_gen(irp, instruction->operand);
+}
+
+static void ir_print_negation_wrapping(IrPrintGen *irp, IrInstGenNegationWrapping *instruction) {
+    fprintf(irp->f, "-%%");
+    ir_print_other_inst_gen(irp, instruction->operand);
+}
+
+
+static void ir_print_field_ptr(IrPrintSrc *irp, IrInstSrcFieldPtr *instruction) {
     if (instruction->field_name_buffer) {
         fprintf(irp->f, "fieldptr ");
-        ir_print_other_instruction(irp, instruction->container_ptr);
+        ir_print_other_inst_src(irp, instruction->container_ptr);
         fprintf(irp->f, ".%s", buf_ptr(instruction->field_name_buffer));
     } else {
         assert(instruction->field_name_expr);
         fprintf(irp->f, "@field(");
-        ir_print_other_instruction(irp, instruction->container_ptr);
+        ir_print_other_inst_src(irp, instruction->container_ptr);
         fprintf(irp->f, ", ");
-        ir_print_other_instruction(irp, instruction->field_name_expr);
+        ir_print_other_inst_src(irp, instruction->field_name_expr);
         fprintf(irp->f, ")");
     }
 }
 
-static void ir_print_struct_field_ptr(IrPrint *irp, IrInstructionStructFieldPtr *instruction) {
+static void ir_print_struct_field_ptr(IrPrintGen *irp, IrInstGenStructFieldPtr *instruction) {
     fprintf(irp->f, "@StructFieldPtr(&");
-    ir_print_other_instruction(irp, instruction->struct_ptr);
+    ir_print_other_inst_gen(irp, instruction->struct_ptr);
     fprintf(irp->f, ".%s", buf_ptr(instruction->field->name));
     fprintf(irp->f, ")");
 }
 
-static void ir_print_union_field_ptr(IrPrint *irp, IrInstructionUnionFieldPtr *instruction) {
+static void ir_print_union_field_ptr(IrPrintGen *irp, IrInstGenUnionFieldPtr *instruction) {
     fprintf(irp->f, "@UnionFieldPtr(&");
-    ir_print_other_instruction(irp, instruction->union_ptr);
+    ir_print_other_inst_gen(irp, instruction->union_ptr);
     fprintf(irp->f, ".%s", buf_ptr(instruction->field->enum_field->name));
     fprintf(irp->f, ")");
 }
 
-static void ir_print_set_cold(IrPrint *irp, IrInstructionSetCold *instruction) {
+static void ir_print_set_cold(IrPrintSrc *irp, IrInstSrcSetCold *instruction) {
     fprintf(irp->f, "@setCold(");
-    ir_print_other_instruction(irp, instruction->is_cold);
+    ir_print_other_inst_src(irp, instruction->is_cold);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_set_runtime_safety(IrPrint *irp, IrInstructionSetRuntimeSafety *instruction) {
+static void ir_print_set_runtime_safety(IrPrintSrc *irp, IrInstSrcSetRuntimeSafety *instruction) {
     fprintf(irp->f, "@setRuntimeSafety(");
-    ir_print_other_instruction(irp, instruction->safety_on);
+    ir_print_other_inst_src(irp, instruction->safety_on);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_set_float_mode(IrPrint *irp, IrInstructionSetFloatMode *instruction) {
+static void ir_print_set_float_mode(IrPrintSrc *irp, IrInstSrcSetFloatMode *instruction) {
     fprintf(irp->f, "@setFloatMode(");
-    ir_print_other_instruction(irp, instruction->scope_value);
+    ir_print_other_inst_src(irp, instruction->scope_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->mode_value);
+    ir_print_other_inst_src(irp, instruction->mode_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_array_type(IrPrint *irp, IrInstructionArrayType *instruction) {
+static void ir_print_array_type(IrPrintSrc *irp, IrInstSrcArrayType *instruction) {
     fprintf(irp->f, "[");
-    ir_print_other_instruction(irp, instruction->size);
+    ir_print_other_inst_src(irp, instruction->size);
     if (instruction->sentinel != nullptr) {
         fprintf(irp->f, ":");
-        ir_print_other_instruction(irp, instruction->sentinel);
+        ir_print_other_inst_src(irp, instruction->sentinel);
     }
     fprintf(irp->f, "]");
-    ir_print_other_instruction(irp, instruction->child_type);
+    ir_print_other_inst_src(irp, instruction->child_type);
 }
 
-static void ir_print_slice_type(IrPrint *irp, IrInstructionSliceType *instruction) {
+static void ir_print_slice_type(IrPrintSrc *irp, IrInstSrcSliceType *instruction) {
     const char *const_kw = instruction->is_const ? "const " : "";
     fprintf(irp->f, "[]%s", const_kw);
-    ir_print_other_instruction(irp, instruction->child_type);
+    ir_print_other_inst_src(irp, instruction->child_type);
 }
 
-static void ir_print_any_frame_type(IrPrint *irp, IrInstructionAnyFrameType *instruction) {
+static void ir_print_any_frame_type(IrPrintSrc *irp, IrInstSrcAnyFrameType *instruction) {
     if (instruction->payload_type == nullptr) {
         fprintf(irp->f, "anyframe");
     } else {
         fprintf(irp->f, "anyframe->");
-        ir_print_other_instruction(irp, instruction->payload_type);
+        ir_print_other_inst_src(irp, instruction->payload_type);
     }
 }
 
-static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
-    assert(instruction->base.source_node->type == NodeTypeAsmExpr);
-    AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
+static void ir_print_asm_src(IrPrintSrc *irp, IrInstSrcAsm *instruction) {
+    assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
+    AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
     const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
     fprintf(irp->f, "asm%s (", volatile_kw);
-    ir_print_other_instruction(irp, instruction->asm_template);
+    ir_print_other_inst_src(irp, instruction->asm_template);
 
     for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
         AsmOutput *asm_output = asm_expr->output_list.at(i);
@@ -969,7 +1250,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
                 buf_ptr(asm_output->constraint));
         if (asm_output->return_type) {
             fprintf(irp->f, "-> ");
-            ir_print_other_instruction(irp, instruction->output_types[i]);
+            ir_print_other_inst_src(irp, instruction->output_types[i]);
         } else {
             fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
         }
@@ -984,7 +1265,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
         fprintf(irp->f, "[%s] \"%s\" (",
                 buf_ptr(asm_input->asm_symbolic_name),
                 buf_ptr(asm_input->constraint));
-        ir_print_other_instruction(irp, instruction->input_list[i]);
+        ir_print_other_inst_src(irp, instruction->input_list[i]);
         fprintf(irp->f, ")");
     }
     fprintf(irp->f, " : ");
@@ -996,9 +1277,9 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
     fprintf(irp->f, ")");
 }
 
-static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
-    assert(instruction->base.source_node->type == NodeTypeAsmExpr);
-    AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
+static void ir_print_asm_gen(IrPrintGen *irp, IrInstGenAsm *instruction) {
+    assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
+    AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
     const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
     fprintf(irp->f, "asm%s (\"%s\") : ", volatile_kw, buf_ptr(instruction->asm_template));
 
@@ -1011,7 +1292,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
                 buf_ptr(asm_output->constraint));
         if (asm_output->return_type) {
             fprintf(irp->f, "-> ");
-            ir_print_other_instruction(irp, instruction->output_types[i]);
+            ir_print_other_inst_gen(irp, instruction->output_types[i]);
         } else {
             fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
         }
@@ -1026,7 +1307,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
         fprintf(irp->f, "[%s] \"%s\" (",
                 buf_ptr(asm_input->asm_symbolic_name),
                 buf_ptr(asm_input->constraint));
-        ir_print_other_instruction(irp, instruction->input_list[i]);
+        ir_print_other_inst_gen(irp, instruction->input_list[i]);
         fprintf(irp->f, ")");
     }
     fprintf(irp->f, " : ");
@@ -1038,96 +1319,120 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
     fprintf(irp->f, ")");
 }
 
-static void ir_print_size_of(IrPrint *irp, IrInstructionSizeOf *instruction) {
+static void ir_print_size_of(IrPrintSrc *irp, IrInstSrcSizeOf *instruction) {
     if (instruction->bit_size)
         fprintf(irp->f, "@bitSizeOf(");
     else
         fprintf(irp->f, "@sizeOf(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_test_non_null(IrPrint *irp, IrInstructionTestNonNull *instruction) {
-    ir_print_other_instruction(irp, instruction->value);
+static void ir_print_test_non_null(IrPrintSrc *irp, IrInstSrcTestNonNull *instruction) {
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, " != null");
 }
 
-static void ir_print_optional_unwrap_ptr(IrPrint *irp, IrInstructionOptionalUnwrapPtr *instruction) {
+static void ir_print_test_non_null(IrPrintGen *irp, IrInstGenTestNonNull *instruction) {
+    ir_print_other_inst_gen(irp, instruction->value);
+    fprintf(irp->f, " != null");
+}
+
+static void ir_print_optional_unwrap_ptr(IrPrintSrc *irp, IrInstSrcOptionalUnwrapPtr *instruction) {
     fprintf(irp->f, "&");
-    ir_print_other_instruction(irp, instruction->base_ptr);
+    ir_print_other_inst_src(irp, instruction->base_ptr);
     fprintf(irp->f, ".*.?");
     if (!instruction->safety_check_on) {
         fprintf(irp->f, " // no safety");
     }
 }
 
-static void ir_print_clz(IrPrint *irp, IrInstructionClz *instruction) {
-    fprintf(irp->f, "@clz(");
-    if (instruction->type != nullptr) {
-        ir_print_other_instruction(irp, instruction->type);
-    } else {
-        fprintf(irp->f, "null");
+static void ir_print_optional_unwrap_ptr(IrPrintGen *irp, IrInstGenOptionalUnwrapPtr *instruction) {
+    fprintf(irp->f, "&");
+    ir_print_other_inst_gen(irp, instruction->base_ptr);
+    fprintf(irp->f, ".*.?");
+    if (!instruction->safety_check_on) {
+        fprintf(irp->f, " // no safety");
     }
+}
+
+static void ir_print_clz(IrPrintSrc *irp, IrInstSrcClz *instruction) {
+    fprintf(irp->f, "@clz(");
+    ir_print_other_inst_src(irp, instruction->type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op);
+    ir_print_other_inst_src(irp, instruction->op);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_ctz(IrPrint *irp, IrInstructionCtz *instruction) {
+static void ir_print_clz(IrPrintGen *irp, IrInstGenClz *instruction) {
+    fprintf(irp->f, "@clz(");
+    ir_print_other_inst_gen(irp, instruction->op);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_ctz(IrPrintSrc *irp, IrInstSrcCtz *instruction) {
     fprintf(irp->f, "@ctz(");
-    if (instruction->type != nullptr) {
-        ir_print_other_instruction(irp, instruction->type);
-    } else {
-        fprintf(irp->f, "null");
-    }
+    ir_print_other_inst_src(irp, instruction->type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op);
+    ir_print_other_inst_src(irp, instruction->op);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_pop_count(IrPrint *irp, IrInstructionPopCount *instruction) {
+static void ir_print_ctz(IrPrintGen *irp, IrInstGenCtz *instruction) {
+    fprintf(irp->f, "@ctz(");
+    ir_print_other_inst_gen(irp, instruction->op);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_pop_count(IrPrintSrc *irp, IrInstSrcPopCount *instruction) {
     fprintf(irp->f, "@popCount(");
-    if (instruction->type != nullptr) {
-        ir_print_other_instruction(irp, instruction->type);
-    } else {
-        fprintf(irp->f, "null");
-    }
+    ir_print_other_inst_src(irp, instruction->type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op);
+    ir_print_other_inst_src(irp, instruction->op);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_bswap(IrPrint *irp, IrInstructionBswap *instruction) {
+static void ir_print_pop_count(IrPrintGen *irp, IrInstGenPopCount *instruction) {
+    fprintf(irp->f, "@popCount(");
+    ir_print_other_inst_gen(irp, instruction->op);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_bswap(IrPrintSrc *irp, IrInstSrcBswap *instruction) {
     fprintf(irp->f, "@byteSwap(");
-    if (instruction->type != nullptr) {
-        ir_print_other_instruction(irp, instruction->type);
-    } else {
-        fprintf(irp->f, "null");
-    }
+    ir_print_other_inst_src(irp, instruction->type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op);
+    ir_print_other_inst_src(irp, instruction->op);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_bit_reverse(IrPrint *irp, IrInstructionBitReverse *instruction) {
+static void ir_print_bswap(IrPrintGen *irp, IrInstGenBswap *instruction) {
+    fprintf(irp->f, "@byteSwap(");
+    ir_print_other_inst_gen(irp, instruction->op);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_bit_reverse(IrPrintSrc *irp, IrInstSrcBitReverse *instruction) {
     fprintf(irp->f, "@bitReverse(");
-    if (instruction->type != nullptr) {
-        ir_print_other_instruction(irp, instruction->type);
-    } else {
-        fprintf(irp->f, "null");
-    }
+    ir_print_other_inst_src(irp, instruction->type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op);
+    ir_print_other_inst_src(irp, instruction->op);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_bit_reverse(IrPrintGen *irp, IrInstGenBitReverse *instruction) {
+    fprintf(irp->f, "@bitReverse(");
+    ir_print_other_inst_gen(irp, instruction->op);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction) {
+static void ir_print_switch_br(IrPrintSrc *irp, IrInstSrcSwitchBr *instruction) {
     fprintf(irp->f, "switch (");
-    ir_print_other_instruction(irp, instruction->target_value);
+    ir_print_other_inst_src(irp, instruction->target_value);
     fprintf(irp->f, ") ");
     for (size_t i = 0; i < instruction->case_count; i += 1) {
-        IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
-        ir_print_other_instruction(irp, this_case->value);
+        IrInstSrcSwitchBrCase *this_case = &instruction->cases[i];
+        ir_print_other_inst_src(irp, this_case->value);
         fprintf(irp->f, " => ");
         ir_print_other_block(irp, this_case->block);
         fprintf(irp->f, ", ");
@@ -1136,359 +1441,453 @@ static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction)
     ir_print_other_block(irp, instruction->else_block);
     if (instruction->is_comptime != nullptr) {
         fprintf(irp->f, " // comptime = ");
-        ir_print_other_instruction(irp, instruction->is_comptime);
+        ir_print_other_inst_src(irp, instruction->is_comptime);
     }
 }
 
-static void ir_print_switch_var(IrPrint *irp, IrInstructionSwitchVar *instruction) {
+static void ir_print_switch_br(IrPrintGen *irp, IrInstGenSwitchBr *instruction) {
+    fprintf(irp->f, "switch (");
+    ir_print_other_inst_gen(irp, instruction->target_value);
+    fprintf(irp->f, ") ");
+    for (size_t i = 0; i < instruction->case_count; i += 1) {
+        IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
+        ir_print_other_inst_gen(irp, this_case->value);
+        fprintf(irp->f, " => ");
+        ir_print_other_block_gen(irp, this_case->block);
+        fprintf(irp->f, ", ");
+    }
+    fprintf(irp->f, "else => ");
+    ir_print_other_block_gen(irp, instruction->else_block);
+}
+
+static void ir_print_switch_var(IrPrintSrc *irp, IrInstSrcSwitchVar *instruction) {
     fprintf(irp->f, "switchvar ");
-    ir_print_other_instruction(irp, instruction->target_value_ptr);
+    ir_print_other_inst_src(irp, instruction->target_value_ptr);
     for (size_t i = 0; i < instruction->prongs_len; i += 1) {
         fprintf(irp->f, ", ");
-        ir_print_other_instruction(irp, instruction->prongs_ptr[i]);
+        ir_print_other_inst_src(irp, instruction->prongs_ptr[i]);
     }
 }
 
-static void ir_print_switch_else_var(IrPrint *irp, IrInstructionSwitchElseVar *instruction) {
+static void ir_print_switch_else_var(IrPrintSrc *irp, IrInstSrcSwitchElseVar *instruction) {
     fprintf(irp->f, "switchelsevar ");
-    ir_print_other_instruction(irp, &instruction->switch_br->base);
+    ir_print_other_inst_src(irp, &instruction->switch_br->base);
 }
 
-static void ir_print_switch_target(IrPrint *irp, IrInstructionSwitchTarget *instruction) {
+static void ir_print_switch_target(IrPrintSrc *irp, IrInstSrcSwitchTarget *instruction) {
     fprintf(irp->f, "switchtarget ");
-    ir_print_other_instruction(irp, instruction->target_value_ptr);
+    ir_print_other_inst_src(irp, instruction->target_value_ptr);
 }
 
-static void ir_print_union_tag(IrPrint *irp, IrInstructionUnionTag *instruction) {
+static void ir_print_union_tag(IrPrintGen *irp, IrInstGenUnionTag *instruction) {
     fprintf(irp->f, "uniontag ");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_gen(irp, instruction->value);
 }
 
-static void ir_print_import(IrPrint *irp, IrInstructionImport *instruction) {
+static void ir_print_import(IrPrintSrc *irp, IrInstSrcImport *instruction) {
     fprintf(irp->f, "@import(");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_ref(IrPrint *irp, IrInstructionRef *instruction) {
+static void ir_print_ref(IrPrintSrc *irp, IrInstSrcRef *instruction) {
     const char *const_str = instruction->is_const ? "const " : "";
     const char *volatile_str = instruction->is_volatile ? "volatile " : "";
     fprintf(irp->f, "%s%sref ", const_str, volatile_str);
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
 }
 
-static void ir_print_ref_gen(IrPrint *irp, IrInstructionRefGen *instruction) {
+static void ir_print_ref_gen(IrPrintGen *irp, IrInstGenRef *instruction) {
     fprintf(irp->f, "@ref(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_compile_err(IrPrint *irp, IrInstructionCompileErr *instruction) {
+static void ir_print_compile_err(IrPrintSrc *irp, IrInstSrcCompileErr *instruction) {
     fprintf(irp->f, "@compileError(");
-    ir_print_other_instruction(irp, instruction->msg);
+    ir_print_other_inst_src(irp, instruction->msg);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_compile_log(IrPrint *irp, IrInstructionCompileLog *instruction) {
+static void ir_print_compile_log(IrPrintSrc *irp, IrInstSrcCompileLog *instruction) {
     fprintf(irp->f, "@compileLog(");
     for (size_t i = 0; i < instruction->msg_count; i += 1) {
         if (i != 0)
             fprintf(irp->f, ",");
-        IrInstruction *msg = instruction->msg_list[i];
-        ir_print_other_instruction(irp, msg);
+        IrInstSrc *msg = instruction->msg_list[i];
+        ir_print_other_inst_src(irp, msg);
     }
     fprintf(irp->f, ")");
 }
 
-static void ir_print_err_name(IrPrint *irp, IrInstructionErrName *instruction) {
+static void ir_print_err_name(IrPrintSrc *irp, IrInstSrcErrName *instruction) {
     fprintf(irp->f, "@errorName(");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_c_import(IrPrint *irp, IrInstructionCImport *instruction) {
+static void ir_print_err_name(IrPrintGen *irp, IrInstGenErrName *instruction) {
+    fprintf(irp->f, "@errorName(");
+    ir_print_other_inst_gen(irp, instruction->value);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_c_import(IrPrintSrc *irp, IrInstSrcCImport *instruction) {
     fprintf(irp->f, "@cImport(...)");
 }
 
-static void ir_print_c_include(IrPrint *irp, IrInstructionCInclude *instruction) {
+static void ir_print_c_include(IrPrintSrc *irp, IrInstSrcCInclude *instruction) {
     fprintf(irp->f, "@cInclude(");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_c_define(IrPrint *irp, IrInstructionCDefine *instruction) {
+static void ir_print_c_define(IrPrintSrc *irp, IrInstSrcCDefine *instruction) {
     fprintf(irp->f, "@cDefine(");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_c_undef(IrPrint *irp, IrInstructionCUndef *instruction) {
+static void ir_print_c_undef(IrPrintSrc *irp, IrInstSrcCUndef *instruction) {
     fprintf(irp->f, "@cUndef(");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_embed_file(IrPrint *irp, IrInstructionEmbedFile *instruction) {
+static void ir_print_embed_file(IrPrintSrc *irp, IrInstSrcEmbedFile *instruction) {
     fprintf(irp->f, "@embedFile(");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_cmpxchg_src(IrPrint *irp, IrInstructionCmpxchgSrc *instruction) {
+static void ir_print_cmpxchg_src(IrPrintSrc *irp, IrInstSrcCmpxchg *instruction) {
     fprintf(irp->f, "@cmpxchg(");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->cmp_value);
+    ir_print_other_inst_src(irp, instruction->cmp_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->new_value);
+    ir_print_other_inst_src(irp, instruction->new_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->success_order_value);
+    ir_print_other_inst_src(irp, instruction->success_order_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->failure_order_value);
+    ir_print_other_inst_src(irp, instruction->failure_order_value);
     fprintf(irp->f, ")result=");
     ir_print_result_loc(irp, instruction->result_loc);
 }
 
-static void ir_print_cmpxchg_gen(IrPrint *irp, IrInstructionCmpxchgGen *instruction) {
+static void ir_print_cmpxchg_gen(IrPrintGen *irp, IrInstGenCmpxchg *instruction) {
     fprintf(irp->f, "@cmpxchg(");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_gen(irp, instruction->ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->cmp_value);
+    ir_print_other_inst_gen(irp, instruction->cmp_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->new_value);
+    ir_print_other_inst_gen(irp, instruction->new_value);
     fprintf(irp->f, ", TODO print atomic orders)result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_fence(IrPrint *irp, IrInstructionFence *instruction) {
+static void ir_print_fence(IrPrintSrc *irp, IrInstSrcFence *instruction) {
     fprintf(irp->f, "@fence(");
-    ir_print_other_instruction(irp, instruction->order_value);
+    ir_print_other_inst_src(irp, instruction->order);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_truncate(IrPrint *irp, IrInstructionTruncate *instruction) {
+static const char *atomic_order_str(AtomicOrder order) {
+    switch (order) {
+        case AtomicOrderUnordered: return "Unordered";
+        case AtomicOrderMonotonic: return "Monotonic";
+        case AtomicOrderAcquire: return "Acquire";
+        case AtomicOrderRelease: return "Release";
+        case AtomicOrderAcqRel: return "AcqRel";
+        case AtomicOrderSeqCst: return "SeqCst";
+    }
+    zig_unreachable();
+}
+
+static void ir_print_fence(IrPrintGen *irp, IrInstGenFence *instruction) {
+    fprintf(irp->f, "fence %s", atomic_order_str(instruction->order));
+}
+
+static void ir_print_truncate(IrPrintSrc *irp, IrInstSrcTruncate *instruction) {
     fprintf(irp->f, "@truncate(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_cast(IrPrint *irp, IrInstructionIntCast *instruction) {
+static void ir_print_truncate(IrPrintGen *irp, IrInstGenTruncate *instruction) {
+    fprintf(irp->f, "@truncate(");
+    ir_print_other_inst_gen(irp, instruction->target);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_int_cast(IrPrintSrc *irp, IrInstSrcIntCast *instruction) {
     fprintf(irp->f, "@intCast(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_float_cast(IrPrint *irp, IrInstructionFloatCast *instruction) {
+static void ir_print_float_cast(IrPrintSrc *irp, IrInstSrcFloatCast *instruction) {
     fprintf(irp->f, "@floatCast(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_err_set_cast(IrPrint *irp, IrInstructionErrSetCast *instruction) {
+static void ir_print_err_set_cast(IrPrintSrc *irp, IrInstSrcErrSetCast *instruction) {
     fprintf(irp->f, "@errSetCast(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_from_bytes(IrPrint *irp, IrInstructionFromBytes *instruction) {
+static void ir_print_from_bytes(IrPrintSrc *irp, IrInstSrcFromBytes *instruction) {
     fprintf(irp->f, "@bytesToSlice(");
-    ir_print_other_instruction(irp, instruction->dest_child_type);
+    ir_print_other_inst_src(irp, instruction->dest_child_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_to_bytes(IrPrint *irp, IrInstructionToBytes *instruction) {
+static void ir_print_to_bytes(IrPrintSrc *irp, IrInstSrcToBytes *instruction) {
     fprintf(irp->f, "@sliceToBytes(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_to_float(IrPrint *irp, IrInstructionIntToFloat *instruction) {
+static void ir_print_int_to_float(IrPrintSrc *irp, IrInstSrcIntToFloat *instruction) {
     fprintf(irp->f, "@intToFloat(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_float_to_int(IrPrint *irp, IrInstructionFloatToInt *instruction) {
+static void ir_print_float_to_int(IrPrintSrc *irp, IrInstSrcFloatToInt *instruction) {
     fprintf(irp->f, "@floatToInt(");
-    ir_print_other_instruction(irp, instruction->dest_type);
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_bool_to_int(IrPrint *irp, IrInstructionBoolToInt *instruction) {
+static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instruction) {
     fprintf(irp->f, "@boolToInt(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_type(IrPrint *irp, IrInstructionIntType *instruction) {
+static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
     fprintf(irp->f, "@IntType(");
-    ir_print_other_instruction(irp, instruction->is_signed);
+    ir_print_other_inst_src(irp, instruction->is_signed);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->bit_count);
+    ir_print_other_inst_src(irp, instruction->bit_count);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_vector_type(IrPrint *irp, IrInstructionVectorType *instruction) {
+static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
     fprintf(irp->f, "@Vector(");
-    ir_print_other_instruction(irp, instruction->len);
+    ir_print_other_inst_src(irp, instruction->len);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->elem_type);
+    ir_print_other_inst_src(irp, instruction->elem_type);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *instruction) {
+static void ir_print_shuffle_vector(IrPrintSrc *irp, IrInstSrcShuffleVector *instruction) {
     fprintf(irp->f, "@shuffle(");
-    ir_print_other_instruction(irp, instruction->scalar_type);
+    ir_print_other_inst_src(irp, instruction->scalar_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->a);
+    ir_print_other_inst_src(irp, instruction->a);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->b);
+    ir_print_other_inst_src(irp, instruction->b);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->mask);
+    ir_print_other_inst_src(irp, instruction->mask);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {
+static void ir_print_shuffle_vector(IrPrintGen *irp, IrInstGenShuffleVector *instruction) {
+    fprintf(irp->f, "@shuffle(");
+    ir_print_other_inst_gen(irp, instruction->a);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->b);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->mask);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_splat_src(IrPrintSrc *irp, IrInstSrcSplat *instruction) {
     fprintf(irp->f, "@splat(");
-    ir_print_other_instruction(irp, instruction->len);
+    ir_print_other_inst_src(irp, instruction->len);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->scalar);
+    ir_print_other_inst_src(irp, instruction->scalar);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {
+static void ir_print_splat_gen(IrPrintGen *irp, IrInstGenSplat *instruction) {
     fprintf(irp->f, "@splat(");
-    ir_print_other_instruction(irp, instruction->scalar);
+    ir_print_other_inst_gen(irp, instruction->scalar);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {
+static void ir_print_bool_not(IrPrintSrc *irp, IrInstSrcBoolNot *instruction) {
     fprintf(irp->f, "! ");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
 }
 
-static void ir_print_memset(IrPrint *irp, IrInstructionMemset *instruction) {
+static void ir_print_bool_not(IrPrintGen *irp, IrInstGenBoolNot *instruction) {
+    fprintf(irp->f, "! ");
+    ir_print_other_inst_gen(irp, instruction->value);
+}
+
+static void ir_print_memset(IrPrintSrc *irp, IrInstSrcMemset *instruction) {
     fprintf(irp->f, "@memset(");
-    ir_print_other_instruction(irp, instruction->dest_ptr);
+    ir_print_other_inst_src(irp, instruction->dest_ptr);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_src(irp, instruction->byte);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_src(irp, instruction->count);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_memset(IrPrintGen *irp, IrInstGenMemset *instruction) {
+    fprintf(irp->f, "@memset(");
+    ir_print_other_inst_gen(irp, instruction->dest_ptr);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->byte);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->count);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_memcpy(IrPrintSrc *irp, IrInstSrcMemcpy *instruction) {
+    fprintf(irp->f, "@memcpy(");
+    ir_print_other_inst_src(irp, instruction->dest_ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->byte);
+    ir_print_other_inst_src(irp, instruction->src_ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->count);
+    ir_print_other_inst_src(irp, instruction->count);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_memcpy(IrPrint *irp, IrInstructionMemcpy *instruction) {
+static void ir_print_memcpy(IrPrintGen *irp, IrInstGenMemcpy *instruction) {
     fprintf(irp->f, "@memcpy(");
-    ir_print_other_instruction(irp, instruction->dest_ptr);
+    ir_print_other_inst_gen(irp, instruction->dest_ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->src_ptr);
+    ir_print_other_inst_gen(irp, instruction->src_ptr);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->count);
+    ir_print_other_inst_gen(irp, instruction->count);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_slice_src(IrPrint *irp, IrInstructionSliceSrc *instruction) {
-    ir_print_other_instruction(irp, instruction->ptr);
+static void ir_print_slice_src(IrPrintSrc *irp, IrInstSrcSlice *instruction) {
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, "[");
-    ir_print_other_instruction(irp, instruction->start);
+    ir_print_other_inst_src(irp, instruction->start);
     fprintf(irp->f, "..");
     if (instruction->end)
-        ir_print_other_instruction(irp, instruction->end);
+        ir_print_other_inst_src(irp, instruction->end);
     fprintf(irp->f, "]result=");
     ir_print_result_loc(irp, instruction->result_loc);
 }
 
-static void ir_print_slice_gen(IrPrint *irp, IrInstructionSliceGen *instruction) {
-    ir_print_other_instruction(irp, instruction->ptr);
+static void ir_print_slice_gen(IrPrintGen *irp, IrInstGenSlice *instruction) {
+    ir_print_other_inst_gen(irp, instruction->ptr);
     fprintf(irp->f, "[");
-    ir_print_other_instruction(irp, instruction->start);
+    ir_print_other_inst_gen(irp, instruction->start);
     fprintf(irp->f, "..");
     if (instruction->end)
-        ir_print_other_instruction(irp, instruction->end);
+        ir_print_other_inst_gen(irp, instruction->end);
     fprintf(irp->f, "]result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_member_count(IrPrint *irp, IrInstructionMemberCount *instruction) {
+static void ir_print_member_count(IrPrintSrc *irp, IrInstSrcMemberCount *instruction) {
     fprintf(irp->f, "@memberCount(");
-    ir_print_other_instruction(irp, instruction->container);
+    ir_print_other_inst_src(irp, instruction->container);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_member_type(IrPrint *irp, IrInstructionMemberType *instruction) {
+static void ir_print_member_type(IrPrintSrc *irp, IrInstSrcMemberType *instruction) {
     fprintf(irp->f, "@memberType(");
-    ir_print_other_instruction(irp, instruction->container_type);
+    ir_print_other_inst_src(irp, instruction->container_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->member_index);
+    ir_print_other_inst_src(irp, instruction->member_index);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_member_name(IrPrint *irp, IrInstructionMemberName *instruction) {
+static void ir_print_member_name(IrPrintSrc *irp, IrInstSrcMemberName *instruction) {
     fprintf(irp->f, "@memberName(");
-    ir_print_other_instruction(irp, instruction->container_type);
+    ir_print_other_inst_src(irp, instruction->container_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->member_index);
+    ir_print_other_inst_src(irp, instruction->member_index);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_breakpoint(IrPrint *irp, IrInstructionBreakpoint *instruction) {
+static void ir_print_breakpoint(IrPrintSrc *irp, IrInstSrcBreakpoint *instruction) {
     fprintf(irp->f, "@breakpoint()");
 }
 
-static void ir_print_frame_address(IrPrint *irp, IrInstructionFrameAddress *instruction) {
+static void ir_print_breakpoint(IrPrintGen *irp, IrInstGenBreakpoint *instruction) {
+    fprintf(irp->f, "@breakpoint()");
+}
+
+static void ir_print_frame_address(IrPrintSrc *irp, IrInstSrcFrameAddress *instruction) {
     fprintf(irp->f, "@frameAddress()");
 }
 
-static void ir_print_handle(IrPrint *irp, IrInstructionFrameHandle *instruction) {
+static void ir_print_frame_address(IrPrintGen *irp, IrInstGenFrameAddress *instruction) {
+    fprintf(irp->f, "@frameAddress()");
+}
+
+static void ir_print_handle(IrPrintSrc *irp, IrInstSrcFrameHandle *instruction) {
+    fprintf(irp->f, "@frame()");
+}
+
+static void ir_print_handle(IrPrintGen *irp, IrInstGenFrameHandle *instruction) {
     fprintf(irp->f, "@frame()");
 }
 
-static void ir_print_frame_type(IrPrint *irp, IrInstructionFrameType *instruction) {
+static void ir_print_frame_type(IrPrintSrc *irp, IrInstSrcFrameType *instruction) {
     fprintf(irp->f, "@Frame(");
-    ir_print_other_instruction(irp, instruction->fn);
+    ir_print_other_inst_src(irp, instruction->fn);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_frame_size_src(IrPrint *irp, IrInstructionFrameSizeSrc *instruction) {
+static void ir_print_frame_size_src(IrPrintSrc *irp, IrInstSrcFrameSize *instruction) {
     fprintf(irp->f, "@frameSize(");
-    ir_print_other_instruction(irp, instruction->fn);
+    ir_print_other_inst_src(irp, instruction->fn);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_frame_size_gen(IrPrint *irp, IrInstructionFrameSizeGen *instruction) {
+static void ir_print_frame_size_gen(IrPrintGen *irp, IrInstGenFrameSize *instruction) {
     fprintf(irp->f, "@frameSize(");
-    ir_print_other_instruction(irp, instruction->fn);
+    ir_print_other_inst_gen(irp, instruction->fn);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_return_address(IrPrint *irp, IrInstructionReturnAddress *instruction) {
+static void ir_print_return_address(IrPrintSrc *irp, IrInstSrcReturnAddress *instruction) {
     fprintf(irp->f, "@returnAddress()");
 }
 
-static void ir_print_align_of(IrPrint *irp, IrInstructionAlignOf *instruction) {
+static void ir_print_return_address(IrPrintGen *irp, IrInstGenReturnAddress *instruction) {
+    fprintf(irp->f, "@returnAddress()");
+}
+
+static void ir_print_align_of(IrPrintSrc *irp, IrInstSrcAlignOf *instruction) {
     fprintf(irp->f, "@alignOf(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruction) {
+static void ir_print_overflow_op(IrPrintSrc *irp, IrInstSrcOverflowOp *instruction) {
     switch (instruction->op) {
         case IrOverflowOpAdd:
             fprintf(irp->f, "@addWithOverflow(");
@@ -1503,1146 +1902,1457 @@ static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruct
             fprintf(irp->f, "@shlWithOverflow(");
             break;
     }
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->op1);
+    ir_print_other_inst_src(irp, instruction->op1);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->op2);
+    ir_print_other_inst_src(irp, instruction->op2);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->result_ptr);
+    ir_print_other_inst_src(irp, instruction->result_ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_test_err_src(IrPrint *irp, IrInstructionTestErrSrc *instruction) {
+static void ir_print_overflow_op(IrPrintGen *irp, IrInstGenOverflowOp *instruction) {
+    switch (instruction->op) {
+        case IrOverflowOpAdd:
+            fprintf(irp->f, "@addWithOverflow(");
+            break;
+        case IrOverflowOpSub:
+            fprintf(irp->f, "@subWithOverflow(");
+            break;
+        case IrOverflowOpMul:
+            fprintf(irp->f, "@mulWithOverflow(");
+            break;
+        case IrOverflowOpShl:
+            fprintf(irp->f, "@shlWithOverflow(");
+            break;
+    }
+    ir_print_other_inst_gen(irp, instruction->op1);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->op2);
+    fprintf(irp->f, ", ");
+    ir_print_other_inst_gen(irp, instruction->result_ptr);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_test_err_src(IrPrintSrc *irp, IrInstSrcTestErr *instruction) {
     fprintf(irp->f, "@testError(");
-    ir_print_other_instruction(irp, instruction->base_ptr);
+    ir_print_other_inst_src(irp, instruction->base_ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_test_err_gen(IrPrint *irp, IrInstructionTestErrGen *instruction) {
+static void ir_print_test_err_gen(IrPrintGen *irp, IrInstGenTestErr *instruction) {
     fprintf(irp->f, "@testError(");
-    ir_print_other_instruction(irp, instruction->err_union);
+    ir_print_other_inst_gen(irp, instruction->err_union);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_unwrap_err_code(IrPrint *irp, IrInstructionUnwrapErrCode *instruction) {
+static void ir_print_unwrap_err_code(IrPrintSrc *irp, IrInstSrcUnwrapErrCode *instruction) {
     fprintf(irp->f, "UnwrapErrorCode(");
-    ir_print_other_instruction(irp, instruction->err_union_ptr);
+    ir_print_other_inst_src(irp, instruction->err_union_ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_unwrap_err_payload(IrPrint *irp, IrInstructionUnwrapErrPayload *instruction) {
+static void ir_print_unwrap_err_code(IrPrintGen *irp, IrInstGenUnwrapErrCode *instruction) {
+    fprintf(irp->f, "UnwrapErrorCode(");
+    ir_print_other_inst_gen(irp, instruction->err_union_ptr);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_unwrap_err_payload(IrPrintSrc *irp, IrInstSrcUnwrapErrPayload *instruction) {
+    fprintf(irp->f, "ErrorUnionFieldPayload(");
+    ir_print_other_inst_src(irp, instruction->value);
+    fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
+}
+
+static void ir_print_unwrap_err_payload(IrPrintGen *irp, IrInstGenUnwrapErrPayload *instruction) {
     fprintf(irp->f, "ErrorUnionFieldPayload(");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_gen(irp, instruction->value);
     fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
 }
 
-static void ir_print_optional_wrap(IrPrint *irp, IrInstructionOptionalWrap *instruction) {
+static void ir_print_optional_wrap(IrPrintGen *irp, IrInstGenOptionalWrap *instruction) {
     fprintf(irp->f, "@optionalWrap(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_err_wrap_code(IrPrint *irp, IrInstructionErrWrapCode *instruction) {
+static void ir_print_err_wrap_code(IrPrintGen *irp, IrInstGenErrWrapCode *instruction) {
     fprintf(irp->f, "@errWrapCode(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_err_wrap_payload(IrPrint *irp, IrInstructionErrWrapPayload *instruction) {
+static void ir_print_err_wrap_payload(IrPrintGen *irp, IrInstGenErrWrapPayload *instruction) {
     fprintf(irp->f, "@errWrapPayload(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_fn_proto(IrPrint *irp, IrInstructionFnProto *instruction) {
+static void ir_print_fn_proto(IrPrintSrc *irp, IrInstSrcFnProto *instruction) {
     fprintf(irp->f, "fn(");
-    for (size_t i = 0; i < instruction->base.source_node->data.fn_proto.params.length; i += 1) {
+    for (size_t i = 0; i < instruction->base.base.source_node->data.fn_proto.params.length; i += 1) {
         if (i != 0)
             fprintf(irp->f, ",");
-        if (instruction->is_var_args && i == instruction->base.source_node->data.fn_proto.params.length - 1) {
+        if (instruction->is_var_args && i == instruction->base.base.source_node->data.fn_proto.params.length - 1) {
             fprintf(irp->f, "...");
         } else {
-            ir_print_other_instruction(irp, instruction->param_types[i]);
+            ir_print_other_inst_src(irp, instruction->param_types[i]);
         }
     }
     fprintf(irp->f, ")");
     if (instruction->align_value != nullptr) {
         fprintf(irp->f, " align ");
-        ir_print_other_instruction(irp, instruction->align_value);
+        ir_print_other_inst_src(irp, instruction->align_value);
         fprintf(irp->f, " ");
     }
     fprintf(irp->f, "->");
-    ir_print_other_instruction(irp, instruction->return_type);
+    ir_print_other_inst_src(irp, instruction->return_type);
 }
 
-static void ir_print_test_comptime(IrPrint *irp, IrInstructionTestComptime *instruction) {
+static void ir_print_test_comptime(IrPrintSrc *irp, IrInstSrcTestComptime *instruction) {
     fprintf(irp->f, "@testComptime(");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_ptr_cast_src(IrPrint *irp, IrInstructionPtrCastSrc *instruction) {
+static void ir_print_ptr_cast_src(IrPrintSrc *irp, IrInstSrcPtrCast *instruction) {
     fprintf(irp->f, "@ptrCast(");
     if (instruction->dest_type) {
-        ir_print_other_instruction(irp, instruction->dest_type);
+        ir_print_other_inst_src(irp, instruction->dest_type);
     }
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_ptr_cast_gen(IrPrint *irp, IrInstructionPtrCastGen *instruction) {
+static void ir_print_ptr_cast_gen(IrPrintGen *irp, IrInstGenPtrCast *instruction) {
     fprintf(irp->f, "@ptrCast(");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_gen(irp, instruction->ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_implicit_cast(IrPrint *irp, IrInstructionImplicitCast *instruction) {
+static void ir_print_implicit_cast(IrPrintSrc *irp, IrInstSrcImplicitCast *instruction) {
     fprintf(irp->f, "@implicitCast(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, instruction->operand);
     fprintf(irp->f, ")result=");
     ir_print_result_loc(irp, &instruction->result_loc_cast->base);
 }
 
-static void ir_print_bit_cast_src(IrPrint *irp, IrInstructionBitCastSrc *instruction) {
+static void ir_print_bit_cast_src(IrPrintSrc *irp, IrInstSrcBitCast *instruction) {
     fprintf(irp->f, "@bitCast(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, instruction->operand);
     fprintf(irp->f, ")result=");
     ir_print_result_loc(irp, &instruction->result_loc_bit_cast->base);
 }
 
-static void ir_print_bit_cast_gen(IrPrint *irp, IrInstructionBitCastGen *instruction) {
+static void ir_print_bit_cast_gen(IrPrintGen *irp, IrInstGenBitCast *instruction) {
     fprintf(irp->f, "@bitCast(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_widen_or_shorten(IrPrint *irp, IrInstructionWidenOrShorten *instruction) {
+static void ir_print_widen_or_shorten(IrPrintGen *irp, IrInstGenWidenOrShorten *instruction) {
     fprintf(irp->f, "WidenOrShorten(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_gen(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_ptr_to_int(IrPrint *irp, IrInstructionPtrToInt *instruction) {
+static void ir_print_ptr_to_int(IrPrintSrc *irp, IrInstSrcPtrToInt *instruction) {
     fprintf(irp->f, "@ptrToInt(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_to_ptr(IrPrint *irp, IrInstructionIntToPtr *instruction) {
+static void ir_print_ptr_to_int(IrPrintGen *irp, IrInstGenPtrToInt *instruction) {
+    fprintf(irp->f, "@ptrToInt(");
+    ir_print_other_inst_gen(irp, instruction->target);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_int_to_ptr(IrPrintSrc *irp, IrInstSrcIntToPtr *instruction) {
     fprintf(irp->f, "@intToPtr(");
-    if (instruction->dest_type == nullptr) {
-        fprintf(irp->f, "(null)");
-    } else {
-        ir_print_other_instruction(irp, instruction->dest_type);
-    }
+    ir_print_other_inst_src(irp, instruction->dest_type);
+    fprintf(irp->f, ",");
+    ir_print_other_inst_src(irp, instruction->target);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_int_to_ptr(IrPrintGen *irp, IrInstGenIntToPtr *instruction) {
+    fprintf(irp->f, "@intToPtr(");
+    ir_print_other_inst_gen(irp, instruction->target);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_int_to_enum(IrPrintSrc *irp, IrInstSrcIntToEnum *instruction) {
+    fprintf(irp->f, "@intToEnum(");
+    ir_print_other_inst_src(irp, instruction->dest_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_to_enum(IrPrint *irp, IrInstructionIntToEnum *instruction) {
+static void ir_print_int_to_enum(IrPrintGen *irp, IrInstGenIntToEnum *instruction) {
     fprintf(irp->f, "@intToEnum(");
-    if (instruction->dest_type == nullptr) {
-        fprintf(irp->f, "(null)");
-    } else {
-        ir_print_other_instruction(irp, instruction->dest_type);
-    }
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_gen(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_enum_to_int(IrPrint *irp, IrInstructionEnumToInt *instruction) {
+static void ir_print_enum_to_int(IrPrintSrc *irp, IrInstSrcEnumToInt *instruction) {
     fprintf(irp->f, "@enumToInt(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_check_runtime_scope(IrPrint *irp, IrInstructionCheckRuntimeScope *instruction) {
+static void ir_print_check_runtime_scope(IrPrintSrc *irp, IrInstSrcCheckRuntimeScope *instruction) {
     fprintf(irp->f, "@checkRuntimeScope(");
-    ir_print_other_instruction(irp, instruction->scope_is_comptime);
+    ir_print_other_inst_src(irp, instruction->scope_is_comptime);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->is_comptime);
+    ir_print_other_inst_src(irp, instruction->is_comptime);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_array_to_vector(IrPrint *irp, IrInstructionArrayToVector *instruction) {
+static void ir_print_array_to_vector(IrPrintGen *irp, IrInstGenArrayToVector *instruction) {
     fprintf(irp->f, "ArrayToVector(");
-    ir_print_other_instruction(irp, instruction->array);
+    ir_print_other_inst_gen(irp, instruction->array);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_vector_to_array(IrPrint *irp, IrInstructionVectorToArray *instruction) {
+static void ir_print_vector_to_array(IrPrintGen *irp, IrInstGenVectorToArray *instruction) {
     fprintf(irp->f, "VectorToArray(");
-    ir_print_other_instruction(irp, instruction->vector);
+    ir_print_other_inst_gen(irp, instruction->vector);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_ptr_of_array_to_slice(IrPrint *irp, IrInstructionPtrOfArrayToSlice *instruction) {
+static void ir_print_ptr_of_array_to_slice(IrPrintGen *irp, IrInstGenPtrOfArrayToSlice *instruction) {
     fprintf(irp->f, "PtrOfArrayToSlice(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_assert_zero(IrPrint *irp, IrInstructionAssertZero *instruction) {
+static void ir_print_assert_zero(IrPrintGen *irp, IrInstGenAssertZero *instruction) {
     fprintf(irp->f, "AssertZero(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_gen(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_assert_non_null(IrPrint *irp, IrInstructionAssertNonNull *instruction) {
+static void ir_print_assert_non_null(IrPrintGen *irp, IrInstGenAssertNonNull *instruction) {
     fprintf(irp->f, "AssertNonNull(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_gen(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_resize_slice(IrPrint *irp, IrInstructionResizeSlice *instruction) {
+static void ir_print_resize_slice(IrPrintGen *irp, IrInstGenResizeSlice *instruction) {
     fprintf(irp->f, "@resizeSlice(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_gen(irp, instruction->operand);
     fprintf(irp->f, ")result=");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
 }
 
-static void ir_print_alloca_src(IrPrint *irp, IrInstructionAllocaSrc *instruction) {
+static void ir_print_alloca_src(IrPrintSrc *irp, IrInstSrcAlloca *instruction) {
     fprintf(irp->f, "Alloca(align=");
-    ir_print_other_instruction(irp, instruction->align);
+    ir_print_other_inst_src(irp, instruction->align);
     fprintf(irp->f, ",name=%s)", instruction->name_hint);
 }
 
-static void ir_print_alloca_gen(IrPrint *irp, IrInstructionAllocaGen *instruction) {
+static void ir_print_alloca_gen(IrPrintGen *irp, IrInstGenAlloca *instruction) {
     fprintf(irp->f, "Alloca(align=%" PRIu32 ",name=%s)", instruction->align, instruction->name_hint);
 }
 
-static void ir_print_end_expr(IrPrint *irp, IrInstructionEndExpr *instruction) {
+static void ir_print_end_expr(IrPrintSrc *irp, IrInstSrcEndExpr *instruction) {
     fprintf(irp->f, "EndExpr(result=");
     ir_print_result_loc(irp, instruction->result_loc);
     fprintf(irp->f, ",value=");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_int_to_err(IrPrint *irp, IrInstructionIntToErr *instruction) {
+static void ir_print_int_to_err(IrPrintSrc *irp, IrInstSrcIntToErr *instruction) {
     fprintf(irp->f, "inttoerr ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
 }
 
-static void ir_print_err_to_int(IrPrint *irp, IrInstructionErrToInt *instruction) {
+static void ir_print_int_to_err(IrPrintGen *irp, IrInstGenIntToErr *instruction) {
+    fprintf(irp->f, "inttoerr ");
+    ir_print_other_inst_gen(irp, instruction->target);
+}
+
+static void ir_print_err_to_int(IrPrintSrc *irp, IrInstSrcErrToInt *instruction) {
+    fprintf(irp->f, "errtoint ");
+    ir_print_other_inst_src(irp, instruction->target);
+}
+
+static void ir_print_err_to_int(IrPrintGen *irp, IrInstGenErrToInt *instruction) {
     fprintf(irp->f, "errtoint ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_gen(irp, instruction->target);
 }
 
-static void ir_print_check_switch_prongs(IrPrint *irp, IrInstructionCheckSwitchProngs *instruction) {
+static void ir_print_check_switch_prongs(IrPrintSrc *irp, IrInstSrcCheckSwitchProngs *instruction) {
     fprintf(irp->f, "@checkSwitchProngs(");
-    ir_print_other_instruction(irp, instruction->target_value);
+    ir_print_other_inst_src(irp, instruction->target_value);
     fprintf(irp->f, ",");
     for (size_t i = 0; i < instruction->range_count; i += 1) {
         if (i != 0)
             fprintf(irp->f, ",");
-        ir_print_other_instruction(irp, instruction->ranges[i].start);
+        ir_print_other_inst_src(irp, instruction->ranges[i].start);
         fprintf(irp->f, "...");
-        ir_print_other_instruction(irp, instruction->ranges[i].end);
+        ir_print_other_inst_src(irp, instruction->ranges[i].end);
     }
     const char *have_else_str = instruction->have_else_prong ? "yes" : "no";
     fprintf(irp->f, ")else:%s", have_else_str);
 }
 
-static void ir_print_check_statement_is_void(IrPrint *irp, IrInstructionCheckStatementIsVoid *instruction) {
+static void ir_print_check_statement_is_void(IrPrintSrc *irp, IrInstSrcCheckStatementIsVoid *instruction) {
     fprintf(irp->f, "@checkStatementIsVoid(");
-    ir_print_other_instruction(irp, instruction->statement_value);
+    ir_print_other_inst_src(irp, instruction->statement_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_type_name(IrPrint *irp, IrInstructionTypeName *instruction) {
+static void ir_print_type_name(IrPrintSrc *irp, IrInstSrcTypeName *instruction) {
     fprintf(irp->f, "typename ");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
 }
 
-static void ir_print_tag_name(IrPrint *irp, IrInstructionTagName *instruction) {
+static void ir_print_tag_name(IrPrintSrc *irp, IrInstSrcTagName *instruction) {
     fprintf(irp->f, "tagname ");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
 }
 
-static void ir_print_ptr_type(IrPrint *irp, IrInstructionPtrType *instruction) {
+static void ir_print_tag_name(IrPrintGen *irp, IrInstGenTagName *instruction) {
+    fprintf(irp->f, "tagname ");
+    ir_print_other_inst_gen(irp, instruction->target);
+}
+
+static void ir_print_ptr_type(IrPrintSrc *irp, IrInstSrcPtrType *instruction) {
     fprintf(irp->f, "&");
     if (instruction->align_value != nullptr) {
         fprintf(irp->f, "align(");
-        ir_print_other_instruction(irp, instruction->align_value);
+        ir_print_other_inst_src(irp, instruction->align_value);
         fprintf(irp->f, ")");
     }
     const char *const_str = instruction->is_const ? "const " : "";
     const char *volatile_str = instruction->is_volatile ? "volatile " : "";
     fprintf(irp->f, ":%" PRIu32 ":%" PRIu32 " %s%s", instruction->bit_offset_start, instruction->host_int_bytes,
             const_str, volatile_str);
-    ir_print_other_instruction(irp, instruction->child_type);
+    ir_print_other_inst_src(irp, instruction->child_type);
 }
 
-static void ir_print_decl_ref(IrPrint *irp, IrInstructionDeclRef *instruction) {
+static void ir_print_decl_ref(IrPrintSrc *irp, IrInstSrcDeclRef *instruction) {
     const char *ptr_str = (instruction->lval == LValPtr) ? "ptr " : "";
     fprintf(irp->f, "declref %s%s", ptr_str, buf_ptr(instruction->tld->name));
 }
 
-static void ir_print_panic(IrPrint *irp, IrInstructionPanic *instruction) {
+static void ir_print_panic(IrPrintSrc *irp, IrInstSrcPanic *instruction) {
     fprintf(irp->f, "@panic(");
-    ir_print_other_instruction(irp, instruction->msg);
+    ir_print_other_inst_src(irp, instruction->msg);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_field_parent_ptr(IrPrint *irp, IrInstructionFieldParentPtr *instruction) {
+static void ir_print_panic(IrPrintGen *irp, IrInstGenPanic *instruction) {
+    fprintf(irp->f, "@panic(");
+    ir_print_other_inst_gen(irp, instruction->msg);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_field_parent_ptr(IrPrintSrc *irp, IrInstSrcFieldParentPtr *instruction) {
     fprintf(irp->f, "@fieldParentPtr(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->field_name);
+    ir_print_other_inst_src(irp, instruction->field_name);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->field_ptr);
+    ir_print_other_inst_src(irp, instruction->field_ptr);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_byte_offset_of(IrPrint *irp, IrInstructionByteOffsetOf *instruction) {
+static void ir_print_field_parent_ptr(IrPrintGen *irp, IrInstGenFieldParentPtr *instruction) {
+    fprintf(irp->f, "@fieldParentPtr(%s,", buf_ptr(instruction->field->name));
+    ir_print_other_inst_gen(irp, instruction->field_ptr);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_byte_offset_of(IrPrintSrc *irp, IrInstSrcByteOffsetOf *instruction) {
     fprintf(irp->f, "@byte_offset_of(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->field_name);
+    ir_print_other_inst_src(irp, instruction->field_name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_bit_offset_of(IrPrint *irp, IrInstructionBitOffsetOf *instruction) {
+static void ir_print_bit_offset_of(IrPrintSrc *irp, IrInstSrcBitOffsetOf *instruction) {
     fprintf(irp->f, "@bit_offset_of(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->field_name);
+    ir_print_other_inst_src(irp, instruction->field_name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_type_info(IrPrint *irp, IrInstructionTypeInfo *instruction) {
+static void ir_print_type_info(IrPrintSrc *irp, IrInstSrcTypeInfo *instruction) {
     fprintf(irp->f, "@typeInfo(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_type(IrPrint *irp, IrInstructionType *instruction) {
+static void ir_print_type(IrPrintSrc *irp, IrInstSrcType *instruction) {
     fprintf(irp->f, "@Type(");
-    ir_print_other_instruction(irp, instruction->type_info);
+    ir_print_other_inst_src(irp, instruction->type_info);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_has_field(IrPrint *irp, IrInstructionHasField *instruction) {
+static void ir_print_has_field(IrPrintSrc *irp, IrInstSrcHasField *instruction) {
     fprintf(irp->f, "@hasField(");
-    ir_print_other_instruction(irp, instruction->container_type);
+    ir_print_other_inst_src(irp, instruction->container_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->field_name);
+    ir_print_other_inst_src(irp, instruction->field_name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_type_id(IrPrint *irp, IrInstructionTypeId *instruction) {
+static void ir_print_type_id(IrPrintSrc *irp, IrInstSrcTypeId *instruction) {
     fprintf(irp->f, "@typeId(");
-    ir_print_other_instruction(irp, instruction->type_value);
+    ir_print_other_inst_src(irp, instruction->type_value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_set_eval_branch_quota(IrPrint *irp, IrInstructionSetEvalBranchQuota *instruction) {
+static void ir_print_set_eval_branch_quota(IrPrintSrc *irp, IrInstSrcSetEvalBranchQuota *instruction) {
     fprintf(irp->f, "@setEvalBranchQuota(");
-    ir_print_other_instruction(irp, instruction->new_quota);
+    ir_print_other_inst_src(irp, instruction->new_quota);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_align_cast(IrPrint *irp, IrInstructionAlignCast *instruction) {
+static void ir_print_align_cast(IrPrintSrc *irp, IrInstSrcAlignCast *instruction) {
     fprintf(irp->f, "@alignCast(");
-    if (instruction->align_bytes == nullptr) {
-        fprintf(irp->f, "null");
-    } else {
-        ir_print_other_instruction(irp, instruction->align_bytes);
-    }
+    ir_print_other_inst_src(irp, instruction->align_bytes);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_resolve_result(IrPrint *irp, IrInstructionResolveResult *instruction) {
+static void ir_print_align_cast(IrPrintGen *irp, IrInstGenAlignCast *instruction) {
+    fprintf(irp->f, "@alignCast(");
+    ir_print_other_inst_gen(irp, instruction->target);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_resolve_result(IrPrintSrc *irp, IrInstSrcResolveResult *instruction) {
     fprintf(irp->f, "ResolveResult(");
     ir_print_result_loc(irp, instruction->result_loc);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_reset_result(IrPrint *irp, IrInstructionResetResult *instruction) {
+static void ir_print_reset_result(IrPrintSrc *irp, IrInstSrcResetResult *instruction) {
     fprintf(irp->f, "ResetResult(");
     ir_print_result_loc(irp, instruction->result_loc);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_opaque_type(IrPrint *irp, IrInstructionOpaqueType *instruction) {
+static void ir_print_opaque_type(IrPrintSrc *irp, IrInstSrcOpaqueType *instruction) {
     fprintf(irp->f, "@OpaqueType()");
 }
 
-static void ir_print_set_align_stack(IrPrint *irp, IrInstructionSetAlignStack *instruction) {
+static void ir_print_set_align_stack(IrPrintSrc *irp, IrInstSrcSetAlignStack *instruction) {
     fprintf(irp->f, "@setAlignStack(");
-    ir_print_other_instruction(irp, instruction->align_bytes);
+    ir_print_other_inst_src(irp, instruction->align_bytes);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_arg_type(IrPrint *irp, IrInstructionArgType *instruction) {
+static void ir_print_arg_type(IrPrintSrc *irp, IrInstSrcArgType *instruction) {
     fprintf(irp->f, "@ArgType(");
-    ir_print_other_instruction(irp, instruction->fn_type);
+    ir_print_other_inst_src(irp, instruction->fn_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->arg_index);
+    ir_print_other_inst_src(irp, instruction->arg_index);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_enum_tag_type(IrPrint *irp, IrInstructionTagType *instruction) {
+static void ir_print_enum_tag_type(IrPrintSrc *irp, IrInstSrcTagType *instruction) {
     fprintf(irp->f, "@TagType(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_export(IrPrint *irp, IrInstructionExport *instruction) {
+static void ir_print_export(IrPrintSrc *irp, IrInstSrcExport *instruction) {
     fprintf(irp->f, "@export(");
-    ir_print_other_instruction(irp, instruction->target);
+    ir_print_other_inst_src(irp, instruction->target);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->options);
+    ir_print_other_inst_src(irp, instruction->options);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_error_return_trace(IrPrint *irp, IrInstructionErrorReturnTrace *instruction) {
+static void ir_print_error_return_trace(IrPrintSrc *irp, IrInstSrcErrorReturnTrace *instruction) {
     fprintf(irp->f, "@errorReturnTrace(");
     switch (instruction->optional) {
-        case IrInstructionErrorReturnTrace::Null:
+        case IrInstErrorReturnTraceNull:
             fprintf(irp->f, "Null");
             break;
-        case IrInstructionErrorReturnTrace::NonNull:
+        case IrInstErrorReturnTraceNonNull:
             fprintf(irp->f, "NonNull");
             break;
     }
     fprintf(irp->f, ")");
 }
 
-static void ir_print_error_union(IrPrint *irp, IrInstructionErrorUnion *instruction) {
-    ir_print_other_instruction(irp, instruction->err_set);
+static void ir_print_error_return_trace(IrPrintGen *irp, IrInstGenErrorReturnTrace *instruction) {
+    fprintf(irp->f, "@errorReturnTrace(");
+    switch (instruction->optional) {
+        case IrInstErrorReturnTraceNull:
+            fprintf(irp->f, "Null");
+            break;
+        case IrInstErrorReturnTraceNonNull:
+            fprintf(irp->f, "NonNull");
+            break;
+    }
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_error_union(IrPrintSrc *irp, IrInstSrcErrorUnion *instruction) {
+    ir_print_other_inst_src(irp, instruction->err_set);
     fprintf(irp->f, "!");
-    ir_print_other_instruction(irp, instruction->payload);
+    ir_print_other_inst_src(irp, instruction->payload);
 }
 
-static void ir_print_atomic_rmw(IrPrint *irp, IrInstructionAtomicRmw *instruction) {
+static void ir_print_atomic_rmw(IrPrintSrc *irp, IrInstSrcAtomicRmw *instruction) {
     fprintf(irp->f, "@atomicRmw(");
-    if (instruction->operand_type != nullptr) {
-        ir_print_other_instruction(irp, instruction->operand_type);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->operand_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ",");
-    if (instruction->op != nullptr) {
-        ir_print_other_instruction(irp, instruction->op);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->op);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, instruction->operand);
     fprintf(irp->f, ",");
-    if (instruction->ordering != nullptr) {
-        ir_print_other_instruction(irp, instruction->ordering);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->ordering);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_atomic_load(IrPrint *irp, IrInstructionAtomicLoad *instruction) {
+static void ir_print_atomic_rmw(IrPrintGen *irp, IrInstGenAtomicRmw *instruction) {
+    fprintf(irp->f, "@atomicRmw(");
+    ir_print_other_inst_gen(irp, instruction->ptr);
+    fprintf(irp->f, ",[TODO print op],");
+    ir_print_other_inst_gen(irp, instruction->operand);
+    fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
+}
+
+static void ir_print_atomic_load(IrPrintSrc *irp, IrInstSrcAtomicLoad *instruction) {
     fprintf(irp->f, "@atomicLoad(");
-    if (instruction->operand_type != nullptr) {
-        ir_print_other_instruction(irp, instruction->operand_type);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->operand_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ",");
-    if (instruction->ordering != nullptr) {
-        ir_print_other_instruction(irp, instruction->ordering);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->ordering);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_atomic_store(IrPrint *irp, IrInstructionAtomicStore *instruction) {
+static void ir_print_atomic_load(IrPrintGen *irp, IrInstGenAtomicLoad *instruction) {
+    fprintf(irp->f, "@atomicLoad(");
+    ir_print_other_inst_gen(irp, instruction->ptr);
+    fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
+}
+
+static void ir_print_atomic_store(IrPrintSrc *irp, IrInstSrcAtomicStore *instruction) {
     fprintf(irp->f, "@atomicStore(");
-    if (instruction->operand_type != nullptr) {
-        ir_print_other_instruction(irp, instruction->operand_type);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->operand_type);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->ptr);
+    ir_print_other_inst_src(irp, instruction->ptr);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ",");
-    if (instruction->ordering != nullptr) {
-        ir_print_other_instruction(irp, instruction->ordering);
-    } else {
-        fprintf(irp->f, "[TODO print]");
-    }
+    ir_print_other_inst_src(irp, instruction->ordering);
     fprintf(irp->f, ")");
 }
 
+static void ir_print_atomic_store(IrPrintGen *irp, IrInstGenAtomicStore *instruction) {
+    fprintf(irp->f, "@atomicStore(");
+    ir_print_other_inst_gen(irp, instruction->ptr);
+    fprintf(irp->f, ",");
+    ir_print_other_inst_gen(irp, instruction->value);
+    fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
+}
+
+
+static void ir_print_save_err_ret_addr(IrPrintSrc *irp, IrInstSrcSaveErrRetAddr *instruction) {
+    fprintf(irp->f, "@saveErrRetAddr()");
+}
 
-static void ir_print_save_err_ret_addr(IrPrint *irp, IrInstructionSaveErrRetAddr *instruction) {
+static void ir_print_save_err_ret_addr(IrPrintGen *irp, IrInstGenSaveErrRetAddr *instruction) {
     fprintf(irp->f, "@saveErrRetAddr()");
 }
 
-static void ir_print_add_implicit_return_type(IrPrint *irp, IrInstructionAddImplicitReturnType *instruction) {
+static void ir_print_add_implicit_return_type(IrPrintSrc *irp, IrInstSrcAddImplicitReturnType *instruction) {
     fprintf(irp->f, "@addImplicitReturnType(");
-    ir_print_other_instruction(irp, instruction->value);
+    ir_print_other_inst_src(irp, instruction->value);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_float_op(IrPrint *irp, IrInstructionFloatOp *instruction) {
+static void ir_print_float_op(IrPrintSrc *irp, IrInstSrcFloatOp *instruction) {
     fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, instruction->operand);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_mul_add(IrPrint *irp, IrInstructionMulAdd *instruction) {
+static void ir_print_float_op(IrPrintGen *irp, IrInstGenFloatOp *instruction) {
+    fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
+    ir_print_other_inst_gen(irp, instruction->operand);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_mul_add(IrPrintSrc *irp, IrInstSrcMulAdd *instruction) {
     fprintf(irp->f, "@mulAdd(");
-    if (instruction->type_value != nullptr) {
-        ir_print_other_instruction(irp, instruction->type_value);
-    } else {
-        fprintf(irp->f, "null");
-    }
+    ir_print_other_inst_src(irp, instruction->type_value);
+    fprintf(irp->f, ",");
+    ir_print_other_inst_src(irp, instruction->op1);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op1);
+    ir_print_other_inst_src(irp, instruction->op2);
+    fprintf(irp->f, ",");
+    ir_print_other_inst_src(irp, instruction->op3);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_mul_add(IrPrintGen *irp, IrInstGenMulAdd *instruction) {
+    fprintf(irp->f, "@mulAdd(");
+    ir_print_other_inst_gen(irp, instruction->op1);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op2);
+    ir_print_other_inst_gen(irp, instruction->op2);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->op3);
+    ir_print_other_inst_gen(irp, instruction->op3);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_decl_var_gen(IrPrint *irp, IrInstructionDeclVarGen *decl_var_instruction) {
+static void ir_print_decl_var_gen(IrPrintGen *irp, IrInstGenDeclVar *decl_var_instruction) {
     ZigVar *var = decl_var_instruction->var;
     const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
     const char *name = decl_var_instruction->var->name;
     fprintf(irp->f, "%s %s: %s align(%u) = ", var_or_const, name, buf_ptr(&var->var_type->name),
             var->align_bytes);
 
-    ir_print_other_instruction(irp, decl_var_instruction->var_ptr);
-    if (decl_var_instruction->var->is_comptime != nullptr) {
-        fprintf(irp->f, " // comptime = ");
-        ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
-    }
+    ir_print_other_inst_gen(irp, decl_var_instruction->var_ptr);
 }
 
-static void ir_print_has_decl(IrPrint *irp, IrInstructionHasDecl *instruction) {
+static void ir_print_has_decl(IrPrintSrc *irp, IrInstSrcHasDecl *instruction) {
     fprintf(irp->f, "@hasDecl(");
-    ir_print_other_instruction(irp, instruction->container);
+    ir_print_other_inst_src(irp, instruction->container);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->name);
+    ir_print_other_inst_src(irp, instruction->name);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_undeclared_ident(IrPrint *irp, IrInstructionUndeclaredIdent *instruction) {
+static void ir_print_undeclared_ident(IrPrintSrc *irp, IrInstSrcUndeclaredIdent *instruction) {
     fprintf(irp->f, "@undeclaredIdent(%s)", buf_ptr(instruction->name));
 }
 
-static void ir_print_union_init_named_field(IrPrint *irp, IrInstructionUnionInitNamedField *instruction) {
+static void ir_print_union_init_named_field(IrPrintSrc *irp, IrInstSrcUnionInitNamedField *instruction) {
     fprintf(irp->f, "@unionInit(");
-    ir_print_other_instruction(irp, instruction->union_type);
+    ir_print_other_inst_src(irp, instruction->union_type);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->field_name);
+    ir_print_other_inst_src(irp, instruction->field_name);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->field_result_loc);
+    ir_print_other_inst_src(irp, instruction->field_result_loc);
     fprintf(irp->f, ", ");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_src(irp, instruction->result_loc);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_suspend_begin(IrPrint *irp, IrInstructionSuspendBegin *instruction) {
+static void ir_print_suspend_begin(IrPrintSrc *irp, IrInstSrcSuspendBegin *instruction) {
     fprintf(irp->f, "@suspendBegin()");
 }
 
-static void ir_print_suspend_finish(IrPrint *irp, IrInstructionSuspendFinish *instruction) {
+static void ir_print_suspend_begin(IrPrintGen *irp, IrInstGenSuspendBegin *instruction) {
+    fprintf(irp->f, "@suspendBegin()");
+}
+
+static void ir_print_suspend_finish(IrPrintSrc *irp, IrInstSrcSuspendFinish *instruction) {
     fprintf(irp->f, "@suspendFinish()");
 }
 
-static void ir_print_resume(IrPrint *irp, IrInstructionResume *instruction) {
+static void ir_print_suspend_finish(IrPrintGen *irp, IrInstGenSuspendFinish *instruction) {
+    fprintf(irp->f, "@suspendFinish()");
+}
+
+static void ir_print_resume(IrPrintSrc *irp, IrInstSrcResume *instruction) {
+    fprintf(irp->f, "resume ");
+    ir_print_other_inst_src(irp, instruction->frame);
+}
+
+static void ir_print_resume(IrPrintGen *irp, IrInstGenResume *instruction) {
     fprintf(irp->f, "resume ");
-    ir_print_other_instruction(irp, instruction->frame);
+    ir_print_other_inst_gen(irp, instruction->frame);
 }
 
-static void ir_print_await_src(IrPrint *irp, IrInstructionAwaitSrc *instruction) {
+static void ir_print_await_src(IrPrintSrc *irp, IrInstSrcAwait *instruction) {
     fprintf(irp->f, "@await(");
-    ir_print_other_instruction(irp, instruction->frame);
+    ir_print_other_inst_src(irp, instruction->frame);
     fprintf(irp->f, ",");
     ir_print_result_loc(irp, instruction->result_loc);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_await_gen(IrPrint *irp, IrInstructionAwaitGen *instruction) {
+static void ir_print_await_gen(IrPrintGen *irp, IrInstGenAwait *instruction) {
     fprintf(irp->f, "@await(");
-    ir_print_other_instruction(irp, instruction->frame);
+    ir_print_other_inst_gen(irp, instruction->frame);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->result_loc);
+    ir_print_other_inst_gen(irp, instruction->result_loc);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_spill_begin(IrPrint *irp, IrInstructionSpillBegin *instruction) {
+static void ir_print_spill_begin(IrPrintSrc *irp, IrInstSrcSpillBegin *instruction) {
     fprintf(irp->f, "@spillBegin(");
-    ir_print_other_instruction(irp, instruction->operand);
+    ir_print_other_inst_src(irp, instruction->operand);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_spill_end(IrPrint *irp, IrInstructionSpillEnd *instruction) {
+static void ir_print_spill_begin(IrPrintGen *irp, IrInstGenSpillBegin *instruction) {
+    fprintf(irp->f, "@spillBegin(");
+    ir_print_other_inst_gen(irp, instruction->operand);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_spill_end(IrPrintSrc *irp, IrInstSrcSpillEnd *instruction) {
+    fprintf(irp->f, "@spillEnd(");
+    ir_print_other_inst_src(irp, &instruction->begin->base);
+    fprintf(irp->f, ")");
+}
+
+static void ir_print_spill_end(IrPrintGen *irp, IrInstGenSpillEnd *instruction) {
     fprintf(irp->f, "@spillEnd(");
-    ir_print_other_instruction(irp, &instruction->begin->base);
+    ir_print_other_inst_gen(irp, &instruction->begin->base);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_vector_extract_elem(IrPrint *irp, IrInstructionVectorExtractElem *instruction) {
+static void ir_print_vector_extract_elem(IrPrintGen *irp, IrInstGenVectorExtractElem *instruction) {
     fprintf(irp->f, "@vectorExtractElem(");
-    ir_print_other_instruction(irp, instruction->vector);
+    ir_print_other_inst_gen(irp, instruction->vector);
     fprintf(irp->f, ",");
-    ir_print_other_instruction(irp, instruction->index);
+    ir_print_other_inst_gen(irp, instruction->index);
     fprintf(irp->f, ")");
 }
 
-static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool trailing) {
-    ir_print_prefix(irp, instruction, trailing);
+static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
+    ir_print_prefix_src(irp, instruction, trailing);
     switch (instruction->id) {
-        case IrInstructionIdInvalid:
+        case IrInstSrcIdInvalid:
             zig_unreachable();
-        case IrInstructionIdReturn:
-            ir_print_return(irp, (IrInstructionReturn *)instruction);
+        case IrInstSrcIdReturn:
+            ir_print_return_src(irp, (IrInstSrcReturn *)instruction);
             break;
-        case IrInstructionIdConst:
-            ir_print_const(irp, (IrInstructionConst *)instruction);
+        case IrInstSrcIdConst:
+            ir_print_const(irp, (IrInstSrcConst *)instruction);
             break;
-        case IrInstructionIdBinOp:
-            ir_print_bin_op(irp, (IrInstructionBinOp *)instruction);
+        case IrInstSrcIdBinOp:
+            ir_print_bin_op(irp, (IrInstSrcBinOp *)instruction);
             break;
-        case IrInstructionIdMergeErrSets:
-            ir_print_merge_err_sets(irp, (IrInstructionMergeErrSets *)instruction);
+        case IrInstSrcIdMergeErrSets:
+            ir_print_merge_err_sets(irp, (IrInstSrcMergeErrSets *)instruction);
             break;
-        case IrInstructionIdDeclVarSrc:
-            ir_print_decl_var_src(irp, (IrInstructionDeclVarSrc *)instruction);
+        case IrInstSrcIdDeclVar:
+            ir_print_decl_var_src(irp, (IrInstSrcDeclVar *)instruction);
             break;
-        case IrInstructionIdCast:
-            ir_print_cast(irp, (IrInstructionCast *)instruction);
+        case IrInstSrcIdCallExtra:
+            ir_print_call_extra(irp, (IrInstSrcCallExtra *)instruction);
             break;
-        case IrInstructionIdCallExtra:
-            ir_print_call_extra(irp, (IrInstructionCallExtra *)instruction);
+        case IrInstSrcIdCall:
+            ir_print_call_src(irp, (IrInstSrcCall *)instruction);
             break;
-        case IrInstructionIdCallSrc:
-            ir_print_call_src(irp, (IrInstructionCallSrc *)instruction);
+        case IrInstSrcIdCallArgs:
+            ir_print_call_args(irp, (IrInstSrcCallArgs *)instruction);
             break;
-        case IrInstructionIdCallSrcArgs:
-            ir_print_call_src_args(irp, (IrInstructionCallSrcArgs *)instruction);
+        case IrInstSrcIdUnOp:
+            ir_print_un_op(irp, (IrInstSrcUnOp *)instruction);
             break;
-        case IrInstructionIdCallGen:
-            ir_print_call_gen(irp, (IrInstructionCallGen *)instruction);
+        case IrInstSrcIdCondBr:
+            ir_print_cond_br(irp, (IrInstSrcCondBr *)instruction);
             break;
-        case IrInstructionIdUnOp:
-            ir_print_un_op(irp, (IrInstructionUnOp *)instruction);
+        case IrInstSrcIdBr:
+            ir_print_br(irp, (IrInstSrcBr *)instruction);
             break;
-        case IrInstructionIdCondBr:
-            ir_print_cond_br(irp, (IrInstructionCondBr *)instruction);
+        case IrInstSrcIdPhi:
+            ir_print_phi(irp, (IrInstSrcPhi *)instruction);
             break;
-        case IrInstructionIdBr:
-            ir_print_br(irp, (IrInstructionBr *)instruction);
+        case IrInstSrcIdContainerInitList:
+            ir_print_container_init_list(irp, (IrInstSrcContainerInitList *)instruction);
             break;
-        case IrInstructionIdPhi:
-            ir_print_phi(irp, (IrInstructionPhi *)instruction);
+        case IrInstSrcIdContainerInitFields:
+            ir_print_container_init_fields(irp, (IrInstSrcContainerInitFields *)instruction);
             break;
-        case IrInstructionIdContainerInitList:
-            ir_print_container_init_list(irp, (IrInstructionContainerInitList *)instruction);
+        case IrInstSrcIdUnreachable:
+            ir_print_unreachable(irp, (IrInstSrcUnreachable *)instruction);
             break;
-        case IrInstructionIdContainerInitFields:
-            ir_print_container_init_fields(irp, (IrInstructionContainerInitFields *)instruction);
+        case IrInstSrcIdElemPtr:
+            ir_print_elem_ptr(irp, (IrInstSrcElemPtr *)instruction);
             break;
-        case IrInstructionIdUnreachable:
-            ir_print_unreachable(irp, (IrInstructionUnreachable *)instruction);
+        case IrInstSrcIdVarPtr:
+            ir_print_var_ptr(irp, (IrInstSrcVarPtr *)instruction);
             break;
-        case IrInstructionIdElemPtr:
-            ir_print_elem_ptr(irp, (IrInstructionElemPtr *)instruction);
+        case IrInstSrcIdLoadPtr:
+            ir_print_load_ptr(irp, (IrInstSrcLoadPtr *)instruction);
             break;
-        case IrInstructionIdVarPtr:
-            ir_print_var_ptr(irp, (IrInstructionVarPtr *)instruction);
+        case IrInstSrcIdStorePtr:
+            ir_print_store_ptr(irp, (IrInstSrcStorePtr *)instruction);
             break;
-        case IrInstructionIdReturnPtr:
-            ir_print_return_ptr(irp, (IrInstructionReturnPtr *)instruction);
+        case IrInstSrcIdTypeOf:
+            ir_print_typeof(irp, (IrInstSrcTypeOf *)instruction);
             break;
-        case IrInstructionIdLoadPtr:
-            ir_print_load_ptr(irp, (IrInstructionLoadPtr *)instruction);
+        case IrInstSrcIdFieldPtr:
+            ir_print_field_ptr(irp, (IrInstSrcFieldPtr *)instruction);
             break;
-        case IrInstructionIdLoadPtrGen:
-            ir_print_load_ptr_gen(irp, (IrInstructionLoadPtrGen *)instruction);
+        case IrInstSrcIdSetCold:
+            ir_print_set_cold(irp, (IrInstSrcSetCold *)instruction);
             break;
-        case IrInstructionIdStorePtr:
-            ir_print_store_ptr(irp, (IrInstructionStorePtr *)instruction);
+        case IrInstSrcIdSetRuntimeSafety:
+            ir_print_set_runtime_safety(irp, (IrInstSrcSetRuntimeSafety *)instruction);
             break;
-        case IrInstructionIdVectorStoreElem:
-            ir_print_vector_store_elem(irp, (IrInstructionVectorStoreElem *)instruction);
+        case IrInstSrcIdSetFloatMode:
+            ir_print_set_float_mode(irp, (IrInstSrcSetFloatMode *)instruction);
             break;
-        case IrInstructionIdTypeOf:
-            ir_print_typeof(irp, (IrInstructionTypeOf *)instruction);
+        case IrInstSrcIdArrayType:
+            ir_print_array_type(irp, (IrInstSrcArrayType *)instruction);
             break;
-        case IrInstructionIdFieldPtr:
-            ir_print_field_ptr(irp, (IrInstructionFieldPtr *)instruction);
+        case IrInstSrcIdSliceType:
+            ir_print_slice_type(irp, (IrInstSrcSliceType *)instruction);
             break;
-        case IrInstructionIdStructFieldPtr:
-            ir_print_struct_field_ptr(irp, (IrInstructionStructFieldPtr *)instruction);
+        case IrInstSrcIdAnyFrameType:
+            ir_print_any_frame_type(irp, (IrInstSrcAnyFrameType *)instruction);
             break;
-        case IrInstructionIdUnionFieldPtr:
-            ir_print_union_field_ptr(irp, (IrInstructionUnionFieldPtr *)instruction);
+        case IrInstSrcIdAsm:
+            ir_print_asm_src(irp, (IrInstSrcAsm *)instruction);
             break;
-        case IrInstructionIdSetCold:
-            ir_print_set_cold(irp, (IrInstructionSetCold *)instruction);
+        case IrInstSrcIdSizeOf:
+            ir_print_size_of(irp, (IrInstSrcSizeOf *)instruction);
             break;
-        case IrInstructionIdSetRuntimeSafety:
-            ir_print_set_runtime_safety(irp, (IrInstructionSetRuntimeSafety *)instruction);
+        case IrInstSrcIdTestNonNull:
+            ir_print_test_non_null(irp, (IrInstSrcTestNonNull *)instruction);
             break;
-        case IrInstructionIdSetFloatMode:
-            ir_print_set_float_mode(irp, (IrInstructionSetFloatMode *)instruction);
+        case IrInstSrcIdOptionalUnwrapPtr:
+            ir_print_optional_unwrap_ptr(irp, (IrInstSrcOptionalUnwrapPtr *)instruction);
             break;
-        case IrInstructionIdArrayType:
-            ir_print_array_type(irp, (IrInstructionArrayType *)instruction);
+        case IrInstSrcIdPopCount:
+            ir_print_pop_count(irp, (IrInstSrcPopCount *)instruction);
             break;
-        case IrInstructionIdSliceType:
-            ir_print_slice_type(irp, (IrInstructionSliceType *)instruction);
+        case IrInstSrcIdCtz:
+            ir_print_ctz(irp, (IrInstSrcCtz *)instruction);
             break;
-        case IrInstructionIdAnyFrameType:
-            ir_print_any_frame_type(irp, (IrInstructionAnyFrameType *)instruction);
+        case IrInstSrcIdBswap:
+            ir_print_bswap(irp, (IrInstSrcBswap *)instruction);
             break;
-        case IrInstructionIdAsmSrc:
-            ir_print_asm_src(irp, (IrInstructionAsmSrc *)instruction);
+        case IrInstSrcIdBitReverse:
+            ir_print_bit_reverse(irp, (IrInstSrcBitReverse *)instruction);
             break;
-        case IrInstructionIdAsmGen:
-            ir_print_asm_gen(irp, (IrInstructionAsmGen *)instruction);
+        case IrInstSrcIdSwitchBr:
+            ir_print_switch_br(irp, (IrInstSrcSwitchBr *)instruction);
             break;
-        case IrInstructionIdSizeOf:
-            ir_print_size_of(irp, (IrInstructionSizeOf *)instruction);
+        case IrInstSrcIdSwitchVar:
+            ir_print_switch_var(irp, (IrInstSrcSwitchVar *)instruction);
             break;
-        case IrInstructionIdTestNonNull:
-            ir_print_test_non_null(irp, (IrInstructionTestNonNull *)instruction);
+        case IrInstSrcIdSwitchElseVar:
+            ir_print_switch_else_var(irp, (IrInstSrcSwitchElseVar *)instruction);
             break;
-        case IrInstructionIdOptionalUnwrapPtr:
-            ir_print_optional_unwrap_ptr(irp, (IrInstructionOptionalUnwrapPtr *)instruction);
+        case IrInstSrcIdSwitchTarget:
+            ir_print_switch_target(irp, (IrInstSrcSwitchTarget *)instruction);
             break;
-        case IrInstructionIdPopCount:
-            ir_print_pop_count(irp, (IrInstructionPopCount *)instruction);
+        case IrInstSrcIdImport:
+            ir_print_import(irp, (IrInstSrcImport *)instruction);
             break;
-        case IrInstructionIdClz:
-            ir_print_clz(irp, (IrInstructionClz *)instruction);
+        case IrInstSrcIdRef:
+            ir_print_ref(irp, (IrInstSrcRef *)instruction);
             break;
-        case IrInstructionIdCtz:
-            ir_print_ctz(irp, (IrInstructionCtz *)instruction);
+        case IrInstSrcIdCompileErr:
+            ir_print_compile_err(irp, (IrInstSrcCompileErr *)instruction);
             break;
-        case IrInstructionIdBswap:
-            ir_print_bswap(irp, (IrInstructionBswap *)instruction);
+        case IrInstSrcIdCompileLog:
+            ir_print_compile_log(irp, (IrInstSrcCompileLog *)instruction);
             break;
-        case IrInstructionIdBitReverse:
-            ir_print_bit_reverse(irp, (IrInstructionBitReverse *)instruction);
+        case IrInstSrcIdErrName:
+            ir_print_err_name(irp, (IrInstSrcErrName *)instruction);
             break;
-        case IrInstructionIdSwitchBr:
-            ir_print_switch_br(irp, (IrInstructionSwitchBr *)instruction);
+        case IrInstSrcIdCImport:
+            ir_print_c_import(irp, (IrInstSrcCImport *)instruction);
             break;
-        case IrInstructionIdSwitchVar:
-            ir_print_switch_var(irp, (IrInstructionSwitchVar *)instruction);
+        case IrInstSrcIdCInclude:
+            ir_print_c_include(irp, (IrInstSrcCInclude *)instruction);
             break;
-        case IrInstructionIdSwitchElseVar:
-            ir_print_switch_else_var(irp, (IrInstructionSwitchElseVar *)instruction);
+        case IrInstSrcIdCDefine:
+            ir_print_c_define(irp, (IrInstSrcCDefine *)instruction);
             break;
-        case IrInstructionIdSwitchTarget:
-            ir_print_switch_target(irp, (IrInstructionSwitchTarget *)instruction);
+        case IrInstSrcIdCUndef:
+            ir_print_c_undef(irp, (IrInstSrcCUndef *)instruction);
             break;
-        case IrInstructionIdUnionTag:
-            ir_print_union_tag(irp, (IrInstructionUnionTag *)instruction);
+        case IrInstSrcIdEmbedFile:
+            ir_print_embed_file(irp, (IrInstSrcEmbedFile *)instruction);
             break;
-        case IrInstructionIdImport:
-            ir_print_import(irp, (IrInstructionImport *)instruction);
+        case IrInstSrcIdCmpxchg:
+            ir_print_cmpxchg_src(irp, (IrInstSrcCmpxchg *)instruction);
             break;
-        case IrInstructionIdRef:
-            ir_print_ref(irp, (IrInstructionRef *)instruction);
+        case IrInstSrcIdFence:
+            ir_print_fence(irp, (IrInstSrcFence *)instruction);
             break;
-        case IrInstructionIdRefGen:
-            ir_print_ref_gen(irp, (IrInstructionRefGen *)instruction);
+        case IrInstSrcIdTruncate:
+            ir_print_truncate(irp, (IrInstSrcTruncate *)instruction);
             break;
-        case IrInstructionIdCompileErr:
-            ir_print_compile_err(irp, (IrInstructionCompileErr *)instruction);
+        case IrInstSrcIdIntCast:
+            ir_print_int_cast(irp, (IrInstSrcIntCast *)instruction);
             break;
-        case IrInstructionIdCompileLog:
-            ir_print_compile_log(irp, (IrInstructionCompileLog *)instruction);
+        case IrInstSrcIdFloatCast:
+            ir_print_float_cast(irp, (IrInstSrcFloatCast *)instruction);
             break;
-        case IrInstructionIdErrName:
-            ir_print_err_name(irp, (IrInstructionErrName *)instruction);
+        case IrInstSrcIdErrSetCast:
+            ir_print_err_set_cast(irp, (IrInstSrcErrSetCast *)instruction);
             break;
-        case IrInstructionIdCImport:
-            ir_print_c_import(irp, (IrInstructionCImport *)instruction);
+        case IrInstSrcIdFromBytes:
+            ir_print_from_bytes(irp, (IrInstSrcFromBytes *)instruction);
             break;
-        case IrInstructionIdCInclude:
-            ir_print_c_include(irp, (IrInstructionCInclude *)instruction);
+        case IrInstSrcIdToBytes:
+            ir_print_to_bytes(irp, (IrInstSrcToBytes *)instruction);
             break;
-        case IrInstructionIdCDefine:
-            ir_print_c_define(irp, (IrInstructionCDefine *)instruction);
+        case IrInstSrcIdIntToFloat:
+            ir_print_int_to_float(irp, (IrInstSrcIntToFloat *)instruction);
             break;
-        case IrInstructionIdCUndef:
-            ir_print_c_undef(irp, (IrInstructionCUndef *)instruction);
+        case IrInstSrcIdFloatToInt:
+            ir_print_float_to_int(irp, (IrInstSrcFloatToInt *)instruction);
             break;
-        case IrInstructionIdEmbedFile:
-            ir_print_embed_file(irp, (IrInstructionEmbedFile *)instruction);
+        case IrInstSrcIdBoolToInt:
+            ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
             break;
-        case IrInstructionIdCmpxchgSrc:
-            ir_print_cmpxchg_src(irp, (IrInstructionCmpxchgSrc *)instruction);
+        case IrInstSrcIdIntType:
+            ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
             break;
-        case IrInstructionIdCmpxchgGen:
-            ir_print_cmpxchg_gen(irp, (IrInstructionCmpxchgGen *)instruction);
+        case IrInstSrcIdVectorType:
+            ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
             break;
-        case IrInstructionIdFence:
-            ir_print_fence(irp, (IrInstructionFence *)instruction);
+        case IrInstSrcIdShuffleVector:
+            ir_print_shuffle_vector(irp, (IrInstSrcShuffleVector *)instruction);
             break;
-        case IrInstructionIdTruncate:
-            ir_print_truncate(irp, (IrInstructionTruncate *)instruction);
+        case IrInstSrcIdSplat:
+            ir_print_splat_src(irp, (IrInstSrcSplat *)instruction);
             break;
-        case IrInstructionIdIntCast:
-            ir_print_int_cast(irp, (IrInstructionIntCast *)instruction);
+        case IrInstSrcIdBoolNot:
+            ir_print_bool_not(irp, (IrInstSrcBoolNot *)instruction);
             break;
-        case IrInstructionIdFloatCast:
-            ir_print_float_cast(irp, (IrInstructionFloatCast *)instruction);
+        case IrInstSrcIdMemset:
+            ir_print_memset(irp, (IrInstSrcMemset *)instruction);
             break;
-        case IrInstructionIdErrSetCast:
-            ir_print_err_set_cast(irp, (IrInstructionErrSetCast *)instruction);
+        case IrInstSrcIdMemcpy:
+            ir_print_memcpy(irp, (IrInstSrcMemcpy *)instruction);
             break;
-        case IrInstructionIdFromBytes:
-            ir_print_from_bytes(irp, (IrInstructionFromBytes *)instruction);
+        case IrInstSrcIdSlice:
+            ir_print_slice_src(irp, (IrInstSrcSlice *)instruction);
             break;
-        case IrInstructionIdToBytes:
-            ir_print_to_bytes(irp, (IrInstructionToBytes *)instruction);
+        case IrInstSrcIdMemberCount:
+            ir_print_member_count(irp, (IrInstSrcMemberCount *)instruction);
             break;
-        case IrInstructionIdIntToFloat:
-            ir_print_int_to_float(irp, (IrInstructionIntToFloat *)instruction);
+        case IrInstSrcIdMemberType:
+            ir_print_member_type(irp, (IrInstSrcMemberType *)instruction);
             break;
-        case IrInstructionIdFloatToInt:
-            ir_print_float_to_int(irp, (IrInstructionFloatToInt *)instruction);
+        case IrInstSrcIdMemberName:
+            ir_print_member_name(irp, (IrInstSrcMemberName *)instruction);
             break;
-        case IrInstructionIdBoolToInt:
-            ir_print_bool_to_int(irp, (IrInstructionBoolToInt *)instruction);
+        case IrInstSrcIdBreakpoint:
+            ir_print_breakpoint(irp, (IrInstSrcBreakpoint *)instruction);
             break;
-        case IrInstructionIdIntType:
-            ir_print_int_type(irp, (IrInstructionIntType *)instruction);
+        case IrInstSrcIdReturnAddress:
+            ir_print_return_address(irp, (IrInstSrcReturnAddress *)instruction);
             break;
-        case IrInstructionIdVectorType:
-            ir_print_vector_type(irp, (IrInstructionVectorType *)instruction);
+        case IrInstSrcIdFrameAddress:
+            ir_print_frame_address(irp, (IrInstSrcFrameAddress *)instruction);
             break;
-        case IrInstructionIdShuffleVector:
-            ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);
+        case IrInstSrcIdFrameHandle:
+            ir_print_handle(irp, (IrInstSrcFrameHandle *)instruction);
             break;
-        case IrInstructionIdSplatSrc:
-            ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);
+        case IrInstSrcIdFrameType:
+            ir_print_frame_type(irp, (IrInstSrcFrameType *)instruction);
             break;
-        case IrInstructionIdSplatGen:
-            ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);
+        case IrInstSrcIdFrameSize:
+            ir_print_frame_size_src(irp, (IrInstSrcFrameSize *)instruction);
             break;
-        case IrInstructionIdBoolNot:
-            ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);
+        case IrInstSrcIdAlignOf:
+            ir_print_align_of(irp, (IrInstSrcAlignOf *)instruction);
             break;
-        case IrInstructionIdMemset:
-            ir_print_memset(irp, (IrInstructionMemset *)instruction);
+        case IrInstSrcIdOverflowOp:
+            ir_print_overflow_op(irp, (IrInstSrcOverflowOp *)instruction);
             break;
-        case IrInstructionIdMemcpy:
-            ir_print_memcpy(irp, (IrInstructionMemcpy *)instruction);
+        case IrInstSrcIdTestErr:
+            ir_print_test_err_src(irp, (IrInstSrcTestErr *)instruction);
             break;
-        case IrInstructionIdSliceSrc:
-            ir_print_slice_src(irp, (IrInstructionSliceSrc *)instruction);
+        case IrInstSrcIdUnwrapErrCode:
+            ir_print_unwrap_err_code(irp, (IrInstSrcUnwrapErrCode *)instruction);
             break;
-        case IrInstructionIdSliceGen:
-            ir_print_slice_gen(irp, (IrInstructionSliceGen *)instruction);
+        case IrInstSrcIdUnwrapErrPayload:
+            ir_print_unwrap_err_payload(irp, (IrInstSrcUnwrapErrPayload *)instruction);
             break;
-        case IrInstructionIdMemberCount:
-            ir_print_member_count(irp, (IrInstructionMemberCount *)instruction);
+        case IrInstSrcIdFnProto:
+            ir_print_fn_proto(irp, (IrInstSrcFnProto *)instruction);
             break;
-        case IrInstructionIdMemberType:
-            ir_print_member_type(irp, (IrInstructionMemberType *)instruction);
+        case IrInstSrcIdTestComptime:
+            ir_print_test_comptime(irp, (IrInstSrcTestComptime *)instruction);
             break;
-        case IrInstructionIdMemberName:
-            ir_print_member_name(irp, (IrInstructionMemberName *)instruction);
+        case IrInstSrcIdPtrCast:
+            ir_print_ptr_cast_src(irp, (IrInstSrcPtrCast *)instruction);
             break;
-        case IrInstructionIdBreakpoint:
-            ir_print_breakpoint(irp, (IrInstructionBreakpoint *)instruction);
+        case IrInstSrcIdBitCast:
+            ir_print_bit_cast_src(irp, (IrInstSrcBitCast *)instruction);
             break;
-        case IrInstructionIdReturnAddress:
-            ir_print_return_address(irp, (IrInstructionReturnAddress *)instruction);
+        case IrInstSrcIdPtrToInt:
+            ir_print_ptr_to_int(irp, (IrInstSrcPtrToInt *)instruction);
             break;
-        case IrInstructionIdFrameAddress:
-            ir_print_frame_address(irp, (IrInstructionFrameAddress *)instruction);
+        case IrInstSrcIdIntToPtr:
+            ir_print_int_to_ptr(irp, (IrInstSrcIntToPtr *)instruction);
             break;
-        case IrInstructionIdFrameHandle:
-            ir_print_handle(irp, (IrInstructionFrameHandle *)instruction);
+        case IrInstSrcIdIntToEnum:
+            ir_print_int_to_enum(irp, (IrInstSrcIntToEnum *)instruction);
             break;
-        case IrInstructionIdFrameType:
-            ir_print_frame_type(irp, (IrInstructionFrameType *)instruction);
+        case IrInstSrcIdIntToErr:
+            ir_print_int_to_err(irp, (IrInstSrcIntToErr *)instruction);
             break;
-        case IrInstructionIdFrameSizeSrc:
-            ir_print_frame_size_src(irp, (IrInstructionFrameSizeSrc *)instruction);
+        case IrInstSrcIdErrToInt:
+            ir_print_err_to_int(irp, (IrInstSrcErrToInt *)instruction);
             break;
-        case IrInstructionIdFrameSizeGen:
-            ir_print_frame_size_gen(irp, (IrInstructionFrameSizeGen *)instruction);
+        case IrInstSrcIdCheckSwitchProngs:
+            ir_print_check_switch_prongs(irp, (IrInstSrcCheckSwitchProngs *)instruction);
             break;
-        case IrInstructionIdAlignOf:
-            ir_print_align_of(irp, (IrInstructionAlignOf *)instruction);
+        case IrInstSrcIdCheckStatementIsVoid:
+            ir_print_check_statement_is_void(irp, (IrInstSrcCheckStatementIsVoid *)instruction);
             break;
-        case IrInstructionIdOverflowOp:
-            ir_print_overflow_op(irp, (IrInstructionOverflowOp *)instruction);
+        case IrInstSrcIdTypeName:
+            ir_print_type_name(irp, (IrInstSrcTypeName *)instruction);
             break;
-        case IrInstructionIdTestErrSrc:
-            ir_print_test_err_src(irp, (IrInstructionTestErrSrc *)instruction);
+        case IrInstSrcIdTagName:
+            ir_print_tag_name(irp, (IrInstSrcTagName *)instruction);
             break;
-        case IrInstructionIdTestErrGen:
-            ir_print_test_err_gen(irp, (IrInstructionTestErrGen *)instruction);
+        case IrInstSrcIdPtrType:
+            ir_print_ptr_type(irp, (IrInstSrcPtrType *)instruction);
             break;
-        case IrInstructionIdUnwrapErrCode:
-            ir_print_unwrap_err_code(irp, (IrInstructionUnwrapErrCode *)instruction);
+        case IrInstSrcIdDeclRef:
+            ir_print_decl_ref(irp, (IrInstSrcDeclRef *)instruction);
             break;
-        case IrInstructionIdUnwrapErrPayload:
-            ir_print_unwrap_err_payload(irp, (IrInstructionUnwrapErrPayload *)instruction);
+        case IrInstSrcIdPanic:
+            ir_print_panic(irp, (IrInstSrcPanic *)instruction);
             break;
-        case IrInstructionIdOptionalWrap:
-            ir_print_optional_wrap(irp, (IrInstructionOptionalWrap *)instruction);
+        case IrInstSrcIdFieldParentPtr:
+            ir_print_field_parent_ptr(irp, (IrInstSrcFieldParentPtr *)instruction);
             break;
-        case IrInstructionIdErrWrapCode:
-            ir_print_err_wrap_code(irp, (IrInstructionErrWrapCode *)instruction);
+        case IrInstSrcIdByteOffsetOf:
+            ir_print_byte_offset_of(irp, (IrInstSrcByteOffsetOf *)instruction);
             break;
-        case IrInstructionIdErrWrapPayload:
-            ir_print_err_wrap_payload(irp, (IrInstructionErrWrapPayload *)instruction);
+        case IrInstSrcIdBitOffsetOf:
+            ir_print_bit_offset_of(irp, (IrInstSrcBitOffsetOf *)instruction);
             break;
-        case IrInstructionIdFnProto:
-            ir_print_fn_proto(irp, (IrInstructionFnProto *)instruction);
+        case IrInstSrcIdTypeInfo:
+            ir_print_type_info(irp, (IrInstSrcTypeInfo *)instruction);
             break;
-        case IrInstructionIdTestComptime:
-            ir_print_test_comptime(irp, (IrInstructionTestComptime *)instruction);
+        case IrInstSrcIdType:
+            ir_print_type(irp, (IrInstSrcType *)instruction);
             break;
-        case IrInstructionIdPtrCastSrc:
-            ir_print_ptr_cast_src(irp, (IrInstructionPtrCastSrc *)instruction);
+        case IrInstSrcIdHasField:
+            ir_print_has_field(irp, (IrInstSrcHasField *)instruction);
             break;
-        case IrInstructionIdPtrCastGen:
-            ir_print_ptr_cast_gen(irp, (IrInstructionPtrCastGen *)instruction);
+        case IrInstSrcIdTypeId:
+            ir_print_type_id(irp, (IrInstSrcTypeId *)instruction);
             break;
-        case IrInstructionIdBitCastSrc:
-            ir_print_bit_cast_src(irp, (IrInstructionBitCastSrc *)instruction);
+        case IrInstSrcIdSetEvalBranchQuota:
+            ir_print_set_eval_branch_quota(irp, (IrInstSrcSetEvalBranchQuota *)instruction);
             break;
-        case IrInstructionIdBitCastGen:
-            ir_print_bit_cast_gen(irp, (IrInstructionBitCastGen *)instruction);
+        case IrInstSrcIdAlignCast:
+            ir_print_align_cast(irp, (IrInstSrcAlignCast *)instruction);
             break;
-        case IrInstructionIdWidenOrShorten:
-            ir_print_widen_or_shorten(irp, (IrInstructionWidenOrShorten *)instruction);
+        case IrInstSrcIdImplicitCast:
+            ir_print_implicit_cast(irp, (IrInstSrcImplicitCast *)instruction);
             break;
-        case IrInstructionIdPtrToInt:
-            ir_print_ptr_to_int(irp, (IrInstructionPtrToInt *)instruction);
+        case IrInstSrcIdResolveResult:
+            ir_print_resolve_result(irp, (IrInstSrcResolveResult *)instruction);
             break;
-        case IrInstructionIdIntToPtr:
-            ir_print_int_to_ptr(irp, (IrInstructionIntToPtr *)instruction);
+        case IrInstSrcIdResetResult:
+            ir_print_reset_result(irp, (IrInstSrcResetResult *)instruction);
             break;
-        case IrInstructionIdIntToEnum:
-            ir_print_int_to_enum(irp, (IrInstructionIntToEnum *)instruction);
+        case IrInstSrcIdOpaqueType:
+            ir_print_opaque_type(irp, (IrInstSrcOpaqueType *)instruction);
             break;
-        case IrInstructionIdIntToErr:
-            ir_print_int_to_err(irp, (IrInstructionIntToErr *)instruction);
+        case IrInstSrcIdSetAlignStack:
+            ir_print_set_align_stack(irp, (IrInstSrcSetAlignStack *)instruction);
             break;
-        case IrInstructionIdErrToInt:
-            ir_print_err_to_int(irp, (IrInstructionErrToInt *)instruction);
+        case IrInstSrcIdArgType:
+            ir_print_arg_type(irp, (IrInstSrcArgType *)instruction);
             break;
-        case IrInstructionIdCheckSwitchProngs:
-            ir_print_check_switch_prongs(irp, (IrInstructionCheckSwitchProngs *)instruction);
+        case IrInstSrcIdTagType:
+            ir_print_enum_tag_type(irp, (IrInstSrcTagType *)instruction);
             break;
-        case IrInstructionIdCheckStatementIsVoid:
-            ir_print_check_statement_is_void(irp, (IrInstructionCheckStatementIsVoid *)instruction);
+        case IrInstSrcIdExport:
+            ir_print_export(irp, (IrInstSrcExport *)instruction);
             break;
-        case IrInstructionIdTypeName:
-            ir_print_type_name(irp, (IrInstructionTypeName *)instruction);
+        case IrInstSrcIdErrorReturnTrace:
+            ir_print_error_return_trace(irp, (IrInstSrcErrorReturnTrace *)instruction);
             break;
-        case IrInstructionIdTagName:
-            ir_print_tag_name(irp, (IrInstructionTagName *)instruction);
+        case IrInstSrcIdErrorUnion:
+            ir_print_error_union(irp, (IrInstSrcErrorUnion *)instruction);
             break;
-        case IrInstructionIdPtrType:
-            ir_print_ptr_type(irp, (IrInstructionPtrType *)instruction);
+        case IrInstSrcIdAtomicRmw:
+            ir_print_atomic_rmw(irp, (IrInstSrcAtomicRmw *)instruction);
             break;
-        case IrInstructionIdDeclRef:
-            ir_print_decl_ref(irp, (IrInstructionDeclRef *)instruction);
+        case IrInstSrcIdSaveErrRetAddr:
+            ir_print_save_err_ret_addr(irp, (IrInstSrcSaveErrRetAddr *)instruction);
             break;
-        case IrInstructionIdPanic:
-            ir_print_panic(irp, (IrInstructionPanic *)instruction);
+        case IrInstSrcIdAddImplicitReturnType:
+            ir_print_add_implicit_return_type(irp, (IrInstSrcAddImplicitReturnType *)instruction);
             break;
-        case IrInstructionIdFieldParentPtr:
-            ir_print_field_parent_ptr(irp, (IrInstructionFieldParentPtr *)instruction);
+        case IrInstSrcIdFloatOp:
+            ir_print_float_op(irp, (IrInstSrcFloatOp *)instruction);
             break;
-        case IrInstructionIdByteOffsetOf:
-            ir_print_byte_offset_of(irp, (IrInstructionByteOffsetOf *)instruction);
+        case IrInstSrcIdMulAdd:
+            ir_print_mul_add(irp, (IrInstSrcMulAdd *)instruction);
             break;
-        case IrInstructionIdBitOffsetOf:
-            ir_print_bit_offset_of(irp, (IrInstructionBitOffsetOf *)instruction);
+        case IrInstSrcIdAtomicLoad:
+            ir_print_atomic_load(irp, (IrInstSrcAtomicLoad *)instruction);
             break;
-        case IrInstructionIdTypeInfo:
-            ir_print_type_info(irp, (IrInstructionTypeInfo *)instruction);
+        case IrInstSrcIdAtomicStore:
+            ir_print_atomic_store(irp, (IrInstSrcAtomicStore *)instruction);
             break;
-        case IrInstructionIdType:
-            ir_print_type(irp, (IrInstructionType *)instruction);
+        case IrInstSrcIdEnumToInt:
+            ir_print_enum_to_int(irp, (IrInstSrcEnumToInt *)instruction);
             break;
-        case IrInstructionIdHasField:
-            ir_print_has_field(irp, (IrInstructionHasField *)instruction);
+        case IrInstSrcIdCheckRuntimeScope:
+            ir_print_check_runtime_scope(irp, (IrInstSrcCheckRuntimeScope *)instruction);
             break;
-        case IrInstructionIdTypeId:
-            ir_print_type_id(irp, (IrInstructionTypeId *)instruction);
+        case IrInstSrcIdHasDecl:
+            ir_print_has_decl(irp, (IrInstSrcHasDecl *)instruction);
             break;
-        case IrInstructionIdSetEvalBranchQuota:
-            ir_print_set_eval_branch_quota(irp, (IrInstructionSetEvalBranchQuota *)instruction);
+        case IrInstSrcIdUndeclaredIdent:
+            ir_print_undeclared_ident(irp, (IrInstSrcUndeclaredIdent *)instruction);
             break;
-        case IrInstructionIdAlignCast:
-            ir_print_align_cast(irp, (IrInstructionAlignCast *)instruction);
+        case IrInstSrcIdAlloca:
+            ir_print_alloca_src(irp, (IrInstSrcAlloca *)instruction);
             break;
-        case IrInstructionIdImplicitCast:
-            ir_print_implicit_cast(irp, (IrInstructionImplicitCast *)instruction);
+        case IrInstSrcIdEndExpr:
+            ir_print_end_expr(irp, (IrInstSrcEndExpr *)instruction);
             break;
-        case IrInstructionIdResolveResult:
-            ir_print_resolve_result(irp, (IrInstructionResolveResult *)instruction);
+        case IrInstSrcIdUnionInitNamedField:
+            ir_print_union_init_named_field(irp, (IrInstSrcUnionInitNamedField *)instruction);
             break;
-        case IrInstructionIdResetResult:
-            ir_print_reset_result(irp, (IrInstructionResetResult *)instruction);
+        case IrInstSrcIdSuspendBegin:
+            ir_print_suspend_begin(irp, (IrInstSrcSuspendBegin *)instruction);
             break;
-        case IrInstructionIdOpaqueType:
-            ir_print_opaque_type(irp, (IrInstructionOpaqueType *)instruction);
+        case IrInstSrcIdSuspendFinish:
+            ir_print_suspend_finish(irp, (IrInstSrcSuspendFinish *)instruction);
             break;
-        case IrInstructionIdSetAlignStack:
-            ir_print_set_align_stack(irp, (IrInstructionSetAlignStack *)instruction);
+        case IrInstSrcIdResume:
+            ir_print_resume(irp, (IrInstSrcResume *)instruction);
             break;
-        case IrInstructionIdArgType:
-            ir_print_arg_type(irp, (IrInstructionArgType *)instruction);
+        case IrInstSrcIdAwait:
+            ir_print_await_src(irp, (IrInstSrcAwait *)instruction);
             break;
-        case IrInstructionIdTagType:
-            ir_print_enum_tag_type(irp, (IrInstructionTagType *)instruction);
+        case IrInstSrcIdSpillBegin:
+            ir_print_spill_begin(irp, (IrInstSrcSpillBegin *)instruction);
             break;
-        case IrInstructionIdExport:
-            ir_print_export(irp, (IrInstructionExport *)instruction);
+        case IrInstSrcIdSpillEnd:
+            ir_print_spill_end(irp, (IrInstSrcSpillEnd *)instruction);
             break;
-        case IrInstructionIdErrorReturnTrace:
-            ir_print_error_return_trace(irp, (IrInstructionErrorReturnTrace *)instruction);
+        case IrInstSrcIdClz:
+            ir_print_clz(irp, (IrInstSrcClz *)instruction);
             break;
-        case IrInstructionIdErrorUnion:
-            ir_print_error_union(irp, (IrInstructionErrorUnion *)instruction);
+    }
+    fprintf(irp->f, "\n");
+}
+
+static void ir_print_inst_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
+    ir_print_prefix_gen(irp, instruction, trailing);
+    switch (instruction->id) {
+        case IrInstGenIdInvalid:
+            zig_unreachable();
+        case IrInstGenIdReturn:
+            ir_print_return_gen(irp, (IrInstGenReturn *)instruction);
+            break;
+        case IrInstGenIdConst:
+            ir_print_const(irp, (IrInstGenConst *)instruction);
+            break;
+        case IrInstGenIdBinOp:
+            ir_print_bin_op(irp, (IrInstGenBinOp *)instruction);
+            break;
+        case IrInstGenIdDeclVar:
+            ir_print_decl_var_gen(irp, (IrInstGenDeclVar *)instruction);
+            break;
+        case IrInstGenIdCast:
+            ir_print_cast(irp, (IrInstGenCast *)instruction);
+            break;
+        case IrInstGenIdCall:
+            ir_print_call_gen(irp, (IrInstGenCall *)instruction);
+            break;
+        case IrInstGenIdCondBr:
+            ir_print_cond_br(irp, (IrInstGenCondBr *)instruction);
+            break;
+        case IrInstGenIdBr:
+            ir_print_br(irp, (IrInstGenBr *)instruction);
+            break;
+        case IrInstGenIdPhi:
+            ir_print_phi(irp, (IrInstGenPhi *)instruction);
+            break;
+        case IrInstGenIdUnreachable:
+            ir_print_unreachable(irp, (IrInstGenUnreachable *)instruction);
+            break;
+        case IrInstGenIdElemPtr:
+            ir_print_elem_ptr(irp, (IrInstGenElemPtr *)instruction);
+            break;
+        case IrInstGenIdVarPtr:
+            ir_print_var_ptr(irp, (IrInstGenVarPtr *)instruction);
+            break;
+        case IrInstGenIdReturnPtr:
+            ir_print_return_ptr(irp, (IrInstGenReturnPtr *)instruction);
+            break;
+        case IrInstGenIdLoadPtr:
+            ir_print_load_ptr_gen(irp, (IrInstGenLoadPtr *)instruction);
+            break;
+        case IrInstGenIdStorePtr:
+            ir_print_store_ptr(irp, (IrInstGenStorePtr *)instruction);
+            break;
+        case IrInstGenIdStructFieldPtr:
+            ir_print_struct_field_ptr(irp, (IrInstGenStructFieldPtr *)instruction);
+            break;
+        case IrInstGenIdUnionFieldPtr:
+            ir_print_union_field_ptr(irp, (IrInstGenUnionFieldPtr *)instruction);
+            break;
+        case IrInstGenIdAsm:
+            ir_print_asm_gen(irp, (IrInstGenAsm *)instruction);
+            break;
+        case IrInstGenIdTestNonNull:
+            ir_print_test_non_null(irp, (IrInstGenTestNonNull *)instruction);
+            break;
+        case IrInstGenIdOptionalUnwrapPtr:
+            ir_print_optional_unwrap_ptr(irp, (IrInstGenOptionalUnwrapPtr *)instruction);
+            break;
+        case IrInstGenIdPopCount:
+            ir_print_pop_count(irp, (IrInstGenPopCount *)instruction);
+            break;
+        case IrInstGenIdClz:
+            ir_print_clz(irp, (IrInstGenClz *)instruction);
+            break;
+        case IrInstGenIdCtz:
+            ir_print_ctz(irp, (IrInstGenCtz *)instruction);
+            break;
+        case IrInstGenIdBswap:
+            ir_print_bswap(irp, (IrInstGenBswap *)instruction);
+            break;
+        case IrInstGenIdBitReverse:
+            ir_print_bit_reverse(irp, (IrInstGenBitReverse *)instruction);
+            break;
+        case IrInstGenIdSwitchBr:
+            ir_print_switch_br(irp, (IrInstGenSwitchBr *)instruction);
+            break;
+        case IrInstGenIdUnionTag:
+            ir_print_union_tag(irp, (IrInstGenUnionTag *)instruction);
+            break;
+        case IrInstGenIdRef:
+            ir_print_ref_gen(irp, (IrInstGenRef *)instruction);
             break;
-        case IrInstructionIdAtomicRmw:
-            ir_print_atomic_rmw(irp, (IrInstructionAtomicRmw *)instruction);
+        case IrInstGenIdErrName:
+            ir_print_err_name(irp, (IrInstGenErrName *)instruction);
             break;
-        case IrInstructionIdSaveErrRetAddr:
-            ir_print_save_err_ret_addr(irp, (IrInstructionSaveErrRetAddr *)instruction);
+        case IrInstGenIdCmpxchg:
+            ir_print_cmpxchg_gen(irp, (IrInstGenCmpxchg *)instruction);
             break;
-        case IrInstructionIdAddImplicitReturnType:
-            ir_print_add_implicit_return_type(irp, (IrInstructionAddImplicitReturnType *)instruction);
+        case IrInstGenIdFence:
+            ir_print_fence(irp, (IrInstGenFence *)instruction);
             break;
-        case IrInstructionIdFloatOp:
-            ir_print_float_op(irp, (IrInstructionFloatOp *)instruction);
+        case IrInstGenIdTruncate:
+            ir_print_truncate(irp, (IrInstGenTruncate *)instruction);
             break;
-        case IrInstructionIdMulAdd:
-            ir_print_mul_add(irp, (IrInstructionMulAdd *)instruction);
+        case IrInstGenIdShuffleVector:
+            ir_print_shuffle_vector(irp, (IrInstGenShuffleVector *)instruction);
             break;
-        case IrInstructionIdAtomicLoad:
-            ir_print_atomic_load(irp, (IrInstructionAtomicLoad *)instruction);
+        case IrInstGenIdSplat:
+            ir_print_splat_gen(irp, (IrInstGenSplat *)instruction);
             break;
-        case IrInstructionIdAtomicStore:
-            ir_print_atomic_store(irp, (IrInstructionAtomicStore *)instruction);
+        case IrInstGenIdBoolNot:
+            ir_print_bool_not(irp, (IrInstGenBoolNot *)instruction);
             break;
-        case IrInstructionIdEnumToInt:
-            ir_print_enum_to_int(irp, (IrInstructionEnumToInt *)instruction);
+        case IrInstGenIdMemset:
+            ir_print_memset(irp, (IrInstGenMemset *)instruction);
             break;
-        case IrInstructionIdCheckRuntimeScope:
-            ir_print_check_runtime_scope(irp, (IrInstructionCheckRuntimeScope *)instruction);
+        case IrInstGenIdMemcpy:
+            ir_print_memcpy(irp, (IrInstGenMemcpy *)instruction);
             break;
-        case IrInstructionIdDeclVarGen:
-            ir_print_decl_var_gen(irp, (IrInstructionDeclVarGen *)instruction);
+        case IrInstGenIdSlice:
+            ir_print_slice_gen(irp, (IrInstGenSlice *)instruction);
             break;
-        case IrInstructionIdArrayToVector:
-            ir_print_array_to_vector(irp, (IrInstructionArrayToVector *)instruction);
+        case IrInstGenIdBreakpoint:
+            ir_print_breakpoint(irp, (IrInstGenBreakpoint *)instruction);
             break;
-        case IrInstructionIdVectorToArray:
-            ir_print_vector_to_array(irp, (IrInstructionVectorToArray *)instruction);
+        case IrInstGenIdReturnAddress:
+            ir_print_return_address(irp, (IrInstGenReturnAddress *)instruction);
             break;
-        case IrInstructionIdPtrOfArrayToSlice:
-            ir_print_ptr_of_array_to_slice(irp, (IrInstructionPtrOfArrayToSlice *)instruction);
+        case IrInstGenIdFrameAddress:
+            ir_print_frame_address(irp, (IrInstGenFrameAddress *)instruction);
             break;
-        case IrInstructionIdAssertZero:
-            ir_print_assert_zero(irp, (IrInstructionAssertZero *)instruction);
+        case IrInstGenIdFrameHandle:
+            ir_print_handle(irp, (IrInstGenFrameHandle *)instruction);
             break;
-        case IrInstructionIdAssertNonNull:
-            ir_print_assert_non_null(irp, (IrInstructionAssertNonNull *)instruction);
+        case IrInstGenIdFrameSize:
+            ir_print_frame_size_gen(irp, (IrInstGenFrameSize *)instruction);
             break;
-        case IrInstructionIdResizeSlice:
-            ir_print_resize_slice(irp, (IrInstructionResizeSlice *)instruction);
+        case IrInstGenIdOverflowOp:
+            ir_print_overflow_op(irp, (IrInstGenOverflowOp *)instruction);
             break;
-        case IrInstructionIdHasDecl:
-            ir_print_has_decl(irp, (IrInstructionHasDecl *)instruction);
+        case IrInstGenIdTestErr:
+            ir_print_test_err_gen(irp, (IrInstGenTestErr *)instruction);
             break;
-        case IrInstructionIdUndeclaredIdent:
-            ir_print_undeclared_ident(irp, (IrInstructionUndeclaredIdent *)instruction);
+        case IrInstGenIdUnwrapErrCode:
+            ir_print_unwrap_err_code(irp, (IrInstGenUnwrapErrCode *)instruction);
             break;
-        case IrInstructionIdAllocaSrc:
-            ir_print_alloca_src(irp, (IrInstructionAllocaSrc *)instruction);
+        case IrInstGenIdUnwrapErrPayload:
+            ir_print_unwrap_err_payload(irp, (IrInstGenUnwrapErrPayload *)instruction);
             break;
-        case IrInstructionIdAllocaGen:
-            ir_print_alloca_gen(irp, (IrInstructionAllocaGen *)instruction);
+        case IrInstGenIdOptionalWrap:
+            ir_print_optional_wrap(irp, (IrInstGenOptionalWrap *)instruction);
             break;
-        case IrInstructionIdEndExpr:
-            ir_print_end_expr(irp, (IrInstructionEndExpr *)instruction);
+        case IrInstGenIdErrWrapCode:
+            ir_print_err_wrap_code(irp, (IrInstGenErrWrapCode *)instruction);
             break;
-        case IrInstructionIdUnionInitNamedField:
-            ir_print_union_init_named_field(irp, (IrInstructionUnionInitNamedField *)instruction);
+        case IrInstGenIdErrWrapPayload:
+            ir_print_err_wrap_payload(irp, (IrInstGenErrWrapPayload *)instruction);
             break;
-        case IrInstructionIdSuspendBegin:
-            ir_print_suspend_begin(irp, (IrInstructionSuspendBegin *)instruction);
+        case IrInstGenIdPtrCast:
+            ir_print_ptr_cast_gen(irp, (IrInstGenPtrCast *)instruction);
             break;
-        case IrInstructionIdSuspendFinish:
-            ir_print_suspend_finish(irp, (IrInstructionSuspendFinish *)instruction);
+        case IrInstGenIdBitCast:
+            ir_print_bit_cast_gen(irp, (IrInstGenBitCast *)instruction);
             break;
-        case IrInstructionIdResume:
-            ir_print_resume(irp, (IrInstructionResume *)instruction);
+        case IrInstGenIdWidenOrShorten:
+            ir_print_widen_or_shorten(irp, (IrInstGenWidenOrShorten *)instruction);
             break;
-        case IrInstructionIdAwaitSrc:
-            ir_print_await_src(irp, (IrInstructionAwaitSrc *)instruction);
+        case IrInstGenIdPtrToInt:
+            ir_print_ptr_to_int(irp, (IrInstGenPtrToInt *)instruction);
             break;
-        case IrInstructionIdAwaitGen:
-            ir_print_await_gen(irp, (IrInstructionAwaitGen *)instruction);
+        case IrInstGenIdIntToPtr:
+            ir_print_int_to_ptr(irp, (IrInstGenIntToPtr *)instruction);
             break;
-        case IrInstructionIdSpillBegin:
-            ir_print_spill_begin(irp, (IrInstructionSpillBegin *)instruction);
+        case IrInstGenIdIntToEnum:
+            ir_print_int_to_enum(irp, (IrInstGenIntToEnum *)instruction);
             break;
-        case IrInstructionIdSpillEnd:
-            ir_print_spill_end(irp, (IrInstructionSpillEnd *)instruction);
+        case IrInstGenIdIntToErr:
+            ir_print_int_to_err(irp, (IrInstGenIntToErr *)instruction);
             break;
-        case IrInstructionIdVectorExtractElem:
-            ir_print_vector_extract_elem(irp, (IrInstructionVectorExtractElem *)instruction);
+        case IrInstGenIdErrToInt:
+            ir_print_err_to_int(irp, (IrInstGenErrToInt *)instruction);
+            break;
+        case IrInstGenIdTagName:
+            ir_print_tag_name(irp, (IrInstGenTagName *)instruction);
+            break;
+        case IrInstGenIdPanic:
+            ir_print_panic(irp, (IrInstGenPanic *)instruction);
+            break;
+        case IrInstGenIdFieldParentPtr:
+            ir_print_field_parent_ptr(irp, (IrInstGenFieldParentPtr *)instruction);
+            break;
+        case IrInstGenIdAlignCast:
+            ir_print_align_cast(irp, (IrInstGenAlignCast *)instruction);
+            break;
+        case IrInstGenIdErrorReturnTrace:
+            ir_print_error_return_trace(irp, (IrInstGenErrorReturnTrace *)instruction);
+            break;
+        case IrInstGenIdAtomicRmw:
+            ir_print_atomic_rmw(irp, (IrInstGenAtomicRmw *)instruction);
+            break;
+        case IrInstGenIdSaveErrRetAddr:
+            ir_print_save_err_ret_addr(irp, (IrInstGenSaveErrRetAddr *)instruction);
+            break;
+        case IrInstGenIdFloatOp:
+            ir_print_float_op(irp, (IrInstGenFloatOp *)instruction);
+            break;
+        case IrInstGenIdMulAdd:
+            ir_print_mul_add(irp, (IrInstGenMulAdd *)instruction);
+            break;
+        case IrInstGenIdAtomicLoad:
+            ir_print_atomic_load(irp, (IrInstGenAtomicLoad *)instruction);
+            break;
+        case IrInstGenIdAtomicStore:
+            ir_print_atomic_store(irp, (IrInstGenAtomicStore *)instruction);
+            break;
+        case IrInstGenIdArrayToVector:
+            ir_print_array_to_vector(irp, (IrInstGenArrayToVector *)instruction);
+            break;
+        case IrInstGenIdVectorToArray:
+            ir_print_vector_to_array(irp, (IrInstGenVectorToArray *)instruction);
+            break;
+        case IrInstGenIdPtrOfArrayToSlice:
+            ir_print_ptr_of_array_to_slice(irp, (IrInstGenPtrOfArrayToSlice *)instruction);
+            break;
+        case IrInstGenIdAssertZero:
+            ir_print_assert_zero(irp, (IrInstGenAssertZero *)instruction);
+            break;
+        case IrInstGenIdAssertNonNull:
+            ir_print_assert_non_null(irp, (IrInstGenAssertNonNull *)instruction);
+            break;
+        case IrInstGenIdResizeSlice:
+            ir_print_resize_slice(irp, (IrInstGenResizeSlice *)instruction);
+            break;
+        case IrInstGenIdAlloca:
+            ir_print_alloca_gen(irp, (IrInstGenAlloca *)instruction);
+            break;
+        case IrInstGenIdSuspendBegin:
+            ir_print_suspend_begin(irp, (IrInstGenSuspendBegin *)instruction);
+            break;
+        case IrInstGenIdSuspendFinish:
+            ir_print_suspend_finish(irp, (IrInstGenSuspendFinish *)instruction);
+            break;
+        case IrInstGenIdResume:
+            ir_print_resume(irp, (IrInstGenResume *)instruction);
+            break;
+        case IrInstGenIdAwait:
+            ir_print_await_gen(irp, (IrInstGenAwait *)instruction);
+            break;
+        case IrInstGenIdSpillBegin:
+            ir_print_spill_begin(irp, (IrInstGenSpillBegin *)instruction);
+            break;
+        case IrInstGenIdSpillEnd:
+            ir_print_spill_end(irp, (IrInstGenSpillEnd *)instruction);
+            break;
+        case IrInstGenIdVectorExtractElem:
+            ir_print_vector_extract_elem(irp, (IrInstGenVectorExtractElem *)instruction);
+            break;
+        case IrInstGenIdVectorStoreElem:
+            ir_print_vector_store_elem(irp, (IrInstGenVectorStoreElem *)instruction);
+            break;
+        case IrInstGenIdBinaryNot:
+            ir_print_binary_not(irp, (IrInstGenBinaryNot *)instruction);
+            break;
+        case IrInstGenIdNegation:
+            ir_print_negation(irp, (IrInstGenNegation *)instruction);
+            break;
+        case IrInstGenIdNegationWrapping:
+            ir_print_negation_wrapping(irp, (IrInstGenNegationWrapping *)instruction);
             break;
     }
     fprintf(irp->f, "\n");
 }
 
-static void irp_print_basic_block(IrPrint *irp, IrBasicBlock *current_block) {
-    fprintf(irp->f, "%s_%" ZIG_PRI_usize ":\n", current_block->name_hint, current_block->debug_id);
+static void irp_print_basic_block_src(IrPrintSrc *irp, IrBasicBlockSrc *current_block) {
+    fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
+    for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
+        IrInstSrc *instruction = current_block->instruction_list.at(instr_i);
+        ir_print_inst_src(irp, instruction, false);
+    }
+}
+
+static void irp_print_basic_block_gen(IrPrintGen *irp, IrBasicBlockGen *current_block) {
+    fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
     for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
-        IrInstruction *instruction = current_block->instruction_list.at(instr_i);
-        if (irp->pass != IrPassSrc) {
-            irp->printed.put(instruction, 0);
-            irp->pending.clear();
-        }
-        ir_print_instruction(irp, instruction, false);
+        IrInstGen *instruction = current_block->instruction_list.at(instr_i);
+        irp->printed.put(instruction, 0);
+        irp->pending.clear();
+        ir_print_inst_gen(irp, instruction, false);
         for (size_t j = 0; j < irp->pending.length; ++j)
-            ir_print_instruction(irp, irp->pending.at(j), true);
+            ir_print_inst_gen(irp, irp->pending.at(j), true);
     }
 }
 
-void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass) {
-    IrPrint ir_print = {};
-    ir_print.pass = pass;
+void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size) {
+    IrPrintSrc ir_print = {};
+    ir_print.codegen = codegen;
+    ir_print.f = f;
+    ir_print.indent = indent_size;
+    ir_print.indent_size = indent_size;
+
+    irp_print_basic_block_src(&ir_print, bb);
+}
+
+void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size) {
+    IrPrintGen ir_print = {};
     ir_print.codegen = codegen;
     ir_print.f = f;
     ir_print.indent = indent_size;
@@ -2651,16 +3361,28 @@ void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int inden
     ir_print.printed.init(64);
     ir_print.pending = {};
 
-    irp_print_basic_block(&ir_print, bb);
+    irp_print_basic_block_gen(&ir_print, bb);
 
     ir_print.pending.deinit();
     ir_print.printed.deinit();
 }
 
-void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass) {
-    IrPrint ir_print = {};
-    IrPrint *irp = &ir_print;
-    irp->pass = pass;
+void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size) {
+    IrPrintSrc ir_print = {};
+    IrPrintSrc *irp = &ir_print;
+    irp->codegen = codegen;
+    irp->f = f;
+    irp->indent = indent_size;
+    irp->indent_size = indent_size;
+
+    for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
+        irp_print_basic_block_src(irp, executable->basic_block_list.at(bb_i));
+    }
+}
+
+void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size) {
+    IrPrintGen ir_print = {};
+    IrPrintGen *irp = &ir_print;
     irp->codegen = codegen;
     irp->f = f;
     irp->indent = indent_size;
@@ -2670,32 +3392,27 @@ void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_si
     irp->pending = {};
 
     for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
-        irp_print_basic_block(irp, executable->basic_block_list.at(bb_i));
+        irp_print_basic_block_gen(irp, executable->basic_block_list.at(bb_i));
     }
 
     irp->pending.deinit();
     irp->printed.deinit();
 }
 
-void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass) {
-    IrPrint ir_print = {};
-    IrPrint *irp = &ir_print;
-    irp->pass = pass;
+void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *instruction, int indent_size) {
+    IrPrintSrc ir_print = {};
+    IrPrintSrc *irp = &ir_print;
     irp->codegen = codegen;
     irp->f = f;
     irp->indent = indent_size;
     irp->indent_size = indent_size;
-    irp->printed = {};
-    irp->printed.init(4);
-    irp->pending = {};
 
-    ir_print_instruction(irp, instruction, false);
+    ir_print_inst_src(irp, instruction, false);
 }
 
-void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass) {
-    IrPrint ir_print = {};
-    IrPrint *irp = &ir_print;
-    irp->pass = pass;
+void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *instruction, int indent_size) {
+    IrPrintGen ir_print = {};
+    IrPrintGen *irp = &ir_print;
     irp->codegen = codegen;
     irp->f = f;
     irp->indent = indent_size;
@@ -2704,5 +3421,5 @@ void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_
     irp->printed.init(4);
     irp->pending = {};
 
-    ir_print_const_value(irp, value);
+    ir_print_inst_gen(irp, instruction, false);
 }
diff --git a/src/ir_print.hpp b/src/ir_print.hpp
index 1292779ac47d75aaa2d92c8e78848ca124e8de5d..dde5aaea67e40804f173f1deb681c1a23f617aad 100644
--- a/src/ir_print.hpp
+++ b/src/ir_print.hpp
@@ -12,11 +12,14 @@
 
 #include <stdio.h>
 
-void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass);
-void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass);
-void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass);
-void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass);
+void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size);
+void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size);
+void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *inst, int indent_size);
+void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *inst, int indent_size);
+void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size);
+void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size);
 
-const char* ir_instruction_type_str(IrInstructionId id);
+const char* ir_inst_src_type_str(IrInstSrcId id);
+const char* ir_inst_gen_type_str(IrInstGenId id);
 
 #endif
diff --git a/src/parser.cpp b/src/parser.cpp
index 0054c0a0c6f626b83ed9ebdcaa22665ca163c892..a4dc324b2fe26da94c7a75933d8207cb5a2a1a68 100644
--- a/src/parser.cpp
+++ b/src/parser.cpp
@@ -147,7 +147,7 @@ static void ast_invalid_token_error(ParseContext *pc, Token *token) {
 }
 
 static AstNode *ast_create_node_no_line_info(ParseContext *pc, NodeType type) {
-    AstNode *node = allocate<AstNode>(1);
+    AstNode *node = allocate<AstNode>(1, "AstNode");
     node->type = type;
     node->owner = pc->owner;
     return node;
-- 
2.54.0


From 32f0039b436a4c30b1bffef28e2f5c00ad5974bb Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sat, 25 Jan 2020 22:02:10 -0500
Subject: [PATCH 110/116] fix memory profiling

---
 src/ir.cpp       |   2 +-
 src/ir_print.cpp | 454 +++++++++++++++++++++++------------------------
 2 files changed, 228 insertions(+), 228 deletions(-)

diff --git a/src/ir.cpp b/src/ir.cpp
index 78673860cd7722f02836091d0259b7e50c5686d3..2188286bb718c273ccdbac683810e1330badd8af 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -1959,7 +1959,7 @@ static T *ir_create_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source
     const char *name = nullptr;
 #ifdef ZIG_ENABLE_MEM_PROFILE
     T *dummy = nullptr;
-    name = ir_instruction_type_str(ir_inst_id(dummy));
+    name = ir_inst_src_type_str(ir_inst_id(dummy));
 #endif
     T *special_instruction = allocate<T>(1, name);
     special_instruction->base.id = ir_inst_id(special_instruction);
diff --git a/src/ir_print.cpp b/src/ir_print.cpp
index 745c8518dbe298cf24a0c8ab8adf9fbf19835276..47c984f2efc1a60a926cd3ddaf836d5f4ecb2a36 100644
--- a/src/ir_print.cpp
+++ b/src/ir_print.cpp
@@ -58,283 +58,283 @@ static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst);
 const char* ir_inst_src_type_str(IrInstSrcId id) {
     switch (id) {
         case IrInstSrcIdInvalid:
-            return "Invalid";
+            return "SrcInvalid";
         case IrInstSrcIdShuffleVector:
-            return "Shuffle";
+            return "SrcShuffle";
         case IrInstSrcIdSplat:
-            return "Splat";
+            return "SrcSplat";
         case IrInstSrcIdDeclVar:
-            return "DeclVar";
+            return "SrcDeclVar";
         case IrInstSrcIdBr:
-            return "Br";
+            return "SrcBr";
         case IrInstSrcIdCondBr:
-            return "CondBr";
+            return "SrcCondBr";
         case IrInstSrcIdSwitchBr:
-            return "SwitchBr";
+            return "SrcSwitchBr";
         case IrInstSrcIdSwitchVar:
-            return "SwitchVar";
+            return "SrcSwitchVar";
         case IrInstSrcIdSwitchElseVar:
-            return "SwitchElseVar";
+            return "SrcSwitchElseVar";
         case IrInstSrcIdSwitchTarget:
-            return "SwitchTarget";
+            return "SrcSwitchTarget";
         case IrInstSrcIdPhi:
-            return "Phi";
+            return "SrcPhi";
         case IrInstSrcIdUnOp:
-            return "UnOp";
+            return "SrcUnOp";
         case IrInstSrcIdBinOp:
-            return "BinOp";
+            return "SrcBinOp";
         case IrInstSrcIdMergeErrSets:
-            return "MergeErrSets";
+            return "SrcMergeErrSets";
         case IrInstSrcIdLoadPtr:
-            return "LoadPtr";
+            return "SrcLoadPtr";
         case IrInstSrcIdStorePtr:
-            return "StorePtr";
+            return "SrcStorePtr";
         case IrInstSrcIdFieldPtr:
-            return "FieldPtr";
+            return "SrcFieldPtr";
         case IrInstSrcIdElemPtr:
-            return "ElemPtr";
+            return "SrcElemPtr";
         case IrInstSrcIdVarPtr:
-            return "VarPtr";
+            return "SrcVarPtr";
         case IrInstSrcIdCallExtra:
-            return "CallExtra";
+            return "SrcCallExtra";
         case IrInstSrcIdCall:
-            return "Call";
+            return "SrcCall";
         case IrInstSrcIdCallArgs:
-            return "CallArgs";
+            return "SrcCallArgs";
         case IrInstSrcIdConst:
-            return "Const";
+            return "SrcConst";
         case IrInstSrcIdReturn:
-            return "Return";
+            return "SrcReturn";
         case IrInstSrcIdContainerInitList:
-            return "ContainerInitList";
+            return "SrcContainerInitList";
         case IrInstSrcIdContainerInitFields:
-            return "ContainerInitFields";
+            return "SrcContainerInitFields";
         case IrInstSrcIdUnreachable:
-            return "Unreachable";
+            return "SrcUnreachable";
         case IrInstSrcIdTypeOf:
-            return "TypeOf";
+            return "SrcTypeOf";
         case IrInstSrcIdSetCold:
-            return "SetCold";
+            return "SrcSetCold";
         case IrInstSrcIdSetRuntimeSafety:
-            return "SetRuntimeSafety";
+            return "SrcSetRuntimeSafety";
         case IrInstSrcIdSetFloatMode:
-            return "SetFloatMode";
+            return "SrcSetFloatMode";
         case IrInstSrcIdArrayType:
-            return "ArrayType";
+            return "SrcArrayType";
         case IrInstSrcIdAnyFrameType:
-            return "AnyFrameType";
+            return "SrcAnyFrameType";
         case IrInstSrcIdSliceType:
-            return "SliceType";
+            return "SrcSliceType";
         case IrInstSrcIdAsm:
-            return "Asm";
+            return "SrcAsm";
         case IrInstSrcIdSizeOf:
-            return "SizeOf";
+            return "SrcSizeOf";
         case IrInstSrcIdTestNonNull:
-            return "TestNonNull";
+            return "SrcTestNonNull";
         case IrInstSrcIdOptionalUnwrapPtr:
-            return "OptionalUnwrapPtr";
+            return "SrcOptionalUnwrapPtr";
         case IrInstSrcIdClz:
-            return "Clz";
+            return "SrcClz";
         case IrInstSrcIdCtz:
-            return "Ctz";
+            return "SrcCtz";
         case IrInstSrcIdPopCount:
-            return "PopCount";
+            return "SrcPopCount";
         case IrInstSrcIdBswap:
-            return "Bswap";
+            return "SrcBswap";
         case IrInstSrcIdBitReverse:
-            return "BitReverse";
+            return "SrcBitReverse";
         case IrInstSrcIdImport:
-            return "Import";
+            return "SrcImport";
         case IrInstSrcIdCImport:
-            return "CImport";
+            return "SrcCImport";
         case IrInstSrcIdCInclude:
-            return "CInclude";
+            return "SrcCInclude";
         case IrInstSrcIdCDefine:
-            return "CDefine";
+            return "SrcCDefine";
         case IrInstSrcIdCUndef:
-            return "CUndef";
+            return "SrcCUndef";
         case IrInstSrcIdRef:
-            return "Ref";
+            return "SrcRef";
         case IrInstSrcIdCompileErr:
-            return "CompileErr";
+            return "SrcCompileErr";
         case IrInstSrcIdCompileLog:
-            return "CompileLog";
+            return "SrcCompileLog";
         case IrInstSrcIdErrName:
-            return "ErrName";
+            return "SrcErrName";
         case IrInstSrcIdEmbedFile:
-            return "EmbedFile";
+            return "SrcEmbedFile";
         case IrInstSrcIdCmpxchg:
-            return "Cmpxchg";
+            return "SrcCmpxchg";
         case IrInstSrcIdFence:
-            return "Fence";
+            return "SrcFence";
         case IrInstSrcIdTruncate:
-            return "Truncate";
+            return "SrcTruncate";
         case IrInstSrcIdIntCast:
-            return "IntCast";
+            return "SrcIntCast";
         case IrInstSrcIdFloatCast:
-            return "FloatCast";
+            return "SrcFloatCast";
         case IrInstSrcIdIntToFloat:
-            return "IntToFloat";
+            return "SrcIntToFloat";
         case IrInstSrcIdFloatToInt:
-            return "FloatToInt";
+            return "SrcFloatToInt";
         case IrInstSrcIdBoolToInt:
-            return "BoolToInt";
+            return "SrcBoolToInt";
         case IrInstSrcIdIntType:
-            return "IntType";
+            return "SrcIntType";
         case IrInstSrcIdVectorType:
-            return "VectorType";
+            return "SrcVectorType";
         case IrInstSrcIdBoolNot:
-            return "BoolNot";
+            return "SrcBoolNot";
         case IrInstSrcIdMemset:
-            return "Memset";
+            return "SrcMemset";
         case IrInstSrcIdMemcpy:
-            return "Memcpy";
+            return "SrcMemcpy";
         case IrInstSrcIdSlice:
-            return "Slice";
+            return "SrcSlice";
         case IrInstSrcIdMemberCount:
-            return "MemberCount";
+            return "SrcMemberCount";
         case IrInstSrcIdMemberType:
-            return "MemberType";
+            return "SrcMemberType";
         case IrInstSrcIdMemberName:
-            return "MemberName";
+            return "SrcMemberName";
         case IrInstSrcIdBreakpoint:
-            return "Breakpoint";
+            return "SrcBreakpoint";
         case IrInstSrcIdReturnAddress:
-            return "ReturnAddress";
+            return "SrcReturnAddress";
         case IrInstSrcIdFrameAddress:
-            return "FrameAddress";
+            return "SrcFrameAddress";
         case IrInstSrcIdFrameHandle:
-            return "FrameHandle";
+            return "SrcFrameHandle";
         case IrInstSrcIdFrameType:
-            return "FrameType";
+            return "SrcFrameType";
         case IrInstSrcIdFrameSize:
-            return "FrameSize";
+            return "SrcFrameSize";
         case IrInstSrcIdAlignOf:
-            return "AlignOf";
+            return "SrcAlignOf";
         case IrInstSrcIdOverflowOp:
-            return "OverflowOp";
+            return "SrcOverflowOp";
         case IrInstSrcIdTestErr:
-            return "TestErr";
+            return "SrcTestErr";
         case IrInstSrcIdMulAdd:
-            return "MulAdd";
+            return "SrcMulAdd";
         case IrInstSrcIdFloatOp:
-            return "FloatOp";
+            return "SrcFloatOp";
         case IrInstSrcIdUnwrapErrCode:
-            return "UnwrapErrCode";
+            return "SrcUnwrapErrCode";
         case IrInstSrcIdUnwrapErrPayload:
-            return "UnwrapErrPayload";
+            return "SrcUnwrapErrPayload";
         case IrInstSrcIdFnProto:
-            return "FnProto";
+            return "SrcFnProto";
         case IrInstSrcIdTestComptime:
-            return "TestComptime";
+            return "SrcTestComptime";
         case IrInstSrcIdPtrCast:
-            return "PtrCast";
+            return "SrcPtrCast";
         case IrInstSrcIdBitCast:
-            return "BitCast";
+            return "SrcBitCast";
         case IrInstSrcIdIntToPtr:
-            return "IntToPtr";
+            return "SrcIntToPtr";
         case IrInstSrcIdPtrToInt:
-            return "PtrToInt";
+            return "SrcPtrToInt";
         case IrInstSrcIdIntToEnum:
-            return "IntToEnum";
+            return "SrcIntToEnum";
         case IrInstSrcIdEnumToInt:
-            return "EnumToInt";
+            return "SrcEnumToInt";
         case IrInstSrcIdIntToErr:
-            return "IntToErr";
+            return "SrcIntToErr";
         case IrInstSrcIdErrToInt:
-            return "ErrToInt";
+            return "SrcErrToInt";
         case IrInstSrcIdCheckSwitchProngs:
-            return "CheckSwitchProngs";
+            return "SrcCheckSwitchProngs";
         case IrInstSrcIdCheckStatementIsVoid:
-            return "CheckStatementIsVoid";
+            return "SrcCheckStatementIsVoid";
         case IrInstSrcIdTypeName:
-            return "TypeName";
+            return "SrcTypeName";
         case IrInstSrcIdDeclRef:
-            return "DeclRef";
+            return "SrcDeclRef";
         case IrInstSrcIdPanic:
-            return "Panic";
+            return "SrcPanic";
         case IrInstSrcIdTagName:
-            return "TagName";
+            return "SrcTagName";
         case IrInstSrcIdTagType:
-            return "TagType";
+            return "SrcTagType";
         case IrInstSrcIdFieldParentPtr:
-            return "FieldParentPtr";
+            return "SrcFieldParentPtr";
         case IrInstSrcIdByteOffsetOf:
-            return "ByteOffsetOf";
+            return "SrcByteOffsetOf";
         case IrInstSrcIdBitOffsetOf:
-            return "BitOffsetOf";
+            return "SrcBitOffsetOf";
         case IrInstSrcIdTypeInfo:
-            return "TypeInfo";
+            return "SrcTypeInfo";
         case IrInstSrcIdType:
-            return "Type";
+            return "SrcType";
         case IrInstSrcIdHasField:
-            return "HasField";
+            return "SrcHasField";
         case IrInstSrcIdTypeId:
-            return "TypeId";
+            return "SrcTypeId";
         case IrInstSrcIdSetEvalBranchQuota:
-            return "SetEvalBranchQuota";
+            return "SrcSetEvalBranchQuota";
         case IrInstSrcIdPtrType:
-            return "PtrType";
+            return "SrcPtrType";
         case IrInstSrcIdAlignCast:
-            return "AlignCast";
+            return "SrcAlignCast";
         case IrInstSrcIdImplicitCast:
-            return "ImplicitCast";
+            return "SrcImplicitCast";
         case IrInstSrcIdResolveResult:
-            return "ResolveResult";
+            return "SrcResolveResult";
         case IrInstSrcIdResetResult:
-            return "ResetResult";
+            return "SrcResetResult";
         case IrInstSrcIdOpaqueType:
-            return "OpaqueType";
+            return "SrcOpaqueType";
         case IrInstSrcIdSetAlignStack:
-            return "SetAlignStack";
+            return "SrcSetAlignStack";
         case IrInstSrcIdArgType:
-            return "ArgType";
+            return "SrcArgType";
         case IrInstSrcIdExport:
-            return "Export";
+            return "SrcExport";
         case IrInstSrcIdErrorReturnTrace:
-            return "ErrorReturnTrace";
+            return "SrcErrorReturnTrace";
         case IrInstSrcIdErrorUnion:
-            return "ErrorUnion";
+            return "SrcErrorUnion";
         case IrInstSrcIdAtomicRmw:
-            return "AtomicRmw";
+            return "SrcAtomicRmw";
         case IrInstSrcIdAtomicLoad:
-            return "AtomicLoad";
+            return "SrcAtomicLoad";
         case IrInstSrcIdAtomicStore:
-            return "AtomicStore";
+            return "SrcAtomicStore";
         case IrInstSrcIdSaveErrRetAddr:
-            return "SaveErrRetAddr";
+            return "SrcSaveErrRetAddr";
         case IrInstSrcIdAddImplicitReturnType:
-            return "AddImplicitReturnType";
+            return "SrcAddImplicitReturnType";
         case IrInstSrcIdErrSetCast:
-            return "ErrSetCast";
+            return "SrcErrSetCast";
         case IrInstSrcIdToBytes:
-            return "ToBytes";
+            return "SrcToBytes";
         case IrInstSrcIdFromBytes:
-            return "FromBytes";
+            return "SrcFromBytes";
         case IrInstSrcIdCheckRuntimeScope:
-            return "CheckRuntimeScope";
+            return "SrcCheckRuntimeScope";
         case IrInstSrcIdHasDecl:
-            return "HasDecl";
+            return "SrcHasDecl";
         case IrInstSrcIdUndeclaredIdent:
-            return "UndeclaredIdent";
+            return "SrcUndeclaredIdent";
         case IrInstSrcIdAlloca:
-            return "Alloca";
+            return "SrcAlloca";
         case IrInstSrcIdEndExpr:
-            return "EndExpr";
+            return "SrcEndExpr";
         case IrInstSrcIdUnionInitNamedField:
-            return "UnionInitNamedField";
+            return "SrcUnionInitNamedField";
         case IrInstSrcIdSuspendBegin:
-            return "SuspendBegin";
+            return "SrcSuspendBegin";
         case IrInstSrcIdSuspendFinish:
-            return "SuspendFinish";
+            return "SrcSuspendFinish";
         case IrInstSrcIdAwait:
-            return "AwaitSr";
+            return "SrcAwaitSr";
         case IrInstSrcIdResume:
-            return "Resume";
+            return "SrcResume";
         case IrInstSrcIdSpillBegin:
-            return "SpillBegin";
+            return "SrcSpillBegin";
         case IrInstSrcIdSpillEnd:
-            return "SpillEnd";
+            return "SrcSpillEnd";
     }
     zig_unreachable();
 }
@@ -342,181 +342,181 @@ const char* ir_inst_src_type_str(IrInstSrcId id) {
 const char* ir_inst_gen_type_str(IrInstGenId id) {
     switch (id) {
         case IrInstGenIdInvalid:
-            return "Invalid";
+            return "GenInvalid";
         case IrInstGenIdShuffleVector:
-            return "Shuffle";
+            return "GenShuffle";
         case IrInstGenIdSplat:
-            return "Splat";
+            return "GenSplat";
         case IrInstGenIdDeclVar:
-            return "DeclVar";
+            return "GenDeclVar";
         case IrInstGenIdBr:
-            return "Br";
+            return "GenBr";
         case IrInstGenIdCondBr:
-            return "CondBr";
+            return "GenCondBr";
         case IrInstGenIdSwitchBr:
-            return "SwitchBr";
+            return "GenSwitchBr";
         case IrInstGenIdPhi:
-            return "Phi";
+            return "GenPhi";
         case IrInstGenIdBinOp:
-            return "BinOp";
+            return "GenBinOp";
         case IrInstGenIdLoadPtr:
-            return "LoadPtr";
+            return "GenLoadPtr";
         case IrInstGenIdStorePtr:
-            return "StorePtr";
+            return "GenStorePtr";
         case IrInstGenIdVectorStoreElem:
-            return "VectorStoreElem";
+            return "GenVectorStoreElem";
         case IrInstGenIdStructFieldPtr:
-            return "StructFieldPtr";
+            return "GenStructFieldPtr";
         case IrInstGenIdUnionFieldPtr:
-            return "UnionFieldPtr";
+            return "GenUnionFieldPtr";
         case IrInstGenIdElemPtr:
-            return "ElemPtr";
+            return "GenElemPtr";
         case IrInstGenIdVarPtr:
-            return "VarPtr";
+            return "GenVarPtr";
         case IrInstGenIdReturnPtr:
-            return "ReturnPtr";
+            return "GenReturnPtr";
         case IrInstGenIdCall:
-            return "Call";
+            return "GenCall";
         case IrInstGenIdConst:
-            return "Const";
+            return "GenConst";
         case IrInstGenIdReturn:
-            return "Return";
+            return "GenReturn";
         case IrInstGenIdCast:
-            return "Cast";
+            return "GenCast";
         case IrInstGenIdResizeSlice:
-            return "ResizeSlice";
+            return "GenResizeSlice";
         case IrInstGenIdUnreachable:
-            return "Unreachable";
+            return "GenUnreachable";
         case IrInstGenIdAsm:
-            return "Asm";
+            return "GenAsm";
         case IrInstGenIdTestNonNull:
-            return "TestNonNull";
+            return "GenTestNonNull";
         case IrInstGenIdOptionalUnwrapPtr:
-            return "OptionalUnwrapPtr";
+            return "GenOptionalUnwrapPtr";
         case IrInstGenIdOptionalWrap:
-            return "OptionalWrap";
+            return "GenOptionalWrap";
         case IrInstGenIdUnionTag:
-            return "UnionTag";
+            return "GenUnionTag";
         case IrInstGenIdClz:
-            return "Clz";
+            return "GenClz";
         case IrInstGenIdCtz:
-            return "Ctz";
+            return "GenCtz";
         case IrInstGenIdPopCount:
-            return "PopCount";
+            return "GenPopCount";
         case IrInstGenIdBswap:
-            return "Bswap";
+            return "GenBswap";
         case IrInstGenIdBitReverse:
-            return "BitReverse";
+            return "GenBitReverse";
         case IrInstGenIdRef:
-            return "Ref";
+            return "GenRef";
         case IrInstGenIdErrName:
-            return "ErrName";
+            return "GenErrName";
         case IrInstGenIdCmpxchg:
-            return "Cmpxchg";
+            return "GenCmpxchg";
         case IrInstGenIdFence:
-            return "Fence";
+            return "GenFence";
         case IrInstGenIdTruncate:
-            return "Truncate";
+            return "GenTruncate";
         case IrInstGenIdBoolNot:
-            return "BoolNot";
+            return "GenBoolNot";
         case IrInstGenIdMemset:
-            return "Memset";
+            return "GenMemset";
         case IrInstGenIdMemcpy:
-            return "Memcpy";
+            return "GenMemcpy";
         case IrInstGenIdSlice:
-            return "Slice";
+            return "GenSlice";
         case IrInstGenIdBreakpoint:
-            return "Breakpoint";
+            return "GenBreakpoint";
         case IrInstGenIdReturnAddress:
-            return "ReturnAddress";
+            return "GenReturnAddress";
         case IrInstGenIdFrameAddress:
-            return "FrameAddress";
+            return "GenFrameAddress";
         case IrInstGenIdFrameHandle:
-            return "FrameHandle";
+            return "GenFrameHandle";
         case IrInstGenIdFrameSize:
-            return "FrameSize";
+            return "GenFrameSize";
         case IrInstGenIdOverflowOp:
-            return "OverflowOp";
+            return "GenOverflowOp";
         case IrInstGenIdTestErr:
-            return "TestErr";
+            return "GenTestErr";
         case IrInstGenIdMulAdd:
-            return "MulAdd";
+            return "GenMulAdd";
         case IrInstGenIdFloatOp:
-            return "FloatOp";
+            return "GenFloatOp";
         case IrInstGenIdUnwrapErrCode:
-            return "UnwrapErrCode";
+            return "GenUnwrapErrCode";
         case IrInstGenIdUnwrapErrPayload:
-            return "UnwrapErrPayload";
+            return "GenUnwrapErrPayload";
         case IrInstGenIdErrWrapCode:
-            return "ErrWrapCode";
+            return "GenErrWrapCode";
         case IrInstGenIdErrWrapPayload:
-            return "ErrWrapPayload";
+            return "GenErrWrapPayload";
         case IrInstGenIdPtrCast:
-            return "PtrCast";
+            return "GenPtrCast";
         case IrInstGenIdBitCast:
-            return "BitCast";
+            return "GenBitCast";
         case IrInstGenIdWidenOrShorten:
-            return "WidenOrShorten";
+            return "GenWidenOrShorten";
         case IrInstGenIdIntToPtr:
-            return "IntToPtr";
+            return "GenIntToPtr";
         case IrInstGenIdPtrToInt:
-            return "PtrToInt";
+            return "GenPtrToInt";
         case IrInstGenIdIntToEnum:
-            return "IntToEnum";
+            return "GenIntToEnum";
         case IrInstGenIdIntToErr:
-            return "IntToErr";
+            return "GenIntToErr";
         case IrInstGenIdErrToInt:
-            return "ErrToInt";
+            return "GenErrToInt";
         case IrInstGenIdPanic:
-            return "Panic";
+            return "GenPanic";
         case IrInstGenIdTagName:
-            return "TagName";
+            return "GenTagName";
         case IrInstGenIdFieldParentPtr:
-            return "FieldParentPtr";
+            return "GenFieldParentPtr";
         case IrInstGenIdAlignCast:
-            return "AlignCast";
+            return "GenAlignCast";
         case IrInstGenIdErrorReturnTrace:
-            return "ErrorReturnTrace";
+            return "GenErrorReturnTrace";
         case IrInstGenIdAtomicRmw:
-            return "AtomicRmw";
+            return "GenAtomicRmw";
         case IrInstGenIdAtomicLoad:
-            return "AtomicLoad";
+            return "GenAtomicLoad";
         case IrInstGenIdAtomicStore:
-            return "AtomicStore";
+            return "GenAtomicStore";
         case IrInstGenIdSaveErrRetAddr:
-            return "SaveErrRetAddr";
+            return "GenSaveErrRetAddr";
         case IrInstGenIdVectorToArray:
-            return "VectorToArray";
+            return "GenVectorToArray";
         case IrInstGenIdArrayToVector:
-            return "ArrayToVector";
+            return "GenArrayToVector";
         case IrInstGenIdAssertZero:
-            return "AssertZero";
+            return "GenAssertZero";
         case IrInstGenIdAssertNonNull:
-            return "AssertNonNull";
+            return "GenAssertNonNull";
         case IrInstGenIdAlloca:
-            return "Alloca";
+            return "GenAlloca";
         case IrInstGenIdPtrOfArrayToSlice:
-            return "PtrOfArrayToSlice";
+            return "GenPtrOfArrayToSlice";
         case IrInstGenIdSuspendBegin:
-            return "SuspendBegin";
+            return "GenSuspendBegin";
         case IrInstGenIdSuspendFinish:
-            return "SuspendFinish";
+            return "GenSuspendFinish";
         case IrInstGenIdAwait:
-            return "Await";
+            return "GenAwait";
         case IrInstGenIdResume:
-            return "Resume";
+            return "GenResume";
         case IrInstGenIdSpillBegin:
-            return "SpillBegin";
+            return "GenSpillBegin";
         case IrInstGenIdSpillEnd:
-            return "SpillEnd";
+            return "GenSpillEnd";
         case IrInstGenIdVectorExtractElem:
-            return "VectorExtractElem";
+            return "GenVectorExtractElem";
         case IrInstGenIdBinaryNot:
-            return "BinaryNot";
+            return "GenBinaryNot";
         case IrInstGenIdNegation:
-            return "Negation";
+            return "GenNegation";
         case IrInstGenIdNegationWrapping:
-            return "NegationWrapping";
+            return "GenNegationWrapping";
     }
     zig_unreachable();
 }
-- 
2.54.0


From d9fb6c20540300013dc67ec144b555b8ab649646 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 26 Jan 2020 00:55:04 -0500
Subject: [PATCH 111/116] fix compilation error

---
 src/ir.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/ir.cpp b/src/ir.cpp
index 7e73b3107dc19e2d92aa885a7fe05ac229a7ee9c..b24cf3828e7d508f63adf1337ebdafcf3eb7cd2e 100644
--- a/src/ir.cpp
+++ b/src/ir.cpp
@@ -23263,9 +23263,9 @@ static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrc
     }
 
     if (target->value->type->id != ZigTypeIdEnum) {
-        ir_add_error(ira, target,
+        ir_add_error(ira, &target->base,
             buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
-        return ira->codegen->invalid_instruction;
+        return ira->codegen->invalid_inst_gen;
     }
 
     if (target->value->type->data.enumeration.src_field_count == 1 &&
-- 
2.54.0


From 3839ea89785856bbed0624a6a18eb6e5acfb46c3 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 26 Jan 2020 09:55:04 -0500
Subject: [PATCH 112/116] fix debug info code not being freestanding compatible

in stack tracing code, the idea was to detect the tty settings at the
top of the stack and pass the information down. somewhere along the way
this got changed so that setTtyColor was assuming the global stderr_file
was related to the output stream the stack trace was being printed to.

now, tty_color is changed to tty_config, and it is an enum rather than a
bool, telling how tty colors are expected to be handled. windows is
still incorrectly looking at stderr_file.
---
 lib/std/debug.zig | 234 +++++++++++++++++++++++++---------------------
 1 file changed, 125 insertions(+), 109 deletions(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 33b062db2385ff7a254c3f03845ec72e2ebf14d6..75d2afb8e939f8b6b87a676b9e3ff4586da1f7b0 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {
     }
 }
 
-fn wantTtyColor() bool {
+fn detectTTYConfig() TTY.Config {
     var bytes: [128]u8 = undefined;
     const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
-    return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| true else |_| stderr_file.isTty();
+    if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| {
+        return .escape_codes;
+    } else |_| {
+        if (stderr_file.supportsAnsiEscapeCodes()) {
+            return .escape_codes;
+        } else if (builtin.os == .windows) {
+            return .windows_api;
+        } else {
+            return .no_color;
+        }
+    }
 }
 
 /// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.
@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
         stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
         return;
     };
-    writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch |err| {
+    writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch |err| {
         stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
         return;
     };
@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
         stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
         return;
     };
-    const tty_color = wantTtyColor();
-    printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return;
+    const tty_config = detectTTYConfig();
+    printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return;
     const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*;
-    printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return;
+    printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return;
     var it = StackIterator{
         .first_addr = null,
         .fp = bp,
     };
     while (it.next()) |return_address| {
-        printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return;
+        printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return;
     }
 }
 
@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {
         stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
         return;
     };
-    writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch |err| {
+    writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch |err| {
         stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
         return;
     };
@@ -264,7 +274,7 @@ pub fn writeStackTrace(
     out_stream: var,
     allocator: *mem.Allocator,
     debug_info: *DebugInfo,
-    tty_color: bool,
+    tty_config: TTY.Config,
 ) !void {
     if (builtin.strip_debug_info) return error.MissingDebugInfo;
     var frame_index: usize = 0;
@@ -275,7 +285,7 @@ pub fn writeStackTrace(
         frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;
     }) {
         const return_address = stack_trace.instruction_addresses[frame_index];
-        try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
+        try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
     }
 }
 
@@ -319,20 +329,25 @@ pub const StackIterator = struct {
     }
 };
 
-pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void {
+pub fn writeCurrentStackTrace(
+    out_stream: var,
+    debug_info: *DebugInfo,
+    tty_config: TTY.Config,
+    start_addr: ?usize,
+) !void {
     if (builtin.os == .windows) {
-        return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr);
+        return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr);
     }
     var it = StackIterator.init(start_addr);
     while (it.next()) |return_address| {
-        try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
+        try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
     }
 }
 
 pub fn writeCurrentStackTraceWindows(
     out_stream: var,
     debug_info: *DebugInfo,
-    tty_color: bool,
+    tty_config: TTY.Config,
     start_addr: ?usize,
 ) !void {
     var addr_buf: [1024]usize = undefined;
@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(
         return;
     } else 0;
     for (addrs[start_i..]) |addr| {
-        try printSourceAtAddress(debug_info, out_stream, addr, tty_color);
+        try printSourceAtAddress(debug_info, out_stream, addr, tty_config);
     }
 }
 
 /// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,
 /// make this `noasync fn` and remove the individual noasync calls.
-pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
+pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
     if (builtin.os == .windows) {
-        return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color);
+        return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config);
     }
     if (comptime std.Target.current.isDarwin()) {
-        return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color);
+        return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config);
     }
-    return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color);
+    return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config);
 }
 
-fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void {
+fn printSourceAtAddressWindows(
+    di: *DebugInfo,
+    out_stream: var,
+    relocated_address: usize,
+    tty_config: TTY.Config,
+) !void {
     const allocator = getDebugInfoAllocator();
     const base_address = process.getBaseAddress();
     const relative_address = relocated_address - base_address;
@@ -379,7 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
         }
     } else {
         // we have no information to add to the address
-        return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_color, printLineFromFileAnyOs);
+        return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs);
     };
 
     const mod = &di.modules[mod_index];
@@ -507,85 +527,81 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
         relocated_address,
         symbol_name,
         obj_basename,
-        tty_color,
+        tty_config,
         printLineFromFileAnyOs,
     );
 }
 
-const TtyColor = enum {
-    Red,
-    Green,
-    Cyan,
-    White,
-    Dim,
-    Bold,
-    Reset,
+pub const TTY = struct {
+    pub const Color = enum {
+        Red,
+        Green,
+        Cyan,
+        White,
+        Dim,
+        Bold,
+        Reset,
+    };
+
+    pub const Config = enum {
+        no_color,
+        escape_codes,
+        // TODO give this a payload of file handle
+        windows_api,
+
+        fn setColor(conf: Config, out_stream: var, color: Color) void {
+            switch (conf) {
+                .no_color => return,
+                .escape_codes => switch (color) {
+                    .Red => out_stream.write(RED) catch return,
+                    .Green => out_stream.write(GREEN) catch return,
+                    .Cyan => out_stream.write(CYAN) catch return,
+                    .White, .Bold => out_stream.write(WHITE) catch return,
+                    .Dim => out_stream.write(DIM) catch return,
+                    .Reset => out_stream.write(RESET) catch return,
+                },
+                .windows_api => if (builtin.os == .windows) {
+                    const S = struct {
+                        var attrs: windows.WORD = undefined;
+                        var init_attrs = false;
+                    };
+                    if (!S.init_attrs) {
+                        S.init_attrs = true;
+                        var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
+                        // TODO handle error
+                        _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
+                        S.attrs = info.wAttributes;
+                    }
+
+                    // TODO handle errors
+                    switch (color) {
+                        .Red => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
+                        },
+                        .Green => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
+                        },
+                        .Cyan => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
+                        },
+                        .White, .Bold => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
+                        },
+                        .Dim => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
+                        },
+                        .Reset => {
+                            _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
+                        },
+                    }
+                } else {
+                    unreachable;
+                },
+            }
+        }
+    };
 };
 
-/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt
-fn setTtyColor(tty_color: TtyColor) void {
-    if (stderr_file.supportsAnsiEscapeCodes()) {
-        switch (tty_color) {
-            TtyColor.Red => {
-                stderr_file.write(RED) catch return;
-            },
-            TtyColor.Green => {
-                stderr_file.write(GREEN) catch return;
-            },
-            TtyColor.Cyan => {
-                stderr_file.write(CYAN) catch return;
-            },
-            TtyColor.White, TtyColor.Bold => {
-                stderr_file.write(WHITE) catch return;
-            },
-            TtyColor.Dim => {
-                stderr_file.write(DIM) catch return;
-            },
-            TtyColor.Reset => {
-                stderr_file.write(RESET) catch return;
-            },
-        }
-
-        return;
-    }
-
-    if (builtin.os == .windows) {
-        const S = struct {
-            var attrs: windows.WORD = undefined;
-            var init_attrs = false;
-        };
-        if (!S.init_attrs) {
-            S.init_attrs = true;
-            var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
-            // TODO handle error
-            _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
-            S.attrs = info.wAttributes;
-        }
-
-        // TODO handle errors
-        switch (tty_color) {
-            TtyColor.Red => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
-            },
-            TtyColor.Green => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
-            },
-            TtyColor.Cyan => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
-            },
-            TtyColor.White, TtyColor.Bold => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
-            },
-            TtyColor.Dim => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
-            },
-            TtyColor.Reset => {
-                _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
-            },
-        }
-    }
-}
-
 fn populateModule(di: *DebugInfo, mod: *Module) !void {
     if (mod.populated)
         return;
@@ -650,12 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach
     return null;
 }
 
-fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
+fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
     const base_addr = process.getBaseAddress();
     const adjusted_addr = 0x100000000 + (address - base_addr);
 
     const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
-        return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFileAnyOs);
+        return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs);
     };
 
     const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
@@ -676,13 +692,13 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
         address,
         symbol_name,
         compile_unit_name,
-        tty_color,
+        tty_config,
         printLineFromFileAnyOs,
     );
 }
 
-pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
-    return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs);
+pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
+    return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs);
 }
 
 fn printLineInfo(
@@ -691,10 +707,10 @@ fn printLineInfo(
     address: usize,
     symbol_name: []const u8,
     compile_unit_name: []const u8,
-    tty_color: bool,
+    tty_config: TTY.Config,
     comptime printLineFromFile: var,
 ) !void {
-    if (tty_color) setTtyColor(.White);
+    tty_config.setColor(out_stream, .White);
 
     if (line_info) |*li| {
         try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
@@ -702,11 +718,11 @@ fn printLineInfo(
         try out_stream.print("???:?:?", .{});
     }
 
-    if (tty_color) setTtyColor(.Reset);
+    tty_config.setColor(out_stream, .Reset);
     try out_stream.write(": ");
-    if (tty_color) setTtyColor(.Dim);
+    tty_config.setColor(out_stream, .Dim);
     try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
-    if (tty_color) setTtyColor(.Reset);
+    tty_config.setColor(out_stream, .Reset);
     try out_stream.write("\n");
 
     // Show the matching source code line if possible
@@ -717,9 +733,9 @@ fn printLineInfo(
                 const space_needed = @intCast(usize, li.column - 1);
 
                 try out_stream.writeByteNTimes(' ', space_needed);
-                if (tty_color) setTtyColor(.Green);
+                tty_config.setColor(out_stream, .Green);
                 try out_stream.write("^");
-                if (tty_color) setTtyColor(.Reset);
+                tty_config.setColor(out_stream, .Reset);
             }
             try out_stream.write("\n");
         } else |err| switch (err) {
@@ -1167,11 +1183,11 @@ pub const DwarfInfo = struct {
         self: *DwarfInfo,
         out_stream: var,
         address: usize,
-        tty_color: bool,
+        tty_config: TTY.Config,
         comptime printLineFromFile: var,
     ) !void {
         const compile_unit = self.findCompileUnit(address) catch {
-            return printLineInfo(out_stream, null, address, "???", "???", tty_color, printLineFromFile);
+            return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile);
         };
 
         const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
@@ -1188,7 +1204,7 @@ pub const DwarfInfo = struct {
             address,
             symbol_name,
             compile_unit_name,
-            tty_color,
+            tty_config,
             printLineFromFile,
         );
     }
-- 
2.54.0


From 51ac8eb08e7542c25c7d3a0d1ebeac040544e4c0 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 26 Jan 2020 18:28:52 -0500
Subject: [PATCH 113/116] fix regression in windows stack traces tty detection

---
 lib/std/debug.zig | 4 ++--
 test/tests.zig    | 3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 75d2afb8e939f8b6b87a676b9e3ff4586da1f7b0..857fe9223f0e35905bbcd2a613a8b1405f1bec5e 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -81,7 +81,7 @@ pub fn getSelfDebugInfo() !*DebugInfo {
     }
 }
 
-fn detectTTYConfig() TTY.Config {
+pub fn detectTTYConfig() TTY.Config {
     var bytes: [128]u8 = undefined;
     const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
     if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| {
@@ -89,7 +89,7 @@ fn detectTTYConfig() TTY.Config {
     } else |_| {
         if (stderr_file.supportsAnsiEscapeCodes()) {
             return .escape_codes;
-        } else if (builtin.os == .windows) {
+        } else if (builtin.os == .windows and stderr_file.isTty()) {
             return .windows_api;
         } else {
             return .no_color;
diff --git a/test/tests.zig b/test/tests.zig
index 4d1f15fe294ea06737d39fa78926440f0125fc45..f079b4664c8c5096f7eacc37badfecc9cee6e868 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -622,6 +622,9 @@ pub const StackTracesContext = struct {
             child.stderr_behavior = .Pipe;
             child.env_map = b.env_map;
 
+            if (b.verbose) {
+                printInvocation(args.toSliceConst());
+            }
             child.spawn() catch |err| debug.panic("Unable to spawn {}: {}\n", .{ full_exe_path, @errorName(err) });
 
             var stdout = Buffer.initNull(b.allocator);
-- 
2.54.0


From f8e015c85f2eaf4d35523d362a7be2b9614a162b Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Mon, 27 Jan 2020 13:10:35 +0100
Subject: [PATCH 114/116] Handle S_GPROC32 symbols in PDB files

Fixes some incomplete stack traces on Windows.
---
 lib/std/debug.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 857fe9223f0e35905bbcd2a613a8b1405f1bec5e..442b5db2102a245d417804561eff57915cd34943 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -412,7 +412,7 @@ fn printSourceAtAddressWindows(
         if (prefix.RecordLen < 2)
             return error.InvalidDebugInfo;
         switch (prefix.RecordKind) {
-            pdb.SymbolKind.S_LPROC32 => {
+            .S_LPROC32, .S_GPROC32 => {
                 const proc_sym = @ptrCast(*pdb.ProcSym, &mod.symbols[symbol_i + @sizeOf(pdb.RecordPrefix)]);
                 const vaddr_start = coff_section.header.virtual_address + proc_sym.CodeOffset;
                 const vaddr_end = vaddr_start + proc_sym.CodeSize;
-- 
2.54.0


From 7336b750bd5e3c271a654e6d44d572cf0427a0b1 Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Mon, 27 Jan 2020 13:12:01 +0100
Subject: [PATCH 115/116] Fix stack-trace address calculation on Windows

Let's always subtract 1 from the return address so that we're sure to be
inside the callee.

Fixes some edge case where the stack trace skipped the first entry.
---
 lib/std/debug.zig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 442b5db2102a245d417804561eff57915cd34943..97c20e5104e72172e2680020e4aed3681a1a72f8 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -360,7 +360,7 @@ pub fn writeCurrentStackTraceWindows(
         return;
     } else 0;
     for (addrs[start_i..]) |addr| {
-        try printSourceAtAddress(debug_info, out_stream, addr, tty_config);
+        try printSourceAtAddress(debug_info, out_stream, addr - 1, tty_config);
     }
 }
 
-- 
2.54.0


From d5c2a20d8e2a8c694127fffbe0d1a19f5eaaf92f Mon Sep 17 00:00:00 2001
From: LemonBoy <thatlemon@gmail.com>
Date: Thu, 23 Jan 2020 18:07:05 +0100
Subject: [PATCH 116/116] Unify the two DWARF interpreters

* Let's consolidate the special-cased DWARF interpreter for OSX with the
  general purpose one

* Drop the assumption that all the debug data is contained in a single
  contiguous slice of memory. This is a good news for freestanding
  targets and paves the way for supporting compressed debug sections.
---
 lib/std/c/darwin.zig |   3 +
 lib/std/debug.zig    | 593 +++++++++++++++++--------------------------
 2 files changed, 232 insertions(+), 364 deletions(-)

diff --git a/lib/std/c/darwin.zig b/lib/std/c/darwin.zig
index bc58b1fba181143a0c538063b1cf6512673bc8fe..524c82211e30a4b62a47a3137ada3afed626c70f 100644
--- a/lib/std/c/darwin.zig
+++ b/lib/std/c/darwin.zig
@@ -7,7 +7,10 @@ usingnamespace @import("../os/bits.zig");
 
 extern "c" fn __error() *c_int;
 pub extern "c" fn _NSGetExecutablePath(buf: [*]u8, bufsize: *u32) c_int;
+pub extern "c" fn _dyld_image_count() u32;
 pub extern "c" fn _dyld_get_image_header(image_index: u32) ?*mach_header;
+pub extern "c" fn _dyld_get_image_vmaddr_slide(image_index: u32) usize;
+pub extern "c" fn _dyld_get_image_name(image_index: u32) [*:0]const u8;
 
 pub extern "c" fn __getdirentries64(fd: c_int, buf_ptr: [*]u8, buf_len: usize, basep: *i64) isize;
 
diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index 857fe9223f0e35905bbcd2a613a8b1405f1bec5e..0dad04fae7206231ce759d6268b7238be98b6318 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -963,59 +963,61 @@ pub fn openDwarfDebugInfo(di: *DwarfInfo, allocator: *mem.Allocator) !void {
 
 pub fn openElfDebugInfo(
     allocator: *mem.Allocator,
-    elf_seekable_stream: *DwarfSeekableStream,
-    elf_in_stream: *DwarfInStream,
+    data: []u8,
 ) !DwarfInfo {
-    var efile = try elf.Elf.openStream(allocator, elf_seekable_stream, elf_in_stream);
-    errdefer efile.close();
+    var seekable_stream = io.SliceSeekableInStream.init(data);
+    var efile = try elf.Elf.openStream(
+        allocator,
+        @ptrCast(*DwarfSeekableStream, &seekable_stream.seekable_stream),
+        @ptrCast(*DwarfInStream, &seekable_stream.stream),
+    );
+    defer efile.close();
+
+    const debug_info = (try efile.findSection(".debug_info")) orelse
+        return error.MissingDebugInfo;
+    const debug_abbrev = (try efile.findSection(".debug_abbrev")) orelse
+        return error.MissingDebugInfo;
+    const debug_str = (try efile.findSection(".debug_str")) orelse
+        return error.MissingDebugInfo;
+    const debug_line = (try efile.findSection(".debug_line")) orelse
+        return error.MissingDebugInfo;
+    const opt_debug_ranges = try efile.findSection(".debug_ranges");
 
     var di = DwarfInfo{
-        .dwarf_seekable_stream = elf_seekable_stream,
-        .dwarf_in_stream = elf_in_stream,
         .endian = efile.endian,
-        .debug_info = (try findDwarfSectionFromElf(&efile, ".debug_info")) orelse return error.MissingDebugInfo,
-        .debug_abbrev = (try findDwarfSectionFromElf(&efile, ".debug_abbrev")) orelse return error.MissingDebugInfo,
-        .debug_str = (try findDwarfSectionFromElf(&efile, ".debug_str")) orelse return error.MissingDebugInfo,
-        .debug_line = (try findDwarfSectionFromElf(&efile, ".debug_line")) orelse return error.MissingDebugInfo,
-        .debug_ranges = (try findDwarfSectionFromElf(&efile, ".debug_ranges")),
-        .abbrev_table_list = undefined,
-        .compile_unit_list = undefined,
-        .func_list = undefined,
+        .debug_info = (data[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)]),
+        .debug_abbrev = (data[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)]),
+        .debug_str = (data[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)]),
+        .debug_line = (data[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)]),
+        .debug_ranges = if (opt_debug_ranges) |debug_ranges|
+            data[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
+        else
+            null,
     };
+
+    efile.close();
+
     try openDwarfDebugInfo(&di, allocator);
     return di;
 }
 
 fn openSelfDebugInfoPosix(allocator: *mem.Allocator) !DwarfInfo {
-    const S = struct {
-        var self_exe_file: File = undefined;
-        var self_exe_mmap_seekable: io.SliceSeekableInStream = undefined;
-    };
+    var exe_file = try fs.openSelfExe();
+    errdefer exe_file.close();
 
-    S.self_exe_file = try fs.openSelfExe();
-    errdefer S.self_exe_file.close();
-
-    const self_exe_len = math.cast(usize, try S.self_exe_file.getEndPos()) catch return error.DebugInfoTooLarge;
-    const self_exe_mmap_len = mem.alignForward(self_exe_len, mem.page_size);
-    const self_exe_mmap = try os.mmap(
+    const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
+        return error.DebugInfoTooLarge;
+    const exe_mmap = try os.mmap(
         null,
-        self_exe_mmap_len,
+        exe_len,
         os.PROT_READ,
         os.MAP_SHARED,
-        S.self_exe_file.handle,
+        exe_file.handle,
         0,
     );
-    errdefer os.munmap(self_exe_mmap);
+    errdefer os.munmap(exe_mmap);
 
-    S.self_exe_mmap_seekable = io.SliceSeekableInStream.init(self_exe_mmap);
-
-    return openElfDebugInfo(
-        allocator,
-        // TODO https://github.com/ziglang/zig/issues/764
-        @ptrCast(*DwarfSeekableStream, &S.self_exe_mmap_seekable.seekable_stream),
-        // TODO https://github.com/ziglang/zig/issues/764
-        @ptrCast(*DwarfInStream, &S.self_exe_mmap_seekable.stream),
-    );
+    return openElfDebugInfo(allocator, exe_mmap);
 }
 
 fn openSelfDebugInfoMacOs(allocator: *mem.Allocator) !DebugInfo {
@@ -1142,41 +1144,26 @@ const MachoSymbol = struct {
     }
 };
 
-const MachOFile = struct {
-    bytes: []align(@alignOf(macho.mach_header_64)) const u8,
-    sect_debug_info: ?*const macho.section_64,
-    sect_debug_line: ?*const macho.section_64,
-};
-
 pub const DwarfSeekableStream = io.SeekableStream(anyerror, anyerror);
 pub const DwarfInStream = io.InStream(anyerror);
 
 pub const DwarfInfo = struct {
-    dwarf_seekable_stream: *DwarfSeekableStream,
-    dwarf_in_stream: *DwarfInStream,
     endian: builtin.Endian,
-    debug_info: Section,
-    debug_abbrev: Section,
-    debug_str: Section,
-    debug_line: Section,
-    debug_ranges: ?Section,
-    abbrev_table_list: ArrayList(AbbrevTableHeader),
-    compile_unit_list: ArrayList(CompileUnit),
-    func_list: ArrayList(Func),
-
-    pub const Section = struct {
-        offset: u64,
-        size: u64,
-    };
+    // No memory is owned by the DwarfInfo
+    debug_info: []u8,
+    debug_abbrev: []u8,
+    debug_str: []u8,
+    debug_line: []u8,
+    debug_ranges: ?[]u8,
+    // Filled later by the initializer
+    abbrev_table_list: ArrayList(AbbrevTableHeader) = undefined,
+    compile_unit_list: ArrayList(CompileUnit) = undefined,
+    func_list: ArrayList(Func) = undefined,
 
     pub fn allocator(self: DwarfInfo) *mem.Allocator {
         return self.abbrev_table_list.allocator;
     }
 
-    pub fn readString(self: *DwarfInfo) ![]u8 {
-        return readStringRaw(self.allocator(), self.dwarf_in_stream);
-    }
-
     /// This function works in freestanding mode.
     /// fn printLineFromFile(out_stream: var, line_info: LineInfo) !void
     pub fn printSourceAtAddress(
@@ -1222,35 +1209,38 @@ pub const DwarfInfo = struct {
     }
 
     fn scanAllFunctions(di: *DwarfInfo) !void {
-        const debug_info_end = di.debug_info.offset + di.debug_info.size;
-        var this_unit_offset = di.debug_info.offset;
+        var s = io.SliceSeekableInStream.init(di.debug_info);
+        var this_unit_offset: u64 = 0;
 
-        while (this_unit_offset < debug_info_end) {
-            try di.dwarf_seekable_stream.seekTo(this_unit_offset);
+        while (true) {
+            s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
+                error.EndOfStream => return,
+                else => return err,
+            };
 
             var is_64: bool = undefined;
-            const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
+            const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
             if (unit_length == 0) return;
             const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
 
-            const version = try di.dwarf_in_stream.readInt(u16, di.endian);
+            const version = try s.stream.readInt(u16, di.endian);
             if (version < 2 or version > 5) return error.InvalidDebugInfo;
 
-            const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
+            const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
 
-            const address_size = try di.dwarf_in_stream.readByte();
+            const address_size = try s.stream.readByte();
             if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
 
-            const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
+            const compile_unit_pos = try s.seekable_stream.getPos();
             const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
 
-            try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
+            try s.seekable_stream.seekTo(compile_unit_pos);
 
             const next_unit_pos = this_unit_offset + next_offset;
 
-            while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {
-                const die_obj = (try di.parseDie(abbrev_table, is_64)) orelse continue;
-                const after_die_offset = try di.dwarf_seekable_stream.getPos();
+            while ((try s.seekable_stream.getPos()) < next_unit_pos) {
+                const die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse continue;
+                const after_die_offset = try s.seekable_stream.getPos();
 
                 switch (die_obj.tag_id) {
                     DW.TAG_subprogram, DW.TAG_inlined_subroutine, DW.TAG_subroutine, DW.TAG_entry_point => {
@@ -1266,14 +1256,14 @@ pub const DwarfInfo = struct {
                                     // Follow the DIE it points to and repeat
                                     const ref_offset = try this_die_obj.getAttrRef(DW.AT_abstract_origin);
                                     if (ref_offset > next_offset) return error.InvalidDebugInfo;
-                                    try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
-                                    this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
+                                    try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
+                                    this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
                                 } else if (this_die_obj.getAttr(DW.AT_specification)) |ref| {
                                     // Follow the DIE it points to and repeat
                                     const ref_offset = try this_die_obj.getAttrRef(DW.AT_specification);
                                     if (ref_offset > next_offset) return error.InvalidDebugInfo;
-                                    try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
-                                    this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
+                                    try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
+                                    this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
                                 } else {
                                     break :x null;
                                 }
@@ -1311,12 +1301,10 @@ pub const DwarfInfo = struct {
                             .pc_range = pc_range,
                         });
                     },
-                    else => {
-                        continue;
-                    },
+                    else => {},
                 }
 
-                try di.dwarf_seekable_stream.seekTo(after_die_offset);
+                try s.seekable_stream.seekTo(after_die_offset);
             }
 
             this_unit_offset += next_offset;
@@ -1324,32 +1312,35 @@ pub const DwarfInfo = struct {
     }
 
     fn scanAllCompileUnits(di: *DwarfInfo) !void {
-        const debug_info_end = di.debug_info.offset + di.debug_info.size;
-        var this_unit_offset = di.debug_info.offset;
+        var s = io.SliceSeekableInStream.init(di.debug_info);
+        var this_unit_offset: u64 = 0;
 
-        while (this_unit_offset < debug_info_end) {
-            try di.dwarf_seekable_stream.seekTo(this_unit_offset);
+        while (true) {
+            s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
+                error.EndOfStream => return,
+                else => return err,
+            };
 
             var is_64: bool = undefined;
-            const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
+            const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
             if (unit_length == 0) return;
             const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
 
-            const version = try di.dwarf_in_stream.readInt(u16, di.endian);
+            const version = try s.stream.readInt(u16, di.endian);
             if (version < 2 or version > 5) return error.InvalidDebugInfo;
 
-            const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
+            const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
 
-            const address_size = try di.dwarf_in_stream.readByte();
+            const address_size = try s.stream.readByte();
             if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
 
-            const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
+            const compile_unit_pos = try s.seekable_stream.getPos();
             const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
 
-            try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
+            try s.seekable_stream.seekTo(compile_unit_pos);
 
             const compile_unit_die = try di.allocator().create(Die);
-            compile_unit_die.* = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
+            compile_unit_die.* = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
 
             if (compile_unit_die.tag_id != DW.TAG_compile_unit) return error.InvalidDebugInfo;
 
@@ -1395,15 +1386,18 @@ pub const DwarfInfo = struct {
             }
             if (di.debug_ranges) |debug_ranges| {
                 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
+                    var s = io.SliceSeekableInStream.init(debug_ranges);
+
                     // All the addresses in the list are relative to the value
                     // specified by DW_AT_low_pc or to some other value encoded
                     // in the list itself
                     var base_address = try compile_unit.die.getAttrAddr(DW.AT_low_pc);
 
-                    try di.dwarf_seekable_stream.seekTo(debug_ranges.offset + ranges_offset);
+                    try s.seekable_stream.seekTo(ranges_offset);
+
                     while (true) {
-                        const begin_addr = try di.dwarf_in_stream.readIntLittle(usize);
-                        const end_addr = try di.dwarf_in_stream.readIntLittle(usize);
+                        const begin_addr = try s.stream.readIntLittle(usize);
+                        const end_addr = try s.stream.readIntLittle(usize);
                         if (begin_addr == 0 and end_addr == 0) {
                             break;
                         }
@@ -1435,30 +1429,33 @@ pub const DwarfInfo = struct {
                 return &header.table;
             }
         }
-        try di.dwarf_seekable_stream.seekTo(di.debug_abbrev.offset + abbrev_offset);
         try di.abbrev_table_list.append(AbbrevTableHeader{
             .offset = abbrev_offset,
-            .table = try di.parseAbbrevTable(),
+            .table = try di.parseAbbrevTable(abbrev_offset),
         });
         return &di.abbrev_table_list.items[di.abbrev_table_list.len - 1].table;
     }
 
-    fn parseAbbrevTable(di: *DwarfInfo) !AbbrevTable {
+    fn parseAbbrevTable(di: *DwarfInfo, offset: u64) !AbbrevTable {
+        var s = io.SliceSeekableInStream.init(di.debug_abbrev);
+
+        try s.seekable_stream.seekTo(offset);
         var result = AbbrevTable.init(di.allocator());
+        errdefer result.deinit();
         while (true) {
-            const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
+            const abbrev_code = try leb.readULEB128(u64, &s.stream);
             if (abbrev_code == 0) return result;
             try result.append(AbbrevTableEntry{
                 .abbrev_code = abbrev_code,
-                .tag_id = try leb.readULEB128(u64, di.dwarf_in_stream),
-                .has_children = (try di.dwarf_in_stream.readByte()) == DW.CHILDREN_yes,
+                .tag_id = try leb.readULEB128(u64, &s.stream),
+                .has_children = (try s.stream.readByte()) == DW.CHILDREN_yes,
                 .attrs = ArrayList(AbbrevAttr).init(di.allocator()),
             });
             const attrs = &result.items[result.len - 1].attrs;
 
             while (true) {
-                const attr_id = try leb.readULEB128(u64, di.dwarf_in_stream);
-                const form_id = try leb.readULEB128(u64, di.dwarf_in_stream);
+                const attr_id = try leb.readULEB128(u64, &s.stream);
+                const form_id = try leb.readULEB128(u64, &s.stream);
                 if (attr_id == 0 and form_id == 0) break;
                 try attrs.append(AbbrevAttr{
                     .attr_id = attr_id,
@@ -1468,8 +1465,8 @@ pub const DwarfInfo = struct {
         }
     }
 
-    fn parseDie(di: *DwarfInfo, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
-        const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
+    fn parseDie(di: *DwarfInfo, in_stream: var, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
+        const abbrev_code = try leb.readULEB128(u64, in_stream);
         if (abbrev_code == 0) return null;
         const table_entry = getAbbrevTableEntry(abbrev_table, abbrev_code) orelse return error.InvalidDebugInfo;
 
@@ -1482,64 +1479,63 @@ pub const DwarfInfo = struct {
         for (table_entry.attrs.toSliceConst()) |attr, i| {
             result.attrs.items[i] = Die.Attr{
                 .id = attr.attr_id,
-                .value = try parseFormValue(di.allocator(), di.dwarf_in_stream, attr.form_id, is_64),
+                .value = try parseFormValue(di.allocator(), in_stream, attr.form_id, is_64),
             };
         }
         return result;
     }
 
     fn getLineNumberInfo(di: *DwarfInfo, compile_unit: CompileUnit, target_address: usize) !LineInfo {
+        var s = io.SliceSeekableInStream.init(di.debug_line);
+
         const compile_unit_cwd = try compile_unit.die.getAttrString(di, DW.AT_comp_dir);
         const line_info_offset = try compile_unit.die.getAttrSecOffset(DW.AT_stmt_list);
 
-        assert(line_info_offset < di.debug_line.size);
-
-        const this_unit_offset = di.debug_line.offset + line_info_offset;
-        try di.dwarf_seekable_stream.seekTo(this_unit_offset);
+        try s.seekable_stream.seekTo(line_info_offset);
 
         var is_64: bool = undefined;
-        const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
+        const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
         if (unit_length == 0) {
             return error.MissingDebugInfo;
         }
         const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
 
-        const version = try di.dwarf_in_stream.readInt(u16, di.endian);
+        const version = try s.stream.readInt(u16, di.endian);
         // TODO support 3 and 5
         if (version != 2 and version != 4) return error.InvalidDebugInfo;
 
-        const prologue_length = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
-        const prog_start_offset = (try di.dwarf_seekable_stream.getPos()) + prologue_length;
+        const prologue_length = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
+        const prog_start_offset = (try s.seekable_stream.getPos()) + prologue_length;
 
-        const minimum_instruction_length = try di.dwarf_in_stream.readByte();
+        const minimum_instruction_length = try s.stream.readByte();
         if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
 
         if (version >= 4) {
             // maximum_operations_per_instruction
-            _ = try di.dwarf_in_stream.readByte();
+            _ = try s.stream.readByte();
         }
 
-        const default_is_stmt = (try di.dwarf_in_stream.readByte()) != 0;
-        const line_base = try di.dwarf_in_stream.readByteSigned();
+        const default_is_stmt = (try s.stream.readByte()) != 0;
+        const line_base = try s.stream.readByteSigned();
 
-        const line_range = try di.dwarf_in_stream.readByte();
+        const line_range = try s.stream.readByte();
         if (line_range == 0) return error.InvalidDebugInfo;
 
-        const opcode_base = try di.dwarf_in_stream.readByte();
+        const opcode_base = try s.stream.readByte();
 
         const standard_opcode_lengths = try di.allocator().alloc(u8, opcode_base - 1);
 
         {
             var i: usize = 0;
             while (i < opcode_base - 1) : (i += 1) {
-                standard_opcode_lengths[i] = try di.dwarf_in_stream.readByte();
+                standard_opcode_lengths[i] = try s.stream.readByte();
             }
         }
 
         var include_directories = ArrayList([]u8).init(di.allocator());
         try include_directories.append(compile_unit_cwd);
         while (true) {
-            const dir = try di.readString();
+            const dir = try readStringRaw(di.allocator(), &s.stream);
             if (dir.len == 0) break;
             try include_directories.append(dir);
         }
@@ -1548,11 +1544,11 @@ pub const DwarfInfo = struct {
         var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
 
         while (true) {
-            const file_name = try di.readString();
+            const file_name = try readStringRaw(di.allocator(), &s.stream);
             if (file_name.len == 0) break;
-            const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
-            const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
-            const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
+            const dir_index = try leb.readULEB128(usize, &s.stream);
+            const mtime = try leb.readULEB128(usize, &s.stream);
+            const len_bytes = try leb.readULEB128(usize, &s.stream);
             try file_entries.append(FileEntry{
                 .file_name = file_name,
                 .dir_index = dir_index,
@@ -1561,17 +1557,17 @@ pub const DwarfInfo = struct {
             });
         }
 
-        try di.dwarf_seekable_stream.seekTo(prog_start_offset);
+        try s.seekable_stream.seekTo(prog_start_offset);
 
-        const next_unit_pos = this_unit_offset + next_offset;
+        const next_unit_pos = line_info_offset + next_offset;
 
-        while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {
-            const opcode = try di.dwarf_in_stream.readByte();
+        while ((try s.seekable_stream.getPos()) < next_unit_pos) {
+            const opcode = try s.stream.readByte();
 
             if (opcode == DW.LNS_extended_op) {
-                const op_size = try leb.readULEB128(u64, di.dwarf_in_stream);
+                const op_size = try leb.readULEB128(u64, &s.stream);
                 if (op_size < 1) return error.InvalidDebugInfo;
-                var sub_op = try di.dwarf_in_stream.readByte();
+                var sub_op = try s.stream.readByte();
                 switch (sub_op) {
                     DW.LNE_end_sequence => {
                         prog.end_sequence = true;
@@ -1579,14 +1575,14 @@ pub const DwarfInfo = struct {
                         prog.reset();
                     },
                     DW.LNE_set_address => {
-                        const addr = try di.dwarf_in_stream.readInt(usize, di.endian);
+                        const addr = try s.stream.readInt(usize, di.endian);
                         prog.address = addr;
                     },
                     DW.LNE_define_file => {
-                        const file_name = try di.readString();
-                        const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
-                        const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
-                        const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
+                        const file_name = try readStringRaw(di.allocator(), &s.stream);
+                        const dir_index = try leb.readULEB128(usize, &s.stream);
+                        const mtime = try leb.readULEB128(usize, &s.stream);
+                        const len_bytes = try leb.readULEB128(usize, &s.stream);
                         try file_entries.append(FileEntry{
                             .file_name = file_name,
                             .dir_index = dir_index,
@@ -1596,7 +1592,7 @@ pub const DwarfInfo = struct {
                     },
                     else => {
                         const fwd_amt = math.cast(isize, op_size - 1) catch return error.InvalidDebugInfo;
-                        try di.dwarf_seekable_stream.seekBy(fwd_amt);
+                        try s.seekable_stream.seekBy(fwd_amt);
                     },
                 }
             } else if (opcode >= opcode_base) {
@@ -1615,19 +1611,19 @@ pub const DwarfInfo = struct {
                         prog.basic_block = false;
                     },
                     DW.LNS_advance_pc => {
-                        const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
+                        const arg = try leb.readULEB128(usize, &s.stream);
                         prog.address += arg * minimum_instruction_length;
                     },
                     DW.LNS_advance_line => {
-                        const arg = try leb.readILEB128(i64, di.dwarf_in_stream);
+                        const arg = try leb.readILEB128(i64, &s.stream);
                         prog.line += arg;
                     },
                     DW.LNS_set_file => {
-                        const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
+                        const arg = try leb.readULEB128(usize, &s.stream);
                         prog.file = arg;
                     },
                     DW.LNS_set_column => {
-                        const arg = try leb.readULEB128(u64, di.dwarf_in_stream);
+                        const arg = try leb.readULEB128(u64, &s.stream);
                         prog.column = arg;
                     },
                     DW.LNS_negate_stmt => {
@@ -1641,14 +1637,14 @@ pub const DwarfInfo = struct {
                         prog.address += inc_addr;
                     },
                     DW.LNS_fixed_advance_pc => {
-                        const arg = try di.dwarf_in_stream.readInt(u16, di.endian);
+                        const arg = try s.stream.readInt(u16, di.endian);
                         prog.address += arg;
                     },
                     DW.LNS_set_prologue_end => {},
                     else => {
                         if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
                         const len_bytes = standard_opcode_lengths[opcode - 1];
-                        try di.dwarf_seekable_stream.seekBy(len_bytes);
+                        try s.seekable_stream.seekBy(len_bytes);
                     },
                 }
             }
@@ -1658,9 +1654,17 @@ pub const DwarfInfo = struct {
     }
 
     fn getString(di: *DwarfInfo, offset: u64) ![]u8 {
-        const pos = di.debug_str.offset + offset;
-        try di.dwarf_seekable_stream.seekTo(pos);
-        return di.readString();
+        if (offset > di.debug_str.len)
+            return error.InvalidDebugInfo;
+        const casted_offset = math.cast(usize, offset) catch
+            return error.InvalidDebugInfo;
+
+        // Valid strings always have a terminating zero byte
+        if (mem.indexOfScalarPos(u8, di.debug_str, casted_offset, 0)) |last| {
+            return di.debug_str[casted_offset..last];
+        }
+
+        return error.InvalidDebugInfo;
     }
 };
 
@@ -1672,7 +1676,7 @@ pub const DebugInfo = switch (builtin.os) {
 
         const OFileTable = std.HashMap(
             *macho.nlist_64,
-            MachOFile,
+            DwarfInfo,
             std.hash_map.getHashPtrAddrFn(*macho.nlist_64),
             std.hash_map.getTrivialEqlFn(*macho.nlist_64),
         );
@@ -2066,24 +2070,32 @@ fn getAbbrevTableEntry(abbrev_table: *const AbbrevTable, abbrev_code: u64) ?*con
     return null;
 }
 
-fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: usize) !LineInfo {
+fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, address: usize) !LineInfo {
     const ofile = symbol.ofile orelse return error.MissingDebugInfo;
     const gop = try di.ofiles.getOrPut(ofile);
-    const mach_o_file = if (gop.found_existing) &gop.kv.value else blk: {
+    const dwarf_info = if (gop.found_existing) &gop.kv.value else blk: {
         errdefer _ = di.ofiles.remove(ofile);
         const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
 
-        gop.kv.value = MachOFile{
-            .bytes = try std.fs.cwd().readFileAllocAligned(
-                di.ofiles.allocator,
-                ofile_path,
-                maxInt(usize),
-                @alignOf(macho.mach_header_64),
-            ),
-            .sect_debug_info = null,
-            .sect_debug_line = null,
-        };
-        const hdr = @ptrCast(*const macho.mach_header_64, gop.kv.value.bytes.ptr);
+        var exe_file = try std.fs.openFileAbsoluteC(ofile_path, .{});
+        errdefer exe_file.close();
+
+        const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
+            return error.DebugInfoTooLarge;
+        const exe_mmap = try os.mmap(
+            null,
+            exe_len,
+            os.PROT_READ,
+            os.MAP_SHARED,
+            exe_file.handle,
+            0,
+        );
+        errdefer os.munmap(exe_mmap);
+
+        const hdr = @ptrCast(
+            *const macho.mach_header_64,
+            @alignCast(@alignOf(macho.mach_header_64), exe_mmap.ptr),
+        );
         if (hdr.magic != std.macho.MH_MAGIC_64) return error.InvalidDebugInfo;
 
         const hdr_base = @ptrCast([*]const u8, hdr);
@@ -2092,181 +2104,75 @@ fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: u
         const segcmd = while (ncmd != 0) : (ncmd -= 1) {
             const lc = @ptrCast(*const std.macho.load_command, ptr);
             switch (lc.cmd) {
-                std.macho.LC_SEGMENT_64 => break @ptrCast(*const std.macho.segment_command_64, @alignCast(@alignOf(std.macho.segment_command_64), ptr)),
+                std.macho.LC_SEGMENT_64 => {
+                    break @ptrCast(
+                        *const std.macho.segment_command_64,
+                        @alignCast(@alignOf(std.macho.segment_command_64), ptr),
+                    );
+                },
                 else => {},
             }
             ptr = @alignCast(@alignOf(std.macho.load_command), ptr + lc.cmdsize);
         } else {
             return error.MissingDebugInfo;
         };
+
+        var opt_debug_line: ?*const macho.section_64 = null;
+        var opt_debug_info: ?*const macho.section_64 = null;
+        var opt_debug_abbrev: ?*const macho.section_64 = null;
+        var opt_debug_str: ?*const macho.section_64 = null;
+        var opt_debug_ranges: ?*const macho.section_64 = null;
+
         const sections = @ptrCast([*]const macho.section_64, @alignCast(@alignOf(macho.section_64), ptr + @sizeOf(std.macho.segment_command_64)))[0..segcmd.nsects];
         for (sections) |*sect| {
-            if (sect.flags & macho.SECTION_TYPE == macho.S_REGULAR and
-                (sect.flags & macho.SECTION_ATTRIBUTES) & macho.S_ATTR_DEBUG == macho.S_ATTR_DEBUG)
-            {
-                const sect_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, &sect.sectname));
-                if (mem.eql(u8, sect_name, "__debug_line")) {
-                    gop.kv.value.sect_debug_line = sect;
-                } else if (mem.eql(u8, sect_name, "__debug_info")) {
-                    gop.kv.value.sect_debug_info = sect;
-                }
+            // The section name may not exceed 16 chars and a trailing null may
+            // not be present
+            const name = if (mem.indexOfScalar(u8, sect.sectname[0..], 0)) |last|
+                sect.sectname[0..last]
+            else
+                sect.sectname[0..];
+
+            if (mem.eql(u8, name, "__debug_line")) {
+                opt_debug_line = sect;
+            } else if (mem.eql(u8, name, "__debug_info")) {
+                opt_debug_info = sect;
+            } else if (mem.eql(u8, name, "__debug_abbrev")) {
+                opt_debug_abbrev = sect;
+            } else if (mem.eql(u8, name, "__debug_str")) {
+                opt_debug_str = sect;
+            } else if (mem.eql(u8, name, "__debug_ranges")) {
+                opt_debug_ranges = sect;
             }
         }
 
+        var debug_line = opt_debug_line orelse
+            return error.MissingDebugInfo;
+        var debug_info = opt_debug_info orelse
+            return error.MissingDebugInfo;
+        var debug_str = opt_debug_str orelse
+            return error.MissingDebugInfo;
+        var debug_abbrev = opt_debug_abbrev orelse
+            return error.MissingDebugInfo;
+
+        gop.kv.value = DwarfInfo{
+            .endian = .Little,
+            .debug_info = exe_mmap[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)],
+            .debug_abbrev = exe_mmap[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)],
+            .debug_str = exe_mmap[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)],
+            .debug_line = exe_mmap[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)],
+            .debug_ranges = if (opt_debug_ranges) |debug_ranges|
+                exe_mmap[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
+            else
+                null,
+        };
+        try openDwarfDebugInfo(&gop.kv.value, di.allocator());
+
         break :blk &gop.kv.value;
     };
 
-    const sect_debug_line = mach_o_file.sect_debug_line orelse return error.MissingDebugInfo;
-    var ptr = mach_o_file.bytes.ptr + sect_debug_line.offset;
-
-    var is_64: bool = undefined;
-    const unit_length = try readInitialLengthMem(&ptr, &is_64);
-    if (unit_length == 0) return error.MissingDebugInfo;
-
-    const version = readIntMem(&ptr, u16, builtin.Endian.Little);
-    // TODO support 3 and 5
-    if (version != 2 and version != 4) return error.InvalidDebugInfo;
-
-    const prologue_length = if (is_64)
-        readIntMem(&ptr, u64, builtin.Endian.Little)
-    else
-        readIntMem(&ptr, u32, builtin.Endian.Little);
-    const prog_start = ptr + prologue_length;
-
-    const minimum_instruction_length = readByteMem(&ptr);
-    if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
-
-    if (version >= 4) {
-        // maximum_operations_per_instruction
-        ptr += 1;
-    }
-
-    const default_is_stmt = readByteMem(&ptr) != 0;
-    const line_base = readByteSignedMem(&ptr);
-
-    const line_range = readByteMem(&ptr);
-    if (line_range == 0) return error.InvalidDebugInfo;
-
-    const opcode_base = readByteMem(&ptr);
-
-    const standard_opcode_lengths = ptr[0 .. opcode_base - 1];
-    ptr += opcode_base - 1;
-
-    var include_directories = ArrayList([]const u8).init(di.allocator());
-    try include_directories.append("");
-    while (true) {
-        const dir = readStringMem(&ptr);
-        if (dir.len == 0) break;
-        try include_directories.append(dir);
-    }
-
-    var file_entries = ArrayList(FileEntry).init(di.allocator());
-    var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
-
-    while (true) {
-        const file_name = readStringMem(&ptr);
-        if (file_name.len == 0) break;
-        const dir_index = try leb.readULEB128Mem(usize, &ptr);
-        const mtime = try leb.readULEB128Mem(usize, &ptr);
-        const len_bytes = try leb.readULEB128Mem(usize, &ptr);
-        try file_entries.append(FileEntry{
-            .file_name = file_name,
-            .dir_index = dir_index,
-            .mtime = mtime,
-            .len_bytes = len_bytes,
-        });
-    }
-
-    ptr = prog_start;
-    while (true) {
-        const opcode = readByteMem(&ptr);
-
-        if (opcode == DW.LNS_extended_op) {
-            const op_size = try leb.readULEB128Mem(u64, &ptr);
-            if (op_size < 1) return error.InvalidDebugInfo;
-            var sub_op = readByteMem(&ptr);
-            switch (sub_op) {
-                DW.LNE_end_sequence => {
-                    prog.end_sequence = true;
-                    if (try prog.checkLineMatch()) |info| return info;
-                    return error.MissingDebugInfo;
-                },
-                DW.LNE_set_address => {
-                    const addr = readIntMem(&ptr, usize, builtin.Endian.Little);
-                    prog.address = symbol.reloc + addr;
-                },
-                DW.LNE_define_file => {
-                    const file_name = readStringMem(&ptr);
-                    const dir_index = try leb.readULEB128Mem(usize, &ptr);
-                    const mtime = try leb.readULEB128Mem(usize, &ptr);
-                    const len_bytes = try leb.readULEB128Mem(usize, &ptr);
-                    try file_entries.append(FileEntry{
-                        .file_name = file_name,
-                        .dir_index = dir_index,
-                        .mtime = mtime,
-                        .len_bytes = len_bytes,
-                    });
-                },
-                else => {
-                    ptr += op_size - 1;
-                },
-            }
-        } else if (opcode >= opcode_base) {
-            // special opcodes
-            const adjusted_opcode = opcode - opcode_base;
-            const inc_addr = minimum_instruction_length * (adjusted_opcode / line_range);
-            const inc_line = @as(i32, line_base) + @as(i32, adjusted_opcode % line_range);
-            prog.line += inc_line;
-            prog.address += inc_addr;
-            if (try prog.checkLineMatch()) |info| return info;
-            prog.basic_block = false;
-        } else {
-            switch (opcode) {
-                DW.LNS_copy => {
-                    if (try prog.checkLineMatch()) |info| return info;
-                    prog.basic_block = false;
-                },
-                DW.LNS_advance_pc => {
-                    const arg = try leb.readULEB128Mem(usize, &ptr);
-                    prog.address += arg * minimum_instruction_length;
-                },
-                DW.LNS_advance_line => {
-                    const arg = try leb.readILEB128Mem(i64, &ptr);
-                    prog.line += arg;
-                },
-                DW.LNS_set_file => {
-                    const arg = try leb.readULEB128Mem(usize, &ptr);
-                    prog.file = arg;
-                },
-                DW.LNS_set_column => {
-                    const arg = try leb.readULEB128Mem(u64, &ptr);
-                    prog.column = arg;
-                },
-                DW.LNS_negate_stmt => {
-                    prog.is_stmt = !prog.is_stmt;
-                },
-                DW.LNS_set_basic_block => {
-                    prog.basic_block = true;
-                },
-                DW.LNS_const_add_pc => {
-                    const inc_addr = minimum_instruction_length * ((255 - opcode_base) / line_range);
-                    prog.address += inc_addr;
-                },
-                DW.LNS_fixed_advance_pc => {
-                    const arg = readIntMem(&ptr, u16, builtin.Endian.Little);
-                    prog.address += arg;
-                },
-                DW.LNS_set_prologue_end => {},
-                else => {
-                    if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
-                    const len_bytes = standard_opcode_lengths[opcode - 1];
-                    ptr += len_bytes;
-                },
-            }
-        }
-    }
-
-    return error.MissingDebugInfo;
+    const o_file_address = address - symbol.reloc;
+    const compile_unit = try dwarf_info.findCompileUnit(o_file_address);
+    return dwarf_info.getLineNumberInfo(compile_unit.*, o_file_address);
 }
 
 const Func = struct {
@@ -2274,47 +2180,6 @@ const Func = struct {
     name: ?[]u8,
 };
 
-fn readIntMem(ptr: *[*]const u8, comptime T: type, endian: builtin.Endian) T {
-    // TODO https://github.com/ziglang/zig/issues/863
-    const size = (T.bit_count + 7) / 8;
-    const result = mem.readIntSlice(T, ptr.*[0..size], endian);
-    ptr.* += size;
-    return result;
-}
-
-fn readByteMem(ptr: *[*]const u8) u8 {
-    const result = ptr.*[0];
-    ptr.* += 1;
-    return result;
-}
-
-fn readByteSignedMem(ptr: *[*]const u8) i8 {
-    return @bitCast(i8, readByteMem(ptr));
-}
-
-fn readInitialLengthMem(ptr: *[*]const u8, is_64: *bool) !u64 {
-    // TODO this code can be improved with https://github.com/ziglang/zig/issues/863
-    const first_32_bits = mem.readIntSliceLittle(u32, ptr.*[0..4]);
-    is_64.* = (first_32_bits == 0xffffffff);
-    if (is_64.*) {
-        ptr.* += 4;
-        const result = mem.readIntSliceLittle(u64, ptr.*[0..8]);
-        ptr.* += 8;
-        return result;
-    } else {
-        if (first_32_bits >= 0xfffffff0) return error.InvalidDebugInfo;
-        ptr.* += 4;
-        // TODO this cast should not be needed
-        return @as(u64, first_32_bits);
-    }
-}
-
-fn readStringMem(ptr: *[*]const u8) [:0]const u8 {
-    const result = mem.toSliceConst(u8, @ptrCast([*:0]const u8, ptr.*));
-    ptr.* += result.len + 1;
-    return result;
-}
-
 fn readInitialLength(comptime E: type, in_stream: *io.InStream(E), is_64: *bool) !u64 {
     const first_32_bits = try in_stream.readIntLittle(u32);
     is_64.* = (first_32_bits == 0xffffffff);
-- 
2.54.0