authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-03-06 19:02:02+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-03-06 19:02:02+01:00
loge4039cecc76d043ddeecee8865b34603e85cab1a
treecdcefacaae4a6cca9d29a0c38b3f622be8a2e373
parent23e2368ac339842b907ccc36580c3a471bb26d43

x64: fix (un)wrapping error unions + refactor

1 files changed, 14 insertions(+), 9 deletions(-)

src/arch/x86_64/CodeGen.zig+14-9
...@@ -1032,7 +1032,8 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void {...@@ -1032,7 +1032,8 @@ fn airTrunc(self: *Self, inst: Air.Inst.Index) !void {
1032 const dst_bit_size = dst_ty.bitSize(self.target.*);1032 const dst_bit_size = dst_ty.bitSize(self.target.*);
1033 const is_power_of_two = (dst_bit_size & (dst_bit_size - 1)) == 0;1033 const is_power_of_two = (dst_bit_size & (dst_bit_size - 1)) == 0;
1034 if (!is_power_of_two or dst_bit_size < 8) {1034 if (!is_power_of_two or dst_bit_size < 8) {
1035 const shift = @intCast(u6, 64 - dst_ty.bitSize(self.target.*));1035 const max_reg_bit_width = Register.rax.size();
1036 const shift = @intCast(u6, max_reg_bit_width - dst_ty.bitSize(self.target.*));
1036 const mask = (~@as(u64, 0)) >> shift;1037 const mask = (~@as(u64, 0)) >> shift;
1037 try self.genBinMathOpMir(.@"and", Type.usize, .{ .register = reg }, .{ .immediate = mask });1038 try self.genBinMathOpMir(.@"and", Type.usize, .{ .register = reg }, .{ .immediate = mask });
10381039
...@@ -1739,7 +1740,7 @@ fn airOptionalPayload(self: *Self, inst: Air.Inst.Index) !void {...@@ -1739,7 +1740,7 @@ fn airOptionalPayload(self: *Self, inst: Air.Inst.Index) !void {
1739 .register => {1740 .register => {
1740 // TODO reuse the operand1741 // TODO reuse the operand
1741 const result = try self.copyToRegisterWithInstTracking(inst, optional_ty, operand);1742 const result = try self.copyToRegisterWithInstTracking(inst, optional_ty, operand);
1742 const shift = @intCast(u8, offset * 8);1743 const shift = @intCast(u8, offset * @sizeOf(usize));
1743 try self.shiftRegister(result.register, @intCast(u8, shift));1744 try self.shiftRegister(result.register, @intCast(u8, shift));
1744 break :result result;1745 break :result result;
1745 },1746 },
...@@ -1809,16 +1810,17 @@ fn airUnwrapErrPayload(self: *Self, inst: Air.Inst.Index) !void {...@@ -1809,16 +1810,17 @@ fn airUnwrapErrPayload(self: *Self, inst: Air.Inst.Index) !void {
1809 operand.freezeIfRegister(&self.register_manager);1810 operand.freezeIfRegister(&self.register_manager);
1810 defer operand.unfreezeIfRegister(&self.register_manager);1811 defer operand.unfreezeIfRegister(&self.register_manager);
18111812
1813 const abi_align = err_union_ty.abiAlignment(self.target.*);
1812 const err_ty = err_union_ty.errorUnionSet();1814 const err_ty = err_union_ty.errorUnionSet();
1815 const err_abi_size = mem.alignForwardGeneric(u32, @intCast(u32, err_ty.abiSize(self.target.*)), abi_align);
1813 switch (operand) {1816 switch (operand) {
1814 .stack_offset => |off| {1817 .stack_offset => |off| {
1815 const err_abi_size = @intCast(u32, err_ty.abiSize(self.target.*));
1816 const offset = off - @intCast(i32, err_abi_size);1818 const offset = off - @intCast(i32, err_abi_size);
1817 break :result MCValue{ .stack_offset = offset };1819 break :result MCValue{ .stack_offset = offset };
1818 },1820 },
1819 .register => {1821 .register => {
1820 // TODO reuse operand1822 // TODO reuse operand
1821 const shift = @intCast(u6, err_ty.bitSize(self.target.*));1823 const shift = @intCast(u6, err_abi_size * @sizeOf(usize));
1822 const result = try self.copyToRegisterWithInstTracking(inst, err_union_ty, operand);1824 const result = try self.copyToRegisterWithInstTracking(inst, err_union_ty, operand);
1823 try self.shiftRegister(result.register.to64(), shift);1825 try self.shiftRegister(result.register.to64(), shift);
1824 break :result MCValue{1826 break :result MCValue{
...@@ -1914,8 +1916,9 @@ fn airWrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void {...@@ -1914,8 +1916,9 @@ fn airWrapErrUnionPayload(self: *Self, inst: Air.Inst.Index) !void {
1914 const abi_align = error_union_ty.abiAlignment(self.target.*);1916 const abi_align = error_union_ty.abiAlignment(self.target.*);
1915 const err_abi_size = @intCast(u32, error_ty.abiSize(self.target.*));1917 const err_abi_size = @intCast(u32, error_ty.abiSize(self.target.*));
1916 const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));1918 const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));
1919 const offset = mem.alignForwardGeneric(u32, err_abi_size, abi_align);
1917 try self.genSetStack(error_ty, stack_offset, .{ .immediate = 0 }, .{});1920 try self.genSetStack(error_ty, stack_offset, .{ .immediate = 0 }, .{});
1918 try self.genSetStack(payload_ty, stack_offset - @intCast(i32, err_abi_size), operand, .{});1921 try self.genSetStack(payload_ty, stack_offset - @intCast(i32, offset), operand, .{});
19191922
1920 return self.finishAir(inst, .{ .stack_offset = stack_offset }, .{ ty_op.operand, .none, .none });1923 return self.finishAir(inst, .{ .stack_offset = stack_offset }, .{ ty_op.operand, .none, .none });
1921}1924}
...@@ -1937,8 +1940,9 @@ fn airWrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void {...@@ -1937,8 +1940,9 @@ fn airWrapErrUnionErr(self: *Self, inst: Air.Inst.Index) !void {
1937 const abi_align = error_union_ty.abiAlignment(self.target.*);1940 const abi_align = error_union_ty.abiAlignment(self.target.*);
1938 const err_abi_size = @intCast(u32, error_ty.abiSize(self.target.*));1941 const err_abi_size = @intCast(u32, error_ty.abiSize(self.target.*));
1939 const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));1942 const stack_offset = @intCast(i32, try self.allocMem(inst, abi_size, abi_align));
1943 const offset = mem.alignForwardGeneric(u32, err_abi_size, abi_align);
1940 try self.genSetStack(error_ty, stack_offset, err, .{});1944 try self.genSetStack(error_ty, stack_offset, err, .{});
1941 try self.genSetStack(payload_ty, stack_offset - @intCast(i32, err_abi_size), .undef, .{});1945 try self.genSetStack(payload_ty, stack_offset - @intCast(i32, offset), .undef, .{});
1942 break :result MCValue{ .stack_offset = stack_offset };1946 break :result MCValue{ .stack_offset = stack_offset };
1943 };1947 };
19441948
...@@ -2243,7 +2247,7 @@ fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void {...@@ -2243,7 +2247,7 @@ fn airGetUnionTag(self: *Self, inst: Air.Inst.Index) !void {
2243 },2247 },
2244 .register => {2248 .register => {
2245 const shift: u6 = if (layout.tag_align < layout.payload_align)2249 const shift: u6 = if (layout.tag_align < layout.payload_align)
2246 @intCast(u6, layout.payload_size * 8)2250 @intCast(u6, layout.payload_size * @sizeOf(usize))
2247 else2251 else
2248 0;2252 0;
2249 const result = try self.copyToRegisterWithInstTracking(inst, union_ty, operand);2253 const result = try self.copyToRegisterWithInstTracking(inst, union_ty, operand);
...@@ -2819,11 +2823,12 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {...@@ -2819,11 +2823,12 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
2819 };2823 };
28202824
2821 // Shift by struct_field_offset.2825 // Shift by struct_field_offset.
2822 const shift = @intCast(u8, struct_field_offset * 8);2826 const shift = @intCast(u8, struct_field_offset * @sizeOf(usize));
2823 try self.shiftRegister(dst_mcv.register, shift);2827 try self.shiftRegister(dst_mcv.register, shift);
28242828
2825 // Mask with reg.size() - struct_field_size2829 // Mask with reg.size() - struct_field_size
2826 const mask_shift = @intCast(u6, (64 - struct_field_ty.bitSize(self.target.*)));2830 const max_reg_bit_width = Register.rax.size();
2831 const mask_shift = @intCast(u6, (max_reg_bit_width - struct_field_ty.bitSize(self.target.*)));
2827 const mask = (~@as(u64, 0)) >> mask_shift;2832 const mask = (~@as(u64, 0)) >> mask_shift;
2828 try self.genBinMathOpMir(.@"and", Type.usize, dst_mcv, .{ .immediate = mask });2833 try self.genBinMathOpMir(.@"and", Type.usize, dst_mcv, .{ .immediate = mask });
28292834