diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index ff1ac2c563a9f923313ca3027570ad9db45fd3f7..8aab05f1d700ea86641c17863f8acb6b3e2b921e 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -2066,6 +2066,7 @@ pub const Cpu = struct {
                 .riscv64, .riscv64be => &riscv.cpu.generic_rv64,
                 .sparc => &sparc.cpu.v7,
                 .sparc64 => &sparc.cpu.v9, // SPARC can only be 64-bit from v9 and up.
+                .ve => &ve.cpu.ve10,
                 .wasm32, .wasm64 => &wasm.cpu.mvp,
                 .x86_16 => &x86.cpu.i86,
                 .x86 => &x86.cpu.i386,
diff --git a/lib/std/Target/ve.zig b/lib/std/Target/ve.zig
index 3be114eef3329afc1e263d5a42a8ee0b256a0ae9..12defa85e498765fd6317926ceb176d3cc6a2c2f 100644
--- a/lib/std/Target/ve.zig
+++ b/lib/std/Target/ve.zig
@@ -5,6 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
 
 pub const Feature = enum {
+    ve3,
     vpu,
 };
 
@@ -17,6 +18,11 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).@"enum".field_names.len;
     std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
     var result: [len]CpuFeature = undefined;
+    result[@backingInt(Feature.ve3)] = .{
+        .llvm_name = null,
+        .description = "Enable VE3 instructions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@backingInt(Feature.vpu)] = .{
         .llvm_name = "vpu",
         .description = "Enable the VPU",
@@ -31,11 +37,26 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
-    pub const generic: CpuModel = .{
-        .name = "generic",
-        .llvm_name = "generic",
+    pub const ve10: CpuModel = .{
+        .name = "ve10",
+        .llvm_name = null,
         .features = featureSet(&[_]Feature{
             .vpu,
         }),
     };
+    pub const ve20: CpuModel = .{
+        .name = "ve20",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .vpu,
+        }),
+    };
+    pub const ve30: CpuModel = .{
+        .name = "ve30",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .ve3,
+            .vpu,
+        }),
+    };
 };
diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig
index b074499360f817175502ef8d053e72288b8a4ec0..0f9296730ef43ce64bc3ea7ef36fd9abb0d7bbf4 100644
--- a/tools/update_cpu_features.zig
+++ b/tools/update_cpu_features.zig
@@ -1737,6 +1737,33 @@ const targets = [_]ArchTarget{
             .name = "VE",
             .td_name = "VE",
         },
+        .extra_features = &.{
+            .{
+                .zig_name = "ve3",
+                .desc = "Enable VE3 instructions",
+                .deps = &.{},
+            },
+        },
+        .extra_cpus = &.{
+            .{
+                .llvm_name = null,
+                .zig_name = "ve10",
+                .features = &.{"vpu"},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ve20",
+                .features = &.{"vpu"},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ve30",
+                .features = &.{ "ve3", "vpu" },
+            },
+        },
+        .omit_cpus = &.{
+            "generic",
+        },
     },
     .{
         .zig_name = "wasm",