diff --git a/lib/std/zig/system/freebsd.zig b/lib/std/zig/system/freebsd.zig index d36600aaa1810b5f2c0c6d52cdfc387c44bd7bab..b1ed37dd67e3e2d9f94b845ddea14b1b55e58ac4 100644 --- a/lib/std/zig/system/freebsd.zig +++ b/lib/std/zig/system/freebsd.zig @@ -9,28 +9,30 @@ const aarch64 = struct { : [ret] "=r" (-> u64), ); } + + fn detectNativeCpuAndFeatures(arch: std.Target.Cpu.Arch) std.Target.Cpu { + const registers = [12]u64{ + aarch64.mrs("MIDR_EL1"), + aarch64.mrs("ID_AA64PFR0_EL1"), + aarch64.mrs("ID_AA64PFR1_EL1"), + aarch64.mrs("ID_AA64DFR0_EL1"), + aarch64.mrs("ID_AA64DFR1_EL1"), + aarch64.mrs("ID_AA64AFR0_EL1"), + aarch64.mrs("ID_AA64AFR1_EL1"), + aarch64.mrs("ID_AA64ISAR0_EL1"), + aarch64.mrs("ID_AA64ISAR1_EL1"), + aarch64.mrs("ID_AA64MMFR0_EL1"), + aarch64.mrs("ID_AA64MMFR1_EL1"), + aarch64.mrs("ID_AA64MMFR2_EL1"), + }; + + return @import("arm.zig").aarch64.detectNativeCpuAndFeatures(arch, registers); + } }; pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu { return switch (native_arch) { - .aarch64, .aarch64_be => b: { - const registers = [12]u64{ - aarch64.mrs("MIDR_EL1"), - aarch64.mrs("ID_AA64PFR0_EL1"), - aarch64.mrs("ID_AA64PFR1_EL1"), - aarch64.mrs("ID_AA64DFR0_EL1"), - aarch64.mrs("ID_AA64DFR1_EL1"), - aarch64.mrs("ID_AA64AFR0_EL1"), - aarch64.mrs("ID_AA64AFR1_EL1"), - aarch64.mrs("ID_AA64ISAR0_EL1"), - aarch64.mrs("ID_AA64ISAR1_EL1"), - aarch64.mrs("ID_AA64MMFR0_EL1"), - aarch64.mrs("ID_AA64MMFR1_EL1"), - aarch64.mrs("ID_AA64MMFR2_EL1"), - }; - - break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers); - }, + .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch), else => null, }; }