authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-01-02 22:24:07+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-01-04 01:21:23+01:00
logf37598c779b921d5fc4f97cdcfab523e3fb5fc69
tree6e4f89963d21fb2d5984208027062a7d1406ea06
parent978de7038161dffbd805e33f27ade177ec873bcc

stage2: clean up encoding of memory operands

1 files changed, 63 insertions(+), 74 deletions(-)

src/arch/x86_64/Isel.zig+63-74
......@@ -1230,18 +1230,17 @@ inline fn getModRmExt(tag: Tag) ?u3 {
12301230 };
12311231}
12321232
1233const ScaleIndexBase = struct {
1233const ScaleIndex = struct {
12341234 scale: u2,
1235 index_reg: ?Register,
1236 base_reg: ?Register,
1235 index: Register,
12371236};
12381237
12391238const Memory = struct {
1240 reg: ?Register,
1239 base: ?Register,
12411240 rip: bool = false,
12421241 disp: i32,
12431242 ptr_size: PtrSize,
1244 sib: ?ScaleIndexBase = null,
1243 scale_index: ?ScaleIndex = null,
12451244
12461245 const PtrSize = enum {
12471246 byte_ptr,
......@@ -1270,42 +1269,44 @@ const Memory = struct {
12701269 }
12711270 };
12721271
1273 fn encodeWithReg(encoder: Encoder, dst: u3, src: u3, disp: i32) void {
1274 if (dst == 4) {
1275 if (disp == 0) {
1276 encoder.modRm_SIBDisp0(src);
1277 encoder.sib_base(dst);
1278 } else if (immOpSize(disp) == 8) {
1279 encoder.modRm_SIBDisp8(src);
1280 encoder.sib_baseDisp8(dst);
1281 encoder.disp8(@intCast(i8, disp));
1272 fn encode(mem_op: Memory, encoder: Encoder, operand: u3) void {
1273 if (mem_op.base) |base| {
1274 const dst = base.lowId();
1275 const src = operand;
1276 if (dst == 4) {
1277 if (mem_op.disp == 0) {
1278 encoder.modRm_SIBDisp0(src);
1279 encoder.sib_base(dst);
1280 } else if (immOpSize(mem_op.disp) == 8) {
1281 encoder.modRm_SIBDisp8(src);
1282 encoder.sib_baseDisp8(dst);
1283 encoder.disp8(@intCast(i8, mem_op.disp));
1284 } else {
1285 encoder.modRm_SIBDisp32(src);
1286 encoder.sib_baseDisp32(dst);
1287 encoder.disp32(mem_op.disp);
1288 }
12821289 } else {
1283 encoder.modRm_SIBDisp32(src);
1284 encoder.sib_baseDisp32(dst);
1285 encoder.disp32(disp);
1290 if (mem_op.disp == 0) {
1291 encoder.modRm_indirectDisp0(src, dst);
1292 } else if (immOpSize(mem_op.disp) == 8) {
1293 encoder.modRm_indirectDisp8(src, dst);
1294 encoder.disp8(@intCast(i8, mem_op.disp));
1295 } else {
1296 encoder.modRm_indirectDisp32(src, dst);
1297 encoder.disp32(mem_op.disp);
1298 }
12861299 }
12871300 } else {
1288 if (disp == 0) {
1289 encoder.modRm_indirectDisp0(src, dst);
1290 } else if (immOpSize(disp) == 8) {
1291 encoder.modRm_indirectDisp8(src, dst);
1292 encoder.disp8(@intCast(i8, disp));
1301 if (mem_op.rip) {
1302 encoder.modRm_RIPDisp32(operand);
12931303 } else {
1294 encoder.modRm_indirectDisp32(src, dst);
1295 encoder.disp32(disp);
1304 encoder.modRm_SIBDisp0(operand);
1305 encoder.sib_disp32();
12961306 }
1307 encoder.disp32(mem_op.disp);
12971308 }
12981309 }
1299
1300 fn encodeDsOrRip(encoder: Encoder, op: u3, disp: i32, rip: bool) void {
1301 if (rip) {
1302 encoder.modRm_RIPDisp32(op);
1303 } else {
1304 encoder.modRm_SIBDisp0(op);
1305 encoder.sib_disp32();
1306 }
1307 encoder.disp32(disp);
1308 }
13091310};
13101311
13111312fn encodeImm(encoder: Encoder, imm: i32, size: u64) void {
......@@ -1325,10 +1326,10 @@ const RegisterOrMemory = union(enum) {
13251326 return .{ .register = register };
13261327 }
13271328
1328 fn mem(register: ?Register, disp: i32, ptr_size: Memory.PtrSize) RegisterOrMemory {
1329 fn mem(base: ?Register, disp: i32, ptr_size: Memory.PtrSize) RegisterOrMemory {
13291330 return .{
13301331 .memory = .{
1331 .reg = register,
1332 .base = base,
13321333 .disp = disp,
13331334 .ptr_size = ptr_size,
13341335 },
......@@ -1338,7 +1339,7 @@ const RegisterOrMemory = union(enum) {
13381339 fn rip(disp: i32, ptr_size: Memory.PtrSize) RegisterOrMemory {
13391340 return .{
13401341 .memory = .{
1341 .reg = null,
1342 .base = null,
13421343 .rip = true,
13431344 .disp = disp,
13441345 .ptr_size = ptr_size,
......@@ -1435,20 +1436,17 @@ fn lowerToMEnc(tag: Tag, reg_or_mem: RegisterOrMemory, code: *std.ArrayList(u8))
14351436 if (mem_op.ptr_size == .word_ptr) {
14361437 encoder.prefix16BitMode();
14371438 }
1438 if (mem_op.reg) |reg| {
1439 if (reg.size() != 64) {
1439 if (mem_op.base) |base| {
1440 if (base.size() != 64) {
14401441 return error.OperandSizeMismatch;
14411442 }
14421443 encoder.rex(.{
14431444 .w = false,
1444 .b = reg.isExtended(),
1445 .b = base.isExtended(),
14451446 });
1446 opc.encode(encoder);
1447 Memory.encodeWithReg(encoder, reg.lowId(), modrm_ext, mem_op.disp);
1448 } else {
1449 opc.encode(encoder);
1450 Memory.encodeDsOrRip(encoder, modrm_ext, mem_op.disp, mem_op.rip);
14511447 }
1448 opc.encode(encoder);
1449 mem_op.encode(encoder, modrm_ext);
14521450 },
14531451 }
14541452}
......@@ -1560,20 +1558,17 @@ fn lowerToMiEnc(tag: Tag, reg_or_mem: RegisterOrMemory, imm: i32, code: *std.Arr
15601558 if (dst_mem.ptr_size == .word_ptr) {
15611559 encoder.prefix16BitMode();
15621560 }
1563 if (dst_mem.reg) |dst_reg| {
1564 if (dst_reg.size() != 64) {
1561 if (dst_mem.base) |base| {
1562 if (base.size() != 64) {
15651563 return error.OperandSizeMismatch;
15661564 }
15671565 encoder.rex(.{
15681566 .w = dst_mem.ptr_size == .qword_ptr,
1569 .b = dst_reg.isExtended(),
1567 .b = base.isExtended(),
15701568 });
1571 opc.encode(encoder);
1572 Memory.encodeWithReg(encoder, dst_reg.lowId(), modrm_ext, dst_mem.disp);
1573 } else {
1574 opc.encode(encoder);
1575 Memory.encodeDsOrRip(encoder, modrm_ext, dst_mem.disp, dst_mem.rip);
15761569 }
1570 opc.encode(encoder);
1571 dst_mem.encode(encoder, modrm_ext);
15771572 encodeImm(encoder, imm, dst_mem.ptr_size.size());
15781573 },
15791574 }
......@@ -1608,27 +1603,25 @@ fn lowerToRmEnc(
16081603 if (reg.size() == 16) {
16091604 encoder.prefix16BitMode();
16101605 }
1611 if (src_mem.reg) |src_reg| {
1606 if (src_mem.base) |base| {
16121607 // TODO handle 32-bit base register - requires prefix 0x67
16131608 // Intel Manual, Vol 1, chapter 3.6 and 3.6.1
1614 if (src_reg.size() != 64) {
1609 if (base.size() != 64) {
16151610 return error.OperandSizeMismatch;
16161611 }
16171612 encoder.rex(.{
16181613 .w = setRexWRegister(reg),
16191614 .r = reg.isExtended(),
1620 .b = src_reg.isExtended(),
1615 .b = base.isExtended(),
16211616 });
1622 opc.encode(encoder);
1623 Memory.encodeWithReg(encoder, src_reg.lowId(), reg.lowId(), src_mem.disp);
16241617 } else {
16251618 encoder.rex(.{
16261619 .w = setRexWRegister(reg),
16271620 .r = reg.isExtended(),
16281621 });
1629 opc.encode(encoder);
1630 Memory.encodeDsOrRip(encoder, reg.lowId(), src_mem.disp, src_mem.rip);
16311622 }
1623 opc.encode(encoder);
1624 src_mem.encode(encoder, reg.lowId());
16321625 },
16331626 }
16341627}
......@@ -1662,25 +1655,23 @@ fn lowerToMrEnc(
16621655 if (reg.size() == 16) {
16631656 encoder.prefix16BitMode();
16641657 }
1665 if (dst_mem.reg) |dst_reg| {
1666 if (dst_reg.size() != 64) {
1658 if (dst_mem.base) |base| {
1659 if (base.size() != 64) {
16671660 return error.OperandSizeMismatch;
16681661 }
16691662 encoder.rex(.{
16701663 .w = dst_mem.ptr_size == .qword_ptr or setRexWRegister(reg),
16711664 .r = reg.isExtended(),
1672 .b = dst_reg.isExtended(),
1665 .b = base.isExtended(),
16731666 });
1674 opc.encode(encoder);
1675 Memory.encodeWithReg(encoder, dst_reg.lowId(), reg.lowId(), dst_mem.disp);
16761667 } else {
16771668 encoder.rex(.{
16781669 .w = dst_mem.ptr_size == .qword_ptr or setRexWRegister(reg),
16791670 .r = reg.isExtended(),
16801671 });
1681 opc.encode(encoder);
1682 Memory.encodeDsOrRip(encoder, reg.lowId(), dst_mem.disp, dst_mem.rip);
16831672 }
1673 opc.encode(encoder);
1674 dst_mem.encode(encoder, reg.lowId());
16841675 },
16851676 }
16861677}
......@@ -1714,10 +1705,10 @@ fn lowerToRmiEnc(
17141705 encoder.modRm_direct(reg.lowId(), src_reg.lowId());
17151706 },
17161707 .memory => |src_mem| {
1717 if (src_mem.reg) |src_reg| {
1708 if (src_mem.base) |base| {
17181709 // TODO handle 32-bit base register - requires prefix 0x67
17191710 // Intel Manual, Vol 1, chapter 3.6 and 3.6.1
1720 if (src_reg.size() != 64) {
1711 if (base.size() != 64) {
17211712 return error.OperandSizeMismatch;
17221713 }
17231714 if (src_mem.ptr_size == .byte_ptr) {
......@@ -1726,18 +1717,16 @@ fn lowerToRmiEnc(
17261717 encoder.rex(.{
17271718 .w = setRexWRegister(reg),
17281719 .r = reg.isExtended(),
1729 .b = src_reg.isExtended(),
1720 .b = base.isExtended(),
17301721 });
1731 opc.encode(encoder);
1732 Memory.encodeWithReg(encoder, src_reg.lowId(), reg.lowId(), src_mem.disp);
17331722 } else {
17341723 encoder.rex(.{
17351724 .w = setRexWRegister(reg),
17361725 .r = reg.isExtended(),
17371726 });
1738 opc.encode(encoder);
1739 Memory.encodeDsOrRip(encoder, reg.lowId(), src_mem.disp, src_mem.rip);
17401727 }
1728 opc.encode(encoder);
1729 src_mem.encode(encoder, reg.lowId());
17411730 },
17421731 }
17431732 encodeImm(encoder, imm, reg.size());