Commit f5f1f8c66625237e4eceb3cd40597a687e9a58ac | zig

doc/langref.html.in+6-6

...	...	@@ -5126,7 +5126,7 @@ const builtin = @import("builtin");
5126	5126	const native_arch = builtin.cpu.arch;
5127	5127	const expect = std.testing.expect;
5128	5128
5129		const WINAPI: std.builtin.CallingConvention = if (native_arch == .i386) .Stdcall else .C;
	5129	const WINAPI: std.builtin.CallingConvention = if (native_arch == .x86) .Stdcall else .C;
5130	5130	extern "kernel32" fn ExitProcess(exit_code: c_uint) callconv(WINAPI) noreturn;
5131	5131
5132	5132	test "foo" {
...	...	@@ -5165,7 +5165,7 @@ export fn sub(a: i8, b: i8) i8 { return a - b; }
5165	5165	// at link time, when linking statically, or at runtime, when linking
5166	5166	// dynamically.
5167	5167	// The callconv specifier changes the calling convention of the function.
5168		const WINAPI: std.builtin.CallingConvention = if (native_arch == .i386) .Stdcall else .C;
	5168	const WINAPI: std.builtin.CallingConvention = if (native_arch == .x86) .Stdcall else .C;
5169	5169	extern "kernel32" fn ExitProcess(exit_code: u32) callconv(WINAPI) noreturn;
5170	5170	extern "c" fn atan2(a: f64, b: f64) f64;
5171	5171
...	...	@@ -7487,7 +7487,7 @@ volatile (
7487	7487	: "rcx", "r11"
7488	7488	);{#end_syntax_block#}
7489	7489	<p>
7490		For i386 and x86_64 targets, the syntax is AT&T syntax, rather than the more
	7490	For x86 and x86_64 targets, the syntax is AT&T syntax, rather than the more
7491	7491	popular Intel syntax. This is due to technical constraints; assembly parsing is
7492	7492	provided by LLVM and its support for Intel syntax is buggy and not well tested.
7493	7493	</p>
...	...	@@ -11608,7 +11608,7 @@ Architectures:
11608	11608	v5
11609	11609	v5te
11610	11610	v4t
11611		i386
	11611	x86
11612	11612	x86_64 (native)
11613	11613	xcore
11614	11614	nvptx
...	...	@@ -11687,8 +11687,8 @@ Available libcs:
11687	11687	arm-linux-gnueabihf
11688	11688	arm-linux-musleabi
11689	11689	arm-linux-musleabihf
11690		i386-linux-gnu
11691		i386-linux-musl
	11690	x86-linux-gnu
	11691	x86-linux-musl
11692	11692	mips64el-linux-gnuabi64
11693	11693	mips64el-linux-gnuabin32
11694	11694	mips64el-linux-musl

lib/c.zig+1-1

...	...	@@ -190,7 +190,7 @@ test "strncmp" {
190	190	// across .o file boundaries. fix comptime @ptrCast of nakedcc functions.
191	191	fn clone() callconv(.Naked) void {
192	192	switch (native_arch) {
193		.i386 => {
	193	.x86 => {
194	194	// __clone(func, stack, flags, arg, ptid, tls, ctid)
195	195	// +8, +12, +16, +20, +24, +28, +32
196	196	// syscall(SYS_clone, flags, stack, ptid, tls, ctid)

lib/compiler_rt/aulldiv.zig+1-1

...	...	@@ -7,7 +7,7 @@ const common = @import("common.zig");
7	7	pub const panic = common.panic;
8	8
9	9	comptime {
10		if (arch == .i386 and abi == .msvc) {
	10	if (arch == .x86 and abi == .msvc) {
11	11	// Don't let LLVM apply the stdcall name mangling on those MSVC builtins
12	12	@export(_alldiv, .{ .name = "\x01__alldiv", .linkage = common.linkage });
13	13	@export(_aulldiv, .{ .name = "\x01__aulldiv", .linkage = common.linkage });

lib/compiler_rt/aullrem.zig+1-1

...	...	@@ -7,7 +7,7 @@ const common = @import("common.zig");
7	7	pub const panic = common.panic;
8	8
9	9	comptime {
10		if (arch == .i386 and abi == .msvc) {
	10	if (arch == .x86 and abi == .msvc) {
11	11	// Don't let LLVM apply the stdcall name mangling on those MSVC builtins
12	12	@export(_allrem, .{ .name = "\x01__allrem", .linkage = common.linkage });
13	13	@export(_aullrem, .{ .name = "\x01__aullrem", .linkage = common.linkage });

lib/compiler_rt/clear_cache.zig+1-1

...	...	@@ -17,7 +17,7 @@ comptime {
17	17
18	18	fn clear_cache(start: usize, end: usize) callconv(.C) void {
19	19	const x86 = switch (arch) {
20		.i386, .x86_64 => true,
	20	.x86, .x86_64 => true,
21	21	else => false,
22	22	};
23	23	const arm32 = switch (arch) {

lib/compiler_rt/common.zig+2-2

...	...	@@ -48,7 +48,7 @@ pub const gnu_f16_abi = switch (builtin.cpu.arch) {
48	48	.x86_64,
49	49	=> false,
50	50
51		.i386 => true,
	51	.x86 => true,
52	52
53	53	.arm, .armeb, .thumb, .thumbeb => switch (builtin.abi) {
54	54	.eabi, .eabihf => false,
...	...	@@ -79,7 +79,7 @@ pub fn panic(msg: []const u8, error_return_trace: ?*std.builtin.StackTrace, _: ?
79	79	pub const F16T = switch (builtin.cpu.arch) {
80	80	.aarch64, .aarch64_be, .aarch64_32 => f16,
81	81	.riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
82		.i386, .x86_64 => f16,
	82	.x86, .x86_64 => f16,
83	83	else => u16,
84	84	};
85	85

lib/compiler_rt/divti3.zig+1-1

...	...	@@ -9,7 +9,7 @@ pub const panic = common.panic;
9	9	comptime {
10	10	if (builtin.os.tag == .windows) {
11	11	switch (arch) {
12		.i386 => {
	12	.x86 => {
13	13	@export(__divti3, .{ .name = "__divti3", .linkage = common.linkage });
14	14	},
15	15	.x86_64 => {

lib/compiler_rt/extendf_test.zig+1-1

...	...	@@ -140,7 +140,7 @@ test "extendhfsf2" {
140	140	try test__extendhfsf2(0x7f00, 0x7fe00000); // sNaN
141	141	// On x86 the NaN becomes quiet because the return is pushed on the x87
142	142	// stack due to ABI requirements
143		if (builtin.target.cpu.arch != .i386 and builtin.target.os.tag == .windows)
	143	if (builtin.target.cpu.arch != .x86 and builtin.target.os.tag == .windows)
144	144	try test__extendhfsf2(0x7c01, 0x7f802000); // sNaN
145	145
146	146	try test__extendhfsf2(0, 0); // 0

lib/compiler_rt/stack_probe.zig+5-5

...	...	@@ -30,7 +30,7 @@ comptime {
30	30	}
31	31
32	32	switch (arch) {
33		.i386,
	33	.x86,
34	34	.x86_64,
35	35	=> {
36	36	@export(zig_probe_stack, .{ .name = "__zig_probe_stack", .linkage = linkage });
...	...	@@ -69,7 +69,7 @@ pub fn zig_probe_stack() callconv(.Naked) void {
69	69	\\ ret
70	70	);
71	71	},
72		.i386 => {
	72	.x86 => {
73	73	// %eax = probe length, %esp = stack pointer
74	74	asm volatile (
75	75	\\ push %%ecx
...	...	@@ -121,7 +121,7 @@ fn win_probe_stack_only() void {
121	121	\\ ret
122	122	);
123	123	},
124		.i386 => {
	124	.x86 => {
125	125	asm volatile (
126	126	\\ push %%ecx
127	127	\\ push %%eax
...	...	@@ -191,7 +191,7 @@ fn win_probe_stack_adjust_sp() void {
191	191	\\ ret
192	192	);
193	193	},
194		.i386 => {
	194	.x86 => {
195	195	asm volatile (
196	196	\\ push %%ecx
197	197	\\ cmp $0x1000,%%eax
...	...	@@ -243,7 +243,7 @@ pub fn __chkstk() callconv(.Naked) void {
243	243	if (comptime arch.isAARCH64()) {
244	244	@call(.{ .modifier = .always_inline }, win_probe_stack_only, .{});
245	245	} else switch (arch) {
246		.i386 => @call(.{ .modifier = .always_inline }, win_probe_stack_adjust_sp, .{}),
	246	.x86 => @call(.{ .modifier = .always_inline }, win_probe_stack_adjust_sp, .{}),
247	247	.x86_64 => @call(.{ .modifier = .always_inline }, win_probe_stack_only, .{}),
248	248	else => unreachable,
249	249	}

lib/libc/glibc/abilists

Binary files a/lib/libc/glibc/abilists and b/lib/libc/glibc/abilists differ

lib/ssp.zig+1-1

...	...	@@ -35,7 +35,7 @@ export fn __chk_fail() callconv(.C) noreturn {
35	35	@panic("buffer overflow detected");
36	36	}
37	37
38		// Emitted when targeting some architectures (eg. i386)
	38	// Emitted when targeting some architectures (eg. x86)
39	39	// XXX: This symbol should be hidden
40	40	export fn __stack_chk_fail_local() callconv(.C) noreturn {
41	41	__stack_chk_fail();

lib/std/Thread.zig+4-4

...	...	@@ -753,7 +753,7 @@ const LinuxThreadImpl = struct {
753	753	/// https://github.com/ifduyue/musl/search?q=__unmapself
754	754	fn freeAndExit(self: *ThreadCompletion) noreturn {
755	755	switch (target.cpu.arch) {
756		.i386 => asm volatile (
	756	.x86 => asm volatile (
757	757	\\ movl $91, %%eax
758	758	\\ movl %[ptr], %%ebx
759	759	\\ movl %[len], %%ecx
...	...	@@ -959,10 +959,10 @@ const LinuxThreadImpl = struct {
959	959	else => \|e\| return e,
960	960	};
961	961
962		// Prepare the TLS segment and prepare a user_desc struct when needed on i386
	962	// Prepare the TLS segment and prepare a user_desc struct when needed on x86
963	963	var tls_ptr = os.linux.tls.prepareTLS(mapped[tls_offset..]);
964		var user_desc: if (target.cpu.arch == .i386) os.linux.user_desc else void = undefined;
965		if (target.cpu.arch == .i386) {
	964	var user_desc: if (target.cpu.arch == .x86) os.linux.user_desc else void = undefined;
	965	if (target.cpu.arch == .x86) {
966	966	defer tls_ptr = @ptrToInt(&user_desc);
967	967	user_desc = .{
968	968	.entry_number = os.linux.tls.tls_image.gdt_entry_number,

lib/std/atomic.zig+1-1

...	...	@@ -44,7 +44,7 @@ pub inline fn spinLoopHint() void {
44	44	// No-op instruction that can hint to save (or share with a hardware-thread)
45	45	// pipelining/power resources
46	46	// https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html
47		.i386, .x86_64 => asm volatile ("pause" ::: "memory"),
	47	.x86, .x86_64 => asm volatile ("pause" ::: "memory"),
48	48
49	49	// No-op instruction that serves as a hardware-thread resource yield hint.
50	50	// https://stackoverflow.com/a/7588941

lib/std/build.zig+2-2

...	...	@@ -2978,12 +2978,12 @@ pub const LibExeObjStep = struct {
2978	2978	if (glibc_dir_arg) \|dir\| {
2979	2979	// TODO look into making this a call to `linuxTriple`. This
2980	2980	// needs the directory to be called "i686" rather than
2981		// "i386" which is why we do it manually here.
	2981	// "x86" which is why we do it manually here.
2982	2982	const fmt_str = "{s}" ++ fs.path.sep_str ++ "{s}-{s}-{s}";
2983	2983	const cpu_arch = self.target.getCpuArch();
2984	2984	const os_tag = self.target.getOsTag();
2985	2985	const abi = self.target.getAbi();
2986		const cpu_arch_name: []const u8 = if (cpu_arch == .i386)
	2986	const cpu_arch_name: []const u8 = if (cpu_arch == .x86)
2987	2987	"i686"
2988	2988	else
2989	2989	@tagName(cpu_arch);

lib/std/build/EmulatableRunStep.zig+2-2

...	...	@@ -95,12 +95,12 @@ fn make(step: *Step) !void {
95	95	if (glibc_dir_arg) \|dir\| {
96	96	// TODO look into making this a call to `linuxTriple`. This
97	97	// needs the directory to be called "i686" rather than
98		// "i386" which is why we do it manually here.
	98	// "x86" which is why we do it manually here.
99	99	const fmt_str = "{s}" ++ fs.path.sep_str ++ "{s}-{s}-{s}";
100	100	const cpu_arch = self.exe.target.getCpuArch();
101	101	const os_tag = self.exe.target.getOsTag();
102	102	const abi = self.exe.target.getAbi();
103		const cpu_arch_name: []const u8 = if (cpu_arch == .i386)
	103	const cpu_arch_name: []const u8 = if (cpu_arch == .x86)
104	104	"i686"
105	105	else
106	106	@tagName(cpu_arch);

lib/std/c/freebsd.zig+1-1

...	...	@@ -1444,7 +1444,7 @@ pub const E = enum(u16) {
1444	1444	};
1445	1445
1446	1446	pub const MINSIGSTKSZ = switch (builtin.cpu.arch) {
1447		.i386, .x86_64 => 2048,
	1447	.x86, .x86_64 => 2048,
1448	1448	.arm, .aarch64 => 4096,
1449	1449	else => @compileError("MINSIGSTKSZ not defined for this architecture"),
1450	1450	};

lib/std/c/netbsd.zig+4-4

...	...	@@ -80,7 +80,7 @@ pub const pthread_cond_t = extern struct {
80	80	pub const pthread_rwlock_t = extern struct {
81	81	magic: c_uint = 0x99990009,
82	82	interlock: switch (builtin.cpu.arch) {
83		.aarch64, .sparc, .x86_64, .i386 => u8,
	83	.aarch64, .sparc, .x86_64, .x86 => u8,
84	84	.arm, .powerpc => c_int,
85	85	else => unreachable,
86	86	} = 0,
...	...	@@ -97,7 +97,7 @@ const pthread_spin_t = switch (builtin.cpu.arch) {
97	97	.aarch64, .aarch64_be, .aarch64_32 => u8,
98	98	.mips, .mipsel, .mips64, .mips64el => u32,
99	99	.powerpc, .powerpc64, .powerpc64le => i32,
100		.i386, .x86_64 => u8,
	100	.x86, .x86_64 => u8,
101	101	.arm, .armeb, .thumb, .thumbeb => i32,
102	102	.sparc, .sparcel, .sparc64 => u8,
103	103	.riscv32, .riscv64 => u32,
...	...	@@ -105,7 +105,7 @@ const pthread_spin_t = switch (builtin.cpu.arch) {
105	105	};
106	106
107	107	const padded_pthread_spin_t = switch (builtin.cpu.arch) {
108		.i386, .x86_64 => u32,
	108	.x86, .x86_64 => u32,
109	109	.sparc, .sparcel, .sparc64 => u32,
110	110	else => pthread_spin_t,
111	111	};
...	...	@@ -1067,7 +1067,7 @@ pub const ucontext_t = extern struct {
1067	1067	mcontext: mcontext_t,
1068	1068	__pad: [
1069	1069	switch (builtin.cpu.arch) {
1070		.i386 => 4,
	1070	.x86 => 4,
1071	1071	.mips, .mipsel, .mips64, .mips64el => 14,
1072	1072	.arm, .armeb, .thumb, .thumbeb => 1,
1073	1073	.sparc, .sparcel, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,

lib/std/c/openbsd.zig+1-1

...	...	@@ -1247,7 +1247,7 @@ pub const E = enum(u16) {
1247	1247	};
1248	1248
1249	1249	const _MAX_PAGE_SHIFT = switch (builtin.cpu.arch) {
1250		.i386 => 12,
	1250	.x86 => 12,
1251	1251	.sparc64 => 13,
1252	1252	};
1253	1253	pub const MINSIGSTKSZ = 1 << _MAX_PAGE_SHIFT;

lib/std/coff.zig+2-2

...	...	@@ -1025,7 +1025,7 @@ pub const MachineType = enum(u16) {
1025	1025	.powerpc => .POWERPC,
1026	1026	.riscv32 => .RISCV32,
1027	1027	.thumb => .Thumb,
1028		.i386 => .I386,
	1028	.x86 => .I386,
1029	1029	.aarch64 => .ARM64,
1030	1030	.riscv64 => .RISCV64,
1031	1031	.x86_64 => .X64,
...	...	@@ -1040,7 +1040,7 @@ pub const MachineType = enum(u16) {
1040	1040	.POWERPC => .powerpc,
1041	1041	.RISCV32 => .riscv32,
1042	1042	.Thumb => .thumb,
1043		.I386 => .i386,
	1043	.I386 => .x86,
1044	1044	.ARM64 => .aarch64,
1045	1045	.RISCV64 => .riscv64,
1046	1046	.X64 => .x86_64,

lib/std/debug.zig+3-3

...	...	@@ -182,7 +182,7 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
182	182	// therefore, we do a check for `return_address == 0` before subtracting 1 from it to avoid
183	183	// an overflow. We do not need to signal `StackIterator` as it will correctly detect this
184	184	// condition on the subsequent iteration and return `null` thus terminating the loop.
185		// same behaviour for i386-windows-msvc
	185	// same behaviour for x86-windows-msvc
186	186	const address = if (return_address == 0) return_address else return_address - 1;
187	187	printSourceAtAddress(debug_info, stderr, address, tty_config) catch return;
188	188	}
...	...	@@ -568,7 +568,7 @@ pub fn writeCurrentStackTrace(
568	568	// therefore, we do a check for `return_address == 0` before subtracting 1 from it to avoid
569	569	// an overflow. We do not need to signal `StackIterator` as it will correctly detect this
570	570	// condition on the subsequent iteration and return `null` thus terminating the loop.
571		// same behaviour for i386-windows-msvc
	571	// same behaviour for x86-windows-msvc
572	572	const address = if (return_address == 0) return_address else return_address - 1;
573	573	try printSourceAtAddress(debug_info, out_stream, address, tty_config);
574	574	}
...	...	@@ -1922,7 +1922,7 @@ fn handleSegfaultPosix(sig: i32, info: const os.siginfo_t, ctx_ptr: ?const any
1922	1922	}
1923	1923
1924	1924	switch (native_arch) {
1925		.i386 => {
	1925	.x86 => {
1926	1926	const ctx = @ptrCast(*const os.ucontext_t, @alignCast(@alignOf(os.ucontext_t), ctx_ptr));
1927	1927	const ip = @intCast(usize, ctx.mcontext.gregs[os.REG.EIP]);
1928	1928	const bp = @intCast(usize, ctx.mcontext.gregs[os.REG.EBP]);

lib/std/elf.zig+1-1

...	...	@@ -1502,7 +1502,7 @@ pub const EM = enum(u16) {
1502	1502	.MIPS_RS3_LE => .mipsel,
1503	1503	.PPC => .powerpc,
1504	1504	.SPARC => .sparc,
1505		.@"386" => .i386,
	1505	.@"386" => .x86,
1506	1506	.XCORE => .xcore,
1507	1507	.CSR_KALIMBA => .kalimba,
1508	1508	.LANAI => .lanai,

lib/std/macho.zig+2-2

...	...	@@ -1201,7 +1201,7 @@ pub const MH_DEAD_STRIPPABLE_DYLIB = 0x400000;
1201	1201	/// Contains a section of type S_THREAD_LOCAL_VARIABLES
1202	1202	pub const MH_HAS_TLV_DESCRIPTORS = 0x800000;
1203	1203
1204		/// When this bit is set, the OS will run the main executable with a non-executable heap even on platforms (e.g. i386) that don't require it. Only used in MH_EXECUTE filetypes.
	1204	/// When this bit is set, the OS will run the main executable with a non-executable heap even on platforms (e.g. x86) that don't require it. Only used in MH_EXECUTE filetypes.
1205	1205	pub const MH_NO_HEAP_EXECUTION = 0x1000000;
1206	1206
1207	1207	/// The code was linked for use in an application extension.
...	...	@@ -1444,7 +1444,7 @@ pub const S_ATTR_NO_DEAD_STRIP = 0x10000000;
1444	1444	/// blocks are live if they reference live blocks
1445	1445	pub const S_ATTR_LIVE_SUPPORT = 0x8000000;
1446	1446
1447		/// used with i386 code stubs written on by dyld
	1447	/// used with x86 code stubs written on by dyld
1448	1448	pub const S_ATTR_SELF_MODIFYING_CODE = 0x4000000;
1449	1449
1450	1450	/// section contains some machine instructions

lib/std/os/linux.zig+22-22

...	...	@@ -33,7 +33,7 @@ const syscall_bits = switch (native_arch) {
33	33	};
34	34
35	35	const arch_bits = switch (native_arch) {
36		.i386 => @import("linux/i386.zig"),
	36	.x86 => @import("linux/x86.zig"),
37	37	.x86_64 => @import("linux/x86_64.zig"),
38	38	.aarch64 => @import("linux/arm64.zig"),
39	39	.arm, .thumb => @import("linux/arm-eabi.zig"),
...	...	@@ -94,7 +94,7 @@ pub const SECCOMP = @import("linux/seccomp.zig");
94	94
95	95	pub const syscalls = @import("linux/syscalls.zig");
96	96	pub const SYS = switch (@import("builtin").cpu.arch) {
97		.i386 => syscalls.X86,
	97	.x86 => syscalls.X86,
98	98	.x86_64 => syscalls.X64,
99	99	.aarch64 => syscalls.Arm64,
100	100	.arm, .thumb => syscalls.Arm,
...	...	@@ -1198,42 +1198,42 @@ pub fn sigismember(set: *const sigset_t, sig: u6) bool {
1198	1198	}
1199	1199
1200	1200	pub fn getsockname(fd: i32, noalias addr: sockaddr, noalias len: socklen_t) usize {
1201		if (native_arch == .i386) {
	1201	if (native_arch == .x86) {
1202	1202	return socketcall(SC.getsockname, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len) });
1203	1203	}
1204	1204	return syscall3(.getsockname, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len));
1205	1205	}
1206	1206
1207	1207	pub fn getpeername(fd: i32, noalias addr: sockaddr, noalias len: socklen_t) usize {
1208		if (native_arch == .i386) {
	1208	if (native_arch == .x86) {
1209	1209	return socketcall(SC.getpeername, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len) });
1210	1210	}
1211	1211	return syscall3(.getpeername, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len));
1212	1212	}
1213	1213
1214	1214	pub fn socket(domain: u32, socket_type: u32, protocol: u32) usize {
1215		if (native_arch == .i386) {
	1215	if (native_arch == .x86) {
1216	1216	return socketcall(SC.socket, &[3]usize{ domain, socket_type, protocol });
1217	1217	}
1218	1218	return syscall3(.socket, domain, socket_type, protocol);
1219	1219	}
1220	1220
1221	1221	pub fn setsockopt(fd: i32, level: u32, optname: u32, optval: [*]const u8, optlen: socklen_t) usize {
1222		if (native_arch == .i386) {
	1222	if (native_arch == .x86) {
1223	1223	return socketcall(SC.setsockopt, &[5]usize{ @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @intCast(usize, optlen) });
1224	1224	}
1225	1225	return syscall5(.setsockopt, @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @intCast(usize, optlen));
1226	1226	}
1227	1227
1228	1228	pub fn getsockopt(fd: i32, level: u32, optname: u32, noalias optval: []u8, noalias optlen: socklen_t) usize {
1229		if (native_arch == .i386) {
	1229	if (native_arch == .x86) {
1230	1230	return socketcall(SC.getsockopt, &[5]usize{ @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @ptrToInt(optlen) });
1231	1231	}
1232	1232	return syscall5(.getsockopt, @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @ptrToInt(optlen));
1233	1233	}
1234	1234
1235	1235	pub fn sendmsg(fd: i32, msg: *const std.x.os.Socket.Message, flags: c_int) usize {
1236		if (native_arch == .i386) {
	1236	if (native_arch == .x86) {
1237	1237	return socketcall(SC.sendmsg, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)) });
1238	1238	}
1239	1239	return syscall3(.sendmsg, @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)));
...	...	@@ -1280,49 +1280,49 @@ pub fn sendmmsg(fd: i32, msgvec: [*]mmsghdr_const, vlen: u32, flags: u32) usize
1280	1280	}
1281	1281
1282	1282	pub fn connect(fd: i32, addr: *const anyopaque, len: socklen_t) usize {
1283		if (native_arch == .i386) {
	1283	if (native_arch == .x86) {
1284	1284	return socketcall(SC.connect, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), len });
1285	1285	}
1286	1286	return syscall3(.connect, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), len);
1287	1287	}
1288	1288
1289	1289	pub fn recvmsg(fd: i32, msg: *std.x.os.Socket.Message, flags: c_int) usize {
1290		if (native_arch == .i386) {
	1290	if (native_arch == .x86) {
1291	1291	return socketcall(SC.recvmsg, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)) });
1292	1292	}
1293	1293	return syscall3(.recvmsg, @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)));
1294	1294	}
1295	1295
1296	1296	pub fn recvfrom(fd: i32, noalias buf: []u8, len: usize, flags: u32, noalias addr: ?sockaddr, noalias alen: ?*socklen_t) usize {
1297		if (native_arch == .i386) {
	1297	if (native_arch == .x86) {
1298	1298	return socketcall(SC.recvfrom, &[6]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @ptrToInt(alen) });
1299	1299	}
1300	1300	return syscall6(.recvfrom, @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @ptrToInt(alen));
1301	1301	}
1302	1302
1303	1303	pub fn shutdown(fd: i32, how: i32) usize {
1304		if (native_arch == .i386) {
	1304	if (native_arch == .x86) {
1305	1305	return socketcall(SC.shutdown, &[2]usize{ @bitCast(usize, @as(isize, fd)), @bitCast(usize, @as(isize, how)) });
1306	1306	}
1307	1307	return syscall2(.shutdown, @bitCast(usize, @as(isize, fd)), @bitCast(usize, @as(isize, how)));
1308	1308	}
1309	1309
1310	1310	pub fn bind(fd: i32, addr: *const sockaddr, len: socklen_t) usize {
1311		if (native_arch == .i386) {
	1311	if (native_arch == .x86) {
1312	1312	return socketcall(SC.bind, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @intCast(usize, len) });
1313	1313	}
1314	1314	return syscall3(.bind, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @intCast(usize, len));
1315	1315	}
1316	1316
1317	1317	pub fn listen(fd: i32, backlog: u32) usize {
1318		if (native_arch == .i386) {
	1318	if (native_arch == .x86) {
1319	1319	return socketcall(SC.listen, &[2]usize{ @bitCast(usize, @as(isize, fd)), backlog });
1320	1320	}
1321	1321	return syscall2(.listen, @bitCast(usize, @as(isize, fd)), backlog);
1322	1322	}
1323	1323
1324	1324	pub fn sendto(fd: i32, buf: []const u8, len: usize, flags: u32, addr: ?const sockaddr, alen: socklen_t) usize {
1325		if (native_arch == .i386) {
	1325	if (native_arch == .x86) {
1326	1326	return socketcall(SC.sendto, &[6]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @intCast(usize, alen) });
1327	1327	}
1328	1328	return syscall6(.sendto, @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @intCast(usize, alen));
...	...	@@ -1349,21 +1349,21 @@ pub fn sendfile(outfd: i32, infd: i32, offset: ?*i64, count: usize) usize {
1349	1349	}
1350	1350
1351	1351	pub fn socketpair(domain: i32, socket_type: i32, protocol: i32, fd: *[2]i32) usize {
1352		if (native_arch == .i386) {
	1352	if (native_arch == .x86) {
1353	1353	return socketcall(SC.socketpair, &[4]usize{ @intCast(usize, domain), @intCast(usize, socket_type), @intCast(usize, protocol), @ptrToInt(fd) });
1354	1354	}
1355	1355	return syscall4(.socketpair, @intCast(usize, domain), @intCast(usize, socket_type), @intCast(usize, protocol), @ptrToInt(fd));
1356	1356	}
1357	1357
1358	1358	pub fn accept(fd: i32, noalias addr: ?sockaddr, noalias len: ?socklen_t) usize {
1359		if (native_arch == .i386) {
	1359	if (native_arch == .x86) {
1360	1360	return socketcall(SC.accept, &[4]usize{ fd, addr, len, 0 });
1361	1361	}
1362	1362	return accept4(fd, addr, len, 0);
1363	1363	}
1364	1364
1365	1365	pub fn accept4(fd: i32, noalias addr: ?sockaddr, noalias len: ?socklen_t, flags: u32) usize {
1366		if (native_arch == .i386) {
	1366	if (native_arch == .x86) {
1367	1367	return socketcall(SC.accept4, &[4]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len), flags });
1368	1368	}
1369	1369	return syscall4(.accept4, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len), flags);
...	...	@@ -3459,12 +3459,12 @@ pub fn CPU_COUNT(set: cpu_set_t) cpu_count_t {
3459	3459	}
3460	3460
3461	3461	pub const MINSIGSTKSZ = switch (native_arch) {
3462		.i386, .x86_64, .arm, .mipsel => 2048,
	3462	.x86, .x86_64, .arm, .mipsel => 2048,
3463	3463	.aarch64 => 5120,
3464	3464	else => @compileError("MINSIGSTKSZ not defined for this architecture"),
3465	3465	};
3466	3466	pub const SIGSTKSZ = switch (native_arch) {
3467		.i386, .x86_64, .arm, .mipsel => 8192,
	3467	.x86, .x86_64, .arm, .mipsel => 8192,
3468	3468	.aarch64 => 16384,
3469	3469	else => @compileError("SIGSTKSZ not defined for this architecture"),
3470	3470	};
...	...	@@ -5631,7 +5631,7 @@ pub const AUDIT = struct {
5631	5631	const LE = 0x40000000;
5632	5632
5633	5633	pub const current: AUDIT.ARCH = switch (native_arch) {
5634		.i386 => .I386,
	5634	.x86 => .X86,
5635	5635	.x86_64 => .X86_64,
5636	5636	.aarch64 => .AARCH64,
5637	5637	.arm, .thumb => .ARM,
...	...	@@ -5650,7 +5650,7 @@ pub const AUDIT = struct {
5650	5650	ARMEB = toAudit(.armeb),
5651	5651	CSKY = toAudit(.csky),
5652	5652	HEXAGON = @enumToInt(std.elf.EM.HEXAGON),
5653		I386 = toAudit(.i386),
	5653	X86 = toAudit(.x86),
5654	5654	M68K = toAudit(.m68k),
5655	5655	MIPS = toAudit(.mips),
5656	5656	MIPSEL = toAudit(.mips) \| LE,

lib/std/os/linux/i386.zig deleted-383

...	...	@@ -1,383 +0,0 @@
1		const std = @import("../../std.zig");
2		const maxInt = std.math.maxInt;
3		const linux = std.os.linux;
4		const SYS = linux.SYS;
5		const socklen_t = linux.socklen_t;
6		const iovec = std.os.iovec;
7		const iovec_const = std.os.iovec_const;
8		const uid_t = linux.uid_t;
9		const gid_t = linux.gid_t;
10		const pid_t = linux.pid_t;
11		const stack_t = linux.stack_t;
12		const sigset_t = linux.sigset_t;
13		const sockaddr = linux.sockaddr;
14		const timespec = linux.timespec;
15
16		pub fn syscall0(number: SYS) usize {
17		return asm volatile ("int $0x80"
18		: [ret] "={eax}" (-> usize),
19		: [number] "{eax}" (@enumToInt(number)),
20		: "memory"
21		);
22		}
23
24		pub fn syscall1(number: SYS, arg1: usize) usize {
25		return asm volatile ("int $0x80"
26		: [ret] "={eax}" (-> usize),
27		: [number] "{eax}" (@enumToInt(number)),
28		[arg1] "{ebx}" (arg1),
29		: "memory"
30		);
31		}
32
33		pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
34		return asm volatile ("int $0x80"
35		: [ret] "={eax}" (-> usize),
36		: [number] "{eax}" (@enumToInt(number)),
37		[arg1] "{ebx}" (arg1),
38		[arg2] "{ecx}" (arg2),
39		: "memory"
40		);
41		}
42
43		pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
44		return asm volatile ("int $0x80"
45		: [ret] "={eax}" (-> usize),
46		: [number] "{eax}" (@enumToInt(number)),
47		[arg1] "{ebx}" (arg1),
48		[arg2] "{ecx}" (arg2),
49		[arg3] "{edx}" (arg3),
50		: "memory"
51		);
52		}
53
54		pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
55		return asm volatile ("int $0x80"
56		: [ret] "={eax}" (-> usize),
57		: [number] "{eax}" (@enumToInt(number)),
58		[arg1] "{ebx}" (arg1),
59		[arg2] "{ecx}" (arg2),
60		[arg3] "{edx}" (arg3),
61		[arg4] "{esi}" (arg4),
62		: "memory"
63		);
64		}
65
66		pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
67		return asm volatile ("int $0x80"
68		: [ret] "={eax}" (-> usize),
69		: [number] "{eax}" (@enumToInt(number)),
70		[arg1] "{ebx}" (arg1),
71		[arg2] "{ecx}" (arg2),
72		[arg3] "{edx}" (arg3),
73		[arg4] "{esi}" (arg4),
74		[arg5] "{edi}" (arg5),
75		: "memory"
76		);
77		}
78
79		pub fn syscall6(
80		number: SYS,
81		arg1: usize,
82		arg2: usize,
83		arg3: usize,
84		arg4: usize,
85		arg5: usize,
86		arg6: usize,
87		) usize {
88		// The 6th argument is passed via memory as we're out of registers if ebp is
89		// used as frame pointer. We push arg6 value on the stack before changing
90		// ebp or esp as the compiler may reference it as an offset relative to one
91		// of those two registers.
92		return asm volatile (
93		\\ push %[arg6]
94		\\ push %%ebp
95		\\ mov 4(%%esp), %%ebp
96		\\ int $0x80
97		\\ pop %%ebp
98		\\ add $4, %%esp
99		: [ret] "={eax}" (-> usize),
100		: [number] "{eax}" (@enumToInt(number)),
101		[arg1] "{ebx}" (arg1),
102		[arg2] "{ecx}" (arg2),
103		[arg3] "{edx}" (arg3),
104		[arg4] "{esi}" (arg4),
105		[arg5] "{edi}" (arg5),
106		[arg6] "rm" (arg6),
107		: "memory"
108		);
109		}
110
111		pub fn socketcall(call: usize, args: [*]usize) usize {
112		return asm volatile ("int $0x80"
113		: [ret] "={eax}" (-> usize),
114		: [number] "{eax}" (@enumToInt(SYS.socketcall)),
115		[arg1] "{ebx}" (call),
116		[arg2] "{ecx}" (@ptrToInt(args)),
117		: "memory"
118		);
119		}
120
121		const CloneFn = std.meta.FnPtr(fn (arg: usize) callconv(.C) u8);
122
123		/// This matches the libc clone function.
124		pub extern fn clone(func: CloneFn, stack: usize, flags: u32, arg: usize, ptid: i32, tls: usize, ctid: i32) usize;
125
126		pub fn restore() callconv(.Naked) void {
127		switch (@import("builtin").zig_backend) {
128		.stage2_c => return asm volatile (
129		\\ movl %[number], %%eax
130		\\ int $0x80
131		:
132		: [number] "i" (@enumToInt(SYS.sigreturn)),
133		: "memory"
134		),
135		else => return asm volatile ("int $0x80"
136		:
137		: [number] "{eax}" (@enumToInt(SYS.sigreturn)),
138		: "memory"
139		),
140		}
141		}
142
143		pub fn restore_rt() callconv(.Naked) void {
144		switch (@import("builtin").zig_backend) {
145		.stage2_c => return asm volatile (
146		\\ movl %[number], %%eax
147		\\ int $0x80
148		:
149		: [number] "i" (@enumToInt(SYS.rt_sigreturn)),
150		: "memory"
151		),
152		else => return asm volatile ("int $0x80"
153		:
154		: [number] "{eax}" (@enumToInt(SYS.rt_sigreturn)),
155		: "memory"
156		),
157		}
158		}
159
160		pub const O = struct {
161		pub const CREAT = 0o100;
162		pub const EXCL = 0o200;
163		pub const NOCTTY = 0o400;
164		pub const TRUNC = 0o1000;
165		pub const APPEND = 0o2000;
166		pub const NONBLOCK = 0o4000;
167		pub const DSYNC = 0o10000;
168		pub const SYNC = 0o4010000;
169		pub const RSYNC = 0o4010000;
170		pub const DIRECTORY = 0o200000;
171		pub const NOFOLLOW = 0o400000;
172		pub const CLOEXEC = 0o2000000;
173
174		pub const ASYNC = 0o20000;
175		pub const DIRECT = 0o40000;
176		pub const LARGEFILE = 0o100000;
177		pub const NOATIME = 0o1000000;
178		pub const PATH = 0o10000000;
179		pub const TMPFILE = 0o20200000;
180		pub const NDELAY = NONBLOCK;
181		};
182
183		pub const F = struct {
184		pub const DUPFD = 0;
185		pub const GETFD = 1;
186		pub const SETFD = 2;
187		pub const GETFL = 3;
188		pub const SETFL = 4;
189		pub const SETOWN = 8;
190		pub const GETOWN = 9;
191		pub const SETSIG = 10;
192		pub const GETSIG = 11;
193		pub const GETLK = 12;
194		pub const SETLK = 13;
195		pub const SETLKW = 14;
196		pub const SETOWN_EX = 15;
197		pub const GETOWN_EX = 16;
198		pub const GETOWNER_UIDS = 17;
199
200		pub const RDLCK = 0;
201		pub const WRLCK = 1;
202		pub const UNLCK = 2;
203		};
204
205		pub const LOCK = struct {
206		pub const SH = 1;
207		pub const EX = 2;
208		pub const NB = 4;
209		pub const UN = 8;
210		};
211
212		pub const MAP = struct {
213		pub const NORESERVE = 0x4000;
214		pub const GROWSDOWN = 0x0100;
215		pub const DENYWRITE = 0x0800;
216		pub const EXECUTABLE = 0x1000;
217		pub const LOCKED = 0x2000;
218		pub const @"32BIT" = 0x40;
219		};
220
221		pub const MMAP2_UNIT = 4096;
222
223		pub const VDSO = struct {
224		pub const CGT_SYM = "__vdso_clock_gettime";
225		pub const CGT_VER = "LINUX_2.6";
226		};
227
228		pub const ARCH = struct {};
229
230		pub const Flock = extern struct {
231		type: i16,
232		whence: i16,
233		start: off_t,
234		len: off_t,
235		pid: pid_t,
236		};
237
238		pub const msghdr = extern struct {
239		name: ?*sockaddr,
240		namelen: socklen_t,
241		iov: [*]iovec,
242		iovlen: i32,
243		control: ?*anyopaque,
244		controllen: socklen_t,
245		flags: i32,
246		};
247
248		pub const msghdr_const = extern struct {
249		name: ?*const sockaddr,
250		namelen: socklen_t,
251		iov: [*]const iovec_const,
252		iovlen: i32,
253		control: ?*const anyopaque,
254		controllen: socklen_t,
255		flags: i32,
256		};
257
258		pub const blksize_t = i32;
259		pub const nlink_t = u32;
260		pub const time_t = isize;
261		pub const mode_t = u32;
262		pub const off_t = i64;
263		pub const ino_t = u64;
264		pub const dev_t = u64;
265		pub const blkcnt_t = i64;
266
267		// The `stat` definition used by the Linux kernel.
268		pub const Stat = extern struct {
269		dev: dev_t,
270		__dev_padding: u32,
271		__ino_truncated: u32,
272		mode: mode_t,
273		nlink: nlink_t,
274		uid: uid_t,
275		gid: gid_t,
276		rdev: dev_t,
277		__rdev_padding: u32,
278		size: off_t,
279		blksize: blksize_t,
280		blocks: blkcnt_t,
281		atim: timespec,
282		mtim: timespec,
283		ctim: timespec,
284		ino: ino_t,
285
286		pub fn atime(self: @This()) timespec {
287		return self.atim;
288		}
289
290		pub fn mtime(self: @This()) timespec {
291		return self.mtim;
292		}
293
294		pub fn ctime(self: @This()) timespec {
295		return self.ctim;
296		}
297		};
298
299		pub const timeval = extern struct {
300		tv_sec: i32,
301		tv_usec: i32,
302		};
303
304		pub const timezone = extern struct {
305		tz_minuteswest: i32,
306		tz_dsttime: i32,
307		};
308
309		pub const mcontext_t = extern struct {
310		gregs: [19]usize,
311		fpregs: [*]u8,
312		oldmask: usize,
313		cr2: usize,
314		};
315
316		pub const REG = struct {
317		pub const GS = 0;
318		pub const FS = 1;
319		pub const ES = 2;
320		pub const DS = 3;
321		pub const EDI = 4;
322		pub const ESI = 5;
323		pub const EBP = 6;
324		pub const ESP = 7;
325		pub const EBX = 8;
326		pub const EDX = 9;
327		pub const ECX = 10;
328		pub const EAX = 11;
329		pub const TRAPNO = 12;
330		pub const ERR = 13;
331		pub const EIP = 14;
332		pub const CS = 15;
333		pub const EFL = 16;
334		pub const UESP = 17;
335		pub const SS = 18;
336		};
337
338		pub const ucontext_t = extern struct {
339		flags: usize,
340		link: ?*ucontext_t,
341		stack: stack_t,
342		mcontext: mcontext_t,
343		sigmask: sigset_t,
344		regspace: [64]u64,
345		};
346
347		pub const Elf_Symndx = u32;
348
349		pub const user_desc = packed struct {
350		entry_number: u32,
351		base_addr: u32,
352		limit: u32,
353		seg_32bit: u1,
354		contents: u2,
355		read_exec_only: u1,
356		limit_in_pages: u1,
357		seg_not_present: u1,
358		useable: u1,
359		};
360
361		/// socketcall() call numbers
362		pub const SC = struct {
363		pub const socket = 1;
364		pub const bind = 2;
365		pub const connect = 3;
366		pub const listen = 4;
367		pub const accept = 5;
368		pub const getsockname = 6;
369		pub const getpeername = 7;
370		pub const socketpair = 8;
371		pub const send = 9;
372		pub const recv = 10;
373		pub const sendto = 11;
374		pub const recvfrom = 12;
375		pub const shutdown = 13;
376		pub const setsockopt = 14;
377		pub const getsockopt = 15;
378		pub const sendmsg = 16;
379		pub const recvmsg = 17;
380		pub const accept4 = 18;
381		pub const recvmmsg = 19;
382		pub const sendmmsg = 20;
383		};

lib/std/os/linux/start_pie.zig+2-2

...	...	@@ -11,7 +11,7 @@ const R_RISCV_RELATIVE = 3;
11	11	const R_SPARC_RELATIVE = 22;
12	12
13	13	const R_RELATIVE = switch (builtin.cpu.arch) {
14		.i386 => R_386_RELATIVE,
	14	.x86 => R_386_RELATIVE,
15	15	.x86_64 => R_AMD64_RELATIVE,
16	16	.arm => R_ARM_RELATIVE,
17	17	.aarch64 => R_AARCH64_RELATIVE,
...	...	@@ -24,7 +24,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
24	24	// relocation that, at this point, is not yet applied.
25	25	fn getDynamicSymbol() [*]elf.Dyn {
26	26	return switch (builtin.cpu.arch) {
27		.i386 => asm volatile (
	27	.x86 => asm volatile (
28	28	\\ .weak _DYNAMIC
29	29	\\ .hidden _DYNAMIC
30	30	\\ call 1f

lib/std/os/linux/tls.zig+4-4

...	...	@@ -30,7 +30,7 @@ const native_arch = @import("builtin").cpu.arch;
30	30	// `-- The thread pointer register points here
31	31	//
32	32	// The structure of the TCB is not defined by the ABI so we reserve enough space
33		// for a single pointer as some architectures such as i386 and x86_64 need a
	33	// for a single pointer as some architectures such as x86 and x86_64 need a
34	34	// pointer to the TCB block itself at the address pointed by the tp.
35	35	//
36	36	// In this case the control structure and DTV are placed one after another right
...	...	@@ -49,7 +49,7 @@ const TLSVariant = enum {
49	49
50	50	const tls_variant = switch (native_arch) {
51	51	.arm, .armeb, .thumb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => TLSVariant.VariantI,
52		.x86_64, .i386, .sparc64 => TLSVariant.VariantII,
	52	.x86_64, .x86, .sparc64 => TLSVariant.VariantII,
53	53	else => @compileError("undefined tls_variant for this architecture"),
54	54	};
55	55
...	...	@@ -102,7 +102,7 @@ const TLSImage = struct {
102	102	dtv_offset: usize,
103	103	data_offset: usize,
104	104	data_size: usize,
105		// Only used on the i386 architecture
	105	// Only used on the x86 architecture
106	106	gdt_entry_number: usize,
107	107	};
108	108
...	...	@@ -110,7 +110,7 @@ pub var tls_image: TLSImage = undefined;
110	110
111	111	pub fn setThreadPointer(addr: usize) void {
112	112	switch (native_arch) {
113		.i386 => {
	113	.x86 => {
114	114	var user_desc = std.os.linux.user_desc{
115	115	.entry_number = tls_image.gdt_entry_number,
116	116	.base_addr = addr,

lib/std/os/linux/x86.zig created+383

...	...	@@ -0,0 +1,383 @@
	1	const std = @import("../../std.zig");
	2	const maxInt = std.math.maxInt;
	3	const linux = std.os.linux;
	4	const SYS = linux.SYS;
	5	const socklen_t = linux.socklen_t;
	6	const iovec = std.os.iovec;
	7	const iovec_const = std.os.iovec_const;
	8	const uid_t = linux.uid_t;
	9	const gid_t = linux.gid_t;
	10	const pid_t = linux.pid_t;
	11	const stack_t = linux.stack_t;
	12	const sigset_t = linux.sigset_t;
	13	const sockaddr = linux.sockaddr;
	14	const timespec = linux.timespec;
	15
	16	pub fn syscall0(number: SYS) usize {
	17	return asm volatile ("int $0x80"
	18	: [ret] "={eax}" (-> usize),
	19	: [number] "{eax}" (@enumToInt(number)),
	20	: "memory"
	21	);
	22	}
	23
	24	pub fn syscall1(number: SYS, arg1: usize) usize {
	25	return asm volatile ("int $0x80"
	26	: [ret] "={eax}" (-> usize),
	27	: [number] "{eax}" (@enumToInt(number)),
	28	[arg1] "{ebx}" (arg1),
	29	: "memory"
	30	);
	31	}
	32
	33	pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
	34	return asm volatile ("int $0x80"
	35	: [ret] "={eax}" (-> usize),
	36	: [number] "{eax}" (@enumToInt(number)),
	37	[arg1] "{ebx}" (arg1),
	38	[arg2] "{ecx}" (arg2),
	39	: "memory"
	40	);
	41	}
	42
	43	pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
	44	return asm volatile ("int $0x80"
	45	: [ret] "={eax}" (-> usize),
	46	: [number] "{eax}" (@enumToInt(number)),
	47	[arg1] "{ebx}" (arg1),
	48	[arg2] "{ecx}" (arg2),
	49	[arg3] "{edx}" (arg3),
	50	: "memory"
	51	);
	52	}
	53
	54	pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
	55	return asm volatile ("int $0x80"
	56	: [ret] "={eax}" (-> usize),
	57	: [number] "{eax}" (@enumToInt(number)),
	58	[arg1] "{ebx}" (arg1),
	59	[arg2] "{ecx}" (arg2),
	60	[arg3] "{edx}" (arg3),
	61	[arg4] "{esi}" (arg4),
	62	: "memory"
	63	);
	64	}
	65
	66	pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
	67	return asm volatile ("int $0x80"
	68	: [ret] "={eax}" (-> usize),
	69	: [number] "{eax}" (@enumToInt(number)),
	70	[arg1] "{ebx}" (arg1),
	71	[arg2] "{ecx}" (arg2),
	72	[arg3] "{edx}" (arg3),
	73	[arg4] "{esi}" (arg4),
	74	[arg5] "{edi}" (arg5),
	75	: "memory"
	76	);
	77	}
	78
	79	pub fn syscall6(
	80	number: SYS,
	81	arg1: usize,
	82	arg2: usize,
	83	arg3: usize,
	84	arg4: usize,
	85	arg5: usize,
	86	arg6: usize,
	87	) usize {
	88	// The 6th argument is passed via memory as we're out of registers if ebp is
	89	// used as frame pointer. We push arg6 value on the stack before changing
	90	// ebp or esp as the compiler may reference it as an offset relative to one
	91	// of those two registers.
	92	return asm volatile (
	93	\\ push %[arg6]
	94	\\ push %%ebp
	95	\\ mov 4(%%esp), %%ebp
	96	\\ int $0x80
	97	\\ pop %%ebp
	98	\\ add $4, %%esp
	99	: [ret] "={eax}" (-> usize),
	100	: [number] "{eax}" (@enumToInt(number)),
	101	[arg1] "{ebx}" (arg1),
	102	[arg2] "{ecx}" (arg2),
	103	[arg3] "{edx}" (arg3),
	104	[arg4] "{esi}" (arg4),
	105	[arg5] "{edi}" (arg5),
	106	[arg6] "rm" (arg6),
	107	: "memory"
	108	);
	109	}
	110
	111	pub fn socketcall(call: usize, args: [*]usize) usize {
	112	return asm volatile ("int $0x80"
	113	: [ret] "={eax}" (-> usize),
	114	: [number] "{eax}" (@enumToInt(SYS.socketcall)),
	115	[arg1] "{ebx}" (call),
	116	[arg2] "{ecx}" (@ptrToInt(args)),
	117	: "memory"
	118	);
	119	}
	120
	121	const CloneFn = std.meta.FnPtr(fn (arg: usize) callconv(.C) u8);
	122
	123	/// This matches the libc clone function.
	124	pub extern fn clone(func: CloneFn, stack: usize, flags: u32, arg: usize, ptid: i32, tls: usize, ctid: i32) usize;
	125
	126	pub fn restore() callconv(.Naked) void {
	127	switch (@import("builtin").zig_backend) {
	128	.stage2_c => return asm volatile (
	129	\\ movl %[number], %%eax
	130	\\ int $0x80
	131	:
	132	: [number] "i" (@enumToInt(SYS.sigreturn)),
	133	: "memory"
	134	),
	135	else => return asm volatile ("int $0x80"
	136	:
	137	: [number] "{eax}" (@enumToInt(SYS.sigreturn)),
	138	: "memory"
	139	),
	140	}
	141	}
	142
	143	pub fn restore_rt() callconv(.Naked) void {
	144	switch (@import("builtin").zig_backend) {
	145	.stage2_c => return asm volatile (
	146	\\ movl %[number], %%eax
	147	\\ int $0x80
	148	:
	149	: [number] "i" (@enumToInt(SYS.rt_sigreturn)),
	150	: "memory"
	151	),
	152	else => return asm volatile ("int $0x80"
	153	:
	154	: [number] "{eax}" (@enumToInt(SYS.rt_sigreturn)),
	155	: "memory"
	156	),
	157	}
	158	}
	159
	160	pub const O = struct {
	161	pub const CREAT = 0o100;
	162	pub const EXCL = 0o200;
	163	pub const NOCTTY = 0o400;
	164	pub const TRUNC = 0o1000;
	165	pub const APPEND = 0o2000;
	166	pub const NONBLOCK = 0o4000;
	167	pub const DSYNC = 0o10000;
	168	pub const SYNC = 0o4010000;
	169	pub const RSYNC = 0o4010000;
	170	pub const DIRECTORY = 0o200000;
	171	pub const NOFOLLOW = 0o400000;
	172	pub const CLOEXEC = 0o2000000;
	173
	174	pub const ASYNC = 0o20000;
	175	pub const DIRECT = 0o40000;
	176	pub const LARGEFILE = 0o100000;
	177	pub const NOATIME = 0o1000000;
	178	pub const PATH = 0o10000000;
	179	pub const TMPFILE = 0o20200000;
	180	pub const NDELAY = NONBLOCK;
	181	};
	182
	183	pub const F = struct {
	184	pub const DUPFD = 0;
	185	pub const GETFD = 1;
	186	pub const SETFD = 2;
	187	pub const GETFL = 3;
	188	pub const SETFL = 4;
	189	pub const SETOWN = 8;
	190	pub const GETOWN = 9;
	191	pub const SETSIG = 10;
	192	pub const GETSIG = 11;
	193	pub const GETLK = 12;
	194	pub const SETLK = 13;
	195	pub const SETLKW = 14;
	196	pub const SETOWN_EX = 15;
	197	pub const GETOWN_EX = 16;
	198	pub const GETOWNER_UIDS = 17;
	199
	200	pub const RDLCK = 0;
	201	pub const WRLCK = 1;
	202	pub const UNLCK = 2;
	203	};
	204
	205	pub const LOCK = struct {
	206	pub const SH = 1;
	207	pub const EX = 2;
	208	pub const NB = 4;
	209	pub const UN = 8;
	210	};
	211
	212	pub const MAP = struct {
	213	pub const NORESERVE = 0x4000;
	214	pub const GROWSDOWN = 0x0100;
	215	pub const DENYWRITE = 0x0800;
	216	pub const EXECUTABLE = 0x1000;
	217	pub const LOCKED = 0x2000;
	218	pub const @"32BIT" = 0x40;
	219	};
	220
	221	pub const MMAP2_UNIT = 4096;
	222
	223	pub const VDSO = struct {
	224	pub const CGT_SYM = "__vdso_clock_gettime";
	225	pub const CGT_VER = "LINUX_2.6";
	226	};
	227
	228	pub const ARCH = struct {};
	229
	230	pub const Flock = extern struct {
	231	type: i16,
	232	whence: i16,
	233	start: off_t,
	234	len: off_t,
	235	pid: pid_t,
	236	};
	237
	238	pub const msghdr = extern struct {
	239	name: ?*sockaddr,
	240	namelen: socklen_t,
	241	iov: [*]iovec,
	242	iovlen: i32,
	243	control: ?*anyopaque,
	244	controllen: socklen_t,
	245	flags: i32,
	246	};
	247
	248	pub const msghdr_const = extern struct {
	249	name: ?*const sockaddr,
	250	namelen: socklen_t,
	251	iov: [*]const iovec_const,
	252	iovlen: i32,
	253	control: ?*const anyopaque,
	254	controllen: socklen_t,
	255	flags: i32,
	256	};
	257
	258	pub const blksize_t = i32;
	259	pub const nlink_t = u32;
	260	pub const time_t = isize;
	261	pub const mode_t = u32;
	262	pub const off_t = i64;
	263	pub const ino_t = u64;
	264	pub const dev_t = u64;
	265	pub const blkcnt_t = i64;
	266
	267	// The `stat` definition used by the Linux kernel.
	268	pub const Stat = extern struct {
	269	dev: dev_t,
	270	__dev_padding: u32,
	271	__ino_truncated: u32,
	272	mode: mode_t,
	273	nlink: nlink_t,
	274	uid: uid_t,
	275	gid: gid_t,
	276	rdev: dev_t,
	277	__rdev_padding: u32,
	278	size: off_t,
	279	blksize: blksize_t,
	280	blocks: blkcnt_t,
	281	atim: timespec,
	282	mtim: timespec,
	283	ctim: timespec,
	284	ino: ino_t,
	285
	286	pub fn atime(self: @This()) timespec {
	287	return self.atim;
	288	}
	289
	290	pub fn mtime(self: @This()) timespec {
	291	return self.mtim;
	292	}
	293
	294	pub fn ctime(self: @This()) timespec {
	295	return self.ctim;
	296	}
	297	};
	298
	299	pub const timeval = extern struct {
	300	tv_sec: i32,
	301	tv_usec: i32,
	302	};
	303
	304	pub const timezone = extern struct {
	305	tz_minuteswest: i32,
	306	tz_dsttime: i32,
	307	};
	308
	309	pub const mcontext_t = extern struct {
	310	gregs: [19]usize,
	311	fpregs: [*]u8,
	312	oldmask: usize,
	313	cr2: usize,
	314	};
	315
	316	pub const REG = struct {
	317	pub const GS = 0;
	318	pub const FS = 1;
	319	pub const ES = 2;
	320	pub const DS = 3;
	321	pub const EDI = 4;
	322	pub const ESI = 5;
	323	pub const EBP = 6;
	324	pub const ESP = 7;
	325	pub const EBX = 8;
	326	pub const EDX = 9;
	327	pub const ECX = 10;
	328	pub const EAX = 11;
	329	pub const TRAPNO = 12;
	330	pub const ERR = 13;
	331	pub const EIP = 14;
	332	pub const CS = 15;
	333	pub const EFL = 16;
	334	pub const UESP = 17;
	335	pub const SS = 18;
	336	};
	337
	338	pub const ucontext_t = extern struct {
	339	flags: usize,
	340	link: ?*ucontext_t,
	341	stack: stack_t,
	342	mcontext: mcontext_t,
	343	sigmask: sigset_t,
	344	regspace: [64]u64,
	345	};
	346
	347	pub const Elf_Symndx = u32;
	348
	349	pub const user_desc = packed struct {
	350	entry_number: u32,
	351	base_addr: u32,
	352	limit: u32,
	353	seg_32bit: u1,
	354	contents: u2,
	355	read_exec_only: u1,
	356	limit_in_pages: u1,
	357	seg_not_present: u1,
	358	useable: u1,
	359	};
	360
	361	/// socketcall() call numbers
	362	pub const SC = struct {
	363	pub const socket = 1;
	364	pub const bind = 2;
	365	pub const connect = 3;
	366	pub const listen = 4;
	367	pub const accept = 5;
	368	pub const getsockname = 6;
	369	pub const getpeername = 7;
	370	pub const socketpair = 8;
	371	pub const send = 9;
	372	pub const recv = 10;
	373	pub const sendto = 11;
	374	pub const recvfrom = 12;
	375	pub const shutdown = 13;
	376	pub const setsockopt = 14;
	377	pub const getsockopt = 15;
	378	pub const sendmsg = 16;
	379	pub const recvmsg = 17;
	380	pub const accept4 = 18;
	381	pub const recvmmsg = 19;
	382	pub const sendmmsg = 20;
	383	};

lib/std/os/test.zig+1-1

...	...	@@ -746,7 +746,7 @@ test "sigaction" {
746	746	return error.SkipZigTest;
747	747
748	748	// https://github.com/ziglang/zig/issues/7427
749		if (native_os == .linux and builtin.target.cpu.arch == .i386)
	749	if (native_os == .linux and builtin.target.cpu.arch == .x86)
750	750	return error.SkipZigTest;
751	751
752	752	const S = struct {

lib/std/os/windows.zig+3-3

...	...	@@ -1750,7 +1750,7 @@ pub fn UnlockFile(
1750	1750
1751	1751	pub fn teb() *TEB {
1752	1752	return switch (native_arch) {
1753		.i386 => asm volatile (
	1753	.x86 => asm volatile (
1754	1754	\\ movl %%fs:0x18, %[ptr]
1755	1755	: [ptr] "=r" (-> *TEB),
1756	1756	),
...	...	@@ -2053,7 +2053,7 @@ pub const STD_OUTPUT_HANDLE = maxInt(DWORD) - 11 + 1;
2053	2053	/// The standard error device. Initially, this is the active console screen buffer, CONOUT$.
2054	2054	pub const STD_ERROR_HANDLE = maxInt(DWORD) - 12 + 1;
2055	2055
2056		pub const WINAPI: std.builtin.CallingConvention = if (native_arch == .i386)
	2056	pub const WINAPI: std.builtin.CallingConvention = if (native_arch == .x86)
2057	2057	.Stdcall
2058	2058	else
2059	2059	.C;
...	...	@@ -3019,7 +3019,7 @@ pub const EXCEPTION_RECORD = extern struct {
3019	3019	};
3020	3020
3021	3021	pub usingnamespace switch (native_arch) {
3022		.i386 => struct {
	3022	.x86 => struct {
3023	3023	pub const FLOATING_SAVE_AREA = extern struct {
3024	3024	ControlWord: DWORD,
3025	3025	StatusWord: DWORD,

lib/std/start.zig+2-2

...	...	@@ -275,7 +275,7 @@ fn _start() callconv(.Naked) noreturn {
275	275	\\ andq $-16, %%rsp
276	276	\\ call _posixCallMainAndExit
277	277	),
278		.i386 => asm volatile (
	278	.x86 => asm volatile (
279	279	\\ xorl %%ebp, %%ebp
280	280	\\ movl %%esp, argc_argv_ptr
281	281	\\ andl $-16, %%esp
...	...	@@ -307,7 +307,7 @@ fn _start() callconv(.Naked) noreturn {
307	307	: [argc] "={rsp}" (-> [*]usize),
308	308	);
309	309	},
310		.i386 => {
	310	.x86 => {
311	311	argc_argv_ptr = asm volatile (
312	312	\\ xor %%ebp, %%ebp
313	313	: [argc] "={esp}" (-> [*]usize),

lib/std/start_windows_tls.zig+1-1

...	...	@@ -8,7 +8,7 @@ export var __xl_a: std.os.windows.PIMAGE_TLS_CALLBACK linksection(".CRT$XLA") =
8	8	export var __xl_z: std.os.windows.PIMAGE_TLS_CALLBACK linksection(".CRT$XLZ") = null;
9	9
10	10	comptime {
11		if (builtin.target.cpu.arch == .i386) {
	11	if (builtin.target.cpu.arch == .x86) {
12	12	// The __tls_array is the offset of the ThreadLocalStoragePointer field
13	13	// in the TEB block whose base address held in the %fs segment.
14	14	asm (

lib/std/target.zig+16-16

...	...	@@ -850,7 +850,7 @@ pub const Target = struct {
850	850	tcele,
851	851	thumb,
852	852	thumbeb,
853		i386,
	853	x86,
854	854	x86_64,
855	855	xcore,
856	856	nvptx,
...	...	@@ -879,7 +879,7 @@ pub const Target = struct {
879	879
880	880	pub fn isX86(arch: Arch) bool {
881	881	return switch (arch) {
882		.i386, .x86_64 => true,
	882	.x86, .x86_64 => true,
883	883	else => false,
884	884	};
885	885	}
...	...	@@ -999,7 +999,7 @@ pub const Target = struct {
999	999	.tcele => .NONE,
1000	1000	.thumb => .ARM,
1001	1001	.thumbeb => .ARM,
1002		.i386 => .@"386",
	1002	.x86 => .@"386",
1003	1003	.xcore => .XCORE,
1004	1004	.nvptx => .NONE,
1005	1005	.amdil => .NONE,
...	...	@@ -1063,7 +1063,7 @@ pub const Target = struct {
1063	1063	.tcele => .Unknown,
1064	1064	.thumb => .Thumb,
1065	1065	.thumbeb => .Thumb,
1066		.i386 => .I386,
	1066	.x86 => .I386,
1067	1067	.xcore => .Unknown,
1068	1068	.nvptx => .Unknown,
1069	1069	.amdil => .Unknown,
...	...	@@ -1134,7 +1134,7 @@ pub const Target = struct {
1134	1134	.r600,
1135	1135	.riscv32,
1136	1136	.riscv64,
1137		.i386,
	1137	.x86,
1138	1138	.x86_64,
1139	1139	.wasm32,
1140	1140	.wasm64,
...	...	@@ -1179,7 +1179,7 @@ pub const Target = struct {
1179	1179	const is_nvptx = arch == .nvptx or arch == .nvptx64;
1180	1180	return switch (address_space) {
1181	1181	.generic => true,
1182		.fs, .gs, .ss => arch == .x86_64 or arch == .i386,
	1182	.fs, .gs, .ss => arch == .x86_64 or arch == .x86,
1183	1183	.global, .constant, .local, .shared => arch == .amdgcn or is_nvptx,
1184	1184	.param => is_nvptx,
1185	1185	};
...	...	@@ -1211,7 +1211,7 @@ pub const Target = struct {
1211	1211	.tcele,
1212	1212	.thumb,
1213	1213	.thumbeb,
1214		.i386,
	1214	.x86,
1215	1215	.xcore,
1216	1216	.nvptx,
1217	1217	.amdil,
...	...	@@ -1267,7 +1267,7 @@ pub const Target = struct {
1267	1267	.riscv32, .riscv64 => "riscv",
1268	1268	.sparc, .sparc64, .sparcel => "sparc",
1269	1269	.s390x => "s390x",
1270		.i386, .x86_64 => "x86",
	1270	.x86, .x86_64 => "x86",
1271	1271	.nvptx, .nvptx64 => "nvptx",
1272	1272	.wasm32, .wasm64 => "wasm",
1273	1273	.spirv32, .spirv64 => "spir-v",
...	...	@@ -1291,7 +1291,7 @@ pub const Target = struct {
1291	1291	.sparc, .sparc64, .sparcel => &sparc.all_features,
1292	1292	.spirv32, .spirv64 => &spirv.all_features,
1293	1293	.s390x => &s390x.all_features,
1294		.i386, .x86_64 => &x86.all_features,
	1294	.x86, .x86_64 => &x86.all_features,
1295	1295	.nvptx, .nvptx64 => &nvptx.all_features,
1296	1296	.ve => &ve.all_features,
1297	1297	.wasm32, .wasm64 => &wasm.all_features,
...	...	@@ -1315,7 +1315,7 @@ pub const Target = struct {
1315	1315	.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
1316	1316	.sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),
1317	1317	.s390x => comptime allCpusFromDecls(s390x.cpu),
1318		.i386, .x86_64 => comptime allCpusFromDecls(x86.cpu),
	1318	.x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
1319	1319	.nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
1320	1320	.ve => comptime allCpusFromDecls(ve.cpu),
1321	1321	.wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),
...	...	@@ -1377,7 +1377,7 @@ pub const Target = struct {
1377	1377	.sparc, .sparcel => &sparc.cpu.generic,
1378	1378	.sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
1379	1379	.s390x => &s390x.cpu.generic,
1380		.i386 => &x86.cpu.i386,
	1380	.x86 => &x86.cpu.x86,
1381	1381	.x86_64 => &x86.cpu.x86_64,
1382	1382	.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
1383	1383	.ve => &ve.cpu.generic,
...	...	@@ -1392,7 +1392,7 @@ pub const Target = struct {
1392	1392	.arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
1393	1393	.riscv32 => &riscv.cpu.baseline_rv32,
1394	1394	.riscv64 => &riscv.cpu.baseline_rv64,
1395		.i386 => &x86.cpu.pentium4,
	1395	.x86 => &x86.cpu.pentium4,
1396	1396	.nvptx, .nvptx64 => &nvptx.cpu.sm_20,
1397	1397	.sparc, .sparcel => &sparc.cpu.v8,
1398	1398
...	...	@@ -1622,7 +1622,7 @@ pub const Target = struct {
1622	1622	.dragonfly => return copy(&result, "/libexec/ld-elf.so.2"),
1623	1623	.solaris => return copy(&result, "/lib/64/ld.so.1"),
1624	1624	.linux => switch (self.cpu.arch) {
1625		.i386,
	1625	.x86,
1626	1626	.sparc,
1627	1627	.sparcel,
1628	1628	=> return copy(&result, "/lib/ld-linux.so.2"),
...	...	@@ -1771,7 +1771,7 @@ pub const Target = struct {
1771	1771	/// 5c arm little-endian ARM
1772	1772	/// 6c amd64 AMD64 and compatibles (e.g., Intel EM64T)
1773	1773	/// 7c arm64 ARM64 (ARMv8)
1774		/// 8c 386 Intel i386, i486, Pentium, etc.
	1774	/// 8c 386 Intel x86, i486, Pentium, etc.
1775	1775	/// kc sparc Sun SPARC
1776	1776	/// qc power Power PC
1777	1777	/// vc mips big-endian MIPS 3000 family
...	...	@@ -1780,7 +1780,7 @@ pub const Target = struct {
1780	1780	.arm => ".5",
1781	1781	.x86_64 => ".6",
1782	1782	.aarch64 => ".7",
1783		.i386 => ".8",
	1783	.x86 => ".8",
1784	1784	.sparc => ".k",
1785	1785	.powerpc, .powerpcle => ".q",
1786	1786	.mips, .mipsel => ".v",
...	...	@@ -1815,7 +1815,7 @@ pub const Target = struct {
1815	1815	.wasm64,
1816	1816	=> 8,
1817	1817
1818		.i386 => return switch (target.os.tag) {
	1818	.x86 => return switch (target.os.tag) {
1819	1819	.windows, .uefi => 8,
1820	1820	else => 4,
1821	1821	},

lib/std/target/x86.zig+2-2

...	...	@@ -2040,8 +2040,8 @@ pub const cpu = struct {
2040	2040	.xsaveopt,
2041	2041	}),
2042	2042	};
2043		pub const @"i386" = CpuModel{
2044		.name = "i386",
	2043	pub const x86 = CpuModel{
	2044	.name = "x86",
2045	2045	.llvm_name = "i386",
2046	2046	.features = featureSet(&[_]Feature{
2047	2047	.slow_unaligned_mem_16,

lib/std/valgrind.zig+1-1

...	...	@@ -8,7 +8,7 @@ pub fn doClientRequest(default: usize, request: usize, a1: usize, a2: usize, a3:
8	8	}
9	9
10	10	switch (builtin.target.cpu.arch) {
11		.i386 => {
	11	.x86 => {
12	12	return asm volatile (
13	13	\\ roll $3, %%edi ; roll $13, %%edi
14	14	\\ roll $29, %%edi ; roll $19, %%edi

lib/std/zig/CrossTarget.zig+1-1

...	...	@@ -592,7 +592,7 @@ pub const VcpkgLinkage = std.builtin.LinkMode;
592	592	/// Returned slice must be freed by the caller.
593	593	pub fn vcpkgTriplet(self: CrossTarget, allocator: mem.Allocator, linkage: VcpkgLinkage) ![]u8 {
594	594	const arch = switch (self.getCpuArch()) {
595		.i386 => "x86",
	595	.x86 => "x86",
596	596	.x86_64 => "x64",
597	597
598	598	.arm,

lib/std/zig/system/NativeTargetInfo.zig+5-5

...	...	@@ -199,11 +199,11 @@ pub fn detect(cross_target: CrossTarget) DetectError!NativeTargetInfo {
199	199	// For x86, we need to populate some CPU feature flags depending on architecture
200	200	// and mode:
201	201	// * 16bit_mode => if the abi is code16
202		// * 32bit_mode => if the arch is i386
	202	// * 32bit_mode => if the arch is x86
203	203	// However, the "mode" flags can be used as overrides, so if the user explicitly
204	204	// sets one of them, that takes precedence.
205	205	switch (cpu_arch) {
206		.i386 => {
	206	.x86 => {
207	207	if (!std.Target.x86.featureSetHasAny(cross_target.cpu_features_add, .{
208	208	.@"16bit_mode", .@"32bit_mode",
209	209	})) {
...	...	@@ -969,7 +969,7 @@ fn detectNativeCpuAndFeatures(cpu_arch: Target.Cpu.Arch, os: Target.Os, cross_ta
969	969	// although it is a runtime value, is guaranteed to be one of the architectures in the set
970	970	// of the respective switch prong.
971	971	switch (builtin.cpu.arch) {
972		.x86_64, .i386 => {
	972	.x86_64, .x86 => {
973	973	return @import("x86.zig").detectNativeCpuAndFeatures(cpu_arch, os, cross_target);
974	974	},
975	975	else => {},
...	...	@@ -1019,7 +1019,7 @@ pub fn getExternalExecutor(
1019	1019	if (host.target.cpu.arch == candidate.target.cpu.arch)
1020	1020	break :cpu_ok true;
1021	1021
1022		if (host.target.cpu.arch == .x86_64 and candidate.target.cpu.arch == .i386)
	1022	if (host.target.cpu.arch == .x86_64 and candidate.target.cpu.arch == .x86)
1023	1023	break :cpu_ok true;
1024	1024
1025	1025	if (host.target.cpu.arch == .aarch64 and candidate.target.cpu.arch == .arm)
...	...	@@ -1068,7 +1068,7 @@ pub fn getExternalExecutor(
1068	1068	.arm => Executor{ .qemu = "qemu-arm" },
1069	1069	.armeb => Executor{ .qemu = "qemu-armeb" },
1070	1070	.hexagon => Executor{ .qemu = "qemu-hexagon" },
1071		.i386 => Executor{ .qemu = "qemu-i386" },
	1071	.x86 => Executor{ .qemu = "qemu-i386" },
1072	1072	.m68k => Executor{ .qemu = "qemu-m68k" },
1073	1073	.mips => Executor{ .qemu = "qemu-mips" },
1074	1074	.mipsel => Executor{ .qemu = "qemu-mipsel" },

lib/std/zig/system/x86.zig+1-1

...	...	@@ -80,7 +80,7 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32
80	80	}
81	81	switch (family) {
82	82	3 => {
83		cpu.model = &Target.x86.cpu.i386;
	83	cpu.model = &Target.x86.cpu.x86;
84	84	return;
85	85	},
86	86	4 => {

src/Compilation.zig+2-2

...	...	@@ -4281,7 +4281,7 @@ pub fn addCCArgs(
4281	4281	},
4282	4282	.ios, .tvos, .watchos => switch (target.cpu.arch) {
4283	4283	// Pass the proper -m<os>-version-min argument for darwin.
4284		.i386, .x86_64 => {
	4284	.x86, .x86_64 => {
4285	4285	const ver = target.os.version_range.semver.min;
4286	4286	try argv.append(try std.fmt.allocPrint(
4287	4287	arena,
...	...	@@ -4969,7 +4969,7 @@ pub fn getZigBackend(comp: Compilation) std.builtin.CompilerBackend {
4969	4969	.wasm32, .wasm64 => std.builtin.CompilerBackend.stage2_wasm,
4970	4970	.arm, .armeb, .thumb, .thumbeb => .stage2_arm,
4971	4971	.x86_64 => .stage2_x86_64,
4972		.i386 => .stage2_x86,
	4972	.x86 => .stage2_x86,
4973	4973	.aarch64, .aarch64_be, .aarch64_32 => .stage2_aarch64,
4974	4974	.riscv64 => .stage2_riscv64,
4975	4975	.sparc64 => .stage2_sparc64,

src/Sema.zig+7-7

...	...	@@ -8415,20 +8415,20 @@ fn funcCommon(
8415	8415	if (switch (cc_workaround) {
8416	8416	.Unspecified, .C, .Naked, .Async, .Inline => null,
8417	8417	.Interrupt => switch (arch) {
8418		.i386, .x86_64, .avr, .msp430 => null,
8419		else => @as([]const u8, "i386, x86_64, AVR, and MSP430"),
	8418	.x86, .x86_64, .avr, .msp430 => null,
	8419	else => @as([]const u8, "x86, x86_64, AVR, and MSP430"),
8420	8420	},
8421	8421	.Signal => switch (arch) {
8422	8422	.avr => null,
8423	8423	else => @as([]const u8, "AVR"),
8424	8424	},
8425	8425	.Stdcall, .Fastcall, .Thiscall => switch (arch) {
8426		.i386 => null,
8427		else => @as([]const u8, "i386"),
	8426	.x86 => null,
	8427	else => @as([]const u8, "x86"),
8428	8428	},
8429	8429	.Vectorcall => switch (arch) {
8430		.i386, .aarch64, .aarch64_be, .aarch64_32 => null,
8431		else => @as([]const u8, "i386 and AArch64"),
	8430	.x86, .aarch64, .aarch64_be, .aarch64_32 => null,
	8431	else => @as([]const u8, "x86 and AArch64"),
8432	8432	},
8433	8433	.APCS, .AAPCS, .AAPCSVFP => switch (arch) {
8434	8434	.arm, .armeb, .aarch64, .aarch64_be, .aarch64_32, .thumb, .thumbeb => null,
...	...	@@ -30766,7 +30766,7 @@ pub fn analyzeAddressSpace(
30766	30766
30767	30767	const supported = switch (address_space) {
30768	30768	.generic => true,
30769		.gs, .fs, .ss => (arch == .i386 or arch == .x86_64) and ctx == .pointer,
	30769	.gs, .fs, .ss => (arch == .x86 or arch == .x86_64) and ctx == .pointer,
30770	30770	// TODO: check that .shared and .local are left uninitialized
30771	30771	.param => is_nv,
30772	30772	.global, .shared, .local => is_gpu,

src/codegen.zig+1-1

...	...	@@ -110,7 +110,7 @@ pub fn generateFunction(
110	110	//.tcele => return Function(.tcele).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
111	111	//.thumb => return Function(.thumb).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
112	112	//.thumbeb => return Function(.thumbeb).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
113		//.i386 => return Function(.i386).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
	113	//.x86 => return Function(.x86).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
114	114	.x86_64 => return @import("arch/x86_64/CodeGen.zig").generate(bin_file, src_loc, func, air, liveness, code, debug_output),
115	115	//.xcore => return Function(.xcore).generate(bin_file, src_loc, func, air, liveness, code, debug_output),
116	116	//.nvptx => return Function(.nvptx).generate(bin_file, src_loc, func, air, liveness, code, debug_output),

src/codegen/llvm.zig+9-9

...	...	@@ -70,7 +70,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
70	70	.tcele => "tcele",
71	71	.thumb => "thumb",
72	72	.thumbeb => "thumbeb",
73		.i386 => "i386",
	73	.x86 => "i386",
74	74	.x86_64 => "x86_64",
75	75	.xcore => "xcore",
76	76	.nvptx => "nvptx",
...	...	@@ -282,7 +282,7 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
282	282	.tcele => .tcele,
283	283	.thumb => .thumb,
284	284	.thumbeb => .thumbeb,
285		.i386 => .x86,
	285	.x86 => .x86,
286	286	.x86_64 => .x86_64,
287	287	.xcore => .xcore,
288	288	.nvptx => .nvptx,
...	...	@@ -6195,7 +6195,7 @@ pub const FuncGen = struct {
6195	6195	// here then we may risk tripping LLVM bugs since anything not used by Clang tends
6196	6196	// to be buggy and regress often.
6197	6197	switch (target.cpu.arch) {
6198		.x86_64, .i386 => {
	6198	.x86_64, .x86 => {
6199	6199	if (total_i != 0) try llvm_constraints.append(self.gpa, ',');
6200	6200	try llvm_constraints.appendSlice(self.gpa, "~{dirflag},~{fpsr},~{flags}");
6201	6201	total_i += 3;
...	...	@@ -9275,7 +9275,7 @@ pub const FuncGen = struct {
9275	9275	switch (prefetch.cache) {
9276	9276	.instruction => switch (target.cpu.arch) {
9277	9277	.x86_64,
9278		.i386,
	9278	.x86,
9279	9279	.powerpc,
9280	9280	.powerpcle,
9281	9281	.powerpc64,
...	...	@@ -9856,7 +9856,7 @@ fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
9856	9856	llvm.LLVMInitializeWebAssemblyAsmPrinter();
9857	9857	llvm.LLVMInitializeWebAssemblyAsmParser();
9858	9858	},
9859		.i386, .x86_64 => {
	9859	.x86, .x86_64 => {
9860	9860	llvm.LLVMInitializeX86Target();
9861	9861	llvm.LLVMInitializeX86TargetInfo();
9862	9862	llvm.LLVMInitializeX86TargetMC();
...	...	@@ -9968,7 +9968,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
9968	9968	.Stdcall => .X86_StdCall,
9969	9969	.Fastcall => .X86_FastCall,
9970	9970	.Vectorcall => return switch (target.cpu.arch) {
9971		.i386, .x86_64 => .X86_VectorCall,
	9971	.x86, .x86_64 => .X86_VectorCall,
9972	9972	.aarch64, .aarch64_be, .aarch64_32 => .AArch64_VectorCall,
9973	9973	else => unreachable,
9974	9974	},
...	...	@@ -9977,7 +9977,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
9977	9977	.AAPCS => .ARM_AAPCS,
9978	9978	.AAPCSVFP => .ARM_AAPCS_VFP,
9979	9979	.Interrupt => return switch (target.cpu.arch) {
9980		.i386, .x86_64 => .X86_INTR,
	9980	.x86, .x86_64 => .X86_INTR,
9981	9981	.avr => .AVR_INTR,
9982	9982	.msp430 => .MSP430_INTR,
9983	9983	else => unreachable,
...	...	@@ -9999,7 +9999,7 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
9999	9999	/// Convert a zig-address space to an llvm address space.
10000	10000	fn toLlvmAddressSpace(address_space: std.builtin.AddressSpace, target: std.Target) c_uint {
10001	10001	return switch (target.cpu.arch) {
10002		.i386, .x86_64 => switch (address_space) {
	10002	.x86, .x86_64 => switch (address_space) {
10003	10003	.generic => llvm.address_space.default,
10004	10004	.gs => llvm.address_space.x86.gs,
10005	10005	.fs => llvm.address_space.x86.fs,
...	...	@@ -10714,7 +10714,7 @@ fn isScalar(ty: Type) bool {
10714	10714	/// and false if we expect LLVM to crash if it counters an x86_fp80 type.
10715	10715	fn backendSupportsF80(target: std.Target) bool {
10716	10716	return switch (target.cpu.arch) {
10717		.x86_64, .i386 => !std.Target.x86.featureSetHas(target.cpu.features, .soft_float),
	10717	.x86_64, .x86 => !std.Target.x86.featureSetHas(target.cpu.features, .soft_float),
10718	10718	else => false,
10719	10719	};
10720	10720	}

src/crash_report.zig+1-1

...	...	@@ -205,7 +205,7 @@ fn handleSegfaultPosix(sig: i32, info: const os.siginfo_t, ctx_ptr: ?const any
205	205	};
206	206
207	207	const stack_ctx: StackContext = switch (builtin.cpu.arch) {
208		.i386 => ctx: {
	208	.x86 => ctx: {
209	209	const ctx = @ptrCast(*const os.ucontext_t, @alignCast(@alignOf(os.ucontext_t), ctx_ptr));
210	210	const ip = @intCast(usize, ctx.mcontext.gregs[os.REG.EIP]);
211	211	const bp = @intCast(usize, ctx.mcontext.gregs[os.REG.EBP]);

src/glibc.zig+4-4

...	...	@@ -327,7 +327,7 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile) !void {
327	327	});
328	328	try add_include_dirs(comp, arena, &args);
329	329
330		if (target.cpu.arch == .i386) {
	330	if (target.cpu.arch == .x86) {
331	331	// This prevents i386/sysdep.h from trying to do some
332	332	// silly and unnecessary inline asm hack that uses weird
333	333	// syntax that clang does not support.
...	...	@@ -406,7 +406,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
406	406	}
407	407	} else if (arch == .x86_64) {
408	408	try result.appendSlice("x86_64");
409		} else if (arch == .i386) {
	409	} else if (arch == .x86) {
410	410	try result.appendSlice("i386");
411	411	} else if (is_aarch64) {
412	412	try result.appendSlice("aarch64");
...	...	@@ -504,7 +504,7 @@ fn add_include_dirs_arch(
504	504	opt_nptl: ?[]const u8,
505	505	dir: []const u8,
506	506	) error{OutOfMemory}!void {
507		const is_x86 = arch == .i386 or arch == .x86_64;
	507	const is_x86 = arch == .x86 or arch == .x86_64;
508	508	const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
509	509	const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
510	510	const is_sparc = arch == .sparc or arch == .sparcel or arch == .sparc64;
...	...	@@ -521,7 +521,7 @@ fn add_include_dirs_arch(
521	521	try args.append("-I");
522	522	try args.append(try path.join(arena, &[_][]const u8{ dir, "x86_64" }));
523	523	}
524		} else if (arch == .i386) {
	524	} else if (arch == .x86) {
525	525	if (opt_nptl) \|nptl\| {
526	526	try args.append("-I");
527	527	try args.append(try path.join(arena, &[_][]const u8{ dir, "i386", nptl }));

src/libc_installation.zig+2-2

...	...	@@ -408,7 +408,7 @@ pub const LibCInstallation = struct {
408	408	defer result_buf.deinit();
409	409
410	410	const arch_sub_dir = switch (builtin.target.cpu.arch) {
411		.i386 => "x86",
	411	.x86 => "x86",
412	412	.x86_64 => "x64",
413	413	.arm, .armeb => "arm",
414	414	else => return error.UnsupportedArchitecture,
...	...	@@ -471,7 +471,7 @@ pub const LibCInstallation = struct {
471	471	defer result_buf.deinit();
472	472
473	473	const arch_sub_dir = switch (builtin.target.cpu.arch) {
474		.i386 => "x86",
	474	.x86 => "x86",
475	475	.x86_64 => "x64",
476	476	.arm, .armeb => "arm",
477	477	else => return error.UnsupportedArchitecture,

src/link/Coff.zig+1-1

...	...	@@ -1294,7 +1294,7 @@ pub fn updateDeclExports(
1294	1294	const exported_decl = module.declPtr(exp.exported_decl);
1295	1295	if (exported_decl.getFunction() == null) continue;
1296	1296	const winapi_cc = switch (self.base.options.target.cpu.arch) {
1297		.i386 => std.builtin.CallingConvention.Stdcall,
	1297	.x86 => std.builtin.CallingConvention.Stdcall,
1298	1298	else => std.builtin.CallingConvention.C,
1299	1299	};
1300	1300	const decl_cc = exported_decl.ty.fnCallingConvention();

src/link/Coff/lld.zig+3-3

...	...	@@ -197,7 +197,7 @@ pub fn linkWithLLD(self: Coff, comp: Compilation, prog_node: *std.Progress.Nod
197	197	try argv.append(try std.fmt.allocPrint(arena, "-BASE:{d}", .{image_base}));
198	198	}
199	199
200		if (target.cpu.arch == .i386) {
	200	if (target.cpu.arch == .x86) {
201	201	try argv.append("-MACHINE:X86");
202	202	} else if (target.cpu.arch == .x86_64) {
203	203	try argv.append("-MACHINE:X64");
...	...	@@ -380,7 +380,7 @@ pub fn linkWithLLD(self: Coff, comp: Compilation, prog_node: *std.Progress.Nod
380	380	if (target.abi.isGnu()) {
381	381	try argv.append("-lldmingw");
382	382
383		if (target.cpu.arch == .i386) {
	383	if (target.cpu.arch == .x86) {
384	384	try argv.append("-ALTERNATENAME:__image_base__=___ImageBase");
385	385	} else {
386	386	try argv.append("-ALTERNATENAME:__image_base__=__ImageBase");
...	...	@@ -388,7 +388,7 @@ pub fn linkWithLLD(self: Coff, comp: Compilation, prog_node: *std.Progress.Nod
388	388
389	389	if (is_dyn_lib) {
390	390	try argv.append(try comp.get_libc_crt_file(arena, "dllcrt2.obj"));
391		if (target.cpu.arch == .i386) {
	391	if (target.cpu.arch == .x86) {
392	392	try argv.append("-ALTERNATENAME:__DllMainCRTStartup@12=_DllMainCRTStartup@12");
393	393	} else {
394	394	try argv.append("-ALTERNATENAME:_DllMainCRTStartup=DllMainCRTStartup");

src/link/Elf.zig+1-1

...	...	@@ -3004,7 +3004,7 @@ fn sectHeaderTo32(shdr: elf.Elf64_Shdr) elf.Elf32_Shdr {
3004	3004
3005	3005	fn getLDMOption(target: std.Target) ?[]const u8 {
3006	3006	switch (target.cpu.arch) {
3007		.i386 => return "elf_i386",
	3007	.x86 => return "elf_i386",
3008	3008	.aarch64 => return "aarch64linux",
3009	3009	.aarch64_be => return "aarch64_be_linux",
3010	3010	.arm, .thumb => return "armelf_linux_eabi",

src/link/Plan9.zig+1-1

...	...	@@ -150,7 +150,7 @@ pub fn defaultBaseAddrs(arch: std.Target.Cpu.Arch) Bases {
150	150	.text = 0x200028,
151	151	.data = 0x400000,
152	152	},
153		.i386 => .{
	153	.x86 => .{
154	154	// header size => 32 => 0x20
155	155	.text = 0x200020,
156	156	.data = 0x400000,

src/link/Plan9/aout.zig+2-2

...	...	@@ -109,7 +109,7 @@ pub const R_MAGIC = _MAGIC(HDR_MAGIC, 28); // arm64
109	109
110	110	pub fn magicFromArch(arch: std.Target.Cpu.Arch) !u32 {
111	111	return switch (arch) {
112		.i386 => I_MAGIC,
	112	.x86 => I_MAGIC,
113	113	.sparc => K_MAGIC, // TODO should sparc64 and sparcel go here?
114	114	.mips => V_MAGIC,
115	115	.arm => E_MAGIC,
...	...	@@ -124,7 +124,7 @@ pub fn magicFromArch(arch: std.Target.Cpu.Arch) !u32 {
124	124	/// gets the quantization of pc for the arch
125	125	pub fn getPCQuant(arch: std.Target.Cpu.Arch) !u8 {
126	126	return switch (arch) {
127		.i386, .x86_64 => 1,
	127	.x86, .x86_64 => 1,
128	128	.powerpc, .powerpc64, .mips, .sparc, .arm, .aarch64 => 4,
129	129	else => error.ArchNotSupportedByPlan9,
130	130	};

src/mingw.zig+4-4

...	...	@@ -128,7 +128,7 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile) !void {
128	128	.extra_flags = extra_flags,
129	129	};
130	130	}
131		if (comp.getTarget().cpu.arch == .i386) {
	131	if (comp.getTarget().cpu.arch == .x86) {
132	132	for (msvcrt_i386_src) \|dep\| {
133	133	(try c_source_files.addOne()).* = .{
134	134	.src_path = try comp.zig_lib_directory.join(arena, &[_][]const u8{
...	...	@@ -180,7 +180,7 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile) !void {
180	180	};
181	181	}
182	182	const target = comp.getTarget();
183		if (target.cpu.arch == .i386 or target.cpu.arch == .x86_64) {
	183	if (target.cpu.arch == .x86 or target.cpu.arch == .x86_64) {
184	184	for (mingwex_x86_src) \|dep\| {
185	185	(try c_source_files.addOne()).* = .{
186	186	.src_path = try comp.zig_lib_directory.join(arena, &[_][]const u8{
...	...	@@ -338,7 +338,7 @@ pub fn buildImportLib(comp: *Compilation, lib_name: []const u8) !void {
338	338	});
339	339
340	340	const target_def_arg = switch (target.cpu.arch) {
341		.i386 => "-DDEF_I386",
	341	.x86 => "-DDEF_I386",
342	342	.x86_64 => "-DDEF_X64",
343	343	.arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "-DDEF_ARM32",
344	344	.aarch64, .aarch64_be => "-DDEF_ARM64",
...	...	@@ -434,7 +434,7 @@ fn findDef(comp: *Compilation, allocator: Allocator, lib_name: []const u8) ![]u8
434	434	const target = comp.getTarget();
435	435
436	436	const lib_path = switch (target.cpu.arch) {
437		.i386 => "lib32",
	437	.x86 => "lib32",
438	438	.x86_64 => "lib64",
439	439	.arm, .armeb, .thumb, .thumbeb, .aarch64_32 => "libarm32",
440	440	.aarch64, .aarch64_be => "libarm64",

src/musl.zig+1-1

...	...	@@ -262,7 +262,7 @@ pub fn archName(arch: std.Target.Cpu.Arch) [:0]const u8 {
262	262	switch (arch) {
263	263	.aarch64, .aarch64_be => return "aarch64",
264	264	.arm, .armeb, .thumb, .thumbeb => return "arm",
265		.i386 => return "i386",
	265	.x86 => return "i386",
266	266	.mips, .mipsel => return "mips",
267	267	.mips64el, .mips64 => return "mips64",
268	268	.powerpc => return "powerpc",

src/target.zig+9-9

...	...	@@ -35,9 +35,9 @@ pub const available_libcs = [_]ArchOsAbi{
35	35	.{ .arch = .arm, .os = .windows, .abi = .gnu },
36	36	.{ .arch = .csky, .os = .linux, .abi = .gnueabi },
37	37	.{ .arch = .csky, .os = .linux, .abi = .gnueabihf },
38		.{ .arch = .i386, .os = .linux, .abi = .gnu },
39		.{ .arch = .i386, .os = .linux, .abi = .musl },
40		.{ .arch = .i386, .os = .windows, .abi = .gnu },
	38	.{ .arch = .x86, .os = .linux, .abi = .gnu },
	39	.{ .arch = .x86, .os = .linux, .abi = .musl },
	40	.{ .arch = .x86, .os = .windows, .abi = .gnu },
41	41	.{ .arch = .m68k, .os = .linux, .abi = .gnu },
42	42	.{ .arch = .m68k, .os = .linux, .abi = .musl },
43	43	.{ .arch = .mips64el, .os = .linux, .abi = .gnuabi64 },
...	...	@@ -137,7 +137,7 @@ pub fn osArchName(target: std.Target) [:0]const u8 {
137	137	.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
138	138	.riscv32, .riscv64 => "riscv",
139	139	.sparc, .sparcel, .sparc64 => "sparc",
140		.i386, .x86_64 => "x86",
	140	.x86, .x86_64 => "x86",
141	141	else => @tagName(target.cpu.arch),
142	142	},
143	143	else => @tagName(target.cpu.arch),
...	...	@@ -278,7 +278,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
278	278	.tcele,
279	279	.thumb,
280	280	.thumbeb,
281		.i386,
	281	.x86,
282	282	.x86_64,
283	283	.xcore,
284	284	.nvptx,
...	...	@@ -319,7 +319,7 @@ pub fn selfHostedBackendIsAsRobustAsLlvm(target: std.Target) bool {
319	319
320	320	pub fn supportsStackProbing(target: std.Target) bool {
321	321	return target.os.tag != .windows and target.os.tag != .uefi and
322		(target.cpu.arch == .i386 or target.cpu.arch == .x86_64);
	322	(target.cpu.arch == .x86 or target.cpu.arch == .x86_64);
323	323	}
324	324
325	325	pub fn supportsStackProtector(target: std.Target) bool {
...	...	@@ -431,7 +431,7 @@ pub fn defaultCompilerRtOptimizeMode(target: std.Target) std.builtin.Mode {
431	431	pub fn hasRedZone(target: std.Target) bool {
432	432	return switch (target.cpu.arch) {
433	433	.x86_64,
434		.i386,
	434	.x86,
435	435	.powerpc,
436	436	.powerpc64,
437	437	.powerpc64le,
...	...	@@ -550,7 +550,7 @@ pub fn atomicPtrAlignment(
550	550	.tcele,
551	551	.thumb,
552	552	.thumbeb,
553		.i386,
	553	.x86,
554	554	.xcore,
555	555	.amdil,
556	556	.hsail,
...	...	@@ -655,7 +655,7 @@ pub fn addrSpaceCastIsValid(
655	655	) bool {
656	656	const arch = target.cpu.arch;
657	657	switch (arch) {
658		.x86_64, .i386 => return arch.supportsAddressSpace(from) and arch.supportsAddressSpace(to),
	658	.x86_64, .x86 => return arch.supportsAddressSpace(from) and arch.supportsAddressSpace(to),
659	659	.nvptx64, .nvptx, .amdgcn => {
660	660	const to_generic = arch.supportsAddressSpace(from) and to == .generic;
661	661	const from_generic = arch.supportsAddressSpace(to) and from == .generic;

src/type.zig+9-9

...	...	@@ -6653,7 +6653,7 @@ pub const CType = enum {
6653	6653	.long, .ulong => return target.cpu.arch.ptrBitWidth(),
6654	6654	.longlong, .ulonglong, .double => return 64,
6655	6655	.longdouble => switch (target.cpu.arch) {
6656		.i386 => switch (target.abi) {
	6656	.x86 => switch (target.abi) {
6657	6657	.android => return 64,
6658	6658	else => return 80,
6659	6659	},
...	...	@@ -6741,7 +6741,7 @@ pub const CType = enum {
6741	6741	.long, .ulong => return target.cpu.arch.ptrBitWidth(),
6742	6742	.longlong, .ulonglong, .double => return 64,
6743	6743	.longdouble => switch (target.cpu.arch) {
6744		.i386 => switch (target.abi) {
	6744	.x86 => switch (target.abi) {
6745	6745	.android => return 64,
6746	6746	else => return 80,
6747	6747	},
...	...	@@ -6795,7 +6795,7 @@ pub const CType = enum {
6795	6795	},
6796	6796
6797	6797	.windows, .uefi => switch (target.cpu.arch) {
6798		.i386 => switch (self) {
	6798	.x86 => switch (self) {
6799	6799	.short, .ushort => return 16,
6800	6800	.int, .uint, .float => return 32,
6801	6801	.long, .ulong => return 32,
...	...	@@ -6831,7 +6831,7 @@ pub const CType = enum {
6831	6831	.short, .ushort => return 16,
6832	6832	.int, .uint, .float => return 32,
6833	6833	.long, .ulong => switch (target.cpu.arch) {
6834		.i386, .arm, .aarch64_32 => return 32,
	6834	.x86, .arm, .aarch64_32 => return 32,
6835	6835	.x86_64 => switch (target.abi) {
6836	6836	.gnux32, .muslx32 => return 32,
6837	6837	else => return 64,
...	...	@@ -6840,7 +6840,7 @@ pub const CType = enum {
6840	6840	},
6841	6841	.longlong, .ulonglong, .double => return 64,
6842	6842	.longdouble => switch (target.cpu.arch) {
6843		.i386 => switch (target.abi) {
	6843	.x86 => switch (target.abi) {
6844	6844	.android => return 64,
6845	6845	else => return 80,
6846	6846	},
...	...	@@ -6899,7 +6899,7 @@ pub const CType = enum {
6899	6899	.short, .ushort => return 2,
6900	6900	else => return 1,
6901	6901	},
6902		.i386 => switch (target.os.tag) {
	6902	.x86 => switch (target.os.tag) {
6903	6903	.windows, .uefi => switch (self) {
6904	6904	.longlong, .ulonglong, .double => return 8,
6905	6905	.longdouble => switch (target.abi) {
...	...	@@ -6940,7 +6940,7 @@ pub const CType = enum {
6940	6940
6941	6941	.arc,
6942	6942	.csky,
6943		.i386,
	6943	.x86,
6944	6944	.xcore,
6945	6945	.dxil,
6946	6946	.loongarch32,
...	...	@@ -7037,7 +7037,7 @@ pub const CType = enum {
7037	7037	.double => return 4,
7038	7038	.longlong, .ulonglong => return 8,
7039	7039	},
7040		.i386 => switch (target.os.tag) {
	7040	.x86 => switch (target.os.tag) {
7041	7041	.windows, .uefi => switch (self) {
7042	7042	.longdouble => switch (target.abi) {
7043	7043	.gnu, .gnuilp32, .cygnus => return 4,
...	...	@@ -7090,7 +7090,7 @@ pub const CType = enum {
7090	7090	.bpfeb,
7091	7091	.hexagon,
7092	7092	.hsail64,
7093		.i386,
	7093	.x86,
7094	7094	.loongarch64,
7095	7095	.m68k,
7096	7096	.mips,

src/windows_sdk.cpp+5-5

...	...	@@ -21,7 +21,7 @@ struct ZigWindowsSDKPrivate {
21	21
22	22	enum NativeArch {
23	23	NativeArchArm,
24		NativeArchi386,
	24	NativeArchx86,
25	25	NativeArchx86_64,
26	26	NativeArchAarch64,
27	27	};
...	...	@@ -29,7 +29,7 @@ enum NativeArch {
29	29	#if defined(_M_ARM) \|\| defined(__arm_)
30	30	static const NativeArch native_arch = NativeArchArm;
31	31	#elif defined(_M_IX86) \|\| defined(__i386__)
32		static const NativeArch native_arch = NativeArchi386;
	32	static const NativeArch native_arch = NativeArchx86;
33	33	#elif defined(_M_X64) \|\| defined(__x86_64__)
34	34	static const NativeArch native_arch = NativeArchx86_64;
35	35	#elif defined(_M_ARM64) \|\| defined(__aarch64__)
...	...	@@ -110,7 +110,7 @@ static ZigFindWindowsSdkError find_msvc_lib_dir(ZigWindowsSDKPrivate *priv) {
110	110	fclose(tools_file);
111	111	out_append_ptr += sprintf(out_append_ptr, "VC\\Tools\\MSVC\\%s\\lib\\", tmp_path);
112	112	switch (native_arch) {
113		case NativeArchi386:
	113	case NativeArchx86:
114	114	out_append_ptr += sprintf(out_append_ptr, "x86\\");
115	115	break;
116	116	case NativeArchx86_64:
...	...	@@ -158,7 +158,7 @@ com_done:;
158	158	char *tmp_buf_append_ptr = tmp_buf + (cb_data - 1);
159	159	tmp_buf_append_ptr += sprintf(tmp_buf_append_ptr, "VC\\Lib\\");
160	160	switch (native_arch) {
161		case NativeArchi386:
	161	case NativeArchx86:
162	162	//x86 is in the root of the Lib folder
163	163	break;
164	164	case NativeArchx86_64:
...	...	@@ -219,7 +219,7 @@ static ZigFindWindowsSdkError find_10_version(ZigWindowsSDKPrivate *priv) {
219	219	case NativeArchx86_64:
220	220	option_name = "OptionId.DesktopCPPx64";
221	221	break;
222		case NativeArchi386:
	222	case NativeArchx86:
223	223	option_name = "OptionId.DesktopCPPx86";
224	224	break;
225	225	default:

test/behavior/align.zig+1-1

...	...	@@ -107,7 +107,7 @@ test "alignment and size of structs with 128-bit fields" {
107	107	.u129_size = 24,
108	108	},
109	109
110		.i386 => switch (builtin.os.tag) {
	110	.x86 => switch (builtin.os.tag) {
111	111	.windows => .{
112	112	.a_align = 8,
113	113	.a_size = 16,

test/behavior/floatop.zig+1-1

...	...	@@ -5,7 +5,7 @@ const math = std.math;
5	5	const pi = std.math.pi;
6	6	const e = std.math.e;
7	7	const has_f80_rt = switch (builtin.cpu.arch) {
8		.x86_64, .i386 => true,
	8	.x86_64, .x86 => true,
9	9	else => false,
10	10	};
11	11

test/behavior/fn.zig+2-2

...	...	@@ -150,9 +150,9 @@ test "extern struct with stdcallcc fn pointer" {
150	150	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
151	151
152	152	const S = extern struct {
153		ptr: *const fn () callconv(if (builtin.target.cpu.arch == .i386) .Stdcall else .C) i32,
	153	ptr: *const fn () callconv(if (builtin.target.cpu.arch == .x86) .Stdcall else .C) i32,
154	154
155		fn foo() callconv(if (builtin.target.cpu.arch == .i386) .Stdcall else .C) i32 {
	155	fn foo() callconv(if (builtin.target.cpu.arch == .x86) .Stdcall else .C) i32 {
156	156	return 1234;
157	157	}
158	158	};

test/behavior/struct.zig+1-1

...	...	@@ -1109,7 +1109,7 @@ test "packed struct with undefined initializers" {
1109	1109	var p: P = undefined;
1110	1110	p = P{ .a = 2, .b = 4, .c = 6 };
1111	1111	// Make sure the compiler doesn't touch the unprefixed fields.
1112		// Use expect since i386-linux doesn't like expectEqual
	1112	// Use expect since x86-linux doesn't like expectEqual
1113	1113	try expect(p.a == 2);
1114	1114	try expect(p.b == 4);
1115	1115	try expect(p.c == 6);

test/behavior/vector.zig+1-1

...	...	@@ -639,7 +639,7 @@ test "vector shift operators" {
639	639	};
640	640
641	641	switch (builtin.target.cpu.arch) {
642		.i386,
	642	.x86,
643	643	.aarch64,
644	644	.aarch64_be,
645	645	.aarch64_32,

test/c_abi/main.zig+10-10

...	...	@@ -2,7 +2,7 @@ const std = @import("std");
2	2	const builtin = @import("builtin");
3	3	const print = std.debug.print;
4	4	const expect = std.testing.expect;
5		const has_i128 = builtin.cpu.arch != .i386 and !builtin.cpu.arch.isARM() and
	5	const has_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and
6	6	!builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPPC();
7	7
8	8	extern fn run_c_tests() void;
...	...	@@ -153,7 +153,7 @@ export fn zig_bool(x: bool) void {
153	153	// https://github.com/ziglang/zig/issues/8465
154	154	//
155	155	// For now, we have no way of referring to the _Complex C types from Zig,
156		// so our ABI is unavoidably broken on some platforms (such as i386)
	156	// so our ABI is unavoidably broken on some platforms (such as x86)
157	157	const ComplexFloat = extern struct {
158	158	real: f32,
159	159	imag: f32,
...	...	@@ -170,7 +170,7 @@ extern fn c_cmultd_comp(a_r: f64, a_i: f64, b_r: f64, b_i: f64) ComplexDouble;
170	170	extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
171	171	extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
172	172
173		const complex_abi_compatible = builtin.cpu.arch != .i386 and !builtin.cpu.arch.isMIPS() and
	173	const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
174	174	!builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC() and !builtin.cpu.arch.isRISCV();
175	175
176	176	test "C ABI complex float" {
...	...	@@ -323,7 +323,7 @@ extern fn c_med_struct_mixed(MedStructMixed) void;
323	323	extern fn c_ret_med_struct_mixed() MedStructMixed;
324	324
325	325	test "C ABI medium struct of ints and floats" {
326		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	326	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
327	327	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
328	328	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
329	329	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
...	...	@@ -356,7 +356,7 @@ extern fn c_small_struct_ints(SmallStructInts) void;
356	356	extern fn c_ret_small_struct_ints() SmallStructInts;
357	357
358	358	test "C ABI small struct of ints" {
359		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	359	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
360	360	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
361	361	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
362	362	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
...	...	@@ -438,7 +438,7 @@ const SplitStructInt = extern struct {
438	438	extern fn c_split_struct_ints(SplitStructInt) void;
439	439
440	440	test "C ABI split struct of ints" {
441		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	441	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
442	442	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
443	443	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
444	444	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
...	...	@@ -466,7 +466,7 @@ extern fn c_split_struct_mixed(SplitStructMixed) void;
466	466	extern fn c_ret_split_struct_mixed() SplitStructMixed;
467	467
468	468	test "C ABI split struct of ints and floats" {
469		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	469	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
470	470	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
471	471	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
472	472	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
...	...	@@ -729,7 +729,7 @@ extern fn c_struct_with_array(StructWithArray) void;
729	729	extern fn c_ret_struct_with_array() StructWithArray;
730	730
731	731	test "Struct with array as padding." {
732		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	732	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
733	733	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
734	734	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;
735	735	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
...	...	@@ -783,7 +783,7 @@ extern fn c_small_vec(SmallVec) void;
783	783	extern fn c_ret_small_vec() SmallVec;
784	784
785	785	test "small simd vector" {
786		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	786	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
787	787	if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
788	788
789	789	c_small_vec(.{ 1, 2 });
...	...	@@ -820,7 +820,7 @@ extern fn c_ptr_size_float_struct(Vector2) void;
820	820	extern fn c_ret_ptr_size_float_struct() Vector2;
821	821
822	822	test "C ABI pointer sized float struct" {
823		if (builtin.cpu.arch == .i386) return error.SkipZigTest;
	823	if (builtin.cpu.arch == .x86) return error.SkipZigTest;
824	824	if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
825	825	if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
826	826	if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest;

test/cases/compile_errors/callconv_interrupt_on_unsupported_platform.zig+1-1

...	...	@@ -4,4 +4,4 @@ export fn entry() callconv(.Interrupt) void {}
4	4	// backend=stage2
5	5	// target=aarch64-linux-none
6	6	//
7		// :1:29: error: callconv 'Interrupt' is only available on i386, x86_64, AVR, and MSP430, not aarch64
	7	// :1:29: error: callconv 'Interrupt' is only available on x86, x86_64, AVR, and MSP430, not aarch64

test/cases/compile_errors/callconv_stdcall_fastcall_thiscall_on_unsupported_platform.zig+3-3

...	...	@@ -18,6 +18,6 @@ export fn entry3() void {
18	18	// backend=stage2
19	19	// target=x86_64-linux-none
20	20	//
21		// :1:28: error: callconv 'Stdcall' is only available on i386, not x86_64
22		// :2:28: error: callconv 'Fastcall' is only available on i386, not x86_64
23		// :3:28: error: callconv 'Thiscall' is only available on i386, not x86_64
	21	// :1:28: error: callconv 'Stdcall' is only available on x86, not x86_64
	22	// :2:28: error: callconv 'Fastcall' is only available on x86, not x86_64
	23	// :3:28: error: callconv 'Thiscall' is only available on x86, not x86_64

test/cases/compile_errors/callconv_vectorcall_on_unsupported_platform.zig+1-1

...	...	@@ -4,4 +4,4 @@ export fn entry() callconv(.Vectorcall) void {}
4	4	// backend=stage2
5	5	// target=x86_64-linux-none
6	6	//
7		// :1:29: error: callconv 'Vectorcall' is only available on i386 and AArch64, not x86_64
	7	// :1:29: error: callconv 'Vectorcall' is only available on x86 and AArch64, not x86_64

test/tests.zig+6-6

...	...	@@ -163,14 +163,14 @@ const test_targets = blk: {
163	163
164	164	.{
165	165	.target = .{
166		.cpu_arch = .i386,
	166	.cpu_arch = .x86,
167	167	.os_tag = .linux,
168	168	.abi = .none,
169	169	},
170	170	},
171	171	.{
172	172	.target = .{
173		.cpu_arch = .i386,
	173	.cpu_arch = .x86,
174	174	.os_tag = .linux,
175	175	.abi = .musl,
176	176	},
...	...	@@ -178,7 +178,7 @@ const test_targets = blk: {
178	178	},
179	179	.{
180	180	.target = .{
181		.cpu_arch = .i386,
	181	.cpu_arch = .x86,
182	182	.os_tag = .linux,
183	183	.abi = .gnu,
184	184	},
...	...	@@ -387,7 +387,7 @@ const test_targets = blk: {
387	387
388	388	.{
389	389	.target = .{
390		.cpu_arch = .i386,
	390	.cpu_arch = .x86,
391	391	.os_tag = .windows,
392	392	.abi = .msvc,
393	393	},
...	...	@@ -403,7 +403,7 @@ const test_targets = blk: {
403	403
404	404	.{
405	405	.target = .{
406		.cpu_arch = .i386,
	406	.cpu_arch = .x86,
407	407	.os_tag = .windows,
408	408	.abi = .gnu,
409	409	},
...	...	@@ -1279,7 +1279,7 @@ const c_abi_targets = [_]CrossTarget{
1279	1279	.abi = .musl,
1280	1280	},
1281	1281	.{
1282		.cpu_arch = .i386,
	1282	.cpu_arch = .x86,
1283	1283	.os_tag = .linux,
1284	1284	.abi = .musl,
1285	1285	},

test/translate_c.zig+1-1

...	...	@@ -1775,7 +1775,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
1775	1775	}
1776	1776
1777	1777	cases.addWithTarget("Calling convention", .{
1778		.cpu_arch = .i386,
	1778	.cpu_arch = .x86,
1779	1779	.os_tag = .linux,
1780	1780	.abi = .none,
1781	1781	},

tools/gen_stubs.zig+7-7

...	...	@@ -2,7 +2,7 @@
2	2	//! ./gen_stubs /path/to/musl/build-all >libc.S
3	3	//!
4	4	//! The directory 'build-all' is expected to contain these subdirectories:
5		//! arm i386 mips mips64 powerpc powerpc64 riscv64 x86_64
	5	//! arm x86 mips mips64 powerpc powerpc64 riscv64 x86_64
6	6	//!
7	7	//! ...each with 'lib/libc.so' inside of them.
8	8	//!
...	...	@@ -30,7 +30,7 @@ const native_endian = @import("builtin").target.cpu.arch.endian();
30	30
31	31	const arches: [7]std.Target.Cpu.Arch = blk: {
32	32	var result: [7]std.Target.Cpu.Arch = undefined;
33		for (.{ .riscv64, .mips, .i386, .x86_64, .powerpc, .powerpc64, .aarch64 }) \|arch\| {
	33	for (.{ .riscv64, .mips, .x86, .x86_64, .powerpc, .powerpc64, .aarch64 }) \|arch\| {
34	34	result[archIndex(arch)] = arch;
35	35	}
36	36	break :blk result;
...	...	@@ -56,7 +56,7 @@ const MultiSym = struct {
56	56	fn is32Only(ms: MultiSym) bool {
57	57	return ms.present[archIndex(.riscv64)] == false and
58	58	ms.present[archIndex(.mips)] == true and
59		ms.present[archIndex(.i386)] == true and
	59	ms.present[archIndex(.x86)] == true and
60	60	ms.present[archIndex(.x86_64)] == false and
61	61	ms.present[archIndex(.powerpc)] == true and
62	62	ms.present[archIndex(.powerpc64)] == false and
...	...	@@ -97,7 +97,7 @@ const MultiSym = struct {
97	97	const map = .{
98	98	.{ .riscv64, 8 },
99	99	.{ .mips, 4 },
100		.{ .i386, 4 },
	100	.{ .x86, 4 },
101	101	.{ .x86_64, 8 },
102	102	.{ .powerpc, 4 },
103	103	.{ .powerpc64, 8 },
...	...	@@ -118,7 +118,7 @@ const MultiSym = struct {
118	118	const map = .{
119	119	.{ .riscv64, 16 },
120	120	.{ .mips, 8 },
121		.{ .i386, 8 },
	121	.{ .x86, 8 },
122	122	.{ .x86_64, 16 },
123	123	.{ .powerpc, 8 },
124	124	.{ .powerpc64, 16 },
...	...	@@ -139,7 +139,7 @@ const MultiSym = struct {
139	139	const map = .{
140	140	.{ .riscv64, 2 },
141	141	.{ .mips, 1 },
142		.{ .i386, 1 },
	142	.{ .x86, 1 },
143	143	.{ .x86_64, 2 },
144	144	.{ .powerpc, 1 },
145	145	.{ .powerpc64, 2 },
...	...	@@ -555,7 +555,7 @@ fn archIndex(arch: std.Target.Cpu.Arch) u8 {
555	555	// zig fmt: off
556	556	.riscv64 => 0,
557	557	.mips => 1,
558		.i386 => 2,
	558	.x86 => 2,
559	559	.x86_64 => 3,
560	560	.powerpc => 4,
561	561	.powerpc64 => 5,

tools/process_headers.zig+3-3

...	...	@@ -96,7 +96,7 @@ const glibc_targets = [_]LibCTarget{
96	96	},
97	97	LibCTarget{
98	98	.name = "i686-linux-gnu",
99		.arch = MultiArch{ .specific = Arch.i386 },
	99	.arch = MultiArch{ .specific = Arch.x86 },
100	100	.abi = MultiAbi{ .specific = Abi.gnu },
101	101	},
102	102	LibCTarget{
...	...	@@ -208,8 +208,8 @@ const musl_targets = [_]LibCTarget{
208	208	.abi = MultiAbi.musl,
209	209	},
210	210	LibCTarget{
211		.name = "i386",
212		.arch = MultiArch{ .specific = .i386 },
	211	.name = "x86",
	212	.arch = MultiArch{ .specific = .x86 },
213	213	.abi = MultiAbi.musl,
214	214	},
215	215	LibCTarget{

author	Ali Chraghi <alichraghi@proton.me> 2022-10-07 21:24:44+03:30
committer	Ali Chraghi <alichraghi@proton.me> 2022-11-04 00:09:27+03:30
log	f5f1f8c66625237e4eceb3cd40597a687e9a58ac
tree	913632d097ffcdeea739da3a2f9b5b023e0ba81c
parent	678f3f6e65e8808520973912fb6c4d7dbca189fe

all: rename i386 to x86