| ... | @@ -72,9 +72,11 @@ Integer and Float Operations | ... | @@ -72,9 +72,11 @@ Integer and Float Operations |
| 72 | | | | | | | **Integer Comparison** | | 72 | | | | | | | **Integer Comparison** | |
| 73 | | ✓ | __cmpsi2 | i32 | i32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` | | 73 | | ✓ | __cmpsi2 | i32 | i32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` | |
| 74 | | ✓ | __cmpdi2 | i64 | i64 | i32 | .. | | 74 | | ✓ | __cmpdi2 | i64 | i64 | i32 | .. | |
| | 75 | | ✗ | __aeabi_lcmp | i64 | i64 | i32 | .. ARM | |
| 75 | | ✓ | __cmpti2 | i128 | i128 | i32 | .. | | 76 | | ✓ | __cmpti2 | i128 | i128 | i32 | .. | |
| 76 | | ✓ | __ucmpsi2 | u32 | u32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` | | 77 | | ✓ | __ucmpsi2 | u32 | u32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` | |
| 77 | | ✓ | __ucmpdi2 | u64 | u64 | i32 | .. | | 78 | | ✓ | __ucmpdi2 | u64 | u64 | i32 | .. | |
| | 79 | | ✗ | __aeabi_ulcmp | u64 | u64 | i32 | .. ARM | |
| 78 | | ✓ | __ucmpti2 | u128 | u128 | i32 | .. | | 80 | | ✓ | __ucmpti2 | u128 | u128 | i32 | .. | |
| 79 | | | | | | | **Integer Arithmetic** | | 81 | | | | | | | **Integer Arithmetic** | |
| 80 | | ✓ | __ashlsi3 | i32 | i32 | i32 | `a << b` [^unused_rl78] | | 82 | | ✓ | __ashlsi3 | i32 | i32 | i32 | `a << b` [^unused_rl78] | |
| ... | @@ -94,6 +96,7 @@ Integer and Float Operations | ... | @@ -94,6 +96,7 @@ Integer and Float Operations |
| 94 | | ✓ | __negti2 | i128 | i128 | i128 | .. | | 96 | | ✓ | __negti2 | i128 | i128 | i128 | .. | |
| 95 | | ✓ | __mulsi3 | i32 | i32 | i32 | `a * b` | | 97 | | ✓ | __mulsi3 | i32 | i32 | i32 | `a * b` | |
| 96 | | ✓ | __muldi3 | i64 | i64 | i64 | .. | | 98 | | ✓ | __muldi3 | i64 | i64 | i64 | .. | |
| | 99 | | ✓ | __aeabi_lmul | i64 | i64 | i64 | .. ARM | |
| 97 | | ✓ | __multi3 | i128 | i128 | i128 | .. | | 100 | | ✓ | __multi3 | i128 | i128 | i128 | .. | |
| 98 | | ✓ | __divsi3 | i32 | i32 | i32 | `a / b` | | 101 | | ✓ | __divsi3 | i32 | i32 | i32 | `a / b` | |
| 99 | | ✓ | __divdi3 | i64 | i64 | i64 | .. | | 102 | | ✓ | __divdi3 | i64 | i64 | i64 | .. | |
| ... | @@ -110,10 +113,14 @@ Integer and Float Operations | ... | @@ -110,10 +113,14 @@ Integer and Float Operations |
| 110 | | ✓ | __umoddi3 | u64 | u64 | u64 | .. | | 113 | | ✓ | __umoddi3 | u64 | u64 | u64 | .. | |
| 111 | | ✓ | __umodti3 | u128 | u128 | u128 | .. | | 114 | | ✓ | __umodti3 | u128 | u128 | u128 | .. | |
| 112 | | ✓ | __udivmodsi4 | u32 | u32 | u32 | `a / b, rem.* = a % b` | | 115 | | ✓ | __udivmodsi4 | u32 | u32 | u32 | `a / b, rem.* = a % b` | |
| | 116 | | ✓ | __aeabi_uidivmod | u32 | u32 | u32 | .. ARM | |
| 113 | | ✓ | __udivmoddi4 | u64 | u64 | u64 | .. | | 117 | | ✓ | __udivmoddi4 | u64 | u64 | u64 | .. | |
| | 118 | | ✓ | __aeabi_uldivmod | u64 | u64 | u64 | .. ARM | |
| 114 | | ✓ | __udivmodti4 | u128 | u128 | u128 | .. | | 119 | | ✓ | __udivmodti4 | u128 | u128 | u128 | .. | |
| 115 | | ✓ | __divmodsi4 | i32 | i32 | i32 | `a / b, rem.* = a % b` | | 120 | | ✓ | __divmodsi4 | i32 | i32 | i32 | `a / b, rem.* = a % b` | |
| | 121 | | ✓ | __aeabi_idivmod | i32 | i32 | i32 | .. ARM | |
| 116 | | ✓ | __divmoddi4 | i64 | i64 | i64 | .. | | 122 | | ✓ | __divmoddi4 | i64 | i64 | i64 | .. | |
| | 123 | | ✓ | __aeabi_ldivmod | i64 | i64 | i64 | .. ARM | |
| 117 | | ✓ | __divmodti4 | i128 | i128 | i128 | .. [^libgcc_compat] | | 124 | | ✓ | __divmodti4 | i128 | i128 | i128 | .. [^libgcc_compat] | |
| 118 | | | | | | | **Integer Arithmetic with Trapping Overflow**| | 125 | | | | | | | **Integer Arithmetic with Trapping Overflow**| |
| 119 | | ✓ | __absvsi2 | i32 | i32 | i32 | abs(a) | | 126 | | ✓ | __absvsi2 | i32 | i32 | i32 | abs(a) | |
| ... | @@ -142,11 +149,16 @@ Integer and Float Operations | ... | @@ -142,11 +149,16 @@ Integer and Float Operations |
| 142 | | ✓ | __mulodi4 | i64 | i64 | i64 | .. | | 149 | | ✓ | __mulodi4 | i64 | i64 | i64 | .. | |
| 143 | | ✓ | __muloti4 | i128 | i128 | i128 | .. | | 150 | | ✓ | __muloti4 | i128 | i128 | i128 | .. | |
| 144 | | | | | | | **Float Conversion** | | 151 | | | | | | | **Float Conversion** | |
| | 152 | | ✓ | __extendhfdf2 | f16 | ∅ | f32 | .. | |
| 145 | | ✓ | __extendsfdf2 | f32 | ∅ | f64 | .. | | 153 | | ✓ | __extendsfdf2 | f32 | ∅ | f64 | .. | |
| | 154 | | ✓ | __aeabi_f2d | f32 | ∅ | f64 | .. | |
| 146 | | ✓ | __extendsftf2 | f32 | ∅ | f128 | .. | | 155 | | ✓ | __extendsftf2 | f32 | ∅ | f128 | .. | |
| 147 | | ✓ | __extendsfxf2 | f32 | ∅ | f80 | .. | | 156 | | ✓ | __extendsfxf2 | f32 | ∅ | f80 | .. | |
| 148 | | ✓ | __extenddftf2 | f64 | ∅ | f128 | .. | | 157 | | ✓ | __extenddftf2 | f64 | ∅ | f128 | .. | |
| 149 | | ✓ | __extenddfxf2 | f64 | ∅ | f80 | .. | | 158 | | ✓ | __extenddfxf2 | f64 | ∅ | f80 | .. | |
| | 159 | | ✗ | __aeabi_h2f | f16 | ∅ | f32 | .. ARM | |
| | 160 | | ✗ | __aeabi_h2f_alt | f16 | ∅ | f32 | .. ARM alternate [^VFPv3alt] | |
| | 161 | | ✓ | __gnu_h2f_ieee | f16 | ∅ | f32 | .. GNU naming convention | |
| 150 | | ✓ | __truncsfhf2 | f32 | ∅ | f16 | rounding towards zero | | 162 | | ✓ | __truncsfhf2 | f32 | ∅ | f16 | rounding towards zero | |
| 151 | | ✓ | __truncdfhf2 | f64 | ∅ | f16 | .. | | 163 | | ✓ | __truncdfhf2 | f64 | ∅ | f16 | .. | |
| 152 | | ✓ | __truncdfsf2 | f64 | ∅ | f32 | .. | | 164 | | ✓ | __truncdfsf2 | f64 | ∅ | f32 | .. | |
| ... | @@ -157,9 +169,11 @@ Integer and Float Operations | ... | @@ -157,9 +169,11 @@ Integer and Float Operations |
| 157 | | ✓ | __truncxfhf2 | f80 | ∅ | f16 | .. | | 169 | | ✓ | __truncxfhf2 | f80 | ∅ | f16 | .. | |
| 158 | | ✓ | __truncxfsf2 | f80 | ∅ | f32 | .. | | 170 | | ✓ | __truncxfsf2 | f80 | ∅ | f32 | .. | |
| 159 | | ✓ | __truncxfdf2 | f80 | ∅ | f64 | .. | | 171 | | ✓ | __truncxfdf2 | f80 | ∅ | f64 | .. | |
| 160 | | ✓ | __aeabi_f2h | f32 | ∅ | f16 | .. ARM | | 172 | | ✗ | __aeabi_f2h | f32 | ∅ | f16 | .. ARM | |
| 161 | | ✓ | __gnu_f2h_ieee | f32 | ∅ | f16 | ..GNU naming convention | | 173 | | ✗ | __aeabi_f2h_alt | f32 | ∅ | f16 | .. ARM alternate [^VFPv3alt] | |
| | 174 | | ✓ | __gnu_f2h_ieee | f32 | ∅ | f16 | .. GNU naming convention | |
| 162 | | ✓ | __aeabi_d2h | f64 | ∅ | f16 | .. ARM | | 175 | | ✓ | __aeabi_d2h | f64 | ∅ | f16 | .. ARM | |
| | 176 | | ✗ | __aeabi_d2h_alt | f64 | ∅ | f16 | .. ARM alternate [^VFPv3alt] | |
| 163 | | ✓ | __aeabi_d2f | f64 | ∅ | f32 | .. ARM | | 177 | | ✓ | __aeabi_d2f | f64 | ∅ | f32 | .. ARM | |
| 164 | | ✓ | __trunckfsf2 | f128 | ∅ | f32 | .. PPC | | 178 | | ✓ | __trunckfsf2 | f128 | ∅ | f32 | .. PPC | |
| 165 | | ✓ | _Qp_qtos |*f128 | ∅ | f32 | .. SPARC | | 179 | | ✓ | _Qp_qtos |*f128 | ∅ | f32 | .. SPARC | |
| ... | @@ -167,12 +181,16 @@ Integer and Float Operations | ... | @@ -167,12 +181,16 @@ Integer and Float Operations |
| 167 | | ✓ | _Qp_qtod |*f128 | ∅ | f64 | .. SPARC | | 181 | | ✓ | _Qp_qtod |*f128 | ∅ | f64 | .. SPARC | |
| 168 | | ✓ | __fixhfsi | f16 | ∅ | i32 | float to int, rounding towards zero | | 182 | | ✓ | __fixhfsi | f16 | ∅ | i32 | float to int, rounding towards zero | |
| 169 | | ✓ | __fixsfsi | f32 | ∅ | i32 | .. | | 183 | | ✓ | __fixsfsi | f32 | ∅ | i32 | .. | |
| | 184 | | ✓ | __aeabi_f2iz | f32 | ∅ | i32 | .. ARM | |
| 170 | | ✓ | __fixdfsi | f64 | ∅ | i32 | .. | | 185 | | ✓ | __fixdfsi | f64 | ∅ | i32 | .. | |
| | 186 | | ✓ | __aeabi_d2iz | f64 | ∅ | i32 | .. ARM | |
| 171 | | ✓ | __fixtfsi | f128 | ∅ | i32 | .. | | 187 | | ✓ | __fixtfsi | f128 | ∅ | i32 | .. | |
| 172 | | ✓ | __fixxfsi | f80 | ∅ | i32 | .. | | 188 | | ✓ | __fixxfsi | f80 | ∅ | i32 | .. | |
| 173 | | ✓ | __fixhfdi | f16 | ∅ | i64 | .. | | 189 | | ✓ | __fixhfdi | f16 | ∅ | i64 | .. | |
| 174 | | ✓ | __fixsfdi | f32 | ∅ | i64 | .. | | 190 | | ✓ | __fixsfdi | f32 | ∅ | i64 | .. | |
| | 191 | | ✓ | __aeabi_f2lz | f32 | ∅ | i64 | .. ARM | |
| 175 | | ✓ | __fixdfdi | f64 | ∅ | i64 | .. | | 192 | | ✓ | __fixdfdi | f64 | ∅ | i64 | .. | |
| | 193 | | ✓ | __aeabi_d2lz | f64 | ∅ | i64 | .. ARM | |
| 176 | | ✓ | __fixtfdi | f128 | ∅ | i64 | .. | | 194 | | ✓ | __fixtfdi | f128 | ∅ | i64 | .. | |
| 177 | | ✓ | __fixxfdi | f80 | ∅ | i64 | .. | | 195 | | ✓ | __fixxfdi | f80 | ∅ | i64 | .. | |
| 178 | | ✓ | __fixhfti | f16 | ∅ | i128 | .. | | 196 | | ✓ | __fixhfti | f16 | ∅ | i128 | .. | |
| ... | @@ -182,12 +200,16 @@ Integer and Float Operations | ... | @@ -182,12 +200,16 @@ Integer and Float Operations |
| 182 | | ✓ | __fixxfti | f80 | ∅ | i128 | .. | | 200 | | ✓ | __fixxfti | f80 | ∅ | i128 | .. | |
| 183 | | ✓ | __fixunshfsi | f16 | ∅ | u32 | float to uint, rounding towards zero. negative values become 0. | | 201 | | ✓ | __fixunshfsi | f16 | ∅ | u32 | float to uint, rounding towards zero. negative values become 0. | |
| 184 | | ✓ | __fixunssfsi | f32 | ∅ | u32 | .. | | 202 | | ✓ | __fixunssfsi | f32 | ∅ | u32 | .. | |
| | 203 | | ✓ | __aeabi_f2uiz | f32 | ∅ | u32 | .. ARM | |
| 185 | | ✓ | __fixunsdfsi | f64 | ∅ | u32 | .. | | 204 | | ✓ | __fixunsdfsi | f64 | ∅ | u32 | .. | |
| | 205 | | ✓ | __aeabi_d2uiz | f64 | ∅ | u32 | .. ARM | |
| 186 | | ✓ | __fixunstfsi | f128 | ∅ | u32 | .. | | 206 | | ✓ | __fixunstfsi | f128 | ∅ | u32 | .. | |
| 187 | | ✓ | __fixunsxfsi | f80 | ∅ | u32 | .. | | 207 | | ✓ | __fixunsxfsi | f80 | ∅ | u32 | .. | |
| 188 | | ✓ | __fixunshfdi | f16 | ∅ | u64 | .. | | 208 | | ✓ | __fixunshfdi | f16 | ∅ | u64 | .. | |
| 189 | | ✓ | __fixunssfdi | f32 | ∅ | u64 | .. | | 209 | | ✓ | __fixunssfdi | f32 | ∅ | u64 | .. | |
| | 210 | | ✓ | __aeabi_f2ulz | f32 | ∅ | u64 | .. ARM | |
| 190 | | ✓ | __fixunsdfdi | f64 | ∅ | u64 | .. | | 211 | | ✓ | __fixunsdfdi | f64 | ∅ | u64 | .. | |
| | 212 | | ✓ | __aeabi_d2ulz | f64 | ∅ | u64 | .. ARM | |
| 191 | | ✓ | __fixunstfdi | f128 | ∅ | u64 | .. | | 213 | | ✓ | __fixunstfdi | f128 | ∅ | u64 | .. | |
| 192 | | ✓ | __fixunsxfdi | f80 | ∅ | u64 | .. | | 214 | | ✓ | __fixunsxfdi | f80 | ∅ | u64 | .. | |
| 193 | | ✓ | __fixunshfti | f16 | ∅ | u128 | .. | | 215 | | ✓ | __fixunshfti | f16 | ∅ | u128 | .. | |
| ... | @@ -197,11 +219,15 @@ Integer and Float Operations | ... | @@ -197,11 +219,15 @@ Integer and Float Operations |
| 197 | | ✓ | __fixunsxfti | f80 | ∅ | u128 | .. | | 219 | | ✓ | __fixunsxfti | f80 | ∅ | u128 | .. | |
| 198 | | ✓ | __floatsihf | i32 | ∅ | f16 | int to float | | 220 | | ✓ | __floatsihf | i32 | ∅ | f16 | int to float | |
| 199 | | ✓ | __floatsisf | i32 | ∅ | f32 | .. | | 221 | | ✓ | __floatsisf | i32 | ∅ | f32 | .. | |
| | 222 | | ✓ | __aeabi_i2f | i32 | ∅ | f32 | .. ARM | |
| 200 | | ✓ | __floatsidf | i32 | ∅ | f64 | .. | | 223 | | ✓ | __floatsidf | i32 | ∅ | f64 | .. | |
| | 224 | | ✓ | __aeabi_i2d | i32 | ∅ | f64 | .. ARM | |
| 201 | | ✓ | __floatsitf | i32 | ∅ | f128 | .. | | 225 | | ✓ | __floatsitf | i32 | ∅ | f128 | .. | |
| 202 | | ✓ | __floatsixf | i32 | ∅ | f80 | .. | | 226 | | ✓ | __floatsixf | i32 | ∅ | f80 | .. | |
| 203 | | ✓ | __floatdisf | i64 | ∅ | f32 | .. | | 227 | | ✓ | __floatdisf | i64 | ∅ | f32 | .. | |
| | 228 | | ✓ | __aeabi_l2f | i64 | ∅ | f32 | .. ARM | |
| 204 | | ✓ | __floatdidf | i64 | ∅ | f64 | .. | | 229 | | ✓ | __floatdidf | i64 | ∅ | f64 | .. | |
| | 230 | | ✓ | __aeabi_l2d | i64 | ∅ | f64 | .. ARM | |
| 205 | | ✓ | __floatditf | i64 | ∅ | f128 | .. | | 231 | | ✓ | __floatditf | i64 | ∅ | f128 | .. | |
| 206 | | ✓ | __floatdixf | i64 | ∅ | f80 | .. | | 232 | | ✓ | __floatdixf | i64 | ∅ | f80 | .. | |
| 207 | | ✓ | __floattihf | i128 | ∅ | f16 | .. | | 233 | | ✓ | __floattihf | i128 | ∅ | f16 | .. | |
| ... | @@ -211,12 +237,16 @@ Integer and Float Operations | ... | @@ -211,12 +237,16 @@ Integer and Float Operations |
| 211 | | ✓ | __floattixf | i128 | ∅ | f80 | .. | | 237 | | ✓ | __floattixf | i128 | ∅ | f80 | .. | |
| 212 | | ✓ | __floatunsihf | u32 | ∅ | f16 | uint to float | | 238 | | ✓ | __floatunsihf | u32 | ∅ | f16 | uint to float | |
| 213 | | ✓ | __floatunsisf | u32 | ∅ | f32 | .. | | 239 | | ✓ | __floatunsisf | u32 | ∅ | f32 | .. | |
| | 240 | | ✓ | __aeabi_ui2f | u32 | ∅ | f32 | .. ARM | |
| 214 | | ✓ | __floatunsidf | u32 | ∅ | f64 | .. | | 241 | | ✓ | __floatunsidf | u32 | ∅ | f64 | .. | |
| | 242 | | ✓ | __aeabi_ui2d | u32 | ∅ | f64 | .. ARM | |
| 215 | | ✓ | __floatunsitf | u32 | ∅ | f128 | .. | | 243 | | ✓ | __floatunsitf | u32 | ∅ | f128 | .. | |
| 216 | | ✓ | __floatunsixf | u32 | ∅ | f80 | .. | | 244 | | ✓ | __floatunsixf | u32 | ∅ | f80 | .. | |
| 217 | | ✓ | __floatundihf | u64 | ∅ | f16 | .. | | 245 | | ✓ | __floatundihf | u64 | ∅ | f16 | .. | |
| 218 | | ✓ | __floatundisf | u64 | ∅ | f32 | .. | | 246 | | ✓ | __floatundisf | u64 | ∅ | f32 | .. | |
| | 247 | | ✓ | __aeabi_ul2f | u64 | ∅ | f32 | .. ARM | |
| 219 | | ✓ | __floatundidf | u64 | ∅ | f64 | .. | | 248 | | ✓ | __floatundidf | u64 | ∅ | f64 | .. | |
| | 249 | | ✓ | __aeabi_ul2d | u64 | ∅ | f64 | .. ARM | |
| 220 | | ✓ | __floatunditf | u64 | ∅ | f128 | .. | | 250 | | ✓ | __floatunditf | u64 | ∅ | f128 | .. | |
| 221 | | ✓ | __floatundixf | u64 | ∅ | f80 | .. | | 251 | | ✓ | __floatundixf | u64 | ∅ | f80 | .. | |
| 222 | | ✓ | __floatuntihf | u128 | ∅ | f16 | .. | | 252 | | ✓ | __floatuntihf | u128 | ∅ | f16 | .. | |
| ... | @@ -353,6 +383,7 @@ Integer and Float Operations | ... | @@ -353,6 +383,7 @@ Integer and Float Operations |
| 353 | [^noptr_faster]: Operations without pointer and without C struct semantics lead to better optimizations. | 383 | [^noptr_faster]: Operations without pointer and without C struct semantics lead to better optimizations. |
| 354 | [^perf_addition]: Has better performance than standard method due to 2s complement semantics. | 384 | [^perf_addition]: Has better performance than standard method due to 2s complement semantics. |
| 355 | Not provided by LLVM and libgcc. | 385 | Not provided by LLVM and libgcc. |
| | 386 | [^VFPv3alt]: Converts IEEE-format to VFPv3 alternative-format. |
| 356 | | 387 | |
| 357 | Decimal float library routines | 388 | Decimal float library routines |
| 358 | | 389 | |
| ... | @@ -712,8 +743,57 @@ TODO brief description | ... | @@ -712,8 +743,57 @@ TODO brief description |
| 712 | | | | | | | | |**BigInt Arithmetic which Return on Overflow**[^noptr_faster]| | 743 | | | | | | | | |**BigInt Arithmetic which Return on Overflow**[^noptr_faster]| |
| 713 | | 744 | |
| 714 | Further content (conditionally) exported with C abi: | 745 | Further content (conditionally) exported with C abi: |
| | 746 | |
| | 747 | ARM-only routines |
| | 748 | |
| | 749 | | Done | Name | a | b | Out | Comment | |
| | 750 | | ---- | -------- | --- | --- | -----| ----------------------| |
| | 751 | | | | | | | **Float Comparison** | |
| | 752 | |✗|__aeabi_cfcmpeq | f32 | f32 | void | `a == b` result in PSR ZC flags[^PSRZC] | |
| | 753 | |✗|__aeabi_cfcmple | f32 | f32 | void | `a <= b` result .. | |
| | 754 | |✗|__aeabi_cfrcmple| f32 | f32 | void | `b <= a` .. | |
| | 755 | |✗|__aeabi_cdcmpeq | f64 | f64 | void | `a == b` .. | |
| | 756 | |✗|__aeabi_cdcmple | f64 | f64 | void | `a <= b` .. | |
| | 757 | |✗|__aeabi_cdrcmple| f64 | f64 | void | `b <= a` .. | |
| | 758 | | | | | | | **Float Arithmetic** | |
| | 759 | |✗|__aeabi_frsub | f64 | f64 | f64 | `b - a` | |
| | 760 | |✗|__aeabi_drsub | f64 | f64 | f64 | .. | |
| | 761 | | | | | | | **Special** | |
| | 762 | |✓|__aeabi_read_tp | ∅ | ∅ | *u8 | ret tls pointer | |
| | 763 | |✗|__aeabi_idiv0 | i32 | ∅ | i32 | div by 0 modifier | |
| | 764 | |✗|__aeabi_ldiv0 | i64 | ∅ | i64 | div by 0 modifier | |
| | 765 | | | | | | | **Unaligned memory access** | |
| | 766 | |✗|__aeabi_uread4 |[*]u8| ∅ | i32 | ret value read | |
| | 767 | |✗|__aeabi_uwrite4 | i32 |[*]u8| i32 | ret value written | |
| | 768 | |✗|__aeabi_uread8 |[*]u8| ∅ | i64 | .. | |
| | 769 | |✗|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. | |
| | 770 | |
| | 771 | |
| | 772 | | Done | Name | a | b | c | Comment | |
| | 773 | | ---- | -------- | --- | --- | -----| ----------------------| |
| | 774 | | | | | | | **Memory copy, move and set** | |
| | 775 | |✓|__aeabi_memcpy8 |[*]u8|[*]u8| usize| *dest, *src, size | |
| | 776 | |✓|__aeabi_memcpy4 |[*]u8|[*]u8| usize| .. | |
| | 777 | |✓|__aeabi_memcpy |[*]u8|[*]u8| usize| .. | |
| | 778 | |✓|__aeabi_memmove8|[*]u8|[*]u8| usize| *dest, *src, size | |
| | 779 | |✓|__aeabi_memmove4|[*]u8|[*]u8| usize| .. | |
| | 780 | |✓|__aeabi_memmove |[*]u8|[*]u8| usize| .. | |
| | 781 | |✓|__aeabi_memset8 |[*]u8|usize| i32 | *dest, size, char | |
| | 782 | |✓|__aeabi_memset4 |[*]u8|usize| i32 | .. | |
| | 783 | |✓|__aeabi_memset |[*]u8|usize| i32 | .. | |
| | 784 | |✓|__aeabi_memclr8 |[*]u8| u32 | usize| *dest, size | |
| | 785 | |✓|__aeabi_memclr4 |[*]u8| u32 | usize| .. | |
| | 786 | |✓|__aeabi_memclr |[*]u8| u32 | usize| .. | |
| | 787 | |✓|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. | |
| | 788 | |
| | 789 | - __aeabi_read_tp |
| | 790 | |
| | 791 | [^PSRZC]: return result in the CPSR Z and C flag. C is clear only if the |
| | 792 | operands are ordered and the first operand is less than the second. |
| | 793 | Z is set only when the operands are ordered and equal. |
| | 794 | Preserves all core registers except ip, lr, and the CPSR. |
| | 795 | |
| 715 | - aarch64 outline atomics | 796 | - aarch64 outline atomics |
| 716 | - arm routines (memory routines + memclr [setting to 0], divmod routines and stubs for unwind_cpp) | | |
| 717 | - atomics | 797 | - atomics |
| 718 | - bcmp | 798 | - bcmp |
| 719 | - clear cache | 799 | - clear cache |