authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-09-07 13:17:25-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-09-07 13:17:25-07:00
logfb81522e0ba97294a475df040ccfea493342498d
tree68f5747a3f167e9a3f5718fede50fa272ea251a1
parentaf04404b49d78f2ba7c3b6ba8c082b4fbeec7859
parentccf852c31e04e17cfe3b5c017e37479de3439c19
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #21327 from alexrp/reenable-tests

`test`: Re-enable `vector shift operators` and `vector reduce operation`

1 files changed, 10 insertions(+), 43 deletions(-)

test/behavior/vector.zig+10-43
...@@ -743,23 +743,6 @@ test "vector shift operators" {...@@ -743,23 +743,6 @@ test "vector shift operators" {
743 }743 }
744 };744 };
745745
746 switch (builtin.target.cpu.arch) {
747 .aarch64_be,
748 .armeb,
749 .thumb,
750 .thumbeb,
751 .mips,
752 .mips64,
753 .mips64el,
754 .sparc64,
755 => {
756 // LLVM miscompiles on this architecture
757 // https://github.com/ziglang/zig/issues/4951
758 return error.SkipZigTest;
759 },
760 else => {},
761 }
762
763 try S.doTheTest();746 try S.doTheTest();
764 try comptime S.doTheTest();747 try comptime S.doTheTest();
765}748}
...@@ -822,14 +805,8 @@ test "vector reduce operation" {...@@ -822,14 +805,8 @@ test "vector reduce operation" {
822 try testReduce(.Min, [4]u16{ 1, 2, 3, 4 }, @as(u16, 1));805 try testReduce(.Min, [4]u16{ 1, 2, 3, 4 }, @as(u16, 1));
823 try testReduce(.Min, [4]i32{ 1234567, -386, 0, 3 }, @as(i32, -386));806 try testReduce(.Min, [4]i32{ 1234567, -386, 0, 3 }, @as(i32, -386));
824 try testReduce(.Min, [4]u32{ 99, 9999, 9, 99999 }, @as(u32, 9));807 try testReduce(.Min, [4]u32{ 99, 9999, 9, 99999 }, @as(u32, 9));
825808 try testReduce(.Min, [4]i64{ 1234567, -386, 0, 3 }, @as(i64, -386));
826 // LLVM 11 ERROR: Cannot select type809 try testReduce(.Min, [4]u64{ 99, 9999, 9, 99999 }, @as(u64, 9));
827 // https://github.com/ziglang/zig/issues/7138
828 if (builtin.zig_backend != .stage2_llvm or builtin.target.cpu.arch != .aarch64) {
829 try testReduce(.Min, [4]i64{ 1234567, -386, 0, 3 }, @as(i64, -386));
830 try testReduce(.Min, [4]u64{ 99, 9999, 9, 99999 }, @as(u64, 9));
831 }
832
833 try testReduce(.Min, [4]i128{ 1234567, -386, 0, 3 }, @as(i128, -386));810 try testReduce(.Min, [4]i128{ 1234567, -386, 0, 3 }, @as(i128, -386));
834 try testReduce(.Min, [4]u128{ 99, 9999, 9, 99999 }, @as(u128, 9));811 try testReduce(.Min, [4]u128{ 99, 9999, 9, 99999 }, @as(u128, 9));
835 try testReduce(.Min, [4]f16{ -10.3, 10.0e9, 13.0, -100.0 }, @as(f16, -100.0));812 try testReduce(.Min, [4]f16{ -10.3, 10.0e9, 13.0, -100.0 }, @as(f16, -100.0));
...@@ -840,14 +817,8 @@ test "vector reduce operation" {...@@ -840,14 +817,8 @@ test "vector reduce operation" {
840 try testReduce(.Max, [4]u16{ 1, 2, 3, 4 }, @as(u16, 4));817 try testReduce(.Max, [4]u16{ 1, 2, 3, 4 }, @as(u16, 4));
841 try testReduce(.Max, [4]i32{ 1234567, -386, 0, 3 }, @as(i32, 1234567));818 try testReduce(.Max, [4]i32{ 1234567, -386, 0, 3 }, @as(i32, 1234567));
842 try testReduce(.Max, [4]u32{ 99, 9999, 9, 99999 }, @as(u32, 99999));819 try testReduce(.Max, [4]u32{ 99, 9999, 9, 99999 }, @as(u32, 99999));
843820 try testReduce(.Max, [4]i64{ 1234567, -386, 0, 3 }, @as(i64, 1234567));
844 // LLVM 11 ERROR: Cannot select type821 try testReduce(.Max, [4]u64{ 99, 9999, 9, 99999 }, @as(u64, 99999));
845 // https://github.com/ziglang/zig/issues/7138
846 if (builtin.zig_backend != .stage2_llvm or builtin.target.cpu.arch != .aarch64) {
847 try testReduce(.Max, [4]i64{ 1234567, -386, 0, 3 }, @as(i64, 1234567));
848 try testReduce(.Max, [4]u64{ 99, 9999, 9, 99999 }, @as(u64, 99999));
849 }
850
851 try testReduce(.Max, [4]i128{ 1234567, -386, 0, 3 }, @as(i128, 1234567));822 try testReduce(.Max, [4]i128{ 1234567, -386, 0, 3 }, @as(i128, 1234567));
852 try testReduce(.Max, [4]u128{ 99, 9999, 9, 99999 }, @as(u128, 99999));823 try testReduce(.Max, [4]u128{ 99, 9999, 9, 99999 }, @as(u128, 99999));
853 try testReduce(.Max, [4]f16{ -10.3, 10.0e9, 13.0, -100.0 }, @as(f16, 10.0e9));824 try testReduce(.Max, [4]f16{ -10.3, 10.0e9, 13.0, -100.0 }, @as(f16, 10.0e9));
...@@ -889,17 +860,13 @@ test "vector reduce operation" {...@@ -889,17 +860,13 @@ test "vector reduce operation" {
889 try testReduce(.Add, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, f32_nan);860 try testReduce(.Add, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, f32_nan);
890 try testReduce(.Add, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, f64_nan);861 try testReduce(.Add, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, f64_nan);
891862
892 // LLVM 11 ERROR: Cannot select type863 try testReduce(.Min, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, @as(f16, -1.9));
893 // https://github.com/ziglang/zig/issues/7138864 try testReduce(.Min, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, @as(f32, -1.9));
894 if (builtin.zig_backend != .stage2_llvm) {865 try testReduce(.Min, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, @as(f64, -1.9));
895 try testReduce(.Min, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, @as(f16, -1.9));
896 try testReduce(.Min, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, @as(f32, -1.9));
897 try testReduce(.Min, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, @as(f64, -1.9));
898866
899 try testReduce(.Max, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, @as(f16, 100.0));867 try testReduce(.Max, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, @as(f16, 100.0));
900 try testReduce(.Max, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, @as(f32, 100.0));868 try testReduce(.Max, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, @as(f32, 100.0));
901 try testReduce(.Max, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, @as(f64, 100.0));869 try testReduce(.Max, [4]f64{ -1.9, 5.1, f64_nan, 100.0 }, @as(f64, 100.0));
902 }
903870
904 try testReduce(.Mul, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, f16_nan);871 try testReduce(.Mul, [4]f16{ -1.9, 5.1, f16_nan, 100.0 }, f16_nan);
905 try testReduce(.Mul, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, f32_nan);872 try testReduce(.Mul, [4]f32{ -1.9, 5.1, f32_nan, 100.0 }, f32_nan);