authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-02 02:34:10+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-02 10:25:40+01:00
logfccf15fc9f77001c513946cd1f37e8f6a57188e1
tree8036188dfb3166fd0c5bf33ec7f6097334d0b8ad
parentab89af3d397291f0126ad17d3787a51284457884

std.Target: Remove armv7k/armv7s.

Like d1d95294fd657f771657ea671a6984b860347fb0, this is more Apple nonsense where they abused the arch component of the triple to encode what's really an ABI. Handling this correctly in Zig's target triple model would take quite a bit of work. Fortunately, the last Armv7-based Apple Watch was released in 2017 and these targets are now considered legacy. By the time Zig hits 1.0, they will be a distant memory. So just remove them.

3 files changed, 2 insertions(+), 21 deletions(-)

lib/std/Target/arm.zig-16
......@@ -158,10 +158,8 @@ pub const Feature = enum {
158158 v6t2,
159159 v7a,
160160 v7em,
161 v7k,
162161 v7m,
163162 v7r,
164 v7s,
165163 v7ve,
166164 v8_1a,
167165 v8_1m_main,
......@@ -1177,13 +1175,6 @@ pub const all_features = blk: {
11771175 .thumb_mode,
11781176 }),
11791177 };
1180 result[@intFromEnum(Feature.v7k)] = .{
1181 .llvm_name = "armv7k",
1182 .description = "ARMv7a architecture",
1183 .dependencies = featureSet(&[_]Feature{
1184 .v7a,
1185 }),
1186 };
11871178 result[@intFromEnum(Feature.v7m)] = .{
11881179 .llvm_name = "armv7-m",
11891180 .description = "ARMv7m architecture",
......@@ -1208,13 +1199,6 @@ pub const all_features = blk: {
12081199 .rclass,
12091200 }),
12101201 };
1211 result[@intFromEnum(Feature.v7s)] = .{
1212 .llvm_name = "armv7s",
1213 .description = "ARMv7a architecture",
1214 .dependencies = featureSet(&[_]Feature{
1215 .v7a,
1216 }),
1217 };
12181202 result[@intFromEnum(Feature.v7ve)] = .{
12191203 .llvm_name = "armv7ve",
12201204 .description = "ARMv7ve architecture",
src/codegen/llvm.zig-3
......@@ -118,9 +118,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
118118 .{ .v6kz, "v6kz" },
119119 .{ .v6m, "v6m" },
120120 .{ .v6t2, "v6t2" },
121 // v7k and v7s imply v7a so they have to be tested first.
122 .{ .v7k, "v7k" },
123 .{ .v7s, "v7s" },
124121 .{ .v7a, "v7a" },
125122 .{ .v7em, "v7em" },
126123 .{ .v7m, "v7m" },
tools/update_cpu_features.zig+2-2
......@@ -699,11 +699,11 @@ const llvm_targets = [_]LlvmTarget{
699699 },
700700 .{
701701 .llvm_name = "armv7k",
702 .zig_name = "v7k",
702 .omit = true,
703703 },
704704 .{
705705 .llvm_name = "armv7s",
706 .zig_name = "v7s",
706 .omit = true,
707707 },
708708 .{
709709 .llvm_name = "armv7ve",