From fd0baa9834293be085fd15929437f83986fb2243 Mon Sep 17 00:00:00 2001
From: "Quinn X. J." <orichalcumcosmonaut@protonmail.com>
Date: Mon, 11 Aug 2025 23:47:23 +1000
Subject: [PATCH] Add __gnu_thumb1_case_{sqi,uqi,shi,uhi,si} to compiler_rt

Fixes ziglang/zig#24558
---
 lib/compiler_rt/arm.zig | 83 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/lib/compiler_rt/arm.zig b/lib/compiler_rt/arm.zig
index d3a9e4f69695026fd6435d0f4b21ee8e7d1f5455..e9edc8f7180ea5e29507be486ff2fdceb7ca26f7 100644
--- a/lib/compiler_rt/arm.zig
+++ b/lib/compiler_rt/arm.zig
@@ -45,6 +45,12 @@ comptime {
                 symbol(&__aeabi_read_tp, "__aeabi_read_tp");
             }
 
+            symbol(&__gnu_thumb1_case_sqi, "__gnu_thumb1_case_sqi");
+            symbol(&__gnu_thumb1_case_uqi, "__gnu_thumb1_case_uqi");
+            symbol(&__gnu_thumb1_case_shi, "__gnu_thumb1_case_shi");
+            symbol(&__gnu_thumb1_case_uhi, "__gnu_thumb1_case_uhi");
+            symbol(&__gnu_thumb1_case_si, "__gnu_thumb1_case_si");
+
             // floating-point helper functions (single+double-precision reverse subtraction, y – x), see subdf3.zig
             symbol(&__aeabi_frsub, "__aeabi_frsub");
             symbol(&__aeabi_drsub, "__aeabi_drsub");
@@ -205,6 +211,83 @@ pub fn __aeabi_ldivmod() callconv(.naked) void {
     unreachable;
 }
 
+// GCC Thumb1 compressed switch tables: <https://gcc.gnu.org/legacy-ml/gcc-patches/2009-06/msg01698.html>
+
+pub fn __gnu_thumb1_case_sqi() callconv(.naked) noreturn {
+    asm volatile (
+        \\ push {r1}
+        \\ mov r1, lr
+        \\ lsrs r1, r1, #1
+        \\ lsls r1, r1, #1
+        \\ ldrsb r1, [r1, r0]
+        \\ lsls r1, r1, #1
+        \\ add lr, lr, r1
+        \\ pop {r1}
+        \\ bx lr
+    );
+}
+
+pub fn __gnu_thumb1_case_uqi() callconv(.naked) noreturn {
+    asm volatile (
+        \\ push {r1}
+        \\ mov r1, lr
+        \\ lsrs r1, r1, #1
+        \\ lsls r1, r1, #1
+        \\ ldrb r1, [r1, r0]
+        \\ lsls r1, r1, #1
+        \\ add lr, lr, r1
+        \\ pop {r1}
+        \\ bx lr
+    );
+}
+
+pub fn __gnu_thumb1_case_shi() callconv(.naked) noreturn {
+    asm volatile (
+        \\ push {r0, r1}
+        \\ mov r1, lr
+        \\ lsrs r1, r1, #1
+        \\ lsls r0, r0, #1
+        \\ lsls r1, r1, #1
+        \\ ldrsh r1, [r1, r0]
+        \\ lsls r1, r1, #1
+        \\ add lr, lr, r1
+        \\ pop {r0, r1}
+        \\ bx lr
+    );
+}
+
+pub fn __gnu_thumb1_case_uhi() callconv(.naked) noreturn {
+    asm volatile (
+        \\ push {r0, r1}
+        \\ mov r1, lr
+        \\ lsrs r1, r1, #1
+        \\ lsls r0, r0, #1
+        \\ lsls r1, r1, #1
+        \\ ldrh r1, [r1, r0]
+        \\ lsls r1, r1, #1
+        \\ add lr, lr, r1
+        \\ pop {r0, r1}
+        \\ bx lr
+    );
+}
+
+pub fn __gnu_thumb1_case_si() callconv(.naked) noreturn {
+    asm volatile (
+        \\ push {r0, r1}
+        \\ mov r1, lr
+        \\ adds r1, r1, #2
+        \\ lsrs r1, r1, #2
+        \\ lsls r0, r0, #2
+        \\ lsls r1, r1, #2
+        \\ ldr r0, [r1, r0]
+        \\ adds r0, r0, r1
+        \\ adds r0, r0, #1
+        \\ mov lr, r0
+        \\ pop {r0, r1}
+        \\ bx lr
+    );
+}
+
 // Float Arithmetic
 
 fn __aeabi_frsub(a: f32, b: f32) callconv(.{ .arm_aapcs = .{} }) f32 {
-- 
2.54.0