| ... | @@ -1,5 +1,6 @@ | ... | @@ -1,5 +1,6 @@ |
| 1 | const std = @import("std"); | 1 | const std = @import("std"); |
| 2 | const DW = std.dwarf; | 2 | const DW = std.dwarf; |
| | 3 | const assert = std.debug.assert; |
| 3 | const testing = std.testing; | 4 | const testing = std.testing; |
| 4 | | 5 | |
| 5 | /// General purpose registers in the SPARCv9 instruction set | 6 | /// General purpose registers in the SPARCv9 instruction set |
| ... | @@ -448,4 +449,15 @@ pub const Instruction = union(enum) { | ... | @@ -448,4 +449,15 @@ pub const Instruction = union(enum) { |
| 448 | pub fn toU32(self: Instruction) u32 { | 449 | pub fn toU32(self: Instruction) u32 { |
| 449 | return @bitCast(u32, self); | 450 | return @bitCast(u32, self); |
| 450 | } | 451 | } |
| | 452 | |
| | 453 | fn format1(disp: i32) Instruction { |
| | 454 | // In SPARC, branch target needs to be aligned to 4 bytes. |
| | 455 | assert(disp % 4 == 0); |
| | 456 | |
| | 457 | // Discard the last two bits since those are implicitly zero. |
| | 458 | const udisp = @truncate(u30, @bitCast(u32, disp) >> 2); |
| | 459 | return Instruction{ .format_1 = .{ |
| | 460 | .disp30 = udisp, |
| | 461 | } }; |
| | 462 | } |
| 451 | }; | 463 | }; |