authorgravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-03-13 19:26:10-07:00
committergravatar for david@vortan.devDavid Rubin <david@vortan.dev> 2024-05-11 02:17:11-07:00
log060c475fcd358eb9d05d14ec9f1bb7bfc47e4423
treec203f555ba0eba4d7edffd3a9ce6cc121fc900df
parent5e770407cf50ae8cd103644c8ca297da52adb5b8

riscv: update `start.zig` and restore ra from the proper stack offset

2 files changed, 2 insertions(+), 2 deletions(-)

lib/std/start.zig+1-1
......@@ -155,7 +155,7 @@ fn exit2(code: usize) noreturn {
155155 asm volatile ("ecall"
156156 :
157157 : [number] "{a7}" (94),
158 [arg1] "{a0}" (0),
158 [arg1] "{a0}" (code),
159159 : "rcx", "r11", "memory"
160160 );
161161 },
src/arch/riscv64/Emit.zig+1-1
......@@ -287,7 +287,7 @@ fn mirPsuedo(emit: *Emit, inst: Mir.Inst.Index) !void {
287287 };
288288
289289 // Restore ra
290 try emit.writeInstruction(Instruction.ld(.ra, stack_size - 16, .sp));
290 try emit.writeInstruction(Instruction.ld(.ra, stack_size - 8, .sp));
291291
292292 // Restore s0
293293 try emit.writeInstruction(Instruction.ld(.s0, stack_size - 16, .sp));