Commit 085d049a088af20c1eeeab2b8ebeb7dc6af7b07d | zig

author	Andrew Kelley <andrew@ziglang.org> 2018-11-17 11:19:46-05:00
committer	Andrew Kelley <andrew@ziglang.org> 2018-11-17 11:21:00-05:00
log	085d049a088af20c1eeeab2b8ebeb7dc6af7b07d
tree	9b3b796804f18f49be4783fb036e452d54bfd293
parent	2a580278c4db3a60766bb904f42486f0f1872c72
signature	Commit is signed but in an unrecognized format.

aarch64 improvements

 * support C ABI for all return types
 * don't include __aeabi_uldivmod & co on aarch64 since
   it's 64 bit

4 files changed, 144 insertions(+), 64 deletions(-)

src
std
- special
  - compiler_rt
    index.zig

src/analyze.cpp+1-1

...	@@ -1059,7 +1059,7 @@ bool want_first_arg_sret(CodeGen g, FnTypeId fn_type_id) {	...	@@ -1059,7 +1059,7 @@ bool want_first_arg_sret(CodeGen g, FnTypeId fn_type_id) {
1059	}	1059	}
1060	zig_panic("TODO implement C ABI for x86_64 return types. type '%s'\nSee https://github.com/ziglang/zig/issues/1481",	1060	zig_panic("TODO implement C ABI for x86_64 return types. type '%s'\nSee https://github.com/ziglang/zig/issues/1481",
1061	buf_ptr(&fn_type_id->return_type->name));	1061	buf_ptr(&fn_type_id->return_type->name));
1062	} else if (g->zig_target.arch.arch == ZigLLVM_arm \|\| g->zig_target.arch.arch == ZigLLVM_armeb) {	1062	} else if (target_is_arm(&g->zig_target)) {
1063	return type_size(g, fn_type_id->return_type) > 16;	1063	return type_size(g, fn_type_id->return_type) > 16;
1064	}	1064	}
1065	zig_panic("TODO implement C ABI for this architecture. See https://github.com/ziglang/zig/issues/1481");	1065	zig_panic("TODO implement C ABI for this architecture. See https://github.com/ziglang/zig/issues/1481");

src/target.cpp+61

...	@@ -1011,3 +1011,64 @@ const char arch_stack_pointer_register_name(const ArchType arch) {	...	@@ -1011,3 +1011,64 @@ const char arch_stack_pointer_register_name(const ArchType arch) {
1011	}	1011	}
1012	zig_unreachable();	1012	zig_unreachable();
1013	}	1013	}
		1014
		1015	bool target_is_arm(const ZigTarget *target) {
		1016	switch (target->arch.arch) {
		1017	case ZigLLVM_UnknownArch:
		1018	zig_unreachable();
		1019	case ZigLLVM_aarch64:
		1020	case ZigLLVM_arm:
		1021	case ZigLLVM_thumb:
		1022	case ZigLLVM_aarch64_be:
		1023	case ZigLLVM_armeb:
		1024	case ZigLLVM_thumbeb:
		1025	return true;
		1026
		1027	case ZigLLVM_x86:
		1028	case ZigLLVM_x86_64:
		1029	case ZigLLVM_amdgcn:
		1030	case ZigLLVM_amdil:
		1031	case ZigLLVM_amdil64:
		1032	case ZigLLVM_arc:
		1033	case ZigLLVM_avr:
		1034	case ZigLLVM_bpfeb:
		1035	case ZigLLVM_bpfel:
		1036	case ZigLLVM_hexagon:
		1037	case ZigLLVM_lanai:
		1038	case ZigLLVM_hsail:
		1039	case ZigLLVM_hsail64:
		1040	case ZigLLVM_kalimba:
		1041	case ZigLLVM_le32:
		1042	case ZigLLVM_le64:
		1043	case ZigLLVM_mips:
		1044	case ZigLLVM_mips64:
		1045	case ZigLLVM_mips64el:
		1046	case ZigLLVM_mipsel:
		1047	case ZigLLVM_msp430:
		1048	case ZigLLVM_nios2:
		1049	case ZigLLVM_nvptx:
		1050	case ZigLLVM_nvptx64:
		1051	case ZigLLVM_ppc64le:
		1052	case ZigLLVM_r600:
		1053	case ZigLLVM_renderscript32:
		1054	case ZigLLVM_renderscript64:
		1055	case ZigLLVM_riscv32:
		1056	case ZigLLVM_riscv64:
		1057	case ZigLLVM_shave:
		1058	case ZigLLVM_sparc:
		1059	case ZigLLVM_sparcel:
		1060	case ZigLLVM_sparcv9:
		1061	case ZigLLVM_spir:
		1062	case ZigLLVM_spir64:
		1063	case ZigLLVM_systemz:
		1064	case ZigLLVM_tce:
		1065	case ZigLLVM_tcele:
		1066	case ZigLLVM_wasm32:
		1067	case ZigLLVM_wasm64:
		1068	case ZigLLVM_xcore:
		1069	case ZigLLVM_ppc:
		1070	case ZigLLVM_ppc64:
		1071	return false;
		1072	}
		1073	zig_unreachable();
		1074	}

src/target.hpp+2

...	@@ -121,4 +121,6 @@ Buf target_dynamic_linker(ZigTarget target);	...	@@ -121,4 +121,6 @@ Buf target_dynamic_linker(ZigTarget target);
121	bool target_can_exec(const ZigTarget host_target, const ZigTarget guest_target);	121	bool target_can_exec(const ZigTarget host_target, const ZigTarget guest_target);
122	ZigLLVM_OSType get_llvm_os_type(Os os_type);	122	ZigLLVM_OSType get_llvm_os_type(Os os_type);
123		123
		124	bool target_is_arm(const ZigTarget *target);
		125
124	#endif	126	#endif

std/special/compiler_rt/index.zig+80-63

...	@@ -59,7 +59,7 @@ comptime {	...	@@ -59,7 +59,7 @@ comptime {
59	@export("__umoddi3", __umoddi3, linkage);	59	@export("__umoddi3", __umoddi3, linkage);
60	@export("__udivmodsi4", __udivmodsi4, linkage);	60	@export("__udivmodsi4", __udivmodsi4, linkage);
61		61
62	if (isArmArch()) {	62	if (is_arm_arch and !is_arm_64) {
63	@export("__aeabi_uldivmod", __aeabi_uldivmod, linkage);	63	@export("__aeabi_uldivmod", __aeabi_uldivmod, linkage);
64	@export("__aeabi_uidivmod", __aeabi_uidivmod, linkage);	64	@export("__aeabi_uidivmod", __aeabi_uidivmod, linkage);
65	@export("__aeabi_uidiv", __udivsi3, linkage);	65	@export("__aeabi_uidiv", __udivsi3, linkage);
...	@@ -149,68 +149,85 @@ extern fn __aeabi_uldivmod(numerator: u64, denominator: u64) AeabiUlDivModResult	...	@@ -149,68 +149,85 @@ extern fn __aeabi_uldivmod(numerator: u64, denominator: u64) AeabiUlDivModResult
149	return result;	149	return result;
150	}	150	}
151		151
152	fn isArmArch() bool {	152	const is_arm_64 = switch (builtin.arch) {
153	return switch (builtin.arch) {	153	builtin.Arch.aarch64v8_3a,
154	builtin.Arch.armv8_3a,	154	builtin.Arch.aarch64v8_2a,
155	builtin.Arch.armv8_2a,	155	builtin.Arch.aarch64v8_1a,
156	builtin.Arch.armv8_1a,	156	builtin.Arch.aarch64v8,
157	builtin.Arch.armv8,	157	builtin.Arch.aarch64v8r,
158	builtin.Arch.armv8r,	158	builtin.Arch.aarch64v8m_baseline,
159	builtin.Arch.armv8m_baseline,	159	builtin.Arch.aarch64v8m_mainline,
160	builtin.Arch.armv8m_mainline,	160	builtin.Arch.aarch64_bev8_3a,
161	builtin.Arch.armv7,	161	builtin.Arch.aarch64_bev8_2a,
162	builtin.Arch.armv7em,	162	builtin.Arch.aarch64_bev8_1a,
163	builtin.Arch.armv7m,	163	builtin.Arch.aarch64_bev8,
164	builtin.Arch.armv7s,	164	builtin.Arch.aarch64_bev8r,
165	builtin.Arch.armv7k,	165	builtin.Arch.aarch64_bev8m_baseline,
166	builtin.Arch.armv7ve,	166	builtin.Arch.aarch64_bev8m_mainline,
167	builtin.Arch.armv6,	167	=> true,
168	builtin.Arch.armv6m,	168	else => false,
169	builtin.Arch.armv6k,	169	};
170	builtin.Arch.armv6t2,	170
171	builtin.Arch.armv5,	171	const is_arm_arch = switch (builtin.arch) {
172	builtin.Arch.armv5te,	172	builtin.Arch.armv8_3a,
173	builtin.Arch.armv4t,	173	builtin.Arch.armv8_2a,
174	builtin.Arch.armebv8_3a,	174	builtin.Arch.armv8_1a,
175	builtin.Arch.armebv8_2a,	175	builtin.Arch.armv8,
176	builtin.Arch.armebv8_1a,	176	builtin.Arch.armv8r,
177	builtin.Arch.armebv8,	177	builtin.Arch.armv8m_baseline,
178	builtin.Arch.armebv8r,	178	builtin.Arch.armv8m_mainline,
179	builtin.Arch.armebv8m_baseline,	179	builtin.Arch.armv7,
180	builtin.Arch.armebv8m_mainline,	180	builtin.Arch.armv7em,
181	builtin.Arch.armebv7,	181	builtin.Arch.armv7m,
182	builtin.Arch.armebv7em,	182	builtin.Arch.armv7s,
183	builtin.Arch.armebv7m,	183	builtin.Arch.armv7k,
184	builtin.Arch.armebv7s,	184	builtin.Arch.armv7ve,
185	builtin.Arch.armebv7k,	185	builtin.Arch.armv6,
186	builtin.Arch.armebv7ve,	186	builtin.Arch.armv6m,
187	builtin.Arch.armebv6,	187	builtin.Arch.armv6k,
188	builtin.Arch.armebv6m,	188	builtin.Arch.armv6t2,
189	builtin.Arch.armebv6k,	189	builtin.Arch.armv5,
190	builtin.Arch.armebv6t2,	190	builtin.Arch.armv5te,
191	builtin.Arch.armebv5,	191	builtin.Arch.armv4t,
192	builtin.Arch.armebv5te,	192	builtin.Arch.armebv8_3a,
193	builtin.Arch.armebv4t,	193	builtin.Arch.armebv8_2a,
194	builtin.Arch.aarch64v8_3a,	194	builtin.Arch.armebv8_1a,
195	builtin.Arch.aarch64v8_2a,	195	builtin.Arch.armebv8,
196	builtin.Arch.aarch64v8_1a,	196	builtin.Arch.armebv8r,
197	builtin.Arch.aarch64v8,	197	builtin.Arch.armebv8m_baseline,
198	builtin.Arch.aarch64v8r,	198	builtin.Arch.armebv8m_mainline,
199	builtin.Arch.aarch64v8m_baseline,	199	builtin.Arch.armebv7,
200	builtin.Arch.aarch64v8m_mainline,	200	builtin.Arch.armebv7em,
201	builtin.Arch.aarch64_bev8_3a,	201	builtin.Arch.armebv7m,
202	builtin.Arch.aarch64_bev8_2a,	202	builtin.Arch.armebv7s,
203	builtin.Arch.aarch64_bev8_1a,	203	builtin.Arch.armebv7k,
204	builtin.Arch.aarch64_bev8,	204	builtin.Arch.armebv7ve,
205	builtin.Arch.aarch64_bev8r,	205	builtin.Arch.armebv6,
206	builtin.Arch.aarch64_bev8m_baseline,	206	builtin.Arch.armebv6m,
207	builtin.Arch.aarch64_bev8m_mainline,	207	builtin.Arch.armebv6k,
208	builtin.Arch.thumb,	208	builtin.Arch.armebv6t2,
209	builtin.Arch.thumbeb,	209	builtin.Arch.armebv5,
210	=> true,	210	builtin.Arch.armebv5te,
211	else => false,	211	builtin.Arch.armebv4t,
212	};	212	builtin.Arch.aarch64v8_3a,
213	}	213	builtin.Arch.aarch64v8_2a,
		214	builtin.Arch.aarch64v8_1a,
		215	builtin.Arch.aarch64v8,
		216	builtin.Arch.aarch64v8r,
		217	builtin.Arch.aarch64v8m_baseline,
		218	builtin.Arch.aarch64v8m_mainline,
		219	builtin.Arch.aarch64_bev8_3a,
		220	builtin.Arch.aarch64_bev8_2a,
		221	builtin.Arch.aarch64_bev8_1a,
		222	builtin.Arch.aarch64_bev8,
		223	builtin.Arch.aarch64_bev8r,
		224	builtin.Arch.aarch64_bev8m_baseline,
		225	builtin.Arch.aarch64_bev8m_mainline,
		226	builtin.Arch.thumb,
		227	builtin.Arch.thumbeb,
		228	=> true,
		229	else => false,
		230	};
214		231
215	nakedcc fn __aeabi_uidivmod() void {	232	nakedcc fn __aeabi_uidivmod() void {
216	@setRuntimeSafety(false);	233	@setRuntimeSafety(false);