authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-01-26 16:33:40-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2023-01-26 16:36:14-07:00
log0ca3582a86da377a25ea144acf94531dd8a28722
treeb18114547c561264532a8f5aee68f225553bff53
parent1e7083d09cc77663560b4c971421bff06f2c6c12

update CPU features to LLVM 16

21 files changed, 1784 insertions(+), 155 deletions(-)

build.zig+7
...@@ -97,6 +97,11 @@ pub fn build(b: *Builder) !void {...@@ -97,6 +97,11 @@ pub fn build(b: *Builder) !void {
97 "llvm-has-arc",97 "llvm-has-arc",
98 "Whether LLVM has the experimental target arc enabled",98 "Whether LLVM has the experimental target arc enabled",
99 ) orelse false;99 ) orelse false;
100 const llvm_has_xtensa = b.option(
101 bool,
102 "llvm-has-xtensa",
103 "Whether LLVM has the experimental target xtensa enabled",
104 ) orelse false;
100 const enable_macos_sdk = b.option(bool, "enable-macos-sdk", "Run tests requiring presence of macOS SDK and frameworks") orelse false;105 const enable_macos_sdk = b.option(bool, "enable-macos-sdk", "Run tests requiring presence of macOS SDK and frameworks") orelse false;
101 const enable_symlinks_windows = b.option(bool, "enable-symlinks-windows", "Run tests requiring presence of symlinks on Windows") orelse false;106 const enable_symlinks_windows = b.option(bool, "enable-symlinks-windows", "Run tests requiring presence of symlinks on Windows") orelse false;
102 const config_h_path_option = b.option([]const u8, "config_h", "Path to the generated config.h");107 const config_h_path_option = b.option([]const u8, "config_h", "Path to the generated config.h");
...@@ -186,6 +191,7 @@ pub fn build(b: *Builder) !void {...@@ -186,6 +191,7 @@ pub fn build(b: *Builder) !void {
186 exe_options.addOption(bool, "llvm_has_m68k", llvm_has_m68k);191 exe_options.addOption(bool, "llvm_has_m68k", llvm_has_m68k);
187 exe_options.addOption(bool, "llvm_has_csky", llvm_has_csky);192 exe_options.addOption(bool, "llvm_has_csky", llvm_has_csky);
188 exe_options.addOption(bool, "llvm_has_arc", llvm_has_arc);193 exe_options.addOption(bool, "llvm_has_arc", llvm_has_arc);
194 exe_options.addOption(bool, "llvm_has_xtensa", llvm_has_xtensa);
189 exe_options.addOption(bool, "force_gpa", force_gpa);195 exe_options.addOption(bool, "force_gpa", force_gpa);
190 exe_options.addOption(bool, "only_c", only_c);196 exe_options.addOption(bool, "only_c", only_c);
191 exe_options.addOption(bool, "omit_pkg_fetching_code", false);197 exe_options.addOption(bool, "omit_pkg_fetching_code", false);
...@@ -340,6 +346,7 @@ pub fn build(b: *Builder) !void {...@@ -340,6 +346,7 @@ pub fn build(b: *Builder) !void {
340 test_cases_options.addOption(bool, "llvm_has_m68k", llvm_has_m68k);346 test_cases_options.addOption(bool, "llvm_has_m68k", llvm_has_m68k);
341 test_cases_options.addOption(bool, "llvm_has_csky", llvm_has_csky);347 test_cases_options.addOption(bool, "llvm_has_csky", llvm_has_csky);
342 test_cases_options.addOption(bool, "llvm_has_arc", llvm_has_arc);348 test_cases_options.addOption(bool, "llvm_has_arc", llvm_has_arc);
349 test_cases_options.addOption(bool, "llvm_has_xtensa", llvm_has_xtensa);
343 test_cases_options.addOption(bool, "force_gpa", force_gpa);350 test_cases_options.addOption(bool, "force_gpa", force_gpa);
344 test_cases_options.addOption(bool, "only_c", only_c);351 test_cases_options.addOption(bool, "only_c", only_c);
345 test_cases_options.addOption(bool, "enable_qemu", b.enable_qemu);352 test_cases_options.addOption(bool, "enable_qemu", b.enable_qemu);
lib/std/target.zig+21-1
...@@ -459,6 +459,7 @@ pub const Target = struct {...@@ -459,6 +459,7 @@ pub const Target = struct {
459 pub const bpf = @import("target/bpf.zig");459 pub const bpf = @import("target/bpf.zig");
460 pub const csky = @import("target/csky.zig");460 pub const csky = @import("target/csky.zig");
461 pub const hexagon = @import("target/hexagon.zig");461 pub const hexagon = @import("target/hexagon.zig");
462 pub const loongarch = @import("target/loongarch.zig");
462 pub const m68k = @import("target/m68k.zig");463 pub const m68k = @import("target/m68k.zig");
463 pub const mips = @import("target/mips.zig");464 pub const mips = @import("target/mips.zig");
464 pub const msp430 = @import("target/msp430.zig");465 pub const msp430 = @import("target/msp430.zig");
...@@ -471,6 +472,7 @@ pub const Target = struct {...@@ -471,6 +472,7 @@ pub const Target = struct {
471 pub const ve = @import("target/ve.zig");472 pub const ve = @import("target/ve.zig");
472 pub const wasm = @import("target/wasm.zig");473 pub const wasm = @import("target/wasm.zig");
473 pub const x86 = @import("target/x86.zig");474 pub const x86 = @import("target/x86.zig");
475 pub const xtensa = @import("target/xtensa.zig");
474476
475 pub const Abi = enum {477 pub const Abi = enum {
476 none,478 none,
...@@ -1007,6 +1009,7 @@ pub const Target = struct {...@@ -1007,6 +1009,7 @@ pub const Target = struct {
1007 .thumbeb => .ARM,1009 .thumbeb => .ARM,
1008 .x86 => .@"386",1010 .x86 => .@"386",
1009 .xcore => .XCORE,1011 .xcore => .XCORE,
1012 .xtensa => .XTENSA,
1010 .nvptx => .NONE,1013 .nvptx => .NONE,
1011 .amdil => .NONE,1014 .amdil => .NONE,
1012 .hsail => .NONE,1015 .hsail => .NONE,
...@@ -1032,7 +1035,7 @@ pub const Target = struct {...@@ -1032,7 +1035,7 @@ pub const Target = struct {
1032 .spir64 => .NONE,1035 .spir64 => .NONE,
1033 .wasm64 => .NONE,1036 .wasm64 => .NONE,
1034 .renderscript64 => .NONE,1037 .renderscript64 => .NONE,
1035 .amdgcn => .NONE,1038 .amdgcn => .AMDGPU,
1036 .bpfel => .BPF,1039 .bpfel => .BPF,
1037 .bpfeb => .BPF,1040 .bpfeb => .BPF,
1038 .csky => .CSKY,1041 .csky => .CSKY,
...@@ -1122,6 +1125,7 @@ pub const Target = struct {...@@ -1122,6 +1125,7 @@ pub const Target = struct {
1122 .amdil64,1125 .amdil64,
1123 .bpfel,1126 .bpfel,
1124 .csky,1127 .csky,
1128 .xtensa,
1125 .hexagon,1129 .hexagon,
1126 .hsail,1130 .hsail,
1127 .hsail64,1131 .hsail64,
...@@ -1236,6 +1240,7 @@ pub const Target = struct {...@@ -1236,6 +1240,7 @@ pub const Target = struct {
1236 .spirv32,1240 .spirv32,
1237 .loongarch32,1241 .loongarch32,
1238 .dxil,1242 .dxil,
1243 .xtensa,
1239 => return 32,1244 => return 32,
12401245
1241 .aarch64,1246 .aarch64,
...@@ -1271,6 +1276,7 @@ pub const Target = struct {...@@ -1271,6 +1276,7 @@ pub const Target = struct {
1271 .arm, .armeb, .thumb, .thumbeb => "arm",1276 .arm, .armeb, .thumb, .thumbeb => "arm",
1272 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",1277 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
1273 .bpfel, .bpfeb => "bpf",1278 .bpfel, .bpfeb => "bpf",
1279 .loongarch32, .loongarch64 => "loongarch",
1274 .mips, .mipsel, .mips64, .mips64el => "mips",1280 .mips, .mipsel, .mips64, .mips64el => "mips",
1275 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",1281 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
1276 .amdgcn => "amdgpu",1282 .amdgcn => "amdgpu",
...@@ -1290,9 +1296,13 @@ pub const Target = struct {...@@ -1290,9 +1296,13 @@ pub const Target = struct {
1290 return switch (arch) {1296 return switch (arch) {
1291 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,1297 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
1292 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,1298 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
1299 .arc => &arc.all_features,
1293 .avr => &avr.all_features,1300 .avr => &avr.all_features,
1294 .bpfel, .bpfeb => &bpf.all_features,1301 .bpfel, .bpfeb => &bpf.all_features,
1302 .csky => &csky.all_features,
1295 .hexagon => &hexagon.all_features,1303 .hexagon => &hexagon.all_features,
1304 .loongarch32, .loongarch64 => &loongarch.all_features,
1305 .m68k => &m68k.all_features,
1296 .mips, .mipsel, .mips64, .mips64el => &mips.all_features,1306 .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
1297 .msp430 => &msp430.all_features,1307 .msp430 => &msp430.all_features,
1298 .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,1308 .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
...@@ -1302,6 +1312,7 @@ pub const Target = struct {...@@ -1302,6 +1312,7 @@ pub const Target = struct {
1302 .spirv32, .spirv64 => &spirv.all_features,1312 .spirv32, .spirv64 => &spirv.all_features,
1303 .s390x => &s390x.all_features,1313 .s390x => &s390x.all_features,
1304 .x86, .x86_64 => &x86.all_features,1314 .x86, .x86_64 => &x86.all_features,
1315 .xtensa => &xtensa.all_features,
1305 .nvptx, .nvptx64 => &nvptx.all_features,1316 .nvptx, .nvptx64 => &nvptx.all_features,
1306 .ve => &ve.all_features,1317 .ve => &ve.all_features,
1307 .wasm32, .wasm64 => &wasm.all_features,1318 .wasm32, .wasm64 => &wasm.all_features,
...@@ -1313,11 +1324,15 @@ pub const Target = struct {...@@ -1313,11 +1324,15 @@ pub const Target = struct {
1313 /// All processors Zig is aware of, sorted lexicographically by name.1324 /// All processors Zig is aware of, sorted lexicographically by name.
1314 pub fn allCpuModels(arch: Arch) []const *const Cpu.Model {1325 pub fn allCpuModels(arch: Arch) []const *const Cpu.Model {
1315 return switch (arch) {1326 return switch (arch) {
1327 .arc => comptime allCpusFromDecls(arc.cpu),
1316 .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu),1328 .arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu),
1317 .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu),1329 .aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu),
1318 .avr => comptime allCpusFromDecls(avr.cpu),1330 .avr => comptime allCpusFromDecls(avr.cpu),
1319 .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu),1331 .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu),
1332 .csky => comptime allCpusFromDecls(csky.cpu),
1320 .hexagon => comptime allCpusFromDecls(hexagon.cpu),1333 .hexagon => comptime allCpusFromDecls(hexagon.cpu),
1334 .loongarch32, .loongarch64 => comptime allCpusFromDecls(loongarch.cpu),
1335 .m68k => comptime allCpusFromDecls(m68k.cpu),
1321 .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),1336 .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
1322 .msp430 => comptime allCpusFromDecls(msp430.cpu),1337 .msp430 => comptime allCpusFromDecls(msp430.cpu),
1323 .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),1338 .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
...@@ -1326,6 +1341,7 @@ pub const Target = struct {...@@ -1326,6 +1341,7 @@ pub const Target = struct {
1326 .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),1341 .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),
1327 .s390x => comptime allCpusFromDecls(s390x.cpu),1342 .s390x => comptime allCpusFromDecls(s390x.cpu),
1328 .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),1343 .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
1344 .xtensa => comptime allCpusFromDecls(xtensa.cpu),
1329 .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),1345 .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
1330 .ve => comptime allCpusFromDecls(ve.cpu),1346 .ve => comptime allCpusFromDecls(ve.cpu),
1331 .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),1347 .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),
...@@ -1373,6 +1389,8 @@ pub const Target = struct {...@@ -1373,6 +1389,8 @@ pub const Target = struct {
1373 .avr => &avr.cpu.avr2,1389 .avr => &avr.cpu.avr2,
1374 .bpfel, .bpfeb => &bpf.cpu.generic,1390 .bpfel, .bpfeb => &bpf.cpu.generic,
1375 .hexagon => &hexagon.cpu.generic,1391 .hexagon => &hexagon.cpu.generic,
1392 .loongarch32 => &loongarch.cpu.generic_la32,
1393 .loongarch64 => &loongarch.cpu.generic_la64,
1376 .m68k => &m68k.cpu.generic,1394 .m68k => &m68k.cpu.generic,
1377 .mips, .mipsel => &mips.cpu.mips32,1395 .mips, .mipsel => &mips.cpu.mips32,
1378 .mips64, .mips64el => &mips.cpu.mips64,1396 .mips64, .mips64el => &mips.cpu.mips64,
...@@ -1720,6 +1738,7 @@ pub const Target = struct {...@@ -1720,6 +1738,7 @@ pub const Target = struct {
1720 .dxil,1738 .dxil,
1721 .loongarch32,1739 .loongarch32,
1722 .loongarch64,1740 .loongarch64,
1741 .xtensa,
1723 => return result,1742 => return result,
1724 },1743 },
17251744
...@@ -1884,6 +1903,7 @@ pub const Target = struct {...@@ -1884,6 +1903,7 @@ pub const Target = struct {
1884 .dxil,1903 .dxil,
1885 .loongarch32,1904 .loongarch32,
1886 .loongarch64,1905 .loongarch64,
1906 .xtensa,
1887 => 16,1907 => 16,
1888 };1908 };
1889 }1909 }
lib/std/target/aarch64.zig+445-97
...@@ -20,6 +20,7 @@ pub const Feature = enum {...@@ -20,6 +20,7 @@ pub const Feature = enum {
20 arith_bcc_fusion,20 arith_bcc_fusion,
21 arith_cbz_fusion,21 arith_cbz_fusion,
22 ascend_store_address,22 ascend_store_address,
23 b16b16,
23 balance_fp_ops,24 balance_fp_ops,
24 bf16,25 bf16,
25 brbe,26 brbe,
...@@ -36,19 +37,23 @@ pub const Feature = enum {...@@ -36,19 +37,23 @@ pub const Feature = enum {
36 ccdp,37 ccdp,
37 ccidx,38 ccidx,
38 ccpp,39 ccpp,
40 clrbhb,
39 cmp_bcc_fusion,41 cmp_bcc_fusion,
40 complxnum,42 complxnum,
41 contextidr_el2,43 contextidr_el2,
42 cortex_r82,44 cortex_r82,
43 crc,45 crc,
44 crypto,46 crypto,
47 cssc,
45 custom_cheap_as_move,48 custom_cheap_as_move,
49 d128,
46 disable_latency_sched_heuristic,50 disable_latency_sched_heuristic,
47 dit,51 dit,
48 dotprod,52 dotprod,
49 ecv,53 ecv,
50 el2vmsa,54 el2vmsa,
51 el3,55 el3,
56 enable_select_opt,
52 ete,57 ete,
53 exynos_cheap_as_move,58 exynos_cheap_as_move,
54 f32mm,59 f32mm,
...@@ -56,6 +61,7 @@ pub const Feature = enum {...@@ -56,6 +61,7 @@ pub const Feature = enum {
56 fgt,61 fgt,
57 fix_cortex_a53_835769,62 fix_cortex_a53_835769,
58 flagm,63 flagm,
64 fmv,
59 force_32bit_jump_tables,65 force_32bit_jump_tables,
60 fp16fml,66 fp16fml,
61 fp_armv8,67 fp_armv8,
...@@ -74,17 +80,20 @@ pub const Feature = enum {...@@ -74,17 +80,20 @@ pub const Feature = enum {
74 hbc,80 hbc,
75 hcx,81 hcx,
76 i8mm,82 i8mm,
83 ite,
77 jsconv,84 jsconv,
78 ldapr,
79 lor,85 lor,
80 ls64,86 ls64,
81 lse,87 lse,
88 lse128,
82 lse2,89 lse2,
83 lsl_fast,90 lsl_fast,
91 mec,
84 mops,92 mops,
85 mpam,93 mpam,
86 mte,94 mte,
87 neon,95 neon,
96 nmi,
88 no_bti_at_return_twice,97 no_bti_at_return_twice,
89 no_neg_immediates,98 no_neg_immediates,
90 no_zcz_fp,99 no_zcz_fp,
...@@ -96,9 +105,12 @@ pub const Feature = enum {...@@ -96,9 +105,12 @@ pub const Feature = enum {
96 perfmon,105 perfmon,
97 predictable_select_expensive,106 predictable_select_expensive,
98 predres,107 predres,
108 prfm_slc_target,
99 rand,109 rand,
100 ras,110 ras,
111 rasv2,
101 rcpc,112 rcpc,
113 rcpc3,
102 rcpc_immo,114 rcpc_immo,
103 rdm,115 rdm,
104 reserve_x1,116 reserve_x1,
...@@ -136,10 +148,14 @@ pub const Feature = enum {...@@ -136,10 +148,14 @@ pub const Feature = enum {
136 slow_strqro_store,148 slow_strqro_store,
137 sm4,149 sm4,
138 sme,150 sme,
139 sme_f64,151 sme2,
140 sme_i64,152 sme2p1,
153 sme_f16f16,
154 sme_f64f64,
155 sme_i16i64,
141 spe,156 spe,
142 spe_eef,157 spe_eef,
158 specres2,
143 specrestrict,159 specrestrict,
144 ssbs,160 ssbs,
145 strict_align,161 strict_align,
...@@ -149,7 +165,9 @@ pub const Feature = enum {...@@ -149,7 +165,9 @@ pub const Feature = enum {
149 sve2_bitperm,165 sve2_bitperm,
150 sve2_sha3,166 sve2_sha3,
151 sve2_sm4,167 sve2_sm4,
168 sve2p1,
152 tagged_globals,169 tagged_globals,
170 the,
153 tlb_rmi,171 tlb_rmi,
154 tme,172 tme,
155 tpidr_el1,173 tpidr_el1,
...@@ -170,11 +188,13 @@ pub const Feature = enum {...@@ -170,11 +188,13 @@ pub const Feature = enum {
170 v8_6a,188 v8_6a,
171 v8_7a,189 v8_7a,
172 v8_8a,190 v8_8a,
191 v8_9a,
173 v8a,192 v8a,
174 v8r,193 v8r,
175 v9_1a,194 v9_1a,
176 v9_2a,195 v9_2a,
177 v9_3a,196 v9_3a,
197 v9_4a,
178 v9a,198 v9a,
179 vh,199 vh,
180 wfxt,200 wfxt,
...@@ -199,6 +219,7 @@ pub const all_features = blk: {...@@ -199,6 +219,7 @@ pub const all_features = blk: {
199 .llvm_name = "a510",219 .llvm_name = "a510",
200 .description = "Cortex-A510 ARM processors",220 .description = "Cortex-A510 ARM processors",
201 .dependencies = featureSet(&[_]Feature{221 .dependencies = featureSet(&[_]Feature{
222 .fuse_adrp_add,
202 .fuse_aes,223 .fuse_aes,
203 .use_postra_scheduler,224 .use_postra_scheduler,
204 }),225 }),
...@@ -207,6 +228,7 @@ pub const all_features = blk: {...@@ -207,6 +228,7 @@ pub const all_features = blk: {
207 .llvm_name = "a65",228 .llvm_name = "a65",
208 .description = "Cortex-A65 ARM processors",229 .description = "Cortex-A65 ARM processors",
209 .dependencies = featureSet(&[_]Feature{230 .dependencies = featureSet(&[_]Feature{
231 .enable_select_opt,
210 .fuse_address,232 .fuse_address,
211 .fuse_adrp_add,233 .fuse_adrp_add,
212 .fuse_aes,234 .fuse_aes,
...@@ -218,7 +240,10 @@ pub const all_features = blk: {...@@ -218,7 +240,10 @@ pub const all_features = blk: {
218 .description = "Cortex-A710 ARM processors",240 .description = "Cortex-A710 ARM processors",
219 .dependencies = featureSet(&[_]Feature{241 .dependencies = featureSet(&[_]Feature{
220 .cmp_bcc_fusion,242 .cmp_bcc_fusion,
243 .enable_select_opt,
244 .fuse_adrp_add,
221 .fuse_aes,245 .fuse_aes,
246 .lsl_fast,
222 .use_postra_scheduler,247 .use_postra_scheduler,
223 }),248 }),
224 };249 };
...@@ -226,7 +251,10 @@ pub const all_features = blk: {...@@ -226,7 +251,10 @@ pub const all_features = blk: {
226 .llvm_name = "a76",251 .llvm_name = "a76",
227 .description = "Cortex-A76 ARM processors",252 .description = "Cortex-A76 ARM processors",
228 .dependencies = featureSet(&[_]Feature{253 .dependencies = featureSet(&[_]Feature{
254 .enable_select_opt,
255 .fuse_adrp_add,
229 .fuse_aes,256 .fuse_aes,
257 .lsl_fast,
230 }),258 }),
231 };259 };
232 result[@enumToInt(Feature.a78)] = .{260 result[@enumToInt(Feature.a78)] = .{
...@@ -234,7 +262,10 @@ pub const all_features = blk: {...@@ -234,7 +262,10 @@ pub const all_features = blk: {
234 .description = "Cortex-A78 ARM processors",262 .description = "Cortex-A78 ARM processors",
235 .dependencies = featureSet(&[_]Feature{263 .dependencies = featureSet(&[_]Feature{
236 .cmp_bcc_fusion,264 .cmp_bcc_fusion,
265 .enable_select_opt,
266 .fuse_adrp_add,
237 .fuse_aes,267 .fuse_aes,
268 .lsl_fast,
238 .use_postra_scheduler,269 .use_postra_scheduler,
239 }),270 }),
240 };271 };
...@@ -243,13 +274,16 @@ pub const all_features = blk: {...@@ -243,13 +274,16 @@ pub const all_features = blk: {
243 .description = "Cortex-A78C ARM processors",274 .description = "Cortex-A78C ARM processors",
244 .dependencies = featureSet(&[_]Feature{275 .dependencies = featureSet(&[_]Feature{
245 .cmp_bcc_fusion,276 .cmp_bcc_fusion,
277 .enable_select_opt,
278 .fuse_adrp_add,
246 .fuse_aes,279 .fuse_aes,
280 .lsl_fast,
247 .use_postra_scheduler,281 .use_postra_scheduler,
248 }),282 }),
249 };283 };
250 result[@enumToInt(Feature.aes)] = .{284 result[@enumToInt(Feature.aes)] = .{
251 .llvm_name = "aes",285 .llvm_name = "aes",
252 .description = "Enable AES support",286 .description = "Enable AES support (FEAT_AES, FEAT_PMULL)",
253 .dependencies = featureSet(&[_]Feature{287 .dependencies = featureSet(&[_]Feature{
254 .neon,288 .neon,
255 }),289 }),
...@@ -266,17 +300,17 @@ pub const all_features = blk: {...@@ -266,17 +300,17 @@ pub const all_features = blk: {
266 };300 };
267 result[@enumToInt(Feature.altnzcv)] = .{301 result[@enumToInt(Feature.altnzcv)] = .{
268 .llvm_name = "altnzcv",302 .llvm_name = "altnzcv",
269 .description = "Enable alternative NZCV format for floating point comparisons",303 .description = "Enable alternative NZCV format for floating point comparisons (FEAT_FlagM2)",
270 .dependencies = featureSet(&[_]Feature{}),304 .dependencies = featureSet(&[_]Feature{}),
271 };305 };
272 result[@enumToInt(Feature.am)] = .{306 result[@enumToInt(Feature.am)] = .{
273 .llvm_name = "am",307 .llvm_name = "am",
274 .description = "Enable v8.4-A Activity Monitors extension",308 .description = "Enable v8.4-A Activity Monitors extension (FEAT_AMUv1)",
275 .dependencies = featureSet(&[_]Feature{}),309 .dependencies = featureSet(&[_]Feature{}),
276 };310 };
277 result[@enumToInt(Feature.amvs)] = .{311 result[@enumToInt(Feature.amvs)] = .{
278 .llvm_name = "amvs",312 .llvm_name = "amvs",
279 .description = "Enable v8.6-A Activity Monitors Virtualization support",313 .description = "Enable v8.6-A Activity Monitors Virtualization support (FEAT_AMUv1p1)",
280 .dependencies = featureSet(&[_]Feature{314 .dependencies = featureSet(&[_]Feature{
281 .am,315 .am,
282 }),316 }),
...@@ -296,6 +330,11 @@ pub const all_features = blk: {...@@ -296,6 +330,11 @@ pub const all_features = blk: {
296 .description = "Schedule vector stores by ascending address",330 .description = "Schedule vector stores by ascending address",
297 .dependencies = featureSet(&[_]Feature{}),331 .dependencies = featureSet(&[_]Feature{}),
298 };332 };
333 result[@enumToInt(Feature.b16b16)] = .{
334 .llvm_name = "b16b16",
335 .description = "Enable SVE2.1 or SME2.1 non-widening BFloat16 to BFloat16 instructions (FEAT_B16B16)",
336 .dependencies = featureSet(&[_]Feature{}),
337 };
299 result[@enumToInt(Feature.balance_fp_ops)] = .{338 result[@enumToInt(Feature.balance_fp_ops)] = .{
300 .llvm_name = "balance-fp-ops",339 .llvm_name = "balance-fp-ops",
301 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",340 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
...@@ -303,17 +342,17 @@ pub const all_features = blk: {...@@ -303,17 +342,17 @@ pub const all_features = blk: {
303 };342 };
304 result[@enumToInt(Feature.bf16)] = .{343 result[@enumToInt(Feature.bf16)] = .{
305 .llvm_name = "bf16",344 .llvm_name = "bf16",
306 .description = "Enable BFloat16 Extension",345 .description = "Enable BFloat16 Extension (FEAT_BF16)",
307 .dependencies = featureSet(&[_]Feature{}),346 .dependencies = featureSet(&[_]Feature{}),
308 };347 };
309 result[@enumToInt(Feature.brbe)] = .{348 result[@enumToInt(Feature.brbe)] = .{
310 .llvm_name = "brbe",349 .llvm_name = "brbe",
311 .description = "Enable Branch Record Buffer Extension",350 .description = "Enable Branch Record Buffer Extension (FEAT_BRBE)",
312 .dependencies = featureSet(&[_]Feature{}),351 .dependencies = featureSet(&[_]Feature{}),
313 };352 };
314 result[@enumToInt(Feature.bti)] = .{353 result[@enumToInt(Feature.bti)] = .{
315 .llvm_name = "bti",354 .llvm_name = "bti",
316 .description = "Enable Branch Target Identification",355 .description = "Enable Branch Target Identification (FEAT_BTI)",
317 .dependencies = featureSet(&[_]Feature{}),356 .dependencies = featureSet(&[_]Feature{}),
318 };357 };
319 result[@enumToInt(Feature.call_saved_x10)] = .{358 result[@enumToInt(Feature.call_saved_x10)] = .{
...@@ -363,17 +402,22 @@ pub const all_features = blk: {...@@ -363,17 +402,22 @@ pub const all_features = blk: {
363 };402 };
364 result[@enumToInt(Feature.ccdp)] = .{403 result[@enumToInt(Feature.ccdp)] = .{
365 .llvm_name = "ccdp",404 .llvm_name = "ccdp",
366 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",405 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)",
367 .dependencies = featureSet(&[_]Feature{}),406 .dependencies = featureSet(&[_]Feature{}),
368 };407 };
369 result[@enumToInt(Feature.ccidx)] = .{408 result[@enumToInt(Feature.ccidx)] = .{
370 .llvm_name = "ccidx",409 .llvm_name = "ccidx",
371 .description = "Enable v8.3-A Extend of the CCSIDR number of sets",410 .description = "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)",
372 .dependencies = featureSet(&[_]Feature{}),411 .dependencies = featureSet(&[_]Feature{}),
373 };412 };
374 result[@enumToInt(Feature.ccpp)] = .{413 result[@enumToInt(Feature.ccpp)] = .{
375 .llvm_name = "ccpp",414 .llvm_name = "ccpp",
376 .description = "Enable v8.2 data Cache Clean to Point of Persistence",415 .description = "Enable v8.2 data Cache Clean to Point of Persistence (FEAT_DPB)",
416 .dependencies = featureSet(&[_]Feature{}),
417 };
418 result[@enumToInt(Feature.clrbhb)] = .{
419 .llvm_name = "clrbhb",
420 .description = "Enable Clear BHB instruction (FEAT_CLRBHB)",
377 .dependencies = featureSet(&[_]Feature{}),421 .dependencies = featureSet(&[_]Feature{}),
378 };422 };
379 result[@enumToInt(Feature.cmp_bcc_fusion)] = .{423 result[@enumToInt(Feature.cmp_bcc_fusion)] = .{
...@@ -383,7 +427,7 @@ pub const all_features = blk: {...@@ -383,7 +427,7 @@ pub const all_features = blk: {
383 };427 };
384 result[@enumToInt(Feature.complxnum)] = .{428 result[@enumToInt(Feature.complxnum)] = .{
385 .llvm_name = "complxnum",429 .llvm_name = "complxnum",
386 .description = "Enable v8.3-A Floating-point complex number support",430 .description = "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)",
387 .dependencies = featureSet(&[_]Feature{431 .dependencies = featureSet(&[_]Feature{
388 .neon,432 .neon,
389 }),433 }),
...@@ -402,7 +446,7 @@ pub const all_features = blk: {...@@ -402,7 +446,7 @@ pub const all_features = blk: {
402 };446 };
403 result[@enumToInt(Feature.crc)] = .{447 result[@enumToInt(Feature.crc)] = .{
404 .llvm_name = "crc",448 .llvm_name = "crc",
405 .description = "Enable ARMv8 CRC-32 checksum instructions",449 .description = "Enable ARMv8 CRC-32 checksum instructions (FEAT_CRC32)",
406 .dependencies = featureSet(&[_]Feature{}),450 .dependencies = featureSet(&[_]Feature{}),
407 };451 };
408 result[@enumToInt(Feature.crypto)] = .{452 result[@enumToInt(Feature.crypto)] = .{
...@@ -413,11 +457,23 @@ pub const all_features = blk: {...@@ -413,11 +457,23 @@ pub const all_features = blk: {
413 .sha2,457 .sha2,
414 }),458 }),
415 };459 };
460 result[@enumToInt(Feature.cssc)] = .{
461 .llvm_name = "cssc",
462 .description = "Enable Common Short Sequence Compression (CSSC) instructions (FEAT_CSSC)",
463 .dependencies = featureSet(&[_]Feature{}),
464 };
416 result[@enumToInt(Feature.custom_cheap_as_move)] = .{465 result[@enumToInt(Feature.custom_cheap_as_move)] = .{
417 .llvm_name = "custom-cheap-as-move",466 .llvm_name = "custom-cheap-as-move",
418 .description = "Use custom handling of cheap instructions",467 .description = "Use custom handling of cheap instructions",
419 .dependencies = featureSet(&[_]Feature{}),468 .dependencies = featureSet(&[_]Feature{}),
420 };469 };
470 result[@enumToInt(Feature.d128)] = .{
471 .llvm_name = "d128",
472 .description = "Enable Armv9.4-A 128-bit Page Table Descriptors, System Registers and Instructions (FEAT_D128, FEAT_LVA3, FEAT_SYSREG128, FEAT_SYSINSTR128)",
473 .dependencies = featureSet(&[_]Feature{
474 .lse128,
475 }),
476 };
421 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{477 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
422 .llvm_name = "disable-latency-sched-heuristic",478 .llvm_name = "disable-latency-sched-heuristic",
423 .description = "Disable latency scheduling heuristic",479 .description = "Disable latency scheduling heuristic",
...@@ -425,17 +481,17 @@ pub const all_features = blk: {...@@ -425,17 +481,17 @@ pub const all_features = blk: {
425 };481 };
426 result[@enumToInt(Feature.dit)] = .{482 result[@enumToInt(Feature.dit)] = .{
427 .llvm_name = "dit",483 .llvm_name = "dit",
428 .description = "Enable v8.4-A Data Independent Timing instructions",484 .description = "Enable v8.4-A Data Independent Timing instructions (FEAT_DIT)",
429 .dependencies = featureSet(&[_]Feature{}),485 .dependencies = featureSet(&[_]Feature{}),
430 };486 };
431 result[@enumToInt(Feature.dotprod)] = .{487 result[@enumToInt(Feature.dotprod)] = .{
432 .llvm_name = "dotprod",488 .llvm_name = "dotprod",
433 .description = "Enable dot product support",489 .description = "Enable dot product support (FEAT_DotProd)",
434 .dependencies = featureSet(&[_]Feature{}),490 .dependencies = featureSet(&[_]Feature{}),
435 };491 };
436 result[@enumToInt(Feature.ecv)] = .{492 result[@enumToInt(Feature.ecv)] = .{
437 .llvm_name = "ecv",493 .llvm_name = "ecv",
438 .description = "Enable enhanced counter virtualization extension",494 .description = "Enable enhanced counter virtualization extension (FEAT_ECV)",
439 .dependencies = featureSet(&[_]Feature{}),495 .dependencies = featureSet(&[_]Feature{}),
440 };496 };
441 result[@enumToInt(Feature.el2vmsa)] = .{497 result[@enumToInt(Feature.el2vmsa)] = .{
...@@ -448,9 +504,14 @@ pub const all_features = blk: {...@@ -448,9 +504,14 @@ pub const all_features = blk: {
448 .description = "Enable Exception Level 3",504 .description = "Enable Exception Level 3",
449 .dependencies = featureSet(&[_]Feature{}),505 .dependencies = featureSet(&[_]Feature{}),
450 };506 };
507 result[@enumToInt(Feature.enable_select_opt)] = .{
508 .llvm_name = "enable-select-opt",
509 .description = "Enable the select optimize pass for select loop heuristics",
510 .dependencies = featureSet(&[_]Feature{}),
511 };
451 result[@enumToInt(Feature.ete)] = .{512 result[@enumToInt(Feature.ete)] = .{
452 .llvm_name = "ete",513 .llvm_name = "ete",
453 .description = "Enable Embedded Trace Extension",514 .description = "Enable Embedded Trace Extension (FEAT_ETE)",
454 .dependencies = featureSet(&[_]Feature{515 .dependencies = featureSet(&[_]Feature{
455 .trbe,516 .trbe,
456 }),517 }),
...@@ -464,21 +525,21 @@ pub const all_features = blk: {...@@ -464,21 +525,21 @@ pub const all_features = blk: {
464 };525 };
465 result[@enumToInt(Feature.f32mm)] = .{526 result[@enumToInt(Feature.f32mm)] = .{
466 .llvm_name = "f32mm",527 .llvm_name = "f32mm",
467 .description = "Enable Matrix Multiply FP32 Extension",528 .description = "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)",
468 .dependencies = featureSet(&[_]Feature{529 .dependencies = featureSet(&[_]Feature{
469 .sve,530 .sve,
470 }),531 }),
471 };532 };
472 result[@enumToInt(Feature.f64mm)] = .{533 result[@enumToInt(Feature.f64mm)] = .{
473 .llvm_name = "f64mm",534 .llvm_name = "f64mm",
474 .description = "Enable Matrix Multiply FP64 Extension",535 .description = "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)",
475 .dependencies = featureSet(&[_]Feature{536 .dependencies = featureSet(&[_]Feature{
476 .sve,537 .sve,
477 }),538 }),
478 };539 };
479 result[@enumToInt(Feature.fgt)] = .{540 result[@enumToInt(Feature.fgt)] = .{
480 .llvm_name = "fgt",541 .llvm_name = "fgt",
481 .description = "Enable fine grained virtualization traps extension",542 .description = "Enable fine grained virtualization traps extension (FEAT_FGT)",
482 .dependencies = featureSet(&[_]Feature{}),543 .dependencies = featureSet(&[_]Feature{}),
483 };544 };
484 result[@enumToInt(Feature.fix_cortex_a53_835769)] = .{545 result[@enumToInt(Feature.fix_cortex_a53_835769)] = .{
...@@ -488,7 +549,12 @@ pub const all_features = blk: {...@@ -488,7 +549,12 @@ pub const all_features = blk: {
488 };549 };
489 result[@enumToInt(Feature.flagm)] = .{550 result[@enumToInt(Feature.flagm)] = .{
490 .llvm_name = "flagm",551 .llvm_name = "flagm",
491 .description = "Enable v8.4-A Flag Manipulation Instructions",552 .description = "Enable v8.4-A Flag Manipulation Instructions (FEAT_FlagM)",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@enumToInt(Feature.fmv)] = .{
556 .llvm_name = "fmv",
557 .description = "Enable Function Multi Versioning support.",
492 .dependencies = featureSet(&[_]Feature{}),558 .dependencies = featureSet(&[_]Feature{}),
493 };559 };
494 result[@enumToInt(Feature.force_32bit_jump_tables)] = .{560 result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
...@@ -498,24 +564,24 @@ pub const all_features = blk: {...@@ -498,24 +564,24 @@ pub const all_features = blk: {
498 };564 };
499 result[@enumToInt(Feature.fp16fml)] = .{565 result[@enumToInt(Feature.fp16fml)] = .{
500 .llvm_name = "fp16fml",566 .llvm_name = "fp16fml",
501 .description = "Enable FP16 FML instructions",567 .description = "Enable FP16 FML instructions (FEAT_FHM)",
502 .dependencies = featureSet(&[_]Feature{568 .dependencies = featureSet(&[_]Feature{
503 .fullfp16,569 .fullfp16,
504 }),570 }),
505 };571 };
506 result[@enumToInt(Feature.fp_armv8)] = .{572 result[@enumToInt(Feature.fp_armv8)] = .{
507 .llvm_name = "fp-armv8",573 .llvm_name = "fp-armv8",
508 .description = "Enable ARMv8 FP",574 .description = "Enable ARMv8 FP (FEAT_FP)",
509 .dependencies = featureSet(&[_]Feature{}),575 .dependencies = featureSet(&[_]Feature{}),
510 };576 };
511 result[@enumToInt(Feature.fptoint)] = .{577 result[@enumToInt(Feature.fptoint)] = .{
512 .llvm_name = "fptoint",578 .llvm_name = "fptoint",
513 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",579 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int (FEAT_FRINTTS)",
514 .dependencies = featureSet(&[_]Feature{}),580 .dependencies = featureSet(&[_]Feature{}),
515 };581 };
516 result[@enumToInt(Feature.fullfp16)] = .{582 result[@enumToInt(Feature.fullfp16)] = .{
517 .llvm_name = "fullfp16",583 .llvm_name = "fullfp16",
518 .description = "Full FP16",584 .description = "Full FP16 (FEAT_FP16)",
519 .dependencies = featureSet(&[_]Feature{585 .dependencies = featureSet(&[_]Feature{
520 .fp_armv8,586 .fp_armv8,
521 }),587 }),
...@@ -572,49 +638,58 @@ pub const all_features = blk: {...@@ -572,49 +638,58 @@ pub const all_features = blk: {
572 };638 };
573 result[@enumToInt(Feature.hbc)] = .{639 result[@enumToInt(Feature.hbc)] = .{
574 .llvm_name = "hbc",640 .llvm_name = "hbc",
575 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension",641 .description = "Enable Armv8.8-A Hinted Conditional Branches Extension (FEAT_HBC)",
576 .dependencies = featureSet(&[_]Feature{}),642 .dependencies = featureSet(&[_]Feature{}),
577 };643 };
578 result[@enumToInt(Feature.hcx)] = .{644 result[@enumToInt(Feature.hcx)] = .{
579 .llvm_name = "hcx",645 .llvm_name = "hcx",
580 .description = "Enable Armv8.7-A HCRX_EL2 system register",646 .description = "Enable Armv8.7-A HCRX_EL2 system register (FEAT_HCX)",
581 .dependencies = featureSet(&[_]Feature{}),647 .dependencies = featureSet(&[_]Feature{}),
582 };648 };
583 result[@enumToInt(Feature.i8mm)] = .{649 result[@enumToInt(Feature.i8mm)] = .{
584 .llvm_name = "i8mm",650 .llvm_name = "i8mm",
585 .description = "Enable Matrix Multiply Int8 Extension",651 .description = "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)",
586 .dependencies = featureSet(&[_]Feature{}),652 .dependencies = featureSet(&[_]Feature{}),
587 };653 };
654 result[@enumToInt(Feature.ite)] = .{
655 .llvm_name = "ite",
656 .description = "Enable Armv9.4-A Instrumentation Extension FEAT_ITE",
657 .dependencies = featureSet(&[_]Feature{
658 .ete,
659 }),
660 };
588 result[@enumToInt(Feature.jsconv)] = .{661 result[@enumToInt(Feature.jsconv)] = .{
589 .llvm_name = "jsconv",662 .llvm_name = "jsconv",
590 .description = "Enable v8.3-A JavaScript FP conversion instructions",663 .description = "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)",
591 .dependencies = featureSet(&[_]Feature{664 .dependencies = featureSet(&[_]Feature{
592 .fp_armv8,665 .fp_armv8,
593 }),666 }),
594 };667 };
595 result[@enumToInt(Feature.ldapr)] = .{
596 .llvm_name = "ldapr",
597 .description = "Use LDAPR to lower atomic loads; experimental until we have more testing/a formal correctness proof",
598 .dependencies = featureSet(&[_]Feature{}),
599 };
600 result[@enumToInt(Feature.lor)] = .{668 result[@enumToInt(Feature.lor)] = .{
601 .llvm_name = "lor",669 .llvm_name = "lor",
602 .description = "Enables ARM v8.1 Limited Ordering Regions extension",670 .description = "Enables ARM v8.1 Limited Ordering Regions extension (FEAT_LOR)",
603 .dependencies = featureSet(&[_]Feature{}),671 .dependencies = featureSet(&[_]Feature{}),
604 };672 };
605 result[@enumToInt(Feature.ls64)] = .{673 result[@enumToInt(Feature.ls64)] = .{
606 .llvm_name = "ls64",674 .llvm_name = "ls64",
607 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension",675 .description = "Enable Armv8.7-A LD64B/ST64B Accelerator Extension (FEAT_LS64, FEAT_LS64_V, FEAT_LS64_ACCDATA)",
608 .dependencies = featureSet(&[_]Feature{}),676 .dependencies = featureSet(&[_]Feature{}),
609 };677 };
610 result[@enumToInt(Feature.lse)] = .{678 result[@enumToInt(Feature.lse)] = .{
611 .llvm_name = "lse",679 .llvm_name = "lse",
612 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",680 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions (FEAT_LSE)",
613 .dependencies = featureSet(&[_]Feature{}),681 .dependencies = featureSet(&[_]Feature{}),
614 };682 };
683 result[@enumToInt(Feature.lse128)] = .{
684 .llvm_name = "lse128",
685 .description = "Enable Armv9.4-A 128-bit Atomic Instructions (FEAT_LSE128)",
686 .dependencies = featureSet(&[_]Feature{
687 .lse,
688 }),
689 };
615 result[@enumToInt(Feature.lse2)] = .{690 result[@enumToInt(Feature.lse2)] = .{
616 .llvm_name = "lse2",691 .llvm_name = "lse2",
617 .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules",692 .description = "Enable ARMv8.4 Large System Extension 2 (LSE2) atomicity rules (FEAT_LSE2)",
618 .dependencies = featureSet(&[_]Feature{}),693 .dependencies = featureSet(&[_]Feature{}),
619 };694 };
620 result[@enumToInt(Feature.lsl_fast)] = .{695 result[@enumToInt(Feature.lsl_fast)] = .{
...@@ -622,28 +697,40 @@ pub const all_features = blk: {...@@ -622,28 +697,40 @@ pub const all_features = blk: {
622 .description = "CPU has a fastpath logical shift of up to 3 places",697 .description = "CPU has a fastpath logical shift of up to 3 places",
623 .dependencies = featureSet(&[_]Feature{}),698 .dependencies = featureSet(&[_]Feature{}),
624 };699 };
700 result[@enumToInt(Feature.mec)] = .{
701 .llvm_name = "mec",
702 .description = "Enable Memory Encryption Contexts Extension",
703 .dependencies = featureSet(&[_]Feature{
704 .rme,
705 }),
706 };
625 result[@enumToInt(Feature.mops)] = .{707 result[@enumToInt(Feature.mops)] = .{
626 .llvm_name = "mops",708 .llvm_name = "mops",
627 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions",709 .description = "Enable Armv8.8-A memcpy and memset acceleration instructions (FEAT_MOPS)",
628 .dependencies = featureSet(&[_]Feature{}),710 .dependencies = featureSet(&[_]Feature{}),
629 };711 };
630 result[@enumToInt(Feature.mpam)] = .{712 result[@enumToInt(Feature.mpam)] = .{
631 .llvm_name = "mpam",713 .llvm_name = "mpam",
632 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",714 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension (FEAT_MPAM)",
633 .dependencies = featureSet(&[_]Feature{}),715 .dependencies = featureSet(&[_]Feature{}),
634 };716 };
635 result[@enumToInt(Feature.mte)] = .{717 result[@enumToInt(Feature.mte)] = .{
636 .llvm_name = "mte",718 .llvm_name = "mte",
637 .description = "Enable Memory Tagging Extension",719 .description = "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)",
638 .dependencies = featureSet(&[_]Feature{}),720 .dependencies = featureSet(&[_]Feature{}),
639 };721 };
640 result[@enumToInt(Feature.neon)] = .{722 result[@enumToInt(Feature.neon)] = .{
641 .llvm_name = "neon",723 .llvm_name = "neon",
642 .description = "Enable Advanced SIMD instructions",724 .description = "Enable Advanced SIMD instructions (FEAT_AdvSIMD)",
643 .dependencies = featureSet(&[_]Feature{725 .dependencies = featureSet(&[_]Feature{
644 .fp_armv8,726 .fp_armv8,
645 }),727 }),
646 };728 };
729 result[@enumToInt(Feature.nmi)] = .{
730 .llvm_name = "nmi",
731 .description = "Enable Armv8.8-A Non-maskable Interrupts (FEAT_NMI, FEAT_GICv3_NMI)",
732 .dependencies = featureSet(&[_]Feature{}),
733 };
647 result[@enumToInt(Feature.no_bti_at_return_twice)] = .{734 result[@enumToInt(Feature.no_bti_at_return_twice)] = .{
648 .llvm_name = "no-bti-at-return-twice",735 .llvm_name = "no-bti-at-return-twice",
649 .description = "Don't place a BTI instruction after a return-twice",736 .description = "Don't place a BTI instruction after a return-twice",
...@@ -661,7 +748,7 @@ pub const all_features = blk: {...@@ -661,7 +748,7 @@ pub const all_features = blk: {
661 };748 };
662 result[@enumToInt(Feature.nv)] = .{749 result[@enumToInt(Feature.nv)] = .{
663 .llvm_name = "nv",750 .llvm_name = "nv",
664 .description = "Enable v8.4-A Nested Virtualization Enchancement",751 .description = "Enable v8.4-A Nested Virtualization Enchancement (FEAT_NV, FEAT_NV2)",
665 .dependencies = featureSet(&[_]Feature{}),752 .dependencies = featureSet(&[_]Feature{}),
666 };753 };
667 result[@enumToInt(Feature.outline_atomics)] = .{754 result[@enumToInt(Feature.outline_atomics)] = .{
...@@ -671,24 +758,24 @@ pub const all_features = blk: {...@@ -671,24 +758,24 @@ pub const all_features = blk: {
671 };758 };
672 result[@enumToInt(Feature.pan)] = .{759 result[@enumToInt(Feature.pan)] = .{
673 .llvm_name = "pan",760 .llvm_name = "pan",
674 .description = "Enables ARM v8.1 Privileged Access-Never extension",761 .description = "Enables ARM v8.1 Privileged Access-Never extension (FEAT_PAN)",
675 .dependencies = featureSet(&[_]Feature{}),762 .dependencies = featureSet(&[_]Feature{}),
676 };763 };
677 result[@enumToInt(Feature.pan_rwv)] = .{764 result[@enumToInt(Feature.pan_rwv)] = .{
678 .llvm_name = "pan-rwv",765 .llvm_name = "pan-rwv",
679 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",766 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants (FEAT_PAN2)",
680 .dependencies = featureSet(&[_]Feature{767 .dependencies = featureSet(&[_]Feature{
681 .pan,768 .pan,
682 }),769 }),
683 };770 };
684 result[@enumToInt(Feature.pauth)] = .{771 result[@enumToInt(Feature.pauth)] = .{
685 .llvm_name = "pauth",772 .llvm_name = "pauth",
686 .description = "Enable v8.3-A Pointer Authentication extension",773 .description = "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)",
687 .dependencies = featureSet(&[_]Feature{}),774 .dependencies = featureSet(&[_]Feature{}),
688 };775 };
689 result[@enumToInt(Feature.perfmon)] = .{776 result[@enumToInt(Feature.perfmon)] = .{
690 .llvm_name = "perfmon",777 .llvm_name = "perfmon",
691 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",778 .description = "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)",
692 .dependencies = featureSet(&[_]Feature{}),779 .dependencies = featureSet(&[_]Feature{}),
693 };780 };
694 result[@enumToInt(Feature.predictable_select_expensive)] = .{781 result[@enumToInt(Feature.predictable_select_expensive)] = .{
...@@ -698,34 +785,53 @@ pub const all_features = blk: {...@@ -698,34 +785,53 @@ pub const all_features = blk: {
698 };785 };
699 result[@enumToInt(Feature.predres)] = .{786 result[@enumToInt(Feature.predres)] = .{
700 .llvm_name = "predres",787 .llvm_name = "predres",
701 .description = "Enable v8.5a execution and data prediction invalidation instructions",788 .description = "Enable v8.5a execution and data prediction invalidation instructions (FEAT_SPECRES)",
789 .dependencies = featureSet(&[_]Feature{}),
790 };
791 result[@enumToInt(Feature.prfm_slc_target)] = .{
792 .llvm_name = "prfm-slc-target",
793 .description = "Enable SLC target for PRFM instruction",
702 .dependencies = featureSet(&[_]Feature{}),794 .dependencies = featureSet(&[_]Feature{}),
703 };795 };
704 result[@enumToInt(Feature.rand)] = .{796 result[@enumToInt(Feature.rand)] = .{
705 .llvm_name = "rand",797 .llvm_name = "rand",
706 .description = "Enable Random Number generation instructions",798 .description = "Enable Random Number generation instructions (FEAT_RNG)",
707 .dependencies = featureSet(&[_]Feature{}),799 .dependencies = featureSet(&[_]Feature{}),
708 };800 };
709 result[@enumToInt(Feature.ras)] = .{801 result[@enumToInt(Feature.ras)] = .{
710 .llvm_name = "ras",802 .llvm_name = "ras",
711 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",803 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions (FEAT_RAS, FEAT_RASv1p1)",
712 .dependencies = featureSet(&[_]Feature{}),804 .dependencies = featureSet(&[_]Feature{}),
713 };805 };
806 result[@enumToInt(Feature.rasv2)] = .{
807 .llvm_name = "rasv2",
808 .description = "Enable ARMv8.9-A Reliability, Availability and Serviceability Extensions (FEAT_RASv2)",
809 .dependencies = featureSet(&[_]Feature{
810 .ras,
811 }),
812 };
714 result[@enumToInt(Feature.rcpc)] = .{813 result[@enumToInt(Feature.rcpc)] = .{
715 .llvm_name = "rcpc",814 .llvm_name = "rcpc",
716 .description = "Enable support for RCPC extension",815 .description = "Enable support for RCPC extension (FEAT_LRCPC)",
717 .dependencies = featureSet(&[_]Feature{}),816 .dependencies = featureSet(&[_]Feature{}),
718 };817 };
818 result[@enumToInt(Feature.rcpc3)] = .{
819 .llvm_name = "rcpc3",
820 .description = "Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set (FEAT_LRCPC3)",
821 .dependencies = featureSet(&[_]Feature{
822 .rcpc_immo,
823 }),
824 };
719 result[@enumToInt(Feature.rcpc_immo)] = .{825 result[@enumToInt(Feature.rcpc_immo)] = .{
720 .llvm_name = "rcpc-immo",826 .llvm_name = "rcpc-immo",
721 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",827 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets (FEAT_LRCPC2)",
722 .dependencies = featureSet(&[_]Feature{828 .dependencies = featureSet(&[_]Feature{
723 .rcpc,829 .rcpc,
724 }),830 }),
725 };831 };
726 result[@enumToInt(Feature.rdm)] = .{832 result[@enumToInt(Feature.rdm)] = .{
727 .llvm_name = "rdm",833 .llvm_name = "rdm",
728 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",834 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions (FEAT_RDM)",
729 .dependencies = featureSet(&[_]Feature{}),835 .dependencies = featureSet(&[_]Feature{}),
730 };836 };
731 result[@enumToInt(Feature.reserve_x1)] = .{837 result[@enumToInt(Feature.reserve_x1)] = .{
...@@ -855,29 +961,29 @@ pub const all_features = blk: {...@@ -855,29 +961,29 @@ pub const all_features = blk: {
855 };961 };
856 result[@enumToInt(Feature.rme)] = .{962 result[@enumToInt(Feature.rme)] = .{
857 .llvm_name = "rme",963 .llvm_name = "rme",
858 .description = "Enable Realm Management Extension",964 .description = "Enable Realm Management Extension (FEAT_RME)",
859 .dependencies = featureSet(&[_]Feature{}),965 .dependencies = featureSet(&[_]Feature{}),
860 };966 };
861 result[@enumToInt(Feature.sb)] = .{967 result[@enumToInt(Feature.sb)] = .{
862 .llvm_name = "sb",968 .llvm_name = "sb",
863 .description = "Enable v8.5 Speculation Barrier",969 .description = "Enable v8.5 Speculation Barrier (FEAT_SB)",
864 .dependencies = featureSet(&[_]Feature{}),970 .dependencies = featureSet(&[_]Feature{}),
865 };971 };
866 result[@enumToInt(Feature.sel2)] = .{972 result[@enumToInt(Feature.sel2)] = .{
867 .llvm_name = "sel2",973 .llvm_name = "sel2",
868 .description = "Enable v8.4-A Secure Exception Level 2 extension",974 .description = "Enable v8.4-A Secure Exception Level 2 extension (FEAT_SEL2)",
869 .dependencies = featureSet(&[_]Feature{}),975 .dependencies = featureSet(&[_]Feature{}),
870 };976 };
871 result[@enumToInt(Feature.sha2)] = .{977 result[@enumToInt(Feature.sha2)] = .{
872 .llvm_name = "sha2",978 .llvm_name = "sha2",
873 .description = "Enable SHA1 and SHA256 support",979 .description = "Enable SHA1 and SHA256 support (FEAT_SHA1, FEAT_SHA256)",
874 .dependencies = featureSet(&[_]Feature{980 .dependencies = featureSet(&[_]Feature{
875 .neon,981 .neon,
876 }),982 }),
877 };983 };
878 result[@enumToInt(Feature.sha3)] = .{984 result[@enumToInt(Feature.sha3)] = .{
879 .llvm_name = "sha3",985 .llvm_name = "sha3",
880 .description = "Enable SHA512 and SHA3 support",986 .description = "Enable SHA512 and SHA3 support (FEAT_SHA3, FEAT_SHA512)",
881 .dependencies = featureSet(&[_]Feature{987 .dependencies = featureSet(&[_]Feature{
882 .sha2,988 .sha2,
883 }),989 }),
...@@ -899,51 +1005,77 @@ pub const all_features = blk: {...@@ -899,51 +1005,77 @@ pub const all_features = blk: {
899 };1005 };
900 result[@enumToInt(Feature.sm4)] = .{1006 result[@enumToInt(Feature.sm4)] = .{
901 .llvm_name = "sm4",1007 .llvm_name = "sm4",
902 .description = "Enable SM3 and SM4 support",1008 .description = "Enable SM3 and SM4 support (FEAT_SM4, FEAT_SM3)",
903 .dependencies = featureSet(&[_]Feature{1009 .dependencies = featureSet(&[_]Feature{
904 .neon,1010 .neon,
905 }),1011 }),
906 };1012 };
907 result[@enumToInt(Feature.sme)] = .{1013 result[@enumToInt(Feature.sme)] = .{
908 .llvm_name = "sme",1014 .llvm_name = "sme",
909 .description = "Enable Scalable Matrix Extension (SME)",1015 .description = "Enable Scalable Matrix Extension (SME) (FEAT_SME)",
910 .dependencies = featureSet(&[_]Feature{1016 .dependencies = featureSet(&[_]Feature{
911 .bf16,1017 .bf16,
912 .use_scalar_inc_vl,1018 .use_scalar_inc_vl,
913 }),1019 }),
914 };1020 };
915 result[@enumToInt(Feature.sme_f64)] = .{1021 result[@enumToInt(Feature.sme2)] = .{
916 .llvm_name = "sme-f64",1022 .llvm_name = "sme2",
917 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions",1023 .description = "Enable Scalable Matrix Extension 2 (SME2) instructions",
918 .dependencies = featureSet(&[_]Feature{1024 .dependencies = featureSet(&[_]Feature{
919 .sme,1025 .sme,
920 }),1026 }),
921 };1027 };
922 result[@enumToInt(Feature.sme_i64)] = .{1028 result[@enumToInt(Feature.sme2p1)] = .{
923 .llvm_name = "sme-i64",1029 .llvm_name = "sme2p1",
924 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions",1030 .description = "Enable Scalable Matrix Extension 2.1 (FEAT_SME2p1) instructions",
1031 .dependencies = featureSet(&[_]Feature{
1032 .sme2,
1033 }),
1034 };
1035 result[@enumToInt(Feature.sme_f16f16)] = .{
1036 .llvm_name = "sme-f16f16",
1037 .description = "Enable SME2.1 non-widening Float16 instructions (FEAT_SME_F16F16)",
1038 .dependencies = featureSet(&[_]Feature{}),
1039 };
1040 result[@enumToInt(Feature.sme_f64f64)] = .{
1041 .llvm_name = "sme-f64f64",
1042 .description = "Enable Scalable Matrix Extension (SME) F64F64 instructions (FEAT_SME_F64F64)",
1043 .dependencies = featureSet(&[_]Feature{
1044 .sme,
1045 }),
1046 };
1047 result[@enumToInt(Feature.sme_i16i64)] = .{
1048 .llvm_name = "sme-i16i64",
1049 .description = "Enable Scalable Matrix Extension (SME) I16I64 instructions (FEAT_SME_I16I64)",
925 .dependencies = featureSet(&[_]Feature{1050 .dependencies = featureSet(&[_]Feature{
926 .sme,1051 .sme,
927 }),1052 }),
928 };1053 };
929 result[@enumToInt(Feature.spe)] = .{1054 result[@enumToInt(Feature.spe)] = .{
930 .llvm_name = "spe",1055 .llvm_name = "spe",
931 .description = "Enable Statistical Profiling extension",1056 .description = "Enable Statistical Profiling extension (FEAT_SPE)",
932 .dependencies = featureSet(&[_]Feature{}),1057 .dependencies = featureSet(&[_]Feature{}),
933 };1058 };
934 result[@enumToInt(Feature.spe_eef)] = .{1059 result[@enumToInt(Feature.spe_eef)] = .{
935 .llvm_name = "spe-eef",1060 .llvm_name = "spe-eef",
936 .description = "Enable extra register in the Statistical Profiling Extension",1061 .description = "Enable extra register in the Statistical Profiling Extension (FEAT_SPEv1p2)",
937 .dependencies = featureSet(&[_]Feature{}),1062 .dependencies = featureSet(&[_]Feature{}),
938 };1063 };
1064 result[@enumToInt(Feature.specres2)] = .{
1065 .llvm_name = "specres2",
1066 .description = "Enable Speculation Restriction Instruction (FEAT_SPECRES2)",
1067 .dependencies = featureSet(&[_]Feature{
1068 .predres,
1069 }),
1070 };
939 result[@enumToInt(Feature.specrestrict)] = .{1071 result[@enumToInt(Feature.specrestrict)] = .{
940 .llvm_name = "specrestrict",1072 .llvm_name = "specrestrict",
941 .description = "Enable architectural speculation restriction",1073 .description = "Enable architectural speculation restriction (FEAT_CSV2_2)",
942 .dependencies = featureSet(&[_]Feature{}),1074 .dependencies = featureSet(&[_]Feature{}),
943 };1075 };
944 result[@enumToInt(Feature.ssbs)] = .{1076 result[@enumToInt(Feature.ssbs)] = .{
945 .llvm_name = "ssbs",1077 .llvm_name = "ssbs",
946 .description = "Enable Speculative Store Bypass Safe bit",1078 .description = "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)",
947 .dependencies = featureSet(&[_]Feature{}),1079 .dependencies = featureSet(&[_]Feature{}),
948 };1080 };
949 result[@enumToInt(Feature.strict_align)] = .{1081 result[@enumToInt(Feature.strict_align)] = .{
...@@ -953,14 +1085,14 @@ pub const all_features = blk: {...@@ -953,14 +1085,14 @@ pub const all_features = blk: {
953 };1085 };
954 result[@enumToInt(Feature.sve)] = .{1086 result[@enumToInt(Feature.sve)] = .{
955 .llvm_name = "sve",1087 .llvm_name = "sve",
956 .description = "Enable Scalable Vector Extension (SVE) instructions",1088 .description = "Enable Scalable Vector Extension (SVE) instructions (FEAT_SVE)",
957 .dependencies = featureSet(&[_]Feature{1089 .dependencies = featureSet(&[_]Feature{
958 .fullfp16,1090 .fullfp16,
959 }),1091 }),
960 };1092 };
961 result[@enumToInt(Feature.sve2)] = .{1093 result[@enumToInt(Feature.sve2)] = .{
962 .llvm_name = "sve2",1094 .llvm_name = "sve2",
963 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",1095 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions (FEAT_SVE2)",
964 .dependencies = featureSet(&[_]Feature{1096 .dependencies = featureSet(&[_]Feature{
965 .sve,1097 .sve,
966 .use_scalar_inc_vl,1098 .use_scalar_inc_vl,
...@@ -968,7 +1100,7 @@ pub const all_features = blk: {...@@ -968,7 +1100,7 @@ pub const all_features = blk: {
968 };1100 };
969 result[@enumToInt(Feature.sve2_aes)] = .{1101 result[@enumToInt(Feature.sve2_aes)] = .{
970 .llvm_name = "sve2-aes",1102 .llvm_name = "sve2-aes",
971 .description = "Enable AES SVE2 instructions",1103 .description = "Enable AES SVE2 instructions (FEAT_SVE_AES, FEAT_SVE_PMULL128)",
972 .dependencies = featureSet(&[_]Feature{1104 .dependencies = featureSet(&[_]Feature{
973 .aes,1105 .aes,
974 .sve2,1106 .sve2,
...@@ -976,14 +1108,14 @@ pub const all_features = blk: {...@@ -976,14 +1108,14 @@ pub const all_features = blk: {
976 };1108 };
977 result[@enumToInt(Feature.sve2_bitperm)] = .{1109 result[@enumToInt(Feature.sve2_bitperm)] = .{
978 .llvm_name = "sve2-bitperm",1110 .llvm_name = "sve2-bitperm",
979 .description = "Enable bit permutation SVE2 instructions",1111 .description = "Enable bit permutation SVE2 instructions (FEAT_SVE_BitPerm)",
980 .dependencies = featureSet(&[_]Feature{1112 .dependencies = featureSet(&[_]Feature{
981 .sve2,1113 .sve2,
982 }),1114 }),
983 };1115 };
984 result[@enumToInt(Feature.sve2_sha3)] = .{1116 result[@enumToInt(Feature.sve2_sha3)] = .{
985 .llvm_name = "sve2-sha3",1117 .llvm_name = "sve2-sha3",
986 .description = "Enable SHA3 SVE2 instructions",1118 .description = "Enable SHA3 SVE2 instructions (FEAT_SVE_SHA3)",
987 .dependencies = featureSet(&[_]Feature{1119 .dependencies = featureSet(&[_]Feature{
988 .sha3,1120 .sha3,
989 .sve2,1121 .sve2,
...@@ -991,25 +1123,37 @@ pub const all_features = blk: {...@@ -991,25 +1123,37 @@ pub const all_features = blk: {
991 };1123 };
992 result[@enumToInt(Feature.sve2_sm4)] = .{1124 result[@enumToInt(Feature.sve2_sm4)] = .{
993 .llvm_name = "sve2-sm4",1125 .llvm_name = "sve2-sm4",
994 .description = "Enable SM4 SVE2 instructions",1126 .description = "Enable SM4 SVE2 instructions (FEAT_SVE_SM4)",
995 .dependencies = featureSet(&[_]Feature{1127 .dependencies = featureSet(&[_]Feature{
996 .sm4,1128 .sm4,
997 .sve2,1129 .sve2,
998 }),1130 }),
999 };1131 };
1132 result[@enumToInt(Feature.sve2p1)] = .{
1133 .llvm_name = "sve2p1",
1134 .description = "Enable Scalable Vector Extension 2.1 instructions",
1135 .dependencies = featureSet(&[_]Feature{
1136 .sve2,
1137 }),
1138 };
1000 result[@enumToInt(Feature.tagged_globals)] = .{1139 result[@enumToInt(Feature.tagged_globals)] = .{
1001 .llvm_name = "tagged-globals",1140 .llvm_name = "tagged-globals",
1002 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",1141 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
1003 .dependencies = featureSet(&[_]Feature{}),1142 .dependencies = featureSet(&[_]Feature{}),
1004 };1143 };
1144 result[@enumToInt(Feature.the)] = .{
1145 .llvm_name = "the",
1146 .description = "Enable Armv8.9-A Translation Hardening Extension (FEAT_THE)",
1147 .dependencies = featureSet(&[_]Feature{}),
1148 };
1005 result[@enumToInt(Feature.tlb_rmi)] = .{1149 result[@enumToInt(Feature.tlb_rmi)] = .{
1006 .llvm_name = "tlb-rmi",1150 .llvm_name = "tlb-rmi",
1007 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",1151 .description = "Enable v8.4-A TLB Range and Maintenance Instructions (FEAT_TLBIOS, FEAT_TLBIRANGE)",
1008 .dependencies = featureSet(&[_]Feature{}),1152 .dependencies = featureSet(&[_]Feature{}),
1009 };1153 };
1010 result[@enumToInt(Feature.tme)] = .{1154 result[@enumToInt(Feature.tme)] = .{
1011 .llvm_name = "tme",1155 .llvm_name = "tme",
1012 .description = "Enable Transactional Memory Extension",1156 .description = "Enable Transactional Memory Extension (FEAT_TME)",
1013 .dependencies = featureSet(&[_]Feature{}),1157 .dependencies = featureSet(&[_]Feature{}),
1014 };1158 };
1015 result[@enumToInt(Feature.tpidr_el1)] = .{1159 result[@enumToInt(Feature.tpidr_el1)] = .{
...@@ -1029,17 +1173,17 @@ pub const all_features = blk: {...@@ -1029,17 +1173,17 @@ pub const all_features = blk: {
1029 };1173 };
1030 result[@enumToInt(Feature.tracev8_4)] = .{1174 result[@enumToInt(Feature.tracev8_4)] = .{
1031 .llvm_name = "tracev8.4",1175 .llvm_name = "tracev8.4",
1032 .description = "Enable v8.4-A Trace extension",1176 .description = "Enable v8.4-A Trace extension (FEAT_TRF)",
1033 .dependencies = featureSet(&[_]Feature{}),1177 .dependencies = featureSet(&[_]Feature{}),
1034 };1178 };
1035 result[@enumToInt(Feature.trbe)] = .{1179 result[@enumToInt(Feature.trbe)] = .{
1036 .llvm_name = "trbe",1180 .llvm_name = "trbe",
1037 .description = "Enable Trace Buffer Extension",1181 .description = "Enable Trace Buffer Extension (FEAT_TRBE)",
1038 .dependencies = featureSet(&[_]Feature{}),1182 .dependencies = featureSet(&[_]Feature{}),
1039 };1183 };
1040 result[@enumToInt(Feature.uaops)] = .{1184 result[@enumToInt(Feature.uaops)] = .{
1041 .llvm_name = "uaops",1185 .llvm_name = "uaops",
1042 .description = "Enable v8.2 UAO PState",1186 .description = "Enable v8.2 UAO PState (FEAT_UAO)",
1043 .dependencies = featureSet(&[_]Feature{}),1187 .dependencies = featureSet(&[_]Feature{}),
1044 };1188 };
1045 result[@enumToInt(Feature.use_experimental_zeroing_pseudos)] = .{1189 result[@enumToInt(Feature.use_experimental_zeroing_pseudos)] = .{
...@@ -1159,9 +1303,22 @@ pub const all_features = blk: {...@@ -1159,9 +1303,22 @@ pub const all_features = blk: {
1159 .dependencies = featureSet(&[_]Feature{1303 .dependencies = featureSet(&[_]Feature{
1160 .hbc,1304 .hbc,
1161 .mops,1305 .mops,
1306 .nmi,
1162 .v8_7a,1307 .v8_7a,
1163 }),1308 }),
1164 };1309 };
1310 result[@enumToInt(Feature.v8_9a)] = .{
1311 .llvm_name = "v8.9a",
1312 .description = "Support ARM v8.9a instructions",
1313 .dependencies = featureSet(&[_]Feature{
1314 .clrbhb,
1315 .cssc,
1316 .prfm_slc_target,
1317 .rasv2,
1318 .specres2,
1319 .v8_8a,
1320 }),
1321 };
1165 result[@enumToInt(Feature.v8a)] = .{1322 result[@enumToInt(Feature.v8a)] = .{
1166 .llvm_name = "v8a",1323 .llvm_name = "v8a",
1167 .description = "Support ARM v8.0a instructions",1324 .description = "Support ARM v8.0a instructions",
...@@ -1221,29 +1378,38 @@ pub const all_features = blk: {...@@ -1221,29 +1378,38 @@ pub const all_features = blk: {
1221 .v9_2a,1378 .v9_2a,
1222 }),1379 }),
1223 };1380 };
1381 result[@enumToInt(Feature.v9_4a)] = .{
1382 .llvm_name = "v9.4a",
1383 .description = "Support ARM v9.4a instructions",
1384 .dependencies = featureSet(&[_]Feature{
1385 .v8_9a,
1386 .v9_3a,
1387 }),
1388 };
1224 result[@enumToInt(Feature.v9a)] = .{1389 result[@enumToInt(Feature.v9a)] = .{
1225 .llvm_name = "v9a",1390 .llvm_name = "v9a",
1226 .description = "Support ARM v9a instructions",1391 .description = "Support ARM v9a instructions",
1227 .dependencies = featureSet(&[_]Feature{1392 .dependencies = featureSet(&[_]Feature{
1393 .mec,
1228 .sve2,1394 .sve2,
1229 .v8_5a,1395 .v8_5a,
1230 }),1396 }),
1231 };1397 };
1232 result[@enumToInt(Feature.vh)] = .{1398 result[@enumToInt(Feature.vh)] = .{
1233 .llvm_name = "vh",1399 .llvm_name = "vh",
1234 .description = "Enables ARM v8.1 Virtual Host extension",1400 .description = "Enables ARM v8.1 Virtual Host extension (FEAT_VHE)",
1235 .dependencies = featureSet(&[_]Feature{1401 .dependencies = featureSet(&[_]Feature{
1236 .contextidr_el2,1402 .contextidr_el2,
1237 }),1403 }),
1238 };1404 };
1239 result[@enumToInt(Feature.wfxt)] = .{1405 result[@enumToInt(Feature.wfxt)] = .{
1240 .llvm_name = "wfxt",1406 .llvm_name = "wfxt",
1241 .description = "Enable Armv8.7-A WFET and WFIT instruction",1407 .description = "Enable Armv8.7-A WFET and WFIT instruction (FEAT_WFxT)",
1242 .dependencies = featureSet(&[_]Feature{}),1408 .dependencies = featureSet(&[_]Feature{}),
1243 };1409 };
1244 result[@enumToInt(Feature.xs)] = .{1410 result[@enumToInt(Feature.xs)] = .{
1245 .llvm_name = "xs",1411 .llvm_name = "xs",
1246 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction",1412 .description = "Enable Armv8.7-A limited-TLB-maintenance instruction (FEAT_XS)",
1247 .dependencies = featureSet(&[_]Feature{}),1413 .dependencies = featureSet(&[_]Feature{}),
1248 };1414 };
1249 result[@enumToInt(Feature.zcm)] = .{1415 result[@enumToInt(Feature.zcm)] = .{
...@@ -1296,6 +1462,26 @@ pub const cpu = struct {...@@ -1296,6 +1462,26 @@ pub const cpu = struct {
1296 .name = "ampere1",1462 .name = "ampere1",
1297 .llvm_name = "ampere1",1463 .llvm_name = "ampere1",
1298 .features = featureSet(&[_]Feature{1464 .features = featureSet(&[_]Feature{
1465 .aes,
1466 .aggressive_fma,
1467 .arith_bcc_fusion,
1468 .cmp_bcc_fusion,
1469 .fuse_address,
1470 .fuse_aes,
1471 .fuse_literals,
1472 .lsl_fast,
1473 .perfmon,
1474 .rand,
1475 .sha3,
1476 .use_postra_scheduler,
1477 .v8_6a,
1478 }),
1479 };
1480 pub const ampere1a = CpuModel{
1481 .name = "ampere1a",
1482 .llvm_name = "ampere1a",
1483 .features = featureSet(&[_]Feature{
1484 .aes,
1299 .aggressive_fma,1485 .aggressive_fma,
1300 .arith_bcc_fusion,1486 .arith_bcc_fusion,
1301 .cmp_bcc_fusion,1487 .cmp_bcc_fusion,
...@@ -1305,6 +1491,9 @@ pub const cpu = struct {...@@ -1305,6 +1491,9 @@ pub const cpu = struct {
1305 .lsl_fast,1491 .lsl_fast,
1306 .mte,1492 .mte,
1307 .perfmon,1493 .perfmon,
1494 .rand,
1495 .sha3,
1496 .sm4,
1308 .use_postra_scheduler,1497 .use_postra_scheduler,
1309 .v8_6a,1498 .v8_6a,
1310 }),1499 }),
...@@ -1418,6 +1607,53 @@ pub const cpu = struct {...@@ -1418,6 +1607,53 @@ pub const cpu = struct {
1418 .zcz,1607 .zcz,
1419 }),1608 }),
1420 };1609 };
1610 pub const apple_a15 = CpuModel{
1611 .name = "apple_a15",
1612 .llvm_name = "apple-a15",
1613 .features = featureSet(&[_]Feature{
1614 .alternate_sextload_cvt_f32_pattern,
1615 .arith_bcc_fusion,
1616 .arith_cbz_fusion,
1617 .crypto,
1618 .disable_latency_sched_heuristic,
1619 .fp16fml,
1620 .fuse_address,
1621 .fuse_aes,
1622 .fuse_arith_logic,
1623 .fuse_crypto_eor,
1624 .fuse_csel,
1625 .fuse_literals,
1626 .perfmon,
1627 .sha3,
1628 .v8_6a,
1629 .zcm,
1630 .zcz,
1631 }),
1632 };
1633 pub const apple_a16 = CpuModel{
1634 .name = "apple_a16",
1635 .llvm_name = "apple-a16",
1636 .features = featureSet(&[_]Feature{
1637 .alternate_sextload_cvt_f32_pattern,
1638 .arith_bcc_fusion,
1639 .arith_cbz_fusion,
1640 .crypto,
1641 .disable_latency_sched_heuristic,
1642 .fp16fml,
1643 .fuse_address,
1644 .fuse_aes,
1645 .fuse_arith_logic,
1646 .fuse_crypto_eor,
1647 .fuse_csel,
1648 .fuse_literals,
1649 .hcx,
1650 .perfmon,
1651 .sha3,
1652 .v8_6a,
1653 .zcm,
1654 .zcz,
1655 }),
1656 };
1421 pub const apple_a7 = CpuModel{1657 pub const apple_a7 = CpuModel{
1422 .name = "apple_a7",1658 .name = "apple_a7",
1423 .llvm_name = "apple-a7",1659 .llvm_name = "apple-a7",
...@@ -1476,30 +1712,22 @@ pub const cpu = struct {...@@ -1476,30 +1712,22 @@ pub const cpu = struct {
1476 .name = "apple_latest",1712 .name = "apple_latest",
1477 .llvm_name = "apple-latest",1713 .llvm_name = "apple-latest",
1478 .features = featureSet(&[_]Feature{1714 .features = featureSet(&[_]Feature{
1479 .aggressive_fma,
1480 .alternate_sextload_cvt_f32_pattern,1715 .alternate_sextload_cvt_f32_pattern,
1481 .altnzcv,
1482 .arith_bcc_fusion,1716 .arith_bcc_fusion,
1483 .arith_cbz_fusion,1717 .arith_cbz_fusion,
1484 .ccdp,
1485 .crypto,1718 .crypto,
1486 .disable_latency_sched_heuristic,1719 .disable_latency_sched_heuristic,
1487 .fp16fml,1720 .fp16fml,
1488 .fptoint,
1489 .fuse_address,1721 .fuse_address,
1490 .fuse_adrp_add,
1491 .fuse_aes,1722 .fuse_aes,
1492 .fuse_arith_logic,1723 .fuse_arith_logic,
1493 .fuse_crypto_eor,1724 .fuse_crypto_eor,
1494 .fuse_csel,1725 .fuse_csel,
1495 .fuse_literals,1726 .fuse_literals,
1727 .hcx,
1496 .perfmon,1728 .perfmon,
1497 .predres,
1498 .sb,
1499 .sha3,1729 .sha3,
1500 .specrestrict,1730 .v8_6a,
1501 .ssbs,
1502 .v8_4a,
1503 .zcm,1731 .zcm,
1504 .zcz,1732 .zcz,
1505 }),1733 }),
...@@ -1536,6 +1764,29 @@ pub const cpu = struct {...@@ -1536,6 +1764,29 @@ pub const cpu = struct {
1536 .zcz,1764 .zcz,
1537 }),1765 }),
1538 };1766 };
1767 pub const apple_m2 = CpuModel{
1768 .name = "apple_m2",
1769 .llvm_name = "apple-m2",
1770 .features = featureSet(&[_]Feature{
1771 .alternate_sextload_cvt_f32_pattern,
1772 .arith_bcc_fusion,
1773 .arith_cbz_fusion,
1774 .crypto,
1775 .disable_latency_sched_heuristic,
1776 .fp16fml,
1777 .fuse_address,
1778 .fuse_aes,
1779 .fuse_arith_logic,
1780 .fuse_crypto_eor,
1781 .fuse_csel,
1782 .fuse_literals,
1783 .perfmon,
1784 .sha3,
1785 .v8_6a,
1786 .zcm,
1787 .zcz,
1788 }),
1789 };
1539 pub const apple_s4 = CpuModel{1790 pub const apple_s4 = CpuModel{
1540 .name = "apple_s4",1791 .name = "apple_s4",
1541 .llvm_name = "apple-s4",1792 .llvm_name = "apple-s4",
...@@ -1624,6 +1875,7 @@ pub const cpu = struct {...@@ -1624,6 +1875,7 @@ pub const cpu = struct {
1624 .crc,1875 .crc,
1625 .crypto,1876 .crypto,
1626 .custom_cheap_as_move,1877 .custom_cheap_as_move,
1878 .fuse_adrp_add,
1627 .fuse_aes,1879 .fuse_aes,
1628 .perfmon,1880 .perfmon,
1629 .use_postra_scheduler,1881 .use_postra_scheduler,
...@@ -1638,6 +1890,7 @@ pub const cpu = struct {...@@ -1638,6 +1890,7 @@ pub const cpu = struct {
1638 .dotprod,1890 .dotprod,
1639 .fullfp16,1891 .fullfp16,
1640 .fuse_address,1892 .fuse_address,
1893 .fuse_adrp_add,
1641 .fuse_aes,1894 .fuse_aes,
1642 .perfmon,1895 .perfmon,
1643 .rcpc,1896 .rcpc,
...@@ -1653,6 +1906,7 @@ pub const cpu = struct {...@@ -1653,6 +1906,7 @@ pub const cpu = struct {
1653 .crc,1906 .crc,
1654 .crypto,1907 .crypto,
1655 .custom_cheap_as_move,1908 .custom_cheap_as_move,
1909 .enable_select_opt,
1656 .fuse_adrp_add,1910 .fuse_adrp_add,
1657 .fuse_aes,1911 .fuse_aes,
1658 .fuse_literals,1912 .fuse_literals,
...@@ -1705,12 +1959,34 @@ pub const cpu = struct {...@@ -1705,12 +1959,34 @@ pub const cpu = struct {
1705 .v9a,1959 .v9a,
1706 }),1960 }),
1707 };1961 };
1962 pub const cortex_a715 = CpuModel{
1963 .name = "cortex_a715",
1964 .llvm_name = "cortex-a715",
1965 .features = featureSet(&[_]Feature{
1966 .bf16,
1967 .cmp_bcc_fusion,
1968 .enable_select_opt,
1969 .ete,
1970 .fp16fml,
1971 .fuse_adrp_add,
1972 .fuse_aes,
1973 .i8mm,
1974 .lsl_fast,
1975 .mte,
1976 .perfmon,
1977 .spe,
1978 .sve2_bitperm,
1979 .use_postra_scheduler,
1980 .v9a,
1981 }),
1982 };
1708 pub const cortex_a72 = CpuModel{1983 pub const cortex_a72 = CpuModel{
1709 .name = "cortex_a72",1984 .name = "cortex_a72",
1710 .llvm_name = "cortex-a72",1985 .llvm_name = "cortex-a72",
1711 .features = featureSet(&[_]Feature{1986 .features = featureSet(&[_]Feature{
1712 .crc,1987 .crc,
1713 .crypto,1988 .crypto,
1989 .enable_select_opt,
1714 .fuse_adrp_add,1990 .fuse_adrp_add,
1715 .fuse_aes,1991 .fuse_aes,
1716 .fuse_literals,1992 .fuse_literals,
...@@ -1724,6 +2000,8 @@ pub const cpu = struct {...@@ -1724,6 +2000,8 @@ pub const cpu = struct {
1724 .features = featureSet(&[_]Feature{2000 .features = featureSet(&[_]Feature{
1725 .crc,2001 .crc,
1726 .crypto,2002 .crypto,
2003 .enable_select_opt,
2004 .fuse_adrp_add,
1727 .fuse_aes,2005 .fuse_aes,
1728 .perfmon,2006 .perfmon,
1729 .v8a,2007 .v8a,
...@@ -1735,7 +2013,9 @@ pub const cpu = struct {...@@ -1735,7 +2013,9 @@ pub const cpu = struct {
1735 .features = featureSet(&[_]Feature{2013 .features = featureSet(&[_]Feature{
1736 .crypto,2014 .crypto,
1737 .dotprod,2015 .dotprod,
2016 .enable_select_opt,
1738 .fullfp16,2017 .fullfp16,
2018 .fuse_adrp_add,
1739 .fuse_aes,2019 .fuse_aes,
1740 .perfmon,2020 .perfmon,
1741 .rcpc,2021 .rcpc,
...@@ -1777,8 +2057,11 @@ pub const cpu = struct {...@@ -1777,8 +2057,11 @@ pub const cpu = struct {
1777 .cmp_bcc_fusion,2057 .cmp_bcc_fusion,
1778 .crypto,2058 .crypto,
1779 .dotprod,2059 .dotprod,
2060 .enable_select_opt,
1780 .fullfp16,2061 .fullfp16,
2062 .fuse_adrp_add,
1781 .fuse_aes,2063 .fuse_aes,
2064 .lsl_fast,
1782 .perfmon,2065 .perfmon,
1783 .rcpc,2066 .rcpc,
1784 .ssbs,2067 .ssbs,
...@@ -1837,8 +2120,11 @@ pub const cpu = struct {...@@ -1837,8 +2120,11 @@ pub const cpu = struct {
1837 .cmp_bcc_fusion,2120 .cmp_bcc_fusion,
1838 .crypto,2121 .crypto,
1839 .dotprod,2122 .dotprod,
2123 .enable_select_opt,
1840 .fullfp16,2124 .fullfp16,
2125 .fuse_adrp_add,
1841 .fuse_aes,2126 .fuse_aes,
2127 .lsl_fast,
1842 .perfmon,2128 .perfmon,
1843 .rcpc,2129 .rcpc,
1844 .spe,2130 .spe,
...@@ -1854,11 +2140,16 @@ pub const cpu = struct {...@@ -1854,11 +2140,16 @@ pub const cpu = struct {
1854 .cmp_bcc_fusion,2140 .cmp_bcc_fusion,
1855 .crypto,2141 .crypto,
1856 .dotprod,2142 .dotprod,
2143 .enable_select_opt,
2144 .flagm,
1857 .fullfp16,2145 .fullfp16,
2146 .fuse_adrp_add,
1858 .fuse_aes,2147 .fuse_aes,
2148 .lse2,
2149 .lsl_fast,
1859 .pauth,2150 .pauth,
1860 .perfmon,2151 .perfmon,
1861 .rcpc,2152 .rcpc_immo,
1862 .spe,2153 .spe,
1863 .ssbs,2154 .ssbs,
1864 .use_postra_scheduler,2155 .use_postra_scheduler,
...@@ -1871,12 +2162,35 @@ pub const cpu = struct {...@@ -1871,12 +2162,35 @@ pub const cpu = struct {
1871 .features = featureSet(&[_]Feature{2162 .features = featureSet(&[_]Feature{
1872 .bf16,2163 .bf16,
1873 .cmp_bcc_fusion,2164 .cmp_bcc_fusion,
2165 .enable_select_opt,
2166 .ete,
2167 .fp16fml,
2168 .fuse_adrp_add,
2169 .fuse_aes,
2170 .i8mm,
2171 .lsl_fast,
2172 .mte,
2173 .perfmon,
2174 .sve2_bitperm,
2175 .use_postra_scheduler,
2176 .v9a,
2177 }),
2178 };
2179 pub const cortex_x3 = CpuModel{
2180 .name = "cortex_x3",
2181 .llvm_name = "cortex-x3",
2182 .features = featureSet(&[_]Feature{
2183 .bf16,
2184 .enable_select_opt,
1874 .ete,2185 .ete,
1875 .fp16fml,2186 .fp16fml,
2187 .fuse_adrp_add,
1876 .fuse_aes,2188 .fuse_aes,
1877 .i8mm,2189 .i8mm,
2190 .lsl_fast,
1878 .mte,2191 .mte,
1879 .perfmon,2192 .perfmon,
2193 .spe,
1880 .sve2_bitperm,2194 .sve2_bitperm,
1881 .use_postra_scheduler,2195 .use_postra_scheduler,
1882 .v9a,2196 .v9a,
...@@ -2032,6 +2346,7 @@ pub const cpu = struct {...@@ -2032,6 +2346,7 @@ pub const cpu = struct {
2032 .name = "generic",2346 .name = "generic",
2033 .llvm_name = "generic",2347 .llvm_name = "generic",
2034 .features = featureSet(&[_]Feature{2348 .features = featureSet(&[_]Feature{
2349 .enable_select_opt,
2035 .ete,2350 .ete,
2036 .fuse_adrp_add,2351 .fuse_adrp_add,
2037 .fuse_aes,2352 .fuse_aes,
...@@ -2061,9 +2376,12 @@ pub const cpu = struct {...@@ -2061,9 +2376,12 @@ pub const cpu = struct {
2061 .bf16,2376 .bf16,
2062 .ccdp,2377 .ccdp,
2063 .crypto,2378 .crypto,
2379 .enable_select_opt,
2064 .fp16fml,2380 .fp16fml,
2381 .fuse_adrp_add,
2065 .fuse_aes,2382 .fuse_aes,
2066 .i8mm,2383 .i8mm,
2384 .lsl_fast,
2067 .perfmon,2385 .perfmon,
2068 .rand,2386 .rand,
2069 .spe,2387 .spe,
...@@ -2080,6 +2398,7 @@ pub const cpu = struct {...@@ -2080,6 +2398,7 @@ pub const cpu = struct {
2080 .crypto,2398 .crypto,
2081 .dotprod,2399 .dotprod,
2082 .fullfp16,2400 .fullfp16,
2401 .fuse_adrp_add,
2083 .fuse_aes,2402 .fuse_aes,
2084 .perfmon,2403 .perfmon,
2085 .rcpc,2404 .rcpc,
...@@ -2094,8 +2413,11 @@ pub const cpu = struct {...@@ -2094,8 +2413,11 @@ pub const cpu = struct {
2094 .features = featureSet(&[_]Feature{2413 .features = featureSet(&[_]Feature{
2095 .crypto,2414 .crypto,
2096 .dotprod,2415 .dotprod,
2416 .enable_select_opt,
2097 .fullfp16,2417 .fullfp16,
2418 .fuse_adrp_add,
2098 .fuse_aes,2419 .fuse_aes,
2420 .lsl_fast,
2099 .perfmon,2421 .perfmon,
2100 .rcpc,2422 .rcpc,
2101 .spe,2423 .spe,
...@@ -2110,9 +2432,12 @@ pub const cpu = struct {...@@ -2110,9 +2432,12 @@ pub const cpu = struct {
2110 .features = featureSet(&[_]Feature{2432 .features = featureSet(&[_]Feature{
2111 .bf16,2433 .bf16,
2112 .crypto,2434 .crypto,
2435 .enable_select_opt,
2113 .ete,2436 .ete,
2437 .fuse_adrp_add,
2114 .fuse_aes,2438 .fuse_aes,
2115 .i8mm,2439 .i8mm,
2440 .lsl_fast,
2116 .mte,2441 .mte,
2117 .perfmon,2442 .perfmon,
2118 .sve2_bitperm,2443 .sve2_bitperm,
...@@ -2127,9 +2452,12 @@ pub const cpu = struct {...@@ -2127,9 +2452,12 @@ pub const cpu = struct {
2127 .bf16,2452 .bf16,
2128 .ccdp,2453 .ccdp,
2129 .crypto,2454 .crypto,
2455 .enable_select_opt,
2130 .fp16fml,2456 .fp16fml,
2457 .fuse_adrp_add,
2131 .fuse_aes,2458 .fuse_aes,
2132 .i8mm,2459 .i8mm,
2460 .lsl_fast,
2133 .perfmon,2461 .perfmon,
2134 .rand,2462 .rand,
2135 .spe,2463 .spe,
...@@ -2139,6 +2467,26 @@ pub const cpu = struct {...@@ -2139,6 +2467,26 @@ pub const cpu = struct {
2139 .v8_4a,2467 .v8_4a,
2140 }),2468 }),
2141 };2469 };
2470 pub const neoverse_v2 = CpuModel{
2471 .name = "neoverse_v2",
2472 .llvm_name = "neoverse-v2",
2473 .features = featureSet(&[_]Feature{
2474 .bf16,
2475 .enable_select_opt,
2476 .ete,
2477 .fp16fml,
2478 .fuse_aes,
2479 .i8mm,
2480 .lsl_fast,
2481 .mte,
2482 .perfmon,
2483 .rand,
2484 .spe,
2485 .sve2_bitperm,
2486 .use_postra_scheduler,
2487 .v9a,
2488 }),
2489 };
2142 pub const saphira = CpuModel{2490 pub const saphira = CpuModel{
2143 .name = "saphira",2491 .name = "saphira",
2144 .llvm_name = "saphira",2492 .llvm_name = "saphira",
lib/std/target/amdgpu.zig+79-3
...@@ -14,6 +14,7 @@ pub const Feature = enum {...@@ -14,6 +14,7 @@ pub const Feature = enum {
14 atomic_fadd_rtn_insts,14 atomic_fadd_rtn_insts,
15 atomic_pk_fadd_no_rtn_insts,15 atomic_pk_fadd_no_rtn_insts,
16 auto_waitcnt_before_barrier,16 auto_waitcnt_before_barrier,
17 back_off_barrier,
17 ci_insts,18 ci_insts,
18 cumode,19 cumode,
19 dl_insts,20 dl_insts,
...@@ -25,6 +26,7 @@ pub const Feature = enum {...@@ -25,6 +26,7 @@ pub const Feature = enum {
25 dot6_insts,26 dot6_insts,
26 dot7_insts,27 dot7_insts,
27 dot8_insts,28 dot8_insts,
29 dot9_insts,
28 dpp,30 dpp,
29 dpp8,31 dpp8,
30 dpp_64bit,32 dpp_64bit,
...@@ -34,6 +36,7 @@ pub const Feature = enum {...@@ -34,6 +36,7 @@ pub const Feature = enum {
34 fast_denormal_f32,36 fast_denormal_f32,
35 fast_fmaf,37 fast_fmaf,
36 flat_address_space,38 flat_address_space,
39 flat_atomic_fadd_f32_inst,
37 flat_for_global,40 flat_for_global,
38 flat_global_insts,41 flat_global_insts,
39 flat_inst_offsets,42 flat_inst_offsets,
...@@ -41,6 +44,7 @@ pub const Feature = enum {...@@ -41,6 +44,7 @@ pub const Feature = enum {
41 flat_scratch_insts,44 flat_scratch_insts,
42 flat_segment_offset_bug,45 flat_segment_offset_bug,
43 fma_mix_insts,46 fma_mix_insts,
47 fmacf64_inst,
44 fmaf,48 fmaf,
45 fp64,49 fp64,
46 fp8_insts,50 fp8_insts,
...@@ -54,6 +58,7 @@ pub const Feature = enum {...@@ -54,6 +58,7 @@ pub const Feature = enum {
54 gfx10_b_encoding,58 gfx10_b_encoding,
55 gfx10_insts,59 gfx10_insts,
56 gfx11,60 gfx11,
61 gfx11_full_vgprs,
57 gfx11_insts,62 gfx11_insts,
58 gfx7_gfx8_gfx9_insts,63 gfx7_gfx8_gfx9_insts,
59 gfx8_insts,64 gfx8_insts,
...@@ -75,6 +80,7 @@ pub const Feature = enum {...@@ -75,6 +80,7 @@ pub const Feature = enum {
75 load_store_opt,80 load_store_opt,
76 localmemorysize32768,81 localmemorysize32768,
77 localmemorysize65536,82 localmemorysize65536,
83 mad_intra_fwd_bug,
78 mad_mac_f32_insts,84 mad_mac_f32_insts,
79 mad_mix_insts,85 mad_mix_insts,
80 mai_insts,86 mai_insts,
...@@ -130,6 +136,7 @@ pub const Feature = enum {...@@ -130,6 +136,7 @@ pub const Feature = enum {
130 unpacked_d16_vmem,136 unpacked_d16_vmem,
131 unsafe_ds_offset_folding,137 unsafe_ds_offset_folding,
132 user_sgpr_init16_bug,138 user_sgpr_init16_bug,
139 valu_trans_use_hazard,
133 vcmpx_exec_war_hazard,140 vcmpx_exec_war_hazard,
134 vcmpx_permlane_hazard,141 vcmpx_permlane_hazard,
135 vgpr_index_mode,142 vgpr_index_mode,
...@@ -162,7 +169,7 @@ pub const all_features = blk: {...@@ -162,7 +169,7 @@ pub const all_features = blk: {
162 };169 };
163 result[@enumToInt(Feature.a16)] = .{170 result[@enumToInt(Feature.a16)] = .{
164 .llvm_name = "a16",171 .llvm_name = "a16",
165 .description = "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands",172 .description = "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands",
166 .dependencies = featureSet(&[_]Feature{}),173 .dependencies = featureSet(&[_]Feature{}),
167 };174 };
168 result[@enumToInt(Feature.add_no_carry_insts)] = .{175 result[@enumToInt(Feature.add_no_carry_insts)] = .{
...@@ -206,6 +213,11 @@ pub const all_features = blk: {...@@ -206,6 +213,11 @@ pub const all_features = blk: {
206 .description = "Hardware automatically inserts waitcnt before barrier",213 .description = "Hardware automatically inserts waitcnt before barrier",
207 .dependencies = featureSet(&[_]Feature{}),214 .dependencies = featureSet(&[_]Feature{}),
208 };215 };
216 result[@enumToInt(Feature.back_off_barrier)] = .{
217 .llvm_name = "back-off-barrier",
218 .description = "Hardware supports backing off s_barrier if an exception occurs",
219 .dependencies = featureSet(&[_]Feature{}),
220 };
209 result[@enumToInt(Feature.ci_insts)] = .{221 result[@enumToInt(Feature.ci_insts)] = .{
210 .llvm_name = "ci-insts",222 .llvm_name = "ci-insts",
211 .description = "Additional instructions for CI+",223 .description = "Additional instructions for CI+",
...@@ -258,7 +270,12 @@ pub const all_features = blk: {...@@ -258,7 +270,12 @@ pub const all_features = blk: {
258 };270 };
259 result[@enumToInt(Feature.dot8_insts)] = .{271 result[@enumToInt(Feature.dot8_insts)] = .{
260 .llvm_name = "dot8-insts",272 .llvm_name = "dot8-insts",
261 .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16, v_dot4_i32_iu8, v_dot8_i32_iu4 instructions",273 .description = "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions",
274 .dependencies = featureSet(&[_]Feature{}),
275 };
276 result[@enumToInt(Feature.dot9_insts)] = .{
277 .llvm_name = "dot9-insts",
278 .description = "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions",
262 .dependencies = featureSet(&[_]Feature{}),279 .dependencies = featureSet(&[_]Feature{}),
263 };280 };
264 result[@enumToInt(Feature.dpp)] = .{281 result[@enumToInt(Feature.dpp)] = .{
...@@ -306,6 +323,11 @@ pub const all_features = blk: {...@@ -306,6 +323,11 @@ pub const all_features = blk: {
306 .description = "Support flat address space",323 .description = "Support flat address space",
307 .dependencies = featureSet(&[_]Feature{}),324 .dependencies = featureSet(&[_]Feature{}),
308 };325 };
326 result[@enumToInt(Feature.flat_atomic_fadd_f32_inst)] = .{
327 .llvm_name = "flat-atomic-fadd-f32-inst",
328 .description = "Has flat_atomic_add_f32 instruction",
329 .dependencies = featureSet(&[_]Feature{}),
330 };
309 result[@enumToInt(Feature.flat_for_global)] = .{331 result[@enumToInt(Feature.flat_for_global)] = .{
310 .llvm_name = "flat-for-global",332 .llvm_name = "flat-for-global",
311 .description = "Force to generate flat instruction for global",333 .description = "Force to generate flat instruction for global",
...@@ -341,6 +363,11 @@ pub const all_features = blk: {...@@ -341,6 +363,11 @@ pub const all_features = blk: {
341 .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",363 .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
342 .dependencies = featureSet(&[_]Feature{}),364 .dependencies = featureSet(&[_]Feature{}),
343 };365 };
366 result[@enumToInt(Feature.fmacf64_inst)] = .{
367 .llvm_name = "fmacf64-inst",
368 .description = "Has v_fmac_f64 instruction",
369 .dependencies = featureSet(&[_]Feature{}),
370 };
344 result[@enumToInt(Feature.fmaf)] = .{371 result[@enumToInt(Feature.fmaf)] = .{
345 .llvm_name = "fmaf",372 .llvm_name = "fmaf",
346 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",373 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
...@@ -487,6 +514,11 @@ pub const all_features = blk: {...@@ -487,6 +514,11 @@ pub const all_features = blk: {
487 .vscnt,514 .vscnt,
488 }),515 }),
489 };516 };
517 result[@enumToInt(Feature.gfx11_full_vgprs)] = .{
518 .llvm_name = "gfx11-full-vgprs",
519 .description = "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10",
520 .dependencies = featureSet(&[_]Feature{}),
521 };
490 result[@enumToInt(Feature.gfx11_insts)] = .{522 result[@enumToInt(Feature.gfx11_insts)] = .{
491 .llvm_name = "gfx11-insts",523 .llvm_name = "gfx11-insts",
492 .description = "Additional instructions for GFX11+",524 .description = "Additional instructions for GFX11+",
...@@ -507,6 +539,7 @@ pub const all_features = blk: {...@@ -507,6 +539,7 @@ pub const all_features = blk: {
507 .description = "GFX9 GPU generation",539 .description = "GFX9 GPU generation",
508 .dependencies = featureSet(&[_]Feature{540 .dependencies = featureSet(&[_]Feature{
509 .@"16_bit_insts",541 .@"16_bit_insts",
542 .a16,
510 .add_no_carry_insts,543 .add_no_carry_insts,
511 .aperture_regs,544 .aperture_regs,
512 .ci_insts,545 .ci_insts,
...@@ -629,6 +662,11 @@ pub const all_features = blk: {...@@ -629,6 +662,11 @@ pub const all_features = blk: {
629 .description = "The size of local memory in bytes",662 .description = "The size of local memory in bytes",
630 .dependencies = featureSet(&[_]Feature{}),663 .dependencies = featureSet(&[_]Feature{}),
631 };664 };
665 result[@enumToInt(Feature.mad_intra_fwd_bug)] = .{
666 .llvm_name = "mad-intra-fwd-bug",
667 .description = "MAD_U64/I64 intra instruction forwarding bug",
668 .dependencies = featureSet(&[_]Feature{}),
669 };
632 result[@enumToInt(Feature.mad_mac_f32_insts)] = .{670 result[@enumToInt(Feature.mad_mac_f32_insts)] = .{
633 .llvm_name = "mad-mac-f32-insts",671 .llvm_name = "mad-mac-f32-insts",
634 .description = "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions",672 .description = "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions",
...@@ -933,6 +971,11 @@ pub const all_features = blk: {...@@ -933,6 +971,11 @@ pub const all_features = blk: {
933 .description = "Bug requiring at least 16 user+system SGPRs to be enabled",971 .description = "Bug requiring at least 16 user+system SGPRs to be enabled",
934 .dependencies = featureSet(&[_]Feature{}),972 .dependencies = featureSet(&[_]Feature{}),
935 };973 };
974 result[@enumToInt(Feature.valu_trans_use_hazard)] = .{
975 .llvm_name = "valu-trans-use-hazard",
976 .description = "Hazard when TRANS instructions are closely followed by a use of the result",
977 .dependencies = featureSet(&[_]Feature{}),
978 };
936 result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{979 result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
937 .llvm_name = "vcmpx-exec-war-hazard",980 .llvm_name = "vcmpx-exec-war-hazard",
938 .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",981 .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
...@@ -1089,6 +1132,7 @@ pub const cpu = struct {...@@ -1089,6 +1132,7 @@ pub const cpu = struct {
1089 .name = "gfx1010",1132 .name = "gfx1010",
1090 .llvm_name = "gfx1010",1133 .llvm_name = "gfx1010",
1091 .features = featureSet(&[_]Feature{1134 .features = featureSet(&[_]Feature{
1135 .back_off_barrier,
1092 .dl_insts,1136 .dl_insts,
1093 .ds_src2_insts,1137 .ds_src2_insts,
1094 .flat_segment_offset_bug,1138 .flat_segment_offset_bug,
...@@ -1120,6 +1164,7 @@ pub const cpu = struct {...@@ -1120,6 +1164,7 @@ pub const cpu = struct {
1120 .name = "gfx1011",1164 .name = "gfx1011",
1121 .llvm_name = "gfx1011",1165 .llvm_name = "gfx1011",
1122 .features = featureSet(&[_]Feature{1166 .features = featureSet(&[_]Feature{
1167 .back_off_barrier,
1123 .dl_insts,1168 .dl_insts,
1124 .dot1_insts,1169 .dot1_insts,
1125 .dot2_insts,1170 .dot2_insts,
...@@ -1156,6 +1201,7 @@ pub const cpu = struct {...@@ -1156,6 +1201,7 @@ pub const cpu = struct {
1156 .name = "gfx1012",1201 .name = "gfx1012",
1157 .llvm_name = "gfx1012",1202 .llvm_name = "gfx1012",
1158 .features = featureSet(&[_]Feature{1203 .features = featureSet(&[_]Feature{
1204 .back_off_barrier,
1159 .dl_insts,1205 .dl_insts,
1160 .dot1_insts,1206 .dot1_insts,
1161 .dot2_insts,1207 .dot2_insts,
...@@ -1192,6 +1238,7 @@ pub const cpu = struct {...@@ -1192,6 +1238,7 @@ pub const cpu = struct {
1192 .name = "gfx1013",1238 .name = "gfx1013",
1193 .llvm_name = "gfx1013",1239 .llvm_name = "gfx1013",
1194 .features = featureSet(&[_]Feature{1240 .features = featureSet(&[_]Feature{
1241 .back_off_barrier,
1195 .dl_insts,1242 .dl_insts,
1196 .ds_src2_insts,1243 .ds_src2_insts,
1197 .flat_segment_offset_bug,1244 .flat_segment_offset_bug,
...@@ -1224,6 +1271,7 @@ pub const cpu = struct {...@@ -1224,6 +1271,7 @@ pub const cpu = struct {
1224 .name = "gfx1030",1271 .name = "gfx1030",
1225 .llvm_name = "gfx1030",1272 .llvm_name = "gfx1030",
1226 .features = featureSet(&[_]Feature{1273 .features = featureSet(&[_]Feature{
1274 .back_off_barrier,
1227 .dl_insts,1275 .dl_insts,
1228 .dot1_insts,1276 .dot1_insts,
1229 .dot2_insts,1277 .dot2_insts,
...@@ -1245,6 +1293,7 @@ pub const cpu = struct {...@@ -1245,6 +1293,7 @@ pub const cpu = struct {
1245 .name = "gfx1031",1293 .name = "gfx1031",
1246 .llvm_name = "gfx1031",1294 .llvm_name = "gfx1031",
1247 .features = featureSet(&[_]Feature{1295 .features = featureSet(&[_]Feature{
1296 .back_off_barrier,
1248 .dl_insts,1297 .dl_insts,
1249 .dot1_insts,1298 .dot1_insts,
1250 .dot2_insts,1299 .dot2_insts,
...@@ -1266,6 +1315,7 @@ pub const cpu = struct {...@@ -1266,6 +1315,7 @@ pub const cpu = struct {
1266 .name = "gfx1032",1315 .name = "gfx1032",
1267 .llvm_name = "gfx1032",1316 .llvm_name = "gfx1032",
1268 .features = featureSet(&[_]Feature{1317 .features = featureSet(&[_]Feature{
1318 .back_off_barrier,
1269 .dl_insts,1319 .dl_insts,
1270 .dot1_insts,1320 .dot1_insts,
1271 .dot2_insts,1321 .dot2_insts,
...@@ -1287,6 +1337,7 @@ pub const cpu = struct {...@@ -1287,6 +1337,7 @@ pub const cpu = struct {
1287 .name = "gfx1033",1337 .name = "gfx1033",
1288 .llvm_name = "gfx1033",1338 .llvm_name = "gfx1033",
1289 .features = featureSet(&[_]Feature{1339 .features = featureSet(&[_]Feature{
1340 .back_off_barrier,
1290 .dl_insts,1341 .dl_insts,
1291 .dot1_insts,1342 .dot1_insts,
1292 .dot2_insts,1343 .dot2_insts,
...@@ -1308,6 +1359,7 @@ pub const cpu = struct {...@@ -1308,6 +1359,7 @@ pub const cpu = struct {
1308 .name = "gfx1034",1359 .name = "gfx1034",
1309 .llvm_name = "gfx1034",1360 .llvm_name = "gfx1034",
1310 .features = featureSet(&[_]Feature{1361 .features = featureSet(&[_]Feature{
1362 .back_off_barrier,
1311 .dl_insts,1363 .dl_insts,
1312 .dot1_insts,1364 .dot1_insts,
1313 .dot2_insts,1365 .dot2_insts,
...@@ -1329,6 +1381,7 @@ pub const cpu = struct {...@@ -1329,6 +1381,7 @@ pub const cpu = struct {
1329 .name = "gfx1035",1381 .name = "gfx1035",
1330 .llvm_name = "gfx1035",1382 .llvm_name = "gfx1035",
1331 .features = featureSet(&[_]Feature{1383 .features = featureSet(&[_]Feature{
1384 .back_off_barrier,
1332 .dl_insts,1385 .dl_insts,
1333 .dot1_insts,1386 .dot1_insts,
1334 .dot2_insts,1387 .dot2_insts,
...@@ -1350,6 +1403,7 @@ pub const cpu = struct {...@@ -1350,6 +1403,7 @@ pub const cpu = struct {
1350 .name = "gfx1036",1403 .name = "gfx1036",
1351 .llvm_name = "gfx1036",1404 .llvm_name = "gfx1036",
1352 .features = featureSet(&[_]Feature{1405 .features = featureSet(&[_]Feature{
1406 .back_off_barrier,
1353 .dl_insts,1407 .dl_insts,
1354 .dot1_insts,1408 .dot1_insts,
1355 .dot2_insts,1409 .dot2_insts,
...@@ -1378,14 +1432,19 @@ pub const cpu = struct {...@@ -1378,14 +1432,19 @@ pub const cpu = struct {
1378 .dot5_insts,1432 .dot5_insts,
1379 .dot7_insts,1433 .dot7_insts,
1380 .dot8_insts,1434 .dot8_insts,
1435 .dot9_insts,
1436 .flat_atomic_fadd_f32_inst,
1381 .gfx11,1437 .gfx11,
1438 .gfx11_full_vgprs,
1382 .image_insts,1439 .image_insts,
1383 .ldsbankcount32,1440 .ldsbankcount32,
1441 .mad_intra_fwd_bug,
1384 .nsa_encoding,1442 .nsa_encoding,
1385 .nsa_max_size_5,1443 .nsa_max_size_5,
1386 .packed_tid,1444 .packed_tid,
1387 .shader_cycles_register,1445 .shader_cycles_register,
1388 .user_sgpr_init16_bug,1446 .user_sgpr_init16_bug,
1447 .valu_trans_use_hazard,
1389 .vcmpx_permlane_hazard,1448 .vcmpx_permlane_hazard,
1390 .wavefrontsize32,1449 .wavefrontsize32,
1391 }),1450 }),
...@@ -1401,13 +1460,18 @@ pub const cpu = struct {...@@ -1401,13 +1460,18 @@ pub const cpu = struct {
1401 .dot5_insts,1460 .dot5_insts,
1402 .dot7_insts,1461 .dot7_insts,
1403 .dot8_insts,1462 .dot8_insts,
1463 .dot9_insts,
1464 .flat_atomic_fadd_f32_inst,
1404 .gfx11,1465 .gfx11,
1466 .gfx11_full_vgprs,
1405 .image_insts,1467 .image_insts,
1406 .ldsbankcount32,1468 .ldsbankcount32,
1469 .mad_intra_fwd_bug,
1407 .nsa_encoding,1470 .nsa_encoding,
1408 .nsa_max_size_5,1471 .nsa_max_size_5,
1409 .packed_tid,1472 .packed_tid,
1410 .shader_cycles_register,1473 .shader_cycles_register,
1474 .valu_trans_use_hazard,
1411 .vcmpx_permlane_hazard,1475 .vcmpx_permlane_hazard,
1412 .wavefrontsize32,1476 .wavefrontsize32,
1413 }),1477 }),
...@@ -1423,14 +1487,18 @@ pub const cpu = struct {...@@ -1423,14 +1487,18 @@ pub const cpu = struct {
1423 .dot5_insts,1487 .dot5_insts,
1424 .dot7_insts,1488 .dot7_insts,
1425 .dot8_insts,1489 .dot8_insts,
1490 .dot9_insts,
1491 .flat_atomic_fadd_f32_inst,
1426 .gfx11,1492 .gfx11,
1427 .image_insts,1493 .image_insts,
1428 .ldsbankcount32,1494 .ldsbankcount32,
1495 .mad_intra_fwd_bug,
1429 .nsa_encoding,1496 .nsa_encoding,
1430 .nsa_max_size_5,1497 .nsa_max_size_5,
1431 .packed_tid,1498 .packed_tid,
1432 .shader_cycles_register,1499 .shader_cycles_register,
1433 .user_sgpr_init16_bug,1500 .user_sgpr_init16_bug,
1501 .valu_trans_use_hazard,
1434 .vcmpx_permlane_hazard,1502 .vcmpx_permlane_hazard,
1435 .wavefrontsize32,1503 .wavefrontsize32,
1436 }),1504 }),
...@@ -1446,14 +1514,17 @@ pub const cpu = struct {...@@ -1446,14 +1514,17 @@ pub const cpu = struct {
1446 .dot5_insts,1514 .dot5_insts,
1447 .dot7_insts,1515 .dot7_insts,
1448 .dot8_insts,1516 .dot8_insts,
1517 .dot9_insts,
1518 .flat_atomic_fadd_f32_inst,
1449 .gfx11,1519 .gfx11,
1450 .image_insts,1520 .image_insts,
1451 .ldsbankcount32,1521 .ldsbankcount32,
1522 .mad_intra_fwd_bug,
1452 .nsa_encoding,1523 .nsa_encoding,
1453 .nsa_max_size_5,1524 .nsa_max_size_5,
1454 .packed_tid,1525 .packed_tid,
1455 .shader_cycles_register,1526 .shader_cycles_register,
1456 .user_sgpr_init16_bug,1527 .valu_trans_use_hazard,
1457 .vcmpx_permlane_hazard,1528 .vcmpx_permlane_hazard,
1458 .wavefrontsize32,1529 .wavefrontsize32,
1459 }),1530 }),
...@@ -1696,6 +1767,7 @@ pub const cpu = struct {...@@ -1696,6 +1767,7 @@ pub const cpu = struct {
1696 .atomic_fadd_no_rtn_insts,1767 .atomic_fadd_no_rtn_insts,
1697 .atomic_fadd_rtn_insts,1768 .atomic_fadd_rtn_insts,
1698 .atomic_pk_fadd_no_rtn_insts,1769 .atomic_pk_fadd_no_rtn_insts,
1770 .back_off_barrier,
1699 .dl_insts,1771 .dl_insts,
1700 .dot1_insts,1772 .dot1_insts,
1701 .dot2_insts,1773 .dot2_insts,
...@@ -1706,6 +1778,7 @@ pub const cpu = struct {...@@ -1706,6 +1778,7 @@ pub const cpu = struct {
1706 .dot7_insts,1778 .dot7_insts,
1707 .dpp_64bit,1779 .dpp_64bit,
1708 .fma_mix_insts,1780 .fma_mix_insts,
1781 .fmacf64_inst,
1709 .full_rate_64_ops,1782 .full_rate_64_ops,
1710 .gfx9,1783 .gfx9,
1711 .gfx90a_insts,1784 .gfx90a_insts,
...@@ -1741,6 +1814,7 @@ pub const cpu = struct {...@@ -1741,6 +1814,7 @@ pub const cpu = struct {
1741 .atomic_fadd_no_rtn_insts,1814 .atomic_fadd_no_rtn_insts,
1742 .atomic_fadd_rtn_insts,1815 .atomic_fadd_rtn_insts,
1743 .atomic_pk_fadd_no_rtn_insts,1816 .atomic_pk_fadd_no_rtn_insts,
1817 .back_off_barrier,
1744 .dl_insts,1818 .dl_insts,
1745 .dot1_insts,1819 .dot1_insts,
1746 .dot2_insts,1820 .dot2_insts,
...@@ -1750,7 +1824,9 @@ pub const cpu = struct {...@@ -1750,7 +1824,9 @@ pub const cpu = struct {
1750 .dot6_insts,1824 .dot6_insts,
1751 .dot7_insts,1825 .dot7_insts,
1752 .dpp_64bit,1826 .dpp_64bit,
1827 .flat_atomic_fadd_f32_inst,
1753 .fma_mix_insts,1828 .fma_mix_insts,
1829 .fmacf64_inst,
1754 .fp8_insts,1830 .fp8_insts,
1755 .full_rate_64_ops,1831 .full_rate_64_ops,
1756 .gfx9,1832 .gfx9,
lib/std/target/arm.zig+69-4
...@@ -17,6 +17,7 @@ pub const Feature = enum {...@@ -17,6 +17,7 @@ pub const Feature = enum {
17 avoid_movs_shop,17 avoid_movs_shop,
18 avoid_partial_cpsr,18 avoid_partial_cpsr,
19 bf16,19 bf16,
20 big_endian_instructions,
20 cde,21 cde,
21 cdecp0,22 cdecp0,
22 cdecp1,23 cdecp1,
...@@ -27,6 +28,7 @@ pub const Feature = enum {...@@ -27,6 +28,7 @@ pub const Feature = enum {
27 cdecp6,28 cdecp6,
28 cdecp7,29 cdecp7,
29 cheap_predicable_cpsr,30 cheap_predicable_cpsr,
31 clrbhb,
30 crc,32 crc,
31 crypto,33 crypto,
32 d32,34 d32,
...@@ -77,11 +79,13 @@ pub const Feature = enum {...@@ -77,11 +79,13 @@ pub const Feature = enum {
77 has_v8_6a,79 has_v8_6a,
78 has_v8_7a,80 has_v8_7a,
79 has_v8_8a,81 has_v8_8a,
82 has_v8_9a,
80 has_v8m,83 has_v8m,
81 has_v8m_main,84 has_v8m_main,
82 has_v9_1a,85 has_v9_1a,
83 has_v9_2a,86 has_v9_2a,
84 has_v9_3a,87 has_v9_3a,
88 has_v9_4a,
85 has_v9a,89 has_v9a,
86 hwdiv,90 hwdiv,
87 hwdiv_arm,91 hwdiv_arm,
...@@ -171,6 +175,7 @@ pub const Feature = enum {...@@ -171,6 +175,7 @@ pub const Feature = enum {
171 v8_6a,175 v8_6a,
172 v8_7a,176 v8_7a,
173 v8_8a,177 v8_8a,
178 v8_9a,
174 v8a,179 v8a,
175 v8m,180 v8m,
176 v8m_main,181 v8m_main,
...@@ -178,6 +183,7 @@ pub const Feature = enum {...@@ -178,6 +183,7 @@ pub const Feature = enum {
178 v9_1a,183 v9_1a,
179 v9_2a,184 v9_2a,
180 v9_3a,185 v9_3a,
186 v9_4a,
181 v9a,187 v9a,
182 vfp2,188 vfp2,
183 vfp2sp,189 vfp2sp,
...@@ -274,6 +280,11 @@ pub const all_features = blk: {...@@ -274,6 +280,11 @@ pub const all_features = blk: {
274 .neon,280 .neon,
275 }),281 }),
276 };282 };
283 result[@enumToInt(Feature.big_endian_instructions)] = .{
284 .llvm_name = "big-endian-instructions",
285 .description = "Expect instructions to be stored big-endian.",
286 .dependencies = featureSet(&[_]Feature{}),
287 };
277 result[@enumToInt(Feature.cde)] = .{288 result[@enumToInt(Feature.cde)] = .{
278 .llvm_name = "cde",289 .llvm_name = "cde",
279 .description = "Support CDE instructions",290 .description = "Support CDE instructions",
...@@ -342,6 +353,11 @@ pub const all_features = blk: {...@@ -342,6 +353,11 @@ pub const all_features = blk: {
342 .description = "Disable +1 predication cost for instructions updating CPSR",353 .description = "Disable +1 predication cost for instructions updating CPSR",
343 .dependencies = featureSet(&[_]Feature{}),354 .dependencies = featureSet(&[_]Feature{}),
344 };355 };
356 result[@enumToInt(Feature.clrbhb)] = .{
357 .llvm_name = "clrbhb",
358 .description = "Enable Clear BHB instruction",
359 .dependencies = featureSet(&[_]Feature{}),
360 };
345 result[@enumToInt(Feature.crc)] = .{361 result[@enumToInt(Feature.crc)] = .{
346 .llvm_name = "crc",362 .llvm_name = "crc",
347 .description = "Enable support for CRC instructions",363 .description = "Enable support for CRC instructions",
...@@ -681,6 +697,14 @@ pub const all_features = blk: {...@@ -681,6 +697,14 @@ pub const all_features = blk: {
681 .has_v8_7a,697 .has_v8_7a,
682 }),698 }),
683 };699 };
700 result[@enumToInt(Feature.has_v8_9a)] = .{
701 .llvm_name = "v8.9a",
702 .description = "Support ARM v8.9a instructions",
703 .dependencies = featureSet(&[_]Feature{
704 .clrbhb,
705 .has_v8_8a,
706 }),
707 };
684 result[@enumToInt(Feature.has_v8m)] = .{708 result[@enumToInt(Feature.has_v8m)] = .{
685 .llvm_name = "v8m",709 .llvm_name = "v8m",
686 .description = "Support ARM v8M Baseline instructions",710 .description = "Support ARM v8M Baseline instructions",
...@@ -719,6 +743,14 @@ pub const all_features = blk: {...@@ -719,6 +743,14 @@ pub const all_features = blk: {
719 .has_v9_2a,743 .has_v9_2a,
720 }),744 }),
721 };745 };
746 result[@enumToInt(Feature.has_v9_4a)] = .{
747 .llvm_name = "v9.4a",
748 .description = "Support ARM v9.4a instructions",
749 .dependencies = featureSet(&[_]Feature{
750 .has_v8_9a,
751 .has_v9_3a,
752 }),
753 };
722 result[@enumToInt(Feature.has_v9a)] = .{754 result[@enumToInt(Feature.has_v9a)] = .{
723 .llvm_name = "v9a",755 .llvm_name = "v9a",
724 .description = "Support ARM v9a instructions",756 .description = "Support ARM v9a instructions",
...@@ -1027,28 +1059,28 @@ pub const all_features = blk: {...@@ -1027,28 +1059,28 @@ pub const all_features = blk: {
1027 .dependencies = featureSet(&[_]Feature{}),1059 .dependencies = featureSet(&[_]Feature{}),
1028 };1060 };
1029 result[@enumToInt(Feature.v2)] = .{1061 result[@enumToInt(Feature.v2)] = .{
1030 .llvm_name = "armv2",1062 .llvm_name = null,
1031 .description = "ARMv2 architecture",1063 .description = "ARMv2 architecture",
1032 .dependencies = featureSet(&[_]Feature{1064 .dependencies = featureSet(&[_]Feature{
1033 .strict_align,1065 .strict_align,
1034 }),1066 }),
1035 };1067 };
1036 result[@enumToInt(Feature.v2a)] = .{1068 result[@enumToInt(Feature.v2a)] = .{
1037 .llvm_name = "armv2a",1069 .llvm_name = null,
1038 .description = "ARMv2a architecture",1070 .description = "ARMv2a architecture",
1039 .dependencies = featureSet(&[_]Feature{1071 .dependencies = featureSet(&[_]Feature{
1040 .strict_align,1072 .strict_align,
1041 }),1073 }),
1042 };1074 };
1043 result[@enumToInt(Feature.v3)] = .{1075 result[@enumToInt(Feature.v3)] = .{
1044 .llvm_name = "armv3",1076 .llvm_name = null,
1045 .description = "ARMv3 architecture",1077 .description = "ARMv3 architecture",
1046 .dependencies = featureSet(&[_]Feature{1078 .dependencies = featureSet(&[_]Feature{
1047 .strict_align,1079 .strict_align,
1048 }),1080 }),
1049 };1081 };
1050 result[@enumToInt(Feature.v3m)] = .{1082 result[@enumToInt(Feature.v3m)] = .{
1051 .llvm_name = "armv3m",1083 .llvm_name = null,
1052 .description = "ARMv3m architecture",1084 .description = "ARMv3m architecture",
1053 .dependencies = featureSet(&[_]Feature{1085 .dependencies = featureSet(&[_]Feature{
1054 .strict_align,1086 .strict_align,
...@@ -1384,6 +1416,23 @@ pub const all_features = blk: {...@@ -1384,6 +1416,23 @@ pub const all_features = blk: {
1384 .virtualization,1416 .virtualization,
1385 }),1417 }),
1386 };1418 };
1419 result[@enumToInt(Feature.v8_9a)] = .{
1420 .llvm_name = "armv8.9-a",
1421 .description = "ARMv89a architecture",
1422 .dependencies = featureSet(&[_]Feature{
1423 .aclass,
1424 .crc,
1425 .crypto,
1426 .db,
1427 .dsp,
1428 .fp_armv8,
1429 .has_v8_9a,
1430 .mp,
1431 .ras,
1432 .trustzone,
1433 .virtualization,
1434 }),
1435 };
1387 result[@enumToInt(Feature.v8a)] = .{1436 result[@enumToInt(Feature.v8a)] = .{
1388 .llvm_name = "armv8-a",1437 .llvm_name = "armv8-a",
1389 .description = "ARMv8a architecture",1438 .description = "ARMv8a architecture",
...@@ -1495,6 +1544,22 @@ pub const all_features = blk: {...@@ -1495,6 +1544,22 @@ pub const all_features = blk: {
1495 .virtualization,1544 .virtualization,
1496 }),1545 }),
1497 };1546 };
1547 result[@enumToInt(Feature.v9_4a)] = .{
1548 .llvm_name = "armv9.4-a",
1549 .description = "ARMv94a architecture",
1550 .dependencies = featureSet(&[_]Feature{
1551 .aclass,
1552 .crc,
1553 .db,
1554 .dsp,
1555 .fp_armv8,
1556 .has_v9_4a,
1557 .mp,
1558 .ras,
1559 .trustzone,
1560 .virtualization,
1561 }),
1562 };
1498 result[@enumToInt(Feature.v9a)] = .{1563 result[@enumToInt(Feature.v9a)] = .{
1499 .llvm_name = "armv9-a",1564 .llvm_name = "armv9-a",
1500 .description = "ARMv9a architecture",1565 .description = "ARMv9a architecture",
lib/std/target/avr.zig+10
...@@ -30,6 +30,7 @@ pub const Feature = enum {...@@ -30,6 +30,7 @@ pub const Feature = enum {
30 memmappedregs,30 memmappedregs,
31 movw,31 movw,
32 mul,32 mul,
33 progmem,
33 rmw,34 rmw,
34 smallstack,35 smallstack,
35 special,36 special,
...@@ -68,6 +69,7 @@ pub const all_features = blk: {...@@ -68,6 +69,7 @@ pub const all_features = blk: {
68 .avr0,69 .avr0,
69 .lpm,70 .lpm,
70 .memmappedregs,71 .memmappedregs,
72 .progmem,
71 }),73 }),
72 };74 };
73 result[@enumToInt(Feature.avr2)] = .{75 result[@enumToInt(Feature.avr2)] = .{
...@@ -156,6 +158,7 @@ pub const all_features = blk: {...@@ -156,6 +158,7 @@ pub const all_features = blk: {
156 .description = "The device is a part of the avr6 family",158 .description = "The device is a part of the avr6 family",
157 .dependencies = featureSet(&[_]Feature{159 .dependencies = featureSet(&[_]Feature{
158 .avr51,160 .avr51,
161 .eijmpcall,
159 }),162 }),
160 };163 };
161 result[@enumToInt(Feature.avrtiny)] = .{164 result[@enumToInt(Feature.avrtiny)] = .{
...@@ -229,6 +232,11 @@ pub const all_features = blk: {...@@ -229,6 +232,11 @@ pub const all_features = blk: {
229 .description = "The device supports the multiplication instructions",232 .description = "The device supports the multiplication instructions",
230 .dependencies = featureSet(&[_]Feature{}),233 .dependencies = featureSet(&[_]Feature{}),
231 };234 };
235 result[@enumToInt(Feature.progmem)] = .{
236 .llvm_name = "progmem",
237 .description = "The device has a separate flash namespace",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
232 result[@enumToInt(Feature.rmw)] = .{240 result[@enumToInt(Feature.rmw)] = .{
233 .llvm_name = "rmw",241 .llvm_name = "rmw",
234 .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",242 .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
...@@ -299,6 +307,7 @@ pub const all_features = blk: {...@@ -299,6 +307,7 @@ pub const all_features = blk: {
299 .lpmx,307 .lpmx,
300 .movw,308 .movw,
301 .mul,309 .mul,
310 .progmem,
302 .spm,311 .spm,
303 .spmx,312 .spmx,
304 .sram,313 .sram,
...@@ -317,6 +326,7 @@ pub const all_features = blk: {...@@ -317,6 +326,7 @@ pub const all_features = blk: {
317 .lpmx,326 .lpmx,
318 .movw,327 .movw,
319 .mul,328 .mul,
329 .progmem,
320 .sram,330 .sram,
321 }),331 }),
322 };332 };
lib/std/target/csky.zig+3-1
...@@ -3075,7 +3075,9 @@ pub const cpu = struct {...@@ -3075,7 +3075,9 @@ pub const cpu = struct {
3075 pub const generic = CpuModel{3075 pub const generic = CpuModel{
3076 .name = "generic",3076 .name = "generic",
3077 .llvm_name = "generic",3077 .llvm_name = "generic",
3078 .features = featureSet(&[_]Feature{}),3078 .features = featureSet(&[_]Feature{
3079 .btst16,
3080 }),
3079 };3081 };
3080 pub const @"i805" = CpuModel{3082 pub const @"i805" = CpuModel{
3081 .name = "i805",3083 .name = "i805",
lib/std/target/hexagon.zig+99
...@@ -21,6 +21,8 @@ pub const Feature = enum {...@@ -21,6 +21,8 @@ pub const Feature = enum {
21 hvxv67,21 hvxv67,
22 hvxv68,22 hvxv68,
23 hvxv69,23 hvxv69,
24 hvxv71,
25 hvxv73,
24 long_calls,26 long_calls,
25 mem_noshuf,27 mem_noshuf,
26 memops,28 memops,
...@@ -42,6 +44,8 @@ pub const Feature = enum {...@@ -42,6 +44,8 @@ pub const Feature = enum {
42 v67,44 v67,
43 v68,45 v68,
44 v69,46 v69,
47 v71,
48 v73,
45 zreg,49 zreg,
46};50};
4751
...@@ -153,6 +157,20 @@ pub const all_features = blk: {...@@ -153,6 +157,20 @@ pub const all_features = blk: {
153 .hvxv68,157 .hvxv68,
154 }),158 }),
155 };159 };
160 result[@enumToInt(Feature.hvxv71)] = .{
161 .llvm_name = "hvxv71",
162 .description = "Hexagon HVX instructions",
163 .dependencies = featureSet(&[_]Feature{
164 .hvxv69,
165 }),
166 };
167 result[@enumToInt(Feature.hvxv73)] = .{
168 .llvm_name = "hvxv73",
169 .description = "Hexagon HVX instructions",
170 .dependencies = featureSet(&[_]Feature{
171 .hvxv71,
172 }),
173 };
156 result[@enumToInt(Feature.long_calls)] = .{174 result[@enumToInt(Feature.long_calls)] = .{
157 .llvm_name = "long-calls",175 .llvm_name = "long-calls",
158 .description = "Use constant-extended calls",176 .description = "Use constant-extended calls",
...@@ -262,6 +280,16 @@ pub const all_features = blk: {...@@ -262,6 +280,16 @@ pub const all_features = blk: {
262 .description = "Enable Hexagon V69 architecture",280 .description = "Enable Hexagon V69 architecture",
263 .dependencies = featureSet(&[_]Feature{}),281 .dependencies = featureSet(&[_]Feature{}),
264 };282 };
283 result[@enumToInt(Feature.v71)] = .{
284 .llvm_name = "v71",
285 .description = "Enable Hexagon V71 architecture",
286 .dependencies = featureSet(&[_]Feature{}),
287 };
288 result[@enumToInt(Feature.v73)] = .{
289 .llvm_name = "v73",
290 .description = "Enable Hexagon V73 architecture",
291 .dependencies = featureSet(&[_]Feature{}),
292 };
265 result[@enumToInt(Feature.zreg)] = .{293 result[@enumToInt(Feature.zreg)] = .{
266 .llvm_name = "zreg",294 .llvm_name = "zreg",
267 .description = "Hexagon ZReg extension instructions",295 .description = "Hexagon ZReg extension instructions",
...@@ -484,4 +512,75 @@ pub const cpu = struct {...@@ -484,4 +512,75 @@ pub const cpu = struct {
484 .v69,512 .v69,
485 }),513 }),
486 };514 };
515 pub const hexagonv71 = CpuModel{
516 .name = "hexagonv71",
517 .llvm_name = "hexagonv71",
518 .features = featureSet(&[_]Feature{
519 .cabac,
520 .compound,
521 .duplex,
522 .mem_noshuf,
523 .memops,
524 .nvj,
525 .nvs,
526 .small_data,
527 .v5,
528 .v55,
529 .v60,
530 .v62,
531 .v65,
532 .v66,
533 .v67,
534 .v68,
535 .v69,
536 .v71,
537 }),
538 };
539 pub const hexagonv71t = CpuModel{
540 .name = "hexagonv71t",
541 .llvm_name = "hexagonv71t",
542 .features = featureSet(&[_]Feature{
543 .audio,
544 .compound,
545 .mem_noshuf,
546 .memops,
547 .nvs,
548 .small_data,
549 .tinycore,
550 .v5,
551 .v55,
552 .v60,
553 .v62,
554 .v65,
555 .v66,
556 .v67,
557 .v68,
558 .v69,
559 .v71,
560 }),
561 };
562 pub const hexagonv73 = CpuModel{
563 .name = "hexagonv73",
564 .llvm_name = "hexagonv73",
565 .features = featureSet(&[_]Feature{
566 .compound,
567 .duplex,
568 .mem_noshuf,
569 .memops,
570 .nvj,
571 .nvs,
572 .small_data,
573 .v5,
574 .v55,
575 .v60,
576 .v62,
577 .v65,
578 .v66,
579 .v67,
580 .v68,
581 .v69,
582 .v71,
583 .v73,
584 }),
585 };
487};586};
lib/std/target/loongarch.zig created+129
...@@ -0,0 +1,129 @@
1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 @"32bit",
9 @"64bit",
10 d,
11 f,
12 la_global_with_abs,
13 la_global_with_pcrel,
14 la_local_with_abs,
15 lasx,
16 lbt,
17 lsx,
18 lvz,
19};
20
21pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
22pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
23pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
24pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
25
26pub const all_features = blk: {
27 const len = @typeInfo(Feature).Enum.fields.len;
28 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
29 var result: [len]CpuFeature = undefined;
30 result[@enumToInt(Feature.@"32bit")] = .{
31 .llvm_name = "32bit",
32 .description = "LA32 Basic Integer and Privilege Instruction Set",
33 .dependencies = featureSet(&[_]Feature{}),
34 };
35 result[@enumToInt(Feature.@"64bit")] = .{
36 .llvm_name = "64bit",
37 .description = "LA64 Basic Integer and Privilege Instruction Set",
38 .dependencies = featureSet(&[_]Feature{}),
39 };
40 result[@enumToInt(Feature.d)] = .{
41 .llvm_name = "d",
42 .description = "'D' (Double-Precision Floating-Point)",
43 .dependencies = featureSet(&[_]Feature{
44 .f,
45 }),
46 };
47 result[@enumToInt(Feature.f)] = .{
48 .llvm_name = "f",
49 .description = "'F' (Single-Precision Floating-Point)",
50 .dependencies = featureSet(&[_]Feature{}),
51 };
52 result[@enumToInt(Feature.la_global_with_abs)] = .{
53 .llvm_name = "la-global-with-abs",
54 .description = "Expand la.global as la.abs",
55 .dependencies = featureSet(&[_]Feature{}),
56 };
57 result[@enumToInt(Feature.la_global_with_pcrel)] = .{
58 .llvm_name = "la-global-with-pcrel",
59 .description = "Expand la.global as la.pcrel",
60 .dependencies = featureSet(&[_]Feature{}),
61 };
62 result[@enumToInt(Feature.la_local_with_abs)] = .{
63 .llvm_name = "la-local-with-abs",
64 .description = "Expand la.local as la.abs",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.lasx)] = .{
68 .llvm_name = "lasx",
69 .description = "'LASX' (Loongson Advanced SIMD Extension)",
70 .dependencies = featureSet(&[_]Feature{
71 .lsx,
72 }),
73 };
74 result[@enumToInt(Feature.lbt)] = .{
75 .llvm_name = "lbt",
76 .description = "'LBT' (Loongson Binary Translation Extension)",
77 .dependencies = featureSet(&[_]Feature{}),
78 };
79 result[@enumToInt(Feature.lsx)] = .{
80 .llvm_name = "lsx",
81 .description = "'LSX' (Loongson SIMD Extension)",
82 .dependencies = featureSet(&[_]Feature{
83 .d,
84 }),
85 };
86 result[@enumToInt(Feature.lvz)] = .{
87 .llvm_name = "lvz",
88 .description = "'LVZ' (Loongson Virtualization Extension)",
89 .dependencies = featureSet(&[_]Feature{}),
90 };
91 const ti = @typeInfo(Feature);
92 for (result) |*elem, i| {
93 elem.index = i;
94 elem.name = ti.Enum.fields[i].name;
95 }
96 break :blk result;
97};
98
99pub const cpu = struct {
100 pub const generic = CpuModel{
101 .name = "generic",
102 .llvm_name = "generic",
103 .features = featureSet(&[_]Feature{}),
104 };
105 pub const generic_la32 = CpuModel{
106 .name = "generic_la32",
107 .llvm_name = "generic-la32",
108 .features = featureSet(&[_]Feature{
109 .@"32bit",
110 }),
111 };
112 pub const generic_la64 = CpuModel{
113 .name = "generic_la64",
114 .llvm_name = "generic-la64",
115 .features = featureSet(&[_]Feature{
116 .@"64bit",
117 }),
118 };
119 pub const la464 = CpuModel{
120 .name = "la464",
121 .llvm_name = "la464",
122 .features = featureSet(&[_]Feature{
123 .@"64bit",
124 .lasx,
125 .lbt,
126 .lvz,
127 }),
128 };
129};
lib/std/target/nvptx.zig+63
...@@ -22,6 +22,9 @@ pub const Feature = enum {...@@ -22,6 +22,9 @@ pub const Feature = enum {
22 ptx73,22 ptx73,
23 ptx74,23 ptx74,
24 ptx75,24 ptx75,
25 ptx76,
26 ptx77,
27 ptx78,
25 sm_20,28 sm_20,
26 sm_21,29 sm_21,
27 sm_30,30 sm_30,
...@@ -39,6 +42,9 @@ pub const Feature = enum {...@@ -39,6 +42,9 @@ pub const Feature = enum {
39 sm_75,42 sm_75,
40 sm_80,43 sm_80,
41 sm_86,44 sm_86,
45 sm_87,
46 sm_89,
47 sm_90,
42};48};
4349
44pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;50pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
...@@ -135,6 +141,21 @@ pub const all_features = blk: {...@@ -135,6 +141,21 @@ pub const all_features = blk: {
135 .description = "Use PTX version 7.5",141 .description = "Use PTX version 7.5",
136 .dependencies = featureSet(&[_]Feature{}),142 .dependencies = featureSet(&[_]Feature{}),
137 };143 };
144 result[@enumToInt(Feature.ptx76)] = .{
145 .llvm_name = "ptx76",
146 .description = "Use PTX version 7.6",
147 .dependencies = featureSet(&[_]Feature{}),
148 };
149 result[@enumToInt(Feature.ptx77)] = .{
150 .llvm_name = "ptx77",
151 .description = "Use PTX version 7.7",
152 .dependencies = featureSet(&[_]Feature{}),
153 };
154 result[@enumToInt(Feature.ptx78)] = .{
155 .llvm_name = "ptx78",
156 .description = "Use PTX version 7.8",
157 .dependencies = featureSet(&[_]Feature{}),
158 };
138 result[@enumToInt(Feature.sm_20)] = .{159 result[@enumToInt(Feature.sm_20)] = .{
139 .llvm_name = "sm_20",160 .llvm_name = "sm_20",
140 .description = "Target SM 2.0",161 .description = "Target SM 2.0",
...@@ -220,6 +241,21 @@ pub const all_features = blk: {...@@ -220,6 +241,21 @@ pub const all_features = blk: {
220 .description = "Target SM 8.6",241 .description = "Target SM 8.6",
221 .dependencies = featureSet(&[_]Feature{}),242 .dependencies = featureSet(&[_]Feature{}),
222 };243 };
244 result[@enumToInt(Feature.sm_87)] = .{
245 .llvm_name = "sm_87",
246 .description = "Target SM 8.7",
247 .dependencies = featureSet(&[_]Feature{}),
248 };
249 result[@enumToInt(Feature.sm_89)] = .{
250 .llvm_name = "sm_89",
251 .description = "Target SM 8.9",
252 .dependencies = featureSet(&[_]Feature{}),
253 };
254 result[@enumToInt(Feature.sm_90)] = .{
255 .llvm_name = "sm_90",
256 .description = "Target SM 9.0",
257 .dependencies = featureSet(&[_]Feature{}),
258 };
223 const ti = @typeInfo(Feature);259 const ti = @typeInfo(Feature);
224 for (result) |*elem, i| {260 for (result) |*elem, i| {
225 elem.index = i;261 elem.index = i;
...@@ -233,6 +269,7 @@ pub const cpu = struct {...@@ -233,6 +269,7 @@ pub const cpu = struct {
233 .name = "sm_20",269 .name = "sm_20",
234 .llvm_name = "sm_20",270 .llvm_name = "sm_20",
235 .features = featureSet(&[_]Feature{271 .features = featureSet(&[_]Feature{
272 .ptx32,
236 .sm_20,273 .sm_20,
237 }),274 }),
238 };275 };
...@@ -240,6 +277,7 @@ pub const cpu = struct {...@@ -240,6 +277,7 @@ pub const cpu = struct {
240 .name = "sm_21",277 .name = "sm_21",
241 .llvm_name = "sm_21",278 .llvm_name = "sm_21",
242 .features = featureSet(&[_]Feature{279 .features = featureSet(&[_]Feature{
280 .ptx32,
243 .sm_21,281 .sm_21,
244 }),282 }),
245 };283 };
...@@ -262,6 +300,7 @@ pub const cpu = struct {...@@ -262,6 +300,7 @@ pub const cpu = struct {
262 .name = "sm_35",300 .name = "sm_35",
263 .llvm_name = "sm_35",301 .llvm_name = "sm_35",
264 .features = featureSet(&[_]Feature{302 .features = featureSet(&[_]Feature{
303 .ptx32,
265 .sm_35,304 .sm_35,
266 }),305 }),
267 };306 };
...@@ -361,4 +400,28 @@ pub const cpu = struct {...@@ -361,4 +400,28 @@ pub const cpu = struct {
361 .sm_86,400 .sm_86,
362 }),401 }),
363 };402 };
403 pub const sm_87 = CpuModel{
404 .name = "sm_87",
405 .llvm_name = "sm_87",
406 .features = featureSet(&[_]Feature{
407 .ptx74,
408 .sm_87,
409 }),
410 };
411 pub const sm_89 = CpuModel{
412 .name = "sm_89",
413 .llvm_name = "sm_89",
414 .features = featureSet(&[_]Feature{
415 .ptx78,
416 .sm_89,
417 }),
418 };
419 pub const sm_90 = CpuModel{
420 .name = "sm_90",
421 .llvm_name = "sm_90",
422 .features = featureSet(&[_]Feature{
423 .ptx78,
424 .sm_90,
425 }),
426 };
364};427};
lib/std/target/powerpc.zig+8
...@@ -19,6 +19,7 @@ pub const Feature = enum {...@@ -19,6 +19,7 @@ pub const Feature = enum {
19 e500,19 e500,
20 efpu2,20 efpu2,
21 extdiv,21 extdiv,
22 fast_MFLR,
22 fcpsgn,23 fcpsgn,
23 float128,24 float128,
24 fpcvt,25 fpcvt,
...@@ -176,6 +177,11 @@ pub const all_features = blk: {...@@ -176,6 +177,11 @@ pub const all_features = blk: {
176 .description = "Enable extended divide instructions",177 .description = "Enable extended divide instructions",
177 .dependencies = featureSet(&[_]Feature{}),178 .dependencies = featureSet(&[_]Feature{}),
178 };179 };
180 result[@enumToInt(Feature.fast_MFLR)] = .{
181 .llvm_name = "fast-MFLR",
182 .description = "MFLR is a fast instruction",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
179 result[@enumToInt(Feature.fcpsgn)] = .{185 result[@enumToInt(Feature.fcpsgn)] = .{
180 .llvm_name = "fcpsgn",186 .llvm_name = "fcpsgn",
181 .description = "Enable the fcpsgn instruction",187 .description = "Enable the fcpsgn instruction",
...@@ -787,6 +793,7 @@ pub const cpu = struct {...@@ -787,6 +793,7 @@ pub const cpu = struct {
787 .crypto,793 .crypto,
788 .direct_move,794 .direct_move,
789 .extdiv,795 .extdiv,
796 .fast_MFLR,
790 .fcpsgn,797 .fcpsgn,
791 .fpcvt,798 .fpcvt,
792 .fprnd,799 .fprnd,
...@@ -941,6 +948,7 @@ pub const cpu = struct {...@@ -941,6 +948,7 @@ pub const cpu = struct {
941 .crypto,948 .crypto,
942 .direct_move,949 .direct_move,
943 .extdiv,950 .extdiv,
951 .fast_MFLR,
944 .fcpsgn,952 .fcpsgn,
945 .fpcvt,953 .fpcvt,
946 .fprnd,954 .fprnd,
lib/std/target/riscv.zig+143-37
...@@ -5,22 +5,26 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -5,22 +5,26 @@ const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;5const CpuModel = std.Target.Cpu.Model;
66
7pub const Feature = enum {7pub const Feature = enum {
8 @"32bit",
8 @"64bit",9 @"64bit",
9 a,10 a,
10 c,11 c,
11 d,12 d,
12 e,13 e,
13 experimental_zbe,14 experimental_zawrs,
14 experimental_zbf,15 experimental_zca,
15 experimental_zbm,16 experimental_zcd,
16 experimental_zbp,17 experimental_zcf,
17 experimental_zbr,18 experimental_zihintntl,
18 experimental_zbt,19 experimental_ztso,
19 experimental_zvfh,20 experimental_zvfh,
20 f,21 f,
22 forced_atomics,
23 h,
21 lui_addi_fusion,24 lui_addi_fusion,
22 m,25 m,
23 no_default_unroll,26 no_default_unroll,
27 no_optimized_zero_stride_load,
24 no_rvc_hints,28 no_rvc_hints,
25 relax,29 relax,
26 reserve_x1,30 reserve_x1,
...@@ -55,8 +59,15 @@ pub const Feature = enum {...@@ -55,8 +59,15 @@ pub const Feature = enum {
55 reserve_x8,59 reserve_x8,
56 reserve_x9,60 reserve_x9,
57 save_restore,61 save_restore,
62 short_forward_branch_opt,
63 svinval,
64 svnapot,
65 svpbmt,
66 tagged_globals,
58 unaligned_scalar_mem,67 unaligned_scalar_mem,
59 v,68 v,
69 xtheadvdot,
70 xventanacondops,
60 zba,71 zba,
61 zbb,72 zbb,
62 zbc,73 zbc,
...@@ -100,6 +111,7 @@ pub const Feature = enum {...@@ -100,6 +111,7 @@ pub const Feature = enum {
100 zvl4096b,111 zvl4096b,
101 zvl512b,112 zvl512b,
102 zvl64b,113 zvl64b,
114 zvl65536b,
103 zvl8192b,115 zvl8192b,
104};116};
105117
...@@ -112,6 +124,11 @@ pub const all_features = blk: {...@@ -112,6 +124,11 @@ pub const all_features = blk: {
112 const len = @typeInfo(Feature).Enum.fields.len;124 const len = @typeInfo(Feature).Enum.fields.len;
113 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);125 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
114 var result: [len]CpuFeature = undefined;126 var result: [len]CpuFeature = undefined;
127 result[@enumToInt(Feature.@"32bit")] = .{
128 .llvm_name = "32bit",
129 .description = "Implements RV32",
130 .dependencies = featureSet(&[_]Feature{}),
131 };
115 result[@enumToInt(Feature.@"64bit")] = .{132 result[@enumToInt(Feature.@"64bit")] = .{
116 .llvm_name = "64bit",133 .llvm_name = "64bit",
117 .description = "Implements RV64",134 .description = "Implements RV64",
...@@ -139,34 +156,34 @@ pub const all_features = blk: {...@@ -139,34 +156,34 @@ pub const all_features = blk: {
139 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",156 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
140 .dependencies = featureSet(&[_]Feature{}),157 .dependencies = featureSet(&[_]Feature{}),
141 };158 };
142 result[@enumToInt(Feature.experimental_zbe)] = .{159 result[@enumToInt(Feature.experimental_zawrs)] = .{
143 .llvm_name = "experimental-zbe",160 .llvm_name = "experimental-zawrs",
144 .description = "'Zbe' (Extract-Deposit 'Zb' Instructions)",161 .description = "'Zawrs' (Wait on Reservation Set)",
145 .dependencies = featureSet(&[_]Feature{}),162 .dependencies = featureSet(&[_]Feature{}),
146 };163 };
147 result[@enumToInt(Feature.experimental_zbf)] = .{164 result[@enumToInt(Feature.experimental_zca)] = .{
148 .llvm_name = "experimental-zbf",165 .llvm_name = "experimental-zca",
149 .description = "'Zbf' (Bit-Field 'Zb' Instructions)",166 .description = "'Zca' (part of the C extension, excluding compressed floating point loads/stores)",
150 .dependencies = featureSet(&[_]Feature{}),167 .dependencies = featureSet(&[_]Feature{}),
151 };168 };
152 result[@enumToInt(Feature.experimental_zbm)] = .{169 result[@enumToInt(Feature.experimental_zcd)] = .{
153 .llvm_name = "experimental-zbm",170 .llvm_name = "experimental-zcd",
154 .description = "'Zbm' (Matrix 'Zb' Instructions)",171 .description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",
155 .dependencies = featureSet(&[_]Feature{}),172 .dependencies = featureSet(&[_]Feature{}),
156 };173 };
157 result[@enumToInt(Feature.experimental_zbp)] = .{174 result[@enumToInt(Feature.experimental_zcf)] = .{
158 .llvm_name = "experimental-zbp",175 .llvm_name = "experimental-zcf",
159 .description = "'Zbp' (Permutation 'Zb' Instructions)",176 .description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",
160 .dependencies = featureSet(&[_]Feature{}),177 .dependencies = featureSet(&[_]Feature{}),
161 };178 };
162 result[@enumToInt(Feature.experimental_zbr)] = .{179 result[@enumToInt(Feature.experimental_zihintntl)] = .{
163 .llvm_name = "experimental-zbr",180 .llvm_name = "experimental-zihintntl",
164 .description = "'Zbr' (Polynomial Reduction 'Zb' Instructions)",181 .description = "'zihintntl' (Non-Temporal Locality Hints)",
165 .dependencies = featureSet(&[_]Feature{}),182 .dependencies = featureSet(&[_]Feature{}),
166 };183 };
167 result[@enumToInt(Feature.experimental_zbt)] = .{184 result[@enumToInt(Feature.experimental_ztso)] = .{
168 .llvm_name = "experimental-zbt",185 .llvm_name = "experimental-ztso",
169 .description = "'Zbt' (Ternary 'Zb' Instructions)",186 .description = "'Ztso' (Memory Model - Total Store Order)",
170 .dependencies = featureSet(&[_]Feature{}),187 .dependencies = featureSet(&[_]Feature{}),
171 };188 };
172 result[@enumToInt(Feature.experimental_zvfh)] = .{189 result[@enumToInt(Feature.experimental_zvfh)] = .{
...@@ -181,6 +198,16 @@ pub const all_features = blk: {...@@ -181,6 +198,16 @@ pub const all_features = blk: {
181 .description = "'F' (Single-Precision Floating-Point)",198 .description = "'F' (Single-Precision Floating-Point)",
182 .dependencies = featureSet(&[_]Feature{}),199 .dependencies = featureSet(&[_]Feature{}),
183 };200 };
201 result[@enumToInt(Feature.forced_atomics)] = .{
202 .llvm_name = "forced-atomics",
203 .description = "Assume that lock-free native-width atomics are available",
204 .dependencies = featureSet(&[_]Feature{}),
205 };
206 result[@enumToInt(Feature.h)] = .{
207 .llvm_name = "h",
208 .description = "'H' (Hypervisor)",
209 .dependencies = featureSet(&[_]Feature{}),
210 };
184 result[@enumToInt(Feature.lui_addi_fusion)] = .{211 result[@enumToInt(Feature.lui_addi_fusion)] = .{
185 .llvm_name = "lui-addi-fusion",212 .llvm_name = "lui-addi-fusion",
186 .description = "Enable LUI+ADDI macrofusion",213 .description = "Enable LUI+ADDI macrofusion",
...@@ -196,6 +223,11 @@ pub const all_features = blk: {...@@ -196,6 +223,11 @@ pub const all_features = blk: {
196 .description = "Disable default unroll preference.",223 .description = "Disable default unroll preference.",
197 .dependencies = featureSet(&[_]Feature{}),224 .dependencies = featureSet(&[_]Feature{}),
198 };225 };
226 result[@enumToInt(Feature.no_optimized_zero_stride_load)] = .{
227 .llvm_name = "no-optimized-zero-stride-load",
228 .description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load",
229 .dependencies = featureSet(&[_]Feature{}),
230 };
199 result[@enumToInt(Feature.no_rvc_hints)] = .{231 result[@enumToInt(Feature.no_rvc_hints)] = .{
200 .llvm_name = "no-rvc-hints",232 .llvm_name = "no-rvc-hints",
201 .description = "Disable RVC Hint Instructions.",233 .description = "Disable RVC Hint Instructions.",
...@@ -366,6 +398,31 @@ pub const all_features = blk: {...@@ -366,6 +398,31 @@ pub const all_features = blk: {
366 .description = "Enable save/restore.",398 .description = "Enable save/restore.",
367 .dependencies = featureSet(&[_]Feature{}),399 .dependencies = featureSet(&[_]Feature{}),
368 };400 };
401 result[@enumToInt(Feature.short_forward_branch_opt)] = .{
402 .llvm_name = "short-forward-branch-opt",
403 .description = "Enable short forward branch optimization",
404 .dependencies = featureSet(&[_]Feature{}),
405 };
406 result[@enumToInt(Feature.svinval)] = .{
407 .llvm_name = "svinval",
408 .description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)",
409 .dependencies = featureSet(&[_]Feature{}),
410 };
411 result[@enumToInt(Feature.svnapot)] = .{
412 .llvm_name = "svnapot",
413 .description = "'Svnapot' (NAPOT Translation Contiguity)",
414 .dependencies = featureSet(&[_]Feature{}),
415 };
416 result[@enumToInt(Feature.svpbmt)] = .{
417 .llvm_name = "svpbmt",
418 .description = "'Svpbmt' (Page-Based Memory Types)",
419 .dependencies = featureSet(&[_]Feature{}),
420 };
421 result[@enumToInt(Feature.tagged_globals)] = .{
422 .llvm_name = "tagged-globals",
423 .description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
424 .dependencies = featureSet(&[_]Feature{}),
425 };
369 result[@enumToInt(Feature.unaligned_scalar_mem)] = .{426 result[@enumToInt(Feature.unaligned_scalar_mem)] = .{
370 .llvm_name = "unaligned-scalar-mem",427 .llvm_name = "unaligned-scalar-mem",
371 .description = "Has reasonably performant unaligned scalar loads and stores",428 .description = "Has reasonably performant unaligned scalar loads and stores",
...@@ -380,6 +437,18 @@ pub const all_features = blk: {...@@ -380,6 +437,18 @@ pub const all_features = blk: {
380 .zvl128b,437 .zvl128b,
381 }),438 }),
382 };439 };
440 result[@enumToInt(Feature.xtheadvdot)] = .{
441 .llvm_name = "xtheadvdot",
442 .description = "'xtheadvdot' (T-Head Vector Extensions for Dot)",
443 .dependencies = featureSet(&[_]Feature{
444 .v,
445 }),
446 };
447 result[@enumToInt(Feature.xventanacondops)] = .{
448 .llvm_name = "xventanacondops",
449 .description = "'XVentanaCondOps' (Ventana Conditional Ops)",
450 .dependencies = featureSet(&[_]Feature{}),
451 };
383 result[@enumToInt(Feature.zba)] = .{452 result[@enumToInt(Feature.zba)] = .{
384 .llvm_name = "zba",453 .llvm_name = "zba",
385 .description = "'Zba' (Address Generation Instructions)",454 .description = "'Zba' (Address Generation Instructions)",
...@@ -652,6 +721,13 @@ pub const all_features = blk: {...@@ -652,6 +721,13 @@ pub const all_features = blk: {
652 .zvl32b,721 .zvl32b,
653 }),722 }),
654 };723 };
724 result[@enumToInt(Feature.zvl65536b)] = .{
725 .llvm_name = "zvl65536b",
726 .description = "'Zvl' (Minimum Vector Length) 65536",
727 .dependencies = featureSet(&[_]Feature{
728 .zvl32768b,
729 }),
730 };
655 result[@enumToInt(Feature.zvl8192b)] = .{731 result[@enumToInt(Feature.zvl8192b)] = .{
656 .llvm_name = "zvl8192b",732 .llvm_name = "zvl8192b",
657 .description = "'Zvl' (Minimum Vector Length) 8192",733 .description = "'Zvl' (Minimum Vector Length) 8192",
...@@ -697,7 +773,9 @@ pub const cpu = struct {...@@ -697,7 +773,9 @@ pub const cpu = struct {
697 pub const generic_rv32 = CpuModel{773 pub const generic_rv32 = CpuModel{
698 .name = "generic_rv32",774 .name = "generic_rv32",
699 .llvm_name = "generic-rv32",775 .llvm_name = "generic-rv32",
700 .features = featureSet(&[_]Feature{}),776 .features = featureSet(&[_]Feature{
777 .@"32bit",
778 }),
701 };779 };
702 pub const generic_rv64 = CpuModel{780 pub const generic_rv64 = CpuModel{
703 .name = "generic_rv64",781 .name = "generic_rv64",
...@@ -706,10 +784,17 @@ pub const cpu = struct {...@@ -706,10 +784,17 @@ pub const cpu = struct {
706 .@"64bit",784 .@"64bit",
707 }),785 }),
708 };786 };
787 pub const rocket = CpuModel{
788 .name = "rocket",
789 .llvm_name = "rocket",
790 .features = featureSet(&[_]Feature{}),
791 };
709 pub const rocket_rv32 = CpuModel{792 pub const rocket_rv32 = CpuModel{
710 .name = "rocket_rv32",793 .name = "rocket_rv32",
711 .llvm_name = "rocket-rv32",794 .llvm_name = "rocket-rv32",
712 .features = featureSet(&[_]Feature{}),795 .features = featureSet(&[_]Feature{
796 .@"32bit",
797 }),
713 };798 };
714 pub const rocket_rv64 = CpuModel{799 pub const rocket_rv64 = CpuModel{
715 .name = "rocket_rv64",800 .name = "rocket_rv64",
...@@ -718,25 +803,19 @@ pub const cpu = struct {...@@ -718,25 +803,19 @@ pub const cpu = struct {
718 .@"64bit",803 .@"64bit",
719 }),804 }),
720 };805 };
721 pub const sifive_7_rv32 = CpuModel{806 pub const sifive_7_series = CpuModel{
722 .name = "sifive_7_rv32",807 .name = "sifive_7_series",
723 .llvm_name = "sifive-7-rv32",808 .llvm_name = "sifive-7-series",
724 .features = featureSet(&[_]Feature{809 .features = featureSet(&[_]Feature{
725 .no_default_unroll,810 .no_default_unroll,
726 }),811 .short_forward_branch_opt,
727 };
728 pub const sifive_7_rv64 = CpuModel{
729 .name = "sifive_7_rv64",
730 .llvm_name = "sifive-7-rv64",
731 .features = featureSet(&[_]Feature{
732 .@"64bit",
733 .no_default_unroll,
734 }),812 }),
735 };813 };
736 pub const sifive_e20 = CpuModel{814 pub const sifive_e20 = CpuModel{
737 .name = "sifive_e20",815 .name = "sifive_e20",
738 .llvm_name = "sifive-e20",816 .llvm_name = "sifive-e20",
739 .features = featureSet(&[_]Feature{817 .features = featureSet(&[_]Feature{
818 .@"32bit",
740 .c,819 .c,
741 .m,820 .m,
742 }),821 }),
...@@ -745,6 +824,7 @@ pub const cpu = struct {...@@ -745,6 +824,7 @@ pub const cpu = struct {
745 .name = "sifive_e21",824 .name = "sifive_e21",
746 .llvm_name = "sifive-e21",825 .llvm_name = "sifive-e21",
747 .features = featureSet(&[_]Feature{826 .features = featureSet(&[_]Feature{
827 .@"32bit",
748 .a,828 .a,
749 .c,829 .c,
750 .m,830 .m,
...@@ -754,6 +834,7 @@ pub const cpu = struct {...@@ -754,6 +834,7 @@ pub const cpu = struct {
754 .name = "sifive_e24",834 .name = "sifive_e24",
755 .llvm_name = "sifive-e24",835 .llvm_name = "sifive-e24",
756 .features = featureSet(&[_]Feature{836 .features = featureSet(&[_]Feature{
837 .@"32bit",
757 .a,838 .a,
758 .c,839 .c,
759 .f,840 .f,
...@@ -764,6 +845,7 @@ pub const cpu = struct {...@@ -764,6 +845,7 @@ pub const cpu = struct {
764 .name = "sifive_e31",845 .name = "sifive_e31",
765 .llvm_name = "sifive-e31",846 .llvm_name = "sifive-e31",
766 .features = featureSet(&[_]Feature{847 .features = featureSet(&[_]Feature{
848 .@"32bit",
767 .a,849 .a,
768 .c,850 .c,
769 .m,851 .m,
...@@ -773,6 +855,7 @@ pub const cpu = struct {...@@ -773,6 +855,7 @@ pub const cpu = struct {
773 .name = "sifive_e34",855 .name = "sifive_e34",
774 .llvm_name = "sifive-e34",856 .llvm_name = "sifive-e34",
775 .features = featureSet(&[_]Feature{857 .features = featureSet(&[_]Feature{
858 .@"32bit",
776 .a,859 .a,
777 .c,860 .c,
778 .f,861 .f,
...@@ -783,11 +866,13 @@ pub const cpu = struct {...@@ -783,11 +866,13 @@ pub const cpu = struct {
783 .name = "sifive_e76",866 .name = "sifive_e76",
784 .llvm_name = "sifive-e76",867 .llvm_name = "sifive-e76",
785 .features = featureSet(&[_]Feature{868 .features = featureSet(&[_]Feature{
869 .@"32bit",
786 .a,870 .a,
787 .c,871 .c,
788 .f,872 .f,
789 .m,873 .m,
790 .no_default_unroll,874 .no_default_unroll,
875 .short_forward_branch_opt,
791 }),876 }),
792 };877 };
793 pub const sifive_s21 = CpuModel{878 pub const sifive_s21 = CpuModel{
...@@ -831,6 +916,7 @@ pub const cpu = struct {...@@ -831,6 +916,7 @@ pub const cpu = struct {
831 .d,916 .d,
832 .m,917 .m,
833 .no_default_unroll,918 .no_default_unroll,
919 .short_forward_branch_opt,
834 }),920 }),
835 };921 };
836 pub const sifive_u54 = CpuModel{922 pub const sifive_u54 = CpuModel{
...@@ -854,6 +940,26 @@ pub const cpu = struct {...@@ -854,6 +940,26 @@ pub const cpu = struct {
854 .d,940 .d,
855 .m,941 .m,
856 .no_default_unroll,942 .no_default_unroll,
943 .short_forward_branch_opt,
944 }),
945 };
946 pub const syntacore_scr1_base = CpuModel{
947 .name = "syntacore_scr1_base",
948 .llvm_name = "syntacore-scr1-base",
949 .features = featureSet(&[_]Feature{
950 .@"32bit",
951 .c,
952 .no_default_unroll,
953 }),
954 };
955 pub const syntacore_scr1_max = CpuModel{
956 .name = "syntacore_scr1_max",
957 .llvm_name = "syntacore-scr1-max",
958 .features = featureSet(&[_]Feature{
959 .@"32bit",
960 .c,
961 .m,
962 .no_default_unroll,
857 }),963 }),
858 };964 };
859};965};
lib/std/target/wasm.zig+4-1
...@@ -113,7 +113,10 @@ pub const cpu = struct {...@@ -113,7 +113,10 @@ pub const cpu = struct {
113 pub const generic = CpuModel{113 pub const generic = CpuModel{
114 .name = "generic",114 .name = "generic",
115 .llvm_name = "generic",115 .llvm_name = "generic",
116 .features = featureSet(&[_]Feature{}),116 .features = featureSet(&[_]Feature{
117 .mutable_globals,
118 .sign_ext,
119 }),
117 };120 };
118 pub const mvp = CpuModel{121 pub const mvp = CpuModel{
119 .name = "mvp",122 .name = "mvp",
lib/std/target/x86.zig+555-5
...@@ -12,7 +12,9 @@ pub const Feature = enum {...@@ -12,7 +12,9 @@ pub const Feature = enum {
12 @"64bit",12 @"64bit",
13 adx,13 adx,
14 aes,14 aes,
15 allow_light_256_bit,
15 amx_bf16,16 amx_bf16,
17 amx_fp16,
16 amx_int8,18 amx_int8,
17 amx_tile,19 amx_tile,
18 avx,20 avx,
...@@ -33,7 +35,10 @@ pub const Feature = enum {...@@ -33,7 +35,10 @@ pub const Feature = enum {
33 avx512vnni,35 avx512vnni,
34 avx512vp2intersect,36 avx512vp2intersect,
35 avx512vpopcntdq,37 avx512vpopcntdq,
38 avxifma,
39 avxneconvert,
36 avxvnni,40 avxvnni,
41 avxvnniint8,
37 bmi,42 bmi,
38 bmi2,43 bmi2,
39 branchfusion,44 branchfusion,
...@@ -42,6 +47,7 @@ pub const Feature = enum {...@@ -42,6 +47,7 @@ pub const Feature = enum {
42 clwb,47 clwb,
43 clzero,48 clzero,
44 cmov,49 cmov,
50 cmpccxadd,
45 crc32,51 crc32,
46 cx16,52 cx16,
47 cx8,53 cx8,
...@@ -104,9 +110,11 @@ pub const Feature = enum {...@@ -104,9 +110,11 @@ pub const Feature = enum {
104 prefer_128_bit,110 prefer_128_bit,
105 prefer_256_bit,111 prefer_256_bit,
106 prefer_mask_registers,112 prefer_mask_registers,
113 prefetchi,
107 prefetchwt1,114 prefetchwt1,
108 prfchw,115 prfchw,
109 ptwrite,116 ptwrite,
117 raoint,
110 rdpid,118 rdpid,
111 rdpru,119 rdpru,
112 rdrnd,120 rdrnd,
...@@ -211,6 +219,11 @@ pub const all_features = blk: {...@@ -211,6 +219,11 @@ pub const all_features = blk: {
211 .sse2,219 .sse2,
212 }),220 }),
213 };221 };
222 result[@enumToInt(Feature.allow_light_256_bit)] = .{
223 .llvm_name = "allow-light-256-bit",
224 .description = "Enable generation of 256-bit load/stores even if we prefer 128-bit",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
214 result[@enumToInt(Feature.amx_bf16)] = .{227 result[@enumToInt(Feature.amx_bf16)] = .{
215 .llvm_name = "amx-bf16",228 .llvm_name = "amx-bf16",
216 .description = "Support AMX-BF16 instructions",229 .description = "Support AMX-BF16 instructions",
...@@ -218,6 +231,13 @@ pub const all_features = blk: {...@@ -218,6 +231,13 @@ pub const all_features = blk: {
218 .amx_tile,231 .amx_tile,
219 }),232 }),
220 };233 };
234 result[@enumToInt(Feature.amx_fp16)] = .{
235 .llvm_name = "amx-fp16",
236 .description = "Support AMX amx-fp16 instructions",
237 .dependencies = featureSet(&[_]Feature{
238 .amx_tile,
239 }),
240 };
221 result[@enumToInt(Feature.amx_int8)] = .{241 result[@enumToInt(Feature.amx_int8)] = .{
222 .llvm_name = "amx-int8",242 .llvm_name = "amx-int8",
223 .description = "Support AMX-INT8 instructions",243 .description = "Support AMX-INT8 instructions",
...@@ -360,6 +380,20 @@ pub const all_features = blk: {...@@ -360,6 +380,20 @@ pub const all_features = blk: {
360 .avx512f,380 .avx512f,
361 }),381 }),
362 };382 };
383 result[@enumToInt(Feature.avxifma)] = .{
384 .llvm_name = "avxifma",
385 .description = "Enable AVX-IFMA",
386 .dependencies = featureSet(&[_]Feature{
387 .avx2,
388 }),
389 };
390 result[@enumToInt(Feature.avxneconvert)] = .{
391 .llvm_name = "avxneconvert",
392 .description = "Support AVX-NE-CONVERT instructions",
393 .dependencies = featureSet(&[_]Feature{
394 .avx2,
395 }),
396 };
363 result[@enumToInt(Feature.avxvnni)] = .{397 result[@enumToInt(Feature.avxvnni)] = .{
364 .llvm_name = "avxvnni",398 .llvm_name = "avxvnni",
365 .description = "Support AVX_VNNI encoding",399 .description = "Support AVX_VNNI encoding",
...@@ -367,6 +401,13 @@ pub const all_features = blk: {...@@ -367,6 +401,13 @@ pub const all_features = blk: {
367 .avx2,401 .avx2,
368 }),402 }),
369 };403 };
404 result[@enumToInt(Feature.avxvnniint8)] = .{
405 .llvm_name = "avxvnniint8",
406 .description = "Enable AVX-VNNI-INT8",
407 .dependencies = featureSet(&[_]Feature{
408 .avx2,
409 }),
410 };
370 result[@enumToInt(Feature.bmi)] = .{411 result[@enumToInt(Feature.bmi)] = .{
371 .llvm_name = "bmi",412 .llvm_name = "bmi",
372 .description = "Support BMI instructions",413 .description = "Support BMI instructions",
...@@ -407,6 +448,11 @@ pub const all_features = blk: {...@@ -407,6 +448,11 @@ pub const all_features = blk: {
407 .description = "Enable conditional move instructions",448 .description = "Enable conditional move instructions",
408 .dependencies = featureSet(&[_]Feature{}),449 .dependencies = featureSet(&[_]Feature{}),
409 };450 };
451 result[@enumToInt(Feature.cmpccxadd)] = .{
452 .llvm_name = "cmpccxadd",
453 .description = "Support CMPCCXADD instructions",
454 .dependencies = featureSet(&[_]Feature{}),
455 };
410 result[@enumToInt(Feature.crc32)] = .{456 result[@enumToInt(Feature.crc32)] = .{
411 .llvm_name = "crc32",457 .llvm_name = "crc32",
412 .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)",458 .description = "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)",
...@@ -732,6 +778,11 @@ pub const all_features = blk: {...@@ -732,6 +778,11 @@ pub const all_features = blk: {
732 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",778 .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
733 .dependencies = featureSet(&[_]Feature{}),779 .dependencies = featureSet(&[_]Feature{}),
734 };780 };
781 result[@enumToInt(Feature.prefetchi)] = .{
782 .llvm_name = "prefetchi",
783 .description = "Prefetch instruction with T0 or T1 Hint",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
735 result[@enumToInt(Feature.prefetchwt1)] = .{786 result[@enumToInt(Feature.prefetchwt1)] = .{
736 .llvm_name = "prefetchwt1",787 .llvm_name = "prefetchwt1",
737 .description = "Prefetch with Intent to Write and T1 Hint",788 .description = "Prefetch with Intent to Write and T1 Hint",
...@@ -747,6 +798,11 @@ pub const all_features = blk: {...@@ -747,6 +798,11 @@ pub const all_features = blk: {
747 .description = "Support ptwrite instruction",798 .description = "Support ptwrite instruction",
748 .dependencies = featureSet(&[_]Feature{}),799 .dependencies = featureSet(&[_]Feature{}),
749 };800 };
801 result[@enumToInt(Feature.raoint)] = .{
802 .llvm_name = "raoint",
803 .description = "Support RAO-INT instructions",
804 .dependencies = featureSet(&[_]Feature{}),
805 };
750 result[@enumToInt(Feature.rdpid)] = .{806 result[@enumToInt(Feature.rdpid)] = .{
751 .llvm_name = "rdpid",807 .llvm_name = "rdpid",
752 .description = "Support RDPID instructions",808 .description = "Support RDPID instructions",
...@@ -1059,6 +1115,7 @@ pub const cpu = struct {...@@ -1059,6 +1115,7 @@ pub const cpu = struct {
1059 .features = featureSet(&[_]Feature{1115 .features = featureSet(&[_]Feature{
1060 .@"64bit",1116 .@"64bit",
1061 .adx,1117 .adx,
1118 .allow_light_256_bit,
1062 .avxvnni,1119 .avxvnni,
1063 .bmi,1120 .bmi,
1064 .bmi2,1121 .bmi2,
...@@ -1488,6 +1545,7 @@ pub const cpu = struct {...@@ -1488,6 +1545,7 @@ pub const cpu = struct {
1488 .features = featureSet(&[_]Feature{1545 .features = featureSet(&[_]Feature{
1489 .@"64bit",1546 .@"64bit",
1490 .adx,1547 .adx,
1548 .allow_light_256_bit,
1491 .avx2,1549 .avx2,
1492 .bmi,1550 .bmi,
1493 .bmi2,1551 .bmi2,
...@@ -1615,6 +1673,7 @@ pub const cpu = struct {...@@ -1615,6 +1673,7 @@ pub const cpu = struct {
1615 .@"64bit",1673 .@"64bit",
1616 .adx,1674 .adx,
1617 .aes,1675 .aes,
1676 .allow_light_256_bit,
1618 .avx512cd,1677 .avx512cd,
1619 .avx512dq,1678 .avx512dq,
1620 .avx512ifma,1679 .avx512ifma,
...@@ -1667,6 +1726,7 @@ pub const cpu = struct {...@@ -1667,6 +1726,7 @@ pub const cpu = struct {
1667 .@"64bit",1726 .@"64bit",
1668 .adx,1727 .adx,
1669 .aes,1728 .aes,
1729 .allow_light_256_bit,
1670 .avx512bw,1730 .avx512bw,
1671 .avx512cd,1731 .avx512cd,
1672 .avx512dq,1732 .avx512dq,
...@@ -1720,6 +1780,7 @@ pub const cpu = struct {...@@ -1720,6 +1780,7 @@ pub const cpu = struct {
1720 .@"64bit",1780 .@"64bit",
1721 .adx,1781 .adx,
1722 .aes,1782 .aes,
1783 .allow_light_256_bit,
1723 .avx512bf16,1784 .avx512bf16,
1724 .avx512cd,1785 .avx512cd,
1725 .avx512dq,1786 .avx512dq,
...@@ -1789,6 +1850,7 @@ pub const cpu = struct {...@@ -1789,6 +1850,7 @@ pub const cpu = struct {
1789 .llvm_name = "core-avx2",1850 .llvm_name = "core-avx2",
1790 .features = featureSet(&[_]Feature{1851 .features = featureSet(&[_]Feature{
1791 .@"64bit",1852 .@"64bit",
1853 .allow_light_256_bit,
1792 .avx2,1854 .avx2,
1793 .bmi,1855 .bmi,
1794 .bmi2,1856 .bmi2,
...@@ -1901,6 +1963,86 @@ pub const cpu = struct {...@@ -1901,6 +1963,86 @@ pub const cpu = struct {
1901 .xsaveopt,1963 .xsaveopt,
1902 }),1964 }),
1903 };1965 };
1966 pub const emeraldrapids = CpuModel{
1967 .name = "emeraldrapids",
1968 .llvm_name = "emeraldrapids",
1969 .features = featureSet(&[_]Feature{
1970 .@"64bit",
1971 .adx,
1972 .allow_light_256_bit,
1973 .amx_bf16,
1974 .amx_int8,
1975 .avx512bf16,
1976 .avx512bitalg,
1977 .avx512cd,
1978 .avx512fp16,
1979 .avx512ifma,
1980 .avx512vbmi,
1981 .avx512vbmi2,
1982 .avx512vnni,
1983 .avx512vpopcntdq,
1984 .avxvnni,
1985 .bmi,
1986 .bmi2,
1987 .cldemote,
1988 .clflushopt,
1989 .clwb,
1990 .cmov,
1991 .crc32,
1992 .cx16,
1993 .enqcmd,
1994 .ermsb,
1995 .false_deps_getmant,
1996 .false_deps_mulc,
1997 .false_deps_mullq,
1998 .false_deps_perm,
1999 .false_deps_range,
2000 .fast_15bytenop,
2001 .fast_gather,
2002 .fast_scalar_fsqrt,
2003 .fast_shld_rotate,
2004 .fast_variable_crosslane_shuffle,
2005 .fast_variable_perlane_shuffle,
2006 .fast_vector_fsqrt,
2007 .fsgsbase,
2008 .fsrm,
2009 .fxsr,
2010 .gfni,
2011 .idivq_to_divl,
2012 .invpcid,
2013 .lzcnt,
2014 .macrofusion,
2015 .mmx,
2016 .movbe,
2017 .movdir64b,
2018 .movdiri,
2019 .nopl,
2020 .pconfig,
2021 .pku,
2022 .popcnt,
2023 .prefer_256_bit,
2024 .prfchw,
2025 .ptwrite,
2026 .rdpid,
2027 .rdrnd,
2028 .rdseed,
2029 .sahf,
2030 .serialize,
2031 .sha,
2032 .shstk,
2033 .tsxldtrk,
2034 .uintr,
2035 .vaes,
2036 .vpclmulqdq,
2037 .vzeroupper,
2038 .waitpkg,
2039 .wbnoinvd,
2040 .x87,
2041 .xsavec,
2042 .xsaveopt,
2043 .xsaves,
2044 }),
2045 };
1904 pub const generic = CpuModel{2046 pub const generic = CpuModel{
1905 .name = "generic",2047 .name = "generic",
1906 .llvm_name = "generic",2048 .llvm_name = "generic",
...@@ -2000,11 +2142,155 @@ pub const cpu = struct {...@@ -2000,11 +2142,155 @@ pub const cpu = struct {
2000 .xsaves,2142 .xsaves,
2001 }),2143 }),
2002 };2144 };
2145 pub const grandridge = CpuModel{
2146 .name = "grandridge",
2147 .llvm_name = "grandridge",
2148 .features = featureSet(&[_]Feature{
2149 .@"64bit",
2150 .adx,
2151 .avxifma,
2152 .avxneconvert,
2153 .avxvnni,
2154 .avxvnniint8,
2155 .bmi,
2156 .bmi2,
2157 .cldemote,
2158 .clflushopt,
2159 .clwb,
2160 .cmov,
2161 .cmpccxadd,
2162 .crc32,
2163 .cx16,
2164 .f16c,
2165 .fast_movbe,
2166 .fma,
2167 .fsgsbase,
2168 .fxsr,
2169 .gfni,
2170 .hreset,
2171 .invpcid,
2172 .lzcnt,
2173 .mmx,
2174 .movbe,
2175 .movdir64b,
2176 .movdiri,
2177 .nopl,
2178 .pconfig,
2179 .pku,
2180 .popcnt,
2181 .prfchw,
2182 .ptwrite,
2183 .raoint,
2184 .rdpid,
2185 .rdrnd,
2186 .rdseed,
2187 .sahf,
2188 .serialize,
2189 .sha,
2190 .shstk,
2191 .slow_incdec,
2192 .slow_lea,
2193 .slow_two_mem_ops,
2194 .use_glm_div_sqrt_costs,
2195 .vaes,
2196 .vpclmulqdq,
2197 .vzeroupper,
2198 .waitpkg,
2199 .widekl,
2200 .x87,
2201 .xsavec,
2202 .xsaveopt,
2203 .xsaves,
2204 }),
2205 };
2206 pub const graniterapids = CpuModel{
2207 .name = "graniterapids",
2208 .llvm_name = "graniterapids",
2209 .features = featureSet(&[_]Feature{
2210 .@"64bit",
2211 .adx,
2212 .allow_light_256_bit,
2213 .amx_bf16,
2214 .amx_fp16,
2215 .amx_int8,
2216 .avx512bf16,
2217 .avx512bitalg,
2218 .avx512cd,
2219 .avx512fp16,
2220 .avx512ifma,
2221 .avx512vbmi,
2222 .avx512vbmi2,
2223 .avx512vnni,
2224 .avx512vpopcntdq,
2225 .avxvnni,
2226 .bmi,
2227 .bmi2,
2228 .cldemote,
2229 .clflushopt,
2230 .clwb,
2231 .cmov,
2232 .crc32,
2233 .cx16,
2234 .enqcmd,
2235 .ermsb,
2236 .false_deps_getmant,
2237 .false_deps_mulc,
2238 .false_deps_mullq,
2239 .false_deps_perm,
2240 .false_deps_range,
2241 .fast_15bytenop,
2242 .fast_gather,
2243 .fast_scalar_fsqrt,
2244 .fast_shld_rotate,
2245 .fast_variable_crosslane_shuffle,
2246 .fast_variable_perlane_shuffle,
2247 .fast_vector_fsqrt,
2248 .fsgsbase,
2249 .fsrm,
2250 .fxsr,
2251 .gfni,
2252 .idivq_to_divl,
2253 .invpcid,
2254 .lzcnt,
2255 .macrofusion,
2256 .mmx,
2257 .movbe,
2258 .movdir64b,
2259 .movdiri,
2260 .nopl,
2261 .pconfig,
2262 .pku,
2263 .popcnt,
2264 .prefer_256_bit,
2265 .prefetchi,
2266 .prfchw,
2267 .ptwrite,
2268 .rdpid,
2269 .rdrnd,
2270 .rdseed,
2271 .sahf,
2272 .serialize,
2273 .sha,
2274 .shstk,
2275 .tsxldtrk,
2276 .uintr,
2277 .vaes,
2278 .vpclmulqdq,
2279 .vzeroupper,
2280 .waitpkg,
2281 .wbnoinvd,
2282 .x87,
2283 .xsavec,
2284 .xsaveopt,
2285 .xsaves,
2286 }),
2287 };
2003 pub const haswell = CpuModel{2288 pub const haswell = CpuModel{
2004 .name = "haswell",2289 .name = "haswell",
2005 .llvm_name = "haswell",2290 .llvm_name = "haswell",
2006 .features = featureSet(&[_]Feature{2291 .features = featureSet(&[_]Feature{
2007 .@"64bit",2292 .@"64bit",
2293 .allow_light_256_bit,
2008 .avx2,2294 .avx2,
2009 .bmi,2295 .bmi,
2010 .bmi2,2296 .bmi2,
...@@ -2085,6 +2371,7 @@ pub const cpu = struct {...@@ -2085,6 +2371,7 @@ pub const cpu = struct {
2085 .features = featureSet(&[_]Feature{2371 .features = featureSet(&[_]Feature{
2086 .@"64bit",2372 .@"64bit",
2087 .adx,2373 .adx,
2374 .allow_light_256_bit,
2088 .avx512bitalg,2375 .avx512bitalg,
2089 .avx512cd,2376 .avx512cd,
2090 .avx512dq,2377 .avx512dq,
...@@ -2128,7 +2415,6 @@ pub const cpu = struct {...@@ -2128,7 +2415,6 @@ pub const cpu = struct {
2128 .rdseed,2415 .rdseed,
2129 .sahf,2416 .sahf,
2130 .sha,2417 .sha,
2131 .slow_3ops_lea,
2132 .vaes,2418 .vaes,
2133 .vpclmulqdq,2419 .vpclmulqdq,
2134 .vzeroupper,2420 .vzeroupper,
...@@ -2144,6 +2430,7 @@ pub const cpu = struct {...@@ -2144,6 +2430,7 @@ pub const cpu = struct {
2144 .features = featureSet(&[_]Feature{2430 .features = featureSet(&[_]Feature{
2145 .@"64bit",2431 .@"64bit",
2146 .adx,2432 .adx,
2433 .allow_light_256_bit,
2147 .avx512bitalg,2434 .avx512bitalg,
2148 .avx512cd,2435 .avx512cd,
2149 .avx512dq,2436 .avx512dq,
...@@ -2189,7 +2476,6 @@ pub const cpu = struct {...@@ -2189,7 +2476,6 @@ pub const cpu = struct {
2189 .rdseed,2476 .rdseed,
2190 .sahf,2477 .sahf,
2191 .sha,2478 .sha,
2192 .slow_3ops_lea,
2193 .vaes,2479 .vaes,
2194 .vpclmulqdq,2480 .vpclmulqdq,
2195 .vzeroupper,2481 .vzeroupper,
...@@ -2392,6 +2678,70 @@ pub const cpu = struct {...@@ -2392,6 +2678,70 @@ pub const cpu = struct {
2392 .vzeroupper,2678 .vzeroupper,
2393 }),2679 }),
2394 };2680 };
2681 pub const meteorlake = CpuModel{
2682 .name = "meteorlake",
2683 .llvm_name = "meteorlake",
2684 .features = featureSet(&[_]Feature{
2685 .@"64bit",
2686 .adx,
2687 .allow_light_256_bit,
2688 .avxvnni,
2689 .bmi,
2690 .bmi2,
2691 .cldemote,
2692 .clflushopt,
2693 .clwb,
2694 .cmov,
2695 .crc32,
2696 .cx16,
2697 .f16c,
2698 .false_deps_perm,
2699 .false_deps_popcnt,
2700 .fast_15bytenop,
2701 .fast_gather,
2702 .fast_scalar_fsqrt,
2703 .fast_shld_rotate,
2704 .fast_variable_crosslane_shuffle,
2705 .fast_variable_perlane_shuffle,
2706 .fast_vector_fsqrt,
2707 .fma,
2708 .fsgsbase,
2709 .fxsr,
2710 .gfni,
2711 .hreset,
2712 .idivq_to_divl,
2713 .invpcid,
2714 .lzcnt,
2715 .macrofusion,
2716 .mmx,
2717 .movbe,
2718 .movdir64b,
2719 .movdiri,
2720 .nopl,
2721 .pconfig,
2722 .pku,
2723 .popcnt,
2724 .prfchw,
2725 .ptwrite,
2726 .rdpid,
2727 .rdrnd,
2728 .rdseed,
2729 .sahf,
2730 .serialize,
2731 .sha,
2732 .shstk,
2733 .slow_3ops_lea,
2734 .vaes,
2735 .vpclmulqdq,
2736 .vzeroupper,
2737 .waitpkg,
2738 .widekl,
2739 .x87,
2740 .xsavec,
2741 .xsaveopt,
2742 .xsaves,
2743 }),
2744 };
2395 pub const nehalem = CpuModel{2745 pub const nehalem = CpuModel{
2396 .name = "nehalem",2746 .name = "nehalem",
2397 .llvm_name = "nehalem",2747 .llvm_name = "nehalem",
...@@ -2620,12 +2970,77 @@ pub const cpu = struct {...@@ -2620,12 +2970,77 @@ pub const cpu = struct {
2620 .x87,2970 .x87,
2621 }),2971 }),
2622 };2972 };
2973 pub const raptorlake = CpuModel{
2974 .name = "raptorlake",
2975 .llvm_name = "raptorlake",
2976 .features = featureSet(&[_]Feature{
2977 .@"64bit",
2978 .adx,
2979 .allow_light_256_bit,
2980 .avxvnni,
2981 .bmi,
2982 .bmi2,
2983 .cldemote,
2984 .clflushopt,
2985 .clwb,
2986 .cmov,
2987 .crc32,
2988 .cx16,
2989 .f16c,
2990 .false_deps_perm,
2991 .false_deps_popcnt,
2992 .fast_15bytenop,
2993 .fast_gather,
2994 .fast_scalar_fsqrt,
2995 .fast_shld_rotate,
2996 .fast_variable_crosslane_shuffle,
2997 .fast_variable_perlane_shuffle,
2998 .fast_vector_fsqrt,
2999 .fma,
3000 .fsgsbase,
3001 .fxsr,
3002 .gfni,
3003 .hreset,
3004 .idivq_to_divl,
3005 .invpcid,
3006 .lzcnt,
3007 .macrofusion,
3008 .mmx,
3009 .movbe,
3010 .movdir64b,
3011 .movdiri,
3012 .nopl,
3013 .pconfig,
3014 .pku,
3015 .popcnt,
3016 .prfchw,
3017 .ptwrite,
3018 .rdpid,
3019 .rdrnd,
3020 .rdseed,
3021 .sahf,
3022 .serialize,
3023 .sha,
3024 .shstk,
3025 .slow_3ops_lea,
3026 .vaes,
3027 .vpclmulqdq,
3028 .vzeroupper,
3029 .waitpkg,
3030 .widekl,
3031 .x87,
3032 .xsavec,
3033 .xsaveopt,
3034 .xsaves,
3035 }),
3036 };
2623 pub const rocketlake = CpuModel{3037 pub const rocketlake = CpuModel{
2624 .name = "rocketlake",3038 .name = "rocketlake",
2625 .llvm_name = "rocketlake",3039 .llvm_name = "rocketlake",
2626 .features = featureSet(&[_]Feature{3040 .features = featureSet(&[_]Feature{
2627 .@"64bit",3041 .@"64bit",
2628 .adx,3042 .adx,
3043 .allow_light_256_bit,
2629 .avx512bitalg,3044 .avx512bitalg,
2630 .avx512cd,3045 .avx512cd,
2631 .avx512dq,3046 .avx512dq,
...@@ -2669,7 +3084,6 @@ pub const cpu = struct {...@@ -2669,7 +3084,6 @@ pub const cpu = struct {
2669 .rdseed,3084 .rdseed,
2670 .sahf,3085 .sahf,
2671 .sha,3086 .sha,
2672 .slow_3ops_lea,
2673 .vaes,3087 .vaes,
2674 .vpclmulqdq,3088 .vpclmulqdq,
2675 .vzeroupper,3089 .vzeroupper,
...@@ -2713,6 +3127,7 @@ pub const cpu = struct {...@@ -2713,6 +3127,7 @@ pub const cpu = struct {
2713 .features = featureSet(&[_]Feature{3127 .features = featureSet(&[_]Feature{
2714 .@"64bit",3128 .@"64bit",
2715 .adx,3129 .adx,
3130 .allow_light_256_bit,
2716 .amx_bf16,3131 .amx_bf16,
2717 .amx_int8,3132 .amx_int8,
2718 .avx512bf16,3133 .avx512bf16,
...@@ -2773,7 +3188,6 @@ pub const cpu = struct {...@@ -2773,7 +3188,6 @@ pub const cpu = struct {
2773 .serialize,3188 .serialize,
2774 .sha,3189 .sha,
2775 .shstk,3190 .shstk,
2776 .slow_3ops_lea,
2777 .tsxldtrk,3191 .tsxldtrk,
2778 .uintr,3192 .uintr,
2779 .vaes,3193 .vaes,
...@@ -2787,6 +3201,66 @@ pub const cpu = struct {...@@ -2787,6 +3201,66 @@ pub const cpu = struct {
2787 .xsaves,3201 .xsaves,
2788 }),3202 }),
2789 };3203 };
3204 pub const sierraforest = CpuModel{
3205 .name = "sierraforest",
3206 .llvm_name = "sierraforest",
3207 .features = featureSet(&[_]Feature{
3208 .@"64bit",
3209 .adx,
3210 .avxifma,
3211 .avxneconvert,
3212 .avxvnni,
3213 .avxvnniint8,
3214 .bmi,
3215 .bmi2,
3216 .cldemote,
3217 .clflushopt,
3218 .clwb,
3219 .cmov,
3220 .cmpccxadd,
3221 .crc32,
3222 .cx16,
3223 .f16c,
3224 .fast_movbe,
3225 .fma,
3226 .fsgsbase,
3227 .fxsr,
3228 .gfni,
3229 .hreset,
3230 .invpcid,
3231 .lzcnt,
3232 .mmx,
3233 .movbe,
3234 .movdir64b,
3235 .movdiri,
3236 .nopl,
3237 .pconfig,
3238 .pku,
3239 .popcnt,
3240 .prfchw,
3241 .ptwrite,
3242 .rdpid,
3243 .rdrnd,
3244 .rdseed,
3245 .sahf,
3246 .serialize,
3247 .sha,
3248 .shstk,
3249 .slow_incdec,
3250 .slow_lea,
3251 .slow_two_mem_ops,
3252 .use_glm_div_sqrt_costs,
3253 .vaes,
3254 .vpclmulqdq,
3255 .vzeroupper,
3256 .waitpkg,
3257 .widekl,
3258 .x87,
3259 .xsavec,
3260 .xsaveopt,
3261 .xsaves,
3262 }),
3263 };
2790 pub const silvermont = CpuModel{3264 pub const silvermont = CpuModel{
2791 .name = "silvermont",3265 .name = "silvermont",
2792 .llvm_name = "silvermont",3266 .llvm_name = "silvermont",
...@@ -2825,6 +3299,7 @@ pub const cpu = struct {...@@ -2825,6 +3299,7 @@ pub const cpu = struct {
2825 .@"64bit",3299 .@"64bit",
2826 .adx,3300 .adx,
2827 .aes,3301 .aes,
3302 .allow_light_256_bit,
2828 .avx512bw,3303 .avx512bw,
2829 .avx512cd,3304 .avx512cd,
2830 .avx512dq,3305 .avx512dq,
...@@ -2877,6 +3352,7 @@ pub const cpu = struct {...@@ -2877,6 +3352,7 @@ pub const cpu = struct {
2877 .@"64bit",3352 .@"64bit",
2878 .adx,3353 .adx,
2879 .aes,3354 .aes,
3355 .allow_light_256_bit,
2880 .avx2,3356 .avx2,
2881 .bmi,3357 .bmi,
2882 .bmi2,3358 .bmi2,
...@@ -2925,6 +3401,7 @@ pub const cpu = struct {...@@ -2925,6 +3401,7 @@ pub const cpu = struct {
2925 .@"64bit",3401 .@"64bit",
2926 .adx,3402 .adx,
2927 .aes,3403 .aes,
3404 .allow_light_256_bit,
2928 .avx512bw,3405 .avx512bw,
2929 .avx512cd,3406 .avx512cd,
2930 .avx512dq,3407 .avx512dq,
...@@ -3007,6 +3484,7 @@ pub const cpu = struct {...@@ -3007,6 +3484,7 @@ pub const cpu = struct {
3007 .features = featureSet(&[_]Feature{3484 .features = featureSet(&[_]Feature{
3008 .@"64bit",3485 .@"64bit",
3009 .adx,3486 .adx,
3487 .allow_light_256_bit,
3010 .avx512bitalg,3488 .avx512bitalg,
3011 .avx512cd,3489 .avx512cd,
3012 .avx512dq,3490 .avx512dq,
...@@ -3055,7 +3533,6 @@ pub const cpu = struct {...@@ -3055,7 +3533,6 @@ pub const cpu = struct {
3055 .sahf,3533 .sahf,
3056 .sha,3534 .sha,
3057 .shstk,3535 .shstk,
3058 .slow_3ops_lea,
3059 .vaes,3536 .vaes,
3060 .vpclmulqdq,3537 .vpclmulqdq,
3061 .vzeroupper,3538 .vzeroupper,
...@@ -3194,6 +3671,7 @@ pub const cpu = struct {...@@ -3194,6 +3671,7 @@ pub const cpu = struct {
3194 .llvm_name = "x86-64-v3",3671 .llvm_name = "x86-64-v3",
3195 .features = featureSet(&[_]Feature{3672 .features = featureSet(&[_]Feature{
3196 .@"64bit",3673 .@"64bit",
3674 .allow_light_256_bit,
3197 .avx2,3675 .avx2,
3198 .bmi,3676 .bmi,
3199 .bmi2,3677 .bmi2,
...@@ -3229,6 +3707,7 @@ pub const cpu = struct {...@@ -3229,6 +3707,7 @@ pub const cpu = struct {
3229 .llvm_name = "x86-64-v4",3707 .llvm_name = "x86-64-v4",
3230 .features = featureSet(&[_]Feature{3708 .features = featureSet(&[_]Feature{
3231 .@"64bit",3709 .@"64bit",
3710 .allow_light_256_bit,
3232 .avx512bw,3711 .avx512bw,
3233 .avx512cd,3712 .avx512cd,
3234 .avx512dq,3713 .avx512dq,
...@@ -3284,6 +3763,7 @@ pub const cpu = struct {...@@ -3284,6 +3763,7 @@ pub const cpu = struct {
3284 .@"64bit",3763 .@"64bit",
3285 .adx,3764 .adx,
3286 .aes,3765 .aes,
3766 .allow_light_256_bit,
3287 .avx2,3767 .avx2,
3288 .bmi,3768 .bmi,
3289 .bmi2,3769 .bmi2,
...@@ -3334,6 +3814,7 @@ pub const cpu = struct {...@@ -3334,6 +3814,7 @@ pub const cpu = struct {
3334 .@"64bit",3814 .@"64bit",
3335 .adx,3815 .adx,
3336 .aes,3816 .aes,
3817 .allow_light_256_bit,
3337 .avx2,3818 .avx2,
3338 .bmi,3819 .bmi,
3339 .bmi2,3820 .bmi2,
...@@ -3387,6 +3868,7 @@ pub const cpu = struct {...@@ -3387,6 +3868,7 @@ pub const cpu = struct {
3387 .features = featureSet(&[_]Feature{3868 .features = featureSet(&[_]Feature{
3388 .@"64bit",3869 .@"64bit",
3389 .adx,3870 .adx,
3871 .allow_light_256_bit,
3390 .avx2,3872 .avx2,
3391 .bmi,3873 .bmi,
3392 .bmi2,3874 .bmi2,
...@@ -3439,4 +3921,72 @@ pub const cpu = struct {...@@ -3439,4 +3921,72 @@ pub const cpu = struct {
3439 .xsaves,3921 .xsaves,
3440 }),3922 }),
3441 };3923 };
3924 pub const znver4 = CpuModel{
3925 .name = "znver4",
3926 .llvm_name = "znver4",
3927 .features = featureSet(&[_]Feature{
3928 .@"64bit",
3929 .adx,
3930 .allow_light_256_bit,
3931 .avx512bf16,
3932 .avx512bitalg,
3933 .avx512cd,
3934 .avx512dq,
3935 .avx512ifma,
3936 .avx512vbmi,
3937 .avx512vbmi2,
3938 .avx512vl,
3939 .avx512vnni,
3940 .avx512vpopcntdq,
3941 .bmi,
3942 .bmi2,
3943 .branchfusion,
3944 .clflushopt,
3945 .clwb,
3946 .clzero,
3947 .cmov,
3948 .crc32,
3949 .cx16,
3950 .fast_15bytenop,
3951 .fast_bextr,
3952 .fast_lzcnt,
3953 .fast_movbe,
3954 .fast_scalar_fsqrt,
3955 .fast_scalar_shift_masks,
3956 .fast_variable_perlane_shuffle,
3957 .fast_vector_fsqrt,
3958 .fsgsbase,
3959 .fsrm,
3960 .fxsr,
3961 .gfni,
3962 .invpcid,
3963 .lzcnt,
3964 .macrofusion,
3965 .mmx,
3966 .movbe,
3967 .mwaitx,
3968 .nopl,
3969 .pku,
3970 .popcnt,
3971 .prfchw,
3972 .rdpid,
3973 .rdpru,
3974 .rdrnd,
3975 .rdseed,
3976 .sahf,
3977 .sbb_dep_breaking,
3978 .sha,
3979 .shstk,
3980 .slow_shld,
3981 .sse4a,
3982 .vaes,
3983 .vpclmulqdq,
3984 .vzeroupper,
3985 .wbnoinvd,
3986 .x87,
3987 .xsavec,
3988 .xsaveopt,
3989 .xsaves,
3990 }),
3991 };
3442};3992};
lib/std/target/xtensa.zig created+39
...@@ -0,0 +1,39 @@
1//! This file is auto-generated by tools/update_cpu_features.zig.
2
3const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;
6
7pub const Feature = enum {
8 density,
9};
10
11pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
12pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
13pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
14pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
15
16pub const all_features = blk: {
17 const len = @typeInfo(Feature).Enum.fields.len;
18 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
19 var result: [len]CpuFeature = undefined;
20 result[@enumToInt(Feature.density)] = .{
21 .llvm_name = "density",
22 .description = "Enable Density instructions",
23 .dependencies = featureSet(&[_]Feature{}),
24 };
25 const ti = @typeInfo(Feature);
26 for (result) |*elem, i| {
27 elem.index = i;
28 elem.name = ti.Enum.fields[i].name;
29 }
30 break :blk result;
31};
32
33pub const cpu = struct {
34 pub const generic = CpuModel{
35 .name = "generic",
36 .llvm_name = "generic",
37 .features = featureSet(&[_]Feature{}),
38 };
39};
src/codegen/llvm.zig+16-2
...@@ -78,6 +78,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {...@@ -78,6 +78,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
78 .x86 => "i386",78 .x86 => "i386",
79 .x86_64 => "x86_64",79 .x86_64 => "x86_64",
80 .xcore => "xcore",80 .xcore => "xcore",
81 .xtensa => "xtensa",
81 .nvptx => "nvptx",82 .nvptx => "nvptx",
82 .nvptx64 => "nvptx64",83 .nvptx64 => "nvptx64",
83 .le32 => "le32",84 .le32 => "le32",
...@@ -88,6 +89,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {...@@ -88,6 +89,8 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
88 .hsail64 => "hsail64",89 .hsail64 => "hsail64",
89 .spir => "spir",90 .spir => "spir",
90 .spir64 => "spir64",91 .spir64 => "spir64",
92 .spirv32 => "spirv32",
93 .spirv64 => "spirv64",
91 .kalimba => "kalimba",94 .kalimba => "kalimba",
92 .shave => "shave",95 .shave => "shave",
93 .lanai => "lanai",96 .lanai => "lanai",
...@@ -97,8 +100,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {...@@ -97,8 +100,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
97 .renderscript64 => "renderscript64",100 .renderscript64 => "renderscript64",
98 .ve => "ve",101 .ve => "ve",
99 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",102 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",
100 .spirv32 => return error.@"LLVM backend does not support SPIR-V",
101 .spirv64 => return error.@"LLVM backend does not support SPIR-V",
102 };103 };
103 try llvm_triple.appendSlice(llvm_arch);104 try llvm_triple.appendSlice(llvm_arch);
104 try llvm_triple.appendSlice("-unknown-");105 try llvm_triple.appendSlice("-unknown-");
...@@ -169,6 +170,9 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {...@@ -169,6 +170,9 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![:0]u8 {
169 .gnuabi64 => "gnuabi64",170 .gnuabi64 => "gnuabi64",
170 .gnueabi => "gnueabi",171 .gnueabi => "gnueabi",
171 .gnueabihf => "gnueabihf",172 .gnueabihf => "gnueabihf",
173 .gnuf32 => "gnuf32",
174 .gnuf64 => "gnuf64",
175 .gnusf => "gnusf",
172 .gnux32 => "gnux32",176 .gnux32 => "gnux32",
173 .gnuilp32 => "gnuilp32",177 .gnuilp32 => "gnuilp32",
174 .code16 => "code16",178 .code16 => "code16",
...@@ -290,6 +294,7 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -290,6 +294,7 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
290 .x86 => .x86,294 .x86 => .x86,
291 .x86_64 => .x86_64,295 .x86_64 => .x86_64,
292 .xcore => .xcore,296 .xcore => .xcore,
297 .xtensa => .xtensa,
293 .nvptx => .nvptx,298 .nvptx => .nvptx,
294 .nvptx64 => .nvptx64,299 .nvptx64 => .nvptx64,
295 .le32 => .le32,300 .le32 => .le32,
...@@ -10092,6 +10097,15 @@ fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -10092,6 +10097,15 @@ fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
10092 llvm.LLVMInitializeX86AsmPrinter();10097 llvm.LLVMInitializeX86AsmPrinter();
10093 llvm.LLVMInitializeX86AsmParser();10098 llvm.LLVMInitializeX86AsmParser();
10094 },10099 },
10100 .xtensa => {
10101 if (build_options.llvm_has_xtensa) {
10102 llvm.LLVMInitializeXtensaTarget();
10103 llvm.LLVMInitializeXtensaTargetInfo();
10104 llvm.LLVMInitializeXtensaTargetMC();
10105 llvm.LLVMInitializeXtensaAsmPrinter();
10106 llvm.LLVMInitializeXtensaAsmParser();
10107 }
10108 },
10095 .xcore => {10109 .xcore => {
10096 llvm.LLVMInitializeXCoreTarget();10110 llvm.LLVMInitializeXCoreTarget();
10097 llvm.LLVMInitializeXCoreTargetInfo();10111 llvm.LLVMInitializeXCoreTargetInfo();
src/codegen/llvm/bindings.zig+5
...@@ -1133,6 +1133,7 @@ pub extern fn LLVMInitializeSystemZTargetInfo() void;...@@ -1133,6 +1133,7 @@ pub extern fn LLVMInitializeSystemZTargetInfo() void;
1133pub extern fn LLVMInitializeWebAssemblyTargetInfo() void;1133pub extern fn LLVMInitializeWebAssemblyTargetInfo() void;
1134pub extern fn LLVMInitializeX86TargetInfo() void;1134pub extern fn LLVMInitializeX86TargetInfo() void;
1135pub extern fn LLVMInitializeXCoreTargetInfo() void;1135pub extern fn LLVMInitializeXCoreTargetInfo() void;
1136pub extern fn LLVMInitializeXtensaTargetInfo() void;
1136pub extern fn LLVMInitializeM68kTargetInfo() void;1137pub extern fn LLVMInitializeM68kTargetInfo() void;
1137pub extern fn LLVMInitializeCSKYTargetInfo() void;1138pub extern fn LLVMInitializeCSKYTargetInfo() void;
1138pub extern fn LLVMInitializeVETargetInfo() void;1139pub extern fn LLVMInitializeVETargetInfo() void;
...@@ -1155,6 +1156,7 @@ pub extern fn LLVMInitializeSystemZTarget() void;...@@ -1155,6 +1156,7 @@ pub extern fn LLVMInitializeSystemZTarget() void;
1155pub extern fn LLVMInitializeWebAssemblyTarget() void;1156pub extern fn LLVMInitializeWebAssemblyTarget() void;
1156pub extern fn LLVMInitializeX86Target() void;1157pub extern fn LLVMInitializeX86Target() void;
1157pub extern fn LLVMInitializeXCoreTarget() void;1158pub extern fn LLVMInitializeXCoreTarget() void;
1159pub extern fn LLVMInitializeXtensaTarget() void;
1158pub extern fn LLVMInitializeM68kTarget() void;1160pub extern fn LLVMInitializeM68kTarget() void;
1159pub extern fn LLVMInitializeVETarget() void;1161pub extern fn LLVMInitializeVETarget() void;
1160pub extern fn LLVMInitializeCSKYTarget() void;1162pub extern fn LLVMInitializeCSKYTarget() void;
...@@ -1177,6 +1179,7 @@ pub extern fn LLVMInitializeSystemZTargetMC() void;...@@ -1177,6 +1179,7 @@ pub extern fn LLVMInitializeSystemZTargetMC() void;
1177pub extern fn LLVMInitializeWebAssemblyTargetMC() void;1179pub extern fn LLVMInitializeWebAssemblyTargetMC() void;
1178pub extern fn LLVMInitializeX86TargetMC() void;1180pub extern fn LLVMInitializeX86TargetMC() void;
1179pub extern fn LLVMInitializeXCoreTargetMC() void;1181pub extern fn LLVMInitializeXCoreTargetMC() void;
1182pub extern fn LLVMInitializeXtensaTargetMC() void;
1180pub extern fn LLVMInitializeM68kTargetMC() void;1183pub extern fn LLVMInitializeM68kTargetMC() void;
1181pub extern fn LLVMInitializeCSKYTargetMC() void;1184pub extern fn LLVMInitializeCSKYTargetMC() void;
1182pub extern fn LLVMInitializeVETargetMC() void;1185pub extern fn LLVMInitializeVETargetMC() void;
...@@ -1199,6 +1202,7 @@ pub extern fn LLVMInitializeSystemZAsmPrinter() void;...@@ -1199,6 +1202,7 @@ pub extern fn LLVMInitializeSystemZAsmPrinter() void;
1199pub extern fn LLVMInitializeWebAssemblyAsmPrinter() void;1202pub extern fn LLVMInitializeWebAssemblyAsmPrinter() void;
1200pub extern fn LLVMInitializeX86AsmPrinter() void;1203pub extern fn LLVMInitializeX86AsmPrinter() void;
1201pub extern fn LLVMInitializeXCoreAsmPrinter() void;1204pub extern fn LLVMInitializeXCoreAsmPrinter() void;
1205pub extern fn LLVMInitializeXtensaAsmPrinter() void;
1202pub extern fn LLVMInitializeM68kAsmPrinter() void;1206pub extern fn LLVMInitializeM68kAsmPrinter() void;
1203pub extern fn LLVMInitializeVEAsmPrinter() void;1207pub extern fn LLVMInitializeVEAsmPrinter() void;
1204pub extern fn LLVMInitializeARCAsmPrinter() void;1208pub extern fn LLVMInitializeARCAsmPrinter() void;
...@@ -1218,6 +1222,7 @@ pub extern fn LLVMInitializeSparcAsmParser() void;...@@ -1218,6 +1222,7 @@ pub extern fn LLVMInitializeSparcAsmParser() void;
1218pub extern fn LLVMInitializeSystemZAsmParser() void;1222pub extern fn LLVMInitializeSystemZAsmParser() void;
1219pub extern fn LLVMInitializeWebAssemblyAsmParser() void;1223pub extern fn LLVMInitializeWebAssemblyAsmParser() void;
1220pub extern fn LLVMInitializeX86AsmParser() void;1224pub extern fn LLVMInitializeX86AsmParser() void;
1225pub extern fn LLVMInitializeXtensaAsmParser() void;
1221pub extern fn LLVMInitializeM68kAsmParser() void;1226pub extern fn LLVMInitializeM68kAsmParser() void;
1222pub extern fn LLVMInitializeCSKYAsmParser() void;1227pub extern fn LLVMInitializeCSKYAsmParser() void;
1223pub extern fn LLVMInitializeVEAsmParser() void;1228pub extern fn LLVMInitializeVEAsmParser() void;
src/target.zig+8-4
...@@ -88,6 +88,9 @@ pub fn libCGenericName(target: std.Target) [:0]const u8 {...@@ -88,6 +88,9 @@ pub fn libCGenericName(target: std.Target) [:0]const u8 {
88 .gnuabi64,88 .gnuabi64,
89 .gnueabi,89 .gnueabi,
90 .gnueabihf,90 .gnueabihf,
91 .gnuf32,
92 .gnuf64,
93 .gnusf,
91 .gnux32,94 .gnux32,
92 .gnuilp32,95 .gnuilp32,
93 => return "glibc",96 => return "glibc",
...@@ -286,6 +289,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -286,6 +289,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
286 .x86,289 .x86,
287 .x86_64,290 .x86_64,
288 .xcore,291 .xcore,
292 .xtensa,
289 .nvptx,293 .nvptx,
290 .nvptx64,294 .nvptx64,
291 .le32,295 .le32,
...@@ -296,6 +300,8 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -296,6 +300,8 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
296 .hsail64,300 .hsail64,
297 .spir,301 .spir,
298 .spir64,302 .spir64,
303 .spirv32,
304 .spirv64,
299 .kalimba,305 .kalimba,
300 .shave,306 .shave,
301 .lanai,307 .lanai,
...@@ -306,10 +312,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -306,10 +312,7 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
306 .ve,312 .ve,
307 => true,313 => true,
308314
309 .spu_2,315 .spu_2 => false,
310 .spirv32,
311 .spirv64,
312 => false,
313 };316 };
314}317}
315318
...@@ -566,6 +569,7 @@ pub fn atomicPtrAlignment(...@@ -566,6 +569,7 @@ pub fn atomicPtrAlignment(
566 .spirv32,569 .spirv32,
567 .dxil,570 .dxil,
568 .loongarch32,571 .loongarch32,
572 .xtensa,
569 => 32,573 => 32,
570574
571 .aarch64,575 .aarch64,
src/type.zig+1
...@@ -7051,6 +7051,7 @@ pub const CType = enum {...@@ -7051,6 +7051,7 @@ pub const CType = enum {
7051 .renderscript32,7051 .renderscript32,
7052 .ve,7052 .ve,
7053 .spu_2,7053 .spu_2,
7054 .xtensa,
7054 => 4,7055 => 4,
70557056
7056 .aarch64_32,7057 .aarch64_32,
stage1/config.zig.in+1
...@@ -2,6 +2,7 @@ pub const have_llvm = true;...@@ -2,6 +2,7 @@ pub const have_llvm = true;
2pub const llvm_has_m68k = false;2pub const llvm_has_m68k = false;
3pub const llvm_has_csky = false;3pub const llvm_has_csky = false;
4pub const llvm_has_arc = false;4pub const llvm_has_arc = false;
5pub const llvm_has_xtensa = false;
5pub const version: [:0]const u8 = "@RESOLVED_ZIG_VERSION@";6pub const version: [:0]const u8 = "@RESOLVED_ZIG_VERSION@";
6pub const semver = @import("std").SemanticVersion.parse(version) catch unreachable;7pub const semver = @import("std").SemanticVersion.parse(version) catch unreachable;
7pub const enable_logging: bool = false;8pub const enable_logging: bool = false;
tools/update_cpu_features.zig+79
...@@ -79,6 +79,10 @@ const llvm_targets = [_]LlvmTarget{...@@ -79,6 +79,10 @@ const llvm_targets = [_]LlvmTarget{
79 .llvm_name = "neoversev1",79 .llvm_name = "neoversev1",
80 .flatten = true,80 .flatten = true,
81 },81 },
82 .{
83 .llvm_name = "neoversev2",
84 .flatten = true,
85 },
82 .{86 .{
83 .llvm_name = "neoverse512tvb",87 .llvm_name = "neoverse512tvb",
84 .flatten = true,88 .flatten = true,
...@@ -137,6 +141,14 @@ const llvm_targets = [_]LlvmTarget{...@@ -137,6 +141,14 @@ const llvm_targets = [_]LlvmTarget{
137 .llvm_name = "a77",141 .llvm_name = "a77",
138 .flatten = true,142 .flatten = true,
139 },143 },
144 .{
145 .llvm_name = "a715",
146 .flatten = true,
147 },
148 .{
149 .llvm_name = "ampere1a",
150 .flatten = true,
151 },
140 .{152 .{
141 .llvm_name = "apple-a7",153 .llvm_name = "apple-a7",
142 .flatten = true,154 .flatten = true,
...@@ -161,6 +173,14 @@ const llvm_targets = [_]LlvmTarget{...@@ -161,6 +173,14 @@ const llvm_targets = [_]LlvmTarget{
161 .llvm_name = "apple-a14",173 .llvm_name = "apple-a14",
162 .flatten = true,174 .flatten = true,
163 },175 },
176 .{
177 .llvm_name = "apple-a15",
178 .flatten = true,
179 },
180 .{
181 .llvm_name = "apple-a16",
182 .flatten = true,
183 },
164 .{184 .{
165 .llvm_name = "apple-a7-sysreg",185 .llvm_name = "apple-a7-sysreg",
166 .flatten = true,186 .flatten = true,
...@@ -181,6 +201,10 @@ const llvm_targets = [_]LlvmTarget{...@@ -181,6 +201,10 @@ const llvm_targets = [_]LlvmTarget{
181 .llvm_name = "cortex-x2",201 .llvm_name = "cortex-x2",
182 .flatten = true,202 .flatten = true,
183 },203 },
204 .{
205 .llvm_name = "cortex-x3",
206 .flatten = true,
207 },
184 .{208 .{
185 .llvm_name = "falkor",209 .llvm_name = "falkor",
186 .flatten = true,210 .flatten = true,
...@@ -594,6 +618,10 @@ const llvm_targets = [_]LlvmTarget{...@@ -594,6 +618,10 @@ const llvm_targets = [_]LlvmTarget{
594 .llvm_name = "armv8.8-a",618 .llvm_name = "armv8.8-a",
595 .zig_name = "v8_8a",619 .zig_name = "v8_8a",
596 },620 },
621 .{
622 .llvm_name = "armv8.9-a",
623 .zig_name = "v8_9a",
624 },
597 .{625 .{
598 .llvm_name = "armv8-a",626 .llvm_name = "armv8-a",
599 .zig_name = "v8a",627 .zig_name = "v8a",
...@@ -622,6 +650,10 @@ const llvm_targets = [_]LlvmTarget{...@@ -622,6 +650,10 @@ const llvm_targets = [_]LlvmTarget{
622 .llvm_name = "armv9.3-a",650 .llvm_name = "armv9.3-a",
623 .zig_name = "v9_3a",651 .zig_name = "v9_3a",
624 },652 },
653 .{
654 .llvm_name = "armv9.4-a",
655 .zig_name = "v9_4a",
656 },
625 .{657 .{
626 .llvm_name = "armv9-a",658 .llvm_name = "armv9-a",
627 .zig_name = "v9a",659 .zig_name = "v9a",
...@@ -710,6 +742,10 @@ const llvm_targets = [_]LlvmTarget{...@@ -710,6 +742,10 @@ const llvm_targets = [_]LlvmTarget{
710 .llvm_name = "v8.8a",742 .llvm_name = "v8.8a",
711 .zig_name = "has_v8_8a",743 .zig_name = "has_v8_8a",
712 },744 },
745 .{
746 .llvm_name = "v8.9a",
747 .zig_name = "has_v8_9a",
748 },
713 .{749 .{
714 .llvm_name = "v9a",750 .llvm_name = "v9a",
715 .zig_name = "has_v9a",751 .zig_name = "has_v9a",
...@@ -726,6 +762,33 @@ const llvm_targets = [_]LlvmTarget{...@@ -726,6 +762,33 @@ const llvm_targets = [_]LlvmTarget{
726 .llvm_name = "v9.3a",762 .llvm_name = "v9.3a",
727 .zig_name = "has_v9_3a",763 .zig_name = "has_v9_3a",
728 },764 },
765 .{
766 .llvm_name = "v9.4a",
767 .zig_name = "has_v9_4a",
768 },
769 },
770 // LLVM removed support for v2 and v3 but zig wants to support targeting old hardware
771 .extra_features = &.{
772 .{
773 .zig_name = "v2",
774 .desc = "ARMv2 architecture",
775 .deps = &.{"strict_align"},
776 },
777 .{
778 .zig_name = "v2a",
779 .desc = "ARMv2a architecture",
780 .deps = &.{"strict_align"},
781 },
782 .{
783 .zig_name = "v3",
784 .desc = "ARMv3 architecture",
785 .deps = &.{"strict_align"},
786 },
787 .{
788 .zig_name = "v3m",
789 .desc = "ARMv3m architecture",
790 .deps = &.{"strict_align"},
791 },
729 },792 },
730 },793 },
731 .{794 .{
...@@ -753,6 +816,11 @@ const llvm_targets = [_]LlvmTarget{...@@ -753,6 +816,11 @@ const llvm_targets = [_]LlvmTarget{
753 .llvm_name = "Lanai",816 .llvm_name = "Lanai",
754 .td_name = "Lanai.td",817 .td_name = "Lanai.td",
755 },818 },
819 .{
820 .zig_name = "loongarch",
821 .llvm_name = "LoongArch",
822 .td_name = "LoongArch.td",
823 },
756 .{824 .{
757 .zig_name = "m68k",825 .zig_name = "m68k",
758 .llvm_name = "M68k",826 .llvm_name = "M68k",
...@@ -812,6 +880,12 @@ const llvm_targets = [_]LlvmTarget{...@@ -812,6 +880,12 @@ const llvm_targets = [_]LlvmTarget{
812 .llvm_name = "Sparc",880 .llvm_name = "Sparc",
813 .td_name = "Sparc.td",881 .td_name = "Sparc.td",
814 },882 },
883 // TODO: merge tools/update_spirv_features.zig into this script
884 //.{
885 // .zig_name = "spirv",
886 // .llvm_name = "SPIRV",
887 // .td_name = "SPIRV.td",
888 //},
815 .{889 .{
816 .zig_name = "s390x",890 .zig_name = "s390x",
817 .llvm_name = "SystemZ",891 .llvm_name = "SystemZ",
...@@ -847,6 +921,11 @@ const llvm_targets = [_]LlvmTarget{...@@ -847,6 +921,11 @@ const llvm_targets = [_]LlvmTarget{
847 .llvm_name = "XCore",921 .llvm_name = "XCore",
848 .td_name = "XCore.td",922 .td_name = "XCore.td",
849 },923 },
924 .{
925 .zig_name = "xtensa",
926 .llvm_name = "Xtensa",
927 .td_name = "Xtensa.td",
928 },
850};929};
851930
852pub fn main() anyerror!void {931pub fn main() anyerror!void {