Commit 0f46c12f789d10915e04c8aec26f0330536539c7 | zig

author	Layne Gustafson <lgustaf1@binghamton.edu> 2019-12-16 16:13:03-05:00
committer	Andrew Kelley <andrew@ziglang.org> 2020-01-19 20:53:15-05:00
log	0f46c12f789d10915e04c8aec26f0330536539c7
tree	621344ee3294487f8add5faa13ec98a94a21172d
parent	7a1cde7206263c8bb3265c225ed4213d1b7bdb58
signature	Commit is signed but in an unrecognized format.

Create initial target details infrastructure

36 files changed, 13332 insertions(+), 0 deletions(-)

lib/std/std.zig+1

...	...	@@ -60,6 +60,7 @@ pub const rand = @import("rand.zig");
60	60	pub const rb = @import("rb.zig");
61	61	pub const sort = @import("sort.zig");
62	62	pub const ascii = @import("ascii.zig");
	63	pub const target = @import("target.zig");
63	64	pub const testing = @import("testing.zig");
64	65	pub const time = @import("time.zig");
65	66	pub const unicode = @import("unicode.zig");

lib/std/target.zig+3

...	...	@@ -2,6 +2,9 @@ const std = @import("std.zig");
2	2	const mem = std.mem;
3	3	const builtin = std.builtin;
4	4
	5	pub const feature = @import("target/feature.zig");
	6	pub const cpu = @import("target/cpu.zig");
	7
5	8	/// TODO Nearly all the functions in this namespace would be
6	9	/// better off if https://github.com/ziglang/zig/issues/425
7	10	/// was solved.

lib/std/target/cpu.zig created+65

...	...	@@ -0,0 +1,65 @@
	1	const std = @import("std");
	2
	3	const feature = @import("feature.zig");
	4	const Arch = @import("arch.zig").Arch;
	5
	6	pub const AArch64Cpu = @import("cpu/AArch64Cpu.zig").AArch64Cpu;
	7	pub const AmdGpuCpu = @import("cpu/AmdGpuCpu.zig").AmdGpuCpu;
	8	pub const ArmCpu = @import("cpu/ArmCpu.zig").ArmCpu;
	9	pub const AvrCpu = @import("cpu/AvrCpu.zig").AvrCpu;
	10	pub const BpfCpu = @import("cpu/BpfCpu.zig").BpfCpu;
	11	pub const HexagonCpu = @import("cpu/HexagonCpu.zig").HexagonCpu;
	12	pub const MipsCpu = @import("cpu/MipsCpu.zig").MipsCpu;
	13	pub const Msp430Cpu = @import("cpu/Msp430Cpu.zig").Msp430Cpu;
	14	pub const NvptxCpu = @import("cpu/NvptxCpu.zig").NvptxCpu;
	15	pub const PowerPcCpu = @import("cpu/PowerPcCpu.zig").PowerPcCpu;
	16	pub const RiscVCpu = @import("cpu/RiscVCpu.zig").RiscVCpu;
	17	pub const SparcCpu = @import("cpu/SparcCpu.zig").SparcCpu;
	18	pub const SystemZCpu = @import("cpu/SystemZCpu.zig").SystemZCpu;
	19	pub const WebAssemblyCpu = @import("cpu/WebAssemblyCpu.zig").WebAssemblyCpu;
	20	pub const X86Cpu = @import("cpu/X86Cpu.zig").X86Cpu;
	21
	22	const EmptyCpu = @import("feature/empty.zig").EmptyCpu;
	23
	24	pub fn ArchCpu(comptime arch: @TagType(Arch)) type {
	25	return switch (arch) {
	26	.arm, .armeb, .thumb, .thumbeb => ArmCpu,
	27	.aarch64, .aarch64_be, .aarch64_32 => AArch64Cpu,
	28	.avr => AvrCpu,
	29	.bpfel, .bpfeb => BpfCpu,
	30	.hexagon => HexagonCpu,
	31	.mips, .mipsel, .mips64, .mips64el => MipsCpu,
	32	.msp430 => Msp430Cpu,
	33	.powerpc, .powerpc64, .powerpc64le => PowerPcCpu,
	34	.amdgcn => AmdGpuCpu,
	35	.riscv32, .riscv64 => RiscVCpu,
	36	.sparc, .sparcv9, .sparcel => SparcCpu,
	37	.s390x => SystemZCpu,
	38	.i386, .x86_64 => X86Cpu,
	39	.nvptx, .nvptx64 => NvptxCpu,
	40	.wasm32, .wasm64 => WebAssemblyCpu,
	41
	42	else => EmptyCpu,
	43	};
	44	}
	45
	46	pub fn ArchCpuInfo(comptime arch: @TagType(Arch)) type {
	47	return CpuInfo(feature.ArchFeature(arch));
	48	}
	49
	50	pub fn CpuInfo(comptime FeatureType: type) type {
	51	return struct {
	52	name: []const u8,
	53
	54	features: []const FeatureType,
	55
	56	const Self = @This();
	57
	58	fn create(name: []const u8, features: []const FeatureType) Self {
	59	return Self {
	60	.name = name,
	61	.features = features,
	62	};
	63	}
	64	};
	65	}

lib/std/target/cpu/AArch64Cpu.zig created+480

...	...	@@ -0,0 +1,480 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const AArch64Cpu = enum {
	5	AppleLatest,
	6	CortexA35,
	7	CortexA53,
	8	CortexA55,
	9	CortexA57,
	10	CortexA65,
	11	CortexA65ae,
	12	CortexA72,
	13	CortexA73,
	14	CortexA75,
	15	CortexA76,
	16	CortexA76ae,
	17	Cyclone,
	18	ExynosM1,
	19	ExynosM2,
	20	ExynosM3,
	21	ExynosM4,
	22	ExynosM5,
	23	Falkor,
	24	Generic,
	25	Kryo,
	26	NeoverseE1,
	27	NeoverseN1,
	28	Saphira,
	29	Thunderx,
	30	Thunderx2t99,
	31	Thunderxt81,
	32	Thunderxt83,
	33	Thunderxt88,
	34	Tsv110,
	35
	36	pub fn getInfo(self: @This()) CpuInfo {
	37	return cpu_infos[@enumToInt(self)];
	38	}
	39
	40	pub const FeatureType = feature.AArch64Feature;
	41
	42	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	43	CpuInfo(@This()).create(.AppleLatest, "apple-latest", &[_]FeatureType {
	44	.ZczFp,
	45	.ArithCbzFusion,
	46	.FuseAes,
	47	.AlternateSextloadCvtF32Pattern,
	48	.ZczFpWorkaround,
	49	.FpArmv8,
	50	.Perfmon,
	51	.DisableLatencySchedHeuristic,
	52	.Zcm,
	53	.ZczGp,
	54	.ArithBccFusion,
	55	.FuseCryptoEor,
	56	.Cyclone,
	57	},
	58	CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
	59	.Perfmon,
	60	.FpArmv8,
	61	.Crc,
	62	.A35,
	63	},
	64	CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
	65	.UseAa,
	66	.FuseAes,
	67	.FpArmv8,
	68	.Perfmon,
	69	.Crc,
	70	.BalanceFpOps,
	71	.UsePostraScheduler,
	72	.CustomCheapAsMove,
	73	.A53,
	74	},
	75	CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
	76	.Rcpc,
	77	.Ccpp,
	78	.Pan,
	79	.Rdm,
	80	.FuseAes,
	81	.Perfmon,
	82	.FpArmv8,
	83	.Lse,
	84	.Crc,
	85	.Dotprod,
	86	.Lor,
	87	.Uaops,
	88	.Vh,
	89	.Ras,
	90	.A55,
	91	},
	92	CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
	93	.FuseLiterals,
	94	.FuseAes,
	95	.FpArmv8,
	96	.Perfmon,
	97	.Crc,
	98	.BalanceFpOps,
	99	.UsePostraScheduler,
	100	.CustomCheapAsMove,
	101	.PredictableSelectExpensive,
	102	.A57,
	103	},
	104	CpuInfo(@This()).create(.CortexA65, "cortex-a65", &[_]FeatureType {
	105	.Rcpc,
	106	.Ccpp,
	107	.Pan,
	108	.Rdm,
	109	.FpArmv8,
	110	.Lse,
	111	.Crc,
	112	.Dotprod,
	113	.Lor,
	114	.Ssbs,
	115	.Uaops,
	116	.Vh,
	117	.Ras,
	118	.A65,
	119	},
	120	CpuInfo(@This()).create(.CortexA65ae, "cortex-a65ae", &[_]FeatureType {
	121	.Rcpc,
	122	.Ccpp,
	123	.Pan,
	124	.Rdm,
	125	.FpArmv8,
	126	.Lse,
	127	.Crc,
	128	.Dotprod,
	129	.Lor,
	130	.Ssbs,
	131	.Uaops,
	132	.Vh,
	133	.Ras,
	134	.A65,
	135	},
	136	CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
	137	.Perfmon,
	138	.FuseAes,
	139	.FpArmv8,
	140	.Crc,
	141	.A72,
	142	},
	143	CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
	144	.Perfmon,
	145	.FuseAes,
	146	.FpArmv8,
	147	.Crc,
	148	.A73,
	149	},
	150	CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
	151	.Rcpc,
	152	.Ccpp,
	153	.Pan,
	154	.Rdm,
	155	.FuseAes,
	156	.Perfmon,
	157	.FpArmv8,
	158	.Lse,
	159	.Crc,
	160	.Dotprod,
	161	.Lor,
	162	.Uaops,
	163	.Vh,
	164	.Ras,
	165	.A75,
	166	},
	167	CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
	168	.Rcpc,
	169	.Ccpp,
	170	.Pan,
	171	.Rdm,
	172	.FpArmv8,
	173	.Lse,
	174	.Crc,
	175	.Dotprod,
	176	.Lor,
	177	.Ssbs,
	178	.Uaops,
	179	.Vh,
	180	.Ras,
	181	.A76,
	182	},
	183	CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
	184	.Rcpc,
	185	.Ccpp,
	186	.Pan,
	187	.Rdm,
	188	.FpArmv8,
	189	.Lse,
	190	.Crc,
	191	.Dotprod,
	192	.Lor,
	193	.Ssbs,
	194	.Uaops,
	195	.Vh,
	196	.Ras,
	197	.A76,
	198	},
	199	CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
	200	.ZczFp,
	201	.ArithCbzFusion,
	202	.FuseAes,
	203	.AlternateSextloadCvtF32Pattern,
	204	.ZczFpWorkaround,
	205	.FpArmv8,
	206	.Perfmon,
	207	.DisableLatencySchedHeuristic,
	208	.Zcm,
	209	.ZczGp,
	210	.ArithBccFusion,
	211	.FuseCryptoEor,
	212	.Cyclone,
	213	},
	214	CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
	215	.ZczFp,
	216	.FuseAes,
	217	.SlowPaired128,
	218	.Force32bitJumpTables,
	219	.UseReciprocalSquareRoot,
	220	.FpArmv8,
	221	.Perfmon,
	222	.SlowMisaligned128store,
	223	.Crc,
	224	.UsePostraScheduler,
	225	.CustomCheapAsMove,
	226	.Exynosm1,
	227	},
	228	CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
	229	.ZczFp,
	230	.FuseAes,
	231	.SlowPaired128,
	232	.Force32bitJumpTables,
	233	.FpArmv8,
	234	.Perfmon,
	235	.SlowMisaligned128store,
	236	.Crc,
	237	.UsePostraScheduler,
	238	.CustomCheapAsMove,
	239	.Exynosm2,
	240	},
	241	CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
	242	.ZczFp,
	243	.FuseLiterals,
	244	.FuseAes,
	245	.Force32bitJumpTables,
	246	.FpArmv8,
	247	.Perfmon,
	248	.Crc,
	249	.LslFast,
	250	.FuseAddress,
	251	.UsePostraScheduler,
	252	.CustomCheapAsMove,
	253	.PredictableSelectExpensive,
	254	.FuseCsel,
	255	.Exynosm3,
	256	},
	257	CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
	258	.ZczFp,
	259	.Lse,
	260	.FuseArithLogic,
	261	.Lor,
	262	.UsePostraScheduler,
	263	.Uaops,
	264	.CustomCheapAsMove,
	265	.ArithBccFusion,
	266	.Ccpp,
	267	.Perfmon,
	268	.Pan,
	269	.Rdm,
	270	.FuseLiterals,
	271	.Force32bitJumpTables,
	272	.LslFast,
	273	.FuseAddress,
	274	.ZczGp,
	275	.Ras,
	276	.FuseCsel,
	277	.ArithCbzFusion,
	278	.FuseAes,
	279	.FpArmv8,
	280	.Crc,
	281	.Dotprod,
	282	.Vh,
	283	.Exynosm4,
	284	},
	285	CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
	286	.ZczFp,
	287	.Lse,
	288	.FuseArithLogic,
	289	.Lor,
	290	.UsePostraScheduler,
	291	.Uaops,
	292	.CustomCheapAsMove,
	293	.ArithBccFusion,
	294	.Ccpp,
	295	.Perfmon,
	296	.Pan,
	297	.Rdm,
	298	.FuseLiterals,
	299	.Force32bitJumpTables,
	300	.LslFast,
	301	.FuseAddress,
	302	.ZczGp,
	303	.Ras,
	304	.FuseCsel,
	305	.ArithCbzFusion,
	306	.FuseAes,
	307	.FpArmv8,
	308	.Crc,
	309	.Dotprod,
	310	.Vh,
	311	.Exynosm4,
	312	},
	313	CpuInfo(@This()).create(.Falkor, "falkor", &[_]FeatureType {
	314	.ZczFp,
	315	.Rdm,
	316	.SlowStrqroStore,
	317	.Perfmon,
	318	.FpArmv8,
	319	.Crc,
	320	.LslFast,
	321	.UsePostraScheduler,
	322	.ZczGp,
	323	.CustomCheapAsMove,
	324	.PredictableSelectExpensive,
	325	.Falkor,
	326	},
	327	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	328	.Trbe,
	329	.Ete,
	330	.FpArmv8,
	331	.FuseAes,
	332	.Neon,
	333	.Perfmon,
	334	.UsePostraScheduler,
	335	},
	336	CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
	337	.ZczFp,
	338	.Perfmon,
	339	.FpArmv8,
	340	.Crc,
	341	.LslFast,
	342	.UsePostraScheduler,
	343	.ZczGp,
	344	.CustomCheapAsMove,
	345	.PredictableSelectExpensive,
	346	.Kryo,
	347	},
	348	CpuInfo(@This()).create(.NeoverseE1, "neoverse-e1", &[_]FeatureType {
	349	.Rcpc,
	350	.Ccpp,
	351	.Pan,
	352	.Rdm,
	353	.FpArmv8,
	354	.Lse,
	355	.Crc,
	356	.Dotprod,
	357	.Lor,
	358	.Ssbs,
	359	.Uaops,
	360	.Vh,
	361	.Ras,
	362	.Neoversee1,
	363	},
	364	CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
	365	.Rcpc,
	366	.Spe,
	367	.Ccpp,
	368	.Pan,
	369	.Rdm,
	370	.FpArmv8,
	371	.Lse,
	372	.Crc,
	373	.Dotprod,
	374	.Lor,
	375	.Ssbs,
	376	.Uaops,
	377	.Vh,
	378	.Ras,
	379	.Neoversen1,
	380	},
	381	CpuInfo(@This()).create(.Saphira, "saphira", &[_]FeatureType {
	382	.ZczFp,
	383	.Nv,
	384	.Am,
	385	.Lse,
	386	.Sel2,
	387	.Lor,
	388	.Tracev84,
	389	.Uaops,
	390	.UsePostraScheduler,
	391	.CustomCheapAsMove,
	392	.Ccpp,
	393	.Perfmon,
	394	.TlbRmi,
	395	.PredictableSelectExpensive,
	396	.Fmi,
	397	.Rcpc,
	398	.Pan,
	399	.Rdm,
	400	.LslFast,
	401	.Pa,
	402	.ZczGp,
	403	.Dit,
	404	.Ras,
	405	.Spe,
	406	.Mpam,
	407	.FpArmv8,
	408	.Ccidx,
	409	.Dotprod,
	410	.Crc,
	411	.Vh,
	412	.Saphira,
	413	},
	414	CpuInfo(@This()).create(.Thunderx, "thunderx", &[_]FeatureType {
	415	.Perfmon,
	416	.FpArmv8,
	417	.Crc,
	418	.UsePostraScheduler,
	419	.PredictableSelectExpensive,
	420	.Thunderx,
	421	},
	422	CpuInfo(@This()).create(.Thunderx2t99, "thunderx2t99", &[_]FeatureType {
	423	.Pan,
	424	.Rdm,
	425	.Vh,
	426	.AggressiveFma,
	427	.FpArmv8,
	428	.Lse,
	429	.Crc,
	430	.Lor,
	431	.UsePostraScheduler,
	432	.ArithBccFusion,
	433	.PredictableSelectExpensive,
	434	.Thunderx2t99,
	435	},
	436	CpuInfo(@This()).create(.Thunderxt81, "thunderxt81", &[_]FeatureType {
	437	.Perfmon,
	438	.FpArmv8,
	439	.Crc,
	440	.UsePostraScheduler,
	441	.PredictableSelectExpensive,
	442	.Thunderxt81,
	443	},
	444	CpuInfo(@This()).create(.Thunderxt83, "thunderxt83", &[_]FeatureType {
	445	.Perfmon,
	446	.FpArmv8,
	447	.Crc,
	448	.UsePostraScheduler,
	449	.PredictableSelectExpensive,
	450	.Thunderxt83,
	451	},
	452	CpuInfo(@This()).create(.Thunderxt88, "thunderxt88", &[_]FeatureType {
	453	.Perfmon,
	454	.FpArmv8,
	455	.Crc,
	456	.UsePostraScheduler,
	457	.PredictableSelectExpensive,
	458	.Thunderxt88,
	459	},
	460	CpuInfo(@This()).create(.Tsv110, "tsv110", &[_]FeatureType {
	461	.Uaops,
	462	.Spe,
	463	.Ccpp,
	464	.Pan,
	465	.Rdm,
	466	.FuseAes,
	467	.Vh,
	468	.Perfmon,
	469	.FpArmv8,
	470	.Lse,
	471	.Crc,
	472	.Dotprod,
	473	.Lor,
	474	.UsePostraScheduler,
	475	.CustomCheapAsMove,
	476	.Ras,
	477	.Tsv110,
	478	},
	479	};
	480	};

lib/std/target/cpu/AmdGpuCpu.zig created+1060

...	...	@@ -0,0 +1,1060 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const AmdGpuCpu = enum {
	5	Bonaire,
	6	Carrizo,
	7	Fiji,
	8	Generic,
	9	GenericHsa,
	10	Gfx1010,
	11	Gfx1011,
	12	Gfx1012,
	13	Gfx600,
	14	Gfx601,
	15	Gfx700,
	16	Gfx701,
	17	Gfx702,
	18	Gfx703,
	19	Gfx704,
	20	Gfx801,
	21	Gfx802,
	22	Gfx803,
	23	Gfx810,
	24	Gfx900,
	25	Gfx902,
	26	Gfx904,
	27	Gfx906,
	28	Gfx908,
	29	Gfx909,
	30	Hainan,
	31	Hawaii,
	32	Iceland,
	33	Kabini,
	34	Kaveri,
	35	Mullins,
	36	Oland,
	37	Pitcairn,
	38	Polaris10,
	39	Polaris11,
	40	Stoney,
	41	Tahiti,
	42	Tonga,
	43	Verde,
	44
	45	pub fn getInfo(self: @This()) CpuInfo {
	46	return cpu_infos[@enumToInt(self)];
	47	}
	48
	49	pub const FeatureType = feature.AmdGpuFeature;
	50
	51	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	52	CpuInfo(@This()).create(.Bonaire, "bonaire", &[_]FeatureType {
	53	.CodeObjectV3,
	54	.NoXnackSupport,
	55	.Ldsbankcount32,
	56	.Wavefrontsize64,
	57	.MimgR128,
	58	.Fp64,
	59	.CiInsts,
	60	.FlatAddressSpace,
	61	.TrigReducedRange,
	62	.NoSramEccSupport,
	63	.Movrel,
	64	.Localmemorysize65536,
	65	.Gfx7Gfx8Gfx9Insts,
	66	.SeaIslands,
	67	},
	68	CpuInfo(@This()).create(.Carrizo, "carrizo", &[_]FeatureType {
	69	.CodeObjectV3,
	70	.FastFmaf,
	71	.Ldsbankcount32,
	72	.UnpackedD16Vmem,
	73	.Wavefrontsize64,
	74	.Fp64,
	75	.Gcn3Encoding,
	76	.TrigReducedRange,
	77	.Sdwa,
	78	.VgprIndexMode,
	79	.Dpp,
	80	.FlatAddressSpace,
	81	.Gfx8Insts,
	82	.Gfx7Gfx8Gfx9Insts,
	83	.MimgR128,
	84	.NoSramEccSupport,
	85	.IntClampInsts,
	86	.ScalarStores,
	87	.Movrel,
	88	.SdwaMav,
	89	.CiInsts,
	90	.BitInsts16,
	91	.SMemrealtime,
	92	.Inv2piInlineImm,
	93	.Localmemorysize65536,
	94	.SdwaOutModsVopc,
	95	.VolcanicIslands,
	96	.Xnack,
	97	.HalfRate64Ops,
	98	},
	99	CpuInfo(@This()).create(.Fiji, "fiji", &[_]FeatureType {
	100	.CodeObjectV3,
	101	.NoXnackSupport,
	102	.Ldsbankcount32,
	103	.UnpackedD16Vmem,
	104	.Wavefrontsize64,
	105	.Fp64,
	106	.Gcn3Encoding,
	107	.TrigReducedRange,
	108	.Sdwa,
	109	.VgprIndexMode,
	110	.Dpp,
	111	.FlatAddressSpace,
	112	.Gfx8Insts,
	113	.Gfx7Gfx8Gfx9Insts,
	114	.MimgR128,
	115	.NoSramEccSupport,
	116	.IntClampInsts,
	117	.ScalarStores,
	118	.Movrel,
	119	.SdwaMav,
	120	.CiInsts,
	121	.BitInsts16,
	122	.SMemrealtime,
	123	.Inv2piInlineImm,
	124	.Localmemorysize65536,
	125	.SdwaOutModsVopc,
	126	.VolcanicIslands,
	127	},
	128	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	129	.Wavefrontsize64,
	130	},
	131	CpuInfo(@This()).create(.GenericHsa, "generic-hsa", &[_]FeatureType {
	132	.FlatAddressSpace,
	133	.Wavefrontsize64,
	134	},
	135	CpuInfo(@This()).create(.Gfx1010, "gfx1010", &[_]FeatureType {
	136	.CodeObjectV3,
	137	.DlInsts,
	138	.NoXnackSupport,
	139	.FlatSegmentOffsetBug,
	140	.Gfx9Insts,
	141	.NoSdstCmpx,
	142	.Fp64,
	143	.FastFmaf,
	144	.Sdwa,
	145	.SdwaScalar,
	146	.Dpp,
	147	.RegisterBanking,
	148	.Gfx10Insts,
	149	.AddNoCarryInsts,
	150	.SdwaOmod,
	151	.SdwaSdst,
	152	.FlatAddressSpace,
	153	.Gfx8Insts,
	154	.FmaMixInsts,
	155	.PkFmacF16Inst,
	156	.Vop3Literal,
	157	.MimgR128,
	158	.NoSramEccSupport,
	159	.IntClampInsts,
	160	.Movrel,
	161	.Dpp8,
	162	.ApertureRegs,
	163	.NoDataDepHazard,
	164	.CiInsts,
	165	.FlatGlobalInsts,
	166	.BitInsts16,
	167	.FlatScratchInsts,
	168	.SMemrealtime,
	169	.Vop3p,
	170	.FlatInstOffsets,
	171	.Inv2piInlineImm,
	172	.Localmemorysize65536,
	173	.Vscnt,
	174	.Gfx10,
	175	.InstFwdPrefetchBug,
	176	.Ldsbankcount32,
	177	.LdsBranchVmemWarHazard,
	178	.LdsMisalignedBug,
	179	.NsaEncoding,
	180	.NsaToVmemBug,
	181	.Offset3fBug,
	182	.SmemToVectorWriteHazard,
	183	.ScalarAtomics,
	184	.ScalarFlatScratchInsts,
	185	.ScalarStores,
	186	.VmemToScalarWriteHazard,
	187	.VcmpxExecWarHazard,
	188	.VcmpxPermlaneHazard,
	189	.Wavefrontsize32,
	190	},
	191	CpuInfo(@This()).create(.Gfx1011, "gfx1011", &[_]FeatureType {
	192	.CodeObjectV3,
	193	.DlInsts,
	194	.NoXnackSupport,
	195	.Dot1Insts,
	196	.Dot2Insts,
	197	.Dot5Insts,
	198	.Dot6Insts,
	199	.FlatSegmentOffsetBug,
	200	.Gfx9Insts,
	201	.NoSdstCmpx,
	202	.Fp64,
	203	.FastFmaf,
	204	.Sdwa,
	205	.SdwaScalar,
	206	.Dpp,
	207	.RegisterBanking,
	208	.Gfx10Insts,
	209	.AddNoCarryInsts,
	210	.SdwaOmod,
	211	.SdwaSdst,
	212	.FlatAddressSpace,
	213	.Gfx8Insts,
	214	.FmaMixInsts,
	215	.PkFmacF16Inst,
	216	.Vop3Literal,
	217	.MimgR128,
	218	.NoSramEccSupport,
	219	.IntClampInsts,
	220	.Movrel,
	221	.Dpp8,
	222	.ApertureRegs,
	223	.NoDataDepHazard,
	224	.CiInsts,
	225	.FlatGlobalInsts,
	226	.BitInsts16,
	227	.FlatScratchInsts,
	228	.SMemrealtime,
	229	.Vop3p,
	230	.FlatInstOffsets,
	231	.Inv2piInlineImm,
	232	.Localmemorysize65536,
	233	.Vscnt,
	234	.Gfx10,
	235	.InstFwdPrefetchBug,
	236	.Ldsbankcount32,
	237	.LdsBranchVmemWarHazard,
	238	.NsaEncoding,
	239	.NsaToVmemBug,
	240	.Offset3fBug,
	241	.SmemToVectorWriteHazard,
	242	.ScalarAtomics,
	243	.ScalarFlatScratchInsts,
	244	.ScalarStores,
	245	.VmemToScalarWriteHazard,
	246	.VcmpxExecWarHazard,
	247	.VcmpxPermlaneHazard,
	248	.Wavefrontsize32,
	249	},
	250	CpuInfo(@This()).create(.Gfx1012, "gfx1012", &[_]FeatureType {
	251	.CodeObjectV3,
	252	.DlInsts,
	253	.NoXnackSupport,
	254	.Dot1Insts,
	255	.Dot2Insts,
	256	.Dot5Insts,
	257	.Dot6Insts,
	258	.FlatSegmentOffsetBug,
	259	.Gfx9Insts,
	260	.NoSdstCmpx,
	261	.Fp64,
	262	.FastFmaf,
	263	.Sdwa,
	264	.SdwaScalar,
	265	.Dpp,
	266	.RegisterBanking,
	267	.Gfx10Insts,
	268	.AddNoCarryInsts,
	269	.SdwaOmod,
	270	.SdwaSdst,
	271	.FlatAddressSpace,
	272	.Gfx8Insts,
	273	.FmaMixInsts,
	274	.PkFmacF16Inst,
	275	.Vop3Literal,
	276	.MimgR128,
	277	.NoSramEccSupport,
	278	.IntClampInsts,
	279	.Movrel,
	280	.Dpp8,
	281	.ApertureRegs,
	282	.NoDataDepHazard,
	283	.CiInsts,
	284	.FlatGlobalInsts,
	285	.BitInsts16,
	286	.FlatScratchInsts,
	287	.SMemrealtime,
	288	.Vop3p,
	289	.FlatInstOffsets,
	290	.Inv2piInlineImm,
	291	.Localmemorysize65536,
	292	.Vscnt,
	293	.Gfx10,
	294	.InstFwdPrefetchBug,
	295	.Ldsbankcount32,
	296	.LdsBranchVmemWarHazard,
	297	.LdsMisalignedBug,
	298	.NsaEncoding,
	299	.NsaToVmemBug,
	300	.Offset3fBug,
	301	.SmemToVectorWriteHazard,
	302	.ScalarAtomics,
	303	.ScalarFlatScratchInsts,
	304	.ScalarStores,
	305	.VmemToScalarWriteHazard,
	306	.VcmpxExecWarHazard,
	307	.VcmpxPermlaneHazard,
	308	.Wavefrontsize32,
	309	},
	310	CpuInfo(@This()).create(.Gfx600, "gfx600", &[_]FeatureType {
	311	.CodeObjectV3,
	312	.NoXnackSupport,
	313	.FastFmaf,
	314	.Ldsbankcount32,
	315	.Wavefrontsize64,
	316	.MimgR128,
	317	.Fp64,
	318	.TrigReducedRange,
	319	.NoSramEccSupport,
	320	.Movrel,
	321	.Localmemorysize32768,
	322	.SouthernIslands,
	323	.HalfRate64Ops,
	324	},
	325	CpuInfo(@This()).create(.Gfx601, "gfx601", &[_]FeatureType {
	326	.CodeObjectV3,
	327	.NoXnackSupport,
	328	.Ldsbankcount32,
	329	.Wavefrontsize64,
	330	.MimgR128,
	331	.Fp64,
	332	.TrigReducedRange,
	333	.NoSramEccSupport,
	334	.Movrel,
	335	.Localmemorysize32768,
	336	.SouthernIslands,
	337	},
	338	CpuInfo(@This()).create(.Gfx700, "gfx700", &[_]FeatureType {
	339	.CodeObjectV3,
	340	.NoXnackSupport,
	341	.Ldsbankcount32,
	342	.Wavefrontsize64,
	343	.MimgR128,
	344	.Fp64,
	345	.CiInsts,
	346	.FlatAddressSpace,
	347	.TrigReducedRange,
	348	.NoSramEccSupport,
	349	.Movrel,
	350	.Localmemorysize65536,
	351	.Gfx7Gfx8Gfx9Insts,
	352	.SeaIslands,
	353	},
	354	CpuInfo(@This()).create(.Gfx701, "gfx701", &[_]FeatureType {
	355	.CodeObjectV3,
	356	.NoXnackSupport,
	357	.FastFmaf,
	358	.Ldsbankcount32,
	359	.Wavefrontsize64,
	360	.MimgR128,
	361	.Fp64,
	362	.CiInsts,
	363	.FlatAddressSpace,
	364	.TrigReducedRange,
	365	.NoSramEccSupport,
	366	.Movrel,
	367	.Localmemorysize65536,
	368	.Gfx7Gfx8Gfx9Insts,
	369	.SeaIslands,
	370	.HalfRate64Ops,
	371	},
	372	CpuInfo(@This()).create(.Gfx702, "gfx702", &[_]FeatureType {
	373	.CodeObjectV3,
	374	.NoXnackSupport,
	375	.FastFmaf,
	376	.Ldsbankcount16,
	377	.Wavefrontsize64,
	378	.MimgR128,
	379	.Fp64,
	380	.CiInsts,
	381	.FlatAddressSpace,
	382	.TrigReducedRange,
	383	.NoSramEccSupport,
	384	.Movrel,
	385	.Localmemorysize65536,
	386	.Gfx7Gfx8Gfx9Insts,
	387	.SeaIslands,
	388	},
	389	CpuInfo(@This()).create(.Gfx703, "gfx703", &[_]FeatureType {
	390	.CodeObjectV3,
	391	.NoXnackSupport,
	392	.Ldsbankcount16,
	393	.Wavefrontsize64,
	394	.MimgR128,
	395	.Fp64,
	396	.CiInsts,
	397	.FlatAddressSpace,
	398	.TrigReducedRange,
	399	.NoSramEccSupport,
	400	.Movrel,
	401	.Localmemorysize65536,
	402	.Gfx7Gfx8Gfx9Insts,
	403	.SeaIslands,
	404	},
	405	CpuInfo(@This()).create(.Gfx704, "gfx704", &[_]FeatureType {
	406	.CodeObjectV3,
	407	.NoXnackSupport,
	408	.Ldsbankcount32,
	409	.Wavefrontsize64,
	410	.MimgR128,
	411	.Fp64,
	412	.CiInsts,
	413	.FlatAddressSpace,
	414	.TrigReducedRange,
	415	.NoSramEccSupport,
	416	.Movrel,
	417	.Localmemorysize65536,
	418	.Gfx7Gfx8Gfx9Insts,
	419	.SeaIslands,
	420	},
	421	CpuInfo(@This()).create(.Gfx801, "gfx801", &[_]FeatureType {
	422	.CodeObjectV3,
	423	.FastFmaf,
	424	.Ldsbankcount32,
	425	.UnpackedD16Vmem,
	426	.Wavefrontsize64,
	427	.Fp64,
	428	.Gcn3Encoding,
	429	.TrigReducedRange,
	430	.Sdwa,
	431	.VgprIndexMode,
	432	.Dpp,
	433	.FlatAddressSpace,
	434	.Gfx8Insts,
	435	.Gfx7Gfx8Gfx9Insts,
	436	.MimgR128,
	437	.NoSramEccSupport,
	438	.IntClampInsts,
	439	.ScalarStores,
	440	.Movrel,
	441	.SdwaMav,
	442	.CiInsts,
	443	.BitInsts16,
	444	.SMemrealtime,
	445	.Inv2piInlineImm,
	446	.Localmemorysize65536,
	447	.SdwaOutModsVopc,
	448	.VolcanicIslands,
	449	.Xnack,
	450	.HalfRate64Ops,
	451	},
	452	CpuInfo(@This()).create(.Gfx802, "gfx802", &[_]FeatureType {
	453	.CodeObjectV3,
	454	.NoXnackSupport,
	455	.Ldsbankcount32,
	456	.SgprInitBug,
	457	.UnpackedD16Vmem,
	458	.Wavefrontsize64,
	459	.Fp64,
	460	.Gcn3Encoding,
	461	.TrigReducedRange,
	462	.Sdwa,
	463	.VgprIndexMode,
	464	.Dpp,
	465	.FlatAddressSpace,
	466	.Gfx8Insts,
	467	.Gfx7Gfx8Gfx9Insts,
	468	.MimgR128,
	469	.NoSramEccSupport,
	470	.IntClampInsts,
	471	.ScalarStores,
	472	.Movrel,
	473	.SdwaMav,
	474	.CiInsts,
	475	.BitInsts16,
	476	.SMemrealtime,
	477	.Inv2piInlineImm,
	478	.Localmemorysize65536,
	479	.SdwaOutModsVopc,
	480	.VolcanicIslands,
	481	},
	482	CpuInfo(@This()).create(.Gfx803, "gfx803", &[_]FeatureType {
	483	.CodeObjectV3,
	484	.NoXnackSupport,
	485	.Ldsbankcount32,
	486	.UnpackedD16Vmem,
	487	.Wavefrontsize64,
	488	.Fp64,
	489	.Gcn3Encoding,
	490	.TrigReducedRange,
	491	.Sdwa,
	492	.VgprIndexMode,
	493	.Dpp,
	494	.FlatAddressSpace,
	495	.Gfx8Insts,
	496	.Gfx7Gfx8Gfx9Insts,
	497	.MimgR128,
	498	.NoSramEccSupport,
	499	.IntClampInsts,
	500	.ScalarStores,
	501	.Movrel,
	502	.SdwaMav,
	503	.CiInsts,
	504	.BitInsts16,
	505	.SMemrealtime,
	506	.Inv2piInlineImm,
	507	.Localmemorysize65536,
	508	.SdwaOutModsVopc,
	509	.VolcanicIslands,
	510	},
	511	CpuInfo(@This()).create(.Gfx810, "gfx810", &[_]FeatureType {
	512	.CodeObjectV3,
	513	.Ldsbankcount16,
	514	.Wavefrontsize64,
	515	.Fp64,
	516	.Gcn3Encoding,
	517	.TrigReducedRange,
	518	.Sdwa,
	519	.VgprIndexMode,
	520	.Dpp,
	521	.FlatAddressSpace,
	522	.Gfx8Insts,
	523	.Gfx7Gfx8Gfx9Insts,
	524	.MimgR128,
	525	.NoSramEccSupport,
	526	.IntClampInsts,
	527	.ScalarStores,
	528	.Movrel,
	529	.SdwaMav,
	530	.CiInsts,
	531	.BitInsts16,
	532	.SMemrealtime,
	533	.Inv2piInlineImm,
	534	.Localmemorysize65536,
	535	.SdwaOutModsVopc,
	536	.VolcanicIslands,
	537	.Xnack,
	538	},
	539	CpuInfo(@This()).create(.Gfx900, "gfx900", &[_]FeatureType {
	540	.CodeObjectV3,
	541	.NoSramEccSupport,
	542	.NoXnackSupport,
	543	.Gfx9Insts,
	544	.Wavefrontsize64,
	545	.Fp64,
	546	.Gcn3Encoding,
	547	.FastFmaf,
	548	.Sdwa,
	549	.SdwaScalar,
	550	.VgprIndexMode,
	551	.Dpp,
	552	.AddNoCarryInsts,
	553	.SdwaOmod,
	554	.SdwaSdst,
	555	.ScalarAtomics,
	556	.FlatAddressSpace,
	557	.ScalarFlatScratchInsts,
	558	.Gfx8Insts,
	559	.Gfx7Gfx8Gfx9Insts,
	560	.R128A16,
	561	.IntClampInsts,
	562	.ScalarStores,
	563	.ApertureRegs,
	564	.CiInsts,
	565	.FlatGlobalInsts,
	566	.BitInsts16,
	567	.FlatScratchInsts,
	568	.SMemrealtime,
	569	.Vop3p,
	570	.FlatInstOffsets,
	571	.Inv2piInlineImm,
	572	.Localmemorysize65536,
	573	.Gfx9,
	574	.Ldsbankcount32,
	575	.MadMixInsts,
	576	},
	577	CpuInfo(@This()).create(.Gfx902, "gfx902", &[_]FeatureType {
	578	.CodeObjectV3,
	579	.NoSramEccSupport,
	580	.Gfx9Insts,
	581	.Wavefrontsize64,
	582	.Fp64,
	583	.Gcn3Encoding,
	584	.FastFmaf,
	585	.Sdwa,
	586	.SdwaScalar,
	587	.VgprIndexMode,
	588	.Dpp,
	589	.AddNoCarryInsts,
	590	.SdwaOmod,
	591	.SdwaSdst,
	592	.ScalarAtomics,
	593	.FlatAddressSpace,
	594	.ScalarFlatScratchInsts,
	595	.Gfx8Insts,
	596	.Gfx7Gfx8Gfx9Insts,
	597	.R128A16,
	598	.IntClampInsts,
	599	.ScalarStores,
	600	.ApertureRegs,
	601	.CiInsts,
	602	.FlatGlobalInsts,
	603	.BitInsts16,
	604	.FlatScratchInsts,
	605	.SMemrealtime,
	606	.Vop3p,
	607	.FlatInstOffsets,
	608	.Inv2piInlineImm,
	609	.Localmemorysize65536,
	610	.Gfx9,
	611	.Ldsbankcount32,
	612	.MadMixInsts,
	613	.Xnack,
	614	},
	615	CpuInfo(@This()).create(.Gfx904, "gfx904", &[_]FeatureType {
	616	.CodeObjectV3,
	617	.NoSramEccSupport,
	618	.NoXnackSupport,
	619	.FmaMixInsts,
	620	.Gfx9Insts,
	621	.Wavefrontsize64,
	622	.Fp64,
	623	.Gcn3Encoding,
	624	.FastFmaf,
	625	.Sdwa,
	626	.SdwaScalar,
	627	.VgprIndexMode,
	628	.Dpp,
	629	.AddNoCarryInsts,
	630	.SdwaOmod,
	631	.SdwaSdst,
	632	.ScalarAtomics,
	633	.FlatAddressSpace,
	634	.ScalarFlatScratchInsts,
	635	.Gfx8Insts,
	636	.Gfx7Gfx8Gfx9Insts,
	637	.R128A16,
	638	.IntClampInsts,
	639	.ScalarStores,
	640	.ApertureRegs,
	641	.CiInsts,
	642	.FlatGlobalInsts,
	643	.BitInsts16,
	644	.FlatScratchInsts,
	645	.SMemrealtime,
	646	.Vop3p,
	647	.FlatInstOffsets,
	648	.Inv2piInlineImm,
	649	.Localmemorysize65536,
	650	.Gfx9,
	651	.Ldsbankcount32,
	652	},
	653	CpuInfo(@This()).create(.Gfx906, "gfx906", &[_]FeatureType {
	654	.CodeObjectV3,
	655	.DlInsts,
	656	.NoXnackSupport,
	657	.Dot1Insts,
	658	.Dot2Insts,
	659	.FmaMixInsts,
	660	.Gfx9Insts,
	661	.Wavefrontsize64,
	662	.Fp64,
	663	.Gcn3Encoding,
	664	.FastFmaf,
	665	.Sdwa,
	666	.SdwaScalar,
	667	.VgprIndexMode,
	668	.Dpp,
	669	.AddNoCarryInsts,
	670	.SdwaOmod,
	671	.SdwaSdst,
	672	.ScalarAtomics,
	673	.FlatAddressSpace,
	674	.ScalarFlatScratchInsts,
	675	.Gfx8Insts,
	676	.Gfx7Gfx8Gfx9Insts,
	677	.R128A16,
	678	.IntClampInsts,
	679	.ScalarStores,
	680	.ApertureRegs,
	681	.CiInsts,
	682	.FlatGlobalInsts,
	683	.BitInsts16,
	684	.FlatScratchInsts,
	685	.SMemrealtime,
	686	.Vop3p,
	687	.FlatInstOffsets,
	688	.Inv2piInlineImm,
	689	.Localmemorysize65536,
	690	.Gfx9,
	691	.Ldsbankcount32,
	692	.HalfRate64Ops,
	693	},
	694	CpuInfo(@This()).create(.Gfx908, "gfx908", &[_]FeatureType {
	695	.AtomicFaddInsts,
	696	.CodeObjectV3,
	697	.DlInsts,
	698	.Dot1Insts,
	699	.Dot2Insts,
	700	.Dot3Insts,
	701	.Dot4Insts,
	702	.Dot5Insts,
	703	.Dot6Insts,
	704	.FmaMixInsts,
	705	.Gfx9Insts,
	706	.Wavefrontsize64,
	707	.Fp64,
	708	.Gcn3Encoding,
	709	.FastFmaf,
	710	.Sdwa,
	711	.SdwaScalar,
	712	.VgprIndexMode,
	713	.Dpp,
	714	.AddNoCarryInsts,
	715	.SdwaOmod,
	716	.SdwaSdst,
	717	.ScalarAtomics,
	718	.FlatAddressSpace,
	719	.ScalarFlatScratchInsts,
	720	.Gfx8Insts,
	721	.Gfx7Gfx8Gfx9Insts,
	722	.R128A16,
	723	.IntClampInsts,
	724	.ScalarStores,
	725	.ApertureRegs,
	726	.CiInsts,
	727	.FlatGlobalInsts,
	728	.BitInsts16,
	729	.FlatScratchInsts,
	730	.SMemrealtime,
	731	.Vop3p,
	732	.FlatInstOffsets,
	733	.Inv2piInlineImm,
	734	.Localmemorysize65536,
	735	.Gfx9,
	736	.Ldsbankcount32,
	737	.MaiInsts,
	738	.MfmaInlineLiteralBug,
	739	.PkFmacF16Inst,
	740	.SramEcc,
	741	.HalfRate64Ops,
	742	},
	743	CpuInfo(@This()).create(.Gfx909, "gfx909", &[_]FeatureType {
	744	.CodeObjectV3,
	745	.Gfx9Insts,
	746	.Wavefrontsize64,
	747	.Fp64,
	748	.Gcn3Encoding,
	749	.FastFmaf,
	750	.Sdwa,
	751	.SdwaScalar,
	752	.VgprIndexMode,
	753	.Dpp,
	754	.AddNoCarryInsts,
	755	.SdwaOmod,
	756	.SdwaSdst,
	757	.ScalarAtomics,
	758	.FlatAddressSpace,
	759	.ScalarFlatScratchInsts,
	760	.Gfx8Insts,
	761	.Gfx7Gfx8Gfx9Insts,
	762	.R128A16,
	763	.IntClampInsts,
	764	.ScalarStores,
	765	.ApertureRegs,
	766	.CiInsts,
	767	.FlatGlobalInsts,
	768	.BitInsts16,
	769	.FlatScratchInsts,
	770	.SMemrealtime,
	771	.Vop3p,
	772	.FlatInstOffsets,
	773	.Inv2piInlineImm,
	774	.Localmemorysize65536,
	775	.Gfx9,
	776	.Ldsbankcount32,
	777	.MadMixInsts,
	778	.Xnack,
	779	},
	780	CpuInfo(@This()).create(.Hainan, "hainan", &[_]FeatureType {
	781	.CodeObjectV3,
	782	.NoXnackSupport,
	783	.Ldsbankcount32,
	784	.Wavefrontsize64,
	785	.MimgR128,
	786	.Fp64,
	787	.TrigReducedRange,
	788	.NoSramEccSupport,
	789	.Movrel,
	790	.Localmemorysize32768,
	791	.SouthernIslands,
	792	},
	793	CpuInfo(@This()).create(.Hawaii, "hawaii", &[_]FeatureType {
	794	.CodeObjectV3,
	795	.NoXnackSupport,
	796	.FastFmaf,
	797	.Ldsbankcount32,
	798	.Wavefrontsize64,
	799	.MimgR128,
	800	.Fp64,
	801	.CiInsts,
	802	.FlatAddressSpace,
	803	.TrigReducedRange,
	804	.NoSramEccSupport,
	805	.Movrel,
	806	.Localmemorysize65536,
	807	.Gfx7Gfx8Gfx9Insts,
	808	.SeaIslands,
	809	.HalfRate64Ops,
	810	},
	811	CpuInfo(@This()).create(.Iceland, "iceland", &[_]FeatureType {
	812	.CodeObjectV3,
	813	.NoXnackSupport,
	814	.Ldsbankcount32,
	815	.SgprInitBug,
	816	.UnpackedD16Vmem,
	817	.Wavefrontsize64,
	818	.Fp64,
	819	.Gcn3Encoding,
	820	.TrigReducedRange,
	821	.Sdwa,
	822	.VgprIndexMode,
	823	.Dpp,
	824	.FlatAddressSpace,
	825	.Gfx8Insts,
	826	.Gfx7Gfx8Gfx9Insts,
	827	.MimgR128,
	828	.NoSramEccSupport,
	829	.IntClampInsts,
	830	.ScalarStores,
	831	.Movrel,
	832	.SdwaMav,
	833	.CiInsts,
	834	.BitInsts16,
	835	.SMemrealtime,
	836	.Inv2piInlineImm,
	837	.Localmemorysize65536,
	838	.SdwaOutModsVopc,
	839	.VolcanicIslands,
	840	},
	841	CpuInfo(@This()).create(.Kabini, "kabini", &[_]FeatureType {
	842	.CodeObjectV3,
	843	.NoXnackSupport,
	844	.Ldsbankcount16,
	845	.Wavefrontsize64,
	846	.MimgR128,
	847	.Fp64,
	848	.CiInsts,
	849	.FlatAddressSpace,
	850	.TrigReducedRange,
	851	.NoSramEccSupport,
	852	.Movrel,
	853	.Localmemorysize65536,
	854	.Gfx7Gfx8Gfx9Insts,
	855	.SeaIslands,
	856	},
	857	CpuInfo(@This()).create(.Kaveri, "kaveri", &[_]FeatureType {
	858	.CodeObjectV3,
	859	.NoXnackSupport,
	860	.Ldsbankcount32,
	861	.Wavefrontsize64,
	862	.MimgR128,
	863	.Fp64,
	864	.CiInsts,
	865	.FlatAddressSpace,
	866	.TrigReducedRange,
	867	.NoSramEccSupport,
	868	.Movrel,
	869	.Localmemorysize65536,
	870	.Gfx7Gfx8Gfx9Insts,
	871	.SeaIslands,
	872	},
	873	CpuInfo(@This()).create(.Mullins, "mullins", &[_]FeatureType {
	874	.CodeObjectV3,
	875	.NoXnackSupport,
	876	.Ldsbankcount16,
	877	.Wavefrontsize64,
	878	.MimgR128,
	879	.Fp64,
	880	.CiInsts,
	881	.FlatAddressSpace,
	882	.TrigReducedRange,
	883	.NoSramEccSupport,
	884	.Movrel,
	885	.Localmemorysize65536,
	886	.Gfx7Gfx8Gfx9Insts,
	887	.SeaIslands,
	888	},
	889	CpuInfo(@This()).create(.Oland, "oland", &[_]FeatureType {
	890	.CodeObjectV3,
	891	.NoXnackSupport,
	892	.Ldsbankcount32,
	893	.Wavefrontsize64,
	894	.MimgR128,
	895	.Fp64,
	896	.TrigReducedRange,
	897	.NoSramEccSupport,
	898	.Movrel,
	899	.Localmemorysize32768,
	900	.SouthernIslands,
	901	},
	902	CpuInfo(@This()).create(.Pitcairn, "pitcairn", &[_]FeatureType {
	903	.CodeObjectV3,
	904	.NoXnackSupport,
	905	.Ldsbankcount32,
	906	.Wavefrontsize64,
	907	.MimgR128,
	908	.Fp64,
	909	.TrigReducedRange,
	910	.NoSramEccSupport,
	911	.Movrel,
	912	.Localmemorysize32768,
	913	.SouthernIslands,
	914	},
	915	CpuInfo(@This()).create(.Polaris10, "polaris10", &[_]FeatureType {
	916	.CodeObjectV3,
	917	.NoXnackSupport,
	918	.Ldsbankcount32,
	919	.UnpackedD16Vmem,
	920	.Wavefrontsize64,
	921	.Fp64,
	922	.Gcn3Encoding,
	923	.TrigReducedRange,
	924	.Sdwa,
	925	.VgprIndexMode,
	926	.Dpp,
	927	.FlatAddressSpace,
	928	.Gfx8Insts,
	929	.Gfx7Gfx8Gfx9Insts,
	930	.MimgR128,
	931	.NoSramEccSupport,
	932	.IntClampInsts,
	933	.ScalarStores,
	934	.Movrel,
	935	.SdwaMav,
	936	.CiInsts,
	937	.BitInsts16,
	938	.SMemrealtime,
	939	.Inv2piInlineImm,
	940	.Localmemorysize65536,
	941	.SdwaOutModsVopc,
	942	.VolcanicIslands,
	943	},
	944	CpuInfo(@This()).create(.Polaris11, "polaris11", &[_]FeatureType {
	945	.CodeObjectV3,
	946	.NoXnackSupport,
	947	.Ldsbankcount32,
	948	.UnpackedD16Vmem,
	949	.Wavefrontsize64,
	950	.Fp64,
	951	.Gcn3Encoding,
	952	.TrigReducedRange,
	953	.Sdwa,
	954	.VgprIndexMode,
	955	.Dpp,
	956	.FlatAddressSpace,
	957	.Gfx8Insts,
	958	.Gfx7Gfx8Gfx9Insts,
	959	.MimgR128,
	960	.NoSramEccSupport,
	961	.IntClampInsts,
	962	.ScalarStores,
	963	.Movrel,
	964	.SdwaMav,
	965	.CiInsts,
	966	.BitInsts16,
	967	.SMemrealtime,
	968	.Inv2piInlineImm,
	969	.Localmemorysize65536,
	970	.SdwaOutModsVopc,
	971	.VolcanicIslands,
	972	},
	973	CpuInfo(@This()).create(.Stoney, "stoney", &[_]FeatureType {
	974	.CodeObjectV3,
	975	.Ldsbankcount16,
	976	.Wavefrontsize64,
	977	.Fp64,
	978	.Gcn3Encoding,
	979	.TrigReducedRange,
	980	.Sdwa,
	981	.VgprIndexMode,
	982	.Dpp,
	983	.FlatAddressSpace,
	984	.Gfx8Insts,
	985	.Gfx7Gfx8Gfx9Insts,
	986	.MimgR128,
	987	.NoSramEccSupport,
	988	.IntClampInsts,
	989	.ScalarStores,
	990	.Movrel,
	991	.SdwaMav,
	992	.CiInsts,
	993	.BitInsts16,
	994	.SMemrealtime,
	995	.Inv2piInlineImm,
	996	.Localmemorysize65536,
	997	.SdwaOutModsVopc,
	998	.VolcanicIslands,
	999	.Xnack,
	1000	},
	1001	CpuInfo(@This()).create(.Tahiti, "tahiti", &[_]FeatureType {
	1002	.CodeObjectV3,
	1003	.NoXnackSupport,
	1004	.FastFmaf,
	1005	.Ldsbankcount32,
	1006	.Wavefrontsize64,
	1007	.MimgR128,
	1008	.Fp64,
	1009	.TrigReducedRange,
	1010	.NoSramEccSupport,
	1011	.Movrel,
	1012	.Localmemorysize32768,
	1013	.SouthernIslands,
	1014	.HalfRate64Ops,
	1015	},
	1016	CpuInfo(@This()).create(.Tonga, "tonga", &[_]FeatureType {
	1017	.CodeObjectV3,
	1018	.NoXnackSupport,
	1019	.Ldsbankcount32,
	1020	.SgprInitBug,
	1021	.UnpackedD16Vmem,
	1022	.Wavefrontsize64,
	1023	.Fp64,
	1024	.Gcn3Encoding,
	1025	.TrigReducedRange,
	1026	.Sdwa,
	1027	.VgprIndexMode,
	1028	.Dpp,
	1029	.FlatAddressSpace,
	1030	.Gfx8Insts,
	1031	.Gfx7Gfx8Gfx9Insts,
	1032	.MimgR128,
	1033	.NoSramEccSupport,
	1034	.IntClampInsts,
	1035	.ScalarStores,
	1036	.Movrel,
	1037	.SdwaMav,
	1038	.CiInsts,
	1039	.BitInsts16,
	1040	.SMemrealtime,
	1041	.Inv2piInlineImm,
	1042	.Localmemorysize65536,
	1043	.SdwaOutModsVopc,
	1044	.VolcanicIslands,
	1045	},
	1046	CpuInfo(@This()).create(.Verde, "verde", &[_]FeatureType {
	1047	.CodeObjectV3,
	1048	.NoXnackSupport,
	1049	.Ldsbankcount32,
	1050	.Wavefrontsize64,
	1051	.MimgR128,
	1052	.Fp64,
	1053	.TrigReducedRange,
	1054	.NoSramEccSupport,
	1055	.Movrel,
	1056	.Localmemorysize32768,
	1057	.SouthernIslands,
	1058	},
	1059	};
	1060	};

lib/std/target/cpu/ArmCpu.zig created+1230

...	...	@@ -0,0 +1,1230 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const ArmCpu = enum {
	5	Arm1020e,
	6	Arm1020t,
	7	Arm1022e,
	8	Arm10e,
	9	Arm10tdmi,
	10	Arm1136jS,
	11	Arm1136jfS,
	12	Arm1156t2S,
	13	Arm1156t2fS,
	14	Arm1176jS,
	15	Arm1176jzS,
	16	Arm1176jzfS,
	17	Arm710t,
	18	Arm720t,
	19	Arm7tdmi,
	20	Arm7tdmiS,
	21	Arm8,
	22	Arm810,
	23	Arm9,
	24	Arm920,
	25	Arm920t,
	26	Arm922t,
	27	Arm926ejS,
	28	Arm940t,
	29	Arm946eS,
	30	Arm966eS,
	31	Arm968eS,
	32	Arm9e,
	33	Arm9tdmi,
	34	CortexA12,
	35	CortexA15,
	36	CortexA17,
	37	CortexA32,
	38	CortexA35,
	39	CortexA5,
	40	CortexA53,
	41	CortexA55,
	42	CortexA57,
	43	CortexA7,
	44	CortexA72,
	45	CortexA73,
	46	CortexA75,
	47	CortexA76,
	48	CortexA76ae,
	49	CortexA8,
	50	CortexA9,
	51	CortexM0,
	52	CortexM0plus,
	53	CortexM1,
	54	CortexM23,
	55	CortexM3,
	56	CortexM33,
	57	CortexM35p,
	58	CortexM4,
	59	CortexM7,
	60	CortexR4,
	61	CortexR4f,
	62	CortexR5,
	63	CortexR52,
	64	CortexR7,
	65	CortexR8,
	66	Cyclone,
	67	Ep9312,
	68	ExynosM1,
	69	ExynosM2,
	70	ExynosM3,
	71	ExynosM4,
	72	ExynosM5,
	73	Generic,
	74	Iwmmxt,
	75	Krait,
	76	Kryo,
	77	Mpcore,
	78	Mpcorenovfp,
	79	NeoverseN1,
	80	Sc000,
	81	Sc300,
	82	Strongarm,
	83	Strongarm110,
	84	Strongarm1100,
	85	Strongarm1110,
	86	Swift,
	87	Xscale,
	88
	89	pub fn getInfo(self: @This()) CpuInfo {
	90	return cpu_infos[@enumToInt(self)];
	91	}
	92
	93	pub const FeatureType = feature.ArmFeature;
	94
	95	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	96	CpuInfo(@This()).create(.Arm1020e, "arm1020e", &[_]FeatureType {
	97	.V4t,
	98	.Armv5te,
	99	},
	100	CpuInfo(@This()).create(.Arm1020t, "arm1020t", &[_]FeatureType {
	101	.V4t,
	102	.Armv5t,
	103	},
	104	CpuInfo(@This()).create(.Arm1022e, "arm1022e", &[_]FeatureType {
	105	.V4t,
	106	.Armv5te,
	107	},
	108	CpuInfo(@This()).create(.Arm10e, "arm10e", &[_]FeatureType {
	109	.V4t,
	110	.Armv5te,
	111	},
	112	CpuInfo(@This()).create(.Arm10tdmi, "arm10tdmi", &[_]FeatureType {
	113	.V4t,
	114	.Armv5t,
	115	},
	116	CpuInfo(@This()).create(.Arm1136jS, "arm1136j-s", &[_]FeatureType {
	117	.V4t,
	118	.Dsp,
	119	.Armv6,
	120	},
	121	CpuInfo(@This()).create(.Arm1136jfS, "arm1136jf-s", &[_]FeatureType {
	122	.V4t,
	123	.Dsp,
	124	.Armv6,
	125	.Slowfpvmlx,
	126	.Fpregs,
	127	.Vfp2,
	128	},
	129	CpuInfo(@This()).create(.Arm1156t2S, "arm1156t2-s", &[_]FeatureType {
	130	.Thumb2,
	131	.V4t,
	132	.Dsp,
	133	.Armv6t2,
	134	},
	135	CpuInfo(@This()).create(.Arm1156t2fS, "arm1156t2f-s", &[_]FeatureType {
	136	.Thumb2,
	137	.V4t,
	138	.Dsp,
	139	.Armv6t2,
	140	.Slowfpvmlx,
	141	.Fpregs,
	142	.Vfp2,
	143	},
	144	CpuInfo(@This()).create(.Arm1176jS, "arm1176j-s", &[_]FeatureType {
	145	.V4t,
	146	.Trustzone,
	147	.Armv6kz,
	148	},
	149	CpuInfo(@This()).create(.Arm1176jzS, "arm1176jz-s", &[_]FeatureType {
	150	.V4t,
	151	.Trustzone,
	152	.Armv6kz,
	153	},
	154	CpuInfo(@This()).create(.Arm1176jzfS, "arm1176jzf-s", &[_]FeatureType {
	155	.V4t,
	156	.Trustzone,
	157	.Armv6kz,
	158	.Slowfpvmlx,
	159	.Fpregs,
	160	.Vfp2,
	161	},
	162	CpuInfo(@This()).create(.Arm710t, "arm710t", &[_]FeatureType {
	163	.V4t,
	164	.Armv4t,
	165	},
	166	CpuInfo(@This()).create(.Arm720t, "arm720t", &[_]FeatureType {
	167	.V4t,
	168	.Armv4t,
	169	},
	170	CpuInfo(@This()).create(.Arm7tdmi, "arm7tdmi", &[_]FeatureType {
	171	.V4t,
	172	.Armv4t,
	173	},
	174	CpuInfo(@This()).create(.Arm7tdmiS, "arm7tdmi-s", &[_]FeatureType {
	175	.V4t,
	176	.Armv4t,
	177	},
	178	CpuInfo(@This()).create(.Arm8, "arm8", &[_]FeatureType {
	179	.Armv4,
	180	},
	181	CpuInfo(@This()).create(.Arm810, "arm810", &[_]FeatureType {
	182	.Armv4,
	183	},
	184	CpuInfo(@This()).create(.Arm9, "arm9", &[_]FeatureType {
	185	.V4t,
	186	.Armv4t,
	187	},
	188	CpuInfo(@This()).create(.Arm920, "arm920", &[_]FeatureType {
	189	.V4t,
	190	.Armv4t,
	191	},
	192	CpuInfo(@This()).create(.Arm920t, "arm920t", &[_]FeatureType {
	193	.V4t,
	194	.Armv4t,
	195	},
	196	CpuInfo(@This()).create(.Arm922t, "arm922t", &[_]FeatureType {
	197	.V4t,
	198	.Armv4t,
	199	},
	200	CpuInfo(@This()).create(.Arm926ejS, "arm926ej-s", &[_]FeatureType {
	201	.V4t,
	202	.Armv5te,
	203	},
	204	CpuInfo(@This()).create(.Arm940t, "arm940t", &[_]FeatureType {
	205	.V4t,
	206	.Armv4t,
	207	},
	208	CpuInfo(@This()).create(.Arm946eS, "arm946e-s", &[_]FeatureType {
	209	.V4t,
	210	.Armv5te,
	211	},
	212	CpuInfo(@This()).create(.Arm966eS, "arm966e-s", &[_]FeatureType {
	213	.V4t,
	214	.Armv5te,
	215	},
	216	CpuInfo(@This()).create(.Arm968eS, "arm968e-s", &[_]FeatureType {
	217	.V4t,
	218	.Armv5te,
	219	},
	220	CpuInfo(@This()).create(.Arm9e, "arm9e", &[_]FeatureType {
	221	.V4t,
	222	.Armv5te,
	223	},
	224	CpuInfo(@This()).create(.Arm9tdmi, "arm9tdmi", &[_]FeatureType {
	225	.V4t,
	226	.Armv4t,
	227	},
	228	CpuInfo(@This()).create(.CortexA12, "cortex-a12", &[_]FeatureType {
	229	.Thumb2,
	230	.Perfmon,
	231	.Db,
	232	.Dsp,
	233	.V7clrex,
	234	.V4t,
	235	.Fpregs,
	236	.D32,
	237	.Aclass,
	238	.Armv7A,
	239	.AvoidPartialCpsr,
	240	.RetAddrStack,
	241	.Mp,
	242	.Trustzone,
	243	.Fp16,
	244	.Vfp4,
	245	.VmlxForwarding,
	246	.HwdivArm,
	247	.Hwdiv,
	248	.Virtualization,
	249	.A12,
	250	},
	251	CpuInfo(@This()).create(.CortexA15, "cortex-a15", &[_]FeatureType {
	252	.Thumb2,
	253	.Perfmon,
	254	.Db,
	255	.Dsp,
	256	.V7clrex,
	257	.V4t,
	258	.Fpregs,
	259	.D32,
	260	.Aclass,
	261	.Armv7A,
	262	.AvoidPartialCpsr,
	263	.VldnAlign,
	264	.DontWidenVmovs,
	265	.RetAddrStack,
	266	.Mp,
	267	.MuxedUnits,
	268	.SplatVfpNeon,
	269	.Trustzone,
	270	.Fp16,
	271	.Vfp4,
	272	.HwdivArm,
	273	.Hwdiv,
	274	.Virtualization,
	275	.A15,
	276	},
	277	CpuInfo(@This()).create(.CortexA17, "cortex-a17", &[_]FeatureType {
	278	.Thumb2,
	279	.Perfmon,
	280	.Db,
	281	.Dsp,
	282	.V7clrex,
	283	.V4t,
	284	.Fpregs,
	285	.D32,
	286	.Aclass,
	287	.Armv7A,
	288	.AvoidPartialCpsr,
	289	.RetAddrStack,
	290	.Mp,
	291	.Trustzone,
	292	.Fp16,
	293	.Vfp4,
	294	.VmlxForwarding,
	295	.HwdivArm,
	296	.Hwdiv,
	297	.Virtualization,
	298	.A17,
	299	},
	300	CpuInfo(@This()).create(.CortexA32, "cortex-a32", &[_]FeatureType {
	301	.Thumb2,
	302	.Mp,
	303	.Perfmon,
	304	.Db,
	305	.Crc,
	306	.Fp16,
	307	.Dsp,
	308	.V7clrex,
	309	.V4t,
	310	.Fpregs,
	311	.D32,
	312	.Hwdiv,
	313	.HwdivArm,
	314	.Aclass,
	315	.Trustzone,
	316	.AcquireRelease,
	317	.Armv8A,
	318	.Crypto,
	319	},
	320	CpuInfo(@This()).create(.CortexA35, "cortex-a35", &[_]FeatureType {
	321	.Thumb2,
	322	.Mp,
	323	.Perfmon,
	324	.Db,
	325	.Crc,
	326	.Fp16,
	327	.Dsp,
	328	.V7clrex,
	329	.V4t,
	330	.Fpregs,
	331	.D32,
	332	.Hwdiv,
	333	.HwdivArm,
	334	.Aclass,
	335	.Trustzone,
	336	.AcquireRelease,
	337	.Armv8A,
	338	.Crypto,
	339	.A35,
	340	},
	341	CpuInfo(@This()).create(.CortexA5, "cortex-a5", &[_]FeatureType {
	342	.Thumb2,
	343	.Perfmon,
	344	.Db,
	345	.Dsp,
	346	.V7clrex,
	347	.V4t,
	348	.Fpregs,
	349	.D32,
	350	.Aclass,
	351	.Armv7A,
	352	.RetAddrStack,
	353	.Slowfpvmlx,
	354	.Mp,
	355	.SlowFpBrcc,
	356	.Trustzone,
	357	.Fp16,
	358	.Vfp4,
	359	.VmlxForwarding,
	360	.A5,
	361	},
	362	CpuInfo(@This()).create(.CortexA53, "cortex-a53", &[_]FeatureType {
	363	.Thumb2,
	364	.Mp,
	365	.Perfmon,
	366	.Db,
	367	.Crc,
	368	.Fp16,
	369	.Dsp,
	370	.V7clrex,
	371	.V4t,
	372	.Fpregs,
	373	.D32,
	374	.Hwdiv,
	375	.HwdivArm,
	376	.Aclass,
	377	.Trustzone,
	378	.AcquireRelease,
	379	.Armv8A,
	380	.Crypto,
	381	.Fpao,
	382	.A53,
	383	},
	384	CpuInfo(@This()).create(.CortexA55, "cortex-a55", &[_]FeatureType {
	385	.Thumb2,
	386	.Mp,
	387	.Perfmon,
	388	.Db,
	389	.Crc,
	390	.Fp16,
	391	.Ras,
	392	.Dsp,
	393	.V7clrex,
	394	.V4t,
	395	.Fpregs,
	396	.D32,
	397	.Hwdiv,
	398	.HwdivArm,
	399	.Aclass,
	400	.Trustzone,
	401	.AcquireRelease,
	402	.Armv82A,
	403	.Dotprod,
	404	.A55,
	405	},
	406	CpuInfo(@This()).create(.CortexA57, "cortex-a57", &[_]FeatureType {
	407	.Thumb2,
	408	.Mp,
	409	.Perfmon,
	410	.Db,
	411	.Crc,
	412	.Fp16,
	413	.Dsp,
	414	.V7clrex,
	415	.V4t,
	416	.Fpregs,
	417	.D32,
	418	.Hwdiv,
	419	.HwdivArm,
	420	.Aclass,
	421	.Trustzone,
	422	.AcquireRelease,
	423	.Armv8A,
	424	.AvoidPartialCpsr,
	425	.CheapPredicableCpsr,
	426	.Crypto,
	427	.Fpao,
	428	.A57,
	429	},
	430	CpuInfo(@This()).create(.CortexA7, "cortex-a7", &[_]FeatureType {
	431	.Thumb2,
	432	.Perfmon,
	433	.Db,
	434	.Dsp,
	435	.V7clrex,
	436	.V4t,
	437	.Fpregs,
	438	.D32,
	439	.Aclass,
	440	.Armv7A,
	441	.RetAddrStack,
	442	.Slowfpvmlx,
	443	.VmlxHazards,
	444	.Mp,
	445	.SlowFpBrcc,
	446	.Trustzone,
	447	.Fp16,
	448	.Vfp4,
	449	.VmlxForwarding,
	450	.HwdivArm,
	451	.Hwdiv,
	452	.Virtualization,
	453	.A7,
	454	},
	455	CpuInfo(@This()).create(.CortexA72, "cortex-a72", &[_]FeatureType {
	456	.Thumb2,
	457	.Mp,
	458	.Perfmon,
	459	.Db,
	460	.Crc,
	461	.Fp16,
	462	.Dsp,
	463	.V7clrex,
	464	.V4t,
	465	.Fpregs,
	466	.D32,
	467	.Hwdiv,
	468	.HwdivArm,
	469	.Aclass,
	470	.Trustzone,
	471	.AcquireRelease,
	472	.Armv8A,
	473	.Crypto,
	474	.A72,
	475	},
	476	CpuInfo(@This()).create(.CortexA73, "cortex-a73", &[_]FeatureType {
	477	.Thumb2,
	478	.Mp,
	479	.Perfmon,
	480	.Db,
	481	.Crc,
	482	.Fp16,
	483	.Dsp,
	484	.V7clrex,
	485	.V4t,
	486	.Fpregs,
	487	.D32,
	488	.Hwdiv,
	489	.HwdivArm,
	490	.Aclass,
	491	.Trustzone,
	492	.AcquireRelease,
	493	.Armv8A,
	494	.Crypto,
	495	.A73,
	496	},
	497	CpuInfo(@This()).create(.CortexA75, "cortex-a75", &[_]FeatureType {
	498	.Thumb2,
	499	.Mp,
	500	.Perfmon,
	501	.Db,
	502	.Crc,
	503	.Fp16,
	504	.Ras,
	505	.Dsp,
	506	.V7clrex,
	507	.V4t,
	508	.Fpregs,
	509	.D32,
	510	.Hwdiv,
	511	.HwdivArm,
	512	.Aclass,
	513	.Trustzone,
	514	.AcquireRelease,
	515	.Armv82A,
	516	.Dotprod,
	517	.A75,
	518	},
	519	CpuInfo(@This()).create(.CortexA76, "cortex-a76", &[_]FeatureType {
	520	.Thumb2,
	521	.Mp,
	522	.Perfmon,
	523	.Db,
	524	.Crc,
	525	.Fp16,
	526	.Ras,
	527	.Dsp,
	528	.V7clrex,
	529	.V4t,
	530	.Fpregs,
	531	.D32,
	532	.Hwdiv,
	533	.HwdivArm,
	534	.Aclass,
	535	.Trustzone,
	536	.AcquireRelease,
	537	.Armv82A,
	538	.Crypto,
	539	.Dotprod,
	540	.Fullfp16,
	541	.A76,
	542	},
	543	CpuInfo(@This()).create(.CortexA76ae, "cortex-a76ae", &[_]FeatureType {
	544	.Thumb2,
	545	.Mp,
	546	.Perfmon,
	547	.Db,
	548	.Crc,
	549	.Fp16,
	550	.Ras,
	551	.Dsp,
	552	.V7clrex,
	553	.V4t,
	554	.Fpregs,
	555	.D32,
	556	.Hwdiv,
	557	.HwdivArm,
	558	.Aclass,
	559	.Trustzone,
	560	.AcquireRelease,
	561	.Armv82A,
	562	.Crypto,
	563	.Dotprod,
	564	.Fullfp16,
	565	.A76,
	566	},
	567	CpuInfo(@This()).create(.CortexA8, "cortex-a8", &[_]FeatureType {
	568	.Thumb2,
	569	.Perfmon,
	570	.Db,
	571	.Dsp,
	572	.V7clrex,
	573	.V4t,
	574	.Fpregs,
	575	.D32,
	576	.Aclass,
	577	.Armv7A,
	578	.RetAddrStack,
	579	.Slowfpvmlx,
	580	.VmlxHazards,
	581	.NonpipelinedVfp,
	582	.SlowFpBrcc,
	583	.Trustzone,
	584	.VmlxForwarding,
	585	.A8,
	586	},
	587	CpuInfo(@This()).create(.CortexA9, "cortex-a9", &[_]FeatureType {
	588	.Thumb2,
	589	.Perfmon,
	590	.Db,
	591	.Dsp,
	592	.V7clrex,
	593	.V4t,
	594	.Fpregs,
	595	.D32,
	596	.Aclass,
	597	.Armv7A,
	598	.AvoidPartialCpsr,
	599	.VldnAlign,
	600	.ExpandFpMlx,
	601	.Fp16,
	602	.RetAddrStack,
	603	.VmlxHazards,
	604	.Mp,
	605	.MuxedUnits,
	606	.NeonFpmovs,
	607	.PreferVmovsr,
	608	.Trustzone,
	609	.VmlxForwarding,
	610	.A9,
	611	},
	612	CpuInfo(@This()).create(.CortexM0, "cortex-m0", &[_]FeatureType {
	613	.Mclass,
	614	.StrictAlign,
	615	.ThumbMode,
	616	.Db,
	617	.V4t,
	618	.Noarm,
	619	.Armv6M,
	620	},
	621	CpuInfo(@This()).create(.CortexM0plus, "cortex-m0plus", &[_]FeatureType {
	622	.Mclass,
	623	.StrictAlign,
	624	.ThumbMode,
	625	.Db,
	626	.V4t,
	627	.Noarm,
	628	.Armv6M,
	629	},
	630	CpuInfo(@This()).create(.CortexM1, "cortex-m1", &[_]FeatureType {
	631	.Mclass,
	632	.StrictAlign,
	633	.ThumbMode,
	634	.Db,
	635	.V4t,
	636	.Noarm,
	637	.Armv6M,
	638	},
	639	CpuInfo(@This()).create(.CortexM23, "cortex-m23", &[_]FeatureType {
	640	.Mclass,
	641	.StrictAlign,
	642	.ThumbMode,
	643	.Db,
	644	.Msecext8,
	645	.V7clrex,
	646	.V4t,
	647	.Hwdiv,
	648	.Noarm,
	649	.AcquireRelease,
	650	.Armv8Mbase,
	651	.NoMovt,
	652	},
	653	CpuInfo(@This()).create(.CortexM3, "cortex-m3", &[_]FeatureType {
	654	.Thumb2,
	655	.Mclass,
	656	.Perfmon,
	657	.ThumbMode,
	658	.Db,
	659	.V7clrex,
	660	.V4t,
	661	.Hwdiv,
	662	.Noarm,
	663	.Armv7M,
	664	.NoBranchPredictor,
	665	.LoopAlign,
	666	.UseAa,
	667	.UseMisched,
	668	.M3,
	669	},
	670	CpuInfo(@This()).create(.CortexM33, "cortex-m33", &[_]FeatureType {
	671	.Thumb2,
	672	.Mclass,
	673	.Perfmon,
	674	.ThumbMode,
	675	.Db,
	676	.Msecext8,
	677	.V7clrex,
	678	.V4t,
	679	.Hwdiv,
	680	.Noarm,
	681	.AcquireRelease,
	682	.Armv8Mmain,
	683	.Dsp,
	684	.Fp16,
	685	.Fpregs,
	686	.FpArmv8d16sp,
	687	.NoBranchPredictor,
	688	.Slowfpvmlx,
	689	.LoopAlign,
	690	.UseAa,
	691	.UseMisched,
	692	},
	693	CpuInfo(@This()).create(.CortexM35p, "cortex-m35p", &[_]FeatureType {
	694	.Thumb2,
	695	.Mclass,
	696	.Perfmon,
	697	.ThumbMode,
	698	.Db,
	699	.Msecext8,
	700	.V7clrex,
	701	.V4t,
	702	.Hwdiv,
	703	.Noarm,
	704	.AcquireRelease,
	705	.Armv8Mmain,
	706	.Dsp,
	707	.Fp16,
	708	.Fpregs,
	709	.FpArmv8d16sp,
	710	.NoBranchPredictor,
	711	.Slowfpvmlx,
	712	.LoopAlign,
	713	.UseAa,
	714	.UseMisched,
	715	},
	716	CpuInfo(@This()).create(.CortexM4, "cortex-m4", &[_]FeatureType {
	717	.Thumb2,
	718	.Mclass,
	719	.Perfmon,
	720	.ThumbMode,
	721	.Db,
	722	.Dsp,
	723	.V7clrex,
	724	.V4t,
	725	.Hwdiv,
	726	.Noarm,
	727	.Armv7eM,
	728	.NoBranchPredictor,
	729	.Slowfpvmlx,
	730	.LoopAlign,
	731	.UseAa,
	732	.UseMisched,
	733	.Fp16,
	734	.Fpregs,
	735	.Vfp4d16sp,
	736	},
	737	CpuInfo(@This()).create(.CortexM7, "cortex-m7", &[_]FeatureType {
	738	.Thumb2,
	739	.Mclass,
	740	.Perfmon,
	741	.ThumbMode,
	742	.Db,
	743	.Dsp,
	744	.V7clrex,
	745	.V4t,
	746	.Hwdiv,
	747	.Noarm,
	748	.Armv7eM,
	749	.Fp16,
	750	.Fpregs,
	751	.FpArmv8d16,
	752	},
	753	CpuInfo(@This()).create(.CortexR4, "cortex-r4", &[_]FeatureType {
	754	.Thumb2,
	755	.Perfmon,
	756	.Db,
	757	.Dsp,
	758	.Rclass,
	759	.V7clrex,
	760	.V4t,
	761	.Hwdiv,
	762	.Armv7R,
	763	.AvoidPartialCpsr,
	764	.RetAddrStack,
	765	.R4,
	766	},
	767	CpuInfo(@This()).create(.CortexR4f, "cortex-r4f", &[_]FeatureType {
	768	.Thumb2,
	769	.Perfmon,
	770	.Db,
	771	.Dsp,
	772	.Rclass,
	773	.V7clrex,
	774	.V4t,
	775	.Hwdiv,
	776	.Armv7R,
	777	.AvoidPartialCpsr,
	778	.RetAddrStack,
	779	.Slowfpvmlx,
	780	.SlowFpBrcc,
	781	.Fpregs,
	782	.Vfp3d16,
	783	.R4,
	784	},
	785	CpuInfo(@This()).create(.CortexR5, "cortex-r5", &[_]FeatureType {
	786	.Thumb2,
	787	.Perfmon,
	788	.Db,
	789	.Dsp,
	790	.Rclass,
	791	.V7clrex,
	792	.V4t,
	793	.Hwdiv,
	794	.Armv7R,
	795	.AvoidPartialCpsr,
	796	.HwdivArm,
	797	.RetAddrStack,
	798	.Slowfpvmlx,
	799	.SlowFpBrcc,
	800	.Fpregs,
	801	.Vfp3d16,
	802	.R5,
	803	},
	804	CpuInfo(@This()).create(.CortexR52, "cortex-r52", &[_]FeatureType {
	805	.Thumb2,
	806	.Mp,
	807	.Perfmon,
	808	.Db,
	809	.Crc,
	810	.Fp16,
	811	.Dfb,
	812	.Dsp,
	813	.Rclass,
	814	.V7clrex,
	815	.V4t,
	816	.Fpregs,
	817	.D32,
	818	.Hwdiv,
	819	.HwdivArm,
	820	.AcquireRelease,
	821	.Armv8R,
	822	.Fpao,
	823	.UseAa,
	824	.UseMisched,
	825	.R52,
	826	},
	827	CpuInfo(@This()).create(.CortexR7, "cortex-r7", &[_]FeatureType {
	828	.Thumb2,
	829	.Perfmon,
	830	.Db,
	831	.Dsp,
	832	.Rclass,
	833	.V7clrex,
	834	.V4t,
	835	.Hwdiv,
	836	.Armv7R,
	837	.AvoidPartialCpsr,
	838	.Fp16,
	839	.HwdivArm,
	840	.RetAddrStack,
	841	.Slowfpvmlx,
	842	.Mp,
	843	.SlowFpBrcc,
	844	.Fpregs,
	845	.Vfp3d16,
	846	.R7,
	847	},
	848	CpuInfo(@This()).create(.CortexR8, "cortex-r8", &[_]FeatureType {
	849	.Thumb2,
	850	.Perfmon,
	851	.Db,
	852	.Dsp,
	853	.Rclass,
	854	.V7clrex,
	855	.V4t,
	856	.Hwdiv,
	857	.Armv7R,
	858	.AvoidPartialCpsr,
	859	.Fp16,
	860	.HwdivArm,
	861	.RetAddrStack,
	862	.Slowfpvmlx,
	863	.Mp,
	864	.SlowFpBrcc,
	865	.Fpregs,
	866	.Vfp3d16,
	867	},
	868	CpuInfo(@This()).create(.Cyclone, "cyclone", &[_]FeatureType {
	869	.Thumb2,
	870	.Mp,
	871	.Perfmon,
	872	.Db,
	873	.Crc,
	874	.Fp16,
	875	.Dsp,
	876	.V7clrex,
	877	.V4t,
	878	.Fpregs,
	879	.D32,
	880	.Hwdiv,
	881	.HwdivArm,
	882	.Aclass,
	883	.Trustzone,
	884	.AcquireRelease,
	885	.Armv8A,
	886	.AvoidMovsShop,
	887	.AvoidPartialCpsr,
	888	.Crypto,
	889	.RetAddrStack,
	890	.Slowfpvmlx,
	891	.Neonfp,
	892	.DisablePostraScheduler,
	893	.UseMisched,
	894	.Vfp4,
	895	.Zcz,
	896	.Swift,
	897	},
	898	CpuInfo(@This()).create(.Ep9312, "ep9312", &[_]FeatureType {
	899	.V4t,
	900	.Armv4t,
	901	},
	902	CpuInfo(@This()).create(.ExynosM1, "exynos-m1", &[_]FeatureType {
	903	.Thumb2,
	904	.Mp,
	905	.Perfmon,
	906	.Db,
	907	.Crc,
	908	.Fp16,
	909	.Dsp,
	910	.V7clrex,
	911	.V4t,
	912	.Fpregs,
	913	.D32,
	914	.Hwdiv,
	915	.HwdivArm,
	916	.Aclass,
	917	.Trustzone,
	918	.AcquireRelease,
	919	.Armv8A,
	920	.Zcz,
	921	.SlowVdup32,
	922	.SlowVgetlni32,
	923	.DontWidenVmovs,
	924	.FuseAes,
	925	.WideStrideVfp,
	926	.ProfUnpr,
	927	.Slowfpvmlx,
	928	.SlowFpBrcc,
	929	.FuseLiterals,
	930	.ExpandFpMlx,
	931	.RetAddrStack,
	932	.UseAa,
	933	.Exynos,
	934	},
	935	CpuInfo(@This()).create(.ExynosM2, "exynos-m2", &[_]FeatureType {
	936	.Thumb2,
	937	.Mp,
	938	.Perfmon,
	939	.Db,
	940	.Crc,
	941	.Fp16,
	942	.Dsp,
	943	.V7clrex,
	944	.V4t,
	945	.Fpregs,
	946	.D32,
	947	.Hwdiv,
	948	.HwdivArm,
	949	.Aclass,
	950	.Trustzone,
	951	.AcquireRelease,
	952	.Armv8A,
	953	.Zcz,
	954	.SlowVdup32,
	955	.SlowVgetlni32,
	956	.DontWidenVmovs,
	957	.FuseAes,
	958	.WideStrideVfp,
	959	.ProfUnpr,
	960	.Slowfpvmlx,
	961	.SlowFpBrcc,
	962	.FuseLiterals,
	963	.ExpandFpMlx,
	964	.RetAddrStack,
	965	.UseAa,
	966	.Exynos,
	967	},
	968	CpuInfo(@This()).create(.ExynosM3, "exynos-m3", &[_]FeatureType {
	969	.Thumb2,
	970	.Mp,
	971	.Perfmon,
	972	.Db,
	973	.Crc,
	974	.Fp16,
	975	.Dsp,
	976	.V7clrex,
	977	.V4t,
	978	.Fpregs,
	979	.D32,
	980	.Hwdiv,
	981	.HwdivArm,
	982	.Aclass,
	983	.Trustzone,
	984	.AcquireRelease,
	985	.Armv8A,
	986	.Zcz,
	987	.SlowVdup32,
	988	.SlowVgetlni32,
	989	.DontWidenVmovs,
	990	.FuseAes,
	991	.WideStrideVfp,
	992	.ProfUnpr,
	993	.Slowfpvmlx,
	994	.SlowFpBrcc,
	995	.FuseLiterals,
	996	.ExpandFpMlx,
	997	.RetAddrStack,
	998	.UseAa,
	999	.Exynos,
	1000	},
	1001	CpuInfo(@This()).create(.ExynosM4, "exynos-m4", &[_]FeatureType {
	1002	.Thumb2,
	1003	.Mp,
	1004	.Perfmon,
	1005	.Db,
	1006	.Crc,
	1007	.Fp16,
	1008	.Ras,
	1009	.Dsp,
	1010	.V7clrex,
	1011	.V4t,
	1012	.Fpregs,
	1013	.D32,
	1014	.Hwdiv,
	1015	.HwdivArm,
	1016	.Aclass,
	1017	.Trustzone,
	1018	.AcquireRelease,
	1019	.Armv82A,
	1020	.Dotprod,
	1021	.Fullfp16,
	1022	.Zcz,
	1023	.SlowVdup32,
	1024	.SlowVgetlni32,
	1025	.DontWidenVmovs,
	1026	.FuseAes,
	1027	.WideStrideVfp,
	1028	.ProfUnpr,
	1029	.Slowfpvmlx,
	1030	.SlowFpBrcc,
	1031	.FuseLiterals,
	1032	.ExpandFpMlx,
	1033	.RetAddrStack,
	1034	.UseAa,
	1035	.Exynos,
	1036	},
	1037	CpuInfo(@This()).create(.ExynosM5, "exynos-m5", &[_]FeatureType {
	1038	.Thumb2,
	1039	.Mp,
	1040	.Perfmon,
	1041	.Db,
	1042	.Crc,
	1043	.Fp16,
	1044	.Ras,
	1045	.Dsp,
	1046	.V7clrex,
	1047	.V4t,
	1048	.Fpregs,
	1049	.D32,
	1050	.Hwdiv,
	1051	.HwdivArm,
	1052	.Aclass,
	1053	.Trustzone,
	1054	.AcquireRelease,
	1055	.Armv82A,
	1056	.Dotprod,
	1057	.Fullfp16,
	1058	.Zcz,
	1059	.SlowVdup32,
	1060	.SlowVgetlni32,
	1061	.DontWidenVmovs,
	1062	.FuseAes,
	1063	.WideStrideVfp,
	1064	.ProfUnpr,
	1065	.Slowfpvmlx,
	1066	.SlowFpBrcc,
	1067	.FuseLiterals,
	1068	.ExpandFpMlx,
	1069	.RetAddrStack,
	1070	.UseAa,
	1071	.Exynos,
	1072	},
	1073	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	1074	},
	1075	CpuInfo(@This()).create(.Iwmmxt, "iwmmxt", &[_]FeatureType {
	1076	.V4t,
	1077	.Armv5te,
	1078	},
	1079	CpuInfo(@This()).create(.Krait, "krait", &[_]FeatureType {
	1080	.Thumb2,
	1081	.Perfmon,
	1082	.Db,
	1083	.Dsp,
	1084	.V7clrex,
	1085	.V4t,
	1086	.Fpregs,
	1087	.D32,
	1088	.Aclass,
	1089	.Armv7A,
	1090	.AvoidPartialCpsr,
	1091	.VldnAlign,
	1092	.Fp16,
	1093	.HwdivArm,
	1094	.Hwdiv,
	1095	.RetAddrStack,
	1096	.MuxedUnits,
	1097	.Vfp4,
	1098	.VmlxForwarding,
	1099	.Krait,
	1100	},
	1101	CpuInfo(@This()).create(.Kryo, "kryo", &[_]FeatureType {
	1102	.Thumb2,
	1103	.Mp,
	1104	.Perfmon,
	1105	.Db,
	1106	.Crc,
	1107	.Fp16,
	1108	.Dsp,
	1109	.V7clrex,
	1110	.V4t,
	1111	.Fpregs,
	1112	.D32,
	1113	.Hwdiv,
	1114	.HwdivArm,
	1115	.Aclass,
	1116	.Trustzone,
	1117	.AcquireRelease,
	1118	.Armv8A,
	1119	.Crypto,
	1120	.Kryo,
	1121	},
	1122	CpuInfo(@This()).create(.Mpcore, "mpcore", &[_]FeatureType {
	1123	.V4t,
	1124	.Armv6k,
	1125	.Slowfpvmlx,
	1126	.Fpregs,
	1127	.Vfp2,
	1128	},
	1129	CpuInfo(@This()).create(.Mpcorenovfp, "mpcorenovfp", &[_]FeatureType {
	1130	.V4t,
	1131	.Armv6k,
	1132	},
	1133	CpuInfo(@This()).create(.NeoverseN1, "neoverse-n1", &[_]FeatureType {
	1134	.Thumb2,
	1135	.Mp,
	1136	.Perfmon,
	1137	.Db,
	1138	.Crc,
	1139	.Fp16,
	1140	.Ras,
	1141	.Dsp,
	1142	.V7clrex,
	1143	.V4t,
	1144	.Fpregs,
	1145	.D32,
	1146	.Hwdiv,
	1147	.HwdivArm,
	1148	.Aclass,
	1149	.Trustzone,
	1150	.AcquireRelease,
	1151	.Armv82A,
	1152	.Crypto,
	1153	.Dotprod,
	1154	},
	1155	CpuInfo(@This()).create(.Sc000, "sc000", &[_]FeatureType {
	1156	.Mclass,
	1157	.StrictAlign,
	1158	.ThumbMode,
	1159	.Db,
	1160	.V4t,
	1161	.Noarm,
	1162	.Armv6M,
	1163	},
	1164	CpuInfo(@This()).create(.Sc300, "sc300", &[_]FeatureType {
	1165	.Thumb2,
	1166	.Mclass,
	1167	.Perfmon,
	1168	.ThumbMode,
	1169	.Db,
	1170	.V7clrex,
	1171	.V4t,
	1172	.Hwdiv,
	1173	.Noarm,
	1174	.Armv7M,
	1175	.NoBranchPredictor,
	1176	.UseAa,
	1177	.UseMisched,
	1178	.M3,
	1179	},
	1180	CpuInfo(@This()).create(.Strongarm, "strongarm", &[_]FeatureType {
	1181	.Armv4,
	1182	},
	1183	CpuInfo(@This()).create(.Strongarm110, "strongarm110", &[_]FeatureType {
	1184	.Armv4,
	1185	},
	1186	CpuInfo(@This()).create(.Strongarm1100, "strongarm1100", &[_]FeatureType {
	1187	.Armv4,
	1188	},
	1189	CpuInfo(@This()).create(.Strongarm1110, "strongarm1110", &[_]FeatureType {
	1190	.Armv4,
	1191	},
	1192	CpuInfo(@This()).create(.Swift, "swift", &[_]FeatureType {
	1193	.Thumb2,
	1194	.Perfmon,
	1195	.Db,
	1196	.Dsp,
	1197	.V7clrex,
	1198	.V4t,
	1199	.Fpregs,
	1200	.D32,
	1201	.Aclass,
	1202	.Armv7A,
	1203	.AvoidMovsShop,
	1204	.AvoidPartialCpsr,
	1205	.HwdivArm,
	1206	.Hwdiv,
	1207	.RetAddrStack,
	1208	.Slowfpvmlx,
	1209	.VmlxHazards,
	1210	.Mp,
	1211	.Neonfp,
	1212	.DisablePostraScheduler,
	1213	.PreferIshst,
	1214	.ProfUnpr,
	1215	.SlowLoadDSubreg,
	1216	.SlowOddReg,
	1217	.SlowVdup32,
	1218	.SlowVgetlni32,
	1219	.UseMisched,
	1220	.WideStrideVfp,
	1221	.Fp16,
	1222	.Vfp4,
	1223	.Swift,
	1224	},
	1225	CpuInfo(@This()).create(.Xscale, "xscale", &[_]FeatureType {
	1226	.V4t,
	1227	.Armv5te,
	1228	},
	1229	};
	1230	};

lib/std/target/cpu/AvrCpu.zig created+3863

...	...	@@ -0,0 +1,3863 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const AvrCpu = enum {
	5	At43usb320,
	6	At43usb355,
	7	At76c711,
	8	At86rf401,
	9	At90c8534,
	10	At90can128,
	11	At90can32,
	12	At90can64,
	13	At90pwm1,
	14	At90pwm161,
	15	At90pwm2,
	16	At90pwm216,
	17	At90pwm2b,
	18	At90pwm3,
	19	At90pwm316,
	20	At90pwm3b,
	21	At90pwm81,
	22	At90s1200,
	23	At90s2313,
	24	At90s2323,
	25	At90s2333,
	26	At90s2343,
	27	At90s4414,
	28	At90s4433,
	29	At90s4434,
	30	At90s8515,
	31	At90s8535,
	32	At90scr100,
	33	At90usb1286,
	34	At90usb1287,
	35	At90usb162,
	36	At90usb646,
	37	At90usb647,
	38	At90usb82,
	39	At94k,
	40	Ata5272,
	41	Ata5505,
	42	Ata5790,
	43	Ata5795,
	44	Ata6285,
	45	Ata6286,
	46	Ata6289,
	47	Atmega103,
	48	Atmega128,
	49	Atmega1280,
	50	Atmega1281,
	51	Atmega1284,
	52	Atmega1284p,
	53	Atmega1284rfr2,
	54	Atmega128a,
	55	Atmega128rfa1,
	56	Atmega128rfr2,
	57	Atmega16,
	58	Atmega161,
	59	Atmega162,
	60	Atmega163,
	61	Atmega164a,
	62	Atmega164p,
	63	Atmega164pa,
	64	Atmega165,
	65	Atmega165a,
	66	Atmega165p,
	67	Atmega165pa,
	68	Atmega168,
	69	Atmega168a,
	70	Atmega168p,
	71	Atmega168pa,
	72	Atmega169,
	73	Atmega169a,
	74	Atmega169p,
	75	Atmega169pa,
	76	Atmega16a,
	77	Atmega16hva,
	78	Atmega16hva2,
	79	Atmega16hvb,
	80	Atmega16hvbrevb,
	81	Atmega16m1,
	82	Atmega16u2,
	83	Atmega16u4,
	84	Atmega2560,
	85	Atmega2561,
	86	Atmega2564rfr2,
	87	Atmega256rfr2,
	88	Atmega32,
	89	Atmega323,
	90	Atmega324a,
	91	Atmega324p,
	92	Atmega324pa,
	93	Atmega325,
	94	Atmega3250,
	95	Atmega3250a,
	96	Atmega3250p,
	97	Atmega3250pa,
	98	Atmega325a,
	99	Atmega325p,
	100	Atmega325pa,
	101	Atmega328,
	102	Atmega328p,
	103	Atmega329,
	104	Atmega3290,
	105	Atmega3290a,
	106	Atmega3290p,
	107	Atmega3290pa,
	108	Atmega329a,
	109	Atmega329p,
	110	Atmega329pa,
	111	Atmega32a,
	112	Atmega32c1,
	113	Atmega32hvb,
	114	Atmega32hvbrevb,
	115	Atmega32m1,
	116	Atmega32u2,
	117	Atmega32u4,
	118	Atmega32u6,
	119	Atmega406,
	120	Atmega48,
	121	Atmega48a,
	122	Atmega48p,
	123	Atmega48pa,
	124	Atmega64,
	125	Atmega640,
	126	Atmega644,
	127	Atmega644a,
	128	Atmega644p,
	129	Atmega644pa,
	130	Atmega644rfr2,
	131	Atmega645,
	132	Atmega6450,
	133	Atmega6450a,
	134	Atmega6450p,
	135	Atmega645a,
	136	Atmega645p,
	137	Atmega649,
	138	Atmega6490,
	139	Atmega6490a,
	140	Atmega6490p,
	141	Atmega649a,
	142	Atmega649p,
	143	Atmega64a,
	144	Atmega64c1,
	145	Atmega64hve,
	146	Atmega64m1,
	147	Atmega64rfr2,
	148	Atmega8,
	149	Atmega8515,
	150	Atmega8535,
	151	Atmega88,
	152	Atmega88a,
	153	Atmega88p,
	154	Atmega88pa,
	155	Atmega8a,
	156	Atmega8hva,
	157	Atmega8u2,
	158	Attiny10,
	159	Attiny102,
	160	Attiny104,
	161	Attiny11,
	162	Attiny12,
	163	Attiny13,
	164	Attiny13a,
	165	Attiny15,
	166	Attiny1634,
	167	Attiny167,
	168	Attiny20,
	169	Attiny22,
	170	Attiny2313,
	171	Attiny2313a,
	172	Attiny24,
	173	Attiny24a,
	174	Attiny25,
	175	Attiny26,
	176	Attiny261,
	177	Attiny261a,
	178	Attiny28,
	179	Attiny4,
	180	Attiny40,
	181	Attiny4313,
	182	Attiny43u,
	183	Attiny44,
	184	Attiny44a,
	185	Attiny45,
	186	Attiny461,
	187	Attiny461a,
	188	Attiny48,
	189	Attiny5,
	190	Attiny828,
	191	Attiny84,
	192	Attiny84a,
	193	Attiny85,
	194	Attiny861,
	195	Attiny861a,
	196	Attiny87,
	197	Attiny88,
	198	Attiny9,
	199	Atxmega128a1,
	200	Atxmega128a1u,
	201	Atxmega128a3,
	202	Atxmega128a3u,
	203	Atxmega128a4u,
	204	Atxmega128b1,
	205	Atxmega128b3,
	206	Atxmega128c3,
	207	Atxmega128d3,
	208	Atxmega128d4,
	209	Atxmega16a4,
	210	Atxmega16a4u,
	211	Atxmega16c4,
	212	Atxmega16d4,
	213	Atxmega16e5,
	214	Atxmega192a3,
	215	Atxmega192a3u,
	216	Atxmega192c3,
	217	Atxmega192d3,
	218	Atxmega256a3,
	219	Atxmega256a3b,
	220	Atxmega256a3bu,
	221	Atxmega256a3u,
	222	Atxmega256c3,
	223	Atxmega256d3,
	224	Atxmega32a4,
	225	Atxmega32a4u,
	226	Atxmega32c4,
	227	Atxmega32d4,
	228	Atxmega32e5,
	229	Atxmega32x1,
	230	Atxmega384c3,
	231	Atxmega384d3,
	232	Atxmega64a1,
	233	Atxmega64a1u,
	234	Atxmega64a3,
	235	Atxmega64a3u,
	236	Atxmega64a4u,
	237	Atxmega64b1,
	238	Atxmega64b3,
	239	Atxmega64c3,
	240	Atxmega64d3,
	241	Atxmega64d4,
	242	Atxmega8e5,
	243	Avr1,
	244	Avr2,
	245	Avr25,
	246	Avr3,
	247	Avr31,
	248	Avr35,
	249	Avr4,
	250	Avr5,
	251	Avr51,
	252	Avr6,
	253	Avrtiny,
	254	Avrxmega1,
	255	Avrxmega2,
	256	Avrxmega3,
	257	Avrxmega4,
	258	Avrxmega5,
	259	Avrxmega6,
	260	Avrxmega7,
	261	M3000,
	262
	263	pub fn getInfo(self: @This()) CpuInfo {
	264	return cpu_infos[@enumToInt(self)];
	265	}
	266
	267	pub const FeatureType = feature.AvrFeature;
	268
	269	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	270	CpuInfo(@This()).create(.At43usb320, "at43usb320", &[_]FeatureType {
	271	.Ijmpcall,
	272	.Sram,
	273	.Elpm,
	274	.Avr0,
	275	.Jmpcall,
	276	.Addsubiw,
	277	.Lpm,
	278	.Avr31,
	279	},
	280	CpuInfo(@This()).create(.At43usb355, "at43usb355", &[_]FeatureType {
	281	.Ijmpcall,
	282	.Sram,
	283	.Avr0,
	284	.Jmpcall,
	285	.Addsubiw,
	286	.Lpm,
	287	.Avr3,
	288	},
	289	CpuInfo(@This()).create(.At76c711, "at76c711", &[_]FeatureType {
	290	.Ijmpcall,
	291	.Sram,
	292	.Avr0,
	293	.Jmpcall,
	294	.Addsubiw,
	295	.Lpm,
	296	.Avr3,
	297	},
	298	CpuInfo(@This()).create(.At86rf401, "at86rf401", &[_]FeatureType {
	299	.Ijmpcall,
	300	.Sram,
	301	.Avr0,
	302	.Addsubiw,
	303	.Lpm,
	304	.Avr2,
	305	.Lpmx,
	306	.Movw,
	307	},
	308	CpuInfo(@This()).create(.At90c8534, "at90c8534", &[_]FeatureType {
	309	.Ijmpcall,
	310	.Sram,
	311	.Avr0,
	312	.Addsubiw,
	313	.Lpm,
	314	.Avr2,
	315	},
	316	CpuInfo(@This()).create(.At90can128, "at90can128", &[_]FeatureType {
	317	.Ijmpcall,
	318	.Elpmx,
	319	.Movw,
	320	.Mul,
	321	.Sram,
	322	.Break,
	323	.Spm,
	324	.Elpm,
	325	.Lpmx,
	326	.Avr0,
	327	.Jmpcall,
	328	.Addsubiw,
	329	.Lpm,
	330	.Avr51,
	331	},
	332	CpuInfo(@This()).create(.At90can32, "at90can32", &[_]FeatureType {
	333	.Ijmpcall,
	334	.Movw,
	335	.Mul,
	336	.Sram,
	337	.Break,
	338	.Spm,
	339	.Lpmx,
	340	.Avr0,
	341	.Jmpcall,
	342	.Addsubiw,
	343	.Lpm,
	344	.Avr5,
	345	},
	346	CpuInfo(@This()).create(.At90can64, "at90can64", &[_]FeatureType {
	347	.Ijmpcall,
	348	.Movw,
	349	.Mul,
	350	.Sram,
	351	.Break,
	352	.Spm,
	353	.Lpmx,
	354	.Avr0,
	355	.Jmpcall,
	356	.Addsubiw,
	357	.Lpm,
	358	.Avr5,
	359	},
	360	CpuInfo(@This()).create(.At90pwm1, "at90pwm1", &[_]FeatureType {
	361	.Ijmpcall,
	362	.Movw,
	363	.Mul,
	364	.Sram,
	365	.Break,
	366	.Spm,
	367	.Lpmx,
	368	.Avr0,
	369	.Addsubiw,
	370	.Lpm,
	371	.Avr4,
	372	},
	373	CpuInfo(@This()).create(.At90pwm161, "at90pwm161", &[_]FeatureType {
	374	.Ijmpcall,
	375	.Movw,
	376	.Mul,
	377	.Sram,
	378	.Break,
	379	.Spm,
	380	.Lpmx,
	381	.Avr0,
	382	.Jmpcall,
	383	.Addsubiw,
	384	.Lpm,
	385	.Avr5,
	386	},
	387	CpuInfo(@This()).create(.At90pwm2, "at90pwm2", &[_]FeatureType {
	388	.Ijmpcall,
	389	.Movw,
	390	.Mul,
	391	.Sram,
	392	.Break,
	393	.Spm,
	394	.Lpmx,
	395	.Avr0,
	396	.Addsubiw,
	397	.Lpm,
	398	.Avr4,
	399	},
	400	CpuInfo(@This()).create(.At90pwm216, "at90pwm216", &[_]FeatureType {
	401	.Ijmpcall,
	402	.Movw,
	403	.Mul,
	404	.Sram,
	405	.Break,
	406	.Spm,
	407	.Lpmx,
	408	.Avr0,
	409	.Jmpcall,
	410	.Addsubiw,
	411	.Lpm,
	412	.Avr5,
	413	},
	414	CpuInfo(@This()).create(.At90pwm2b, "at90pwm2b", &[_]FeatureType {
	415	.Ijmpcall,
	416	.Movw,
	417	.Mul,
	418	.Sram,
	419	.Break,
	420	.Spm,
	421	.Lpmx,
	422	.Avr0,
	423	.Addsubiw,
	424	.Lpm,
	425	.Avr4,
	426	},
	427	CpuInfo(@This()).create(.At90pwm3, "at90pwm3", &[_]FeatureType {
	428	.Ijmpcall,
	429	.Movw,
	430	.Mul,
	431	.Sram,
	432	.Break,
	433	.Spm,
	434	.Lpmx,
	435	.Avr0,
	436	.Addsubiw,
	437	.Lpm,
	438	.Avr4,
	439	},
	440	CpuInfo(@This()).create(.At90pwm316, "at90pwm316", &[_]FeatureType {
	441	.Ijmpcall,
	442	.Movw,
	443	.Mul,
	444	.Sram,
	445	.Break,
	446	.Spm,
	447	.Lpmx,
	448	.Avr0,
	449	.Jmpcall,
	450	.Addsubiw,
	451	.Lpm,
	452	.Avr5,
	453	},
	454	CpuInfo(@This()).create(.At90pwm3b, "at90pwm3b", &[_]FeatureType {
	455	.Ijmpcall,
	456	.Movw,
	457	.Mul,
	458	.Sram,
	459	.Break,
	460	.Spm,
	461	.Lpmx,
	462	.Avr0,
	463	.Addsubiw,
	464	.Lpm,
	465	.Avr4,
	466	},
	467	CpuInfo(@This()).create(.At90pwm81, "at90pwm81", &[_]FeatureType {
	468	.Ijmpcall,
	469	.Movw,
	470	.Mul,
	471	.Sram,
	472	.Break,
	473	.Spm,
	474	.Lpmx,
	475	.Avr0,
	476	.Addsubiw,
	477	.Lpm,
	478	.Avr4,
	479	},
	480	CpuInfo(@This()).create(.At90s1200, "at90s1200", &[_]FeatureType {
	481	.Avr0,
	482	},
	483	CpuInfo(@This()).create(.At90s2313, "at90s2313", &[_]FeatureType {
	484	.Ijmpcall,
	485	.Sram,
	486	.Avr0,
	487	.Addsubiw,
	488	.Lpm,
	489	.Avr2,
	490	},
	491	CpuInfo(@This()).create(.At90s2323, "at90s2323", &[_]FeatureType {
	492	.Ijmpcall,
	493	.Sram,
	494	.Avr0,
	495	.Addsubiw,
	496	.Lpm,
	497	.Avr2,
	498	},
	499	CpuInfo(@This()).create(.At90s2333, "at90s2333", &[_]FeatureType {
	500	.Ijmpcall,
	501	.Sram,
	502	.Avr0,
	503	.Addsubiw,
	504	.Lpm,
	505	.Avr2,
	506	},
	507	CpuInfo(@This()).create(.At90s2343, "at90s2343", &[_]FeatureType {
	508	.Ijmpcall,
	509	.Sram,
	510	.Avr0,
	511	.Addsubiw,
	512	.Lpm,
	513	.Avr2,
	514	},
	515	CpuInfo(@This()).create(.At90s4414, "at90s4414", &[_]FeatureType {
	516	.Ijmpcall,
	517	.Sram,
	518	.Avr0,
	519	.Addsubiw,
	520	.Lpm,
	521	.Avr2,
	522	},
	523	CpuInfo(@This()).create(.At90s4433, "at90s4433", &[_]FeatureType {
	524	.Ijmpcall,
	525	.Sram,
	526	.Avr0,
	527	.Addsubiw,
	528	.Lpm,
	529	.Avr2,
	530	},
	531	CpuInfo(@This()).create(.At90s4434, "at90s4434", &[_]FeatureType {
	532	.Ijmpcall,
	533	.Sram,
	534	.Avr0,
	535	.Addsubiw,
	536	.Lpm,
	537	.Avr2,
	538	},
	539	CpuInfo(@This()).create(.At90s8515, "at90s8515", &[_]FeatureType {
	540	.Ijmpcall,
	541	.Sram,
	542	.Avr0,
	543	.Addsubiw,
	544	.Lpm,
	545	.Avr2,
	546	},
	547	CpuInfo(@This()).create(.At90s8535, "at90s8535", &[_]FeatureType {
	548	.Ijmpcall,
	549	.Sram,
	550	.Avr0,
	551	.Addsubiw,
	552	.Lpm,
	553	.Avr2,
	554	},
	555	CpuInfo(@This()).create(.At90scr100, "at90scr100", &[_]FeatureType {
	556	.Ijmpcall,
	557	.Movw,
	558	.Mul,
	559	.Sram,
	560	.Break,
	561	.Spm,
	562	.Lpmx,
	563	.Avr0,
	564	.Jmpcall,
	565	.Addsubiw,
	566	.Lpm,
	567	.Avr5,
	568	},
	569	CpuInfo(@This()).create(.At90usb1286, "at90usb1286", &[_]FeatureType {
	570	.Ijmpcall,
	571	.Elpmx,
	572	.Movw,
	573	.Mul,
	574	.Sram,
	575	.Break,
	576	.Spm,
	577	.Elpm,
	578	.Lpmx,
	579	.Avr0,
	580	.Jmpcall,
	581	.Addsubiw,
	582	.Lpm,
	583	.Avr51,
	584	},
	585	CpuInfo(@This()).create(.At90usb1287, "at90usb1287", &[_]FeatureType {
	586	.Ijmpcall,
	587	.Elpmx,
	588	.Movw,
	589	.Mul,
	590	.Sram,
	591	.Break,
	592	.Spm,
	593	.Elpm,
	594	.Lpmx,
	595	.Avr0,
	596	.Jmpcall,
	597	.Addsubiw,
	598	.Lpm,
	599	.Avr51,
	600	},
	601	CpuInfo(@This()).create(.At90usb162, "at90usb162", &[_]FeatureType {
	602	.Ijmpcall,
	603	.Movw,
	604	.Sram,
	605	.Break,
	606	.Spm,
	607	.Lpmx,
	608	.Avr0,
	609	.Jmpcall,
	610	.Addsubiw,
	611	.Lpm,
	612	.Avr35,
	613	},
	614	CpuInfo(@This()).create(.At90usb646, "at90usb646", &[_]FeatureType {
	615	.Ijmpcall,
	616	.Movw,
	617	.Mul,
	618	.Sram,
	619	.Break,
	620	.Spm,
	621	.Lpmx,
	622	.Avr0,
	623	.Jmpcall,
	624	.Addsubiw,
	625	.Lpm,
	626	.Avr5,
	627	},
	628	CpuInfo(@This()).create(.At90usb647, "at90usb647", &[_]FeatureType {
	629	.Ijmpcall,
	630	.Movw,
	631	.Mul,
	632	.Sram,
	633	.Break,
	634	.Spm,
	635	.Lpmx,
	636	.Avr0,
	637	.Jmpcall,
	638	.Addsubiw,
	639	.Lpm,
	640	.Avr5,
	641	},
	642	CpuInfo(@This()).create(.At90usb82, "at90usb82", &[_]FeatureType {
	643	.Ijmpcall,
	644	.Movw,
	645	.Sram,
	646	.Break,
	647	.Spm,
	648	.Lpmx,
	649	.Avr0,
	650	.Jmpcall,
	651	.Addsubiw,
	652	.Lpm,
	653	.Avr35,
	654	},
	655	CpuInfo(@This()).create(.At94k, "at94k", &[_]FeatureType {
	656	.Ijmpcall,
	657	.Sram,
	658	.Avr0,
	659	.Jmpcall,
	660	.Addsubiw,
	661	.Lpm,
	662	.Avr3,
	663	.Lpmx,
	664	.Movw,
	665	.Mul,
	666	},
	667	CpuInfo(@This()).create(.Ata5272, "ata5272", &[_]FeatureType {
	668	.Ijmpcall,
	669	.Movw,
	670	.Sram,
	671	.Break,
	672	.Spm,
	673	.Lpmx,
	674	.Avr0,
	675	.Addsubiw,
	676	.Lpm,
	677	.Avr25,
	678	},
	679	CpuInfo(@This()).create(.Ata5505, "ata5505", &[_]FeatureType {
	680	.Ijmpcall,
	681	.Movw,
	682	.Sram,
	683	.Break,
	684	.Spm,
	685	.Lpmx,
	686	.Avr0,
	687	.Jmpcall,
	688	.Addsubiw,
	689	.Lpm,
	690	.Avr35,
	691	},
	692	CpuInfo(@This()).create(.Ata5790, "ata5790", &[_]FeatureType {
	693	.Ijmpcall,
	694	.Movw,
	695	.Mul,
	696	.Sram,
	697	.Break,
	698	.Spm,
	699	.Lpmx,
	700	.Avr0,
	701	.Jmpcall,
	702	.Addsubiw,
	703	.Lpm,
	704	.Avr5,
	705	},
	706	CpuInfo(@This()).create(.Ata5795, "ata5795", &[_]FeatureType {
	707	.Ijmpcall,
	708	.Movw,
	709	.Mul,
	710	.Sram,
	711	.Break,
	712	.Spm,
	713	.Lpmx,
	714	.Avr0,
	715	.Jmpcall,
	716	.Addsubiw,
	717	.Lpm,
	718	.Avr5,
	719	},
	720	CpuInfo(@This()).create(.Ata6285, "ata6285", &[_]FeatureType {
	721	.Ijmpcall,
	722	.Movw,
	723	.Mul,
	724	.Sram,
	725	.Break,
	726	.Spm,
	727	.Lpmx,
	728	.Avr0,
	729	.Addsubiw,
	730	.Lpm,
	731	.Avr4,
	732	},
	733	CpuInfo(@This()).create(.Ata6286, "ata6286", &[_]FeatureType {
	734	.Ijmpcall,
	735	.Movw,
	736	.Mul,
	737	.Sram,
	738	.Break,
	739	.Spm,
	740	.Lpmx,
	741	.Avr0,
	742	.Addsubiw,
	743	.Lpm,
	744	.Avr4,
	745	},
	746	CpuInfo(@This()).create(.Ata6289, "ata6289", &[_]FeatureType {
	747	.Ijmpcall,
	748	.Movw,
	749	.Mul,
	750	.Sram,
	751	.Break,
	752	.Spm,
	753	.Lpmx,
	754	.Avr0,
	755	.Addsubiw,
	756	.Lpm,
	757	.Avr4,
	758	},
	759	CpuInfo(@This()).create(.Atmega103, "atmega103", &[_]FeatureType {
	760	.Ijmpcall,
	761	.Sram,
	762	.Elpm,
	763	.Avr0,
	764	.Jmpcall,
	765	.Addsubiw,
	766	.Lpm,
	767	.Avr31,
	768	},
	769	CpuInfo(@This()).create(.Atmega128, "atmega128", &[_]FeatureType {
	770	.Ijmpcall,
	771	.Elpmx,
	772	.Movw,
	773	.Mul,
	774	.Sram,
	775	.Break,
	776	.Spm,
	777	.Elpm,
	778	.Lpmx,
	779	.Avr0,
	780	.Jmpcall,
	781	.Addsubiw,
	782	.Lpm,
	783	.Avr51,
	784	},
	785	CpuInfo(@This()).create(.Atmega1280, "atmega1280", &[_]FeatureType {
	786	.Ijmpcall,
	787	.Elpmx,
	788	.Movw,
	789	.Mul,
	790	.Sram,
	791	.Break,
	792	.Spm,
	793	.Elpm,
	794	.Lpmx,
	795	.Avr0,
	796	.Jmpcall,
	797	.Addsubiw,
	798	.Lpm,
	799	.Avr51,
	800	},
	801	CpuInfo(@This()).create(.Atmega1281, "atmega1281", &[_]FeatureType {
	802	.Ijmpcall,
	803	.Elpmx,
	804	.Movw,
	805	.Mul,
	806	.Sram,
	807	.Break,
	808	.Spm,
	809	.Elpm,
	810	.Lpmx,
	811	.Avr0,
	812	.Jmpcall,
	813	.Addsubiw,
	814	.Lpm,
	815	.Avr51,
	816	},
	817	CpuInfo(@This()).create(.Atmega1284, "atmega1284", &[_]FeatureType {
	818	.Ijmpcall,
	819	.Elpmx,
	820	.Movw,
	821	.Mul,
	822	.Sram,
	823	.Break,
	824	.Spm,
	825	.Elpm,
	826	.Lpmx,
	827	.Avr0,
	828	.Jmpcall,
	829	.Addsubiw,
	830	.Lpm,
	831	.Avr51,
	832	},
	833	CpuInfo(@This()).create(.Atmega1284p, "atmega1284p", &[_]FeatureType {
	834	.Ijmpcall,
	835	.Elpmx,
	836	.Movw,
	837	.Mul,
	838	.Sram,
	839	.Break,
	840	.Spm,
	841	.Elpm,
	842	.Lpmx,
	843	.Avr0,
	844	.Jmpcall,
	845	.Addsubiw,
	846	.Lpm,
	847	.Avr51,
	848	},
	849	CpuInfo(@This()).create(.Atmega1284rfr2, "atmega1284rfr2", &[_]FeatureType {
	850	.Ijmpcall,
	851	.Elpmx,
	852	.Movw,
	853	.Mul,
	854	.Sram,
	855	.Break,
	856	.Spm,
	857	.Elpm,
	858	.Lpmx,
	859	.Avr0,
	860	.Jmpcall,
	861	.Addsubiw,
	862	.Lpm,
	863	.Avr51,
	864	},
	865	CpuInfo(@This()).create(.Atmega128a, "atmega128a", &[_]FeatureType {
	866	.Ijmpcall,
	867	.Elpmx,
	868	.Movw,
	869	.Mul,
	870	.Sram,
	871	.Break,
	872	.Spm,
	873	.Elpm,
	874	.Lpmx,
	875	.Avr0,
	876	.Jmpcall,
	877	.Addsubiw,
	878	.Lpm,
	879	.Avr51,
	880	},
	881	CpuInfo(@This()).create(.Atmega128rfa1, "atmega128rfa1", &[_]FeatureType {
	882	.Ijmpcall,
	883	.Elpmx,
	884	.Movw,
	885	.Mul,
	886	.Sram,
	887	.Break,
	888	.Spm,
	889	.Elpm,
	890	.Lpmx,
	891	.Avr0,
	892	.Jmpcall,
	893	.Addsubiw,
	894	.Lpm,
	895	.Avr51,
	896	},
	897	CpuInfo(@This()).create(.Atmega128rfr2, "atmega128rfr2", &[_]FeatureType {
	898	.Ijmpcall,
	899	.Elpmx,
	900	.Movw,
	901	.Mul,
	902	.Sram,
	903	.Break,
	904	.Spm,
	905	.Elpm,
	906	.Lpmx,
	907	.Avr0,
	908	.Jmpcall,
	909	.Addsubiw,
	910	.Lpm,
	911	.Avr51,
	912	},
	913	CpuInfo(@This()).create(.Atmega16, "atmega16", &[_]FeatureType {
	914	.Ijmpcall,
	915	.Movw,
	916	.Mul,
	917	.Sram,
	918	.Break,
	919	.Spm,
	920	.Lpmx,
	921	.Avr0,
	922	.Jmpcall,
	923	.Addsubiw,
	924	.Lpm,
	925	.Avr5,
	926	},
	927	CpuInfo(@This()).create(.Atmega161, "atmega161", &[_]FeatureType {
	928	.Ijmpcall,
	929	.Sram,
	930	.Avr0,
	931	.Jmpcall,
	932	.Addsubiw,
	933	.Lpm,
	934	.Avr3,
	935	.Lpmx,
	936	.Movw,
	937	.Mul,
	938	.Spm,
	939	},
	940	CpuInfo(@This()).create(.Atmega162, "atmega162", &[_]FeatureType {
	941	.Ijmpcall,
	942	.Movw,
	943	.Mul,
	944	.Sram,
	945	.Break,
	946	.Spm,
	947	.Lpmx,
	948	.Avr0,
	949	.Jmpcall,
	950	.Addsubiw,
	951	.Lpm,
	952	.Avr5,
	953	},
	954	CpuInfo(@This()).create(.Atmega163, "atmega163", &[_]FeatureType {
	955	.Ijmpcall,
	956	.Sram,
	957	.Avr0,
	958	.Jmpcall,
	959	.Addsubiw,
	960	.Lpm,
	961	.Avr3,
	962	.Lpmx,
	963	.Movw,
	964	.Mul,
	965	.Spm,
	966	},
	967	CpuInfo(@This()).create(.Atmega164a, "atmega164a", &[_]FeatureType {
	968	.Ijmpcall,
	969	.Movw,
	970	.Mul,
	971	.Sram,
	972	.Break,
	973	.Spm,
	974	.Lpmx,
	975	.Avr0,
	976	.Jmpcall,
	977	.Addsubiw,
	978	.Lpm,
	979	.Avr5,
	980	},
	981	CpuInfo(@This()).create(.Atmega164p, "atmega164p", &[_]FeatureType {
	982	.Ijmpcall,
	983	.Movw,
	984	.Mul,
	985	.Sram,
	986	.Break,
	987	.Spm,
	988	.Lpmx,
	989	.Avr0,
	990	.Jmpcall,
	991	.Addsubiw,
	992	.Lpm,
	993	.Avr5,
	994	},
	995	CpuInfo(@This()).create(.Atmega164pa, "atmega164pa", &[_]FeatureType {
	996	.Ijmpcall,
	997	.Movw,
	998	.Mul,
	999	.Sram,
	1000	.Break,
	1001	.Spm,
	1002	.Lpmx,
	1003	.Avr0,
	1004	.Jmpcall,
	1005	.Addsubiw,
	1006	.Lpm,
	1007	.Avr5,
	1008	},
	1009	CpuInfo(@This()).create(.Atmega165, "atmega165", &[_]FeatureType {
	1010	.Ijmpcall,
	1011	.Movw,
	1012	.Mul,
	1013	.Sram,
	1014	.Break,
	1015	.Spm,
	1016	.Lpmx,
	1017	.Avr0,
	1018	.Jmpcall,
	1019	.Addsubiw,
	1020	.Lpm,
	1021	.Avr5,
	1022	},
	1023	CpuInfo(@This()).create(.Atmega165a, "atmega165a", &[_]FeatureType {
	1024	.Ijmpcall,
	1025	.Movw,
	1026	.Mul,
	1027	.Sram,
	1028	.Break,
	1029	.Spm,
	1030	.Lpmx,
	1031	.Avr0,
	1032	.Jmpcall,
	1033	.Addsubiw,
	1034	.Lpm,
	1035	.Avr5,
	1036	},
	1037	CpuInfo(@This()).create(.Atmega165p, "atmega165p", &[_]FeatureType {
	1038	.Ijmpcall,
	1039	.Movw,
	1040	.Mul,
	1041	.Sram,
	1042	.Break,
	1043	.Spm,
	1044	.Lpmx,
	1045	.Avr0,
	1046	.Jmpcall,
	1047	.Addsubiw,
	1048	.Lpm,
	1049	.Avr5,
	1050	},
	1051	CpuInfo(@This()).create(.Atmega165pa, "atmega165pa", &[_]FeatureType {
	1052	.Ijmpcall,
	1053	.Movw,
	1054	.Mul,
	1055	.Sram,
	1056	.Break,
	1057	.Spm,
	1058	.Lpmx,
	1059	.Avr0,
	1060	.Jmpcall,
	1061	.Addsubiw,
	1062	.Lpm,
	1063	.Avr5,
	1064	},
	1065	CpuInfo(@This()).create(.Atmega168, "atmega168", &[_]FeatureType {
	1066	.Ijmpcall,
	1067	.Movw,
	1068	.Mul,
	1069	.Sram,
	1070	.Break,
	1071	.Spm,
	1072	.Lpmx,
	1073	.Avr0,
	1074	.Jmpcall,
	1075	.Addsubiw,
	1076	.Lpm,
	1077	.Avr5,
	1078	},
	1079	CpuInfo(@This()).create(.Atmega168a, "atmega168a", &[_]FeatureType {
	1080	.Ijmpcall,
	1081	.Movw,
	1082	.Mul,
	1083	.Sram,
	1084	.Break,
	1085	.Spm,
	1086	.Lpmx,
	1087	.Avr0,
	1088	.Jmpcall,
	1089	.Addsubiw,
	1090	.Lpm,
	1091	.Avr5,
	1092	},
	1093	CpuInfo(@This()).create(.Atmega168p, "atmega168p", &[_]FeatureType {
	1094	.Ijmpcall,
	1095	.Movw,
	1096	.Mul,
	1097	.Sram,
	1098	.Break,
	1099	.Spm,
	1100	.Lpmx,
	1101	.Avr0,
	1102	.Jmpcall,
	1103	.Addsubiw,
	1104	.Lpm,
	1105	.Avr5,
	1106	},
	1107	CpuInfo(@This()).create(.Atmega168pa, "atmega168pa", &[_]FeatureType {
	1108	.Ijmpcall,
	1109	.Movw,
	1110	.Mul,
	1111	.Sram,
	1112	.Break,
	1113	.Spm,
	1114	.Lpmx,
	1115	.Avr0,
	1116	.Jmpcall,
	1117	.Addsubiw,
	1118	.Lpm,
	1119	.Avr5,
	1120	},
	1121	CpuInfo(@This()).create(.Atmega169, "atmega169", &[_]FeatureType {
	1122	.Ijmpcall,
	1123	.Movw,
	1124	.Mul,
	1125	.Sram,
	1126	.Break,
	1127	.Spm,
	1128	.Lpmx,
	1129	.Avr0,
	1130	.Jmpcall,
	1131	.Addsubiw,
	1132	.Lpm,
	1133	.Avr5,
	1134	},
	1135	CpuInfo(@This()).create(.Atmega169a, "atmega169a", &[_]FeatureType {
	1136	.Ijmpcall,
	1137	.Movw,
	1138	.Mul,
	1139	.Sram,
	1140	.Break,
	1141	.Spm,
	1142	.Lpmx,
	1143	.Avr0,
	1144	.Jmpcall,
	1145	.Addsubiw,
	1146	.Lpm,
	1147	.Avr5,
	1148	},
	1149	CpuInfo(@This()).create(.Atmega169p, "atmega169p", &[_]FeatureType {
	1150	.Ijmpcall,
	1151	.Movw,
	1152	.Mul,
	1153	.Sram,
	1154	.Break,
	1155	.Spm,
	1156	.Lpmx,
	1157	.Avr0,
	1158	.Jmpcall,
	1159	.Addsubiw,
	1160	.Lpm,
	1161	.Avr5,
	1162	},
	1163	CpuInfo(@This()).create(.Atmega169pa, "atmega169pa", &[_]FeatureType {
	1164	.Ijmpcall,
	1165	.Movw,
	1166	.Mul,
	1167	.Sram,
	1168	.Break,
	1169	.Spm,
	1170	.Lpmx,
	1171	.Avr0,
	1172	.Jmpcall,
	1173	.Addsubiw,
	1174	.Lpm,
	1175	.Avr5,
	1176	},
	1177	CpuInfo(@This()).create(.Atmega16a, "atmega16a", &[_]FeatureType {
	1178	.Ijmpcall,
	1179	.Movw,
	1180	.Mul,
	1181	.Sram,
	1182	.Break,
	1183	.Spm,
	1184	.Lpmx,
	1185	.Avr0,
	1186	.Jmpcall,
	1187	.Addsubiw,
	1188	.Lpm,
	1189	.Avr5,
	1190	},
	1191	CpuInfo(@This()).create(.Atmega16hva, "atmega16hva", &[_]FeatureType {
	1192	.Ijmpcall,
	1193	.Movw,
	1194	.Mul,
	1195	.Sram,
	1196	.Break,
	1197	.Spm,
	1198	.Lpmx,
	1199	.Avr0,
	1200	.Jmpcall,
	1201	.Addsubiw,
	1202	.Lpm,
	1203	.Avr5,
	1204	},
	1205	CpuInfo(@This()).create(.Atmega16hva2, "atmega16hva2", &[_]FeatureType {
	1206	.Ijmpcall,
	1207	.Movw,
	1208	.Mul,
	1209	.Sram,
	1210	.Break,
	1211	.Spm,
	1212	.Lpmx,
	1213	.Avr0,
	1214	.Jmpcall,
	1215	.Addsubiw,
	1216	.Lpm,
	1217	.Avr5,
	1218	},
	1219	CpuInfo(@This()).create(.Atmega16hvb, "atmega16hvb", &[_]FeatureType {
	1220	.Ijmpcall,
	1221	.Movw,
	1222	.Mul,
	1223	.Sram,
	1224	.Break,
	1225	.Spm,
	1226	.Lpmx,
	1227	.Avr0,
	1228	.Jmpcall,
	1229	.Addsubiw,
	1230	.Lpm,
	1231	.Avr5,
	1232	},
	1233	CpuInfo(@This()).create(.Atmega16hvbrevb, "atmega16hvbrevb", &[_]FeatureType {
	1234	.Ijmpcall,
	1235	.Movw,
	1236	.Mul,
	1237	.Sram,
	1238	.Break,
	1239	.Spm,
	1240	.Lpmx,
	1241	.Avr0,
	1242	.Jmpcall,
	1243	.Addsubiw,
	1244	.Lpm,
	1245	.Avr5,
	1246	},
	1247	CpuInfo(@This()).create(.Atmega16m1, "atmega16m1", &[_]FeatureType {
	1248	.Ijmpcall,
	1249	.Movw,
	1250	.Mul,
	1251	.Sram,
	1252	.Break,
	1253	.Spm,
	1254	.Lpmx,
	1255	.Avr0,
	1256	.Jmpcall,
	1257	.Addsubiw,
	1258	.Lpm,
	1259	.Avr5,
	1260	},
	1261	CpuInfo(@This()).create(.Atmega16u2, "atmega16u2", &[_]FeatureType {
	1262	.Ijmpcall,
	1263	.Movw,
	1264	.Sram,
	1265	.Break,
	1266	.Spm,
	1267	.Lpmx,
	1268	.Avr0,
	1269	.Jmpcall,
	1270	.Addsubiw,
	1271	.Lpm,
	1272	.Avr35,
	1273	},
	1274	CpuInfo(@This()).create(.Atmega16u4, "atmega16u4", &[_]FeatureType {
	1275	.Ijmpcall,
	1276	.Movw,
	1277	.Mul,
	1278	.Sram,
	1279	.Break,
	1280	.Spm,
	1281	.Lpmx,
	1282	.Avr0,
	1283	.Jmpcall,
	1284	.Addsubiw,
	1285	.Lpm,
	1286	.Avr5,
	1287	},
	1288	CpuInfo(@This()).create(.Atmega2560, "atmega2560", &[_]FeatureType {
	1289	.Ijmpcall,
	1290	.Elpmx,
	1291	.Movw,
	1292	.Mul,
	1293	.Sram,
	1294	.Break,
	1295	.Spm,
	1296	.Elpm,
	1297	.Lpmx,
	1298	.Avr0,
	1299	.Jmpcall,
	1300	.Addsubiw,
	1301	.Lpm,
	1302	.Avr6,
	1303	},
	1304	CpuInfo(@This()).create(.Atmega2561, "atmega2561", &[_]FeatureType {
	1305	.Ijmpcall,
	1306	.Elpmx,
	1307	.Movw,
	1308	.Mul,
	1309	.Sram,
	1310	.Break,
	1311	.Spm,
	1312	.Elpm,
	1313	.Lpmx,
	1314	.Avr0,
	1315	.Jmpcall,
	1316	.Addsubiw,
	1317	.Lpm,
	1318	.Avr6,
	1319	},
	1320	CpuInfo(@This()).create(.Atmega2564rfr2, "atmega2564rfr2", &[_]FeatureType {
	1321	.Ijmpcall,
	1322	.Elpmx,
	1323	.Movw,
	1324	.Mul,
	1325	.Sram,
	1326	.Break,
	1327	.Spm,
	1328	.Elpm,
	1329	.Lpmx,
	1330	.Avr0,
	1331	.Jmpcall,
	1332	.Addsubiw,
	1333	.Lpm,
	1334	.Avr6,
	1335	},
	1336	CpuInfo(@This()).create(.Atmega256rfr2, "atmega256rfr2", &[_]FeatureType {
	1337	.Ijmpcall,
	1338	.Elpmx,
	1339	.Movw,
	1340	.Mul,
	1341	.Sram,
	1342	.Break,
	1343	.Spm,
	1344	.Elpm,
	1345	.Lpmx,
	1346	.Avr0,
	1347	.Jmpcall,
	1348	.Addsubiw,
	1349	.Lpm,
	1350	.Avr6,
	1351	},
	1352	CpuInfo(@This()).create(.Atmega32, "atmega32", &[_]FeatureType {
	1353	.Ijmpcall,
	1354	.Movw,
	1355	.Mul,
	1356	.Sram,
	1357	.Break,
	1358	.Spm,
	1359	.Lpmx,
	1360	.Avr0,
	1361	.Jmpcall,
	1362	.Addsubiw,
	1363	.Lpm,
	1364	.Avr5,
	1365	},
	1366	CpuInfo(@This()).create(.Atmega323, "atmega323", &[_]FeatureType {
	1367	.Ijmpcall,
	1368	.Movw,
	1369	.Mul,
	1370	.Sram,
	1371	.Break,
	1372	.Spm,
	1373	.Lpmx,
	1374	.Avr0,
	1375	.Jmpcall,
	1376	.Addsubiw,
	1377	.Lpm,
	1378	.Avr5,
	1379	},
	1380	CpuInfo(@This()).create(.Atmega324a, "atmega324a", &[_]FeatureType {
	1381	.Ijmpcall,
	1382	.Movw,
	1383	.Mul,
	1384	.Sram,
	1385	.Break,
	1386	.Spm,
	1387	.Lpmx,
	1388	.Avr0,
	1389	.Jmpcall,
	1390	.Addsubiw,
	1391	.Lpm,
	1392	.Avr5,
	1393	},
	1394	CpuInfo(@This()).create(.Atmega324p, "atmega324p", &[_]FeatureType {
	1395	.Ijmpcall,
	1396	.Movw,
	1397	.Mul,
	1398	.Sram,
	1399	.Break,
	1400	.Spm,
	1401	.Lpmx,
	1402	.Avr0,
	1403	.Jmpcall,
	1404	.Addsubiw,
	1405	.Lpm,
	1406	.Avr5,
	1407	},
	1408	CpuInfo(@This()).create(.Atmega324pa, "atmega324pa", &[_]FeatureType {
	1409	.Ijmpcall,
	1410	.Movw,
	1411	.Mul,
	1412	.Sram,
	1413	.Break,
	1414	.Spm,
	1415	.Lpmx,
	1416	.Avr0,
	1417	.Jmpcall,
	1418	.Addsubiw,
	1419	.Lpm,
	1420	.Avr5,
	1421	},
	1422	CpuInfo(@This()).create(.Atmega325, "atmega325", &[_]FeatureType {
	1423	.Ijmpcall,
	1424	.Movw,
	1425	.Mul,
	1426	.Sram,
	1427	.Break,
	1428	.Spm,
	1429	.Lpmx,
	1430	.Avr0,
	1431	.Jmpcall,
	1432	.Addsubiw,
	1433	.Lpm,
	1434	.Avr5,
	1435	},
	1436	CpuInfo(@This()).create(.Atmega3250, "atmega3250", &[_]FeatureType {
	1437	.Ijmpcall,
	1438	.Movw,
	1439	.Mul,
	1440	.Sram,
	1441	.Break,
	1442	.Spm,
	1443	.Lpmx,
	1444	.Avr0,
	1445	.Jmpcall,
	1446	.Addsubiw,
	1447	.Lpm,
	1448	.Avr5,
	1449	},
	1450	CpuInfo(@This()).create(.Atmega3250a, "atmega3250a", &[_]FeatureType {
	1451	.Ijmpcall,
	1452	.Movw,
	1453	.Mul,
	1454	.Sram,
	1455	.Break,
	1456	.Spm,
	1457	.Lpmx,
	1458	.Avr0,
	1459	.Jmpcall,
	1460	.Addsubiw,
	1461	.Lpm,
	1462	.Avr5,
	1463	},
	1464	CpuInfo(@This()).create(.Atmega3250p, "atmega3250p", &[_]FeatureType {
	1465	.Ijmpcall,
	1466	.Movw,
	1467	.Mul,
	1468	.Sram,
	1469	.Break,
	1470	.Spm,
	1471	.Lpmx,
	1472	.Avr0,
	1473	.Jmpcall,
	1474	.Addsubiw,
	1475	.Lpm,
	1476	.Avr5,
	1477	},
	1478	CpuInfo(@This()).create(.Atmega3250pa, "atmega3250pa", &[_]FeatureType {
	1479	.Ijmpcall,
	1480	.Movw,
	1481	.Mul,
	1482	.Sram,
	1483	.Break,
	1484	.Spm,
	1485	.Lpmx,
	1486	.Avr0,
	1487	.Jmpcall,
	1488	.Addsubiw,
	1489	.Lpm,
	1490	.Avr5,
	1491	},
	1492	CpuInfo(@This()).create(.Atmega325a, "atmega325a", &[_]FeatureType {
	1493	.Ijmpcall,
	1494	.Movw,
	1495	.Mul,
	1496	.Sram,
	1497	.Break,
	1498	.Spm,
	1499	.Lpmx,
	1500	.Avr0,
	1501	.Jmpcall,
	1502	.Addsubiw,
	1503	.Lpm,
	1504	.Avr5,
	1505	},
	1506	CpuInfo(@This()).create(.Atmega325p, "atmega325p", &[_]FeatureType {
	1507	.Ijmpcall,
	1508	.Movw,
	1509	.Mul,
	1510	.Sram,
	1511	.Break,
	1512	.Spm,
	1513	.Lpmx,
	1514	.Avr0,
	1515	.Jmpcall,
	1516	.Addsubiw,
	1517	.Lpm,
	1518	.Avr5,
	1519	},
	1520	CpuInfo(@This()).create(.Atmega325pa, "atmega325pa", &[_]FeatureType {
	1521	.Ijmpcall,
	1522	.Movw,
	1523	.Mul,
	1524	.Sram,
	1525	.Break,
	1526	.Spm,
	1527	.Lpmx,
	1528	.Avr0,
	1529	.Jmpcall,
	1530	.Addsubiw,
	1531	.Lpm,
	1532	.Avr5,
	1533	},
	1534	CpuInfo(@This()).create(.Atmega328, "atmega328", &[_]FeatureType {
	1535	.Ijmpcall,
	1536	.Movw,
	1537	.Mul,
	1538	.Sram,
	1539	.Break,
	1540	.Spm,
	1541	.Lpmx,
	1542	.Avr0,
	1543	.Jmpcall,
	1544	.Addsubiw,
	1545	.Lpm,
	1546	.Avr5,
	1547	},
	1548	CpuInfo(@This()).create(.Atmega328p, "atmega328p", &[_]FeatureType {
	1549	.Ijmpcall,
	1550	.Movw,
	1551	.Mul,
	1552	.Sram,
	1553	.Break,
	1554	.Spm,
	1555	.Lpmx,
	1556	.Avr0,
	1557	.Jmpcall,
	1558	.Addsubiw,
	1559	.Lpm,
	1560	.Avr5,
	1561	},
	1562	CpuInfo(@This()).create(.Atmega329, "atmega329", &[_]FeatureType {
	1563	.Ijmpcall,
	1564	.Movw,
	1565	.Mul,
	1566	.Sram,
	1567	.Break,
	1568	.Spm,
	1569	.Lpmx,
	1570	.Avr0,
	1571	.Jmpcall,
	1572	.Addsubiw,
	1573	.Lpm,
	1574	.Avr5,
	1575	},
	1576	CpuInfo(@This()).create(.Atmega3290, "atmega3290", &[_]FeatureType {
	1577	.Ijmpcall,
	1578	.Movw,
	1579	.Mul,
	1580	.Sram,
	1581	.Break,
	1582	.Spm,
	1583	.Lpmx,
	1584	.Avr0,
	1585	.Jmpcall,
	1586	.Addsubiw,
	1587	.Lpm,
	1588	.Avr5,
	1589	},
	1590	CpuInfo(@This()).create(.Atmega3290a, "atmega3290a", &[_]FeatureType {
	1591	.Ijmpcall,
	1592	.Movw,
	1593	.Mul,
	1594	.Sram,
	1595	.Break,
	1596	.Spm,
	1597	.Lpmx,
	1598	.Avr0,
	1599	.Jmpcall,
	1600	.Addsubiw,
	1601	.Lpm,
	1602	.Avr5,
	1603	},
	1604	CpuInfo(@This()).create(.Atmega3290p, "atmega3290p", &[_]FeatureType {
	1605	.Ijmpcall,
	1606	.Movw,
	1607	.Mul,
	1608	.Sram,
	1609	.Break,
	1610	.Spm,
	1611	.Lpmx,
	1612	.Avr0,
	1613	.Jmpcall,
	1614	.Addsubiw,
	1615	.Lpm,
	1616	.Avr5,
	1617	},
	1618	CpuInfo(@This()).create(.Atmega3290pa, "atmega3290pa", &[_]FeatureType {
	1619	.Ijmpcall,
	1620	.Movw,
	1621	.Mul,
	1622	.Sram,
	1623	.Break,
	1624	.Spm,
	1625	.Lpmx,
	1626	.Avr0,
	1627	.Jmpcall,
	1628	.Addsubiw,
	1629	.Lpm,
	1630	.Avr5,
	1631	},
	1632	CpuInfo(@This()).create(.Atmega329a, "atmega329a", &[_]FeatureType {
	1633	.Ijmpcall,
	1634	.Movw,
	1635	.Mul,
	1636	.Sram,
	1637	.Break,
	1638	.Spm,
	1639	.Lpmx,
	1640	.Avr0,
	1641	.Jmpcall,
	1642	.Addsubiw,
	1643	.Lpm,
	1644	.Avr5,
	1645	},
	1646	CpuInfo(@This()).create(.Atmega329p, "atmega329p", &[_]FeatureType {
	1647	.Ijmpcall,
	1648	.Movw,
	1649	.Mul,
	1650	.Sram,
	1651	.Break,
	1652	.Spm,
	1653	.Lpmx,
	1654	.Avr0,
	1655	.Jmpcall,
	1656	.Addsubiw,
	1657	.Lpm,
	1658	.Avr5,
	1659	},
	1660	CpuInfo(@This()).create(.Atmega329pa, "atmega329pa", &[_]FeatureType {
	1661	.Ijmpcall,
	1662	.Movw,
	1663	.Mul,
	1664	.Sram,
	1665	.Break,
	1666	.Spm,
	1667	.Lpmx,
	1668	.Avr0,
	1669	.Jmpcall,
	1670	.Addsubiw,
	1671	.Lpm,
	1672	.Avr5,
	1673	},
	1674	CpuInfo(@This()).create(.Atmega32a, "atmega32a", &[_]FeatureType {
	1675	.Ijmpcall,
	1676	.Movw,
	1677	.Mul,
	1678	.Sram,
	1679	.Break,
	1680	.Spm,
	1681	.Lpmx,
	1682	.Avr0,
	1683	.Jmpcall,
	1684	.Addsubiw,
	1685	.Lpm,
	1686	.Avr5,
	1687	},
	1688	CpuInfo(@This()).create(.Atmega32c1, "atmega32c1", &[_]FeatureType {
	1689	.Ijmpcall,
	1690	.Movw,
	1691	.Mul,
	1692	.Sram,
	1693	.Break,
	1694	.Spm,
	1695	.Lpmx,
	1696	.Avr0,
	1697	.Jmpcall,
	1698	.Addsubiw,
	1699	.Lpm,
	1700	.Avr5,
	1701	},
	1702	CpuInfo(@This()).create(.Atmega32hvb, "atmega32hvb", &[_]FeatureType {
	1703	.Ijmpcall,
	1704	.Movw,
	1705	.Mul,
	1706	.Sram,
	1707	.Break,
	1708	.Spm,
	1709	.Lpmx,
	1710	.Avr0,
	1711	.Jmpcall,
	1712	.Addsubiw,
	1713	.Lpm,
	1714	.Avr5,
	1715	},
	1716	CpuInfo(@This()).create(.Atmega32hvbrevb, "atmega32hvbrevb", &[_]FeatureType {
	1717	.Ijmpcall,
	1718	.Movw,
	1719	.Mul,
	1720	.Sram,
	1721	.Break,
	1722	.Spm,
	1723	.Lpmx,
	1724	.Avr0,
	1725	.Jmpcall,
	1726	.Addsubiw,
	1727	.Lpm,
	1728	.Avr5,
	1729	},
	1730	CpuInfo(@This()).create(.Atmega32m1, "atmega32m1", &[_]FeatureType {
	1731	.Ijmpcall,
	1732	.Movw,
	1733	.Mul,
	1734	.Sram,
	1735	.Break,
	1736	.Spm,
	1737	.Lpmx,
	1738	.Avr0,
	1739	.Jmpcall,
	1740	.Addsubiw,
	1741	.Lpm,
	1742	.Avr5,
	1743	},
	1744	CpuInfo(@This()).create(.Atmega32u2, "atmega32u2", &[_]FeatureType {
	1745	.Ijmpcall,
	1746	.Movw,
	1747	.Sram,
	1748	.Break,
	1749	.Spm,
	1750	.Lpmx,
	1751	.Avr0,
	1752	.Jmpcall,
	1753	.Addsubiw,
	1754	.Lpm,
	1755	.Avr35,
	1756	},
	1757	CpuInfo(@This()).create(.Atmega32u4, "atmega32u4", &[_]FeatureType {
	1758	.Ijmpcall,
	1759	.Movw,
	1760	.Mul,
	1761	.Sram,
	1762	.Break,
	1763	.Spm,
	1764	.Lpmx,
	1765	.Avr0,
	1766	.Jmpcall,
	1767	.Addsubiw,
	1768	.Lpm,
	1769	.Avr5,
	1770	},
	1771	CpuInfo(@This()).create(.Atmega32u6, "atmega32u6", &[_]FeatureType {
	1772	.Ijmpcall,
	1773	.Movw,
	1774	.Mul,
	1775	.Sram,
	1776	.Break,
	1777	.Spm,
	1778	.Lpmx,
	1779	.Avr0,
	1780	.Jmpcall,
	1781	.Addsubiw,
	1782	.Lpm,
	1783	.Avr5,
	1784	},
	1785	CpuInfo(@This()).create(.Atmega406, "atmega406", &[_]FeatureType {
	1786	.Ijmpcall,
	1787	.Movw,
	1788	.Mul,
	1789	.Sram,
	1790	.Break,
	1791	.Spm,
	1792	.Lpmx,
	1793	.Avr0,
	1794	.Jmpcall,
	1795	.Addsubiw,
	1796	.Lpm,
	1797	.Avr5,
	1798	},
	1799	CpuInfo(@This()).create(.Atmega48, "atmega48", &[_]FeatureType {
	1800	.Ijmpcall,
	1801	.Movw,
	1802	.Mul,
	1803	.Sram,
	1804	.Break,
	1805	.Spm,
	1806	.Lpmx,
	1807	.Avr0,
	1808	.Addsubiw,
	1809	.Lpm,
	1810	.Avr4,
	1811	},
	1812	CpuInfo(@This()).create(.Atmega48a, "atmega48a", &[_]FeatureType {
	1813	.Ijmpcall,
	1814	.Movw,
	1815	.Mul,
	1816	.Sram,
	1817	.Break,
	1818	.Spm,
	1819	.Lpmx,
	1820	.Avr0,
	1821	.Addsubiw,
	1822	.Lpm,
	1823	.Avr4,
	1824	},
	1825	CpuInfo(@This()).create(.Atmega48p, "atmega48p", &[_]FeatureType {
	1826	.Ijmpcall,
	1827	.Movw,
	1828	.Mul,
	1829	.Sram,
	1830	.Break,
	1831	.Spm,
	1832	.Lpmx,
	1833	.Avr0,
	1834	.Addsubiw,
	1835	.Lpm,
	1836	.Avr4,
	1837	},
	1838	CpuInfo(@This()).create(.Atmega48pa, "atmega48pa", &[_]FeatureType {
	1839	.Ijmpcall,
	1840	.Movw,
	1841	.Mul,
	1842	.Sram,
	1843	.Break,
	1844	.Spm,
	1845	.Lpmx,
	1846	.Avr0,
	1847	.Addsubiw,
	1848	.Lpm,
	1849	.Avr4,
	1850	},
	1851	CpuInfo(@This()).create(.Atmega64, "atmega64", &[_]FeatureType {
	1852	.Ijmpcall,
	1853	.Movw,
	1854	.Mul,
	1855	.Sram,
	1856	.Break,
	1857	.Spm,
	1858	.Lpmx,
	1859	.Avr0,
	1860	.Jmpcall,
	1861	.Addsubiw,
	1862	.Lpm,
	1863	.Avr5,
	1864	},
	1865	CpuInfo(@This()).create(.Atmega640, "atmega640", &[_]FeatureType {
	1866	.Ijmpcall,
	1867	.Movw,
	1868	.Mul,
	1869	.Sram,
	1870	.Break,
	1871	.Spm,
	1872	.Lpmx,
	1873	.Avr0,
	1874	.Jmpcall,
	1875	.Addsubiw,
	1876	.Lpm,
	1877	.Avr5,
	1878	},
	1879	CpuInfo(@This()).create(.Atmega644, "atmega644", &[_]FeatureType {
	1880	.Ijmpcall,
	1881	.Movw,
	1882	.Mul,
	1883	.Sram,
	1884	.Break,
	1885	.Spm,
	1886	.Lpmx,
	1887	.Avr0,
	1888	.Jmpcall,
	1889	.Addsubiw,
	1890	.Lpm,
	1891	.Avr5,
	1892	},
	1893	CpuInfo(@This()).create(.Atmega644a, "atmega644a", &[_]FeatureType {
	1894	.Ijmpcall,
	1895	.Movw,
	1896	.Mul,
	1897	.Sram,
	1898	.Break,
	1899	.Spm,
	1900	.Lpmx,
	1901	.Avr0,
	1902	.Jmpcall,
	1903	.Addsubiw,
	1904	.Lpm,
	1905	.Avr5,
	1906	},
	1907	CpuInfo(@This()).create(.Atmega644p, "atmega644p", &[_]FeatureType {
	1908	.Ijmpcall,
	1909	.Movw,
	1910	.Mul,
	1911	.Sram,
	1912	.Break,
	1913	.Spm,
	1914	.Lpmx,
	1915	.Avr0,
	1916	.Jmpcall,
	1917	.Addsubiw,
	1918	.Lpm,
	1919	.Avr5,
	1920	},
	1921	CpuInfo(@This()).create(.Atmega644pa, "atmega644pa", &[_]FeatureType {
	1922	.Ijmpcall,
	1923	.Movw,
	1924	.Mul,
	1925	.Sram,
	1926	.Break,
	1927	.Spm,
	1928	.Lpmx,
	1929	.Avr0,
	1930	.Jmpcall,
	1931	.Addsubiw,
	1932	.Lpm,
	1933	.Avr5,
	1934	},
	1935	CpuInfo(@This()).create(.Atmega644rfr2, "atmega644rfr2", &[_]FeatureType {
	1936	.Ijmpcall,
	1937	.Movw,
	1938	.Mul,
	1939	.Sram,
	1940	.Break,
	1941	.Spm,
	1942	.Lpmx,
	1943	.Avr0,
	1944	.Jmpcall,
	1945	.Addsubiw,
	1946	.Lpm,
	1947	.Avr5,
	1948	},
	1949	CpuInfo(@This()).create(.Atmega645, "atmega645", &[_]FeatureType {
	1950	.Ijmpcall,
	1951	.Movw,
	1952	.Mul,
	1953	.Sram,
	1954	.Break,
	1955	.Spm,
	1956	.Lpmx,
	1957	.Avr0,
	1958	.Jmpcall,
	1959	.Addsubiw,
	1960	.Lpm,
	1961	.Avr5,
	1962	},
	1963	CpuInfo(@This()).create(.Atmega6450, "atmega6450", &[_]FeatureType {
	1964	.Ijmpcall,
	1965	.Movw,
	1966	.Mul,
	1967	.Sram,
	1968	.Break,
	1969	.Spm,
	1970	.Lpmx,
	1971	.Avr0,
	1972	.Jmpcall,
	1973	.Addsubiw,
	1974	.Lpm,
	1975	.Avr5,
	1976	},
	1977	CpuInfo(@This()).create(.Atmega6450a, "atmega6450a", &[_]FeatureType {
	1978	.Ijmpcall,
	1979	.Movw,
	1980	.Mul,
	1981	.Sram,
	1982	.Break,
	1983	.Spm,
	1984	.Lpmx,
	1985	.Avr0,
	1986	.Jmpcall,
	1987	.Addsubiw,
	1988	.Lpm,
	1989	.Avr5,
	1990	},
	1991	CpuInfo(@This()).create(.Atmega6450p, "atmega6450p", &[_]FeatureType {
	1992	.Ijmpcall,
	1993	.Movw,
	1994	.Mul,
	1995	.Sram,
	1996	.Break,
	1997	.Spm,
	1998	.Lpmx,
	1999	.Avr0,
	2000	.Jmpcall,
	2001	.Addsubiw,
	2002	.Lpm,
	2003	.Avr5,
	2004	},
	2005	CpuInfo(@This()).create(.Atmega645a, "atmega645a", &[_]FeatureType {
	2006	.Ijmpcall,
	2007	.Movw,
	2008	.Mul,
	2009	.Sram,
	2010	.Break,
	2011	.Spm,
	2012	.Lpmx,
	2013	.Avr0,
	2014	.Jmpcall,
	2015	.Addsubiw,
	2016	.Lpm,
	2017	.Avr5,
	2018	},
	2019	CpuInfo(@This()).create(.Atmega645p, "atmega645p", &[_]FeatureType {
	2020	.Ijmpcall,
	2021	.Movw,
	2022	.Mul,
	2023	.Sram,
	2024	.Break,
	2025	.Spm,
	2026	.Lpmx,
	2027	.Avr0,
	2028	.Jmpcall,
	2029	.Addsubiw,
	2030	.Lpm,
	2031	.Avr5,
	2032	},
	2033	CpuInfo(@This()).create(.Atmega649, "atmega649", &[_]FeatureType {
	2034	.Ijmpcall,
	2035	.Movw,
	2036	.Mul,
	2037	.Sram,
	2038	.Break,
	2039	.Spm,
	2040	.Lpmx,
	2041	.Avr0,
	2042	.Jmpcall,
	2043	.Addsubiw,
	2044	.Lpm,
	2045	.Avr5,
	2046	},
	2047	CpuInfo(@This()).create(.Atmega6490, "atmega6490", &[_]FeatureType {
	2048	.Ijmpcall,
	2049	.Movw,
	2050	.Mul,
	2051	.Sram,
	2052	.Break,
	2053	.Spm,
	2054	.Lpmx,
	2055	.Avr0,
	2056	.Jmpcall,
	2057	.Addsubiw,
	2058	.Lpm,
	2059	.Avr5,
	2060	},
	2061	CpuInfo(@This()).create(.Atmega6490a, "atmega6490a", &[_]FeatureType {
	2062	.Ijmpcall,
	2063	.Movw,
	2064	.Mul,
	2065	.Sram,
	2066	.Break,
	2067	.Spm,
	2068	.Lpmx,
	2069	.Avr0,
	2070	.Jmpcall,
	2071	.Addsubiw,
	2072	.Lpm,
	2073	.Avr5,
	2074	},
	2075	CpuInfo(@This()).create(.Atmega6490p, "atmega6490p", &[_]FeatureType {
	2076	.Ijmpcall,
	2077	.Movw,
	2078	.Mul,
	2079	.Sram,
	2080	.Break,
	2081	.Spm,
	2082	.Lpmx,
	2083	.Avr0,
	2084	.Jmpcall,
	2085	.Addsubiw,
	2086	.Lpm,
	2087	.Avr5,
	2088	},
	2089	CpuInfo(@This()).create(.Atmega649a, "atmega649a", &[_]FeatureType {
	2090	.Ijmpcall,
	2091	.Movw,
	2092	.Mul,
	2093	.Sram,
	2094	.Break,
	2095	.Spm,
	2096	.Lpmx,
	2097	.Avr0,
	2098	.Jmpcall,
	2099	.Addsubiw,
	2100	.Lpm,
	2101	.Avr5,
	2102	},
	2103	CpuInfo(@This()).create(.Atmega649p, "atmega649p", &[_]FeatureType {
	2104	.Ijmpcall,
	2105	.Movw,
	2106	.Mul,
	2107	.Sram,
	2108	.Break,
	2109	.Spm,
	2110	.Lpmx,
	2111	.Avr0,
	2112	.Jmpcall,
	2113	.Addsubiw,
	2114	.Lpm,
	2115	.Avr5,
	2116	},
	2117	CpuInfo(@This()).create(.Atmega64a, "atmega64a", &[_]FeatureType {
	2118	.Ijmpcall,
	2119	.Movw,
	2120	.Mul,
	2121	.Sram,
	2122	.Break,
	2123	.Spm,
	2124	.Lpmx,
	2125	.Avr0,
	2126	.Jmpcall,
	2127	.Addsubiw,
	2128	.Lpm,
	2129	.Avr5,
	2130	},
	2131	CpuInfo(@This()).create(.Atmega64c1, "atmega64c1", &[_]FeatureType {
	2132	.Ijmpcall,
	2133	.Movw,
	2134	.Mul,
	2135	.Sram,
	2136	.Break,
	2137	.Spm,
	2138	.Lpmx,
	2139	.Avr0,
	2140	.Jmpcall,
	2141	.Addsubiw,
	2142	.Lpm,
	2143	.Avr5,
	2144	},
	2145	CpuInfo(@This()).create(.Atmega64hve, "atmega64hve", &[_]FeatureType {
	2146	.Ijmpcall,
	2147	.Movw,
	2148	.Mul,
	2149	.Sram,
	2150	.Break,
	2151	.Spm,
	2152	.Lpmx,
	2153	.Avr0,
	2154	.Jmpcall,
	2155	.Addsubiw,
	2156	.Lpm,
	2157	.Avr5,
	2158	},
	2159	CpuInfo(@This()).create(.Atmega64m1, "atmega64m1", &[_]FeatureType {
	2160	.Ijmpcall,
	2161	.Movw,
	2162	.Mul,
	2163	.Sram,
	2164	.Break,
	2165	.Spm,
	2166	.Lpmx,
	2167	.Avr0,
	2168	.Jmpcall,
	2169	.Addsubiw,
	2170	.Lpm,
	2171	.Avr5,
	2172	},
	2173	CpuInfo(@This()).create(.Atmega64rfr2, "atmega64rfr2", &[_]FeatureType {
	2174	.Ijmpcall,
	2175	.Movw,
	2176	.Mul,
	2177	.Sram,
	2178	.Break,
	2179	.Spm,
	2180	.Lpmx,
	2181	.Avr0,
	2182	.Jmpcall,
	2183	.Addsubiw,
	2184	.Lpm,
	2185	.Avr5,
	2186	},
	2187	CpuInfo(@This()).create(.Atmega8, "atmega8", &[_]FeatureType {
	2188	.Ijmpcall,
	2189	.Movw,
	2190	.Mul,
	2191	.Sram,
	2192	.Break,
	2193	.Spm,
	2194	.Lpmx,
	2195	.Avr0,
	2196	.Addsubiw,
	2197	.Lpm,
	2198	.Avr4,
	2199	},
	2200	CpuInfo(@This()).create(.Atmega8515, "atmega8515", &[_]FeatureType {
	2201	.Ijmpcall,
	2202	.Sram,
	2203	.Avr0,
	2204	.Addsubiw,
	2205	.Lpm,
	2206	.Avr2,
	2207	.Lpmx,
	2208	.Movw,
	2209	.Mul,
	2210	.Spm,
	2211	},
	2212	CpuInfo(@This()).create(.Atmega8535, "atmega8535", &[_]FeatureType {
	2213	.Ijmpcall,
	2214	.Sram,
	2215	.Avr0,
	2216	.Addsubiw,
	2217	.Lpm,
	2218	.Avr2,
	2219	.Lpmx,
	2220	.Movw,
	2221	.Mul,
	2222	.Spm,
	2223	},
	2224	CpuInfo(@This()).create(.Atmega88, "atmega88", &[_]FeatureType {
	2225	.Ijmpcall,
	2226	.Movw,
	2227	.Mul,
	2228	.Sram,
	2229	.Break,
	2230	.Spm,
	2231	.Lpmx,
	2232	.Avr0,
	2233	.Addsubiw,
	2234	.Lpm,
	2235	.Avr4,
	2236	},
	2237	CpuInfo(@This()).create(.Atmega88a, "atmega88a", &[_]FeatureType {
	2238	.Ijmpcall,
	2239	.Movw,
	2240	.Mul,
	2241	.Sram,
	2242	.Break,
	2243	.Spm,
	2244	.Lpmx,
	2245	.Avr0,
	2246	.Addsubiw,
	2247	.Lpm,
	2248	.Avr4,
	2249	},
	2250	CpuInfo(@This()).create(.Atmega88p, "atmega88p", &[_]FeatureType {
	2251	.Ijmpcall,
	2252	.Movw,
	2253	.Mul,
	2254	.Sram,
	2255	.Break,
	2256	.Spm,
	2257	.Lpmx,
	2258	.Avr0,
	2259	.Addsubiw,
	2260	.Lpm,
	2261	.Avr4,
	2262	},
	2263	CpuInfo(@This()).create(.Atmega88pa, "atmega88pa", &[_]FeatureType {
	2264	.Ijmpcall,
	2265	.Movw,
	2266	.Mul,
	2267	.Sram,
	2268	.Break,
	2269	.Spm,
	2270	.Lpmx,
	2271	.Avr0,
	2272	.Addsubiw,
	2273	.Lpm,
	2274	.Avr4,
	2275	},
	2276	CpuInfo(@This()).create(.Atmega8a, "atmega8a", &[_]FeatureType {
	2277	.Ijmpcall,
	2278	.Movw,
	2279	.Mul,
	2280	.Sram,
	2281	.Break,
	2282	.Spm,
	2283	.Lpmx,
	2284	.Avr0,
	2285	.Addsubiw,
	2286	.Lpm,
	2287	.Avr4,
	2288	},
	2289	CpuInfo(@This()).create(.Atmega8hva, "atmega8hva", &[_]FeatureType {
	2290	.Ijmpcall,
	2291	.Movw,
	2292	.Mul,
	2293	.Sram,
	2294	.Break,
	2295	.Spm,
	2296	.Lpmx,
	2297	.Avr0,
	2298	.Addsubiw,
	2299	.Lpm,
	2300	.Avr4,
	2301	},
	2302	CpuInfo(@This()).create(.Atmega8u2, "atmega8u2", &[_]FeatureType {
	2303	.Ijmpcall,
	2304	.Movw,
	2305	.Sram,
	2306	.Break,
	2307	.Spm,
	2308	.Lpmx,
	2309	.Avr0,
	2310	.Jmpcall,
	2311	.Addsubiw,
	2312	.Lpm,
	2313	.Avr35,
	2314	},
	2315	CpuInfo(@This()).create(.Attiny10, "attiny10", &[_]FeatureType {
	2316	.Break,
	2317	.Tinyencoding,
	2318	.Avr0,
	2319	.Sram,
	2320	.Avrtiny,
	2321	},
	2322	CpuInfo(@This()).create(.Attiny102, "attiny102", &[_]FeatureType {
	2323	.Break,
	2324	.Tinyencoding,
	2325	.Avr0,
	2326	.Sram,
	2327	.Avrtiny,
	2328	},
	2329	CpuInfo(@This()).create(.Attiny104, "attiny104", &[_]FeatureType {
	2330	.Break,
	2331	.Tinyencoding,
	2332	.Avr0,
	2333	.Sram,
	2334	.Avrtiny,
	2335	},
	2336	CpuInfo(@This()).create(.Attiny11, "attiny11", &[_]FeatureType {
	2337	.Lpm,
	2338	.Avr0,
	2339	.Avr1,
	2340	},
	2341	CpuInfo(@This()).create(.Attiny12, "attiny12", &[_]FeatureType {
	2342	.Lpm,
	2343	.Avr0,
	2344	.Avr1,
	2345	},
	2346	CpuInfo(@This()).create(.Attiny13, "attiny13", &[_]FeatureType {
	2347	.Ijmpcall,
	2348	.Movw,
	2349	.Sram,
	2350	.Break,
	2351	.Spm,
	2352	.Lpmx,
	2353	.Avr0,
	2354	.Addsubiw,
	2355	.Lpm,
	2356	.Avr25,
	2357	},
	2358	CpuInfo(@This()).create(.Attiny13a, "attiny13a", &[_]FeatureType {
	2359	.Ijmpcall,
	2360	.Movw,
	2361	.Sram,
	2362	.Break,
	2363	.Spm,
	2364	.Lpmx,
	2365	.Avr0,
	2366	.Addsubiw,
	2367	.Lpm,
	2368	.Avr25,
	2369	},
	2370	CpuInfo(@This()).create(.Attiny15, "attiny15", &[_]FeatureType {
	2371	.Lpm,
	2372	.Avr0,
	2373	.Avr1,
	2374	},
	2375	CpuInfo(@This()).create(.Attiny1634, "attiny1634", &[_]FeatureType {
	2376	.Ijmpcall,
	2377	.Movw,
	2378	.Sram,
	2379	.Break,
	2380	.Spm,
	2381	.Lpmx,
	2382	.Avr0,
	2383	.Jmpcall,
	2384	.Addsubiw,
	2385	.Lpm,
	2386	.Avr35,
	2387	},
	2388	CpuInfo(@This()).create(.Attiny167, "attiny167", &[_]FeatureType {
	2389	.Ijmpcall,
	2390	.Movw,
	2391	.Sram,
	2392	.Break,
	2393	.Spm,
	2394	.Lpmx,
	2395	.Avr0,
	2396	.Jmpcall,
	2397	.Addsubiw,
	2398	.Lpm,
	2399	.Avr35,
	2400	},
	2401	CpuInfo(@This()).create(.Attiny20, "attiny20", &[_]FeatureType {
	2402	.Break,
	2403	.Tinyencoding,
	2404	.Avr0,
	2405	.Sram,
	2406	.Avrtiny,
	2407	},
	2408	CpuInfo(@This()).create(.Attiny22, "attiny22", &[_]FeatureType {
	2409	.Ijmpcall,
	2410	.Sram,
	2411	.Avr0,
	2412	.Addsubiw,
	2413	.Lpm,
	2414	.Avr2,
	2415	},
	2416	CpuInfo(@This()).create(.Attiny2313, "attiny2313", &[_]FeatureType {
	2417	.Ijmpcall,
	2418	.Movw,
	2419	.Sram,
	2420	.Break,
	2421	.Spm,
	2422	.Lpmx,
	2423	.Avr0,
	2424	.Addsubiw,
	2425	.Lpm,
	2426	.Avr25,
	2427	},
	2428	CpuInfo(@This()).create(.Attiny2313a, "attiny2313a", &[_]FeatureType {
	2429	.Ijmpcall,
	2430	.Movw,
	2431	.Sram,
	2432	.Break,
	2433	.Spm,
	2434	.Lpmx,
	2435	.Avr0,
	2436	.Addsubiw,
	2437	.Lpm,
	2438	.Avr25,
	2439	},
	2440	CpuInfo(@This()).create(.Attiny24, "attiny24", &[_]FeatureType {
	2441	.Ijmpcall,
	2442	.Movw,
	2443	.Sram,
	2444	.Break,
	2445	.Spm,
	2446	.Lpmx,
	2447	.Avr0,
	2448	.Addsubiw,
	2449	.Lpm,
	2450	.Avr25,
	2451	},
	2452	CpuInfo(@This()).create(.Attiny24a, "attiny24a", &[_]FeatureType {
	2453	.Ijmpcall,
	2454	.Movw,
	2455	.Sram,
	2456	.Break,
	2457	.Spm,
	2458	.Lpmx,
	2459	.Avr0,
	2460	.Addsubiw,
	2461	.Lpm,
	2462	.Avr25,
	2463	},
	2464	CpuInfo(@This()).create(.Attiny25, "attiny25", &[_]FeatureType {
	2465	.Ijmpcall,
	2466	.Movw,
	2467	.Sram,
	2468	.Break,
	2469	.Spm,
	2470	.Lpmx,
	2471	.Avr0,
	2472	.Addsubiw,
	2473	.Lpm,
	2474	.Avr25,
	2475	},
	2476	CpuInfo(@This()).create(.Attiny26, "attiny26", &[_]FeatureType {
	2477	.Ijmpcall,
	2478	.Sram,
	2479	.Avr0,
	2480	.Addsubiw,
	2481	.Lpm,
	2482	.Avr2,
	2483	.Lpmx,
	2484	},
	2485	CpuInfo(@This()).create(.Attiny261, "attiny261", &[_]FeatureType {
	2486	.Ijmpcall,
	2487	.Movw,
	2488	.Sram,
	2489	.Break,
	2490	.Spm,
	2491	.Lpmx,
	2492	.Avr0,
	2493	.Addsubiw,
	2494	.Lpm,
	2495	.Avr25,
	2496	},
	2497	CpuInfo(@This()).create(.Attiny261a, "attiny261a", &[_]FeatureType {
	2498	.Ijmpcall,
	2499	.Movw,
	2500	.Sram,
	2501	.Break,
	2502	.Spm,
	2503	.Lpmx,
	2504	.Avr0,
	2505	.Addsubiw,
	2506	.Lpm,
	2507	.Avr25,
	2508	},
	2509	CpuInfo(@This()).create(.Attiny28, "attiny28", &[_]FeatureType {
	2510	.Lpm,
	2511	.Avr0,
	2512	.Avr1,
	2513	},
	2514	CpuInfo(@This()).create(.Attiny4, "attiny4", &[_]FeatureType {
	2515	.Break,
	2516	.Tinyencoding,
	2517	.Avr0,
	2518	.Sram,
	2519	.Avrtiny,
	2520	},
	2521	CpuInfo(@This()).create(.Attiny40, "attiny40", &[_]FeatureType {
	2522	.Break,
	2523	.Tinyencoding,
	2524	.Avr0,
	2525	.Sram,
	2526	.Avrtiny,
	2527	},
	2528	CpuInfo(@This()).create(.Attiny4313, "attiny4313", &[_]FeatureType {
	2529	.Ijmpcall,
	2530	.Movw,
	2531	.Sram,
	2532	.Break,
	2533	.Spm,
	2534	.Lpmx,
	2535	.Avr0,
	2536	.Addsubiw,
	2537	.Lpm,
	2538	.Avr25,
	2539	},
	2540	CpuInfo(@This()).create(.Attiny43u, "attiny43u", &[_]FeatureType {
	2541	.Ijmpcall,
	2542	.Movw,
	2543	.Sram,
	2544	.Break,
	2545	.Spm,
	2546	.Lpmx,
	2547	.Avr0,
	2548	.Addsubiw,
	2549	.Lpm,
	2550	.Avr25,
	2551	},
	2552	CpuInfo(@This()).create(.Attiny44, "attiny44", &[_]FeatureType {
	2553	.Ijmpcall,
	2554	.Movw,
	2555	.Sram,
	2556	.Break,
	2557	.Spm,
	2558	.Lpmx,
	2559	.Avr0,
	2560	.Addsubiw,
	2561	.Lpm,
	2562	.Avr25,
	2563	},
	2564	CpuInfo(@This()).create(.Attiny44a, "attiny44a", &[_]FeatureType {
	2565	.Ijmpcall,
	2566	.Movw,
	2567	.Sram,
	2568	.Break,
	2569	.Spm,
	2570	.Lpmx,
	2571	.Avr0,
	2572	.Addsubiw,
	2573	.Lpm,
	2574	.Avr25,
	2575	},
	2576	CpuInfo(@This()).create(.Attiny45, "attiny45", &[_]FeatureType {
	2577	.Ijmpcall,
	2578	.Movw,
	2579	.Sram,
	2580	.Break,
	2581	.Spm,
	2582	.Lpmx,
	2583	.Avr0,
	2584	.Addsubiw,
	2585	.Lpm,
	2586	.Avr25,
	2587	},
	2588	CpuInfo(@This()).create(.Attiny461, "attiny461", &[_]FeatureType {
	2589	.Ijmpcall,
	2590	.Movw,
	2591	.Sram,
	2592	.Break,
	2593	.Spm,
	2594	.Lpmx,
	2595	.Avr0,
	2596	.Addsubiw,
	2597	.Lpm,
	2598	.Avr25,
	2599	},
	2600	CpuInfo(@This()).create(.Attiny461a, "attiny461a", &[_]FeatureType {
	2601	.Ijmpcall,
	2602	.Movw,
	2603	.Sram,
	2604	.Break,
	2605	.Spm,
	2606	.Lpmx,
	2607	.Avr0,
	2608	.Addsubiw,
	2609	.Lpm,
	2610	.Avr25,
	2611	},
	2612	CpuInfo(@This()).create(.Attiny48, "attiny48", &[_]FeatureType {
	2613	.Ijmpcall,
	2614	.Movw,
	2615	.Sram,
	2616	.Break,
	2617	.Spm,
	2618	.Lpmx,
	2619	.Avr0,
	2620	.Addsubiw,
	2621	.Lpm,
	2622	.Avr25,
	2623	},
	2624	CpuInfo(@This()).create(.Attiny5, "attiny5", &[_]FeatureType {
	2625	.Break,
	2626	.Tinyencoding,
	2627	.Avr0,
	2628	.Sram,
	2629	.Avrtiny,
	2630	},
	2631	CpuInfo(@This()).create(.Attiny828, "attiny828", &[_]FeatureType {
	2632	.Ijmpcall,
	2633	.Movw,
	2634	.Sram,
	2635	.Break,
	2636	.Spm,
	2637	.Lpmx,
	2638	.Avr0,
	2639	.Addsubiw,
	2640	.Lpm,
	2641	.Avr25,
	2642	},
	2643	CpuInfo(@This()).create(.Attiny84, "attiny84", &[_]FeatureType {
	2644	.Ijmpcall,
	2645	.Movw,
	2646	.Sram,
	2647	.Break,
	2648	.Spm,
	2649	.Lpmx,
	2650	.Avr0,
	2651	.Addsubiw,
	2652	.Lpm,
	2653	.Avr25,
	2654	},
	2655	CpuInfo(@This()).create(.Attiny84a, "attiny84a", &[_]FeatureType {
	2656	.Ijmpcall,
	2657	.Movw,
	2658	.Sram,
	2659	.Break,
	2660	.Spm,
	2661	.Lpmx,
	2662	.Avr0,
	2663	.Addsubiw,
	2664	.Lpm,
	2665	.Avr25,
	2666	},
	2667	CpuInfo(@This()).create(.Attiny85, "attiny85", &[_]FeatureType {
	2668	.Ijmpcall,
	2669	.Movw,
	2670	.Sram,
	2671	.Break,
	2672	.Spm,
	2673	.Lpmx,
	2674	.Avr0,
	2675	.Addsubiw,
	2676	.Lpm,
	2677	.Avr25,
	2678	},
	2679	CpuInfo(@This()).create(.Attiny861, "attiny861", &[_]FeatureType {
	2680	.Ijmpcall,
	2681	.Movw,
	2682	.Sram,
	2683	.Break,
	2684	.Spm,
	2685	.Lpmx,
	2686	.Avr0,
	2687	.Addsubiw,
	2688	.Lpm,
	2689	.Avr25,
	2690	},
	2691	CpuInfo(@This()).create(.Attiny861a, "attiny861a", &[_]FeatureType {
	2692	.Ijmpcall,
	2693	.Movw,
	2694	.Sram,
	2695	.Break,
	2696	.Spm,
	2697	.Lpmx,
	2698	.Avr0,
	2699	.Addsubiw,
	2700	.Lpm,
	2701	.Avr25,
	2702	},
	2703	CpuInfo(@This()).create(.Attiny87, "attiny87", &[_]FeatureType {
	2704	.Ijmpcall,
	2705	.Movw,
	2706	.Sram,
	2707	.Break,
	2708	.Spm,
	2709	.Lpmx,
	2710	.Avr0,
	2711	.Addsubiw,
	2712	.Lpm,
	2713	.Avr25,
	2714	},
	2715	CpuInfo(@This()).create(.Attiny88, "attiny88", &[_]FeatureType {
	2716	.Ijmpcall,
	2717	.Movw,
	2718	.Sram,
	2719	.Break,
	2720	.Spm,
	2721	.Lpmx,
	2722	.Avr0,
	2723	.Addsubiw,
	2724	.Lpm,
	2725	.Avr25,
	2726	},
	2727	CpuInfo(@This()).create(.Attiny9, "attiny9", &[_]FeatureType {
	2728	.Break,
	2729	.Tinyencoding,
	2730	.Avr0,
	2731	.Sram,
	2732	.Avrtiny,
	2733	},
	2734	CpuInfo(@This()).create(.Atxmega128a1, "atxmega128a1", &[_]FeatureType {
	2735	.Ijmpcall,
	2736	.Elpmx,
	2737	.Movw,
	2738	.Eijmpcall,
	2739	.Mul,
	2740	.Sram,
	2741	.Break,
	2742	.Spm,
	2743	.Elpm,
	2744	.Lpmx,
	2745	.Spmx,
	2746	.Avr0,
	2747	.Jmpcall,
	2748	.Addsubiw,
	2749	.Lpm,
	2750	.Des,
	2751	.Xmega,
	2752	},
	2753	CpuInfo(@This()).create(.Atxmega128a1u, "atxmega128a1u", &[_]FeatureType {
	2754	.Ijmpcall,
	2755	.Elpmx,
	2756	.Movw,
	2757	.Eijmpcall,
	2758	.Mul,
	2759	.Rmw,
	2760	.Sram,
	2761	.Break,
	2762	.Spm,
	2763	.Elpm,
	2764	.Lpmx,
	2765	.Spmx,
	2766	.Avr0,
	2767	.Jmpcall,
	2768	.Addsubiw,
	2769	.Lpm,
	2770	.Des,
	2771	.Xmegau,
	2772	},
	2773	CpuInfo(@This()).create(.Atxmega128a3, "atxmega128a3", &[_]FeatureType {
	2774	.Ijmpcall,
	2775	.Elpmx,
	2776	.Movw,
	2777	.Eijmpcall,
	2778	.Mul,
	2779	.Sram,
	2780	.Break,
	2781	.Spm,
	2782	.Elpm,
	2783	.Lpmx,
	2784	.Spmx,
	2785	.Avr0,
	2786	.Jmpcall,
	2787	.Addsubiw,
	2788	.Lpm,
	2789	.Des,
	2790	.Xmega,
	2791	},
	2792	CpuInfo(@This()).create(.Atxmega128a3u, "atxmega128a3u", &[_]FeatureType {
	2793	.Ijmpcall,
	2794	.Elpmx,
	2795	.Movw,
	2796	.Eijmpcall,
	2797	.Mul,
	2798	.Rmw,
	2799	.Sram,
	2800	.Break,
	2801	.Spm,
	2802	.Elpm,
	2803	.Lpmx,
	2804	.Spmx,
	2805	.Avr0,
	2806	.Jmpcall,
	2807	.Addsubiw,
	2808	.Lpm,
	2809	.Des,
	2810	.Xmegau,
	2811	},
	2812	CpuInfo(@This()).create(.Atxmega128a4u, "atxmega128a4u", &[_]FeatureType {
	2813	.Ijmpcall,
	2814	.Elpmx,
	2815	.Movw,
	2816	.Eijmpcall,
	2817	.Mul,
	2818	.Rmw,
	2819	.Sram,
	2820	.Break,
	2821	.Spm,
	2822	.Elpm,
	2823	.Lpmx,
	2824	.Spmx,
	2825	.Avr0,
	2826	.Jmpcall,
	2827	.Addsubiw,
	2828	.Lpm,
	2829	.Des,
	2830	.Xmegau,
	2831	},
	2832	CpuInfo(@This()).create(.Atxmega128b1, "atxmega128b1", &[_]FeatureType {
	2833	.Ijmpcall,
	2834	.Elpmx,
	2835	.Movw,
	2836	.Eijmpcall,
	2837	.Mul,
	2838	.Rmw,
	2839	.Sram,
	2840	.Break,
	2841	.Spm,
	2842	.Elpm,
	2843	.Lpmx,
	2844	.Spmx,
	2845	.Avr0,
	2846	.Jmpcall,
	2847	.Addsubiw,
	2848	.Lpm,
	2849	.Des,
	2850	.Xmegau,
	2851	},
	2852	CpuInfo(@This()).create(.Atxmega128b3, "atxmega128b3", &[_]FeatureType {
	2853	.Ijmpcall,
	2854	.Elpmx,
	2855	.Movw,
	2856	.Eijmpcall,
	2857	.Mul,
	2858	.Rmw,
	2859	.Sram,
	2860	.Break,
	2861	.Spm,
	2862	.Elpm,
	2863	.Lpmx,
	2864	.Spmx,
	2865	.Avr0,
	2866	.Jmpcall,
	2867	.Addsubiw,
	2868	.Lpm,
	2869	.Des,
	2870	.Xmegau,
	2871	},
	2872	CpuInfo(@This()).create(.Atxmega128c3, "atxmega128c3", &[_]FeatureType {
	2873	.Ijmpcall,
	2874	.Elpmx,
	2875	.Movw,
	2876	.Eijmpcall,
	2877	.Mul,
	2878	.Rmw,
	2879	.Sram,
	2880	.Break,
	2881	.Spm,
	2882	.Elpm,
	2883	.Lpmx,
	2884	.Spmx,
	2885	.Avr0,
	2886	.Jmpcall,
	2887	.Addsubiw,
	2888	.Lpm,
	2889	.Des,
	2890	.Xmegau,
	2891	},
	2892	CpuInfo(@This()).create(.Atxmega128d3, "atxmega128d3", &[_]FeatureType {
	2893	.Ijmpcall,
	2894	.Elpmx,
	2895	.Movw,
	2896	.Eijmpcall,
	2897	.Mul,
	2898	.Sram,
	2899	.Break,
	2900	.Spm,
	2901	.Elpm,
	2902	.Lpmx,
	2903	.Spmx,
	2904	.Avr0,
	2905	.Jmpcall,
	2906	.Addsubiw,
	2907	.Lpm,
	2908	.Des,
	2909	.Xmega,
	2910	},
	2911	CpuInfo(@This()).create(.Atxmega128d4, "atxmega128d4", &[_]FeatureType {
	2912	.Ijmpcall,
	2913	.Elpmx,
	2914	.Movw,
	2915	.Eijmpcall,
	2916	.Mul,
	2917	.Sram,
	2918	.Break,
	2919	.Spm,
	2920	.Elpm,
	2921	.Lpmx,
	2922	.Spmx,
	2923	.Avr0,
	2924	.Jmpcall,
	2925	.Addsubiw,
	2926	.Lpm,
	2927	.Des,
	2928	.Xmega,
	2929	},
	2930	CpuInfo(@This()).create(.Atxmega16a4, "atxmega16a4", &[_]FeatureType {
	2931	.Ijmpcall,
	2932	.Elpmx,
	2933	.Movw,
	2934	.Eijmpcall,
	2935	.Mul,
	2936	.Sram,
	2937	.Break,
	2938	.Spm,
	2939	.Elpm,
	2940	.Lpmx,
	2941	.Spmx,
	2942	.Avr0,
	2943	.Jmpcall,
	2944	.Addsubiw,
	2945	.Lpm,
	2946	.Des,
	2947	.Xmega,
	2948	},
	2949	CpuInfo(@This()).create(.Atxmega16a4u, "atxmega16a4u", &[_]FeatureType {
	2950	.Ijmpcall,
	2951	.Elpmx,
	2952	.Movw,
	2953	.Eijmpcall,
	2954	.Mul,
	2955	.Rmw,
	2956	.Sram,
	2957	.Break,
	2958	.Spm,
	2959	.Elpm,
	2960	.Lpmx,
	2961	.Spmx,
	2962	.Avr0,
	2963	.Jmpcall,
	2964	.Addsubiw,
	2965	.Lpm,
	2966	.Des,
	2967	.Xmegau,
	2968	},
	2969	CpuInfo(@This()).create(.Atxmega16c4, "atxmega16c4", &[_]FeatureType {
	2970	.Ijmpcall,
	2971	.Elpmx,
	2972	.Movw,
	2973	.Eijmpcall,
	2974	.Mul,
	2975	.Rmw,
	2976	.Sram,
	2977	.Break,
	2978	.Spm,
	2979	.Elpm,
	2980	.Lpmx,
	2981	.Spmx,
	2982	.Avr0,
	2983	.Jmpcall,
	2984	.Addsubiw,
	2985	.Lpm,
	2986	.Des,
	2987	.Xmegau,
	2988	},
	2989	CpuInfo(@This()).create(.Atxmega16d4, "atxmega16d4", &[_]FeatureType {
	2990	.Ijmpcall,
	2991	.Elpmx,
	2992	.Movw,
	2993	.Eijmpcall,
	2994	.Mul,
	2995	.Sram,
	2996	.Break,
	2997	.Spm,
	2998	.Elpm,
	2999	.Lpmx,
	3000	.Spmx,
	3001	.Avr0,
	3002	.Jmpcall,
	3003	.Addsubiw,
	3004	.Lpm,
	3005	.Des,
	3006	.Xmega,
	3007	},
	3008	CpuInfo(@This()).create(.Atxmega16e5, "atxmega16e5", &[_]FeatureType {
	3009	.Ijmpcall,
	3010	.Elpmx,
	3011	.Movw,
	3012	.Eijmpcall,
	3013	.Mul,
	3014	.Sram,
	3015	.Break,
	3016	.Spm,
	3017	.Elpm,
	3018	.Lpmx,
	3019	.Spmx,
	3020	.Avr0,
	3021	.Jmpcall,
	3022	.Addsubiw,
	3023	.Lpm,
	3024	.Des,
	3025	.Xmega,
	3026	},
	3027	CpuInfo(@This()).create(.Atxmega192a3, "atxmega192a3", &[_]FeatureType {
	3028	.Ijmpcall,
	3029	.Elpmx,
	3030	.Movw,
	3031	.Eijmpcall,
	3032	.Mul,
	3033	.Sram,
	3034	.Break,
	3035	.Spm,
	3036	.Elpm,
	3037	.Lpmx,
	3038	.Spmx,
	3039	.Avr0,
	3040	.Jmpcall,
	3041	.Addsubiw,
	3042	.Lpm,
	3043	.Des,
	3044	.Xmega,
	3045	},
	3046	CpuInfo(@This()).create(.Atxmega192a3u, "atxmega192a3u", &[_]FeatureType {
	3047	.Ijmpcall,
	3048	.Elpmx,
	3049	.Movw,
	3050	.Eijmpcall,
	3051	.Mul,
	3052	.Rmw,
	3053	.Sram,
	3054	.Break,
	3055	.Spm,
	3056	.Elpm,
	3057	.Lpmx,
	3058	.Spmx,
	3059	.Avr0,
	3060	.Jmpcall,
	3061	.Addsubiw,
	3062	.Lpm,
	3063	.Des,
	3064	.Xmegau,
	3065	},
	3066	CpuInfo(@This()).create(.Atxmega192c3, "atxmega192c3", &[_]FeatureType {
	3067	.Ijmpcall,
	3068	.Elpmx,
	3069	.Movw,
	3070	.Eijmpcall,
	3071	.Mul,
	3072	.Rmw,
	3073	.Sram,
	3074	.Break,
	3075	.Spm,
	3076	.Elpm,
	3077	.Lpmx,
	3078	.Spmx,
	3079	.Avr0,
	3080	.Jmpcall,
	3081	.Addsubiw,
	3082	.Lpm,
	3083	.Des,
	3084	.Xmegau,
	3085	},
	3086	CpuInfo(@This()).create(.Atxmega192d3, "atxmega192d3", &[_]FeatureType {
	3087	.Ijmpcall,
	3088	.Elpmx,
	3089	.Movw,
	3090	.Eijmpcall,
	3091	.Mul,
	3092	.Sram,
	3093	.Break,
	3094	.Spm,
	3095	.Elpm,
	3096	.Lpmx,
	3097	.Spmx,
	3098	.Avr0,
	3099	.Jmpcall,
	3100	.Addsubiw,
	3101	.Lpm,
	3102	.Des,
	3103	.Xmega,
	3104	},
	3105	CpuInfo(@This()).create(.Atxmega256a3, "atxmega256a3", &[_]FeatureType {
	3106	.Ijmpcall,
	3107	.Elpmx,
	3108	.Movw,
	3109	.Eijmpcall,
	3110	.Mul,
	3111	.Sram,
	3112	.Break,
	3113	.Spm,
	3114	.Elpm,
	3115	.Lpmx,
	3116	.Spmx,
	3117	.Avr0,
	3118	.Jmpcall,
	3119	.Addsubiw,
	3120	.Lpm,
	3121	.Des,
	3122	.Xmega,
	3123	},
	3124	CpuInfo(@This()).create(.Atxmega256a3b, "atxmega256a3b", &[_]FeatureType {
	3125	.Ijmpcall,
	3126	.Elpmx,
	3127	.Movw,
	3128	.Eijmpcall,
	3129	.Mul,
	3130	.Sram,
	3131	.Break,
	3132	.Spm,
	3133	.Elpm,
	3134	.Lpmx,
	3135	.Spmx,
	3136	.Avr0,
	3137	.Jmpcall,
	3138	.Addsubiw,
	3139	.Lpm,
	3140	.Des,
	3141	.Xmega,
	3142	},
	3143	CpuInfo(@This()).create(.Atxmega256a3bu, "atxmega256a3bu", &[_]FeatureType {
	3144	.Ijmpcall,
	3145	.Elpmx,
	3146	.Movw,
	3147	.Eijmpcall,
	3148	.Mul,
	3149	.Rmw,
	3150	.Sram,
	3151	.Break,
	3152	.Spm,
	3153	.Elpm,
	3154	.Lpmx,
	3155	.Spmx,
	3156	.Avr0,
	3157	.Jmpcall,
	3158	.Addsubiw,
	3159	.Lpm,
	3160	.Des,
	3161	.Xmegau,
	3162	},
	3163	CpuInfo(@This()).create(.Atxmega256a3u, "atxmega256a3u", &[_]FeatureType {
	3164	.Ijmpcall,
	3165	.Elpmx,
	3166	.Movw,
	3167	.Eijmpcall,
	3168	.Mul,
	3169	.Rmw,
	3170	.Sram,
	3171	.Break,
	3172	.Spm,
	3173	.Elpm,
	3174	.Lpmx,
	3175	.Spmx,
	3176	.Avr0,
	3177	.Jmpcall,
	3178	.Addsubiw,
	3179	.Lpm,
	3180	.Des,
	3181	.Xmegau,
	3182	},
	3183	CpuInfo(@This()).create(.Atxmega256c3, "atxmega256c3", &[_]FeatureType {
	3184	.Ijmpcall,
	3185	.Elpmx,
	3186	.Movw,
	3187	.Eijmpcall,
	3188	.Mul,
	3189	.Rmw,
	3190	.Sram,
	3191	.Break,
	3192	.Spm,
	3193	.Elpm,
	3194	.Lpmx,
	3195	.Spmx,
	3196	.Avr0,
	3197	.Jmpcall,
	3198	.Addsubiw,
	3199	.Lpm,
	3200	.Des,
	3201	.Xmegau,
	3202	},
	3203	CpuInfo(@This()).create(.Atxmega256d3, "atxmega256d3", &[_]FeatureType {
	3204	.Ijmpcall,
	3205	.Elpmx,
	3206	.Movw,
	3207	.Eijmpcall,
	3208	.Mul,
	3209	.Sram,
	3210	.Break,
	3211	.Spm,
	3212	.Elpm,
	3213	.Lpmx,
	3214	.Spmx,
	3215	.Avr0,
	3216	.Jmpcall,
	3217	.Addsubiw,
	3218	.Lpm,
	3219	.Des,
	3220	.Xmega,
	3221	},
	3222	CpuInfo(@This()).create(.Atxmega32a4, "atxmega32a4", &[_]FeatureType {
	3223	.Ijmpcall,
	3224	.Elpmx,
	3225	.Movw,
	3226	.Eijmpcall,
	3227	.Mul,
	3228	.Sram,
	3229	.Break,
	3230	.Spm,
	3231	.Elpm,
	3232	.Lpmx,
	3233	.Spmx,
	3234	.Avr0,
	3235	.Jmpcall,
	3236	.Addsubiw,
	3237	.Lpm,
	3238	.Des,
	3239	.Xmega,
	3240	},
	3241	CpuInfo(@This()).create(.Atxmega32a4u, "atxmega32a4u", &[_]FeatureType {
	3242	.Ijmpcall,
	3243	.Elpmx,
	3244	.Movw,
	3245	.Eijmpcall,
	3246	.Mul,
	3247	.Rmw,
	3248	.Sram,
	3249	.Break,
	3250	.Spm,
	3251	.Elpm,
	3252	.Lpmx,
	3253	.Spmx,
	3254	.Avr0,
	3255	.Jmpcall,
	3256	.Addsubiw,
	3257	.Lpm,
	3258	.Des,
	3259	.Xmegau,
	3260	},
	3261	CpuInfo(@This()).create(.Atxmega32c4, "atxmega32c4", &[_]FeatureType {
	3262	.Ijmpcall,
	3263	.Elpmx,
	3264	.Movw,
	3265	.Eijmpcall,
	3266	.Mul,
	3267	.Rmw,
	3268	.Sram,
	3269	.Break,
	3270	.Spm,
	3271	.Elpm,
	3272	.Lpmx,
	3273	.Spmx,
	3274	.Avr0,
	3275	.Jmpcall,
	3276	.Addsubiw,
	3277	.Lpm,
	3278	.Des,
	3279	.Xmegau,
	3280	},
	3281	CpuInfo(@This()).create(.Atxmega32d4, "atxmega32d4", &[_]FeatureType {
	3282	.Ijmpcall,
	3283	.Elpmx,
	3284	.Movw,
	3285	.Eijmpcall,
	3286	.Mul,
	3287	.Sram,
	3288	.Break,
	3289	.Spm,
	3290	.Elpm,
	3291	.Lpmx,
	3292	.Spmx,
	3293	.Avr0,
	3294	.Jmpcall,
	3295	.Addsubiw,
	3296	.Lpm,
	3297	.Des,
	3298	.Xmega,
	3299	},
	3300	CpuInfo(@This()).create(.Atxmega32e5, "atxmega32e5", &[_]FeatureType {
	3301	.Ijmpcall,
	3302	.Elpmx,
	3303	.Movw,
	3304	.Eijmpcall,
	3305	.Mul,
	3306	.Sram,
	3307	.Break,
	3308	.Spm,
	3309	.Elpm,
	3310	.Lpmx,
	3311	.Spmx,
	3312	.Avr0,
	3313	.Jmpcall,
	3314	.Addsubiw,
	3315	.Lpm,
	3316	.Des,
	3317	.Xmega,
	3318	},
	3319	CpuInfo(@This()).create(.Atxmega32x1, "atxmega32x1", &[_]FeatureType {
	3320	.Ijmpcall,
	3321	.Elpmx,
	3322	.Movw,
	3323	.Eijmpcall,
	3324	.Mul,
	3325	.Sram,
	3326	.Break,
	3327	.Spm,
	3328	.Elpm,
	3329	.Lpmx,
	3330	.Spmx,
	3331	.Avr0,
	3332	.Jmpcall,
	3333	.Addsubiw,
	3334	.Lpm,
	3335	.Des,
	3336	.Xmega,
	3337	},
	3338	CpuInfo(@This()).create(.Atxmega384c3, "atxmega384c3", &[_]FeatureType {
	3339	.Ijmpcall,
	3340	.Elpmx,
	3341	.Movw,
	3342	.Eijmpcall,
	3343	.Mul,
	3344	.Rmw,
	3345	.Sram,
	3346	.Break,
	3347	.Spm,
	3348	.Elpm,
	3349	.Lpmx,
	3350	.Spmx,
	3351	.Avr0,
	3352	.Jmpcall,
	3353	.Addsubiw,
	3354	.Lpm,
	3355	.Des,
	3356	.Xmegau,
	3357	},
	3358	CpuInfo(@This()).create(.Atxmega384d3, "atxmega384d3", &[_]FeatureType {
	3359	.Ijmpcall,
	3360	.Elpmx,
	3361	.Movw,
	3362	.Eijmpcall,
	3363	.Mul,
	3364	.Sram,
	3365	.Break,
	3366	.Spm,
	3367	.Elpm,
	3368	.Lpmx,
	3369	.Spmx,
	3370	.Avr0,
	3371	.Jmpcall,
	3372	.Addsubiw,
	3373	.Lpm,
	3374	.Des,
	3375	.Xmega,
	3376	},
	3377	CpuInfo(@This()).create(.Atxmega64a1, "atxmega64a1", &[_]FeatureType {
	3378	.Ijmpcall,
	3379	.Elpmx,
	3380	.Movw,
	3381	.Eijmpcall,
	3382	.Mul,
	3383	.Sram,
	3384	.Break,
	3385	.Spm,
	3386	.Elpm,
	3387	.Lpmx,
	3388	.Spmx,
	3389	.Avr0,
	3390	.Jmpcall,
	3391	.Addsubiw,
	3392	.Lpm,
	3393	.Des,
	3394	.Xmega,
	3395	},
	3396	CpuInfo(@This()).create(.Atxmega64a1u, "atxmega64a1u", &[_]FeatureType {
	3397	.Ijmpcall,
	3398	.Elpmx,
	3399	.Movw,
	3400	.Eijmpcall,
	3401	.Mul,
	3402	.Rmw,
	3403	.Sram,
	3404	.Break,
	3405	.Spm,
	3406	.Elpm,
	3407	.Lpmx,
	3408	.Spmx,
	3409	.Avr0,
	3410	.Jmpcall,
	3411	.Addsubiw,
	3412	.Lpm,
	3413	.Des,
	3414	.Xmegau,
	3415	},
	3416	CpuInfo(@This()).create(.Atxmega64a3, "atxmega64a3", &[_]FeatureType {
	3417	.Ijmpcall,
	3418	.Elpmx,
	3419	.Movw,
	3420	.Eijmpcall,
	3421	.Mul,
	3422	.Sram,
	3423	.Break,
	3424	.Spm,
	3425	.Elpm,
	3426	.Lpmx,
	3427	.Spmx,
	3428	.Avr0,
	3429	.Jmpcall,
	3430	.Addsubiw,
	3431	.Lpm,
	3432	.Des,
	3433	.Xmega,
	3434	},
	3435	CpuInfo(@This()).create(.Atxmega64a3u, "atxmega64a3u", &[_]FeatureType {
	3436	.Ijmpcall,
	3437	.Elpmx,
	3438	.Movw,
	3439	.Eijmpcall,
	3440	.Mul,
	3441	.Rmw,
	3442	.Sram,
	3443	.Break,
	3444	.Spm,
	3445	.Elpm,
	3446	.Lpmx,
	3447	.Spmx,
	3448	.Avr0,
	3449	.Jmpcall,
	3450	.Addsubiw,
	3451	.Lpm,
	3452	.Des,
	3453	.Xmegau,
	3454	},
	3455	CpuInfo(@This()).create(.Atxmega64a4u, "atxmega64a4u", &[_]FeatureType {
	3456	.Ijmpcall,
	3457	.Elpmx,
	3458	.Movw,
	3459	.Eijmpcall,
	3460	.Mul,
	3461	.Rmw,
	3462	.Sram,
	3463	.Break,
	3464	.Spm,
	3465	.Elpm,
	3466	.Lpmx,
	3467	.Spmx,
	3468	.Avr0,
	3469	.Jmpcall,
	3470	.Addsubiw,
	3471	.Lpm,
	3472	.Des,
	3473	.Xmegau,
	3474	},
	3475	CpuInfo(@This()).create(.Atxmega64b1, "atxmega64b1", &[_]FeatureType {
	3476	.Ijmpcall,
	3477	.Elpmx,
	3478	.Movw,
	3479	.Eijmpcall,
	3480	.Mul,
	3481	.Rmw,
	3482	.Sram,
	3483	.Break,
	3484	.Spm,
	3485	.Elpm,
	3486	.Lpmx,
	3487	.Spmx,
	3488	.Avr0,
	3489	.Jmpcall,
	3490	.Addsubiw,
	3491	.Lpm,
	3492	.Des,
	3493	.Xmegau,
	3494	},
	3495	CpuInfo(@This()).create(.Atxmega64b3, "atxmega64b3", &[_]FeatureType {
	3496	.Ijmpcall,
	3497	.Elpmx,
	3498	.Movw,
	3499	.Eijmpcall,
	3500	.Mul,
	3501	.Rmw,
	3502	.Sram,
	3503	.Break,
	3504	.Spm,
	3505	.Elpm,
	3506	.Lpmx,
	3507	.Spmx,
	3508	.Avr0,
	3509	.Jmpcall,
	3510	.Addsubiw,
	3511	.Lpm,
	3512	.Des,
	3513	.Xmegau,
	3514	},
	3515	CpuInfo(@This()).create(.Atxmega64c3, "atxmega64c3", &[_]FeatureType {
	3516	.Ijmpcall,
	3517	.Elpmx,
	3518	.Movw,
	3519	.Eijmpcall,
	3520	.Mul,
	3521	.Rmw,
	3522	.Sram,
	3523	.Break,
	3524	.Spm,
	3525	.Elpm,
	3526	.Lpmx,
	3527	.Spmx,
	3528	.Avr0,
	3529	.Jmpcall,
	3530	.Addsubiw,
	3531	.Lpm,
	3532	.Des,
	3533	.Xmegau,
	3534	},
	3535	CpuInfo(@This()).create(.Atxmega64d3, "atxmega64d3", &[_]FeatureType {
	3536	.Ijmpcall,
	3537	.Elpmx,
	3538	.Movw,
	3539	.Eijmpcall,
	3540	.Mul,
	3541	.Sram,
	3542	.Break,
	3543	.Spm,
	3544	.Elpm,
	3545	.Lpmx,
	3546	.Spmx,
	3547	.Avr0,
	3548	.Jmpcall,
	3549	.Addsubiw,
	3550	.Lpm,
	3551	.Des,
	3552	.Xmega,
	3553	},
	3554	CpuInfo(@This()).create(.Atxmega64d4, "atxmega64d4", &[_]FeatureType {
	3555	.Ijmpcall,
	3556	.Elpmx,
	3557	.Movw,
	3558	.Eijmpcall,
	3559	.Mul,
	3560	.Sram,
	3561	.Break,
	3562	.Spm,
	3563	.Elpm,
	3564	.Lpmx,
	3565	.Spmx,
	3566	.Avr0,
	3567	.Jmpcall,
	3568	.Addsubiw,
	3569	.Lpm,
	3570	.Des,
	3571	.Xmega,
	3572	},
	3573	CpuInfo(@This()).create(.Atxmega8e5, "atxmega8e5", &[_]FeatureType {
	3574	.Ijmpcall,
	3575	.Elpmx,
	3576	.Movw,
	3577	.Eijmpcall,
	3578	.Mul,
	3579	.Sram,
	3580	.Break,
	3581	.Spm,
	3582	.Elpm,
	3583	.Lpmx,
	3584	.Spmx,
	3585	.Avr0,
	3586	.Jmpcall,
	3587	.Addsubiw,
	3588	.Lpm,
	3589	.Des,
	3590	.Xmega,
	3591	},
	3592	CpuInfo(@This()).create(.Avr1, "avr1", &[_]FeatureType {
	3593	.Lpm,
	3594	.Avr0,
	3595	.Avr1,
	3596	},
	3597	CpuInfo(@This()).create(.Avr2, "avr2", &[_]FeatureType {
	3598	.Ijmpcall,
	3599	.Sram,
	3600	.Avr0,
	3601	.Addsubiw,
	3602	.Lpm,
	3603	.Avr2,
	3604	},
	3605	CpuInfo(@This()).create(.Avr25, "avr25", &[_]FeatureType {
	3606	.Ijmpcall,
	3607	.Movw,
	3608	.Sram,
	3609	.Break,
	3610	.Spm,
	3611	.Lpmx,
	3612	.Avr0,
	3613	.Addsubiw,
	3614	.Lpm,
	3615	.Avr25,
	3616	},
	3617	CpuInfo(@This()).create(.Avr3, "avr3", &[_]FeatureType {
	3618	.Ijmpcall,
	3619	.Sram,
	3620	.Avr0,
	3621	.Jmpcall,
	3622	.Addsubiw,
	3623	.Lpm,
	3624	.Avr3,
	3625	},
	3626	CpuInfo(@This()).create(.Avr31, "avr31", &[_]FeatureType {
	3627	.Ijmpcall,
	3628	.Sram,
	3629	.Elpm,
	3630	.Avr0,
	3631	.Jmpcall,
	3632	.Addsubiw,
	3633	.Lpm,
	3634	.Avr31,
	3635	},
	3636	CpuInfo(@This()).create(.Avr35, "avr35", &[_]FeatureType {
	3637	.Ijmpcall,
	3638	.Movw,
	3639	.Sram,
	3640	.Break,
	3641	.Spm,
	3642	.Lpmx,
	3643	.Avr0,
	3644	.Jmpcall,
	3645	.Addsubiw,
	3646	.Lpm,
	3647	.Avr35,
	3648	},
	3649	CpuInfo(@This()).create(.Avr4, "avr4", &[_]FeatureType {
	3650	.Ijmpcall,
	3651	.Movw,
	3652	.Mul,
	3653	.Sram,
	3654	.Break,
	3655	.Spm,
	3656	.Lpmx,
	3657	.Avr0,
	3658	.Addsubiw,
	3659	.Lpm,
	3660	.Avr4,
	3661	},
	3662	CpuInfo(@This()).create(.Avr5, "avr5", &[_]FeatureType {
	3663	.Ijmpcall,
	3664	.Movw,
	3665	.Mul,
	3666	.Sram,
	3667	.Break,
	3668	.Spm,
	3669	.Lpmx,
	3670	.Avr0,
	3671	.Jmpcall,
	3672	.Addsubiw,
	3673	.Lpm,
	3674	.Avr5,
	3675	},
	3676	CpuInfo(@This()).create(.Avr51, "avr51", &[_]FeatureType {
	3677	.Ijmpcall,
	3678	.Elpmx,
	3679	.Movw,
	3680	.Mul,
	3681	.Sram,
	3682	.Break,
	3683	.Spm,
	3684	.Elpm,
	3685	.Lpmx,
	3686	.Avr0,
	3687	.Jmpcall,
	3688	.Addsubiw,
	3689	.Lpm,
	3690	.Avr51,
	3691	},
	3692	CpuInfo(@This()).create(.Avr6, "avr6", &[_]FeatureType {
	3693	.Ijmpcall,
	3694	.Elpmx,
	3695	.Movw,
	3696	.Mul,
	3697	.Sram,
	3698	.Break,
	3699	.Spm,
	3700	.Elpm,
	3701	.Lpmx,
	3702	.Avr0,
	3703	.Jmpcall,
	3704	.Addsubiw,
	3705	.Lpm,
	3706	.Avr6,
	3707	},
	3708	CpuInfo(@This()).create(.Avrtiny, "avrtiny", &[_]FeatureType {
	3709	.Break,
	3710	.Tinyencoding,
	3711	.Avr0,
	3712	.Sram,
	3713	.Avrtiny,
	3714	},
	3715	CpuInfo(@This()).create(.Avrxmega1, "avrxmega1", &[_]FeatureType {
	3716	.Ijmpcall,
	3717	.Elpmx,
	3718	.Movw,
	3719	.Eijmpcall,
	3720	.Mul,
	3721	.Sram,
	3722	.Break,
	3723	.Spm,
	3724	.Elpm,
	3725	.Lpmx,
	3726	.Spmx,
	3727	.Avr0,
	3728	.Jmpcall,
	3729	.Addsubiw,
	3730	.Lpm,
	3731	.Des,
	3732	.Xmega,
	3733	},
	3734	CpuInfo(@This()).create(.Avrxmega2, "avrxmega2", &[_]FeatureType {
	3735	.Ijmpcall,
	3736	.Elpmx,
	3737	.Movw,
	3738	.Eijmpcall,
	3739	.Mul,
	3740	.Sram,
	3741	.Break,
	3742	.Spm,
	3743	.Elpm,
	3744	.Lpmx,
	3745	.Spmx,
	3746	.Avr0,
	3747	.Jmpcall,
	3748	.Addsubiw,
	3749	.Lpm,
	3750	.Des,
	3751	.Xmega,
	3752	},
	3753	CpuInfo(@This()).create(.Avrxmega3, "avrxmega3", &[_]FeatureType {
	3754	.Ijmpcall,
	3755	.Elpmx,
	3756	.Movw,
	3757	.Eijmpcall,
	3758	.Mul,
	3759	.Sram,
	3760	.Break,
	3761	.Spm,
	3762	.Elpm,
	3763	.Lpmx,
	3764	.Spmx,
	3765	.Avr0,
	3766	.Jmpcall,
	3767	.Addsubiw,
	3768	.Lpm,
	3769	.Des,
	3770	.Xmega,
	3771	},
	3772	CpuInfo(@This()).create(.Avrxmega4, "avrxmega4", &[_]FeatureType {
	3773	.Ijmpcall,
	3774	.Elpmx,
	3775	.Movw,
	3776	.Eijmpcall,
	3777	.Mul,
	3778	.Sram,
	3779	.Break,
	3780	.Spm,
	3781	.Elpm,
	3782	.Lpmx,
	3783	.Spmx,
	3784	.Avr0,
	3785	.Jmpcall,
	3786	.Addsubiw,
	3787	.Lpm,
	3788	.Des,
	3789	.Xmega,
	3790	},
	3791	CpuInfo(@This()).create(.Avrxmega5, "avrxmega5", &[_]FeatureType {
	3792	.Ijmpcall,
	3793	.Elpmx,
	3794	.Movw,
	3795	.Eijmpcall,
	3796	.Mul,
	3797	.Sram,
	3798	.Break,
	3799	.Spm,
	3800	.Elpm,
	3801	.Lpmx,
	3802	.Spmx,
	3803	.Avr0,
	3804	.Jmpcall,
	3805	.Addsubiw,
	3806	.Lpm,
	3807	.Des,
	3808	.Xmega,
	3809	},
	3810	CpuInfo(@This()).create(.Avrxmega6, "avrxmega6", &[_]FeatureType {
	3811	.Ijmpcall,
	3812	.Elpmx,
	3813	.Movw,
	3814	.Eijmpcall,
	3815	.Mul,
	3816	.Sram,
	3817	.Break,
	3818	.Spm,
	3819	.Elpm,
	3820	.Lpmx,
	3821	.Spmx,
	3822	.Avr0,
	3823	.Jmpcall,
	3824	.Addsubiw,
	3825	.Lpm,
	3826	.Des,
	3827	.Xmega,
	3828	},
	3829	CpuInfo(@This()).create(.Avrxmega7, "avrxmega7", &[_]FeatureType {
	3830	.Ijmpcall,
	3831	.Elpmx,
	3832	.Movw,
	3833	.Eijmpcall,
	3834	.Mul,
	3835	.Sram,
	3836	.Break,
	3837	.Spm,
	3838	.Elpm,
	3839	.Lpmx,
	3840	.Spmx,
	3841	.Avr0,
	3842	.Jmpcall,
	3843	.Addsubiw,
	3844	.Lpm,
	3845	.Des,
	3846	.Xmega,
	3847	},
	3848	CpuInfo(@This()).create(.M3000, "m3000", &[_]FeatureType {
	3849	.Ijmpcall,
	3850	.Movw,
	3851	.Mul,
	3852	.Sram,
	3853	.Break,
	3854	.Spm,
	3855	.Lpmx,
	3856	.Avr0,
	3857	.Jmpcall,
	3858	.Addsubiw,
	3859	.Lpm,
	3860	.Avr5,
	3861	},
	3862	};
	3863	};

lib/std/target/cpu/BpfCpu.zig created+29

...	...	@@ -0,0 +1,29 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const BpfCpu = enum {
	5	Generic,
	6	Probe,
	7	V1,
	8	V2,
	9	V3,
	10
	11	pub fn getInfo(self: @This()) CpuInfo {
	12	return cpu_infos[@enumToInt(self)];
	13	}
	14
	15	pub const FeatureType = feature.BpfFeature;
	16
	17	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	18	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	19	},
	20	CpuInfo(@This()).create(.Probe, "probe", &[_]FeatureType {
	21	},
	22	CpuInfo(@This()).create(.V1, "v1", &[_]FeatureType {
	23	},
	24	CpuInfo(@This()).create(.V2, "v2", &[_]FeatureType {
	25	},
	26	CpuInfo(@This()).create(.V3, "v3", &[_]FeatureType {
	27	},
	28	};
	29	};

lib/std/target/cpu/HexagonCpu.zig created+103

...	...	@@ -0,0 +1,103 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const HexagonCpu = enum {
	5	Generic,
	6	Hexagonv5,
	7	Hexagonv55,
	8	Hexagonv60,
	9	Hexagonv62,
	10	Hexagonv65,
	11	Hexagonv66,
	12
	13	pub fn getInfo(self: @This()) CpuInfo {
	14	return cpu_infos[@enumToInt(self)];
	15	}
	16
	17	pub const FeatureType = feature.HexagonFeature;
	18
	19	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	20	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	21	.V5,
	22	.V55,
	23	.V60,
	24	.Duplex,
	25	.Memops,
	26	.Packets,
	27	.Nvj,
	28	.Nvs,
	29	.SmallData,
	30	},
	31	CpuInfo(@This()).create(.Hexagonv5, "hexagonv5", &[_]FeatureType {
	32	.V5,
	33	.Duplex,
	34	.Memops,
	35	.Packets,
	36	.Nvj,
	37	.Nvs,
	38	.SmallData,
	39	},
	40	CpuInfo(@This()).create(.Hexagonv55, "hexagonv55", &[_]FeatureType {
	41	.V5,
	42	.V55,
	43	.Duplex,
	44	.Memops,
	45	.Packets,
	46	.Nvj,
	47	.Nvs,
	48	.SmallData,
	49	},
	50	CpuInfo(@This()).create(.Hexagonv60, "hexagonv60", &[_]FeatureType {
	51	.V5,
	52	.V55,
	53	.V60,
	54	.Duplex,
	55	.Memops,
	56	.Packets,
	57	.Nvj,
	58	.Nvs,
	59	.SmallData,
	60	},
	61	CpuInfo(@This()).create(.Hexagonv62, "hexagonv62", &[_]FeatureType {
	62	.V5,
	63	.V55,
	64	.V60,
	65	.V62,
	66	.Duplex,
	67	.Memops,
	68	.Packets,
	69	.Nvj,
	70	.Nvs,
	71	.SmallData,
	72	},
	73	CpuInfo(@This()).create(.Hexagonv65, "hexagonv65", &[_]FeatureType {
	74	.V5,
	75	.V55,
	76	.V60,
	77	.V62,
	78	.V65,
	79	.Duplex,
	80	.Mem_noshuf,
	81	.Memops,
	82	.Packets,
	83	.Nvj,
	84	.Nvs,
	85	.SmallData,
	86	},
	87	CpuInfo(@This()).create(.Hexagonv66, "hexagonv66", &[_]FeatureType {
	88	.V5,
	89	.V55,
	90	.V60,
	91	.V62,
	92	.V65,
	93	.V66,
	94	.Duplex,
	95	.Mem_noshuf,
	96	.Memops,
	97	.Packets,
	98	.Nvj,
	99	.Nvs,
	100	.SmallData,
	101	},
	102	};
	103	};

lib/std/target/cpu/MipsCpu.zig created+190

...	...	@@ -0,0 +1,190 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const MipsCpu = enum {
	5	Mips1,
	6	Mips2,
	7	Mips3,
	8	Mips32,
	9	Mips32r2,
	10	Mips32r3,
	11	Mips32r5,
	12	Mips32r6,
	13	Mips4,
	14	Mips5,
	15	Mips64,
	16	Mips64r2,
	17	Mips64r3,
	18	Mips64r5,
	19	Mips64r6,
	20	Octeon,
	21	P5600,
	22
	23	pub fn getInfo(self: @This()) CpuInfo {
	24	return cpu_infos[@enumToInt(self)];
	25	}
	26
	27	pub const FeatureType = feature.MipsFeature;
	28
	29	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	30	CpuInfo(@This()).create(.Mips1, "mips1", &[_]FeatureType {
	31	.Mips1,
	32	},
	33	CpuInfo(@This()).create(.Mips2, "mips2", &[_]FeatureType {
	34	.Mips1,
	35	.Mips2,
	36	},
	37	CpuInfo(@This()).create(.Mips3, "mips3", &[_]FeatureType {
	38	.Mips3_32,
	39	.Fp64,
	40	.Mips3_32r2,
	41	.Mips1,
	42	.Gp64,
	43	.Mips3,
	44	},
	45	CpuInfo(@This()).create(.Mips32, "mips32", &[_]FeatureType {
	46	.Mips3_32,
	47	.Mips4_32,
	48	.Mips1,
	49	.Mips32,
	50	},
	51	CpuInfo(@This()).create(.Mips32r2, "mips32r2", &[_]FeatureType {
	52	.Mips3_32,
	53	.Mips4_32r2,
	54	.Mips3_32r2,
	55	.Mips1,
	56	.Mips4_32,
	57	.Mips5_32r2,
	58	.Mips32r2,
	59	},
	60	CpuInfo(@This()).create(.Mips32r3, "mips32r3", &[_]FeatureType {
	61	.Mips3_32,
	62	.Mips4_32r2,
	63	.Mips3_32r2,
	64	.Mips1,
	65	.Mips4_32,
	66	.Mips5_32r2,
	67	.Mips32r3,
	68	},
	69	CpuInfo(@This()).create(.Mips32r5, "mips32r5", &[_]FeatureType {
	70	.Mips3_32,
	71	.Mips4_32r2,
	72	.Mips3_32r2,
	73	.Mips1,
	74	.Mips4_32,
	75	.Mips5_32r2,
	76	.Mips32r5,
	77	},
	78	CpuInfo(@This()).create(.Mips32r6, "mips32r6", &[_]FeatureType {
	79	.Mips3_32,
	80	.Fp64,
	81	.Mips4_32r2,
	82	.Abs2008,
	83	.Mips3_32r2,
	84	.Mips1,
	85	.Mips4_32,
	86	.Nan2008,
	87	.Mips5_32r2,
	88	.Mips32r6,
	89	},
	90	CpuInfo(@This()).create(.Mips4, "mips4", &[_]FeatureType {
	91	.Mips3_32,
	92	.Fp64,
	93	.Mips4_32r2,
	94	.Mips3_32r2,
	95	.Mips1,
	96	.Mips4_32,
	97	.Gp64,
	98	.Mips4,
	99	},
	100	CpuInfo(@This()).create(.Mips5, "mips5", &[_]FeatureType {
	101	.Mips3_32,
	102	.Fp64,
	103	.Mips4_32r2,
	104	.Mips3_32r2,
	105	.Mips1,
	106	.Mips4_32,
	107	.Gp64,
	108	.Mips5_32r2,
	109	.Mips5,
	110	},
	111	CpuInfo(@This()).create(.Mips64, "mips64", &[_]FeatureType {
	112	.Mips3_32,
	113	.Fp64,
	114	.Mips4_32r2,
	115	.Mips3_32r2,
	116	.Mips1,
	117	.Mips4_32,
	118	.Gp64,
	119	.Mips5_32r2,
	120	.Mips64,
	121	},
	122	CpuInfo(@This()).create(.Mips64r2, "mips64r2", &[_]FeatureType {
	123	.Mips3_32,
	124	.Fp64,
	125	.Mips4_32r2,
	126	.Mips3_32r2,
	127	.Mips1,
	128	.Mips4_32,
	129	.Gp64,
	130	.Mips5_32r2,
	131	.Mips64r2,
	132	},
	133	CpuInfo(@This()).create(.Mips64r3, "mips64r3", &[_]FeatureType {
	134	.Mips3_32,
	135	.Fp64,
	136	.Mips4_32r2,
	137	.Mips3_32r2,
	138	.Mips1,
	139	.Mips4_32,
	140	.Gp64,
	141	.Mips5_32r2,
	142	.Mips64r3,
	143	},
	144	CpuInfo(@This()).create(.Mips64r5, "mips64r5", &[_]FeatureType {
	145	.Mips3_32,
	146	.Fp64,
	147	.Mips4_32r2,
	148	.Mips3_32r2,
	149	.Mips1,
	150	.Mips4_32,
	151	.Gp64,
	152	.Mips5_32r2,
	153	.Mips64r5,
	154	},
	155	CpuInfo(@This()).create(.Mips64r6, "mips64r6", &[_]FeatureType {
	156	.Mips3_32,
	157	.Fp64,
	158	.Mips4_32r2,
	159	.Abs2008,
	160	.Mips3_32r2,
	161	.Mips1,
	162	.Mips4_32,
	163	.Nan2008,
	164	.Gp64,
	165	.Mips5_32r2,
	166	.Mips64r6,
	167	},
	168	CpuInfo(@This()).create(.Octeon, "octeon", &[_]FeatureType {
	169	.Mips3_32,
	170	.Fp64,
	171	.Mips4_32r2,
	172	.Mips3_32r2,
	173	.Mips1,
	174	.Mips4_32,
	175	.Gp64,
	176	.Mips5_32r2,
	177	.Cnmips,
	178	.Mips64r2,
	179	},
	180	CpuInfo(@This()).create(.P5600, "p5600", &[_]FeatureType {
	181	.Mips3_32,
	182	.Mips4_32r2,
	183	.Mips3_32r2,
	184	.Mips1,
	185	.Mips4_32,
	186	.Mips5_32r2,
	187	.P5600,
	188	},
	189	};
	190	};

lib/std/target/cpu/Msp430Cpu.zig created+24

...	...	@@ -0,0 +1,24 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const Msp430Cpu = enum {
	5	Generic,
	6	Msp430,
	7	Msp430x,
	8
	9	pub fn getInfo(self: @This()) CpuInfo {
	10	return cpu_infos[@enumToInt(self)];
	11	}
	12
	13	pub const FeatureType = feature.Msp430Feature;
	14
	15	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	16	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	17	},
	18	CpuInfo(@This()).create(.Msp430, "msp430", &[_]FeatureType {
	19	},
	20	CpuInfo(@This()).create(.Msp430x, "msp430x", &[_]FeatureType {
	21	.Ext,
	22	},
	23	};
	24	};

lib/std/target/cpu/NvptxCpu.zig created+85

...	...	@@ -0,0 +1,85 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const NvptxCpu = enum {
	5	Sm_20,
	6	Sm_21,
	7	Sm_30,
	8	Sm_32,
	9	Sm_35,
	10	Sm_37,
	11	Sm_50,
	12	Sm_52,
	13	Sm_53,
	14	Sm_60,
	15	Sm_61,
	16	Sm_62,
	17	Sm_70,
	18	Sm_72,
	19	Sm_75,
	20
	21	pub fn getInfo(self: @This()) CpuInfo {
	22	return cpu_infos[@enumToInt(self)];
	23	}
	24
	25	pub const FeatureType = feature.NvptxFeature;
	26
	27	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	28	CpuInfo(@This()).create(.Sm_20, "sm_20", &[_]FeatureType {
	29	.Sm_20,
	30	},
	31	CpuInfo(@This()).create(.Sm_21, "sm_21", &[_]FeatureType {
	32	.Sm_21,
	33	},
	34	CpuInfo(@This()).create(.Sm_30, "sm_30", &[_]FeatureType {
	35	.Sm_30,
	36	},
	37	CpuInfo(@This()).create(.Sm_32, "sm_32", &[_]FeatureType {
	38	.Ptx40,
	39	.Sm_32,
	40	},
	41	CpuInfo(@This()).create(.Sm_35, "sm_35", &[_]FeatureType {
	42	.Sm_35,
	43	},
	44	CpuInfo(@This()).create(.Sm_37, "sm_37", &[_]FeatureType {
	45	.Ptx41,
	46	.Sm_37,
	47	},
	48	CpuInfo(@This()).create(.Sm_50, "sm_50", &[_]FeatureType {
	49	.Ptx40,
	50	.Sm_50,
	51	},
	52	CpuInfo(@This()).create(.Sm_52, "sm_52", &[_]FeatureType {
	53	.Ptx41,
	54	.Sm_52,
	55	},
	56	CpuInfo(@This()).create(.Sm_53, "sm_53", &[_]FeatureType {
	57	.Ptx42,
	58	.Sm_53,
	59	},
	60	CpuInfo(@This()).create(.Sm_60, "sm_60", &[_]FeatureType {
	61	.Ptx50,
	62	.Sm_60,
	63	},
	64	CpuInfo(@This()).create(.Sm_61, "sm_61", &[_]FeatureType {
	65	.Ptx50,
	66	.Sm_61,
	67	},
	68	CpuInfo(@This()).create(.Sm_62, "sm_62", &[_]FeatureType {
	69	.Ptx50,
	70	.Sm_62,
	71	},
	72	CpuInfo(@This()).create(.Sm_70, "sm_70", &[_]FeatureType {
	73	.Ptx60,
	74	.Sm_70,
	75	},
	76	CpuInfo(@This()).create(.Sm_72, "sm_72", &[_]FeatureType {
	77	.Ptx61,
	78	.Sm_72,
	79	},
	80	CpuInfo(@This()).create(.Sm_75, "sm_75", &[_]FeatureType {
	81	.Ptx63,
	82	.Sm_75,
	83	},
	84	};
	85	};

lib/std/target/cpu/PowerPcCpu.zig created+451

...	...	@@ -0,0 +1,451 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const PowerPcCpu = enum {
	5	440,
	6	450,
	7	601,
	8	602,
	9	603,
	10	E603,
	11	Ev603,
	12	604,
	13	E604,
	14	620,
	15	7400,
	16	7450,
	17	750,
	18	970,
	19	A2,
	20	A2q,
	21	E500,
	22	E500mc,
	23	E5500,
	24	G3,
	25	G4,
	26	G4+,
	27	G5,
	28	Generic,
	29	Ppc,
	30	Ppc32,
	31	Ppc64,
	32	Ppc64le,
	33	Pwr3,
	34	Pwr4,
	35	Pwr5,
	36	Pwr5x,
	37	Pwr6,
	38	Pwr6x,
	39	Pwr7,
	40	Pwr8,
	41	Pwr9,
	42
	43	pub fn getInfo(self: @This()) CpuInfo {
	44	return cpu_infos[@enumToInt(self)];
	45	}
	46
	47	pub const FeatureType = feature.PowerPcFeature;
	48
	49	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	50	CpuInfo(@This()).create(.440, "440", &[_]FeatureType {
	51	.Icbt,
	52	.Booke,
	53	.HardFloat,
	54	.Fres,
	55	.Frsqrte,
	56	.Isel,
	57	.Msync,
	58	},
	59	CpuInfo(@This()).create(.450, "450", &[_]FeatureType {
	60	.Icbt,
	61	.Booke,
	62	.HardFloat,
	63	.Fres,
	64	.Frsqrte,
	65	.Isel,
	66	.Msync,
	67	},
	68	CpuInfo(@This()).create(.601, "601", &[_]FeatureType {
	69	.HardFloat,
	70	.Fpu,
	71	},
	72	CpuInfo(@This()).create(.602, "602", &[_]FeatureType {
	73	.HardFloat,
	74	.Fpu,
	75	},
	76	CpuInfo(@This()).create(.603, "603", &[_]FeatureType {
	77	.HardFloat,
	78	.Fres,
	79	.Frsqrte,
	80	},
	81	CpuInfo(@This()).create(.E603, "603e", &[_]FeatureType {
	82	.HardFloat,
	83	.Fres,
	84	.Frsqrte,
	85	},
	86	CpuInfo(@This()).create(.Ev603, "603ev", &[_]FeatureType {
	87	.HardFloat,
	88	.Fres,
	89	.Frsqrte,
	90	},
	91	CpuInfo(@This()).create(.604, "604", &[_]FeatureType {
	92	.HardFloat,
	93	.Fres,
	94	.Frsqrte,
	95	},
	96	CpuInfo(@This()).create(.E604, "604e", &[_]FeatureType {
	97	.HardFloat,
	98	.Fres,
	99	.Frsqrte,
	100	},
	101	CpuInfo(@This()).create(.620, "620", &[_]FeatureType {
	102	.HardFloat,
	103	.Fres,
	104	.Frsqrte,
	105	},
	106	CpuInfo(@This()).create(.7400, "7400", &[_]FeatureType {
	107	.HardFloat,
	108	.Altivec,
	109	.Fres,
	110	.Frsqrte,
	111	},
	112	CpuInfo(@This()).create(.7450, "7450", &[_]FeatureType {
	113	.HardFloat,
	114	.Altivec,
	115	.Fres,
	116	.Frsqrte,
	117	},
	118	CpuInfo(@This()).create(.750, "750", &[_]FeatureType {
	119	.HardFloat,
	120	.Fres,
	121	.Frsqrte,
	122	},
	123	CpuInfo(@This()).create(.970, "970", &[_]FeatureType {
	124	.Bit64,
	125	.HardFloat,
	126	.Altivec,
	127	.Fres,
	128	.Frsqrte,
	129	.Fsqrt,
	130	.Mfocrf,
	131	.Stfiwx,
	132	},
	133	CpuInfo(@This()).create(.A2, "a2", &[_]FeatureType {
	134	.Bit64,
	135	.Icbt,
	136	.Booke,
	137	.Cmpb,
	138	.HardFloat,
	139	.Fcpsgn,
	140	.Fpcvt,
	141	.Fprnd,
	142	.Fre,
	143	.Fres,
	144	.Frsqrte,
	145	.Frsqrtes,
	146	.Fsqrt,
	147	.Isel,
	148	.Ldbrx,
	149	.Lfiwax,
	150	.Mfocrf,
	151	.Recipprec,
	152	.Stfiwx,
	153	.SlowPopcntd,
	154	},
	155	CpuInfo(@This()).create(.A2q, "a2q", &[_]FeatureType {
	156	.Bit64,
	157	.Icbt,
	158	.Booke,
	159	.Cmpb,
	160	.HardFloat,
	161	.Fcpsgn,
	162	.Fpcvt,
	163	.Fprnd,
	164	.Fre,
	165	.Fres,
	166	.Frsqrte,
	167	.Frsqrtes,
	168	.Fsqrt,
	169	.Isel,
	170	.Ldbrx,
	171	.Lfiwax,
	172	.Mfocrf,
	173	.Qpx,
	174	.Recipprec,
	175	.Stfiwx,
	176	.SlowPopcntd,
	177	},
	178	CpuInfo(@This()).create(.E500, "e500", &[_]FeatureType {
	179	.Icbt,
	180	.Booke,
	181	.Isel,
	182	},
	183	CpuInfo(@This()).create(.E500mc, "e500mc", &[_]FeatureType {
	184	.Icbt,
	185	.Booke,
	186	.Isel,
	187	.HardFloat,
	188	.Stfiwx,
	189	},
	190	CpuInfo(@This()).create(.E5500, "e5500", &[_]FeatureType {
	191	.Bit64,
	192	.Icbt,
	193	.Booke,
	194	.Isel,
	195	.Mfocrf,
	196	.HardFloat,
	197	.Stfiwx,
	198	},
	199	CpuInfo(@This()).create(.G3, "g3", &[_]FeatureType {
	200	.HardFloat,
	201	.Fres,
	202	.Frsqrte,
	203	},
	204	CpuInfo(@This()).create(.G4, "g4", &[_]FeatureType {
	205	.HardFloat,
	206	.Altivec,
	207	.Fres,
	208	.Frsqrte,
	209	},
	210	CpuInfo(@This()).create(.G4+, "g4+", &[_]FeatureType {
	211	.HardFloat,
	212	.Altivec,
	213	.Fres,
	214	.Frsqrte,
	215	},
	216	CpuInfo(@This()).create(.G5, "g5", &[_]FeatureType {
	217	.Bit64,
	218	.HardFloat,
	219	.Altivec,
	220	.Fres,
	221	.Frsqrte,
	222	.Fsqrt,
	223	.Mfocrf,
	224	.Stfiwx,
	225	},
	226	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	227	.HardFloat,
	228	},
	229	CpuInfo(@This()).create(.Ppc, "ppc", &[_]FeatureType {
	230	.HardFloat,
	231	},
	232	CpuInfo(@This()).create(.Ppc32, "ppc32", &[_]FeatureType {
	233	.HardFloat,
	234	},
	235	CpuInfo(@This()).create(.Ppc64, "ppc64", &[_]FeatureType {
	236	.Bit64,
	237	.HardFloat,
	238	.Altivec,
	239	.Fres,
	240	.Frsqrte,
	241	.Fsqrt,
	242	.Mfocrf,
	243	.Stfiwx,
	244	},
	245	CpuInfo(@This()).create(.Ppc64le, "ppc64le", &[_]FeatureType {
	246	.Bit64,
	247	.HardFloat,
	248	.Altivec,
	249	.Bpermd,
	250	.Cmpb,
	251	.DirectMove,
	252	.Extdiv,
	253	.Fcpsgn,
	254	.Fpcvt,
	255	.Fprnd,
	256	.Fre,
	257	.Fres,
	258	.Frsqrte,
	259	.Frsqrtes,
	260	.Fsqrt,
	261	.Htm,
	262	.Icbt,
	263	.Isel,
	264	.Ldbrx,
	265	.Lfiwax,
	266	.Mfocrf,
	267	.Power8Altivec,
	268	.Crypto,
	269	.Power8Vector,
	270	.Popcntd,
	271	.PartwordAtomics,
	272	.Recipprec,
	273	.Stfiwx,
	274	.TwoConstNr,
	275	.Vsx,
	276	},
	277	CpuInfo(@This()).create(.Pwr3, "pwr3", &[_]FeatureType {
	278	.Bit64,
	279	.HardFloat,
	280	.Altivec,
	281	.Fres,
	282	.Frsqrte,
	283	.Mfocrf,
	284	.Stfiwx,
	285	},
	286	CpuInfo(@This()).create(.Pwr4, "pwr4", &[_]FeatureType {
	287	.Bit64,
	288	.HardFloat,
	289	.Altivec,
	290	.Fres,
	291	.Frsqrte,
	292	.Fsqrt,
	293	.Mfocrf,
	294	.Stfiwx,
	295	},
	296	CpuInfo(@This()).create(.Pwr5, "pwr5", &[_]FeatureType {
	297	.Bit64,
	298	.HardFloat,
	299	.Altivec,
	300	.Fre,
	301	.Fres,
	302	.Frsqrte,
	303	.Frsqrtes,
	304	.Fsqrt,
	305	.Mfocrf,
	306	.Stfiwx,
	307	},
	308	CpuInfo(@This()).create(.Pwr5x, "pwr5x", &[_]FeatureType {
	309	.Bit64,
	310	.HardFloat,
	311	.Altivec,
	312	.Fprnd,
	313	.Fre,
	314	.Fres,
	315	.Frsqrte,
	316	.Frsqrtes,
	317	.Fsqrt,
	318	.Mfocrf,
	319	.Stfiwx,
	320	},
	321	CpuInfo(@This()).create(.Pwr6, "pwr6", &[_]FeatureType {
	322	.Bit64,
	323	.HardFloat,
	324	.Altivec,
	325	.Cmpb,
	326	.Fcpsgn,
	327	.Fprnd,
	328	.Fre,
	329	.Fres,
	330	.Frsqrte,
	331	.Frsqrtes,
	332	.Fsqrt,
	333	.Lfiwax,
	334	.Mfocrf,
	335	.Recipprec,
	336	.Stfiwx,
	337	},
	338	CpuInfo(@This()).create(.Pwr6x, "pwr6x", &[_]FeatureType {
	339	.Bit64,
	340	.HardFloat,
	341	.Altivec,
	342	.Cmpb,
	343	.Fcpsgn,
	344	.Fprnd,
	345	.Fre,
	346	.Fres,
	347	.Frsqrte,
	348	.Frsqrtes,
	349	.Fsqrt,
	350	.Lfiwax,
	351	.Mfocrf,
	352	.Recipprec,
	353	.Stfiwx,
	354	},
	355	CpuInfo(@This()).create(.Pwr7, "pwr7", &[_]FeatureType {
	356	.Bit64,
	357	.HardFloat,
	358	.Altivec,
	359	.Bpermd,
	360	.Cmpb,
	361	.Extdiv,
	362	.Fcpsgn,
	363	.Fpcvt,
	364	.Fprnd,
	365	.Fre,
	366	.Fres,
	367	.Frsqrte,
	368	.Frsqrtes,
	369	.Fsqrt,
	370	.Isel,
	371	.Ldbrx,
	372	.Lfiwax,
	373	.Mfocrf,
	374	.Popcntd,
	375	.Recipprec,
	376	.Stfiwx,
	377	.TwoConstNr,
	378	.Vsx,
	379	},
	380	CpuInfo(@This()).create(.Pwr8, "pwr8", &[_]FeatureType {
	381	.Bit64,
	382	.HardFloat,
	383	.Altivec,
	384	.Bpermd,
	385	.Cmpb,
	386	.DirectMove,
	387	.Extdiv,
	388	.Fcpsgn,
	389	.Fpcvt,
	390	.Fprnd,
	391	.Fre,
	392	.Fres,
	393	.Frsqrte,
	394	.Frsqrtes,
	395	.Fsqrt,
	396	.Htm,
	397	.Icbt,
	398	.Isel,
	399	.Ldbrx,
	400	.Lfiwax,
	401	.Mfocrf,
	402	.Power8Altivec,
	403	.Crypto,
	404	.Power8Vector,
	405	.Popcntd,
	406	.PartwordAtomics,
	407	.Recipprec,
	408	.Stfiwx,
	409	.TwoConstNr,
	410	.Vsx,
	411	},
	412	CpuInfo(@This()).create(.Pwr9, "pwr9", &[_]FeatureType {
	413	.Bit64,
	414	.HardFloat,
	415	.Altivec,
	416	.Bpermd,
	417	.Cmpb,
	418	.DirectMove,
	419	.Extdiv,
	420	.Fcpsgn,
	421	.Fpcvt,
	422	.Fprnd,
	423	.Fre,
	424	.Fres,
	425	.Frsqrte,
	426	.Frsqrtes,
	427	.Fsqrt,
	428	.Htm,
	429	.Icbt,
	430	.IsaV30Instructions,
	431	.Isel,
	432	.Ldbrx,
	433	.Lfiwax,
	434	.Mfocrf,
	435	.Power8Altivec,
	436	.Crypto,
	437	.Power8Vector,
	438	.Power9Altivec,
	439	.Power9Vector,
	440	.Popcntd,
	441	.PpcPostraSched,
	442	.PpcPreraSched,
	443	.PartwordAtomics,
	444	.Recipprec,
	445	.Stfiwx,
	446	.TwoConstNr,
	447	.Vsx,
	448	.VectorsUseTwoUnits,
	449	},
	450	};
	451	};

lib/std/target/cpu/RiscVCpu.zig created+23

...	...	@@ -0,0 +1,23 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const RiscVCpu = enum {
	5	GenericRv32,
	6	GenericRv64,
	7
	8	pub fn getInfo(self: @This()) CpuInfo {
	9	return cpu_infos[@enumToInt(self)];
	10	}
	11
	12	pub const FeatureType = feature.RiscVFeature;
	13
	14	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	15	CpuInfo(@This()).create(.GenericRv32, "generic-rv32", &[_]FeatureType {
	16	.RvcHints,
	17	},
	18	CpuInfo(@This()).create(.GenericRv64, "generic-rv64", &[_]FeatureType {
	19	.Bit64,
	20	.RvcHints,
	21	},
	22	};
	23	};

lib/std/target/cpu/SparcCpu.zig created+216

...	...	@@ -0,0 +1,216 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const SparcCpu = enum {
	5	At697e,
	6	At697f,
	7	F934,
	8	Generic,
	9	Gr712rc,
	10	Gr740,
	11	Hypersparc,
	12	Leon2,
	13	Leon3,
	14	Leon4,
	15	Ma2080,
	16	Ma2085,
	17	Ma2100,
	18	Ma2150,
	19	Ma2155,
	20	Ma2450,
	21	Ma2455,
	22	Ma2480,
	23	Ma2485,
	24	Ma2x5x,
	25	Ma2x8x,
	26	Myriad2,
	27	Myriad21,
	28	Myriad22,
	29	Myriad23,
	30	Niagara,
	31	Niagara2,
	32	Niagara3,
	33	Niagara4,
	34	Sparclet,
	35	Sparclite,
	36	Sparclite86x,
	37	Supersparc,
	38	Tsc701,
	39	Ultrasparc,
	40	Ultrasparc3,
	41	Ut699,
	42	V7,
	43	V8,
	44	V9,
	45
	46	pub fn getInfo(self: @This()) CpuInfo {
	47	return cpu_infos[@enumToInt(self)];
	48	}
	49
	50	pub const FeatureType = feature.SparcFeature;
	51
	52	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	53	CpuInfo(@This()).create(.At697e, "at697e", &[_]FeatureType {
	54	.Leon,
	55	.Insertnopload,
	56	},
	57	CpuInfo(@This()).create(.At697f, "at697f", &[_]FeatureType {
	58	.Leon,
	59	.Insertnopload,
	60	},
	61	CpuInfo(@This()).create(.F934, "f934", &[_]FeatureType {
	62	},
	63	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	64	},
	65	CpuInfo(@This()).create(.Gr712rc, "gr712rc", &[_]FeatureType {
	66	.Leon,
	67	.Hasleoncasa,
	68	},
	69	CpuInfo(@This()).create(.Gr740, "gr740", &[_]FeatureType {
	70	.Leon,
	71	.Leonpwrpsr,
	72	.Hasleoncasa,
	73	.Leoncyclecounter,
	74	.Hasumacsmac,
	75	},
	76	CpuInfo(@This()).create(.Hypersparc, "hypersparc", &[_]FeatureType {
	77	},
	78	CpuInfo(@This()).create(.Leon2, "leon2", &[_]FeatureType {
	79	.Leon,
	80	},
	81	CpuInfo(@This()).create(.Leon3, "leon3", &[_]FeatureType {
	82	.Leon,
	83	.Hasumacsmac,
	84	},
	85	CpuInfo(@This()).create(.Leon4, "leon4", &[_]FeatureType {
	86	.Leon,
	87	.Hasleoncasa,
	88	.Hasumacsmac,
	89	},
	90	CpuInfo(@This()).create(.Ma2080, "ma2080", &[_]FeatureType {
	91	.Leon,
	92	.Hasleoncasa,
	93	},
	94	CpuInfo(@This()).create(.Ma2085, "ma2085", &[_]FeatureType {
	95	.Leon,
	96	.Hasleoncasa,
	97	},
	98	CpuInfo(@This()).create(.Ma2100, "ma2100", &[_]FeatureType {
	99	.Leon,
	100	.Hasleoncasa,
	101	},
	102	CpuInfo(@This()).create(.Ma2150, "ma2150", &[_]FeatureType {
	103	.Leon,
	104	.Hasleoncasa,
	105	},
	106	CpuInfo(@This()).create(.Ma2155, "ma2155", &[_]FeatureType {
	107	.Leon,
	108	.Hasleoncasa,
	109	},
	110	CpuInfo(@This()).create(.Ma2450, "ma2450", &[_]FeatureType {
	111	.Leon,
	112	.Hasleoncasa,
	113	},
	114	CpuInfo(@This()).create(.Ma2455, "ma2455", &[_]FeatureType {
	115	.Leon,
	116	.Hasleoncasa,
	117	},
	118	CpuInfo(@This()).create(.Ma2480, "ma2480", &[_]FeatureType {
	119	.Leon,
	120	.Hasleoncasa,
	121	},
	122	CpuInfo(@This()).create(.Ma2485, "ma2485", &[_]FeatureType {
	123	.Leon,
	124	.Hasleoncasa,
	125	},
	126	CpuInfo(@This()).create(.Ma2x5x, "ma2x5x", &[_]FeatureType {
	127	.Leon,
	128	.Hasleoncasa,
	129	},
	130	CpuInfo(@This()).create(.Ma2x8x, "ma2x8x", &[_]FeatureType {
	131	.Leon,
	132	.Hasleoncasa,
	133	},
	134	CpuInfo(@This()).create(.Myriad2, "myriad2", &[_]FeatureType {
	135	.Leon,
	136	.Hasleoncasa,
	137	},
	138	CpuInfo(@This()).create(.Myriad21, "myriad2.1", &[_]FeatureType {
	139	.Leon,
	140	.Hasleoncasa,
	141	},
	142	CpuInfo(@This()).create(.Myriad22, "myriad2.2", &[_]FeatureType {
	143	.Leon,
	144	.Hasleoncasa,
	145	},
	146	CpuInfo(@This()).create(.Myriad23, "myriad2.3", &[_]FeatureType {
	147	.Leon,
	148	.Hasleoncasa,
	149	},
	150	CpuInfo(@This()).create(.Niagara, "niagara", &[_]FeatureType {
	151	.DeprecatedV8,
	152	.V9,
	153	.Vis,
	154	.Vis2,
	155	},
	156	CpuInfo(@This()).create(.Niagara2, "niagara2", &[_]FeatureType {
	157	.DeprecatedV8,
	158	.V9,
	159	.Vis,
	160	.Vis2,
	161	.Popc,
	162	},
	163	CpuInfo(@This()).create(.Niagara3, "niagara3", &[_]FeatureType {
	164	.DeprecatedV8,
	165	.V9,
	166	.Vis,
	167	.Vis2,
	168	.Popc,
	169	},
	170	CpuInfo(@This()).create(.Niagara4, "niagara4", &[_]FeatureType {
	171	.DeprecatedV8,
	172	.V9,
	173	.Vis,
	174	.Vis2,
	175	.Vis3,
	176	.Popc,
	177	},
	178	CpuInfo(@This()).create(.Sparclet, "sparclet", &[_]FeatureType {
	179	},
	180	CpuInfo(@This()).create(.Sparclite, "sparclite", &[_]FeatureType {
	181	},
	182	CpuInfo(@This()).create(.Sparclite86x, "sparclite86x", &[_]FeatureType {
	183	},
	184	CpuInfo(@This()).create(.Supersparc, "supersparc", &[_]FeatureType {
	185	},
	186	CpuInfo(@This()).create(.Tsc701, "tsc701", &[_]FeatureType {
	187	},
	188	CpuInfo(@This()).create(.Ultrasparc, "ultrasparc", &[_]FeatureType {
	189	.DeprecatedV8,
	190	.V9,
	191	.Vis,
	192	},
	193	CpuInfo(@This()).create(.Ultrasparc3, "ultrasparc3", &[_]FeatureType {
	194	.DeprecatedV8,
	195	.V9,
	196	.Vis,
	197	.Vis2,
	198	},
	199	CpuInfo(@This()).create(.Ut699, "ut699", &[_]FeatureType {
	200	.Leon,
	201	.NoFmuls,
	202	.NoFsmuld,
	203	.Fixallfdivsqrt,
	204	.Insertnopload,
	205	},
	206	CpuInfo(@This()).create(.V7, "v7", &[_]FeatureType {
	207	.NoFsmuld,
	208	.SoftMulDiv,
	209	},
	210	CpuInfo(@This()).create(.V8, "v8", &[_]FeatureType {
	211	},
	212	CpuInfo(@This()).create(.V9, "v9", &[_]FeatureType {
	213	.V9,
	214	},
	215	};
	216	};

lib/std/target/cpu/SystemZCpu.zig created+279

...	...	@@ -0,0 +1,279 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const SystemZCpu = enum {
	5	Arch10,
	6	Arch11,
	7	Arch12,
	8	Arch13,
	9	Arch8,
	10	Arch9,
	11	Generic,
	12	Z10,
	13	Z13,
	14	Z14,
	15	Z15,
	16	Z196,
	17	ZEC12,
	18
	19	pub fn getInfo(self: @This()) CpuInfo {
	20	return cpu_infos[@enumToInt(self)];
	21	}
	22
	23	pub const FeatureType = feature.SystemZFeature;
	24
	25	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	26	CpuInfo(@This()).create(.Arch10, "arch10", &[_]FeatureType {
	27	.DfpZonedConversion,
	28	.DistinctOps,
	29	.EnhancedDat2,
	30	.ExecutionHint,
	31	.FpExtension,
	32	.FastSerialization,
	33	.HighWord,
	34	.InterlockedAccess1,
	35	.LoadAndTrap,
	36	.LoadStoreOnCond,
	37	.MessageSecurityAssistExtension3,
	38	.MessageSecurityAssistExtension4,
	39	.MiscellaneousExtensions,
	40	.PopulationCount,
	41	.ProcessorAssist,
	42	.ResetReferenceBitsMultiple,
	43	.TransactionalExecution,
	44	},
	45	CpuInfo(@This()).create(.Arch11, "arch11", &[_]FeatureType {
	46	.DfpPackedConversion,
	47	.DfpZonedConversion,
	48	.DistinctOps,
	49	.EnhancedDat2,
	50	.ExecutionHint,
	51	.FpExtension,
	52	.FastSerialization,
	53	.HighWord,
	54	.InterlockedAccess1,
	55	.LoadAndTrap,
	56	.LoadAndZeroRightmostByte,
	57	.LoadStoreOnCond,
	58	.LoadStoreOnCond2,
	59	.MessageSecurityAssistExtension3,
	60	.MessageSecurityAssistExtension4,
	61	.MessageSecurityAssistExtension5,
	62	.MiscellaneousExtensions,
	63	.PopulationCount,
	64	.ProcessorAssist,
	65	.ResetReferenceBitsMultiple,
	66	.TransactionalExecution,
	67	.Vector,
	68	},
	69	CpuInfo(@This()).create(.Arch12, "arch12", &[_]FeatureType {
	70	.DfpPackedConversion,
	71	.DfpZonedConversion,
	72	.DistinctOps,
	73	.EnhancedDat2,
	74	.ExecutionHint,
	75	.FpExtension,
	76	.FastSerialization,
	77	.GuardedStorage,
	78	.HighWord,
	79	.InsertReferenceBitsMultiple,
	80	.InterlockedAccess1,
	81	.LoadAndTrap,
	82	.LoadAndZeroRightmostByte,
	83	.LoadStoreOnCond,
	84	.LoadStoreOnCond2,
	85	.MessageSecurityAssistExtension3,
	86	.MessageSecurityAssistExtension4,
	87	.MessageSecurityAssistExtension5,
	88	.MessageSecurityAssistExtension7,
	89	.MessageSecurityAssistExtension8,
	90	.MiscellaneousExtensions,
	91	.MiscellaneousExtensions2,
	92	.PopulationCount,
	93	.ProcessorAssist,
	94	.ResetReferenceBitsMultiple,
	95	.TransactionalExecution,
	96	.Vector,
	97	.VectorEnhancements1,
	98	.VectorPackedDecimal,
	99	},
	100	CpuInfo(@This()).create(.Arch13, "arch13", &[_]FeatureType {
	101	.DfpPackedConversion,
	102	.DfpZonedConversion,
	103	.DeflateConversion,
	104	.DistinctOps,
	105	.EnhancedDat2,
	106	.EnhancedSort,
	107	.ExecutionHint,
	108	.FpExtension,
	109	.FastSerialization,
	110	.GuardedStorage,
	111	.HighWord,
	112	.InsertReferenceBitsMultiple,
	113	.InterlockedAccess1,
	114	.LoadAndTrap,
	115	.LoadAndZeroRightmostByte,
	116	.LoadStoreOnCond,
	117	.LoadStoreOnCond2,
	118	.MessageSecurityAssistExtension3,
	119	.MessageSecurityAssistExtension4,
	120	.MessageSecurityAssistExtension5,
	121	.MessageSecurityAssistExtension7,
	122	.MessageSecurityAssistExtension8,
	123	.MessageSecurityAssistExtension9,
	124	.MiscellaneousExtensions,
	125	.MiscellaneousExtensions2,
	126	.MiscellaneousExtensions3,
	127	.PopulationCount,
	128	.ProcessorAssist,
	129	.ResetReferenceBitsMultiple,
	130	.TransactionalExecution,
	131	.Vector,
	132	.VectorEnhancements1,
	133	.VectorEnhancements2,
	134	.VectorPackedDecimal,
	135	.VectorPackedDecimalEnhancement,
	136	},
	137	CpuInfo(@This()).create(.Arch8, "arch8", &[_]FeatureType {
	138	},
	139	CpuInfo(@This()).create(.Arch9, "arch9", &[_]FeatureType {
	140	.DistinctOps,
	141	.FpExtension,
	142	.FastSerialization,
	143	.HighWord,
	144	.InterlockedAccess1,
	145	.LoadStoreOnCond,
	146	.MessageSecurityAssistExtension3,
	147	.MessageSecurityAssistExtension4,
	148	.PopulationCount,
	149	.ResetReferenceBitsMultiple,
	150	},
	151	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	152	},
	153	CpuInfo(@This()).create(.Z10, "z10", &[_]FeatureType {
	154	},
	155	CpuInfo(@This()).create(.Z13, "z13", &[_]FeatureType {
	156	.DfpPackedConversion,
	157	.DfpZonedConversion,
	158	.DistinctOps,
	159	.EnhancedDat2,
	160	.ExecutionHint,
	161	.FpExtension,
	162	.FastSerialization,
	163	.HighWord,
	164	.InterlockedAccess1,
	165	.LoadAndTrap,
	166	.LoadAndZeroRightmostByte,
	167	.LoadStoreOnCond,
	168	.LoadStoreOnCond2,
	169	.MessageSecurityAssistExtension3,
	170	.MessageSecurityAssistExtension4,
	171	.MessageSecurityAssistExtension5,
	172	.MiscellaneousExtensions,
	173	.PopulationCount,
	174	.ProcessorAssist,
	175	.ResetReferenceBitsMultiple,
	176	.TransactionalExecution,
	177	.Vector,
	178	},
	179	CpuInfo(@This()).create(.Z14, "z14", &[_]FeatureType {
	180	.DfpPackedConversion,
	181	.DfpZonedConversion,
	182	.DistinctOps,
	183	.EnhancedDat2,
	184	.ExecutionHint,
	185	.FpExtension,
	186	.FastSerialization,
	187	.GuardedStorage,
	188	.HighWord,
	189	.InsertReferenceBitsMultiple,
	190	.InterlockedAccess1,
	191	.LoadAndTrap,
	192	.LoadAndZeroRightmostByte,
	193	.LoadStoreOnCond,
	194	.LoadStoreOnCond2,
	195	.MessageSecurityAssistExtension3,
	196	.MessageSecurityAssistExtension4,
	197	.MessageSecurityAssistExtension5,
	198	.MessageSecurityAssistExtension7,
	199	.MessageSecurityAssistExtension8,
	200	.MiscellaneousExtensions,
	201	.MiscellaneousExtensions2,
	202	.PopulationCount,
	203	.ProcessorAssist,
	204	.ResetReferenceBitsMultiple,
	205	.TransactionalExecution,
	206	.Vector,
	207	.VectorEnhancements1,
	208	.VectorPackedDecimal,
	209	},
	210	CpuInfo(@This()).create(.Z15, "z15", &[_]FeatureType {
	211	.DfpPackedConversion,
	212	.DfpZonedConversion,
	213	.DeflateConversion,
	214	.DistinctOps,
	215	.EnhancedDat2,
	216	.EnhancedSort,
	217	.ExecutionHint,
	218	.FpExtension,
	219	.FastSerialization,
	220	.GuardedStorage,
	221	.HighWord,
	222	.InsertReferenceBitsMultiple,
	223	.InterlockedAccess1,
	224	.LoadAndTrap,
	225	.LoadAndZeroRightmostByte,
	226	.LoadStoreOnCond,
	227	.LoadStoreOnCond2,
	228	.MessageSecurityAssistExtension3,
	229	.MessageSecurityAssistExtension4,
	230	.MessageSecurityAssistExtension5,
	231	.MessageSecurityAssistExtension7,
	232	.MessageSecurityAssistExtension8,
	233	.MessageSecurityAssistExtension9,
	234	.MiscellaneousExtensions,
	235	.MiscellaneousExtensions2,
	236	.MiscellaneousExtensions3,
	237	.PopulationCount,
	238	.ProcessorAssist,
	239	.ResetReferenceBitsMultiple,
	240	.TransactionalExecution,
	241	.Vector,
	242	.VectorEnhancements1,
	243	.VectorEnhancements2,
	244	.VectorPackedDecimal,
	245	.VectorPackedDecimalEnhancement,
	246	},
	247	CpuInfo(@This()).create(.Z196, "z196", &[_]FeatureType {
	248	.DistinctOps,
	249	.FpExtension,
	250	.FastSerialization,
	251	.HighWord,
	252	.InterlockedAccess1,
	253	.LoadStoreOnCond,
	254	.MessageSecurityAssistExtension3,
	255	.MessageSecurityAssistExtension4,
	256	.PopulationCount,
	257	.ResetReferenceBitsMultiple,
	258	},
	259	CpuInfo(@This()).create(.ZEC12, "zEC12", &[_]FeatureType {
	260	.DfpZonedConversion,
	261	.DistinctOps,
	262	.EnhancedDat2,
	263	.ExecutionHint,
	264	.FpExtension,
	265	.FastSerialization,
	266	.HighWord,
	267	.InterlockedAccess1,
	268	.LoadAndTrap,
	269	.LoadStoreOnCond,
	270	.MessageSecurityAssistExtension3,
	271	.MessageSecurityAssistExtension4,
	272	.MiscellaneousExtensions,
	273	.PopulationCount,
	274	.ProcessorAssist,
	275	.ResetReferenceBitsMultiple,
	276	.TransactionalExecution,
	277	},
	278	};
	279	};

lib/std/target/cpu/WebAssemblyCpu.zig created+28

...	...	@@ -0,0 +1,28 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const WebAssemblyCpu = enum {
	5	BleedingEdge,
	6	Generic,
	7	Mvp,
	8
	9	pub fn getInfo(self: @This()) CpuInfo {
	10	return cpu_infos[@enumToInt(self)];
	11	}
	12
	13	pub const FeatureType = feature.WebAssemblyFeature;
	14
	15	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	16	CpuInfo(@This()).create(.BleedingEdge, "bleeding-edge", &[_]FeatureType {
	17	.Atomics,
	18	.MutableGlobals,
	19	.NontrappingFptoint,
	20	.Simd128,
	21	.SignExt,
	22	},
	23	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	24	},
	25	CpuInfo(@This()).create(.Mvp, "mvp", &[_]FeatureType {
	26	},
	27	};
	28	};

lib/std/target/cpu/X86Cpu.zig created+1864

...	...	@@ -0,0 +1,1864 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const X86Cpu = enum {
	5	Amdfam10,
	6	Athlon,
	7	Athlon4,
	8	AthlonFx,
	9	AthlonMp,
	10	AthlonTbird,
	11	AthlonXp,
	12	Athlon64,
	13	Athlon64Sse3,
	14	Atom,
	15	Barcelona,
	16	Bdver1,
	17	Bdver2,
	18	Bdver3,
	19	Bdver4,
	20	Bonnell,
	21	Broadwell,
	22	Btver1,
	23	Btver2,
	24	C3,
	25	C32,
	26	Cannonlake,
	27	Cascadelake,
	28	Cooperlake,
	29	CoreAvxI,
	30	CoreAvx2,
	31	Core2,
	32	Corei7,
	33	Corei7Avx,
	34	Generic,
	35	Geode,
	36	Goldmont,
	37	GoldmontPlus,
	38	Haswell,
	39	I386,
	40	I486,
	41	I586,
	42	I686,
	43	IcelakeClient,
	44	IcelakeServer,
	45	Ivybridge,
	46	K6,
	47	K62,
	48	K63,
	49	K8,
	50	K8Sse3,
	51	Knl,
	52	Knm,
	53	Lakemont,
	54	Nehalem,
	55	Nocona,
	56	Opteron,
	57	OpteronSse3,
	58	Penryn,
	59	Pentium,
	60	PentiumM,
	61	PentiumMmx,
	62	Pentium2,
	63	Pentium3,
	64	Pentium3m,
	65	Pentium4,
	66	Pentium4m,
	67	Pentiumpro,
	68	Prescott,
	69	Sandybridge,
	70	Silvermont,
	71	Skx,
	72	Skylake,
	73	SkylakeAvx512,
	74	Slm,
	75	Tigerlake,
	76	Tremont,
	77	Westmere,
	78	WinchipC6,
	79	Winchip2,
	80	X8664,
	81	Yonah,
	82	Znver1,
	83	Znver2,
	84
	85	pub fn getInfo(self: @This()) CpuInfo {
	86	return cpu_infos[@enumToInt(self)];
	87	}
	88
	89	pub const FeatureType = feature.X86Feature;
	90
	91	const cpu_infos = [@memberCount(@This())]CpuInfo(@This()) {
	92	CpuInfo(@This()).create(.Amdfam10, "amdfam10", &[_]FeatureType {
	93	.Mmx,
	94	.Dnowa3,
	95	.Bit64,
	96	.Cmov,
	97	.Cx8,
	98	.Cx16,
	99	.Fxsr,
	100	.FastScalarShiftMasks,
	101	.Sahf,
	102	.Lzcnt,
	103	.Nopl,
	104	.Popcnt,
	105	.Sse,
	106	.Sse4a,
	107	.SlowShld,
	108	.X87,
	109	},
	110	CpuInfo(@This()).create(.Athlon, "athlon", &[_]FeatureType {
	111	.Mmx,
	112	.Dnowa3,
	113	.Cmov,
	114	.Cx8,
	115	.Nopl,
	116	.SlowShld,
	117	.SlowUnalignedMem16,
	118	.X87,
	119	},
	120	CpuInfo(@This()).create(.Athlon4, "athlon-4", &[_]FeatureType {
	121	.Mmx,
	122	.Dnowa3,
	123	.Cmov,
	124	.Cx8,
	125	.Fxsr,
	126	.Nopl,
	127	.Sse,
	128	.SlowShld,
	129	.SlowUnalignedMem16,
	130	.X87,
	131	},
	132	CpuInfo(@This()).create(.AthlonFx, "athlon-fx", &[_]FeatureType {
	133	.Mmx,
	134	.Dnowa3,
	135	.Bit64,
	136	.Cmov,
	137	.Cx8,
	138	.Fxsr,
	139	.FastScalarShiftMasks,
	140	.Nopl,
	141	.Sse,
	142	.Sse2,
	143	.SlowShld,
	144	.SlowUnalignedMem16,
	145	.X87,
	146	},
	147	CpuInfo(@This()).create(.AthlonMp, "athlon-mp", &[_]FeatureType {
	148	.Mmx,
	149	.Dnowa3,
	150	.Cmov,
	151	.Cx8,
	152	.Fxsr,
	153	.Nopl,
	154	.Sse,
	155	.SlowShld,
	156	.SlowUnalignedMem16,
	157	.X87,
	158	},
	159	CpuInfo(@This()).create(.AthlonTbird, "athlon-tbird", &[_]FeatureType {
	160	.Mmx,
	161	.Dnowa3,
	162	.Cmov,
	163	.Cx8,
	164	.Nopl,
	165	.SlowShld,
	166	.SlowUnalignedMem16,
	167	.X87,
	168	},
	169	CpuInfo(@This()).create(.AthlonXp, "athlon-xp", &[_]FeatureType {
	170	.Mmx,
	171	.Dnowa3,
	172	.Cmov,
	173	.Cx8,
	174	.Fxsr,
	175	.Nopl,
	176	.Sse,
	177	.SlowShld,
	178	.SlowUnalignedMem16,
	179	.X87,
	180	},
	181	CpuInfo(@This()).create(.Athlon64, "athlon64", &[_]FeatureType {
	182	.Mmx,
	183	.Dnowa3,
	184	.Bit64,
	185	.Cmov,
	186	.Cx8,
	187	.Fxsr,
	188	.FastScalarShiftMasks,
	189	.Nopl,
	190	.Sse,
	191	.Sse2,
	192	.SlowShld,
	193	.SlowUnalignedMem16,
	194	.X87,
	195	},
	196	CpuInfo(@This()).create(.Athlon64Sse3, "athlon64-sse3", &[_]FeatureType {
	197	.Mmx,
	198	.Dnowa3,
	199	.Bit64,
	200	.Cmov,
	201	.Cx8,
	202	.Cx16,
	203	.Fxsr,
	204	.FastScalarShiftMasks,
	205	.Nopl,
	206	.Sse,
	207	.Sse3,
	208	.SlowShld,
	209	.SlowUnalignedMem16,
	210	.X87,
	211	},
	212	CpuInfo(@This()).create(.Atom, "atom", &[_]FeatureType {
	213	.Bit64,
	214	.Cmov,
	215	.Cx8,
	216	.Cx16,
	217	.Fxsr,
	218	.Sahf,
	219	.LeaSp,
	220	.LeaUsesAg,
	221	.Mmx,
	222	.Movbe,
	223	.Nopl,
	224	.PadShortFunctions,
	225	.Sse,
	226	.Ssse3,
	227	.IdivlToDivb,
	228	.IdivqToDivl,
	229	.SlowTwoMemOps,
	230	.SlowUnalignedMem16,
	231	.X87,
	232	},
	233	CpuInfo(@This()).create(.Barcelona, "barcelona", &[_]FeatureType {
	234	.Mmx,
	235	.Dnowa3,
	236	.Bit64,
	237	.Cmov,
	238	.Cx8,
	239	.Cx16,
	240	.Fxsr,
	241	.FastScalarShiftMasks,
	242	.Sahf,
	243	.Lzcnt,
	244	.Nopl,
	245	.Popcnt,
	246	.Sse,
	247	.Sse4a,
	248	.SlowShld,
	249	.X87,
	250	},
	251	CpuInfo(@This()).create(.Bdver1, "bdver1", &[_]FeatureType {
	252	.Bit64,
	253	.Sse,
	254	.Aes,
	255	.Branchfusion,
	256	.Cmov,
	257	.Cx8,
	258	.Cx16,
	259	.Fxsr,
	260	.Fast11bytenop,
	261	.FastScalarShiftMasks,
	262	.Sahf,
	263	.Lwp,
	264	.Lzcnt,
	265	.Mmx,
	266	.Nopl,
	267	.Pclmul,
	268	.Popcnt,
	269	.Prfchw,
	270	.SlowShld,
	271	.X87,
	272	.Xop,
	273	.Xsave,
	274	},
	275	CpuInfo(@This()).create(.Bdver2, "bdver2", &[_]FeatureType {
	276	.Bit64,
	277	.Sse,
	278	.Aes,
	279	.Bmi,
	280	.Branchfusion,
	281	.Cmov,
	282	.Cx8,
	283	.Cx16,
	284	.F16c,
	285	.Fma,
	286	.Fxsr,
	287	.Fast11bytenop,
	288	.FastBextr,
	289	.FastScalarShiftMasks,
	290	.Sahf,
	291	.Lwp,
	292	.Lzcnt,
	293	.Mmx,
	294	.Nopl,
	295	.Pclmul,
	296	.Popcnt,
	297	.Prfchw,
	298	.SlowShld,
	299	.Tbm,
	300	.X87,
	301	.Xop,
	302	.Xsave,
	303	},
	304	CpuInfo(@This()).create(.Bdver3, "bdver3", &[_]FeatureType {
	305	.Bit64,
	306	.Sse,
	307	.Aes,
	308	.Bmi,
	309	.Branchfusion,
	310	.Cmov,
	311	.Cx8,
	312	.Cx16,
	313	.F16c,
	314	.Fma,
	315	.Fsgsbase,
	316	.Fxsr,
	317	.Fast11bytenop,
	318	.FastBextr,
	319	.FastScalarShiftMasks,
	320	.Sahf,
	321	.Lwp,
	322	.Lzcnt,
	323	.Mmx,
	324	.Nopl,
	325	.Pclmul,
	326	.Popcnt,
	327	.Prfchw,
	328	.SlowShld,
	329	.Tbm,
	330	.X87,
	331	.Xop,
	332	.Xsave,
	333	.Xsaveopt,
	334	},
	335	CpuInfo(@This()).create(.Bdver4, "bdver4", &[_]FeatureType {
	336	.Bit64,
	337	.Sse,
	338	.Aes,
	339	.Avx2,
	340	.Bmi,
	341	.Bmi2,
	342	.Branchfusion,
	343	.Cmov,
	344	.Cx8,
	345	.Cx16,
	346	.F16c,
	347	.Fma,
	348	.Fsgsbase,
	349	.Fxsr,
	350	.Fast11bytenop,
	351	.FastBextr,
	352	.FastScalarShiftMasks,
	353	.Sahf,
	354	.Lwp,
	355	.Lzcnt,
	356	.Mmx,
	357	.Mwaitx,
	358	.Nopl,
	359	.Pclmul,
	360	.Popcnt,
	361	.Prfchw,
	362	.SlowShld,
	363	.Tbm,
	364	.X87,
	365	.Xop,
	366	.Xsave,
	367	.Xsaveopt,
	368	},
	369	CpuInfo(@This()).create(.Bonnell, "bonnell", &[_]FeatureType {
	370	.Bit64,
	371	.Cmov,
	372	.Cx8,
	373	.Cx16,
	374	.Fxsr,
	375	.Sahf,
	376	.LeaSp,
	377	.LeaUsesAg,
	378	.Mmx,
	379	.Movbe,
	380	.Nopl,
	381	.PadShortFunctions,
	382	.Sse,
	383	.Ssse3,
	384	.IdivlToDivb,
	385	.IdivqToDivl,
	386	.SlowTwoMemOps,
	387	.SlowUnalignedMem16,
	388	.X87,
	389	},
	390	CpuInfo(@This()).create(.Broadwell, "broadwell", &[_]FeatureType {
	391	.Bit64,
	392	.Adx,
	393	.Sse,
	394	.Avx,
	395	.Avx2,
	396	.Bmi,
	397	.Bmi2,
	398	.Cmov,
	399	.Cx8,
	400	.Cx16,
	401	.Ermsb,
	402	.F16c,
	403	.Fma,
	404	.Fsgsbase,
	405	.Fxsr,
	406	.FastShldRotate,
	407	.FastScalarFsqrt,
	408	.FastVariableShuffle,
	409	.Invpcid,
	410	.Sahf,
	411	.Lzcnt,
	412	.FalseDepsLzcntTzcnt,
	413	.Mmx,
	414	.Movbe,
	415	.Macrofusion,
	416	.MergeToThreewayBranch,
	417	.Nopl,
	418	.Pclmul,
	419	.Popcnt,
	420	.FalseDepsPopcnt,
	421	.Prfchw,
	422	.Rdrnd,
	423	.Rdseed,
	424	.Sse42,
	425	.Slow3opsLea,
	426	.IdivqToDivl,
	427	.X87,
	428	.Xsave,
	429	.Xsaveopt,
	430	},
	431	CpuInfo(@This()).create(.Btver1, "btver1", &[_]FeatureType {
	432	.Bit64,
	433	.Cmov,
	434	.Cx8,
	435	.Cx16,
	436	.Fxsr,
	437	.Fast15bytenop,
	438	.FastScalarShiftMasks,
	439	.FastVectorShiftMasks,
	440	.Sahf,
	441	.Lzcnt,
	442	.Mmx,
	443	.Nopl,
	444	.Popcnt,
	445	.Prfchw,
	446	.Sse,
	447	.Sse4a,
	448	.Ssse3,
	449	.SlowShld,
	450	.X87,
	451	},
	452	CpuInfo(@This()).create(.Btver2, "btver2", &[_]FeatureType {
	453	.Bit64,
	454	.Sse,
	455	.Aes,
	456	.Avx,
	457	.Bmi,
	458	.Cmov,
	459	.Cx8,
	460	.Cx16,
	461	.F16c,
	462	.Fxsr,
	463	.Fast15bytenop,
	464	.FastBextr,
	465	.FastHops,
	466	.FastLzcnt,
	467	.FastPartialYmmOrZmmWrite,
	468	.FastScalarShiftMasks,
	469	.FastVectorShiftMasks,
	470	.Sahf,
	471	.Lzcnt,
	472	.Mmx,
	473	.Movbe,
	474	.Nopl,
	475	.Pclmul,
	476	.Popcnt,
	477	.Prfchw,
	478	.Sse4a,
	479	.Ssse3,
	480	.SlowShld,
	481	.X87,
	482	.Xsave,
	483	.Xsaveopt,
	484	},
	485	CpuInfo(@This()).create(.C3, "c3", &[_]FeatureType {
	486	.Mmx,
	487	.Dnow3,
	488	.SlowUnalignedMem16,
	489	.X87,
	490	},
	491	CpuInfo(@This()).create(.C32, "c3-2", &[_]FeatureType {
	492	.Cmov,
	493	.Cx8,
	494	.Fxsr,
	495	.Mmx,
	496	.Sse,
	497	.SlowUnalignedMem16,
	498	.X87,
	499	},
	500	CpuInfo(@This()).create(.Cannonlake, "cannonlake", &[_]FeatureType {
	501	.Bit64,
	502	.Adx,
	503	.Sse,
	504	.Aes,
	505	.Avx,
	506	.Avx2,
	507	.Avx512f,
	508	.Bmi,
	509	.Bmi2,
	510	.Avx512bw,
	511	.Avx512cd,
	512	.Clflushopt,
	513	.Cmov,
	514	.Cx8,
	515	.Cx16,
	516	.Avx512dq,
	517	.Ermsb,
	518	.F16c,
	519	.Fma,
	520	.Fsgsbase,
	521	.Fxsr,
	522	.FastShldRotate,
	523	.FastScalarFsqrt,
	524	.FastVariableShuffle,
	525	.FastVectorFsqrt,
	526	.FastGather,
	527	.Avx512ifma,
	528	.Invpcid,
	529	.Sahf,
	530	.Lzcnt,
	531	.Mmx,
	532	.Movbe,
	533	.Macrofusion,
	534	.MergeToThreewayBranch,
	535	.Nopl,
	536	.Pclmul,
	537	.Pku,
	538	.Popcnt,
	539	.Prfchw,
	540	.Prefer256Bit,
	541	.Rdrnd,
	542	.Rdseed,
	543	.Sgx,
	544	.Sha,
	545	.Sse42,
	546	.Slow3opsLea,
	547	.IdivqToDivl,
	548	.Avx512vbmi,
	549	.Avx512vl,
	550	.X87,
	551	.Xsave,
	552	.Xsavec,
	553	.Xsaveopt,
	554	.Xsaves,
	555	},
	556	CpuInfo(@This()).create(.Cascadelake, "cascadelake", &[_]FeatureType {
	557	.Bit64,
	558	.Adx,
	559	.Sse,
	560	.Aes,
	561	.Avx,
	562	.Avx2,
	563	.Avx512f,
	564	.Bmi,
	565	.Bmi2,
	566	.Avx512bw,
	567	.Avx512cd,
	568	.Clflushopt,
	569	.Clwb,
	570	.Cmov,
	571	.Cx8,
	572	.Cx16,
	573	.Avx512dq,
	574	.Ermsb,
	575	.F16c,
	576	.Fma,
	577	.Fsgsbase,
	578	.Fxsr,
	579	.FastShldRotate,
	580	.FastScalarFsqrt,
	581	.FastVariableShuffle,
	582	.FastVectorFsqrt,
	583	.FastGather,
	584	.Invpcid,
	585	.Sahf,
	586	.Lzcnt,
	587	.Mmx,
	588	.Movbe,
	589	.Macrofusion,
	590	.MergeToThreewayBranch,
	591	.Nopl,
	592	.Pclmul,
	593	.Pku,
	594	.Popcnt,
	595	.FalseDepsPopcnt,
	596	.Prfchw,
	597	.Prefer256Bit,
	598	.Rdrnd,
	599	.Rdseed,
	600	.Sse42,
	601	.Slow3opsLea,
	602	.IdivqToDivl,
	603	.Avx512vl,
	604	.Avx512vnni,
	605	.X87,
	606	.Xsave,
	607	.Xsavec,
	608	.Xsaveopt,
	609	.Xsaves,
	610	},
	611	CpuInfo(@This()).create(.Cooperlake, "cooperlake", &[_]FeatureType {
	612	.Bit64,
	613	.Adx,
	614	.Sse,
	615	.Aes,
	616	.Avx,
	617	.Avx2,
	618	.Avx512f,
	619	.Avx512bf16,
	620	.Bmi,
	621	.Bmi2,
	622	.Avx512bw,
	623	.Avx512cd,
	624	.Clflushopt,
	625	.Clwb,
	626	.Cmov,
	627	.Cx8,
	628	.Cx16,
	629	.Avx512dq,
	630	.Ermsb,
	631	.F16c,
	632	.Fma,
	633	.Fsgsbase,
	634	.Fxsr,
	635	.FastShldRotate,
	636	.FastScalarFsqrt,
	637	.FastVariableShuffle,
	638	.FastVectorFsqrt,
	639	.FastGather,
	640	.Invpcid,
	641	.Sahf,
	642	.Lzcnt,
	643	.Mmx,
	644	.Movbe,
	645	.Macrofusion,
	646	.MergeToThreewayBranch,
	647	.Nopl,
	648	.Pclmul,
	649	.Pku,
	650	.Popcnt,
	651	.FalseDepsPopcnt,
	652	.Prfchw,
	653	.Prefer256Bit,
	654	.Rdrnd,
	655	.Rdseed,
	656	.Sse42,
	657	.Slow3opsLea,
	658	.IdivqToDivl,
	659	.Avx512vl,
	660	.Avx512vnni,
	661	.X87,
	662	.Xsave,
	663	.Xsavec,
	664	.Xsaveopt,
	665	.Xsaves,
	666	},
	667	CpuInfo(@This()).create(.CoreAvxI, "core-avx-i", &[_]FeatureType {
	668	.Bit64,
	669	.Sse,
	670	.Avx,
	671	.Cmov,
	672	.Cx8,
	673	.Cx16,
	674	.F16c,
	675	.Fsgsbase,
	676	.Fxsr,
	677	.FastShldRotate,
	678	.FastScalarFsqrt,
	679	.Sahf,
	680	.Mmx,
	681	.Macrofusion,
	682	.MergeToThreewayBranch,
	683	.Nopl,
	684	.Pclmul,
	685	.Popcnt,
	686	.FalseDepsPopcnt,
	687	.Rdrnd,
	688	.Sse42,
	689	.Slow3opsLea,
	690	.IdivqToDivl,
	691	.SlowUnalignedMem32,
	692	.X87,
	693	.Xsave,
	694	.Xsaveopt,
	695	},
	696	CpuInfo(@This()).create(.CoreAvx2, "core-avx2", &[_]FeatureType {
	697	.Bit64,
	698	.Sse,
	699	.Avx,
	700	.Avx2,
	701	.Bmi,
	702	.Bmi2,
	703	.Cmov,
	704	.Cx8,
	705	.Cx16,
	706	.Ermsb,
	707	.F16c,
	708	.Fma,
	709	.Fsgsbase,
	710	.Fxsr,
	711	.FastShldRotate,
	712	.FastScalarFsqrt,
	713	.FastVariableShuffle,
	714	.Invpcid,
	715	.Sahf,
	716	.Lzcnt,
	717	.FalseDepsLzcntTzcnt,
	718	.Mmx,
	719	.Movbe,
	720	.Macrofusion,
	721	.MergeToThreewayBranch,
	722	.Nopl,
	723	.Pclmul,
	724	.Popcnt,
	725	.FalseDepsPopcnt,
	726	.Rdrnd,
	727	.Sse42,
	728	.Slow3opsLea,
	729	.IdivqToDivl,
	730	.X87,
	731	.Xsave,
	732	.Xsaveopt,
	733	},
	734	CpuInfo(@This()).create(.Core2, "core2", &[_]FeatureType {
	735	.Bit64,
	736	.Cmov,
	737	.Cx8,
	738	.Cx16,
	739	.Fxsr,
	740	.Sahf,
	741	.Mmx,
	742	.Macrofusion,
	743	.Nopl,
	744	.Sse,
	745	.Ssse3,
	746	.SlowUnalignedMem16,
	747	.X87,
	748	},
	749	CpuInfo(@This()).create(.Corei7, "corei7", &[_]FeatureType {
	750	.Bit64,
	751	.Cmov,
	752	.Cx8,
	753	.Cx16,
	754	.Fxsr,
	755	.Sahf,
	756	.Mmx,
	757	.Macrofusion,
	758	.Nopl,
	759	.Popcnt,
	760	.Sse,
	761	.Sse42,
	762	.X87,
	763	},
	764	CpuInfo(@This()).create(.Corei7Avx, "corei7-avx", &[_]FeatureType {
	765	.Bit64,
	766	.Sse,
	767	.Avx,
	768	.Cmov,
	769	.Cx8,
	770	.Cx16,
	771	.Fxsr,
	772	.FastShldRotate,
	773	.FastScalarFsqrt,
	774	.Sahf,
	775	.Mmx,
	776	.Macrofusion,
	777	.MergeToThreewayBranch,
	778	.Nopl,
	779	.Pclmul,
	780	.Popcnt,
	781	.FalseDepsPopcnt,
	782	.Sse42,
	783	.Slow3opsLea,
	784	.IdivqToDivl,
	785	.SlowUnalignedMem32,
	786	.X87,
	787	.Xsave,
	788	.Xsaveopt,
	789	},
	790	CpuInfo(@This()).create(.Generic, "generic", &[_]FeatureType {
	791	.Cx8,
	792	.SlowUnalignedMem16,
	793	.X87,
	794	},
	795	CpuInfo(@This()).create(.Geode, "geode", &[_]FeatureType {
	796	.Mmx,
	797	.Dnowa3,
	798	.Cx8,
	799	.SlowUnalignedMem16,
	800	.X87,
	801	},
	802	CpuInfo(@This()).create(.Goldmont, "goldmont", &[_]FeatureType {
	803	.Bit64,
	804	.Sse,
	805	.Aes,
	806	.Clflushopt,
	807	.Cmov,
	808	.Cx8,
	809	.Cx16,
	810	.Fsgsbase,
	811	.Fxsr,
	812	.Sahf,
	813	.Mmx,
	814	.Movbe,
	815	.Nopl,
	816	.Pclmul,
	817	.Popcnt,
	818	.FalseDepsPopcnt,
	819	.Prfchw,
	820	.Rdrnd,
	821	.Rdseed,
	822	.Sha,
	823	.Sse42,
	824	.Ssse3,
	825	.SlowIncdec,
	826	.SlowLea,
	827	.SlowTwoMemOps,
	828	.X87,
	829	.Xsave,
	830	.Xsavec,
	831	.Xsaveopt,
	832	.Xsaves,
	833	},
	834	CpuInfo(@This()).create(.GoldmontPlus, "goldmont-plus", &[_]FeatureType {
	835	.Bit64,
	836	.Sse,
	837	.Aes,
	838	.Clflushopt,
	839	.Cmov,
	840	.Cx8,
	841	.Cx16,
	842	.Fsgsbase,
	843	.Fxsr,
	844	.Sahf,
	845	.Mmx,
	846	.Movbe,
	847	.Nopl,
	848	.Pclmul,
	849	.Popcnt,
	850	.Prfchw,
	851	.Ptwrite,
	852	.Rdpid,
	853	.Rdrnd,
	854	.Rdseed,
	855	.Sgx,
	856	.Sha,
	857	.Sse42,
	858	.Ssse3,
	859	.SlowIncdec,
	860	.SlowLea,
	861	.SlowTwoMemOps,
	862	.X87,
	863	.Xsave,
	864	.Xsavec,
	865	.Xsaveopt,
	866	.Xsaves,
	867	},
	868	CpuInfo(@This()).create(.Haswell, "haswell", &[_]FeatureType {
	869	.Bit64,
	870	.Sse,
	871	.Avx,
	872	.Avx2,
	873	.Bmi,
	874	.Bmi2,
	875	.Cmov,
	876	.Cx8,
	877	.Cx16,
	878	.Ermsb,
	879	.F16c,
	880	.Fma,
	881	.Fsgsbase,
	882	.Fxsr,
	883	.FastShldRotate,
	884	.FastScalarFsqrt,
	885	.FastVariableShuffle,
	886	.Invpcid,
	887	.Sahf,
	888	.Lzcnt,
	889	.FalseDepsLzcntTzcnt,
	890	.Mmx,
	891	.Movbe,
	892	.Macrofusion,
	893	.MergeToThreewayBranch,
	894	.Nopl,
	895	.Pclmul,
	896	.Popcnt,
	897	.FalseDepsPopcnt,
	898	.Rdrnd,
	899	.Sse42,
	900	.Slow3opsLea,
	901	.IdivqToDivl,
	902	.X87,
	903	.Xsave,
	904	.Xsaveopt,
	905	},
	906	CpuInfo(@This()).create(.I386, "i386", &[_]FeatureType {
	907	.SlowUnalignedMem16,
	908	.X87,
	909	},
	910	CpuInfo(@This()).create(.I486, "i486", &[_]FeatureType {
	911	.SlowUnalignedMem16,
	912	.X87,
	913	},
	914	CpuInfo(@This()).create(.I586, "i586", &[_]FeatureType {
	915	.Cx8,
	916	.SlowUnalignedMem16,
	917	.X87,
	918	},
	919	CpuInfo(@This()).create(.I686, "i686", &[_]FeatureType {
	920	.Cmov,
	921	.Cx8,
	922	.SlowUnalignedMem16,
	923	.X87,
	924	},
	925	CpuInfo(@This()).create(.IcelakeClient, "icelake-client", &[_]FeatureType {
	926	.Bit64,
	927	.Adx,
	928	.Sse,
	929	.Aes,
	930	.Avx,
	931	.Avx2,
	932	.Avx512f,
	933	.Avx512bitalg,
	934	.Bmi,
	935	.Bmi2,
	936	.Avx512bw,
	937	.Avx512cd,
	938	.Clflushopt,
	939	.Clwb,
	940	.Cmov,
	941	.Cx8,
	942	.Cx16,
	943	.Avx512dq,
	944	.Ermsb,
	945	.F16c,
	946	.Fma,
	947	.Fsgsbase,
	948	.Fxsr,
	949	.FastShldRotate,
	950	.FastScalarFsqrt,
	951	.FastVariableShuffle,
	952	.FastVectorFsqrt,
	953	.Gfni,
	954	.FastGather,
	955	.Avx512ifma,
	956	.Invpcid,
	957	.Sahf,
	958	.Lzcnt,
	959	.Mmx,
	960	.Movbe,
	961	.Macrofusion,
	962	.MergeToThreewayBranch,
	963	.Nopl,
	964	.Pclmul,
	965	.Pku,
	966	.Popcnt,
	967	.Prfchw,
	968	.Prefer256Bit,
	969	.Rdpid,
	970	.Rdrnd,
	971	.Rdseed,
	972	.Sgx,
	973	.Sha,
	974	.Sse42,
	975	.Slow3opsLea,
	976	.IdivqToDivl,
	977	.Vaes,
	978	.Avx512vbmi,
	979	.Avx512vbmi2,
	980	.Avx512vl,
	981	.Avx512vnni,
	982	.Vpclmulqdq,
	983	.Avx512vpopcntdq,
	984	.X87,
	985	.Xsave,
	986	.Xsavec,
	987	.Xsaveopt,
	988	.Xsaves,
	989	},
	990	CpuInfo(@This()).create(.IcelakeServer, "icelake-server", &[_]FeatureType {
	991	.Bit64,
	992	.Adx,
	993	.Sse,
	994	.Aes,
	995	.Avx,
	996	.Avx2,
	997	.Avx512f,
	998	.Avx512bitalg,
	999	.Bmi,
	1000	.Bmi2,
	1001	.Avx512bw,
	1002	.Avx512cd,
	1003	.Clflushopt,
	1004	.Clwb,
	1005	.Cmov,
	1006	.Cx8,
	1007	.Cx16,
	1008	.Avx512dq,
	1009	.Ermsb,
	1010	.F16c,
	1011	.Fma,
	1012	.Fsgsbase,
	1013	.Fxsr,
	1014	.FastShldRotate,
	1015	.FastScalarFsqrt,
	1016	.FastVariableShuffle,
	1017	.FastVectorFsqrt,
	1018	.Gfni,
	1019	.FastGather,
	1020	.Avx512ifma,
	1021	.Invpcid,
	1022	.Sahf,
	1023	.Lzcnt,
	1024	.Mmx,
	1025	.Movbe,
	1026	.Macrofusion,
	1027	.MergeToThreewayBranch,
	1028	.Nopl,
	1029	.Pclmul,
	1030	.Pconfig,
	1031	.Pku,
	1032	.Popcnt,
	1033	.Prfchw,
	1034	.Prefer256Bit,
	1035	.Rdpid,
	1036	.Rdrnd,
	1037	.Rdseed,
	1038	.Sgx,
	1039	.Sha,
	1040	.Sse42,
	1041	.Slow3opsLea,
	1042	.IdivqToDivl,
	1043	.Vaes,
	1044	.Avx512vbmi,
	1045	.Avx512vbmi2,
	1046	.Avx512vl,
	1047	.Avx512vnni,
	1048	.Vpclmulqdq,
	1049	.Avx512vpopcntdq,
	1050	.Wbnoinvd,
	1051	.X87,
	1052	.Xsave,
	1053	.Xsavec,
	1054	.Xsaveopt,
	1055	.Xsaves,
	1056	},
	1057	CpuInfo(@This()).create(.Ivybridge, "ivybridge", &[_]FeatureType {
	1058	.Bit64,
	1059	.Sse,
	1060	.Avx,
	1061	.Cmov,
	1062	.Cx8,
	1063	.Cx16,
	1064	.F16c,
	1065	.Fsgsbase,
	1066	.Fxsr,
	1067	.FastShldRotate,
	1068	.FastScalarFsqrt,
	1069	.Sahf,
	1070	.Mmx,
	1071	.Macrofusion,
	1072	.MergeToThreewayBranch,
	1073	.Nopl,
	1074	.Pclmul,
	1075	.Popcnt,
	1076	.FalseDepsPopcnt,
	1077	.Rdrnd,
	1078	.Sse42,
	1079	.Slow3opsLea,
	1080	.IdivqToDivl,
	1081	.SlowUnalignedMem32,
	1082	.X87,
	1083	.Xsave,
	1084	.Xsaveopt,
	1085	},
	1086	CpuInfo(@This()).create(.K6, "k6", &[_]FeatureType {
	1087	.Cx8,
	1088	.Mmx,
	1089	.SlowUnalignedMem16,
	1090	.X87,
	1091	},
	1092	CpuInfo(@This()).create(.K62, "k6-2", &[_]FeatureType {
	1093	.Mmx,
	1094	.Dnow3,
	1095	.Cx8,
	1096	.SlowUnalignedMem16,
	1097	.X87,
	1098	},
	1099	CpuInfo(@This()).create(.K63, "k6-3", &[_]FeatureType {
	1100	.Mmx,
	1101	.Dnow3,
	1102	.Cx8,
	1103	.SlowUnalignedMem16,
	1104	.X87,
	1105	},
	1106	CpuInfo(@This()).create(.K8, "k8", &[_]FeatureType {
	1107	.Mmx,
	1108	.Dnowa3,
	1109	.Bit64,
	1110	.Cmov,
	1111	.Cx8,
	1112	.Fxsr,
	1113	.FastScalarShiftMasks,
	1114	.Nopl,
	1115	.Sse,
	1116	.Sse2,
	1117	.SlowShld,
	1118	.SlowUnalignedMem16,
	1119	.X87,
	1120	},
	1121	CpuInfo(@This()).create(.K8Sse3, "k8-sse3", &[_]FeatureType {
	1122	.Mmx,
	1123	.Dnowa3,
	1124	.Bit64,
	1125	.Cmov,
	1126	.Cx8,
	1127	.Cx16,
	1128	.Fxsr,
	1129	.FastScalarShiftMasks,
	1130	.Nopl,
	1131	.Sse,
	1132	.Sse3,
	1133	.SlowShld,
	1134	.SlowUnalignedMem16,
	1135	.X87,
	1136	},
	1137	CpuInfo(@This()).create(.Knl, "knl", &[_]FeatureType {
	1138	.Bit64,
	1139	.Adx,
	1140	.Sse,
	1141	.Aes,
	1142	.Avx512f,
	1143	.Bmi,
	1144	.Bmi2,
	1145	.Avx512cd,
	1146	.Cmov,
	1147	.Cx8,
	1148	.Cx16,
	1149	.Avx512er,
	1150	.F16c,
	1151	.Fma,
	1152	.Fsgsbase,
	1153	.Fxsr,
	1154	.FastPartialYmmOrZmmWrite,
	1155	.FastGather,
	1156	.Sahf,
	1157	.Lzcnt,
	1158	.Mmx,
	1159	.Movbe,
	1160	.Nopl,
	1161	.Pclmul,
	1162	.Avx512pf,
	1163	.Popcnt,
	1164	.Prefetchwt1,
	1165	.Prfchw,
	1166	.Rdrnd,
	1167	.Rdseed,
	1168	.Slow3opsLea,
	1169	.IdivqToDivl,
	1170	.SlowIncdec,
	1171	.SlowPmaddwd,
	1172	.SlowTwoMemOps,
	1173	.X87,
	1174	.Xsave,
	1175	.Xsaveopt,
	1176	},
	1177	CpuInfo(@This()).create(.Knm, "knm", &[_]FeatureType {
	1178	.Bit64,
	1179	.Adx,
	1180	.Sse,
	1181	.Aes,
	1182	.Avx512f,
	1183	.Bmi,
	1184	.Bmi2,
	1185	.Avx512cd,
	1186	.Cmov,
	1187	.Cx8,
	1188	.Cx16,
	1189	.Avx512er,
	1190	.F16c,
	1191	.Fma,
	1192	.Fsgsbase,
	1193	.Fxsr,
	1194	.FastPartialYmmOrZmmWrite,
	1195	.FastGather,
	1196	.Sahf,
	1197	.Lzcnt,
	1198	.Mmx,
	1199	.Movbe,
	1200	.Nopl,
	1201	.Pclmul,
	1202	.Avx512pf,
	1203	.Popcnt,
	1204	.Prefetchwt1,
	1205	.Prfchw,
	1206	.Rdrnd,
	1207	.Rdseed,
	1208	.Slow3opsLea,
	1209	.IdivqToDivl,
	1210	.SlowIncdec,
	1211	.SlowPmaddwd,
	1212	.SlowTwoMemOps,
	1213	.Avx512vpopcntdq,
	1214	.X87,
	1215	.Xsave,
	1216	.Xsaveopt,
	1217	},
	1218	CpuInfo(@This()).create(.Lakemont, "lakemont", &[_]FeatureType {
	1219	},
	1220	CpuInfo(@This()).create(.Nehalem, "nehalem", &[_]FeatureType {
	1221	.Bit64,
	1222	.Cmov,
	1223	.Cx8,
	1224	.Cx16,
	1225	.Fxsr,
	1226	.Sahf,
	1227	.Mmx,
	1228	.Macrofusion,
	1229	.Nopl,
	1230	.Popcnt,
	1231	.Sse,
	1232	.Sse42,
	1233	.X87,
	1234	},
	1235	CpuInfo(@This()).create(.Nocona, "nocona", &[_]FeatureType {
	1236	.Bit64,
	1237	.Cmov,
	1238	.Cx8,
	1239	.Cx16,
	1240	.Fxsr,
	1241	.Mmx,
	1242	.Nopl,
	1243	.Sse,
	1244	.Sse3,
	1245	.SlowUnalignedMem16,
	1246	.X87,
	1247	},
	1248	CpuInfo(@This()).create(.Opteron, "opteron", &[_]FeatureType {
	1249	.Mmx,
	1250	.Dnowa3,
	1251	.Bit64,
	1252	.Cmov,
	1253	.Cx8,
	1254	.Fxsr,
	1255	.FastScalarShiftMasks,
	1256	.Nopl,
	1257	.Sse,
	1258	.Sse2,
	1259	.SlowShld,
	1260	.SlowUnalignedMem16,
	1261	.X87,
	1262	},
	1263	CpuInfo(@This()).create(.OpteronSse3, "opteron-sse3", &[_]FeatureType {
	1264	.Mmx,
	1265	.Dnowa3,
	1266	.Bit64,
	1267	.Cmov,
	1268	.Cx8,
	1269	.Cx16,
	1270	.Fxsr,
	1271	.FastScalarShiftMasks,
	1272	.Nopl,
	1273	.Sse,
	1274	.Sse3,
	1275	.SlowShld,
	1276	.SlowUnalignedMem16,
	1277	.X87,
	1278	},
	1279	CpuInfo(@This()).create(.Penryn, "penryn", &[_]FeatureType {
	1280	.Bit64,
	1281	.Cmov,
	1282	.Cx8,
	1283	.Cx16,
	1284	.Fxsr,
	1285	.Sahf,
	1286	.Mmx,
	1287	.Macrofusion,
	1288	.Nopl,
	1289	.Sse,
	1290	.Sse41,
	1291	.SlowUnalignedMem16,
	1292	.X87,
	1293	},
	1294	CpuInfo(@This()).create(.Pentium, "pentium", &[_]FeatureType {
	1295	.Cx8,
	1296	.SlowUnalignedMem16,
	1297	.X87,
	1298	},
	1299	CpuInfo(@This()).create(.PentiumM, "pentium-m", &[_]FeatureType {
	1300	.Cmov,
	1301	.Cx8,
	1302	.Fxsr,
	1303	.Mmx,
	1304	.Nopl,
	1305	.Sse,
	1306	.Sse2,
	1307	.SlowUnalignedMem16,
	1308	.X87,
	1309	},
	1310	CpuInfo(@This()).create(.PentiumMmx, "pentium-mmx", &[_]FeatureType {
	1311	.Cx8,
	1312	.Mmx,
	1313	.SlowUnalignedMem16,
	1314	.X87,
	1315	},
	1316	CpuInfo(@This()).create(.Pentium2, "pentium2", &[_]FeatureType {
	1317	.Cmov,
	1318	.Cx8,
	1319	.Fxsr,
	1320	.Mmx,
	1321	.Nopl,
	1322	.SlowUnalignedMem16,
	1323	.X87,
	1324	},
	1325	CpuInfo(@This()).create(.Pentium3, "pentium3", &[_]FeatureType {
	1326	.Cmov,
	1327	.Cx8,
	1328	.Fxsr,
	1329	.Mmx,
	1330	.Nopl,
	1331	.Sse,
	1332	.SlowUnalignedMem16,
	1333	.X87,
	1334	},
	1335	CpuInfo(@This()).create(.Pentium3m, "pentium3m", &[_]FeatureType {
	1336	.Cmov,
	1337	.Cx8,
	1338	.Fxsr,
	1339	.Mmx,
	1340	.Nopl,
	1341	.Sse,
	1342	.SlowUnalignedMem16,
	1343	.X87,
	1344	},
	1345	CpuInfo(@This()).create(.Pentium4, "pentium4", &[_]FeatureType {
	1346	.Cmov,
	1347	.Cx8,
	1348	.Fxsr,
	1349	.Mmx,
	1350	.Nopl,
	1351	.Sse,
	1352	.Sse2,
	1353	.SlowUnalignedMem16,
	1354	.X87,
	1355	},
	1356	CpuInfo(@This()).create(.Pentium4m, "pentium4m", &[_]FeatureType {
	1357	.Cmov,
	1358	.Cx8,
	1359	.Fxsr,
	1360	.Mmx,
	1361	.Nopl,
	1362	.Sse,
	1363	.Sse2,
	1364	.SlowUnalignedMem16,
	1365	.X87,
	1366	},
	1367	CpuInfo(@This()).create(.Pentiumpro, "pentiumpro", &[_]FeatureType {
	1368	.Cmov,
	1369	.Cx8,
	1370	.Nopl,
	1371	.SlowUnalignedMem16,
	1372	.X87,
	1373	},
	1374	CpuInfo(@This()).create(.Prescott, "prescott", &[_]FeatureType {
	1375	.Cmov,
	1376	.Cx8,
	1377	.Fxsr,
	1378	.Mmx,
	1379	.Nopl,
	1380	.Sse,
	1381	.Sse3,
	1382	.SlowUnalignedMem16,
	1383	.X87,
	1384	},
	1385	CpuInfo(@This()).create(.Sandybridge, "sandybridge", &[_]FeatureType {
	1386	.Bit64,
	1387	.Sse,
	1388	.Avx,
	1389	.Cmov,
	1390	.Cx8,
	1391	.Cx16,
	1392	.Fxsr,
	1393	.FastShldRotate,
	1394	.FastScalarFsqrt,
	1395	.Sahf,
	1396	.Mmx,
	1397	.Macrofusion,
	1398	.MergeToThreewayBranch,
	1399	.Nopl,
	1400	.Pclmul,
	1401	.Popcnt,
	1402	.FalseDepsPopcnt,
	1403	.Sse42,
	1404	.Slow3opsLea,
	1405	.IdivqToDivl,
	1406	.SlowUnalignedMem32,
	1407	.X87,
	1408	.Xsave,
	1409	.Xsaveopt,
	1410	},
	1411	CpuInfo(@This()).create(.Silvermont, "silvermont", &[_]FeatureType {
	1412	.Bit64,
	1413	.Cmov,
	1414	.Cx8,
	1415	.Cx16,
	1416	.Fxsr,
	1417	.Sahf,
	1418	.Mmx,
	1419	.Movbe,
	1420	.Nopl,
	1421	.Sse,
	1422	.Pclmul,
	1423	.Popcnt,
	1424	.FalseDepsPopcnt,
	1425	.Prfchw,
	1426	.Rdrnd,
	1427	.Sse42,
	1428	.Ssse3,
	1429	.IdivqToDivl,
	1430	.SlowIncdec,
	1431	.SlowLea,
	1432	.SlowPmulld,
	1433	.SlowTwoMemOps,
	1434	.X87,
	1435	},
	1436	CpuInfo(@This()).create(.Skx, "skx", &[_]FeatureType {
	1437	.Bit64,
	1438	.Adx,
	1439	.Sse,
	1440	.Aes,
	1441	.Avx,
	1442	.Avx2,
	1443	.Avx512f,
	1444	.Bmi,
	1445	.Bmi2,
	1446	.Avx512bw,
	1447	.Avx512cd,
	1448	.Clflushopt,
	1449	.Clwb,
	1450	.Cmov,
	1451	.Cx8,
	1452	.Cx16,
	1453	.Avx512dq,
	1454	.Ermsb,
	1455	.F16c,
	1456	.Fma,
	1457	.Fsgsbase,
	1458	.Fxsr,
	1459	.FastShldRotate,
	1460	.FastScalarFsqrt,
	1461	.FastVariableShuffle,
	1462	.FastVectorFsqrt,
	1463	.FastGather,
	1464	.Invpcid,
	1465	.Sahf,
	1466	.Lzcnt,
	1467	.Mmx,
	1468	.Movbe,
	1469	.Macrofusion,
	1470	.MergeToThreewayBranch,
	1471	.Nopl,
	1472	.Pclmul,
	1473	.Pku,
	1474	.Popcnt,
	1475	.FalseDepsPopcnt,
	1476	.Prfchw,
	1477	.Prefer256Bit,
	1478	.Rdrnd,
	1479	.Rdseed,
	1480	.Sse42,
	1481	.Slow3opsLea,
	1482	.IdivqToDivl,
	1483	.Avx512vl,
	1484	.X87,
	1485	.Xsave,
	1486	.Xsavec,
	1487	.Xsaveopt,
	1488	.Xsaves,
	1489	},
	1490	CpuInfo(@This()).create(.Skylake, "skylake", &[_]FeatureType {
	1491	.Bit64,
	1492	.Adx,
	1493	.Sse,
	1494	.Aes,
	1495	.Avx,
	1496	.Avx2,
	1497	.Bmi,
	1498	.Bmi2,
	1499	.Clflushopt,
	1500	.Cmov,
	1501	.Cx8,
	1502	.Cx16,
	1503	.Ermsb,
	1504	.F16c,
	1505	.Fma,
	1506	.Fsgsbase,
	1507	.Fxsr,
	1508	.FastShldRotate,
	1509	.FastScalarFsqrt,
	1510	.FastVariableShuffle,
	1511	.FastVectorFsqrt,
	1512	.FastGather,
	1513	.Invpcid,
	1514	.Sahf,
	1515	.Lzcnt,
	1516	.Mmx,
	1517	.Movbe,
	1518	.Macrofusion,
	1519	.MergeToThreewayBranch,
	1520	.Nopl,
	1521	.Pclmul,
	1522	.Popcnt,
	1523	.FalseDepsPopcnt,
	1524	.Prfchw,
	1525	.Rdrnd,
	1526	.Rdseed,
	1527	.Sgx,
	1528	.Sse42,
	1529	.Slow3opsLea,
	1530	.IdivqToDivl,
	1531	.X87,
	1532	.Xsave,
	1533	.Xsavec,
	1534	.Xsaveopt,
	1535	.Xsaves,
	1536	},
	1537	CpuInfo(@This()).create(.SkylakeAvx512, "skylake-avx512", &[_]FeatureType {
	1538	.Bit64,
	1539	.Adx,
	1540	.Sse,
	1541	.Aes,
	1542	.Avx,
	1543	.Avx2,
	1544	.Avx512f,
	1545	.Bmi,
	1546	.Bmi2,
	1547	.Avx512bw,
	1548	.Avx512cd,
	1549	.Clflushopt,
	1550	.Clwb,
	1551	.Cmov,
	1552	.Cx8,
	1553	.Cx16,
	1554	.Avx512dq,
	1555	.Ermsb,
	1556	.F16c,
	1557	.Fma,
	1558	.Fsgsbase,
	1559	.Fxsr,
	1560	.FastShldRotate,
	1561	.FastScalarFsqrt,
	1562	.FastVariableShuffle,
	1563	.FastVectorFsqrt,
	1564	.FastGather,
	1565	.Invpcid,
	1566	.Sahf,
	1567	.Lzcnt,
	1568	.Mmx,
	1569	.Movbe,
	1570	.Macrofusion,
	1571	.MergeToThreewayBranch,
	1572	.Nopl,
	1573	.Pclmul,
	1574	.Pku,
	1575	.Popcnt,
	1576	.FalseDepsPopcnt,
	1577	.Prfchw,
	1578	.Prefer256Bit,
	1579	.Rdrnd,
	1580	.Rdseed,
	1581	.Sse42,
	1582	.Slow3opsLea,
	1583	.IdivqToDivl,
	1584	.Avx512vl,
	1585	.X87,
	1586	.Xsave,
	1587	.Xsavec,
	1588	.Xsaveopt,
	1589	.Xsaves,
	1590	},
	1591	CpuInfo(@This()).create(.Slm, "slm", &[_]FeatureType {
	1592	.Bit64,
	1593	.Cmov,
	1594	.Cx8,
	1595	.Cx16,
	1596	.Fxsr,
	1597	.Sahf,
	1598	.Mmx,
	1599	.Movbe,
	1600	.Nopl,
	1601	.Sse,
	1602	.Pclmul,
	1603	.Popcnt,
	1604	.FalseDepsPopcnt,
	1605	.Prfchw,
	1606	.Rdrnd,
	1607	.Sse42,
	1608	.Ssse3,
	1609	.IdivqToDivl,
	1610	.SlowIncdec,
	1611	.SlowLea,
	1612	.SlowPmulld,
	1613	.SlowTwoMemOps,
	1614	.X87,
	1615	},
	1616	CpuInfo(@This()).create(.Tigerlake, "tigerlake", &[_]FeatureType {
	1617	.Bit64,
	1618	.Adx,
	1619	.Sse,
	1620	.Aes,
	1621	.Avx,
	1622	.Avx2,
	1623	.Avx512f,
	1624	.Avx512bitalg,
	1625	.Bmi,
	1626	.Bmi2,
	1627	.Avx512bw,
	1628	.Avx512cd,
	1629	.Clflushopt,
	1630	.Clwb,
	1631	.Cmov,
	1632	.Cx8,
	1633	.Cx16,
	1634	.Avx512dq,
	1635	.Ermsb,
	1636	.F16c,
	1637	.Fma,
	1638	.Fsgsbase,
	1639	.Fxsr,
	1640	.FastShldRotate,
	1641	.FastScalarFsqrt,
	1642	.FastVariableShuffle,
	1643	.FastVectorFsqrt,
	1644	.Gfni,
	1645	.FastGather,
	1646	.Avx512ifma,
	1647	.Invpcid,
	1648	.Sahf,
	1649	.Lzcnt,
	1650	.Mmx,
	1651	.Movbe,
	1652	.Movdir64b,
	1653	.Movdiri,
	1654	.Macrofusion,
	1655	.MergeToThreewayBranch,
	1656	.Nopl,
	1657	.Pclmul,
	1658	.Pku,
	1659	.Popcnt,
	1660	.Prfchw,
	1661	.Prefer256Bit,
	1662	.Rdpid,
	1663	.Rdrnd,
	1664	.Rdseed,
	1665	.Sgx,
	1666	.Sha,
	1667	.Shstk,
	1668	.Sse42,
	1669	.Slow3opsLea,
	1670	.IdivqToDivl,
	1671	.Vaes,
	1672	.Avx512vbmi,
	1673	.Avx512vbmi2,
	1674	.Avx512vl,
	1675	.Avx512vnni,
	1676	.Avx512vp2intersect,
	1677	.Vpclmulqdq,
	1678	.Avx512vpopcntdq,
	1679	.X87,
	1680	.Xsave,
	1681	.Xsavec,
	1682	.Xsaveopt,
	1683	.Xsaves,
	1684	},
	1685	CpuInfo(@This()).create(.Tremont, "tremont", &[_]FeatureType {
	1686	.Bit64,
	1687	.Sse,
	1688	.Aes,
	1689	.Cldemote,
	1690	.Clflushopt,
	1691	.Cmov,
	1692	.Cx8,
	1693	.Cx16,
	1694	.Fsgsbase,
	1695	.Fxsr,
	1696	.Gfni,
	1697	.Sahf,
	1698	.Mmx,
	1699	.Movbe,
	1700	.Movdir64b,
	1701	.Movdiri,
	1702	.Nopl,
	1703	.Pclmul,
	1704	.Popcnt,
	1705	.Prfchw,
	1706	.Ptwrite,
	1707	.Rdpid,
	1708	.Rdrnd,
	1709	.Rdseed,
	1710	.Sgx,
	1711	.Sha,
	1712	.Sse42,
	1713	.Ssse3,
	1714	.SlowIncdec,
	1715	.SlowLea,
	1716	.SlowTwoMemOps,
	1717	.Waitpkg,
	1718	.X87,
	1719	.Xsave,
	1720	.Xsavec,
	1721	.Xsaveopt,
	1722	.Xsaves,
	1723	},
	1724	CpuInfo(@This()).create(.Westmere, "westmere", &[_]FeatureType {
	1725	.Bit64,
	1726	.Cmov,
	1727	.Cx8,
	1728	.Cx16,
	1729	.Fxsr,
	1730	.Sahf,
	1731	.Mmx,
	1732	.Macrofusion,
	1733	.Nopl,
	1734	.Sse,
	1735	.Pclmul,
	1736	.Popcnt,
	1737	.Sse42,
	1738	.X87,
	1739	},
	1740	CpuInfo(@This()).create(.WinchipC6, "winchip-c6", &[_]FeatureType {
	1741	.Mmx,
	1742	.SlowUnalignedMem16,
	1743	.X87,
	1744	},
	1745	CpuInfo(@This()).create(.Winchip2, "winchip2", &[_]FeatureType {
	1746	.Mmx,
	1747	.Dnow3,
	1748	.SlowUnalignedMem16,
	1749	.X87,
	1750	},
	1751	CpuInfo(@This()).create(.X8664, "x86-64", &[_]FeatureType {
	1752	.Bit64,
	1753	.Cmov,
	1754	.Cx8,
	1755	.Fxsr,
	1756	.Mmx,
	1757	.Macrofusion,
	1758	.Nopl,
	1759	.Sse,
	1760	.Sse2,
	1761	.Slow3opsLea,
	1762	.SlowIncdec,
	1763	.X87,
	1764	},
	1765	CpuInfo(@This()).create(.Yonah, "yonah", &[_]FeatureType {
	1766	.Cmov,
	1767	.Cx8,
	1768	.Fxsr,
	1769	.Mmx,
	1770	.Nopl,
	1771	.Sse,
	1772	.Sse3,
	1773	.SlowUnalignedMem16,
	1774	.X87,
	1775	},
	1776	CpuInfo(@This()).create(.Znver1, "znver1", &[_]FeatureType {
	1777	.Bit64,
	1778	.Adx,
	1779	.Sse,
	1780	.Aes,
	1781	.Avx2,
	1782	.Bmi,
	1783	.Bmi2,
	1784	.Branchfusion,
	1785	.Clflushopt,
	1786	.Clzero,
	1787	.Cmov,
	1788	.Cx8,
	1789	.Cx16,
	1790	.F16c,
	1791	.Fma,
	1792	.Fsgsbase,
	1793	.Fxsr,
	1794	.Fast15bytenop,
	1795	.FastBextr,
	1796	.FastLzcnt,
	1797	.FastScalarShiftMasks,
	1798	.Sahf,
	1799	.Lzcnt,
	1800	.Mmx,
	1801	.Movbe,
	1802	.Mwaitx,
	1803	.Nopl,
	1804	.Pclmul,
	1805	.Popcnt,
	1806	.Prfchw,
	1807	.Rdrnd,
	1808	.Rdseed,
	1809	.Sha,
	1810	.Sse4a,
	1811	.SlowShld,
	1812	.X87,
	1813	.Xsave,
	1814	.Xsavec,
	1815	.Xsaveopt,
	1816	.Xsaves,
	1817	},
	1818	CpuInfo(@This()).create(.Znver2, "znver2", &[_]FeatureType {
	1819	.Bit64,
	1820	.Adx,
	1821	.Sse,
	1822	.Aes,
	1823	.Avx2,
	1824	.Bmi,
	1825	.Bmi2,
	1826	.Branchfusion,
	1827	.Clflushopt,
	1828	.Clwb,
	1829	.Clzero,
	1830	.Cmov,
	1831	.Cx8,
	1832	.Cx16,
	1833	.F16c,
	1834	.Fma,
	1835	.Fsgsbase,
	1836	.Fxsr,
	1837	.Fast15bytenop,
	1838	.FastBextr,
	1839	.FastLzcnt,
	1840	.FastScalarShiftMasks,
	1841	.Sahf,
	1842	.Lzcnt,
	1843	.Mmx,
	1844	.Movbe,
	1845	.Mwaitx,
	1846	.Nopl,
	1847	.Pclmul,
	1848	.Popcnt,
	1849	.Prfchw,
	1850	.Rdpid,
	1851	.Rdrnd,
	1852	.Rdseed,
	1853	.Sha,
	1854	.Sse4a,
	1855	.SlowShld,
	1856	.Wbnoinvd,
	1857	.X87,
	1858	.Xsave,
	1859	.Xsavec,
	1860	.Xsaveopt,
	1861	.Xsaves,
	1862	},
	1863	};
	1864	};

lib/std/target/cpu/empty.zig created+6

...	...	@@ -0,0 +1,6 @@
	1	const feature = @import("std").target.feature;
	2	const CpuInfo = @import("std").target.cpu.CpuInfo;
	3
	4	pub const EmptyCpu = enum {
	5	pub const cpu_infos = [0]CpuInfo(@This()) {};
	6	};

lib/std/target/feature.zig created+76

...	...	@@ -0,0 +1,76 @@
	1	const builtin = @import("builtin");
	2	const std = @import("std");
	3	const Arch = std.Target.Arch;
	4
	5	pub const AArch64Feature = @import("feature/AArch64Feature.zig").AArch64Feature;
	6	pub const AmdGpuFeature = @import("feature/AmdGpuFeature.zig").AmdGpuFeature;
	7	pub const ArmFeature = @import("feature/ArmFeature.zig").ArmFeature;
	8	pub const AvrFeature = @import("feature/AvrFeature.zig").AvrFeature;
	9	pub const BpfFeature = @import("feature/BpfFeature.zig").BpfFeature;
	10	pub const HexagonFeature = @import("feature/HexagonFeature.zig").HexagonFeature;
	11	pub const MipsFeature = @import("feature/MipsFeature.zig").MipsFeature;
	12	pub const Msp430Feature = @import("feature/Msp430Feature.zig").Msp430Feature;
	13	pub const NvptxFeature = @import("feature/NvptxFeature.zig").NvptxFeature;
	14	pub const PowerPcFeature = @import("feature/PowerPcFeature.zig").PowerPcFeature;
	15	pub const RiscVFeature = @import("feature/RiscVFeature.zig").RiscVFeature;
	16	pub const SparcFeature = @import("feature/SparcFeature.zig").SparcFeature;
	17	pub const SystemZFeature = @import("feature/SystemZFeature.zig").SystemZFeature;
	18	pub const WebAssemblyFeature = @import("feature/WebAssemblyFeature.zig").WebAssemblyFeature;
	19	pub const X86Feature = @import("feature/X86Feature.zig").X86Feature;
	20
	21	const EmptyFeature = @import("feature/empty.zig").EmptyFeature;
	22
	23	pub fn ArchFeature(comptime arch: @TagType(Arch)) type {
	24	return switch (arch) {
	25	.arm, .armeb, .thumb, .thumbeb => ArmFeature,
	26	.aarch64, .aarch64_be, .aarch64_32 => AArch64Feature,
	27	.avr => AvrFeature,
	28	.bpfel, .bpfeb => BpfFeature,
	29	.hexagon => HexagonFeature,
	30	.mips, .mipsel, .mips64, .mips64el => MipsFeature,
	31	.msp430 => Msp430Feature,
	32	.powerpc, .powerpc64, .powerpc64le => PowerPcFeature,
	33	.amdgcn => AmdGpuFeature,
	34	.riscv32, .riscv64 => RiscVFeature,
	35	.sparc, .sparcv9, .sparcel => SparcFeature,
	36	.s390x => SystemZFeature,
	37	.i386, .x86_64 => X86Feature,
	38	.nvptx, .nvptx64 => NvptxFeature,
	39	.wasm32, .wasm64 => WebAssemblyFeature,
	40
	41	else => EmptyFeature,
	42	};
	43	}
	44
	45	pub fn ArchFeatureInfo(comptime arch: @TagType(Arch)) type {
	46	return FeatureInfo(ArchFeature(arch));
	47	}
	48
	49	pub fn FeatureInfo(comptime EnumType: type) type {
	50	return struct {
	51	value: EnumType,
	52	name: []const u8,
	53
	54	dependencies: []const EnumType,
	55
	56	const Self = @This();
	57
	58	fn create(value: EnumType, name: []const u8) Self {
	59	return Self {
	60	.value = value,
	61	.name = name,
	62
	63	.dependencies = &[_]EnumType{},
	64	};
	65	}
	66
	67	fn createWithDeps(value: EnumType, name: []const u8, dependencies: []const EnumType) Self {
	68	return Self {
	69	.value = value,
	70	.name = name,
	71
	72	.dependencies = dependencies,
	73	};
	74	}
	75	};
	76	}

lib/std/target/feature/AArch64Feature.zig created+750

...	...	@@ -0,0 +1,750 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const AArch64Feature = enum {
	4	Aes,
	5	Am,
	6	AggressiveFma,
	7	Altnzcv,
	8	AlternateSextloadCvtF32Pattern,
	9	ArithBccFusion,
	10	ArithCbzFusion,
	11	BalanceFpOps,
	12	Bti,
	13	Ccidx,
	14	Ccpp,
	15	Crc,
	16	Ccdp,
	17	CallSavedX8,
	18	CallSavedX9,
	19	CallSavedX10,
	20	CallSavedX11,
	21	CallSavedX12,
	22	CallSavedX13,
	23	CallSavedX14,
	24	CallSavedX15,
	25	CallSavedX18,
	26	Complxnum,
	27	Crypto,
	28	CustomCheapAsMove,
	29	Dit,
	30	DisableLatencySchedHeuristic,
	31	Dotprod,
	32	Ete,
	33	ExynosCheapAsMove,
	34	Fmi,
	35	Fp16fml,
	36	FpArmv8,
	37	Fptoint,
	38	Force32bitJumpTables,
	39	Fullfp16,
	40	FuseAes,
	41	FuseAddress,
	42	FuseArithLogic,
	43	FuseCsel,
	44	FuseCryptoEor,
	45	FuseLiterals,
	46	Jsconv,
	47	Lor,
	48	Lse,
	49	LslFast,
	50	Mpam,
	51	Mte,
	52	Neon,
	53	Nv,
	54	NoNegImmediates,
	55	Pa,
	56	Pan,
	57	PanRwv,
	58	Perfmon,
	59	UsePostraScheduler,
	60	Predres,
	61	PredictableSelectExpensive,
	62	Uaops,
	63	Ras,
	64	Rasv8_4,
	65	Rcpc,
	66	RcpcImmo,
	67	Rdm,
	68	Rand,
	69	ReserveX1,
	70	ReserveX2,
	71	ReserveX3,
	72	ReserveX4,
	73	ReserveX5,
	74	ReserveX6,
	75	ReserveX7,
	76	ReserveX9,
	77	ReserveX10,
	78	ReserveX11,
	79	ReserveX12,
	80	ReserveX13,
	81	ReserveX14,
	82	ReserveX15,
	83	ReserveX18,
	84	ReserveX20,
	85	ReserveX21,
	86	ReserveX22,
	87	ReserveX23,
	88	ReserveX24,
	89	ReserveX25,
	90	ReserveX26,
	91	ReserveX27,
	92	ReserveX28,
	93	Sb,
	94	Sel2,
	95	Sha2,
	96	Sha3,
	97	Sm4,
	98	Spe,
	99	Ssbs,
	100	Sve,
	101	Sve2,
	102	Sve2Aes,
	103	Sve2Bitperm,
	104	Sve2Sha3,
	105	Sve2Sm4,
	106	SlowMisaligned128store,
	107	SlowPaired128,
	108	SlowStrqroStore,
	109	Specrestrict,
	110	StrictAlign,
	111	TlbRmi,
	112	Tme,
	113	Tracev84,
	114	Trbe,
	115	TaggedGlobals,
	116	UseAa,
	117	TpidrEl1,
	118	TpidrEl2,
	119	TpidrEl3,
	120	UseReciprocalSquareRoot,
	121	Vh,
	122	Zcm,
	123	Zcz,
	124	ZczFp,
	125	ZczFpWorkaround,
	126	ZczGp,
	127	V81a,
	128	V82a,
	129	V83a,
	130	V84a,
	131	V85a,
	132	A35,
	133	A53,
	134	A55,
	135	A57,
	136	A65,
	137	A72,
	138	A73,
	139	A75,
	140	A76,
	141	Cyclone,
	142	Exynosm1,
	143	Exynosm2,
	144	Exynosm3,
	145	Exynosm4,
	146	Falkor,
	147	Kryo,
	148	Neoversee1,
	149	Neoversen1,
	150	Saphira,
	151	Tsv110,
	152	Thunderx,
	153	Thunderx2t99,
	154	Thunderxt81,
	155	Thunderxt83,
	156	Thunderxt88,
	157
	158	pub fn getInfo(self: @This()) FeatureInfo {
	159	return feature_infos[@enumToInt(self)];
	160	}
	161
	162	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	163	FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
	164	.FpArmv8,
	165	}),
	166	FeatureInfo(@This()).create(.Am, "am", "Enable v8.4-A Activity Monitors extension", "am"),
	167	FeatureInfo(@This()).create(.AggressiveFma, "aggressive-fma", "Enable Aggressive FMA for floating-point.", "aggressive-fma"),
	168	FeatureInfo(@This()).create(.Altnzcv, "altnzcv", "Enable alternative NZCV format for floating point comparisons", "altnzcv"),
	169	FeatureInfo(@This()).create(.AlternateSextloadCvtF32Pattern, "alternate-sextload-cvt-f32-pattern", "Use alternative pattern for sextload convert to f32", "alternate-sextload-cvt-f32-pattern"),
	170	FeatureInfo(@This()).create(.ArithBccFusion, "arith-bcc-fusion", "CPU fuses arithmetic+bcc operations", "arith-bcc-fusion"),
	171	FeatureInfo(@This()).create(.ArithCbzFusion, "arith-cbz-fusion", "CPU fuses arithmetic + cbz/cbnz operations", "arith-cbz-fusion"),
	172	FeatureInfo(@This()).create(.BalanceFpOps, "balance-fp-ops", "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", "balance-fp-ops"),
	173	FeatureInfo(@This()).create(.Bti, "bti", "Enable Branch Target Identification", "bti"),
	174	FeatureInfo(@This()).create(.Ccidx, "ccidx", "Enable v8.3-A Extend of the CCSIDR number of sets", "ccidx"),
	175	FeatureInfo(@This()).create(.Ccpp, "ccpp", "Enable v8.2 data Cache Clean to Point of Persistence", "ccpp"),
	176	FeatureInfo(@This()).create(.Crc, "crc", "Enable ARMv8 CRC-32 checksum instructions", "crc"),
	177	FeatureInfo(@This()).create(.Ccdp, "ccdp", "Enable v8.5 Cache Clean to Point of Deep Persistence", "ccdp"),
	178	FeatureInfo(@This()).create(.CallSavedX8, "call-saved-x8", "Make X8 callee saved.", "call-saved-x8"),
	179	FeatureInfo(@This()).create(.CallSavedX9, "call-saved-x9", "Make X9 callee saved.", "call-saved-x9"),
	180	FeatureInfo(@This()).create(.CallSavedX10, "call-saved-x10", "Make X10 callee saved.", "call-saved-x10"),
	181	FeatureInfo(@This()).create(.CallSavedX11, "call-saved-x11", "Make X11 callee saved.", "call-saved-x11"),
	182	FeatureInfo(@This()).create(.CallSavedX12, "call-saved-x12", "Make X12 callee saved.", "call-saved-x12"),
	183	FeatureInfo(@This()).create(.CallSavedX13, "call-saved-x13", "Make X13 callee saved.", "call-saved-x13"),
	184	FeatureInfo(@This()).create(.CallSavedX14, "call-saved-x14", "Make X14 callee saved.", "call-saved-x14"),
	185	FeatureInfo(@This()).create(.CallSavedX15, "call-saved-x15", "Make X15 callee saved.", "call-saved-x15"),
	186	FeatureInfo(@This()).create(.CallSavedX18, "call-saved-x18", "Make X18 callee saved.", "call-saved-x18"),
	187	FeatureInfo(@This()).createWithSubfeatures(.Complxnum, "complxnum", "Enable v8.3-A Floating-point complex number support", "complxnum", &[_]@This() {
	188	.FpArmv8,
	189	}),
	190	FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable cryptographic instructions", "crypto", &[_]@This() {
	191	.FpArmv8,
	192	}),
	193	FeatureInfo(@This()).create(.CustomCheapAsMove, "custom-cheap-as-move", "Use custom handling of cheap instructions", "custom-cheap-as-move"),
	194	FeatureInfo(@This()).create(.Dit, "dit", "Enable v8.4-A Data Independent Timing instructions", "dit"),
	195	FeatureInfo(@This()).create(.DisableLatencySchedHeuristic, "disable-latency-sched-heuristic", "Disable latency scheduling heuristic", "disable-latency-sched-heuristic"),
	196	FeatureInfo(@This()).create(.Dotprod, "dotprod", "Enable dot product support", "dotprod"),
	197	FeatureInfo(@This()).createWithSubfeatures(.Ete, "ete", "Enable Embedded Trace Extension", "ete", &[_]@This() {
	198	.Trbe,
	199	}),
	200	FeatureInfo(@This()).createWithSubfeatures(.ExynosCheapAsMove, "exynos-cheap-as-move", "Use Exynos specific handling of cheap instructions", "exynos-cheap-as-move", &[_]@This() {
	201	.CustomCheapAsMove,
	202	}),
	203	FeatureInfo(@This()).create(.Fmi, "fmi", "Enable v8.4-A Flag Manipulation Instructions", "fmi"),
	204	FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable FP16 FML instructions", "fp16fml", &[_]@This() {
	205	.FpArmv8,
	206	}),
	207	FeatureInfo(@This()).create(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8"),
	208	FeatureInfo(@This()).create(.Fptoint, "fptoint", "Enable FRInt[32\|64][Z\|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", "fptoint"),
	209	FeatureInfo(@This()).create(.Force32bitJumpTables, "force-32bit-jump-tables", "Force jump table entries to be 32-bits wide except at MinSize", "force-32bit-jump-tables"),
	210	FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Full FP16", "fullfp16", &[_]@This() {
	211	.FpArmv8,
	212	}),
	213	FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
	214	FeatureInfo(@This()).create(.FuseAddress, "fuse-address", "CPU fuses address generation and memory operations", "fuse-address"),
	215	FeatureInfo(@This()).create(.FuseArithLogic, "fuse-arith-logic", "CPU fuses arithmetic and logic operations", "fuse-arith-logic"),
	216	FeatureInfo(@This()).create(.FuseCsel, "fuse-csel", "CPU fuses conditional select operations", "fuse-csel"),
	217	FeatureInfo(@This()).create(.FuseCryptoEor, "fuse-crypto-eor", "CPU fuses AES/PMULL and EOR operations", "fuse-crypto-eor"),
	218	FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
	219	FeatureInfo(@This()).createWithSubfeatures(.Jsconv, "jsconv", "Enable v8.3-A JavaScript FP conversion enchancement", "jsconv", &[_]@This() {
	220	.FpArmv8,
	221	}),
	222	FeatureInfo(@This()).create(.Lor, "lor", "Enables ARM v8.1 Limited Ordering Regions extension", "lor"),
	223	FeatureInfo(@This()).create(.Lse, "lse", "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", "lse"),
	224	FeatureInfo(@This()).create(.LslFast, "lsl-fast", "CPU has a fastpath logical shift of up to 3 places", "lsl-fast"),
	225	FeatureInfo(@This()).create(.Mpam, "mpam", "Enable v8.4-A Memory system Partitioning and Monitoring extension", "mpam"),
	226	FeatureInfo(@This()).create(.Mte, "mte", "Enable Memory Tagging Extension", "mte"),
	227	FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable Advanced SIMD instructions", "neon", &[_]@This() {
	228	.FpArmv8,
	229	}),
	230	FeatureInfo(@This()).create(.Nv, "nv", "Enable v8.4-A Nested Virtualization Enchancement", "nv"),
	231	FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
	232	FeatureInfo(@This()).create(.Pa, "pa", "Enable v8.3-A Pointer Authentication enchancement", "pa"),
	233	FeatureInfo(@This()).create(.Pan, "pan", "Enables ARM v8.1 Privileged Access-Never extension", "pan"),
	234	FeatureInfo(@This()).createWithSubfeatures(.PanRwv, "pan-rwv", "Enable v8.2 PAN s1e1R and s1e1W Variants", "pan-rwv", &[_]@This() {
	235	.Pan,
	236	}),
	237	FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", "perfmon"),
	238	FeatureInfo(@This()).create(.UsePostraScheduler, "use-postra-scheduler", "Schedule again after register allocation", "use-postra-scheduler"),
	239	FeatureInfo(@This()).create(.Predres, "predres", "Enable v8.5a execution and data prediction invalidation instructions", "predres"),
	240	FeatureInfo(@This()).create(.PredictableSelectExpensive, "predictable-select-expensive", "Prefer likely predicted branches over selects", "predictable-select-expensive"),
	241	FeatureInfo(@This()).create(.Uaops, "uaops", "Enable v8.2 UAO PState", "uaops"),
	242	FeatureInfo(@This()).create(.Ras, "ras", "Enable ARMv8 Reliability, Availability and Serviceability Extensions", "ras"),
	243	FeatureInfo(@This()).createWithSubfeatures(.Rasv8_4, "rasv8_4", "Enable v8.4-A Reliability, Availability and Serviceability extension", "rasv8_4", &[_]@This() {
	244	.Ras,
	245	}),
	246	FeatureInfo(@This()).create(.Rcpc, "rcpc", "Enable support for RCPC extension", "rcpc"),
	247	FeatureInfo(@This()).createWithSubfeatures(.RcpcImmo, "rcpc-immo", "Enable v8.4-A RCPC instructions with Immediate Offsets", "rcpc-immo", &[_]@This() {
	248	.Rcpc,
	249	}),
	250	FeatureInfo(@This()).create(.Rdm, "rdm", "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", "rdm"),
	251	FeatureInfo(@This()).create(.Rand, "rand", "Enable Random Number generation instructions", "rand"),
	252	FeatureInfo(@This()).create(.ReserveX1, "reserve-x1", "Reserve X1, making it unavailable as a GPR", "reserve-x1"),
	253	FeatureInfo(@This()).create(.ReserveX2, "reserve-x2", "Reserve X2, making it unavailable as a GPR", "reserve-x2"),
	254	FeatureInfo(@This()).create(.ReserveX3, "reserve-x3", "Reserve X3, making it unavailable as a GPR", "reserve-x3"),
	255	FeatureInfo(@This()).create(.ReserveX4, "reserve-x4", "Reserve X4, making it unavailable as a GPR", "reserve-x4"),
	256	FeatureInfo(@This()).create(.ReserveX5, "reserve-x5", "Reserve X5, making it unavailable as a GPR", "reserve-x5"),
	257	FeatureInfo(@This()).create(.ReserveX6, "reserve-x6", "Reserve X6, making it unavailable as a GPR", "reserve-x6"),
	258	FeatureInfo(@This()).create(.ReserveX7, "reserve-x7", "Reserve X7, making it unavailable as a GPR", "reserve-x7"),
	259	FeatureInfo(@This()).create(.ReserveX9, "reserve-x9", "Reserve X9, making it unavailable as a GPR", "reserve-x9"),
	260	FeatureInfo(@This()).create(.ReserveX10, "reserve-x10", "Reserve X10, making it unavailable as a GPR", "reserve-x10"),
	261	FeatureInfo(@This()).create(.ReserveX11, "reserve-x11", "Reserve X11, making it unavailable as a GPR", "reserve-x11"),
	262	FeatureInfo(@This()).create(.ReserveX12, "reserve-x12", "Reserve X12, making it unavailable as a GPR", "reserve-x12"),
	263	FeatureInfo(@This()).create(.ReserveX13, "reserve-x13", "Reserve X13, making it unavailable as a GPR", "reserve-x13"),
	264	FeatureInfo(@This()).create(.ReserveX14, "reserve-x14", "Reserve X14, making it unavailable as a GPR", "reserve-x14"),
	265	FeatureInfo(@This()).create(.ReserveX15, "reserve-x15", "Reserve X15, making it unavailable as a GPR", "reserve-x15"),
	266	FeatureInfo(@This()).create(.ReserveX18, "reserve-x18", "Reserve X18, making it unavailable as a GPR", "reserve-x18"),
	267	FeatureInfo(@This()).create(.ReserveX20, "reserve-x20", "Reserve X20, making it unavailable as a GPR", "reserve-x20"),
	268	FeatureInfo(@This()).create(.ReserveX21, "reserve-x21", "Reserve X21, making it unavailable as a GPR", "reserve-x21"),
	269	FeatureInfo(@This()).create(.ReserveX22, "reserve-x22", "Reserve X22, making it unavailable as a GPR", "reserve-x22"),
	270	FeatureInfo(@This()).create(.ReserveX23, "reserve-x23", "Reserve X23, making it unavailable as a GPR", "reserve-x23"),
	271	FeatureInfo(@This()).create(.ReserveX24, "reserve-x24", "Reserve X24, making it unavailable as a GPR", "reserve-x24"),
	272	FeatureInfo(@This()).create(.ReserveX25, "reserve-x25", "Reserve X25, making it unavailable as a GPR", "reserve-x25"),
	273	FeatureInfo(@This()).create(.ReserveX26, "reserve-x26", "Reserve X26, making it unavailable as a GPR", "reserve-x26"),
	274	FeatureInfo(@This()).create(.ReserveX27, "reserve-x27", "Reserve X27, making it unavailable as a GPR", "reserve-x27"),
	275	FeatureInfo(@This()).create(.ReserveX28, "reserve-x28", "Reserve X28, making it unavailable as a GPR", "reserve-x28"),
	276	FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5 Speculation Barrier", "sb"),
	277	FeatureInfo(@This()).create(.Sel2, "sel2", "Enable v8.4-A Secure Exception Level 2 extension", "sel2"),
	278	FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
	279	.FpArmv8,
	280	}),
	281	FeatureInfo(@This()).createWithSubfeatures(.Sha3, "sha3", "Enable SHA512 and SHA3 support", "sha3", &[_]@This() {
	282	.FpArmv8,
	283	}),
	284	FeatureInfo(@This()).createWithSubfeatures(.Sm4, "sm4", "Enable SM3 and SM4 support", "sm4", &[_]@This() {
	285	.FpArmv8,
	286	}),
	287	FeatureInfo(@This()).create(.Spe, "spe", "Enable Statistical Profiling extension", "spe"),
	288	FeatureInfo(@This()).create(.Ssbs, "ssbs", "Enable Speculative Store Bypass Safe bit", "ssbs"),
	289	FeatureInfo(@This()).create(.Sve, "sve", "Enable Scalable Vector Extension (SVE) instructions", "sve"),
	290	FeatureInfo(@This()).createWithSubfeatures(.Sve2, "sve2", "Enable Scalable Vector Extension 2 (SVE2) instructions", "sve2", &[_]@This() {
	291	.Sve,
	292	}),
	293	FeatureInfo(@This()).createWithSubfeatures(.Sve2Aes, "sve2-aes", "Enable AES SVE2 instructions", "sve2-aes", &[_]@This() {
	294	.Sve,
	295	.FpArmv8,
	296	}),
	297	FeatureInfo(@This()).createWithSubfeatures(.Sve2Bitperm, "sve2-bitperm", "Enable bit permutation SVE2 instructions", "sve2-bitperm", &[_]@This() {
	298	.Sve,
	299	}),
	300	FeatureInfo(@This()).createWithSubfeatures(.Sve2Sha3, "sve2-sha3", "Enable SHA3 SVE2 instructions", "sve2-sha3", &[_]@This() {
	301	.Sve,
	302	.FpArmv8,
	303	}),
	304	FeatureInfo(@This()).createWithSubfeatures(.Sve2Sm4, "sve2-sm4", "Enable SM4 SVE2 instructions", "sve2-sm4", &[_]@This() {
	305	.Sve,
	306	.FpArmv8,
	307	}),
	308	FeatureInfo(@This()).create(.SlowMisaligned128store, "slow-misaligned-128store", "Misaligned 128 bit stores are slow", "slow-misaligned-128store"),
	309	FeatureInfo(@This()).create(.SlowPaired128, "slow-paired-128", "Paired 128 bit loads and stores are slow", "slow-paired-128"),
	310	FeatureInfo(@This()).create(.SlowStrqroStore, "slow-strqro-store", "STR of Q register with register offset is slow", "slow-strqro-store"),
	311	FeatureInfo(@This()).create(.Specrestrict, "specrestrict", "Enable architectural speculation restriction", "specrestrict"),
	312	FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
	313	FeatureInfo(@This()).create(.TlbRmi, "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", "tlb-rmi"),
	314	FeatureInfo(@This()).create(.Tme, "tme", "Enable Transactional Memory Extension", "tme"),
	315	FeatureInfo(@This()).create(.Tracev84, "tracev8.4", "Enable v8.4-A Trace extension", "tracev8.4"),
	316	FeatureInfo(@This()).create(.Trbe, "trbe", "Enable Trace Buffer Extension", "trbe"),
	317	FeatureInfo(@This()).create(.TaggedGlobals, "tagged-globals", "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits", "tagged-globals"),
	318	FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
	319	FeatureInfo(@This()).create(.TpidrEl1, "tpidr-el1", "Permit use of TPIDR_EL1 for the TLS base", "tpidr-el1"),
	320	FeatureInfo(@This()).create(.TpidrEl2, "tpidr-el2", "Permit use of TPIDR_EL2 for the TLS base", "tpidr-el2"),
	321	FeatureInfo(@This()).create(.TpidrEl3, "tpidr-el3", "Permit use of TPIDR_EL3 for the TLS base", "tpidr-el3"),
	322	FeatureInfo(@This()).create(.UseReciprocalSquareRoot, "use-reciprocal-square-root", "Use the reciprocal square root approximation", "use-reciprocal-square-root"),
	323	FeatureInfo(@This()).create(.Vh, "vh", "Enables ARM v8.1 Virtual Host extension", "vh"),
	324	FeatureInfo(@This()).create(.Zcm, "zcm", "Has zero-cycle register moves", "zcm"),
	325	FeatureInfo(@This()).createWithSubfeatures(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz", &[_]@This() {
	326	.ZczFp,
	327	.ZczGp,
	328	}),
	329	FeatureInfo(@This()).create(.ZczFp, "zcz-fp", "Has zero-cycle zeroing instructions for FP registers", "zcz-fp"),
	330	FeatureInfo(@This()).create(.ZczFpWorkaround, "zcz-fp-workaround", "The zero-cycle floating-point zeroing instruction has a bug", "zcz-fp-workaround"),
	331	FeatureInfo(@This()).create(.ZczGp, "zcz-gp", "Has zero-cycle zeroing instructions for generic registers", "zcz-gp"),
	332	FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
	333	.Pan,
	334	.Rdm,
	335	.Lse,
	336	.Crc,
	337	.Lor,
	338	.Vh,
	339	}),
	340	FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
	341	.Ccpp,
	342	.Pan,
	343	.Rdm,
	344	.Lse,
	345	.Crc,
	346	.Lor,
	347	.Uaops,
	348	.Vh,
	349	.Ras,
	350	}),
	351	FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
	352	.Rcpc,
	353	.Ccpp,
	354	.Pan,
	355	.Rdm,
	356	.FpArmv8,
	357	.Lse,
	358	.Ccidx,
	359	.Crc,
	360	.Lor,
	361	.Pa,
	362	.Uaops,
	363	.Vh,
	364	.Ras,
	365	}),
	366	FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
	367	.Nv,
	368	.Am,
	369	.Lse,
	370	.Sel2,
	371	.Lor,
	372	.Tracev84,
	373	.Uaops,
	374	.Ccpp,
	375	.TlbRmi,
	376	.Fmi,
	377	.Rcpc,
	378	.Pan,
	379	.Rdm,
	380	.Pa,
	381	.Dit,
	382	.Ras,
	383	.Mpam,
	384	.FpArmv8,
	385	.Ccidx,
	386	.Dotprod,
	387	.Crc,
	388	.Vh,
	389	}),
	390	FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
	391	.Nv,
	392	.Am,
	393	.Lse,
	394	.Fptoint,
	395	.Sel2,
	396	.Lor,
	397	.Tracev84,
	398	.Uaops,
	399	.Sb,
	400	.Ccpp,
	401	.Specrestrict,
	402	.Bti,
	403	.Ccdp,
	404	.TlbRmi,
	405	.Fmi,
	406	.Rcpc,
	407	.Pan,
	408	.Rdm,
	409	.Pa,
	410	.Ssbs,
	411	.Dit,
	412	.Ras,
	413	.Mpam,
	414	.Altnzcv,
	415	.FpArmv8,
	416	.Ccidx,
	417	.Dotprod,
	418	.Crc,
	419	.Predres,
	420	.Vh,
	421	}),
	422	FeatureInfo(@This()).createWithSubfeatures(.A35, "a35", "Cortex-A35 ARM processors", "a35", &[_]@This() {
	423	.Perfmon,
	424	.FpArmv8,
	425	.Crc,
	426	}),
	427	FeatureInfo(@This()).createWithSubfeatures(.A53, "a53", "Cortex-A53 ARM processors", "a53", &[_]@This() {
	428	.UseAa,
	429	.FuseAes,
	430	.FpArmv8,
	431	.Perfmon,
	432	.Crc,
	433	.BalanceFpOps,
	434	.UsePostraScheduler,
	435	.CustomCheapAsMove,
	436	}),
	437	FeatureInfo(@This()).createWithSubfeatures(.A55, "a55", "Cortex-A55 ARM processors", "a55", &[_]@This() {
	438	.Rcpc,
	439	.Ccpp,
	440	.Pan,
	441	.Rdm,
	442	.FuseAes,
	443	.Perfmon,
	444	.FpArmv8,
	445	.Lse,
	446	.Crc,
	447	.Dotprod,
	448	.Lor,
	449	.Uaops,
	450	.Vh,
	451	.Ras,
	452	}),
	453	FeatureInfo(@This()).createWithSubfeatures(.A57, "a57", "Cortex-A57 ARM processors", "a57", &[_]@This() {
	454	.FuseLiterals,
	455	.FuseAes,
	456	.FpArmv8,
	457	.Perfmon,
	458	.Crc,
	459	.BalanceFpOps,
	460	.UsePostraScheduler,
	461	.CustomCheapAsMove,
	462	.PredictableSelectExpensive,
	463	}),
	464	FeatureInfo(@This()).createWithSubfeatures(.A65, "a65", "Cortex-A65 ARM processors", "a65", &[_]@This() {
	465	.Rcpc,
	466	.Ccpp,
	467	.Pan,
	468	.Rdm,
	469	.FpArmv8,
	470	.Lse,
	471	.Crc,
	472	.Dotprod,
	473	.Lor,
	474	.Ssbs,
	475	.Uaops,
	476	.Vh,
	477	.Ras,
	478	}),
	479	FeatureInfo(@This()).createWithSubfeatures(.A72, "a72", "Cortex-A72 ARM processors", "a72", &[_]@This() {
	480	.Perfmon,
	481	.FuseAes,
	482	.FpArmv8,
	483	.Crc,
	484	}),
	485	FeatureInfo(@This()).createWithSubfeatures(.A73, "a73", "Cortex-A73 ARM processors", "a73", &[_]@This() {
	486	.Perfmon,
	487	.FuseAes,
	488	.FpArmv8,
	489	.Crc,
	490	}),
	491	FeatureInfo(@This()).createWithSubfeatures(.A75, "a75", "Cortex-A75 ARM processors", "a75", &[_]@This() {
	492	.Rcpc,
	493	.Ccpp,
	494	.Pan,
	495	.Rdm,
	496	.FuseAes,
	497	.Perfmon,
	498	.FpArmv8,
	499	.Lse,
	500	.Crc,
	501	.Dotprod,
	502	.Lor,
	503	.Uaops,
	504	.Vh,
	505	.Ras,
	506	}),
	507	FeatureInfo(@This()).createWithSubfeatures(.A76, "a76", "Cortex-A76 ARM processors", "a76", &[_]@This() {
	508	.Rcpc,
	509	.Ccpp,
	510	.Pan,
	511	.Rdm,
	512	.FpArmv8,
	513	.Lse,
	514	.Crc,
	515	.Dotprod,
	516	.Lor,
	517	.Ssbs,
	518	.Uaops,
	519	.Vh,
	520	.Ras,
	521	}),
	522	FeatureInfo(@This()).createWithSubfeatures(.Cyclone, "cyclone", "Cyclone", "cyclone", &[_]@This() {
	523	.ZczFp,
	524	.ArithCbzFusion,
	525	.FuseAes,
	526	.AlternateSextloadCvtF32Pattern,
	527	.ZczFpWorkaround,
	528	.FpArmv8,
	529	.Perfmon,
	530	.DisableLatencySchedHeuristic,
	531	.Zcm,
	532	.ZczGp,
	533	.ArithBccFusion,
	534	.FuseCryptoEor,
	535	}),
	536	FeatureInfo(@This()).createWithSubfeatures(.Exynosm1, "exynosm1", "Samsung Exynos-M1 processors", "exynosm1", &[_]@This() {
	537	.ZczFp,
	538	.FuseAes,
	539	.SlowPaired128,
	540	.Force32bitJumpTables,
	541	.UseReciprocalSquareRoot,
	542	.FpArmv8,
	543	.Perfmon,
	544	.SlowMisaligned128store,
	545	.Crc,
	546	.UsePostraScheduler,
	547	.CustomCheapAsMove,
	548	}),
	549	FeatureInfo(@This()).createWithSubfeatures(.Exynosm2, "exynosm2", "Samsung Exynos-M2 processors", "exynosm2", &[_]@This() {
	550	.ZczFp,
	551	.FuseAes,
	552	.SlowPaired128,
	553	.Force32bitJumpTables,
	554	.FpArmv8,
	555	.Perfmon,
	556	.SlowMisaligned128store,
	557	.Crc,
	558	.UsePostraScheduler,
	559	.CustomCheapAsMove,
	560	}),
	561	FeatureInfo(@This()).createWithSubfeatures(.Exynosm3, "exynosm3", "Samsung Exynos-M3 processors", "exynosm3", &[_]@This() {
	562	.ZczFp,
	563	.FuseLiterals,
	564	.FuseAes,
	565	.Force32bitJumpTables,
	566	.FpArmv8,
	567	.Perfmon,
	568	.Crc,
	569	.LslFast,
	570	.FuseAddress,
	571	.UsePostraScheduler,
	572	.CustomCheapAsMove,
	573	.PredictableSelectExpensive,
	574	.FuseCsel,
	575	}),
	576	FeatureInfo(@This()).createWithSubfeatures(.Exynosm4, "exynosm4", "Samsung Exynos-M4 processors", "exynosm4", &[_]@This() {
	577	.ZczFp,
	578	.Lse,
	579	.FuseArithLogic,
	580	.Lor,
	581	.UsePostraScheduler,
	582	.Uaops,
	583	.CustomCheapAsMove,
	584	.ArithBccFusion,
	585	.Ccpp,
	586	.Perfmon,
	587	.Pan,
	588	.Rdm,
	589	.FuseLiterals,
	590	.Force32bitJumpTables,
	591	.LslFast,
	592	.FuseAddress,
	593	.ZczGp,
	594	.Ras,
	595	.FuseCsel,
	596	.ArithCbzFusion,
	597	.FuseAes,
	598	.FpArmv8,
	599	.Crc,
	600	.Dotprod,
	601	.Vh,
	602	}),
	603	FeatureInfo(@This()).createWithSubfeatures(.Falkor, "falkor", "Qualcomm Falkor processors", "falkor", &[_]@This() {
	604	.ZczFp,
	605	.Rdm,
	606	.SlowStrqroStore,
	607	.Perfmon,
	608	.FpArmv8,
	609	.Crc,
	610	.LslFast,
	611	.UsePostraScheduler,
	612	.ZczGp,
	613	.CustomCheapAsMove,
	614	.PredictableSelectExpensive,
	615	}),
	616	FeatureInfo(@This()).createWithSubfeatures(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo", &[_]@This() {
	617	.ZczFp,
	618	.Perfmon,
	619	.FpArmv8,
	620	.Crc,
	621	.LslFast,
	622	.UsePostraScheduler,
	623	.ZczGp,
	624	.CustomCheapAsMove,
	625	.PredictableSelectExpensive,
	626	}),
	627	FeatureInfo(@This()).createWithSubfeatures(.Neoversee1, "neoversee1", "Neoverse E1 ARM processors", "neoversee1", &[_]@This() {
	628	.Rcpc,
	629	.Ccpp,
	630	.Pan,
	631	.Rdm,
	632	.FpArmv8,
	633	.Lse,
	634	.Crc,
	635	.Dotprod,
	636	.Lor,
	637	.Ssbs,
	638	.Uaops,
	639	.Vh,
	640	.Ras,
	641	}),
	642	FeatureInfo(@This()).createWithSubfeatures(.Neoversen1, "neoversen1", "Neoverse N1 ARM processors", "neoversen1", &[_]@This() {
	643	.Rcpc,
	644	.Spe,
	645	.Ccpp,
	646	.Pan,
	647	.Rdm,
	648	.FpArmv8,
	649	.Lse,
	650	.Crc,
	651	.Dotprod,
	652	.Lor,
	653	.Ssbs,
	654	.Uaops,
	655	.Vh,
	656	.Ras,
	657	}),
	658	FeatureInfo(@This()).createWithSubfeatures(.Saphira, "saphira", "Qualcomm Saphira processors", "saphira", &[_]@This() {
	659	.ZczFp,
	660	.Nv,
	661	.Am,
	662	.Lse,
	663	.Sel2,
	664	.Lor,
	665	.Tracev84,
	666	.Uaops,
	667	.UsePostraScheduler,
	668	.CustomCheapAsMove,
	669	.Ccpp,
	670	.Perfmon,
	671	.TlbRmi,
	672	.PredictableSelectExpensive,
	673	.Fmi,
	674	.Rcpc,
	675	.Pan,
	676	.Rdm,
	677	.LslFast,
	678	.Pa,
	679	.ZczGp,
	680	.Dit,
	681	.Ras,
	682	.Spe,
	683	.Mpam,
	684	.FpArmv8,
	685	.Ccidx,
	686	.Dotprod,
	687	.Crc,
	688	.Vh,
	689	}),
	690	FeatureInfo(@This()).createWithSubfeatures(.Tsv110, "tsv110", "HiSilicon TS-V110 processors", "tsv110", &[_]@This() {
	691	.Uaops,
	692	.Spe,
	693	.Ccpp,
	694	.Pan,
	695	.Rdm,
	696	.FuseAes,
	697	.Vh,
	698	.Perfmon,
	699	.FpArmv8,
	700	.Lse,
	701	.Crc,
	702	.Dotprod,
	703	.Lor,
	704	.UsePostraScheduler,
	705	.CustomCheapAsMove,
	706	.Ras,
	707	}),
	708	FeatureInfo(@This()).createWithSubfeatures(.Thunderx, "thunderx", "Cavium ThunderX processors", "thunderx", &[_]@This() {
	709	.Perfmon,
	710	.FpArmv8,
	711	.Crc,
	712	.UsePostraScheduler,
	713	.PredictableSelectExpensive,
	714	}),
	715	FeatureInfo(@This()).createWithSubfeatures(.Thunderx2t99, "thunderx2t99", "Cavium ThunderX2 processors", "thunderx2t99", &[_]@This() {
	716	.Pan,
	717	.Rdm,
	718	.Vh,
	719	.AggressiveFma,
	720	.FpArmv8,
	721	.Lse,
	722	.Crc,
	723	.Lor,
	724	.UsePostraScheduler,
	725	.ArithBccFusion,
	726	.PredictableSelectExpensive,
	727	}),
	728	FeatureInfo(@This()).createWithSubfeatures(.Thunderxt81, "thunderxt81", "Cavium ThunderX processors", "thunderxt81", &[_]@This() {
	729	.Perfmon,
	730	.FpArmv8,
	731	.Crc,
	732	.UsePostraScheduler,
	733	.PredictableSelectExpensive,
	734	}),
	735	FeatureInfo(@This()).createWithSubfeatures(.Thunderxt83, "thunderxt83", "Cavium ThunderX processors", "thunderxt83", &[_]@This() {
	736	.Perfmon,
	737	.FpArmv8,
	738	.Crc,
	739	.UsePostraScheduler,
	740	.PredictableSelectExpensive,
	741	}),
	742	FeatureInfo(@This()).createWithSubfeatures(.Thunderxt88, "thunderxt88", "Cavium ThunderX processors", "thunderxt88", &[_]@This() {
	743	.Perfmon,
	744	.FpArmv8,
	745	.Crc,
	746	.UsePostraScheduler,
	747	.PredictableSelectExpensive,
	748	}),
	749	};
	750	};

lib/std/target/feature/AmdGpuFeature.zig created+343

...	...	@@ -0,0 +1,343 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const AmdGpuFeature = enum {
	4	BitInsts16,
	5	AddNoCarryInsts,
	6	ApertureRegs,
	7	AtomicFaddInsts,
	8	AutoWaitcntBeforeBarrier,
	9	CiInsts,
	10	CodeObjectV3,
	11	Cumode,
	12	DlInsts,
	13	Dpp,
	14	Dpp8,
	15	NoSramEccSupport,
	16	NoXnackSupport,
	17	Dot1Insts,
	18	Dot2Insts,
	19	Dot3Insts,
	20	Dot4Insts,
	21	Dot5Insts,
	22	Dot6Insts,
	23	DumpCode,
	24	Dumpcode,
	25	EnableDs128,
	26	LoadStoreOpt,
	27	EnablePrtStrictNull,
	28	SiScheduler,
	29	UnsafeDsOffsetFolding,
	30	Fmaf,
	31	Fp16Denormals,
	32	Fp32Denormals,
	33	Fp64,
	34	Fp64Denormals,
	35	Fp64Fp16Denormals,
	36	FpExceptions,
	37	FastFmaf,
	38	FlatAddressSpace,
	39	FlatForGlobal,
	40	FlatGlobalInsts,
	41	FlatInstOffsets,
	42	FlatScratchInsts,
	43	FlatSegmentOffsetBug,
	44	FmaMixInsts,
	45	Gcn3Encoding,
	46	Gfx7Gfx8Gfx9Insts,
	47	Gfx8Insts,
	48	Gfx9,
	49	Gfx9Insts,
	50	Gfx10,
	51	Gfx10Insts,
	52	InstFwdPrefetchBug,
	53	IntClampInsts,
	54	Inv2piInlineImm,
	55	Ldsbankcount16,
	56	Ldsbankcount32,
	57	LdsBranchVmemWarHazard,
	58	LdsMisalignedBug,
	59	Localmemorysize0,
	60	Localmemorysize32768,
	61	Localmemorysize65536,
	62	MaiInsts,
	63	MfmaInlineLiteralBug,
	64	MimgR128,
	65	MadMixInsts,
	66	MaxPrivateElementSize4,
	67	MaxPrivateElementSize8,
	68	MaxPrivateElementSize16,
	69	Movrel,
	70	NsaEncoding,
	71	NsaToVmemBug,
	72	NoDataDepHazard,
	73	NoSdstCmpx,
	74	Offset3fBug,
	75	PkFmacF16Inst,
	76	PromoteAlloca,
	77	R128A16,
	78	RegisterBanking,
	79	Sdwa,
	80	SdwaMav,
	81	SdwaOmod,
	82	SdwaOutModsVopc,
	83	SdwaScalar,
	84	SdwaSdst,
	85	SgprInitBug,
	86	SmemToVectorWriteHazard,
	87	SMemrealtime,
	88	SramEcc,
	89	ScalarAtomics,
	90	ScalarFlatScratchInsts,
	91	ScalarStores,
	92	SeaIslands,
	93	SouthernIslands,
	94	TrapHandler,
	95	TrigReducedRange,
	96	UnalignedBufferAccess,
	97	UnalignedScratchAccess,
	98	UnpackedD16Vmem,
	99	VgprIndexMode,
	100	VmemToScalarWriteHazard,
	101	Vop3Literal,
	102	Vop3p,
	103	VcmpxExecWarHazard,
	104	VcmpxPermlaneHazard,
	105	VolcanicIslands,
	106	Vscnt,
	107	Wavefrontsize16,
	108	Wavefrontsize32,
	109	Wavefrontsize64,
	110	Xnack,
	111	HalfRate64Ops,
	112
	113	pub fn getInfo(self: @This()) FeatureInfo {
	114	return feature_infos[@enumToInt(self)];
	115	}
	116
	117	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	118	FeatureInfo(@This()).create(.BitInsts16, "16-bit-insts", "Has i16/f16 instructions", "16-bit-insts"),
	119	FeatureInfo(@This()).create(.AddNoCarryInsts, "add-no-carry-insts", "Have VALU add/sub instructions without carry out", "add-no-carry-insts"),
	120	FeatureInfo(@This()).create(.ApertureRegs, "aperture-regs", "Has Memory Aperture Base and Size Registers", "aperture-regs"),
	121	FeatureInfo(@This()).create(.AtomicFaddInsts, "atomic-fadd-insts", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", "atomic-fadd-insts"),
	122	FeatureInfo(@This()).create(.AutoWaitcntBeforeBarrier, "auto-waitcnt-before-barrier", "Hardware automatically inserts waitcnt before barrier", "auto-waitcnt-before-barrier"),
	123	FeatureInfo(@This()).create(.CiInsts, "ci-insts", "Additional instructions for CI+", "ci-insts"),
	124	FeatureInfo(@This()).create(.CodeObjectV3, "code-object-v3", "Generate code object version 3", "code-object-v3"),
	125	FeatureInfo(@This()).create(.Cumode, "cumode", "Enable CU wavefront execution mode", "cumode"),
	126	FeatureInfo(@This()).create(.DlInsts, "dl-insts", "Has v_fmac_f32 and v_xnor_b32 instructions", "dl-insts"),
	127	FeatureInfo(@This()).create(.Dpp, "dpp", "Support DPP (Data Parallel Primitives) extension", "dpp"),
	128	FeatureInfo(@This()).create(.Dpp8, "dpp8", "Support DPP8 (Data Parallel Primitives) extension", "dpp8"),
	129	FeatureInfo(@This()).create(.NoSramEccSupport, "no-sram-ecc-support", "Hardware does not support SRAM ECC", "no-sram-ecc-support"),
	130	FeatureInfo(@This()).create(.NoXnackSupport, "no-xnack-support", "Hardware does not support XNACK", "no-xnack-support"),
	131	FeatureInfo(@This()).create(.Dot1Insts, "dot1-insts", "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", "dot1-insts"),
	132	FeatureInfo(@This()).create(.Dot2Insts, "dot2-insts", "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", "dot2-insts"),
	133	FeatureInfo(@This()).create(.Dot3Insts, "dot3-insts", "Has v_dot8c_i32_i4 instruction", "dot3-insts"),
	134	FeatureInfo(@This()).create(.Dot4Insts, "dot4-insts", "Has v_dot2c_i32_i16 instruction", "dot4-insts"),
	135	FeatureInfo(@This()).create(.Dot5Insts, "dot5-insts", "Has v_dot2c_f32_f16 instruction", "dot5-insts"),
	136	FeatureInfo(@This()).create(.Dot6Insts, "dot6-insts", "Has v_dot4c_i32_i8 instruction", "dot6-insts"),
	137	FeatureInfo(@This()).create(.DumpCode, "DumpCode", "Dump MachineInstrs in the CodeEmitter", "DumpCode"),
	138	FeatureInfo(@This()).create(.Dumpcode, "dumpcode", "Dump MachineInstrs in the CodeEmitter", "dumpcode"),
	139	FeatureInfo(@This()).create(.EnableDs128, "enable-ds128", "Use ds_{read\|write}_b128", "enable-ds128"),
	140	FeatureInfo(@This()).create(.LoadStoreOpt, "load-store-opt", "Enable SI load/store optimizer pass", "load-store-opt"),
	141	FeatureInfo(@This()).create(.EnablePrtStrictNull, "enable-prt-strict-null", "Enable zeroing of result registers for sparse texture fetches", "enable-prt-strict-null"),
	142	FeatureInfo(@This()).create(.SiScheduler, "si-scheduler", "Enable SI Machine Scheduler", "si-scheduler"),
	143	FeatureInfo(@This()).create(.UnsafeDsOffsetFolding, "unsafe-ds-offset-folding", "Force using DS instruction immediate offsets on SI", "unsafe-ds-offset-folding"),
	144	FeatureInfo(@This()).create(.Fmaf, "fmaf", "Enable single precision FMA (not as fast as mul+add, but fused)", "fmaf"),
	145	FeatureInfo(@This()).createWithSubfeatures(.Fp16Denormals, "fp16-denormals", "Enable half precision denormal handling", "fp16-denormals", &[_]@This() {
	146	.Fp64,
	147	}),
	148	FeatureInfo(@This()).create(.Fp32Denormals, "fp32-denormals", "Enable single precision denormal handling", "fp32-denormals"),
	149	FeatureInfo(@This()).create(.Fp64, "fp64", "Enable double precision operations", "fp64"),
	150	FeatureInfo(@This()).createWithSubfeatures(.Fp64Denormals, "fp64-denormals", "Enable double and half precision denormal handling", "fp64-denormals", &[_]@This() {
	151	.Fp64,
	152	}),
	153	FeatureInfo(@This()).createWithSubfeatures(.Fp64Fp16Denormals, "fp64-fp16-denormals", "Enable double and half precision denormal handling", "fp64-fp16-denormals", &[_]@This() {
	154	.Fp64,
	155	}),
	156	FeatureInfo(@This()).create(.FpExceptions, "fp-exceptions", "Enable floating point exceptions", "fp-exceptions"),
	157	FeatureInfo(@This()).create(.FastFmaf, "fast-fmaf", "Assuming f32 fma is at least as fast as mul + add", "fast-fmaf"),
	158	FeatureInfo(@This()).create(.FlatAddressSpace, "flat-address-space", "Support flat address space", "flat-address-space"),
	159	FeatureInfo(@This()).create(.FlatForGlobal, "flat-for-global", "Force to generate flat instruction for global", "flat-for-global"),
	160	FeatureInfo(@This()).create(.FlatGlobalInsts, "flat-global-insts", "Have global_* flat memory instructions", "flat-global-insts"),
	161	FeatureInfo(@This()).create(.FlatInstOffsets, "flat-inst-offsets", "Flat instructions have immediate offset addressing mode", "flat-inst-offsets"),
	162	FeatureInfo(@This()).create(.FlatScratchInsts, "flat-scratch-insts", "Have scratch_* flat memory instructions", "flat-scratch-insts"),
	163	FeatureInfo(@This()).create(.FlatSegmentOffsetBug, "flat-segment-offset-bug", "GFX10 bug, inst_offset ignored in flat segment", "flat-segment-offset-bug"),
	164	FeatureInfo(@This()).create(.FmaMixInsts, "fma-mix-insts", "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", "fma-mix-insts"),
	165	FeatureInfo(@This()).create(.Gcn3Encoding, "gcn3-encoding", "Encoding format for VI", "gcn3-encoding"),
	166	FeatureInfo(@This()).create(.Gfx7Gfx8Gfx9Insts, "gfx7-gfx8-gfx9-insts", "Instructions shared in GFX7, GFX8, GFX9", "gfx7-gfx8-gfx9-insts"),
	167	FeatureInfo(@This()).create(.Gfx8Insts, "gfx8-insts", "Additional instructions for GFX8+", "gfx8-insts"),
	168	FeatureInfo(@This()).createWithSubfeatures(.Gfx9, "gfx9", "GFX9 GPU generation", "gfx9", &[_]@This() {
	169	.Gfx9Insts,
	170	.Wavefrontsize64,
	171	.Fp64,
	172	.Gcn3Encoding,
	173	.FastFmaf,
	174	.Sdwa,
	175	.SdwaScalar,
	176	.VgprIndexMode,
	177	.Dpp,
	178	.AddNoCarryInsts,
	179	.SdwaOmod,
	180	.SdwaSdst,
	181	.ScalarAtomics,
	182	.FlatAddressSpace,
	183	.ScalarFlatScratchInsts,
	184	.Gfx8Insts,
	185	.Gfx7Gfx8Gfx9Insts,
	186	.R128A16,
	187	.IntClampInsts,
	188	.ScalarStores,
	189	.ApertureRegs,
	190	.CiInsts,
	191	.FlatGlobalInsts,
	192	.BitInsts16,
	193	.FlatScratchInsts,
	194	.SMemrealtime,
	195	.Vop3p,
	196	.FlatInstOffsets,
	197	.Inv2piInlineImm,
	198	.Localmemorysize65536,
	199	}),
	200	FeatureInfo(@This()).create(.Gfx9Insts, "gfx9-insts", "Additional instructions for GFX9+", "gfx9-insts"),
	201	FeatureInfo(@This()).createWithSubfeatures(.Gfx10, "gfx10", "GFX10 GPU generation", "gfx10", &[_]@This() {
	202	.Gfx9Insts,
	203	.NoSdstCmpx,
	204	.Fp64,
	205	.FastFmaf,
	206	.Sdwa,
	207	.SdwaScalar,
	208	.Dpp,
	209	.RegisterBanking,
	210	.Gfx10Insts,
	211	.AddNoCarryInsts,
	212	.SdwaOmod,
	213	.SdwaSdst,
	214	.FlatAddressSpace,
	215	.Gfx8Insts,
	216	.FmaMixInsts,
	217	.PkFmacF16Inst,
	218	.Vop3Literal,
	219	.MimgR128,
	220	.NoSramEccSupport,
	221	.IntClampInsts,
	222	.Movrel,
	223	.Dpp8,
	224	.ApertureRegs,
	225	.NoDataDepHazard,
	226	.CiInsts,
	227	.FlatGlobalInsts,
	228	.BitInsts16,
	229	.FlatScratchInsts,
	230	.SMemrealtime,
	231	.Vop3p,
	232	.FlatInstOffsets,
	233	.Inv2piInlineImm,
	234	.Localmemorysize65536,
	235	.Vscnt,
	236	}),
	237	FeatureInfo(@This()).create(.Gfx10Insts, "gfx10-insts", "Additional instructions for GFX10+", "gfx10-insts"),
	238	FeatureInfo(@This()).create(.InstFwdPrefetchBug, "inst-fwd-prefetch-bug", "S_INST_PREFETCH instruction causes shader to hang", "inst-fwd-prefetch-bug"),
	239	FeatureInfo(@This()).create(.IntClampInsts, "int-clamp-insts", "Support clamp for integer destination", "int-clamp-insts"),
	240	FeatureInfo(@This()).create(.Inv2piInlineImm, "inv-2pi-inline-imm", "Has 1 / (2 * pi) as inline immediate", "inv-2pi-inline-imm"),
	241	FeatureInfo(@This()).create(.Ldsbankcount16, "ldsbankcount16", "The number of LDS banks per compute unit.", "ldsbankcount16"),
	242	FeatureInfo(@This()).create(.Ldsbankcount32, "ldsbankcount32", "The number of LDS banks per compute unit.", "ldsbankcount32"),
	243	FeatureInfo(@This()).create(.LdsBranchVmemWarHazard, "lds-branch-vmem-war-hazard", "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", "lds-branch-vmem-war-hazard"),
	244	FeatureInfo(@This()).create(.LdsMisalignedBug, "lds-misaligned-bug", "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", "lds-misaligned-bug"),
	245	FeatureInfo(@This()).create(.Localmemorysize0, "localmemorysize0", "The size of local memory in bytes", "localmemorysize0"),
	246	FeatureInfo(@This()).create(.Localmemorysize32768, "localmemorysize32768", "The size of local memory in bytes", "localmemorysize32768"),
	247	FeatureInfo(@This()).create(.Localmemorysize65536, "localmemorysize65536", "The size of local memory in bytes", "localmemorysize65536"),
	248	FeatureInfo(@This()).create(.MaiInsts, "mai-insts", "Has mAI instructions", "mai-insts"),
	249	FeatureInfo(@This()).create(.MfmaInlineLiteralBug, "mfma-inline-literal-bug", "MFMA cannot use inline literal as SrcC", "mfma-inline-literal-bug"),
	250	FeatureInfo(@This()).create(.MimgR128, "mimg-r128", "Support 128-bit texture resources", "mimg-r128"),
	251	FeatureInfo(@This()).create(.MadMixInsts, "mad-mix-insts", "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", "mad-mix-insts"),
	252	FeatureInfo(@This()).create(.MaxPrivateElementSize4, "max-private-element-size-4", "Maximum private access size may be 4", "max-private-element-size-4"),
	253	FeatureInfo(@This()).create(.MaxPrivateElementSize8, "max-private-element-size-8", "Maximum private access size may be 8", "max-private-element-size-8"),
	254	FeatureInfo(@This()).create(.MaxPrivateElementSize16, "max-private-element-size-16", "Maximum private access size may be 16", "max-private-element-size-16"),
	255	FeatureInfo(@This()).create(.Movrel, "movrel", "Has v_movrel*_b32 instructions", "movrel"),
	256	FeatureInfo(@This()).create(.NsaEncoding, "nsa-encoding", "Support NSA encoding for image instructions", "nsa-encoding"),
	257	FeatureInfo(@This()).create(.NsaToVmemBug, "nsa-to-vmem-bug", "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", "nsa-to-vmem-bug"),
	258	FeatureInfo(@This()).create(.NoDataDepHazard, "no-data-dep-hazard", "Does not need SW waitstates", "no-data-dep-hazard"),
	259	FeatureInfo(@This()).create(.NoSdstCmpx, "no-sdst-cmpx", "V_CMPX does not write VCC/SGPR in addition to EXEC", "no-sdst-cmpx"),
	260	FeatureInfo(@This()).create(.Offset3fBug, "offset-3f-bug", "Branch offset of 3f hardware bug", "offset-3f-bug"),
	261	FeatureInfo(@This()).create(.PkFmacF16Inst, "pk-fmac-f16-inst", "Has v_pk_fmac_f16 instruction", "pk-fmac-f16-inst"),
	262	FeatureInfo(@This()).create(.PromoteAlloca, "promote-alloca", "Enable promote alloca pass", "promote-alloca"),
	263	FeatureInfo(@This()).create(.R128A16, "r128-a16", "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", "r128-a16"),
	264	FeatureInfo(@This()).create(.RegisterBanking, "register-banking", "Has register banking", "register-banking"),
	265	FeatureInfo(@This()).create(.Sdwa, "sdwa", "Support SDWA (Sub-DWORD Addressing) extension", "sdwa"),
	266	FeatureInfo(@This()).create(.SdwaMav, "sdwa-mav", "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", "sdwa-mav"),
	267	FeatureInfo(@This()).create(.SdwaOmod, "sdwa-omod", "Support OMod with SDWA (Sub-DWORD Addressing) extension", "sdwa-omod"),
	268	FeatureInfo(@This()).create(.SdwaOutModsVopc, "sdwa-out-mods-vopc", "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-out-mods-vopc"),
	269	FeatureInfo(@This()).create(.SdwaScalar, "sdwa-scalar", "Support scalar register with SDWA (Sub-DWORD Addressing) extension", "sdwa-scalar"),
	270	FeatureInfo(@This()).create(.SdwaSdst, "sdwa-sdst", "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", "sdwa-sdst"),
	271	FeatureInfo(@This()).create(.SgprInitBug, "sgpr-init-bug", "VI SGPR initialization bug requiring a fixed SGPR allocation size", "sgpr-init-bug"),
	272	FeatureInfo(@This()).create(.SmemToVectorWriteHazard, "smem-to-vector-write-hazard", "s_load_dword followed by v_cmp page faults", "smem-to-vector-write-hazard"),
	273	FeatureInfo(@This()).create(.SMemrealtime, "s-memrealtime", "Has s_memrealtime instruction", "s-memrealtime"),
	274	FeatureInfo(@This()).create(.SramEcc, "sram-ecc", "Enable SRAM ECC", "sram-ecc"),
	275	FeatureInfo(@This()).create(.ScalarAtomics, "scalar-atomics", "Has atomic scalar memory instructions", "scalar-atomics"),
	276	FeatureInfo(@This()).create(.ScalarFlatScratchInsts, "scalar-flat-scratch-insts", "Have s_scratch_* flat memory instructions", "scalar-flat-scratch-insts"),
	277	FeatureInfo(@This()).create(.ScalarStores, "scalar-stores", "Has store scalar memory instructions", "scalar-stores"),
	278	FeatureInfo(@This()).createWithSubfeatures(.SeaIslands, "sea-islands", "SEA_ISLANDS GPU generation", "sea-islands", &[_]@This() {
	279	.Wavefrontsize64,
	280	.MimgR128,
	281	.Fp64,
	282	.CiInsts,
	283	.FlatAddressSpace,
	284	.TrigReducedRange,
	285	.NoSramEccSupport,
	286	.Movrel,
	287	.Localmemorysize65536,
	288	.Gfx7Gfx8Gfx9Insts,
	289	}),
	290	FeatureInfo(@This()).createWithSubfeatures(.SouthernIslands, "southern-islands", "SOUTHERN_ISLANDS GPU generation", "southern-islands", &[_]@This() {
	291	.Wavefrontsize64,
	292	.MimgR128,
	293	.Fp64,
	294	.NoXnackSupport,
	295	.TrigReducedRange,
	296	.NoSramEccSupport,
	297	.Movrel,
	298	.Ldsbankcount32,
	299	.Localmemorysize32768,
	300	}),
	301	FeatureInfo(@This()).create(.TrapHandler, "trap-handler", "Trap handler support", "trap-handler"),
	302	FeatureInfo(@This()).create(.TrigReducedRange, "trig-reduced-range", "Requires use of fract on arguments to trig instructions", "trig-reduced-range"),
	303	FeatureInfo(@This()).create(.UnalignedBufferAccess, "unaligned-buffer-access", "Support unaligned global loads and stores", "unaligned-buffer-access"),
	304	FeatureInfo(@This()).create(.UnalignedScratchAccess, "unaligned-scratch-access", "Support unaligned scratch loads and stores", "unaligned-scratch-access"),
	305	FeatureInfo(@This()).create(.UnpackedD16Vmem, "unpacked-d16-vmem", "Has unpacked d16 vmem instructions", "unpacked-d16-vmem"),
	306	FeatureInfo(@This()).create(.VgprIndexMode, "vgpr-index-mode", "Has VGPR mode register indexing", "vgpr-index-mode"),
	307	FeatureInfo(@This()).create(.VmemToScalarWriteHazard, "vmem-to-scalar-write-hazard", "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", "vmem-to-scalar-write-hazard"),
	308	FeatureInfo(@This()).create(.Vop3Literal, "vop3-literal", "Can use one literal in VOP3", "vop3-literal"),
	309	FeatureInfo(@This()).create(.Vop3p, "vop3p", "Has VOP3P packed instructions", "vop3p"),
	310	FeatureInfo(@This()).create(.VcmpxExecWarHazard, "vcmpx-exec-war-hazard", "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", "vcmpx-exec-war-hazard"),
	311	FeatureInfo(@This()).create(.VcmpxPermlaneHazard, "vcmpx-permlane-hazard", "TODO: describe me", "vcmpx-permlane-hazard"),
	312	FeatureInfo(@This()).createWithSubfeatures(.VolcanicIslands, "volcanic-islands", "VOLCANIC_ISLANDS GPU generation", "volcanic-islands", &[_]@This() {
	313	.Wavefrontsize64,
	314	.Fp64,
	315	.Gcn3Encoding,
	316	.TrigReducedRange,
	317	.Sdwa,
	318	.VgprIndexMode,
	319	.Dpp,
	320	.FlatAddressSpace,
	321	.Gfx8Insts,
	322	.Gfx7Gfx8Gfx9Insts,
	323	.MimgR128,
	324	.NoSramEccSupport,
	325	.IntClampInsts,
	326	.ScalarStores,
	327	.Movrel,
	328	.SdwaMav,
	329	.CiInsts,
	330	.BitInsts16,
	331	.SMemrealtime,
	332	.Inv2piInlineImm,
	333	.Localmemorysize65536,
	334	.SdwaOutModsVopc,
	335	}),
	336	FeatureInfo(@This()).create(.Vscnt, "vscnt", "Has separate store vscnt counter", "vscnt"),
	337	FeatureInfo(@This()).create(.Wavefrontsize16, "wavefrontsize16", "The number of threads per wavefront", "wavefrontsize16"),
	338	FeatureInfo(@This()).create(.Wavefrontsize32, "wavefrontsize32", "The number of threads per wavefront", "wavefrontsize32"),
	339	FeatureInfo(@This()).create(.Wavefrontsize64, "wavefrontsize64", "The number of threads per wavefront", "wavefrontsize64"),
	340	FeatureInfo(@This()).create(.Xnack, "xnack", "Enable XNACK support", "xnack"),
	341	FeatureInfo(@This()).create(.HalfRate64Ops, "half-rate-64-ops", "Most fp64 instructions are half rate instead of quarter", "half-rate-64-ops"),
	342	};
	343	};

lib/std/target/feature/ArmFeature.zig created+818

...	...	@@ -0,0 +1,818 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const ArmFeature = enum {
	4	Armv2,
	5	Armv2a,
	6	Armv3,
	7	Armv3m,
	8	Armv4,
	9	Armv4t,
	10	Armv5t,
	11	Armv5te,
	12	Armv5tej,
	13	Armv6,
	14	Armv6j,
	15	Armv6k,
	16	Armv6kz,
	17	Armv6M,
	18	Armv6sM,
	19	Armv6t2,
	20	Armv7A,
	21	Armv7eM,
	22	Armv7k,
	23	Armv7M,
	24	Armv7R,
	25	Armv7s,
	26	Armv7ve,
	27	Armv8A,
	28	Armv8Mbase,
	29	Armv8Mmain,
	30	Armv8R,
	31	Armv81A,
	32	Armv81Mmain,
	33	Armv82A,
	34	Armv83A,
	35	Armv84A,
	36	Armv85A,
	37	Msecext8,
	38	Aclass,
	39	Aes,
	40	AcquireRelease,
	41	AvoidMovsShop,
	42	AvoidPartialCpsr,
	43	Crc,
	44	CheapPredicableCpsr,
	45	VldnAlign,
	46	Crypto,
	47	D32,
	48	Db,
	49	Dfb,
	50	Dsp,
	51	DontWidenVmovs,
	52	Dotprod,
	53	ExecuteOnly,
	54	ExpandFpMlx,
	55	Fp16,
	56	Fp16fml,
	57	Fp64,
	58	Fpao,
	59	FpArmv8,
	60	FpArmv8d16,
	61	FpArmv8d16sp,
	62	FpArmv8sp,
	63	Fpregs,
	64	Fpregs16,
	65	Fpregs64,
	66	Fullfp16,
	67	FuseAes,
	68	FuseLiterals,
	69	HwdivArm,
	70	Hwdiv,
	71	NoBranchPredictor,
	72	RetAddrStack,
	73	Slowfpvmlx,
	74	VmlxHazards,
	75	Lob,
	76	LongCalls,
	77	Mclass,
	78	Mp,
	79	Mve1beat,
	80	Mve2beat,
	81	Mve4beat,
	82	MuxedUnits,
	83	Neon,
	84	Neonfp,
	85	NeonFpmovs,
	86	NaclTrap,
	87	Noarm,
	88	NoMovt,
	89	NoNegImmediates,
	90	DisablePostraScheduler,
	91	NonpipelinedVfp,
	92	Perfmon,
	93	Bit32,
	94	PreferIshst,
	95	LoopAlign,
	96	PreferVmovsr,
	97	ProfUnpr,
	98	Ras,
	99	Rclass,
	100	ReadTpHard,
	101	ReserveR9,
	102	Sb,
	103	Sha2,
	104	SlowFpBrcc,
	105	SlowLoadDSubreg,
	106	SlowOddReg,
	107	SlowVdup32,
	108	SlowVgetlni32,
	109	SplatVfpNeon,
	110	StrictAlign,
	111	Thumb2,
	112	Trustzone,
	113	UseAa,
	114	UseMisched,
	115	WideStrideVfp,
	116	V7clrex,
	117	Vfp2,
	118	Vfp2sp,
	119	Vfp3,
	120	Vfp3d16,
	121	Vfp3d16sp,
	122	Vfp3sp,
	123	Vfp4,
	124	Vfp4d16,
	125	Vfp4d16sp,
	126	Vfp4sp,
	127	VmlxForwarding,
	128	Virtualization,
	129	Zcz,
	130	Mvefp,
	131	Mve,
	132	V4t,
	133	V5te,
	134	V5t,
	135	V6k,
	136	V6m,
	137	V6,
	138	V6t2,
	139	V7,
	140	V8m,
	141	V8mmain,
	142	V8,
	143	V81mmain,
	144	V81a,
	145	V82a,
	146	V83a,
	147	V84a,
	148	V85a,
	149	Iwmmxt,
	150	Iwmmxt2,
	151	SoftFloat,
	152	ThumbMode,
	153	A5,
	154	A7,
	155	A8,
	156	A9,
	157	A12,
	158	A15,
	159	A17,
	160	A32,
	161	A35,
	162	A53,
	163	A55,
	164	A57,
	165	A72,
	166	A73,
	167	A75,
	168	A76,
	169	Exynos,
	170	Krait,
	171	Kryo,
	172	M3,
	173	R4,
	174	R5,
	175	R7,
	176	R52,
	177	Swift,
	178	Xscale,
	179
	180	pub fn getInfo(self: @This()) FeatureInfo {
	181	return feature_infos[@enumToInt(self)];
	182	}
	183
	184	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	185	FeatureInfo(@This()).create(.Armv2, "armv2", "ARMv2 architecture", "armv2"),
	186	FeatureInfo(@This()).create(.Armv2a, "armv2a", "ARMv2a architecture", "armv2a"),
	187	FeatureInfo(@This()).create(.Armv3, "armv3", "ARMv3 architecture", "armv3"),
	188	FeatureInfo(@This()).create(.Armv3m, "armv3m", "ARMv3m architecture", "armv3m"),
	189	FeatureInfo(@This()).create(.Armv4, "armv4", "ARMv4 architecture", "armv4"),
	190	FeatureInfo(@This()).createWithSubfeatures(.Armv4t, "armv4t", "ARMv4t architecture", "armv4t", &[_]@This() {
	191	.V4t,
	192	}),
	193	FeatureInfo(@This()).createWithSubfeatures(.Armv5t, "armv5t", "ARMv5t architecture", "armv5t", &[_]@This() {
	194	.V4t,
	195	}),
	196	FeatureInfo(@This()).createWithSubfeatures(.Armv5te, "armv5te", "ARMv5te architecture", "armv5te", &[_]@This() {
	197	.V4t,
	198	}),
	199	FeatureInfo(@This()).createWithSubfeatures(.Armv5tej, "armv5tej", "ARMv5tej architecture", "armv5tej", &[_]@This() {
	200	.V4t,
	201	}),
	202	FeatureInfo(@This()).createWithSubfeatures(.Armv6, "armv6", "ARMv6 architecture", "armv6", &[_]@This() {
	203	.V4t,
	204	.Dsp,
	205	}),
	206	FeatureInfo(@This()).createWithSubfeatures(.Armv6j, "armv6j", "ARMv7a architecture", "armv6j", &[_]@This() {
	207	.V4t,
	208	.Dsp,
	209	}),
	210	FeatureInfo(@This()).createWithSubfeatures(.Armv6k, "armv6k", "ARMv6k architecture", "armv6k", &[_]@This() {
	211	.V4t,
	212	}),
	213	FeatureInfo(@This()).createWithSubfeatures(.Armv6kz, "armv6kz", "ARMv6kz architecture", "armv6kz", &[_]@This() {
	214	.V4t,
	215	.Trustzone,
	216	}),
	217	FeatureInfo(@This()).createWithSubfeatures(.Armv6M, "armv6-m", "ARMv6m architecture", "armv6-m", &[_]@This() {
	218	.Mclass,
	219	.StrictAlign,
	220	.ThumbMode,
	221	.Db,
	222	.V4t,
	223	.Noarm,
	224	}),
	225	FeatureInfo(@This()).createWithSubfeatures(.Armv6sM, "armv6s-m", "ARMv6sm architecture", "armv6s-m", &[_]@This() {
	226	.Mclass,
	227	.StrictAlign,
	228	.ThumbMode,
	229	.Db,
	230	.V4t,
	231	.Noarm,
	232	}),
	233	FeatureInfo(@This()).createWithSubfeatures(.Armv6t2, "armv6t2", "ARMv6t2 architecture", "armv6t2", &[_]@This() {
	234	.Thumb2,
	235	.V4t,
	236	.Dsp,
	237	}),
	238	FeatureInfo(@This()).createWithSubfeatures(.Armv7A, "armv7-a", "ARMv7a architecture", "armv7-a", &[_]@This() {
	239	.Thumb2,
	240	.Perfmon,
	241	.Db,
	242	.Dsp,
	243	.V7clrex,
	244	.V4t,
	245	.Fpregs,
	246	.D32,
	247	.Aclass,
	248	}),
	249	FeatureInfo(@This()).createWithSubfeatures(.Armv7eM, "armv7e-m", "ARMv7em architecture", "armv7e-m", &[_]@This() {
	250	.Thumb2,
	251	.Mclass,
	252	.Perfmon,
	253	.ThumbMode,
	254	.Db,
	255	.Dsp,
	256	.V7clrex,
	257	.V4t,
	258	.Hwdiv,
	259	.Noarm,
	260	}),
	261	FeatureInfo(@This()).createWithSubfeatures(.Armv7k, "armv7k", "ARMv7a architecture", "armv7k", &[_]@This() {
	262	.Thumb2,
	263	.Perfmon,
	264	.Db,
	265	.Dsp,
	266	.V7clrex,
	267	.V4t,
	268	.Fpregs,
	269	.D32,
	270	.Aclass,
	271	}),
	272	FeatureInfo(@This()).createWithSubfeatures(.Armv7M, "armv7-m", "ARMv7m architecture", "armv7-m", &[_]@This() {
	273	.Thumb2,
	274	.Mclass,
	275	.Perfmon,
	276	.ThumbMode,
	277	.Db,
	278	.V7clrex,
	279	.V4t,
	280	.Hwdiv,
	281	.Noarm,
	282	}),
	283	FeatureInfo(@This()).createWithSubfeatures(.Armv7R, "armv7-r", "ARMv7r architecture", "armv7-r", &[_]@This() {
	284	.Thumb2,
	285	.Perfmon,
	286	.Db,
	287	.Dsp,
	288	.Rclass,
	289	.V7clrex,
	290	.V4t,
	291	.Hwdiv,
	292	}),
	293	FeatureInfo(@This()).createWithSubfeatures(.Armv7s, "armv7s", "ARMv7a architecture", "armv7s", &[_]@This() {
	294	.Thumb2,
	295	.Perfmon,
	296	.Db,
	297	.Dsp,
	298	.V7clrex,
	299	.V4t,
	300	.Fpregs,
	301	.D32,
	302	.Aclass,
	303	}),
	304	FeatureInfo(@This()).createWithSubfeatures(.Armv7ve, "armv7ve", "ARMv7ve architecture", "armv7ve", &[_]@This() {
	305	.Thumb2,
	306	.Mp,
	307	.Perfmon,
	308	.Db,
	309	.Dsp,
	310	.V7clrex,
	311	.V4t,
	312	.Fpregs,
	313	.D32,
	314	.Hwdiv,
	315	.HwdivArm,
	316	.Aclass,
	317	.Trustzone,
	318	}),
	319	FeatureInfo(@This()).createWithSubfeatures(.Armv8A, "armv8-a", "ARMv8a architecture", "armv8-a", &[_]@This() {
	320	.Thumb2,
	321	.Mp,
	322	.Perfmon,
	323	.Db,
	324	.Crc,
	325	.Fp16,
	326	.Dsp,
	327	.V7clrex,
	328	.V4t,
	329	.Fpregs,
	330	.D32,
	331	.Hwdiv,
	332	.HwdivArm,
	333	.Aclass,
	334	.Trustzone,
	335	.AcquireRelease,
	336	}),
	337	FeatureInfo(@This()).createWithSubfeatures(.Armv8Mbase, "armv8-m.base", "ARMv8mBaseline architecture", "armv8-m.base", &[_]@This() {
	338	.Mclass,
	339	.StrictAlign,
	340	.ThumbMode,
	341	.Db,
	342	.Msecext8,
	343	.V7clrex,
	344	.V4t,
	345	.Hwdiv,
	346	.Noarm,
	347	.AcquireRelease,
	348	}),
	349	FeatureInfo(@This()).createWithSubfeatures(.Armv8Mmain, "armv8-m.main", "ARMv8mMainline architecture", "armv8-m.main", &[_]@This() {
	350	.Thumb2,
	351	.Mclass,
	352	.Perfmon,
	353	.ThumbMode,
	354	.Db,
	355	.Msecext8,
	356	.V7clrex,
	357	.V4t,
	358	.Hwdiv,
	359	.Noarm,
	360	.AcquireRelease,
	361	}),
	362	FeatureInfo(@This()).createWithSubfeatures(.Armv8R, "armv8-r", "ARMv8r architecture", "armv8-r", &[_]@This() {
	363	.Thumb2,
	364	.Mp,
	365	.Perfmon,
	366	.Db,
	367	.Crc,
	368	.Fp16,
	369	.Dfb,
	370	.Dsp,
	371	.Rclass,
	372	.V7clrex,
	373	.V4t,
	374	.Fpregs,
	375	.D32,
	376	.Hwdiv,
	377	.HwdivArm,
	378	.AcquireRelease,
	379	}),
	380	FeatureInfo(@This()).createWithSubfeatures(.Armv81A, "armv8.1-a", "ARMv81a architecture", "armv8.1-a", &[_]@This() {
	381	.Thumb2,
	382	.Mp,
	383	.Perfmon,
	384	.Db,
	385	.Crc,
	386	.Fp16,
	387	.Dsp,
	388	.V7clrex,
	389	.V4t,
	390	.Fpregs,
	391	.D32,
	392	.Hwdiv,
	393	.HwdivArm,
	394	.Aclass,
	395	.Trustzone,
	396	.AcquireRelease,
	397	}),
	398	FeatureInfo(@This()).createWithSubfeatures(.Armv81Mmain, "armv8.1-m.main", "ARMv81mMainline architecture", "armv8.1-m.main", &[_]@This() {
	399	.Thumb2,
	400	.Mclass,
	401	.Perfmon,
	402	.ThumbMode,
	403	.Db,
	404	.Msecext8,
	405	.Ras,
	406	.V7clrex,
	407	.V4t,
	408	.Hwdiv,
	409	.Noarm,
	410	.Lob,
	411	.AcquireRelease,
	412	}),
	413	FeatureInfo(@This()).createWithSubfeatures(.Armv82A, "armv8.2-a", "ARMv82a architecture", "armv8.2-a", &[_]@This() {
	414	.Thumb2,
	415	.Mp,
	416	.Perfmon,
	417	.Db,
	418	.Crc,
	419	.Fp16,
	420	.Ras,
	421	.Dsp,
	422	.V7clrex,
	423	.V4t,
	424	.Fpregs,
	425	.D32,
	426	.Hwdiv,
	427	.HwdivArm,
	428	.Aclass,
	429	.Trustzone,
	430	.AcquireRelease,
	431	}),
	432	FeatureInfo(@This()).createWithSubfeatures(.Armv83A, "armv8.3-a", "ARMv83a architecture", "armv8.3-a", &[_]@This() {
	433	.Thumb2,
	434	.Mp,
	435	.Perfmon,
	436	.Db,
	437	.Crc,
	438	.Fp16,
	439	.Ras,
	440	.Dsp,
	441	.V7clrex,
	442	.V4t,
	443	.Fpregs,
	444	.D32,
	445	.Hwdiv,
	446	.HwdivArm,
	447	.Aclass,
	448	.Trustzone,
	449	.AcquireRelease,
	450	}),
	451	FeatureInfo(@This()).createWithSubfeatures(.Armv84A, "armv8.4-a", "ARMv84a architecture", "armv8.4-a", &[_]@This() {
	452	.Thumb2,
	453	.Mp,
	454	.Perfmon,
	455	.Db,
	456	.Crc,
	457	.Fp16,
	458	.Ras,
	459	.Dsp,
	460	.V7clrex,
	461	.V4t,
	462	.Fpregs,
	463	.D32,
	464	.Hwdiv,
	465	.HwdivArm,
	466	.Aclass,
	467	.Trustzone,
	468	.AcquireRelease,
	469	}),
	470	FeatureInfo(@This()).createWithSubfeatures(.Armv85A, "armv8.5-a", "ARMv85a architecture", "armv8.5-a", &[_]@This() {
	471	.Thumb2,
	472	.Mp,
	473	.Perfmon,
	474	.Sb,
	475	.Db,
	476	.Crc,
	477	.Fp16,
	478	.Ras,
	479	.Dsp,
	480	.V7clrex,
	481	.V4t,
	482	.Fpregs,
	483	.D32,
	484	.Hwdiv,
	485	.HwdivArm,
	486	.Aclass,
	487	.Trustzone,
	488	.AcquireRelease,
	489	}),
	490	FeatureInfo(@This()).create(.Msecext8, "8msecext", "Enable support for ARMv8-M Security Extensions", "8msecext"),
	491	FeatureInfo(@This()).create(.Aclass, "aclass", "Is application profile ('A' series)", "aclass"),
	492	FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES support", "aes", &[_]@This() {
	493	.Fpregs,
	494	.D32,
	495	}),
	496	FeatureInfo(@This()).create(.AcquireRelease, "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", "acquire-release"),
	497	FeatureInfo(@This()).create(.AvoidMovsShop, "avoid-movs-shop", "Avoid movs instructions with shifter operand", "avoid-movs-shop"),
	498	FeatureInfo(@This()).create(.AvoidPartialCpsr, "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", "avoid-partial-cpsr"),
	499	FeatureInfo(@This()).create(.Crc, "crc", "Enable support for CRC instructions", "crc"),
	500	FeatureInfo(@This()).create(.CheapPredicableCpsr, "cheap-predicable-cpsr", "Disable +1 predication cost for instructions updating CPSR", "cheap-predicable-cpsr"),
	501	FeatureInfo(@This()).create(.VldnAlign, "vldn-align", "Check for VLDn unaligned access", "vldn-align"),
	502	FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable support for Cryptography extensions", "crypto", &[_]@This() {
	503	.Fpregs,
	504	.D32,
	505	}),
	506	FeatureInfo(@This()).create(.D32, "d32", "Extend FP to 32 double registers", "d32"),
	507	FeatureInfo(@This()).create(.Db, "db", "Has data barrier (dmb/dsb) instructions", "db"),
	508	FeatureInfo(@This()).create(.Dfb, "dfb", "Has full data barrier (dfb) instruction", "dfb"),
	509	FeatureInfo(@This()).create(.Dsp, "dsp", "Supports DSP instructions in ARM and/or Thumb2", "dsp"),
	510	FeatureInfo(@This()).create(.DontWidenVmovs, "dont-widen-vmovs", "Don't widen VMOVS to VMOVD", "dont-widen-vmovs"),
	511	FeatureInfo(@This()).createWithSubfeatures(.Dotprod, "dotprod", "Enable support for dot product instructions", "dotprod", &[_]@This() {
	512	.Fpregs,
	513	.D32,
	514	}),
	515	FeatureInfo(@This()).create(.ExecuteOnly, "execute-only", "Enable the generation of execute only code.", "execute-only"),
	516	FeatureInfo(@This()).create(.ExpandFpMlx, "expand-fp-mlx", "Expand VFP/NEON MLA/MLS instructions", "expand-fp-mlx"),
	517	FeatureInfo(@This()).create(.Fp16, "fp16", "Enable half-precision floating point", "fp16"),
	518	FeatureInfo(@This()).createWithSubfeatures(.Fp16fml, "fp16fml", "Enable full half-precision floating point fml instructions", "fp16fml", &[_]@This() {
	519	.Fp16,
	520	.Fpregs,
	521	}),
	522	FeatureInfo(@This()).createWithSubfeatures(.Fp64, "fp64", "Floating point unit supports double precision", "fp64", &[_]@This() {
	523	.Fpregs,
	524	}),
	525	FeatureInfo(@This()).create(.Fpao, "fpao", "Enable fast computation of positive address offsets", "fpao"),
	526	FeatureInfo(@This()).createWithSubfeatures(.FpArmv8, "fp-armv8", "Enable ARMv8 FP", "fp-armv8", &[_]@This() {
	527	.Fp16,
	528	.Fpregs,
	529	.D32,
	530	}),
	531	FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16, "fp-armv8d16", "Enable ARMv8 FP with only 16 d-registers", "fp-armv8d16", &[_]@This() {
	532	.Fp16,
	533	.Fpregs,
	534	}),
	535	FeatureInfo(@This()).createWithSubfeatures(.FpArmv8d16sp, "fp-armv8d16sp", "Enable ARMv8 FP with only 16 d-registers and no double precision", "fp-armv8d16sp", &[_]@This() {
	536	.Fp16,
	537	.Fpregs,
	538	}),
	539	FeatureInfo(@This()).createWithSubfeatures(.FpArmv8sp, "fp-armv8sp", "Enable ARMv8 FP with no double precision", "fp-armv8sp", &[_]@This() {
	540	.Fp16,
	541	.Fpregs,
	542	.D32,
	543	}),
	544	FeatureInfo(@This()).create(.Fpregs, "fpregs", "Enable FP registers", "fpregs"),
	545	FeatureInfo(@This()).createWithSubfeatures(.Fpregs16, "fpregs16", "Enable 16-bit FP registers", "fpregs16", &[_]@This() {
	546	.Fpregs,
	547	}),
	548	FeatureInfo(@This()).createWithSubfeatures(.Fpregs64, "fpregs64", "Enable 64-bit FP registers", "fpregs64", &[_]@This() {
	549	.Fpregs,
	550	}),
	551	FeatureInfo(@This()).createWithSubfeatures(.Fullfp16, "fullfp16", "Enable full half-precision floating point", "fullfp16", &[_]@This() {
	552	.Fp16,
	553	.Fpregs,
	554	}),
	555	FeatureInfo(@This()).create(.FuseAes, "fuse-aes", "CPU fuses AES crypto operations", "fuse-aes"),
	556	FeatureInfo(@This()).create(.FuseLiterals, "fuse-literals", "CPU fuses literal generation operations", "fuse-literals"),
	557	FeatureInfo(@This()).create(.HwdivArm, "hwdiv-arm", "Enable divide instructions in ARM mode", "hwdiv-arm"),
	558	FeatureInfo(@This()).create(.Hwdiv, "hwdiv", "Enable divide instructions in Thumb", "hwdiv"),
	559	FeatureInfo(@This()).create(.NoBranchPredictor, "no-branch-predictor", "Has no branch predictor", "no-branch-predictor"),
	560	FeatureInfo(@This()).create(.RetAddrStack, "ret-addr-stack", "Has return address stack", "ret-addr-stack"),
	561	FeatureInfo(@This()).create(.Slowfpvmlx, "slowfpvmlx", "Disable VFP / NEON MAC instructions", "slowfpvmlx"),
	562	FeatureInfo(@This()).create(.VmlxHazards, "vmlx-hazards", "Has VMLx hazards", "vmlx-hazards"),
	563	FeatureInfo(@This()).create(.Lob, "lob", "Enable Low Overhead Branch extensions", "lob"),
	564	FeatureInfo(@This()).create(.LongCalls, "long-calls", "Generate calls via indirect call instructions", "long-calls"),
	565	FeatureInfo(@This()).create(.Mclass, "mclass", "Is microcontroller profile ('M' series)", "mclass"),
	566	FeatureInfo(@This()).create(.Mp, "mp", "Supports Multiprocessing extension", "mp"),
	567	FeatureInfo(@This()).create(.Mve1beat, "mve1beat", "Model MVE instructions as a 1 beat per tick architecture", "mve1beat"),
	568	FeatureInfo(@This()).create(.Mve2beat, "mve2beat", "Model MVE instructions as a 2 beats per tick architecture", "mve2beat"),
	569	FeatureInfo(@This()).create(.Mve4beat, "mve4beat", "Model MVE instructions as a 4 beats per tick architecture", "mve4beat"),
	570	FeatureInfo(@This()).create(.MuxedUnits, "muxed-units", "Has muxed AGU and NEON/FPU", "muxed-units"),
	571	FeatureInfo(@This()).createWithSubfeatures(.Neon, "neon", "Enable NEON instructions", "neon", &[_]@This() {
	572	.Fpregs,
	573	.D32,
	574	}),
	575	FeatureInfo(@This()).create(.Neonfp, "neonfp", "Use NEON for single precision FP", "neonfp"),
	576	FeatureInfo(@This()).create(.NeonFpmovs, "neon-fpmovs", "Convert VMOVSR, VMOVRS, VMOVS to NEON", "neon-fpmovs"),
	577	FeatureInfo(@This()).create(.NaclTrap, "nacl-trap", "NaCl trap", "nacl-trap"),
	578	FeatureInfo(@This()).create(.Noarm, "noarm", "Does not support ARM mode execution", "noarm"),
	579	FeatureInfo(@This()).create(.NoMovt, "no-movt", "Don't use movt/movw pairs for 32-bit imms", "no-movt"),
	580	FeatureInfo(@This()).create(.NoNegImmediates, "no-neg-immediates", "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", "no-neg-immediates"),
	581	FeatureInfo(@This()).create(.DisablePostraScheduler, "disable-postra-scheduler", "Don't schedule again after register allocation", "disable-postra-scheduler"),
	582	FeatureInfo(@This()).create(.NonpipelinedVfp, "nonpipelined-vfp", "VFP instructions are not pipelined", "nonpipelined-vfp"),
	583	FeatureInfo(@This()).create(.Perfmon, "perfmon", "Enable support for Performance Monitor extensions", "perfmon"),
	584	FeatureInfo(@This()).create(.Bit32, "32bit", "Prefer 32-bit Thumb instrs", "32bit"),
	585	FeatureInfo(@This()).create(.PreferIshst, "prefer-ishst", "Prefer ISHST barriers", "prefer-ishst"),
	586	FeatureInfo(@This()).create(.LoopAlign, "loop-align", "Prefer 32-bit alignment for loops", "loop-align"),
	587	FeatureInfo(@This()).create(.PreferVmovsr, "prefer-vmovsr", "Prefer VMOVSR", "prefer-vmovsr"),
	588	FeatureInfo(@This()).create(.ProfUnpr, "prof-unpr", "Is profitable to unpredicate", "prof-unpr"),
	589	FeatureInfo(@This()).create(.Ras, "ras", "Enable Reliability, Availability and Serviceability extensions", "ras"),
	590	FeatureInfo(@This()).create(.Rclass, "rclass", "Is realtime profile ('R' series)", "rclass"),
	591	FeatureInfo(@This()).create(.ReadTpHard, "read-tp-hard", "Reading thread pointer from register", "read-tp-hard"),
	592	FeatureInfo(@This()).create(.ReserveR9, "reserve-r9", "Reserve R9, making it unavailable as GPR", "reserve-r9"),
	593	FeatureInfo(@This()).create(.Sb, "sb", "Enable v8.5a Speculation Barrier", "sb"),
	594	FeatureInfo(@This()).createWithSubfeatures(.Sha2, "sha2", "Enable SHA1 and SHA256 support", "sha2", &[_]@This() {
	595	.Fpregs,
	596	.D32,
	597	}),
	598	FeatureInfo(@This()).create(.SlowFpBrcc, "slow-fp-brcc", "FP compare + branch is slow", "slow-fp-brcc"),
	599	FeatureInfo(@This()).create(.SlowLoadDSubreg, "slow-load-D-subreg", "Loading into D subregs is slow", "slow-load-D-subreg"),
	600	FeatureInfo(@This()).create(.SlowOddReg, "slow-odd-reg", "VLDM/VSTM starting with an odd register is slow", "slow-odd-reg"),
	601	FeatureInfo(@This()).create(.SlowVdup32, "slow-vdup32", "Has slow VDUP32 - prefer VMOV", "slow-vdup32"),
	602	FeatureInfo(@This()).create(.SlowVgetlni32, "slow-vgetlni32", "Has slow VGETLNi32 - prefer VMOV", "slow-vgetlni32"),
	603	FeatureInfo(@This()).createWithSubfeatures(.SplatVfpNeon, "splat-vfp-neon", "Splat register from VFP to NEON", "splat-vfp-neon", &[_]@This() {
	604	.DontWidenVmovs,
	605	}),
	606	FeatureInfo(@This()).create(.StrictAlign, "strict-align", "Disallow all unaligned memory access", "strict-align"),
	607	FeatureInfo(@This()).create(.Thumb2, "thumb2", "Enable Thumb2 instructions", "thumb2"),
	608	FeatureInfo(@This()).create(.Trustzone, "trustzone", "Enable support for TrustZone security extensions", "trustzone"),
	609	FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
	610	FeatureInfo(@This()).create(.UseMisched, "use-misched", "Use the MachineScheduler", "use-misched"),
	611	FeatureInfo(@This()).create(.WideStrideVfp, "wide-stride-vfp", "Use a wide stride when allocating VFP registers", "wide-stride-vfp"),
	612	FeatureInfo(@This()).create(.V7clrex, "v7clrex", "Has v7 clrex instruction", "v7clrex"),
	613	FeatureInfo(@This()).createWithSubfeatures(.Vfp2, "vfp2", "Enable VFP2 instructions", "vfp2", &[_]@This() {
	614	.Fpregs,
	615	}),
	616	FeatureInfo(@This()).createWithSubfeatures(.Vfp2sp, "vfp2sp", "Enable VFP2 instructions with no double precision", "vfp2sp", &[_]@This() {
	617	.Fpregs,
	618	}),
	619	FeatureInfo(@This()).createWithSubfeatures(.Vfp3, "vfp3", "Enable VFP3 instructions", "vfp3", &[_]@This() {
	620	.Fpregs,
	621	.D32,
	622	}),
	623	FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16, "vfp3d16", "Enable VFP3 instructions with only 16 d-registers", "vfp3d16", &[_]@This() {
	624	.Fpregs,
	625	}),
	626	FeatureInfo(@This()).createWithSubfeatures(.Vfp3d16sp, "vfp3d16sp", "Enable VFP3 instructions with only 16 d-registers and no double precision", "vfp3d16sp", &[_]@This() {
	627	.Fpregs,
	628	}),
	629	FeatureInfo(@This()).createWithSubfeatures(.Vfp3sp, "vfp3sp", "Enable VFP3 instructions with no double precision", "vfp3sp", &[_]@This() {
	630	.Fpregs,
	631	.D32,
	632	}),
	633	FeatureInfo(@This()).createWithSubfeatures(.Vfp4, "vfp4", "Enable VFP4 instructions", "vfp4", &[_]@This() {
	634	.Fp16,
	635	.Fpregs,
	636	.D32,
	637	}),
	638	FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16, "vfp4d16", "Enable VFP4 instructions with only 16 d-registers", "vfp4d16", &[_]@This() {
	639	.Fp16,
	640	.Fpregs,
	641	}),
	642	FeatureInfo(@This()).createWithSubfeatures(.Vfp4d16sp, "vfp4d16sp", "Enable VFP4 instructions with only 16 d-registers and no double precision", "vfp4d16sp", &[_]@This() {
	643	.Fp16,
	644	.Fpregs,
	645	}),
	646	FeatureInfo(@This()).createWithSubfeatures(.Vfp4sp, "vfp4sp", "Enable VFP4 instructions with no double precision", "vfp4sp", &[_]@This() {
	647	.Fp16,
	648	.Fpregs,
	649	.D32,
	650	}),
	651	FeatureInfo(@This()).create(.VmlxForwarding, "vmlx-forwarding", "Has multiplier accumulator forwarding", "vmlx-forwarding"),
	652	FeatureInfo(@This()).createWithSubfeatures(.Virtualization, "virtualization", "Supports Virtualization extension", "virtualization", &[_]@This() {
	653	.HwdivArm,
	654	.Hwdiv,
	655	}),
	656	FeatureInfo(@This()).create(.Zcz, "zcz", "Has zero-cycle zeroing instructions", "zcz"),
	657	FeatureInfo(@This()).createWithSubfeatures(.Mvefp, "mve.fp", "Support M-Class Vector Extension with integer and floating ops", "mve.fp", &[_]@This() {
	658	.Thumb2,
	659	.Perfmon,
	660	.Fp16,
	661	.Dsp,
	662	.V7clrex,
	663	.V4t,
	664	.Fpregs,
	665	}),
	666	FeatureInfo(@This()).createWithSubfeatures(.Mve, "mve", "Support M-Class Vector Extension with integer ops", "mve", &[_]@This() {
	667	.Thumb2,
	668	.Perfmon,
	669	.Dsp,
	670	.V7clrex,
	671	.V4t,
	672	.Fpregs,
	673	}),
	674	FeatureInfo(@This()).create(.V4t, "v4t", "Support ARM v4T instructions", "v4t"),
	675	FeatureInfo(@This()).createWithSubfeatures(.V5te, "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", "v5te", &[_]@This() {
	676	.V4t,
	677	}),
	678	FeatureInfo(@This()).createWithSubfeatures(.V5t, "v5t", "Support ARM v5T instructions", "v5t", &[_]@This() {
	679	.V4t,
	680	}),
	681	FeatureInfo(@This()).createWithSubfeatures(.V6k, "v6k", "Support ARM v6k instructions", "v6k", &[_]@This() {
	682	.V4t,
	683	}),
	684	FeatureInfo(@This()).createWithSubfeatures(.V6m, "v6m", "Support ARM v6M instructions", "v6m", &[_]@This() {
	685	.V4t,
	686	}),
	687	FeatureInfo(@This()).createWithSubfeatures(.V6, "v6", "Support ARM v6 instructions", "v6", &[_]@This() {
	688	.V4t,
	689	}),
	690	FeatureInfo(@This()).createWithSubfeatures(.V6t2, "v6t2", "Support ARM v6t2 instructions", "v6t2", &[_]@This() {
	691	.Thumb2,
	692	.V4t,
	693	}),
	694	FeatureInfo(@This()).createWithSubfeatures(.V7, "v7", "Support ARM v7 instructions", "v7", &[_]@This() {
	695	.V7clrex,
	696	.V4t,
	697	.Perfmon,
	698	.Thumb2,
	699	}),
	700	FeatureInfo(@This()).createWithSubfeatures(.V8m, "v8m", "Support ARM v8M Baseline instructions", "v8m", &[_]@This() {
	701	.V4t,
	702	}),
	703	FeatureInfo(@This()).createWithSubfeatures(.V8mmain, "v8m.main", "Support ARM v8M Mainline instructions", "v8m.main", &[_]@This() {
	704	.V7clrex,
	705	.V4t,
	706	.Perfmon,
	707	.Thumb2,
	708	}),
	709	FeatureInfo(@This()).createWithSubfeatures(.V8, "v8", "Support ARM v8 instructions", "v8", &[_]@This() {
	710	.Thumb2,
	711	.Perfmon,
	712	.V7clrex,
	713	.V4t,
	714	.AcquireRelease,
	715	}),
	716	FeatureInfo(@This()).createWithSubfeatures(.V81mmain, "v8.1m.main", "Support ARM v8-1M Mainline instructions", "v8.1m.main", &[_]@This() {
	717	.V7clrex,
	718	.V4t,
	719	.Perfmon,
	720	.Thumb2,
	721	}),
	722	FeatureInfo(@This()).createWithSubfeatures(.V81a, "v8.1a", "Support ARM v8.1a instructions", "v8.1a", &[_]@This() {
	723	.Thumb2,
	724	.Perfmon,
	725	.V7clrex,
	726	.V4t,
	727	.AcquireRelease,
	728	}),
	729	FeatureInfo(@This()).createWithSubfeatures(.V82a, "v8.2a", "Support ARM v8.2a instructions", "v8.2a", &[_]@This() {
	730	.Thumb2,
	731	.Perfmon,
	732	.V7clrex,
	733	.V4t,
	734	.AcquireRelease,
	735	}),
	736	FeatureInfo(@This()).createWithSubfeatures(.V83a, "v8.3a", "Support ARM v8.3a instructions", "v8.3a", &[_]@This() {
	737	.Thumb2,
	738	.Perfmon,
	739	.V7clrex,
	740	.V4t,
	741	.AcquireRelease,
	742	}),
	743	FeatureInfo(@This()).createWithSubfeatures(.V84a, "v8.4a", "Support ARM v8.4a instructions", "v8.4a", &[_]@This() {
	744	.Thumb2,
	745	.Perfmon,
	746	.V7clrex,
	747	.V4t,
	748	.Fpregs,
	749	.D32,
	750	.AcquireRelease,
	751	}),
	752	FeatureInfo(@This()).createWithSubfeatures(.V85a, "v8.5a", "Support ARM v8.5a instructions", "v8.5a", &[_]@This() {
	753	.Thumb2,
	754	.Perfmon,
	755	.Sb,
	756	.V7clrex,
	757	.V4t,
	758	.Fpregs,
	759	.D32,
	760	.AcquireRelease,
	761	}),
	762	FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt, "iwmmxt", "ARMv5te architecture", "iwmmxt", &[_]@This() {
	763	.V4t,
	764	}),
	765	FeatureInfo(@This()).createWithSubfeatures(.Iwmmxt2, "iwmmxt2", "ARMv5te architecture", "iwmmxt2", &[_]@This() {
	766	.V4t,
	767	}),
	768	FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features.", "soft-float"),
	769	FeatureInfo(@This()).create(.ThumbMode, "thumb-mode", "Thumb mode", "thumb-mode"),
	770	FeatureInfo(@This()).create(.A5, "a5", "Cortex-A5 ARM processors", "a5"),
	771	FeatureInfo(@This()).create(.A7, "a7", "Cortex-A7 ARM processors", "a7"),
	772	FeatureInfo(@This()).create(.A8, "a8", "Cortex-A8 ARM processors", "a8"),
	773	FeatureInfo(@This()).create(.A9, "a9", "Cortex-A9 ARM processors", "a9"),
	774	FeatureInfo(@This()).create(.A12, "a12", "Cortex-A12 ARM processors", "a12"),
	775	FeatureInfo(@This()).create(.A15, "a15", "Cortex-A15 ARM processors", "a15"),
	776	FeatureInfo(@This()).create(.A17, "a17", "Cortex-A17 ARM processors", "a17"),
	777	FeatureInfo(@This()).create(.A32, "a32", "Cortex-A32 ARM processors", "a32"),
	778	FeatureInfo(@This()).create(.A35, "a35", "Cortex-A35 ARM processors", "a35"),
	779	FeatureInfo(@This()).create(.A53, "a53", "Cortex-A53 ARM processors", "a53"),
	780	FeatureInfo(@This()).create(.A55, "a55", "Cortex-A55 ARM processors", "a55"),
	781	FeatureInfo(@This()).create(.A57, "a57", "Cortex-A57 ARM processors", "a57"),
	782	FeatureInfo(@This()).create(.A72, "a72", "Cortex-A72 ARM processors", "a72"),
	783	FeatureInfo(@This()).create(.A73, "a73", "Cortex-A73 ARM processors", "a73"),
	784	FeatureInfo(@This()).create(.A75, "a75", "Cortex-A75 ARM processors", "a75"),
	785	FeatureInfo(@This()).create(.A76, "a76", "Cortex-A76 ARM processors", "a76"),
	786	FeatureInfo(@This()).createWithSubfeatures(.Exynos, "exynos", "Samsung Exynos processors", "exynos", &[_]@This() {
	787	.Zcz,
	788	.SlowVdup32,
	789	.SlowVgetlni32,
	790	.DontWidenVmovs,
	791	.Crc,
	792	.FuseAes,
	793	.WideStrideVfp,
	794	.ProfUnpr,
	795	.Slowfpvmlx,
	796	.SlowFpBrcc,
	797	.FuseLiterals,
	798	.Fpregs,
	799	.D32,
	800	.ExpandFpMlx,
	801	.Hwdiv,
	802	.HwdivArm,
	803	.RetAddrStack,
	804	.UseAa,
	805	}),
	806	FeatureInfo(@This()).create(.Krait, "krait", "Qualcomm Krait processors", "krait"),
	807	FeatureInfo(@This()).create(.Kryo, "kryo", "Qualcomm Kryo processors", "kryo"),
	808	FeatureInfo(@This()).create(.M3, "m3", "Cortex-M3 ARM processors", "m3"),
	809	FeatureInfo(@This()).create(.R4, "r4", "Cortex-R4 ARM processors", "r4"),
	810	FeatureInfo(@This()).create(.R5, "r5", "Cortex-R5 ARM processors", "r5"),
	811	FeatureInfo(@This()).create(.R7, "r7", "Cortex-R7 ARM processors", "r7"),
	812	FeatureInfo(@This()).create(.R52, "r52", "Cortex-R52 ARM processors", "r52"),
	813	FeatureInfo(@This()).create(.Swift, "swift", "Swift ARM processors", "swift"),
	814	FeatureInfo(@This()).createWithSubfeatures(.Xscale, "xscale", "ARMv5te architecture", "xscale", &[_]@This() {
	815	.V4t,
	816	}),
	817	};
	818	};

lib/std/target/feature/AvrFeature.zig created+230

...	...	@@ -0,0 +1,230 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const AvrFeature = enum {
	4	Avr0,
	5	Avr1,
	6	Avr2,
	7	Avr3,
	8	Avr4,
	9	Avr5,
	10	Avr6,
	11	Avr25,
	12	Avr31,
	13	Avr35,
	14	Avr51,
	15	Avrtiny,
	16	Xmega,
	17	Xmegau,
	18	Addsubiw,
	19	Break,
	20	Des,
	21	Eijmpcall,
	22	Elpm,
	23	Elpmx,
	24	Ijmpcall,
	25	Jmpcall,
	26	Lpm,
	27	Lpmx,
	28	Movw,
	29	Mul,
	30	Rmw,
	31	Spm,
	32	Spmx,
	33	Sram,
	34	Special,
	35	Smallstack,
	36	Tinyencoding,
	37
	38	pub fn getInfo(self: @This()) FeatureInfo {
	39	return feature_infos[@enumToInt(self)];
	40	}
	41
	42	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	43	FeatureInfo(@This()).create(.Avr0, "avr0", "The device is a part of the avr0 family", "avr0"),
	44	FeatureInfo(@This()).createWithSubfeatures(.Avr1, "avr1", "The device is a part of the avr1 family", "avr1", &[_]@This() {
	45	.Lpm,
	46	.Avr0,
	47	}),
	48	FeatureInfo(@This()).createWithSubfeatures(.Avr2, "avr2", "The device is a part of the avr2 family", "avr2", &[_]@This() {
	49	.Ijmpcall,
	50	.Sram,
	51	.Avr0,
	52	.Addsubiw,
	53	.Lpm,
	54	}),
	55	FeatureInfo(@This()).createWithSubfeatures(.Avr3, "avr3", "The device is a part of the avr3 family", "avr3", &[_]@This() {
	56	.Ijmpcall,
	57	.Sram,
	58	.Avr0,
	59	.Jmpcall,
	60	.Addsubiw,
	61	.Lpm,
	62	}),
	63	FeatureInfo(@This()).createWithSubfeatures(.Avr4, "avr4", "The device is a part of the avr4 family", "avr4", &[_]@This() {
	64	.Ijmpcall,
	65	.Movw,
	66	.Mul,
	67	.Sram,
	68	.Break,
	69	.Spm,
	70	.Lpmx,
	71	.Avr0,
	72	.Addsubiw,
	73	.Lpm,
	74	}),
	75	FeatureInfo(@This()).createWithSubfeatures(.Avr5, "avr5", "The device is a part of the avr5 family", "avr5", &[_]@This() {
	76	.Ijmpcall,
	77	.Movw,
	78	.Mul,
	79	.Sram,
	80	.Break,
	81	.Spm,
	82	.Lpmx,
	83	.Avr0,
	84	.Jmpcall,
	85	.Addsubiw,
	86	.Lpm,
	87	}),
	88	FeatureInfo(@This()).createWithSubfeatures(.Avr6, "avr6", "The device is a part of the avr6 family", "avr6", &[_]@This() {
	89	.Ijmpcall,
	90	.Elpmx,
	91	.Movw,
	92	.Mul,
	93	.Sram,
	94	.Break,
	95	.Spm,
	96	.Elpm,
	97	.Lpmx,
	98	.Avr0,
	99	.Jmpcall,
	100	.Addsubiw,
	101	.Lpm,
	102	}),
	103	FeatureInfo(@This()).createWithSubfeatures(.Avr25, "avr25", "The device is a part of the avr25 family", "avr25", &[_]@This() {
	104	.Ijmpcall,
	105	.Movw,
	106	.Sram,
	107	.Break,
	108	.Spm,
	109	.Lpmx,
	110	.Avr0,
	111	.Addsubiw,
	112	.Lpm,
	113	}),
	114	FeatureInfo(@This()).createWithSubfeatures(.Avr31, "avr31", "The device is a part of the avr31 family", "avr31", &[_]@This() {
	115	.Ijmpcall,
	116	.Sram,
	117	.Elpm,
	118	.Avr0,
	119	.Jmpcall,
	120	.Addsubiw,
	121	.Lpm,
	122	}),
	123	FeatureInfo(@This()).createWithSubfeatures(.Avr35, "avr35", "The device is a part of the avr35 family", "avr35", &[_]@This() {
	124	.Ijmpcall,
	125	.Movw,
	126	.Sram,
	127	.Break,
	128	.Spm,
	129	.Lpmx,
	130	.Avr0,
	131	.Jmpcall,
	132	.Addsubiw,
	133	.Lpm,
	134	}),
	135	FeatureInfo(@This()).createWithSubfeatures(.Avr51, "avr51", "The device is a part of the avr51 family", "avr51", &[_]@This() {
	136	.Ijmpcall,
	137	.Elpmx,
	138	.Movw,
	139	.Mul,
	140	.Sram,
	141	.Break,
	142	.Spm,
	143	.Elpm,
	144	.Lpmx,
	145	.Avr0,
	146	.Jmpcall,
	147	.Addsubiw,
	148	.Lpm,
	149	}),
	150	FeatureInfo(@This()).createWithSubfeatures(.Avrtiny, "avrtiny", "The device is a part of the avrtiny family", "avrtiny", &[_]@This() {
	151	.Break,
	152	.Tinyencoding,
	153	.Avr0,
	154	.Sram,
	155	}),
	156	FeatureInfo(@This()).createWithSubfeatures(.Xmega, "xmega", "The device is a part of the xmega family", "xmega", &[_]@This() {
	157	.Ijmpcall,
	158	.Elpmx,
	159	.Movw,
	160	.Eijmpcall,
	161	.Mul,
	162	.Sram,
	163	.Break,
	164	.Spm,
	165	.Elpm,
	166	.Lpmx,
	167	.Spmx,
	168	.Avr0,
	169	.Jmpcall,
	170	.Addsubiw,
	171	.Lpm,
	172	.Des,
	173	}),
	174	FeatureInfo(@This()).createWithSubfeatures(.Xmegau, "xmegau", "The device is a part of the xmegau family", "xmegau", &[_]@This() {
	175	.Ijmpcall,
	176	.Elpmx,
	177	.Movw,
	178	.Eijmpcall,
	179	.Mul,
	180	.Rmw,
	181	.Sram,
	182	.Break,
	183	.Spm,
	184	.Elpm,
	185	.Lpmx,
	186	.Spmx,
	187	.Avr0,
	188	.Jmpcall,
	189	.Addsubiw,
	190	.Lpm,
	191	.Des,
	192	}),
	193	FeatureInfo(@This()).create(.Addsubiw, "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", "addsubiw"),
	194	FeatureInfo(@This()).create(.Break, "break", "The device supports the `BREAK` debugging instruction", "break"),
	195	FeatureInfo(@This()).create(.Des, "des", "The device supports the `DES k` encryption instruction", "des"),
	196	FeatureInfo(@This()).create(.Eijmpcall, "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", "eijmpcall"),
	197	FeatureInfo(@This()).create(.Elpm, "elpm", "The device supports the ELPM instruction", "elpm"),
	198	FeatureInfo(@This()).create(.Elpmx, "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", "elpmx"),
	199	FeatureInfo(@This()).create(.Ijmpcall, "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", "ijmpcall"),
	200	FeatureInfo(@This()).create(.Jmpcall, "jmpcall", "The device supports the `JMP` and `CALL` instructions", "jmpcall"),
	201	FeatureInfo(@This()).create(.Lpm, "lpm", "The device supports the `LPM` instruction", "lpm"),
	202	FeatureInfo(@This()).create(.Lpmx, "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", "lpmx"),
	203	FeatureInfo(@This()).create(.Movw, "movw", "The device supports the 16-bit MOVW instruction", "movw"),
	204	FeatureInfo(@This()).create(.Mul, "mul", "The device supports the multiplication instructions", "mul"),
	205	FeatureInfo(@This()).create(.Rmw, "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", "rmw"),
	206	FeatureInfo(@This()).create(.Spm, "spm", "The device supports the `SPM` instruction", "spm"),
	207	FeatureInfo(@This()).create(.Spmx, "spmx", "The device supports the `SPM Z+` instruction", "spmx"),
	208	FeatureInfo(@This()).create(.Sram, "sram", "The device has random access memory", "sram"),
	209	FeatureInfo(@This()).createWithSubfeatures(.Special, "special", "Enable use of the entire instruction set - used for debugging", "special", &[_]@This() {
	210	.Ijmpcall,
	211	.Elpmx,
	212	.Movw,
	213	.Eijmpcall,
	214	.Mul,
	215	.Rmw,
	216	.Sram,
	217	.Break,
	218	.Elpm,
	219	.Spm,
	220	.Lpmx,
	221	.Spmx,
	222	.Jmpcall,
	223	.Addsubiw,
	224	.Lpm,
	225	.Des,
	226	}),
	227	FeatureInfo(@This()).create(.Smallstack, "smallstack", "The device has an 8-bit stack pointer", "smallstack"),
	228	FeatureInfo(@This()).create(.Tinyencoding, "tinyencoding", "The device has Tiny core specific instruction encodings", "tinyencoding"),
	229	};
	230	};

lib/std/target/feature/BpfFeature.zig created+17

...	...	@@ -0,0 +1,17 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const BpfFeature = enum {
	4	Alu32,
	5	Dummy,
	6	Dwarfris,
	7
	8	pub fn getInfo(self: @This()) FeatureInfo {
	9	return feature_infos[@enumToInt(self)];
	10	}
	11
	12	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	13	FeatureInfo(@This()).create(.Alu32, "alu32", "Enable ALU32 instructions", "alu32"),
	14	FeatureInfo(@This()).create(.Dummy, "dummy", "unused feature", "dummy"),
	15	FeatureInfo(@This()).create(.Dwarfris, "dwarfris", "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", "dwarfris"),
	16	};
	17	};

lib/std/target/feature/HexagonFeature.zig created+76

...	...	@@ -0,0 +1,76 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const HexagonFeature = enum {
	4	V5,
	5	V55,
	6	V60,
	7	V62,
	8	V65,
	9	V66,
	10	Hvx,
	11	HvxLength64b,
	12	HvxLength128b,
	13	Hvxv60,
	14	Hvxv62,
	15	Hvxv65,
	16	Hvxv66,
	17	Zreg,
	18	Duplex,
	19	LongCalls,
	20	Mem_noshuf,
	21	Memops,
	22	Nvj,
	23	Nvs,
	24	NoreturnStackElim,
	25	Packets,
	26	ReservedR19,
	27	SmallData,
	28
	29	pub fn getInfo(self: @This()) FeatureInfo {
	30	return feature_infos[@enumToInt(self)];
	31	}
	32
	33	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	34	FeatureInfo(@This()).create(.V5, "v5", "Enable Hexagon V5 architecture", "v5"),
	35	FeatureInfo(@This()).create(.V55, "v55", "Enable Hexagon V55 architecture", "v55"),
	36	FeatureInfo(@This()).create(.V60, "v60", "Enable Hexagon V60 architecture", "v60"),
	37	FeatureInfo(@This()).create(.V62, "v62", "Enable Hexagon V62 architecture", "v62"),
	38	FeatureInfo(@This()).create(.V65, "v65", "Enable Hexagon V65 architecture", "v65"),
	39	FeatureInfo(@This()).create(.V66, "v66", "Enable Hexagon V66 architecture", "v66"),
	40	FeatureInfo(@This()).create(.Hvx, "hvx", "Hexagon HVX instructions", "hvx"),
	41	FeatureInfo(@This()).createWithSubfeatures(.HvxLength64b, "hvx-length64b", "Hexagon HVX 64B instructions", "hvx-length64b", &[_]@This() {
	42	.Hvx,
	43	}),
	44	FeatureInfo(@This()).createWithSubfeatures(.HvxLength128b, "hvx-length128b", "Hexagon HVX 128B instructions", "hvx-length128b", &[_]@This() {
	45	.Hvx,
	46	}),
	47	FeatureInfo(@This()).createWithSubfeatures(.Hvxv60, "hvxv60", "Hexagon HVX instructions", "hvxv60", &[_]@This() {
	48	.Hvx,
	49	}),
	50	FeatureInfo(@This()).createWithSubfeatures(.Hvxv62, "hvxv62", "Hexagon HVX instructions", "hvxv62", &[_]@This() {
	51	.Hvx,
	52	}),
	53	FeatureInfo(@This()).createWithSubfeatures(.Hvxv65, "hvxv65", "Hexagon HVX instructions", "hvxv65", &[_]@This() {
	54	.Hvx,
	55	}),
	56	FeatureInfo(@This()).createWithSubfeatures(.Hvxv66, "hvxv66", "Hexagon HVX instructions", "hvxv66", &[_]@This() {
	57	.Hvx,
	58	.Zreg,
	59	}),
	60	FeatureInfo(@This()).create(.Zreg, "zreg", "Hexagon ZReg extension instructions", "zreg"),
	61	FeatureInfo(@This()).create(.Duplex, "duplex", "Enable generation of duplex instruction", "duplex"),
	62	FeatureInfo(@This()).create(.LongCalls, "long-calls", "Use constant-extended calls", "long-calls"),
	63	FeatureInfo(@This()).create(.Mem_noshuf, "mem_noshuf", "Supports mem_noshuf feature", "mem_noshuf"),
	64	FeatureInfo(@This()).create(.Memops, "memops", "Use memop instructions", "memops"),
	65	FeatureInfo(@This()).createWithSubfeatures(.Nvj, "nvj", "Support for new-value jumps", "nvj", &[_]@This() {
	66	.Packets,
	67	}),
	68	FeatureInfo(@This()).createWithSubfeatures(.Nvs, "nvs", "Support for new-value stores", "nvs", &[_]@This() {
	69	.Packets,
	70	}),
	71	FeatureInfo(@This()).create(.NoreturnStackElim, "noreturn-stack-elim", "Eliminate stack allocation in a noreturn function when possible", "noreturn-stack-elim"),
	72	FeatureInfo(@This()).create(.Packets, "packets", "Support for instruction packets", "packets"),
	73	FeatureInfo(@This()).create(.ReservedR19, "reserved-r19", "Reserve register R19", "reserved-r19"),
	74	FeatureInfo(@This()).create(.SmallData, "small-data", "Allow GP-relative addressing of global variables", "small-data"),
	75	};
	76	};

lib/std/target/feature/MipsFeature.zig created+238

...	...	@@ -0,0 +1,238 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const MipsFeature = enum {
	4	Abs2008,
	5	Crc,
	6	Cnmips,
	7	Dsp,
	8	Dspr2,
	9	Dspr3,
	10	Eva,
	11	Fp64,
	12	Fpxx,
	13	Ginv,
	14	Gp64,
	15	LongCalls,
	16	Msa,
	17	Mt,
	18	Nomadd4,
	19	Micromips,
	20	Mips1,
	21	Mips2,
	22	Mips3,
	23	Mips3_32,
	24	Mips3_32r2,
	25	Mips4,
	26	Mips4_32,
	27	Mips4_32r2,
	28	Mips5,
	29	Mips5_32r2,
	30	Mips16,
	31	Mips32,
	32	Mips32r2,
	33	Mips32r3,
	34	Mips32r5,
	35	Mips32r6,
	36	Mips64,
	37	Mips64r2,
	38	Mips64r3,
	39	Mips64r5,
	40	Mips64r6,
	41	Nan2008,
	42	Noabicalls,
	43	Nooddspreg,
	44	Ptr64,
	45	SingleFloat,
	46	SoftFloat,
	47	Sym32,
	48	UseIndirectJumpHazard,
	49	UseTccInDiv,
	50	Vfpu,
	51	Virt,
	52	Xgot,
	53	P5600,
	54
	55	pub fn getInfo(self: @This()) FeatureInfo {
	56	return feature_infos[@enumToInt(self)];
	57	}
	58
	59	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	60	FeatureInfo(@This()).create(.Abs2008, "abs2008", "Disable IEEE 754-2008 abs.fmt mode", "abs2008"),
	61	FeatureInfo(@This()).create(.Crc, "crc", "Mips R6 CRC ASE", "crc"),
	62	FeatureInfo(@This()).createWithSubfeatures(.Cnmips, "cnmips", "Octeon cnMIPS Support", "cnmips", &[_]@This() {
	63	.Mips3_32,
	64	.Fp64,
	65	.Mips4_32r2,
	66	.Mips3_32r2,
	67	.Mips1,
	68	.Mips4_32,
	69	.Gp64,
	70	.Mips5_32r2,
	71	}),
	72	FeatureInfo(@This()).create(.Dsp, "dsp", "Mips DSP ASE", "dsp"),
	73	FeatureInfo(@This()).createWithSubfeatures(.Dspr2, "dspr2", "Mips DSP-R2 ASE", "dspr2", &[_]@This() {
	74	.Dsp,
	75	}),
	76	FeatureInfo(@This()).createWithSubfeatures(.Dspr3, "dspr3", "Mips DSP-R3 ASE", "dspr3", &[_]@This() {
	77	.Dsp,
	78	}),
	79	FeatureInfo(@This()).create(.Eva, "eva", "Mips EVA ASE", "eva"),
	80	FeatureInfo(@This()).create(.Fp64, "fp64", "Support 64-bit FP registers", "fp64"),
	81	FeatureInfo(@This()).create(.Fpxx, "fpxx", "Support for FPXX", "fpxx"),
	82	FeatureInfo(@This()).create(.Ginv, "ginv", "Mips Global Invalidate ASE", "ginv"),
	83	FeatureInfo(@This()).create(.Gp64, "gp64", "General Purpose Registers are 64-bit wide", "gp64"),
	84	FeatureInfo(@This()).create(.LongCalls, "long-calls", "Disable use of the jal instruction", "long-calls"),
	85	FeatureInfo(@This()).create(.Msa, "msa", "Mips MSA ASE", "msa"),
	86	FeatureInfo(@This()).create(.Mt, "mt", "Mips MT ASE", "mt"),
	87	FeatureInfo(@This()).create(.Nomadd4, "nomadd4", "Disable 4-operand madd.fmt and related instructions", "nomadd4"),
	88	FeatureInfo(@This()).create(.Micromips, "micromips", "microMips mode", "micromips"),
	89	FeatureInfo(@This()).create(.Mips1, "mips1", "Mips I ISA Support [highly experimental]", "mips1"),
	90	FeatureInfo(@This()).createWithSubfeatures(.Mips2, "mips2", "Mips II ISA Support [highly experimental]", "mips2", &[_]@This() {
	91	.Mips1,
	92	}),
	93	FeatureInfo(@This()).createWithSubfeatures(.Mips3, "mips3", "MIPS III ISA Support [highly experimental]", "mips3", &[_]@This() {
	94	.Mips3_32,
	95	.Fp64,
	96	.Mips3_32r2,
	97	.Mips1,
	98	.Gp64,
	99	}),
	100	FeatureInfo(@This()).create(.Mips3_32, "mips3_32", "Subset of MIPS-III that is also in MIPS32 [highly experimental]", "mips3_32"),
	101	FeatureInfo(@This()).create(.Mips3_32r2, "mips3_32r2", "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", "mips3_32r2"),
	102	FeatureInfo(@This()).createWithSubfeatures(.Mips4, "mips4", "MIPS IV ISA Support", "mips4", &[_]@This() {
	103	.Mips3_32,
	104	.Fp64,
	105	.Mips4_32r2,
	106	.Mips3_32r2,
	107	.Mips1,
	108	.Mips4_32,
	109	.Gp64,
	110	}),
	111	FeatureInfo(@This()).create(.Mips4_32, "mips4_32", "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", "mips4_32"),
	112	FeatureInfo(@This()).create(.Mips4_32r2, "mips4_32r2", "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", "mips4_32r2"),
	113	FeatureInfo(@This()).createWithSubfeatures(.Mips5, "mips5", "MIPS V ISA Support [highly experimental]", "mips5", &[_]@This() {
	114	.Mips3_32,
	115	.Fp64,
	116	.Mips4_32r2,
	117	.Mips3_32r2,
	118	.Mips1,
	119	.Mips4_32,
	120	.Gp64,
	121	.Mips5_32r2,
	122	}),
	123	FeatureInfo(@This()).create(.Mips5_32r2, "mips5_32r2", "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", "mips5_32r2"),
	124	FeatureInfo(@This()).create(.Mips16, "mips16", "Mips16 mode", "mips16"),
	125	FeatureInfo(@This()).createWithSubfeatures(.Mips32, "mips32", "Mips32 ISA Support", "mips32", &[_]@This() {
	126	.Mips3_32,
	127	.Mips4_32,
	128	.Mips1,
	129	}),
	130	FeatureInfo(@This()).createWithSubfeatures(.Mips32r2, "mips32r2", "Mips32r2 ISA Support", "mips32r2", &[_]@This() {
	131	.Mips3_32,
	132	.Mips4_32r2,
	133	.Mips3_32r2,
	134	.Mips1,
	135	.Mips4_32,
	136	.Mips5_32r2,
	137	}),
	138	FeatureInfo(@This()).createWithSubfeatures(.Mips32r3, "mips32r3", "Mips32r3 ISA Support", "mips32r3", &[_]@This() {
	139	.Mips3_32,
	140	.Mips4_32r2,
	141	.Mips3_32r2,
	142	.Mips1,
	143	.Mips4_32,
	144	.Mips5_32r2,
	145	}),
	146	FeatureInfo(@This()).createWithSubfeatures(.Mips32r5, "mips32r5", "Mips32r5 ISA Support", "mips32r5", &[_]@This() {
	147	.Mips3_32,
	148	.Mips4_32r2,
	149	.Mips3_32r2,
	150	.Mips1,
	151	.Mips4_32,
	152	.Mips5_32r2,
	153	}),
	154	FeatureInfo(@This()).createWithSubfeatures(.Mips32r6, "mips32r6", "Mips32r6 ISA Support [experimental]", "mips32r6", &[_]@This() {
	155	.Mips3_32,
	156	.Fp64,
	157	.Mips4_32r2,
	158	.Abs2008,
	159	.Mips3_32r2,
	160	.Mips1,
	161	.Mips4_32,
	162	.Nan2008,
	163	.Mips5_32r2,
	164	}),
	165	FeatureInfo(@This()).createWithSubfeatures(.Mips64, "mips64", "Mips64 ISA Support", "mips64", &[_]@This() {
	166	.Mips3_32,
	167	.Fp64,
	168	.Mips4_32r2,
	169	.Mips3_32r2,
	170	.Mips1,
	171	.Mips4_32,
	172	.Gp64,
	173	.Mips5_32r2,
	174	}),
	175	FeatureInfo(@This()).createWithSubfeatures(.Mips64r2, "mips64r2", "Mips64r2 ISA Support", "mips64r2", &[_]@This() {
	176	.Mips3_32,
	177	.Fp64,
	178	.Mips4_32r2,
	179	.Mips3_32r2,
	180	.Mips1,
	181	.Mips4_32,
	182	.Gp64,
	183	.Mips5_32r2,
	184	}),
	185	FeatureInfo(@This()).createWithSubfeatures(.Mips64r3, "mips64r3", "Mips64r3 ISA Support", "mips64r3", &[_]@This() {
	186	.Mips3_32,
	187	.Fp64,
	188	.Mips4_32r2,
	189	.Mips3_32r2,
	190	.Mips1,
	191	.Mips4_32,
	192	.Gp64,
	193	.Mips5_32r2,
	194	}),
	195	FeatureInfo(@This()).createWithSubfeatures(.Mips64r5, "mips64r5", "Mips64r5 ISA Support", "mips64r5", &[_]@This() {
	196	.Mips3_32,
	197	.Fp64,
	198	.Mips4_32r2,
	199	.Mips3_32r2,
	200	.Mips1,
	201	.Mips4_32,
	202	.Gp64,
	203	.Mips5_32r2,
	204	}),
	205	FeatureInfo(@This()).createWithSubfeatures(.Mips64r6, "mips64r6", "Mips64r6 ISA Support [experimental]", "mips64r6", &[_]@This() {
	206	.Mips3_32,
	207	.Fp64,
	208	.Mips4_32r2,
	209	.Abs2008,
	210	.Mips3_32r2,
	211	.Mips1,
	212	.Mips4_32,
	213	.Nan2008,
	214	.Gp64,
	215	.Mips5_32r2,
	216	}),
	217	FeatureInfo(@This()).create(.Nan2008, "nan2008", "IEEE 754-2008 NaN encoding", "nan2008"),
	218	FeatureInfo(@This()).create(.Noabicalls, "noabicalls", "Disable SVR4-style position-independent code", "noabicalls"),
	219	FeatureInfo(@This()).create(.Nooddspreg, "nooddspreg", "Disable odd numbered single-precision registers", "nooddspreg"),
	220	FeatureInfo(@This()).create(.Ptr64, "ptr64", "Pointers are 64-bit wide", "ptr64"),
	221	FeatureInfo(@This()).create(.SingleFloat, "single-float", "Only supports single precision float", "single-float"),
	222	FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Does not support floating point instructions", "soft-float"),
	223	FeatureInfo(@This()).create(.Sym32, "sym32", "Symbols are 32 bit on Mips64", "sym32"),
	224	FeatureInfo(@This()).create(.UseIndirectJumpHazard, "use-indirect-jump-hazard", "Use indirect jump guards to prevent certain speculation based attacks", "use-indirect-jump-hazard"),
	225	FeatureInfo(@This()).create(.UseTccInDiv, "use-tcc-in-div", "Force the assembler to use trapping", "use-tcc-in-div"),
	226	FeatureInfo(@This()).create(.Vfpu, "vfpu", "Enable vector FPU instructions", "vfpu"),
	227	FeatureInfo(@This()).create(.Virt, "virt", "Mips Virtualization ASE", "virt"),
	228	FeatureInfo(@This()).create(.Xgot, "xgot", "Assume 32-bit GOT", "xgot"),
	229	FeatureInfo(@This()).createWithSubfeatures(.P5600, "p5600", "The P5600 Processor", "p5600", &[_]@This() {
	230	.Mips3_32,
	231	.Mips4_32r2,
	232	.Mips3_32r2,
	233	.Mips1,
	234	.Mips4_32,
	235	.Mips5_32r2,
	236	}),
	237	};
	238	};

lib/std/target/feature/Msp430Feature.zig created+19

...	...	@@ -0,0 +1,19 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const Msp430Feature = enum {
	4	Hwmult16,
	5	Hwmult32,
	6	Hwmultf5,
	7	Ext,
	8
	9	pub fn getInfo(self: @This()) FeatureInfo {
	10	return feature_infos[@enumToInt(self)];
	11	}
	12
	13	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	14	FeatureInfo(@This()).create(.Hwmult16, "hwmult16", "Enable 16-bit hardware multiplier", "hwmult16"),
	15	FeatureInfo(@This()).create(.Hwmult32, "hwmult32", "Enable 32-bit hardware multiplier", "hwmult32"),
	16	FeatureInfo(@This()).create(.Hwmultf5, "hwmultf5", "Enable F5 series hardware multiplier", "hwmultf5"),
	17	FeatureInfo(@This()).create(.Ext, "ext", "Enable MSP430-X extensions", "ext"),
	18	};
	19	};

lib/std/target/feature/NvptxFeature.zig created+61

...	...	@@ -0,0 +1,61 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const NvptxFeature = enum {
	4	Ptx32,
	5	Ptx40,
	6	Ptx41,
	7	Ptx42,
	8	Ptx43,
	9	Ptx50,
	10	Ptx60,
	11	Ptx61,
	12	Ptx63,
	13	Ptx64,
	14	Sm_20,
	15	Sm_21,
	16	Sm_30,
	17	Sm_32,
	18	Sm_35,
	19	Sm_37,
	20	Sm_50,
	21	Sm_52,
	22	Sm_53,
	23	Sm_60,
	24	Sm_61,
	25	Sm_62,
	26	Sm_70,
	27	Sm_72,
	28	Sm_75,
	29
	30	pub fn getInfo(self: @This()) FeatureInfo {
	31	return feature_infos[@enumToInt(self)];
	32	}
	33
	34	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	35	FeatureInfo(@This()).create(.Ptx32, "ptx32", "Use PTX version 3.2", "ptx32"),
	36	FeatureInfo(@This()).create(.Ptx40, "ptx40", "Use PTX version 4.0", "ptx40"),
	37	FeatureInfo(@This()).create(.Ptx41, "ptx41", "Use PTX version 4.1", "ptx41"),
	38	FeatureInfo(@This()).create(.Ptx42, "ptx42", "Use PTX version 4.2", "ptx42"),
	39	FeatureInfo(@This()).create(.Ptx43, "ptx43", "Use PTX version 4.3", "ptx43"),
	40	FeatureInfo(@This()).create(.Ptx50, "ptx50", "Use PTX version 5.0", "ptx50"),
	41	FeatureInfo(@This()).create(.Ptx60, "ptx60", "Use PTX version 6.0", "ptx60"),
	42	FeatureInfo(@This()).create(.Ptx61, "ptx61", "Use PTX version 6.1", "ptx61"),
	43	FeatureInfo(@This()).create(.Ptx63, "ptx63", "Use PTX version 6.3", "ptx63"),
	44	FeatureInfo(@This()).create(.Ptx64, "ptx64", "Use PTX version 6.4", "ptx64"),
	45	FeatureInfo(@This()).create(.Sm_20, "sm_20", "Target SM 2.0", "sm_20"),
	46	FeatureInfo(@This()).create(.Sm_21, "sm_21", "Target SM 2.1", "sm_21"),
	47	FeatureInfo(@This()).create(.Sm_30, "sm_30", "Target SM 3.0", "sm_30"),
	48	FeatureInfo(@This()).create(.Sm_32, "sm_32", "Target SM 3.2", "sm_32"),
	49	FeatureInfo(@This()).create(.Sm_35, "sm_35", "Target SM 3.5", "sm_35"),
	50	FeatureInfo(@This()).create(.Sm_37, "sm_37", "Target SM 3.7", "sm_37"),
	51	FeatureInfo(@This()).create(.Sm_50, "sm_50", "Target SM 5.0", "sm_50"),
	52	FeatureInfo(@This()).create(.Sm_52, "sm_52", "Target SM 5.2", "sm_52"),
	53	FeatureInfo(@This()).create(.Sm_53, "sm_53", "Target SM 5.3", "sm_53"),
	54	FeatureInfo(@This()).create(.Sm_60, "sm_60", "Target SM 6.0", "sm_60"),
	55	FeatureInfo(@This()).create(.Sm_61, "sm_61", "Target SM 6.1", "sm_61"),
	56	FeatureInfo(@This()).create(.Sm_62, "sm_62", "Target SM 6.2", "sm_62"),
	57	FeatureInfo(@This()).create(.Sm_70, "sm_70", "Target SM 7.0", "sm_70"),
	58	FeatureInfo(@This()).create(.Sm_72, "sm_72", "Target SM 7.2", "sm_72"),
	59	FeatureInfo(@This()).create(.Sm_75, "sm_75", "Target SM 7.5", "sm_75"),
	60	};
	61	};

lib/std/target/feature/PowerPcFeature.zig created+163

...	...	@@ -0,0 +1,163 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const PowerPcFeature = enum {
	4	Bit64,
	5	Bitregs64,
	6	Altivec,
	7	Bpermd,
	8	Booke,
	9	Cmpb,
	10	Crbits,
	11	DirectMove,
	12	E500,
	13	Extdiv,
	14	Fcpsgn,
	15	Fpcvt,
	16	Fprnd,
	17	Fpu,
	18	Fre,
	19	Fres,
	20	Frsqrte,
	21	Frsqrtes,
	22	Fsqrt,
	23	Float128,
	24	Htm,
	25	HardFloat,
	26	Icbt,
	27	IsaV30Instructions,
	28	Isel,
	29	InvariantFunctionDescriptors,
	30	Ldbrx,
	31	Lfiwax,
	32	Longcall,
	33	Mfocrf,
	34	Msync,
	35	Power8Altivec,
	36	Crypto,
	37	Power8Vector,
	38	Power9Altivec,
	39	Power9Vector,
	40	Popcntd,
	41	Ppc4xx,
	42	Ppc6xx,
	43	PpcPostraSched,
	44	PpcPreraSched,
	45	PartwordAtomics,
	46	Qpx,
	47	Recipprec,
	48	Spe,
	49	Stfiwx,
	50	SecurePlt,
	51	SlowPopcntd,
	52	TwoConstNr,
	53	Vsx,
	54	VectorsUseTwoUnits,
	55
	56	pub fn getInfo(self: @This()) FeatureInfo {
	57	return feature_infos[@enumToInt(self)];
	58	}
	59
	60	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	61	FeatureInfo(@This()).create(.Bit64, "64bit", "Enable 64-bit instructions", "64bit"),
	62	FeatureInfo(@This()).create(.Bitregs64, "64bitregs", "Enable 64-bit registers usage for ppc32 [beta]", "64bitregs"),
	63	FeatureInfo(@This()).createWithSubfeatures(.Altivec, "altivec", "Enable Altivec instructions", "altivec", &[_]@This() {
	64	.HardFloat,
	65	}),
	66	FeatureInfo(@This()).create(.Bpermd, "bpermd", "Enable the bpermd instruction", "bpermd"),
	67	FeatureInfo(@This()).createWithSubfeatures(.Booke, "booke", "Enable Book E instructions", "booke", &[_]@This() {
	68	.Icbt,
	69	}),
	70	FeatureInfo(@This()).create(.Cmpb, "cmpb", "Enable the cmpb instruction", "cmpb"),
	71	FeatureInfo(@This()).create(.Crbits, "crbits", "Use condition-register bits individually", "crbits"),
	72	FeatureInfo(@This()).createWithSubfeatures(.DirectMove, "direct-move", "Enable Power8 direct move instructions", "direct-move", &[_]@This() {
	73	.HardFloat,
	74	}),
	75	FeatureInfo(@This()).create(.E500, "e500", "Enable E500/E500mc instructions", "e500"),
	76	FeatureInfo(@This()).create(.Extdiv, "extdiv", "Enable extended divide instructions", "extdiv"),
	77	FeatureInfo(@This()).createWithSubfeatures(.Fcpsgn, "fcpsgn", "Enable the fcpsgn instruction", "fcpsgn", &[_]@This() {
	78	.HardFloat,
	79	}),
	80	FeatureInfo(@This()).createWithSubfeatures(.Fpcvt, "fpcvt", "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", "fpcvt", &[_]@This() {
	81	.HardFloat,
	82	}),
	83	FeatureInfo(@This()).createWithSubfeatures(.Fprnd, "fprnd", "Enable the fri[mnpz] instructions", "fprnd", &[_]@This() {
	84	.HardFloat,
	85	}),
	86	FeatureInfo(@This()).createWithSubfeatures(.Fpu, "fpu", "Enable classic FPU instructions", "fpu", &[_]@This() {
	87	.HardFloat,
	88	}),
	89	FeatureInfo(@This()).createWithSubfeatures(.Fre, "fre", "Enable the fre instruction", "fre", &[_]@This() {
	90	.HardFloat,
	91	}),
	92	FeatureInfo(@This()).createWithSubfeatures(.Fres, "fres", "Enable the fres instruction", "fres", &[_]@This() {
	93	.HardFloat,
	94	}),
	95	FeatureInfo(@This()).createWithSubfeatures(.Frsqrte, "frsqrte", "Enable the frsqrte instruction", "frsqrte", &[_]@This() {
	96	.HardFloat,
	97	}),
	98	FeatureInfo(@This()).createWithSubfeatures(.Frsqrtes, "frsqrtes", "Enable the frsqrtes instruction", "frsqrtes", &[_]@This() {
	99	.HardFloat,
	100	}),
	101	FeatureInfo(@This()).createWithSubfeatures(.Fsqrt, "fsqrt", "Enable the fsqrt instruction", "fsqrt", &[_]@This() {
	102	.HardFloat,
	103	}),
	104	FeatureInfo(@This()).createWithSubfeatures(.Float128, "float128", "Enable the __float128 data type for IEEE-754R Binary128.", "float128", &[_]@This() {
	105	.HardFloat,
	106	}),
	107	FeatureInfo(@This()).create(.Htm, "htm", "Enable Hardware Transactional Memory instructions", "htm"),
	108	FeatureInfo(@This()).create(.HardFloat, "hard-float", "Enable floating-point instructions", "hard-float"),
	109	FeatureInfo(@This()).create(.Icbt, "icbt", "Enable icbt instruction", "icbt"),
	110	FeatureInfo(@This()).create(.IsaV30Instructions, "isa-v30-instructions", "Enable instructions added in ISA 3.0.", "isa-v30-instructions"),
	111	FeatureInfo(@This()).create(.Isel, "isel", "Enable the isel instruction", "isel"),
	112	FeatureInfo(@This()).create(.InvariantFunctionDescriptors, "invariant-function-descriptors", "Assume function descriptors are invariant", "invariant-function-descriptors"),
	113	FeatureInfo(@This()).create(.Ldbrx, "ldbrx", "Enable the ldbrx instruction", "ldbrx"),
	114	FeatureInfo(@This()).createWithSubfeatures(.Lfiwax, "lfiwax", "Enable the lfiwax instruction", "lfiwax", &[_]@This() {
	115	.HardFloat,
	116	}),
	117	FeatureInfo(@This()).create(.Longcall, "longcall", "Always use indirect calls", "longcall"),
	118	FeatureInfo(@This()).create(.Mfocrf, "mfocrf", "Enable the MFOCRF instruction", "mfocrf"),
	119	FeatureInfo(@This()).createWithSubfeatures(.Msync, "msync", "Has only the msync instruction instead of sync", "msync", &[_]@This() {
	120	.Icbt,
	121	}),
	122	FeatureInfo(@This()).createWithSubfeatures(.Power8Altivec, "power8-altivec", "Enable POWER8 Altivec instructions", "power8-altivec", &[_]@This() {
	123	.HardFloat,
	124	}),
	125	FeatureInfo(@This()).createWithSubfeatures(.Crypto, "crypto", "Enable POWER8 Crypto instructions", "crypto", &[_]@This() {
	126	.HardFloat,
	127	}),
	128	FeatureInfo(@This()).createWithSubfeatures(.Power8Vector, "power8-vector", "Enable POWER8 vector instructions", "power8-vector", &[_]@This() {
	129	.HardFloat,
	130	}),
	131	FeatureInfo(@This()).createWithSubfeatures(.Power9Altivec, "power9-altivec", "Enable POWER9 Altivec instructions", "power9-altivec", &[_]@This() {
	132	.IsaV30Instructions,
	133	.HardFloat,
	134	}),
	135	FeatureInfo(@This()).createWithSubfeatures(.Power9Vector, "power9-vector", "Enable POWER9 vector instructions", "power9-vector", &[_]@This() {
	136	.IsaV30Instructions,
	137	.HardFloat,
	138	}),
	139	FeatureInfo(@This()).create(.Popcntd, "popcntd", "Enable the popcnt[dw] instructions", "popcntd"),
	140	FeatureInfo(@This()).create(.Ppc4xx, "ppc4xx", "Enable PPC 4xx instructions", "ppc4xx"),
	141	FeatureInfo(@This()).create(.Ppc6xx, "ppc6xx", "Enable PPC 6xx instructions", "ppc6xx"),
	142	FeatureInfo(@This()).create(.PpcPostraSched, "ppc-postra-sched", "Use PowerPC post-RA scheduling strategy", "ppc-postra-sched"),
	143	FeatureInfo(@This()).create(.PpcPreraSched, "ppc-prera-sched", "Use PowerPC pre-RA scheduling strategy", "ppc-prera-sched"),
	144	FeatureInfo(@This()).create(.PartwordAtomics, "partword-atomics", "Enable l[bh]arx and st[bh]cx.", "partword-atomics"),
	145	FeatureInfo(@This()).createWithSubfeatures(.Qpx, "qpx", "Enable QPX instructions", "qpx", &[_]@This() {
	146	.HardFloat,
	147	}),
	148	FeatureInfo(@This()).create(.Recipprec, "recipprec", "Assume higher precision reciprocal estimates", "recipprec"),
	149	FeatureInfo(@This()).createWithSubfeatures(.Spe, "spe", "Enable SPE instructions", "spe", &[_]@This() {
	150	.HardFloat,
	151	}),
	152	FeatureInfo(@This()).createWithSubfeatures(.Stfiwx, "stfiwx", "Enable the stfiwx instruction", "stfiwx", &[_]@This() {
	153	.HardFloat,
	154	}),
	155	FeatureInfo(@This()).create(.SecurePlt, "secure-plt", "Enable secure plt mode", "secure-plt"),
	156	FeatureInfo(@This()).create(.SlowPopcntd, "slow-popcntd", "Has slow popcnt[dw] instructions", "slow-popcntd"),
	157	FeatureInfo(@This()).create(.TwoConstNr, "two-const-nr", "Requires two constant Newton-Raphson computation", "two-const-nr"),
	158	FeatureInfo(@This()).createWithSubfeatures(.Vsx, "vsx", "Enable VSX instructions", "vsx", &[_]@This() {
	159	.HardFloat,
	160	}),
	161	FeatureInfo(@This()).create(.VectorsUseTwoUnits, "vectors-use-two-units", "Vectors use two units", "vectors-use-two-units"),
	162	};
	163	};

lib/std/target/feature/RiscVFeature.zig created+31

...	...	@@ -0,0 +1,31 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const RiscVFeature = enum {
	4	Bit64,
	5	E,
	6	RvcHints,
	7	Relax,
	8	A,
	9	C,
	10	D,
	11	F,
	12	M,
	13
	14	pub fn getInfo(self: @This()) FeatureInfo {
	15	return feature_infos[@enumToInt(self)];
	16	}
	17
	18	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	19	FeatureInfo(@This()).create(.Bit64, "64bit", "Implements RV64", "64bit"),
	20	FeatureInfo(@This()).create(.E, "e", "Implements RV32E (provides 16 rather than 32 GPRs)", "e"),
	21	FeatureInfo(@This()).create(.RvcHints, "rvc-hints", "Enable RVC Hint Instructions.", "rvc-hints"),
	22	FeatureInfo(@This()).create(.Relax, "relax", "Enable Linker relaxation.", "relax"),
	23	FeatureInfo(@This()).create(.A, "a", "'A' (Atomic Instructions)", "a"),
	24	FeatureInfo(@This()).create(.C, "c", "'C' (Compressed Instructions)", "c"),
	25	FeatureInfo(@This()).createWithSubfeatures(.D, "d", "'D' (Double-Precision Floating-Point)", "d", &[_]@This() {
	26	.F,
	27	}),
	28	FeatureInfo(@This()).create(.F, "f", "'F' (Single-Precision Floating-Point)", "f"),
	29	FeatureInfo(@This()).create(.M, "m", "'M' (Integer Multiplication and Division)", "m"),
	30	};
	31	};

lib/std/target/feature/SparcFeature.zig created+49

...	...	@@ -0,0 +1,49 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const SparcFeature = enum {
	4	Detectroundchange,
	5	HardQuadFloat,
	6	Leon,
	7	NoFmuls,
	8	NoFsmuld,
	9	Leonpwrpsr,
	10	SoftFloat,
	11	SoftMulDiv,
	12	DeprecatedV8,
	13	V9,
	14	Vis,
	15	Vis2,
	16	Vis3,
	17	Fixallfdivsqrt,
	18	Insertnopload,
	19	Hasleoncasa,
	20	Leoncyclecounter,
	21	Hasumacsmac,
	22	Popc,
	23
	24	pub fn getInfo(self: @This()) FeatureInfo {
	25	return feature_infos[@enumToInt(self)];
	26	}
	27
	28	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	29	FeatureInfo(@This()).create(.Detectroundchange, "detectroundchange", "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode", "detectroundchange"),
	30	FeatureInfo(@This()).create(.HardQuadFloat, "hard-quad-float", "Enable quad-word floating point instructions", "hard-quad-float"),
	31	FeatureInfo(@This()).create(.Leon, "leon", "Enable LEON extensions", "leon"),
	32	FeatureInfo(@This()).create(.NoFmuls, "no-fmuls", "Disable the fmuls instruction.", "no-fmuls"),
	33	FeatureInfo(@This()).create(.NoFsmuld, "no-fsmuld", "Disable the fsmuld instruction.", "no-fsmuld"),
	34	FeatureInfo(@This()).create(.Leonpwrpsr, "leonpwrpsr", "Enable the PWRPSR instruction", "leonpwrpsr"),
	35	FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software emulation for floating point", "soft-float"),
	36	FeatureInfo(@This()).create(.SoftMulDiv, "soft-mul-div", "Use software emulation for integer multiply and divide", "soft-mul-div"),
	37	FeatureInfo(@This()).create(.DeprecatedV8, "deprecated-v8", "Enable deprecated V8 instructions in V9 mode", "deprecated-v8"),
	38	FeatureInfo(@This()).create(.V9, "v9", "Enable SPARC-V9 instructions", "v9"),
	39	FeatureInfo(@This()).create(.Vis, "vis", "Enable UltraSPARC Visual Instruction Set extensions", "vis"),
	40	FeatureInfo(@This()).create(.Vis2, "vis2", "Enable Visual Instruction Set extensions II", "vis2"),
	41	FeatureInfo(@This()).create(.Vis3, "vis3", "Enable Visual Instruction Set extensions III", "vis3"),
	42	FeatureInfo(@This()).create(.Fixallfdivsqrt, "fixallfdivsqrt", "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store", "fixallfdivsqrt"),
	43	FeatureInfo(@This()).create(.Insertnopload, "insertnopload", "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction", "insertnopload"),
	44	FeatureInfo(@This()).create(.Hasleoncasa, "hasleoncasa", "Enable CASA instruction for LEON3 and LEON4 processors", "hasleoncasa"),
	45	FeatureInfo(@This()).create(.Leoncyclecounter, "leoncyclecounter", "Use the Leon cycle counter register", "leoncyclecounter"),
	46	FeatureInfo(@This()).create(.Hasumacsmac, "hasumacsmac", "Enable UMAC and SMAC for LEON3 and LEON4 processors", "hasumacsmac"),
	47	FeatureInfo(@This()).create(.Popc, "popc", "Use the popc (population count) instruction", "popc"),
	48	};
	49	};

lib/std/target/feature/SystemZFeature.zig created+81

...	...	@@ -0,0 +1,81 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const SystemZFeature = enum {
	4	DfpPackedConversion,
	5	DfpZonedConversion,
	6	DeflateConversion,
	7	DistinctOps,
	8	EnhancedDat2,
	9	EnhancedSort,
	10	ExecutionHint,
	11	FpExtension,
	12	FastSerialization,
	13	GuardedStorage,
	14	HighWord,
	15	InsertReferenceBitsMultiple,
	16	InterlockedAccess1,
	17	LoadAndTrap,
	18	LoadAndZeroRightmostByte,
	19	LoadStoreOnCond,
	20	LoadStoreOnCond2,
	21	MessageSecurityAssistExtension3,
	22	MessageSecurityAssistExtension4,
	23	MessageSecurityAssistExtension5,
	24	MessageSecurityAssistExtension7,
	25	MessageSecurityAssistExtension8,
	26	MessageSecurityAssistExtension9,
	27	MiscellaneousExtensions,
	28	MiscellaneousExtensions2,
	29	MiscellaneousExtensions3,
	30	PopulationCount,
	31	ProcessorAssist,
	32	ResetReferenceBitsMultiple,
	33	TransactionalExecution,
	34	Vector,
	35	VectorEnhancements1,
	36	VectorEnhancements2,
	37	VectorPackedDecimal,
	38	VectorPackedDecimalEnhancement,
	39
	40	pub fn getInfo(self: @This()) FeatureInfo {
	41	return feature_infos[@enumToInt(self)];
	42	}
	43
	44	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	45	FeatureInfo(@This()).create(.DfpPackedConversion, "dfp-packed-conversion", "Assume that the DFP packed-conversion facility is installed", "dfp-packed-conversion"),
	46	FeatureInfo(@This()).create(.DfpZonedConversion, "dfp-zoned-conversion", "Assume that the DFP zoned-conversion facility is installed", "dfp-zoned-conversion"),
	47	FeatureInfo(@This()).create(.DeflateConversion, "deflate-conversion", "Assume that the deflate-conversion facility is installed", "deflate-conversion"),
	48	FeatureInfo(@This()).create(.DistinctOps, "distinct-ops", "Assume that the distinct-operands facility is installed", "distinct-ops"),
	49	FeatureInfo(@This()).create(.EnhancedDat2, "enhanced-dat-2", "Assume that the enhanced-DAT facility 2 is installed", "enhanced-dat-2"),
	50	FeatureInfo(@This()).create(.EnhancedSort, "enhanced-sort", "Assume that the enhanced-sort facility is installed", "enhanced-sort"),
	51	FeatureInfo(@This()).create(.ExecutionHint, "execution-hint", "Assume that the execution-hint facility is installed", "execution-hint"),
	52	FeatureInfo(@This()).create(.FpExtension, "fp-extension", "Assume that the floating-point extension facility is installed", "fp-extension"),
	53	FeatureInfo(@This()).create(.FastSerialization, "fast-serialization", "Assume that the fast-serialization facility is installed", "fast-serialization"),
	54	FeatureInfo(@This()).create(.GuardedStorage, "guarded-storage", "Assume that the guarded-storage facility is installed", "guarded-storage"),
	55	FeatureInfo(@This()).create(.HighWord, "high-word", "Assume that the high-word facility is installed", "high-word"),
	56	FeatureInfo(@This()).create(.InsertReferenceBitsMultiple, "insert-reference-bits-multiple", "Assume that the insert-reference-bits-multiple facility is installed", "insert-reference-bits-multiple"),
	57	FeatureInfo(@This()).create(.InterlockedAccess1, "interlocked-access1", "Assume that interlocked-access facility 1 is installed", "interlocked-access1"),
	58	FeatureInfo(@This()).create(.LoadAndTrap, "load-and-trap", "Assume that the load-and-trap facility is installed", "load-and-trap"),
	59	FeatureInfo(@This()).create(.LoadAndZeroRightmostByte, "load-and-zero-rightmost-byte", "Assume that the load-and-zero-rightmost-byte facility is installed", "load-and-zero-rightmost-byte"),
	60	FeatureInfo(@This()).create(.LoadStoreOnCond, "load-store-on-cond", "Assume that the load/store-on-condition facility is installed", "load-store-on-cond"),
	61	FeatureInfo(@This()).create(.LoadStoreOnCond2, "load-store-on-cond-2", "Assume that the load/store-on-condition facility 2 is installed", "load-store-on-cond-2"),
	62	FeatureInfo(@This()).create(.MessageSecurityAssistExtension3, "message-security-assist-extension3", "Assume that the message-security-assist extension facility 3 is installed", "message-security-assist-extension3"),
	63	FeatureInfo(@This()).create(.MessageSecurityAssistExtension4, "message-security-assist-extension4", "Assume that the message-security-assist extension facility 4 is installed", "message-security-assist-extension4"),
	64	FeatureInfo(@This()).create(.MessageSecurityAssistExtension5, "message-security-assist-extension5", "Assume that the message-security-assist extension facility 5 is installed", "message-security-assist-extension5"),
	65	FeatureInfo(@This()).create(.MessageSecurityAssistExtension7, "message-security-assist-extension7", "Assume that the message-security-assist extension facility 7 is installed", "message-security-assist-extension7"),
	66	FeatureInfo(@This()).create(.MessageSecurityAssistExtension8, "message-security-assist-extension8", "Assume that the message-security-assist extension facility 8 is installed", "message-security-assist-extension8"),
	67	FeatureInfo(@This()).create(.MessageSecurityAssistExtension9, "message-security-assist-extension9", "Assume that the message-security-assist extension facility 9 is installed", "message-security-assist-extension9"),
	68	FeatureInfo(@This()).create(.MiscellaneousExtensions, "miscellaneous-extensions", "Assume that the miscellaneous-extensions facility is installed", "miscellaneous-extensions"),
	69	FeatureInfo(@This()).create(.MiscellaneousExtensions2, "miscellaneous-extensions-2", "Assume that the miscellaneous-extensions facility 2 is installed", "miscellaneous-extensions-2"),
	70	FeatureInfo(@This()).create(.MiscellaneousExtensions3, "miscellaneous-extensions-3", "Assume that the miscellaneous-extensions facility 3 is installed", "miscellaneous-extensions-3"),
	71	FeatureInfo(@This()).create(.PopulationCount, "population-count", "Assume that the population-count facility is installed", "population-count"),
	72	FeatureInfo(@This()).create(.ProcessorAssist, "processor-assist", "Assume that the processor-assist facility is installed", "processor-assist"),
	73	FeatureInfo(@This()).create(.ResetReferenceBitsMultiple, "reset-reference-bits-multiple", "Assume that the reset-reference-bits-multiple facility is installed", "reset-reference-bits-multiple"),
	74	FeatureInfo(@This()).create(.TransactionalExecution, "transactional-execution", "Assume that the transactional-execution facility is installed", "transactional-execution"),
	75	FeatureInfo(@This()).create(.Vector, "vector", "Assume that the vectory facility is installed", "vector"),
	76	FeatureInfo(@This()).create(.VectorEnhancements1, "vector-enhancements-1", "Assume that the vector enhancements facility 1 is installed", "vector-enhancements-1"),
	77	FeatureInfo(@This()).create(.VectorEnhancements2, "vector-enhancements-2", "Assume that the vector enhancements facility 2 is installed", "vector-enhancements-2"),
	78	FeatureInfo(@This()).create(.VectorPackedDecimal, "vector-packed-decimal", "Assume that the vector packed decimal facility is installed", "vector-packed-decimal"),
	79	FeatureInfo(@This()).create(.VectorPackedDecimalEnhancement, "vector-packed-decimal-enhancement", "Assume that the vector packed decimal enhancement facility is installed", "vector-packed-decimal-enhancement"),
	80	};
	81	};

lib/std/target/feature/WebAssemblyFeature.zig created+33

...	...	@@ -0,0 +1,33 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const WebAssemblyFeature = enum {
	4	Atomics,
	5	BulkMemory,
	6	ExceptionHandling,
	7	Multivalue,
	8	MutableGlobals,
	9	NontrappingFptoint,
	10	Simd128,
	11	SignExt,
	12	TailCall,
	13	UnimplementedSimd128,
	14
	15	pub fn getInfo(self: @This()) FeatureInfo {
	16	return feature_infos[@enumToInt(self)];
	17	}
	18
	19	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	20	FeatureInfo(@This()).create(.Atomics, "atomics", "Enable Atomics", "atomics"),
	21	FeatureInfo(@This()).create(.BulkMemory, "bulk-memory", "Enable bulk memory operations", "bulk-memory"),
	22	FeatureInfo(@This()).create(.ExceptionHandling, "exception-handling", "Enable Wasm exception handling", "exception-handling"),
	23	FeatureInfo(@This()).create(.Multivalue, "multivalue", "Enable multivalue blocks, instructions, and functions", "multivalue"),
	24	FeatureInfo(@This()).create(.MutableGlobals, "mutable-globals", "Enable mutable globals", "mutable-globals"),
	25	FeatureInfo(@This()).create(.NontrappingFptoint, "nontrapping-fptoint", "Enable non-trapping float-to-int conversion operators", "nontrapping-fptoint"),
	26	FeatureInfo(@This()).create(.Simd128, "simd128", "Enable 128-bit SIMD", "simd128"),
	27	FeatureInfo(@This()).create(.SignExt, "sign-ext", "Enable sign extension operators", "sign-ext"),
	28	FeatureInfo(@This()).create(.TailCall, "tail-call", "Enable tail call instructions", "tail-call"),
	29	FeatureInfo(@This()).createWithSubfeatures(.UnimplementedSimd128, "unimplemented-simd128", "Enable 128-bit SIMD not yet implemented in engines", "unimplemented-simd128", &[_]@This() {
	30	.Simd128,
	31	}),
	32	};
	33	};

lib/std/target/feature/X86Feature.zig created+342

...	...	@@ -0,0 +1,342 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const X86Feature = enum {
	4	Dnow3,
	5	Dnowa3,
	6	Bit64,
	7	Adx,
	8	Aes,
	9	Avx,
	10	Avx2,
	11	Avx512f,
	12	Avx512bf16,
	13	Avx512bitalg,
	14	Bmi,
	15	Bmi2,
	16	Avx512bw,
	17	Branchfusion,
	18	Avx512cd,
	19	Cldemote,
	20	Clflushopt,
	21	Clwb,
	22	Clzero,
	23	Cmov,
	24	Cx8,
	25	Cx16,
	26	Avx512dq,
	27	Mpx,
	28	Enqcmd,
	29	Avx512er,
	30	Ermsb,
	31	F16c,
	32	Fma,
	33	Fma4,
	34	Fsgsbase,
	35	Fxsr,
	36	Fast11bytenop,
	37	Fast15bytenop,
	38	FastBextr,
	39	FastHops,
	40	FastLzcnt,
	41	FastPartialYmmOrZmmWrite,
	42	FastShldRotate,
	43	FastScalarFsqrt,
	44	FastScalarShiftMasks,
	45	FastVariableShuffle,
	46	FastVectorFsqrt,
	47	FastVectorShiftMasks,
	48	Gfni,
	49	FastGather,
	50	Avx512ifma,
	51	Invpcid,
	52	Sahf,
	53	LeaSp,
	54	LeaUsesAg,
	55	Lwp,
	56	Lzcnt,
	57	FalseDepsLzcntTzcnt,
	58	Mmx,
	59	Movbe,
	60	Movdir64b,
	61	Movdiri,
	62	Mwaitx,
	63	Macrofusion,
	64	MergeToThreewayBranch,
	65	Nopl,
	66	Pclmul,
	67	Pconfig,
	68	Avx512pf,
	69	Pku,
	70	Popcnt,
	71	FalseDepsPopcnt,
	72	Prefetchwt1,
	73	Prfchw,
	74	Ptwrite,
	75	PadShortFunctions,
	76	Prefer128Bit,
	77	Prefer256Bit,
	78	Rdpid,
	79	Rdrnd,
	80	Rdseed,
	81	Rtm,
	82	Retpoline,
	83	RetpolineExternalThunk,
	84	RetpolineIndirectBranches,
	85	RetpolineIndirectCalls,
	86	Sgx,
	87	Sha,
	88	Shstk,
	89	Sse,
	90	Sse2,
	91	Sse3,
	92	Sse4a,
	93	Sse41,
	94	Sse42,
	95	SseUnalignedMem,
	96	Ssse3,
	97	Slow3opsLea,
	98	IdivlToDivb,
	99	IdivqToDivl,
	100	SlowIncdec,
	101	SlowLea,
	102	SlowPmaddwd,
	103	SlowPmulld,
	104	SlowShld,
	105	SlowTwoMemOps,
	106	SlowUnalignedMem16,
	107	SlowUnalignedMem32,
	108	SoftFloat,
	109	Tbm,
	110	UseAa,
	111	Vaes,
	112	Avx512vbmi,
	113	Avx512vbmi2,
	114	Avx512vl,
	115	Avx512vnni,
	116	Avx512vp2intersect,
	117	Vpclmulqdq,
	118	Avx512vpopcntdq,
	119	Waitpkg,
	120	Wbnoinvd,
	121	X87,
	122	Xop,
	123	Xsave,
	124	Xsavec,
	125	Xsaveopt,
	126	Xsaves,
	127	BitMode16,
	128	BitMode32,
	129	BitMode64,
	130
	131	pub fn getInfo(self: @This()) FeatureInfo {
	132	return feature_infos[@enumToInt(self)];
	133	}
	134
	135	pub const feature_infos = [@memberCount(@This())]FeatureInfo(@This()) {
	136	FeatureInfo(@This()).createWithSubfeatures(.Dnow3, "3dnow", "Enable 3DNow! instructions", "3dnow", &[_]@This() {
	137	.Mmx,
	138	}),
	139	FeatureInfo(@This()).createWithSubfeatures(.Dnowa3, "3dnowa", "Enable 3DNow! Athlon instructions", "3dnowa", &[_]@This() {
	140	.Mmx,
	141	}),
	142	FeatureInfo(@This()).create(.Bit64, "64bit", "Support 64-bit instructions", "64bit"),
	143	FeatureInfo(@This()).create(.Adx, "adx", "Support ADX instructions", "adx"),
	144	FeatureInfo(@This()).createWithSubfeatures(.Aes, "aes", "Enable AES instructions", "aes", &[_]@This() {
	145	.Sse,
	146	}),
	147	FeatureInfo(@This()).createWithSubfeatures(.Avx, "avx", "Enable AVX instructions", "avx", &[_]@This() {
	148	.Sse,
	149	}),
	150	FeatureInfo(@This()).createWithSubfeatures(.Avx2, "avx2", "Enable AVX2 instructions", "avx2", &[_]@This() {
	151	.Sse,
	152	}),
	153	FeatureInfo(@This()).createWithSubfeatures(.Avx512f, "avx512f", "Enable AVX-512 instructions", "avx512f", &[_]@This() {
	154	.Sse,
	155	}),
	156	FeatureInfo(@This()).createWithSubfeatures(.Avx512bf16, "avx512bf16", "Support bfloat16 floating point", "avx512bf16", &[_]@This() {
	157	.Sse,
	158	}),
	159	FeatureInfo(@This()).createWithSubfeatures(.Avx512bitalg, "avx512bitalg", "Enable AVX-512 Bit Algorithms", "avx512bitalg", &[_]@This() {
	160	.Sse,
	161	}),
	162	FeatureInfo(@This()).create(.Bmi, "bmi", "Support BMI instructions", "bmi"),
	163	FeatureInfo(@This()).create(.Bmi2, "bmi2", "Support BMI2 instructions", "bmi2"),
	164	FeatureInfo(@This()).createWithSubfeatures(.Avx512bw, "avx512bw", "Enable AVX-512 Byte and Word Instructions", "avx512bw", &[_]@This() {
	165	.Sse,
	166	}),
	167	FeatureInfo(@This()).create(.Branchfusion, "branchfusion", "CMP/TEST can be fused with conditional branches", "branchfusion"),
	168	FeatureInfo(@This()).createWithSubfeatures(.Avx512cd, "avx512cd", "Enable AVX-512 Conflict Detection Instructions", "avx512cd", &[_]@This() {
	169	.Sse,
	170	}),
	171	FeatureInfo(@This()).create(.Cldemote, "cldemote", "Enable Cache Demote", "cldemote"),
	172	FeatureInfo(@This()).create(.Clflushopt, "clflushopt", "Flush A Cache Line Optimized", "clflushopt"),
	173	FeatureInfo(@This()).create(.Clwb, "clwb", "Cache Line Write Back", "clwb"),
	174	FeatureInfo(@This()).create(.Clzero, "clzero", "Enable Cache Line Zero", "clzero"),
	175	FeatureInfo(@This()).create(.Cmov, "cmov", "Enable conditional move instructions", "cmov"),
	176	FeatureInfo(@This()).create(.Cx8, "cx8", "Support CMPXCHG8B instructions", "cx8"),
	177	FeatureInfo(@This()).createWithSubfeatures(.Cx16, "cx16", "64-bit with cmpxchg16b", "cx16", &[_]@This() {
	178	.Cx8,
	179	}),
	180	FeatureInfo(@This()).createWithSubfeatures(.Avx512dq, "avx512dq", "Enable AVX-512 Doubleword and Quadword Instructions", "avx512dq", &[_]@This() {
	181	.Sse,
	182	}),
	183	FeatureInfo(@This()).create(.Mpx, "mpx", "Deprecated. Support MPX instructions", "mpx"),
	184	FeatureInfo(@This()).create(.Enqcmd, "enqcmd", "Has ENQCMD instructions", "enqcmd"),
	185	FeatureInfo(@This()).createWithSubfeatures(.Avx512er, "avx512er", "Enable AVX-512 Exponential and Reciprocal Instructions", "avx512er", &[_]@This() {
	186	.Sse,
	187	}),
	188	FeatureInfo(@This()).create(.Ermsb, "ermsb", "REP MOVS/STOS are fast", "ermsb"),
	189	FeatureInfo(@This()).createWithSubfeatures(.F16c, "f16c", "Support 16-bit floating point conversion instructions", "f16c", &[_]@This() {
	190	.Sse,
	191	}),
	192	FeatureInfo(@This()).createWithSubfeatures(.Fma, "fma", "Enable three-operand fused multiple-add", "fma", &[_]@This() {
	193	.Sse,
	194	}),
	195	FeatureInfo(@This()).createWithSubfeatures(.Fma4, "fma4", "Enable four-operand fused multiple-add", "fma4", &[_]@This() {
	196	.Sse,
	197	}),
	198	FeatureInfo(@This()).create(.Fsgsbase, "fsgsbase", "Support FS/GS Base instructions", "fsgsbase"),
	199	FeatureInfo(@This()).create(.Fxsr, "fxsr", "Support fxsave/fxrestore instructions", "fxsr"),
	200	FeatureInfo(@This()).create(.Fast11bytenop, "fast-11bytenop", "Target can quickly decode up to 11 byte NOPs", "fast-11bytenop"),
	201	FeatureInfo(@This()).create(.Fast15bytenop, "fast-15bytenop", "Target can quickly decode up to 15 byte NOPs", "fast-15bytenop"),
	202	FeatureInfo(@This()).create(.FastBextr, "fast-bextr", "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", "fast-bextr"),
	203	FeatureInfo(@This()).createWithSubfeatures(.FastHops, "fast-hops", "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", "fast-hops", &[_]@This() {
	204	.Sse,
	205	}),
	206	FeatureInfo(@This()).create(.FastLzcnt, "fast-lzcnt", "LZCNT instructions are as fast as most simple integer ops", "fast-lzcnt"),
	207	FeatureInfo(@This()).create(.FastPartialYmmOrZmmWrite, "fast-partial-ymm-or-zmm-write", "Partial writes to YMM/ZMM registers are fast", "fast-partial-ymm-or-zmm-write"),
	208	FeatureInfo(@This()).create(.FastShldRotate, "fast-shld-rotate", "SHLD can be used as a faster rotate", "fast-shld-rotate"),
	209	FeatureInfo(@This()).create(.FastScalarFsqrt, "fast-scalar-fsqrt", "Scalar SQRT is fast (disable Newton-Raphson)", "fast-scalar-fsqrt"),
	210	FeatureInfo(@This()).create(.FastScalarShiftMasks, "fast-scalar-shift-masks", "Prefer a left/right scalar logical shift pair over a shift+and pair", "fast-scalar-shift-masks"),
	211	FeatureInfo(@This()).create(.FastVariableShuffle, "fast-variable-shuffle", "Shuffles with variable masks are fast", "fast-variable-shuffle"),
	212	FeatureInfo(@This()).create(.FastVectorFsqrt, "fast-vector-fsqrt", "Vector SQRT is fast (disable Newton-Raphson)", "fast-vector-fsqrt"),
	213	FeatureInfo(@This()).create(.FastVectorShiftMasks, "fast-vector-shift-masks", "Prefer a left/right vector logical shift pair over a shift+and pair", "fast-vector-shift-masks"),
	214	FeatureInfo(@This()).createWithSubfeatures(.Gfni, "gfni", "Enable Galois Field Arithmetic Instructions", "gfni", &[_]@This() {
	215	.Sse,
	216	}),
	217	FeatureInfo(@This()).create(.FastGather, "fast-gather", "Indicates if gather is reasonably fast", "fast-gather"),
	218	FeatureInfo(@This()).createWithSubfeatures(.Avx512ifma, "avx512ifma", "Enable AVX-512 Integer Fused Multiple-Add", "avx512ifma", &[_]@This() {
	219	.Sse,
	220	}),
	221	FeatureInfo(@This()).create(.Invpcid, "invpcid", "Invalidate Process-Context Identifier", "invpcid"),
	222	FeatureInfo(@This()).create(.Sahf, "sahf", "Support LAHF and SAHF instructions", "sahf"),
	223	FeatureInfo(@This()).create(.LeaSp, "lea-sp", "Use LEA for adjusting the stack pointer", "lea-sp"),
	224	FeatureInfo(@This()).create(.LeaUsesAg, "lea-uses-ag", "LEA instruction needs inputs at AG stage", "lea-uses-ag"),
	225	FeatureInfo(@This()).create(.Lwp, "lwp", "Enable LWP instructions", "lwp"),
	226	FeatureInfo(@This()).create(.Lzcnt, "lzcnt", "Support LZCNT instruction", "lzcnt"),
	227	FeatureInfo(@This()).create(.FalseDepsLzcntTzcnt, "false-deps-lzcnt-tzcnt", "LZCNT/TZCNT have a false dependency on dest register", "false-deps-lzcnt-tzcnt"),
	228	FeatureInfo(@This()).create(.Mmx, "mmx", "Enable MMX instructions", "mmx"),
	229	FeatureInfo(@This()).create(.Movbe, "movbe", "Support MOVBE instruction", "movbe"),
	230	FeatureInfo(@This()).create(.Movdir64b, "movdir64b", "Support movdir64b instruction", "movdir64b"),
	231	FeatureInfo(@This()).create(.Movdiri, "movdiri", "Support movdiri instruction", "movdiri"),
	232	FeatureInfo(@This()).create(.Mwaitx, "mwaitx", "Enable MONITORX/MWAITX timer functionality", "mwaitx"),
	233	FeatureInfo(@This()).create(.Macrofusion, "macrofusion", "Various instructions can be fused with conditional branches", "macrofusion"),
	234	FeatureInfo(@This()).create(.MergeToThreewayBranch, "merge-to-threeway-branch", "Merge branches to a three-way conditional branch", "merge-to-threeway-branch"),
	235	FeatureInfo(@This()).create(.Nopl, "nopl", "Enable NOPL instruction", "nopl"),
	236	FeatureInfo(@This()).createWithSubfeatures(.Pclmul, "pclmul", "Enable packed carry-less multiplication instructions", "pclmul", &[_]@This() {
	237	.Sse,
	238	}),
	239	FeatureInfo(@This()).create(.Pconfig, "pconfig", "platform configuration instruction", "pconfig"),
	240	FeatureInfo(@This()).createWithSubfeatures(.Avx512pf, "avx512pf", "Enable AVX-512 PreFetch Instructions", "avx512pf", &[_]@This() {
	241	.Sse,
	242	}),
	243	FeatureInfo(@This()).create(.Pku, "pku", "Enable protection keys", "pku"),
	244	FeatureInfo(@This()).create(.Popcnt, "popcnt", "Support POPCNT instruction", "popcnt"),
	245	FeatureInfo(@This()).create(.FalseDepsPopcnt, "false-deps-popcnt", "POPCNT has a false dependency on dest register", "false-deps-popcnt"),
	246	FeatureInfo(@This()).create(.Prefetchwt1, "prefetchwt1", "Prefetch with Intent to Write and T1 Hint", "prefetchwt1"),
	247	FeatureInfo(@This()).create(.Prfchw, "prfchw", "Support PRFCHW instructions", "prfchw"),
	248	FeatureInfo(@This()).create(.Ptwrite, "ptwrite", "Support ptwrite instruction", "ptwrite"),
	249	FeatureInfo(@This()).create(.PadShortFunctions, "pad-short-functions", "Pad short functions", "pad-short-functions"),
	250	FeatureInfo(@This()).create(.Prefer128Bit, "prefer-128-bit", "Prefer 128-bit AVX instructions", "prefer-128-bit"),
	251	FeatureInfo(@This()).create(.Prefer256Bit, "prefer-256-bit", "Prefer 256-bit AVX instructions", "prefer-256-bit"),
	252	FeatureInfo(@This()).create(.Rdpid, "rdpid", "Support RDPID instructions", "rdpid"),
	253	FeatureInfo(@This()).create(.Rdrnd, "rdrnd", "Support RDRAND instruction", "rdrnd"),
	254	FeatureInfo(@This()).create(.Rdseed, "rdseed", "Support RDSEED instruction", "rdseed"),
	255	FeatureInfo(@This()).create(.Rtm, "rtm", "Support RTM instructions", "rtm"),
	256	FeatureInfo(@This()).createWithSubfeatures(.Retpoline, "retpoline", "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", "retpoline", &[_]@This() {
	257	.RetpolineIndirectBranches,
	258	.RetpolineIndirectCalls,
	259	}),
	260	FeatureInfo(@This()).createWithSubfeatures(.RetpolineExternalThunk, "retpoline-external-thunk", "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", "retpoline-external-thunk", &[_]@This() {
	261	.RetpolineIndirectCalls,
	262	}),
	263	FeatureInfo(@This()).create(.RetpolineIndirectBranches, "retpoline-indirect-branches", "Remove speculation of indirect branches from the generated code", "retpoline-indirect-branches"),
	264	FeatureInfo(@This()).create(.RetpolineIndirectCalls, "retpoline-indirect-calls", "Remove speculation of indirect calls from the generated code", "retpoline-indirect-calls"),
	265	FeatureInfo(@This()).create(.Sgx, "sgx", "Enable Software Guard Extensions", "sgx"),
	266	FeatureInfo(@This()).createWithSubfeatures(.Sha, "sha", "Enable SHA instructions", "sha", &[_]@This() {
	267	.Sse,
	268	}),
	269	FeatureInfo(@This()).create(.Shstk, "shstk", "Support CET Shadow-Stack instructions", "shstk"),
	270	FeatureInfo(@This()).create(.Sse, "sse", "Enable SSE instructions", "sse"),
	271	FeatureInfo(@This()).createWithSubfeatures(.Sse2, "sse2", "Enable SSE2 instructions", "sse2", &[_]@This() {
	272	.Sse,
	273	}),
	274	FeatureInfo(@This()).createWithSubfeatures(.Sse3, "sse3", "Enable SSE3 instructions", "sse3", &[_]@This() {
	275	.Sse,
	276	}),
	277	FeatureInfo(@This()).createWithSubfeatures(.Sse4a, "sse4a", "Support SSE 4a instructions", "sse4a", &[_]@This() {
	278	.Sse,
	279	}),
	280	FeatureInfo(@This()).createWithSubfeatures(.Sse41, "sse4.1", "Enable SSE 4.1 instructions", "sse4.1", &[_]@This() {
	281	.Sse,
	282	}),
	283	FeatureInfo(@This()).createWithSubfeatures(.Sse42, "sse4.2", "Enable SSE 4.2 instructions", "sse4.2", &[_]@This() {
	284	.Sse,
	285	}),
	286	FeatureInfo(@This()).create(.SseUnalignedMem, "sse-unaligned-mem", "Allow unaligned memory operands with SSE instructions", "sse-unaligned-mem"),
	287	FeatureInfo(@This()).createWithSubfeatures(.Ssse3, "ssse3", "Enable SSSE3 instructions", "ssse3", &[_]@This() {
	288	.Sse,
	289	}),
	290	FeatureInfo(@This()).create(.Slow3opsLea, "slow-3ops-lea", "LEA instruction with 3 ops or certain registers is slow", "slow-3ops-lea"),
	291	FeatureInfo(@This()).create(.IdivlToDivb, "idivl-to-divb", "Use 8-bit divide for positive values less than 256", "idivl-to-divb"),
	292	FeatureInfo(@This()).create(.IdivqToDivl, "idivq-to-divl", "Use 32-bit divide for positive values less than 2^32", "idivq-to-divl"),
	293	FeatureInfo(@This()).create(.SlowIncdec, "slow-incdec", "INC and DEC instructions are slower than ADD and SUB", "slow-incdec"),
	294	FeatureInfo(@This()).create(.SlowLea, "slow-lea", "LEA instruction with certain arguments is slow", "slow-lea"),
	295	FeatureInfo(@This()).create(.SlowPmaddwd, "slow-pmaddwd", "PMADDWD is slower than PMULLD", "slow-pmaddwd"),
	296	FeatureInfo(@This()).create(.SlowPmulld, "slow-pmulld", "PMULLD instruction is slow", "slow-pmulld"),
	297	FeatureInfo(@This()).create(.SlowShld, "slow-shld", "SHLD instruction is slow", "slow-shld"),
	298	FeatureInfo(@This()).create(.SlowTwoMemOps, "slow-two-mem-ops", "Two memory operand instructions are slow", "slow-two-mem-ops"),
	299	FeatureInfo(@This()).create(.SlowUnalignedMem16, "slow-unaligned-mem-16", "Slow unaligned 16-byte memory access", "slow-unaligned-mem-16"),
	300	FeatureInfo(@This()).create(.SlowUnalignedMem32, "slow-unaligned-mem-32", "Slow unaligned 32-byte memory access", "slow-unaligned-mem-32"),
	301	FeatureInfo(@This()).create(.SoftFloat, "soft-float", "Use software floating point features", "soft-float"),
	302	FeatureInfo(@This()).create(.Tbm, "tbm", "Enable TBM instructions", "tbm"),
	303	FeatureInfo(@This()).create(.UseAa, "use-aa", "Use alias analysis during codegen", "use-aa"),
	304	FeatureInfo(@This()).createWithSubfeatures(.Vaes, "vaes", "Promote selected AES instructions to AVX512/AVX registers", "vaes", &[_]@This() {
	305	.Sse,
	306	}),
	307	FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi, "avx512vbmi", "Enable AVX-512 Vector Byte Manipulation Instructions", "avx512vbmi", &[_]@This() {
	308	.Sse,
	309	}),
	310	FeatureInfo(@This()).createWithSubfeatures(.Avx512vbmi2, "avx512vbmi2", "Enable AVX-512 further Vector Byte Manipulation Instructions", "avx512vbmi2", &[_]@This() {
	311	.Sse,
	312	}),
	313	FeatureInfo(@This()).createWithSubfeatures(.Avx512vl, "avx512vl", "Enable AVX-512 Vector Length eXtensions", "avx512vl", &[_]@This() {
	314	.Sse,
	315	}),
	316	FeatureInfo(@This()).createWithSubfeatures(.Avx512vnni, "avx512vnni", "Enable AVX-512 Vector Neural Network Instructions", "avx512vnni", &[_]@This() {
	317	.Sse,
	318	}),
	319	FeatureInfo(@This()).createWithSubfeatures(.Avx512vp2intersect, "avx512vp2intersect", "Enable AVX-512 vp2intersect", "avx512vp2intersect", &[_]@This() {
	320	.Sse,
	321	}),
	322	FeatureInfo(@This()).createWithSubfeatures(.Vpclmulqdq, "vpclmulqdq", "Enable vpclmulqdq instructions", "vpclmulqdq", &[_]@This() {
	323	.Sse,
	324	}),
	325	FeatureInfo(@This()).createWithSubfeatures(.Avx512vpopcntdq, "avx512vpopcntdq", "Enable AVX-512 Population Count Instructions", "avx512vpopcntdq", &[_]@This() {
	326	.Sse,
	327	}),
	328	FeatureInfo(@This()).create(.Waitpkg, "waitpkg", "Wait and pause enhancements", "waitpkg"),
	329	FeatureInfo(@This()).create(.Wbnoinvd, "wbnoinvd", "Write Back No Invalidate", "wbnoinvd"),
	330	FeatureInfo(@This()).create(.X87, "x87", "Enable X87 float instructions", "x87"),
	331	FeatureInfo(@This()).createWithSubfeatures(.Xop, "xop", "Enable XOP instructions", "xop", &[_]@This() {
	332	.Sse,
	333	}),
	334	FeatureInfo(@This()).create(.Xsave, "xsave", "Support xsave instructions", "xsave"),
	335	FeatureInfo(@This()).create(.Xsavec, "xsavec", "Support xsavec instructions", "xsavec"),
	336	FeatureInfo(@This()).create(.Xsaveopt, "xsaveopt", "Support xsaveopt instructions", "xsaveopt"),
	337	FeatureInfo(@This()).create(.Xsaves, "xsaves", "Support xsaves instructions", "xsaves"),
	338	FeatureInfo(@This()).create(.BitMode16, "16bit-mode", "16-bit mode (i8086)", "16bit-mode"),
	339	FeatureInfo(@This()).create(.BitMode32, "32bit-mode", "32-bit mode (80386)", "32bit-mode"),
	340	FeatureInfo(@This()).create(.BitMode64, "64bit-mode", "64-bit mode (x86_64)", "64bit-mode"),
	341	};
	342	};

lib/std/target/feature/empty.zig created+5

...	...	@@ -0,0 +1,5 @@
	1	const FeatureInfo = @import("std").target.feature.FeatureInfo;
	2
	3	pub const EmptyFeature = enum {
	4	pub const feature_infos = [0]FeatureInfo(@This()) {};
	5	}