authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-06 09:48:55+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-06 10:05:04+02:00
log165b8c28e5c306e1d05d266ffbf51abed4bfbc36
tree2bf1a980f16a587c3e96bbaa0d3eda2e84aaac84
parentf04a251e05c3f8bef73421b6bf152902153f55a6
signature Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.zig.system.freebsd: implement powerpc CPU model detection

ref https://codeberg.org/ziglang/zig/issues/36726

1 files changed, 74 insertions(+), 0 deletions(-)

lib/std/zig/system/freebsd.zig+74
...@@ -30,9 +30,83 @@ const aarch64 = struct {...@@ -30,9 +30,83 @@ const aarch64 = struct {
30 }30 }
31};31};
3232
33const powerpc = struct {
34 const models = .{
35 .{ "Freescale e500v1 core", &std.Target.powerpc.cpu.e500 },
36 .{ "Freescale e500v2 core", &std.Target.powerpc.cpu.e500 }, // TODO: This should have efpu2.
37 .{ "Freescale e500mc core", &std.Target.powerpc.cpu.e500mc },
38 .{ "Freescale e5500 core", &std.Target.powerpc.cpu.e5500 },
39 .{ "Freescale e6500 core", &std.Target.powerpc.cpu.e5500 }, // TODO: This should have altivec.
40 .{ "IBM Cell Broadband Engine", &std.Target.powerpc.cpu.ppc64 },
41 .{ "IBM PowerPC 750FX", &std.Target.powerpc.cpu.@"750" },
42 .{ "IBM PowerPC 970", &std.Target.powerpc.cpu.@"970" },
43 .{ "IBM PowerPC 970FX", &std.Target.powerpc.cpu.@"970" },
44 .{ "IBM PowerPC 970GX", &std.Target.powerpc.cpu.@"970" },
45 .{ "IBM PowerPC 970MP", &std.Target.powerpc.cpu.@"970" },
46 .{ "IBM POWER4", &std.Target.powerpc.cpu.pwr4 },
47 .{ "IBM POWER4+", &std.Target.powerpc.cpu.pwr4 },
48 .{ "IBM POWER5", &std.Target.powerpc.cpu.pwr5 },
49 .{ "IBM POWER5+", &std.Target.powerpc.cpu.pwr5x },
50 .{ "IBM POWER6", &std.Target.powerpc.cpu.pwr6 },
51 .{ "IBM POWER7", &std.Target.powerpc.cpu.pwr7 },
52 .{ "IBM POWER7+", &std.Target.powerpc.cpu.pwr7 },
53 .{ "IBM POWER8E", &std.Target.powerpc.cpu.pwr8 },
54 .{ "IBM POWER8NVL", &std.Target.powerpc.cpu.pwr8 },
55 .{ "IBM POWER8", &std.Target.powerpc.cpu.pwr8 },
56 .{ "IBM POWER9", &std.Target.powerpc.cpu.pwr9 },
57 .{ "IBM POWER10", &std.Target.powerpc.cpu.pwr10 },
58 .{ "IBM POWER11", &std.Target.powerpc.cpu.pwr11 },
59 .{ "Motorola PowerPC 601", &std.Target.powerpc.cpu.@"601" },
60 .{ "Motorola PowerPC 602", &std.Target.powerpc.cpu.@"602" },
61 .{ "Motorola PowerPC 603", &std.Target.powerpc.cpu.@"603" },
62 .{ "Motorola PowerPC 603e", &std.Target.powerpc.cpu.@"603e" },
63 .{ "Motorola PowerPC 603ev", &std.Target.powerpc.cpu.@"603ev" },
64 .{ "Motorola PowerPC 604", &std.Target.powerpc.cpu.@"604" },
65 .{ "Motorola PowerPC 604ev", &std.Target.powerpc.cpu.@"604e" },
66 .{ "Motorola PowerPC 620", &std.Target.powerpc.cpu.@"620" },
67 .{ "Motorola PowerPC 750", &std.Target.powerpc.cpu.@"750" },
68 .{ "Motorola PowerPC 7400", &std.Target.powerpc.cpu.@"7400" },
69 .{ "Motorola PowerPC 7410", &std.Target.powerpc.cpu.@"7400" },
70 .{ "Motorola PowerPC 7450", &std.Target.powerpc.cpu.@"7450" },
71 .{ "Motorola PowerPC 7455", &std.Target.powerpc.cpu.@"7450" },
72 .{ "Motorola PowerPC 7457", &std.Target.powerpc.cpu.@"7450" },
73 .{ "Motorola PowerPC 7457", &std.Target.powerpc.cpu.@"7450" },
74 .{ "Motorola PowerPC 7447A", &std.Target.powerpc.cpu.@"7450" },
75 .{ "Motorola PowerPC 7448", &std.Target.powerpc.cpu.@"7450" },
76 .{ "Motorola PowerPC 8240", &std.Target.powerpc.cpu.@"603e" },
77 .{ "Motorola PowerPC 8245", &std.Target.powerpc.cpu.@"603e" },
78 };
79
80 fn detectNativeCpu(arch: std.Target.Cpu.Arch) ?std.Target.Cpu {
81 const mib: [2]c_int = [_]c_int{
82 std.c.CTL.HW,
83 std.c.HW.MODEL,
84 };
85 var buf: [64:0]u8 = undefined;
86 var len: usize = buf.len + 1;
87
88 std.posix.sysctl(&mib, &buf, &len, null, 0) catch |err| switch (err) {
89 error.NameTooLong => unreachable,
90 error.PermissionDenied => unreachable,
91 error.SystemResources => unreachable,
92 error.UnknownName => unreachable,
93 error.Unexpected => return null,
94 };
95
96 const name = buf[0 .. len - 1 :0];
97
98 inline for (models) |pair| {
99 if (std.mem.eql(u8, name, pair[0])) return pair[1].toCpu(arch);
100 }
101
102 return null;
103 }
104};
105
33pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {106pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {
34 return switch (native_arch) {107 return switch (native_arch) {
35 .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch),108 .aarch64 => aarch64.detectNativeCpuAndFeatures(native_arch),
109 .powerpc64, .powerpc64le => powerpc.detectNativeCpu(native_arch),
36 else => null,110 else => null,
37 };111 };
38}112}