| author |  Andrew Kelley <andrew@ziglang.org> 2020-03-19 13:18:14-04:00 |
| committer | Andrew Kelley <andrew@ziglang.org> 2020-03-19 13:18:14-04:00 |
| log | 1d7861a36e1bcd8f7bfdb53716ef53467704922b |
| tree | a63abc081b671ea77d082d62053af37dcef14aac |
| parent | 8ddf9d84ffb208042ae7ea0fb3dc9fbfb2b5c983 |
| signature |  Commit is signed but in an unrecognized format. |
fix incorrect sentinel check
4 files changed, 10 insertions(+), 17 deletions(-)
lib- std
- crypto
lib/std/crypto/sha2.zig+2-4
| ... | @@ -167,8 +167,7 @@ fn Sha2_32(comptime params: Sha2Params32) type { | ... | @@ -167,8 +167,7 @@ fn Sha2_32(comptime params: Sha2Params32) type { |
| 167 | const rr = d.s[0 .. params.out_len / 32]; | 167 | const rr = d.s[0 .. params.out_len / 32]; |
| 168 | 168 | ||
| 169 | for (rr) |s, j| { | 169 | for (rr) |s, j| { |
| 170 | // TODO https://github.com/ziglang/zig/issues/863 | 170 | mem.writeIntBig(u32, out[4 * j ..][0..4], s); |
| 171 | mem.writeIntSliceBig(u32, out[4 * j .. 4 * j + 4], s); | ||
| 172 | } | 171 | } |
| 173 | } | 172 | } |
| 174 | 173 | ||
| ... | @@ -509,8 +508,7 @@ fn Sha2_64(comptime params: Sha2Params64) type { | ... | @@ -509,8 +508,7 @@ fn Sha2_64(comptime params: Sha2Params64) type { |
| 509 | const rr = d.s[0 .. params.out_len / 64]; | 508 | const rr = d.s[0 .. params.out_len / 64]; |
| 510 | 509 | ||
| 511 | for (rr) |s, j| { | 510 | for (rr) |s, j| { |
| 512 | // TODO https://github.com/ziglang/zig/issues/863 | 511 | mem.writeIntBig(u64, out[8 * j ..][0..8], s); |
| 513 | mem.writeIntSliceBig(u64, out[8 * j .. 8 * j + 8], s); | ||
| 514 | } | 512 | } |
| 515 | } | 513 | } |
| 516 | 514 |
src/all_types.hpp+1
| ... | @@ -3711,6 +3711,7 @@ struct IrInstGenSlice { | ... | @@ -3711,6 +3711,7 @@ struct IrInstGenSlice { |
| 3711 | IrInstGen *start; | 3711 | IrInstGen *start; |
| 3712 | IrInstGen *end; | 3712 | IrInstGen *end; |
| 3713 | IrInstGen *result_loc; | 3713 | IrInstGen *result_loc; |
| 3714 | ZigValue *sentinel; | ||
| 3714 | bool safety_check_on; | 3715 | bool safety_check_on; |
| 3715 | }; | 3716 | }; |
| 3716 | 3717 |
src/codegen.cpp+3-11
| ... | @@ -5425,17 +5425,9 @@ static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrI | ... | @@ -5425,17 +5425,9 @@ static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrI |
| 5425 | return nullptr; | 5425 | return nullptr; |
| 5426 | } | 5426 | } |
| 5427 | 5427 | ||
| 5428 | ZigValue *sentinel = nullptr; | 5428 | // This is not whether the result type has a sentinel, but whether there should be a sentinel check, |
| 5429 | if (result_type->id == ZigTypeIdPointer) { | 5429 | // e.g. if they used [a..b :s] syntax. |
| 5430 | ZigType *result_array_type = result_type->data.pointer.child_type; | 5430 | ZigValue *sentinel = instruction->sentinel; |
| 5431 | ir_assert(result_array_type->id == ZigTypeIdArray, &instruction->base); | ||
| 5432 | sentinel = result_array_type->data.array.sentinel; | ||
| 5433 | } else if (result_type->id == ZigTypeIdStruct) { | ||
| 5434 | ZigType *res_slice_ptr_type = result_type->data.structure.fields[slice_ptr_index]->type_entry; | ||
| 5435 | sentinel = res_slice_ptr_type->data.pointer.sentinel; | ||
| 5436 | } else { | ||
| 5437 | zig_unreachable(); | ||
| 5438 | } | ||
| 5439 | 5431 | ||
| 5440 | if (array_type->id == ZigTypeIdArray || | 5432 | if (array_type->id == ZigTypeIdArray || |
| 5441 | (array_type->id == ZigTypeIdPointer && array_type->data.pointer.ptr_len == PtrLenSingle)) | 5433 | (array_type->id == ZigTypeIdPointer && array_type->data.pointer.ptr_len == PtrLenSingle)) |
src/ir.cpp+4-2
| ... | @@ -3732,7 +3732,8 @@ static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *s | ... | @@ -3732,7 +3732,8 @@ static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *s |
| 3732 | } | 3732 | } |
| 3733 | 3733 | ||
| 3734 | static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type, | 3734 | static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type, |
| 3735 | IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc) | 3735 | IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc, |
| 3736 | ZigValue *sentinel) | ||
| 3736 | { | 3737 | { |
| 3737 | IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>( | 3738 | IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>( |
| 3738 | &ira->new_irb, source_instruction->scope, source_instruction->source_node); | 3739 | &ira->new_irb, source_instruction->scope, source_instruction->source_node); |
| ... | @@ -3742,6 +3743,7 @@ static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, | ... | @@ -3742,6 +3743,7 @@ static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, |
| 3742 | instruction->end = end; | 3743 | instruction->end = end; |
| 3743 | instruction->safety_check_on = safety_check_on; | 3744 | instruction->safety_check_on = safety_check_on; |
| 3744 | instruction->result_loc = result_loc; | 3745 | instruction->result_loc = result_loc; |
| 3746 | instruction->sentinel = sentinel; | ||
| 3745 | 3747 | ||
| 3746 | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); | 3748 | ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block); |
| 3747 | ir_ref_inst_gen(start, ira->new_irb.current_basic_block); | 3749 | ir_ref_inst_gen(start, ira->new_irb.current_basic_block); |
| ... | @@ -26667,7 +26669,7 @@ done_with_return_type: | ... | @@ -26667,7 +26669,7 @@ done_with_return_type: |
| 26667 | } | 26669 | } |
| 26668 | 26670 | ||
| 26669 | return ir_build_slice_gen(ira, &instruction->base.base, return_type, ptr_ptr, | 26671 | return ir_build_slice_gen(ira, &instruction->base.base, return_type, ptr_ptr, |
| 26670 | casted_start, end, instruction->safety_check_on, result_loc); | 26672 | casted_start, end, instruction->safety_check_on, result_loc, sentinel_val); |
| 26671 | } | 26673 | } |
| 26672 | 26674 | ||
| 26673 | static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) { | 26675 | static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) { |