authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-30 00:11:12+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-07-30 06:30:25+02:00
log1e9278d718f7eec0aaad4dc296757c70e7f0f68b
tree57a9975e245b95d85a308f07dbb4335bbbe98399
parent38e0f049c531e83ec2eec80d50b624e6c3b8c486
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Remove `spir`/`spir64` architecture tags.

These were for very old OpenCL have been long abandoned in favor of SPIR-V. * https://github.com/KhronosGroup/SPIR * https://github.com/KhronosGroup/SPIR-Tools

6 files changed, 2 insertions(+), 35 deletions(-)

lib/compiler/aro/aro/target.zig-7
......@@ -53,7 +53,6 @@ pub fn intPtrType(target: std.Target) Type {
5353 .xcore,
5454 .hexagon,
5555 .m68k,
56 .spir,
5756 .spirv32,
5857 .arc,
5958 .avr,
......@@ -473,7 +472,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
473472 .x86,
474473 .xcore,
475474 .nvptx,
476 .spir,
477475 .kalimba,
478476 .lanai,
479477 .wasm32,
......@@ -487,7 +485,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
487485 .aarch64_be => copy.cpu.arch = .armeb,
488486 .nvptx64 => copy.cpu.arch = .nvptx,
489487 .wasm64 => copy.cpu.arch = .wasm32,
490 .spir64 => copy.cpu.arch = .spir,
491488 .spirv64 => copy.cpu.arch = .spirv32,
492489 .loongarch64 => copy.cpu.arch = .loongarch32,
493490 .mips64 => copy.cpu.arch = .mips,
......@@ -526,7 +523,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
526523 .bpfel,
527524 .nvptx64,
528525 .wasm64,
529 .spir64,
530526 .spirv64,
531527 .loongarch64,
532528 .mips64,
......@@ -550,7 +546,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
550546 .powerpcle => copy.cpu.arch = .powerpc64le,
551547 .riscv32 => copy.cpu.arch = .riscv64,
552548 .sparc => copy.cpu.arch = .sparc64,
553 .spir => copy.cpu.arch = .spir64,
554549 .spirv32 => copy.cpu.arch = .spirv64,
555550 .thumb => copy.cpu.arch = .aarch64,
556551 .thumbeb => copy.cpu.arch = .aarch64_be,
......@@ -607,8 +602,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
607602 .xtensa => "xtensa",
608603 .nvptx => "nvptx",
609604 .nvptx64 => "nvptx64",
610 .spir => "spir",
611 .spir64 => "spir64",
612605 .spirv32 => "spirv32",
613606 .spirv64 => "spirv64",
614607 .kalimba => "kalimba",
lib/std/Target.zig+2-16
......@@ -1027,8 +1027,6 @@ pub const Cpu = struct {
10271027 xtensa,
10281028 nvptx,
10291029 nvptx64,
1030 spir,
1031 spir64,
10321030 spirv,
10331031 spirv32,
10341032 spirv64,
......@@ -1048,6 +1046,8 @@ pub const Cpu = struct {
10481046 // - amdil64
10491047 // - hsail
10501048 // - hsail64
1049 // - spir
1050 // - spir64
10511051 // - shave
10521052 // - renderscript32
10531053 // - renderscript64
......@@ -1178,7 +1178,6 @@ pub const Cpu = struct {
11781178 .xcore => .XCORE,
11791179 .xtensa => .XTENSA,
11801180 .nvptx => .NONE,
1181 .spir => .NONE,
11821181 .kalimba => .CSR_KALIMBA,
11831182 .lanai => .LANAI,
11841183 .wasm32 => .NONE,
......@@ -1191,7 +1190,6 @@ pub const Cpu = struct {
11911190 .riscv64 => .RISCV,
11921191 .x86_64 => .X86_64,
11931192 .nvptx64 => .NONE,
1194 .spir64 => .NONE,
11951193 .wasm64 => .NONE,
11961194 .amdgcn => .AMDGPU,
11971195 .bpfel => .BPF,
......@@ -1231,7 +1229,6 @@ pub const Cpu = struct {
12311229 .xcore => .Unknown,
12321230 .xtensa => .Unknown,
12331231 .nvptx => .Unknown,
1234 .spir => .Unknown,
12351232 .kalimba => .Unknown,
12361233 .lanai => .Unknown,
12371234 .wasm32 => .Unknown,
......@@ -1244,7 +1241,6 @@ pub const Cpu = struct {
12441241 .riscv64 => .RISCV64,
12451242 .x86_64 => .X64,
12461243 .nvptx64 => .Unknown,
1247 .spir64 => .Unknown,
12481244 .wasm64 => .Unknown,
12491245 .amdgcn => .Unknown,
12501246 .bpfel => .Unknown,
......@@ -1289,8 +1285,6 @@ pub const Cpu = struct {
12891285 .wasm64,
12901286 .xcore,
12911287 .thumb,
1292 .spir,
1293 .spir64,
12941288 .ve,
12951289 .spu_2,
12961290 // GPU bitness is opaque. For now, assume little endian.
......@@ -1769,8 +1763,6 @@ pub const DynamicLinker = struct {
17691763 .msp430,
17701764 .amdgcn,
17711765 .xcore,
1772 .spir,
1773 .spir64,
17741766 .kalimba,
17751767 .lanai,
17761768 .ve,
......@@ -1868,7 +1860,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
18681860 .x86,
18691861 .xcore,
18701862 .nvptx,
1871 .spir,
18721863 .kalimba,
18731864 .lanai,
18741865 .wasm32,
......@@ -1887,7 +1878,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
18871878 .riscv64,
18881879 .x86_64,
18891880 .nvptx64,
1890 .spir64,
18911881 .wasm64,
18921882 .amdgcn,
18931883 .bpfel,
......@@ -2368,7 +2358,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23682358 .xcore,
23692359 .dxil,
23702360 .loongarch32,
2371 .spir,
23722361 .spirv32,
23732362 .kalimba,
23742363 .ve,
......@@ -2391,7 +2380,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
23912380 .nvptx,
23922381 .nvptx64,
23932382 .s390x,
2394 .spir64,
23952383 .spirv64,
23962384 => 8,
23972385
......@@ -2476,7 +2464,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
24762464 .xcore,
24772465 .dxil,
24782466 .loongarch32,
2479 .spir,
24802467 .spirv32,
24812468 .kalimba,
24822469 .ve,
......@@ -2506,7 +2493,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
25062493 .nvptx,
25072494 .nvptx64,
25082495 .s390x,
2509 .spir64,
25102496 .spirv64,
25112497 => 8,
25122498
src/Type.zig-2
......@@ -1647,11 +1647,9 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
16471647 .csky,
16481648 .arc,
16491649 .m68k,
1650 .spir,
16511650 .kalimba,
16521651 .spirv,
16531652 .spirv32,
1654 .spir64,
16551653 .ve,
16561654 .spirv64,
16571655 .dxil,
src/Zcu.zig-2
......@@ -3253,7 +3253,6 @@ pub fn atomicPtrAlignment(
32533253 .thumbeb,
32543254 .x86,
32553255 .xcore,
3256 .spir,
32573256 .kalimba,
32583257 .lanai,
32593258 .wasm32,
......@@ -3275,7 +3274,6 @@ pub fn atomicPtrAlignment(
32753274 .riscv64,
32763275 .sparc64,
32773276 .s390x,
3278 .spir64,
32793277 .wasm64,
32803278 .ve,
32813279 .spirv64,
src/codegen/llvm.zig-6
......@@ -79,8 +79,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
7979 .xtensa => "xtensa",
8080 .nvptx => "nvptx",
8181 .nvptx64 => "nvptx64",
82 .spir => "spir",
83 .spir64 => "spir64",
8482 .spirv => "spirv",
8583 .spirv32 => "spirv32",
8684 .spirv64 => "spirv64",
......@@ -292,8 +290,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
292290 .xtensa => .xtensa,
293291 .nvptx => .nvptx,
294292 .nvptx64 => .nvptx64,
295 .spir => .spir,
296 .spir64 => .spir64,
297293 .spirv => .spirv,
298294 .spirv32 => .spirv32,
299295 .spirv64 => .spirv64,
......@@ -12095,8 +12091,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
1209512091 },
1209612092
1209712093 // LLVM backends that have no initialization functions.
12098 .spir,
12099 .spir64,
1210012094 .spirv,
1210112095 .spirv32,
1210212096 .spirv64,
src/target.zig-2
......@@ -148,8 +148,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
148148 .xtensa,
149149 .nvptx,
150150 .nvptx64,
151 .spir,
152 .spir64,
153151 .spirv,
154152 .spirv32,
155153 .spirv64,